15abcdc20SMichal Simek# SPDX-License-Identifier: GPL-2.0 25abcdc20SMichal Simekmenu "Xilinx SoC drivers" 35abcdc20SMichal Simek 4*cee8113aSDhaval Shahconfig XILINX_VCU 5*cee8113aSDhaval Shah tristate "Xilinx VCU logicoreIP Init" 6*cee8113aSDhaval Shah help 7*cee8113aSDhaval Shah Provides the driver to enable and disable the isolation between the 8*cee8113aSDhaval Shah processing system and programmable logic part by using the logicoreIP 9*cee8113aSDhaval Shah register set. This driver also configures the frequency based on the 10*cee8113aSDhaval Shah clock information from the logicoreIP register set. 11*cee8113aSDhaval Shah 12*cee8113aSDhaval Shah If you say yes here you get support for the logicoreIP. 13*cee8113aSDhaval Shah 14*cee8113aSDhaval Shah If unsure, say N. 15*cee8113aSDhaval Shah 16*cee8113aSDhaval Shah To compile this driver as a module, choose M here: the 17*cee8113aSDhaval Shah module will be called xlnx_vcu. 18*cee8113aSDhaval Shah 195abcdc20SMichal Simekendmenu 20