15abcdc20SMichal Simek# SPDX-License-Identifier: GPL-2.0 25abcdc20SMichal Simekmenu "Xilinx SoC drivers" 35abcdc20SMichal Simek 4cee8113aSDhaval Shahconfig XILINX_VCU 5cee8113aSDhaval Shah tristate "Xilinx VCU logicoreIP Init" 6*05015061SDhaval Shah depends on HAS_IOMEM 7cee8113aSDhaval Shah help 8cee8113aSDhaval Shah Provides the driver to enable and disable the isolation between the 9cee8113aSDhaval Shah processing system and programmable logic part by using the logicoreIP 10cee8113aSDhaval Shah register set. This driver also configures the frequency based on the 11cee8113aSDhaval Shah clock information from the logicoreIP register set. 12cee8113aSDhaval Shah 13cee8113aSDhaval Shah If you say yes here you get support for the logicoreIP. 14cee8113aSDhaval Shah 15cee8113aSDhaval Shah If unsure, say N. 16cee8113aSDhaval Shah 17cee8113aSDhaval Shah To compile this driver as a module, choose M here: the 18cee8113aSDhaval Shah module will be called xlnx_vcu. 19cee8113aSDhaval Shah 205abcdc20SMichal Simekendmenu 21