1*f956a785SLinus Walleij /* 2*f956a785SLinus Walleij * Copyright (C) 2014 Linaro Ltd. 3*f956a785SLinus Walleij * 4*f956a785SLinus Walleij * Author: Linus Walleij <linus.walleij@linaro.org> 5*f956a785SLinus Walleij * 6*f956a785SLinus Walleij * This program is free software; you can redistribute it and/or modify 7*f956a785SLinus Walleij * it under the terms of the GNU General Public License version 2, as 8*f956a785SLinus Walleij * published by the Free Software Foundation. 9*f956a785SLinus Walleij * 10*f956a785SLinus Walleij */ 11*f956a785SLinus Walleij #include <linux/init.h> 12*f956a785SLinus Walleij #include <linux/io.h> 13*f956a785SLinus Walleij #include <linux/slab.h> 14*f956a785SLinus Walleij #include <linux/sys_soc.h> 15*f956a785SLinus Walleij #include <linux/platform_device.h> 16*f956a785SLinus Walleij #include <linux/mfd/syscon.h> 17*f956a785SLinus Walleij #include <linux/regmap.h> 18*f956a785SLinus Walleij #include <linux/of.h> 19*f956a785SLinus Walleij 20*f956a785SLinus Walleij #define INTEGRATOR_HDR_ID_OFFSET 0x00 21*f956a785SLinus Walleij 22*f956a785SLinus Walleij static u32 integrator_coreid; 23*f956a785SLinus Walleij 24*f956a785SLinus Walleij static const struct of_device_id integrator_cm_match[] = { 25*f956a785SLinus Walleij { .compatible = "arm,core-module-integrator", }, 26*f956a785SLinus Walleij }; 27*f956a785SLinus Walleij 28*f956a785SLinus Walleij static const char *integrator_arch_str(u32 id) 29*f956a785SLinus Walleij { 30*f956a785SLinus Walleij switch ((id >> 16) & 0xff) { 31*f956a785SLinus Walleij case 0x00: 32*f956a785SLinus Walleij return "ASB little-endian"; 33*f956a785SLinus Walleij case 0x01: 34*f956a785SLinus Walleij return "AHB little-endian"; 35*f956a785SLinus Walleij case 0x03: 36*f956a785SLinus Walleij return "AHB-Lite system bus, bi-endian"; 37*f956a785SLinus Walleij case 0x04: 38*f956a785SLinus Walleij return "AHB"; 39*f956a785SLinus Walleij case 0x08: 40*f956a785SLinus Walleij return "AHB system bus, ASB processor bus"; 41*f956a785SLinus Walleij default: 42*f956a785SLinus Walleij return "Unknown"; 43*f956a785SLinus Walleij } 44*f956a785SLinus Walleij } 45*f956a785SLinus Walleij 46*f956a785SLinus Walleij static const char *integrator_fpga_str(u32 id) 47*f956a785SLinus Walleij { 48*f956a785SLinus Walleij switch ((id >> 12) & 0xf) { 49*f956a785SLinus Walleij case 0x01: 50*f956a785SLinus Walleij return "XC4062"; 51*f956a785SLinus Walleij case 0x02: 52*f956a785SLinus Walleij return "XC4085"; 53*f956a785SLinus Walleij case 0x03: 54*f956a785SLinus Walleij return "XVC600"; 55*f956a785SLinus Walleij case 0x04: 56*f956a785SLinus Walleij return "EPM7256AE (Altera PLD)"; 57*f956a785SLinus Walleij default: 58*f956a785SLinus Walleij return "Unknown"; 59*f956a785SLinus Walleij } 60*f956a785SLinus Walleij } 61*f956a785SLinus Walleij 62*f956a785SLinus Walleij static ssize_t integrator_get_manf(struct device *dev, 63*f956a785SLinus Walleij struct device_attribute *attr, 64*f956a785SLinus Walleij char *buf) 65*f956a785SLinus Walleij { 66*f956a785SLinus Walleij return sprintf(buf, "%02x\n", integrator_coreid >> 24); 67*f956a785SLinus Walleij } 68*f956a785SLinus Walleij 69*f956a785SLinus Walleij static struct device_attribute integrator_manf_attr = 70*f956a785SLinus Walleij __ATTR(manufacturer, S_IRUGO, integrator_get_manf, NULL); 71*f956a785SLinus Walleij 72*f956a785SLinus Walleij static ssize_t integrator_get_arch(struct device *dev, 73*f956a785SLinus Walleij struct device_attribute *attr, 74*f956a785SLinus Walleij char *buf) 75*f956a785SLinus Walleij { 76*f956a785SLinus Walleij return sprintf(buf, "%s\n", integrator_arch_str(integrator_coreid)); 77*f956a785SLinus Walleij } 78*f956a785SLinus Walleij 79*f956a785SLinus Walleij static struct device_attribute integrator_arch_attr = 80*f956a785SLinus Walleij __ATTR(arch, S_IRUGO, integrator_get_arch, NULL); 81*f956a785SLinus Walleij 82*f956a785SLinus Walleij static ssize_t integrator_get_fpga(struct device *dev, 83*f956a785SLinus Walleij struct device_attribute *attr, 84*f956a785SLinus Walleij char *buf) 85*f956a785SLinus Walleij { 86*f956a785SLinus Walleij return sprintf(buf, "%s\n", integrator_fpga_str(integrator_coreid)); 87*f956a785SLinus Walleij } 88*f956a785SLinus Walleij 89*f956a785SLinus Walleij static struct device_attribute integrator_fpga_attr = 90*f956a785SLinus Walleij __ATTR(fpga, S_IRUGO, integrator_get_fpga, NULL); 91*f956a785SLinus Walleij 92*f956a785SLinus Walleij static ssize_t integrator_get_build(struct device *dev, 93*f956a785SLinus Walleij struct device_attribute *attr, 94*f956a785SLinus Walleij char *buf) 95*f956a785SLinus Walleij { 96*f956a785SLinus Walleij return sprintf(buf, "%02x\n", (integrator_coreid >> 4) & 0xFF); 97*f956a785SLinus Walleij } 98*f956a785SLinus Walleij 99*f956a785SLinus Walleij static struct device_attribute integrator_build_attr = 100*f956a785SLinus Walleij __ATTR(build, S_IRUGO, integrator_get_build, NULL); 101*f956a785SLinus Walleij 102*f956a785SLinus Walleij static int __init integrator_soc_init(void) 103*f956a785SLinus Walleij { 104*f956a785SLinus Walleij static struct regmap *syscon_regmap; 105*f956a785SLinus Walleij struct soc_device *soc_dev; 106*f956a785SLinus Walleij struct soc_device_attribute *soc_dev_attr; 107*f956a785SLinus Walleij struct device_node *np; 108*f956a785SLinus Walleij struct device *dev; 109*f956a785SLinus Walleij u32 val; 110*f956a785SLinus Walleij int ret; 111*f956a785SLinus Walleij 112*f956a785SLinus Walleij np = of_find_matching_node(NULL, integrator_cm_match); 113*f956a785SLinus Walleij if (!np) 114*f956a785SLinus Walleij return -ENODEV; 115*f956a785SLinus Walleij 116*f956a785SLinus Walleij syscon_regmap = syscon_node_to_regmap(np); 117*f956a785SLinus Walleij if (IS_ERR(syscon_regmap)) 118*f956a785SLinus Walleij return PTR_ERR(syscon_regmap); 119*f956a785SLinus Walleij 120*f956a785SLinus Walleij ret = regmap_read(syscon_regmap, INTEGRATOR_HDR_ID_OFFSET, 121*f956a785SLinus Walleij &val); 122*f956a785SLinus Walleij if (ret) 123*f956a785SLinus Walleij return -ENODEV; 124*f956a785SLinus Walleij integrator_coreid = val; 125*f956a785SLinus Walleij 126*f956a785SLinus Walleij soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL); 127*f956a785SLinus Walleij if (!soc_dev_attr) 128*f956a785SLinus Walleij return -ENOMEM; 129*f956a785SLinus Walleij 130*f956a785SLinus Walleij soc_dev_attr->soc_id = "Integrator"; 131*f956a785SLinus Walleij soc_dev_attr->machine = "Integrator"; 132*f956a785SLinus Walleij soc_dev_attr->family = "Versatile"; 133*f956a785SLinus Walleij soc_dev = soc_device_register(soc_dev_attr); 134*f956a785SLinus Walleij if (IS_ERR(soc_dev)) { 135*f956a785SLinus Walleij kfree(soc_dev_attr); 136*f956a785SLinus Walleij return -ENODEV; 137*f956a785SLinus Walleij } 138*f956a785SLinus Walleij dev = soc_device_to_device(soc_dev); 139*f956a785SLinus Walleij 140*f956a785SLinus Walleij device_create_file(dev, &integrator_manf_attr); 141*f956a785SLinus Walleij device_create_file(dev, &integrator_arch_attr); 142*f956a785SLinus Walleij device_create_file(dev, &integrator_fpga_attr); 143*f956a785SLinus Walleij device_create_file(dev, &integrator_build_attr); 144*f956a785SLinus Walleij 145*f956a785SLinus Walleij dev_info(dev, "Detected ARM core module:\n"); 146*f956a785SLinus Walleij dev_info(dev, " Manufacturer: %02x\n", (val >> 24)); 147*f956a785SLinus Walleij dev_info(dev, " Architecture: %s\n", integrator_arch_str(val)); 148*f956a785SLinus Walleij dev_info(dev, " FPGA: %s\n", integrator_fpga_str(val)); 149*f956a785SLinus Walleij dev_info(dev, " Build: %02x\n", (val >> 4) & 0xFF); 150*f956a785SLinus Walleij dev_info(dev, " Rev: %c\n", ('A' + (val & 0x03))); 151*f956a785SLinus Walleij 152*f956a785SLinus Walleij return 0; 153*f956a785SLinus Walleij } 154*f956a785SLinus Walleij device_initcall(integrator_soc_init); 155