1 /* 2 * Copyright (C) 2010 Google, Inc. 3 * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved. 4 * 5 * Author: 6 * Colin Cross <ccross@android.com> 7 * 8 * This software is licensed under the terms of the GNU General Public 9 * License version 2, as published by the Free Software Foundation, and 10 * may be copied, distributed, and modified under those terms. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 */ 18 19 #ifndef __DRIVERS_MISC_TEGRA_FUSE_H 20 #define __DRIVERS_MISC_TEGRA_FUSE_H 21 22 #include <linux/dmaengine.h> 23 #include <linux/types.h> 24 25 struct tegra_fuse; 26 27 struct tegra_fuse_info { 28 u32 (*read)(struct tegra_fuse *fuse, unsigned int offset); 29 unsigned int size; 30 unsigned int spare; 31 }; 32 33 struct tegra_fuse_soc { 34 void (*init)(struct tegra_fuse *fuse); 35 void (*speedo_init)(struct tegra_sku_info *info); 36 int (*probe)(struct tegra_fuse *fuse); 37 38 const struct tegra_fuse_info *info; 39 }; 40 41 struct tegra_fuse { 42 struct device *dev; 43 void __iomem *base; 44 phys_addr_t phys; 45 struct clk *clk; 46 47 u32 (*read_early)(struct tegra_fuse *fuse, unsigned int offset); 48 u32 (*read)(struct tegra_fuse *fuse, unsigned int offset); 49 const struct tegra_fuse_soc *soc; 50 51 /* APBDMA on Tegra20 */ 52 struct { 53 struct mutex lock; 54 struct completion wait; 55 struct dma_chan *chan; 56 struct dma_slave_config config; 57 dma_addr_t phys; 58 u32 *virt; 59 } apbdma; 60 }; 61 62 void tegra_init_revision(void); 63 void tegra_init_apbmisc(void); 64 65 bool __init tegra_fuse_read_spare(unsigned int spare); 66 u32 __init tegra_fuse_read_early(unsigned int offset); 67 68 #ifdef CONFIG_ARCH_TEGRA_2x_SOC 69 void tegra20_init_speedo_data(struct tegra_sku_info *sku_info); 70 #endif 71 72 #ifdef CONFIG_ARCH_TEGRA_3x_SOC 73 void tegra30_init_speedo_data(struct tegra_sku_info *sku_info); 74 #endif 75 76 #ifdef CONFIG_ARCH_TEGRA_114_SOC 77 void tegra114_init_speedo_data(struct tegra_sku_info *sku_info); 78 #endif 79 80 #if defined(CONFIG_ARCH_TEGRA_124_SOC) || defined(CONFIG_ARCH_TEGRA_132_SOC) 81 void tegra124_init_speedo_data(struct tegra_sku_info *sku_info); 82 #endif 83 84 #ifdef CONFIG_ARCH_TEGRA_210_SOC 85 void tegra210_init_speedo_data(struct tegra_sku_info *sku_info); 86 #endif 87 88 #ifdef CONFIG_ARCH_TEGRA_2x_SOC 89 extern const struct tegra_fuse_soc tegra20_fuse_soc; 90 #endif 91 92 #ifdef CONFIG_ARCH_TEGRA_3x_SOC 93 extern const struct tegra_fuse_soc tegra30_fuse_soc; 94 #endif 95 96 #ifdef CONFIG_ARCH_TEGRA_114_SOC 97 extern const struct tegra_fuse_soc tegra114_fuse_soc; 98 #endif 99 100 #if defined(CONFIG_ARCH_TEGRA_124_SOC) || defined(CONFIG_ARCH_TEGRA_132_SOC) 101 extern const struct tegra_fuse_soc tegra124_fuse_soc; 102 #endif 103 104 #ifdef CONFIG_ARCH_TEGRA_210_SOC 105 extern const struct tegra_fuse_soc tegra210_fuse_soc; 106 #endif 107 108 #endif 109