1 /* 2 * Allwinner SoCs SRAM Controller Driver 3 * 4 * Copyright (C) 2015 Maxime Ripard 5 * 6 * Author: Maxime Ripard <maxime.ripard@free-electrons.com> 7 * 8 * This file is licensed under the terms of the GNU General Public 9 * License version 2. This program is licensed "as is" without any 10 * warranty of any kind, whether express or implied. 11 */ 12 13 #include <linux/debugfs.h> 14 #include <linux/io.h> 15 #include <linux/mfd/syscon.h> 16 #include <linux/module.h> 17 #include <linux/of.h> 18 #include <linux/of_address.h> 19 #include <linux/of_platform.h> 20 #include <linux/platform_device.h> 21 #include <linux/regmap.h> 22 23 #include <linux/soc/sunxi/sunxi_sram.h> 24 25 struct sunxi_sram_func { 26 char *func; 27 u8 val; 28 u32 reg_val; 29 }; 30 31 struct sunxi_sram_data { 32 char *name; 33 u8 reg; 34 u8 offset; 35 u8 width; 36 struct sunxi_sram_func *func; 37 }; 38 39 struct sunxi_sram_desc { 40 struct sunxi_sram_data data; 41 bool claimed; 42 }; 43 44 #define SUNXI_SRAM_MAP(_reg_val, _val, _func) \ 45 { \ 46 .func = _func, \ 47 .val = _val, \ 48 .reg_val = _reg_val, \ 49 } 50 51 #define SUNXI_SRAM_DATA(_name, _reg, _off, _width, ...) \ 52 { \ 53 .name = _name, \ 54 .reg = _reg, \ 55 .offset = _off, \ 56 .width = _width, \ 57 .func = (struct sunxi_sram_func[]){ \ 58 __VA_ARGS__, { } }, \ 59 } 60 61 static struct sunxi_sram_desc sun4i_a10_sram_a3_a4 = { 62 .data = SUNXI_SRAM_DATA("A3-A4", 0x4, 0x4, 2, 63 SUNXI_SRAM_MAP(0, 0, "cpu"), 64 SUNXI_SRAM_MAP(1, 1, "emac")), 65 }; 66 67 static struct sunxi_sram_desc sun4i_a10_sram_c1 = { 68 .data = SUNXI_SRAM_DATA("C1", 0x0, 0x0, 31, 69 SUNXI_SRAM_MAP(0, 0, "cpu"), 70 SUNXI_SRAM_MAP(0x7fffffff, 1, "ve")), 71 }; 72 73 static struct sunxi_sram_desc sun4i_a10_sram_d = { 74 .data = SUNXI_SRAM_DATA("D", 0x4, 0x0, 1, 75 SUNXI_SRAM_MAP(0, 0, "cpu"), 76 SUNXI_SRAM_MAP(1, 1, "usb-otg")), 77 }; 78 79 static struct sunxi_sram_desc sun50i_a64_sram_c = { 80 .data = SUNXI_SRAM_DATA("C", 0x4, 24, 1, 81 SUNXI_SRAM_MAP(1, 0, "cpu"), 82 SUNXI_SRAM_MAP(0, 1, "de2")), 83 }; 84 85 static const struct of_device_id sunxi_sram_dt_ids[] = { 86 { 87 .compatible = "allwinner,sun4i-a10-sram-a3-a4", 88 .data = &sun4i_a10_sram_a3_a4.data, 89 }, 90 { 91 .compatible = "allwinner,sun4i-a10-sram-c1", 92 .data = &sun4i_a10_sram_c1.data, 93 }, 94 { 95 .compatible = "allwinner,sun4i-a10-sram-d", 96 .data = &sun4i_a10_sram_d.data, 97 }, 98 { 99 .compatible = "allwinner,sun50i-a64-sram-c", 100 .data = &sun50i_a64_sram_c.data, 101 }, 102 {} 103 }; 104 105 static struct device *sram_dev; 106 static DEFINE_SPINLOCK(sram_lock); 107 static void __iomem *base; 108 109 static int sunxi_sram_show(struct seq_file *s, void *data) 110 { 111 struct device_node *sram_node, *section_node; 112 const struct sunxi_sram_data *sram_data; 113 const struct of_device_id *match; 114 struct sunxi_sram_func *func; 115 const __be32 *sram_addr_p, *section_addr_p; 116 u32 val; 117 118 seq_puts(s, "Allwinner sunXi SRAM\n"); 119 seq_puts(s, "--------------------\n\n"); 120 121 for_each_child_of_node(sram_dev->of_node, sram_node) { 122 if (!of_device_is_compatible(sram_node, "mmio-sram")) 123 continue; 124 125 sram_addr_p = of_get_address(sram_node, 0, NULL, NULL); 126 127 seq_printf(s, "sram@%08x\n", 128 be32_to_cpu(*sram_addr_p)); 129 130 for_each_child_of_node(sram_node, section_node) { 131 match = of_match_node(sunxi_sram_dt_ids, section_node); 132 if (!match) 133 continue; 134 sram_data = match->data; 135 136 section_addr_p = of_get_address(section_node, 0, 137 NULL, NULL); 138 139 seq_printf(s, "\tsection@%04x\t(%s)\n", 140 be32_to_cpu(*section_addr_p), 141 sram_data->name); 142 143 val = readl(base + sram_data->reg); 144 val >>= sram_data->offset; 145 val &= GENMASK(sram_data->width - 1, 0); 146 147 for (func = sram_data->func; func->func; func++) { 148 seq_printf(s, "\t\t%s%c\n", func->func, 149 func->reg_val == val ? 150 '*' : ' '); 151 } 152 } 153 154 seq_puts(s, "\n"); 155 } 156 157 return 0; 158 } 159 160 DEFINE_SHOW_ATTRIBUTE(sunxi_sram); 161 162 static inline struct sunxi_sram_desc *to_sram_desc(const struct sunxi_sram_data *data) 163 { 164 return container_of(data, struct sunxi_sram_desc, data); 165 } 166 167 static const struct sunxi_sram_data *sunxi_sram_of_parse(struct device_node *node, 168 unsigned int *reg_value) 169 { 170 const struct of_device_id *match; 171 const struct sunxi_sram_data *data; 172 struct sunxi_sram_func *func; 173 struct of_phandle_args args; 174 u8 val; 175 int ret; 176 177 ret = of_parse_phandle_with_fixed_args(node, "allwinner,sram", 1, 0, 178 &args); 179 if (ret) 180 return ERR_PTR(ret); 181 182 if (!of_device_is_available(args.np)) { 183 ret = -EBUSY; 184 goto err; 185 } 186 187 val = args.args[0]; 188 189 match = of_match_node(sunxi_sram_dt_ids, args.np); 190 if (!match) { 191 ret = -EINVAL; 192 goto err; 193 } 194 195 data = match->data; 196 if (!data) { 197 ret = -EINVAL; 198 goto err; 199 } 200 201 for (func = data->func; func->func; func++) { 202 if (val == func->val) { 203 if (reg_value) 204 *reg_value = func->reg_val; 205 206 break; 207 } 208 } 209 210 if (!func->func) { 211 ret = -EINVAL; 212 goto err; 213 } 214 215 of_node_put(args.np); 216 return match->data; 217 218 err: 219 of_node_put(args.np); 220 return ERR_PTR(ret); 221 } 222 223 int sunxi_sram_claim(struct device *dev) 224 { 225 const struct sunxi_sram_data *sram_data; 226 struct sunxi_sram_desc *sram_desc; 227 unsigned int device; 228 u32 val, mask; 229 230 if (IS_ERR(base)) 231 return PTR_ERR(base); 232 233 if (!base) 234 return -EPROBE_DEFER; 235 236 if (!dev || !dev->of_node) 237 return -EINVAL; 238 239 sram_data = sunxi_sram_of_parse(dev->of_node, &device); 240 if (IS_ERR(sram_data)) 241 return PTR_ERR(sram_data); 242 243 sram_desc = to_sram_desc(sram_data); 244 245 spin_lock(&sram_lock); 246 247 if (sram_desc->claimed) { 248 spin_unlock(&sram_lock); 249 return -EBUSY; 250 } 251 252 mask = GENMASK(sram_data->offset + sram_data->width - 1, 253 sram_data->offset); 254 val = readl(base + sram_data->reg); 255 val &= ~mask; 256 writel(val | ((device << sram_data->offset) & mask), 257 base + sram_data->reg); 258 259 sram_desc->claimed = true; 260 spin_unlock(&sram_lock); 261 262 return 0; 263 } 264 EXPORT_SYMBOL(sunxi_sram_claim); 265 266 void sunxi_sram_release(struct device *dev) 267 { 268 const struct sunxi_sram_data *sram_data; 269 struct sunxi_sram_desc *sram_desc; 270 271 if (!dev || !dev->of_node) 272 return; 273 274 sram_data = sunxi_sram_of_parse(dev->of_node, NULL); 275 if (IS_ERR(sram_data)) 276 return; 277 278 sram_desc = to_sram_desc(sram_data); 279 280 spin_lock(&sram_lock); 281 sram_desc->claimed = false; 282 spin_unlock(&sram_lock); 283 } 284 EXPORT_SYMBOL(sunxi_sram_release); 285 286 struct sunxi_sramc_variant { 287 int num_emac_clocks; 288 bool has_ldo_ctrl; 289 bool has_ths_offset; 290 }; 291 292 static const struct sunxi_sramc_variant sun4i_a10_sramc_variant = { 293 /* Nothing special */ 294 }; 295 296 static const struct sunxi_sramc_variant sun8i_h3_sramc_variant = { 297 .num_emac_clocks = 1, 298 }; 299 300 static const struct sunxi_sramc_variant sun20i_d1_sramc_variant = { 301 .num_emac_clocks = 1, 302 .has_ldo_ctrl = true, 303 }; 304 305 static const struct sunxi_sramc_variant sun50i_a64_sramc_variant = { 306 .num_emac_clocks = 1, 307 }; 308 309 static const struct sunxi_sramc_variant sun50i_h616_sramc_variant = { 310 .num_emac_clocks = 2, 311 .has_ths_offset = true, 312 }; 313 314 static const struct sunxi_sramc_variant sun55i_a523_sramc_variant = { 315 .num_emac_clocks = 2, 316 }; 317 318 #define SUNXI_SRAM_THS_OFFSET_REG 0x0 319 #define SUNXI_SRAM_EMAC_CLOCK_REG 0x30 320 #define SUNXI_SYS_LDO_CTRL_REG 0x150 321 322 static bool sunxi_sram_regmap_accessible_reg(struct device *dev, 323 unsigned int reg) 324 { 325 const struct sunxi_sramc_variant *variant = dev_get_drvdata(dev); 326 327 if (reg == SUNXI_SRAM_THS_OFFSET_REG && variant->has_ths_offset) 328 return true; 329 if (reg >= SUNXI_SRAM_EMAC_CLOCK_REG && 330 reg < SUNXI_SRAM_EMAC_CLOCK_REG + variant->num_emac_clocks * 4) 331 return true; 332 if (reg == SUNXI_SYS_LDO_CTRL_REG && variant->has_ldo_ctrl) 333 return true; 334 335 return false; 336 } 337 338 static void sunxi_sram_lock(void *_lock) 339 { 340 spinlock_t *lock = _lock; 341 342 spin_lock(lock); 343 } 344 345 static void sunxi_sram_unlock(void *_lock) 346 { 347 spinlock_t *lock = _lock; 348 349 spin_unlock(lock); 350 } 351 352 static const struct regmap_config sunxi_sram_regmap_config = { 353 .reg_bits = 32, 354 .val_bits = 32, 355 .reg_stride = 4, 356 /* last defined register */ 357 .max_register = SUNXI_SYS_LDO_CTRL_REG, 358 /* other devices have no business accessing other registers */ 359 .readable_reg = sunxi_sram_regmap_accessible_reg, 360 .writeable_reg = sunxi_sram_regmap_accessible_reg, 361 .lock = sunxi_sram_lock, 362 .unlock = sunxi_sram_unlock, 363 .lock_arg = &sram_lock, 364 }; 365 366 static int __init sunxi_sram_probe(struct platform_device *pdev) 367 { 368 const struct sunxi_sramc_variant *variant; 369 struct device *dev = &pdev->dev; 370 struct regmap *regmap; 371 int ret; 372 373 sram_dev = &pdev->dev; 374 375 variant = of_device_get_match_data(&pdev->dev); 376 if (!variant) 377 return -EINVAL; 378 379 dev_set_drvdata(dev, (struct sunxi_sramc_variant *)variant); 380 381 base = devm_platform_ioremap_resource(pdev, 0); 382 if (IS_ERR(base)) 383 return PTR_ERR(base); 384 385 if (variant->num_emac_clocks || variant->has_ldo_ctrl) { 386 regmap = devm_regmap_init_mmio(dev, base, &sunxi_sram_regmap_config); 387 if (IS_ERR(regmap)) 388 return PTR_ERR(regmap); 389 390 ret = of_syscon_register_regmap(dev->of_node, regmap); 391 if (ret) 392 return ret; 393 } 394 395 of_platform_populate(dev->of_node, NULL, NULL, dev); 396 397 debugfs_create_file("sram", 0444, NULL, NULL, &sunxi_sram_fops); 398 399 return 0; 400 } 401 402 static const struct of_device_id sunxi_sram_dt_match[] = { 403 { 404 .compatible = "allwinner,sun4i-a10-sram-controller", 405 .data = &sun4i_a10_sramc_variant, 406 }, 407 { 408 .compatible = "allwinner,sun4i-a10-system-control", 409 .data = &sun4i_a10_sramc_variant, 410 }, 411 { 412 .compatible = "allwinner,sun5i-a13-system-control", 413 .data = &sun4i_a10_sramc_variant, 414 }, 415 { 416 .compatible = "allwinner,sun8i-a23-system-control", 417 .data = &sun4i_a10_sramc_variant, 418 }, 419 { 420 .compatible = "allwinner,sun8i-h3-system-control", 421 .data = &sun8i_h3_sramc_variant, 422 }, 423 { 424 .compatible = "allwinner,sun20i-d1-system-control", 425 .data = &sun20i_d1_sramc_variant, 426 }, 427 { 428 .compatible = "allwinner,sun50i-a64-sram-controller", 429 .data = &sun50i_a64_sramc_variant, 430 }, 431 { 432 .compatible = "allwinner,sun50i-a64-system-control", 433 .data = &sun50i_a64_sramc_variant, 434 }, 435 { 436 .compatible = "allwinner,sun50i-h5-system-control", 437 .data = &sun50i_a64_sramc_variant, 438 }, 439 { 440 .compatible = "allwinner,sun50i-h616-system-control", 441 .data = &sun50i_h616_sramc_variant, 442 }, 443 { 444 .compatible = "allwinner,sun55i-a523-system-control", 445 .data = &sun55i_a523_sramc_variant, 446 }, 447 { }, 448 }; 449 MODULE_DEVICE_TABLE(of, sunxi_sram_dt_match); 450 451 static struct platform_driver sunxi_sram_driver = { 452 .driver = { 453 .name = "sunxi-sram", 454 .of_match_table = sunxi_sram_dt_match, 455 }, 456 }; 457 builtin_platform_driver_probe(sunxi_sram_driver, sunxi_sram_probe); 458 459 MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com>"); 460 MODULE_DESCRIPTION("Allwinner sunXi SRAM Controller Driver"); 461