xref: /linux/drivers/soc/renesas/rcar-rst.c (revision 02680c23d7b3febe45ea3d4f9818c2b2dc89020a)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * R-Car Gen1 RESET/WDT, R-Car Gen2, Gen3, and RZ/G RST Driver
4  *
5  * Copyright (C) 2016 Glider bvba
6  */
7 
8 #include <linux/err.h>
9 #include <linux/io.h>
10 #include <linux/of_address.h>
11 #include <linux/soc/renesas/rcar-rst.h>
12 
13 #define WDTRSTCR_RESET		0xA55A0002
14 #define WDTRSTCR		0x0054
15 
16 static int rcar_rst_enable_wdt_reset(void __iomem *base)
17 {
18 	iowrite32(WDTRSTCR_RESET, base + WDTRSTCR);
19 	return 0;
20 }
21 
22 struct rst_config {
23 	unsigned int modemr;		/* Mode Monitoring Register Offset */
24 	int (*configure)(void __iomem *base);	/* Platform specific config */
25 };
26 
27 static const struct rst_config rcar_rst_gen1 __initconst = {
28 	.modemr = 0x20,
29 };
30 
31 static const struct rst_config rcar_rst_gen2 __initconst = {
32 	.modemr = 0x60,
33 	.configure = rcar_rst_enable_wdt_reset,
34 };
35 
36 static const struct rst_config rcar_rst_gen3 __initconst = {
37 	.modemr = 0x60,
38 };
39 
40 static const struct rst_config rcar_rst_r8a779a0 __initconst = {
41 	.modemr = 0x00,		/* MODEMR0 and it has CPG related bits */
42 };
43 
44 static const struct of_device_id rcar_rst_matches[] __initconst = {
45 	/* RZ/G1 is handled like R-Car Gen2 */
46 	{ .compatible = "renesas,r8a7742-rst", .data = &rcar_rst_gen2 },
47 	{ .compatible = "renesas,r8a7743-rst", .data = &rcar_rst_gen2 },
48 	{ .compatible = "renesas,r8a7744-rst", .data = &rcar_rst_gen2 },
49 	{ .compatible = "renesas,r8a7745-rst", .data = &rcar_rst_gen2 },
50 	{ .compatible = "renesas,r8a77470-rst", .data = &rcar_rst_gen2 },
51 	/* RZ/G2 is handled like R-Car Gen3 */
52 	{ .compatible = "renesas,r8a774a1-rst", .data = &rcar_rst_gen3 },
53 	{ .compatible = "renesas,r8a774b1-rst", .data = &rcar_rst_gen3 },
54 	{ .compatible = "renesas,r8a774c0-rst", .data = &rcar_rst_gen3 },
55 	{ .compatible = "renesas,r8a774e1-rst", .data = &rcar_rst_gen3 },
56 	/* R-Car Gen1 */
57 	{ .compatible = "renesas,r8a7778-reset-wdt", .data = &rcar_rst_gen1 },
58 	{ .compatible = "renesas,r8a7779-reset-wdt", .data = &rcar_rst_gen1 },
59 	/* R-Car Gen2 */
60 	{ .compatible = "renesas,r8a7790-rst", .data = &rcar_rst_gen2 },
61 	{ .compatible = "renesas,r8a7791-rst", .data = &rcar_rst_gen2 },
62 	{ .compatible = "renesas,r8a7792-rst", .data = &rcar_rst_gen2 },
63 	{ .compatible = "renesas,r8a7793-rst", .data = &rcar_rst_gen2 },
64 	{ .compatible = "renesas,r8a7794-rst", .data = &rcar_rst_gen2 },
65 	/* R-Car Gen3 */
66 	{ .compatible = "renesas,r8a7795-rst", .data = &rcar_rst_gen3 },
67 	{ .compatible = "renesas,r8a7796-rst", .data = &rcar_rst_gen3 },
68 	{ .compatible = "renesas,r8a77961-rst", .data = &rcar_rst_gen3 },
69 	{ .compatible = "renesas,r8a77965-rst", .data = &rcar_rst_gen3 },
70 	{ .compatible = "renesas,r8a77970-rst", .data = &rcar_rst_gen3 },
71 	{ .compatible = "renesas,r8a77980-rst", .data = &rcar_rst_gen3 },
72 	{ .compatible = "renesas,r8a77990-rst", .data = &rcar_rst_gen3 },
73 	{ .compatible = "renesas,r8a77995-rst", .data = &rcar_rst_gen3 },
74 	/* R-Car V3U */
75 	{ .compatible = "renesas,r8a779a0-rst", .data = &rcar_rst_r8a779a0 },
76 	{ /* sentinel */ }
77 };
78 
79 static void __iomem *rcar_rst_base __initdata;
80 static u32 saved_mode __initdata;
81 
82 static int __init rcar_rst_init(void)
83 {
84 	const struct of_device_id *match;
85 	const struct rst_config *cfg;
86 	struct device_node *np;
87 	void __iomem *base;
88 	int error = 0;
89 
90 	np = of_find_matching_node_and_match(NULL, rcar_rst_matches, &match);
91 	if (!np)
92 		return -ENODEV;
93 
94 	base = of_iomap(np, 0);
95 	if (!base) {
96 		pr_warn("%pOF: Cannot map regs\n", np);
97 		error = -ENOMEM;
98 		goto out_put;
99 	}
100 
101 	rcar_rst_base = base;
102 	cfg = match->data;
103 	saved_mode = ioread32(base + cfg->modemr);
104 	if (cfg->configure) {
105 		error = cfg->configure(base);
106 		if (error) {
107 			pr_warn("%pOF: Cannot run SoC specific configuration\n",
108 				np);
109 			goto out_put;
110 		}
111 	}
112 
113 	pr_debug("%pOF: MODE = 0x%08x\n", np, saved_mode);
114 
115 out_put:
116 	of_node_put(np);
117 	return error;
118 }
119 
120 int __init rcar_rst_read_mode_pins(u32 *mode)
121 {
122 	int error;
123 
124 	if (!rcar_rst_base) {
125 		error = rcar_rst_init();
126 		if (error)
127 			return error;
128 	}
129 
130 	*mode = saved_mode;
131 	return 0;
132 }
133