1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (c) 2009-2017, The Linux Foundation. All rights reserved. 4 * Copyright (c) 2017-2019, Linaro Ltd. 5 */ 6 7 #include <linux/debugfs.h> 8 #include <linux/err.h> 9 #include <linux/module.h> 10 #include <linux/platform_device.h> 11 #include <linux/random.h> 12 #include <linux/slab.h> 13 #include <linux/soc/qcom/smem.h> 14 #include <linux/soc/qcom/socinfo.h> 15 #include <linux/string.h> 16 #include <linux/stringify.h> 17 #include <linux/sys_soc.h> 18 #include <linux/types.h> 19 20 #include <asm/unaligned.h> 21 22 #include <dt-bindings/arm/qcom,ids.h> 23 24 /* 25 * SoC version type with major number in the upper 16 bits and minor 26 * number in the lower 16 bits. 27 */ 28 #define SOCINFO_MAJOR(ver) (((ver) >> 16) & 0xffff) 29 #define SOCINFO_MINOR(ver) ((ver) & 0xffff) 30 #define SOCINFO_VERSION(maj, min) ((((maj) & 0xffff) << 16)|((min) & 0xffff)) 31 32 /* Helper macros to create soc_id table */ 33 #define qcom_board_id(id) QCOM_ID_ ## id, __stringify(id) 34 #define qcom_board_id_named(id, name) QCOM_ID_ ## id, (name) 35 36 #ifdef CONFIG_DEBUG_FS 37 #define SMEM_IMAGE_VERSION_BLOCKS_COUNT 32 38 #define SMEM_IMAGE_VERSION_SIZE 4096 39 #define SMEM_IMAGE_VERSION_NAME_SIZE 75 40 #define SMEM_IMAGE_VERSION_VARIANT_SIZE 20 41 #define SMEM_IMAGE_VERSION_OEM_SIZE 32 42 43 /* 44 * SMEM Image table indices 45 */ 46 #define SMEM_IMAGE_TABLE_BOOT_INDEX 0 47 #define SMEM_IMAGE_TABLE_TZ_INDEX 1 48 #define SMEM_IMAGE_TABLE_RPM_INDEX 3 49 #define SMEM_IMAGE_TABLE_APPS_INDEX 10 50 #define SMEM_IMAGE_TABLE_MPSS_INDEX 11 51 #define SMEM_IMAGE_TABLE_ADSP_INDEX 12 52 #define SMEM_IMAGE_TABLE_CNSS_INDEX 13 53 #define SMEM_IMAGE_TABLE_VIDEO_INDEX 14 54 #define SMEM_IMAGE_VERSION_TABLE 469 55 56 /* 57 * SMEM Image table names 58 */ 59 static const char *const socinfo_image_names[] = { 60 [SMEM_IMAGE_TABLE_ADSP_INDEX] = "adsp", 61 [SMEM_IMAGE_TABLE_APPS_INDEX] = "apps", 62 [SMEM_IMAGE_TABLE_BOOT_INDEX] = "boot", 63 [SMEM_IMAGE_TABLE_CNSS_INDEX] = "cnss", 64 [SMEM_IMAGE_TABLE_MPSS_INDEX] = "mpss", 65 [SMEM_IMAGE_TABLE_RPM_INDEX] = "rpm", 66 [SMEM_IMAGE_TABLE_TZ_INDEX] = "tz", 67 [SMEM_IMAGE_TABLE_VIDEO_INDEX] = "video", 68 }; 69 70 static const char *const pmic_models[] = { 71 [0] = "Unknown PMIC model", 72 [1] = "PM8941", 73 [2] = "PM8841", 74 [3] = "PM8019", 75 [4] = "PM8226", 76 [5] = "PM8110", 77 [6] = "PMA8084", 78 [7] = "PMI8962", 79 [8] = "PMD9635", 80 [9] = "PM8994", 81 [10] = "PMI8994", 82 [11] = "PM8916", 83 [12] = "PM8004", 84 [13] = "PM8909/PM8058", 85 [14] = "PM8028", 86 [15] = "PM8901", 87 [16] = "PM8950/PM8027", 88 [17] = "PMI8950/ISL9519", 89 [18] = "PMK8001/PM8921", 90 [19] = "PMI8996/PM8018", 91 [20] = "PM8998/PM8015", 92 [21] = "PMI8998/PM8014", 93 [22] = "PM8821", 94 [23] = "PM8038", 95 [24] = "PM8005/PM8922", 96 [25] = "PM8917", 97 [26] = "PM660L", 98 [27] = "PM660", 99 [30] = "PM8150", 100 [31] = "PM8150L", 101 [32] = "PM8150B", 102 [33] = "PMK8002", 103 [36] = "PM8009", 104 [37] = "PMI632", 105 [38] = "PM8150C", 106 [40] = "PM6150", 107 [41] = "SMB2351", 108 [44] = "PM8008", 109 [45] = "PM6125", 110 [46] = "PM7250B", 111 [47] = "PMK8350", 112 [48] = "PM8350", 113 [49] = "PM8350C", 114 [50] = "PM8350B", 115 [51] = "PMR735A", 116 [52] = "PMR735B", 117 [55] = "PM2250", 118 [58] = "PM8450", 119 [65] = "PM8010", 120 [69] = "PM8550VS", 121 [70] = "PM8550VE", 122 [71] = "PM8550B", 123 [72] = "PMR735D", 124 [73] = "PM8550", 125 [74] = "PMK8550", 126 }; 127 128 struct socinfo_params { 129 u32 raw_device_family; 130 u32 hw_plat_subtype; 131 u32 accessory_chip; 132 u32 raw_device_num; 133 u32 chip_family; 134 u32 foundry_id; 135 u32 plat_ver; 136 u32 raw_ver; 137 u32 hw_plat; 138 u32 fmt; 139 u32 nproduct_id; 140 u32 num_clusters; 141 u32 ncluster_array_offset; 142 u32 num_subset_parts; 143 u32 nsubset_parts_array_offset; 144 u32 nmodem_supported; 145 u32 feature_code; 146 u32 pcode; 147 u32 oem_variant; 148 u32 num_func_clusters; 149 u32 boot_cluster; 150 u32 boot_core; 151 }; 152 153 struct smem_image_version { 154 char name[SMEM_IMAGE_VERSION_NAME_SIZE]; 155 char variant[SMEM_IMAGE_VERSION_VARIANT_SIZE]; 156 char pad; 157 char oem[SMEM_IMAGE_VERSION_OEM_SIZE]; 158 }; 159 #endif /* CONFIG_DEBUG_FS */ 160 161 struct qcom_socinfo { 162 struct soc_device *soc_dev; 163 struct soc_device_attribute attr; 164 #ifdef CONFIG_DEBUG_FS 165 struct dentry *dbg_root; 166 struct socinfo_params info; 167 #endif /* CONFIG_DEBUG_FS */ 168 }; 169 170 struct soc_id { 171 unsigned int id; 172 const char *name; 173 }; 174 175 static const struct soc_id soc_id[] = { 176 { qcom_board_id(MSM8260) }, 177 { qcom_board_id(MSM8660) }, 178 { qcom_board_id(APQ8060) }, 179 { qcom_board_id(MSM8960) }, 180 { qcom_board_id(APQ8064) }, 181 { qcom_board_id(MSM8930) }, 182 { qcom_board_id(MSM8630) }, 183 { qcom_board_id(MSM8230) }, 184 { qcom_board_id(APQ8030) }, 185 { qcom_board_id(MSM8627) }, 186 { qcom_board_id(MSM8227) }, 187 { qcom_board_id(MSM8660A) }, 188 { qcom_board_id(MSM8260A) }, 189 { qcom_board_id(APQ8060A) }, 190 { qcom_board_id(MSM8974) }, 191 { qcom_board_id(MSM8225) }, 192 { qcom_board_id(MSM8625) }, 193 { qcom_board_id(MPQ8064) }, 194 { qcom_board_id(MSM8960AB) }, 195 { qcom_board_id(APQ8060AB) }, 196 { qcom_board_id(MSM8260AB) }, 197 { qcom_board_id(MSM8660AB) }, 198 { qcom_board_id(MSM8930AA) }, 199 { qcom_board_id(MSM8630AA) }, 200 { qcom_board_id(MSM8230AA) }, 201 { qcom_board_id(MSM8626) }, 202 { qcom_board_id(MSM8610) }, 203 { qcom_board_id(APQ8064AB) }, 204 { qcom_board_id(MSM8930AB) }, 205 { qcom_board_id(MSM8630AB) }, 206 { qcom_board_id(MSM8230AB) }, 207 { qcom_board_id(APQ8030AB) }, 208 { qcom_board_id(MSM8226) }, 209 { qcom_board_id(MSM8526) }, 210 { qcom_board_id(APQ8030AA) }, 211 { qcom_board_id(MSM8110) }, 212 { qcom_board_id(MSM8210) }, 213 { qcom_board_id(MSM8810) }, 214 { qcom_board_id(MSM8212) }, 215 { qcom_board_id(MSM8612) }, 216 { qcom_board_id(MSM8112) }, 217 { qcom_board_id(MSM8125) }, 218 { qcom_board_id(MSM8225Q) }, 219 { qcom_board_id(MSM8625Q) }, 220 { qcom_board_id(MSM8125Q) }, 221 { qcom_board_id(APQ8064AA) }, 222 { qcom_board_id(APQ8084) }, 223 { qcom_board_id(MSM8130) }, 224 { qcom_board_id(MSM8130AA) }, 225 { qcom_board_id(MSM8130AB) }, 226 { qcom_board_id(MSM8627AA) }, 227 { qcom_board_id(MSM8227AA) }, 228 { qcom_board_id(APQ8074) }, 229 { qcom_board_id(MSM8274) }, 230 { qcom_board_id(MSM8674) }, 231 { qcom_board_id(MDM9635) }, 232 { qcom_board_id_named(MSM8974PRO_AC, "MSM8974PRO-AC") }, 233 { qcom_board_id(MSM8126) }, 234 { qcom_board_id(APQ8026) }, 235 { qcom_board_id(MSM8926) }, 236 { qcom_board_id(IPQ8062) }, 237 { qcom_board_id(IPQ8064) }, 238 { qcom_board_id(IPQ8066) }, 239 { qcom_board_id(IPQ8068) }, 240 { qcom_board_id(MSM8326) }, 241 { qcom_board_id(MSM8916) }, 242 { qcom_board_id(MSM8994) }, 243 { qcom_board_id_named(APQ8074PRO_AA, "APQ8074PRO-AA") }, 244 { qcom_board_id_named(APQ8074PRO_AB, "APQ8074PRO-AB") }, 245 { qcom_board_id_named(APQ8074PRO_AC, "APQ8074PRO-AC") }, 246 { qcom_board_id_named(MSM8274PRO_AA, "MSM8274PRO-AA") }, 247 { qcom_board_id_named(MSM8274PRO_AB, "MSM8274PRO-AB") }, 248 { qcom_board_id_named(MSM8274PRO_AC, "MSM8274PRO-AC") }, 249 { qcom_board_id_named(MSM8674PRO_AA, "MSM8674PRO-AA") }, 250 { qcom_board_id_named(MSM8674PRO_AB, "MSM8674PRO-AB") }, 251 { qcom_board_id_named(MSM8674PRO_AC, "MSM8674PRO-AC") }, 252 { qcom_board_id_named(MSM8974PRO_AA, "MSM8974PRO-AA") }, 253 { qcom_board_id_named(MSM8974PRO_AB, "MSM8974PRO-AB") }, 254 { qcom_board_id(APQ8028) }, 255 { qcom_board_id(MSM8128) }, 256 { qcom_board_id(MSM8228) }, 257 { qcom_board_id(MSM8528) }, 258 { qcom_board_id(MSM8628) }, 259 { qcom_board_id(MSM8928) }, 260 { qcom_board_id(MSM8510) }, 261 { qcom_board_id(MSM8512) }, 262 { qcom_board_id(MSM8936) }, 263 { qcom_board_id(MDM9640) }, 264 { qcom_board_id(MSM8939) }, 265 { qcom_board_id(APQ8036) }, 266 { qcom_board_id(APQ8039) }, 267 { qcom_board_id(MSM8236) }, 268 { qcom_board_id(MSM8636) }, 269 { qcom_board_id(MSM8909) }, 270 { qcom_board_id(MSM8996) }, 271 { qcom_board_id(APQ8016) }, 272 { qcom_board_id(MSM8216) }, 273 { qcom_board_id(MSM8116) }, 274 { qcom_board_id(MSM8616) }, 275 { qcom_board_id(MSM8992) }, 276 { qcom_board_id(APQ8092) }, 277 { qcom_board_id(APQ8094) }, 278 { qcom_board_id(MSM8209) }, 279 { qcom_board_id(MSM8208) }, 280 { qcom_board_id(MDM9209) }, 281 { qcom_board_id(MDM9309) }, 282 { qcom_board_id(MDM9609) }, 283 { qcom_board_id(MSM8239) }, 284 { qcom_board_id(MSM8952) }, 285 { qcom_board_id(APQ8009) }, 286 { qcom_board_id(MSM8956) }, 287 { qcom_board_id(MSM8929) }, 288 { qcom_board_id(MSM8629) }, 289 { qcom_board_id(MSM8229) }, 290 { qcom_board_id(APQ8029) }, 291 { qcom_board_id(APQ8056) }, 292 { qcom_board_id(MSM8609) }, 293 { qcom_board_id(APQ8076) }, 294 { qcom_board_id(MSM8976) }, 295 { qcom_board_id(IPQ8065) }, 296 { qcom_board_id(IPQ8069) }, 297 { qcom_board_id(MDM9650) }, 298 { qcom_board_id(MDM9655) }, 299 { qcom_board_id(MDM9250) }, 300 { qcom_board_id(MDM9255) }, 301 { qcom_board_id(MDM9350) }, 302 { qcom_board_id(APQ8052) }, 303 { qcom_board_id(MDM9607) }, 304 { qcom_board_id(APQ8096) }, 305 { qcom_board_id(MSM8998) }, 306 { qcom_board_id(MSM8953) }, 307 { qcom_board_id(MSM8937) }, 308 { qcom_board_id(APQ8037) }, 309 { qcom_board_id(MDM8207) }, 310 { qcom_board_id(MDM9207) }, 311 { qcom_board_id(MDM9307) }, 312 { qcom_board_id(MDM9628) }, 313 { qcom_board_id(MSM8909W) }, 314 { qcom_board_id(APQ8009W) }, 315 { qcom_board_id(MSM8996L) }, 316 { qcom_board_id(MSM8917) }, 317 { qcom_board_id(APQ8053) }, 318 { qcom_board_id(MSM8996SG) }, 319 { qcom_board_id(APQ8017) }, 320 { qcom_board_id(MSM8217) }, 321 { qcom_board_id(MSM8617) }, 322 { qcom_board_id(MSM8996AU) }, 323 { qcom_board_id(APQ8096AU) }, 324 { qcom_board_id(APQ8096SG) }, 325 { qcom_board_id(MSM8940) }, 326 { qcom_board_id(SDX201) }, 327 { qcom_board_id(SDM660) }, 328 { qcom_board_id(SDM630) }, 329 { qcom_board_id(APQ8098) }, 330 { qcom_board_id(MSM8920) }, 331 { qcom_board_id(SDM845) }, 332 { qcom_board_id(MDM9206) }, 333 { qcom_board_id(IPQ8074) }, 334 { qcom_board_id(SDA660) }, 335 { qcom_board_id(SDM658) }, 336 { qcom_board_id(SDA658) }, 337 { qcom_board_id(SDA630) }, 338 { qcom_board_id(MSM8905) }, 339 { qcom_board_id(SDX202) }, 340 { qcom_board_id(SDM450) }, 341 { qcom_board_id(SM8150) }, 342 { qcom_board_id(SDA845) }, 343 { qcom_board_id(IPQ8072) }, 344 { qcom_board_id(IPQ8076) }, 345 { qcom_board_id(IPQ8078) }, 346 { qcom_board_id(SDM636) }, 347 { qcom_board_id(SDA636) }, 348 { qcom_board_id(SDM632) }, 349 { qcom_board_id(SDA632) }, 350 { qcom_board_id(SDA450) }, 351 { qcom_board_id(SDM439) }, 352 { qcom_board_id(SDM429) }, 353 { qcom_board_id(SM8250) }, 354 { qcom_board_id(SA8155) }, 355 { qcom_board_id(SDA439) }, 356 { qcom_board_id(SDA429) }, 357 { qcom_board_id(SM7150) }, 358 { qcom_board_id(SM7150P) }, 359 { qcom_board_id(IPQ8070) }, 360 { qcom_board_id(IPQ8071) }, 361 { qcom_board_id(QM215) }, 362 { qcom_board_id(IPQ8072A) }, 363 { qcom_board_id(IPQ8074A) }, 364 { qcom_board_id(IPQ8076A) }, 365 { qcom_board_id(IPQ8078A) }, 366 { qcom_board_id(SM6125) }, 367 { qcom_board_id(IPQ8070A) }, 368 { qcom_board_id(IPQ8071A) }, 369 { qcom_board_id(IPQ8172) }, 370 { qcom_board_id(IPQ8173) }, 371 { qcom_board_id(IPQ8174) }, 372 { qcom_board_id(IPQ6018) }, 373 { qcom_board_id(IPQ6028) }, 374 { qcom_board_id(SDM429W) }, 375 { qcom_board_id(SM4250) }, 376 { qcom_board_id(IPQ6000) }, 377 { qcom_board_id(IPQ6010) }, 378 { qcom_board_id(SC7180) }, 379 { qcom_board_id(SM6350) }, 380 { qcom_board_id(QCM2150) }, 381 { qcom_board_id(SDA429W) }, 382 { qcom_board_id(SM8350) }, 383 { qcom_board_id(QCM2290) }, 384 { qcom_board_id(SM7125) }, 385 { qcom_board_id(SM6115) }, 386 { qcom_board_id(IPQ5010) }, 387 { qcom_board_id(IPQ5018) }, 388 { qcom_board_id(IPQ5028) }, 389 { qcom_board_id(SC8280XP) }, 390 { qcom_board_id(IPQ6005) }, 391 { qcom_board_id(QRB5165) }, 392 { qcom_board_id(SM8450) }, 393 { qcom_board_id(SM7225) }, 394 { qcom_board_id(SA8295P) }, 395 { qcom_board_id(SA8540P) }, 396 { qcom_board_id(QCM4290) }, 397 { qcom_board_id(QCS4290) }, 398 { qcom_board_id_named(SM8450_2, "SM8450") }, 399 { qcom_board_id_named(SM8450_3, "SM8450") }, 400 { qcom_board_id(SC7280) }, 401 { qcom_board_id(SC7180P) }, 402 { qcom_board_id(QCM6490) }, 403 { qcom_board_id(IPQ5000) }, 404 { qcom_board_id(IPQ0509) }, 405 { qcom_board_id(IPQ0518) }, 406 { qcom_board_id(SM6375) }, 407 { qcom_board_id(IPQ9514) }, 408 { qcom_board_id(IPQ9550) }, 409 { qcom_board_id(IPQ9554) }, 410 { qcom_board_id(IPQ9570) }, 411 { qcom_board_id(IPQ9574) }, 412 { qcom_board_id(SM8550) }, 413 { qcom_board_id(IPQ5016) }, 414 { qcom_board_id(IPQ9510) }, 415 { qcom_board_id(QRB4210) }, 416 { qcom_board_id(QRB2210) }, 417 { qcom_board_id(SA8775P) }, 418 { qcom_board_id(QRU1000) }, 419 { qcom_board_id(QDU1000) }, 420 { qcom_board_id(SM4450) }, 421 { qcom_board_id(QDU1010) }, 422 { qcom_board_id(QRU1032) }, 423 { qcom_board_id(QRU1052) }, 424 { qcom_board_id(QRU1062) }, 425 { qcom_board_id(IPQ5332) }, 426 { qcom_board_id(IPQ5322) }, 427 { qcom_board_id(IPQ5312) }, 428 { qcom_board_id(IPQ5302) }, 429 { qcom_board_id(IPQ5300) }, 430 }; 431 432 static const char *socinfo_machine(struct device *dev, unsigned int id) 433 { 434 int idx; 435 436 for (idx = 0; idx < ARRAY_SIZE(soc_id); idx++) { 437 if (soc_id[idx].id == id) 438 return soc_id[idx].name; 439 } 440 441 return NULL; 442 } 443 444 #ifdef CONFIG_DEBUG_FS 445 446 #define QCOM_OPEN(name, _func) \ 447 static int qcom_open_##name(struct inode *inode, struct file *file) \ 448 { \ 449 return single_open(file, _func, inode->i_private); \ 450 } \ 451 \ 452 static const struct file_operations qcom_ ##name## _ops = { \ 453 .open = qcom_open_##name, \ 454 .read = seq_read, \ 455 .llseek = seq_lseek, \ 456 .release = single_release, \ 457 } 458 459 #define DEBUGFS_ADD(info, name) \ 460 debugfs_create_file(__stringify(name), 0444, \ 461 qcom_socinfo->dbg_root, \ 462 info, &qcom_ ##name## _ops) 463 464 465 static int qcom_show_build_id(struct seq_file *seq, void *p) 466 { 467 struct socinfo *socinfo = seq->private; 468 469 seq_printf(seq, "%s\n", socinfo->build_id); 470 471 return 0; 472 } 473 474 static int qcom_show_pmic_model(struct seq_file *seq, void *p) 475 { 476 struct socinfo *socinfo = seq->private; 477 int model = SOCINFO_MINOR(le32_to_cpu(socinfo->pmic_model)); 478 479 if (model < 0) 480 return -EINVAL; 481 482 if (model < ARRAY_SIZE(pmic_models) && pmic_models[model]) 483 seq_printf(seq, "%s\n", pmic_models[model]); 484 else 485 seq_printf(seq, "unknown (%d)\n", model); 486 487 return 0; 488 } 489 490 static int qcom_show_pmic_model_array(struct seq_file *seq, void *p) 491 { 492 struct socinfo *socinfo = seq->private; 493 unsigned int num_pmics = le32_to_cpu(socinfo->num_pmics); 494 unsigned int pmic_array_offset = le32_to_cpu(socinfo->pmic_array_offset); 495 int i; 496 void *ptr = socinfo; 497 498 ptr += pmic_array_offset; 499 500 /* No need for bounds checking, it happened at socinfo_debugfs_init */ 501 for (i = 0; i < num_pmics; i++) { 502 unsigned int model = SOCINFO_MINOR(get_unaligned_le32(ptr + 2 * i * sizeof(u32))); 503 unsigned int die_rev = get_unaligned_le32(ptr + (2 * i + 1) * sizeof(u32)); 504 505 if (model < ARRAY_SIZE(pmic_models) && pmic_models[model]) 506 seq_printf(seq, "%s %u.%u\n", pmic_models[model], 507 SOCINFO_MAJOR(die_rev), 508 SOCINFO_MINOR(die_rev)); 509 else 510 seq_printf(seq, "unknown (%d)\n", model); 511 } 512 513 return 0; 514 } 515 516 static int qcom_show_pmic_die_revision(struct seq_file *seq, void *p) 517 { 518 struct socinfo *socinfo = seq->private; 519 520 seq_printf(seq, "%u.%u\n", 521 SOCINFO_MAJOR(le32_to_cpu(socinfo->pmic_die_rev)), 522 SOCINFO_MINOR(le32_to_cpu(socinfo->pmic_die_rev))); 523 524 return 0; 525 } 526 527 static int qcom_show_chip_id(struct seq_file *seq, void *p) 528 { 529 struct socinfo *socinfo = seq->private; 530 531 seq_printf(seq, "%s\n", socinfo->chip_id); 532 533 return 0; 534 } 535 536 QCOM_OPEN(build_id, qcom_show_build_id); 537 QCOM_OPEN(pmic_model, qcom_show_pmic_model); 538 QCOM_OPEN(pmic_model_array, qcom_show_pmic_model_array); 539 QCOM_OPEN(pmic_die_rev, qcom_show_pmic_die_revision); 540 QCOM_OPEN(chip_id, qcom_show_chip_id); 541 542 #define DEFINE_IMAGE_OPS(type) \ 543 static int show_image_##type(struct seq_file *seq, void *p) \ 544 { \ 545 struct smem_image_version *image_version = seq->private; \ 546 if (image_version->type[0] != '\0') \ 547 seq_printf(seq, "%s\n", image_version->type); \ 548 return 0; \ 549 } \ 550 static int open_image_##type(struct inode *inode, struct file *file) \ 551 { \ 552 return single_open(file, show_image_##type, inode->i_private); \ 553 } \ 554 \ 555 static const struct file_operations qcom_image_##type##_ops = { \ 556 .open = open_image_##type, \ 557 .read = seq_read, \ 558 .llseek = seq_lseek, \ 559 .release = single_release, \ 560 } 561 562 DEFINE_IMAGE_OPS(name); 563 DEFINE_IMAGE_OPS(variant); 564 DEFINE_IMAGE_OPS(oem); 565 566 static void socinfo_debugfs_init(struct qcom_socinfo *qcom_socinfo, 567 struct socinfo *info, size_t info_size) 568 { 569 struct smem_image_version *versions; 570 struct dentry *dentry; 571 size_t size; 572 int i; 573 unsigned int num_pmics; 574 unsigned int pmic_array_offset; 575 576 qcom_socinfo->dbg_root = debugfs_create_dir("qcom_socinfo", NULL); 577 578 qcom_socinfo->info.fmt = __le32_to_cpu(info->fmt); 579 580 debugfs_create_x32("info_fmt", 0444, qcom_socinfo->dbg_root, 581 &qcom_socinfo->info.fmt); 582 583 switch (qcom_socinfo->info.fmt) { 584 case SOCINFO_VERSION(0, 19): 585 qcom_socinfo->info.num_func_clusters = __le32_to_cpu(info->num_func_clusters); 586 qcom_socinfo->info.boot_cluster = __le32_to_cpu(info->boot_cluster); 587 qcom_socinfo->info.boot_core = __le32_to_cpu(info->boot_core); 588 589 debugfs_create_u32("num_func_clusters", 0444, qcom_socinfo->dbg_root, 590 &qcom_socinfo->info.num_func_clusters); 591 debugfs_create_u32("boot_cluster", 0444, qcom_socinfo->dbg_root, 592 &qcom_socinfo->info.boot_cluster); 593 debugfs_create_u32("boot_core", 0444, qcom_socinfo->dbg_root, 594 &qcom_socinfo->info.boot_core); 595 fallthrough; 596 case SOCINFO_VERSION(0, 18): 597 case SOCINFO_VERSION(0, 17): 598 qcom_socinfo->info.oem_variant = __le32_to_cpu(info->oem_variant); 599 debugfs_create_u32("oem_variant", 0444, qcom_socinfo->dbg_root, 600 &qcom_socinfo->info.oem_variant); 601 fallthrough; 602 case SOCINFO_VERSION(0, 16): 603 qcom_socinfo->info.feature_code = __le32_to_cpu(info->feature_code); 604 qcom_socinfo->info.pcode = __le32_to_cpu(info->pcode); 605 606 debugfs_create_u32("feature_code", 0444, qcom_socinfo->dbg_root, 607 &qcom_socinfo->info.feature_code); 608 debugfs_create_u32("pcode", 0444, qcom_socinfo->dbg_root, 609 &qcom_socinfo->info.pcode); 610 fallthrough; 611 case SOCINFO_VERSION(0, 15): 612 qcom_socinfo->info.nmodem_supported = __le32_to_cpu(info->nmodem_supported); 613 614 debugfs_create_u32("nmodem_supported", 0444, qcom_socinfo->dbg_root, 615 &qcom_socinfo->info.nmodem_supported); 616 fallthrough; 617 case SOCINFO_VERSION(0, 14): 618 qcom_socinfo->info.num_clusters = __le32_to_cpu(info->num_clusters); 619 qcom_socinfo->info.ncluster_array_offset = __le32_to_cpu(info->ncluster_array_offset); 620 qcom_socinfo->info.num_subset_parts = __le32_to_cpu(info->num_subset_parts); 621 qcom_socinfo->info.nsubset_parts_array_offset = 622 __le32_to_cpu(info->nsubset_parts_array_offset); 623 624 debugfs_create_u32("num_clusters", 0444, qcom_socinfo->dbg_root, 625 &qcom_socinfo->info.num_clusters); 626 debugfs_create_u32("ncluster_array_offset", 0444, qcom_socinfo->dbg_root, 627 &qcom_socinfo->info.ncluster_array_offset); 628 debugfs_create_u32("num_subset_parts", 0444, qcom_socinfo->dbg_root, 629 &qcom_socinfo->info.num_subset_parts); 630 debugfs_create_u32("nsubset_parts_array_offset", 0444, qcom_socinfo->dbg_root, 631 &qcom_socinfo->info.nsubset_parts_array_offset); 632 fallthrough; 633 case SOCINFO_VERSION(0, 13): 634 qcom_socinfo->info.nproduct_id = __le32_to_cpu(info->nproduct_id); 635 636 debugfs_create_u32("nproduct_id", 0444, qcom_socinfo->dbg_root, 637 &qcom_socinfo->info.nproduct_id); 638 DEBUGFS_ADD(info, chip_id); 639 fallthrough; 640 case SOCINFO_VERSION(0, 12): 641 qcom_socinfo->info.chip_family = 642 __le32_to_cpu(info->chip_family); 643 qcom_socinfo->info.raw_device_family = 644 __le32_to_cpu(info->raw_device_family); 645 qcom_socinfo->info.raw_device_num = 646 __le32_to_cpu(info->raw_device_num); 647 648 debugfs_create_x32("chip_family", 0444, qcom_socinfo->dbg_root, 649 &qcom_socinfo->info.chip_family); 650 debugfs_create_x32("raw_device_family", 0444, 651 qcom_socinfo->dbg_root, 652 &qcom_socinfo->info.raw_device_family); 653 debugfs_create_x32("raw_device_number", 0444, 654 qcom_socinfo->dbg_root, 655 &qcom_socinfo->info.raw_device_num); 656 fallthrough; 657 case SOCINFO_VERSION(0, 11): 658 num_pmics = le32_to_cpu(info->num_pmics); 659 pmic_array_offset = le32_to_cpu(info->pmic_array_offset); 660 if (pmic_array_offset + 2 * num_pmics * sizeof(u32) <= info_size) 661 DEBUGFS_ADD(info, pmic_model_array); 662 fallthrough; 663 case SOCINFO_VERSION(0, 10): 664 case SOCINFO_VERSION(0, 9): 665 qcom_socinfo->info.foundry_id = __le32_to_cpu(info->foundry_id); 666 667 debugfs_create_u32("foundry_id", 0444, qcom_socinfo->dbg_root, 668 &qcom_socinfo->info.foundry_id); 669 fallthrough; 670 case SOCINFO_VERSION(0, 8): 671 case SOCINFO_VERSION(0, 7): 672 DEBUGFS_ADD(info, pmic_model); 673 DEBUGFS_ADD(info, pmic_die_rev); 674 fallthrough; 675 case SOCINFO_VERSION(0, 6): 676 qcom_socinfo->info.hw_plat_subtype = 677 __le32_to_cpu(info->hw_plat_subtype); 678 679 debugfs_create_u32("hardware_platform_subtype", 0444, 680 qcom_socinfo->dbg_root, 681 &qcom_socinfo->info.hw_plat_subtype); 682 fallthrough; 683 case SOCINFO_VERSION(0, 5): 684 qcom_socinfo->info.accessory_chip = 685 __le32_to_cpu(info->accessory_chip); 686 687 debugfs_create_u32("accessory_chip", 0444, 688 qcom_socinfo->dbg_root, 689 &qcom_socinfo->info.accessory_chip); 690 fallthrough; 691 case SOCINFO_VERSION(0, 4): 692 qcom_socinfo->info.plat_ver = __le32_to_cpu(info->plat_ver); 693 694 debugfs_create_u32("platform_version", 0444, 695 qcom_socinfo->dbg_root, 696 &qcom_socinfo->info.plat_ver); 697 fallthrough; 698 case SOCINFO_VERSION(0, 3): 699 qcom_socinfo->info.hw_plat = __le32_to_cpu(info->hw_plat); 700 701 debugfs_create_u32("hardware_platform", 0444, 702 qcom_socinfo->dbg_root, 703 &qcom_socinfo->info.hw_plat); 704 fallthrough; 705 case SOCINFO_VERSION(0, 2): 706 qcom_socinfo->info.raw_ver = __le32_to_cpu(info->raw_ver); 707 708 debugfs_create_u32("raw_version", 0444, qcom_socinfo->dbg_root, 709 &qcom_socinfo->info.raw_ver); 710 fallthrough; 711 case SOCINFO_VERSION(0, 1): 712 DEBUGFS_ADD(info, build_id); 713 break; 714 } 715 716 versions = qcom_smem_get(QCOM_SMEM_HOST_ANY, SMEM_IMAGE_VERSION_TABLE, 717 &size); 718 719 for (i = 0; i < ARRAY_SIZE(socinfo_image_names); i++) { 720 if (!socinfo_image_names[i]) 721 continue; 722 723 dentry = debugfs_create_dir(socinfo_image_names[i], 724 qcom_socinfo->dbg_root); 725 debugfs_create_file("name", 0444, dentry, &versions[i], 726 &qcom_image_name_ops); 727 debugfs_create_file("variant", 0444, dentry, &versions[i], 728 &qcom_image_variant_ops); 729 debugfs_create_file("oem", 0444, dentry, &versions[i], 730 &qcom_image_oem_ops); 731 } 732 } 733 734 static void socinfo_debugfs_exit(struct qcom_socinfo *qcom_socinfo) 735 { 736 debugfs_remove_recursive(qcom_socinfo->dbg_root); 737 } 738 #else 739 static void socinfo_debugfs_init(struct qcom_socinfo *qcom_socinfo, 740 struct socinfo *info, size_t info_size) 741 { 742 } 743 static void socinfo_debugfs_exit(struct qcom_socinfo *qcom_socinfo) { } 744 #endif /* CONFIG_DEBUG_FS */ 745 746 static int qcom_socinfo_probe(struct platform_device *pdev) 747 { 748 struct qcom_socinfo *qs; 749 struct socinfo *info; 750 size_t item_size; 751 752 info = qcom_smem_get(QCOM_SMEM_HOST_ANY, SMEM_HW_SW_BUILD_ID, 753 &item_size); 754 if (IS_ERR(info)) { 755 dev_err(&pdev->dev, "Couldn't find socinfo\n"); 756 return PTR_ERR(info); 757 } 758 759 qs = devm_kzalloc(&pdev->dev, sizeof(*qs), GFP_KERNEL); 760 if (!qs) 761 return -ENOMEM; 762 763 qs->attr.family = "Snapdragon"; 764 qs->attr.machine = socinfo_machine(&pdev->dev, 765 le32_to_cpu(info->id)); 766 qs->attr.soc_id = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%u", 767 le32_to_cpu(info->id)); 768 qs->attr.revision = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%u.%u", 769 SOCINFO_MAJOR(le32_to_cpu(info->ver)), 770 SOCINFO_MINOR(le32_to_cpu(info->ver))); 771 if (offsetof(struct socinfo, serial_num) <= item_size) 772 qs->attr.serial_number = devm_kasprintf(&pdev->dev, GFP_KERNEL, 773 "%u", 774 le32_to_cpu(info->serial_num)); 775 776 qs->soc_dev = soc_device_register(&qs->attr); 777 if (IS_ERR(qs->soc_dev)) 778 return PTR_ERR(qs->soc_dev); 779 780 socinfo_debugfs_init(qs, info, item_size); 781 782 /* Feed the soc specific unique data into entropy pool */ 783 add_device_randomness(info, item_size); 784 785 platform_set_drvdata(pdev, qs); 786 787 return 0; 788 } 789 790 static void qcom_socinfo_remove(struct platform_device *pdev) 791 { 792 struct qcom_socinfo *qs = platform_get_drvdata(pdev); 793 794 soc_device_unregister(qs->soc_dev); 795 796 socinfo_debugfs_exit(qs); 797 } 798 799 static struct platform_driver qcom_socinfo_driver = { 800 .probe = qcom_socinfo_probe, 801 .remove_new = qcom_socinfo_remove, 802 .driver = { 803 .name = "qcom-socinfo", 804 }, 805 }; 806 807 module_platform_driver(qcom_socinfo_driver); 808 809 MODULE_DESCRIPTION("Qualcomm SoCinfo driver"); 810 MODULE_LICENSE("GPL v2"); 811 MODULE_ALIAS("platform:qcom-socinfo"); 812