xref: /linux/drivers/soc/qcom/socinfo.c (revision bba2c3615bd6cfee7456d1130f2e6b01b3f4e9ba)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Copyright (c) 2009-2017, The Linux Foundation. All rights reserved.
4  * Copyright (c) 2017-2019, Linaro Ltd.
5  */
6 
7 #include <linux/debugfs.h>
8 #include <linux/err.h>
9 #include <linux/module.h>
10 #include <linux/platform_device.h>
11 #include <linux/random.h>
12 #include <linux/slab.h>
13 #include <linux/soc/qcom/smem.h>
14 #include <linux/soc/qcom/socinfo.h>
15 #include <linux/string.h>
16 #include <linux/stringify.h>
17 #include <linux/sys_soc.h>
18 #include <linux/types.h>
19 
20 #include <linux/unaligned.h>
21 
22 #include <dt-bindings/arm/qcom,ids.h>
23 
24 /* Helper macros to create soc_id table */
25 #define qcom_board_id(id) QCOM_ID_ ## id, __stringify(id)
26 #define qcom_board_id_named(id, name) QCOM_ID_ ## id, (name)
27 
28 #ifdef CONFIG_DEBUG_FS
29 #define SMEM_IMAGE_VERSION_BLOCKS_COUNT        32
30 #define SMEM_IMAGE_VERSION_SIZE                4096
31 #define SMEM_IMAGE_VERSION_NAME_SIZE           75
32 #define SMEM_IMAGE_VERSION_VARIANT_SIZE        20
33 #define SMEM_IMAGE_VERSION_OEM_SIZE            32
34 
35 /*
36  * SMEM Image table indices
37  */
38 #define SMEM_IMAGE_TABLE_BOOT_INDEX     0
39 #define SMEM_IMAGE_TABLE_TZ_INDEX       1
40 #define SMEM_IMAGE_TABLE_TZSECAPP_INDEX	2
41 #define SMEM_IMAGE_TABLE_RPM_INDEX      3
42 #define SMEM_IMAGE_TABLE_SDI_INDEX      4
43 #define SMEM_IMAGE_TABLE_HYP_INDEX      5
44 #define SMEM_IMAGE_TABLE_ADSP1_INDEX	6
45 #define SMEM_IMAGE_TABLE_ADSP2_INDEX	7
46 #define SMEM_IMAGE_TABLE_CDSP2_INDEX	8
47 #define SMEM_IMAGE_TABLE_APPSBL_INDEX	9
48 #define SMEM_IMAGE_TABLE_APPS_INDEX     10
49 #define SMEM_IMAGE_TABLE_MPSS_INDEX     11
50 #define SMEM_IMAGE_TABLE_ADSP_INDEX     12
51 #define SMEM_IMAGE_TABLE_CNSS_INDEX     13
52 #define SMEM_IMAGE_TABLE_VIDEO_INDEX    14
53 #define SMEM_IMAGE_TABLE_DSPS_INDEX     15
54 #define SMEM_IMAGE_TABLE_CDSP_INDEX     16
55 #define SMEM_IMAGE_TABLE_NPU_INDEX	17
56 #define SMEM_IMAGE_TABLE_WPSS_INDEX     18
57 #define SMEM_IMAGE_TABLE_CDSP1_INDEX    19
58 #define SMEM_IMAGE_TABLE_GPDSP_INDEX    20
59 #define SMEM_IMAGE_TABLE_GPDSP1_INDEX   21
60 #define SMEM_IMAGE_TABLE_SENSORPD_INDEX	22
61 #define SMEM_IMAGE_TABLE_AUDIOPD_INDEX	23
62 #define SMEM_IMAGE_TABLE_OEMPD_INDEX	24
63 #define SMEM_IMAGE_TABLE_CHARGERPD_INDEX	25
64 #define SMEM_IMAGE_TABLE_OISPD_INDEX	26
65 #define SMEM_IMAGE_TABLE_SOCCP_INDEX	27
66 #define SMEM_IMAGE_TABLE_TME_INDEX	28
67 #define SMEM_IMAGE_TABLE_GEARVM_INDEX	29
68 #define SMEM_IMAGE_TABLE_UEFI_INDEX	30
69 #define SMEM_IMAGE_TABLE_CDSP3_INDEX	31
70 #define SMEM_IMAGE_TABLE_AUDIOPD_ADSP1_INDEX	32
71 #define SMEM_IMAGE_TABLE_AUDIOPD_ADSP2_INDEX	33
72 #define SMEM_IMAGE_TABLE_DCP_INDEX	34
73 #define SMEM_IMAGE_TABLE_OOBS_INDEX	35
74 #define SMEM_IMAGE_TABLE_OOBNS_INDEX	36
75 #define SMEM_IMAGE_TABLE_DEVCFG_INDEX	37
76 #define SMEM_IMAGE_TABLE_BTPD_INDEX	38
77 #define SMEM_IMAGE_TABLE_QECP_INDEX	39
78 
79 #define SMEM_IMAGE_VERSION_TABLE       469
80 #define SMEM_IMAGE_VERSION_TABLE_2	667
81 
82 /*
83  * SMEM Image table names
84  */
85 static const char *const socinfo_image_names[] = {
86 	[SMEM_IMAGE_TABLE_ADSP1_INDEX] = "adsp1",
87 	[SMEM_IMAGE_TABLE_ADSP2_INDEX] = "adsp2",
88 	[SMEM_IMAGE_TABLE_ADSP_INDEX] = "adsp",
89 	[SMEM_IMAGE_TABLE_APPSBL_INDEX] = "appsbl",
90 	[SMEM_IMAGE_TABLE_APPS_INDEX] = "apps",
91 	[SMEM_IMAGE_TABLE_AUDIOPD_INDEX] = "audiopd",
92 	[SMEM_IMAGE_TABLE_AUDIOPD_ADSP1_INDEX] = "audiopd_adsp1",
93 	[SMEM_IMAGE_TABLE_AUDIOPD_ADSP2_INDEX] = "audiopd_adsp2",
94 	[SMEM_IMAGE_TABLE_BOOT_INDEX] = "boot",
95 	[SMEM_IMAGE_TABLE_BTPD_INDEX] = "btpd",
96 	[SMEM_IMAGE_TABLE_CDSP1_INDEX] = "cdsp1",
97 	[SMEM_IMAGE_TABLE_CDSP2_INDEX] = "cdsp2",
98 	[SMEM_IMAGE_TABLE_CDSP3_INDEX] = "cdsp3",
99 	[SMEM_IMAGE_TABLE_CDSP_INDEX] = "cdsp",
100 	[SMEM_IMAGE_TABLE_CHARGERPD_INDEX] = "chargerpd",
101 	[SMEM_IMAGE_TABLE_CNSS_INDEX] = "cnss",
102 	[SMEM_IMAGE_TABLE_DCP_INDEX] = "dcp",
103 	[SMEM_IMAGE_TABLE_DEVCFG_INDEX] = "devcfg",
104 	[SMEM_IMAGE_TABLE_DSPS_INDEX] = "dsps",
105 	[SMEM_IMAGE_TABLE_GEARVM_INDEX] = "gearvm",
106 	[SMEM_IMAGE_TABLE_GPDSP1_INDEX] = "gpdsp1",
107 	[SMEM_IMAGE_TABLE_GPDSP_INDEX] = "gpdsp",
108 	[SMEM_IMAGE_TABLE_HYP_INDEX] = "hyp",
109 	[SMEM_IMAGE_TABLE_MPSS_INDEX] = "mpss",
110 	[SMEM_IMAGE_TABLE_NPU_INDEX] = "npu",
111 	[SMEM_IMAGE_TABLE_OEMPD_INDEX] = "oempd",
112 	[SMEM_IMAGE_TABLE_OISPD_INDEX] = "oispd",
113 	[SMEM_IMAGE_TABLE_OOBNS_INDEX] = "oobns",
114 	[SMEM_IMAGE_TABLE_OOBS_INDEX] = "oobs",
115 	[SMEM_IMAGE_TABLE_QECP_INDEX] = "qecp",
116 	[SMEM_IMAGE_TABLE_RPM_INDEX] = "rpm",
117 	[SMEM_IMAGE_TABLE_SDI_INDEX] = "sdi",
118 	[SMEM_IMAGE_TABLE_SENSORPD_INDEX] = "sensorpd",
119 	[SMEM_IMAGE_TABLE_SOCCP_INDEX] = "soccp",
120 	[SMEM_IMAGE_TABLE_TME_INDEX] = "tme",
121 	[SMEM_IMAGE_TABLE_TZ_INDEX] = "tz",
122 	[SMEM_IMAGE_TABLE_TZSECAPP_INDEX] = "tzsecapp",
123 	[SMEM_IMAGE_TABLE_UEFI_INDEX] = "uefi",
124 	[SMEM_IMAGE_TABLE_VIDEO_INDEX] = "video",
125 	[SMEM_IMAGE_TABLE_WPSS_INDEX] = "wpss",
126 };
127 
128 static const char *const pmic_models[] = {
129 	[0]  = "Unknown PMIC model",
130 	[1]  = "PM8941",
131 	[2]  = "PM8841",
132 	[3]  = "PM8019",
133 	[4]  = "PM8226",
134 	[5]  = "PM8110",
135 	[6]  = "PMA8084",
136 	[7]  = "PMI8962",
137 	[8]  = "PMD9635",
138 	[9]  = "PM8994",
139 	[10] = "PMI8994",
140 	[11] = "PM8916",
141 	[12] = "PM8004",
142 	[13] = "PM8909/PM8058",
143 	[14] = "PM8028",
144 	[15] = "PM8901",
145 	[16] = "PM8950/PM8027",
146 	[17] = "PMI8950/ISL9519",
147 	[18] = "PMK8001/PM8921",
148 	[19] = "PMI8996/PM8018",
149 	[20] = "PM8998/PM8015",
150 	[21] = "PMI8998/PM8014",
151 	[22] = "PM8821",
152 	[23] = "PM8038",
153 	[24] = "PM8005/PM8922",
154 	[25] = "PM8917/PM8937",
155 	[26] = "PM660L",
156 	[27] = "PM660",
157 	[30] = "PM8150",
158 	[31] = "PM8150L",
159 	[32] = "PM8150B",
160 	[33] = "PMK8002",
161 	[36] = "PM8009",
162 	[37] = "PMI632",
163 	[38] = "PM8150C",
164 	[40] = "PM6150",
165 	[41] = "SMB2351",
166 	[44] = "PM8008",
167 	[45] = "PM6125",
168 	[46] = "PM7250B",
169 	[47] = "PMK8350",
170 	[48] = "PM8350",
171 	[49] = "PM8350C",
172 	[50] = "PM8350B",
173 	[51] = "PMR735A",
174 	[52] = "PMR735B",
175 	[54] = "PM6350",
176 	[55] = "PM4125",
177 	[58] = "PM8450",
178 	[65] = "PM8010",
179 	[69] = "PM8550VS",
180 	[70] = "PM8550VE",
181 	[71] = "PM8550B",
182 	[72] = "PMR735D",
183 	[73] = "PM8550",
184 	[74] = "PMK8550",
185 	[76] = "PM7550BA",
186 	[78] = "PMM8650AU",
187 	[79] = "PMM8650AU_PSAIL",
188 	[80] = "PM7550",
189 	[82] = "PMC8380",
190 	[83] = "SMB2360",
191 	[86] = "PM8750B",
192 	[87] = "PMD8028",
193 	[88] = "PMC1020H",
194 	[89] = "PMIV0104",
195 	[90] = "PMIV0102",
196 	[91] = "PMIV0108",
197 	[92] = "PMK8850",
198 	[93] = "PMH0101",
199 	[94] = "PMAU0102",
200 	[95] = "SMB2370",
201 	[96] = "PMH0104",
202 	[97] = "PMH0110",
203 	[98] = "PMCX0102",
204 };
205 
206 struct socinfo_params {
207 	u32 raw_device_family;
208 	u32 hw_plat_subtype;
209 	u32 accessory_chip;
210 	u32 raw_device_num;
211 	u32 chip_family;
212 	u32 foundry_id;
213 	u32 plat_ver;
214 	u32 raw_ver;
215 	u32 hw_plat;
216 	u32 fmt;
217 	u32 nproduct_id;
218 	u32 num_clusters;
219 	u32 ncluster_array_offset;
220 	u32 num_subset_parts;
221 	u32 nsubset_parts_array_offset;
222 	u32 nmodem_supported;
223 	u32 feature_code;
224 	u32 pcode;
225 	u32 oem_variant;
226 	u32 num_func_clusters;
227 	u32 boot_cluster;
228 	u32 boot_core;
229 	u32 raw_package_type;
230 };
231 
232 struct smem_image_version {
233 	char name[SMEM_IMAGE_VERSION_NAME_SIZE];
234 	char variant[SMEM_IMAGE_VERSION_VARIANT_SIZE];
235 	char pad;
236 	char oem[SMEM_IMAGE_VERSION_OEM_SIZE];
237 };
238 #endif /* CONFIG_DEBUG_FS */
239 
240 struct qcom_socinfo {
241 	struct soc_device *soc_dev;
242 	struct soc_device_attribute attr;
243 #ifdef CONFIG_DEBUG_FS
244 	struct dentry *dbg_root;
245 	struct socinfo_params info;
246 #endif /* CONFIG_DEBUG_FS */
247 };
248 
249 struct soc_id {
250 	unsigned int id;
251 	const char *name;
252 };
253 
254 static const struct soc_id soc_id[] = {
255 	{ qcom_board_id(MSM8260) },
256 	{ qcom_board_id(MSM8660) },
257 	{ qcom_board_id(APQ8060) },
258 	{ qcom_board_id(MSM8960) },
259 	{ qcom_board_id(APQ8064) },
260 	{ qcom_board_id(MSM8930) },
261 	{ qcom_board_id(MSM8630) },
262 	{ qcom_board_id(MSM8230) },
263 	{ qcom_board_id(APQ8030) },
264 	{ qcom_board_id(MSM8627) },
265 	{ qcom_board_id(MSM8227) },
266 	{ qcom_board_id(MSM8660A) },
267 	{ qcom_board_id(MSM8260A) },
268 	{ qcom_board_id(APQ8060A) },
269 	{ qcom_board_id(MSM8974) },
270 	{ qcom_board_id(MSM8225) },
271 	{ qcom_board_id(MSM8625) },
272 	{ qcom_board_id(MPQ8064) },
273 	{ qcom_board_id(MSM8960AB) },
274 	{ qcom_board_id(APQ8060AB) },
275 	{ qcom_board_id(MSM8260AB) },
276 	{ qcom_board_id(MSM8660AB) },
277 	{ qcom_board_id(MSM8930AA) },
278 	{ qcom_board_id(MSM8630AA) },
279 	{ qcom_board_id(MSM8230AA) },
280 	{ qcom_board_id(MSM8626) },
281 	{ qcom_board_id(MSM8610) },
282 	{ qcom_board_id(APQ8064AB) },
283 	{ qcom_board_id(MSM8930AB) },
284 	{ qcom_board_id(MSM8630AB) },
285 	{ qcom_board_id(MSM8230AB) },
286 	{ qcom_board_id(APQ8030AB) },
287 	{ qcom_board_id(MSM8226) },
288 	{ qcom_board_id(MSM8526) },
289 	{ qcom_board_id(APQ8030AA) },
290 	{ qcom_board_id(MSM8110) },
291 	{ qcom_board_id(MSM8210) },
292 	{ qcom_board_id(MSM8810) },
293 	{ qcom_board_id(MSM8212) },
294 	{ qcom_board_id(MSM8612) },
295 	{ qcom_board_id(MSM8112) },
296 	{ qcom_board_id(MSM8125) },
297 	{ qcom_board_id(MSM8225Q) },
298 	{ qcom_board_id(MSM8625Q) },
299 	{ qcom_board_id(MSM8125Q) },
300 	{ qcom_board_id(APQ8064AA) },
301 	{ qcom_board_id(APQ8084) },
302 	{ qcom_board_id(MSM8130) },
303 	{ qcom_board_id(MSM8130AA) },
304 	{ qcom_board_id(MSM8130AB) },
305 	{ qcom_board_id(MSM8627AA) },
306 	{ qcom_board_id(MSM8227AA) },
307 	{ qcom_board_id(APQ8074) },
308 	{ qcom_board_id(MSM8274) },
309 	{ qcom_board_id(MSM8674) },
310 	{ qcom_board_id(MDM9635) },
311 	{ qcom_board_id_named(MSM8974PRO_AC, "MSM8974PRO-AC") },
312 	{ qcom_board_id(MSM8126) },
313 	{ qcom_board_id(APQ8026) },
314 	{ qcom_board_id(MSM8926) },
315 	{ qcom_board_id(IPQ8062) },
316 	{ qcom_board_id(IPQ8064) },
317 	{ qcom_board_id(IPQ8066) },
318 	{ qcom_board_id(IPQ8068) },
319 	{ qcom_board_id(MSM8326) },
320 	{ qcom_board_id(MSM8916) },
321 	{ qcom_board_id(MSM8994) },
322 	{ qcom_board_id_named(APQ8074PRO_AA, "APQ8074PRO-AA") },
323 	{ qcom_board_id_named(APQ8074PRO_AB, "APQ8074PRO-AB") },
324 	{ qcom_board_id_named(APQ8074PRO_AC, "APQ8074PRO-AC") },
325 	{ qcom_board_id_named(MSM8274PRO_AA, "MSM8274PRO-AA") },
326 	{ qcom_board_id_named(MSM8274PRO_AB, "MSM8274PRO-AB") },
327 	{ qcom_board_id_named(MSM8274PRO_AC, "MSM8274PRO-AC") },
328 	{ qcom_board_id_named(MSM8674PRO_AA, "MSM8674PRO-AA") },
329 	{ qcom_board_id_named(MSM8674PRO_AB, "MSM8674PRO-AB") },
330 	{ qcom_board_id_named(MSM8674PRO_AC, "MSM8674PRO-AC") },
331 	{ qcom_board_id_named(MSM8974PRO_AA, "MSM8974PRO-AA") },
332 	{ qcom_board_id_named(MSM8974PRO_AB, "MSM8974PRO-AB") },
333 	{ qcom_board_id(APQ8028) },
334 	{ qcom_board_id(MSM8128) },
335 	{ qcom_board_id(MSM8228) },
336 	{ qcom_board_id(MSM8528) },
337 	{ qcom_board_id(MSM8628) },
338 	{ qcom_board_id(MSM8928) },
339 	{ qcom_board_id(MSM8510) },
340 	{ qcom_board_id(MSM8512) },
341 	{ qcom_board_id(MSM8936) },
342 	{ qcom_board_id(MDM9640) },
343 	{ qcom_board_id(MSM8939) },
344 	{ qcom_board_id(APQ8036) },
345 	{ qcom_board_id(APQ8039) },
346 	{ qcom_board_id(MSM8236) },
347 	{ qcom_board_id(MSM8636) },
348 	{ qcom_board_id(MSM8909) },
349 	{ qcom_board_id(MSM8996) },
350 	{ qcom_board_id(APQ8016) },
351 	{ qcom_board_id(MSM8216) },
352 	{ qcom_board_id(MSM8116) },
353 	{ qcom_board_id(MSM8616) },
354 	{ qcom_board_id(MSM8992) },
355 	{ qcom_board_id(APQ8092) },
356 	{ qcom_board_id(APQ8094) },
357 	{ qcom_board_id(MSM8209) },
358 	{ qcom_board_id(MSM8208) },
359 	{ qcom_board_id(MDM9209) },
360 	{ qcom_board_id(MDM9309) },
361 	{ qcom_board_id(MDM9609) },
362 	{ qcom_board_id(MSM8239) },
363 	{ qcom_board_id(MSM8952) },
364 	{ qcom_board_id(APQ8009) },
365 	{ qcom_board_id(MSM8956) },
366 	{ qcom_board_id(MSM8929) },
367 	{ qcom_board_id(MSM8629) },
368 	{ qcom_board_id(MSM8229) },
369 	{ qcom_board_id(APQ8029) },
370 	{ qcom_board_id(APQ8056) },
371 	{ qcom_board_id(MSM8609) },
372 	{ qcom_board_id(APQ8076) },
373 	{ qcom_board_id(MSM8976) },
374 	{ qcom_board_id(IPQ8065) },
375 	{ qcom_board_id(IPQ8069) },
376 	{ qcom_board_id(MDM9650) },
377 	{ qcom_board_id(MDM9655) },
378 	{ qcom_board_id(MDM9250) },
379 	{ qcom_board_id(MDM9255) },
380 	{ qcom_board_id(MDM9350) },
381 	{ qcom_board_id(APQ8052) },
382 	{ qcom_board_id(MDM9607) },
383 	{ qcom_board_id(APQ8096) },
384 	{ qcom_board_id(MSM8998) },
385 	{ qcom_board_id(MSM8953) },
386 	{ qcom_board_id(MSM8937) },
387 	{ qcom_board_id(APQ8037) },
388 	{ qcom_board_id(MDM8207) },
389 	{ qcom_board_id(MDM9207) },
390 	{ qcom_board_id(MDM9307) },
391 	{ qcom_board_id(MDM9628) },
392 	{ qcom_board_id(MSM8909W) },
393 	{ qcom_board_id(APQ8009W) },
394 	{ qcom_board_id(MSM8996L) },
395 	{ qcom_board_id(MSM8917) },
396 	{ qcom_board_id(APQ8053) },
397 	{ qcom_board_id(MSM8996SG) },
398 	{ qcom_board_id(APQ8017) },
399 	{ qcom_board_id(MSM8217) },
400 	{ qcom_board_id(MSM8617) },
401 	{ qcom_board_id(MSM8996AU) },
402 	{ qcom_board_id(APQ8096AU) },
403 	{ qcom_board_id(APQ8096SG) },
404 	{ qcom_board_id(MSM8940) },
405 	{ qcom_board_id(SDX201) },
406 	{ qcom_board_id(SDM660) },
407 	{ qcom_board_id(SDM630) },
408 	{ qcom_board_id(APQ8098) },
409 	{ qcom_board_id(MSM8920) },
410 	{ qcom_board_id(SDM845) },
411 	{ qcom_board_id(MDM9206) },
412 	{ qcom_board_id(IPQ8074) },
413 	{ qcom_board_id(SDA660) },
414 	{ qcom_board_id(SDM658) },
415 	{ qcom_board_id(SDA658) },
416 	{ qcom_board_id(SDA630) },
417 	{ qcom_board_id(MSM8905) },
418 	{ qcom_board_id(SDX202) },
419 	{ qcom_board_id(SDM670) },
420 	{ qcom_board_id(SDM450) },
421 	{ qcom_board_id(SM8150) },
422 	{ qcom_board_id(SDA845) },
423 	{ qcom_board_id(IPQ8072) },
424 	{ qcom_board_id(IPQ8076) },
425 	{ qcom_board_id(IPQ8078) },
426 	{ qcom_board_id(SDM636) },
427 	{ qcom_board_id(SDA636) },
428 	{ qcom_board_id(SDM632) },
429 	{ qcom_board_id(SDA632) },
430 	{ qcom_board_id(SDA450) },
431 	{ qcom_board_id(SDM439) },
432 	{ qcom_board_id(SDM429) },
433 	{ qcom_board_id(SM8250) },
434 	{ qcom_board_id(SA8155) },
435 	{ qcom_board_id(SDA439) },
436 	{ qcom_board_id(SDA429) },
437 	{ qcom_board_id(SM7150) },
438 	{ qcom_board_id(SM7150P) },
439 	{ qcom_board_id(IPQ8070) },
440 	{ qcom_board_id(IPQ8071) },
441 	{ qcom_board_id(QM215) },
442 	{ qcom_board_id(IPQ8072A) },
443 	{ qcom_board_id(IPQ8074A) },
444 	{ qcom_board_id(IPQ8076A) },
445 	{ qcom_board_id(IPQ8078A) },
446 	{ qcom_board_id(SM6125) },
447 	{ qcom_board_id(IPQ8070A) },
448 	{ qcom_board_id(IPQ8071A) },
449 	{ qcom_board_id(IPQ8172) },
450 	{ qcom_board_id(IPQ8173) },
451 	{ qcom_board_id(IPQ8174) },
452 	{ qcom_board_id(IPQ6018) },
453 	{ qcom_board_id(IPQ6028) },
454 	{ qcom_board_id(SDM429W) },
455 	{ qcom_board_id(SM4250) },
456 	{ qcom_board_id(IPQ6000) },
457 	{ qcom_board_id(IPQ6010) },
458 	{ qcom_board_id(SC7180) },
459 	{ qcom_board_id(SM6350) },
460 	{ qcom_board_id(QCM2150) },
461 	{ qcom_board_id(SDA429W) },
462 	{ qcom_board_id(SM8350) },
463 	{ qcom_board_id(QCM2290) },
464 	{ qcom_board_id(SM7125) },
465 	{ qcom_board_id(SM6115) },
466 	{ qcom_board_id(IPQ5010) },
467 	{ qcom_board_id(IPQ5018) },
468 	{ qcom_board_id(IPQ5028) },
469 	{ qcom_board_id(SC8280XP) },
470 	{ qcom_board_id(IPQ6005) },
471 	{ qcom_board_id(QRB5165) },
472 	{ qcom_board_id(SM8450) },
473 	{ qcom_board_id(SM7225) },
474 	{ qcom_board_id(SA8295P) },
475 	{ qcom_board_id(SA8540P) },
476 	{ qcom_board_id(QCM4290) },
477 	{ qcom_board_id(QCS4290) },
478 	{ qcom_board_id(SM7325) },
479 	{ qcom_board_id_named(SM8450_2, "SM8450") },
480 	{ qcom_board_id_named(SM8450_3, "SM8450") },
481 	{ qcom_board_id(SC7280) },
482 	{ qcom_board_id(SC7180P) },
483 	{ qcom_board_id(QCM6490) },
484 	{ qcom_board_id(QCS6490) },
485 	{ qcom_board_id(SM7325P) },
486 	{ qcom_board_id(IPQ5000) },
487 	{ qcom_board_id(IPQ0509) },
488 	{ qcom_board_id(IPQ0518) },
489 	{ qcom_board_id(SM7450) },
490 	{ qcom_board_id(SM6375) },
491 	{ qcom_board_id(IPQ9514) },
492 	{ qcom_board_id(IPQ9550) },
493 	{ qcom_board_id(IPQ9554) },
494 	{ qcom_board_id(IPQ9570) },
495 	{ qcom_board_id(IPQ9574) },
496 	{ qcom_board_id(SM8550) },
497 	{ qcom_board_id(IPQ5016) },
498 	{ qcom_board_id(IPQ9510) },
499 	{ qcom_board_id(QRB4210) },
500 	{ qcom_board_id(QRB2210) },
501 	{ qcom_board_id(SAR2130P) },
502 	{ qcom_board_id(SM8475) },
503 	{ qcom_board_id(SM8475P) },
504 	{ qcom_board_id(SA8255P) },
505 	{ qcom_board_id(SA8650P) },
506 	{ qcom_board_id(SA8775P) },
507 	{ qcom_board_id(QRU1000) },
508 	{ qcom_board_id(SM8475_2) },
509 	{ qcom_board_id(QDU1000) },
510 	{ qcom_board_id(SM7450P) },
511 	{ qcom_board_id(X1E80100) },
512 	{ qcom_board_id(SM8650) },
513 	{ qcom_board_id(SM4450) },
514 	{ qcom_board_id(SAR1130P) },
515 	{ qcom_board_id(QDU1010) },
516 	{ qcom_board_id(QRU1032) },
517 	{ qcom_board_id(QRU1052) },
518 	{ qcom_board_id(QRU1062) },
519 	{ qcom_board_id(IPQ5332) },
520 	{ qcom_board_id(IPQ5322) },
521 	{ qcom_board_id(IPQ5312) },
522 	{ qcom_board_id(IPQ5302) },
523 	{ qcom_board_id(QCS8550) },
524 	{ qcom_board_id(QCM8550) },
525 	{ qcom_board_id(SM8750)  },
526 	{ qcom_board_id(IPQ5300) },
527 	{ qcom_board_id(SM7635) },
528 	{ qcom_board_id(SM6650) },
529 	{ qcom_board_id(SM6650P) },
530 	{ qcom_board_id(IPQ5321) },
531 	{ qcom_board_id(IPQ5424) },
532 	{ qcom_board_id(QCM6690) },
533 	{ qcom_board_id(QCS6690) },
534 	{ qcom_board_id(SM7750) },
535 	{ qcom_board_id(SM8850) },
536 	{ qcom_board_id(IPQ5404) },
537 	{ qcom_board_id(QCS9100) },
538 	{ qcom_board_id(QCS8300) },
539 	{ qcom_board_id(QCS8275) },
540 	{ qcom_board_id(QCS9075) },
541 	{ qcom_board_id(QCS615) },
542 	{ qcom_board_id(SA8797P) },
543 	{ qcom_board_id(CQ7790M) },
544 	{ qcom_board_id(CQ7790S) },
545 	{ qcom_board_id(CQ2390M) },
546 	{ qcom_board_id(CQ2390S) },
547 	{ qcom_board_id(IQ2390S) },
548 	{ qcom_board_id(IPQ5200) },
549 	{ qcom_board_id(IPQ5210) },
550 	{ qcom_board_id(QCF2200) },
551 	{ qcom_board_id(QCF3200) },
552 	{ qcom_board_id(QCF3210) },
553 	{ qcom_board_id(IPQ9620) },
554 	{ qcom_board_id(IPQ9650) },
555 	{ qcom_board_id(IPQ9610) },
556 	{ qcom_board_id(IPQ9630) },
557 	{ qcom_board_id(IPQ9640) },
558 	{ qcom_board_id(IPQ9670) },
559 };
560 
561 static const char *socinfo_machine(struct device *dev, unsigned int id)
562 {
563 	int idx;
564 
565 	for (idx = 0; idx < ARRAY_SIZE(soc_id); idx++) {
566 		if (soc_id[idx].id == id)
567 			return soc_id[idx].name;
568 	}
569 
570 	return NULL;
571 }
572 
573 #ifdef CONFIG_DEBUG_FS
574 
575 #define QCOM_OPEN(name, _func)						\
576 static int qcom_open_##name(struct inode *inode, struct file *file)	\
577 {									\
578 	return single_open(file, _func, inode->i_private);		\
579 }									\
580 									\
581 static const struct file_operations qcom_ ##name## _ops = {		\
582 	.open = qcom_open_##name,					\
583 	.read = seq_read,						\
584 	.llseek = seq_lseek,						\
585 	.release = single_release,					\
586 }
587 
588 #define DEBUGFS_ADD(info, name)						\
589 	debugfs_create_file(__stringify(name), 0444,			\
590 			    qcom_socinfo->dbg_root,			\
591 			    info, &qcom_ ##name## _ops)
592 
593 
594 static int qcom_show_build_id(struct seq_file *seq, void *p)
595 {
596 	struct socinfo *socinfo = seq->private;
597 
598 	seq_printf(seq, "%s\n", socinfo->build_id);
599 
600 	return 0;
601 }
602 
603 static int qcom_show_pmic_model(struct seq_file *seq, void *p)
604 {
605 	struct socinfo *socinfo = seq->private;
606 	int model = SOCINFO_MINOR(le32_to_cpu(socinfo->pmic_model));
607 
608 	if (model < 0)
609 		return -EINVAL;
610 
611 	if (model < ARRAY_SIZE(pmic_models) && pmic_models[model])
612 		seq_printf(seq, "%s\n", pmic_models[model]);
613 	else
614 		seq_printf(seq, "unknown (%d)\n", model);
615 
616 	return 0;
617 }
618 
619 static int qcom_show_pmic_model_array(struct seq_file *seq, void *p)
620 {
621 	struct socinfo *socinfo = seq->private;
622 	unsigned int num_pmics = le32_to_cpu(socinfo->num_pmics);
623 	unsigned int pmic_array_offset = le32_to_cpu(socinfo->pmic_array_offset);
624 	int i;
625 	void *ptr = socinfo;
626 
627 	ptr += pmic_array_offset;
628 
629 	/* No need for bounds checking, it happened at socinfo_debugfs_init */
630 	for (i = 0; i < num_pmics; i++) {
631 		unsigned int model = SOCINFO_MINOR(get_unaligned_le32(ptr + 2 * i * sizeof(u32)));
632 		unsigned int die_rev = get_unaligned_le32(ptr + (2 * i + 1) * sizeof(u32));
633 
634 		if (model < ARRAY_SIZE(pmic_models) && pmic_models[model])
635 			seq_printf(seq, "%s %u.%u\n", pmic_models[model],
636 				   SOCINFO_MAJOR(die_rev),
637 				   SOCINFO_MINOR(die_rev));
638 		else
639 			seq_printf(seq, "unknown (%d)\n", model);
640 	}
641 
642 	return 0;
643 }
644 
645 static int qcom_show_pmic_die_revision(struct seq_file *seq, void *p)
646 {
647 	struct socinfo *socinfo = seq->private;
648 
649 	seq_printf(seq, "%u.%u\n",
650 		   SOCINFO_MAJOR(le32_to_cpu(socinfo->pmic_die_rev)),
651 		   SOCINFO_MINOR(le32_to_cpu(socinfo->pmic_die_rev)));
652 
653 	return 0;
654 }
655 
656 static int qcom_show_chip_id(struct seq_file *seq, void *p)
657 {
658 	struct socinfo *socinfo = seq->private;
659 
660 	seq_printf(seq, "%s\n", socinfo->chip_id);
661 
662 	return 0;
663 }
664 
665 QCOM_OPEN(build_id, qcom_show_build_id);
666 QCOM_OPEN(pmic_model, qcom_show_pmic_model);
667 QCOM_OPEN(pmic_model_array, qcom_show_pmic_model_array);
668 QCOM_OPEN(pmic_die_rev, qcom_show_pmic_die_revision);
669 QCOM_OPEN(chip_id, qcom_show_chip_id);
670 
671 #define DEFINE_IMAGE_OPS(type)					\
672 static int show_image_##type(struct seq_file *seq, void *p)		  \
673 {								  \
674 	struct smem_image_version *image_version = seq->private;  \
675 	if (image_version->type[0] != '\0')			  \
676 		seq_printf(seq, "%s\n", image_version->type);	  \
677 	return 0;						  \
678 }								  \
679 static int open_image_##type(struct inode *inode, struct file *file)	  \
680 {									  \
681 	return single_open(file, show_image_##type, inode->i_private); \
682 }									  \
683 									  \
684 static const struct file_operations qcom_image_##type##_ops = {	  \
685 	.open = open_image_##type,					  \
686 	.read = seq_read,						  \
687 	.llseek = seq_lseek,						  \
688 	.release = single_release,					  \
689 }
690 
691 DEFINE_IMAGE_OPS(name);
692 DEFINE_IMAGE_OPS(variant);
693 DEFINE_IMAGE_OPS(oem);
694 
695 static void socinfo_debugfs_init(struct qcom_socinfo *qcom_socinfo,
696 				 struct socinfo *info, size_t info_size)
697 {
698 	struct smem_image_version *versions;
699 	struct dentry *dentry;
700 	size_t size;
701 	int i, j;
702 	unsigned int num_pmics;
703 	unsigned int pmic_array_offset;
704 
705 	qcom_socinfo->dbg_root = debugfs_create_dir("qcom_socinfo", NULL);
706 
707 	qcom_socinfo->info.fmt = __le32_to_cpu(info->fmt);
708 
709 	debugfs_create_x32("info_fmt", 0444, qcom_socinfo->dbg_root,
710 			   &qcom_socinfo->info.fmt);
711 
712 	switch (qcom_socinfo->info.fmt) {
713 	case SOCINFO_VERSION(0, 23):
714 	case SOCINFO_VERSION(0, 22):
715 	case SOCINFO_VERSION(0, 21):
716 	case SOCINFO_VERSION(0, 20):
717 		qcom_socinfo->info.raw_package_type = __le32_to_cpu(info->raw_package_type);
718 		debugfs_create_u32("raw_package_type", 0444, qcom_socinfo->dbg_root,
719 				   &qcom_socinfo->info.raw_package_type);
720 		fallthrough;
721 	case SOCINFO_VERSION(0, 19):
722 		qcom_socinfo->info.num_func_clusters = __le32_to_cpu(info->num_func_clusters);
723 		qcom_socinfo->info.boot_cluster = __le32_to_cpu(info->boot_cluster);
724 		qcom_socinfo->info.boot_core = __le32_to_cpu(info->boot_core);
725 
726 		debugfs_create_u32("num_func_clusters", 0444, qcom_socinfo->dbg_root,
727 				   &qcom_socinfo->info.num_func_clusters);
728 		debugfs_create_u32("boot_cluster", 0444, qcom_socinfo->dbg_root,
729 				   &qcom_socinfo->info.boot_cluster);
730 		debugfs_create_u32("boot_core", 0444, qcom_socinfo->dbg_root,
731 				   &qcom_socinfo->info.boot_core);
732 		fallthrough;
733 	case SOCINFO_VERSION(0, 18):
734 	case SOCINFO_VERSION(0, 17):
735 		qcom_socinfo->info.oem_variant = __le32_to_cpu(info->oem_variant);
736 		debugfs_create_u32("oem_variant", 0444, qcom_socinfo->dbg_root,
737 				   &qcom_socinfo->info.oem_variant);
738 		fallthrough;
739 	case SOCINFO_VERSION(0, 16):
740 		qcom_socinfo->info.feature_code = __le32_to_cpu(info->feature_code);
741 		qcom_socinfo->info.pcode = __le32_to_cpu(info->pcode);
742 
743 		debugfs_create_u32("feature_code", 0444, qcom_socinfo->dbg_root,
744 				   &qcom_socinfo->info.feature_code);
745 		debugfs_create_u32("pcode", 0444, qcom_socinfo->dbg_root,
746 				   &qcom_socinfo->info.pcode);
747 		fallthrough;
748 	case SOCINFO_VERSION(0, 15):
749 		qcom_socinfo->info.nmodem_supported = __le32_to_cpu(info->nmodem_supported);
750 
751 		debugfs_create_u32("nmodem_supported", 0444, qcom_socinfo->dbg_root,
752 				   &qcom_socinfo->info.nmodem_supported);
753 		fallthrough;
754 	case SOCINFO_VERSION(0, 14):
755 		qcom_socinfo->info.num_clusters = __le32_to_cpu(info->num_clusters);
756 		qcom_socinfo->info.ncluster_array_offset = __le32_to_cpu(info->ncluster_array_offset);
757 		qcom_socinfo->info.num_subset_parts = __le32_to_cpu(info->num_subset_parts);
758 		qcom_socinfo->info.nsubset_parts_array_offset =
759 			__le32_to_cpu(info->nsubset_parts_array_offset);
760 
761 		debugfs_create_u32("num_clusters", 0444, qcom_socinfo->dbg_root,
762 				   &qcom_socinfo->info.num_clusters);
763 		debugfs_create_u32("ncluster_array_offset", 0444, qcom_socinfo->dbg_root,
764 				   &qcom_socinfo->info.ncluster_array_offset);
765 		debugfs_create_u32("num_subset_parts", 0444, qcom_socinfo->dbg_root,
766 				   &qcom_socinfo->info.num_subset_parts);
767 		debugfs_create_u32("nsubset_parts_array_offset", 0444, qcom_socinfo->dbg_root,
768 				   &qcom_socinfo->info.nsubset_parts_array_offset);
769 		fallthrough;
770 	case SOCINFO_VERSION(0, 13):
771 		qcom_socinfo->info.nproduct_id = __le32_to_cpu(info->nproduct_id);
772 
773 		debugfs_create_u32("nproduct_id", 0444, qcom_socinfo->dbg_root,
774 				   &qcom_socinfo->info.nproduct_id);
775 		DEBUGFS_ADD(info, chip_id);
776 		fallthrough;
777 	case SOCINFO_VERSION(0, 12):
778 		qcom_socinfo->info.chip_family =
779 			__le32_to_cpu(info->chip_family);
780 		qcom_socinfo->info.raw_device_family =
781 			__le32_to_cpu(info->raw_device_family);
782 		qcom_socinfo->info.raw_device_num =
783 			__le32_to_cpu(info->raw_device_num);
784 
785 		debugfs_create_x32("chip_family", 0444, qcom_socinfo->dbg_root,
786 				   &qcom_socinfo->info.chip_family);
787 		debugfs_create_x32("raw_device_family", 0444,
788 				   qcom_socinfo->dbg_root,
789 				   &qcom_socinfo->info.raw_device_family);
790 		debugfs_create_x32("raw_device_number", 0444,
791 				   qcom_socinfo->dbg_root,
792 				   &qcom_socinfo->info.raw_device_num);
793 		fallthrough;
794 	case SOCINFO_VERSION(0, 11):
795 		num_pmics = le32_to_cpu(info->num_pmics);
796 		pmic_array_offset = le32_to_cpu(info->pmic_array_offset);
797 		if (pmic_array_offset + 2 * num_pmics * sizeof(u32) <= info_size)
798 			DEBUGFS_ADD(info, pmic_model_array);
799 		fallthrough;
800 	case SOCINFO_VERSION(0, 10):
801 	case SOCINFO_VERSION(0, 9):
802 		qcom_socinfo->info.foundry_id = __le32_to_cpu(info->foundry_id);
803 
804 		debugfs_create_u32("foundry_id", 0444, qcom_socinfo->dbg_root,
805 				   &qcom_socinfo->info.foundry_id);
806 		fallthrough;
807 	case SOCINFO_VERSION(0, 8):
808 	case SOCINFO_VERSION(0, 7):
809 		DEBUGFS_ADD(info, pmic_model);
810 		DEBUGFS_ADD(info, pmic_die_rev);
811 		fallthrough;
812 	case SOCINFO_VERSION(0, 6):
813 		qcom_socinfo->info.hw_plat_subtype =
814 			__le32_to_cpu(info->hw_plat_subtype);
815 
816 		debugfs_create_u32("hardware_platform_subtype", 0444,
817 				   qcom_socinfo->dbg_root,
818 				   &qcom_socinfo->info.hw_plat_subtype);
819 		fallthrough;
820 	case SOCINFO_VERSION(0, 5):
821 		qcom_socinfo->info.accessory_chip =
822 			__le32_to_cpu(info->accessory_chip);
823 
824 		debugfs_create_u32("accessory_chip", 0444,
825 				   qcom_socinfo->dbg_root,
826 				   &qcom_socinfo->info.accessory_chip);
827 		fallthrough;
828 	case SOCINFO_VERSION(0, 4):
829 		qcom_socinfo->info.plat_ver = __le32_to_cpu(info->plat_ver);
830 
831 		debugfs_create_u32("platform_version", 0444,
832 				   qcom_socinfo->dbg_root,
833 				   &qcom_socinfo->info.plat_ver);
834 		fallthrough;
835 	case SOCINFO_VERSION(0, 3):
836 		qcom_socinfo->info.hw_plat = __le32_to_cpu(info->hw_plat);
837 
838 		debugfs_create_u32("hardware_platform", 0444,
839 				   qcom_socinfo->dbg_root,
840 				   &qcom_socinfo->info.hw_plat);
841 		fallthrough;
842 	case SOCINFO_VERSION(0, 2):
843 		qcom_socinfo->info.raw_ver  = __le32_to_cpu(info->raw_ver);
844 
845 		debugfs_create_u32("raw_version", 0444, qcom_socinfo->dbg_root,
846 				   &qcom_socinfo->info.raw_ver);
847 		fallthrough;
848 	case SOCINFO_VERSION(0, 1):
849 		DEBUGFS_ADD(info, build_id);
850 		break;
851 	}
852 
853 	for (i = 0, j = 0; i < ARRAY_SIZE(socinfo_image_names); i++, j++) {
854 		if (!socinfo_image_names[i])
855 			continue;
856 
857 		if (i == 0) {
858 			versions = qcom_smem_get(QCOM_SMEM_HOST_ANY,
859 						 SMEM_IMAGE_VERSION_TABLE,
860 						 &size);
861 		} else if (i == 32) {
862 			versions = qcom_smem_get(QCOM_SMEM_HOST_ANY,
863 						 SMEM_IMAGE_VERSION_TABLE_2,
864 						 &size);
865 			if (IS_ERR(versions))
866 				break;
867 
868 			j = 0;
869 		}
870 
871 		dentry = debugfs_create_dir(socinfo_image_names[i],
872 					    qcom_socinfo->dbg_root);
873 		debugfs_create_file("name", 0444, dentry, &versions[j],
874 				    &qcom_image_name_ops);
875 		debugfs_create_file("variant", 0444, dentry, &versions[j],
876 				    &qcom_image_variant_ops);
877 		debugfs_create_file("oem", 0444, dentry, &versions[j],
878 				    &qcom_image_oem_ops);
879 	}
880 }
881 
882 static void socinfo_debugfs_exit(struct qcom_socinfo *qcom_socinfo)
883 {
884 	debugfs_remove_recursive(qcom_socinfo->dbg_root);
885 }
886 #else
887 static void socinfo_debugfs_init(struct qcom_socinfo *qcom_socinfo,
888 				 struct socinfo *info, size_t info_size)
889 {
890 }
891 static void socinfo_debugfs_exit(struct qcom_socinfo *qcom_socinfo) {  }
892 #endif /* CONFIG_DEBUG_FS */
893 
894 static int qcom_socinfo_probe(struct platform_device *pdev)
895 {
896 	struct qcom_socinfo *qs;
897 	struct socinfo *info;
898 	size_t item_size;
899 
900 	info = qcom_smem_get(QCOM_SMEM_HOST_ANY, SMEM_HW_SW_BUILD_ID,
901 			      &item_size);
902 	if (IS_ERR(info)) {
903 		dev_err(&pdev->dev, "Couldn't find socinfo\n");
904 		return PTR_ERR(info);
905 	}
906 
907 	qs = devm_kzalloc(&pdev->dev, sizeof(*qs), GFP_KERNEL);
908 	if (!qs)
909 		return -ENOMEM;
910 
911 	qs->attr.family = "Snapdragon";
912 	qs->attr.machine = socinfo_machine(&pdev->dev,
913 					   le32_to_cpu(info->id));
914 	qs->attr.soc_id = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%u",
915 					 le32_to_cpu(info->id));
916 	qs->attr.revision = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%u.%u",
917 					   SOCINFO_MAJOR(le32_to_cpu(info->ver)),
918 					   SOCINFO_MINOR(le32_to_cpu(info->ver)));
919 	if (!qs->attr.soc_id || !qs->attr.revision)
920 		return -ENOMEM;
921 
922 	if (offsetofend(struct socinfo, serial_num) <= item_size) {
923 		qs->attr.serial_number = devm_kasprintf(&pdev->dev, GFP_KERNEL,
924 							"%u",
925 							le32_to_cpu(info->serial_num));
926 		if (!qs->attr.serial_number)
927 			return -ENOMEM;
928 	}
929 
930 	qs->soc_dev = soc_device_register(&qs->attr);
931 	if (IS_ERR(qs->soc_dev))
932 		return PTR_ERR(qs->soc_dev);
933 
934 	socinfo_debugfs_init(qs, info, item_size);
935 
936 	/* Feed the soc specific unique data into entropy pool */
937 	add_device_randomness(info, item_size);
938 
939 	platform_set_drvdata(pdev, qs);
940 
941 	return 0;
942 }
943 
944 static void qcom_socinfo_remove(struct platform_device *pdev)
945 {
946 	struct qcom_socinfo *qs = platform_get_drvdata(pdev);
947 
948 	soc_device_unregister(qs->soc_dev);
949 
950 	socinfo_debugfs_exit(qs);
951 }
952 
953 static struct platform_driver qcom_socinfo_driver = {
954 	.probe = qcom_socinfo_probe,
955 	.remove = qcom_socinfo_remove,
956 	.driver  = {
957 		.name = "qcom-socinfo",
958 	},
959 };
960 
961 module_platform_driver(qcom_socinfo_driver);
962 
963 MODULE_DESCRIPTION("Qualcomm SoCinfo driver");
964 MODULE_LICENSE("GPL v2");
965 MODULE_ALIAS("platform:qcom-socinfo");
966