1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (c) 2009-2017, The Linux Foundation. All rights reserved. 4 * Copyright (c) 2017-2019, Linaro Ltd. 5 */ 6 7 #include <linux/debugfs.h> 8 #include <linux/err.h> 9 #include <linux/module.h> 10 #include <linux/platform_device.h> 11 #include <linux/random.h> 12 #include <linux/slab.h> 13 #include <linux/soc/qcom/smem.h> 14 #include <linux/soc/qcom/socinfo.h> 15 #include <linux/string.h> 16 #include <linux/stringify.h> 17 #include <linux/sys_soc.h> 18 #include <linux/types.h> 19 20 #include <linux/unaligned.h> 21 22 #include <dt-bindings/arm/qcom,ids.h> 23 24 /* Helper macros to create soc_id table */ 25 #define qcom_board_id(id) QCOM_ID_ ## id, __stringify(id) 26 #define qcom_board_id_named(id, name) QCOM_ID_ ## id, (name) 27 28 #ifdef CONFIG_DEBUG_FS 29 #define SMEM_IMAGE_VERSION_BLOCKS_COUNT 32 30 #define SMEM_IMAGE_VERSION_SIZE 4096 31 #define SMEM_IMAGE_VERSION_NAME_SIZE 75 32 #define SMEM_IMAGE_VERSION_VARIANT_SIZE 20 33 #define SMEM_IMAGE_VERSION_OEM_SIZE 32 34 35 /* 36 * SMEM Image table indices 37 */ 38 #define SMEM_IMAGE_TABLE_BOOT_INDEX 0 39 #define SMEM_IMAGE_TABLE_TZ_INDEX 1 40 #define SMEM_IMAGE_TABLE_RPM_INDEX 3 41 #define SMEM_IMAGE_TABLE_APPSBL_INDEX 9 42 #define SMEM_IMAGE_TABLE_APPS_INDEX 10 43 #define SMEM_IMAGE_TABLE_MPSS_INDEX 11 44 #define SMEM_IMAGE_TABLE_ADSP_INDEX 12 45 #define SMEM_IMAGE_TABLE_CNSS_INDEX 13 46 #define SMEM_IMAGE_TABLE_VIDEO_INDEX 14 47 #define SMEM_IMAGE_TABLE_DSPS_INDEX 15 48 #define SMEM_IMAGE_TABLE_CDSP_INDEX 16 49 #define SMEM_IMAGE_TABLE_CDSP1_INDEX 19 50 #define SMEM_IMAGE_TABLE_GPDSP_INDEX 20 51 #define SMEM_IMAGE_TABLE_GPDSP1_INDEX 21 52 #define SMEM_IMAGE_TABLE_TME_INDEX 28 53 #define SMEM_IMAGE_VERSION_TABLE 469 54 55 /* 56 * SMEM Image table names 57 */ 58 static const char *const socinfo_image_names[] = { 59 [SMEM_IMAGE_TABLE_ADSP_INDEX] = "adsp", 60 [SMEM_IMAGE_TABLE_APPSBL_INDEX] = "appsbl", 61 [SMEM_IMAGE_TABLE_APPS_INDEX] = "apps", 62 [SMEM_IMAGE_TABLE_BOOT_INDEX] = "boot", 63 [SMEM_IMAGE_TABLE_CNSS_INDEX] = "cnss", 64 [SMEM_IMAGE_TABLE_MPSS_INDEX] = "mpss", 65 [SMEM_IMAGE_TABLE_RPM_INDEX] = "rpm", 66 [SMEM_IMAGE_TABLE_TZ_INDEX] = "tz", 67 [SMEM_IMAGE_TABLE_VIDEO_INDEX] = "video", 68 [SMEM_IMAGE_TABLE_DSPS_INDEX] = "dsps", 69 [SMEM_IMAGE_TABLE_CDSP_INDEX] = "cdsp", 70 [SMEM_IMAGE_TABLE_CDSP1_INDEX] = "cdsp1", 71 [SMEM_IMAGE_TABLE_GPDSP_INDEX] = "gpdsp", 72 [SMEM_IMAGE_TABLE_GPDSP1_INDEX] = "gpdsp1", 73 [SMEM_IMAGE_TABLE_TME_INDEX] = "tme", 74 }; 75 76 static const char *const pmic_models[] = { 77 [0] = "Unknown PMIC model", 78 [1] = "PM8941", 79 [2] = "PM8841", 80 [3] = "PM8019", 81 [4] = "PM8226", 82 [5] = "PM8110", 83 [6] = "PMA8084", 84 [7] = "PMI8962", 85 [8] = "PMD9635", 86 [9] = "PM8994", 87 [10] = "PMI8994", 88 [11] = "PM8916", 89 [12] = "PM8004", 90 [13] = "PM8909/PM8058", 91 [14] = "PM8028", 92 [15] = "PM8901", 93 [16] = "PM8950/PM8027", 94 [17] = "PMI8950/ISL9519", 95 [18] = "PMK8001/PM8921", 96 [19] = "PMI8996/PM8018", 97 [20] = "PM8998/PM8015", 98 [21] = "PMI8998/PM8014", 99 [22] = "PM8821", 100 [23] = "PM8038", 101 [24] = "PM8005/PM8922", 102 [25] = "PM8917/PM8937", 103 [26] = "PM660L", 104 [27] = "PM660", 105 [30] = "PM8150", 106 [31] = "PM8150L", 107 [32] = "PM8150B", 108 [33] = "PMK8002", 109 [36] = "PM8009", 110 [37] = "PMI632", 111 [38] = "PM8150C", 112 [40] = "PM6150", 113 [41] = "SMB2351", 114 [44] = "PM8008", 115 [45] = "PM6125", 116 [46] = "PM7250B", 117 [47] = "PMK8350", 118 [48] = "PM8350", 119 [49] = "PM8350C", 120 [50] = "PM8350B", 121 [51] = "PMR735A", 122 [52] = "PMR735B", 123 [54] = "PM6350", 124 [55] = "PM4125", 125 [58] = "PM8450", 126 [65] = "PM8010", 127 [69] = "PM8550VS", 128 [70] = "PM8550VE", 129 [71] = "PM8550B", 130 [72] = "PMR735D", 131 [73] = "PM8550", 132 [74] = "PMK8550", 133 [78] = "PMM8650AU", 134 [79] = "PMM8650AU_PSAIL", 135 [80] = "PM7550", 136 [82] = "PMC8380", 137 [83] = "SMB2360", 138 [91] = "PMIV0108", 139 }; 140 141 struct socinfo_params { 142 u32 raw_device_family; 143 u32 hw_plat_subtype; 144 u32 accessory_chip; 145 u32 raw_device_num; 146 u32 chip_family; 147 u32 foundry_id; 148 u32 plat_ver; 149 u32 raw_ver; 150 u32 hw_plat; 151 u32 fmt; 152 u32 nproduct_id; 153 u32 num_clusters; 154 u32 ncluster_array_offset; 155 u32 num_subset_parts; 156 u32 nsubset_parts_array_offset; 157 u32 nmodem_supported; 158 u32 feature_code; 159 u32 pcode; 160 u32 oem_variant; 161 u32 num_func_clusters; 162 u32 boot_cluster; 163 u32 boot_core; 164 }; 165 166 struct smem_image_version { 167 char name[SMEM_IMAGE_VERSION_NAME_SIZE]; 168 char variant[SMEM_IMAGE_VERSION_VARIANT_SIZE]; 169 char pad; 170 char oem[SMEM_IMAGE_VERSION_OEM_SIZE]; 171 }; 172 #endif /* CONFIG_DEBUG_FS */ 173 174 struct qcom_socinfo { 175 struct soc_device *soc_dev; 176 struct soc_device_attribute attr; 177 #ifdef CONFIG_DEBUG_FS 178 struct dentry *dbg_root; 179 struct socinfo_params info; 180 #endif /* CONFIG_DEBUG_FS */ 181 }; 182 183 struct soc_id { 184 unsigned int id; 185 const char *name; 186 }; 187 188 static const struct soc_id soc_id[] = { 189 { qcom_board_id(MSM8260) }, 190 { qcom_board_id(MSM8660) }, 191 { qcom_board_id(APQ8060) }, 192 { qcom_board_id(MSM8960) }, 193 { qcom_board_id(APQ8064) }, 194 { qcom_board_id(MSM8930) }, 195 { qcom_board_id(MSM8630) }, 196 { qcom_board_id(MSM8230) }, 197 { qcom_board_id(APQ8030) }, 198 { qcom_board_id(MSM8627) }, 199 { qcom_board_id(MSM8227) }, 200 { qcom_board_id(MSM8660A) }, 201 { qcom_board_id(MSM8260A) }, 202 { qcom_board_id(APQ8060A) }, 203 { qcom_board_id(MSM8974) }, 204 { qcom_board_id(MSM8225) }, 205 { qcom_board_id(MSM8625) }, 206 { qcom_board_id(MPQ8064) }, 207 { qcom_board_id(MSM8960AB) }, 208 { qcom_board_id(APQ8060AB) }, 209 { qcom_board_id(MSM8260AB) }, 210 { qcom_board_id(MSM8660AB) }, 211 { qcom_board_id(MSM8930AA) }, 212 { qcom_board_id(MSM8630AA) }, 213 { qcom_board_id(MSM8230AA) }, 214 { qcom_board_id(MSM8626) }, 215 { qcom_board_id(MSM8610) }, 216 { qcom_board_id(APQ8064AB) }, 217 { qcom_board_id(MSM8930AB) }, 218 { qcom_board_id(MSM8630AB) }, 219 { qcom_board_id(MSM8230AB) }, 220 { qcom_board_id(APQ8030AB) }, 221 { qcom_board_id(MSM8226) }, 222 { qcom_board_id(MSM8526) }, 223 { qcom_board_id(APQ8030AA) }, 224 { qcom_board_id(MSM8110) }, 225 { qcom_board_id(MSM8210) }, 226 { qcom_board_id(MSM8810) }, 227 { qcom_board_id(MSM8212) }, 228 { qcom_board_id(MSM8612) }, 229 { qcom_board_id(MSM8112) }, 230 { qcom_board_id(MSM8125) }, 231 { qcom_board_id(MSM8225Q) }, 232 { qcom_board_id(MSM8625Q) }, 233 { qcom_board_id(MSM8125Q) }, 234 { qcom_board_id(APQ8064AA) }, 235 { qcom_board_id(APQ8084) }, 236 { qcom_board_id(MSM8130) }, 237 { qcom_board_id(MSM8130AA) }, 238 { qcom_board_id(MSM8130AB) }, 239 { qcom_board_id(MSM8627AA) }, 240 { qcom_board_id(MSM8227AA) }, 241 { qcom_board_id(APQ8074) }, 242 { qcom_board_id(MSM8274) }, 243 { qcom_board_id(MSM8674) }, 244 { qcom_board_id(MDM9635) }, 245 { qcom_board_id_named(MSM8974PRO_AC, "MSM8974PRO-AC") }, 246 { qcom_board_id(MSM8126) }, 247 { qcom_board_id(APQ8026) }, 248 { qcom_board_id(MSM8926) }, 249 { qcom_board_id(IPQ8062) }, 250 { qcom_board_id(IPQ8064) }, 251 { qcom_board_id(IPQ8066) }, 252 { qcom_board_id(IPQ8068) }, 253 { qcom_board_id(MSM8326) }, 254 { qcom_board_id(MSM8916) }, 255 { qcom_board_id(MSM8994) }, 256 { qcom_board_id_named(APQ8074PRO_AA, "APQ8074PRO-AA") }, 257 { qcom_board_id_named(APQ8074PRO_AB, "APQ8074PRO-AB") }, 258 { qcom_board_id_named(APQ8074PRO_AC, "APQ8074PRO-AC") }, 259 { qcom_board_id_named(MSM8274PRO_AA, "MSM8274PRO-AA") }, 260 { qcom_board_id_named(MSM8274PRO_AB, "MSM8274PRO-AB") }, 261 { qcom_board_id_named(MSM8274PRO_AC, "MSM8274PRO-AC") }, 262 { qcom_board_id_named(MSM8674PRO_AA, "MSM8674PRO-AA") }, 263 { qcom_board_id_named(MSM8674PRO_AB, "MSM8674PRO-AB") }, 264 { qcom_board_id_named(MSM8674PRO_AC, "MSM8674PRO-AC") }, 265 { qcom_board_id_named(MSM8974PRO_AA, "MSM8974PRO-AA") }, 266 { qcom_board_id_named(MSM8974PRO_AB, "MSM8974PRO-AB") }, 267 { qcom_board_id(APQ8028) }, 268 { qcom_board_id(MSM8128) }, 269 { qcom_board_id(MSM8228) }, 270 { qcom_board_id(MSM8528) }, 271 { qcom_board_id(MSM8628) }, 272 { qcom_board_id(MSM8928) }, 273 { qcom_board_id(MSM8510) }, 274 { qcom_board_id(MSM8512) }, 275 { qcom_board_id(MSM8936) }, 276 { qcom_board_id(MDM9640) }, 277 { qcom_board_id(MSM8939) }, 278 { qcom_board_id(APQ8036) }, 279 { qcom_board_id(APQ8039) }, 280 { qcom_board_id(MSM8236) }, 281 { qcom_board_id(MSM8636) }, 282 { qcom_board_id(MSM8909) }, 283 { qcom_board_id(MSM8996) }, 284 { qcom_board_id(APQ8016) }, 285 { qcom_board_id(MSM8216) }, 286 { qcom_board_id(MSM8116) }, 287 { qcom_board_id(MSM8616) }, 288 { qcom_board_id(MSM8992) }, 289 { qcom_board_id(APQ8092) }, 290 { qcom_board_id(APQ8094) }, 291 { qcom_board_id(MSM8209) }, 292 { qcom_board_id(MSM8208) }, 293 { qcom_board_id(MDM9209) }, 294 { qcom_board_id(MDM9309) }, 295 { qcom_board_id(MDM9609) }, 296 { qcom_board_id(MSM8239) }, 297 { qcom_board_id(MSM8952) }, 298 { qcom_board_id(APQ8009) }, 299 { qcom_board_id(MSM8956) }, 300 { qcom_board_id(MSM8929) }, 301 { qcom_board_id(MSM8629) }, 302 { qcom_board_id(MSM8229) }, 303 { qcom_board_id(APQ8029) }, 304 { qcom_board_id(APQ8056) }, 305 { qcom_board_id(MSM8609) }, 306 { qcom_board_id(APQ8076) }, 307 { qcom_board_id(MSM8976) }, 308 { qcom_board_id(IPQ8065) }, 309 { qcom_board_id(IPQ8069) }, 310 { qcom_board_id(MDM9650) }, 311 { qcom_board_id(MDM9655) }, 312 { qcom_board_id(MDM9250) }, 313 { qcom_board_id(MDM9255) }, 314 { qcom_board_id(MDM9350) }, 315 { qcom_board_id(APQ8052) }, 316 { qcom_board_id(MDM9607) }, 317 { qcom_board_id(APQ8096) }, 318 { qcom_board_id(MSM8998) }, 319 { qcom_board_id(MSM8953) }, 320 { qcom_board_id(MSM8937) }, 321 { qcom_board_id(APQ8037) }, 322 { qcom_board_id(MDM8207) }, 323 { qcom_board_id(MDM9207) }, 324 { qcom_board_id(MDM9307) }, 325 { qcom_board_id(MDM9628) }, 326 { qcom_board_id(MSM8909W) }, 327 { qcom_board_id(APQ8009W) }, 328 { qcom_board_id(MSM8996L) }, 329 { qcom_board_id(MSM8917) }, 330 { qcom_board_id(APQ8053) }, 331 { qcom_board_id(MSM8996SG) }, 332 { qcom_board_id(APQ8017) }, 333 { qcom_board_id(MSM8217) }, 334 { qcom_board_id(MSM8617) }, 335 { qcom_board_id(MSM8996AU) }, 336 { qcom_board_id(APQ8096AU) }, 337 { qcom_board_id(APQ8096SG) }, 338 { qcom_board_id(MSM8940) }, 339 { qcom_board_id(SDX201) }, 340 { qcom_board_id(SDM660) }, 341 { qcom_board_id(SDM630) }, 342 { qcom_board_id(APQ8098) }, 343 { qcom_board_id(MSM8920) }, 344 { qcom_board_id(SDM845) }, 345 { qcom_board_id(MDM9206) }, 346 { qcom_board_id(IPQ8074) }, 347 { qcom_board_id(SDA660) }, 348 { qcom_board_id(SDM658) }, 349 { qcom_board_id(SDA658) }, 350 { qcom_board_id(SDA630) }, 351 { qcom_board_id(MSM8905) }, 352 { qcom_board_id(SDX202) }, 353 { qcom_board_id(SDM670) }, 354 { qcom_board_id(SDM450) }, 355 { qcom_board_id(SM8150) }, 356 { qcom_board_id(SDA845) }, 357 { qcom_board_id(IPQ8072) }, 358 { qcom_board_id(IPQ8076) }, 359 { qcom_board_id(IPQ8078) }, 360 { qcom_board_id(SDM636) }, 361 { qcom_board_id(SDA636) }, 362 { qcom_board_id(SDM632) }, 363 { qcom_board_id(SDA632) }, 364 { qcom_board_id(SDA450) }, 365 { qcom_board_id(SDM439) }, 366 { qcom_board_id(SDM429) }, 367 { qcom_board_id(SM8250) }, 368 { qcom_board_id(SA8155) }, 369 { qcom_board_id(SDA439) }, 370 { qcom_board_id(SDA429) }, 371 { qcom_board_id(SM7150) }, 372 { qcom_board_id(SM7150P) }, 373 { qcom_board_id(IPQ8070) }, 374 { qcom_board_id(IPQ8071) }, 375 { qcom_board_id(QM215) }, 376 { qcom_board_id(IPQ8072A) }, 377 { qcom_board_id(IPQ8074A) }, 378 { qcom_board_id(IPQ8076A) }, 379 { qcom_board_id(IPQ8078A) }, 380 { qcom_board_id(SM6125) }, 381 { qcom_board_id(IPQ8070A) }, 382 { qcom_board_id(IPQ8071A) }, 383 { qcom_board_id(IPQ8172) }, 384 { qcom_board_id(IPQ8173) }, 385 { qcom_board_id(IPQ8174) }, 386 { qcom_board_id(IPQ6018) }, 387 { qcom_board_id(IPQ6028) }, 388 { qcom_board_id(SDM429W) }, 389 { qcom_board_id(SM4250) }, 390 { qcom_board_id(IPQ6000) }, 391 { qcom_board_id(IPQ6010) }, 392 { qcom_board_id(SC7180) }, 393 { qcom_board_id(SM6350) }, 394 { qcom_board_id(QCM2150) }, 395 { qcom_board_id(SDA429W) }, 396 { qcom_board_id(SM8350) }, 397 { qcom_board_id(QCM2290) }, 398 { qcom_board_id(SM7125) }, 399 { qcom_board_id(SM6115) }, 400 { qcom_board_id(IPQ5010) }, 401 { qcom_board_id(IPQ5018) }, 402 { qcom_board_id(IPQ5028) }, 403 { qcom_board_id(SC8280XP) }, 404 { qcom_board_id(IPQ6005) }, 405 { qcom_board_id(QRB5165) }, 406 { qcom_board_id(SM8450) }, 407 { qcom_board_id(SM7225) }, 408 { qcom_board_id(SA8295P) }, 409 { qcom_board_id(SA8540P) }, 410 { qcom_board_id(QCM4290) }, 411 { qcom_board_id(QCS4290) }, 412 { qcom_board_id(SM7325) }, 413 { qcom_board_id_named(SM8450_2, "SM8450") }, 414 { qcom_board_id_named(SM8450_3, "SM8450") }, 415 { qcom_board_id(SC7280) }, 416 { qcom_board_id(SC7180P) }, 417 { qcom_board_id(QCM6490) }, 418 { qcom_board_id(SM7325P) }, 419 { qcom_board_id(IPQ5000) }, 420 { qcom_board_id(IPQ0509) }, 421 { qcom_board_id(IPQ0518) }, 422 { qcom_board_id(SM6375) }, 423 { qcom_board_id(IPQ9514) }, 424 { qcom_board_id(IPQ9550) }, 425 { qcom_board_id(IPQ9554) }, 426 { qcom_board_id(IPQ9570) }, 427 { qcom_board_id(IPQ9574) }, 428 { qcom_board_id(SM8550) }, 429 { qcom_board_id(IPQ5016) }, 430 { qcom_board_id(IPQ9510) }, 431 { qcom_board_id(QRB4210) }, 432 { qcom_board_id(QRB2210) }, 433 { qcom_board_id(SAR2130P) }, 434 { qcom_board_id(SM8475) }, 435 { qcom_board_id(SM8475P) }, 436 { qcom_board_id(SA8255P) }, 437 { qcom_board_id(SA8775P) }, 438 { qcom_board_id(QRU1000) }, 439 { qcom_board_id(SM8475_2) }, 440 { qcom_board_id(QDU1000) }, 441 { qcom_board_id(X1E80100) }, 442 { qcom_board_id(SM8650) }, 443 { qcom_board_id(SM4450) }, 444 { qcom_board_id(SAR1130P) }, 445 { qcom_board_id(QDU1010) }, 446 { qcom_board_id(QRU1032) }, 447 { qcom_board_id(QRU1052) }, 448 { qcom_board_id(QRU1062) }, 449 { qcom_board_id(IPQ5332) }, 450 { qcom_board_id(IPQ5322) }, 451 { qcom_board_id(IPQ5312) }, 452 { qcom_board_id(IPQ5302) }, 453 { qcom_board_id(QCS8550) }, 454 { qcom_board_id(QCM8550) }, 455 { qcom_board_id(SM8750) }, 456 { qcom_board_id(IPQ5300) }, 457 { qcom_board_id(SM7635) }, 458 { qcom_board_id(SM6650) }, 459 { qcom_board_id(SM6650P) }, 460 { qcom_board_id(IPQ5321) }, 461 { qcom_board_id(IPQ5424) }, 462 { qcom_board_id(QCM6690) }, 463 { qcom_board_id(QCS6690) }, 464 { qcom_board_id(IPQ5404) }, 465 { qcom_board_id(QCS9100) }, 466 { qcom_board_id(QCS8300) }, 467 { qcom_board_id(QCS8275) }, 468 { qcom_board_id(QCS9075) }, 469 { qcom_board_id(QCS615) }, 470 }; 471 472 static const char *socinfo_machine(struct device *dev, unsigned int id) 473 { 474 int idx; 475 476 for (idx = 0; idx < ARRAY_SIZE(soc_id); idx++) { 477 if (soc_id[idx].id == id) 478 return soc_id[idx].name; 479 } 480 481 return NULL; 482 } 483 484 #ifdef CONFIG_DEBUG_FS 485 486 #define QCOM_OPEN(name, _func) \ 487 static int qcom_open_##name(struct inode *inode, struct file *file) \ 488 { \ 489 return single_open(file, _func, inode->i_private); \ 490 } \ 491 \ 492 static const struct file_operations qcom_ ##name## _ops = { \ 493 .open = qcom_open_##name, \ 494 .read = seq_read, \ 495 .llseek = seq_lseek, \ 496 .release = single_release, \ 497 } 498 499 #define DEBUGFS_ADD(info, name) \ 500 debugfs_create_file(__stringify(name), 0444, \ 501 qcom_socinfo->dbg_root, \ 502 info, &qcom_ ##name## _ops) 503 504 505 static int qcom_show_build_id(struct seq_file *seq, void *p) 506 { 507 struct socinfo *socinfo = seq->private; 508 509 seq_printf(seq, "%s\n", socinfo->build_id); 510 511 return 0; 512 } 513 514 static int qcom_show_pmic_model(struct seq_file *seq, void *p) 515 { 516 struct socinfo *socinfo = seq->private; 517 int model = SOCINFO_MINOR(le32_to_cpu(socinfo->pmic_model)); 518 519 if (model < 0) 520 return -EINVAL; 521 522 if (model < ARRAY_SIZE(pmic_models) && pmic_models[model]) 523 seq_printf(seq, "%s\n", pmic_models[model]); 524 else 525 seq_printf(seq, "unknown (%d)\n", model); 526 527 return 0; 528 } 529 530 static int qcom_show_pmic_model_array(struct seq_file *seq, void *p) 531 { 532 struct socinfo *socinfo = seq->private; 533 unsigned int num_pmics = le32_to_cpu(socinfo->num_pmics); 534 unsigned int pmic_array_offset = le32_to_cpu(socinfo->pmic_array_offset); 535 int i; 536 void *ptr = socinfo; 537 538 ptr += pmic_array_offset; 539 540 /* No need for bounds checking, it happened at socinfo_debugfs_init */ 541 for (i = 0; i < num_pmics; i++) { 542 unsigned int model = SOCINFO_MINOR(get_unaligned_le32(ptr + 2 * i * sizeof(u32))); 543 unsigned int die_rev = get_unaligned_le32(ptr + (2 * i + 1) * sizeof(u32)); 544 545 if (model < ARRAY_SIZE(pmic_models) && pmic_models[model]) 546 seq_printf(seq, "%s %u.%u\n", pmic_models[model], 547 SOCINFO_MAJOR(die_rev), 548 SOCINFO_MINOR(die_rev)); 549 else 550 seq_printf(seq, "unknown (%d)\n", model); 551 } 552 553 return 0; 554 } 555 556 static int qcom_show_pmic_die_revision(struct seq_file *seq, void *p) 557 { 558 struct socinfo *socinfo = seq->private; 559 560 seq_printf(seq, "%u.%u\n", 561 SOCINFO_MAJOR(le32_to_cpu(socinfo->pmic_die_rev)), 562 SOCINFO_MINOR(le32_to_cpu(socinfo->pmic_die_rev))); 563 564 return 0; 565 } 566 567 static int qcom_show_chip_id(struct seq_file *seq, void *p) 568 { 569 struct socinfo *socinfo = seq->private; 570 571 seq_printf(seq, "%s\n", socinfo->chip_id); 572 573 return 0; 574 } 575 576 QCOM_OPEN(build_id, qcom_show_build_id); 577 QCOM_OPEN(pmic_model, qcom_show_pmic_model); 578 QCOM_OPEN(pmic_model_array, qcom_show_pmic_model_array); 579 QCOM_OPEN(pmic_die_rev, qcom_show_pmic_die_revision); 580 QCOM_OPEN(chip_id, qcom_show_chip_id); 581 582 #define DEFINE_IMAGE_OPS(type) \ 583 static int show_image_##type(struct seq_file *seq, void *p) \ 584 { \ 585 struct smem_image_version *image_version = seq->private; \ 586 if (image_version->type[0] != '\0') \ 587 seq_printf(seq, "%s\n", image_version->type); \ 588 return 0; \ 589 } \ 590 static int open_image_##type(struct inode *inode, struct file *file) \ 591 { \ 592 return single_open(file, show_image_##type, inode->i_private); \ 593 } \ 594 \ 595 static const struct file_operations qcom_image_##type##_ops = { \ 596 .open = open_image_##type, \ 597 .read = seq_read, \ 598 .llseek = seq_lseek, \ 599 .release = single_release, \ 600 } 601 602 DEFINE_IMAGE_OPS(name); 603 DEFINE_IMAGE_OPS(variant); 604 DEFINE_IMAGE_OPS(oem); 605 606 static void socinfo_debugfs_init(struct qcom_socinfo *qcom_socinfo, 607 struct socinfo *info, size_t info_size) 608 { 609 struct smem_image_version *versions; 610 struct dentry *dentry; 611 size_t size; 612 int i; 613 unsigned int num_pmics; 614 unsigned int pmic_array_offset; 615 616 qcom_socinfo->dbg_root = debugfs_create_dir("qcom_socinfo", NULL); 617 618 qcom_socinfo->info.fmt = __le32_to_cpu(info->fmt); 619 620 debugfs_create_x32("info_fmt", 0444, qcom_socinfo->dbg_root, 621 &qcom_socinfo->info.fmt); 622 623 switch (qcom_socinfo->info.fmt) { 624 case SOCINFO_VERSION(0, 19): 625 qcom_socinfo->info.num_func_clusters = __le32_to_cpu(info->num_func_clusters); 626 qcom_socinfo->info.boot_cluster = __le32_to_cpu(info->boot_cluster); 627 qcom_socinfo->info.boot_core = __le32_to_cpu(info->boot_core); 628 629 debugfs_create_u32("num_func_clusters", 0444, qcom_socinfo->dbg_root, 630 &qcom_socinfo->info.num_func_clusters); 631 debugfs_create_u32("boot_cluster", 0444, qcom_socinfo->dbg_root, 632 &qcom_socinfo->info.boot_cluster); 633 debugfs_create_u32("boot_core", 0444, qcom_socinfo->dbg_root, 634 &qcom_socinfo->info.boot_core); 635 fallthrough; 636 case SOCINFO_VERSION(0, 18): 637 case SOCINFO_VERSION(0, 17): 638 qcom_socinfo->info.oem_variant = __le32_to_cpu(info->oem_variant); 639 debugfs_create_u32("oem_variant", 0444, qcom_socinfo->dbg_root, 640 &qcom_socinfo->info.oem_variant); 641 fallthrough; 642 case SOCINFO_VERSION(0, 16): 643 qcom_socinfo->info.feature_code = __le32_to_cpu(info->feature_code); 644 qcom_socinfo->info.pcode = __le32_to_cpu(info->pcode); 645 646 debugfs_create_u32("feature_code", 0444, qcom_socinfo->dbg_root, 647 &qcom_socinfo->info.feature_code); 648 debugfs_create_u32("pcode", 0444, qcom_socinfo->dbg_root, 649 &qcom_socinfo->info.pcode); 650 fallthrough; 651 case SOCINFO_VERSION(0, 15): 652 qcom_socinfo->info.nmodem_supported = __le32_to_cpu(info->nmodem_supported); 653 654 debugfs_create_u32("nmodem_supported", 0444, qcom_socinfo->dbg_root, 655 &qcom_socinfo->info.nmodem_supported); 656 fallthrough; 657 case SOCINFO_VERSION(0, 14): 658 qcom_socinfo->info.num_clusters = __le32_to_cpu(info->num_clusters); 659 qcom_socinfo->info.ncluster_array_offset = __le32_to_cpu(info->ncluster_array_offset); 660 qcom_socinfo->info.num_subset_parts = __le32_to_cpu(info->num_subset_parts); 661 qcom_socinfo->info.nsubset_parts_array_offset = 662 __le32_to_cpu(info->nsubset_parts_array_offset); 663 664 debugfs_create_u32("num_clusters", 0444, qcom_socinfo->dbg_root, 665 &qcom_socinfo->info.num_clusters); 666 debugfs_create_u32("ncluster_array_offset", 0444, qcom_socinfo->dbg_root, 667 &qcom_socinfo->info.ncluster_array_offset); 668 debugfs_create_u32("num_subset_parts", 0444, qcom_socinfo->dbg_root, 669 &qcom_socinfo->info.num_subset_parts); 670 debugfs_create_u32("nsubset_parts_array_offset", 0444, qcom_socinfo->dbg_root, 671 &qcom_socinfo->info.nsubset_parts_array_offset); 672 fallthrough; 673 case SOCINFO_VERSION(0, 13): 674 qcom_socinfo->info.nproduct_id = __le32_to_cpu(info->nproduct_id); 675 676 debugfs_create_u32("nproduct_id", 0444, qcom_socinfo->dbg_root, 677 &qcom_socinfo->info.nproduct_id); 678 DEBUGFS_ADD(info, chip_id); 679 fallthrough; 680 case SOCINFO_VERSION(0, 12): 681 qcom_socinfo->info.chip_family = 682 __le32_to_cpu(info->chip_family); 683 qcom_socinfo->info.raw_device_family = 684 __le32_to_cpu(info->raw_device_family); 685 qcom_socinfo->info.raw_device_num = 686 __le32_to_cpu(info->raw_device_num); 687 688 debugfs_create_x32("chip_family", 0444, qcom_socinfo->dbg_root, 689 &qcom_socinfo->info.chip_family); 690 debugfs_create_x32("raw_device_family", 0444, 691 qcom_socinfo->dbg_root, 692 &qcom_socinfo->info.raw_device_family); 693 debugfs_create_x32("raw_device_number", 0444, 694 qcom_socinfo->dbg_root, 695 &qcom_socinfo->info.raw_device_num); 696 fallthrough; 697 case SOCINFO_VERSION(0, 11): 698 num_pmics = le32_to_cpu(info->num_pmics); 699 pmic_array_offset = le32_to_cpu(info->pmic_array_offset); 700 if (pmic_array_offset + 2 * num_pmics * sizeof(u32) <= info_size) 701 DEBUGFS_ADD(info, pmic_model_array); 702 fallthrough; 703 case SOCINFO_VERSION(0, 10): 704 case SOCINFO_VERSION(0, 9): 705 qcom_socinfo->info.foundry_id = __le32_to_cpu(info->foundry_id); 706 707 debugfs_create_u32("foundry_id", 0444, qcom_socinfo->dbg_root, 708 &qcom_socinfo->info.foundry_id); 709 fallthrough; 710 case SOCINFO_VERSION(0, 8): 711 case SOCINFO_VERSION(0, 7): 712 DEBUGFS_ADD(info, pmic_model); 713 DEBUGFS_ADD(info, pmic_die_rev); 714 fallthrough; 715 case SOCINFO_VERSION(0, 6): 716 qcom_socinfo->info.hw_plat_subtype = 717 __le32_to_cpu(info->hw_plat_subtype); 718 719 debugfs_create_u32("hardware_platform_subtype", 0444, 720 qcom_socinfo->dbg_root, 721 &qcom_socinfo->info.hw_plat_subtype); 722 fallthrough; 723 case SOCINFO_VERSION(0, 5): 724 qcom_socinfo->info.accessory_chip = 725 __le32_to_cpu(info->accessory_chip); 726 727 debugfs_create_u32("accessory_chip", 0444, 728 qcom_socinfo->dbg_root, 729 &qcom_socinfo->info.accessory_chip); 730 fallthrough; 731 case SOCINFO_VERSION(0, 4): 732 qcom_socinfo->info.plat_ver = __le32_to_cpu(info->plat_ver); 733 734 debugfs_create_u32("platform_version", 0444, 735 qcom_socinfo->dbg_root, 736 &qcom_socinfo->info.plat_ver); 737 fallthrough; 738 case SOCINFO_VERSION(0, 3): 739 qcom_socinfo->info.hw_plat = __le32_to_cpu(info->hw_plat); 740 741 debugfs_create_u32("hardware_platform", 0444, 742 qcom_socinfo->dbg_root, 743 &qcom_socinfo->info.hw_plat); 744 fallthrough; 745 case SOCINFO_VERSION(0, 2): 746 qcom_socinfo->info.raw_ver = __le32_to_cpu(info->raw_ver); 747 748 debugfs_create_u32("raw_version", 0444, qcom_socinfo->dbg_root, 749 &qcom_socinfo->info.raw_ver); 750 fallthrough; 751 case SOCINFO_VERSION(0, 1): 752 DEBUGFS_ADD(info, build_id); 753 break; 754 } 755 756 versions = qcom_smem_get(QCOM_SMEM_HOST_ANY, SMEM_IMAGE_VERSION_TABLE, 757 &size); 758 759 for (i = 0; i < ARRAY_SIZE(socinfo_image_names); i++) { 760 if (!socinfo_image_names[i]) 761 continue; 762 763 dentry = debugfs_create_dir(socinfo_image_names[i], 764 qcom_socinfo->dbg_root); 765 debugfs_create_file("name", 0444, dentry, &versions[i], 766 &qcom_image_name_ops); 767 debugfs_create_file("variant", 0444, dentry, &versions[i], 768 &qcom_image_variant_ops); 769 debugfs_create_file("oem", 0444, dentry, &versions[i], 770 &qcom_image_oem_ops); 771 } 772 } 773 774 static void socinfo_debugfs_exit(struct qcom_socinfo *qcom_socinfo) 775 { 776 debugfs_remove_recursive(qcom_socinfo->dbg_root); 777 } 778 #else 779 static void socinfo_debugfs_init(struct qcom_socinfo *qcom_socinfo, 780 struct socinfo *info, size_t info_size) 781 { 782 } 783 static void socinfo_debugfs_exit(struct qcom_socinfo *qcom_socinfo) { } 784 #endif /* CONFIG_DEBUG_FS */ 785 786 static int qcom_socinfo_probe(struct platform_device *pdev) 787 { 788 struct qcom_socinfo *qs; 789 struct socinfo *info; 790 size_t item_size; 791 792 info = qcom_smem_get(QCOM_SMEM_HOST_ANY, SMEM_HW_SW_BUILD_ID, 793 &item_size); 794 if (IS_ERR(info)) { 795 dev_err(&pdev->dev, "Couldn't find socinfo\n"); 796 return PTR_ERR(info); 797 } 798 799 qs = devm_kzalloc(&pdev->dev, sizeof(*qs), GFP_KERNEL); 800 if (!qs) 801 return -ENOMEM; 802 803 qs->attr.family = "Snapdragon"; 804 qs->attr.machine = socinfo_machine(&pdev->dev, 805 le32_to_cpu(info->id)); 806 qs->attr.soc_id = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%u", 807 le32_to_cpu(info->id)); 808 qs->attr.revision = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%u.%u", 809 SOCINFO_MAJOR(le32_to_cpu(info->ver)), 810 SOCINFO_MINOR(le32_to_cpu(info->ver))); 811 if (!qs->attr.soc_id || !qs->attr.revision) 812 return -ENOMEM; 813 814 if (offsetofend(struct socinfo, serial_num) <= item_size) { 815 qs->attr.serial_number = devm_kasprintf(&pdev->dev, GFP_KERNEL, 816 "%u", 817 le32_to_cpu(info->serial_num)); 818 if (!qs->attr.serial_number) 819 return -ENOMEM; 820 } 821 822 qs->soc_dev = soc_device_register(&qs->attr); 823 if (IS_ERR(qs->soc_dev)) 824 return PTR_ERR(qs->soc_dev); 825 826 socinfo_debugfs_init(qs, info, item_size); 827 828 /* Feed the soc specific unique data into entropy pool */ 829 add_device_randomness(info, item_size); 830 831 platform_set_drvdata(pdev, qs); 832 833 return 0; 834 } 835 836 static void qcom_socinfo_remove(struct platform_device *pdev) 837 { 838 struct qcom_socinfo *qs = platform_get_drvdata(pdev); 839 840 soc_device_unregister(qs->soc_dev); 841 842 socinfo_debugfs_exit(qs); 843 } 844 845 static struct platform_driver qcom_socinfo_driver = { 846 .probe = qcom_socinfo_probe, 847 .remove = qcom_socinfo_remove, 848 .driver = { 849 .name = "qcom-socinfo", 850 }, 851 }; 852 853 module_platform_driver(qcom_socinfo_driver); 854 855 MODULE_DESCRIPTION("Qualcomm SoCinfo driver"); 856 MODULE_LICENSE("GPL v2"); 857 MODULE_ALIAS("platform:qcom-socinfo"); 858