1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (c) 2009-2017, The Linux Foundation. All rights reserved. 4 * Copyright (c) 2017-2019, Linaro Ltd. 5 */ 6 7 #include <linux/debugfs.h> 8 #include <linux/err.h> 9 #include <linux/module.h> 10 #include <linux/platform_device.h> 11 #include <linux/random.h> 12 #include <linux/slab.h> 13 #include <linux/soc/qcom/smem.h> 14 #include <linux/soc/qcom/socinfo.h> 15 #include <linux/string.h> 16 #include <linux/stringify.h> 17 #include <linux/sys_soc.h> 18 #include <linux/types.h> 19 20 #include <asm/unaligned.h> 21 22 #include <dt-bindings/arm/qcom,ids.h> 23 24 /* Helper macros to create soc_id table */ 25 #define qcom_board_id(id) QCOM_ID_ ## id, __stringify(id) 26 #define qcom_board_id_named(id, name) QCOM_ID_ ## id, (name) 27 28 #ifdef CONFIG_DEBUG_FS 29 #define SMEM_IMAGE_VERSION_BLOCKS_COUNT 32 30 #define SMEM_IMAGE_VERSION_SIZE 4096 31 #define SMEM_IMAGE_VERSION_NAME_SIZE 75 32 #define SMEM_IMAGE_VERSION_VARIANT_SIZE 20 33 #define SMEM_IMAGE_VERSION_OEM_SIZE 32 34 35 /* 36 * SMEM Image table indices 37 */ 38 #define SMEM_IMAGE_TABLE_BOOT_INDEX 0 39 #define SMEM_IMAGE_TABLE_TZ_INDEX 1 40 #define SMEM_IMAGE_TABLE_RPM_INDEX 3 41 #define SMEM_IMAGE_TABLE_APPS_INDEX 10 42 #define SMEM_IMAGE_TABLE_MPSS_INDEX 11 43 #define SMEM_IMAGE_TABLE_ADSP_INDEX 12 44 #define SMEM_IMAGE_TABLE_CNSS_INDEX 13 45 #define SMEM_IMAGE_TABLE_VIDEO_INDEX 14 46 #define SMEM_IMAGE_TABLE_DSPS_INDEX 15 47 #define SMEM_IMAGE_TABLE_CDSP_INDEX 16 48 #define SMEM_IMAGE_TABLE_CDSP1_INDEX 19 49 #define SMEM_IMAGE_TABLE_GPDSP_INDEX 20 50 #define SMEM_IMAGE_TABLE_GPDSP1_INDEX 21 51 #define SMEM_IMAGE_VERSION_TABLE 469 52 53 /* 54 * SMEM Image table names 55 */ 56 static const char *const socinfo_image_names[] = { 57 [SMEM_IMAGE_TABLE_ADSP_INDEX] = "adsp", 58 [SMEM_IMAGE_TABLE_APPS_INDEX] = "apps", 59 [SMEM_IMAGE_TABLE_BOOT_INDEX] = "boot", 60 [SMEM_IMAGE_TABLE_CNSS_INDEX] = "cnss", 61 [SMEM_IMAGE_TABLE_MPSS_INDEX] = "mpss", 62 [SMEM_IMAGE_TABLE_RPM_INDEX] = "rpm", 63 [SMEM_IMAGE_TABLE_TZ_INDEX] = "tz", 64 [SMEM_IMAGE_TABLE_VIDEO_INDEX] = "video", 65 [SMEM_IMAGE_TABLE_DSPS_INDEX] = "dsps", 66 [SMEM_IMAGE_TABLE_CDSP_INDEX] = "cdsp", 67 [SMEM_IMAGE_TABLE_CDSP1_INDEX] = "cdsp1", 68 [SMEM_IMAGE_TABLE_GPDSP_INDEX] = "gpdsp", 69 [SMEM_IMAGE_TABLE_GPDSP1_INDEX] = "gpdsp1", 70 }; 71 72 static const char *const pmic_models[] = { 73 [0] = "Unknown PMIC model", 74 [1] = "PM8941", 75 [2] = "PM8841", 76 [3] = "PM8019", 77 [4] = "PM8226", 78 [5] = "PM8110", 79 [6] = "PMA8084", 80 [7] = "PMI8962", 81 [8] = "PMD9635", 82 [9] = "PM8994", 83 [10] = "PMI8994", 84 [11] = "PM8916", 85 [12] = "PM8004", 86 [13] = "PM8909/PM8058", 87 [14] = "PM8028", 88 [15] = "PM8901", 89 [16] = "PM8950/PM8027", 90 [17] = "PMI8950/ISL9519", 91 [18] = "PMK8001/PM8921", 92 [19] = "PMI8996/PM8018", 93 [20] = "PM8998/PM8015", 94 [21] = "PMI8998/PM8014", 95 [22] = "PM8821", 96 [23] = "PM8038", 97 [24] = "PM8005/PM8922", 98 [25] = "PM8917/PM8937", 99 [26] = "PM660L", 100 [27] = "PM660", 101 [30] = "PM8150", 102 [31] = "PM8150L", 103 [32] = "PM8150B", 104 [33] = "PMK8002", 105 [36] = "PM8009", 106 [37] = "PMI632", 107 [38] = "PM8150C", 108 [40] = "PM6150", 109 [41] = "SMB2351", 110 [44] = "PM8008", 111 [45] = "PM6125", 112 [46] = "PM7250B", 113 [47] = "PMK8350", 114 [48] = "PM8350", 115 [49] = "PM8350C", 116 [50] = "PM8350B", 117 [51] = "PMR735A", 118 [52] = "PMR735B", 119 [55] = "PM4125", 120 [58] = "PM8450", 121 [65] = "PM8010", 122 [69] = "PM8550VS", 123 [70] = "PM8550VE", 124 [71] = "PM8550B", 125 [72] = "PMR735D", 126 [73] = "PM8550", 127 [74] = "PMK8550", 128 [82] = "PMC8380", 129 [83] = "SMB2360", 130 }; 131 132 struct socinfo_params { 133 u32 raw_device_family; 134 u32 hw_plat_subtype; 135 u32 accessory_chip; 136 u32 raw_device_num; 137 u32 chip_family; 138 u32 foundry_id; 139 u32 plat_ver; 140 u32 raw_ver; 141 u32 hw_plat; 142 u32 fmt; 143 u32 nproduct_id; 144 u32 num_clusters; 145 u32 ncluster_array_offset; 146 u32 num_subset_parts; 147 u32 nsubset_parts_array_offset; 148 u32 nmodem_supported; 149 u32 feature_code; 150 u32 pcode; 151 u32 oem_variant; 152 u32 num_func_clusters; 153 u32 boot_cluster; 154 u32 boot_core; 155 }; 156 157 struct smem_image_version { 158 char name[SMEM_IMAGE_VERSION_NAME_SIZE]; 159 char variant[SMEM_IMAGE_VERSION_VARIANT_SIZE]; 160 char pad; 161 char oem[SMEM_IMAGE_VERSION_OEM_SIZE]; 162 }; 163 #endif /* CONFIG_DEBUG_FS */ 164 165 struct qcom_socinfo { 166 struct soc_device *soc_dev; 167 struct soc_device_attribute attr; 168 #ifdef CONFIG_DEBUG_FS 169 struct dentry *dbg_root; 170 struct socinfo_params info; 171 #endif /* CONFIG_DEBUG_FS */ 172 }; 173 174 struct soc_id { 175 unsigned int id; 176 const char *name; 177 }; 178 179 static const struct soc_id soc_id[] = { 180 { qcom_board_id(MSM8260) }, 181 { qcom_board_id(MSM8660) }, 182 { qcom_board_id(APQ8060) }, 183 { qcom_board_id(MSM8960) }, 184 { qcom_board_id(APQ8064) }, 185 { qcom_board_id(MSM8930) }, 186 { qcom_board_id(MSM8630) }, 187 { qcom_board_id(MSM8230) }, 188 { qcom_board_id(APQ8030) }, 189 { qcom_board_id(MSM8627) }, 190 { qcom_board_id(MSM8227) }, 191 { qcom_board_id(MSM8660A) }, 192 { qcom_board_id(MSM8260A) }, 193 { qcom_board_id(APQ8060A) }, 194 { qcom_board_id(MSM8974) }, 195 { qcom_board_id(MSM8225) }, 196 { qcom_board_id(MSM8625) }, 197 { qcom_board_id(MPQ8064) }, 198 { qcom_board_id(MSM8960AB) }, 199 { qcom_board_id(APQ8060AB) }, 200 { qcom_board_id(MSM8260AB) }, 201 { qcom_board_id(MSM8660AB) }, 202 { qcom_board_id(MSM8930AA) }, 203 { qcom_board_id(MSM8630AA) }, 204 { qcom_board_id(MSM8230AA) }, 205 { qcom_board_id(MSM8626) }, 206 { qcom_board_id(MSM8610) }, 207 { qcom_board_id(APQ8064AB) }, 208 { qcom_board_id(MSM8930AB) }, 209 { qcom_board_id(MSM8630AB) }, 210 { qcom_board_id(MSM8230AB) }, 211 { qcom_board_id(APQ8030AB) }, 212 { qcom_board_id(MSM8226) }, 213 { qcom_board_id(MSM8526) }, 214 { qcom_board_id(APQ8030AA) }, 215 { qcom_board_id(MSM8110) }, 216 { qcom_board_id(MSM8210) }, 217 { qcom_board_id(MSM8810) }, 218 { qcom_board_id(MSM8212) }, 219 { qcom_board_id(MSM8612) }, 220 { qcom_board_id(MSM8112) }, 221 { qcom_board_id(MSM8125) }, 222 { qcom_board_id(MSM8225Q) }, 223 { qcom_board_id(MSM8625Q) }, 224 { qcom_board_id(MSM8125Q) }, 225 { qcom_board_id(APQ8064AA) }, 226 { qcom_board_id(APQ8084) }, 227 { qcom_board_id(MSM8130) }, 228 { qcom_board_id(MSM8130AA) }, 229 { qcom_board_id(MSM8130AB) }, 230 { qcom_board_id(MSM8627AA) }, 231 { qcom_board_id(MSM8227AA) }, 232 { qcom_board_id(APQ8074) }, 233 { qcom_board_id(MSM8274) }, 234 { qcom_board_id(MSM8674) }, 235 { qcom_board_id(MDM9635) }, 236 { qcom_board_id_named(MSM8974PRO_AC, "MSM8974PRO-AC") }, 237 { qcom_board_id(MSM8126) }, 238 { qcom_board_id(APQ8026) }, 239 { qcom_board_id(MSM8926) }, 240 { qcom_board_id(IPQ8062) }, 241 { qcom_board_id(IPQ8064) }, 242 { qcom_board_id(IPQ8066) }, 243 { qcom_board_id(IPQ8068) }, 244 { qcom_board_id(MSM8326) }, 245 { qcom_board_id(MSM8916) }, 246 { qcom_board_id(MSM8994) }, 247 { qcom_board_id_named(APQ8074PRO_AA, "APQ8074PRO-AA") }, 248 { qcom_board_id_named(APQ8074PRO_AB, "APQ8074PRO-AB") }, 249 { qcom_board_id_named(APQ8074PRO_AC, "APQ8074PRO-AC") }, 250 { qcom_board_id_named(MSM8274PRO_AA, "MSM8274PRO-AA") }, 251 { qcom_board_id_named(MSM8274PRO_AB, "MSM8274PRO-AB") }, 252 { qcom_board_id_named(MSM8274PRO_AC, "MSM8274PRO-AC") }, 253 { qcom_board_id_named(MSM8674PRO_AA, "MSM8674PRO-AA") }, 254 { qcom_board_id_named(MSM8674PRO_AB, "MSM8674PRO-AB") }, 255 { qcom_board_id_named(MSM8674PRO_AC, "MSM8674PRO-AC") }, 256 { qcom_board_id_named(MSM8974PRO_AA, "MSM8974PRO-AA") }, 257 { qcom_board_id_named(MSM8974PRO_AB, "MSM8974PRO-AB") }, 258 { qcom_board_id(APQ8028) }, 259 { qcom_board_id(MSM8128) }, 260 { qcom_board_id(MSM8228) }, 261 { qcom_board_id(MSM8528) }, 262 { qcom_board_id(MSM8628) }, 263 { qcom_board_id(MSM8928) }, 264 { qcom_board_id(MSM8510) }, 265 { qcom_board_id(MSM8512) }, 266 { qcom_board_id(MSM8936) }, 267 { qcom_board_id(MDM9640) }, 268 { qcom_board_id(MSM8939) }, 269 { qcom_board_id(APQ8036) }, 270 { qcom_board_id(APQ8039) }, 271 { qcom_board_id(MSM8236) }, 272 { qcom_board_id(MSM8636) }, 273 { qcom_board_id(MSM8909) }, 274 { qcom_board_id(MSM8996) }, 275 { qcom_board_id(APQ8016) }, 276 { qcom_board_id(MSM8216) }, 277 { qcom_board_id(MSM8116) }, 278 { qcom_board_id(MSM8616) }, 279 { qcom_board_id(MSM8992) }, 280 { qcom_board_id(APQ8092) }, 281 { qcom_board_id(APQ8094) }, 282 { qcom_board_id(MSM8209) }, 283 { qcom_board_id(MSM8208) }, 284 { qcom_board_id(MDM9209) }, 285 { qcom_board_id(MDM9309) }, 286 { qcom_board_id(MDM9609) }, 287 { qcom_board_id(MSM8239) }, 288 { qcom_board_id(MSM8952) }, 289 { qcom_board_id(APQ8009) }, 290 { qcom_board_id(MSM8956) }, 291 { qcom_board_id(MSM8929) }, 292 { qcom_board_id(MSM8629) }, 293 { qcom_board_id(MSM8229) }, 294 { qcom_board_id(APQ8029) }, 295 { qcom_board_id(APQ8056) }, 296 { qcom_board_id(MSM8609) }, 297 { qcom_board_id(APQ8076) }, 298 { qcom_board_id(MSM8976) }, 299 { qcom_board_id(IPQ8065) }, 300 { qcom_board_id(IPQ8069) }, 301 { qcom_board_id(MDM9650) }, 302 { qcom_board_id(MDM9655) }, 303 { qcom_board_id(MDM9250) }, 304 { qcom_board_id(MDM9255) }, 305 { qcom_board_id(MDM9350) }, 306 { qcom_board_id(APQ8052) }, 307 { qcom_board_id(MDM9607) }, 308 { qcom_board_id(APQ8096) }, 309 { qcom_board_id(MSM8998) }, 310 { qcom_board_id(MSM8953) }, 311 { qcom_board_id(MSM8937) }, 312 { qcom_board_id(APQ8037) }, 313 { qcom_board_id(MDM8207) }, 314 { qcom_board_id(MDM9207) }, 315 { qcom_board_id(MDM9307) }, 316 { qcom_board_id(MDM9628) }, 317 { qcom_board_id(MSM8909W) }, 318 { qcom_board_id(APQ8009W) }, 319 { qcom_board_id(MSM8996L) }, 320 { qcom_board_id(MSM8917) }, 321 { qcom_board_id(APQ8053) }, 322 { qcom_board_id(MSM8996SG) }, 323 { qcom_board_id(APQ8017) }, 324 { qcom_board_id(MSM8217) }, 325 { qcom_board_id(MSM8617) }, 326 { qcom_board_id(MSM8996AU) }, 327 { qcom_board_id(APQ8096AU) }, 328 { qcom_board_id(APQ8096SG) }, 329 { qcom_board_id(MSM8940) }, 330 { qcom_board_id(SDX201) }, 331 { qcom_board_id(SDM660) }, 332 { qcom_board_id(SDM630) }, 333 { qcom_board_id(APQ8098) }, 334 { qcom_board_id(MSM8920) }, 335 { qcom_board_id(SDM845) }, 336 { qcom_board_id(MDM9206) }, 337 { qcom_board_id(IPQ8074) }, 338 { qcom_board_id(SDA660) }, 339 { qcom_board_id(SDM658) }, 340 { qcom_board_id(SDA658) }, 341 { qcom_board_id(SDA630) }, 342 { qcom_board_id(MSM8905) }, 343 { qcom_board_id(SDX202) }, 344 { qcom_board_id(SDM670) }, 345 { qcom_board_id(SDM450) }, 346 { qcom_board_id(SM8150) }, 347 { qcom_board_id(SDA845) }, 348 { qcom_board_id(IPQ8072) }, 349 { qcom_board_id(IPQ8076) }, 350 { qcom_board_id(IPQ8078) }, 351 { qcom_board_id(SDM636) }, 352 { qcom_board_id(SDA636) }, 353 { qcom_board_id(SDM632) }, 354 { qcom_board_id(SDA632) }, 355 { qcom_board_id(SDA450) }, 356 { qcom_board_id(SDM439) }, 357 { qcom_board_id(SDM429) }, 358 { qcom_board_id(SM8250) }, 359 { qcom_board_id(SA8155) }, 360 { qcom_board_id(SDA439) }, 361 { qcom_board_id(SDA429) }, 362 { qcom_board_id(SM7150) }, 363 { qcom_board_id(SM7150P) }, 364 { qcom_board_id(IPQ8070) }, 365 { qcom_board_id(IPQ8071) }, 366 { qcom_board_id(QM215) }, 367 { qcom_board_id(IPQ8072A) }, 368 { qcom_board_id(IPQ8074A) }, 369 { qcom_board_id(IPQ8076A) }, 370 { qcom_board_id(IPQ8078A) }, 371 { qcom_board_id(SM6125) }, 372 { qcom_board_id(IPQ8070A) }, 373 { qcom_board_id(IPQ8071A) }, 374 { qcom_board_id(IPQ8172) }, 375 { qcom_board_id(IPQ8173) }, 376 { qcom_board_id(IPQ8174) }, 377 { qcom_board_id(IPQ6018) }, 378 { qcom_board_id(IPQ6028) }, 379 { qcom_board_id(SDM429W) }, 380 { qcom_board_id(SM4250) }, 381 { qcom_board_id(IPQ6000) }, 382 { qcom_board_id(IPQ6010) }, 383 { qcom_board_id(SC7180) }, 384 { qcom_board_id(SM6350) }, 385 { qcom_board_id(QCM2150) }, 386 { qcom_board_id(SDA429W) }, 387 { qcom_board_id(SM8350) }, 388 { qcom_board_id(QCM2290) }, 389 { qcom_board_id(SM7125) }, 390 { qcom_board_id(SM6115) }, 391 { qcom_board_id(IPQ5010) }, 392 { qcom_board_id(IPQ5018) }, 393 { qcom_board_id(IPQ5028) }, 394 { qcom_board_id(SC8280XP) }, 395 { qcom_board_id(IPQ6005) }, 396 { qcom_board_id(QRB5165) }, 397 { qcom_board_id(SM8450) }, 398 { qcom_board_id(SM7225) }, 399 { qcom_board_id(SA8295P) }, 400 { qcom_board_id(SA8540P) }, 401 { qcom_board_id(QCM4290) }, 402 { qcom_board_id(QCS4290) }, 403 { qcom_board_id_named(SM8450_2, "SM8450") }, 404 { qcom_board_id_named(SM8450_3, "SM8450") }, 405 { qcom_board_id(SC7280) }, 406 { qcom_board_id(SC7180P) }, 407 { qcom_board_id(QCM6490) }, 408 { qcom_board_id(IPQ5000) }, 409 { qcom_board_id(IPQ0509) }, 410 { qcom_board_id(IPQ0518) }, 411 { qcom_board_id(SM6375) }, 412 { qcom_board_id(IPQ9514) }, 413 { qcom_board_id(IPQ9550) }, 414 { qcom_board_id(IPQ9554) }, 415 { qcom_board_id(IPQ9570) }, 416 { qcom_board_id(IPQ9574) }, 417 { qcom_board_id(SM8550) }, 418 { qcom_board_id(IPQ5016) }, 419 { qcom_board_id(IPQ9510) }, 420 { qcom_board_id(QRB4210) }, 421 { qcom_board_id(QRB2210) }, 422 { qcom_board_id(SM8475) }, 423 { qcom_board_id(SM8475P) }, 424 { qcom_board_id(SA8775P) }, 425 { qcom_board_id(QRU1000) }, 426 { qcom_board_id(SM8475_2) }, 427 { qcom_board_id(QDU1000) }, 428 { qcom_board_id(X1E80100) }, 429 { qcom_board_id(SM8650) }, 430 { qcom_board_id(SM4450) }, 431 { qcom_board_id(QDU1010) }, 432 { qcom_board_id(QRU1032) }, 433 { qcom_board_id(QRU1052) }, 434 { qcom_board_id(QRU1062) }, 435 { qcom_board_id(IPQ5332) }, 436 { qcom_board_id(IPQ5322) }, 437 { qcom_board_id(IPQ5312) }, 438 { qcom_board_id(IPQ5302) }, 439 { qcom_board_id(QCS8550) }, 440 { qcom_board_id(QCM8550) }, 441 { qcom_board_id(IPQ5300) }, 442 { qcom_board_id(IPQ5321) }, 443 }; 444 445 static const char *socinfo_machine(struct device *dev, unsigned int id) 446 { 447 int idx; 448 449 for (idx = 0; idx < ARRAY_SIZE(soc_id); idx++) { 450 if (soc_id[idx].id == id) 451 return soc_id[idx].name; 452 } 453 454 return NULL; 455 } 456 457 #ifdef CONFIG_DEBUG_FS 458 459 #define QCOM_OPEN(name, _func) \ 460 static int qcom_open_##name(struct inode *inode, struct file *file) \ 461 { \ 462 return single_open(file, _func, inode->i_private); \ 463 } \ 464 \ 465 static const struct file_operations qcom_ ##name## _ops = { \ 466 .open = qcom_open_##name, \ 467 .read = seq_read, \ 468 .llseek = seq_lseek, \ 469 .release = single_release, \ 470 } 471 472 #define DEBUGFS_ADD(info, name) \ 473 debugfs_create_file(__stringify(name), 0444, \ 474 qcom_socinfo->dbg_root, \ 475 info, &qcom_ ##name## _ops) 476 477 478 static int qcom_show_build_id(struct seq_file *seq, void *p) 479 { 480 struct socinfo *socinfo = seq->private; 481 482 seq_printf(seq, "%s\n", socinfo->build_id); 483 484 return 0; 485 } 486 487 static int qcom_show_pmic_model(struct seq_file *seq, void *p) 488 { 489 struct socinfo *socinfo = seq->private; 490 int model = SOCINFO_MINOR(le32_to_cpu(socinfo->pmic_model)); 491 492 if (model < 0) 493 return -EINVAL; 494 495 if (model < ARRAY_SIZE(pmic_models) && pmic_models[model]) 496 seq_printf(seq, "%s\n", pmic_models[model]); 497 else 498 seq_printf(seq, "unknown (%d)\n", model); 499 500 return 0; 501 } 502 503 static int qcom_show_pmic_model_array(struct seq_file *seq, void *p) 504 { 505 struct socinfo *socinfo = seq->private; 506 unsigned int num_pmics = le32_to_cpu(socinfo->num_pmics); 507 unsigned int pmic_array_offset = le32_to_cpu(socinfo->pmic_array_offset); 508 int i; 509 void *ptr = socinfo; 510 511 ptr += pmic_array_offset; 512 513 /* No need for bounds checking, it happened at socinfo_debugfs_init */ 514 for (i = 0; i < num_pmics; i++) { 515 unsigned int model = SOCINFO_MINOR(get_unaligned_le32(ptr + 2 * i * sizeof(u32))); 516 unsigned int die_rev = get_unaligned_le32(ptr + (2 * i + 1) * sizeof(u32)); 517 518 if (model < ARRAY_SIZE(pmic_models) && pmic_models[model]) 519 seq_printf(seq, "%s %u.%u\n", pmic_models[model], 520 SOCINFO_MAJOR(die_rev), 521 SOCINFO_MINOR(die_rev)); 522 else 523 seq_printf(seq, "unknown (%d)\n", model); 524 } 525 526 return 0; 527 } 528 529 static int qcom_show_pmic_die_revision(struct seq_file *seq, void *p) 530 { 531 struct socinfo *socinfo = seq->private; 532 533 seq_printf(seq, "%u.%u\n", 534 SOCINFO_MAJOR(le32_to_cpu(socinfo->pmic_die_rev)), 535 SOCINFO_MINOR(le32_to_cpu(socinfo->pmic_die_rev))); 536 537 return 0; 538 } 539 540 static int qcom_show_chip_id(struct seq_file *seq, void *p) 541 { 542 struct socinfo *socinfo = seq->private; 543 544 seq_printf(seq, "%s\n", socinfo->chip_id); 545 546 return 0; 547 } 548 549 QCOM_OPEN(build_id, qcom_show_build_id); 550 QCOM_OPEN(pmic_model, qcom_show_pmic_model); 551 QCOM_OPEN(pmic_model_array, qcom_show_pmic_model_array); 552 QCOM_OPEN(pmic_die_rev, qcom_show_pmic_die_revision); 553 QCOM_OPEN(chip_id, qcom_show_chip_id); 554 555 #define DEFINE_IMAGE_OPS(type) \ 556 static int show_image_##type(struct seq_file *seq, void *p) \ 557 { \ 558 struct smem_image_version *image_version = seq->private; \ 559 if (image_version->type[0] != '\0') \ 560 seq_printf(seq, "%s\n", image_version->type); \ 561 return 0; \ 562 } \ 563 static int open_image_##type(struct inode *inode, struct file *file) \ 564 { \ 565 return single_open(file, show_image_##type, inode->i_private); \ 566 } \ 567 \ 568 static const struct file_operations qcom_image_##type##_ops = { \ 569 .open = open_image_##type, \ 570 .read = seq_read, \ 571 .llseek = seq_lseek, \ 572 .release = single_release, \ 573 } 574 575 DEFINE_IMAGE_OPS(name); 576 DEFINE_IMAGE_OPS(variant); 577 DEFINE_IMAGE_OPS(oem); 578 579 static void socinfo_debugfs_init(struct qcom_socinfo *qcom_socinfo, 580 struct socinfo *info, size_t info_size) 581 { 582 struct smem_image_version *versions; 583 struct dentry *dentry; 584 size_t size; 585 int i; 586 unsigned int num_pmics; 587 unsigned int pmic_array_offset; 588 589 qcom_socinfo->dbg_root = debugfs_create_dir("qcom_socinfo", NULL); 590 591 qcom_socinfo->info.fmt = __le32_to_cpu(info->fmt); 592 593 debugfs_create_x32("info_fmt", 0444, qcom_socinfo->dbg_root, 594 &qcom_socinfo->info.fmt); 595 596 switch (qcom_socinfo->info.fmt) { 597 case SOCINFO_VERSION(0, 19): 598 qcom_socinfo->info.num_func_clusters = __le32_to_cpu(info->num_func_clusters); 599 qcom_socinfo->info.boot_cluster = __le32_to_cpu(info->boot_cluster); 600 qcom_socinfo->info.boot_core = __le32_to_cpu(info->boot_core); 601 602 debugfs_create_u32("num_func_clusters", 0444, qcom_socinfo->dbg_root, 603 &qcom_socinfo->info.num_func_clusters); 604 debugfs_create_u32("boot_cluster", 0444, qcom_socinfo->dbg_root, 605 &qcom_socinfo->info.boot_cluster); 606 debugfs_create_u32("boot_core", 0444, qcom_socinfo->dbg_root, 607 &qcom_socinfo->info.boot_core); 608 fallthrough; 609 case SOCINFO_VERSION(0, 18): 610 case SOCINFO_VERSION(0, 17): 611 qcom_socinfo->info.oem_variant = __le32_to_cpu(info->oem_variant); 612 debugfs_create_u32("oem_variant", 0444, qcom_socinfo->dbg_root, 613 &qcom_socinfo->info.oem_variant); 614 fallthrough; 615 case SOCINFO_VERSION(0, 16): 616 qcom_socinfo->info.feature_code = __le32_to_cpu(info->feature_code); 617 qcom_socinfo->info.pcode = __le32_to_cpu(info->pcode); 618 619 debugfs_create_u32("feature_code", 0444, qcom_socinfo->dbg_root, 620 &qcom_socinfo->info.feature_code); 621 debugfs_create_u32("pcode", 0444, qcom_socinfo->dbg_root, 622 &qcom_socinfo->info.pcode); 623 fallthrough; 624 case SOCINFO_VERSION(0, 15): 625 qcom_socinfo->info.nmodem_supported = __le32_to_cpu(info->nmodem_supported); 626 627 debugfs_create_u32("nmodem_supported", 0444, qcom_socinfo->dbg_root, 628 &qcom_socinfo->info.nmodem_supported); 629 fallthrough; 630 case SOCINFO_VERSION(0, 14): 631 qcom_socinfo->info.num_clusters = __le32_to_cpu(info->num_clusters); 632 qcom_socinfo->info.ncluster_array_offset = __le32_to_cpu(info->ncluster_array_offset); 633 qcom_socinfo->info.num_subset_parts = __le32_to_cpu(info->num_subset_parts); 634 qcom_socinfo->info.nsubset_parts_array_offset = 635 __le32_to_cpu(info->nsubset_parts_array_offset); 636 637 debugfs_create_u32("num_clusters", 0444, qcom_socinfo->dbg_root, 638 &qcom_socinfo->info.num_clusters); 639 debugfs_create_u32("ncluster_array_offset", 0444, qcom_socinfo->dbg_root, 640 &qcom_socinfo->info.ncluster_array_offset); 641 debugfs_create_u32("num_subset_parts", 0444, qcom_socinfo->dbg_root, 642 &qcom_socinfo->info.num_subset_parts); 643 debugfs_create_u32("nsubset_parts_array_offset", 0444, qcom_socinfo->dbg_root, 644 &qcom_socinfo->info.nsubset_parts_array_offset); 645 fallthrough; 646 case SOCINFO_VERSION(0, 13): 647 qcom_socinfo->info.nproduct_id = __le32_to_cpu(info->nproduct_id); 648 649 debugfs_create_u32("nproduct_id", 0444, qcom_socinfo->dbg_root, 650 &qcom_socinfo->info.nproduct_id); 651 DEBUGFS_ADD(info, chip_id); 652 fallthrough; 653 case SOCINFO_VERSION(0, 12): 654 qcom_socinfo->info.chip_family = 655 __le32_to_cpu(info->chip_family); 656 qcom_socinfo->info.raw_device_family = 657 __le32_to_cpu(info->raw_device_family); 658 qcom_socinfo->info.raw_device_num = 659 __le32_to_cpu(info->raw_device_num); 660 661 debugfs_create_x32("chip_family", 0444, qcom_socinfo->dbg_root, 662 &qcom_socinfo->info.chip_family); 663 debugfs_create_x32("raw_device_family", 0444, 664 qcom_socinfo->dbg_root, 665 &qcom_socinfo->info.raw_device_family); 666 debugfs_create_x32("raw_device_number", 0444, 667 qcom_socinfo->dbg_root, 668 &qcom_socinfo->info.raw_device_num); 669 fallthrough; 670 case SOCINFO_VERSION(0, 11): 671 num_pmics = le32_to_cpu(info->num_pmics); 672 pmic_array_offset = le32_to_cpu(info->pmic_array_offset); 673 if (pmic_array_offset + 2 * num_pmics * sizeof(u32) <= info_size) 674 DEBUGFS_ADD(info, pmic_model_array); 675 fallthrough; 676 case SOCINFO_VERSION(0, 10): 677 case SOCINFO_VERSION(0, 9): 678 qcom_socinfo->info.foundry_id = __le32_to_cpu(info->foundry_id); 679 680 debugfs_create_u32("foundry_id", 0444, qcom_socinfo->dbg_root, 681 &qcom_socinfo->info.foundry_id); 682 fallthrough; 683 case SOCINFO_VERSION(0, 8): 684 case SOCINFO_VERSION(0, 7): 685 DEBUGFS_ADD(info, pmic_model); 686 DEBUGFS_ADD(info, pmic_die_rev); 687 fallthrough; 688 case SOCINFO_VERSION(0, 6): 689 qcom_socinfo->info.hw_plat_subtype = 690 __le32_to_cpu(info->hw_plat_subtype); 691 692 debugfs_create_u32("hardware_platform_subtype", 0444, 693 qcom_socinfo->dbg_root, 694 &qcom_socinfo->info.hw_plat_subtype); 695 fallthrough; 696 case SOCINFO_VERSION(0, 5): 697 qcom_socinfo->info.accessory_chip = 698 __le32_to_cpu(info->accessory_chip); 699 700 debugfs_create_u32("accessory_chip", 0444, 701 qcom_socinfo->dbg_root, 702 &qcom_socinfo->info.accessory_chip); 703 fallthrough; 704 case SOCINFO_VERSION(0, 4): 705 qcom_socinfo->info.plat_ver = __le32_to_cpu(info->plat_ver); 706 707 debugfs_create_u32("platform_version", 0444, 708 qcom_socinfo->dbg_root, 709 &qcom_socinfo->info.plat_ver); 710 fallthrough; 711 case SOCINFO_VERSION(0, 3): 712 qcom_socinfo->info.hw_plat = __le32_to_cpu(info->hw_plat); 713 714 debugfs_create_u32("hardware_platform", 0444, 715 qcom_socinfo->dbg_root, 716 &qcom_socinfo->info.hw_plat); 717 fallthrough; 718 case SOCINFO_VERSION(0, 2): 719 qcom_socinfo->info.raw_ver = __le32_to_cpu(info->raw_ver); 720 721 debugfs_create_u32("raw_version", 0444, qcom_socinfo->dbg_root, 722 &qcom_socinfo->info.raw_ver); 723 fallthrough; 724 case SOCINFO_VERSION(0, 1): 725 DEBUGFS_ADD(info, build_id); 726 break; 727 } 728 729 versions = qcom_smem_get(QCOM_SMEM_HOST_ANY, SMEM_IMAGE_VERSION_TABLE, 730 &size); 731 732 for (i = 0; i < ARRAY_SIZE(socinfo_image_names); i++) { 733 if (!socinfo_image_names[i]) 734 continue; 735 736 dentry = debugfs_create_dir(socinfo_image_names[i], 737 qcom_socinfo->dbg_root); 738 debugfs_create_file("name", 0444, dentry, &versions[i], 739 &qcom_image_name_ops); 740 debugfs_create_file("variant", 0444, dentry, &versions[i], 741 &qcom_image_variant_ops); 742 debugfs_create_file("oem", 0444, dentry, &versions[i], 743 &qcom_image_oem_ops); 744 } 745 } 746 747 static void socinfo_debugfs_exit(struct qcom_socinfo *qcom_socinfo) 748 { 749 debugfs_remove_recursive(qcom_socinfo->dbg_root); 750 } 751 #else 752 static void socinfo_debugfs_init(struct qcom_socinfo *qcom_socinfo, 753 struct socinfo *info, size_t info_size) 754 { 755 } 756 static void socinfo_debugfs_exit(struct qcom_socinfo *qcom_socinfo) { } 757 #endif /* CONFIG_DEBUG_FS */ 758 759 static int qcom_socinfo_probe(struct platform_device *pdev) 760 { 761 struct qcom_socinfo *qs; 762 struct socinfo *info; 763 size_t item_size; 764 765 info = qcom_smem_get(QCOM_SMEM_HOST_ANY, SMEM_HW_SW_BUILD_ID, 766 &item_size); 767 if (IS_ERR(info)) { 768 dev_err(&pdev->dev, "Couldn't find socinfo\n"); 769 return PTR_ERR(info); 770 } 771 772 qs = devm_kzalloc(&pdev->dev, sizeof(*qs), GFP_KERNEL); 773 if (!qs) 774 return -ENOMEM; 775 776 qs->attr.family = "Snapdragon"; 777 qs->attr.machine = socinfo_machine(&pdev->dev, 778 le32_to_cpu(info->id)); 779 qs->attr.soc_id = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%u", 780 le32_to_cpu(info->id)); 781 qs->attr.revision = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%u.%u", 782 SOCINFO_MAJOR(le32_to_cpu(info->ver)), 783 SOCINFO_MINOR(le32_to_cpu(info->ver))); 784 if (offsetof(struct socinfo, serial_num) <= item_size) 785 qs->attr.serial_number = devm_kasprintf(&pdev->dev, GFP_KERNEL, 786 "%u", 787 le32_to_cpu(info->serial_num)); 788 789 qs->soc_dev = soc_device_register(&qs->attr); 790 if (IS_ERR(qs->soc_dev)) 791 return PTR_ERR(qs->soc_dev); 792 793 socinfo_debugfs_init(qs, info, item_size); 794 795 /* Feed the soc specific unique data into entropy pool */ 796 add_device_randomness(info, item_size); 797 798 platform_set_drvdata(pdev, qs); 799 800 return 0; 801 } 802 803 static void qcom_socinfo_remove(struct platform_device *pdev) 804 { 805 struct qcom_socinfo *qs = platform_get_drvdata(pdev); 806 807 soc_device_unregister(qs->soc_dev); 808 809 socinfo_debugfs_exit(qs); 810 } 811 812 static struct platform_driver qcom_socinfo_driver = { 813 .probe = qcom_socinfo_probe, 814 .remove_new = qcom_socinfo_remove, 815 .driver = { 816 .name = "qcom-socinfo", 817 }, 818 }; 819 820 module_platform_driver(qcom_socinfo_driver); 821 822 MODULE_DESCRIPTION("Qualcomm SoCinfo driver"); 823 MODULE_LICENSE("GPL v2"); 824 MODULE_ALIAS("platform:qcom-socinfo"); 825