1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (c) 2009-2017, The Linux Foundation. All rights reserved. 4 * Copyright (c) 2017-2019, Linaro Ltd. 5 */ 6 7 #include <linux/debugfs.h> 8 #include <linux/err.h> 9 #include <linux/module.h> 10 #include <linux/platform_device.h> 11 #include <linux/random.h> 12 #include <linux/slab.h> 13 #include <linux/soc/qcom/smem.h> 14 #include <linux/soc/qcom/socinfo.h> 15 #include <linux/string.h> 16 #include <linux/stringify.h> 17 #include <linux/sys_soc.h> 18 #include <linux/types.h> 19 20 #include <linux/unaligned.h> 21 22 #include <dt-bindings/arm/qcom,ids.h> 23 24 /* Helper macros to create soc_id table */ 25 #define qcom_board_id(id) QCOM_ID_ ## id, __stringify(id) 26 #define qcom_board_id_named(id, name) QCOM_ID_ ## id, (name) 27 28 #ifdef CONFIG_DEBUG_FS 29 #define SMEM_IMAGE_VERSION_BLOCKS_COUNT 32 30 #define SMEM_IMAGE_VERSION_SIZE 4096 31 #define SMEM_IMAGE_VERSION_NAME_SIZE 75 32 #define SMEM_IMAGE_VERSION_VARIANT_SIZE 20 33 #define SMEM_IMAGE_VERSION_OEM_SIZE 32 34 35 /* 36 * SMEM Image table indices 37 */ 38 #define SMEM_IMAGE_TABLE_BOOT_INDEX 0 39 #define SMEM_IMAGE_TABLE_TZ_INDEX 1 40 #define SMEM_IMAGE_TABLE_TZSECAPP_INDEX 2 41 #define SMEM_IMAGE_TABLE_RPM_INDEX 3 42 #define SMEM_IMAGE_TABLE_SDI_INDEX 4 43 #define SMEM_IMAGE_TABLE_HYP_INDEX 5 44 #define SMEM_IMAGE_TABLE_ADSP1_INDEX 6 45 #define SMEM_IMAGE_TABLE_ADSP2_INDEX 7 46 #define SMEM_IMAGE_TABLE_CDSP2_INDEX 8 47 #define SMEM_IMAGE_TABLE_APPSBL_INDEX 9 48 #define SMEM_IMAGE_TABLE_APPS_INDEX 10 49 #define SMEM_IMAGE_TABLE_MPSS_INDEX 11 50 #define SMEM_IMAGE_TABLE_ADSP_INDEX 12 51 #define SMEM_IMAGE_TABLE_CNSS_INDEX 13 52 #define SMEM_IMAGE_TABLE_VIDEO_INDEX 14 53 #define SMEM_IMAGE_TABLE_DSPS_INDEX 15 54 #define SMEM_IMAGE_TABLE_CDSP_INDEX 16 55 #define SMEM_IMAGE_TABLE_NPU_INDEX 17 56 #define SMEM_IMAGE_TABLE_WPSS_INDEX 18 57 #define SMEM_IMAGE_TABLE_CDSP1_INDEX 19 58 #define SMEM_IMAGE_TABLE_GPDSP_INDEX 20 59 #define SMEM_IMAGE_TABLE_GPDSP1_INDEX 21 60 #define SMEM_IMAGE_TABLE_SENSORPD_INDEX 22 61 #define SMEM_IMAGE_TABLE_AUDIOPD_INDEX 23 62 #define SMEM_IMAGE_TABLE_OEMPD_INDEX 24 63 #define SMEM_IMAGE_TABLE_CHARGERPD_INDEX 25 64 #define SMEM_IMAGE_TABLE_OISPD_INDEX 26 65 #define SMEM_IMAGE_TABLE_SOCCP_INDEX 27 66 #define SMEM_IMAGE_TABLE_TME_INDEX 28 67 #define SMEM_IMAGE_TABLE_GEARVM_INDEX 29 68 #define SMEM_IMAGE_TABLE_UEFI_INDEX 30 69 #define SMEM_IMAGE_TABLE_CDSP3_INDEX 31 70 #define SMEM_IMAGE_TABLE_AUDIOPD_ADSP1_INDEX 32 71 #define SMEM_IMAGE_TABLE_AUDIOPD_ADSP2_INDEX 33 72 #define SMEM_IMAGE_TABLE_DCP_INDEX 34 73 #define SMEM_IMAGE_TABLE_OOBS_INDEX 35 74 #define SMEM_IMAGE_TABLE_OOBNS_INDEX 36 75 #define SMEM_IMAGE_TABLE_DEVCFG_INDEX 37 76 #define SMEM_IMAGE_TABLE_BTPD_INDEX 38 77 #define SMEM_IMAGE_TABLE_QECP_INDEX 39 78 79 #define SMEM_IMAGE_VERSION_TABLE 469 80 #define SMEM_IMAGE_VERSION_TABLE_2 667 81 82 /* 83 * SMEM Image table names 84 */ 85 static const char *const socinfo_image_names[] = { 86 [SMEM_IMAGE_TABLE_ADSP1_INDEX] = "adsp1", 87 [SMEM_IMAGE_TABLE_ADSP2_INDEX] = "adsp2", 88 [SMEM_IMAGE_TABLE_ADSP_INDEX] = "adsp", 89 [SMEM_IMAGE_TABLE_APPSBL_INDEX] = "appsbl", 90 [SMEM_IMAGE_TABLE_APPS_INDEX] = "apps", 91 [SMEM_IMAGE_TABLE_AUDIOPD_INDEX] = "audiopd", 92 [SMEM_IMAGE_TABLE_AUDIOPD_ADSP1_INDEX] = "audiopd_adsp1", 93 [SMEM_IMAGE_TABLE_AUDIOPD_ADSP2_INDEX] = "audiopd_adsp2", 94 [SMEM_IMAGE_TABLE_BOOT_INDEX] = "boot", 95 [SMEM_IMAGE_TABLE_BTPD_INDEX] = "btpd", 96 [SMEM_IMAGE_TABLE_CDSP1_INDEX] = "cdsp1", 97 [SMEM_IMAGE_TABLE_CDSP2_INDEX] = "cdsp2", 98 [SMEM_IMAGE_TABLE_CDSP3_INDEX] = "cdsp3", 99 [SMEM_IMAGE_TABLE_CDSP_INDEX] = "cdsp", 100 [SMEM_IMAGE_TABLE_CHARGERPD_INDEX] = "chargerpd", 101 [SMEM_IMAGE_TABLE_CNSS_INDEX] = "cnss", 102 [SMEM_IMAGE_TABLE_DCP_INDEX] = "dcp", 103 [SMEM_IMAGE_TABLE_DEVCFG_INDEX] = "devcfg", 104 [SMEM_IMAGE_TABLE_DSPS_INDEX] = "dsps", 105 [SMEM_IMAGE_TABLE_GEARVM_INDEX] = "gearvm", 106 [SMEM_IMAGE_TABLE_GPDSP1_INDEX] = "gpdsp1", 107 [SMEM_IMAGE_TABLE_GPDSP_INDEX] = "gpdsp", 108 [SMEM_IMAGE_TABLE_HYP_INDEX] = "hyp", 109 [SMEM_IMAGE_TABLE_MPSS_INDEX] = "mpss", 110 [SMEM_IMAGE_TABLE_NPU_INDEX] = "npu", 111 [SMEM_IMAGE_TABLE_OEMPD_INDEX] = "oempd", 112 [SMEM_IMAGE_TABLE_OISPD_INDEX] = "oispd", 113 [SMEM_IMAGE_TABLE_OOBNS_INDEX] = "oobns", 114 [SMEM_IMAGE_TABLE_OOBS_INDEX] = "oobs", 115 [SMEM_IMAGE_TABLE_QECP_INDEX] = "qecp", 116 [SMEM_IMAGE_TABLE_RPM_INDEX] = "rpm", 117 [SMEM_IMAGE_TABLE_SDI_INDEX] = "sdi", 118 [SMEM_IMAGE_TABLE_SENSORPD_INDEX] = "sensorpd", 119 [SMEM_IMAGE_TABLE_SOCCP_INDEX] = "soccp", 120 [SMEM_IMAGE_TABLE_TME_INDEX] = "tme", 121 [SMEM_IMAGE_TABLE_TZ_INDEX] = "tz", 122 [SMEM_IMAGE_TABLE_TZSECAPP_INDEX] = "tzsecapp", 123 [SMEM_IMAGE_TABLE_UEFI_INDEX] = "uefi", 124 [SMEM_IMAGE_TABLE_VIDEO_INDEX] = "video", 125 [SMEM_IMAGE_TABLE_WPSS_INDEX] = "wpss", 126 }; 127 128 static const char *const pmic_models[] = { 129 [0] = "Unknown PMIC model", 130 [1] = "PM8941", 131 [2] = "PM8841", 132 [3] = "PM8019", 133 [4] = "PM8226", 134 [5] = "PM8110", 135 [6] = "PMA8084", 136 [7] = "PMI8962", 137 [8] = "PMD9635", 138 [9] = "PM8994", 139 [10] = "PMI8994", 140 [11] = "PM8916", 141 [12] = "PM8004", 142 [13] = "PM8909/PM8058", 143 [14] = "PM8028", 144 [15] = "PM8901", 145 [16] = "PM8950/PM8027", 146 [17] = "PMI8950/ISL9519", 147 [18] = "PMK8001/PM8921", 148 [19] = "PMI8996/PM8018", 149 [20] = "PM8998/PM8015", 150 [21] = "PMI8998/PM8014", 151 [22] = "PM8821", 152 [23] = "PM8038", 153 [24] = "PM8005/PM8922", 154 [25] = "PM8917/PM8937", 155 [26] = "PM660L", 156 [27] = "PM660", 157 [30] = "PM8150", 158 [31] = "PM8150L", 159 [32] = "PM8150B", 160 [33] = "PMK8002", 161 [36] = "PM8009", 162 [37] = "PMI632", 163 [38] = "PM8150C", 164 [40] = "PM6150", 165 [41] = "SMB2351", 166 [44] = "PM8008", 167 [45] = "PM6125", 168 [46] = "PM7250B", 169 [47] = "PMK8350", 170 [48] = "PM8350", 171 [49] = "PM8350C", 172 [50] = "PM8350B", 173 [51] = "PMR735A", 174 [52] = "PMR735B", 175 [54] = "PM6350", 176 [55] = "PM4125", 177 [58] = "PM8450", 178 [65] = "PM8010", 179 [69] = "PM8550VS", 180 [70] = "PM8550VE", 181 [71] = "PM8550B", 182 [72] = "PMR735D", 183 [73] = "PM8550", 184 [74] = "PMK8550", 185 [78] = "PMM8650AU", 186 [79] = "PMM8650AU_PSAIL", 187 [80] = "PM7550", 188 [82] = "PMC8380", 189 [83] = "SMB2360", 190 [91] = "PMIV0108", 191 }; 192 193 struct socinfo_params { 194 u32 raw_device_family; 195 u32 hw_plat_subtype; 196 u32 accessory_chip; 197 u32 raw_device_num; 198 u32 chip_family; 199 u32 foundry_id; 200 u32 plat_ver; 201 u32 raw_ver; 202 u32 hw_plat; 203 u32 fmt; 204 u32 nproduct_id; 205 u32 num_clusters; 206 u32 ncluster_array_offset; 207 u32 num_subset_parts; 208 u32 nsubset_parts_array_offset; 209 u32 nmodem_supported; 210 u32 feature_code; 211 u32 pcode; 212 u32 oem_variant; 213 u32 num_func_clusters; 214 u32 boot_cluster; 215 u32 boot_core; 216 u32 raw_package_type; 217 }; 218 219 struct smem_image_version { 220 char name[SMEM_IMAGE_VERSION_NAME_SIZE]; 221 char variant[SMEM_IMAGE_VERSION_VARIANT_SIZE]; 222 char pad; 223 char oem[SMEM_IMAGE_VERSION_OEM_SIZE]; 224 }; 225 #endif /* CONFIG_DEBUG_FS */ 226 227 struct qcom_socinfo { 228 struct soc_device *soc_dev; 229 struct soc_device_attribute attr; 230 #ifdef CONFIG_DEBUG_FS 231 struct dentry *dbg_root; 232 struct socinfo_params info; 233 #endif /* CONFIG_DEBUG_FS */ 234 }; 235 236 struct soc_id { 237 unsigned int id; 238 const char *name; 239 }; 240 241 static const struct soc_id soc_id[] = { 242 { qcom_board_id(MSM8260) }, 243 { qcom_board_id(MSM8660) }, 244 { qcom_board_id(APQ8060) }, 245 { qcom_board_id(MSM8960) }, 246 { qcom_board_id(APQ8064) }, 247 { qcom_board_id(MSM8930) }, 248 { qcom_board_id(MSM8630) }, 249 { qcom_board_id(MSM8230) }, 250 { qcom_board_id(APQ8030) }, 251 { qcom_board_id(MSM8627) }, 252 { qcom_board_id(MSM8227) }, 253 { qcom_board_id(MSM8660A) }, 254 { qcom_board_id(MSM8260A) }, 255 { qcom_board_id(APQ8060A) }, 256 { qcom_board_id(MSM8974) }, 257 { qcom_board_id(MSM8225) }, 258 { qcom_board_id(MSM8625) }, 259 { qcom_board_id(MPQ8064) }, 260 { qcom_board_id(MSM8960AB) }, 261 { qcom_board_id(APQ8060AB) }, 262 { qcom_board_id(MSM8260AB) }, 263 { qcom_board_id(MSM8660AB) }, 264 { qcom_board_id(MSM8930AA) }, 265 { qcom_board_id(MSM8630AA) }, 266 { qcom_board_id(MSM8230AA) }, 267 { qcom_board_id(MSM8626) }, 268 { qcom_board_id(MSM8610) }, 269 { qcom_board_id(APQ8064AB) }, 270 { qcom_board_id(MSM8930AB) }, 271 { qcom_board_id(MSM8630AB) }, 272 { qcom_board_id(MSM8230AB) }, 273 { qcom_board_id(APQ8030AB) }, 274 { qcom_board_id(MSM8226) }, 275 { qcom_board_id(MSM8526) }, 276 { qcom_board_id(APQ8030AA) }, 277 { qcom_board_id(MSM8110) }, 278 { qcom_board_id(MSM8210) }, 279 { qcom_board_id(MSM8810) }, 280 { qcom_board_id(MSM8212) }, 281 { qcom_board_id(MSM8612) }, 282 { qcom_board_id(MSM8112) }, 283 { qcom_board_id(MSM8125) }, 284 { qcom_board_id(MSM8225Q) }, 285 { qcom_board_id(MSM8625Q) }, 286 { qcom_board_id(MSM8125Q) }, 287 { qcom_board_id(APQ8064AA) }, 288 { qcom_board_id(APQ8084) }, 289 { qcom_board_id(MSM8130) }, 290 { qcom_board_id(MSM8130AA) }, 291 { qcom_board_id(MSM8130AB) }, 292 { qcom_board_id(MSM8627AA) }, 293 { qcom_board_id(MSM8227AA) }, 294 { qcom_board_id(APQ8074) }, 295 { qcom_board_id(MSM8274) }, 296 { qcom_board_id(MSM8674) }, 297 { qcom_board_id(MDM9635) }, 298 { qcom_board_id_named(MSM8974PRO_AC, "MSM8974PRO-AC") }, 299 { qcom_board_id(MSM8126) }, 300 { qcom_board_id(APQ8026) }, 301 { qcom_board_id(MSM8926) }, 302 { qcom_board_id(IPQ8062) }, 303 { qcom_board_id(IPQ8064) }, 304 { qcom_board_id(IPQ8066) }, 305 { qcom_board_id(IPQ8068) }, 306 { qcom_board_id(MSM8326) }, 307 { qcom_board_id(MSM8916) }, 308 { qcom_board_id(MSM8994) }, 309 { qcom_board_id_named(APQ8074PRO_AA, "APQ8074PRO-AA") }, 310 { qcom_board_id_named(APQ8074PRO_AB, "APQ8074PRO-AB") }, 311 { qcom_board_id_named(APQ8074PRO_AC, "APQ8074PRO-AC") }, 312 { qcom_board_id_named(MSM8274PRO_AA, "MSM8274PRO-AA") }, 313 { qcom_board_id_named(MSM8274PRO_AB, "MSM8274PRO-AB") }, 314 { qcom_board_id_named(MSM8274PRO_AC, "MSM8274PRO-AC") }, 315 { qcom_board_id_named(MSM8674PRO_AA, "MSM8674PRO-AA") }, 316 { qcom_board_id_named(MSM8674PRO_AB, "MSM8674PRO-AB") }, 317 { qcom_board_id_named(MSM8674PRO_AC, "MSM8674PRO-AC") }, 318 { qcom_board_id_named(MSM8974PRO_AA, "MSM8974PRO-AA") }, 319 { qcom_board_id_named(MSM8974PRO_AB, "MSM8974PRO-AB") }, 320 { qcom_board_id(APQ8028) }, 321 { qcom_board_id(MSM8128) }, 322 { qcom_board_id(MSM8228) }, 323 { qcom_board_id(MSM8528) }, 324 { qcom_board_id(MSM8628) }, 325 { qcom_board_id(MSM8928) }, 326 { qcom_board_id(MSM8510) }, 327 { qcom_board_id(MSM8512) }, 328 { qcom_board_id(MSM8936) }, 329 { qcom_board_id(MDM9640) }, 330 { qcom_board_id(MSM8939) }, 331 { qcom_board_id(APQ8036) }, 332 { qcom_board_id(APQ8039) }, 333 { qcom_board_id(MSM8236) }, 334 { qcom_board_id(MSM8636) }, 335 { qcom_board_id(MSM8909) }, 336 { qcom_board_id(MSM8996) }, 337 { qcom_board_id(APQ8016) }, 338 { qcom_board_id(MSM8216) }, 339 { qcom_board_id(MSM8116) }, 340 { qcom_board_id(MSM8616) }, 341 { qcom_board_id(MSM8992) }, 342 { qcom_board_id(APQ8092) }, 343 { qcom_board_id(APQ8094) }, 344 { qcom_board_id(MSM8209) }, 345 { qcom_board_id(MSM8208) }, 346 { qcom_board_id(MDM9209) }, 347 { qcom_board_id(MDM9309) }, 348 { qcom_board_id(MDM9609) }, 349 { qcom_board_id(MSM8239) }, 350 { qcom_board_id(MSM8952) }, 351 { qcom_board_id(APQ8009) }, 352 { qcom_board_id(MSM8956) }, 353 { qcom_board_id(MSM8929) }, 354 { qcom_board_id(MSM8629) }, 355 { qcom_board_id(MSM8229) }, 356 { qcom_board_id(APQ8029) }, 357 { qcom_board_id(APQ8056) }, 358 { qcom_board_id(MSM8609) }, 359 { qcom_board_id(APQ8076) }, 360 { qcom_board_id(MSM8976) }, 361 { qcom_board_id(IPQ8065) }, 362 { qcom_board_id(IPQ8069) }, 363 { qcom_board_id(MDM9650) }, 364 { qcom_board_id(MDM9655) }, 365 { qcom_board_id(MDM9250) }, 366 { qcom_board_id(MDM9255) }, 367 { qcom_board_id(MDM9350) }, 368 { qcom_board_id(APQ8052) }, 369 { qcom_board_id(MDM9607) }, 370 { qcom_board_id(APQ8096) }, 371 { qcom_board_id(MSM8998) }, 372 { qcom_board_id(MSM8953) }, 373 { qcom_board_id(MSM8937) }, 374 { qcom_board_id(APQ8037) }, 375 { qcom_board_id(MDM8207) }, 376 { qcom_board_id(MDM9207) }, 377 { qcom_board_id(MDM9307) }, 378 { qcom_board_id(MDM9628) }, 379 { qcom_board_id(MSM8909W) }, 380 { qcom_board_id(APQ8009W) }, 381 { qcom_board_id(MSM8996L) }, 382 { qcom_board_id(MSM8917) }, 383 { qcom_board_id(APQ8053) }, 384 { qcom_board_id(MSM8996SG) }, 385 { qcom_board_id(APQ8017) }, 386 { qcom_board_id(MSM8217) }, 387 { qcom_board_id(MSM8617) }, 388 { qcom_board_id(MSM8996AU) }, 389 { qcom_board_id(APQ8096AU) }, 390 { qcom_board_id(APQ8096SG) }, 391 { qcom_board_id(MSM8940) }, 392 { qcom_board_id(SDX201) }, 393 { qcom_board_id(SDM660) }, 394 { qcom_board_id(SDM630) }, 395 { qcom_board_id(APQ8098) }, 396 { qcom_board_id(MSM8920) }, 397 { qcom_board_id(SDM845) }, 398 { qcom_board_id(MDM9206) }, 399 { qcom_board_id(IPQ8074) }, 400 { qcom_board_id(SDA660) }, 401 { qcom_board_id(SDM658) }, 402 { qcom_board_id(SDA658) }, 403 { qcom_board_id(SDA630) }, 404 { qcom_board_id(MSM8905) }, 405 { qcom_board_id(SDX202) }, 406 { qcom_board_id(SDM670) }, 407 { qcom_board_id(SDM450) }, 408 { qcom_board_id(SM8150) }, 409 { qcom_board_id(SDA845) }, 410 { qcom_board_id(IPQ8072) }, 411 { qcom_board_id(IPQ8076) }, 412 { qcom_board_id(IPQ8078) }, 413 { qcom_board_id(SDM636) }, 414 { qcom_board_id(SDA636) }, 415 { qcom_board_id(SDM632) }, 416 { qcom_board_id(SDA632) }, 417 { qcom_board_id(SDA450) }, 418 { qcom_board_id(SDM439) }, 419 { qcom_board_id(SDM429) }, 420 { qcom_board_id(SM8250) }, 421 { qcom_board_id(SA8155) }, 422 { qcom_board_id(SDA439) }, 423 { qcom_board_id(SDA429) }, 424 { qcom_board_id(SM7150) }, 425 { qcom_board_id(SM7150P) }, 426 { qcom_board_id(IPQ8070) }, 427 { qcom_board_id(IPQ8071) }, 428 { qcom_board_id(QM215) }, 429 { qcom_board_id(IPQ8072A) }, 430 { qcom_board_id(IPQ8074A) }, 431 { qcom_board_id(IPQ8076A) }, 432 { qcom_board_id(IPQ8078A) }, 433 { qcom_board_id(SM6125) }, 434 { qcom_board_id(IPQ8070A) }, 435 { qcom_board_id(IPQ8071A) }, 436 { qcom_board_id(IPQ8172) }, 437 { qcom_board_id(IPQ8173) }, 438 { qcom_board_id(IPQ8174) }, 439 { qcom_board_id(IPQ6018) }, 440 { qcom_board_id(IPQ6028) }, 441 { qcom_board_id(SDM429W) }, 442 { qcom_board_id(SM4250) }, 443 { qcom_board_id(IPQ6000) }, 444 { qcom_board_id(IPQ6010) }, 445 { qcom_board_id(SC7180) }, 446 { qcom_board_id(SM6350) }, 447 { qcom_board_id(QCM2150) }, 448 { qcom_board_id(SDA429W) }, 449 { qcom_board_id(SM8350) }, 450 { qcom_board_id(QCM2290) }, 451 { qcom_board_id(SM7125) }, 452 { qcom_board_id(SM6115) }, 453 { qcom_board_id(IPQ5010) }, 454 { qcom_board_id(IPQ5018) }, 455 { qcom_board_id(IPQ5028) }, 456 { qcom_board_id(SC8280XP) }, 457 { qcom_board_id(IPQ6005) }, 458 { qcom_board_id(QRB5165) }, 459 { qcom_board_id(SM8450) }, 460 { qcom_board_id(SM7225) }, 461 { qcom_board_id(SA8295P) }, 462 { qcom_board_id(SA8540P) }, 463 { qcom_board_id(QCM4290) }, 464 { qcom_board_id(QCS4290) }, 465 { qcom_board_id(SM7325) }, 466 { qcom_board_id_named(SM8450_2, "SM8450") }, 467 { qcom_board_id_named(SM8450_3, "SM8450") }, 468 { qcom_board_id(SC7280) }, 469 { qcom_board_id(SC7180P) }, 470 { qcom_board_id(QCM6490) }, 471 { qcom_board_id(QCS6490) }, 472 { qcom_board_id(SM7325P) }, 473 { qcom_board_id(IPQ5000) }, 474 { qcom_board_id(IPQ0509) }, 475 { qcom_board_id(IPQ0518) }, 476 { qcom_board_id(SM7450) }, 477 { qcom_board_id(SM6375) }, 478 { qcom_board_id(IPQ9514) }, 479 { qcom_board_id(IPQ9550) }, 480 { qcom_board_id(IPQ9554) }, 481 { qcom_board_id(IPQ9570) }, 482 { qcom_board_id(IPQ9574) }, 483 { qcom_board_id(SM8550) }, 484 { qcom_board_id(IPQ5016) }, 485 { qcom_board_id(IPQ9510) }, 486 { qcom_board_id(QRB4210) }, 487 { qcom_board_id(QRB2210) }, 488 { qcom_board_id(SAR2130P) }, 489 { qcom_board_id(SM8475) }, 490 { qcom_board_id(SM8475P) }, 491 { qcom_board_id(SA8255P) }, 492 { qcom_board_id(SA8775P) }, 493 { qcom_board_id(QRU1000) }, 494 { qcom_board_id(SM8475_2) }, 495 { qcom_board_id(QDU1000) }, 496 { qcom_board_id(SM7450P) }, 497 { qcom_board_id(X1E80100) }, 498 { qcom_board_id(SM8650) }, 499 { qcom_board_id(SM4450) }, 500 { qcom_board_id(SAR1130P) }, 501 { qcom_board_id(QDU1010) }, 502 { qcom_board_id(QRU1032) }, 503 { qcom_board_id(QRU1052) }, 504 { qcom_board_id(QRU1062) }, 505 { qcom_board_id(IPQ5332) }, 506 { qcom_board_id(IPQ5322) }, 507 { qcom_board_id(IPQ5312) }, 508 { qcom_board_id(IPQ5302) }, 509 { qcom_board_id(QCS8550) }, 510 { qcom_board_id(QCM8550) }, 511 { qcom_board_id(SM8750) }, 512 { qcom_board_id(IPQ5300) }, 513 { qcom_board_id(SM7635) }, 514 { qcom_board_id(SM6650) }, 515 { qcom_board_id(SM6650P) }, 516 { qcom_board_id(IPQ5321) }, 517 { qcom_board_id(IPQ5424) }, 518 { qcom_board_id(QCM6690) }, 519 { qcom_board_id(QCS6690) }, 520 { qcom_board_id(SM8850) }, 521 { qcom_board_id(IPQ5404) }, 522 { qcom_board_id(QCS9100) }, 523 { qcom_board_id(QCS8300) }, 524 { qcom_board_id(QCS8275) }, 525 { qcom_board_id(QCS9075) }, 526 { qcom_board_id(QCS615) }, 527 { qcom_board_id(CQ7790M) }, 528 { qcom_board_id(CQ7790S) }, 529 }; 530 531 static const char *socinfo_machine(struct device *dev, unsigned int id) 532 { 533 int idx; 534 535 for (idx = 0; idx < ARRAY_SIZE(soc_id); idx++) { 536 if (soc_id[idx].id == id) 537 return soc_id[idx].name; 538 } 539 540 return NULL; 541 } 542 543 #ifdef CONFIG_DEBUG_FS 544 545 #define QCOM_OPEN(name, _func) \ 546 static int qcom_open_##name(struct inode *inode, struct file *file) \ 547 { \ 548 return single_open(file, _func, inode->i_private); \ 549 } \ 550 \ 551 static const struct file_operations qcom_ ##name## _ops = { \ 552 .open = qcom_open_##name, \ 553 .read = seq_read, \ 554 .llseek = seq_lseek, \ 555 .release = single_release, \ 556 } 557 558 #define DEBUGFS_ADD(info, name) \ 559 debugfs_create_file(__stringify(name), 0444, \ 560 qcom_socinfo->dbg_root, \ 561 info, &qcom_ ##name## _ops) 562 563 564 static int qcom_show_build_id(struct seq_file *seq, void *p) 565 { 566 struct socinfo *socinfo = seq->private; 567 568 seq_printf(seq, "%s\n", socinfo->build_id); 569 570 return 0; 571 } 572 573 static int qcom_show_pmic_model(struct seq_file *seq, void *p) 574 { 575 struct socinfo *socinfo = seq->private; 576 int model = SOCINFO_MINOR(le32_to_cpu(socinfo->pmic_model)); 577 578 if (model < 0) 579 return -EINVAL; 580 581 if (model < ARRAY_SIZE(pmic_models) && pmic_models[model]) 582 seq_printf(seq, "%s\n", pmic_models[model]); 583 else 584 seq_printf(seq, "unknown (%d)\n", model); 585 586 return 0; 587 } 588 589 static int qcom_show_pmic_model_array(struct seq_file *seq, void *p) 590 { 591 struct socinfo *socinfo = seq->private; 592 unsigned int num_pmics = le32_to_cpu(socinfo->num_pmics); 593 unsigned int pmic_array_offset = le32_to_cpu(socinfo->pmic_array_offset); 594 int i; 595 void *ptr = socinfo; 596 597 ptr += pmic_array_offset; 598 599 /* No need for bounds checking, it happened at socinfo_debugfs_init */ 600 for (i = 0; i < num_pmics; i++) { 601 unsigned int model = SOCINFO_MINOR(get_unaligned_le32(ptr + 2 * i * sizeof(u32))); 602 unsigned int die_rev = get_unaligned_le32(ptr + (2 * i + 1) * sizeof(u32)); 603 604 if (model < ARRAY_SIZE(pmic_models) && pmic_models[model]) 605 seq_printf(seq, "%s %u.%u\n", pmic_models[model], 606 SOCINFO_MAJOR(die_rev), 607 SOCINFO_MINOR(die_rev)); 608 else 609 seq_printf(seq, "unknown (%d)\n", model); 610 } 611 612 return 0; 613 } 614 615 static int qcom_show_pmic_die_revision(struct seq_file *seq, void *p) 616 { 617 struct socinfo *socinfo = seq->private; 618 619 seq_printf(seq, "%u.%u\n", 620 SOCINFO_MAJOR(le32_to_cpu(socinfo->pmic_die_rev)), 621 SOCINFO_MINOR(le32_to_cpu(socinfo->pmic_die_rev))); 622 623 return 0; 624 } 625 626 static int qcom_show_chip_id(struct seq_file *seq, void *p) 627 { 628 struct socinfo *socinfo = seq->private; 629 630 seq_printf(seq, "%s\n", socinfo->chip_id); 631 632 return 0; 633 } 634 635 QCOM_OPEN(build_id, qcom_show_build_id); 636 QCOM_OPEN(pmic_model, qcom_show_pmic_model); 637 QCOM_OPEN(pmic_model_array, qcom_show_pmic_model_array); 638 QCOM_OPEN(pmic_die_rev, qcom_show_pmic_die_revision); 639 QCOM_OPEN(chip_id, qcom_show_chip_id); 640 641 #define DEFINE_IMAGE_OPS(type) \ 642 static int show_image_##type(struct seq_file *seq, void *p) \ 643 { \ 644 struct smem_image_version *image_version = seq->private; \ 645 if (image_version->type[0] != '\0') \ 646 seq_printf(seq, "%s\n", image_version->type); \ 647 return 0; \ 648 } \ 649 static int open_image_##type(struct inode *inode, struct file *file) \ 650 { \ 651 return single_open(file, show_image_##type, inode->i_private); \ 652 } \ 653 \ 654 static const struct file_operations qcom_image_##type##_ops = { \ 655 .open = open_image_##type, \ 656 .read = seq_read, \ 657 .llseek = seq_lseek, \ 658 .release = single_release, \ 659 } 660 661 DEFINE_IMAGE_OPS(name); 662 DEFINE_IMAGE_OPS(variant); 663 DEFINE_IMAGE_OPS(oem); 664 665 static void socinfo_debugfs_init(struct qcom_socinfo *qcom_socinfo, 666 struct socinfo *info, size_t info_size) 667 { 668 struct smem_image_version *versions; 669 struct dentry *dentry; 670 size_t size; 671 int i, j; 672 unsigned int num_pmics; 673 unsigned int pmic_array_offset; 674 675 qcom_socinfo->dbg_root = debugfs_create_dir("qcom_socinfo", NULL); 676 677 qcom_socinfo->info.fmt = __le32_to_cpu(info->fmt); 678 679 debugfs_create_x32("info_fmt", 0444, qcom_socinfo->dbg_root, 680 &qcom_socinfo->info.fmt); 681 682 switch (qcom_socinfo->info.fmt) { 683 case SOCINFO_VERSION(0, 23): 684 case SOCINFO_VERSION(0, 22): 685 case SOCINFO_VERSION(0, 21): 686 case SOCINFO_VERSION(0, 20): 687 qcom_socinfo->info.raw_package_type = __le32_to_cpu(info->raw_package_type); 688 debugfs_create_u32("raw_package_type", 0444, qcom_socinfo->dbg_root, 689 &qcom_socinfo->info.raw_package_type); 690 fallthrough; 691 case SOCINFO_VERSION(0, 19): 692 qcom_socinfo->info.num_func_clusters = __le32_to_cpu(info->num_func_clusters); 693 qcom_socinfo->info.boot_cluster = __le32_to_cpu(info->boot_cluster); 694 qcom_socinfo->info.boot_core = __le32_to_cpu(info->boot_core); 695 696 debugfs_create_u32("num_func_clusters", 0444, qcom_socinfo->dbg_root, 697 &qcom_socinfo->info.num_func_clusters); 698 debugfs_create_u32("boot_cluster", 0444, qcom_socinfo->dbg_root, 699 &qcom_socinfo->info.boot_cluster); 700 debugfs_create_u32("boot_core", 0444, qcom_socinfo->dbg_root, 701 &qcom_socinfo->info.boot_core); 702 fallthrough; 703 case SOCINFO_VERSION(0, 18): 704 case SOCINFO_VERSION(0, 17): 705 qcom_socinfo->info.oem_variant = __le32_to_cpu(info->oem_variant); 706 debugfs_create_u32("oem_variant", 0444, qcom_socinfo->dbg_root, 707 &qcom_socinfo->info.oem_variant); 708 fallthrough; 709 case SOCINFO_VERSION(0, 16): 710 qcom_socinfo->info.feature_code = __le32_to_cpu(info->feature_code); 711 qcom_socinfo->info.pcode = __le32_to_cpu(info->pcode); 712 713 debugfs_create_u32("feature_code", 0444, qcom_socinfo->dbg_root, 714 &qcom_socinfo->info.feature_code); 715 debugfs_create_u32("pcode", 0444, qcom_socinfo->dbg_root, 716 &qcom_socinfo->info.pcode); 717 fallthrough; 718 case SOCINFO_VERSION(0, 15): 719 qcom_socinfo->info.nmodem_supported = __le32_to_cpu(info->nmodem_supported); 720 721 debugfs_create_u32("nmodem_supported", 0444, qcom_socinfo->dbg_root, 722 &qcom_socinfo->info.nmodem_supported); 723 fallthrough; 724 case SOCINFO_VERSION(0, 14): 725 qcom_socinfo->info.num_clusters = __le32_to_cpu(info->num_clusters); 726 qcom_socinfo->info.ncluster_array_offset = __le32_to_cpu(info->ncluster_array_offset); 727 qcom_socinfo->info.num_subset_parts = __le32_to_cpu(info->num_subset_parts); 728 qcom_socinfo->info.nsubset_parts_array_offset = 729 __le32_to_cpu(info->nsubset_parts_array_offset); 730 731 debugfs_create_u32("num_clusters", 0444, qcom_socinfo->dbg_root, 732 &qcom_socinfo->info.num_clusters); 733 debugfs_create_u32("ncluster_array_offset", 0444, qcom_socinfo->dbg_root, 734 &qcom_socinfo->info.ncluster_array_offset); 735 debugfs_create_u32("num_subset_parts", 0444, qcom_socinfo->dbg_root, 736 &qcom_socinfo->info.num_subset_parts); 737 debugfs_create_u32("nsubset_parts_array_offset", 0444, qcom_socinfo->dbg_root, 738 &qcom_socinfo->info.nsubset_parts_array_offset); 739 fallthrough; 740 case SOCINFO_VERSION(0, 13): 741 qcom_socinfo->info.nproduct_id = __le32_to_cpu(info->nproduct_id); 742 743 debugfs_create_u32("nproduct_id", 0444, qcom_socinfo->dbg_root, 744 &qcom_socinfo->info.nproduct_id); 745 DEBUGFS_ADD(info, chip_id); 746 fallthrough; 747 case SOCINFO_VERSION(0, 12): 748 qcom_socinfo->info.chip_family = 749 __le32_to_cpu(info->chip_family); 750 qcom_socinfo->info.raw_device_family = 751 __le32_to_cpu(info->raw_device_family); 752 qcom_socinfo->info.raw_device_num = 753 __le32_to_cpu(info->raw_device_num); 754 755 debugfs_create_x32("chip_family", 0444, qcom_socinfo->dbg_root, 756 &qcom_socinfo->info.chip_family); 757 debugfs_create_x32("raw_device_family", 0444, 758 qcom_socinfo->dbg_root, 759 &qcom_socinfo->info.raw_device_family); 760 debugfs_create_x32("raw_device_number", 0444, 761 qcom_socinfo->dbg_root, 762 &qcom_socinfo->info.raw_device_num); 763 fallthrough; 764 case SOCINFO_VERSION(0, 11): 765 num_pmics = le32_to_cpu(info->num_pmics); 766 pmic_array_offset = le32_to_cpu(info->pmic_array_offset); 767 if (pmic_array_offset + 2 * num_pmics * sizeof(u32) <= info_size) 768 DEBUGFS_ADD(info, pmic_model_array); 769 fallthrough; 770 case SOCINFO_VERSION(0, 10): 771 case SOCINFO_VERSION(0, 9): 772 qcom_socinfo->info.foundry_id = __le32_to_cpu(info->foundry_id); 773 774 debugfs_create_u32("foundry_id", 0444, qcom_socinfo->dbg_root, 775 &qcom_socinfo->info.foundry_id); 776 fallthrough; 777 case SOCINFO_VERSION(0, 8): 778 case SOCINFO_VERSION(0, 7): 779 DEBUGFS_ADD(info, pmic_model); 780 DEBUGFS_ADD(info, pmic_die_rev); 781 fallthrough; 782 case SOCINFO_VERSION(0, 6): 783 qcom_socinfo->info.hw_plat_subtype = 784 __le32_to_cpu(info->hw_plat_subtype); 785 786 debugfs_create_u32("hardware_platform_subtype", 0444, 787 qcom_socinfo->dbg_root, 788 &qcom_socinfo->info.hw_plat_subtype); 789 fallthrough; 790 case SOCINFO_VERSION(0, 5): 791 qcom_socinfo->info.accessory_chip = 792 __le32_to_cpu(info->accessory_chip); 793 794 debugfs_create_u32("accessory_chip", 0444, 795 qcom_socinfo->dbg_root, 796 &qcom_socinfo->info.accessory_chip); 797 fallthrough; 798 case SOCINFO_VERSION(0, 4): 799 qcom_socinfo->info.plat_ver = __le32_to_cpu(info->plat_ver); 800 801 debugfs_create_u32("platform_version", 0444, 802 qcom_socinfo->dbg_root, 803 &qcom_socinfo->info.plat_ver); 804 fallthrough; 805 case SOCINFO_VERSION(0, 3): 806 qcom_socinfo->info.hw_plat = __le32_to_cpu(info->hw_plat); 807 808 debugfs_create_u32("hardware_platform", 0444, 809 qcom_socinfo->dbg_root, 810 &qcom_socinfo->info.hw_plat); 811 fallthrough; 812 case SOCINFO_VERSION(0, 2): 813 qcom_socinfo->info.raw_ver = __le32_to_cpu(info->raw_ver); 814 815 debugfs_create_u32("raw_version", 0444, qcom_socinfo->dbg_root, 816 &qcom_socinfo->info.raw_ver); 817 fallthrough; 818 case SOCINFO_VERSION(0, 1): 819 DEBUGFS_ADD(info, build_id); 820 break; 821 } 822 823 for (i = 0, j = 0; i < ARRAY_SIZE(socinfo_image_names); i++, j++) { 824 if (!socinfo_image_names[i]) 825 continue; 826 827 if (i == 0) { 828 versions = qcom_smem_get(QCOM_SMEM_HOST_ANY, 829 SMEM_IMAGE_VERSION_TABLE, 830 &size); 831 } else if (i == 32) { 832 versions = qcom_smem_get(QCOM_SMEM_HOST_ANY, 833 SMEM_IMAGE_VERSION_TABLE_2, 834 &size); 835 if (IS_ERR(versions)) 836 break; 837 838 j = 0; 839 } 840 841 dentry = debugfs_create_dir(socinfo_image_names[i], 842 qcom_socinfo->dbg_root); 843 debugfs_create_file("name", 0444, dentry, &versions[j], 844 &qcom_image_name_ops); 845 debugfs_create_file("variant", 0444, dentry, &versions[j], 846 &qcom_image_variant_ops); 847 debugfs_create_file("oem", 0444, dentry, &versions[j], 848 &qcom_image_oem_ops); 849 } 850 } 851 852 static void socinfo_debugfs_exit(struct qcom_socinfo *qcom_socinfo) 853 { 854 debugfs_remove_recursive(qcom_socinfo->dbg_root); 855 } 856 #else 857 static void socinfo_debugfs_init(struct qcom_socinfo *qcom_socinfo, 858 struct socinfo *info, size_t info_size) 859 { 860 } 861 static void socinfo_debugfs_exit(struct qcom_socinfo *qcom_socinfo) { } 862 #endif /* CONFIG_DEBUG_FS */ 863 864 static int qcom_socinfo_probe(struct platform_device *pdev) 865 { 866 struct qcom_socinfo *qs; 867 struct socinfo *info; 868 size_t item_size; 869 870 info = qcom_smem_get(QCOM_SMEM_HOST_ANY, SMEM_HW_SW_BUILD_ID, 871 &item_size); 872 if (IS_ERR(info)) { 873 dev_err(&pdev->dev, "Couldn't find socinfo\n"); 874 return PTR_ERR(info); 875 } 876 877 qs = devm_kzalloc(&pdev->dev, sizeof(*qs), GFP_KERNEL); 878 if (!qs) 879 return -ENOMEM; 880 881 qs->attr.family = "Snapdragon"; 882 qs->attr.machine = socinfo_machine(&pdev->dev, 883 le32_to_cpu(info->id)); 884 qs->attr.soc_id = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%u", 885 le32_to_cpu(info->id)); 886 qs->attr.revision = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%u.%u", 887 SOCINFO_MAJOR(le32_to_cpu(info->ver)), 888 SOCINFO_MINOR(le32_to_cpu(info->ver))); 889 if (!qs->attr.soc_id || !qs->attr.revision) 890 return -ENOMEM; 891 892 if (offsetofend(struct socinfo, serial_num) <= item_size) { 893 qs->attr.serial_number = devm_kasprintf(&pdev->dev, GFP_KERNEL, 894 "%u", 895 le32_to_cpu(info->serial_num)); 896 if (!qs->attr.serial_number) 897 return -ENOMEM; 898 } 899 900 qs->soc_dev = soc_device_register(&qs->attr); 901 if (IS_ERR(qs->soc_dev)) 902 return PTR_ERR(qs->soc_dev); 903 904 socinfo_debugfs_init(qs, info, item_size); 905 906 /* Feed the soc specific unique data into entropy pool */ 907 add_device_randomness(info, item_size); 908 909 platform_set_drvdata(pdev, qs); 910 911 return 0; 912 } 913 914 static void qcom_socinfo_remove(struct platform_device *pdev) 915 { 916 struct qcom_socinfo *qs = platform_get_drvdata(pdev); 917 918 soc_device_unregister(qs->soc_dev); 919 920 socinfo_debugfs_exit(qs); 921 } 922 923 static struct platform_driver qcom_socinfo_driver = { 924 .probe = qcom_socinfo_probe, 925 .remove = qcom_socinfo_remove, 926 .driver = { 927 .name = "qcom-socinfo", 928 }, 929 }; 930 931 module_platform_driver(qcom_socinfo_driver); 932 933 MODULE_DESCRIPTION("Qualcomm SoCinfo driver"); 934 MODULE_LICENSE("GPL v2"); 935 MODULE_ALIAS("platform:qcom-socinfo"); 936