1eddac5afSKarthikeyan Ramasubramanian // SPDX-License-Identifier: GPL-2.0
2eddac5afSKarthikeyan Ramasubramanian // Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
3eddac5afSKarthikeyan Ramasubramanian
46f1de1daSSai Prakash Ranjan /* Disable MMIO tracing to prevent excessive logging of unwanted MMIO traces */
56f1de1daSSai Prakash Ranjan #define __DISABLE_TRACE_MMIO__
66f1de1daSSai Prakash Ranjan
78bc529b2SLee Jones #include <linux/acpi.h>
8eddac5afSKarthikeyan Ramasubramanian #include <linux/clk.h>
9eddac5afSKarthikeyan Ramasubramanian #include <linux/slab.h>
10eddac5afSKarthikeyan Ramasubramanian #include <linux/dma-mapping.h>
11eddac5afSKarthikeyan Ramasubramanian #include <linux/io.h>
12eddac5afSKarthikeyan Ramasubramanian #include <linux/module.h>
13eddac5afSKarthikeyan Ramasubramanian #include <linux/of.h>
14eddac5afSKarthikeyan Ramasubramanian #include <linux/of_platform.h>
15eddac5afSKarthikeyan Ramasubramanian #include <linux/pinctrl/consumer.h>
16eddac5afSKarthikeyan Ramasubramanian #include <linux/platform_device.h>
17491581f4SElliot Berman #include <linux/soc/qcom/geni-se.h>
18eddac5afSKarthikeyan Ramasubramanian
19eddac5afSKarthikeyan Ramasubramanian /**
20eddac5afSKarthikeyan Ramasubramanian * DOC: Overview
21eddac5afSKarthikeyan Ramasubramanian *
22eddac5afSKarthikeyan Ramasubramanian * Generic Interface (GENI) Serial Engine (SE) Wrapper driver is introduced
23eddac5afSKarthikeyan Ramasubramanian * to manage GENI firmware based Qualcomm Universal Peripheral (QUP) Wrapper
24eddac5afSKarthikeyan Ramasubramanian * controller. QUP Wrapper is designed to support various serial bus protocols
25eddac5afSKarthikeyan Ramasubramanian * like UART, SPI, I2C, I3C, etc.
26eddac5afSKarthikeyan Ramasubramanian */
27eddac5afSKarthikeyan Ramasubramanian
28eddac5afSKarthikeyan Ramasubramanian /**
29eddac5afSKarthikeyan Ramasubramanian * DOC: Hardware description
30eddac5afSKarthikeyan Ramasubramanian *
31eddac5afSKarthikeyan Ramasubramanian * GENI based QUP is a highly-flexible and programmable module for supporting
32eddac5afSKarthikeyan Ramasubramanian * a wide range of serial interfaces like UART, SPI, I2C, I3C, etc. A single
33eddac5afSKarthikeyan Ramasubramanian * QUP module can provide upto 8 serial interfaces, using its internal
34eddac5afSKarthikeyan Ramasubramanian * serial engines. The actual configuration is determined by the target
35eddac5afSKarthikeyan Ramasubramanian * platform configuration. The protocol supported by each interface is
36eddac5afSKarthikeyan Ramasubramanian * determined by the firmware loaded to the serial engine. Each SE consists
37eddac5afSKarthikeyan Ramasubramanian * of a DMA Engine and GENI sub modules which enable serial engines to
38eddac5afSKarthikeyan Ramasubramanian * support FIFO and DMA modes of operation.
39eddac5afSKarthikeyan Ramasubramanian *
40eddac5afSKarthikeyan Ramasubramanian *
41eddac5afSKarthikeyan Ramasubramanian * +-----------------------------------------+
42eddac5afSKarthikeyan Ramasubramanian * |QUP Wrapper |
43eddac5afSKarthikeyan Ramasubramanian * | +----------------------------+ |
44eddac5afSKarthikeyan Ramasubramanian * --QUP & SE Clocks--> | Serial Engine N | +-IO------>
45eddac5afSKarthikeyan Ramasubramanian * | | ... | | Interface
46eddac5afSKarthikeyan Ramasubramanian * <---Clock Perf.----+ +----+-----------------------+ | |
47eddac5afSKarthikeyan Ramasubramanian * State Interface | | Serial Engine 1 | | |
48eddac5afSKarthikeyan Ramasubramanian * | | | | |
49eddac5afSKarthikeyan Ramasubramanian * | | | | |
50eddac5afSKarthikeyan Ramasubramanian * <--------AHB-------> | | | |
51eddac5afSKarthikeyan Ramasubramanian * | | +----+ |
52eddac5afSKarthikeyan Ramasubramanian * | | | |
53eddac5afSKarthikeyan Ramasubramanian * | | | |
54eddac5afSKarthikeyan Ramasubramanian * <------SE IRQ------+ +----------------------------+ |
55eddac5afSKarthikeyan Ramasubramanian * | |
56eddac5afSKarthikeyan Ramasubramanian * +-----------------------------------------+
57eddac5afSKarthikeyan Ramasubramanian *
58eddac5afSKarthikeyan Ramasubramanian * Figure 1: GENI based QUP Wrapper
59eddac5afSKarthikeyan Ramasubramanian *
60eddac5afSKarthikeyan Ramasubramanian * The GENI submodules include primary and secondary sequencers which are
61eddac5afSKarthikeyan Ramasubramanian * used to drive TX & RX operations. On serial interfaces that operate using
62eddac5afSKarthikeyan Ramasubramanian * master-slave model, primary sequencer drives both TX & RX operations. On
63eddac5afSKarthikeyan Ramasubramanian * serial interfaces that operate using peer-to-peer model, primary sequencer
64eddac5afSKarthikeyan Ramasubramanian * drives TX operation and secondary sequencer drives RX operation.
65eddac5afSKarthikeyan Ramasubramanian */
66eddac5afSKarthikeyan Ramasubramanian
67eddac5afSKarthikeyan Ramasubramanian /**
68eddac5afSKarthikeyan Ramasubramanian * DOC: Software description
69eddac5afSKarthikeyan Ramasubramanian *
70eddac5afSKarthikeyan Ramasubramanian * GENI SE Wrapper driver is structured into 2 parts:
71eddac5afSKarthikeyan Ramasubramanian *
72eddac5afSKarthikeyan Ramasubramanian * geni_wrapper represents QUP Wrapper controller. This part of the driver
73eddac5afSKarthikeyan Ramasubramanian * manages QUP Wrapper information such as hardware version, clock
74eddac5afSKarthikeyan Ramasubramanian * performance table that is common to all the internal serial engines.
75eddac5afSKarthikeyan Ramasubramanian *
76eddac5afSKarthikeyan Ramasubramanian * geni_se represents serial engine. This part of the driver manages serial
77eddac5afSKarthikeyan Ramasubramanian * engine information such as clocks, containing QUP Wrapper, etc. This part
78eddac5afSKarthikeyan Ramasubramanian * of driver also supports operations (eg. initialize the concerned serial
79eddac5afSKarthikeyan Ramasubramanian * engine, select between FIFO and DMA mode of operation etc.) that are
80eddac5afSKarthikeyan Ramasubramanian * common to all the serial engines and are independent of serial interfaces.
81eddac5afSKarthikeyan Ramasubramanian */
82eddac5afSKarthikeyan Ramasubramanian
83eddac5afSKarthikeyan Ramasubramanian #define MAX_CLK_PERF_LEVEL 32
8463fc9af8SNeil Armstrong #define MAX_CLKS 2
85eddac5afSKarthikeyan Ramasubramanian
86eddac5afSKarthikeyan Ramasubramanian /**
8708ad7061SLee Jones * struct geni_wrapper - Data structure to represent the QUP Wrapper Core
88eddac5afSKarthikeyan Ramasubramanian * @dev: Device pointer of the QUP wrapper core
89eddac5afSKarthikeyan Ramasubramanian * @base: Base address of this instance of QUP wrapper core
9063fc9af8SNeil Armstrong * @clks: Handle to the primary & optional secondary AHB clocks
9163fc9af8SNeil Armstrong * @num_clks: Count of clocks
92eddac5afSKarthikeyan Ramasubramanian */
93eddac5afSKarthikeyan Ramasubramanian struct geni_wrapper {
94eddac5afSKarthikeyan Ramasubramanian struct device *dev;
95eddac5afSKarthikeyan Ramasubramanian void __iomem *base;
9663fc9af8SNeil Armstrong struct clk_bulk_data clks[MAX_CLKS];
9763fc9af8SNeil Armstrong unsigned int num_clks;
9863fc9af8SNeil Armstrong };
9963fc9af8SNeil Armstrong
10063fc9af8SNeil Armstrong /**
10163fc9af8SNeil Armstrong * struct geni_se_desc - Data structure to represent the QUP Wrapper resources
10263fc9af8SNeil Armstrong * @clks: Name of the primary & optional secondary AHB clocks
10363fc9af8SNeil Armstrong * @num_clks: Count of clock names
10463fc9af8SNeil Armstrong */
10563fc9af8SNeil Armstrong struct geni_se_desc {
10663fc9af8SNeil Armstrong unsigned int num_clks;
10763fc9af8SNeil Armstrong const char * const *clks;
108eddac5afSKarthikeyan Ramasubramanian };
109eddac5afSKarthikeyan Ramasubramanian
11058ffbba6SAkash Asthana static const char * const icc_path_names[] = {"qup-core", "qup-config",
11158ffbba6SAkash Asthana "qup-memory"};
11258ffbba6SAkash Asthana
113eddac5afSKarthikeyan Ramasubramanian #define QUP_HW_VER_REG 0x4
114eddac5afSKarthikeyan Ramasubramanian
115eddac5afSKarthikeyan Ramasubramanian /* Common SE registers */
116eddac5afSKarthikeyan Ramasubramanian #define GENI_INIT_CFG_REVISION 0x0
117eddac5afSKarthikeyan Ramasubramanian #define GENI_S_INIT_CFG_REVISION 0x4
118eddac5afSKarthikeyan Ramasubramanian #define GENI_OUTPUT_CTRL 0x24
119eddac5afSKarthikeyan Ramasubramanian #define GENI_CGC_CTRL 0x28
120eddac5afSKarthikeyan Ramasubramanian #define GENI_CLK_CTRL_RO 0x60
121eddac5afSKarthikeyan Ramasubramanian #define GENI_FW_S_REVISION_RO 0x6c
122eddac5afSKarthikeyan Ramasubramanian #define SE_GENI_BYTE_GRAN 0x254
123eddac5afSKarthikeyan Ramasubramanian #define SE_GENI_TX_PACKING_CFG0 0x260
124eddac5afSKarthikeyan Ramasubramanian #define SE_GENI_TX_PACKING_CFG1 0x264
125eddac5afSKarthikeyan Ramasubramanian #define SE_GENI_RX_PACKING_CFG0 0x284
126eddac5afSKarthikeyan Ramasubramanian #define SE_GENI_RX_PACKING_CFG1 0x288
127eddac5afSKarthikeyan Ramasubramanian #define SE_GENI_M_GP_LENGTH 0x910
128eddac5afSKarthikeyan Ramasubramanian #define SE_GENI_S_GP_LENGTH 0x914
129eddac5afSKarthikeyan Ramasubramanian #define SE_DMA_TX_PTR_L 0xc30
130eddac5afSKarthikeyan Ramasubramanian #define SE_DMA_TX_PTR_H 0xc34
131eddac5afSKarthikeyan Ramasubramanian #define SE_DMA_TX_ATTR 0xc38
132eddac5afSKarthikeyan Ramasubramanian #define SE_DMA_TX_LEN 0xc3c
133eddac5afSKarthikeyan Ramasubramanian #define SE_DMA_TX_IRQ_EN 0xc48
134eddac5afSKarthikeyan Ramasubramanian #define SE_DMA_TX_IRQ_EN_SET 0xc4c
135eddac5afSKarthikeyan Ramasubramanian #define SE_DMA_TX_IRQ_EN_CLR 0xc50
136eddac5afSKarthikeyan Ramasubramanian #define SE_DMA_TX_LEN_IN 0xc54
137eddac5afSKarthikeyan Ramasubramanian #define SE_DMA_TX_MAX_BURST 0xc5c
138eddac5afSKarthikeyan Ramasubramanian #define SE_DMA_RX_PTR_L 0xd30
139eddac5afSKarthikeyan Ramasubramanian #define SE_DMA_RX_PTR_H 0xd34
140eddac5afSKarthikeyan Ramasubramanian #define SE_DMA_RX_ATTR 0xd38
141eddac5afSKarthikeyan Ramasubramanian #define SE_DMA_RX_LEN 0xd3c
142eddac5afSKarthikeyan Ramasubramanian #define SE_DMA_RX_IRQ_EN 0xd48
143eddac5afSKarthikeyan Ramasubramanian #define SE_DMA_RX_IRQ_EN_SET 0xd4c
144eddac5afSKarthikeyan Ramasubramanian #define SE_DMA_RX_IRQ_EN_CLR 0xd50
145eddac5afSKarthikeyan Ramasubramanian #define SE_DMA_RX_LEN_IN 0xd54
146eddac5afSKarthikeyan Ramasubramanian #define SE_DMA_RX_MAX_BURST 0xd5c
147eddac5afSKarthikeyan Ramasubramanian #define SE_DMA_RX_FLUSH 0xd60
148eddac5afSKarthikeyan Ramasubramanian #define SE_GSI_EVENT_EN 0xe18
149eddac5afSKarthikeyan Ramasubramanian #define SE_IRQ_EN 0xe1c
150eddac5afSKarthikeyan Ramasubramanian #define SE_DMA_GENERAL_CFG 0xe30
151eddac5afSKarthikeyan Ramasubramanian
152eddac5afSKarthikeyan Ramasubramanian /* GENI_OUTPUT_CTRL fields */
153eddac5afSKarthikeyan Ramasubramanian #define DEFAULT_IO_OUTPUT_CTRL_MSK GENMASK(6, 0)
154eddac5afSKarthikeyan Ramasubramanian
155eddac5afSKarthikeyan Ramasubramanian /* GENI_CGC_CTRL fields */
156eddac5afSKarthikeyan Ramasubramanian #define CFG_AHB_CLK_CGC_ON BIT(0)
157eddac5afSKarthikeyan Ramasubramanian #define CFG_AHB_WR_ACLK_CGC_ON BIT(1)
158eddac5afSKarthikeyan Ramasubramanian #define DATA_AHB_CLK_CGC_ON BIT(2)
159eddac5afSKarthikeyan Ramasubramanian #define SCLK_CGC_ON BIT(3)
160eddac5afSKarthikeyan Ramasubramanian #define TX_CLK_CGC_ON BIT(4)
161eddac5afSKarthikeyan Ramasubramanian #define RX_CLK_CGC_ON BIT(5)
162eddac5afSKarthikeyan Ramasubramanian #define EXT_CLK_CGC_ON BIT(6)
163eddac5afSKarthikeyan Ramasubramanian #define PROG_RAM_HCLK_OFF BIT(8)
164eddac5afSKarthikeyan Ramasubramanian #define PROG_RAM_SCLK_OFF BIT(9)
165eddac5afSKarthikeyan Ramasubramanian #define DEFAULT_CGC_EN GENMASK(6, 0)
166eddac5afSKarthikeyan Ramasubramanian
167eddac5afSKarthikeyan Ramasubramanian /* SE_GSI_EVENT_EN fields */
168eddac5afSKarthikeyan Ramasubramanian #define DMA_RX_EVENT_EN BIT(0)
169eddac5afSKarthikeyan Ramasubramanian #define DMA_TX_EVENT_EN BIT(1)
170eddac5afSKarthikeyan Ramasubramanian #define GENI_M_EVENT_EN BIT(2)
171eddac5afSKarthikeyan Ramasubramanian #define GENI_S_EVENT_EN BIT(3)
172eddac5afSKarthikeyan Ramasubramanian
173eddac5afSKarthikeyan Ramasubramanian /* SE_IRQ_EN fields */
174eddac5afSKarthikeyan Ramasubramanian #define DMA_RX_IRQ_EN BIT(0)
175eddac5afSKarthikeyan Ramasubramanian #define DMA_TX_IRQ_EN BIT(1)
176eddac5afSKarthikeyan Ramasubramanian #define GENI_M_IRQ_EN BIT(2)
177eddac5afSKarthikeyan Ramasubramanian #define GENI_S_IRQ_EN BIT(3)
178eddac5afSKarthikeyan Ramasubramanian
179eddac5afSKarthikeyan Ramasubramanian /* SE_DMA_GENERAL_CFG */
180eddac5afSKarthikeyan Ramasubramanian #define DMA_RX_CLK_CGC_ON BIT(0)
181eddac5afSKarthikeyan Ramasubramanian #define DMA_TX_CLK_CGC_ON BIT(1)
182eddac5afSKarthikeyan Ramasubramanian #define DMA_AHB_SLV_CFG_ON BIT(2)
183eddac5afSKarthikeyan Ramasubramanian #define AHB_SEC_SLV_CLK_CGC_ON BIT(3)
184eddac5afSKarthikeyan Ramasubramanian #define DUMMY_RX_NON_BUFFERABLE BIT(4)
185eddac5afSKarthikeyan Ramasubramanian #define RX_DMA_ZERO_PADDING_EN BIT(5)
186eddac5afSKarthikeyan Ramasubramanian #define RX_DMA_IRQ_DELAY_MSK GENMASK(8, 6)
187eddac5afSKarthikeyan Ramasubramanian #define RX_DMA_IRQ_DELAY_SHFT 6
188eddac5afSKarthikeyan Ramasubramanian
189eddac5afSKarthikeyan Ramasubramanian /**
190eddac5afSKarthikeyan Ramasubramanian * geni_se_get_qup_hw_version() - Read the QUP wrapper Hardware version
191eddac5afSKarthikeyan Ramasubramanian * @se: Pointer to the corresponding serial engine.
192eddac5afSKarthikeyan Ramasubramanian *
193eddac5afSKarthikeyan Ramasubramanian * Return: Hardware Version of the wrapper.
194eddac5afSKarthikeyan Ramasubramanian */
geni_se_get_qup_hw_version(struct geni_se * se)195eddac5afSKarthikeyan Ramasubramanian u32 geni_se_get_qup_hw_version(struct geni_se *se)
196eddac5afSKarthikeyan Ramasubramanian {
197eddac5afSKarthikeyan Ramasubramanian struct geni_wrapper *wrapper = se->wrapper;
198eddac5afSKarthikeyan Ramasubramanian
199eddac5afSKarthikeyan Ramasubramanian return readl_relaxed(wrapper->base + QUP_HW_VER_REG);
200eddac5afSKarthikeyan Ramasubramanian }
201*9b09c0f2SUnnathi Chalicheemala EXPORT_SYMBOL_GPL(geni_se_get_qup_hw_version);
202eddac5afSKarthikeyan Ramasubramanian
geni_se_io_set_mode(void __iomem * base)203eddac5afSKarthikeyan Ramasubramanian static void geni_se_io_set_mode(void __iomem *base)
204eddac5afSKarthikeyan Ramasubramanian {
205eddac5afSKarthikeyan Ramasubramanian u32 val;
206eddac5afSKarthikeyan Ramasubramanian
207eddac5afSKarthikeyan Ramasubramanian val = readl_relaxed(base + SE_IRQ_EN);
208eddac5afSKarthikeyan Ramasubramanian val |= GENI_M_IRQ_EN | GENI_S_IRQ_EN;
209eddac5afSKarthikeyan Ramasubramanian val |= DMA_TX_IRQ_EN | DMA_RX_IRQ_EN;
210eddac5afSKarthikeyan Ramasubramanian writel_relaxed(val, base + SE_IRQ_EN);
211eddac5afSKarthikeyan Ramasubramanian
212eddac5afSKarthikeyan Ramasubramanian val = readl_relaxed(base + SE_GENI_DMA_MODE_EN);
213eddac5afSKarthikeyan Ramasubramanian val &= ~GENI_DMA_MODE_EN;
214eddac5afSKarthikeyan Ramasubramanian writel_relaxed(val, base + SE_GENI_DMA_MODE_EN);
215eddac5afSKarthikeyan Ramasubramanian
216eddac5afSKarthikeyan Ramasubramanian writel_relaxed(0, base + SE_GSI_EVENT_EN);
217eddac5afSKarthikeyan Ramasubramanian }
218eddac5afSKarthikeyan Ramasubramanian
geni_se_io_init(void __iomem * base)219eddac5afSKarthikeyan Ramasubramanian static void geni_se_io_init(void __iomem *base)
220eddac5afSKarthikeyan Ramasubramanian {
221eddac5afSKarthikeyan Ramasubramanian u32 val;
222eddac5afSKarthikeyan Ramasubramanian
223eddac5afSKarthikeyan Ramasubramanian val = readl_relaxed(base + GENI_CGC_CTRL);
224eddac5afSKarthikeyan Ramasubramanian val |= DEFAULT_CGC_EN;
225eddac5afSKarthikeyan Ramasubramanian writel_relaxed(val, base + GENI_CGC_CTRL);
226eddac5afSKarthikeyan Ramasubramanian
227eddac5afSKarthikeyan Ramasubramanian val = readl_relaxed(base + SE_DMA_GENERAL_CFG);
228eddac5afSKarthikeyan Ramasubramanian val |= AHB_SEC_SLV_CLK_CGC_ON | DMA_AHB_SLV_CFG_ON;
229eddac5afSKarthikeyan Ramasubramanian val |= DMA_TX_CLK_CGC_ON | DMA_RX_CLK_CGC_ON;
230eddac5afSKarthikeyan Ramasubramanian writel_relaxed(val, base + SE_DMA_GENERAL_CFG);
231eddac5afSKarthikeyan Ramasubramanian
232eddac5afSKarthikeyan Ramasubramanian writel_relaxed(DEFAULT_IO_OUTPUT_CTRL_MSK, base + GENI_OUTPUT_CTRL);
233eddac5afSKarthikeyan Ramasubramanian writel_relaxed(FORCE_DEFAULT, base + GENI_FORCE_DEFAULT_REG);
234eddac5afSKarthikeyan Ramasubramanian }
235eddac5afSKarthikeyan Ramasubramanian
geni_se_irq_clear(struct geni_se * se)236279536a5SAlok Chauhan static void geni_se_irq_clear(struct geni_se *se)
237279536a5SAlok Chauhan {
238279536a5SAlok Chauhan writel_relaxed(0, se->base + SE_GSI_EVENT_EN);
239279536a5SAlok Chauhan writel_relaxed(0xffffffff, se->base + SE_GENI_M_IRQ_CLEAR);
240279536a5SAlok Chauhan writel_relaxed(0xffffffff, se->base + SE_GENI_S_IRQ_CLEAR);
241279536a5SAlok Chauhan writel_relaxed(0xffffffff, se->base + SE_DMA_TX_IRQ_CLR);
242279536a5SAlok Chauhan writel_relaxed(0xffffffff, se->base + SE_DMA_RX_IRQ_CLR);
243279536a5SAlok Chauhan writel_relaxed(0xffffffff, se->base + SE_IRQ_EN);
244279536a5SAlok Chauhan }
245279536a5SAlok Chauhan
246eddac5afSKarthikeyan Ramasubramanian /**
247eddac5afSKarthikeyan Ramasubramanian * geni_se_init() - Initialize the GENI serial engine
248eddac5afSKarthikeyan Ramasubramanian * @se: Pointer to the concerned serial engine.
249eddac5afSKarthikeyan Ramasubramanian * @rx_wm: Receive watermark, in units of FIFO words.
25008ad7061SLee Jones * @rx_rfr: Ready-for-receive watermark, in units of FIFO words.
251eddac5afSKarthikeyan Ramasubramanian *
252eddac5afSKarthikeyan Ramasubramanian * This function is used to initialize the GENI serial engine, configure
253eddac5afSKarthikeyan Ramasubramanian * receive watermark and ready-for-receive watermarks.
254eddac5afSKarthikeyan Ramasubramanian */
geni_se_init(struct geni_se * se,u32 rx_wm,u32 rx_rfr)255eddac5afSKarthikeyan Ramasubramanian void geni_se_init(struct geni_se *se, u32 rx_wm, u32 rx_rfr)
256eddac5afSKarthikeyan Ramasubramanian {
257eddac5afSKarthikeyan Ramasubramanian u32 val;
258eddac5afSKarthikeyan Ramasubramanian
259279536a5SAlok Chauhan geni_se_irq_clear(se);
260eddac5afSKarthikeyan Ramasubramanian geni_se_io_init(se->base);
261eddac5afSKarthikeyan Ramasubramanian geni_se_io_set_mode(se->base);
262eddac5afSKarthikeyan Ramasubramanian
263eddac5afSKarthikeyan Ramasubramanian writel_relaxed(rx_wm, se->base + SE_GENI_RX_WATERMARK_REG);
264eddac5afSKarthikeyan Ramasubramanian writel_relaxed(rx_rfr, se->base + SE_GENI_RX_RFR_WATERMARK_REG);
265eddac5afSKarthikeyan Ramasubramanian
266eddac5afSKarthikeyan Ramasubramanian val = readl_relaxed(se->base + SE_GENI_M_IRQ_EN);
267eddac5afSKarthikeyan Ramasubramanian val |= M_COMMON_GENI_M_IRQ_EN;
268eddac5afSKarthikeyan Ramasubramanian writel_relaxed(val, se->base + SE_GENI_M_IRQ_EN);
269eddac5afSKarthikeyan Ramasubramanian
270eddac5afSKarthikeyan Ramasubramanian val = readl_relaxed(se->base + SE_GENI_S_IRQ_EN);
271eddac5afSKarthikeyan Ramasubramanian val |= S_COMMON_GENI_S_IRQ_EN;
272eddac5afSKarthikeyan Ramasubramanian writel_relaxed(val, se->base + SE_GENI_S_IRQ_EN);
273eddac5afSKarthikeyan Ramasubramanian }
274*9b09c0f2SUnnathi Chalicheemala EXPORT_SYMBOL_GPL(geni_se_init);
275eddac5afSKarthikeyan Ramasubramanian
geni_se_select_fifo_mode(struct geni_se * se)276eddac5afSKarthikeyan Ramasubramanian static void geni_se_select_fifo_mode(struct geni_se *se)
277eddac5afSKarthikeyan Ramasubramanian {
278eddac5afSKarthikeyan Ramasubramanian u32 proto = geni_se_read_proto(se);
27980e8eaabSDouglas Anderson u32 val, val_old;
280eddac5afSKarthikeyan Ramasubramanian
281279536a5SAlok Chauhan geni_se_irq_clear(se);
282eddac5afSKarthikeyan Ramasubramanian
2835d85ea2cSVijaya Krishna Nivarthi /* UART driver manages enabling / disabling interrupts internally */
284eddac5afSKarthikeyan Ramasubramanian if (proto != GENI_SE_UART) {
2855d85ea2cSVijaya Krishna Nivarthi /* Non-UART use only primary sequencer so dont bother about S_IRQ */
28680e8eaabSDouglas Anderson val_old = val = readl_relaxed(se->base + SE_GENI_M_IRQ_EN);
287eddac5afSKarthikeyan Ramasubramanian val |= M_CMD_DONE_EN | M_TX_FIFO_WATERMARK_EN;
288eddac5afSKarthikeyan Ramasubramanian val |= M_RX_FIFO_WATERMARK_EN | M_RX_FIFO_LAST_EN;
28980e8eaabSDouglas Anderson if (val != val_old)
290eddac5afSKarthikeyan Ramasubramanian writel_relaxed(val, se->base + SE_GENI_M_IRQ_EN);
29180e8eaabSDouglas Anderson }
292eddac5afSKarthikeyan Ramasubramanian
29380e8eaabSDouglas Anderson val_old = val = readl_relaxed(se->base + SE_GENI_DMA_MODE_EN);
294eddac5afSKarthikeyan Ramasubramanian val &= ~GENI_DMA_MODE_EN;
29580e8eaabSDouglas Anderson if (val != val_old)
296eddac5afSKarthikeyan Ramasubramanian writel_relaxed(val, se->base + SE_GENI_DMA_MODE_EN);
297eddac5afSKarthikeyan Ramasubramanian }
298eddac5afSKarthikeyan Ramasubramanian
geni_se_select_dma_mode(struct geni_se * se)299eddac5afSKarthikeyan Ramasubramanian static void geni_se_select_dma_mode(struct geni_se *se)
300eddac5afSKarthikeyan Ramasubramanian {
3014b6ea87bSDouglas Anderson u32 proto = geni_se_read_proto(se);
30280e8eaabSDouglas Anderson u32 val, val_old;
303eddac5afSKarthikeyan Ramasubramanian
304279536a5SAlok Chauhan geni_se_irq_clear(se);
305eddac5afSKarthikeyan Ramasubramanian
3065d85ea2cSVijaya Krishna Nivarthi /* UART driver manages enabling / disabling interrupts internally */
3074b6ea87bSDouglas Anderson if (proto != GENI_SE_UART) {
3085d85ea2cSVijaya Krishna Nivarthi /* Non-UART use only primary sequencer so dont bother about S_IRQ */
30980e8eaabSDouglas Anderson val_old = val = readl_relaxed(se->base + SE_GENI_M_IRQ_EN);
3104b6ea87bSDouglas Anderson val &= ~(M_CMD_DONE_EN | M_TX_FIFO_WATERMARK_EN);
3114b6ea87bSDouglas Anderson val &= ~(M_RX_FIFO_WATERMARK_EN | M_RX_FIFO_LAST_EN);
31280e8eaabSDouglas Anderson if (val != val_old)
3134b6ea87bSDouglas Anderson writel_relaxed(val, se->base + SE_GENI_M_IRQ_EN);
31480e8eaabSDouglas Anderson }
3154b6ea87bSDouglas Anderson
31680e8eaabSDouglas Anderson val_old = val = readl_relaxed(se->base + SE_GENI_DMA_MODE_EN);
317eddac5afSKarthikeyan Ramasubramanian val |= GENI_DMA_MODE_EN;
31880e8eaabSDouglas Anderson if (val != val_old)
319eddac5afSKarthikeyan Ramasubramanian writel_relaxed(val, se->base + SE_GENI_DMA_MODE_EN);
320eddac5afSKarthikeyan Ramasubramanian }
321eddac5afSKarthikeyan Ramasubramanian
geni_se_select_gpi_mode(struct geni_se * se)3220fa82662SVinod Koul static void geni_se_select_gpi_mode(struct geni_se *se)
3230fa82662SVinod Koul {
3240fa82662SVinod Koul u32 val;
3250fa82662SVinod Koul
3260fa82662SVinod Koul geni_se_irq_clear(se);
3270fa82662SVinod Koul
3280fa82662SVinod Koul writel(0, se->base + SE_IRQ_EN);
3290fa82662SVinod Koul
3300fa82662SVinod Koul val = readl(se->base + SE_GENI_M_IRQ_EN);
3310fa82662SVinod Koul val &= ~(M_CMD_DONE_EN | M_TX_FIFO_WATERMARK_EN |
3320fa82662SVinod Koul M_RX_FIFO_WATERMARK_EN | M_RX_FIFO_LAST_EN);
3330fa82662SVinod Koul writel(val, se->base + SE_GENI_M_IRQ_EN);
3340fa82662SVinod Koul
3350fa82662SVinod Koul writel(GENI_DMA_MODE_EN, se->base + SE_GENI_DMA_MODE_EN);
3360fa82662SVinod Koul
3370fa82662SVinod Koul val = readl(se->base + SE_GSI_EVENT_EN);
3380fa82662SVinod Koul val |= (DMA_RX_EVENT_EN | DMA_TX_EVENT_EN | GENI_M_EVENT_EN | GENI_S_EVENT_EN);
3390fa82662SVinod Koul writel(val, se->base + SE_GSI_EVENT_EN);
3400fa82662SVinod Koul }
3410fa82662SVinod Koul
342eddac5afSKarthikeyan Ramasubramanian /**
343eddac5afSKarthikeyan Ramasubramanian * geni_se_select_mode() - Select the serial engine transfer mode
344eddac5afSKarthikeyan Ramasubramanian * @se: Pointer to the concerned serial engine.
345eddac5afSKarthikeyan Ramasubramanian * @mode: Transfer mode to be selected.
346eddac5afSKarthikeyan Ramasubramanian */
geni_se_select_mode(struct geni_se * se,enum geni_se_xfer_mode mode)347eddac5afSKarthikeyan Ramasubramanian void geni_se_select_mode(struct geni_se *se, enum geni_se_xfer_mode mode)
348eddac5afSKarthikeyan Ramasubramanian {
3490fa82662SVinod Koul WARN_ON(mode != GENI_SE_FIFO && mode != GENI_SE_DMA && mode != GENI_GPI_DMA);
350eddac5afSKarthikeyan Ramasubramanian
351eddac5afSKarthikeyan Ramasubramanian switch (mode) {
352eddac5afSKarthikeyan Ramasubramanian case GENI_SE_FIFO:
353eddac5afSKarthikeyan Ramasubramanian geni_se_select_fifo_mode(se);
354eddac5afSKarthikeyan Ramasubramanian break;
355eddac5afSKarthikeyan Ramasubramanian case GENI_SE_DMA:
356eddac5afSKarthikeyan Ramasubramanian geni_se_select_dma_mode(se);
357eddac5afSKarthikeyan Ramasubramanian break;
3580fa82662SVinod Koul case GENI_GPI_DMA:
3590fa82662SVinod Koul geni_se_select_gpi_mode(se);
3600fa82662SVinod Koul break;
361eddac5afSKarthikeyan Ramasubramanian case GENI_SE_INVALID:
362eddac5afSKarthikeyan Ramasubramanian default:
363eddac5afSKarthikeyan Ramasubramanian break;
364eddac5afSKarthikeyan Ramasubramanian }
365eddac5afSKarthikeyan Ramasubramanian }
366*9b09c0f2SUnnathi Chalicheemala EXPORT_SYMBOL_GPL(geni_se_select_mode);
367eddac5afSKarthikeyan Ramasubramanian
368eddac5afSKarthikeyan Ramasubramanian /**
369eddac5afSKarthikeyan Ramasubramanian * DOC: Overview
370eddac5afSKarthikeyan Ramasubramanian *
371eddac5afSKarthikeyan Ramasubramanian * GENI FIFO packing is highly configurable. TX/RX packing/unpacking consist
372eddac5afSKarthikeyan Ramasubramanian * of up to 4 operations, each operation represented by 4 configuration vectors
373eddac5afSKarthikeyan Ramasubramanian * of 10 bits programmed in GENI_TX_PACKING_CFG0 and GENI_TX_PACKING_CFG1 for
374eddac5afSKarthikeyan Ramasubramanian * TX FIFO and in GENI_RX_PACKING_CFG0 and GENI_RX_PACKING_CFG1 for RX FIFO.
375eddac5afSKarthikeyan Ramasubramanian * Refer to below examples for detailed bit-field description.
376eddac5afSKarthikeyan Ramasubramanian *
377eddac5afSKarthikeyan Ramasubramanian * Example 1: word_size = 7, packing_mode = 4 x 8, msb_to_lsb = 1
378eddac5afSKarthikeyan Ramasubramanian *
379eddac5afSKarthikeyan Ramasubramanian * +-----------+-------+-------+-------+-------+
380eddac5afSKarthikeyan Ramasubramanian * | | vec_0 | vec_1 | vec_2 | vec_3 |
381eddac5afSKarthikeyan Ramasubramanian * +-----------+-------+-------+-------+-------+
382eddac5afSKarthikeyan Ramasubramanian * | start | 0x6 | 0xe | 0x16 | 0x1e |
383eddac5afSKarthikeyan Ramasubramanian * | direction | 1 | 1 | 1 | 1 |
384eddac5afSKarthikeyan Ramasubramanian * | length | 6 | 6 | 6 | 6 |
385eddac5afSKarthikeyan Ramasubramanian * | stop | 0 | 0 | 0 | 1 |
386eddac5afSKarthikeyan Ramasubramanian * +-----------+-------+-------+-------+-------+
387eddac5afSKarthikeyan Ramasubramanian *
388eddac5afSKarthikeyan Ramasubramanian * Example 2: word_size = 15, packing_mode = 2 x 16, msb_to_lsb = 0
389eddac5afSKarthikeyan Ramasubramanian *
390eddac5afSKarthikeyan Ramasubramanian * +-----------+-------+-------+-------+-------+
391eddac5afSKarthikeyan Ramasubramanian * | | vec_0 | vec_1 | vec_2 | vec_3 |
392eddac5afSKarthikeyan Ramasubramanian * +-----------+-------+-------+-------+-------+
393eddac5afSKarthikeyan Ramasubramanian * | start | 0x0 | 0x8 | 0x10 | 0x18 |
394eddac5afSKarthikeyan Ramasubramanian * | direction | 0 | 0 | 0 | 0 |
395eddac5afSKarthikeyan Ramasubramanian * | length | 7 | 6 | 7 | 6 |
396eddac5afSKarthikeyan Ramasubramanian * | stop | 0 | 0 | 0 | 1 |
397eddac5afSKarthikeyan Ramasubramanian * +-----------+-------+-------+-------+-------+
398eddac5afSKarthikeyan Ramasubramanian *
399eddac5afSKarthikeyan Ramasubramanian * Example 3: word_size = 23, packing_mode = 1 x 32, msb_to_lsb = 1
400eddac5afSKarthikeyan Ramasubramanian *
401eddac5afSKarthikeyan Ramasubramanian * +-----------+-------+-------+-------+-------+
402eddac5afSKarthikeyan Ramasubramanian * | | vec_0 | vec_1 | vec_2 | vec_3 |
403eddac5afSKarthikeyan Ramasubramanian * +-----------+-------+-------+-------+-------+
404eddac5afSKarthikeyan Ramasubramanian * | start | 0x16 | 0xe | 0x6 | 0x0 |
405eddac5afSKarthikeyan Ramasubramanian * | direction | 1 | 1 | 1 | 1 |
406eddac5afSKarthikeyan Ramasubramanian * | length | 7 | 7 | 6 | 0 |
407eddac5afSKarthikeyan Ramasubramanian * | stop | 0 | 0 | 1 | 0 |
408eddac5afSKarthikeyan Ramasubramanian * +-----------+-------+-------+-------+-------+
409eddac5afSKarthikeyan Ramasubramanian *
410eddac5afSKarthikeyan Ramasubramanian */
411eddac5afSKarthikeyan Ramasubramanian
412eddac5afSKarthikeyan Ramasubramanian #define NUM_PACKING_VECTORS 4
413eddac5afSKarthikeyan Ramasubramanian #define PACKING_START_SHIFT 5
414eddac5afSKarthikeyan Ramasubramanian #define PACKING_DIR_SHIFT 4
415eddac5afSKarthikeyan Ramasubramanian #define PACKING_LEN_SHIFT 1
416eddac5afSKarthikeyan Ramasubramanian #define PACKING_STOP_BIT BIT(0)
417eddac5afSKarthikeyan Ramasubramanian #define PACKING_VECTOR_SHIFT 10
418eddac5afSKarthikeyan Ramasubramanian /**
419eddac5afSKarthikeyan Ramasubramanian * geni_se_config_packing() - Packing configuration of the serial engine
420eddac5afSKarthikeyan Ramasubramanian * @se: Pointer to the concerned serial engine
421eddac5afSKarthikeyan Ramasubramanian * @bpw: Bits of data per transfer word.
422eddac5afSKarthikeyan Ramasubramanian * @pack_words: Number of words per fifo element.
423eddac5afSKarthikeyan Ramasubramanian * @msb_to_lsb: Transfer from MSB to LSB or vice-versa.
424eddac5afSKarthikeyan Ramasubramanian * @tx_cfg: Flag to configure the TX Packing.
425eddac5afSKarthikeyan Ramasubramanian * @rx_cfg: Flag to configure the RX Packing.
426eddac5afSKarthikeyan Ramasubramanian *
427eddac5afSKarthikeyan Ramasubramanian * This function is used to configure the packing rules for the current
428eddac5afSKarthikeyan Ramasubramanian * transfer.
429eddac5afSKarthikeyan Ramasubramanian */
geni_se_config_packing(struct geni_se * se,int bpw,int pack_words,bool msb_to_lsb,bool tx_cfg,bool rx_cfg)430eddac5afSKarthikeyan Ramasubramanian void geni_se_config_packing(struct geni_se *se, int bpw, int pack_words,
431eddac5afSKarthikeyan Ramasubramanian bool msb_to_lsb, bool tx_cfg, bool rx_cfg)
432eddac5afSKarthikeyan Ramasubramanian {
433eddac5afSKarthikeyan Ramasubramanian u32 cfg0, cfg1, cfg[NUM_PACKING_VECTORS] = {0};
434eddac5afSKarthikeyan Ramasubramanian int len;
435eddac5afSKarthikeyan Ramasubramanian int temp_bpw = bpw;
436eddac5afSKarthikeyan Ramasubramanian int idx_start = msb_to_lsb ? bpw - 1 : 0;
437eddac5afSKarthikeyan Ramasubramanian int idx = idx_start;
438eddac5afSKarthikeyan Ramasubramanian int idx_delta = msb_to_lsb ? -BITS_PER_BYTE : BITS_PER_BYTE;
439eddac5afSKarthikeyan Ramasubramanian int ceil_bpw = ALIGN(bpw, BITS_PER_BYTE);
440eddac5afSKarthikeyan Ramasubramanian int iter = (ceil_bpw * pack_words) / BITS_PER_BYTE;
441eddac5afSKarthikeyan Ramasubramanian int i;
442eddac5afSKarthikeyan Ramasubramanian
443eddac5afSKarthikeyan Ramasubramanian if (iter <= 0 || iter > NUM_PACKING_VECTORS)
444eddac5afSKarthikeyan Ramasubramanian return;
445eddac5afSKarthikeyan Ramasubramanian
446eddac5afSKarthikeyan Ramasubramanian for (i = 0; i < iter; i++) {
447eddac5afSKarthikeyan Ramasubramanian len = min_t(int, temp_bpw, BITS_PER_BYTE) - 1;
448eddac5afSKarthikeyan Ramasubramanian cfg[i] = idx << PACKING_START_SHIFT;
449eddac5afSKarthikeyan Ramasubramanian cfg[i] |= msb_to_lsb << PACKING_DIR_SHIFT;
450eddac5afSKarthikeyan Ramasubramanian cfg[i] |= len << PACKING_LEN_SHIFT;
451eddac5afSKarthikeyan Ramasubramanian
452eddac5afSKarthikeyan Ramasubramanian if (temp_bpw <= BITS_PER_BYTE) {
453eddac5afSKarthikeyan Ramasubramanian idx = ((i + 1) * BITS_PER_BYTE) + idx_start;
454eddac5afSKarthikeyan Ramasubramanian temp_bpw = bpw;
455eddac5afSKarthikeyan Ramasubramanian } else {
456eddac5afSKarthikeyan Ramasubramanian idx = idx + idx_delta;
457eddac5afSKarthikeyan Ramasubramanian temp_bpw = temp_bpw - BITS_PER_BYTE;
458eddac5afSKarthikeyan Ramasubramanian }
459eddac5afSKarthikeyan Ramasubramanian }
460eddac5afSKarthikeyan Ramasubramanian cfg[iter - 1] |= PACKING_STOP_BIT;
461eddac5afSKarthikeyan Ramasubramanian cfg0 = cfg[0] | (cfg[1] << PACKING_VECTOR_SHIFT);
462eddac5afSKarthikeyan Ramasubramanian cfg1 = cfg[2] | (cfg[3] << PACKING_VECTOR_SHIFT);
463eddac5afSKarthikeyan Ramasubramanian
464eddac5afSKarthikeyan Ramasubramanian if (tx_cfg) {
465eddac5afSKarthikeyan Ramasubramanian writel_relaxed(cfg0, se->base + SE_GENI_TX_PACKING_CFG0);
466eddac5afSKarthikeyan Ramasubramanian writel_relaxed(cfg1, se->base + SE_GENI_TX_PACKING_CFG1);
467eddac5afSKarthikeyan Ramasubramanian }
468eddac5afSKarthikeyan Ramasubramanian if (rx_cfg) {
469eddac5afSKarthikeyan Ramasubramanian writel_relaxed(cfg0, se->base + SE_GENI_RX_PACKING_CFG0);
470eddac5afSKarthikeyan Ramasubramanian writel_relaxed(cfg1, se->base + SE_GENI_RX_PACKING_CFG1);
471eddac5afSKarthikeyan Ramasubramanian }
472eddac5afSKarthikeyan Ramasubramanian
473eddac5afSKarthikeyan Ramasubramanian /*
474eddac5afSKarthikeyan Ramasubramanian * Number of protocol words in each FIFO entry
475eddac5afSKarthikeyan Ramasubramanian * 0 - 4x8, four words in each entry, max word size of 8 bits
476eddac5afSKarthikeyan Ramasubramanian * 1 - 2x16, two words in each entry, max word size of 16 bits
477eddac5afSKarthikeyan Ramasubramanian * 2 - 1x32, one word in each entry, max word size of 32 bits
478eddac5afSKarthikeyan Ramasubramanian * 3 - undefined
479eddac5afSKarthikeyan Ramasubramanian */
480eddac5afSKarthikeyan Ramasubramanian if (pack_words || bpw == 32)
481eddac5afSKarthikeyan Ramasubramanian writel_relaxed(bpw / 16, se->base + SE_GENI_BYTE_GRAN);
482eddac5afSKarthikeyan Ramasubramanian }
483*9b09c0f2SUnnathi Chalicheemala EXPORT_SYMBOL_GPL(geni_se_config_packing);
484eddac5afSKarthikeyan Ramasubramanian
geni_se_clks_off(struct geni_se * se)485eddac5afSKarthikeyan Ramasubramanian static void geni_se_clks_off(struct geni_se *se)
486eddac5afSKarthikeyan Ramasubramanian {
487eddac5afSKarthikeyan Ramasubramanian struct geni_wrapper *wrapper = se->wrapper;
488eddac5afSKarthikeyan Ramasubramanian
489eddac5afSKarthikeyan Ramasubramanian clk_disable_unprepare(se->clk);
49063fc9af8SNeil Armstrong clk_bulk_disable_unprepare(wrapper->num_clks, wrapper->clks);
491eddac5afSKarthikeyan Ramasubramanian }
492eddac5afSKarthikeyan Ramasubramanian
493eddac5afSKarthikeyan Ramasubramanian /**
494eddac5afSKarthikeyan Ramasubramanian * geni_se_resources_off() - Turn off resources associated with the serial
495eddac5afSKarthikeyan Ramasubramanian * engine
496eddac5afSKarthikeyan Ramasubramanian * @se: Pointer to the concerned serial engine.
497eddac5afSKarthikeyan Ramasubramanian *
498eddac5afSKarthikeyan Ramasubramanian * Return: 0 on success, standard Linux error codes on failure/error.
499eddac5afSKarthikeyan Ramasubramanian */
geni_se_resources_off(struct geni_se * se)500eddac5afSKarthikeyan Ramasubramanian int geni_se_resources_off(struct geni_se *se)
501eddac5afSKarthikeyan Ramasubramanian {
502eddac5afSKarthikeyan Ramasubramanian int ret;
503eddac5afSKarthikeyan Ramasubramanian
5048bc529b2SLee Jones if (has_acpi_companion(se->dev))
5058bc529b2SLee Jones return 0;
5068bc529b2SLee Jones
507eddac5afSKarthikeyan Ramasubramanian ret = pinctrl_pm_select_sleep_state(se->dev);
508eddac5afSKarthikeyan Ramasubramanian if (ret)
509eddac5afSKarthikeyan Ramasubramanian return ret;
510eddac5afSKarthikeyan Ramasubramanian
511eddac5afSKarthikeyan Ramasubramanian geni_se_clks_off(se);
512eddac5afSKarthikeyan Ramasubramanian return 0;
513eddac5afSKarthikeyan Ramasubramanian }
514*9b09c0f2SUnnathi Chalicheemala EXPORT_SYMBOL_GPL(geni_se_resources_off);
515eddac5afSKarthikeyan Ramasubramanian
geni_se_clks_on(struct geni_se * se)516eddac5afSKarthikeyan Ramasubramanian static int geni_se_clks_on(struct geni_se *se)
517eddac5afSKarthikeyan Ramasubramanian {
518eddac5afSKarthikeyan Ramasubramanian int ret;
519eddac5afSKarthikeyan Ramasubramanian struct geni_wrapper *wrapper = se->wrapper;
520eddac5afSKarthikeyan Ramasubramanian
52163fc9af8SNeil Armstrong ret = clk_bulk_prepare_enable(wrapper->num_clks, wrapper->clks);
522eddac5afSKarthikeyan Ramasubramanian if (ret)
523eddac5afSKarthikeyan Ramasubramanian return ret;
524eddac5afSKarthikeyan Ramasubramanian
525eddac5afSKarthikeyan Ramasubramanian ret = clk_prepare_enable(se->clk);
526eddac5afSKarthikeyan Ramasubramanian if (ret)
52763fc9af8SNeil Armstrong clk_bulk_disable_unprepare(wrapper->num_clks, wrapper->clks);
528eddac5afSKarthikeyan Ramasubramanian return ret;
529eddac5afSKarthikeyan Ramasubramanian }
530eddac5afSKarthikeyan Ramasubramanian
531eddac5afSKarthikeyan Ramasubramanian /**
532eddac5afSKarthikeyan Ramasubramanian * geni_se_resources_on() - Turn on resources associated with the serial
533eddac5afSKarthikeyan Ramasubramanian * engine
534eddac5afSKarthikeyan Ramasubramanian * @se: Pointer to the concerned serial engine.
535eddac5afSKarthikeyan Ramasubramanian *
536eddac5afSKarthikeyan Ramasubramanian * Return: 0 on success, standard Linux error codes on failure/error.
537eddac5afSKarthikeyan Ramasubramanian */
geni_se_resources_on(struct geni_se * se)538eddac5afSKarthikeyan Ramasubramanian int geni_se_resources_on(struct geni_se *se)
539eddac5afSKarthikeyan Ramasubramanian {
540eddac5afSKarthikeyan Ramasubramanian int ret;
541eddac5afSKarthikeyan Ramasubramanian
5428bc529b2SLee Jones if (has_acpi_companion(se->dev))
5438bc529b2SLee Jones return 0;
5448bc529b2SLee Jones
545eddac5afSKarthikeyan Ramasubramanian ret = geni_se_clks_on(se);
546eddac5afSKarthikeyan Ramasubramanian if (ret)
547eddac5afSKarthikeyan Ramasubramanian return ret;
548eddac5afSKarthikeyan Ramasubramanian
549eddac5afSKarthikeyan Ramasubramanian ret = pinctrl_pm_select_default_state(se->dev);
550eddac5afSKarthikeyan Ramasubramanian if (ret)
551eddac5afSKarthikeyan Ramasubramanian geni_se_clks_off(se);
552eddac5afSKarthikeyan Ramasubramanian
553eddac5afSKarthikeyan Ramasubramanian return ret;
554eddac5afSKarthikeyan Ramasubramanian }
555*9b09c0f2SUnnathi Chalicheemala EXPORT_SYMBOL_GPL(geni_se_resources_on);
556eddac5afSKarthikeyan Ramasubramanian
557eddac5afSKarthikeyan Ramasubramanian /**
558eddac5afSKarthikeyan Ramasubramanian * geni_se_clk_tbl_get() - Get the clock table to program DFS
559eddac5afSKarthikeyan Ramasubramanian * @se: Pointer to the concerned serial engine.
560eddac5afSKarthikeyan Ramasubramanian * @tbl: Table in which the output is returned.
561eddac5afSKarthikeyan Ramasubramanian *
562eddac5afSKarthikeyan Ramasubramanian * This function is called by the protocol drivers to determine the different
563eddac5afSKarthikeyan Ramasubramanian * clock frequencies supported by serial engine core clock. The protocol
564eddac5afSKarthikeyan Ramasubramanian * drivers use the output to determine the clock frequency index to be
565eddac5afSKarthikeyan Ramasubramanian * programmed into DFS.
566eddac5afSKarthikeyan Ramasubramanian *
567eddac5afSKarthikeyan Ramasubramanian * Return: number of valid performance levels in the table on success,
568eddac5afSKarthikeyan Ramasubramanian * standard Linux error codes on failure.
569eddac5afSKarthikeyan Ramasubramanian */
geni_se_clk_tbl_get(struct geni_se * se,unsigned long ** tbl)570eddac5afSKarthikeyan Ramasubramanian int geni_se_clk_tbl_get(struct geni_se *se, unsigned long **tbl)
571eddac5afSKarthikeyan Ramasubramanian {
572abc1c944SDouglas Anderson long freq = 0;
573eddac5afSKarthikeyan Ramasubramanian int i;
574eddac5afSKarthikeyan Ramasubramanian
575eddac5afSKarthikeyan Ramasubramanian if (se->clk_perf_tbl) {
576eddac5afSKarthikeyan Ramasubramanian *tbl = se->clk_perf_tbl;
577eddac5afSKarthikeyan Ramasubramanian return se->num_clk_levels;
578eddac5afSKarthikeyan Ramasubramanian }
579eddac5afSKarthikeyan Ramasubramanian
580eddac5afSKarthikeyan Ramasubramanian se->clk_perf_tbl = devm_kcalloc(se->dev, MAX_CLK_PERF_LEVEL,
581eddac5afSKarthikeyan Ramasubramanian sizeof(*se->clk_perf_tbl),
582eddac5afSKarthikeyan Ramasubramanian GFP_KERNEL);
583eddac5afSKarthikeyan Ramasubramanian if (!se->clk_perf_tbl)
584eddac5afSKarthikeyan Ramasubramanian return -ENOMEM;
585eddac5afSKarthikeyan Ramasubramanian
586eddac5afSKarthikeyan Ramasubramanian for (i = 0; i < MAX_CLK_PERF_LEVEL; i++) {
587eddac5afSKarthikeyan Ramasubramanian freq = clk_round_rate(se->clk, freq + 1);
588abc1c944SDouglas Anderson if (freq <= 0 || freq == se->clk_perf_tbl[i - 1])
589eddac5afSKarthikeyan Ramasubramanian break;
590eddac5afSKarthikeyan Ramasubramanian se->clk_perf_tbl[i] = freq;
591eddac5afSKarthikeyan Ramasubramanian }
592eddac5afSKarthikeyan Ramasubramanian se->num_clk_levels = i;
593eddac5afSKarthikeyan Ramasubramanian *tbl = se->clk_perf_tbl;
594eddac5afSKarthikeyan Ramasubramanian return se->num_clk_levels;
595eddac5afSKarthikeyan Ramasubramanian }
596*9b09c0f2SUnnathi Chalicheemala EXPORT_SYMBOL_GPL(geni_se_clk_tbl_get);
597eddac5afSKarthikeyan Ramasubramanian
598eddac5afSKarthikeyan Ramasubramanian /**
599eddac5afSKarthikeyan Ramasubramanian * geni_se_clk_freq_match() - Get the matching or closest SE clock frequency
600eddac5afSKarthikeyan Ramasubramanian * @se: Pointer to the concerned serial engine.
601eddac5afSKarthikeyan Ramasubramanian * @req_freq: Requested clock frequency.
602eddac5afSKarthikeyan Ramasubramanian * @index: Index of the resultant frequency in the table.
603969fc78cSDouglas Anderson * @res_freq: Resultant frequency of the source clock.
604eddac5afSKarthikeyan Ramasubramanian * @exact: Flag to indicate exact multiple requirement of the requested
605eddac5afSKarthikeyan Ramasubramanian * frequency.
606eddac5afSKarthikeyan Ramasubramanian *
607969fc78cSDouglas Anderson * This function is called by the protocol drivers to determine the best match
608969fc78cSDouglas Anderson * of the requested frequency as provided by the serial engine clock in order
609969fc78cSDouglas Anderson * to meet the performance requirements.
610969fc78cSDouglas Anderson *
611969fc78cSDouglas Anderson * If we return success:
612969fc78cSDouglas Anderson * - if @exact is true then @res_freq / <an_integer> == @req_freq
613969fc78cSDouglas Anderson * - if @exact is false then @res_freq / <an_integer> <= @req_freq
614eddac5afSKarthikeyan Ramasubramanian *
615eddac5afSKarthikeyan Ramasubramanian * Return: 0 on success, standard Linux error codes on failure.
616eddac5afSKarthikeyan Ramasubramanian */
geni_se_clk_freq_match(struct geni_se * se,unsigned long req_freq,unsigned int * index,unsigned long * res_freq,bool exact)617eddac5afSKarthikeyan Ramasubramanian int geni_se_clk_freq_match(struct geni_se *se, unsigned long req_freq,
618eddac5afSKarthikeyan Ramasubramanian unsigned int *index, unsigned long *res_freq,
619eddac5afSKarthikeyan Ramasubramanian bool exact)
620eddac5afSKarthikeyan Ramasubramanian {
621eddac5afSKarthikeyan Ramasubramanian unsigned long *tbl;
622eddac5afSKarthikeyan Ramasubramanian int num_clk_levels;
623eddac5afSKarthikeyan Ramasubramanian int i;
624969fc78cSDouglas Anderson unsigned long best_delta;
625969fc78cSDouglas Anderson unsigned long new_delta;
626969fc78cSDouglas Anderson unsigned int divider;
627eddac5afSKarthikeyan Ramasubramanian
628eddac5afSKarthikeyan Ramasubramanian num_clk_levels = geni_se_clk_tbl_get(se, &tbl);
629eddac5afSKarthikeyan Ramasubramanian if (num_clk_levels < 0)
630eddac5afSKarthikeyan Ramasubramanian return num_clk_levels;
631eddac5afSKarthikeyan Ramasubramanian
632eddac5afSKarthikeyan Ramasubramanian if (num_clk_levels == 0)
633eddac5afSKarthikeyan Ramasubramanian return -EINVAL;
634eddac5afSKarthikeyan Ramasubramanian
635969fc78cSDouglas Anderson best_delta = ULONG_MAX;
636eddac5afSKarthikeyan Ramasubramanian for (i = 0; i < num_clk_levels; i++) {
637969fc78cSDouglas Anderson divider = DIV_ROUND_UP(tbl[i], req_freq);
638969fc78cSDouglas Anderson new_delta = req_freq - tbl[i] / divider;
639969fc78cSDouglas Anderson if (new_delta < best_delta) {
640969fc78cSDouglas Anderson /* We have a new best! */
641eddac5afSKarthikeyan Ramasubramanian *index = i;
642eddac5afSKarthikeyan Ramasubramanian *res_freq = tbl[i];
643eddac5afSKarthikeyan Ramasubramanian
644969fc78cSDouglas Anderson /* If the new best is exact then we're done */
645969fc78cSDouglas Anderson if (new_delta == 0)
646969fc78cSDouglas Anderson return 0;
647969fc78cSDouglas Anderson
648969fc78cSDouglas Anderson /* Record how close we got */
649969fc78cSDouglas Anderson best_delta = new_delta;
650eddac5afSKarthikeyan Ramasubramanian }
651eddac5afSKarthikeyan Ramasubramanian }
652eddac5afSKarthikeyan Ramasubramanian
653eddac5afSKarthikeyan Ramasubramanian if (exact)
654eddac5afSKarthikeyan Ramasubramanian return -EINVAL;
655eddac5afSKarthikeyan Ramasubramanian
656eddac5afSKarthikeyan Ramasubramanian return 0;
657eddac5afSKarthikeyan Ramasubramanian }
658*9b09c0f2SUnnathi Chalicheemala EXPORT_SYMBOL_GPL(geni_se_clk_freq_match);
659eddac5afSKarthikeyan Ramasubramanian
660eddac5afSKarthikeyan Ramasubramanian #define GENI_SE_DMA_DONE_EN BIT(0)
661eddac5afSKarthikeyan Ramasubramanian #define GENI_SE_DMA_EOT_EN BIT(1)
662eddac5afSKarthikeyan Ramasubramanian #define GENI_SE_DMA_AHB_ERR_EN BIT(2)
663eddac5afSKarthikeyan Ramasubramanian #define GENI_SE_DMA_EOT_BUF BIT(0)
6646d6e5759SVijaya Krishna Nivarthi
6656d6e5759SVijaya Krishna Nivarthi /**
6666d6e5759SVijaya Krishna Nivarthi * geni_se_tx_init_dma() - Initiate TX DMA transfer on the serial engine
6676d6e5759SVijaya Krishna Nivarthi * @se: Pointer to the concerned serial engine.
6686d6e5759SVijaya Krishna Nivarthi * @iova: Mapped DMA address.
6696d6e5759SVijaya Krishna Nivarthi * @len: Length of the TX buffer.
6706d6e5759SVijaya Krishna Nivarthi *
6716d6e5759SVijaya Krishna Nivarthi * This function is used to initiate DMA TX transfer.
6726d6e5759SVijaya Krishna Nivarthi */
geni_se_tx_init_dma(struct geni_se * se,dma_addr_t iova,size_t len)6736d6e5759SVijaya Krishna Nivarthi void geni_se_tx_init_dma(struct geni_se *se, dma_addr_t iova, size_t len)
6746d6e5759SVijaya Krishna Nivarthi {
6756d6e5759SVijaya Krishna Nivarthi u32 val;
6766d6e5759SVijaya Krishna Nivarthi
6776d6e5759SVijaya Krishna Nivarthi val = GENI_SE_DMA_DONE_EN;
6786d6e5759SVijaya Krishna Nivarthi val |= GENI_SE_DMA_EOT_EN;
6796d6e5759SVijaya Krishna Nivarthi val |= GENI_SE_DMA_AHB_ERR_EN;
6806d6e5759SVijaya Krishna Nivarthi writel_relaxed(val, se->base + SE_DMA_TX_IRQ_EN_SET);
6816d6e5759SVijaya Krishna Nivarthi writel_relaxed(lower_32_bits(iova), se->base + SE_DMA_TX_PTR_L);
6826d6e5759SVijaya Krishna Nivarthi writel_relaxed(upper_32_bits(iova), se->base + SE_DMA_TX_PTR_H);
6836d6e5759SVijaya Krishna Nivarthi writel_relaxed(GENI_SE_DMA_EOT_BUF, se->base + SE_DMA_TX_ATTR);
6846d6e5759SVijaya Krishna Nivarthi writel(len, se->base + SE_DMA_TX_LEN);
6856d6e5759SVijaya Krishna Nivarthi }
686*9b09c0f2SUnnathi Chalicheemala EXPORT_SYMBOL_GPL(geni_se_tx_init_dma);
6876d6e5759SVijaya Krishna Nivarthi
688eddac5afSKarthikeyan Ramasubramanian /**
689eddac5afSKarthikeyan Ramasubramanian * geni_se_tx_dma_prep() - Prepare the serial engine for TX DMA transfer
690eddac5afSKarthikeyan Ramasubramanian * @se: Pointer to the concerned serial engine.
691eddac5afSKarthikeyan Ramasubramanian * @buf: Pointer to the TX buffer.
692eddac5afSKarthikeyan Ramasubramanian * @len: Length of the TX buffer.
693eddac5afSKarthikeyan Ramasubramanian * @iova: Pointer to store the mapped DMA address.
694eddac5afSKarthikeyan Ramasubramanian *
695eddac5afSKarthikeyan Ramasubramanian * This function is used to prepare the buffers for DMA TX.
696eddac5afSKarthikeyan Ramasubramanian *
697eddac5afSKarthikeyan Ramasubramanian * Return: 0 on success, standard Linux error codes on failure.
698eddac5afSKarthikeyan Ramasubramanian */
geni_se_tx_dma_prep(struct geni_se * se,void * buf,size_t len,dma_addr_t * iova)699eddac5afSKarthikeyan Ramasubramanian int geni_se_tx_dma_prep(struct geni_se *se, void *buf, size_t len,
700eddac5afSKarthikeyan Ramasubramanian dma_addr_t *iova)
701eddac5afSKarthikeyan Ramasubramanian {
702eddac5afSKarthikeyan Ramasubramanian struct geni_wrapper *wrapper = se->wrapper;
703eddac5afSKarthikeyan Ramasubramanian
7048928e917SLee Jones if (!wrapper)
7058928e917SLee Jones return -EINVAL;
7068928e917SLee Jones
707eddac5afSKarthikeyan Ramasubramanian *iova = dma_map_single(wrapper->dev, buf, len, DMA_TO_DEVICE);
708eddac5afSKarthikeyan Ramasubramanian if (dma_mapping_error(wrapper->dev, *iova))
709eddac5afSKarthikeyan Ramasubramanian return -EIO;
710eddac5afSKarthikeyan Ramasubramanian
7116d6e5759SVijaya Krishna Nivarthi geni_se_tx_init_dma(se, *iova, len);
712eddac5afSKarthikeyan Ramasubramanian return 0;
713eddac5afSKarthikeyan Ramasubramanian }
714*9b09c0f2SUnnathi Chalicheemala EXPORT_SYMBOL_GPL(geni_se_tx_dma_prep);
715eddac5afSKarthikeyan Ramasubramanian
716eddac5afSKarthikeyan Ramasubramanian /**
7176d6e5759SVijaya Krishna Nivarthi * geni_se_rx_init_dma() - Initiate RX DMA transfer on the serial engine
7186d6e5759SVijaya Krishna Nivarthi * @se: Pointer to the concerned serial engine.
7196d6e5759SVijaya Krishna Nivarthi * @iova: Mapped DMA address.
7206d6e5759SVijaya Krishna Nivarthi * @len: Length of the RX buffer.
7216d6e5759SVijaya Krishna Nivarthi *
7226d6e5759SVijaya Krishna Nivarthi * This function is used to initiate DMA RX transfer.
7236d6e5759SVijaya Krishna Nivarthi */
geni_se_rx_init_dma(struct geni_se * se,dma_addr_t iova,size_t len)7246d6e5759SVijaya Krishna Nivarthi void geni_se_rx_init_dma(struct geni_se *se, dma_addr_t iova, size_t len)
7256d6e5759SVijaya Krishna Nivarthi {
7266d6e5759SVijaya Krishna Nivarthi u32 val;
7276d6e5759SVijaya Krishna Nivarthi
7286d6e5759SVijaya Krishna Nivarthi val = GENI_SE_DMA_DONE_EN;
7296d6e5759SVijaya Krishna Nivarthi val |= GENI_SE_DMA_EOT_EN;
7306d6e5759SVijaya Krishna Nivarthi val |= GENI_SE_DMA_AHB_ERR_EN;
7316d6e5759SVijaya Krishna Nivarthi writel_relaxed(val, se->base + SE_DMA_RX_IRQ_EN_SET);
7326d6e5759SVijaya Krishna Nivarthi writel_relaxed(lower_32_bits(iova), se->base + SE_DMA_RX_PTR_L);
7336d6e5759SVijaya Krishna Nivarthi writel_relaxed(upper_32_bits(iova), se->base + SE_DMA_RX_PTR_H);
7346d6e5759SVijaya Krishna Nivarthi /* RX does not have EOT buffer type bit. So just reset RX_ATTR */
7356d6e5759SVijaya Krishna Nivarthi writel_relaxed(0, se->base + SE_DMA_RX_ATTR);
7366d6e5759SVijaya Krishna Nivarthi writel(len, se->base + SE_DMA_RX_LEN);
7376d6e5759SVijaya Krishna Nivarthi }
738*9b09c0f2SUnnathi Chalicheemala EXPORT_SYMBOL_GPL(geni_se_rx_init_dma);
7396d6e5759SVijaya Krishna Nivarthi
7406d6e5759SVijaya Krishna Nivarthi /**
741eddac5afSKarthikeyan Ramasubramanian * geni_se_rx_dma_prep() - Prepare the serial engine for RX DMA transfer
742eddac5afSKarthikeyan Ramasubramanian * @se: Pointer to the concerned serial engine.
743eddac5afSKarthikeyan Ramasubramanian * @buf: Pointer to the RX buffer.
744eddac5afSKarthikeyan Ramasubramanian * @len: Length of the RX buffer.
745eddac5afSKarthikeyan Ramasubramanian * @iova: Pointer to store the mapped DMA address.
746eddac5afSKarthikeyan Ramasubramanian *
747eddac5afSKarthikeyan Ramasubramanian * This function is used to prepare the buffers for DMA RX.
748eddac5afSKarthikeyan Ramasubramanian *
749eddac5afSKarthikeyan Ramasubramanian * Return: 0 on success, standard Linux error codes on failure.
750eddac5afSKarthikeyan Ramasubramanian */
geni_se_rx_dma_prep(struct geni_se * se,void * buf,size_t len,dma_addr_t * iova)751eddac5afSKarthikeyan Ramasubramanian int geni_se_rx_dma_prep(struct geni_se *se, void *buf, size_t len,
752eddac5afSKarthikeyan Ramasubramanian dma_addr_t *iova)
753eddac5afSKarthikeyan Ramasubramanian {
754eddac5afSKarthikeyan Ramasubramanian struct geni_wrapper *wrapper = se->wrapper;
755eddac5afSKarthikeyan Ramasubramanian
7568928e917SLee Jones if (!wrapper)
7578928e917SLee Jones return -EINVAL;
7588928e917SLee Jones
759eddac5afSKarthikeyan Ramasubramanian *iova = dma_map_single(wrapper->dev, buf, len, DMA_FROM_DEVICE);
760eddac5afSKarthikeyan Ramasubramanian if (dma_mapping_error(wrapper->dev, *iova))
761eddac5afSKarthikeyan Ramasubramanian return -EIO;
762eddac5afSKarthikeyan Ramasubramanian
7636d6e5759SVijaya Krishna Nivarthi geni_se_rx_init_dma(se, *iova, len);
764eddac5afSKarthikeyan Ramasubramanian return 0;
765eddac5afSKarthikeyan Ramasubramanian }
766*9b09c0f2SUnnathi Chalicheemala EXPORT_SYMBOL_GPL(geni_se_rx_dma_prep);
767eddac5afSKarthikeyan Ramasubramanian
768eddac5afSKarthikeyan Ramasubramanian /**
769eddac5afSKarthikeyan Ramasubramanian * geni_se_tx_dma_unprep() - Unprepare the serial engine after TX DMA transfer
770eddac5afSKarthikeyan Ramasubramanian * @se: Pointer to the concerned serial engine.
771eddac5afSKarthikeyan Ramasubramanian * @iova: DMA address of the TX buffer.
772eddac5afSKarthikeyan Ramasubramanian * @len: Length of the TX buffer.
773eddac5afSKarthikeyan Ramasubramanian *
774eddac5afSKarthikeyan Ramasubramanian * This function is used to unprepare the DMA buffers after DMA TX.
775eddac5afSKarthikeyan Ramasubramanian */
geni_se_tx_dma_unprep(struct geni_se * se,dma_addr_t iova,size_t len)776eddac5afSKarthikeyan Ramasubramanian void geni_se_tx_dma_unprep(struct geni_se *se, dma_addr_t iova, size_t len)
777eddac5afSKarthikeyan Ramasubramanian {
778eddac5afSKarthikeyan Ramasubramanian struct geni_wrapper *wrapper = se->wrapper;
779eddac5afSKarthikeyan Ramasubramanian
780c16756c1SRoja Rani Yarubandi if (!dma_mapping_error(wrapper->dev, iova))
781eddac5afSKarthikeyan Ramasubramanian dma_unmap_single(wrapper->dev, iova, len, DMA_TO_DEVICE);
782eddac5afSKarthikeyan Ramasubramanian }
783*9b09c0f2SUnnathi Chalicheemala EXPORT_SYMBOL_GPL(geni_se_tx_dma_unprep);
784eddac5afSKarthikeyan Ramasubramanian
785eddac5afSKarthikeyan Ramasubramanian /**
786eddac5afSKarthikeyan Ramasubramanian * geni_se_rx_dma_unprep() - Unprepare the serial engine after RX DMA transfer
787eddac5afSKarthikeyan Ramasubramanian * @se: Pointer to the concerned serial engine.
788eddac5afSKarthikeyan Ramasubramanian * @iova: DMA address of the RX buffer.
789eddac5afSKarthikeyan Ramasubramanian * @len: Length of the RX buffer.
790eddac5afSKarthikeyan Ramasubramanian *
791eddac5afSKarthikeyan Ramasubramanian * This function is used to unprepare the DMA buffers after DMA RX.
792eddac5afSKarthikeyan Ramasubramanian */
geni_se_rx_dma_unprep(struct geni_se * se,dma_addr_t iova,size_t len)793eddac5afSKarthikeyan Ramasubramanian void geni_se_rx_dma_unprep(struct geni_se *se, dma_addr_t iova, size_t len)
794eddac5afSKarthikeyan Ramasubramanian {
795eddac5afSKarthikeyan Ramasubramanian struct geni_wrapper *wrapper = se->wrapper;
796eddac5afSKarthikeyan Ramasubramanian
797c16756c1SRoja Rani Yarubandi if (!dma_mapping_error(wrapper->dev, iova))
798eddac5afSKarthikeyan Ramasubramanian dma_unmap_single(wrapper->dev, iova, len, DMA_FROM_DEVICE);
799eddac5afSKarthikeyan Ramasubramanian }
800*9b09c0f2SUnnathi Chalicheemala EXPORT_SYMBOL_GPL(geni_se_rx_dma_unprep);
801eddac5afSKarthikeyan Ramasubramanian
geni_icc_get(struct geni_se * se,const char * icc_ddr)80258ffbba6SAkash Asthana int geni_icc_get(struct geni_se *se, const char *icc_ddr)
80358ffbba6SAkash Asthana {
80458ffbba6SAkash Asthana int i, err;
80558ffbba6SAkash Asthana const char *icc_names[] = {"qup-core", "qup-config", icc_ddr};
80658ffbba6SAkash Asthana
8070c9fdcdbSShawn Guo if (has_acpi_companion(se->dev))
8080c9fdcdbSShawn Guo return 0;
8090c9fdcdbSShawn Guo
81058ffbba6SAkash Asthana for (i = 0; i < ARRAY_SIZE(se->icc_paths); i++) {
81158ffbba6SAkash Asthana if (!icc_names[i])
81258ffbba6SAkash Asthana continue;
81358ffbba6SAkash Asthana
81458ffbba6SAkash Asthana se->icc_paths[i].path = devm_of_icc_get(se->dev, icc_names[i]);
81558ffbba6SAkash Asthana if (IS_ERR(se->icc_paths[i].path))
81658ffbba6SAkash Asthana goto err;
81758ffbba6SAkash Asthana }
81858ffbba6SAkash Asthana
81958ffbba6SAkash Asthana return 0;
82058ffbba6SAkash Asthana
82158ffbba6SAkash Asthana err:
82258ffbba6SAkash Asthana err = PTR_ERR(se->icc_paths[i].path);
82358ffbba6SAkash Asthana if (err != -EPROBE_DEFER)
82458ffbba6SAkash Asthana dev_err_ratelimited(se->dev, "Failed to get ICC path '%s': %d\n",
82558ffbba6SAkash Asthana icc_names[i], err);
82658ffbba6SAkash Asthana return err;
82758ffbba6SAkash Asthana
82858ffbba6SAkash Asthana }
829*9b09c0f2SUnnathi Chalicheemala EXPORT_SYMBOL_GPL(geni_icc_get);
83058ffbba6SAkash Asthana
geni_icc_set_bw(struct geni_se * se)83158ffbba6SAkash Asthana int geni_icc_set_bw(struct geni_se *se)
83258ffbba6SAkash Asthana {
83358ffbba6SAkash Asthana int i, ret;
83458ffbba6SAkash Asthana
83558ffbba6SAkash Asthana for (i = 0; i < ARRAY_SIZE(se->icc_paths); i++) {
83658ffbba6SAkash Asthana ret = icc_set_bw(se->icc_paths[i].path,
83758ffbba6SAkash Asthana se->icc_paths[i].avg_bw, se->icc_paths[i].avg_bw);
83858ffbba6SAkash Asthana if (ret) {
83958ffbba6SAkash Asthana dev_err_ratelimited(se->dev, "ICC BW voting failed on path '%s': %d\n",
84058ffbba6SAkash Asthana icc_path_names[i], ret);
84158ffbba6SAkash Asthana return ret;
84258ffbba6SAkash Asthana }
84358ffbba6SAkash Asthana }
84458ffbba6SAkash Asthana
84558ffbba6SAkash Asthana return 0;
84658ffbba6SAkash Asthana }
847*9b09c0f2SUnnathi Chalicheemala EXPORT_SYMBOL_GPL(geni_icc_set_bw);
84858ffbba6SAkash Asthana
geni_icc_set_tag(struct geni_se * se,u32 tag)8494a3107f6SRajendra Nayak void geni_icc_set_tag(struct geni_se *se, u32 tag)
8504a3107f6SRajendra Nayak {
8514a3107f6SRajendra Nayak int i;
8524a3107f6SRajendra Nayak
8534a3107f6SRajendra Nayak for (i = 0; i < ARRAY_SIZE(se->icc_paths); i++)
8544a3107f6SRajendra Nayak icc_set_tag(se->icc_paths[i].path, tag);
8554a3107f6SRajendra Nayak }
856*9b09c0f2SUnnathi Chalicheemala EXPORT_SYMBOL_GPL(geni_icc_set_tag);
8574a3107f6SRajendra Nayak
85858ffbba6SAkash Asthana /* To do: Replace this by icc_bulk_enable once it's implemented in ICC core */
geni_icc_enable(struct geni_se * se)85958ffbba6SAkash Asthana int geni_icc_enable(struct geni_se *se)
86058ffbba6SAkash Asthana {
86158ffbba6SAkash Asthana int i, ret;
86258ffbba6SAkash Asthana
86358ffbba6SAkash Asthana for (i = 0; i < ARRAY_SIZE(se->icc_paths); i++) {
86458ffbba6SAkash Asthana ret = icc_enable(se->icc_paths[i].path);
86558ffbba6SAkash Asthana if (ret) {
86658ffbba6SAkash Asthana dev_err_ratelimited(se->dev, "ICC enable failed on path '%s': %d\n",
86758ffbba6SAkash Asthana icc_path_names[i], ret);
86858ffbba6SAkash Asthana return ret;
86958ffbba6SAkash Asthana }
87058ffbba6SAkash Asthana }
87158ffbba6SAkash Asthana
87258ffbba6SAkash Asthana return 0;
87358ffbba6SAkash Asthana }
874*9b09c0f2SUnnathi Chalicheemala EXPORT_SYMBOL_GPL(geni_icc_enable);
87558ffbba6SAkash Asthana
geni_icc_disable(struct geni_se * se)87658ffbba6SAkash Asthana int geni_icc_disable(struct geni_se *se)
87758ffbba6SAkash Asthana {
87858ffbba6SAkash Asthana int i, ret;
87958ffbba6SAkash Asthana
88058ffbba6SAkash Asthana for (i = 0; i < ARRAY_SIZE(se->icc_paths); i++) {
88158ffbba6SAkash Asthana ret = icc_disable(se->icc_paths[i].path);
88258ffbba6SAkash Asthana if (ret) {
88358ffbba6SAkash Asthana dev_err_ratelimited(se->dev, "ICC disable failed on path '%s': %d\n",
88458ffbba6SAkash Asthana icc_path_names[i], ret);
88558ffbba6SAkash Asthana return ret;
88658ffbba6SAkash Asthana }
88758ffbba6SAkash Asthana }
88858ffbba6SAkash Asthana
88958ffbba6SAkash Asthana return 0;
89058ffbba6SAkash Asthana }
891*9b09c0f2SUnnathi Chalicheemala EXPORT_SYMBOL_GPL(geni_icc_disable);
89258ffbba6SAkash Asthana
geni_se_probe(struct platform_device * pdev)893eddac5afSKarthikeyan Ramasubramanian static int geni_se_probe(struct platform_device *pdev)
894eddac5afSKarthikeyan Ramasubramanian {
895eddac5afSKarthikeyan Ramasubramanian struct device *dev = &pdev->dev;
896eddac5afSKarthikeyan Ramasubramanian struct geni_wrapper *wrapper;
897eddac5afSKarthikeyan Ramasubramanian int ret;
898eddac5afSKarthikeyan Ramasubramanian
899eddac5afSKarthikeyan Ramasubramanian wrapper = devm_kzalloc(dev, sizeof(*wrapper), GFP_KERNEL);
900eddac5afSKarthikeyan Ramasubramanian if (!wrapper)
901eddac5afSKarthikeyan Ramasubramanian return -ENOMEM;
902eddac5afSKarthikeyan Ramasubramanian
903eddac5afSKarthikeyan Ramasubramanian wrapper->dev = dev;
904d21dc0beSCai Huoqing wrapper->base = devm_platform_ioremap_resource(pdev, 0);
905eddac5afSKarthikeyan Ramasubramanian if (IS_ERR(wrapper->base))
906eddac5afSKarthikeyan Ramasubramanian return PTR_ERR(wrapper->base);
907eddac5afSKarthikeyan Ramasubramanian
9088bc529b2SLee Jones if (!has_acpi_companion(&pdev->dev)) {
90963fc9af8SNeil Armstrong const struct geni_se_desc *desc;
91063fc9af8SNeil Armstrong int i;
91163fc9af8SNeil Armstrong
91263fc9af8SNeil Armstrong desc = device_get_match_data(&pdev->dev);
91363fc9af8SNeil Armstrong if (!desc)
91463fc9af8SNeil Armstrong return -EINVAL;
91563fc9af8SNeil Armstrong
91663fc9af8SNeil Armstrong wrapper->num_clks = min_t(unsigned int, desc->num_clks, MAX_CLKS);
91763fc9af8SNeil Armstrong
91863fc9af8SNeil Armstrong for (i = 0; i < wrapper->num_clks; ++i)
91963fc9af8SNeil Armstrong wrapper->clks[i].id = desc->clks[i];
92063fc9af8SNeil Armstrong
92163fc9af8SNeil Armstrong ret = of_count_phandle_with_args(dev->of_node, "clocks", "#clock-cells");
92263fc9af8SNeil Armstrong if (ret < 0) {
92363fc9af8SNeil Armstrong dev_err(dev, "invalid clocks property at %pOF\n", dev->of_node);
92463fc9af8SNeil Armstrong return ret;
92563fc9af8SNeil Armstrong }
92663fc9af8SNeil Armstrong
92763fc9af8SNeil Armstrong if (ret < wrapper->num_clks) {
92863fc9af8SNeil Armstrong dev_err(dev, "invalid clocks count at %pOF, expected %d entries\n",
92963fc9af8SNeil Armstrong dev->of_node, wrapper->num_clks);
93063fc9af8SNeil Armstrong return -EINVAL;
93163fc9af8SNeil Armstrong }
93263fc9af8SNeil Armstrong
93363fc9af8SNeil Armstrong ret = devm_clk_bulk_get(dev, wrapper->num_clks, wrapper->clks);
934eddac5afSKarthikeyan Ramasubramanian if (ret) {
93563fc9af8SNeil Armstrong dev_err(dev, "Err getting clks %d\n", ret);
936eddac5afSKarthikeyan Ramasubramanian return ret;
937eddac5afSKarthikeyan Ramasubramanian }
9388bc529b2SLee Jones }
939eddac5afSKarthikeyan Ramasubramanian
940eddac5afSKarthikeyan Ramasubramanian dev_set_drvdata(dev, wrapper);
941eddac5afSKarthikeyan Ramasubramanian dev_dbg(dev, "GENI SE Driver probed\n");
942eddac5afSKarthikeyan Ramasubramanian return devm_of_platform_populate(dev);
943eddac5afSKarthikeyan Ramasubramanian }
944eddac5afSKarthikeyan Ramasubramanian
94563fc9af8SNeil Armstrong static const char * const qup_clks[] = {
94663fc9af8SNeil Armstrong "m-ahb",
94763fc9af8SNeil Armstrong "s-ahb",
94863fc9af8SNeil Armstrong };
94963fc9af8SNeil Armstrong
95063fc9af8SNeil Armstrong static const struct geni_se_desc qup_desc = {
95163fc9af8SNeil Armstrong .clks = qup_clks,
95263fc9af8SNeil Armstrong .num_clks = ARRAY_SIZE(qup_clks),
95363fc9af8SNeil Armstrong };
95463fc9af8SNeil Armstrong
955f4aba01dSNeil Armstrong static const char * const i2c_master_hub_clks[] = {
956f4aba01dSNeil Armstrong "s-ahb",
957f4aba01dSNeil Armstrong };
958f4aba01dSNeil Armstrong
959f4aba01dSNeil Armstrong static const struct geni_se_desc i2c_master_hub_desc = {
960f4aba01dSNeil Armstrong .clks = i2c_master_hub_clks,
961f4aba01dSNeil Armstrong .num_clks = ARRAY_SIZE(i2c_master_hub_clks),
962f4aba01dSNeil Armstrong };
963f4aba01dSNeil Armstrong
964eddac5afSKarthikeyan Ramasubramanian static const struct of_device_id geni_se_dt_match[] = {
96563fc9af8SNeil Armstrong { .compatible = "qcom,geni-se-qup", .data = &qup_desc },
966f4aba01dSNeil Armstrong { .compatible = "qcom,geni-se-i2c-master-hub", .data = &i2c_master_hub_desc },
967eddac5afSKarthikeyan Ramasubramanian {}
968eddac5afSKarthikeyan Ramasubramanian };
969eddac5afSKarthikeyan Ramasubramanian MODULE_DEVICE_TABLE(of, geni_se_dt_match);
970eddac5afSKarthikeyan Ramasubramanian
971eddac5afSKarthikeyan Ramasubramanian static struct platform_driver geni_se_driver = {
972eddac5afSKarthikeyan Ramasubramanian .driver = {
973eddac5afSKarthikeyan Ramasubramanian .name = "geni_se_qup",
974eddac5afSKarthikeyan Ramasubramanian .of_match_table = geni_se_dt_match,
975eddac5afSKarthikeyan Ramasubramanian },
976eddac5afSKarthikeyan Ramasubramanian .probe = geni_se_probe,
977eddac5afSKarthikeyan Ramasubramanian };
978eddac5afSKarthikeyan Ramasubramanian module_platform_driver(geni_se_driver);
979eddac5afSKarthikeyan Ramasubramanian
980eddac5afSKarthikeyan Ramasubramanian MODULE_DESCRIPTION("GENI Serial Engine Driver");
981eddac5afSKarthikeyan Ramasubramanian MODULE_LICENSE("GPL v2");
982