1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved. 4 * 5 */ 6 7 #include <linux/bitfield.h> 8 #include <linux/bitmap.h> 9 #include <linux/bitops.h> 10 #include <linux/cleanup.h> 11 #include <linux/device.h> 12 #include <linux/io.h> 13 #include <linux/kernel.h> 14 #include <linux/module.h> 15 #include <linux/mutex.h> 16 #include <linux/nvmem-consumer.h> 17 #include <linux/of.h> 18 #include <linux/regmap.h> 19 #include <linux/sizes.h> 20 #include <linux/slab.h> 21 #include <linux/soc/qcom/llcc-qcom.h> 22 23 #define ACTIVATE BIT(0) 24 #define DEACTIVATE BIT(1) 25 #define ACT_CLEAR BIT(0) 26 #define ACT_COMPLETE BIT(4) 27 #define ACT_CTRL_OPCODE_ACTIVATE BIT(0) 28 #define ACT_CTRL_OPCODE_DEACTIVATE BIT(1) 29 #define ACT_CTRL_ACT_TRIG BIT(0) 30 #define ACT_CTRL_OPCODE_SHIFT 1 31 #define ATTR1_PROBE_TARGET_WAYS_SHIFT 2 32 #define ATTR1_FIXED_SIZE_SHIFT 3 33 #define ATTR1_PRIORITY_SHIFT 4 34 #define ATTR1_MAX_CAP_SHIFT 16 35 #define ATTR0_RES_WAYS_MASK GENMASK(15, 0) 36 #define ATTR0_BONUS_WAYS_MASK GENMASK(31, 16) 37 #define ATTR0_BONUS_WAYS_SHIFT 16 38 #define ATTR2_PROBE_TARGET_WAYS_MASK BIT(4) 39 #define ATTR2_FIXED_SIZE_MASK BIT(8) 40 #define ATTR2_PRIORITY_MASK GENMASK(14, 12) 41 #define ATTR2_PARENT_SCID_MASK GENMASK(21, 16) 42 #define ATTR2_IN_A_GROUP_MASK BIT(24) 43 #define LLCC_STATUS_READ_DELAY 100 44 45 #define CACHE_LINE_SIZE_SHIFT 6 46 47 #define LLCC_LB_CNT_MASK GENMASK(31, 28) 48 #define LLCC_LB_CNT_SHIFT 28 49 50 #define MAX_CAP_TO_BYTES(n) (n * SZ_1K) 51 #define LLCC_TRP_ACT_CTRLn(n) (n * SZ_4K) 52 #define LLCC_TRP_ACT_CLEARn(n) (8 + n * SZ_4K) 53 #define LLCC_TRP_STATUSn(n) (4 + n * SZ_4K) 54 #define LLCC_TRP_ATTR0_CFGn(n) (0x21000 + SZ_8 * n) 55 #define LLCC_TRP_ATTR1_CFGn(n) (0x21004 + SZ_8 * n) 56 #define LLCC_TRP_ATTR2_CFGn(n) (0x21100 + SZ_4 * n) 57 #define LLCC_V6_TRP_ATTR0_CFGn(n) (cfg->reg_offset[LLCC_TRP_ATTR0_CFG] + SZ_64 * (n)) 58 #define LLCC_V6_TRP_ATTR1_CFGn(n) (cfg->reg_offset[LLCC_TRP_ATTR1_CFG] + SZ_64 * (n)) 59 #define LLCC_V6_TRP_ATTR2_CFGn(n) (cfg->reg_offset[LLCC_TRP_ATTR2_CFG] + SZ_64 * (n)) 60 #define LLCC_V6_TRP_ATTR3_CFGn(n) (cfg->reg_offset[LLCC_TRP_ATTR3_CFG] + SZ_64 * (n)) 61 62 #define LLCC_TRP_SCID_DIS_CAP_ALLOC 0x21f00 63 #define LLCC_TRP_PCB_ACT 0x21f04 64 #define LLCC_TRP_ALGO_CFG1 0x21f0c 65 #define LLCC_TRP_ALGO_CFG2 0x21f10 66 #define LLCC_TRP_ALGO_CFG3 0x21f14 67 #define LLCC_TRP_ALGO_CFG4 0x21f18 68 #define LLCC_TRP_ALGO_CFG5 0x21f1c 69 #define LLCC_TRP_WRSC_EN 0x21f20 70 #define LLCC_TRP_ALGO_CFG6 0x21f24 71 #define LLCC_TRP_ALGO_CFG7 0x21f28 72 #define LLCC_TRP_WRSC_CACHEABLE_EN 0x21f2c 73 #define LLCC_TRP_ALGO_CFG8 0x21f30 74 75 #define LLCC_VERSION_2_0_0_0 0x02000000 76 #define LLCC_VERSION_2_1_0_0 0x02010000 77 #define LLCC_VERSION_4_1_0_0 0x04010000 78 #define LLCC_VERSION_6_0_0_0 0X06000000 79 80 /** 81 * struct llcc_slice_config - Data associated with the llcc slice 82 * @usecase_id: Unique id for the client's use case 83 * @slice_id: llcc slice id for each client 84 * @max_cap: The maximum capacity of the cache slice provided in KB 85 * @priority: Priority of the client used to select victim line for replacement 86 * @fixed_size: Boolean indicating if the slice has a fixed capacity 87 * @bonus_ways: Bonus ways are additional ways to be used for any slice, 88 * if client ends up using more than reserved cache ways. Bonus 89 * ways are allocated only if they are not reserved for some 90 * other client. 91 * @res_ways: Reserved ways for the cache slice, the reserved ways cannot 92 * be used by any other client than the one its assigned to. 93 * @cache_mode: Each slice operates as a cache, this controls the mode of the 94 * slice: normal or TCM(Tightly Coupled Memory) 95 * @probe_target_ways: Determines what ways to probe for access hit. When 96 * configured to 1 only bonus and reserved ways are probed. 97 * When configured to 0 all ways in llcc are probed. 98 * @dis_cap_alloc: Disable capacity based allocation for a client 99 * @retain_on_pc: If this bit is set and client has maintained active vote 100 * then the ways assigned to this client are not flushed on power 101 * collapse. 102 * @activate_on_init: Activate the slice immediately after it is programmed 103 * @write_scid_en: Bit enables write cache support for a given scid. 104 * @write_scid_cacheable_en: Enables write cache cacheable support for a 105 * given scid (not supported on v2 or older hardware). 106 * @stale_en: Bit enables stale. 107 * @stale_cap_en: Bit enables stale only if current scid is over-cap. 108 * @mru_uncap_en: Roll-over on reserved cache ways if current scid is 109 * under-cap. 110 * @mru_rollover: Roll-over on reserved cache ways. 111 * @alloc_oneway_en: Allways allocate one way on over-cap even if there's no 112 * same-scid lines for replacement. 113 * @ovcap_en: Once current scid is over-capacity, allocate other over-cap SCID. 114 * @ovcap_prio: Once current scid is over-capacity, allocate other low priority 115 * over-cap scid. Depends on corresponding bit being set in 116 * ovcap_en. 117 * @vict_prio: When current scid is under-capacity, allocate over other 118 * lower-than victim priority-line threshold scid. 119 * @parent_slice_id: For grouped slices, specifies the slice id of the parent. 120 */ 121 struct llcc_slice_config { 122 u32 usecase_id; 123 u32 slice_id; 124 u32 max_cap; 125 u32 priority; 126 bool fixed_size; 127 u32 bonus_ways; 128 u32 res_ways; 129 u32 cache_mode; 130 u32 probe_target_ways; 131 bool dis_cap_alloc; 132 bool retain_on_pc; 133 bool activate_on_init; 134 bool write_scid_en; 135 bool write_scid_cacheable_en; 136 bool stale_en; 137 bool stale_cap_en; 138 bool mru_uncap_en; 139 bool mru_rollover; 140 bool alloc_oneway_en; 141 bool ovcap_en; 142 bool ovcap_prio; 143 bool vict_prio; 144 u32 parent_slice_id; 145 }; 146 147 struct qcom_llcc_config { 148 const struct llcc_slice_config *sct_data; 149 const u32 *reg_offset; 150 const struct llcc_edac_reg_offset *edac_reg_offset; 151 u32 max_cap_shift; /* instead of ATTR1_MAX_CAP_SHIFT */ 152 u32 num_banks; 153 int size; 154 bool skip_llcc_cfg; 155 bool no_edac; 156 bool irq_configured; 157 bool no_broadcast_register; 158 }; 159 160 struct qcom_sct_config { 161 const struct qcom_llcc_config *llcc_config; 162 int num_config; 163 }; 164 165 enum llcc_reg_offset { 166 LLCC_COMMON_HW_INFO, 167 LLCC_COMMON_STATUS0, 168 LLCC_TRP_ATTR0_CFG, 169 LLCC_TRP_ATTR1_CFG, 170 LLCC_TRP_ATTR2_CFG, 171 LLCC_TRP_ATTR3_CFG, 172 LLCC_TRP_SID_DIS_CAP_ALLOC, 173 LLCC_TRP_ALGO_STALE_EN, 174 LLCC_TRP_ALGO_STALE_CAP_EN, 175 LLCC_TRP_ALGO_MRU0, 176 LLCC_TRP_ALGO_MRU1, 177 LLCC_TRP_ALGO_ALLOC0, 178 LLCC_TRP_ALGO_ALLOC1, 179 LLCC_TRP_ALGO_ALLOC2, 180 LLCC_TRP_ALGO_ALLOC3, 181 LLCC_TRP_WRS_EN, 182 LLCC_TRP_WRS_CACHEABLE_EN, 183 }; 184 185 static const struct llcc_slice_config ipq5424_data[] = { 186 { 187 .usecase_id = LLCC_CPUSS, 188 .slice_id = 1, 189 .max_cap = 768, 190 .priority = 1, 191 .bonus_ways = 0xFFFF, 192 .retain_on_pc = true, 193 .activate_on_init = true, 194 .write_scid_cacheable_en = true, 195 .stale_en = true, 196 .stale_cap_en = true, 197 .alloc_oneway_en = true, 198 .ovcap_en = true, 199 .ovcap_prio = true, 200 .vict_prio = true, 201 }, 202 { 203 .usecase_id = LLCC_VIDSC0, 204 .slice_id = 2, 205 .max_cap = 256, 206 .priority = 2, 207 .fixed_size = true, 208 .bonus_ways = 0xF000, 209 .retain_on_pc = true, 210 .activate_on_init = true, 211 .write_scid_cacheable_en = true, 212 .stale_en = true, 213 .stale_cap_en = true, 214 }, 215 }; 216 217 static const struct llcc_slice_config sa8775p_data[] = { 218 { 219 .usecase_id = LLCC_CPUSS, 220 .slice_id = 1, 221 .max_cap = 2048, 222 .priority = 1, 223 .bonus_ways = 0xff, 224 .cache_mode = 0, 225 .retain_on_pc = true, 226 .activate_on_init = true, 227 }, { 228 .usecase_id = LLCC_VIDSC0, 229 .slice_id = 2, 230 .max_cap = 512, 231 .priority = 3, 232 .fixed_size = true, 233 .bonus_ways = 0xff, 234 .cache_mode = 0, 235 .retain_on_pc = true, 236 }, { 237 .usecase_id = LLCC_CPUSS1, 238 .slice_id = 3, 239 .max_cap = 1024, 240 .priority = 1, 241 .fixed_size = true, 242 .bonus_ways = 0xff, 243 .cache_mode = 0, 244 .retain_on_pc = true, 245 }, { 246 .usecase_id = LLCC_CPUHWT, 247 .slice_id = 5, 248 .max_cap = 512, 249 .priority = 1, 250 .fixed_size = true, 251 .bonus_ways = 0xff, 252 .cache_mode = 0, 253 .retain_on_pc = true, 254 }, { 255 .usecase_id = LLCC_AUDIO, 256 .slice_id = 6, 257 .max_cap = 1024, 258 .priority = 1, 259 .fixed_size = true, 260 .bonus_ways = 0xff, 261 .cache_mode = 0, 262 }, { 263 .usecase_id = LLCC_CMPT, 264 .slice_id = 10, 265 .max_cap = 4096, 266 .priority = 1, 267 .fixed_size = true, 268 .bonus_ways = 0xff, 269 .cache_mode = 0, 270 .retain_on_pc = true, 271 }, { 272 .usecase_id = LLCC_GPUHTW, 273 .slice_id = 11, 274 .max_cap = 1024, 275 .priority = 1, 276 .fixed_size = true, 277 .bonus_ways = 0xff, 278 .cache_mode = 0, 279 .retain_on_pc = true, 280 }, { 281 .usecase_id = LLCC_GPU, 282 .slice_id = 12, 283 .max_cap = 1024, 284 .priority = 1, 285 .fixed_size = true, 286 .bonus_ways = 0xff, 287 .cache_mode = 0, 288 .retain_on_pc = true, 289 .write_scid_en = true, 290 }, { 291 .usecase_id = LLCC_MMUHWT, 292 .slice_id = 13, 293 .max_cap = 1024, 294 .priority = 1, 295 .fixed_size = true, 296 .bonus_ways = 0xff, 297 .cache_mode = 0, 298 .activate_on_init = true, 299 }, { 300 .usecase_id = LLCC_CMPTDMA, 301 .slice_id = 15, 302 .max_cap = 1024, 303 .priority = 1, 304 .fixed_size = true, 305 .bonus_ways = 0xff, 306 .cache_mode = 0, 307 .retain_on_pc = true, 308 }, { 309 .usecase_id = LLCC_DISP, 310 .slice_id = 16, 311 .max_cap = 4096, 312 .priority = 2, 313 .fixed_size = true, 314 .bonus_ways = 0xff, 315 .cache_mode = 0, 316 .retain_on_pc = true, 317 }, { 318 .usecase_id = LLCC_VIDFW, 319 .slice_id = 17, 320 .max_cap = 3072, 321 .priority = 1, 322 .bonus_ways = 0xff, 323 .cache_mode = 0, 324 .retain_on_pc = true, 325 }, { 326 .usecase_id = LLCC_AUDHW, 327 .slice_id = 22, 328 .max_cap = 1024, 329 .priority = 1, 330 .fixed_size = true, 331 .bonus_ways = 0xff, 332 .cache_mode = 0, 333 }, { 334 .usecase_id = LLCC_CVP, 335 .slice_id = 28, 336 .max_cap = 256, 337 .priority = 3, 338 .fixed_size = true, 339 .bonus_ways = 0xff, 340 .cache_mode = 0, 341 .retain_on_pc = true, 342 }, { 343 .usecase_id = LLCC_APTCM, 344 .slice_id = 30, 345 .max_cap = 1024, 346 .priority = 3, 347 .fixed_size = true, 348 .res_ways = 0xf0, 349 .cache_mode = 1, 350 .retain_on_pc = true, 351 }, { 352 .usecase_id = LLCC_WRCACHE, 353 .slice_id = 31, 354 .max_cap = 512, 355 .priority = 1, 356 .fixed_size = true, 357 .bonus_ways = 0xff, 358 .cache_mode = 0, 359 .activate_on_init = true, 360 }, 361 }; 362 363 static const struct llcc_slice_config sar1130p_data[] = { 364 { 365 .usecase_id = LLCC_CPUSS, 366 .slice_id = 1, 367 .max_cap = 4096, 368 .priority = 1, 369 .bonus_ways = 0x1fff, 370 .res_ways = 0x0, 371 .cache_mode = 0, 372 .retain_on_pc = true, 373 .activate_on_init = true, 374 }, { 375 .usecase_id = LLCC_VIDSC0, 376 .slice_id = 2, 377 .max_cap = 512, 378 .priority = 3, 379 .fixed_size = true, 380 .bonus_ways = 0x1fff, 381 .res_ways = 0x0, 382 .cache_mode = 0, 383 .retain_on_pc = true, 384 }, { 385 .usecase_id = LLCC_AUDIO, 386 .slice_id = 6, 387 .max_cap = 1024, 388 .priority = 3, 389 .fixed_size = true, 390 .bonus_ways = 0x1fff, 391 .res_ways = 0x0, 392 .cache_mode = 0, 393 .retain_on_pc = true, 394 }, { 395 .usecase_id = LLCC_CMPT, 396 .slice_id = 10, 397 .max_cap = 1024, 398 .priority = 1, 399 .fixed_size = true, 400 .bonus_ways = 0x1fff, 401 .res_ways = 0x0, 402 .cache_mode = 0, 403 .retain_on_pc = true, 404 }, { 405 .usecase_id = LLCC_GPUHTW, 406 .slice_id = 11, 407 .max_cap = 0, 408 .priority = 1, 409 .fixed_size = true, 410 .bonus_ways = 0x1fff, 411 .res_ways = 0x0, 412 .cache_mode = 0, 413 .retain_on_pc = true, 414 }, { 415 .usecase_id = LLCC_GPU, 416 .slice_id = 12, 417 .max_cap = 3072, 418 .priority = 3, 419 .fixed_size = true, 420 .bonus_ways = 0x1fff, 421 .res_ways = 0x0, 422 .cache_mode = 0, 423 .retain_on_pc = true, 424 .write_scid_en = true, 425 }, { 426 .usecase_id = LLCC_MMUHWT, 427 .slice_id = 13, 428 .max_cap = 512, 429 .priority = 1, 430 .fixed_size = true, 431 .bonus_ways = 0x1fff, 432 .res_ways = 0x0, 433 .cache_mode = 0, 434 }, { 435 .usecase_id = LLCC_DISP, 436 .slice_id = 16, 437 .max_cap = 12800, 438 .priority = 1, 439 .fixed_size = true, 440 .bonus_ways = 0x1fff, 441 .res_ways = 0x0, 442 .cache_mode = 0, 443 .retain_on_pc = true, 444 }, { 445 .usecase_id = LLCC_CVP, 446 .slice_id = 28, 447 .max_cap = 256, 448 .priority = 3, 449 .fixed_size = true, 450 .bonus_ways = 0x1fff, 451 .res_ways = 0x0, 452 .cache_mode = 0, 453 .retain_on_pc = true, 454 }, { 455 .usecase_id = LLCC_APTCM, 456 .slice_id = 26, 457 .max_cap = 2048, 458 .priority = 3, 459 .fixed_size = true, 460 .bonus_ways = 0x0, 461 .res_ways = 0x3, 462 .cache_mode = true, 463 .dis_cap_alloc = true, 464 .retain_on_pc = true, 465 }, { 466 .usecase_id = LLCC_WRCACHE, 467 .slice_id = 31, 468 .max_cap = 256, 469 .priority = 1, 470 .fixed_size = true, 471 .bonus_ways = 0x1fff, 472 .res_ways = 0x0, 473 .cache_mode = 0, 474 .activate_on_init = true, 475 }, { 476 .usecase_id = LLCC_AENPU, 477 .slice_id = 30, 478 .max_cap = 3072, 479 .priority = 3, 480 .fixed_size = true, 481 .bonus_ways = 0x1fff, 482 .res_ways = 0x0, 483 .cache_mode = 0, 484 .retain_on_pc = true, 485 }, { 486 .usecase_id = LLCC_DISP_LEFT, 487 .slice_id = 17, 488 .max_cap = 0, 489 .priority = 1, 490 .fixed_size = true, 491 .bonus_ways = 0x0, 492 .res_ways = 0x0, 493 .cache_mode = 0, 494 .retain_on_pc = true, 495 }, { 496 .usecase_id = LLCC_DISP_RIGHT, 497 .slice_id = 18, 498 .max_cap = 0, 499 .priority = 1, 500 .fixed_size = true, 501 .bonus_ways = 0x0, 502 .res_ways = 0x0, 503 .cache_mode = 0, 504 .retain_on_pc = true, 505 }, { 506 .usecase_id = LLCC_EVCS_LEFT, 507 .slice_id = 22, 508 .max_cap = 0, 509 .priority = 1, 510 .fixed_size = true, 511 .bonus_ways = 0x0, 512 .res_ways = 0x0, 513 .cache_mode = 0, 514 .retain_on_pc = true, 515 }, { 516 .usecase_id = LLCC_EVCS_RIGHT, 517 .slice_id = 23, 518 .max_cap = 0, 519 .priority = 1, 520 .fixed_size = true, 521 .bonus_ways = 0x0, 522 .res_ways = 0x0, 523 .cache_mode = 0, 524 .retain_on_pc = true, 525 }, 526 }; 527 528 static const struct llcc_slice_config sar2130p_data[] = { 529 { 530 .usecase_id = LLCC_CPUSS, 531 .slice_id = 1, 532 .max_cap = 6144, 533 .priority = 1, 534 .fixed_size = 0, 535 .bonus_ways = 0x3fffffff, 536 .res_ways = 0x0, 537 .cache_mode = 0, 538 .retain_on_pc = true, 539 .activate_on_init = true, 540 }, { 541 .usecase_id = LLCC_VIDSC0, 542 .slice_id = 2, 543 .max_cap = 128, 544 .priority = 2, 545 .fixed_size = true, 546 .bonus_ways = 0x3fffffff, 547 .res_ways = 0x0, 548 .cache_mode = 0, 549 .retain_on_pc = true, 550 }, { 551 .usecase_id = LLCC_AUDIO, 552 .slice_id = 6, 553 .max_cap = 1024, 554 .priority = 3, 555 .fixed_size = true, 556 .bonus_ways = 0x3fffffff, 557 .res_ways = 0x0, 558 .cache_mode = 0, 559 .retain_on_pc = true, 560 }, { 561 .usecase_id = LLCC_CMPT, 562 .slice_id = 10, 563 .max_cap = 1024, 564 .priority = 1, 565 .fixed_size = true, 566 .bonus_ways = 0x3fffffff, 567 .res_ways = 0x0, 568 .cache_mode = 0, 569 .retain_on_pc = true, 570 }, { 571 .usecase_id = LLCC_GPUHTW, 572 .slice_id = 11, 573 .max_cap = 0, 574 .priority = 1, 575 .fixed_size = true, 576 .bonus_ways = 0x3fffffff, 577 .res_ways = 0x0, 578 .cache_mode = 0, 579 .retain_on_pc = true, 580 }, { 581 .usecase_id = LLCC_GPU, 582 .slice_id = 12, 583 .max_cap = 1536, 584 .priority = 2, 585 .fixed_size = true, 586 .bonus_ways = 0x3fffffff, 587 .res_ways = 0x0, 588 .cache_mode = 0, 589 .retain_on_pc = true, 590 .write_scid_en = true, 591 }, { 592 .usecase_id = LLCC_MMUHWT, 593 .slice_id = 13, 594 .max_cap = 1024, 595 .priority = 1, 596 .fixed_size = true, 597 .bonus_ways = 0x3fffffff, 598 .res_ways = 0x0, 599 .cache_mode = 0, 600 .activate_on_init = true, 601 }, { 602 .usecase_id = LLCC_DISP, 603 .slice_id = 16, 604 .max_cap = 0, 605 .priority = 1, 606 .fixed_size = true, 607 .bonus_ways = 0x3fffffff, 608 .res_ways = 0x0, 609 .cache_mode = 0, 610 .retain_on_pc = true, 611 }, { 612 .usecase_id = LLCC_APTCM, 613 .slice_id = 26, 614 .max_cap = 2048, 615 .priority = 3, 616 .fixed_size = true, 617 .bonus_ways = 0x0, 618 .res_ways = 0x3, 619 .cache_mode = true, 620 .dis_cap_alloc = true, 621 .retain_on_pc = true, 622 }, { 623 .usecase_id = LLCC_WRCACHE, 624 .slice_id = 31, 625 .max_cap = 256, 626 .priority = 1, 627 .fixed_size = true, 628 .bonus_ways = 0x3fffffff, 629 .res_ways = 0x0, 630 .cache_mode = 0, 631 .activate_on_init = true, 632 }, { 633 .usecase_id = LLCC_VIEYE, 634 .slice_id = 7, 635 .max_cap = 7168, 636 .priority = 4, 637 .fixed_size = true, 638 .bonus_ways = 0x3fffffff, 639 .res_ways = 0x0, 640 .cache_mode = 0, 641 .retain_on_pc = true, 642 }, { 643 .usecase_id = LLCC_VIDPTH, 644 .slice_id = 8, 645 .max_cap = 7168, 646 .priority = 4, 647 .fixed_size = true, 648 .bonus_ways = 0x3fffffff, 649 .res_ways = 0x0, 650 .cache_mode = 0, 651 .retain_on_pc = true, 652 }, { 653 .usecase_id = LLCC_GPUMV, 654 .slice_id = 9, 655 .max_cap = 2048, 656 .priority = 2, 657 .fixed_size = true, 658 .bonus_ways = 0x3fffffff, 659 .res_ways = 0x0, 660 .cache_mode = 0, 661 .retain_on_pc = true, 662 }, { 663 .usecase_id = LLCC_EVA_LEFT, 664 .slice_id = 20, 665 .max_cap = 7168, 666 .priority = 5, 667 .fixed_size = true, 668 .bonus_ways = 0x3ffffffc, 669 .res_ways = 0x0, 670 .cache_mode = 0, 671 .retain_on_pc = true, 672 }, { 673 .usecase_id = LLCC_EVA_RIGHT, 674 .slice_id = 21, 675 .max_cap = 7168, 676 .priority = 5, 677 .fixed_size = true, 678 .bonus_ways = 0x3ffffffc, 679 .res_ways = 0x0, 680 .cache_mode = 0, 681 .retain_on_pc = true, 682 }, { 683 .usecase_id = LLCC_EVAGAIN, 684 .slice_id = 25, 685 .max_cap = 1024, 686 .priority = 2, 687 .fixed_size = true, 688 .bonus_ways = 0x3fffffff, 689 .res_ways = 0x0, 690 .cache_mode = 0, 691 .retain_on_pc = true, 692 }, { 693 .usecase_id = LLCC_AENPU, 694 .slice_id = 30, 695 .max_cap = 3072, 696 .priority = 3, 697 .fixed_size = true, 698 .bonus_ways = 0x3fffffff, 699 .res_ways = 0x0, 700 .cache_mode = 0, 701 .retain_on_pc = true, 702 }, { 703 .usecase_id = LLCC_VIPTH, 704 .slice_id = 29, 705 .max_cap = 1024, 706 .priority = 4, 707 .fixed_size = true, 708 .bonus_ways = 0x3fffffff, 709 .res_ways = 0x0, 710 .cache_mode = 0, 711 .retain_on_pc = true, 712 }, { 713 .usecase_id = LLCC_DISP_LEFT, 714 .slice_id = 17, 715 .max_cap = 0, 716 .priority = 1, 717 .fixed_size = true, 718 .bonus_ways = 0x0, 719 .res_ways = 0x0, 720 .cache_mode = 0, 721 .retain_on_pc = true, 722 }, { 723 .usecase_id = LLCC_DISP_RIGHT, 724 .slice_id = 18, 725 .max_cap = 0, 726 .priority = 1, 727 .fixed_size = true, 728 .bonus_ways = 0x0, 729 .res_ways = 0x0, 730 .cache_mode = 0, 731 .retain_on_pc = true, 732 }, { 733 .usecase_id = LLCC_EVCS_LEFT, 734 .slice_id = 22, 735 .max_cap = 0, 736 .priority = 1, 737 .fixed_size = true, 738 .bonus_ways = 0x0, 739 .res_ways = 0x0, 740 .cache_mode = 0, 741 .retain_on_pc = true, 742 }, { 743 .usecase_id = LLCC_EVCS_RIGHT, 744 .slice_id = 23, 745 .max_cap = 0, 746 .priority = 1, 747 .fixed_size = true, 748 .bonus_ways = 0x0, 749 .res_ways = 0x0, 750 .cache_mode = 0, 751 .retain_on_pc = true, 752 }, { 753 .usecase_id = LLCC_SPAD, 754 .slice_id = 24, 755 .max_cap = 7168, 756 .priority = 1, 757 .fixed_size = true, 758 .bonus_ways = 0x0, 759 .res_ways = 0x0, 760 .cache_mode = 0, 761 .retain_on_pc = true, 762 }, 763 }; 764 765 static const struct llcc_slice_config sc7180_data[] = { 766 { 767 .usecase_id = LLCC_CPUSS, 768 .slice_id = 1, 769 .max_cap = 256, 770 .priority = 1, 771 .bonus_ways = 0xf, 772 .cache_mode = 0, 773 .retain_on_pc = true, 774 .activate_on_init = true, 775 }, { 776 .usecase_id = LLCC_MDM, 777 .slice_id = 8, 778 .max_cap = 128, 779 .priority = 1, 780 .bonus_ways = 0xf, 781 .cache_mode = 0, 782 .retain_on_pc = true, 783 }, { 784 .usecase_id = LLCC_GPUHTW, 785 .slice_id = 11, 786 .max_cap = 128, 787 .priority = 1, 788 .bonus_ways = 0xf, 789 .cache_mode = 0, 790 .retain_on_pc = true, 791 }, { 792 .usecase_id = LLCC_GPU, 793 .slice_id = 12, 794 .max_cap = 128, 795 .priority = 1, 796 .bonus_ways = 0xf, 797 .cache_mode = 0, 798 .retain_on_pc = true, 799 }, 800 }; 801 802 static const struct llcc_slice_config sc7280_data[] = { 803 { 804 .usecase_id = LLCC_CPUSS, 805 .slice_id = 1, 806 .max_cap = 768, 807 .priority = 1, 808 .bonus_ways = 0x3f, 809 .cache_mode = 0, 810 .retain_on_pc = true, 811 .activate_on_init = true, 812 }, { 813 .usecase_id = LLCC_MDMHPGRW, 814 .slice_id = 7, 815 .max_cap = 512, 816 .priority = 2, 817 .fixed_size = true, 818 .bonus_ways = 0x3f, 819 .cache_mode = 0, 820 .retain_on_pc = true, 821 }, { 822 .usecase_id = LLCC_CMPT, 823 .slice_id = 10, 824 .max_cap = 768, 825 .priority = 1, 826 .fixed_size = true, 827 .bonus_ways = 0x3f, 828 .cache_mode = 0, 829 .retain_on_pc = true, 830 }, { 831 .usecase_id = LLCC_GPUHTW, 832 .slice_id = 11, 833 .max_cap = 256, 834 .priority = 1, 835 .fixed_size = true, 836 .bonus_ways = 0x3f, 837 .cache_mode = 0, 838 .retain_on_pc = true, 839 }, { 840 .usecase_id = LLCC_GPU, 841 .slice_id = 12, 842 .max_cap = 512, 843 .priority = 1, 844 .bonus_ways = 0x3f, 845 .cache_mode = 0, 846 .retain_on_pc = true, 847 }, { 848 .usecase_id = LLCC_MMUHWT, 849 .slice_id = 13, 850 .max_cap = 256, 851 .priority = 1, 852 .fixed_size = true, 853 .bonus_ways = 0x3f, 854 .cache_mode = 0, 855 .activate_on_init = true, 856 }, { 857 .usecase_id = LLCC_MDMPNG, 858 .slice_id = 21, 859 .max_cap = 768, 860 .priority = 0, 861 .fixed_size = true, 862 .bonus_ways = 0x3f, 863 .cache_mode = 0, 864 .retain_on_pc = true, 865 }, { 866 .usecase_id = LLCC_WLHW, 867 .slice_id = 24, 868 .max_cap = 256, 869 .priority = 1, 870 .fixed_size = true, 871 .bonus_ways = 0x3f, 872 .cache_mode = 0, 873 .retain_on_pc = true, 874 }, { 875 .usecase_id = LLCC_MODPE, 876 .slice_id = 29, 877 .max_cap = 64, 878 .priority = 1, 879 .fixed_size = true, 880 .bonus_ways = 0x3f, 881 .cache_mode = 0, 882 .retain_on_pc = true, 883 }, 884 }; 885 886 static const struct llcc_slice_config sc8180x_data[] = { 887 { 888 .usecase_id = LLCC_CPUSS, 889 .slice_id = 1, 890 .max_cap = 6144, 891 .priority = 1, 892 .fixed_size = true, 893 .bonus_ways = 0xfff, 894 .cache_mode = 0, 895 .retain_on_pc = true, 896 .activate_on_init = true, 897 }, { 898 .usecase_id = LLCC_VIDSC0, 899 .slice_id = 2, 900 .max_cap = 512, 901 .priority = 2, 902 .fixed_size = true, 903 .bonus_ways = 0xfff, 904 .cache_mode = 0, 905 .retain_on_pc = true, 906 }, { 907 .usecase_id = LLCC_VIDSC1, 908 .slice_id = 3, 909 .max_cap = 512, 910 .priority = 2, 911 .fixed_size = true, 912 .bonus_ways = 0xfff, 913 .cache_mode = 0, 914 .retain_on_pc = true, 915 }, { 916 .usecase_id = LLCC_AUDIO, 917 .slice_id = 6, 918 .max_cap = 1024, 919 .priority = 1, 920 .fixed_size = true, 921 .bonus_ways = 0xfff, 922 .cache_mode = 0, 923 .retain_on_pc = true, 924 }, { 925 .usecase_id = LLCC_MDMHPGRW, 926 .slice_id = 7, 927 .max_cap = 3072, 928 .priority = 1, 929 .fixed_size = true, 930 .bonus_ways = 0x3ff, 931 .res_ways = 0xc00, 932 .cache_mode = 0, 933 .retain_on_pc = true, 934 }, { 935 .usecase_id = LLCC_MDM, 936 .slice_id = 8, 937 .max_cap = 3072, 938 .priority = 1, 939 .fixed_size = true, 940 .bonus_ways = 0xfff, 941 .cache_mode = 0, 942 .retain_on_pc = true, 943 }, { 944 .usecase_id = LLCC_MODHW, 945 .slice_id = 9, 946 .max_cap = 1024, 947 .priority = 1, 948 .fixed_size = true, 949 .bonus_ways = 0xfff, 950 .cache_mode = 0, 951 .retain_on_pc = true, 952 }, { 953 .usecase_id = LLCC_CMPT, 954 .slice_id = 10, 955 .max_cap = 6144, 956 .priority = 1, 957 .fixed_size = true, 958 .bonus_ways = 0xfff, 959 .cache_mode = 0, 960 .retain_on_pc = true, 961 }, { 962 .usecase_id = LLCC_GPUHTW, 963 .slice_id = 11, 964 .max_cap = 1024, 965 .priority = 1, 966 .fixed_size = true, 967 .bonus_ways = 0xfff, 968 .cache_mode = 0, 969 .retain_on_pc = true, 970 }, { 971 .usecase_id = LLCC_GPU, 972 .slice_id = 12, 973 .max_cap = 5120, 974 .priority = 1, 975 .fixed_size = true, 976 .bonus_ways = 0xfff, 977 .cache_mode = 0, 978 .retain_on_pc = true, 979 }, { 980 .usecase_id = LLCC_MMUHWT, 981 .slice_id = 13, 982 .max_cap = 1024, 983 .priority = 1, 984 .fixed_size = true, 985 .bonus_ways = 0xfff, 986 .cache_mode = 0, 987 .activate_on_init = true, 988 }, { 989 .usecase_id = LLCC_CMPTDMA, 990 .slice_id = 15, 991 .max_cap = 6144, 992 .priority = 1, 993 .fixed_size = true, 994 .bonus_ways = 0xfff, 995 .cache_mode = 0, 996 .retain_on_pc = true, 997 }, { 998 .usecase_id = LLCC_DISP, 999 .slice_id = 16, 1000 .max_cap = 6144, 1001 .priority = 1, 1002 .fixed_size = true, 1003 .bonus_ways = 0xfff, 1004 .cache_mode = 0, 1005 .retain_on_pc = true, 1006 }, { 1007 .usecase_id = LLCC_VIDFW, 1008 .slice_id = 17, 1009 .max_cap = 1024, 1010 .priority = 1, 1011 .fixed_size = true, 1012 .bonus_ways = 0xfff, 1013 .cache_mode = 0, 1014 .retain_on_pc = true, 1015 }, { 1016 .usecase_id = LLCC_MDMHPFX, 1017 .slice_id = 20, 1018 .max_cap = 1024, 1019 .priority = 2, 1020 .fixed_size = true, 1021 .bonus_ways = 0xfff, 1022 .cache_mode = 0, 1023 .retain_on_pc = true, 1024 }, { 1025 .usecase_id = LLCC_MDMPNG, 1026 .slice_id = 21, 1027 .max_cap = 1024, 1028 .priority = 0, 1029 .fixed_size = true, 1030 .bonus_ways = 0xc, 1031 .cache_mode = 0, 1032 .retain_on_pc = true, 1033 }, { 1034 .usecase_id = LLCC_AUDHW, 1035 .slice_id = 22, 1036 .max_cap = 1024, 1037 .priority = 1, 1038 .fixed_size = true, 1039 .bonus_ways = 0xfff, 1040 .cache_mode = 0, 1041 .retain_on_pc = true, 1042 }, { 1043 .usecase_id = LLCC_NPU, 1044 .slice_id = 23, 1045 .max_cap = 6144, 1046 .priority = 1, 1047 .fixed_size = true, 1048 .bonus_ways = 0xfff, 1049 .cache_mode = 0, 1050 .retain_on_pc = true, 1051 }, { 1052 .usecase_id = LLCC_WLHW, 1053 .slice_id = 24, 1054 .max_cap = 6144, 1055 .priority = 1, 1056 .fixed_size = true, 1057 .bonus_ways = 0xfff, 1058 .cache_mode = 0, 1059 .retain_on_pc = true, 1060 }, { 1061 .usecase_id = LLCC_MODPE, 1062 .slice_id = 29, 1063 .max_cap = 512, 1064 .priority = 1, 1065 .fixed_size = true, 1066 .bonus_ways = 0xc, 1067 .cache_mode = 0, 1068 .retain_on_pc = true, 1069 }, { 1070 .usecase_id = LLCC_APTCM, 1071 .slice_id = 30, 1072 .max_cap = 512, 1073 .priority = 3, 1074 .fixed_size = true, 1075 .res_ways = 0x1, 1076 .cache_mode = 1, 1077 .retain_on_pc = true, 1078 }, { 1079 .usecase_id = LLCC_WRCACHE, 1080 .slice_id = 31, 1081 .max_cap = 128, 1082 .priority = 1, 1083 .fixed_size = true, 1084 .bonus_ways = 0xfff, 1085 .cache_mode = 0, 1086 }, 1087 }; 1088 1089 static const struct llcc_slice_config sc8280xp_data[] = { 1090 { 1091 .usecase_id = LLCC_CPUSS, 1092 .slice_id = 1, 1093 .max_cap = 6144, 1094 .priority = 1, 1095 .fixed_size = true, 1096 .bonus_ways = 0xfff, 1097 .cache_mode = 0, 1098 .retain_on_pc = true, 1099 .activate_on_init = true, 1100 }, { 1101 .usecase_id = LLCC_VIDSC0, 1102 .slice_id = 2, 1103 .max_cap = 512, 1104 .priority = 3, 1105 .fixed_size = true, 1106 .bonus_ways = 0xfff, 1107 .cache_mode = 0, 1108 .retain_on_pc = true, 1109 }, { 1110 .usecase_id = LLCC_AUDIO, 1111 .slice_id = 6, 1112 .max_cap = 1024, 1113 .priority = 1, 1114 .fixed_size = true, 1115 .bonus_ways = 0xfff, 1116 .cache_mode = 0, 1117 }, { 1118 .usecase_id = LLCC_CMPT, 1119 .slice_id = 10, 1120 .max_cap = 6144, 1121 .priority = 1, 1122 .fixed_size = true, 1123 .bonus_ways = 0xfff, 1124 .cache_mode = 0, 1125 }, { 1126 .usecase_id = LLCC_GPUHTW, 1127 .slice_id = 11, 1128 .max_cap = 1024, 1129 .priority = 1, 1130 .fixed_size = true, 1131 .bonus_ways = 0xfff, 1132 .cache_mode = 0, 1133 .retain_on_pc = true, 1134 }, { 1135 .usecase_id = LLCC_GPU, 1136 .slice_id = 12, 1137 .max_cap = 4096, 1138 .priority = 1, 1139 .fixed_size = true, 1140 .bonus_ways = 0xfff, 1141 .cache_mode = 0, 1142 .retain_on_pc = true, 1143 .write_scid_en = true, 1144 }, { 1145 .usecase_id = LLCC_MMUHWT, 1146 .slice_id = 13, 1147 .max_cap = 1024, 1148 .priority = 1, 1149 .fixed_size = true, 1150 .bonus_ways = 0xfff, 1151 .cache_mode = 0, 1152 .activate_on_init = true, 1153 }, { 1154 .usecase_id = LLCC_DISP, 1155 .slice_id = 16, 1156 .max_cap = 6144, 1157 .priority = 1, 1158 .fixed_size = true, 1159 .bonus_ways = 0xfff, 1160 .cache_mode = 0, 1161 .retain_on_pc = true, 1162 }, { 1163 .usecase_id = LLCC_AUDHW, 1164 .slice_id = 22, 1165 .max_cap = 2048, 1166 .priority = 1, 1167 .fixed_size = true, 1168 .bonus_ways = 0xfff, 1169 .cache_mode = 0, 1170 .retain_on_pc = true, 1171 }, { 1172 .usecase_id = LLCC_ECC, 1173 .slice_id = 26, 1174 .max_cap = 1024, 1175 .priority = 1, 1176 .fixed_size = true, 1177 .bonus_ways = 0xfff, 1178 .cache_mode = 0, 1179 .retain_on_pc = true, 1180 }, { 1181 .usecase_id = LLCC_CVP, 1182 .slice_id = 28, 1183 .max_cap = 512, 1184 .priority = 3, 1185 .fixed_size = true, 1186 .bonus_ways = 0xfff, 1187 .cache_mode = 0, 1188 .retain_on_pc = true, 1189 }, { 1190 .usecase_id = LLCC_APTCM, 1191 .slice_id = 30, 1192 .max_cap = 1024, 1193 .priority = 3, 1194 .fixed_size = true, 1195 .res_ways = 0x1, 1196 .cache_mode = 1, 1197 .retain_on_pc = true, 1198 }, { 1199 .usecase_id = LLCC_WRCACHE, 1200 .slice_id = 31, 1201 .max_cap = 1024, 1202 .priority = 1, 1203 .fixed_size = true, 1204 .bonus_ways = 0xfff, 1205 .cache_mode = 0, 1206 .activate_on_init = true, 1207 }, { 1208 .usecase_id = LLCC_CVPFW, 1209 .slice_id = 17, 1210 .max_cap = 512, 1211 .priority = 1, 1212 .bonus_ways = 0xfff, 1213 .cache_mode = 0, 1214 .retain_on_pc = true, 1215 }, { 1216 .usecase_id = LLCC_CPUSS1, 1217 .slice_id = 3, 1218 .max_cap = 2048, 1219 .priority = 1, 1220 .fixed_size = true, 1221 .bonus_ways = 0xfff, 1222 .cache_mode = 0, 1223 .retain_on_pc = true, 1224 }, { 1225 .usecase_id = LLCC_CPUHWT, 1226 .slice_id = 5, 1227 .max_cap = 512, 1228 .priority = 1, 1229 .fixed_size = true, 1230 .bonus_ways = 0xfff, 1231 .cache_mode = 0, 1232 .activate_on_init = true, 1233 }, 1234 }; 1235 1236 static const struct llcc_slice_config sdm845_data[] = {{ 1237 .usecase_id = LLCC_CPUSS, 1238 .slice_id = 1, 1239 .max_cap = 2816, 1240 .priority = 1, 1241 .bonus_ways = 0xffc, 1242 .res_ways = 0x2, 1243 .cache_mode = 0, 1244 .dis_cap_alloc = true, 1245 .retain_on_pc = true, 1246 .activate_on_init = true, 1247 }, { 1248 .usecase_id = LLCC_VIDSC0, 1249 .slice_id = 2, 1250 .max_cap = 512, 1251 .priority = 2, 1252 .fixed_size = true, 1253 .res_ways = 0xf0, 1254 .cache_mode = 0, 1255 .dis_cap_alloc = true, 1256 .retain_on_pc = true, 1257 }, { 1258 .usecase_id = LLCC_VIDSC1, 1259 .slice_id = 3, 1260 .max_cap = 512, 1261 .priority = 2, 1262 .fixed_size = true, 1263 .res_ways = 0xf0, 1264 .cache_mode = 0, 1265 .dis_cap_alloc = true, 1266 .retain_on_pc = true, 1267 }, { 1268 .usecase_id = LLCC_ROTATOR, 1269 .slice_id = 4, 1270 .max_cap = 563, 1271 .priority = 2, 1272 .fixed_size = true, 1273 .res_ways = 0xe, 1274 .cache_mode = 2, 1275 .dis_cap_alloc = true, 1276 .retain_on_pc = true, 1277 }, { 1278 .usecase_id = LLCC_VOICE, 1279 .slice_id = 5, 1280 .max_cap = 2816, 1281 .priority = 1, 1282 .bonus_ways = 0xffc, 1283 .res_ways = 0x2, 1284 .cache_mode = 0, 1285 .dis_cap_alloc = true, 1286 .retain_on_pc = true, 1287 }, { 1288 .usecase_id = LLCC_AUDIO, 1289 .slice_id = 6, 1290 .max_cap = 2816, 1291 .priority = 1, 1292 .bonus_ways = 0xffc, 1293 .res_ways = 0x2, 1294 .cache_mode = 0, 1295 .dis_cap_alloc = true, 1296 .retain_on_pc = true, 1297 }, { 1298 .usecase_id = LLCC_MDMHPGRW, 1299 .slice_id = 7, 1300 .max_cap = 1024, 1301 .priority = 2, 1302 .bonus_ways = 0xfc, 1303 .res_ways = 0xf00, 1304 .cache_mode = 0, 1305 .dis_cap_alloc = true, 1306 .retain_on_pc = true, 1307 }, { 1308 .usecase_id = LLCC_MDM, 1309 .slice_id = 8, 1310 .max_cap = 2816, 1311 .priority = 1, 1312 .bonus_ways = 0xffc, 1313 .res_ways = 0x2, 1314 .cache_mode = 0, 1315 .dis_cap_alloc = true, 1316 .retain_on_pc = true, 1317 }, { 1318 .usecase_id = LLCC_CMPT, 1319 .slice_id = 10, 1320 .max_cap = 2816, 1321 .priority = 1, 1322 .bonus_ways = 0xffc, 1323 .res_ways = 0x2, 1324 .cache_mode = 0, 1325 .dis_cap_alloc = true, 1326 .retain_on_pc = true, 1327 }, { 1328 .usecase_id = LLCC_GPUHTW, 1329 .slice_id = 11, 1330 .max_cap = 512, 1331 .priority = 1, 1332 .fixed_size = true, 1333 .bonus_ways = 0xc, 1334 .cache_mode = 0, 1335 .dis_cap_alloc = true, 1336 .retain_on_pc = true, 1337 }, { 1338 .usecase_id = LLCC_GPU, 1339 .slice_id = 12, 1340 .max_cap = 2304, 1341 .priority = 1, 1342 .bonus_ways = 0xff0, 1343 .res_ways = 0x2, 1344 .cache_mode = 0, 1345 .dis_cap_alloc = true, 1346 .retain_on_pc = true, 1347 }, { 1348 .usecase_id = LLCC_MMUHWT, 1349 .slice_id = 13, 1350 .max_cap = 256, 1351 .priority = 2, 1352 .res_ways = 0x1, 1353 .cache_mode = 0, 1354 .dis_cap_alloc = true, 1355 .activate_on_init = true, 1356 }, { 1357 .usecase_id = LLCC_CMPTDMA, 1358 .slice_id = 15, 1359 .max_cap = 2816, 1360 .priority = 1, 1361 .bonus_ways = 0xffc, 1362 .res_ways = 0x2, 1363 .cache_mode = 0, 1364 .dis_cap_alloc = true, 1365 .retain_on_pc = true, 1366 }, { 1367 .usecase_id = LLCC_DISP, 1368 .slice_id = 16, 1369 .max_cap = 2816, 1370 .priority = 1, 1371 .bonus_ways = 0xffc, 1372 .res_ways = 0x2, 1373 .cache_mode = 0, 1374 .dis_cap_alloc = true, 1375 .retain_on_pc = true, 1376 }, { 1377 .usecase_id = LLCC_VIDFW, 1378 .slice_id = 17, 1379 .max_cap = 2816, 1380 .priority = 1, 1381 .bonus_ways = 0xffc, 1382 .res_ways = 0x2, 1383 .cache_mode = 0, 1384 .dis_cap_alloc = true, 1385 .retain_on_pc = true, 1386 }, { 1387 .usecase_id = LLCC_MDMHPFX, 1388 .slice_id = 20, 1389 .max_cap = 1024, 1390 .priority = 2, 1391 .fixed_size = true, 1392 .res_ways = 0xf00, 1393 .cache_mode = 0, 1394 .dis_cap_alloc = true, 1395 .retain_on_pc = true, 1396 }, { 1397 .usecase_id = LLCC_MDMPNG, 1398 .slice_id = 21, 1399 .max_cap = 1024, 1400 .priority = 0, 1401 .fixed_size = true, 1402 .bonus_ways = 0x1e, 1403 .cache_mode = 0, 1404 .dis_cap_alloc = true, 1405 .retain_on_pc = true, 1406 }, { 1407 .usecase_id = LLCC_AUDHW, 1408 .slice_id = 22, 1409 .max_cap = 1024, 1410 .priority = 1, 1411 .fixed_size = true, 1412 .bonus_ways = 0xffc, 1413 .res_ways = 0x2, 1414 .cache_mode = 0, 1415 .dis_cap_alloc = true, 1416 .retain_on_pc = true, 1417 }, 1418 }; 1419 1420 static const struct llcc_slice_config sm6350_data[] = { 1421 { 1422 .usecase_id = LLCC_CPUSS, 1423 .slice_id = 1, 1424 .max_cap = 768, 1425 .priority = 1, 1426 .bonus_ways = 0xfff, 1427 .cache_mode = 0, 1428 .activate_on_init = true, 1429 .write_scid_en = true, 1430 }, { 1431 .usecase_id = LLCC_MDM, 1432 .slice_id = 8, 1433 .max_cap = 512, 1434 .priority = 2, 1435 .bonus_ways = 0xfff, 1436 .cache_mode = 0, 1437 .activate_on_init = true, 1438 }, { 1439 .usecase_id = LLCC_GPUHTW, 1440 .slice_id = 11, 1441 .max_cap = 256, 1442 .priority = 1, 1443 .bonus_ways = 0xfff, 1444 .cache_mode = 0, 1445 .activate_on_init = true, 1446 }, { 1447 .usecase_id = LLCC_GPU, 1448 .slice_id = 12, 1449 .max_cap = 512, 1450 .priority = 1, 1451 .bonus_ways = 0xfff, 1452 .cache_mode = 0, 1453 .activate_on_init = true, 1454 }, { 1455 .usecase_id = LLCC_MDMPNG, 1456 .slice_id = 21, 1457 .max_cap = 768, 1458 .priority = 0, 1459 .fixed_size = true, 1460 .bonus_ways = 0xfff, 1461 .cache_mode = 0, 1462 .activate_on_init = true, 1463 }, { 1464 .usecase_id = LLCC_NPU, 1465 .slice_id = 23, 1466 .max_cap = 768, 1467 .priority = 1, 1468 .bonus_ways = 0xfff, 1469 .cache_mode = 0, 1470 .activate_on_init = true, 1471 }, { 1472 .usecase_id = LLCC_MODPE, 1473 .slice_id = 29, 1474 .max_cap = 64, 1475 .priority = 1, 1476 .fixed_size = true, 1477 .bonus_ways = 0xfff, 1478 .cache_mode = 0, 1479 .activate_on_init = true, 1480 }, 1481 }; 1482 1483 static const struct llcc_slice_config sm7150_data[] = { 1484 { 1485 .usecase_id = LLCC_CPUSS, 1486 .slice_id = 1, 1487 .max_cap = 512, 1488 .priority = 1, 1489 .bonus_ways = 0xf, 1490 .cache_mode = 0, 1491 .retain_on_pc = true, 1492 .activate_on_init = true, 1493 }, { 1494 .usecase_id = LLCC_MDM, 1495 .slice_id = 8, 1496 .max_cap = 128, 1497 .priority = 2, 1498 .bonus_ways = 0xf, 1499 .cache_mode = 0, 1500 .retain_on_pc = true, 1501 }, { 1502 .usecase_id = LLCC_GPUHTW, 1503 .slice_id = 11, 1504 .max_cap = 256, 1505 .priority = 1, 1506 .fixed_size = true, 1507 .bonus_ways = 0xf, 1508 .cache_mode = 0, 1509 .retain_on_pc = true, 1510 }, { 1511 .usecase_id = LLCC_GPU, 1512 .slice_id = 12, 1513 .max_cap = 256, 1514 .priority = 1, 1515 .fixed_size = true, 1516 .bonus_ways = 0xf, 1517 .cache_mode = 0, 1518 .retain_on_pc = true, 1519 }, { 1520 .usecase_id = LLCC_NPU, 1521 .slice_id = 23, 1522 .max_cap = 512, 1523 .priority = 1, 1524 .bonus_ways = 0xf, 1525 .cache_mode = 0, 1526 .retain_on_pc = true, 1527 }, 1528 }; 1529 1530 static const struct llcc_slice_config sm8150_data[] = { 1531 { 1532 .usecase_id = LLCC_CPUSS, 1533 .slice_id = 1, 1534 .max_cap = 3072, 1535 .priority = 1, 1536 .fixed_size = true, 1537 .bonus_ways = 0xfff, 1538 .cache_mode = 0, 1539 .retain_on_pc = true, 1540 .activate_on_init = true, 1541 }, { 1542 .usecase_id = LLCC_VIDSC0, 1543 .slice_id = 2, 1544 .max_cap = 512, 1545 .priority = 2, 1546 .fixed_size = true, 1547 .bonus_ways = 0xfff, 1548 .cache_mode = 0, 1549 .retain_on_pc = true, 1550 }, { 1551 .usecase_id = LLCC_VIDSC1, 1552 .slice_id = 3, 1553 .max_cap = 512, 1554 .priority = 2, 1555 .fixed_size = true, 1556 .bonus_ways = 0xfff, 1557 .cache_mode = 0, 1558 .retain_on_pc = true, 1559 }, { 1560 .usecase_id = LLCC_AUDIO, 1561 .slice_id = 6, 1562 .max_cap = 1024, 1563 .priority = 1, 1564 .fixed_size = true, 1565 .bonus_ways = 0xfff, 1566 .cache_mode = 0, 1567 .retain_on_pc = true, 1568 }, { 1569 .usecase_id = LLCC_MDMHPGRW, 1570 .slice_id = 7, 1571 .max_cap = 3072, 1572 .priority = 1, 1573 .bonus_ways = 0xff, 1574 .res_ways = 0xf00, 1575 .cache_mode = 0, 1576 .retain_on_pc = true, 1577 }, { 1578 .usecase_id = LLCC_MDM, 1579 .slice_id = 8, 1580 .max_cap = 3072, 1581 .priority = 1, 1582 .fixed_size = true, 1583 .bonus_ways = 0xfff, 1584 .cache_mode = 0, 1585 .retain_on_pc = true, 1586 }, { 1587 .usecase_id = LLCC_MODHW, 1588 .slice_id = 9, 1589 .max_cap = 1024, 1590 .priority = 1, 1591 .fixed_size = true, 1592 .bonus_ways = 0xfff, 1593 .cache_mode = 0, 1594 .retain_on_pc = true, 1595 }, { 1596 .usecase_id = LLCC_CMPT, 1597 .slice_id = 10, 1598 .max_cap = 3072, 1599 .priority = 1, 1600 .fixed_size = true, 1601 .bonus_ways = 0xfff, 1602 .cache_mode = 0, 1603 .retain_on_pc = true, 1604 }, { 1605 .usecase_id = LLCC_GPUHTW, 1606 .slice_id = 11, 1607 .max_cap = 512, 1608 .priority = 1, 1609 .fixed_size = true, 1610 .bonus_ways = 0xfff, 1611 .cache_mode = 0, 1612 .retain_on_pc = true, 1613 }, { 1614 .usecase_id = LLCC_GPU, 1615 .slice_id = 12, 1616 .max_cap = 2560, 1617 .priority = 1, 1618 .fixed_size = true, 1619 .bonus_ways = 0xfff, 1620 .cache_mode = 0, 1621 .retain_on_pc = true, 1622 }, { 1623 .usecase_id = LLCC_MMUHWT, 1624 .slice_id = 13, 1625 .max_cap = 1024, 1626 .priority = 1, 1627 .fixed_size = true, 1628 .bonus_ways = 0xfff, 1629 .cache_mode = 0, 1630 .activate_on_init = true, 1631 }, { 1632 .usecase_id = LLCC_CMPTDMA, 1633 .slice_id = 15, 1634 .max_cap = 3072, 1635 .priority = 1, 1636 .fixed_size = true, 1637 .bonus_ways = 0xfff, 1638 .cache_mode = 0, 1639 .retain_on_pc = true, 1640 }, { 1641 .usecase_id = LLCC_DISP, 1642 .slice_id = 16, 1643 .max_cap = 3072, 1644 .priority = 1, 1645 .fixed_size = true, 1646 .bonus_ways = 0xfff, 1647 .cache_mode = 0, 1648 .retain_on_pc = true, 1649 }, { 1650 .usecase_id = LLCC_MDMHPFX, 1651 .slice_id = 20, 1652 .max_cap = 1024, 1653 .priority = 2, 1654 .fixed_size = true, 1655 .bonus_ways = 0xfff, 1656 .cache_mode = 0, 1657 .retain_on_pc = true, 1658 }, { 1659 .usecase_id = LLCC_MDMHPFX, 1660 .slice_id = 21, 1661 .max_cap = 1024, 1662 .priority = 0, 1663 .fixed_size = true, 1664 .bonus_ways = 0xf, 1665 .cache_mode = 0, 1666 .retain_on_pc = true, 1667 }, { 1668 .usecase_id = LLCC_AUDHW, 1669 .slice_id = 22, 1670 .max_cap = 1024, 1671 .priority = 1, 1672 .fixed_size = true, 1673 .bonus_ways = 0xfff, 1674 .cache_mode = 0, 1675 .retain_on_pc = true, 1676 }, { 1677 .usecase_id = LLCC_NPU, 1678 .slice_id = 23, 1679 .max_cap = 3072, 1680 .priority = 1, 1681 .fixed_size = true, 1682 .bonus_ways = 0xfff, 1683 .cache_mode = 0, 1684 .retain_on_pc = true, 1685 }, { 1686 .usecase_id = LLCC_WLHW, 1687 .slice_id = 24, 1688 .max_cap = 3072, 1689 .priority = 1, 1690 .fixed_size = true, 1691 .bonus_ways = 0xfff, 1692 .cache_mode = 0, 1693 .retain_on_pc = true, 1694 }, { 1695 .usecase_id = LLCC_MODPE, 1696 .slice_id = 29, 1697 .max_cap = 256, 1698 .priority = 1, 1699 .fixed_size = true, 1700 .bonus_ways = 0xf, 1701 .cache_mode = 0, 1702 .retain_on_pc = true, 1703 }, { 1704 .usecase_id = LLCC_APTCM, 1705 .slice_id = 30, 1706 .max_cap = 256, 1707 .priority = 3, 1708 .fixed_size = true, 1709 .res_ways = 0x1, 1710 .cache_mode = 1, 1711 .retain_on_pc = true, 1712 }, { 1713 .usecase_id = LLCC_WRCACHE, 1714 .slice_id = 31, 1715 .max_cap = 128, 1716 .priority = 1, 1717 .fixed_size = true, 1718 .bonus_ways = 0xfff, 1719 .cache_mode = 0, 1720 }, 1721 }; 1722 1723 static const struct llcc_slice_config sm8250_data[] = { 1724 { 1725 .usecase_id = LLCC_CPUSS, 1726 .slice_id = 1, 1727 .max_cap = 3072, 1728 .priority = 1, 1729 .fixed_size = true, 1730 .bonus_ways = 0xfff, 1731 .cache_mode = 0, 1732 .retain_on_pc = true, 1733 .activate_on_init = true, 1734 }, { 1735 .usecase_id = LLCC_VIDSC0, 1736 .slice_id = 2, 1737 .max_cap = 512, 1738 .priority = 3, 1739 .fixed_size = true, 1740 .bonus_ways = 0xfff, 1741 .cache_mode = 0, 1742 .retain_on_pc = true, 1743 }, { 1744 .usecase_id = LLCC_AUDIO, 1745 .slice_id = 6, 1746 .max_cap = 1024, 1747 .priority = 1, 1748 .bonus_ways = 0xfff, 1749 .cache_mode = 0, 1750 }, { 1751 .usecase_id = LLCC_CMPT, 1752 .slice_id = 10, 1753 .max_cap = 1024, 1754 .priority = 1, 1755 .bonus_ways = 0xfff, 1756 .cache_mode = 0, 1757 }, { 1758 .usecase_id = LLCC_GPUHTW, 1759 .slice_id = 11, 1760 .max_cap = 1024, 1761 .priority = 1, 1762 .fixed_size = true, 1763 .bonus_ways = 0xfff, 1764 .cache_mode = 0, 1765 .retain_on_pc = true, 1766 }, { 1767 .usecase_id = LLCC_GPU, 1768 .slice_id = 12, 1769 .max_cap = 1024, 1770 .priority = 1, 1771 .bonus_ways = 0xfff, 1772 .cache_mode = 0, 1773 .retain_on_pc = true, 1774 .write_scid_en = true, 1775 }, { 1776 .usecase_id = LLCC_MMUHWT, 1777 .slice_id = 13, 1778 .max_cap = 1024, 1779 .priority = 1, 1780 .fixed_size = true, 1781 .bonus_ways = 0xfff, 1782 .cache_mode = 0, 1783 .activate_on_init = true, 1784 }, { 1785 .usecase_id = LLCC_CMPTDMA, 1786 .slice_id = 15, 1787 .max_cap = 1024, 1788 .priority = 1, 1789 .bonus_ways = 0xfff, 1790 .cache_mode = 0, 1791 .retain_on_pc = true, 1792 }, { 1793 .usecase_id = LLCC_DISP, 1794 .slice_id = 16, 1795 .max_cap = 3072, 1796 .priority = 1, 1797 .fixed_size = true, 1798 .bonus_ways = 0xfff, 1799 .cache_mode = 0, 1800 .retain_on_pc = true, 1801 }, { 1802 .usecase_id = LLCC_VIDFW, 1803 .slice_id = 17, 1804 .max_cap = 512, 1805 .priority = 1, 1806 .bonus_ways = 0xfff, 1807 .cache_mode = 0, 1808 .retain_on_pc = true, 1809 }, { 1810 .usecase_id = LLCC_AUDHW, 1811 .slice_id = 22, 1812 .max_cap = 1024, 1813 .priority = 1, 1814 .fixed_size = true, 1815 .bonus_ways = 0xfff, 1816 .cache_mode = 0, 1817 .retain_on_pc = true, 1818 }, { 1819 .usecase_id = LLCC_NPU, 1820 .slice_id = 23, 1821 .max_cap = 3072, 1822 .priority = 1, 1823 .fixed_size = true, 1824 .bonus_ways = 0xfff, 1825 .cache_mode = 0, 1826 .retain_on_pc = true, 1827 }, { 1828 .usecase_id = LLCC_WLHW, 1829 .slice_id = 24, 1830 .max_cap = 1024, 1831 .priority = 1, 1832 .bonus_ways = 0xfff, 1833 .cache_mode = 0, 1834 .retain_on_pc = true, 1835 }, { 1836 .usecase_id = LLCC_CVP, 1837 .slice_id = 28, 1838 .max_cap = 256, 1839 .priority = 3, 1840 .fixed_size = true, 1841 .bonus_ways = 0xfff, 1842 .cache_mode = 0, 1843 .retain_on_pc = true, 1844 }, { 1845 .usecase_id = LLCC_APTCM, 1846 .slice_id = 30, 1847 .max_cap = 128, 1848 .priority = 3, 1849 .res_ways = 0x3, 1850 .cache_mode = 1, 1851 .retain_on_pc = true, 1852 }, { 1853 .usecase_id = LLCC_WRCACHE, 1854 .slice_id = 31, 1855 .max_cap = 256, 1856 .priority = 1, 1857 .fixed_size = true, 1858 .bonus_ways = 0xfff, 1859 .cache_mode = 0, 1860 .activate_on_init = true, 1861 }, 1862 }; 1863 1864 static const struct llcc_slice_config sm8350_data[] = { 1865 { 1866 .usecase_id = LLCC_CPUSS, 1867 .slice_id = 1, 1868 .max_cap = 3072, 1869 .priority = 1, 1870 .fixed_size = true, 1871 .bonus_ways = 0xfff, 1872 .cache_mode = 0, 1873 .activate_on_init = true, 1874 .write_scid_en = true, 1875 }, { 1876 .usecase_id = LLCC_VIDSC0, 1877 .slice_id = 2, 1878 .max_cap = 512, 1879 .priority = 3, 1880 .fixed_size = true, 1881 .bonus_ways = 0xfff, 1882 .cache_mode = 0, 1883 .activate_on_init = true, 1884 }, { 1885 .usecase_id = LLCC_AUDIO, 1886 .slice_id = 6, 1887 .max_cap = 1024, 1888 .priority = 1, 1889 .fixed_size = true, 1890 .bonus_ways = 0xfff, 1891 .cache_mode = 0, 1892 }, { 1893 .usecase_id = LLCC_MDMHPGRW, 1894 .slice_id = 7, 1895 .max_cap = 1024, 1896 .priority = 3, 1897 .bonus_ways = 0xfff, 1898 .cache_mode = 0, 1899 .activate_on_init = true, 1900 }, { 1901 .usecase_id = LLCC_MODHW, 1902 .slice_id = 9, 1903 .max_cap = 1024, 1904 .priority = 1, 1905 .fixed_size = true, 1906 .bonus_ways = 0xfff, 1907 .cache_mode = 0, 1908 .activate_on_init = true, 1909 }, { 1910 .usecase_id = LLCC_CMPT, 1911 .slice_id = 10, 1912 .max_cap = 3072, 1913 .priority = 1, 1914 .fixed_size = true, 1915 .bonus_ways = 0xfff, 1916 .cache_mode = 0, 1917 .activate_on_init = true, 1918 }, { 1919 .usecase_id = LLCC_GPUHTW, 1920 .slice_id = 11, 1921 .max_cap = 1024, 1922 .priority = 1, 1923 .fixed_size = true, 1924 .bonus_ways = 0xfff, 1925 .cache_mode = 0, 1926 .activate_on_init = true, 1927 }, { 1928 .usecase_id = LLCC_GPU, 1929 .slice_id = 12, 1930 .max_cap = 1024, 1931 .priority = 1, 1932 .bonus_ways = 0xfff, 1933 .cache_mode = 0, 1934 .retain_on_pc = true, 1935 .activate_on_init = true, 1936 }, { 1937 .usecase_id = LLCC_MMUHWT, 1938 .slice_id = 13, 1939 .max_cap = 1024, 1940 .priority = 1, 1941 .fixed_size = true, 1942 .bonus_ways = 0xfff, 1943 .cache_mode = 0, 1944 .write_scid_en = true, 1945 }, { 1946 .usecase_id = LLCC_DISP, 1947 .slice_id = 16, 1948 .max_cap = 3072, 1949 .priority = 2, 1950 .fixed_size = true, 1951 .bonus_ways = 0xfff, 1952 .cache_mode = 0, 1953 .activate_on_init = true, 1954 }, { 1955 .usecase_id = LLCC_MDMPNG, 1956 .slice_id = 21, 1957 .max_cap = 1024, 1958 .priority = 0, 1959 .fixed_size = true, 1960 .bonus_ways = 0xf, 1961 .cache_mode = 0, 1962 .activate_on_init = true, 1963 }, { 1964 .usecase_id = LLCC_AUDHW, 1965 .slice_id = 22, 1966 .max_cap = 1024, 1967 .priority = 1, 1968 .fixed_size = true, 1969 .bonus_ways = 0xfff, 1970 .cache_mode = 0, 1971 .activate_on_init = true, 1972 }, { 1973 .usecase_id = LLCC_CVP, 1974 .slice_id = 28, 1975 .max_cap = 512, 1976 .priority = 3, 1977 .fixed_size = true, 1978 .bonus_ways = 0xfff, 1979 .cache_mode = 0, 1980 .activate_on_init = true, 1981 }, { 1982 .usecase_id = LLCC_MODPE, 1983 .slice_id = 29, 1984 .max_cap = 256, 1985 .priority = 1, 1986 .fixed_size = true, 1987 .bonus_ways = 0xf, 1988 .cache_mode = 0, 1989 .activate_on_init = true, 1990 }, { 1991 .usecase_id = LLCC_APTCM, 1992 .slice_id = 30, 1993 .max_cap = 1024, 1994 .priority = 3, 1995 .fixed_size = true, 1996 .res_ways = 0x1, 1997 .cache_mode = 1, 1998 .activate_on_init = true, 1999 }, { 2000 .usecase_id = LLCC_WRCACHE, 2001 .slice_id = 31, 2002 .max_cap = 512, 2003 .priority = 1, 2004 .fixed_size = true, 2005 .bonus_ways = 0xfff, 2006 .cache_mode = 0, 2007 .write_scid_en = true, 2008 }, { 2009 .usecase_id = LLCC_CVPFW, 2010 .slice_id = 17, 2011 .max_cap = 512, 2012 .priority = 1, 2013 .bonus_ways = 0xfff, 2014 .cache_mode = 0, 2015 .activate_on_init = true, 2016 }, { 2017 .usecase_id = LLCC_CPUSS1, 2018 .slice_id = 3, 2019 .max_cap = 1024, 2020 .priority = 1, 2021 .fixed_size = true, 2022 .bonus_ways = 0xfff, 2023 .cache_mode = 0, 2024 .activate_on_init = true, 2025 }, { 2026 .usecase_id = LLCC_CPUHWT, 2027 .slice_id = 5, 2028 .max_cap = 512, 2029 .priority = 1, 2030 .fixed_size = true, 2031 .bonus_ways = 0xfff, 2032 .cache_mode = 0, 2033 .write_scid_en = true, 2034 }, 2035 }; 2036 2037 static const struct llcc_slice_config sm8450_data[] = { 2038 { 2039 .usecase_id = LLCC_CPUSS, 2040 .slice_id = 1, 2041 .max_cap = 3072, 2042 .priority = 1, 2043 .bonus_ways = 0xffff, 2044 .cache_mode = 0, 2045 .retain_on_pc = true, 2046 .activate_on_init = true, 2047 }, { 2048 .usecase_id = LLCC_VIDSC0, 2049 .slice_id = 2, 2050 .max_cap = 512, 2051 .priority = 3, 2052 .fixed_size = true, 2053 .bonus_ways = 0xffff, 2054 .cache_mode = 0, 2055 .retain_on_pc = true, 2056 }, { 2057 .usecase_id = LLCC_AUDIO, 2058 .slice_id = 6, 2059 .max_cap = 1024, 2060 .priority = 1, 2061 .fixed_size = true, 2062 .bonus_ways = 0xffff, 2063 .cache_mode = 0, 2064 }, { 2065 .usecase_id = LLCC_MDMHPGRW, 2066 .slice_id = 7, 2067 .max_cap = 1024, 2068 .priority = 3, 2069 .bonus_ways = 0xffff, 2070 .cache_mode = 0, 2071 .retain_on_pc = true, 2072 }, { 2073 .usecase_id = LLCC_MODHW, 2074 .slice_id = 9, 2075 .max_cap = 1024, 2076 .priority = 1, 2077 .fixed_size = true, 2078 .bonus_ways = 0xffff, 2079 .cache_mode = 0, 2080 .retain_on_pc = true, 2081 }, { 2082 .usecase_id = LLCC_CMPT, 2083 .slice_id = 10, 2084 .max_cap = 4096, 2085 .priority = 1, 2086 .fixed_size = true, 2087 .bonus_ways = 0xffff, 2088 .cache_mode = 0, 2089 .retain_on_pc = true, 2090 }, { 2091 .usecase_id = LLCC_GPUHTW, 2092 .slice_id = 11, 2093 .max_cap = 512, 2094 .priority = 1, 2095 .fixed_size = true, 2096 .bonus_ways = 0xffff, 2097 .cache_mode = 0, 2098 .retain_on_pc = true, 2099 }, { 2100 .usecase_id = LLCC_GPU, 2101 .slice_id = 12, 2102 .max_cap = 2048, 2103 .priority = 1, 2104 .fixed_size = true, 2105 .bonus_ways = 0xffff, 2106 .cache_mode = 0, 2107 .retain_on_pc = true, 2108 .write_scid_en = true, 2109 }, { 2110 .usecase_id = LLCC_MMUHWT, 2111 .slice_id = 13, 2112 .max_cap = 768, 2113 .priority = 1, 2114 .fixed_size = true, 2115 .bonus_ways = 0xffff, 2116 .cache_mode = 0, 2117 .activate_on_init = true, 2118 }, { 2119 .usecase_id = LLCC_DISP, 2120 .slice_id = 16, 2121 .max_cap = 4096, 2122 .priority = 2, 2123 .fixed_size = true, 2124 .bonus_ways = 0xffff, 2125 .cache_mode = 0, 2126 .retain_on_pc = true, 2127 }, { 2128 .usecase_id = LLCC_MDMPNG, 2129 .slice_id = 21, 2130 .max_cap = 1024, 2131 .priority = 1, 2132 .fixed_size = true, 2133 .bonus_ways = 0xf000, 2134 .cache_mode = 0, 2135 .retain_on_pc = true, 2136 }, { 2137 .usecase_id = LLCC_AUDHW, 2138 .slice_id = 22, 2139 .max_cap = 1024, 2140 .priority = 1, 2141 .fixed_size = true, 2142 .bonus_ways = 0xffff, 2143 .cache_mode = 0, 2144 }, { 2145 .usecase_id = LLCC_CVP, 2146 .slice_id = 28, 2147 .max_cap = 256, 2148 .priority = 3, 2149 .fixed_size = true, 2150 .bonus_ways = 0xffff, 2151 .cache_mode = 0, 2152 .retain_on_pc = true, 2153 }, { 2154 .usecase_id = LLCC_MODPE, 2155 .slice_id = 29, 2156 .max_cap = 64, 2157 .priority = 1, 2158 .fixed_size = true, 2159 .bonus_ways = 0xf000, 2160 .cache_mode = 0, 2161 .retain_on_pc = true, 2162 }, { 2163 .usecase_id = LLCC_APTCM, 2164 .slice_id = 30, 2165 .max_cap = 1024, 2166 .priority = 3, 2167 .fixed_size = true, 2168 .res_ways = 0xf0, 2169 .cache_mode = 1, 2170 .retain_on_pc = true, 2171 }, { 2172 .usecase_id = LLCC_WRCACHE, 2173 .slice_id = 31, 2174 .max_cap = 512, 2175 .priority = 1, 2176 .fixed_size = true, 2177 .bonus_ways = 0xffff, 2178 .cache_mode = 0, 2179 .activate_on_init = true, 2180 }, { 2181 .usecase_id = LLCC_CVPFW, 2182 .slice_id = 17, 2183 .max_cap = 512, 2184 .priority = 1, 2185 .fixed_size = true, 2186 .bonus_ways = 0xffff, 2187 .cache_mode = 0, 2188 .retain_on_pc = true, 2189 }, { 2190 .usecase_id = LLCC_CPUSS1, 2191 .slice_id = 3, 2192 .max_cap = 1024, 2193 .priority = 1, 2194 .fixed_size = true, 2195 .bonus_ways = 0xffff, 2196 .cache_mode = 0, 2197 .retain_on_pc = true, 2198 }, { 2199 .usecase_id = LLCC_CAMEXP0, 2200 .slice_id = 4, 2201 .max_cap = 256, 2202 .priority = 3, 2203 .fixed_size = true, 2204 .bonus_ways = 0xffff, 2205 .cache_mode = 0, 2206 .retain_on_pc = true, 2207 }, { 2208 .usecase_id = LLCC_CPUMTE, 2209 .slice_id = 23, 2210 .max_cap = 256, 2211 .priority = 1, 2212 .fixed_size = true, 2213 .bonus_ways = 0xfff, 2214 .cache_mode = 0, 2215 .activate_on_init = true, 2216 }, { 2217 .usecase_id = LLCC_CPUHWT, 2218 .slice_id = 5, 2219 .max_cap = 512, 2220 .priority = 1, 2221 .fixed_size = true, 2222 .bonus_ways = 0xffff, 2223 .cache_mode = 0, 2224 .retain_on_pc = true, 2225 .activate_on_init = true, 2226 }, { 2227 .usecase_id = LLCC_CAMEXP1, 2228 .slice_id = 27, 2229 .max_cap = 256, 2230 .priority = 3, 2231 .fixed_size = true, 2232 .bonus_ways = 0xffff, 2233 .cache_mode = 0, 2234 .retain_on_pc = true, 2235 }, { 2236 .usecase_id = LLCC_AENPU, 2237 .slice_id = 8, 2238 .max_cap = 2048, 2239 .priority = 1, 2240 .fixed_size = true, 2241 .bonus_ways = 0xffff, 2242 .cache_mode = 0, 2243 }, 2244 }; 2245 2246 static const struct llcc_slice_config sm8550_data[] = { 2247 { 2248 .usecase_id = LLCC_CPUSS, 2249 .slice_id = 1, 2250 .max_cap = 5120, 2251 .priority = 1, 2252 .bonus_ways = 0xffffff, 2253 .cache_mode = 0, 2254 .activate_on_init = true, 2255 .write_scid_en = true, 2256 }, { 2257 .usecase_id = LLCC_VIDSC0, 2258 .slice_id = 2, 2259 .max_cap = 512, 2260 .priority = 4, 2261 .fixed_size = true, 2262 .bonus_ways = 0xffffff, 2263 .cache_mode = 0, 2264 }, { 2265 .usecase_id = LLCC_AUDIO, 2266 .slice_id = 6, 2267 .max_cap = 1024, 2268 .priority = 1, 2269 .fixed_size = true, 2270 .bonus_ways = 0xffffff, 2271 .cache_mode = 0, 2272 }, { 2273 .usecase_id = LLCC_MDMHPGRW, 2274 .slice_id = 25, 2275 .max_cap = 1024, 2276 .priority = 4, 2277 .bonus_ways = 0xffffff, 2278 .cache_mode = 0, 2279 }, { 2280 .usecase_id = LLCC_MODHW, 2281 .slice_id = 26, 2282 .max_cap = 1024, 2283 .priority = 1, 2284 .fixed_size = true, 2285 .bonus_ways = 0xffffff, 2286 .cache_mode = 0, 2287 }, { 2288 .usecase_id = LLCC_CMPT, 2289 .slice_id = 10, 2290 .max_cap = 4096, 2291 .priority = 1, 2292 .fixed_size = true, 2293 .bonus_ways = 0xffffff, 2294 .cache_mode = 0, 2295 }, { 2296 .usecase_id = LLCC_GPUHTW, 2297 .slice_id = 11, 2298 .max_cap = 512, 2299 .priority = 1, 2300 .fixed_size = true, 2301 .bonus_ways = 0xffffff, 2302 .cache_mode = 0, 2303 }, { 2304 .usecase_id = LLCC_GPU, 2305 .slice_id = 9, 2306 .max_cap = 3096, 2307 .priority = 1, 2308 .bonus_ways = 0xffffff, 2309 .cache_mode = 0, 2310 .write_scid_en = true, 2311 .write_scid_cacheable_en = true, 2312 }, { 2313 .usecase_id = LLCC_MMUHWT, 2314 .slice_id = 18, 2315 .max_cap = 768, 2316 .priority = 1, 2317 .fixed_size = true, 2318 .bonus_ways = 0xffffff, 2319 .cache_mode = 0, 2320 .activate_on_init = true, 2321 }, { 2322 .usecase_id = LLCC_DISP, 2323 .slice_id = 16, 2324 .max_cap = 6144, 2325 .priority = 1, 2326 .fixed_size = true, 2327 .bonus_ways = 0xffffff, 2328 .cache_mode = 2, 2329 }, { 2330 .usecase_id = LLCC_MDMPNG, 2331 .slice_id = 27, 2332 .max_cap = 1024, 2333 .priority = 0, 2334 .fixed_size = true, 2335 .bonus_ways = 0xf00000, 2336 .cache_mode = 0, 2337 }, { 2338 .usecase_id = LLCC_AUDHW, 2339 .slice_id = 22, 2340 .max_cap = 1024, 2341 .priority = 1, 2342 .fixed_size = true, 2343 .bonus_ways = 0xffffff, 2344 .cache_mode = 0, 2345 }, { 2346 .usecase_id = LLCC_CVP, 2347 .slice_id = 8, 2348 .max_cap = 256, 2349 .priority = 4, 2350 .fixed_size = true, 2351 .bonus_ways = 0xffffff, 2352 .cache_mode = 0, 2353 }, { 2354 .usecase_id = LLCC_MODPE, 2355 .slice_id = 29, 2356 .max_cap = 64, 2357 .priority = 1, 2358 .fixed_size = true, 2359 .bonus_ways = 0xf00000, 2360 .cache_mode = 0, 2361 .alloc_oneway_en = true, 2362 .vict_prio = true, 2363 }, { 2364 .usecase_id = LLCC_WRCACHE, 2365 .slice_id = 31, 2366 .max_cap = 512, 2367 .priority = 1, 2368 .fixed_size = true, 2369 .bonus_ways = 0xffffff, 2370 .cache_mode = 0, 2371 .activate_on_init = true, 2372 }, { 2373 .usecase_id = LLCC_CAMEXP0, 2374 .slice_id = 4, 2375 .max_cap = 256, 2376 .priority = 4, 2377 .fixed_size = true, 2378 .bonus_ways = 0xf, 2379 .cache_mode = 0, 2380 }, { 2381 .usecase_id = LLCC_CPUHWT, 2382 .slice_id = 5, 2383 .max_cap = 512, 2384 .priority = 1, 2385 .fixed_size = true, 2386 .bonus_ways = 0xffffff, 2387 .cache_mode = 0, 2388 .activate_on_init = true, 2389 }, { 2390 .usecase_id = LLCC_CAMEXP1, 2391 .slice_id = 7, 2392 .max_cap = 3200, 2393 .priority = 3, 2394 .fixed_size = true, 2395 .bonus_ways = 0xfffff0, 2396 .cache_mode = 2, 2397 }, { 2398 .usecase_id = LLCC_CMPTHCP, 2399 .slice_id = 17, 2400 .max_cap = 256, 2401 .priority = 4, 2402 .fixed_size = true, 2403 .bonus_ways = 0xffffff, 2404 .cache_mode = 0, 2405 }, { 2406 .usecase_id = LLCC_LCPDARE, 2407 .slice_id = 30, 2408 .max_cap = 128, 2409 .priority = 4, 2410 .fixed_size = true, 2411 .bonus_ways = 0xffffff, 2412 .cache_mode = 0, 2413 .activate_on_init = true, 2414 .alloc_oneway_en = true, 2415 .vict_prio = true, 2416 }, { 2417 .usecase_id = LLCC_AENPU, 2418 .slice_id = 3, 2419 .max_cap = 3072, 2420 .priority = 1, 2421 .fixed_size = true, 2422 .bonus_ways = 0xfe01ff, 2423 .cache_mode = 2, 2424 }, { 2425 .usecase_id = LLCC_ISLAND1, 2426 .slice_id = 12, 2427 .max_cap = 1792, 2428 .priority = 7, 2429 .fixed_size = true, 2430 .bonus_ways = 0xfe00, 2431 .cache_mode = 0, 2432 }, { 2433 .usecase_id = LLCC_ISLAND4, 2434 .slice_id = 15, 2435 .max_cap = 256, 2436 .priority = 7, 2437 .fixed_size = true, 2438 .bonus_ways = 0x10000, 2439 .cache_mode = 0, 2440 }, { 2441 .usecase_id = LLCC_CAMEXP2, 2442 .slice_id = 19, 2443 .max_cap = 3200, 2444 .priority = 3, 2445 .fixed_size = true, 2446 .bonus_ways = 0xfffff0, 2447 .cache_mode = 2, 2448 }, { 2449 .usecase_id = LLCC_CAMEXP3, 2450 .slice_id = 20, 2451 .max_cap = 3200, 2452 .priority = 2, 2453 .fixed_size = true, 2454 .bonus_ways = 0xfffff0, 2455 .cache_mode = 2, 2456 }, { 2457 .usecase_id = LLCC_CAMEXP4, 2458 .slice_id = 21, 2459 .max_cap = 3200, 2460 .priority = 2, 2461 .fixed_size = true, 2462 .bonus_ways = 0xfffff0, 2463 .cache_mode = 2, 2464 }, { 2465 .usecase_id = LLCC_DISP_WB, 2466 .slice_id = 23, 2467 .max_cap = 1024, 2468 .priority = 4, 2469 .fixed_size = true, 2470 .bonus_ways = 0xffffff, 2471 .cache_mode = 0, 2472 }, { 2473 .usecase_id = LLCC_DISP_1, 2474 .slice_id = 24, 2475 .max_cap = 6144, 2476 .priority = 1, 2477 .fixed_size = true, 2478 .bonus_ways = 0xffffff, 2479 .cache_mode = 2, 2480 }, { 2481 .usecase_id = LLCC_VIDVSP, 2482 .slice_id = 28, 2483 .max_cap = 256, 2484 .priority = 4, 2485 .fixed_size = true, 2486 .bonus_ways = 0xffffff, 2487 .cache_mode = 0, 2488 }, 2489 }; 2490 2491 static const struct llcc_slice_config sm8650_data[] = { 2492 { 2493 .usecase_id = LLCC_CPUSS, 2494 .slice_id = 1, 2495 .max_cap = 5120, 2496 .priority = 1, 2497 .bonus_ways = 0xffffff, 2498 .cache_mode = 0, 2499 .activate_on_init = true, 2500 .stale_en = true, 2501 }, { 2502 .usecase_id = LLCC_VIDSC0, 2503 .slice_id = 2, 2504 .max_cap = 512, 2505 .priority = 3, 2506 .fixed_size = true, 2507 .bonus_ways = 0xffffff, 2508 .cache_mode = 0, 2509 }, { 2510 .usecase_id = LLCC_AUDIO, 2511 .slice_id = 6, 2512 .max_cap = 512, 2513 .priority = 1, 2514 .fixed_size = true, 2515 .bonus_ways = 0xffffff, 2516 .cache_mode = 0, 2517 }, { 2518 .usecase_id = LLCC_MDMHPGRW, 2519 .slice_id = 25, 2520 .max_cap = 1024, 2521 .priority = 3, 2522 .bonus_ways = 0xffffff, 2523 .cache_mode = 0, 2524 }, { 2525 .usecase_id = LLCC_MODHW, 2526 .slice_id = 26, 2527 .max_cap = 1024, 2528 .priority = 1, 2529 .fixed_size = true, 2530 .bonus_ways = 0xffffff, 2531 .cache_mode = 0, 2532 }, { 2533 .usecase_id = LLCC_CMPT, 2534 .slice_id = 10, 2535 .max_cap = 4096, 2536 .priority = 1, 2537 .fixed_size = true, 2538 .bonus_ways = 0xffffff, 2539 .cache_mode = 0, 2540 }, { 2541 .usecase_id = LLCC_GPUHTW, 2542 .slice_id = 11, 2543 .max_cap = 512, 2544 .priority = 1, 2545 .fixed_size = true, 2546 .bonus_ways = 0xffffff, 2547 .cache_mode = 0, 2548 }, { 2549 .usecase_id = LLCC_GPU, 2550 .slice_id = 9, 2551 .max_cap = 3096, 2552 .priority = 1, 2553 .bonus_ways = 0xffffff, 2554 .cache_mode = 0, 2555 .write_scid_en = true, 2556 .write_scid_cacheable_en = true, 2557 }, { 2558 .usecase_id = LLCC_MMUHWT, 2559 .slice_id = 18, 2560 .max_cap = 768, 2561 .priority = 1, 2562 .fixed_size = true, 2563 .bonus_ways = 0xffffff, 2564 .cache_mode = 0, 2565 .activate_on_init = true, 2566 }, { 2567 .usecase_id = LLCC_DISP, 2568 .slice_id = 16, 2569 .max_cap = 6144, 2570 .priority = 1, 2571 .fixed_size = true, 2572 .bonus_ways = 0xffffff, 2573 .cache_mode = 2, 2574 }, { 2575 .usecase_id = LLCC_MDMHPFX, 2576 .slice_id = 24, 2577 .max_cap = 1024, 2578 .priority = 3, 2579 .fixed_size = true, 2580 .bonus_ways = 0xffffff, 2581 .cache_mode = 0, 2582 }, { 2583 .usecase_id = LLCC_MDMPNG, 2584 .slice_id = 27, 2585 .max_cap = 1024, 2586 .priority = 0, 2587 .fixed_size = true, 2588 .cache_mode = 0, 2589 }, { 2590 .usecase_id = LLCC_AUDHW, 2591 .slice_id = 22, 2592 .max_cap = 1024, 2593 .priority = 1, 2594 .fixed_size = true, 2595 .bonus_ways = 0xffffff, 2596 .cache_mode = 0, 2597 }, { 2598 .usecase_id = LLCC_CVP, 2599 .slice_id = 8, 2600 .max_cap = 256, 2601 .priority = 3, 2602 .fixed_size = true, 2603 .bonus_ways = 0xffffff, 2604 .cache_mode = 0, 2605 }, { 2606 .usecase_id = LLCC_MODPE, 2607 .slice_id = 29, 2608 .max_cap = 128, 2609 .priority = 1, 2610 .fixed_size = true, 2611 .bonus_ways = 0xf00000, 2612 .cache_mode = 0, 2613 .alloc_oneway_en = true, 2614 }, { 2615 .usecase_id = LLCC_WRCACHE, 2616 .slice_id = 31, 2617 .max_cap = 512, 2618 .priority = 1, 2619 .fixed_size = true, 2620 .bonus_ways = 0xffffff, 2621 .cache_mode = 0, 2622 .activate_on_init = true, 2623 }, { 2624 .usecase_id = LLCC_CAMEXP0, 2625 .slice_id = 4, 2626 .max_cap = 256, 2627 .priority = 3, 2628 .fixed_size = true, 2629 .bonus_ways = 0xf, 2630 .cache_mode = 0, 2631 }, { 2632 .usecase_id = LLCC_CAMEXP1, 2633 .slice_id = 7, 2634 .max_cap = 3200, 2635 .priority = 3, 2636 .fixed_size = true, 2637 .bonus_ways = 0xfffff0, 2638 .cache_mode = 2, 2639 }, { 2640 .usecase_id = LLCC_CMPTHCP, 2641 .slice_id = 17, 2642 .max_cap = 256, 2643 .priority = 3, 2644 .fixed_size = true, 2645 .bonus_ways = 0xffffff, 2646 .cache_mode = 0, 2647 }, { 2648 .usecase_id = LLCC_LCPDARE, 2649 .slice_id = 30, 2650 .max_cap = 128, 2651 .priority = 3, 2652 .fixed_size = true, 2653 .bonus_ways = 0xffffff, 2654 .cache_mode = 0, 2655 .activate_on_init = true, 2656 .alloc_oneway_en = true, 2657 }, { 2658 .usecase_id = LLCC_AENPU, 2659 .slice_id = 3, 2660 .max_cap = 3072, 2661 .priority = 1, 2662 .fixed_size = true, 2663 .bonus_ways = 0xffffff, 2664 .cache_mode = 2, 2665 }, { 2666 .usecase_id = LLCC_ISLAND1, 2667 .slice_id = 12, 2668 .max_cap = 5888, 2669 .priority = 7, 2670 .fixed_size = true, 2671 .res_ways = 0x7fffff, 2672 .cache_mode = 0, 2673 }, { 2674 .usecase_id = LLCC_DISP_WB, 2675 .slice_id = 23, 2676 .max_cap = 1024, 2677 .priority = 3, 2678 .fixed_size = true, 2679 .bonus_ways = 0xffffff, 2680 .cache_mode = 0, 2681 }, { 2682 .usecase_id = LLCC_VIDVSP, 2683 .slice_id = 28, 2684 .max_cap = 256, 2685 .priority = 3, 2686 .fixed_size = true, 2687 .bonus_ways = 0xffffff, 2688 .cache_mode = 0, 2689 }, 2690 }; 2691 2692 static const struct llcc_slice_config sm8750_data[] = { 2693 { 2694 .usecase_id = LLCC_CPUSS, 2695 .slice_id = 1, 2696 .max_cap = 5120, 2697 .priority = 1, 2698 .bonus_ways = 0xffffffff, 2699 .activate_on_init = true, 2700 .write_scid_en = true, 2701 }, { 2702 .usecase_id = LLCC_MDMHPFX, 2703 .slice_id = 24, 2704 .max_cap = 1024, 2705 .priority = 5, 2706 .fixed_size = true, 2707 .bonus_ways = 0xffffffff, 2708 }, { 2709 .usecase_id = LLCC_VIDSC0, 2710 .slice_id = 2, 2711 .max_cap = 512, 2712 .priority = 4, 2713 .fixed_size = true, 2714 .bonus_ways = 0xffffffff, 2715 }, { 2716 .usecase_id = LLCC_AUDIO, 2717 .slice_id = 35, 2718 .max_cap = 512, 2719 .priority = 1, 2720 .fixed_size = true, 2721 .bonus_ways = 0xffffffff, 2722 }, { 2723 .usecase_id = LLCC_MDMHPGRW, 2724 .slice_id = 25, 2725 .max_cap = 1024, 2726 .priority = 5, 2727 .bonus_ways = 0xffffffff, 2728 }, { 2729 .usecase_id = LLCC_MODHW, 2730 .slice_id = 26, 2731 .max_cap = 1024, 2732 .priority = 1, 2733 .fixed_size = true, 2734 .bonus_ways = 0xffffffff, 2735 }, { 2736 .usecase_id = LLCC_CMPT, 2737 .slice_id = 34, 2738 .max_cap = 4096, 2739 .priority = 1, 2740 .fixed_size = true, 2741 .bonus_ways = 0xffffffff, 2742 }, { 2743 .usecase_id = LLCC_GPUHTW, 2744 .slice_id = 11, 2745 .max_cap = 512, 2746 .priority = 1, 2747 .fixed_size = true, 2748 .bonus_ways = 0xffffffff, 2749 }, { 2750 .usecase_id = LLCC_GPU, 2751 .slice_id = 9, 2752 .max_cap = 5632, 2753 .priority = 1, 2754 .fixed_size = true, 2755 .bonus_ways = 0xffffffff, 2756 .write_scid_en = true, 2757 .write_scid_cacheable_en = true 2758 }, { 2759 .usecase_id = LLCC_MMUHWT, 2760 .slice_id = 18, 2761 .max_cap = 768, 2762 .priority = 1, 2763 .fixed_size = true, 2764 .bonus_ways = 0xffffffff, 2765 .activate_on_init = true, 2766 }, { 2767 .usecase_id = LLCC_DISP, 2768 .slice_id = 16, 2769 .max_cap = 7168, 2770 .priority = 1, 2771 .fixed_size = true, 2772 .bonus_ways = 0xffffffff, 2773 .cache_mode = 2, 2774 .stale_en = true, 2775 }, { 2776 .usecase_id = LLCC_VIDFW, 2777 .slice_id = 17, 2778 .priority = 4, 2779 .fixed_size = true, 2780 .bonus_ways = 0xffffffff, 2781 }, { 2782 .usecase_id = LLCC_CAMFW, 2783 .slice_id = 20, 2784 .priority = 4, 2785 .fixed_size = true, 2786 .bonus_ways = 0xffffffff, 2787 }, { 2788 .usecase_id = LLCC_MDMPNG, 2789 .slice_id = 27, 2790 .max_cap = 256, 2791 .priority = 5, 2792 .fixed_size = true, 2793 .bonus_ways = 0xf0000000, 2794 }, { 2795 .usecase_id = LLCC_AUDHW, 2796 .slice_id = 22, 2797 .max_cap = 512, 2798 .priority = 1, 2799 .fixed_size = true, 2800 .bonus_ways = 0xffffffff, 2801 }, { 2802 .usecase_id = LLCC_CVP, 2803 .slice_id = 8, 2804 .max_cap = 800, 2805 .priority = 5, 2806 .fixed_size = true, 2807 .bonus_ways = 0xffffffff, 2808 .vict_prio = true, 2809 }, { 2810 .usecase_id = LLCC_MODPE, 2811 .slice_id = 29, 2812 .max_cap = 256, 2813 .priority = 1, 2814 .fixed_size = true, 2815 .bonus_ways = 0xf0000000, 2816 .alloc_oneway_en = true, 2817 }, { 2818 .usecase_id = LLCC_WRCACHE, 2819 .slice_id = 31, 2820 .max_cap = 512, 2821 .priority = 1, 2822 .fixed_size = true, 2823 .bonus_ways = 0xffffffff, 2824 .activate_on_init = true, 2825 }, { 2826 .usecase_id = LLCC_CVPFW, 2827 .slice_id = 19, 2828 .max_cap = 64, 2829 .priority = 4, 2830 .fixed_size = true, 2831 .bonus_ways = 0xffffffff, 2832 }, { 2833 .usecase_id = LLCC_CMPTHCP, 2834 .slice_id = 15, 2835 .max_cap = 256, 2836 .priority = 4, 2837 .fixed_size = true, 2838 .bonus_ways = 0xffffffff, 2839 }, { 2840 .usecase_id = LLCC_LCPDARE, 2841 .slice_id = 30, 2842 .max_cap = 128, 2843 .priority = 5, 2844 .fixed_size = true, 2845 .bonus_ways = 0xffffffff, 2846 .activate_on_init = true, 2847 .alloc_oneway_en = true, 2848 }, { 2849 .usecase_id = LLCC_AENPU, 2850 .slice_id = 3, 2851 .max_cap = 3072, 2852 .priority = 1, 2853 .fixed_size = true, 2854 .bonus_ways = 0xffffffff, 2855 .cache_mode = 2, 2856 }, { 2857 .usecase_id = LLCC_ISLAND1, 2858 .slice_id = 12, 2859 .max_cap = 7936, 2860 .priority = 7, 2861 .fixed_size = true, 2862 .bonus_ways = 0x7fffffff, 2863 }, { 2864 .usecase_id = LLCC_DISP_WB, 2865 .slice_id = 23, 2866 .max_cap = 512, 2867 .priority = 4, 2868 .fixed_size = true, 2869 .bonus_ways = 0xffffffff, 2870 }, { 2871 .usecase_id = LLCC_VIDVSP, 2872 .slice_id = 4, 2873 .max_cap = 256, 2874 .priority = 4, 2875 .fixed_size = true, 2876 .bonus_ways = 0xffffffff, 2877 }, { 2878 .usecase_id = LLCC_VIDDEC, 2879 .slice_id = 5, 2880 .max_cap = 6144, 2881 .priority = 4, 2882 .fixed_size = true, 2883 .bonus_ways = 0xffffffff, 2884 .cache_mode = 2, 2885 .ovcap_prio = true, 2886 .parent_slice_id = 33, 2887 }, { 2888 .usecase_id = LLCC_CAMOFE, 2889 .slice_id = 33, 2890 .max_cap = 6144, 2891 .priority = 4, 2892 .fixed_size = true, 2893 .bonus_ways = 0xffffffff, 2894 .stale_en = true, 2895 .ovcap_prio = true, 2896 .parent_slice_id = 33, 2897 }, { 2898 .usecase_id = LLCC_CAMRTIP, 2899 .slice_id = 13, 2900 .max_cap = 1024, 2901 .priority = 4, 2902 .fixed_size = true, 2903 .bonus_ways = 0xffffffff, 2904 .stale_en = true, 2905 .ovcap_prio = true, 2906 .parent_slice_id = 33, 2907 }, { 2908 .usecase_id = LLCC_CAMSRTIP, 2909 .slice_id = 14, 2910 .max_cap = 6144, 2911 .priority = 4, 2912 .fixed_size = true, 2913 .bonus_ways = 0xffffffff, 2914 .stale_en = true, 2915 .ovcap_prio = true, 2916 .parent_slice_id = 33, 2917 }, { 2918 .usecase_id = LLCC_CAMRTRF, 2919 .slice_id = 7, 2920 .max_cap = 3584, 2921 .priority = 1, 2922 .fixed_size = true, 2923 .bonus_ways = 0xffffffff, 2924 .stale_en = true, 2925 .ovcap_prio = true, 2926 .parent_slice_id = 33, 2927 }, { 2928 .usecase_id = LLCC_CAMSRTRF, 2929 .slice_id = 21, 2930 .max_cap = 6144, 2931 .priority = 1, 2932 .fixed_size = true, 2933 .bonus_ways = 0xffffffff, 2934 .stale_en = true, 2935 .ovcap_prio = true, 2936 .parent_slice_id = 33, 2937 }, { 2938 .usecase_id = LLCC_CPUSSMPAM, 2939 .slice_id = 6, 2940 .max_cap = 2048, 2941 .priority = 1, 2942 .fixed_size = true, 2943 .bonus_ways = 0xffffffff, 2944 .activate_on_init = true, 2945 .write_scid_en = true, 2946 }, 2947 }; 2948 2949 static const struct llcc_slice_config qcs615_data[] = { 2950 { 2951 .usecase_id = LLCC_CPUSS, 2952 .slice_id = 1, 2953 .max_cap = 128, 2954 .priority = 1, 2955 .bonus_ways = 0xf, 2956 .cache_mode = 0, 2957 .activate_on_init = true, 2958 .write_scid_en = true, 2959 }, { 2960 .usecase_id = LLCC_MDM, 2961 .slice_id = 8, 2962 .max_cap = 256, 2963 .priority = 0, 2964 .fixed_size = true, 2965 .bonus_ways = 0xf, 2966 .cache_mode = 0, 2967 .activate_on_init = true, 2968 }, { 2969 .usecase_id = LLCC_GPUHTW, 2970 .slice_id = 11, 2971 .max_cap = 128, 2972 .priority = 1, 2973 .fixed_size = true, 2974 .bonus_ways = 0xf, 2975 .cache_mode = 0, 2976 .activate_on_init = true, 2977 }, { 2978 .usecase_id = LLCC_GPU, 2979 .slice_id = 12, 2980 .max_cap = 128, 2981 .priority = 1, 2982 .bonus_ways = 0xf, 2983 .cache_mode = 0, 2984 .activate_on_init = true, 2985 }, 2986 }; 2987 2988 static const struct llcc_slice_config qcs8300_data[] = { 2989 { 2990 .usecase_id = LLCC_GPUHTW, 2991 .slice_id = 11, 2992 .max_cap = 128, 2993 .priority = 1, 2994 .fixed_size = true, 2995 .bonus_ways = 0xf, 2996 .cache_mode = 0, 2997 .retain_on_pc = true, 2998 }, { 2999 .usecase_id = LLCC_GPU, 3000 .slice_id = 12, 3001 .max_cap = 512, 3002 .priority = 1, 3003 .fixed_size = true, 3004 .bonus_ways = 0xf, 3005 .cache_mode = 0, 3006 .retain_on_pc = true, 3007 .write_scid_en = true, 3008 }, { 3009 .usecase_id = LLCC_MMUHWT, 3010 .slice_id = 13, 3011 .max_cap = 128, 3012 .priority = 1, 3013 .fixed_size = true, 3014 .bonus_ways = 0xf, 3015 .cache_mode = 0, 3016 .activate_on_init = true, 3017 }, { 3018 .usecase_id = LLCC_ECC, 3019 .slice_id = 26, 3020 .max_cap = 256, 3021 .priority = 3, 3022 .fixed_size = true, 3023 .bonus_ways = 0xf, 3024 .cache_mode = 0, 3025 .activate_on_init = true, 3026 }, { 3027 .usecase_id = LLCC_WRCACHE, 3028 .slice_id = 31, 3029 .max_cap = 128, 3030 .priority = 1, 3031 .fixed_size = true, 3032 .bonus_ways = 0xf, 3033 .cache_mode = 0, 3034 .activate_on_init = true, 3035 }, 3036 }; 3037 3038 static const struct llcc_slice_config qdu1000_data_2ch[] = { 3039 { 3040 .usecase_id = LLCC_MDMHPGRW, 3041 .slice_id = 7, 3042 .max_cap = 512, 3043 .priority = 1, 3044 .fixed_size = true, 3045 .bonus_ways = 0xfff, 3046 .cache_mode = 0, 3047 .retain_on_pc = true, 3048 }, { 3049 .usecase_id = LLCC_MODHW, 3050 .slice_id = 9, 3051 .max_cap = 256, 3052 .priority = 1, 3053 .fixed_size = true, 3054 .bonus_ways = 0xfff, 3055 .cache_mode = 0, 3056 .retain_on_pc = true, 3057 }, { 3058 .usecase_id = LLCC_MDMPNG, 3059 .slice_id = 21, 3060 .max_cap = 256, 3061 .priority = 0, 3062 .fixed_size = true, 3063 .bonus_ways = 0x3, 3064 .cache_mode = 0, 3065 .retain_on_pc = true, 3066 }, { 3067 .usecase_id = LLCC_ECC, 3068 .slice_id = 26, 3069 .max_cap = 512, 3070 .priority = 3, 3071 .fixed_size = true, 3072 .bonus_ways = 0xffc, 3073 .cache_mode = 0, 3074 .activate_on_init = true, 3075 }, { 3076 .usecase_id = LLCC_MODPE, 3077 .slice_id = 29, 3078 .max_cap = 256, 3079 .priority = 1, 3080 .fixed_size = true, 3081 .bonus_ways = 0xfff, 3082 .cache_mode = 0, 3083 .retain_on_pc = true, 3084 }, { 3085 .usecase_id = LLCC_APTCM, 3086 .slice_id = 30, 3087 .max_cap = 256, 3088 .priority = 3, 3089 .fixed_size = true, 3090 .res_ways = 0xc, 3091 .cache_mode = 1, 3092 .retain_on_pc = true, 3093 }, { 3094 .usecase_id = LLCC_WRCACHE, 3095 .slice_id = 31, 3096 .max_cap = 128, 3097 .priority = 1, 3098 .fixed_size = true, 3099 .bonus_ways = 0x3, 3100 .cache_mode = 0, 3101 .activate_on_init = true, 3102 }, 3103 }; 3104 3105 static const struct llcc_slice_config qdu1000_data_4ch[] = { 3106 { 3107 .usecase_id = LLCC_MDMHPGRW, 3108 .slice_id = 7, 3109 .max_cap = 1024, 3110 .priority = 1, 3111 .fixed_size = true, 3112 .bonus_ways = 0xfff, 3113 .cache_mode = 0, 3114 .retain_on_pc = true, 3115 }, { 3116 .usecase_id = LLCC_MODHW, 3117 .slice_id = 9, 3118 .max_cap = 512, 3119 .priority = 1, 3120 .fixed_size = true, 3121 .bonus_ways = 0xfff, 3122 .cache_mode = 0, 3123 .retain_on_pc = true, 3124 }, { 3125 .usecase_id = LLCC_MDMPNG, 3126 .slice_id = 21, 3127 .max_cap = 512, 3128 .priority = 0, 3129 .fixed_size = true, 3130 .bonus_ways = 0x3, 3131 .cache_mode = 0, 3132 .retain_on_pc = true, 3133 }, { 3134 .usecase_id = LLCC_ECC, 3135 .slice_id = 26, 3136 .max_cap = 1024, 3137 .priority = 3, 3138 .fixed_size = true, 3139 .bonus_ways = 0xffc, 3140 .cache_mode = 0, 3141 .activate_on_init = true, 3142 }, { 3143 .usecase_id = LLCC_MODPE, 3144 .slice_id = 29, 3145 .max_cap = 512, 3146 .priority = 1, 3147 .fixed_size = true, 3148 .bonus_ways = 0xfff, 3149 .cache_mode = 0, 3150 .retain_on_pc = true, 3151 }, { 3152 .usecase_id = LLCC_APTCM, 3153 .slice_id = 30, 3154 .max_cap = 512, 3155 .priority = 3, 3156 .fixed_size = true, 3157 .res_ways = 0xc, 3158 .cache_mode = 1, 3159 .retain_on_pc = true, 3160 }, { 3161 .usecase_id = LLCC_WRCACHE, 3162 .slice_id = 31, 3163 .max_cap = 256, 3164 .priority = 1, 3165 .fixed_size = true, 3166 .bonus_ways = 0x3, 3167 .cache_mode = 0, 3168 .activate_on_init = true, 3169 }, 3170 }; 3171 3172 static const struct llcc_slice_config qdu1000_data_8ch[] = { 3173 { 3174 .usecase_id = LLCC_MDMHPGRW, 3175 .slice_id = 7, 3176 .max_cap = 2048, 3177 .priority = 1, 3178 .fixed_size = true, 3179 .bonus_ways = 0xfff, 3180 .cache_mode = 0, 3181 .retain_on_pc = true, 3182 }, { 3183 .usecase_id = LLCC_MODHW, 3184 .slice_id = 9, 3185 .max_cap = 1024, 3186 .priority = 1, 3187 .fixed_size = true, 3188 .bonus_ways = 0xfff, 3189 .cache_mode = 0, 3190 .retain_on_pc = true, 3191 }, { 3192 .usecase_id = LLCC_MDMPNG, 3193 .slice_id = 21, 3194 .max_cap = 1024, 3195 .priority = 0, 3196 .fixed_size = true, 3197 .bonus_ways = 0x3, 3198 .cache_mode = 0, 3199 .retain_on_pc = true, 3200 }, { 3201 .usecase_id = LLCC_ECC, 3202 .slice_id = 26, 3203 .max_cap = 2048, 3204 .priority = 3, 3205 .fixed_size = true, 3206 .bonus_ways = 0xffc, 3207 .cache_mode = 0, 3208 .activate_on_init = true, 3209 }, { 3210 .usecase_id = LLCC_MODPE, 3211 .slice_id = 29, 3212 .max_cap = 1024, 3213 .priority = 1, 3214 .fixed_size = true, 3215 .bonus_ways = 0xfff, 3216 .cache_mode = 0, 3217 .retain_on_pc = true, 3218 }, { 3219 .usecase_id = LLCC_APTCM, 3220 .slice_id = 30, 3221 .max_cap = 1024, 3222 .priority = 3, 3223 .fixed_size = true, 3224 .res_ways = 0xc, 3225 .cache_mode = 1, 3226 .retain_on_pc = true, 3227 }, { 3228 .usecase_id = LLCC_WRCACHE, 3229 .slice_id = 31, 3230 .max_cap = 512, 3231 .priority = 1, 3232 .fixed_size = true, 3233 .bonus_ways = 0x3, 3234 .cache_mode = 0, 3235 .activate_on_init = true, 3236 }, 3237 }; 3238 3239 static const struct llcc_slice_config x1e80100_data[] = { 3240 { 3241 .usecase_id = LLCC_CPUSS, 3242 .slice_id = 1, 3243 .max_cap = 6144, 3244 .priority = 1, 3245 .fixed_size = true, 3246 .bonus_ways = 0xfff, 3247 .cache_mode = 0, 3248 .activate_on_init = true, 3249 }, { 3250 .usecase_id = LLCC_VIDSC0, 3251 .slice_id = 2, 3252 .max_cap = 512, 3253 .priority = 4, 3254 .fixed_size = true, 3255 .bonus_ways = 0xfff, 3256 .cache_mode = 0, 3257 }, { 3258 .usecase_id = LLCC_AUDIO, 3259 .slice_id = 6, 3260 .max_cap = 1024, 3261 .priority = 1, 3262 .fixed_size = true, 3263 .bonus_ways = 0xfff, 3264 .cache_mode = 0, 3265 }, { 3266 .usecase_id = LLCC_CMPT, 3267 .slice_id = 10, 3268 .max_cap = 6144, 3269 .priority = 1, 3270 .fixed_size = true, 3271 .bonus_ways = 0xfff, 3272 .cache_mode = 0, 3273 }, { 3274 .usecase_id = LLCC_GPUHTW, 3275 .slice_id = 11, 3276 .max_cap = 512, 3277 .priority = 1, 3278 .fixed_size = true, 3279 .bonus_ways = 0xfff, 3280 .cache_mode = 0, 3281 }, { 3282 .usecase_id = LLCC_GPU, 3283 .slice_id = 9, 3284 .max_cap = 4608, 3285 .priority = 1, 3286 .bonus_ways = 0xfff, 3287 .cache_mode = 0, 3288 .write_scid_en = true, 3289 .write_scid_cacheable_en = true, 3290 .stale_en = true, 3291 }, { 3292 .usecase_id = LLCC_MMUHWT, 3293 .slice_id = 18, 3294 .max_cap = 512, 3295 .priority = 1, 3296 .fixed_size = true, 3297 .bonus_ways = 0xfff, 3298 .cache_mode = 0, 3299 .activate_on_init = true, 3300 }, { 3301 .usecase_id = LLCC_AUDHW, 3302 .slice_id = 22, 3303 .max_cap = 1024, 3304 .priority = 1, 3305 .fixed_size = true, 3306 .bonus_ways = 0xfff, 3307 .cache_mode = 0, 3308 }, { 3309 .usecase_id = LLCC_CVP, 3310 .slice_id = 8, 3311 .max_cap = 512, 3312 .priority = 4, 3313 .fixed_size = true, 3314 .bonus_ways = 0xfff, 3315 .cache_mode = 0, 3316 }, { 3317 .usecase_id = LLCC_WRCACHE, 3318 .slice_id = 31, 3319 .max_cap = 1024, 3320 .priority = 1, 3321 .fixed_size = true, 3322 .bonus_ways = 0xfff, 3323 .cache_mode = 0, 3324 .activate_on_init = true, 3325 }, { 3326 .usecase_id = LLCC_CAMEXP0, 3327 .slice_id = 4, 3328 .max_cap = 256, 3329 .priority = 4, 3330 .fixed_size = true, 3331 .bonus_ways = 0x3, 3332 .cache_mode = 0, 3333 }, { 3334 .usecase_id = LLCC_CAMEXP1, 3335 .slice_id = 7, 3336 .max_cap = 3072, 3337 .priority = 3, 3338 .fixed_size = true, 3339 .bonus_ways = 0xffc, 3340 .cache_mode = 2, 3341 }, { 3342 .usecase_id = LLCC_LCPDARE, 3343 .slice_id = 30, 3344 .max_cap = 512, 3345 .priority = 3, 3346 .fixed_size = true, 3347 .bonus_ways = 0xfff, 3348 .cache_mode = 0, 3349 .activate_on_init = true, 3350 .alloc_oneway_en = true, 3351 }, { 3352 .usecase_id = LLCC_AENPU, 3353 .slice_id = 3, 3354 .max_cap = 3072, 3355 .priority = 1, 3356 .fixed_size = true, 3357 .bonus_ways = 0xfff, 3358 .cache_mode = 2, 3359 }, { 3360 .usecase_id = LLCC_ISLAND1, 3361 .slice_id = 12, 3362 .max_cap = 2048, 3363 .priority = 7, 3364 .fixed_size = true, 3365 .res_ways = 0xf, 3366 .cache_mode = 0, 3367 }, { 3368 .usecase_id = LLCC_CAMEXP2, 3369 .slice_id = 19, 3370 .max_cap = 3072, 3371 .priority = 3, 3372 .fixed_size = true, 3373 .bonus_ways = 0xffc, 3374 .cache_mode = 2, 3375 }, { 3376 .usecase_id = LLCC_CAMEXP3, 3377 .slice_id = 20, 3378 .max_cap = 3072, 3379 .priority = 2, 3380 .fixed_size = true, 3381 .bonus_ways = 0xffc, 3382 .cache_mode = 2, 3383 }, { 3384 .usecase_id = LLCC_CAMEXP4, 3385 .slice_id = 21, 3386 .max_cap = 3072, 3387 .priority = 2, 3388 .fixed_size = true, 3389 .bonus_ways = 0xffc, 3390 .cache_mode = 2, 3391 }, 3392 }; 3393 3394 static const struct llcc_edac_reg_offset llcc_v1_edac_reg_offset = { 3395 .trp_ecc_error_status0 = 0x20344, 3396 .trp_ecc_error_status1 = 0x20348, 3397 .trp_ecc_sb_err_syn0 = 0x2304c, 3398 .trp_ecc_db_err_syn0 = 0x20370, 3399 .trp_ecc_error_cntr_clear = 0x20440, 3400 .trp_interrupt_0_status = 0x20480, 3401 .trp_interrupt_0_clear = 0x20484, 3402 .trp_interrupt_0_enable = 0x20488, 3403 3404 /* LLCC Common registers */ 3405 .cmn_status0 = 0x3000c, 3406 .cmn_interrupt_0_enable = 0x3001c, 3407 .cmn_interrupt_2_enable = 0x3003c, 3408 3409 /* LLCC DRP registers */ 3410 .drp_ecc_error_cfg = 0x40000, 3411 .drp_ecc_error_cntr_clear = 0x40004, 3412 .drp_interrupt_status = 0x41000, 3413 .drp_interrupt_clear = 0x41008, 3414 .drp_interrupt_enable = 0x4100c, 3415 .drp_ecc_error_status0 = 0x42044, 3416 .drp_ecc_error_status1 = 0x42048, 3417 .drp_ecc_sb_err_syn0 = 0x4204c, 3418 .drp_ecc_db_err_syn0 = 0x42070, 3419 }; 3420 3421 static const struct llcc_edac_reg_offset llcc_v2_1_edac_reg_offset = { 3422 .trp_ecc_error_status0 = 0x20344, 3423 .trp_ecc_error_status1 = 0x20348, 3424 .trp_ecc_sb_err_syn0 = 0x2034c, 3425 .trp_ecc_db_err_syn0 = 0x20370, 3426 .trp_ecc_error_cntr_clear = 0x20440, 3427 .trp_interrupt_0_status = 0x20480, 3428 .trp_interrupt_0_clear = 0x20484, 3429 .trp_interrupt_0_enable = 0x20488, 3430 3431 /* LLCC Common registers */ 3432 .cmn_status0 = 0x3400c, 3433 .cmn_interrupt_0_enable = 0x3401c, 3434 .cmn_interrupt_2_enable = 0x3403c, 3435 3436 /* LLCC DRP registers */ 3437 .drp_ecc_error_cfg = 0x50000, 3438 .drp_ecc_error_cntr_clear = 0x50004, 3439 .drp_interrupt_status = 0x50020, 3440 .drp_interrupt_clear = 0x50028, 3441 .drp_interrupt_enable = 0x5002c, 3442 .drp_ecc_error_status0 = 0x520f4, 3443 .drp_ecc_error_status1 = 0x520f8, 3444 .drp_ecc_sb_err_syn0 = 0x520fc, 3445 .drp_ecc_db_err_syn0 = 0x52120, 3446 }; 3447 3448 static const struct llcc_edac_reg_offset llcc_v6_edac_reg_offset = { 3449 .trp_ecc_error_status0 = 0x47448, 3450 .trp_ecc_error_status1 = 0x47450, 3451 .trp_ecc_sb_err_syn0 = 0x47490, 3452 .trp_ecc_db_err_syn0 = 0x474d0, 3453 .trp_ecc_error_cntr_clear = 0x47444, 3454 .trp_interrupt_0_status = 0x47600, 3455 .trp_interrupt_0_clear = 0x47604, 3456 .trp_interrupt_0_enable = 0x47608, 3457 3458 /* LLCC Common registers */ 3459 .cmn_status0 = 0x6400c, 3460 .cmn_interrupt_0_enable = 0x6401c, 3461 .cmn_interrupt_2_enable = 0x6403c, 3462 3463 /* LLCC DRP registers */ 3464 .drp_ecc_error_cfg = 0x80000, 3465 .drp_ecc_error_cntr_clear = 0x80004, 3466 .drp_interrupt_status = 0x80020, 3467 .drp_interrupt_clear = 0x80028, 3468 .drp_interrupt_enable = 0x8002c, 3469 .drp_ecc_error_status0 = 0x820f4, 3470 .drp_ecc_error_status1 = 0x820f8, 3471 .drp_ecc_sb_err_syn0 = 0x820fc, 3472 .drp_ecc_db_err_syn0 = 0x82120, 3473 }; 3474 3475 /* LLCC register offset starting from v1.0.0 */ 3476 static const u32 llcc_v1_reg_offset[] = { 3477 [LLCC_COMMON_HW_INFO] = 0x00030000, 3478 [LLCC_COMMON_STATUS0] = 0x0003000c, 3479 }; 3480 3481 /* LLCC register offset starting from v2.0.1 */ 3482 static const u32 llcc_v2_1_reg_offset[] = { 3483 [LLCC_COMMON_HW_INFO] = 0x00034000, 3484 [LLCC_COMMON_STATUS0] = 0x0003400c, 3485 }; 3486 3487 /* LLCC register offset starting from v6.0.0 */ 3488 static const u32 llcc_v6_reg_offset[] = { 3489 [LLCC_COMMON_HW_INFO] = 0x00064000, 3490 [LLCC_COMMON_STATUS0] = 0x0006400c, 3491 [LLCC_TRP_ATTR0_CFG] = 0x00041000, 3492 [LLCC_TRP_ATTR1_CFG] = 0x00041008, 3493 [LLCC_TRP_ATTR2_CFG] = 0x00041010, 3494 [LLCC_TRP_ATTR3_CFG] = 0x00041014, 3495 [LLCC_TRP_SID_DIS_CAP_ALLOC] = 0x00042000, 3496 [LLCC_TRP_ALGO_STALE_EN] = 0x00042008, 3497 [LLCC_TRP_ALGO_STALE_CAP_EN] = 0x00042010, 3498 [LLCC_TRP_ALGO_MRU0] = 0x00042018, 3499 [LLCC_TRP_ALGO_MRU1] = 0x00042020, 3500 [LLCC_TRP_ALGO_ALLOC0] = 0x00042028, 3501 [LLCC_TRP_ALGO_ALLOC1] = 0x00042030, 3502 [LLCC_TRP_ALGO_ALLOC2] = 0x00042038, 3503 [LLCC_TRP_ALGO_ALLOC3] = 0x00042040, 3504 [LLCC_TRP_WRS_EN] = 0x00042080, 3505 [LLCC_TRP_WRS_CACHEABLE_EN] = 0x00042088, 3506 }; 3507 3508 static const struct qcom_llcc_config qcs615_cfg[] = { 3509 { 3510 .sct_data = qcs615_data, 3511 .size = ARRAY_SIZE(qcs615_data), 3512 .reg_offset = llcc_v1_reg_offset, 3513 .edac_reg_offset = &llcc_v1_edac_reg_offset, 3514 }, 3515 }; 3516 3517 static const struct qcom_llcc_config qcs8300_cfg[] = { 3518 { 3519 .sct_data = qcs8300_data, 3520 .size = ARRAY_SIZE(qcs8300_data), 3521 .reg_offset = llcc_v2_1_reg_offset, 3522 .edac_reg_offset = &llcc_v2_1_edac_reg_offset, 3523 .num_banks = 4, 3524 }, 3525 }; 3526 3527 static const struct qcom_llcc_config qdu1000_cfg[] = { 3528 { 3529 .sct_data = qdu1000_data_8ch, 3530 .size = ARRAY_SIZE(qdu1000_data_8ch), 3531 .reg_offset = llcc_v2_1_reg_offset, 3532 .edac_reg_offset = &llcc_v2_1_edac_reg_offset, 3533 }, 3534 { 3535 .sct_data = qdu1000_data_4ch, 3536 .size = ARRAY_SIZE(qdu1000_data_4ch), 3537 .reg_offset = llcc_v2_1_reg_offset, 3538 .edac_reg_offset = &llcc_v2_1_edac_reg_offset, 3539 }, 3540 { 3541 .sct_data = qdu1000_data_4ch, 3542 .size = ARRAY_SIZE(qdu1000_data_4ch), 3543 .reg_offset = llcc_v2_1_reg_offset, 3544 .edac_reg_offset = &llcc_v2_1_edac_reg_offset, 3545 }, 3546 { 3547 .sct_data = qdu1000_data_2ch, 3548 .size = ARRAY_SIZE(qdu1000_data_2ch), 3549 .reg_offset = llcc_v2_1_reg_offset, 3550 .edac_reg_offset = &llcc_v2_1_edac_reg_offset, 3551 }, 3552 }; 3553 3554 static const struct qcom_llcc_config ipq5424_cfg[] = { 3555 { 3556 .sct_data = ipq5424_data, 3557 .size = ARRAY_SIZE(ipq5424_data), 3558 .reg_offset = llcc_v2_1_reg_offset, 3559 .edac_reg_offset = &llcc_v2_1_edac_reg_offset, 3560 .no_broadcast_register = true, 3561 }, 3562 }; 3563 3564 static const struct qcom_llcc_config sa8775p_cfg[] = { 3565 { 3566 .sct_data = sa8775p_data, 3567 .size = ARRAY_SIZE(sa8775p_data), 3568 .reg_offset = llcc_v2_1_reg_offset, 3569 .edac_reg_offset = &llcc_v2_1_edac_reg_offset, 3570 }, 3571 }; 3572 3573 static const struct qcom_llcc_config sar1130p_cfg[] = { 3574 { 3575 .sct_data = sar1130p_data, 3576 .size = ARRAY_SIZE(sar1130p_data), 3577 .reg_offset = llcc_v2_1_reg_offset, 3578 .edac_reg_offset = &llcc_v2_1_edac_reg_offset, 3579 .max_cap_shift = 14, 3580 .num_banks = 2, 3581 }, 3582 }; 3583 3584 static const struct qcom_llcc_config sar2130p_cfg[] = { 3585 { 3586 .sct_data = sar2130p_data, 3587 .size = ARRAY_SIZE(sar2130p_data), 3588 .reg_offset = llcc_v2_1_reg_offset, 3589 .edac_reg_offset = &llcc_v2_1_edac_reg_offset, 3590 .max_cap_shift = 14, 3591 .num_banks = 2, 3592 }, 3593 }; 3594 3595 static const struct qcom_llcc_config sc7180_cfg[] = { 3596 { 3597 .sct_data = sc7180_data, 3598 .size = ARRAY_SIZE(sc7180_data), 3599 .reg_offset = llcc_v1_reg_offset, 3600 .edac_reg_offset = &llcc_v1_edac_reg_offset, 3601 }, 3602 }; 3603 3604 static const struct qcom_llcc_config sc7280_cfg[] = { 3605 { 3606 .sct_data = sc7280_data, 3607 .size = ARRAY_SIZE(sc7280_data), 3608 .reg_offset = llcc_v1_reg_offset, 3609 .edac_reg_offset = &llcc_v1_edac_reg_offset, 3610 }, 3611 }; 3612 3613 static const struct qcom_llcc_config sc8180x_cfg[] = { 3614 { 3615 .sct_data = sc8180x_data, 3616 .size = ARRAY_SIZE(sc8180x_data), 3617 .reg_offset = llcc_v1_reg_offset, 3618 .edac_reg_offset = &llcc_v1_edac_reg_offset, 3619 }, 3620 }; 3621 3622 static const struct qcom_llcc_config sc8280xp_cfg[] = { 3623 { 3624 .sct_data = sc8280xp_data, 3625 .size = ARRAY_SIZE(sc8280xp_data), 3626 .reg_offset = llcc_v1_reg_offset, 3627 .edac_reg_offset = &llcc_v1_edac_reg_offset, 3628 }, 3629 }; 3630 3631 static const struct qcom_llcc_config sdm845_cfg[] = { 3632 { 3633 .sct_data = sdm845_data, 3634 .size = ARRAY_SIZE(sdm845_data), 3635 .skip_llcc_cfg = true, 3636 .reg_offset = llcc_v1_reg_offset, 3637 .edac_reg_offset = &llcc_v1_edac_reg_offset, 3638 .no_edac = true, 3639 }, 3640 }; 3641 3642 static const struct qcom_llcc_config sm6350_cfg[] = { 3643 { 3644 .sct_data = sm6350_data, 3645 .size = ARRAY_SIZE(sm6350_data), 3646 .reg_offset = llcc_v1_reg_offset, 3647 .edac_reg_offset = &llcc_v1_edac_reg_offset, 3648 }, 3649 }; 3650 3651 static const struct qcom_llcc_config sm7150_cfg[] = { 3652 { 3653 .sct_data = sm7150_data, 3654 .size = ARRAY_SIZE(sm7150_data), 3655 .reg_offset = llcc_v1_reg_offset, 3656 .edac_reg_offset = &llcc_v1_edac_reg_offset, 3657 }, 3658 }; 3659 3660 static const struct qcom_llcc_config sm8150_cfg[] = { 3661 { 3662 .sct_data = sm8150_data, 3663 .size = ARRAY_SIZE(sm8150_data), 3664 .reg_offset = llcc_v1_reg_offset, 3665 .edac_reg_offset = &llcc_v1_edac_reg_offset, 3666 }, 3667 }; 3668 3669 static const struct qcom_llcc_config sm8250_cfg[] = { 3670 { 3671 .sct_data = sm8250_data, 3672 .size = ARRAY_SIZE(sm8250_data), 3673 .reg_offset = llcc_v1_reg_offset, 3674 .edac_reg_offset = &llcc_v1_edac_reg_offset, 3675 }, 3676 }; 3677 3678 static const struct qcom_llcc_config sm8350_cfg[] = { 3679 { 3680 .sct_data = sm8350_data, 3681 .size = ARRAY_SIZE(sm8350_data), 3682 .reg_offset = llcc_v1_reg_offset, 3683 .edac_reg_offset = &llcc_v1_edac_reg_offset, 3684 }, 3685 }; 3686 3687 static const struct qcom_llcc_config sm8450_cfg[] = { 3688 { 3689 .sct_data = sm8450_data, 3690 .size = ARRAY_SIZE(sm8450_data), 3691 .reg_offset = llcc_v2_1_reg_offset, 3692 .edac_reg_offset = &llcc_v2_1_edac_reg_offset, 3693 }, 3694 }; 3695 3696 static const struct qcom_llcc_config sm8550_cfg[] = { 3697 { 3698 .sct_data = sm8550_data, 3699 .size = ARRAY_SIZE(sm8550_data), 3700 .reg_offset = llcc_v2_1_reg_offset, 3701 .edac_reg_offset = &llcc_v2_1_edac_reg_offset, 3702 }, 3703 }; 3704 3705 static const struct qcom_llcc_config sm8650_cfg[] = { 3706 { 3707 .sct_data = sm8650_data, 3708 .size = ARRAY_SIZE(sm8650_data), 3709 .reg_offset = llcc_v2_1_reg_offset, 3710 .edac_reg_offset = &llcc_v2_1_edac_reg_offset, 3711 }, 3712 }; 3713 3714 static const struct qcom_llcc_config sm8750_cfg[] = { 3715 { 3716 .sct_data = sm8750_data, 3717 .size = ARRAY_SIZE(sm8750_data), 3718 .skip_llcc_cfg = false, 3719 .reg_offset = llcc_v6_reg_offset, 3720 .edac_reg_offset = &llcc_v6_edac_reg_offset, 3721 }, 3722 }; 3723 3724 static const struct qcom_llcc_config x1e80100_cfg[] = { 3725 { 3726 .sct_data = x1e80100_data, 3727 .size = ARRAY_SIZE(x1e80100_data), 3728 .reg_offset = llcc_v2_1_reg_offset, 3729 .edac_reg_offset = &llcc_v2_1_edac_reg_offset, 3730 .irq_configured = true, 3731 }, 3732 }; 3733 3734 static const struct qcom_sct_config qcs615_cfgs = { 3735 .llcc_config = qcs615_cfg, 3736 .num_config = ARRAY_SIZE(qcs615_cfg), 3737 }; 3738 3739 static const struct qcom_sct_config qcs8300_cfgs = { 3740 .llcc_config = qcs8300_cfg, 3741 .num_config = ARRAY_SIZE(qcs8300_cfg), 3742 }; 3743 3744 static const struct qcom_sct_config qdu1000_cfgs = { 3745 .llcc_config = qdu1000_cfg, 3746 .num_config = ARRAY_SIZE(qdu1000_cfg), 3747 }; 3748 3749 static const struct qcom_sct_config ipq5424_cfgs = { 3750 .llcc_config = ipq5424_cfg, 3751 .num_config = ARRAY_SIZE(ipq5424_cfg), 3752 }; 3753 3754 static const struct qcom_sct_config sa8775p_cfgs = { 3755 .llcc_config = sa8775p_cfg, 3756 .num_config = ARRAY_SIZE(sa8775p_cfg), 3757 }; 3758 3759 static const struct qcom_sct_config sar1130p_cfgs = { 3760 .llcc_config = sar1130p_cfg, 3761 .num_config = ARRAY_SIZE(sar1130p_cfg), 3762 }; 3763 3764 static const struct qcom_sct_config sar2130p_cfgs = { 3765 .llcc_config = sar2130p_cfg, 3766 .num_config = ARRAY_SIZE(sar2130p_cfg), 3767 }; 3768 3769 static const struct qcom_sct_config sc7180_cfgs = { 3770 .llcc_config = sc7180_cfg, 3771 .num_config = ARRAY_SIZE(sc7180_cfg), 3772 }; 3773 3774 static const struct qcom_sct_config sc7280_cfgs = { 3775 .llcc_config = sc7280_cfg, 3776 .num_config = ARRAY_SIZE(sc7280_cfg), 3777 }; 3778 3779 static const struct qcom_sct_config sc8180x_cfgs = { 3780 .llcc_config = sc8180x_cfg, 3781 .num_config = ARRAY_SIZE(sc8180x_cfg), 3782 }; 3783 3784 static const struct qcom_sct_config sc8280xp_cfgs = { 3785 .llcc_config = sc8280xp_cfg, 3786 .num_config = ARRAY_SIZE(sc8280xp_cfg), 3787 }; 3788 3789 static const struct qcom_sct_config sdm845_cfgs = { 3790 .llcc_config = sdm845_cfg, 3791 .num_config = ARRAY_SIZE(sdm845_cfg), 3792 }; 3793 3794 static const struct qcom_sct_config sm6350_cfgs = { 3795 .llcc_config = sm6350_cfg, 3796 .num_config = ARRAY_SIZE(sm6350_cfg), 3797 }; 3798 3799 static const struct qcom_sct_config sm7150_cfgs = { 3800 .llcc_config = sm7150_cfg, 3801 .num_config = ARRAY_SIZE(sm7150_cfg), 3802 }; 3803 3804 static const struct qcom_sct_config sm8150_cfgs = { 3805 .llcc_config = sm8150_cfg, 3806 .num_config = ARRAY_SIZE(sm8150_cfg), 3807 }; 3808 3809 static const struct qcom_sct_config sm8250_cfgs = { 3810 .llcc_config = sm8250_cfg, 3811 .num_config = ARRAY_SIZE(sm8250_cfg), 3812 }; 3813 3814 static const struct qcom_sct_config sm8350_cfgs = { 3815 .llcc_config = sm8350_cfg, 3816 .num_config = ARRAY_SIZE(sm8350_cfg), 3817 }; 3818 3819 static const struct qcom_sct_config sm8450_cfgs = { 3820 .llcc_config = sm8450_cfg, 3821 .num_config = ARRAY_SIZE(sm8450_cfg), 3822 }; 3823 3824 static const struct qcom_sct_config sm8550_cfgs = { 3825 .llcc_config = sm8550_cfg, 3826 .num_config = ARRAY_SIZE(sm8550_cfg), 3827 }; 3828 3829 static const struct qcom_sct_config sm8650_cfgs = { 3830 .llcc_config = sm8650_cfg, 3831 .num_config = ARRAY_SIZE(sm8650_cfg), 3832 }; 3833 3834 static const struct qcom_sct_config sm8750_cfgs = { 3835 .llcc_config = sm8750_cfg, 3836 .num_config = ARRAY_SIZE(sm8750_cfg), 3837 }; 3838 3839 static const struct qcom_sct_config x1e80100_cfgs = { 3840 .llcc_config = x1e80100_cfg, 3841 .num_config = ARRAY_SIZE(x1e80100_cfg), 3842 }; 3843 3844 static struct llcc_drv_data *drv_data = (void *) -EPROBE_DEFER; 3845 3846 /** 3847 * llcc_slice_getd - get llcc slice descriptor 3848 * @uid: usecase_id for the client 3849 * 3850 * A pointer to llcc slice descriptor will be returned on success 3851 * and error pointer is returned on failure 3852 */ 3853 struct llcc_slice_desc *llcc_slice_getd(u32 uid) 3854 { 3855 const struct llcc_slice_config *cfg; 3856 struct llcc_slice_desc *desc; 3857 u32 sz, count; 3858 3859 if (IS_ERR(drv_data)) 3860 return ERR_CAST(drv_data); 3861 3862 cfg = drv_data->cfg; 3863 sz = drv_data->cfg_size; 3864 3865 for (count = 0; cfg && count < sz; count++, cfg++) 3866 if (cfg->usecase_id == uid) 3867 break; 3868 3869 if (count == sz || !cfg) 3870 return ERR_PTR(-ENODEV); 3871 3872 desc = kzalloc(sizeof(*desc), GFP_KERNEL); 3873 if (!desc) 3874 return ERR_PTR(-ENOMEM); 3875 3876 desc->slice_id = cfg->slice_id; 3877 desc->slice_size = cfg->max_cap; 3878 3879 return desc; 3880 } 3881 EXPORT_SYMBOL_GPL(llcc_slice_getd); 3882 3883 /** 3884 * llcc_slice_putd - llcc slice descriptor 3885 * @desc: Pointer to llcc slice descriptor 3886 */ 3887 void llcc_slice_putd(struct llcc_slice_desc *desc) 3888 { 3889 if (!IS_ERR_OR_NULL(desc)) 3890 kfree(desc); 3891 } 3892 EXPORT_SYMBOL_GPL(llcc_slice_putd); 3893 3894 static int llcc_update_act_ctrl(u32 sid, 3895 u32 act_ctrl_reg_val, u32 status) 3896 { 3897 struct regmap *regmap; 3898 u32 act_ctrl_reg; 3899 u32 act_clear_reg; 3900 u32 status_reg; 3901 u32 slice_status; 3902 int ret; 3903 3904 if (IS_ERR(drv_data)) 3905 return PTR_ERR(drv_data); 3906 3907 act_ctrl_reg = LLCC_TRP_ACT_CTRLn(sid); 3908 act_clear_reg = LLCC_TRP_ACT_CLEARn(sid); 3909 status_reg = LLCC_TRP_STATUSn(sid); 3910 3911 /* Set the ACTIVE trigger */ 3912 act_ctrl_reg_val |= ACT_CTRL_ACT_TRIG; 3913 ret = regmap_write(drv_data->bcast_regmap, act_ctrl_reg, 3914 act_ctrl_reg_val); 3915 if (ret) 3916 return ret; 3917 3918 /* Clear the ACTIVE trigger */ 3919 act_ctrl_reg_val &= ~ACT_CTRL_ACT_TRIG; 3920 ret = regmap_write(drv_data->bcast_regmap, act_ctrl_reg, 3921 act_ctrl_reg_val); 3922 if (ret) 3923 return ret; 3924 3925 if (drv_data->version >= LLCC_VERSION_4_1_0_0) { 3926 regmap = drv_data->bcast_and_regmap ?: drv_data->bcast_regmap; 3927 ret = regmap_read_poll_timeout(regmap, status_reg, 3928 slice_status, (slice_status & ACT_COMPLETE), 3929 0, LLCC_STATUS_READ_DELAY); 3930 if (ret) 3931 return ret; 3932 } 3933 3934 ret = regmap_read_poll_timeout(drv_data->bcast_regmap, status_reg, 3935 slice_status, !(slice_status & status), 3936 0, LLCC_STATUS_READ_DELAY); 3937 if (ret) 3938 return ret; 3939 3940 if (drv_data->version >= LLCC_VERSION_4_1_0_0) 3941 ret = regmap_write(drv_data->bcast_regmap, act_clear_reg, 3942 ACT_CLEAR); 3943 3944 return ret; 3945 } 3946 3947 /** 3948 * llcc_slice_activate - Activate the llcc slice 3949 * @desc: Pointer to llcc slice descriptor 3950 * 3951 * A value of zero will be returned on success and a negative errno will 3952 * be returned in error cases 3953 */ 3954 int llcc_slice_activate(struct llcc_slice_desc *desc) 3955 { 3956 int ret; 3957 u32 act_ctrl_val; 3958 3959 if (IS_ERR(drv_data)) 3960 return PTR_ERR(drv_data); 3961 3962 if (IS_ERR_OR_NULL(desc)) 3963 return -EINVAL; 3964 3965 mutex_lock(&drv_data->lock); 3966 if (test_bit(desc->slice_id, drv_data->bitmap)) { 3967 mutex_unlock(&drv_data->lock); 3968 return 0; 3969 } 3970 3971 act_ctrl_val = ACT_CTRL_OPCODE_ACTIVATE << ACT_CTRL_OPCODE_SHIFT; 3972 3973 ret = llcc_update_act_ctrl(desc->slice_id, act_ctrl_val, 3974 DEACTIVATE); 3975 if (ret) { 3976 mutex_unlock(&drv_data->lock); 3977 return ret; 3978 } 3979 3980 __set_bit(desc->slice_id, drv_data->bitmap); 3981 mutex_unlock(&drv_data->lock); 3982 3983 return ret; 3984 } 3985 EXPORT_SYMBOL_GPL(llcc_slice_activate); 3986 3987 /** 3988 * llcc_slice_deactivate - Deactivate the llcc slice 3989 * @desc: Pointer to llcc slice descriptor 3990 * 3991 * A value of zero will be returned on success and a negative errno will 3992 * be returned in error cases 3993 */ 3994 int llcc_slice_deactivate(struct llcc_slice_desc *desc) 3995 { 3996 u32 act_ctrl_val; 3997 int ret; 3998 3999 if (IS_ERR(drv_data)) 4000 return PTR_ERR(drv_data); 4001 4002 if (IS_ERR_OR_NULL(desc)) 4003 return -EINVAL; 4004 4005 mutex_lock(&drv_data->lock); 4006 if (!test_bit(desc->slice_id, drv_data->bitmap)) { 4007 mutex_unlock(&drv_data->lock); 4008 return 0; 4009 } 4010 act_ctrl_val = ACT_CTRL_OPCODE_DEACTIVATE << ACT_CTRL_OPCODE_SHIFT; 4011 4012 ret = llcc_update_act_ctrl(desc->slice_id, act_ctrl_val, 4013 ACTIVATE); 4014 if (ret) { 4015 mutex_unlock(&drv_data->lock); 4016 return ret; 4017 } 4018 4019 __clear_bit(desc->slice_id, drv_data->bitmap); 4020 mutex_unlock(&drv_data->lock); 4021 4022 return ret; 4023 } 4024 EXPORT_SYMBOL_GPL(llcc_slice_deactivate); 4025 4026 /** 4027 * llcc_get_slice_id - return the slice id 4028 * @desc: Pointer to llcc slice descriptor 4029 */ 4030 int llcc_get_slice_id(struct llcc_slice_desc *desc) 4031 { 4032 if (IS_ERR_OR_NULL(desc)) 4033 return -EINVAL; 4034 4035 return desc->slice_id; 4036 } 4037 EXPORT_SYMBOL_GPL(llcc_get_slice_id); 4038 4039 /** 4040 * llcc_get_slice_size - return the slice id 4041 * @desc: Pointer to llcc slice descriptor 4042 */ 4043 size_t llcc_get_slice_size(struct llcc_slice_desc *desc) 4044 { 4045 if (IS_ERR_OR_NULL(desc)) 4046 return 0; 4047 4048 return desc->slice_size; 4049 } 4050 EXPORT_SYMBOL_GPL(llcc_get_slice_size); 4051 4052 static int _qcom_llcc_cfg_program(const struct llcc_slice_config *config, 4053 const struct qcom_llcc_config *cfg) 4054 { 4055 int ret; 4056 u32 attr2_cfg; 4057 u32 attr1_cfg; 4058 u32 attr0_cfg; 4059 u32 attr2_val; 4060 u32 attr1_val; 4061 u32 attr0_val; 4062 u32 max_cap_cacheline; 4063 struct llcc_slice_desc desc; 4064 4065 attr1_val = config->cache_mode; 4066 attr1_val |= config->probe_target_ways << ATTR1_PROBE_TARGET_WAYS_SHIFT; 4067 attr1_val |= config->fixed_size << ATTR1_FIXED_SIZE_SHIFT; 4068 attr1_val |= config->priority << ATTR1_PRIORITY_SHIFT; 4069 4070 max_cap_cacheline = MAX_CAP_TO_BYTES(config->max_cap); 4071 4072 /* 4073 * LLCC instances can vary for each target. 4074 * The SW writes to broadcast register which gets propagated 4075 * to each llcc instance (llcc0,.. llccN). 4076 * Since the size of the memory is divided equally amongst the 4077 * llcc instances, we need to configure the max cap accordingly. 4078 */ 4079 max_cap_cacheline = max_cap_cacheline / drv_data->num_banks; 4080 max_cap_cacheline >>= CACHE_LINE_SIZE_SHIFT; 4081 if (cfg->max_cap_shift) 4082 attr1_val |= max_cap_cacheline << cfg->max_cap_shift; 4083 else 4084 attr1_val |= max_cap_cacheline << ATTR1_MAX_CAP_SHIFT; 4085 4086 attr1_cfg = LLCC_TRP_ATTR1_CFGn(config->slice_id); 4087 4088 ret = regmap_write(drv_data->bcast_regmap, attr1_cfg, attr1_val); 4089 if (ret) 4090 return ret; 4091 4092 if (drv_data->version >= LLCC_VERSION_4_1_0_0) { 4093 attr2_cfg = LLCC_TRP_ATTR2_CFGn(config->slice_id); 4094 attr0_val = config->res_ways; 4095 attr2_val = config->bonus_ways; 4096 } else { 4097 attr0_val = config->res_ways & ATTR0_RES_WAYS_MASK; 4098 attr0_val |= config->bonus_ways << ATTR0_BONUS_WAYS_SHIFT; 4099 } 4100 4101 attr0_cfg = LLCC_TRP_ATTR0_CFGn(config->slice_id); 4102 4103 ret = regmap_write(drv_data->bcast_regmap, attr0_cfg, attr0_val); 4104 if (ret) 4105 return ret; 4106 4107 if (drv_data->version >= LLCC_VERSION_4_1_0_0) { 4108 ret = regmap_write(drv_data->bcast_regmap, attr2_cfg, attr2_val); 4109 if (ret) 4110 return ret; 4111 } 4112 4113 /* At least SDM845 disallows non-secure writes to these registers */ 4114 if (!cfg->skip_llcc_cfg) { 4115 u32 disable_cap_alloc, retain_pc; 4116 4117 disable_cap_alloc = config->dis_cap_alloc << config->slice_id; 4118 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_SCID_DIS_CAP_ALLOC, 4119 BIT(config->slice_id), disable_cap_alloc); 4120 if (ret) 4121 return ret; 4122 4123 if (drv_data->version < LLCC_VERSION_4_1_0_0) { 4124 retain_pc = config->retain_on_pc << config->slice_id; 4125 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_PCB_ACT, 4126 BIT(config->slice_id), retain_pc); 4127 if (ret) 4128 return ret; 4129 } 4130 } 4131 4132 if (drv_data->version >= LLCC_VERSION_2_0_0_0) { 4133 u32 wren; 4134 4135 wren = config->write_scid_en << config->slice_id; 4136 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_WRSC_EN, 4137 BIT(config->slice_id), wren); 4138 if (ret) 4139 return ret; 4140 } 4141 4142 if (drv_data->version >= LLCC_VERSION_2_1_0_0) { 4143 u32 wr_cache_en; 4144 4145 wr_cache_en = config->write_scid_cacheable_en << config->slice_id; 4146 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_WRSC_CACHEABLE_EN, 4147 BIT(config->slice_id), wr_cache_en); 4148 if (ret) 4149 return ret; 4150 } 4151 4152 if (drv_data->version >= LLCC_VERSION_4_1_0_0) { 4153 u32 stale_en; 4154 u32 stale_cap_en; 4155 u32 mru_uncap_en; 4156 u32 mru_rollover; 4157 u32 alloc_oneway_en; 4158 u32 ovcap_en; 4159 u32 ovcap_prio; 4160 u32 vict_prio; 4161 4162 stale_en = config->stale_en << config->slice_id; 4163 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG1, 4164 BIT(config->slice_id), stale_en); 4165 if (ret) 4166 return ret; 4167 4168 stale_cap_en = config->stale_cap_en << config->slice_id; 4169 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG2, 4170 BIT(config->slice_id), stale_cap_en); 4171 if (ret) 4172 return ret; 4173 4174 mru_uncap_en = config->mru_uncap_en << config->slice_id; 4175 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG3, 4176 BIT(config->slice_id), mru_uncap_en); 4177 if (ret) 4178 return ret; 4179 4180 mru_rollover = config->mru_rollover << config->slice_id; 4181 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG4, 4182 BIT(config->slice_id), mru_rollover); 4183 if (ret) 4184 return ret; 4185 4186 alloc_oneway_en = config->alloc_oneway_en << config->slice_id; 4187 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG5, 4188 BIT(config->slice_id), alloc_oneway_en); 4189 if (ret) 4190 return ret; 4191 4192 ovcap_en = config->ovcap_en << config->slice_id; 4193 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG6, 4194 BIT(config->slice_id), ovcap_en); 4195 if (ret) 4196 return ret; 4197 4198 ovcap_prio = config->ovcap_prio << config->slice_id; 4199 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG7, 4200 BIT(config->slice_id), ovcap_prio); 4201 if (ret) 4202 return ret; 4203 4204 vict_prio = config->vict_prio << config->slice_id; 4205 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG8, 4206 BIT(config->slice_id), vict_prio); 4207 if (ret) 4208 return ret; 4209 } 4210 4211 if (config->activate_on_init) { 4212 desc.slice_id = config->slice_id; 4213 ret = llcc_slice_activate(&desc); 4214 } 4215 4216 return ret; 4217 } 4218 4219 static int _qcom_llcc_cfg_program_v6(const struct llcc_slice_config *config, 4220 const struct qcom_llcc_config *cfg) 4221 { 4222 u32 stale_en, stale_cap_en, mru_uncap_en, mru_rollover; 4223 u32 alloc_oneway_en, ovcap_en, ovcap_prio, vict_prio; 4224 u32 attr0_cfg, attr1_cfg, attr2_cfg, attr3_cfg; 4225 u32 attr0_val, attr1_val, attr2_val, attr3_val; 4226 u32 slice_offset, reg_offset; 4227 struct llcc_slice_desc *desc; 4228 u32 wren, wr_cache_en; 4229 int ret; 4230 4231 attr0_cfg = LLCC_V6_TRP_ATTR0_CFGn(config->slice_id); 4232 attr1_cfg = LLCC_V6_TRP_ATTR1_CFGn(config->slice_id); 4233 attr2_cfg = LLCC_V6_TRP_ATTR2_CFGn(config->slice_id); 4234 attr3_cfg = LLCC_V6_TRP_ATTR3_CFGn(config->slice_id); 4235 4236 attr0_val = config->res_ways; 4237 attr1_val = config->bonus_ways; 4238 attr2_val = config->cache_mode; 4239 attr2_val |= FIELD_PREP(ATTR2_PROBE_TARGET_WAYS_MASK, config->probe_target_ways); 4240 attr2_val |= FIELD_PREP(ATTR2_FIXED_SIZE_MASK, config->fixed_size); 4241 attr2_val |= FIELD_PREP(ATTR2_PRIORITY_MASK, config->priority); 4242 4243 if (config->parent_slice_id && config->fixed_size) { 4244 attr2_val |= FIELD_PREP(ATTR2_PARENT_SCID_MASK, config->parent_slice_id); 4245 attr2_val |= ATTR2_IN_A_GROUP_MASK; 4246 } 4247 4248 attr3_val = MAX_CAP_TO_BYTES(config->max_cap); 4249 attr3_val /= drv_data->num_banks; 4250 attr3_val >>= CACHE_LINE_SIZE_SHIFT; 4251 4252 ret = regmap_write(drv_data->bcast_regmap, attr0_cfg, attr0_val); 4253 if (ret) 4254 return ret; 4255 4256 ret = regmap_write(drv_data->bcast_regmap, attr1_cfg, attr1_val); 4257 if (ret) 4258 return ret; 4259 4260 ret = regmap_write(drv_data->bcast_regmap, attr2_cfg, attr2_val); 4261 if (ret) 4262 return ret; 4263 4264 ret = regmap_write(drv_data->bcast_regmap, attr3_cfg, attr3_val); 4265 if (ret) 4266 return ret; 4267 4268 slice_offset = config->slice_id % 32; 4269 reg_offset = (config->slice_id / 32) * 4; 4270 4271 wren = config->write_scid_en << slice_offset; 4272 ret = regmap_update_bits(drv_data->bcast_regmap, 4273 cfg->reg_offset[LLCC_TRP_WRS_EN] + reg_offset, 4274 BIT(slice_offset), wren); 4275 if (ret) 4276 return ret; 4277 4278 wr_cache_en = config->write_scid_cacheable_en << slice_offset; 4279 ret = regmap_update_bits(drv_data->bcast_regmap, 4280 cfg->reg_offset[LLCC_TRP_WRS_CACHEABLE_EN] + reg_offset, 4281 BIT(slice_offset), wr_cache_en); 4282 if (ret) 4283 return ret; 4284 4285 stale_en = config->stale_en << slice_offset; 4286 ret = regmap_update_bits(drv_data->bcast_regmap, 4287 cfg->reg_offset[LLCC_TRP_ALGO_STALE_EN] + reg_offset, 4288 BIT(slice_offset), stale_en); 4289 if (ret) 4290 return ret; 4291 4292 stale_cap_en = config->stale_cap_en << slice_offset; 4293 ret = regmap_update_bits(drv_data->bcast_regmap, 4294 cfg->reg_offset[LLCC_TRP_ALGO_STALE_CAP_EN] + reg_offset, 4295 BIT(slice_offset), stale_cap_en); 4296 if (ret) 4297 return ret; 4298 4299 mru_uncap_en = config->mru_uncap_en << slice_offset; 4300 ret = regmap_update_bits(drv_data->bcast_regmap, 4301 cfg->reg_offset[LLCC_TRP_ALGO_MRU0] + reg_offset, 4302 BIT(slice_offset), mru_uncap_en); 4303 if (ret) 4304 return ret; 4305 4306 mru_rollover = config->mru_rollover << slice_offset; 4307 ret = regmap_update_bits(drv_data->bcast_regmap, 4308 cfg->reg_offset[LLCC_TRP_ALGO_MRU1] + reg_offset, 4309 BIT(slice_offset), mru_rollover); 4310 if (ret) 4311 return ret; 4312 4313 alloc_oneway_en = config->alloc_oneway_en << slice_offset; 4314 ret = regmap_update_bits(drv_data->bcast_regmap, 4315 cfg->reg_offset[LLCC_TRP_ALGO_ALLOC0] + reg_offset, 4316 BIT(slice_offset), alloc_oneway_en); 4317 if (ret) 4318 return ret; 4319 4320 ovcap_en = config->ovcap_en << slice_offset; 4321 ret = regmap_update_bits(drv_data->bcast_regmap, 4322 cfg->reg_offset[LLCC_TRP_ALGO_ALLOC1] + reg_offset, 4323 BIT(slice_offset), ovcap_en); 4324 if (ret) 4325 return ret; 4326 4327 ovcap_prio = config->ovcap_prio << slice_offset; 4328 ret = regmap_update_bits(drv_data->bcast_regmap, 4329 cfg->reg_offset[LLCC_TRP_ALGO_ALLOC2] + reg_offset, 4330 BIT(slice_offset), ovcap_prio); 4331 if (ret) 4332 return ret; 4333 4334 vict_prio = config->vict_prio << slice_offset; 4335 ret = regmap_update_bits(drv_data->bcast_regmap, 4336 cfg->reg_offset[LLCC_TRP_ALGO_ALLOC3] + reg_offset, 4337 BIT(slice_offset), vict_prio); 4338 if (ret) 4339 return ret; 4340 4341 if (config->activate_on_init) { 4342 desc = llcc_slice_getd(config->usecase_id); 4343 if (PTR_ERR_OR_ZERO(desc)) 4344 return -EINVAL; 4345 4346 ret = llcc_slice_activate(desc); 4347 } 4348 4349 return ret; 4350 } 4351 4352 static int qcom_llcc_cfg_program(struct platform_device *pdev, 4353 const struct qcom_llcc_config *cfg) 4354 { 4355 int i; 4356 u32 sz; 4357 int ret = 0; 4358 const struct llcc_slice_config *llcc_table; 4359 4360 sz = drv_data->cfg_size; 4361 llcc_table = drv_data->cfg; 4362 4363 if (drv_data->version >= LLCC_VERSION_6_0_0_0) { 4364 for (i = 0; i < sz; i++) { 4365 ret = _qcom_llcc_cfg_program_v6(&llcc_table[i], cfg); 4366 if (ret) 4367 return ret; 4368 } 4369 } else { 4370 for (i = 0; i < sz; i++) { 4371 ret = _qcom_llcc_cfg_program(&llcc_table[i], cfg); 4372 if (ret) 4373 return ret; 4374 } 4375 } 4376 4377 return ret; 4378 } 4379 4380 static int qcom_llcc_get_cfg_index(struct platform_device *pdev, u8 *cfg_index, int num_config) 4381 { 4382 int ret; 4383 4384 ret = nvmem_cell_read_u8(&pdev->dev, "multi-chan-ddr", cfg_index); 4385 if (ret == -ENOENT || ret == -EOPNOTSUPP) { 4386 if (num_config > 1) 4387 return -EINVAL; 4388 *cfg_index = 0; 4389 return 0; 4390 } 4391 4392 if (!ret && *cfg_index >= num_config) 4393 ret = -EINVAL; 4394 4395 return ret; 4396 } 4397 4398 static void qcom_llcc_remove(struct platform_device *pdev) 4399 { 4400 /* Set the global pointer to a error code to avoid referencing it */ 4401 drv_data = ERR_PTR(-ENODEV); 4402 } 4403 4404 static struct regmap *qcom_llcc_init_mmio(struct platform_device *pdev, u8 index, 4405 const char *name) 4406 { 4407 void __iomem *base; 4408 struct regmap_config llcc_regmap_config = { 4409 .reg_bits = 32, 4410 .reg_stride = 4, 4411 .val_bits = 32, 4412 .fast_io = true, 4413 }; 4414 4415 base = devm_platform_ioremap_resource(pdev, index); 4416 if (IS_ERR(base)) 4417 return ERR_CAST(base); 4418 4419 llcc_regmap_config.name = name; 4420 return devm_regmap_init_mmio(&pdev->dev, base, &llcc_regmap_config); 4421 } 4422 4423 static int qcom_llcc_probe(struct platform_device *pdev) 4424 { 4425 u32 num_banks; 4426 struct device *dev = &pdev->dev; 4427 int ret, i; 4428 struct platform_device *llcc_edac; 4429 const struct qcom_sct_config *cfgs; 4430 const struct qcom_llcc_config *cfg; 4431 const struct llcc_slice_config *llcc_cfg; 4432 u32 sz; 4433 u8 cfg_index; 4434 u32 version; 4435 struct regmap *regmap; 4436 4437 if (!IS_ERR(drv_data)) 4438 return -EBUSY; 4439 4440 drv_data = devm_kzalloc(dev, sizeof(*drv_data), GFP_KERNEL); 4441 if (!drv_data) { 4442 ret = -ENOMEM; 4443 goto err; 4444 } 4445 4446 /* Initialize the first LLCC bank regmap */ 4447 regmap = qcom_llcc_init_mmio(pdev, 0, "llcc0_base"); 4448 if (IS_ERR(regmap)) { 4449 ret = PTR_ERR(regmap); 4450 goto err; 4451 } 4452 4453 cfgs = of_device_get_match_data(&pdev->dev); 4454 if (!cfgs) { 4455 ret = -EINVAL; 4456 goto err; 4457 } 4458 ret = qcom_llcc_get_cfg_index(pdev, &cfg_index, cfgs->num_config); 4459 if (ret) 4460 goto err; 4461 cfg = &cfgs->llcc_config[cfg_index]; 4462 4463 if (cfg->num_banks) { 4464 num_banks = cfg->num_banks; 4465 } else { 4466 ret = regmap_read(regmap, cfg->reg_offset[LLCC_COMMON_STATUS0], &num_banks); 4467 if (ret) 4468 goto err; 4469 4470 num_banks &= LLCC_LB_CNT_MASK; 4471 num_banks >>= LLCC_LB_CNT_SHIFT; 4472 } 4473 4474 drv_data->num_banks = num_banks; 4475 4476 drv_data->regmaps = devm_kcalloc(dev, num_banks, sizeof(*drv_data->regmaps), GFP_KERNEL); 4477 if (!drv_data->regmaps) { 4478 ret = -ENOMEM; 4479 goto err; 4480 } 4481 4482 drv_data->regmaps[0] = regmap; 4483 4484 /* Initialize rest of LLCC bank regmaps */ 4485 for (i = 1; i < num_banks; i++) { 4486 char *base __free(kfree) = kasprintf(GFP_KERNEL, "llcc%d_base", i); 4487 4488 drv_data->regmaps[i] = qcom_llcc_init_mmio(pdev, i, base); 4489 if (IS_ERR(drv_data->regmaps[i])) { 4490 ret = PTR_ERR(drv_data->regmaps[i]); 4491 goto err; 4492 } 4493 } 4494 4495 drv_data->bcast_regmap = qcom_llcc_init_mmio(pdev, i, "llcc_broadcast_base"); 4496 if (IS_ERR(drv_data->bcast_regmap)) { 4497 if (cfg->no_broadcast_register) { 4498 drv_data->bcast_regmap = regmap; 4499 } else { 4500 ret = PTR_ERR(drv_data->bcast_regmap); 4501 goto err; 4502 } 4503 } 4504 4505 /* Extract version of the IP */ 4506 ret = regmap_read(drv_data->bcast_regmap, cfg->reg_offset[LLCC_COMMON_HW_INFO], 4507 &version); 4508 if (ret) 4509 goto err; 4510 4511 drv_data->version = version; 4512 4513 /* Applicable only when drv_data->version >= 4.1 */ 4514 if (drv_data->version >= LLCC_VERSION_4_1_0_0) { 4515 drv_data->bcast_and_regmap = qcom_llcc_init_mmio(pdev, i + 1, "llcc_broadcast_and_base"); 4516 if (IS_ERR(drv_data->bcast_and_regmap)) { 4517 ret = PTR_ERR(drv_data->bcast_and_regmap); 4518 if (ret == -EINVAL) 4519 drv_data->bcast_and_regmap = NULL; 4520 else 4521 goto err; 4522 } 4523 } 4524 4525 llcc_cfg = cfg->sct_data; 4526 sz = cfg->size; 4527 4528 for (i = 0; i < sz; i++) 4529 if (llcc_cfg[i].slice_id > drv_data->max_slices) 4530 drv_data->max_slices = llcc_cfg[i].slice_id; 4531 4532 drv_data->bitmap = devm_bitmap_zalloc(dev, drv_data->max_slices, 4533 GFP_KERNEL); 4534 if (!drv_data->bitmap) { 4535 ret = -ENOMEM; 4536 goto err; 4537 } 4538 4539 drv_data->cfg = llcc_cfg; 4540 drv_data->cfg_size = sz; 4541 drv_data->edac_reg_offset = cfg->edac_reg_offset; 4542 drv_data->ecc_irq_configured = cfg->irq_configured; 4543 mutex_init(&drv_data->lock); 4544 platform_set_drvdata(pdev, drv_data); 4545 4546 ret = qcom_llcc_cfg_program(pdev, cfg); 4547 if (ret) 4548 goto err; 4549 4550 drv_data->ecc_irq = platform_get_irq_optional(pdev, 0); 4551 4552 /* 4553 * On some platforms, the access to EDAC registers will be locked by 4554 * the bootloader. So probing the EDAC driver will result in a crash. 4555 * Hence, disable the creation of EDAC platform device for the 4556 * problematic platforms. 4557 */ 4558 if (!cfg->no_edac) { 4559 llcc_edac = platform_device_register_data(&pdev->dev, 4560 "qcom_llcc_edac", -1, drv_data, 4561 sizeof(*drv_data)); 4562 if (IS_ERR(llcc_edac)) 4563 dev_err(dev, "Failed to register llcc edac driver\n"); 4564 } 4565 4566 return 0; 4567 err: 4568 drv_data = ERR_PTR(-ENODEV); 4569 return ret; 4570 } 4571 4572 static const struct of_device_id qcom_llcc_of_match[] = { 4573 { .compatible = "qcom,ipq5424-llcc", .data = &ipq5424_cfgs}, 4574 { .compatible = "qcom,qcs615-llcc", .data = &qcs615_cfgs}, 4575 { .compatible = "qcom,qcs8300-llcc", .data = &qcs8300_cfgs}, 4576 { .compatible = "qcom,qdu1000-llcc", .data = &qdu1000_cfgs}, 4577 { .compatible = "qcom,sa8775p-llcc", .data = &sa8775p_cfgs }, 4578 { .compatible = "qcom,sar1130p-llcc", .data = &sar1130p_cfgs }, 4579 { .compatible = "qcom,sar2130p-llcc", .data = &sar2130p_cfgs }, 4580 { .compatible = "qcom,sc7180-llcc", .data = &sc7180_cfgs }, 4581 { .compatible = "qcom,sc7280-llcc", .data = &sc7280_cfgs }, 4582 { .compatible = "qcom,sc8180x-llcc", .data = &sc8180x_cfgs }, 4583 { .compatible = "qcom,sc8280xp-llcc", .data = &sc8280xp_cfgs }, 4584 { .compatible = "qcom,sdm845-llcc", .data = &sdm845_cfgs }, 4585 { .compatible = "qcom,sm6350-llcc", .data = &sm6350_cfgs }, 4586 { .compatible = "qcom,sm7150-llcc", .data = &sm7150_cfgs }, 4587 { .compatible = "qcom,sm8150-llcc", .data = &sm8150_cfgs }, 4588 { .compatible = "qcom,sm8250-llcc", .data = &sm8250_cfgs }, 4589 { .compatible = "qcom,sm8350-llcc", .data = &sm8350_cfgs }, 4590 { .compatible = "qcom,sm8450-llcc", .data = &sm8450_cfgs }, 4591 { .compatible = "qcom,sm8550-llcc", .data = &sm8550_cfgs }, 4592 { .compatible = "qcom,sm8650-llcc", .data = &sm8650_cfgs }, 4593 { .compatible = "qcom,sm8750-llcc", .data = &sm8750_cfgs }, 4594 { .compatible = "qcom,x1e80100-llcc", .data = &x1e80100_cfgs }, 4595 { } 4596 }; 4597 MODULE_DEVICE_TABLE(of, qcom_llcc_of_match); 4598 4599 static struct platform_driver qcom_llcc_driver = { 4600 .driver = { 4601 .name = "qcom-llcc", 4602 .of_match_table = qcom_llcc_of_match, 4603 }, 4604 .probe = qcom_llcc_probe, 4605 .remove = qcom_llcc_remove, 4606 }; 4607 module_platform_driver(qcom_llcc_driver); 4608 4609 MODULE_DESCRIPTION("Qualcomm Last Level Cache Controller"); 4610 MODULE_LICENSE("GPL v2"); 4611