1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved. 4 * 5 */ 6 7 #include <linux/bitfield.h> 8 #include <linux/cleanup.h> 9 #include <linux/device.h> 10 #include <linux/io.h> 11 #include <linux/kernel.h> 12 #include <linux/module.h> 13 #include <linux/mutex.h> 14 #include <linux/nvmem-consumer.h> 15 #include <linux/of.h> 16 #include <linux/of_reserved_mem.h> 17 #include <linux/regmap.h> 18 #include <linux/sizes.h> 19 #include <linux/slab.h> 20 #include <linux/soc/qcom/llcc-qcom.h> 21 22 #define ACTIVATE BIT(0) 23 #define DEACTIVATE BIT(1) 24 #define ACT_CLEAR BIT(0) 25 #define ACT_COMPLETE BIT(4) 26 #define ACT_CTRL_OPCODE_ACTIVATE BIT(0) 27 #define ACT_CTRL_OPCODE_DEACTIVATE BIT(1) 28 #define ACT_CTRL_ACT_TRIG BIT(0) 29 #define ACT_CTRL_OPCODE_SHIFT 1 30 #define ATTR1_PROBE_TARGET_WAYS_SHIFT 2 31 #define ATTR1_FIXED_SIZE_SHIFT 3 32 #define ATTR1_PRIORITY_SHIFT 4 33 #define ATTR1_MAX_CAP_SHIFT 16 34 #define ATTR0_RES_WAYS_MASK GENMASK(15, 0) 35 #define ATTR0_BONUS_WAYS_MASK GENMASK(31, 16) 36 #define ATTR0_BONUS_WAYS_SHIFT 16 37 #define ATTR2_PROBE_TARGET_WAYS_MASK BIT(4) 38 #define ATTR2_FIXED_SIZE_MASK BIT(8) 39 #define ATTR2_PRIORITY_MASK GENMASK(14, 12) 40 #define ATTR2_PARENT_SCID_MASK GENMASK(21, 16) 41 #define ATTR2_IN_A_GROUP_MASK BIT(24) 42 #define LLCC_STATUS_READ_DELAY 100 43 44 #define CACHE_LINE_SIZE_SHIFT 6 45 46 #define LLCC_LB_CNT_MASK GENMASK(31, 28) 47 #define LLCC_LB_CNT_SHIFT 28 48 49 #define MAX_CAP_TO_BYTES(n) (n * SZ_1K) 50 #define LLCC_TRP_ACT_CTRLn(n) (n * SZ_4K) 51 #define LLCC_TRP_ACT_CLEARn(n) (8 + n * SZ_4K) 52 #define LLCC_TRP_STATUSn(n) (4 + n * SZ_4K) 53 #define LLCC_TRP_ATTR0_CFGn(n) (0x21000 + SZ_8 * n) 54 #define LLCC_TRP_ATTR1_CFGn(n) (0x21004 + SZ_8 * n) 55 #define LLCC_TRP_ATTR2_CFGn(n) (0x21100 + SZ_4 * n) 56 #define LLCC_V6_TRP_ATTR0_CFGn(n) (cfg->reg_offset[LLCC_TRP_ATTR0_CFG] + SZ_64 * (n)) 57 #define LLCC_V6_TRP_ATTR1_CFGn(n) (cfg->reg_offset[LLCC_TRP_ATTR1_CFG] + SZ_64 * (n)) 58 #define LLCC_V6_TRP_ATTR2_CFGn(n) (cfg->reg_offset[LLCC_TRP_ATTR2_CFG] + SZ_64 * (n)) 59 #define LLCC_V6_TRP_ATTR3_CFGn(n) (cfg->reg_offset[LLCC_TRP_ATTR3_CFG] + SZ_64 * (n)) 60 61 #define LLCC_TRP_SCID_DIS_CAP_ALLOC 0x21f00 62 #define LLCC_TRP_PCB_ACT 0x21f04 63 #define LLCC_TRP_ALGO_CFG1 0x21f0c 64 #define LLCC_TRP_ALGO_CFG2 0x21f10 65 #define LLCC_TRP_ALGO_CFG3 0x21f14 66 #define LLCC_TRP_ALGO_CFG4 0x21f18 67 #define LLCC_TRP_ALGO_CFG5 0x21f1c 68 #define LLCC_TRP_WRSC_EN 0x21f20 69 #define LLCC_TRP_ALGO_CFG6 0x21f24 70 #define LLCC_TRP_ALGO_CFG7 0x21f28 71 #define LLCC_TRP_WRSC_CACHEABLE_EN 0x21f2c 72 #define LLCC_TRP_ALGO_CFG8 0x21f30 73 74 #define LLCC_VERSION_2_0_0_0 0x02000000 75 #define LLCC_VERSION_2_1_0_0 0x02010000 76 #define LLCC_VERSION_4_1_0_0 0x04010000 77 #define LLCC_VERSION_6_0_0_0 0X06000000 78 79 #define SLC_SCT_MEM_LAYOUT_VERSION1 1 /* SCT Memory layout version */ 80 #define SLC_SCT_DONE 0x00534354444f4e45 /* SCT programming OK */ 81 #define SLC_SCT_FAIL 0x005343544641494c /* SCT programming failed */ 82 #define SLC_SCT_NAME_LEN 15 83 #define SLC_SCT_SLICE_ACT_ON_BOOT BIT(25) 84 85 /** 86 * struct llcc_slice_config - Data associated with the LLCC slice 87 * @usecase_id: Unique id for the client's use case 88 * @slice_id: LLCC slice id for each client 89 * @max_cap: The maximum capacity of the cache slice provided in KB 90 * @priority: Priority of the client used to select victim line for replacement 91 * @fixed_size: Boolean indicating if the slice has a fixed capacity 92 * @bonus_ways: Bonus ways are additional ways to be used for any slice, 93 * if client ends up using more than reserved cache ways. Bonus 94 * ways are allocated only if they are not reserved for some 95 * other client. 96 * @res_ways: Reserved ways for the cache slice, the reserved ways cannot 97 * be used by any other client than the one its assigned to. 98 * @cache_mode: Each slice operates as a cache, this controls the mode of the 99 * slice: normal or TCM(Tightly Coupled Memory) 100 * @probe_target_ways: Determines what ways to probe for access hit. When 101 * configured to 1 only bonus and reserved ways are probed. 102 * When configured to 0 all ways in LLCC are probed. 103 * @dis_cap_alloc: Disable capacity based allocation for a client 104 * @retain_on_pc: If this bit is set and client has maintained active vote 105 * then the ways assigned to this client are not flushed on power 106 * collapse. 107 * @activate_on_init: Activate the slice immediately after it is programmed 108 * @write_scid_en: Bit enables write cache support for a given scid. 109 * @write_scid_cacheable_en: Enables write cache cacheable support for a 110 * given scid (not supported on v2 or older hardware). 111 * @stale_en: Bit enables stale. 112 * @stale_cap_en: Bit enables stale only if current scid is over-cap. 113 * @mru_uncap_en: Roll-over on reserved cache ways if current scid is 114 * under-cap. 115 * @mru_rollover: Roll-over on reserved cache ways. 116 * @alloc_oneway_en: Allways allocate one way on over-cap even if there's no 117 * same-scid lines for replacement. 118 * @ovcap_en: Once current scid is over-capacity, allocate other over-cap SCID. 119 * @ovcap_prio: Once current scid is over-capacity, allocate other low priority 120 * over-cap scid. Depends on corresponding bit being set in 121 * ovcap_en. 122 * @vict_prio: When current scid is under-capacity, allocate over other 123 * lower-than victim priority-line threshold scid. 124 * @parent_slice_id: For grouped slices, specifies the slice id of the parent. 125 */ 126 struct llcc_slice_config { 127 u32 usecase_id; 128 u32 slice_id; 129 u32 max_cap; 130 u32 priority; 131 bool fixed_size; 132 u32 bonus_ways; 133 u32 res_ways; 134 u32 cache_mode; 135 u32 probe_target_ways; 136 bool dis_cap_alloc; 137 bool retain_on_pc; 138 bool activate_on_init; 139 bool write_scid_en; 140 bool write_scid_cacheable_en; 141 bool stale_en; 142 bool stale_cap_en; 143 bool mru_uncap_en; 144 bool mru_rollover; 145 bool alloc_oneway_en; 146 bool ovcap_en; 147 bool ovcap_prio; 148 bool vict_prio; 149 u32 parent_slice_id; 150 }; 151 152 /* 153 * struct slc_sct_error - Represents SCT error 154 * @code: FW code status 155 * @param: Holds the SCT programming error 156 */ 157 struct slc_sct_error { 158 __le64 code; 159 __le64 param; 160 } __packed; 161 162 /* 163 * struct slc_sct_status - SCT programming status 164 * @program_status: Indicates programming success or failure 165 * @version: SCT mem layout version 166 * @error: Error enum and its param 167 */ 168 struct slc_sct_status { 169 __le64 program_status; 170 /* Use the lower 8 bits */ 171 __le64 version; 172 struct slc_sct_error error; 173 } __packed; 174 175 /* 176 * struct slc_sct_details - SCT details 177 * @revision: revision of the SCT table 178 * @name: name of the SCT table 179 */ 180 struct slc_sct_details { 181 u8 revision; 182 char name[SLC_SCT_NAME_LEN]; 183 } __packed; 184 185 /* 186 * struct tcm_mem_info - SC TCM Shared memory details 187 * @is_present: is TCM region present 188 * @offset: offset of TCM shared memory details 189 */ 190 struct slc_tcm_mem_info { 191 __le32 is_present; 192 __le32 offset; 193 } __packed; 194 195 /* 196 * struct slc_sct_slice_desc - Slice descriptor definition used in shmem 197 * @slice_id: SCID of the slice 198 * @usecase_id: Usecase ID of the slice 199 * @slice_properties: 200 * slice_size: Contains the slice descriptor size - 20 bit wide 201 * rsvd: Reserved space - 4 bit wide 202 * flags: Flags for descriptors - 3 bit wide 203 * MPAM SCID: Bit 24 204 * Activate on boot: Bit 25 205 * Non-HLOS SCID: Bit 26 206 * HWMutex: Ensures only one processor (CPU or MCU) at a time can 207 * access the LLCC hardware resources - 5 bit wide 208 */ 209 struct slc_sct_slice_desc { 210 __le16 slice_id; 211 __le16 usecase_id; 212 __le32 slice_properties; 213 } __packed; 214 215 /* 216 * struct slc_sct_mem - Shared memory structure 217 * @sct_status: Status of SCT programming 218 * @sct_details: Sct revision and name details 219 * @tcm_mem_info: TCM shared memory presence & offset info 220 * @slice_descs_count: Number of slice desc present in SCT 221 * @scid_max: Maximum no. of SCIDs supported 222 * @slice_descs: Array of SCT slice desc 223 */ 224 struct slc_sct_mem { 225 struct slc_sct_status sct_status; 226 struct slc_sct_details sct_details; 227 struct slc_tcm_mem_info tcm_mem_info; 228 __le32 slice_descs_count; 229 __le32 scid_max; 230 struct slc_sct_slice_desc slice_descs[] __counted_by_le(slice_descs_count); 231 } __packed; 232 233 struct qcom_llcc_config { 234 const struct llcc_slice_config *sct_data; 235 const u32 *reg_offset; 236 const struct llcc_edac_reg_offset *edac_reg_offset; 237 u32 max_cap_shift; /* instead of ATTR1_MAX_CAP_SHIFT */ 238 u32 num_banks; 239 int size; 240 bool skip_llcc_cfg; 241 bool no_edac; 242 bool irq_configured; 243 bool no_broadcast_register; 244 }; 245 246 struct qcom_sct_config { 247 const struct qcom_llcc_config *llcc_config; 248 int num_config; 249 }; 250 251 enum llcc_reg_offset { 252 LLCC_COMMON_HW_INFO, 253 LLCC_COMMON_STATUS0, 254 LLCC_TRP_ATTR0_CFG, 255 LLCC_TRP_ATTR1_CFG, 256 LLCC_TRP_ATTR2_CFG, 257 LLCC_TRP_ATTR3_CFG, 258 LLCC_TRP_SID_DIS_CAP_ALLOC, 259 LLCC_TRP_ALGO_STALE_EN, 260 LLCC_TRP_ALGO_STALE_CAP_EN, 261 LLCC_TRP_ALGO_MRU0, 262 LLCC_TRP_ALGO_MRU1, 263 LLCC_TRP_ALGO_ALLOC0, 264 LLCC_TRP_ALGO_ALLOC1, 265 LLCC_TRP_ALGO_ALLOC2, 266 LLCC_TRP_ALGO_ALLOC3, 267 LLCC_TRP_WRS_EN, 268 LLCC_TRP_WRS_CACHEABLE_EN, 269 }; 270 271 static const struct llcc_slice_config eliza_data[] = { 272 { 273 .usecase_id = LLCC_CPUSS, 274 .slice_id = 1, 275 .max_cap = 896, 276 .bonus_ways = 0xfff, 277 .activate_on_init = true, 278 .write_scid_en = true, 279 .stale_en = true, 280 }, 281 { 282 .usecase_id = LLCC_MDMHPFX, 283 .slice_id = 24, 284 .max_cap = 1024, 285 .priority = 5, 286 .fixed_size = true, 287 .bonus_ways = 0xfff, 288 }, 289 { 290 .usecase_id = LLCC_VIDSC0, 291 .slice_id = 2, 292 .max_cap = 128, 293 .priority = 5, 294 .fixed_size = true, 295 .bonus_ways = 0xfff, 296 }, 297 { 298 .usecase_id = LLCC_MDMHPGRW, 299 .slice_id = 25, 300 .max_cap = 1024, 301 .priority = 5, 302 .bonus_ways = 0xfff, 303 }, 304 { 305 .usecase_id = LLCC_GPUHTW, 306 .slice_id = 11, 307 .max_cap = 256, 308 .priority = 1, 309 .fixed_size = true, 310 .bonus_ways = 0xfff, 311 }, 312 { 313 .usecase_id = LLCC_GPU, 314 .slice_id = 9, 315 .max_cap = 896, 316 .priority = 1, 317 .bonus_ways = 0xfff, 318 .write_scid_cacheable_en = true, 319 }, 320 { 321 .usecase_id = LLCC_MMUHWT, 322 .slice_id = 18, 323 .max_cap = 256, 324 .priority = 1, 325 .fixed_size = true, 326 .bonus_ways = 0xfff, 327 .activate_on_init = true, 328 }, 329 { 330 .usecase_id = LLCC_MDMPNG, 331 .slice_id = 27, 332 .max_cap = 256, 333 .priority = 5, 334 .fixed_size = true, 335 .bonus_ways = 0xfff, 336 }, 337 { 338 .usecase_id = LLCC_MODPE, 339 .slice_id = 29, 340 .max_cap = 256, 341 .priority = 1, 342 .fixed_size = true, 343 .bonus_ways = 0xf00, 344 .alloc_oneway_en = true, 345 }, 346 { 347 .usecase_id = LLCC_WRCACHE, 348 .slice_id = 31, 349 .max_cap = 256, 350 .priority = 1, 351 .fixed_size = true, 352 .bonus_ways = 0xfff, 353 .activate_on_init = true, 354 }, 355 { 356 .usecase_id = LLCC_LCPDARE, 357 .slice_id = 30, 358 .max_cap = 128, 359 .priority = 5, 360 .fixed_size = true, 361 .bonus_ways = 0xfff, 362 .activate_on_init = true, 363 .alloc_oneway_en = true, 364 }, 365 { 366 .usecase_id = LLCC_ISLAND1, 367 .slice_id = 12, 368 .max_cap = 1280, 369 .priority = 7, 370 .fixed_size = true, 371 .res_ways = 0x3ff, 372 }, 373 { 374 .usecase_id = LLCC_CAMOFE, 375 .slice_id = 33, 376 .max_cap = 1024, 377 .priority = 1, 378 .fixed_size = true, 379 .bonus_ways = 0xfff, 380 .stale_en = true, 381 .parent_slice_id = 13, 382 }, 383 { 384 .usecase_id = LLCC_CAMRTIP, 385 .slice_id = 13, 386 .max_cap = 1024, 387 .priority = 1, 388 .fixed_size = true, 389 .bonus_ways = 0xfff, 390 .stale_en = true, 391 .parent_slice_id = 13, 392 }, 393 { 394 .usecase_id = LLCC_CAMSRTIP, 395 .slice_id = 14, 396 .max_cap = 512, 397 .priority = 1, 398 .fixed_size = true, 399 .bonus_ways = 0xfff, 400 .stale_en = true, 401 .parent_slice_id = 13, 402 }, 403 { 404 .usecase_id = LLCC_CAMRTRF, 405 .slice_id = 7, 406 .max_cap = 1024, 407 .priority = 1, 408 .fixed_size = true, 409 .bonus_ways = 0xfff, 410 .stale_en = true, 411 .parent_slice_id = 13, 412 }, 413 { 414 .usecase_id = LLCC_CAMSRTRF, 415 .slice_id = 21, 416 .max_cap = 1024, 417 .priority = 1, 418 .fixed_size = true, 419 .bonus_ways = 0xfff, 420 .stale_en = true, 421 .parent_slice_id = 13, 422 }, 423 { 424 .usecase_id = LLCC_CPUSSMPAM, 425 .slice_id = 6, 426 .max_cap = 512, 427 .priority = 0, 428 .fixed_size = true, 429 .bonus_ways = 0xfff, 430 .activate_on_init = true, 431 .write_scid_en = true, 432 .stale_en = true, 433 }, 434 }; 435 436 static const struct llcc_slice_config glymur_data[] = { 437 { 438 .usecase_id = LLCC_CPUSS, 439 .slice_id = 1, 440 .max_cap = 7680, 441 .priority = 1, 442 .bonus_ways = 0xFFF, 443 .res_ways = 0x0, 444 .vict_prio = true, 445 .activate_on_init = true, 446 }, { 447 .usecase_id = LLCC_VIDSC0, 448 .slice_id = 2, 449 .max_cap = 512, 450 .priority = 3, 451 .fixed_size = true, 452 .bonus_ways = 0xFFF, 453 .res_ways = 0x0, 454 .vict_prio = true, 455 }, { 456 .usecase_id = LLCC_AUDIO, 457 .slice_id = 6, 458 .max_cap = 1024, 459 .priority = 1, 460 .fixed_size = true, 461 .bonus_ways = 0xFFF, 462 .res_ways = 0x0, 463 .vict_prio = true, 464 }, { 465 .usecase_id = LLCC_VIDSC1, 466 .slice_id = 4, 467 .max_cap = 512, 468 .priority = 3, 469 .fixed_size = true, 470 .bonus_ways = 0xFFF, 471 .res_ways = 0x0, 472 .vict_prio = true, 473 }, { 474 .usecase_id = LLCC_CMPT, 475 .slice_id = 10, 476 .max_cap = 7680, 477 .priority = 1, 478 .fixed_size = true, 479 .bonus_ways = 0xFFF, 480 .res_ways = 0x0, 481 .vict_prio = true, 482 }, { 483 .usecase_id = LLCC_GPUHTW, 484 .slice_id = 11, 485 .max_cap = 512, 486 .priority = 1, 487 .fixed_size = true, 488 .bonus_ways = 0xFFF, 489 .res_ways = 0x0, 490 .vict_prio = true, 491 }, { 492 .usecase_id = LLCC_GPU, 493 .slice_id = 9, 494 .max_cap = 7680, 495 .priority = 1, 496 .bonus_ways = 0xFFF, 497 .res_ways = 0x0, 498 .write_scid_en = true, 499 .write_scid_cacheable_en = true, 500 .stale_en = true, 501 .vict_prio = true, 502 }, { 503 .usecase_id = LLCC_MMUHWT, 504 .slice_id = 18, 505 .max_cap = 768, 506 .priority = 1, 507 .fixed_size = true, 508 .bonus_ways = 0xFFF, 509 .res_ways = 0x0, 510 .vict_prio = true, 511 .activate_on_init = true, 512 }, { 513 .usecase_id = LLCC_AUDHW, 514 .slice_id = 22, 515 .max_cap = 1024, 516 .priority = 1, 517 .fixed_size = true, 518 .bonus_ways = 0xFFF, 519 .res_ways = 0x0, 520 .vict_prio = true, 521 }, { 522 .usecase_id = LLCC_CVP, 523 .slice_id = 8, 524 .max_cap = 64, 525 .priority = 3, 526 .fixed_size = true, 527 .bonus_ways = 0xFFF, 528 .res_ways = 0x0, 529 .vict_prio = true, 530 }, { 531 .usecase_id = LLCC_WRCACHE, 532 .slice_id = 31, 533 .max_cap = 1536, 534 .priority = 1, 535 .fixed_size = true, 536 .bonus_ways = 0xFFF, 537 .res_ways = 0x0, 538 .vict_prio = true, 539 .activate_on_init = true, 540 }, { 541 .usecase_id = LLCC_CMPTHCP, 542 .slice_id = 17, 543 .max_cap = 256, 544 .priority = 3, 545 .fixed_size = true, 546 .bonus_ways = 0xFFF, 547 .res_ways = 0x0, 548 .vict_prio = true, 549 }, { 550 .usecase_id = LLCC_LCPDARE, 551 .slice_id = 30, 552 .max_cap = 768, 553 .priority = 3, 554 .fixed_size = true, 555 .bonus_ways = 0xFFF, 556 .res_ways = 0x0, 557 .alloc_oneway_en = true, 558 .vict_prio = true, 559 .activate_on_init = true, 560 }, { 561 .usecase_id = LLCC_AENPU, 562 .slice_id = 3, 563 .max_cap = 3072, 564 .priority = 1, 565 .fixed_size = true, 566 .bonus_ways = 0xFFF, 567 .res_ways = 0x0, 568 .cache_mode = 2, 569 .vict_prio = true, 570 }, { 571 .usecase_id = LLCC_ISLAND1, 572 .slice_id = 12, 573 .max_cap = 5632, 574 .priority = 7, 575 .fixed_size = true, 576 .bonus_ways = 0x0, 577 .res_ways = 0x7FF, 578 .vict_prio = true, 579 }, { 580 .usecase_id = LLCC_VIDVSP, 581 .slice_id = 28, 582 .max_cap = 256, 583 .priority = 3, 584 .fixed_size = true, 585 .bonus_ways = 0xFFF, 586 .res_ways = 0x0, 587 .vict_prio = true, 588 }, { 589 .usecase_id = LLCC_OOBM_NS, 590 .slice_id = 5, 591 .max_cap = 512, 592 .priority = 1, 593 .bonus_ways = 0xFFF, 594 .res_ways = 0x0, 595 .vict_prio = true, 596 }, { 597 .usecase_id = LLCC_CPUSS_OPP, 598 .slice_id = 32, 599 .max_cap = 0, 600 .fixed_size = true, 601 .bonus_ways = 0x0, 602 .res_ways = 0x0, 603 .vict_prio = true, 604 .activate_on_init = true, 605 }, { 606 .usecase_id = LLCC_PCIE_TCU, 607 .slice_id = 19, 608 .max_cap = 256, 609 .priority = 1, 610 .fixed_size = true, 611 .bonus_ways = 0xFFF, 612 .res_ways = 0x0, 613 .vict_prio = true, 614 .activate_on_init = true, 615 }, { 616 .usecase_id = LLCC_VIDSC_VSP1, 617 .slice_id = 29, 618 .max_cap = 256, 619 .priority = 3, 620 .fixed_size = true, 621 .bonus_ways = 0xFFF, 622 .res_ways = 0x0, 623 .vict_prio = true, 624 } 625 }; 626 627 static const struct llcc_slice_config ipq5424_data[] = { 628 { 629 .usecase_id = LLCC_CPUSS, 630 .slice_id = 1, 631 .max_cap = 768, 632 .priority = 1, 633 .bonus_ways = 0xFFFF, 634 .retain_on_pc = true, 635 .activate_on_init = true, 636 .write_scid_cacheable_en = true, 637 .stale_en = true, 638 .stale_cap_en = true, 639 .alloc_oneway_en = true, 640 .ovcap_en = true, 641 .ovcap_prio = true, 642 .vict_prio = true, 643 }, 644 { 645 .usecase_id = LLCC_VIDSC0, 646 .slice_id = 2, 647 .max_cap = 256, 648 .priority = 2, 649 .fixed_size = true, 650 .bonus_ways = 0xF000, 651 .retain_on_pc = true, 652 .activate_on_init = true, 653 .write_scid_cacheable_en = true, 654 .stale_en = true, 655 .stale_cap_en = true, 656 }, 657 }; 658 659 static const struct llcc_slice_config kaanapali_data[] = { 660 { 661 .usecase_id = LLCC_CPUSS, 662 .slice_id = 1, 663 .max_cap = 5120, 664 .priority = 1, 665 .bonus_ways = 0xffffffff, 666 .activate_on_init = true, 667 .write_scid_en = true, 668 .stale_en = true, 669 .mru_uncap_en = true, 670 .vict_prio = true, 671 }, { 672 .usecase_id = LLCC_VIDSC0, 673 .slice_id = 2, 674 .max_cap = 512, 675 .priority = 4, 676 .fixed_size = true, 677 .bonus_ways = 0xffffffff, 678 .mru_uncap_en = true, 679 .vict_prio = true, 680 }, { 681 .usecase_id = LLCC_AUDIO, 682 .slice_id = 35, 683 .max_cap = 512, 684 .priority = 1, 685 .fixed_size = true, 686 .bonus_ways = 0xffffffff, 687 .mru_uncap_en = true, 688 .vict_prio = true, 689 }, { 690 .usecase_id = LLCC_MDMHPGRW, 691 .slice_id = 25, 692 .max_cap = 1024, 693 .priority = 5, 694 .bonus_ways = 0xffffffff, 695 .mru_uncap_en = true, 696 .vict_prio = true, 697 }, { 698 .usecase_id = LLCC_CMPT, 699 .slice_id = 34, 700 .max_cap = 4096, 701 .priority = 1, 702 .fixed_size = true, 703 .bonus_ways = 0xffffffff, 704 .mru_uncap_en = true, 705 .vict_prio = true, 706 }, { 707 .usecase_id = LLCC_GPUHTW, 708 .slice_id = 11, 709 .max_cap = 512, 710 .priority = 1, 711 .fixed_size = true, 712 .bonus_ways = 0xffffffff, 713 .mru_uncap_en = true, 714 .vict_prio = true, 715 }, { 716 .usecase_id = LLCC_GPU, 717 .slice_id = 9, 718 .max_cap = 5632, 719 .priority = 1, 720 .fixed_size = true, 721 .bonus_ways = 0xffffffff, 722 .write_scid_cacheable_en = true, 723 .mru_uncap_en = true, 724 .vict_prio = true, 725 }, { 726 .usecase_id = LLCC_MMUHWT, 727 .slice_id = 18, 728 .max_cap = 768, 729 .priority = 1, 730 .fixed_size = true, 731 .bonus_ways = 0xffffffff, 732 .activate_on_init = true, 733 .mru_uncap_en = true, 734 .vict_prio = true, 735 }, { 736 .usecase_id = LLCC_DISP, 737 .slice_id = 16, 738 .max_cap = 7168, 739 .priority = 1, 740 .fixed_size = true, 741 .bonus_ways = 0xffffffff, 742 .cache_mode = 2, 743 .stale_en = true, 744 .mru_uncap_en = true, 745 .vict_prio = true, 746 }, { 747 .usecase_id = LLCC_MDMHPFX, 748 .slice_id = 24, 749 .max_cap = 1024, 750 .priority = 5, 751 .fixed_size = true, 752 .bonus_ways = 0xffffffff, 753 .mru_uncap_en = true, 754 .vict_prio = true, 755 }, { 756 .usecase_id = LLCC_MDMPNG, 757 .slice_id = 27, 758 .max_cap = 256, 759 .priority = 5, 760 .bonus_ways = 0xfffff, 761 .mru_uncap_en = true, 762 .vict_prio = true, 763 }, { 764 .usecase_id = LLCC_CVP, 765 .slice_id = 8, 766 .max_cap = 800, 767 .priority = 5, 768 .fixed_size = true, 769 .bonus_ways = 0xffffffff, 770 .mru_uncap_en = true, 771 .ovcap_en = true, 772 .vict_prio = true, 773 .parent_slice_id = 33, 774 }, { 775 .usecase_id = LLCC_MODPE, 776 .slice_id = 29, 777 .max_cap = 256, 778 .priority = 1, 779 .fixed_size = true, 780 .bonus_ways = 0xf0000000, 781 .mru_uncap_en = true, 782 .alloc_oneway_en = true, 783 .vict_prio = true, 784 }, { 785 .usecase_id = LLCC_WRCACHE, 786 .slice_id = 31, 787 .max_cap = 512, 788 .priority = 1, 789 .fixed_size = true, 790 .bonus_ways = 0xffffffff, 791 .activate_on_init = true, 792 .mru_uncap_en = true, 793 .vict_prio = true, 794 }, { 795 .usecase_id = LLCC_CVPFW, 796 .slice_id = 19, 797 .max_cap = 512, 798 .priority = 5, 799 .fixed_size = true, 800 .bonus_ways = 0xffffffff, 801 .mru_uncap_en = true, 802 .vict_prio = true, 803 .parent_slice_id = 33, 804 }, { 805 .usecase_id = LLCC_CPUMTE, 806 .slice_id = 7, 807 .max_cap = 256, 808 .priority = 1, 809 .fixed_size = true, 810 .bonus_ways = 0xffffffff, 811 .mru_uncap_en = true, 812 .vict_prio = true, 813 }, { 814 .usecase_id = LLCC_CMPTHCP, 815 .slice_id = 15, 816 .max_cap = 256, 817 .priority = 4, 818 .fixed_size = true, 819 .bonus_ways = 0xffffffff, 820 .mru_uncap_en = true, 821 .vict_prio = true, 822 }, { 823 .usecase_id = LLCC_LCPDARE, 824 .slice_id = 30, 825 .max_cap = 128, 826 .priority = 5, 827 .fixed_size = true, 828 .bonus_ways = 0xffffffff, 829 .activate_on_init = true, 830 .mru_uncap_en = true, 831 .alloc_oneway_en = true, 832 .vict_prio = true, 833 }, { 834 .usecase_id = LLCC_AENPU, 835 .slice_id = 3, 836 .max_cap = 3072, 837 .priority = 1, 838 .fixed_size = true, 839 .bonus_ways = 0xffffffff, 840 .cache_mode = 2, 841 .mru_uncap_en = true, 842 .vict_prio = true, 843 }, { 844 .usecase_id = LLCC_ISLAND1, 845 .slice_id = 12, 846 .max_cap = 7936, 847 .priority = 7, 848 .fixed_size = true, 849 .bonus_ways = 0x7fffffff, 850 .mru_uncap_en = true, 851 .vict_prio = true, 852 }, { 853 .usecase_id = LLCC_DISP_WB, 854 .slice_id = 23, 855 .max_cap = 512, 856 .priority = 4, 857 .fixed_size = true, 858 .bonus_ways = 0xffffffff, 859 .mru_uncap_en = true, 860 .vict_prio = true, 861 }, { 862 .usecase_id = LLCC_VIDVSP, 863 .slice_id = 4, 864 .max_cap = 256, 865 .priority = 4, 866 .fixed_size = true, 867 .bonus_ways = 0xffffffff, 868 .mru_uncap_en = true, 869 .vict_prio = true, 870 }, { 871 .usecase_id = LLCC_VIDDEC, 872 .slice_id = 5, 873 .max_cap = 512, 874 .priority = 4, 875 .fixed_size = true, 876 .bonus_ways = 0xffffffff, 877 .cache_mode = 2, 878 .mru_uncap_en = true, 879 .ovcap_en = true, 880 .vict_prio = true, 881 .parent_slice_id = 33, 882 }, { 883 .usecase_id = LLCC_CAMOFE, 884 .slice_id = 33, 885 .max_cap = 6144, 886 .priority = 4, 887 .fixed_size = true, 888 .bonus_ways = 0xffffffff, 889 .stale_en = true, 890 .mru_uncap_en = true, 891 .ovcap_en = true, 892 .vict_prio = true, 893 .parent_slice_id = 33, 894 }, { 895 .usecase_id = LLCC_CAMRTIP, 896 .slice_id = 13, 897 .max_cap = 6144, 898 .priority = 4, 899 .fixed_size = true, 900 .bonus_ways = 0xffffffff, 901 .stale_en = true, 902 .mru_uncap_en = true, 903 .ovcap_en = true, 904 .vict_prio = true, 905 .parent_slice_id = 33, 906 }, { 907 .usecase_id = LLCC_CAMRTRF, 908 .slice_id = 10, 909 .max_cap = 3584, 910 .priority = 3, 911 .fixed_size = true, 912 .bonus_ways = 0xffffffff, 913 .stale_en = true, 914 .mru_uncap_en = true, 915 .ovcap_en = true, 916 .vict_prio = true, 917 .parent_slice_id = 33, 918 }, { 919 .usecase_id = LLCC_CAMSRTRF, 920 .slice_id = 21, 921 .max_cap = 6144, 922 .priority = 1, 923 .fixed_size = true, 924 .bonus_ways = 0xffffffff, 925 .stale_en = true, 926 .mru_uncap_en = true, 927 .ovcap_en = true, 928 .vict_prio = true, 929 .parent_slice_id = 33, 930 }, { 931 .usecase_id = LLCC_VIDEO_APV, 932 .slice_id = 6, 933 .max_cap = 768, 934 .priority = 4, 935 .fixed_size = true, 936 .bonus_ways = 0xffffffff, 937 .mru_uncap_en = true, 938 .vict_prio = true, 939 }, { 940 .usecase_id = LLCC_COMPUTE1, 941 .slice_id = 22, 942 .max_cap = 4096, 943 .priority = 1, 944 .fixed_size = true, 945 .bonus_ways = 0xffffffff, 946 .mru_uncap_en = true, 947 .vict_prio = true, 948 }, { 949 .usecase_id = LLCC_CPUSS_OPP, 950 .slice_id = 32, 951 .max_cap = 0, 952 .priority = 0, 953 .fixed_size = true, 954 .bonus_ways = 0, 955 .activate_on_init = true, 956 .write_scid_en = true, 957 .mru_uncap_en = true, 958 .vict_prio = true, 959 }, { 960 .usecase_id = LLCC_CPUSSMPAM, 961 .slice_id = 17, 962 .max_cap = 2048, 963 .priority = 1, 964 .fixed_size = true, 965 .bonus_ways = 0xffffffff, 966 .activate_on_init = true, 967 .write_scid_en = true, 968 .stale_en = true, 969 .mru_uncap_en = true, 970 .vict_prio = true, 971 }, { 972 .usecase_id = LLCC_CAM_IPE_STROV, 973 .slice_id = 14, 974 .max_cap = 400, 975 .priority = 5, 976 .fixed_size = true, 977 .bonus_ways = 0xffffffff, 978 .mru_uncap_en = true, 979 .ovcap_en = true, 980 .vict_prio = true, 981 .parent_slice_id = 33, 982 }, { 983 .usecase_id = LLCC_CAM_OFE_STROV, 984 .slice_id = 20, 985 .max_cap = 400, 986 .priority = 5, 987 .fixed_size = true, 988 .bonus_ways = 0xffffffff, 989 .mru_uncap_en = true, 990 .ovcap_en = true, 991 .vict_prio = true, 992 .parent_slice_id = 33, 993 }, { 994 .usecase_id = LLCC_CPUSS_HEU, 995 .slice_id = 28, 996 .max_cap = 0, 997 .priority = 0, 998 .fixed_size = true, 999 .bonus_ways = 0, 1000 .mru_uncap_en = true, 1001 .ovcap_en = true, 1002 .vict_prio = true, 1003 }, { 1004 .usecase_id = LLCC_MDM_PNG_FIXED, 1005 .slice_id = 26, 1006 .max_cap = 256, 1007 .priority = 5, 1008 .fixed_size = true, 1009 .bonus_ways = 0xff000000, 1010 .activate_on_init = true, 1011 .write_scid_en = true, 1012 .mru_uncap_en = true, 1013 .vict_prio = true, 1014 }, 1015 }; 1016 1017 static const struct llcc_slice_config sa8775p_data[] = { 1018 { 1019 .usecase_id = LLCC_CPUSS, 1020 .slice_id = 1, 1021 .max_cap = 2048, 1022 .priority = 1, 1023 .bonus_ways = 0xff, 1024 .cache_mode = 0, 1025 .retain_on_pc = true, 1026 .activate_on_init = true, 1027 }, { 1028 .usecase_id = LLCC_VIDSC0, 1029 .slice_id = 2, 1030 .max_cap = 512, 1031 .priority = 3, 1032 .fixed_size = true, 1033 .bonus_ways = 0xff, 1034 .cache_mode = 0, 1035 .retain_on_pc = true, 1036 }, { 1037 .usecase_id = LLCC_CPUSS1, 1038 .slice_id = 3, 1039 .max_cap = 1024, 1040 .priority = 1, 1041 .fixed_size = true, 1042 .bonus_ways = 0xff, 1043 .cache_mode = 0, 1044 .retain_on_pc = true, 1045 }, { 1046 .usecase_id = LLCC_CPUHWT, 1047 .slice_id = 5, 1048 .max_cap = 512, 1049 .priority = 1, 1050 .fixed_size = true, 1051 .bonus_ways = 0xff, 1052 .cache_mode = 0, 1053 .retain_on_pc = true, 1054 }, { 1055 .usecase_id = LLCC_AUDIO, 1056 .slice_id = 6, 1057 .max_cap = 1024, 1058 .priority = 1, 1059 .fixed_size = true, 1060 .bonus_ways = 0xff, 1061 .cache_mode = 0, 1062 }, { 1063 .usecase_id = LLCC_CMPT, 1064 .slice_id = 10, 1065 .max_cap = 4096, 1066 .priority = 1, 1067 .fixed_size = true, 1068 .bonus_ways = 0xff, 1069 .cache_mode = 0, 1070 .retain_on_pc = true, 1071 }, { 1072 .usecase_id = LLCC_GPUHTW, 1073 .slice_id = 11, 1074 .max_cap = 1024, 1075 .priority = 1, 1076 .fixed_size = true, 1077 .bonus_ways = 0xff, 1078 .cache_mode = 0, 1079 .retain_on_pc = true, 1080 }, { 1081 .usecase_id = LLCC_GPU, 1082 .slice_id = 12, 1083 .max_cap = 1024, 1084 .priority = 1, 1085 .fixed_size = true, 1086 .bonus_ways = 0xff, 1087 .cache_mode = 0, 1088 .retain_on_pc = true, 1089 .write_scid_en = true, 1090 }, { 1091 .usecase_id = LLCC_MMUHWT, 1092 .slice_id = 13, 1093 .max_cap = 1024, 1094 .priority = 1, 1095 .fixed_size = true, 1096 .bonus_ways = 0xff, 1097 .cache_mode = 0, 1098 .activate_on_init = true, 1099 }, { 1100 .usecase_id = LLCC_CMPTDMA, 1101 .slice_id = 15, 1102 .max_cap = 1024, 1103 .priority = 1, 1104 .fixed_size = true, 1105 .bonus_ways = 0xff, 1106 .cache_mode = 0, 1107 .retain_on_pc = true, 1108 }, { 1109 .usecase_id = LLCC_DISP, 1110 .slice_id = 16, 1111 .max_cap = 4096, 1112 .priority = 2, 1113 .fixed_size = true, 1114 .bonus_ways = 0xff, 1115 .cache_mode = 0, 1116 .retain_on_pc = true, 1117 }, { 1118 .usecase_id = LLCC_VIDFW, 1119 .slice_id = 17, 1120 .max_cap = 3072, 1121 .priority = 1, 1122 .bonus_ways = 0xff, 1123 .cache_mode = 0, 1124 .retain_on_pc = true, 1125 }, { 1126 .usecase_id = LLCC_AUDHW, 1127 .slice_id = 22, 1128 .max_cap = 1024, 1129 .priority = 1, 1130 .fixed_size = true, 1131 .bonus_ways = 0xff, 1132 .cache_mode = 0, 1133 }, { 1134 .usecase_id = LLCC_CVP, 1135 .slice_id = 28, 1136 .max_cap = 256, 1137 .priority = 3, 1138 .fixed_size = true, 1139 .bonus_ways = 0xff, 1140 .cache_mode = 0, 1141 .retain_on_pc = true, 1142 }, { 1143 .usecase_id = LLCC_APTCM, 1144 .slice_id = 30, 1145 .max_cap = 1024, 1146 .priority = 3, 1147 .fixed_size = true, 1148 .res_ways = 0xf0, 1149 .cache_mode = 1, 1150 .retain_on_pc = true, 1151 }, { 1152 .usecase_id = LLCC_WRCACHE, 1153 .slice_id = 31, 1154 .max_cap = 512, 1155 .priority = 1, 1156 .fixed_size = true, 1157 .bonus_ways = 0xff, 1158 .cache_mode = 0, 1159 .activate_on_init = true, 1160 }, 1161 }; 1162 1163 static const struct llcc_slice_config sar1130p_data[] = { 1164 { 1165 .usecase_id = LLCC_CPUSS, 1166 .slice_id = 1, 1167 .max_cap = 4096, 1168 .priority = 1, 1169 .bonus_ways = 0x1fff, 1170 .res_ways = 0x0, 1171 .cache_mode = 0, 1172 .retain_on_pc = true, 1173 .activate_on_init = true, 1174 }, { 1175 .usecase_id = LLCC_VIDSC0, 1176 .slice_id = 2, 1177 .max_cap = 512, 1178 .priority = 3, 1179 .fixed_size = true, 1180 .bonus_ways = 0x1fff, 1181 .res_ways = 0x0, 1182 .cache_mode = 0, 1183 .retain_on_pc = true, 1184 }, { 1185 .usecase_id = LLCC_AUDIO, 1186 .slice_id = 6, 1187 .max_cap = 1024, 1188 .priority = 3, 1189 .fixed_size = true, 1190 .bonus_ways = 0x1fff, 1191 .res_ways = 0x0, 1192 .cache_mode = 0, 1193 .retain_on_pc = true, 1194 }, { 1195 .usecase_id = LLCC_CMPT, 1196 .slice_id = 10, 1197 .max_cap = 1024, 1198 .priority = 1, 1199 .fixed_size = true, 1200 .bonus_ways = 0x1fff, 1201 .res_ways = 0x0, 1202 .cache_mode = 0, 1203 .retain_on_pc = true, 1204 }, { 1205 .usecase_id = LLCC_GPUHTW, 1206 .slice_id = 11, 1207 .max_cap = 0, 1208 .priority = 1, 1209 .fixed_size = true, 1210 .bonus_ways = 0x1fff, 1211 .res_ways = 0x0, 1212 .cache_mode = 0, 1213 .retain_on_pc = true, 1214 }, { 1215 .usecase_id = LLCC_GPU, 1216 .slice_id = 12, 1217 .max_cap = 3072, 1218 .priority = 3, 1219 .fixed_size = true, 1220 .bonus_ways = 0x1fff, 1221 .res_ways = 0x0, 1222 .cache_mode = 0, 1223 .retain_on_pc = true, 1224 .write_scid_en = true, 1225 }, { 1226 .usecase_id = LLCC_MMUHWT, 1227 .slice_id = 13, 1228 .max_cap = 512, 1229 .priority = 1, 1230 .fixed_size = true, 1231 .bonus_ways = 0x1fff, 1232 .res_ways = 0x0, 1233 .cache_mode = 0, 1234 }, { 1235 .usecase_id = LLCC_DISP, 1236 .slice_id = 16, 1237 .max_cap = 12800, 1238 .priority = 1, 1239 .fixed_size = true, 1240 .bonus_ways = 0x1fff, 1241 .res_ways = 0x0, 1242 .cache_mode = 0, 1243 .retain_on_pc = true, 1244 }, { 1245 .usecase_id = LLCC_CVP, 1246 .slice_id = 28, 1247 .max_cap = 256, 1248 .priority = 3, 1249 .fixed_size = true, 1250 .bonus_ways = 0x1fff, 1251 .res_ways = 0x0, 1252 .cache_mode = 0, 1253 .retain_on_pc = true, 1254 }, { 1255 .usecase_id = LLCC_APTCM, 1256 .slice_id = 26, 1257 .max_cap = 2048, 1258 .priority = 3, 1259 .fixed_size = true, 1260 .bonus_ways = 0x0, 1261 .res_ways = 0x3, 1262 .cache_mode = true, 1263 .dis_cap_alloc = true, 1264 .retain_on_pc = true, 1265 }, { 1266 .usecase_id = LLCC_WRCACHE, 1267 .slice_id = 31, 1268 .max_cap = 256, 1269 .priority = 1, 1270 .fixed_size = true, 1271 .bonus_ways = 0x1fff, 1272 .res_ways = 0x0, 1273 .cache_mode = 0, 1274 .activate_on_init = true, 1275 }, { 1276 .usecase_id = LLCC_AENPU, 1277 .slice_id = 30, 1278 .max_cap = 3072, 1279 .priority = 3, 1280 .fixed_size = true, 1281 .bonus_ways = 0x1fff, 1282 .res_ways = 0x0, 1283 .cache_mode = 0, 1284 .retain_on_pc = true, 1285 }, { 1286 .usecase_id = LLCC_DISP_LEFT, 1287 .slice_id = 17, 1288 .max_cap = 0, 1289 .priority = 1, 1290 .fixed_size = true, 1291 .bonus_ways = 0x0, 1292 .res_ways = 0x0, 1293 .cache_mode = 0, 1294 .retain_on_pc = true, 1295 }, { 1296 .usecase_id = LLCC_DISP_RIGHT, 1297 .slice_id = 18, 1298 .max_cap = 0, 1299 .priority = 1, 1300 .fixed_size = true, 1301 .bonus_ways = 0x0, 1302 .res_ways = 0x0, 1303 .cache_mode = 0, 1304 .retain_on_pc = true, 1305 }, { 1306 .usecase_id = LLCC_EVCS_LEFT, 1307 .slice_id = 22, 1308 .max_cap = 0, 1309 .priority = 1, 1310 .fixed_size = true, 1311 .bonus_ways = 0x0, 1312 .res_ways = 0x0, 1313 .cache_mode = 0, 1314 .retain_on_pc = true, 1315 }, { 1316 .usecase_id = LLCC_EVCS_RIGHT, 1317 .slice_id = 23, 1318 .max_cap = 0, 1319 .priority = 1, 1320 .fixed_size = true, 1321 .bonus_ways = 0x0, 1322 .res_ways = 0x0, 1323 .cache_mode = 0, 1324 .retain_on_pc = true, 1325 }, 1326 }; 1327 1328 static const struct llcc_slice_config sar2130p_data[] = { 1329 { 1330 .usecase_id = LLCC_CPUSS, 1331 .slice_id = 1, 1332 .max_cap = 6144, 1333 .priority = 1, 1334 .fixed_size = 0, 1335 .bonus_ways = 0x3fffffff, 1336 .res_ways = 0x0, 1337 .cache_mode = 0, 1338 .retain_on_pc = true, 1339 .activate_on_init = true, 1340 }, { 1341 .usecase_id = LLCC_VIDSC0, 1342 .slice_id = 2, 1343 .max_cap = 128, 1344 .priority = 2, 1345 .fixed_size = true, 1346 .bonus_ways = 0x3fffffff, 1347 .res_ways = 0x0, 1348 .cache_mode = 0, 1349 .retain_on_pc = true, 1350 }, { 1351 .usecase_id = LLCC_AUDIO, 1352 .slice_id = 6, 1353 .max_cap = 1024, 1354 .priority = 3, 1355 .fixed_size = true, 1356 .bonus_ways = 0x3fffffff, 1357 .res_ways = 0x0, 1358 .cache_mode = 0, 1359 .retain_on_pc = true, 1360 }, { 1361 .usecase_id = LLCC_CMPT, 1362 .slice_id = 10, 1363 .max_cap = 1024, 1364 .priority = 1, 1365 .fixed_size = true, 1366 .bonus_ways = 0x3fffffff, 1367 .res_ways = 0x0, 1368 .cache_mode = 0, 1369 .retain_on_pc = true, 1370 }, { 1371 .usecase_id = LLCC_GPUHTW, 1372 .slice_id = 11, 1373 .max_cap = 0, 1374 .priority = 1, 1375 .fixed_size = true, 1376 .bonus_ways = 0x3fffffff, 1377 .res_ways = 0x0, 1378 .cache_mode = 0, 1379 .retain_on_pc = true, 1380 }, { 1381 .usecase_id = LLCC_GPU, 1382 .slice_id = 12, 1383 .max_cap = 1536, 1384 .priority = 2, 1385 .fixed_size = true, 1386 .bonus_ways = 0x3fffffff, 1387 .res_ways = 0x0, 1388 .cache_mode = 0, 1389 .retain_on_pc = true, 1390 .write_scid_en = true, 1391 }, { 1392 .usecase_id = LLCC_MMUHWT, 1393 .slice_id = 13, 1394 .max_cap = 1024, 1395 .priority = 1, 1396 .fixed_size = true, 1397 .bonus_ways = 0x3fffffff, 1398 .res_ways = 0x0, 1399 .cache_mode = 0, 1400 .activate_on_init = true, 1401 }, { 1402 .usecase_id = LLCC_DISP, 1403 .slice_id = 16, 1404 .max_cap = 0, 1405 .priority = 1, 1406 .fixed_size = true, 1407 .bonus_ways = 0x3fffffff, 1408 .res_ways = 0x0, 1409 .cache_mode = 0, 1410 .retain_on_pc = true, 1411 }, { 1412 .usecase_id = LLCC_APTCM, 1413 .slice_id = 26, 1414 .max_cap = 2048, 1415 .priority = 3, 1416 .fixed_size = true, 1417 .bonus_ways = 0x0, 1418 .res_ways = 0x3, 1419 .cache_mode = true, 1420 .dis_cap_alloc = true, 1421 .retain_on_pc = true, 1422 }, { 1423 .usecase_id = LLCC_WRCACHE, 1424 .slice_id = 31, 1425 .max_cap = 256, 1426 .priority = 1, 1427 .fixed_size = true, 1428 .bonus_ways = 0x3fffffff, 1429 .res_ways = 0x0, 1430 .cache_mode = 0, 1431 .activate_on_init = true, 1432 }, { 1433 .usecase_id = LLCC_VIEYE, 1434 .slice_id = 7, 1435 .max_cap = 7168, 1436 .priority = 4, 1437 .fixed_size = true, 1438 .bonus_ways = 0x3fffffff, 1439 .res_ways = 0x0, 1440 .cache_mode = 0, 1441 .retain_on_pc = true, 1442 }, { 1443 .usecase_id = LLCC_VIDPTH, 1444 .slice_id = 8, 1445 .max_cap = 7168, 1446 .priority = 4, 1447 .fixed_size = true, 1448 .bonus_ways = 0x3fffffff, 1449 .res_ways = 0x0, 1450 .cache_mode = 0, 1451 .retain_on_pc = true, 1452 }, { 1453 .usecase_id = LLCC_GPUMV, 1454 .slice_id = 9, 1455 .max_cap = 2048, 1456 .priority = 2, 1457 .fixed_size = true, 1458 .bonus_ways = 0x3fffffff, 1459 .res_ways = 0x0, 1460 .cache_mode = 0, 1461 .retain_on_pc = true, 1462 }, { 1463 .usecase_id = LLCC_EVA_LEFT, 1464 .slice_id = 20, 1465 .max_cap = 7168, 1466 .priority = 5, 1467 .fixed_size = true, 1468 .bonus_ways = 0x3ffffffc, 1469 .res_ways = 0x0, 1470 .cache_mode = 0, 1471 .retain_on_pc = true, 1472 }, { 1473 .usecase_id = LLCC_EVA_RIGHT, 1474 .slice_id = 21, 1475 .max_cap = 7168, 1476 .priority = 5, 1477 .fixed_size = true, 1478 .bonus_ways = 0x3ffffffc, 1479 .res_ways = 0x0, 1480 .cache_mode = 0, 1481 .retain_on_pc = true, 1482 }, { 1483 .usecase_id = LLCC_EVAGAIN, 1484 .slice_id = 25, 1485 .max_cap = 1024, 1486 .priority = 2, 1487 .fixed_size = true, 1488 .bonus_ways = 0x3fffffff, 1489 .res_ways = 0x0, 1490 .cache_mode = 0, 1491 .retain_on_pc = true, 1492 }, { 1493 .usecase_id = LLCC_AENPU, 1494 .slice_id = 30, 1495 .max_cap = 3072, 1496 .priority = 3, 1497 .fixed_size = true, 1498 .bonus_ways = 0x3fffffff, 1499 .res_ways = 0x0, 1500 .cache_mode = 0, 1501 .retain_on_pc = true, 1502 }, { 1503 .usecase_id = LLCC_VIPTH, 1504 .slice_id = 29, 1505 .max_cap = 1024, 1506 .priority = 4, 1507 .fixed_size = true, 1508 .bonus_ways = 0x3fffffff, 1509 .res_ways = 0x0, 1510 .cache_mode = 0, 1511 .retain_on_pc = true, 1512 }, { 1513 .usecase_id = LLCC_DISP_LEFT, 1514 .slice_id = 17, 1515 .max_cap = 0, 1516 .priority = 1, 1517 .fixed_size = true, 1518 .bonus_ways = 0x0, 1519 .res_ways = 0x0, 1520 .cache_mode = 0, 1521 .retain_on_pc = true, 1522 }, { 1523 .usecase_id = LLCC_DISP_RIGHT, 1524 .slice_id = 18, 1525 .max_cap = 0, 1526 .priority = 1, 1527 .fixed_size = true, 1528 .bonus_ways = 0x0, 1529 .res_ways = 0x0, 1530 .cache_mode = 0, 1531 .retain_on_pc = true, 1532 }, { 1533 .usecase_id = LLCC_EVCS_LEFT, 1534 .slice_id = 22, 1535 .max_cap = 0, 1536 .priority = 1, 1537 .fixed_size = true, 1538 .bonus_ways = 0x0, 1539 .res_ways = 0x0, 1540 .cache_mode = 0, 1541 .retain_on_pc = true, 1542 }, { 1543 .usecase_id = LLCC_EVCS_RIGHT, 1544 .slice_id = 23, 1545 .max_cap = 0, 1546 .priority = 1, 1547 .fixed_size = true, 1548 .bonus_ways = 0x0, 1549 .res_ways = 0x0, 1550 .cache_mode = 0, 1551 .retain_on_pc = true, 1552 }, { 1553 .usecase_id = LLCC_SPAD, 1554 .slice_id = 24, 1555 .max_cap = 7168, 1556 .priority = 1, 1557 .fixed_size = true, 1558 .bonus_ways = 0x0, 1559 .res_ways = 0x0, 1560 .cache_mode = 0, 1561 .retain_on_pc = true, 1562 }, 1563 }; 1564 1565 static const struct llcc_slice_config sc7180_data[] = { 1566 { 1567 .usecase_id = LLCC_CPUSS, 1568 .slice_id = 1, 1569 .max_cap = 256, 1570 .priority = 1, 1571 .bonus_ways = 0xf, 1572 .cache_mode = 0, 1573 .retain_on_pc = true, 1574 .activate_on_init = true, 1575 }, { 1576 .usecase_id = LLCC_MDM, 1577 .slice_id = 8, 1578 .max_cap = 128, 1579 .priority = 1, 1580 .bonus_ways = 0xf, 1581 .cache_mode = 0, 1582 .retain_on_pc = true, 1583 }, { 1584 .usecase_id = LLCC_GPUHTW, 1585 .slice_id = 11, 1586 .max_cap = 128, 1587 .priority = 1, 1588 .bonus_ways = 0xf, 1589 .cache_mode = 0, 1590 .retain_on_pc = true, 1591 }, { 1592 .usecase_id = LLCC_GPU, 1593 .slice_id = 12, 1594 .max_cap = 128, 1595 .priority = 1, 1596 .bonus_ways = 0xf, 1597 .cache_mode = 0, 1598 .retain_on_pc = true, 1599 }, 1600 }; 1601 1602 static const struct llcc_slice_config sc7280_data[] = { 1603 { 1604 .usecase_id = LLCC_CPUSS, 1605 .slice_id = 1, 1606 .max_cap = 768, 1607 .priority = 1, 1608 .bonus_ways = 0x3f, 1609 .cache_mode = 0, 1610 .retain_on_pc = true, 1611 .activate_on_init = true, 1612 }, { 1613 .usecase_id = LLCC_MDMHPGRW, 1614 .slice_id = 7, 1615 .max_cap = 512, 1616 .priority = 2, 1617 .fixed_size = true, 1618 .bonus_ways = 0x3f, 1619 .cache_mode = 0, 1620 .retain_on_pc = true, 1621 }, { 1622 .usecase_id = LLCC_CMPT, 1623 .slice_id = 10, 1624 .max_cap = 768, 1625 .priority = 1, 1626 .fixed_size = true, 1627 .bonus_ways = 0x3f, 1628 .cache_mode = 0, 1629 .retain_on_pc = true, 1630 }, { 1631 .usecase_id = LLCC_GPUHTW, 1632 .slice_id = 11, 1633 .max_cap = 256, 1634 .priority = 1, 1635 .fixed_size = true, 1636 .bonus_ways = 0x3f, 1637 .cache_mode = 0, 1638 .retain_on_pc = true, 1639 }, { 1640 .usecase_id = LLCC_GPU, 1641 .slice_id = 12, 1642 .max_cap = 512, 1643 .priority = 1, 1644 .bonus_ways = 0x3f, 1645 .cache_mode = 0, 1646 .retain_on_pc = true, 1647 }, { 1648 .usecase_id = LLCC_MMUHWT, 1649 .slice_id = 13, 1650 .max_cap = 256, 1651 .priority = 1, 1652 .fixed_size = true, 1653 .bonus_ways = 0x3f, 1654 .cache_mode = 0, 1655 .activate_on_init = true, 1656 }, { 1657 .usecase_id = LLCC_MDMPNG, 1658 .slice_id = 21, 1659 .max_cap = 768, 1660 .priority = 0, 1661 .fixed_size = true, 1662 .bonus_ways = 0x3f, 1663 .cache_mode = 0, 1664 .retain_on_pc = true, 1665 }, { 1666 .usecase_id = LLCC_WLHW, 1667 .slice_id = 24, 1668 .max_cap = 256, 1669 .priority = 1, 1670 .fixed_size = true, 1671 .bonus_ways = 0x3f, 1672 .cache_mode = 0, 1673 .retain_on_pc = true, 1674 }, { 1675 .usecase_id = LLCC_MODPE, 1676 .slice_id = 29, 1677 .max_cap = 64, 1678 .priority = 1, 1679 .fixed_size = true, 1680 .bonus_ways = 0x3f, 1681 .cache_mode = 0, 1682 .retain_on_pc = true, 1683 }, 1684 }; 1685 1686 static const struct llcc_slice_config sc8180x_data[] = { 1687 { 1688 .usecase_id = LLCC_CPUSS, 1689 .slice_id = 1, 1690 .max_cap = 6144, 1691 .priority = 1, 1692 .fixed_size = true, 1693 .bonus_ways = 0xfff, 1694 .cache_mode = 0, 1695 .retain_on_pc = true, 1696 .activate_on_init = true, 1697 }, { 1698 .usecase_id = LLCC_VIDSC0, 1699 .slice_id = 2, 1700 .max_cap = 512, 1701 .priority = 2, 1702 .fixed_size = true, 1703 .bonus_ways = 0xfff, 1704 .cache_mode = 0, 1705 .retain_on_pc = true, 1706 }, { 1707 .usecase_id = LLCC_VIDSC1, 1708 .slice_id = 3, 1709 .max_cap = 512, 1710 .priority = 2, 1711 .fixed_size = true, 1712 .bonus_ways = 0xfff, 1713 .cache_mode = 0, 1714 .retain_on_pc = true, 1715 }, { 1716 .usecase_id = LLCC_AUDIO, 1717 .slice_id = 6, 1718 .max_cap = 1024, 1719 .priority = 1, 1720 .fixed_size = true, 1721 .bonus_ways = 0xfff, 1722 .cache_mode = 0, 1723 .retain_on_pc = true, 1724 }, { 1725 .usecase_id = LLCC_MDMHPGRW, 1726 .slice_id = 7, 1727 .max_cap = 3072, 1728 .priority = 1, 1729 .fixed_size = true, 1730 .bonus_ways = 0x3ff, 1731 .res_ways = 0xc00, 1732 .cache_mode = 0, 1733 .retain_on_pc = true, 1734 }, { 1735 .usecase_id = LLCC_MDM, 1736 .slice_id = 8, 1737 .max_cap = 3072, 1738 .priority = 1, 1739 .fixed_size = true, 1740 .bonus_ways = 0xfff, 1741 .cache_mode = 0, 1742 .retain_on_pc = true, 1743 }, { 1744 .usecase_id = LLCC_MODHW, 1745 .slice_id = 9, 1746 .max_cap = 1024, 1747 .priority = 1, 1748 .fixed_size = true, 1749 .bonus_ways = 0xfff, 1750 .cache_mode = 0, 1751 .retain_on_pc = true, 1752 }, { 1753 .usecase_id = LLCC_CMPT, 1754 .slice_id = 10, 1755 .max_cap = 6144, 1756 .priority = 1, 1757 .fixed_size = true, 1758 .bonus_ways = 0xfff, 1759 .cache_mode = 0, 1760 .retain_on_pc = true, 1761 }, { 1762 .usecase_id = LLCC_GPUHTW, 1763 .slice_id = 11, 1764 .max_cap = 1024, 1765 .priority = 1, 1766 .fixed_size = true, 1767 .bonus_ways = 0xfff, 1768 .cache_mode = 0, 1769 .retain_on_pc = true, 1770 }, { 1771 .usecase_id = LLCC_GPU, 1772 .slice_id = 12, 1773 .max_cap = 5120, 1774 .priority = 1, 1775 .fixed_size = true, 1776 .bonus_ways = 0xfff, 1777 .cache_mode = 0, 1778 .retain_on_pc = true, 1779 }, { 1780 .usecase_id = LLCC_MMUHWT, 1781 .slice_id = 13, 1782 .max_cap = 1024, 1783 .priority = 1, 1784 .fixed_size = true, 1785 .bonus_ways = 0xfff, 1786 .cache_mode = 0, 1787 .activate_on_init = true, 1788 }, { 1789 .usecase_id = LLCC_CMPTDMA, 1790 .slice_id = 15, 1791 .max_cap = 6144, 1792 .priority = 1, 1793 .fixed_size = true, 1794 .bonus_ways = 0xfff, 1795 .cache_mode = 0, 1796 .retain_on_pc = true, 1797 }, { 1798 .usecase_id = LLCC_DISP, 1799 .slice_id = 16, 1800 .max_cap = 6144, 1801 .priority = 1, 1802 .fixed_size = true, 1803 .bonus_ways = 0xfff, 1804 .cache_mode = 0, 1805 .retain_on_pc = true, 1806 }, { 1807 .usecase_id = LLCC_VIDFW, 1808 .slice_id = 17, 1809 .max_cap = 1024, 1810 .priority = 1, 1811 .fixed_size = true, 1812 .bonus_ways = 0xfff, 1813 .cache_mode = 0, 1814 .retain_on_pc = true, 1815 }, { 1816 .usecase_id = LLCC_MDMHPFX, 1817 .slice_id = 20, 1818 .max_cap = 1024, 1819 .priority = 2, 1820 .fixed_size = true, 1821 .bonus_ways = 0xfff, 1822 .cache_mode = 0, 1823 .retain_on_pc = true, 1824 }, { 1825 .usecase_id = LLCC_MDMPNG, 1826 .slice_id = 21, 1827 .max_cap = 1024, 1828 .priority = 0, 1829 .fixed_size = true, 1830 .bonus_ways = 0xc, 1831 .cache_mode = 0, 1832 .retain_on_pc = true, 1833 }, { 1834 .usecase_id = LLCC_AUDHW, 1835 .slice_id = 22, 1836 .max_cap = 1024, 1837 .priority = 1, 1838 .fixed_size = true, 1839 .bonus_ways = 0xfff, 1840 .cache_mode = 0, 1841 .retain_on_pc = true, 1842 }, { 1843 .usecase_id = LLCC_NPU, 1844 .slice_id = 23, 1845 .max_cap = 6144, 1846 .priority = 1, 1847 .fixed_size = true, 1848 .bonus_ways = 0xfff, 1849 .cache_mode = 0, 1850 .retain_on_pc = true, 1851 }, { 1852 .usecase_id = LLCC_WLHW, 1853 .slice_id = 24, 1854 .max_cap = 6144, 1855 .priority = 1, 1856 .fixed_size = true, 1857 .bonus_ways = 0xfff, 1858 .cache_mode = 0, 1859 .retain_on_pc = true, 1860 }, { 1861 .usecase_id = LLCC_MODPE, 1862 .slice_id = 29, 1863 .max_cap = 512, 1864 .priority = 1, 1865 .fixed_size = true, 1866 .bonus_ways = 0xc, 1867 .cache_mode = 0, 1868 .retain_on_pc = true, 1869 }, { 1870 .usecase_id = LLCC_APTCM, 1871 .slice_id = 30, 1872 .max_cap = 512, 1873 .priority = 3, 1874 .fixed_size = true, 1875 .res_ways = 0x1, 1876 .cache_mode = 1, 1877 .retain_on_pc = true, 1878 }, { 1879 .usecase_id = LLCC_WRCACHE, 1880 .slice_id = 31, 1881 .max_cap = 128, 1882 .priority = 1, 1883 .fixed_size = true, 1884 .bonus_ways = 0xfff, 1885 .cache_mode = 0, 1886 }, 1887 }; 1888 1889 static const struct llcc_slice_config sc8280xp_data[] = { 1890 { 1891 .usecase_id = LLCC_CPUSS, 1892 .slice_id = 1, 1893 .max_cap = 6144, 1894 .priority = 1, 1895 .fixed_size = true, 1896 .bonus_ways = 0xfff, 1897 .cache_mode = 0, 1898 .retain_on_pc = true, 1899 .activate_on_init = true, 1900 }, { 1901 .usecase_id = LLCC_VIDSC0, 1902 .slice_id = 2, 1903 .max_cap = 512, 1904 .priority = 3, 1905 .fixed_size = true, 1906 .bonus_ways = 0xfff, 1907 .cache_mode = 0, 1908 .retain_on_pc = true, 1909 }, { 1910 .usecase_id = LLCC_AUDIO, 1911 .slice_id = 6, 1912 .max_cap = 1024, 1913 .priority = 1, 1914 .fixed_size = true, 1915 .bonus_ways = 0xfff, 1916 .cache_mode = 0, 1917 }, { 1918 .usecase_id = LLCC_CMPT, 1919 .slice_id = 10, 1920 .max_cap = 6144, 1921 .priority = 1, 1922 .fixed_size = true, 1923 .bonus_ways = 0xfff, 1924 .cache_mode = 0, 1925 }, { 1926 .usecase_id = LLCC_GPUHTW, 1927 .slice_id = 11, 1928 .max_cap = 1024, 1929 .priority = 1, 1930 .fixed_size = true, 1931 .bonus_ways = 0xfff, 1932 .cache_mode = 0, 1933 .retain_on_pc = true, 1934 }, { 1935 .usecase_id = LLCC_GPU, 1936 .slice_id = 12, 1937 .max_cap = 4096, 1938 .priority = 1, 1939 .fixed_size = true, 1940 .bonus_ways = 0xfff, 1941 .cache_mode = 0, 1942 .retain_on_pc = true, 1943 .write_scid_en = true, 1944 }, { 1945 .usecase_id = LLCC_MMUHWT, 1946 .slice_id = 13, 1947 .max_cap = 1024, 1948 .priority = 1, 1949 .fixed_size = true, 1950 .bonus_ways = 0xfff, 1951 .cache_mode = 0, 1952 .activate_on_init = true, 1953 }, { 1954 .usecase_id = LLCC_DISP, 1955 .slice_id = 16, 1956 .max_cap = 6144, 1957 .priority = 1, 1958 .fixed_size = true, 1959 .bonus_ways = 0xfff, 1960 .cache_mode = 0, 1961 .retain_on_pc = true, 1962 }, { 1963 .usecase_id = LLCC_AUDHW, 1964 .slice_id = 22, 1965 .max_cap = 2048, 1966 .priority = 1, 1967 .fixed_size = true, 1968 .bonus_ways = 0xfff, 1969 .cache_mode = 0, 1970 .retain_on_pc = true, 1971 }, { 1972 .usecase_id = LLCC_ECC, 1973 .slice_id = 26, 1974 .max_cap = 1024, 1975 .priority = 1, 1976 .fixed_size = true, 1977 .bonus_ways = 0xfff, 1978 .cache_mode = 0, 1979 .retain_on_pc = true, 1980 }, { 1981 .usecase_id = LLCC_CVP, 1982 .slice_id = 28, 1983 .max_cap = 512, 1984 .priority = 3, 1985 .fixed_size = true, 1986 .bonus_ways = 0xfff, 1987 .cache_mode = 0, 1988 .retain_on_pc = true, 1989 }, { 1990 .usecase_id = LLCC_APTCM, 1991 .slice_id = 30, 1992 .max_cap = 1024, 1993 .priority = 3, 1994 .fixed_size = true, 1995 .res_ways = 0x1, 1996 .cache_mode = 1, 1997 .retain_on_pc = true, 1998 }, { 1999 .usecase_id = LLCC_WRCACHE, 2000 .slice_id = 31, 2001 .max_cap = 1024, 2002 .priority = 1, 2003 .fixed_size = true, 2004 .bonus_ways = 0xfff, 2005 .cache_mode = 0, 2006 .activate_on_init = true, 2007 }, { 2008 .usecase_id = LLCC_CVPFW, 2009 .slice_id = 17, 2010 .max_cap = 512, 2011 .priority = 1, 2012 .bonus_ways = 0xfff, 2013 .cache_mode = 0, 2014 .retain_on_pc = true, 2015 }, { 2016 .usecase_id = LLCC_CPUSS1, 2017 .slice_id = 3, 2018 .max_cap = 2048, 2019 .priority = 1, 2020 .fixed_size = true, 2021 .bonus_ways = 0xfff, 2022 .cache_mode = 0, 2023 .retain_on_pc = true, 2024 }, { 2025 .usecase_id = LLCC_CPUHWT, 2026 .slice_id = 5, 2027 .max_cap = 512, 2028 .priority = 1, 2029 .fixed_size = true, 2030 .bonus_ways = 0xfff, 2031 .cache_mode = 0, 2032 .activate_on_init = true, 2033 }, 2034 }; 2035 2036 static const struct llcc_slice_config sdm670_data[] = { 2037 { 2038 .usecase_id = LLCC_CPUSS, 2039 .slice_id = 1, 2040 .max_cap = 512, 2041 .priority = 1, 2042 .bonus_ways = 0xf, 2043 .res_ways = 0x0, 2044 .cache_mode = 0, 2045 .dis_cap_alloc = true, 2046 .retain_on_pc = true, 2047 .activate_on_init = true, 2048 }, { 2049 .usecase_id = LLCC_ROTATOR, 2050 .slice_id = 4, 2051 .max_cap = 384, 2052 .priority = 2, 2053 .fixed_size = true, 2054 .bonus_ways = 0x0, 2055 .res_ways = 0xe, 2056 .cache_mode = 2, 2057 .dis_cap_alloc = true, 2058 .retain_on_pc = true, 2059 }, { 2060 .usecase_id = LLCC_VOICE, 2061 .slice_id = 5, 2062 .max_cap = 512, 2063 .priority = 1, 2064 .bonus_ways = 0xf, 2065 .res_ways = 0x0, 2066 .cache_mode = 0, 2067 .dis_cap_alloc = true, 2068 .retain_on_pc = true, 2069 }, { 2070 .usecase_id = LLCC_AUDIO, 2071 .slice_id = 6, 2072 .max_cap = 512, 2073 .priority = 1, 2074 .bonus_ways = 0xf, 2075 .res_ways = 0x0, 2076 .cache_mode = 0, 2077 .dis_cap_alloc = true, 2078 .retain_on_pc = true, 2079 }, { 2080 .usecase_id = LLCC_MDM, 2081 .slice_id = 8, 2082 .max_cap = 512, 2083 .priority = 1, 2084 .bonus_ways = 0xf, 2085 .res_ways = 0x0, 2086 .cache_mode = 0, 2087 .dis_cap_alloc = true, 2088 .retain_on_pc = true, 2089 }, { 2090 .usecase_id = LLCC_GPU, 2091 .slice_id = 12, 2092 .max_cap = 384, 2093 .priority = 1, 2094 .fixed_size = true, 2095 .bonus_ways = 0x0, 2096 .res_ways = 0x0, 2097 .cache_mode = 0, 2098 .dis_cap_alloc = true, 2099 .retain_on_pc = true, 2100 }, { 2101 .usecase_id = LLCC_MMUHWT, 2102 .slice_id = 13, 2103 .max_cap = 512, 2104 .priority = 1, 2105 .bonus_ways = 0xf, 2106 .res_ways = 0x0, 2107 .cache_mode = 0, 2108 .dis_cap_alloc = true, 2109 .activate_on_init = true, 2110 }, { 2111 .usecase_id = LLCC_AUDHW, 2112 .slice_id = 22, 2113 .max_cap = 512, 2114 .priority = 1, 2115 .fixed_size = true, 2116 .bonus_ways = 0xf, 2117 .res_ways = 0x0, 2118 .cache_mode = 0, 2119 .dis_cap_alloc = true, 2120 .retain_on_pc = true, 2121 }, 2122 }; 2123 2124 static const struct llcc_slice_config sdm845_data[] = {{ 2125 .usecase_id = LLCC_CPUSS, 2126 .slice_id = 1, 2127 .max_cap = 2816, 2128 .priority = 1, 2129 .bonus_ways = 0xffc, 2130 .res_ways = 0x2, 2131 .cache_mode = 0, 2132 .dis_cap_alloc = true, 2133 .retain_on_pc = true, 2134 .activate_on_init = true, 2135 }, { 2136 .usecase_id = LLCC_VIDSC0, 2137 .slice_id = 2, 2138 .max_cap = 512, 2139 .priority = 2, 2140 .fixed_size = true, 2141 .res_ways = 0xf0, 2142 .cache_mode = 0, 2143 .dis_cap_alloc = true, 2144 .retain_on_pc = true, 2145 }, { 2146 .usecase_id = LLCC_VIDSC1, 2147 .slice_id = 3, 2148 .max_cap = 512, 2149 .priority = 2, 2150 .fixed_size = true, 2151 .res_ways = 0xf0, 2152 .cache_mode = 0, 2153 .dis_cap_alloc = true, 2154 .retain_on_pc = true, 2155 }, { 2156 .usecase_id = LLCC_ROTATOR, 2157 .slice_id = 4, 2158 .max_cap = 563, 2159 .priority = 2, 2160 .fixed_size = true, 2161 .res_ways = 0xe, 2162 .cache_mode = 2, 2163 .dis_cap_alloc = true, 2164 .retain_on_pc = true, 2165 }, { 2166 .usecase_id = LLCC_VOICE, 2167 .slice_id = 5, 2168 .max_cap = 2816, 2169 .priority = 1, 2170 .bonus_ways = 0xffc, 2171 .res_ways = 0x2, 2172 .cache_mode = 0, 2173 .dis_cap_alloc = true, 2174 .retain_on_pc = true, 2175 }, { 2176 .usecase_id = LLCC_AUDIO, 2177 .slice_id = 6, 2178 .max_cap = 2816, 2179 .priority = 1, 2180 .bonus_ways = 0xffc, 2181 .res_ways = 0x2, 2182 .cache_mode = 0, 2183 .dis_cap_alloc = true, 2184 .retain_on_pc = true, 2185 }, { 2186 .usecase_id = LLCC_MDMHPGRW, 2187 .slice_id = 7, 2188 .max_cap = 1024, 2189 .priority = 2, 2190 .bonus_ways = 0xfc, 2191 .res_ways = 0xf00, 2192 .cache_mode = 0, 2193 .dis_cap_alloc = true, 2194 .retain_on_pc = true, 2195 }, { 2196 .usecase_id = LLCC_MDM, 2197 .slice_id = 8, 2198 .max_cap = 2816, 2199 .priority = 1, 2200 .bonus_ways = 0xffc, 2201 .res_ways = 0x2, 2202 .cache_mode = 0, 2203 .dis_cap_alloc = true, 2204 .retain_on_pc = true, 2205 }, { 2206 .usecase_id = LLCC_CMPT, 2207 .slice_id = 10, 2208 .max_cap = 2816, 2209 .priority = 1, 2210 .bonus_ways = 0xffc, 2211 .res_ways = 0x2, 2212 .cache_mode = 0, 2213 .dis_cap_alloc = true, 2214 .retain_on_pc = true, 2215 }, { 2216 .usecase_id = LLCC_GPUHTW, 2217 .slice_id = 11, 2218 .max_cap = 512, 2219 .priority = 1, 2220 .fixed_size = true, 2221 .bonus_ways = 0xc, 2222 .cache_mode = 0, 2223 .dis_cap_alloc = true, 2224 .retain_on_pc = true, 2225 }, { 2226 .usecase_id = LLCC_GPU, 2227 .slice_id = 12, 2228 .max_cap = 2304, 2229 .priority = 1, 2230 .bonus_ways = 0xff0, 2231 .res_ways = 0x2, 2232 .cache_mode = 0, 2233 .dis_cap_alloc = true, 2234 .retain_on_pc = true, 2235 }, { 2236 .usecase_id = LLCC_MMUHWT, 2237 .slice_id = 13, 2238 .max_cap = 256, 2239 .priority = 2, 2240 .res_ways = 0x1, 2241 .cache_mode = 0, 2242 .dis_cap_alloc = true, 2243 .activate_on_init = true, 2244 }, { 2245 .usecase_id = LLCC_CMPTDMA, 2246 .slice_id = 15, 2247 .max_cap = 2816, 2248 .priority = 1, 2249 .bonus_ways = 0xffc, 2250 .res_ways = 0x2, 2251 .cache_mode = 0, 2252 .dis_cap_alloc = true, 2253 .retain_on_pc = true, 2254 }, { 2255 .usecase_id = LLCC_DISP, 2256 .slice_id = 16, 2257 .max_cap = 2816, 2258 .priority = 1, 2259 .bonus_ways = 0xffc, 2260 .res_ways = 0x2, 2261 .cache_mode = 0, 2262 .dis_cap_alloc = true, 2263 .retain_on_pc = true, 2264 }, { 2265 .usecase_id = LLCC_VIDFW, 2266 .slice_id = 17, 2267 .max_cap = 2816, 2268 .priority = 1, 2269 .bonus_ways = 0xffc, 2270 .res_ways = 0x2, 2271 .cache_mode = 0, 2272 .dis_cap_alloc = true, 2273 .retain_on_pc = true, 2274 }, { 2275 .usecase_id = LLCC_MDMHPFX, 2276 .slice_id = 20, 2277 .max_cap = 1024, 2278 .priority = 2, 2279 .fixed_size = true, 2280 .res_ways = 0xf00, 2281 .cache_mode = 0, 2282 .dis_cap_alloc = true, 2283 .retain_on_pc = true, 2284 }, { 2285 .usecase_id = LLCC_MDMPNG, 2286 .slice_id = 21, 2287 .max_cap = 1024, 2288 .priority = 0, 2289 .fixed_size = true, 2290 .bonus_ways = 0x1e, 2291 .cache_mode = 0, 2292 .dis_cap_alloc = true, 2293 .retain_on_pc = true, 2294 }, { 2295 .usecase_id = LLCC_AUDHW, 2296 .slice_id = 22, 2297 .max_cap = 1024, 2298 .priority = 1, 2299 .fixed_size = true, 2300 .bonus_ways = 0xffc, 2301 .res_ways = 0x2, 2302 .cache_mode = 0, 2303 .dis_cap_alloc = true, 2304 .retain_on_pc = true, 2305 }, 2306 }; 2307 2308 static const struct llcc_slice_config sm6350_data[] = { 2309 { 2310 .usecase_id = LLCC_CPUSS, 2311 .slice_id = 1, 2312 .max_cap = 768, 2313 .priority = 1, 2314 .bonus_ways = 0xfff, 2315 .cache_mode = 0, 2316 .activate_on_init = true, 2317 .write_scid_en = true, 2318 }, { 2319 .usecase_id = LLCC_MDM, 2320 .slice_id = 8, 2321 .max_cap = 512, 2322 .priority = 2, 2323 .bonus_ways = 0xfff, 2324 .cache_mode = 0, 2325 .activate_on_init = true, 2326 }, { 2327 .usecase_id = LLCC_GPUHTW, 2328 .slice_id = 11, 2329 .max_cap = 256, 2330 .priority = 1, 2331 .bonus_ways = 0xfff, 2332 .cache_mode = 0, 2333 .activate_on_init = true, 2334 }, { 2335 .usecase_id = LLCC_GPU, 2336 .slice_id = 12, 2337 .max_cap = 512, 2338 .priority = 1, 2339 .bonus_ways = 0xfff, 2340 .cache_mode = 0, 2341 .activate_on_init = true, 2342 }, { 2343 .usecase_id = LLCC_MDMPNG, 2344 .slice_id = 21, 2345 .max_cap = 768, 2346 .priority = 0, 2347 .fixed_size = true, 2348 .bonus_ways = 0xfff, 2349 .cache_mode = 0, 2350 .activate_on_init = true, 2351 }, { 2352 .usecase_id = LLCC_NPU, 2353 .slice_id = 23, 2354 .max_cap = 768, 2355 .priority = 1, 2356 .bonus_ways = 0xfff, 2357 .cache_mode = 0, 2358 .activate_on_init = true, 2359 }, { 2360 .usecase_id = LLCC_MODPE, 2361 .slice_id = 29, 2362 .max_cap = 64, 2363 .priority = 1, 2364 .fixed_size = true, 2365 .bonus_ways = 0xfff, 2366 .cache_mode = 0, 2367 .activate_on_init = true, 2368 }, 2369 }; 2370 2371 static const struct llcc_slice_config sm7150_data[] = { 2372 { 2373 .usecase_id = LLCC_CPUSS, 2374 .slice_id = 1, 2375 .max_cap = 512, 2376 .priority = 1, 2377 .bonus_ways = 0xf, 2378 .cache_mode = 0, 2379 .retain_on_pc = true, 2380 .activate_on_init = true, 2381 }, { 2382 .usecase_id = LLCC_MDM, 2383 .slice_id = 8, 2384 .max_cap = 128, 2385 .priority = 2, 2386 .bonus_ways = 0xf, 2387 .cache_mode = 0, 2388 .retain_on_pc = true, 2389 }, { 2390 .usecase_id = LLCC_GPUHTW, 2391 .slice_id = 11, 2392 .max_cap = 256, 2393 .priority = 1, 2394 .fixed_size = true, 2395 .bonus_ways = 0xf, 2396 .cache_mode = 0, 2397 .retain_on_pc = true, 2398 }, { 2399 .usecase_id = LLCC_GPU, 2400 .slice_id = 12, 2401 .max_cap = 256, 2402 .priority = 1, 2403 .fixed_size = true, 2404 .bonus_ways = 0xf, 2405 .cache_mode = 0, 2406 .retain_on_pc = true, 2407 }, { 2408 .usecase_id = LLCC_NPU, 2409 .slice_id = 23, 2410 .max_cap = 512, 2411 .priority = 1, 2412 .bonus_ways = 0xf, 2413 .cache_mode = 0, 2414 .retain_on_pc = true, 2415 }, 2416 }; 2417 2418 static const struct llcc_slice_config sm8150_data[] = { 2419 { 2420 .usecase_id = LLCC_CPUSS, 2421 .slice_id = 1, 2422 .max_cap = 3072, 2423 .priority = 1, 2424 .fixed_size = true, 2425 .bonus_ways = 0xfff, 2426 .cache_mode = 0, 2427 .retain_on_pc = true, 2428 .activate_on_init = true, 2429 }, { 2430 .usecase_id = LLCC_VIDSC0, 2431 .slice_id = 2, 2432 .max_cap = 512, 2433 .priority = 2, 2434 .fixed_size = true, 2435 .bonus_ways = 0xfff, 2436 .cache_mode = 0, 2437 .retain_on_pc = true, 2438 }, { 2439 .usecase_id = LLCC_VIDSC1, 2440 .slice_id = 3, 2441 .max_cap = 512, 2442 .priority = 2, 2443 .fixed_size = true, 2444 .bonus_ways = 0xfff, 2445 .cache_mode = 0, 2446 .retain_on_pc = true, 2447 }, { 2448 .usecase_id = LLCC_AUDIO, 2449 .slice_id = 6, 2450 .max_cap = 1024, 2451 .priority = 1, 2452 .fixed_size = true, 2453 .bonus_ways = 0xfff, 2454 .cache_mode = 0, 2455 .retain_on_pc = true, 2456 }, { 2457 .usecase_id = LLCC_MDMHPGRW, 2458 .slice_id = 7, 2459 .max_cap = 3072, 2460 .priority = 1, 2461 .bonus_ways = 0xff, 2462 .res_ways = 0xf00, 2463 .cache_mode = 0, 2464 .retain_on_pc = true, 2465 }, { 2466 .usecase_id = LLCC_MDM, 2467 .slice_id = 8, 2468 .max_cap = 3072, 2469 .priority = 1, 2470 .fixed_size = true, 2471 .bonus_ways = 0xfff, 2472 .cache_mode = 0, 2473 .retain_on_pc = true, 2474 }, { 2475 .usecase_id = LLCC_MODHW, 2476 .slice_id = 9, 2477 .max_cap = 1024, 2478 .priority = 1, 2479 .fixed_size = true, 2480 .bonus_ways = 0xfff, 2481 .cache_mode = 0, 2482 .retain_on_pc = true, 2483 }, { 2484 .usecase_id = LLCC_CMPT, 2485 .slice_id = 10, 2486 .max_cap = 3072, 2487 .priority = 1, 2488 .fixed_size = true, 2489 .bonus_ways = 0xfff, 2490 .cache_mode = 0, 2491 .retain_on_pc = true, 2492 }, { 2493 .usecase_id = LLCC_GPUHTW, 2494 .slice_id = 11, 2495 .max_cap = 512, 2496 .priority = 1, 2497 .fixed_size = true, 2498 .bonus_ways = 0xfff, 2499 .cache_mode = 0, 2500 .retain_on_pc = true, 2501 }, { 2502 .usecase_id = LLCC_GPU, 2503 .slice_id = 12, 2504 .max_cap = 2560, 2505 .priority = 1, 2506 .fixed_size = true, 2507 .bonus_ways = 0xfff, 2508 .cache_mode = 0, 2509 .retain_on_pc = true, 2510 }, { 2511 .usecase_id = LLCC_MMUHWT, 2512 .slice_id = 13, 2513 .max_cap = 1024, 2514 .priority = 1, 2515 .fixed_size = true, 2516 .bonus_ways = 0xfff, 2517 .cache_mode = 0, 2518 .activate_on_init = true, 2519 }, { 2520 .usecase_id = LLCC_CMPTDMA, 2521 .slice_id = 15, 2522 .max_cap = 3072, 2523 .priority = 1, 2524 .fixed_size = true, 2525 .bonus_ways = 0xfff, 2526 .cache_mode = 0, 2527 .retain_on_pc = true, 2528 }, { 2529 .usecase_id = LLCC_DISP, 2530 .slice_id = 16, 2531 .max_cap = 3072, 2532 .priority = 1, 2533 .fixed_size = true, 2534 .bonus_ways = 0xfff, 2535 .cache_mode = 0, 2536 .retain_on_pc = true, 2537 }, { 2538 .usecase_id = LLCC_MDMHPFX, 2539 .slice_id = 20, 2540 .max_cap = 1024, 2541 .priority = 2, 2542 .fixed_size = true, 2543 .bonus_ways = 0xfff, 2544 .cache_mode = 0, 2545 .retain_on_pc = true, 2546 }, { 2547 .usecase_id = LLCC_MDMHPFX, 2548 .slice_id = 21, 2549 .max_cap = 1024, 2550 .priority = 0, 2551 .fixed_size = true, 2552 .bonus_ways = 0xf, 2553 .cache_mode = 0, 2554 .retain_on_pc = true, 2555 }, { 2556 .usecase_id = LLCC_AUDHW, 2557 .slice_id = 22, 2558 .max_cap = 1024, 2559 .priority = 1, 2560 .fixed_size = true, 2561 .bonus_ways = 0xfff, 2562 .cache_mode = 0, 2563 .retain_on_pc = true, 2564 }, { 2565 .usecase_id = LLCC_NPU, 2566 .slice_id = 23, 2567 .max_cap = 3072, 2568 .priority = 1, 2569 .fixed_size = true, 2570 .bonus_ways = 0xfff, 2571 .cache_mode = 0, 2572 .retain_on_pc = true, 2573 }, { 2574 .usecase_id = LLCC_WLHW, 2575 .slice_id = 24, 2576 .max_cap = 3072, 2577 .priority = 1, 2578 .fixed_size = true, 2579 .bonus_ways = 0xfff, 2580 .cache_mode = 0, 2581 .retain_on_pc = true, 2582 }, { 2583 .usecase_id = LLCC_MODPE, 2584 .slice_id = 29, 2585 .max_cap = 256, 2586 .priority = 1, 2587 .fixed_size = true, 2588 .bonus_ways = 0xf, 2589 .cache_mode = 0, 2590 .retain_on_pc = true, 2591 }, { 2592 .usecase_id = LLCC_APTCM, 2593 .slice_id = 30, 2594 .max_cap = 256, 2595 .priority = 3, 2596 .fixed_size = true, 2597 .res_ways = 0x1, 2598 .cache_mode = 1, 2599 .retain_on_pc = true, 2600 }, { 2601 .usecase_id = LLCC_WRCACHE, 2602 .slice_id = 31, 2603 .max_cap = 128, 2604 .priority = 1, 2605 .fixed_size = true, 2606 .bonus_ways = 0xfff, 2607 .cache_mode = 0, 2608 }, 2609 }; 2610 2611 static const struct llcc_slice_config sm8250_data[] = { 2612 { 2613 .usecase_id = LLCC_CPUSS, 2614 .slice_id = 1, 2615 .max_cap = 3072, 2616 .priority = 1, 2617 .fixed_size = true, 2618 .bonus_ways = 0xfff, 2619 .cache_mode = 0, 2620 .retain_on_pc = true, 2621 .activate_on_init = true, 2622 }, { 2623 .usecase_id = LLCC_VIDSC0, 2624 .slice_id = 2, 2625 .max_cap = 512, 2626 .priority = 3, 2627 .fixed_size = true, 2628 .bonus_ways = 0xfff, 2629 .cache_mode = 0, 2630 .retain_on_pc = true, 2631 }, { 2632 .usecase_id = LLCC_AUDIO, 2633 .slice_id = 6, 2634 .max_cap = 1024, 2635 .priority = 1, 2636 .bonus_ways = 0xfff, 2637 .cache_mode = 0, 2638 }, { 2639 .usecase_id = LLCC_CMPT, 2640 .slice_id = 10, 2641 .max_cap = 1024, 2642 .priority = 1, 2643 .bonus_ways = 0xfff, 2644 .cache_mode = 0, 2645 }, { 2646 .usecase_id = LLCC_GPUHTW, 2647 .slice_id = 11, 2648 .max_cap = 1024, 2649 .priority = 1, 2650 .fixed_size = true, 2651 .bonus_ways = 0xfff, 2652 .cache_mode = 0, 2653 .retain_on_pc = true, 2654 }, { 2655 .usecase_id = LLCC_GPU, 2656 .slice_id = 12, 2657 .max_cap = 1024, 2658 .priority = 1, 2659 .bonus_ways = 0xfff, 2660 .cache_mode = 0, 2661 .retain_on_pc = true, 2662 .write_scid_en = true, 2663 }, { 2664 .usecase_id = LLCC_MMUHWT, 2665 .slice_id = 13, 2666 .max_cap = 1024, 2667 .priority = 1, 2668 .fixed_size = true, 2669 .bonus_ways = 0xfff, 2670 .cache_mode = 0, 2671 .activate_on_init = true, 2672 }, { 2673 .usecase_id = LLCC_CMPTDMA, 2674 .slice_id = 15, 2675 .max_cap = 1024, 2676 .priority = 1, 2677 .bonus_ways = 0xfff, 2678 .cache_mode = 0, 2679 .retain_on_pc = true, 2680 }, { 2681 .usecase_id = LLCC_DISP, 2682 .slice_id = 16, 2683 .max_cap = 3072, 2684 .priority = 1, 2685 .fixed_size = true, 2686 .bonus_ways = 0xfff, 2687 .cache_mode = 0, 2688 .retain_on_pc = true, 2689 }, { 2690 .usecase_id = LLCC_VIDFW, 2691 .slice_id = 17, 2692 .max_cap = 512, 2693 .priority = 1, 2694 .bonus_ways = 0xfff, 2695 .cache_mode = 0, 2696 .retain_on_pc = true, 2697 }, { 2698 .usecase_id = LLCC_AUDHW, 2699 .slice_id = 22, 2700 .max_cap = 1024, 2701 .priority = 1, 2702 .fixed_size = true, 2703 .bonus_ways = 0xfff, 2704 .cache_mode = 0, 2705 .retain_on_pc = true, 2706 }, { 2707 .usecase_id = LLCC_NPU, 2708 .slice_id = 23, 2709 .max_cap = 3072, 2710 .priority = 1, 2711 .fixed_size = true, 2712 .bonus_ways = 0xfff, 2713 .cache_mode = 0, 2714 .retain_on_pc = true, 2715 }, { 2716 .usecase_id = LLCC_WLHW, 2717 .slice_id = 24, 2718 .max_cap = 1024, 2719 .priority = 1, 2720 .bonus_ways = 0xfff, 2721 .cache_mode = 0, 2722 .retain_on_pc = true, 2723 }, { 2724 .usecase_id = LLCC_CVP, 2725 .slice_id = 28, 2726 .max_cap = 256, 2727 .priority = 3, 2728 .fixed_size = true, 2729 .bonus_ways = 0xfff, 2730 .cache_mode = 0, 2731 .retain_on_pc = true, 2732 }, { 2733 .usecase_id = LLCC_APTCM, 2734 .slice_id = 30, 2735 .max_cap = 128, 2736 .priority = 3, 2737 .res_ways = 0x3, 2738 .cache_mode = 1, 2739 .retain_on_pc = true, 2740 }, { 2741 .usecase_id = LLCC_WRCACHE, 2742 .slice_id = 31, 2743 .max_cap = 256, 2744 .priority = 1, 2745 .fixed_size = true, 2746 .bonus_ways = 0xfff, 2747 .cache_mode = 0, 2748 .activate_on_init = true, 2749 }, 2750 }; 2751 2752 static const struct llcc_slice_config sm8350_data[] = { 2753 { 2754 .usecase_id = LLCC_CPUSS, 2755 .slice_id = 1, 2756 .max_cap = 3072, 2757 .priority = 1, 2758 .fixed_size = true, 2759 .bonus_ways = 0xfff, 2760 .cache_mode = 0, 2761 .activate_on_init = true, 2762 .write_scid_en = true, 2763 }, { 2764 .usecase_id = LLCC_VIDSC0, 2765 .slice_id = 2, 2766 .max_cap = 512, 2767 .priority = 3, 2768 .fixed_size = true, 2769 .bonus_ways = 0xfff, 2770 .cache_mode = 0, 2771 .activate_on_init = true, 2772 }, { 2773 .usecase_id = LLCC_AUDIO, 2774 .slice_id = 6, 2775 .max_cap = 1024, 2776 .priority = 1, 2777 .fixed_size = true, 2778 .bonus_ways = 0xfff, 2779 .cache_mode = 0, 2780 }, { 2781 .usecase_id = LLCC_MDMHPGRW, 2782 .slice_id = 7, 2783 .max_cap = 1024, 2784 .priority = 3, 2785 .bonus_ways = 0xfff, 2786 .cache_mode = 0, 2787 .activate_on_init = true, 2788 }, { 2789 .usecase_id = LLCC_MODHW, 2790 .slice_id = 9, 2791 .max_cap = 1024, 2792 .priority = 1, 2793 .fixed_size = true, 2794 .bonus_ways = 0xfff, 2795 .cache_mode = 0, 2796 .activate_on_init = true, 2797 }, { 2798 .usecase_id = LLCC_CMPT, 2799 .slice_id = 10, 2800 .max_cap = 3072, 2801 .priority = 1, 2802 .fixed_size = true, 2803 .bonus_ways = 0xfff, 2804 .cache_mode = 0, 2805 .activate_on_init = true, 2806 }, { 2807 .usecase_id = LLCC_GPUHTW, 2808 .slice_id = 11, 2809 .max_cap = 1024, 2810 .priority = 1, 2811 .fixed_size = true, 2812 .bonus_ways = 0xfff, 2813 .cache_mode = 0, 2814 .activate_on_init = true, 2815 }, { 2816 .usecase_id = LLCC_GPU, 2817 .slice_id = 12, 2818 .max_cap = 1024, 2819 .priority = 1, 2820 .bonus_ways = 0xfff, 2821 .cache_mode = 0, 2822 .retain_on_pc = true, 2823 .activate_on_init = true, 2824 }, { 2825 .usecase_id = LLCC_MMUHWT, 2826 .slice_id = 13, 2827 .max_cap = 1024, 2828 .priority = 1, 2829 .fixed_size = true, 2830 .bonus_ways = 0xfff, 2831 .cache_mode = 0, 2832 .write_scid_en = true, 2833 }, { 2834 .usecase_id = LLCC_DISP, 2835 .slice_id = 16, 2836 .max_cap = 3072, 2837 .priority = 2, 2838 .fixed_size = true, 2839 .bonus_ways = 0xfff, 2840 .cache_mode = 0, 2841 .activate_on_init = true, 2842 }, { 2843 .usecase_id = LLCC_MDMPNG, 2844 .slice_id = 21, 2845 .max_cap = 1024, 2846 .priority = 0, 2847 .fixed_size = true, 2848 .bonus_ways = 0xf, 2849 .cache_mode = 0, 2850 .activate_on_init = true, 2851 }, { 2852 .usecase_id = LLCC_AUDHW, 2853 .slice_id = 22, 2854 .max_cap = 1024, 2855 .priority = 1, 2856 .fixed_size = true, 2857 .bonus_ways = 0xfff, 2858 .cache_mode = 0, 2859 .activate_on_init = true, 2860 }, { 2861 .usecase_id = LLCC_CVP, 2862 .slice_id = 28, 2863 .max_cap = 512, 2864 .priority = 3, 2865 .fixed_size = true, 2866 .bonus_ways = 0xfff, 2867 .cache_mode = 0, 2868 .activate_on_init = true, 2869 }, { 2870 .usecase_id = LLCC_MODPE, 2871 .slice_id = 29, 2872 .max_cap = 256, 2873 .priority = 1, 2874 .fixed_size = true, 2875 .bonus_ways = 0xf, 2876 .cache_mode = 0, 2877 .activate_on_init = true, 2878 }, { 2879 .usecase_id = LLCC_APTCM, 2880 .slice_id = 30, 2881 .max_cap = 1024, 2882 .priority = 3, 2883 .fixed_size = true, 2884 .res_ways = 0x1, 2885 .cache_mode = 1, 2886 .activate_on_init = true, 2887 }, { 2888 .usecase_id = LLCC_WRCACHE, 2889 .slice_id = 31, 2890 .max_cap = 512, 2891 .priority = 1, 2892 .fixed_size = true, 2893 .bonus_ways = 0xfff, 2894 .cache_mode = 0, 2895 .write_scid_en = true, 2896 }, { 2897 .usecase_id = LLCC_CVPFW, 2898 .slice_id = 17, 2899 .max_cap = 512, 2900 .priority = 1, 2901 .bonus_ways = 0xfff, 2902 .cache_mode = 0, 2903 .activate_on_init = true, 2904 }, { 2905 .usecase_id = LLCC_CPUSS1, 2906 .slice_id = 3, 2907 .max_cap = 1024, 2908 .priority = 1, 2909 .fixed_size = true, 2910 .bonus_ways = 0xfff, 2911 .cache_mode = 0, 2912 .activate_on_init = true, 2913 }, { 2914 .usecase_id = LLCC_CPUHWT, 2915 .slice_id = 5, 2916 .max_cap = 512, 2917 .priority = 1, 2918 .fixed_size = true, 2919 .bonus_ways = 0xfff, 2920 .cache_mode = 0, 2921 .write_scid_en = true, 2922 }, 2923 }; 2924 2925 static const struct llcc_slice_config sm8450_data[] = { 2926 { 2927 .usecase_id = LLCC_CPUSS, 2928 .slice_id = 1, 2929 .max_cap = 3072, 2930 .priority = 1, 2931 .bonus_ways = 0xffff, 2932 .cache_mode = 0, 2933 .retain_on_pc = true, 2934 .activate_on_init = true, 2935 }, { 2936 .usecase_id = LLCC_VIDSC0, 2937 .slice_id = 2, 2938 .max_cap = 512, 2939 .priority = 3, 2940 .fixed_size = true, 2941 .bonus_ways = 0xffff, 2942 .cache_mode = 0, 2943 .retain_on_pc = true, 2944 }, { 2945 .usecase_id = LLCC_AUDIO, 2946 .slice_id = 6, 2947 .max_cap = 1024, 2948 .priority = 1, 2949 .fixed_size = true, 2950 .bonus_ways = 0xffff, 2951 .cache_mode = 0, 2952 }, { 2953 .usecase_id = LLCC_MDMHPGRW, 2954 .slice_id = 7, 2955 .max_cap = 1024, 2956 .priority = 3, 2957 .bonus_ways = 0xffff, 2958 .cache_mode = 0, 2959 .retain_on_pc = true, 2960 }, { 2961 .usecase_id = LLCC_MODHW, 2962 .slice_id = 9, 2963 .max_cap = 1024, 2964 .priority = 1, 2965 .fixed_size = true, 2966 .bonus_ways = 0xffff, 2967 .cache_mode = 0, 2968 .retain_on_pc = true, 2969 }, { 2970 .usecase_id = LLCC_CMPT, 2971 .slice_id = 10, 2972 .max_cap = 4096, 2973 .priority = 1, 2974 .fixed_size = true, 2975 .bonus_ways = 0xffff, 2976 .cache_mode = 0, 2977 .retain_on_pc = true, 2978 }, { 2979 .usecase_id = LLCC_GPUHTW, 2980 .slice_id = 11, 2981 .max_cap = 512, 2982 .priority = 1, 2983 .fixed_size = true, 2984 .bonus_ways = 0xffff, 2985 .cache_mode = 0, 2986 .retain_on_pc = true, 2987 }, { 2988 .usecase_id = LLCC_GPU, 2989 .slice_id = 12, 2990 .max_cap = 2048, 2991 .priority = 1, 2992 .fixed_size = true, 2993 .bonus_ways = 0xffff, 2994 .cache_mode = 0, 2995 .retain_on_pc = true, 2996 .write_scid_en = true, 2997 }, { 2998 .usecase_id = LLCC_MMUHWT, 2999 .slice_id = 13, 3000 .max_cap = 768, 3001 .priority = 1, 3002 .fixed_size = true, 3003 .bonus_ways = 0xffff, 3004 .cache_mode = 0, 3005 .activate_on_init = true, 3006 }, { 3007 .usecase_id = LLCC_DISP, 3008 .slice_id = 16, 3009 .max_cap = 4096, 3010 .priority = 2, 3011 .fixed_size = true, 3012 .bonus_ways = 0xffff, 3013 .cache_mode = 0, 3014 .retain_on_pc = true, 3015 }, { 3016 .usecase_id = LLCC_MDMPNG, 3017 .slice_id = 21, 3018 .max_cap = 1024, 3019 .priority = 1, 3020 .fixed_size = true, 3021 .bonus_ways = 0xf000, 3022 .cache_mode = 0, 3023 .retain_on_pc = true, 3024 }, { 3025 .usecase_id = LLCC_AUDHW, 3026 .slice_id = 22, 3027 .max_cap = 1024, 3028 .priority = 1, 3029 .fixed_size = true, 3030 .bonus_ways = 0xffff, 3031 .cache_mode = 0, 3032 }, { 3033 .usecase_id = LLCC_CVP, 3034 .slice_id = 28, 3035 .max_cap = 256, 3036 .priority = 3, 3037 .fixed_size = true, 3038 .bonus_ways = 0xffff, 3039 .cache_mode = 0, 3040 .retain_on_pc = true, 3041 }, { 3042 .usecase_id = LLCC_MODPE, 3043 .slice_id = 29, 3044 .max_cap = 64, 3045 .priority = 1, 3046 .fixed_size = true, 3047 .bonus_ways = 0xf000, 3048 .cache_mode = 0, 3049 .retain_on_pc = true, 3050 }, { 3051 .usecase_id = LLCC_APTCM, 3052 .slice_id = 30, 3053 .max_cap = 1024, 3054 .priority = 3, 3055 .fixed_size = true, 3056 .res_ways = 0xf0, 3057 .cache_mode = 1, 3058 .retain_on_pc = true, 3059 }, { 3060 .usecase_id = LLCC_WRCACHE, 3061 .slice_id = 31, 3062 .max_cap = 512, 3063 .priority = 1, 3064 .fixed_size = true, 3065 .bonus_ways = 0xffff, 3066 .cache_mode = 0, 3067 .activate_on_init = true, 3068 }, { 3069 .usecase_id = LLCC_CVPFW, 3070 .slice_id = 17, 3071 .max_cap = 512, 3072 .priority = 1, 3073 .fixed_size = true, 3074 .bonus_ways = 0xffff, 3075 .cache_mode = 0, 3076 .retain_on_pc = true, 3077 }, { 3078 .usecase_id = LLCC_CPUSS1, 3079 .slice_id = 3, 3080 .max_cap = 1024, 3081 .priority = 1, 3082 .fixed_size = true, 3083 .bonus_ways = 0xffff, 3084 .cache_mode = 0, 3085 .retain_on_pc = true, 3086 }, { 3087 .usecase_id = LLCC_CAMEXP0, 3088 .slice_id = 4, 3089 .max_cap = 256, 3090 .priority = 3, 3091 .fixed_size = true, 3092 .bonus_ways = 0xffff, 3093 .cache_mode = 0, 3094 .retain_on_pc = true, 3095 }, { 3096 .usecase_id = LLCC_CPUMTE, 3097 .slice_id = 23, 3098 .max_cap = 256, 3099 .priority = 1, 3100 .fixed_size = true, 3101 .bonus_ways = 0xfff, 3102 .cache_mode = 0, 3103 .activate_on_init = true, 3104 }, { 3105 .usecase_id = LLCC_CPUHWT, 3106 .slice_id = 5, 3107 .max_cap = 512, 3108 .priority = 1, 3109 .fixed_size = true, 3110 .bonus_ways = 0xffff, 3111 .cache_mode = 0, 3112 .retain_on_pc = true, 3113 .activate_on_init = true, 3114 }, { 3115 .usecase_id = LLCC_CAMEXP1, 3116 .slice_id = 27, 3117 .max_cap = 256, 3118 .priority = 3, 3119 .fixed_size = true, 3120 .bonus_ways = 0xffff, 3121 .cache_mode = 0, 3122 .retain_on_pc = true, 3123 }, { 3124 .usecase_id = LLCC_AENPU, 3125 .slice_id = 8, 3126 .max_cap = 2048, 3127 .priority = 1, 3128 .fixed_size = true, 3129 .bonus_ways = 0xffff, 3130 .cache_mode = 0, 3131 }, 3132 }; 3133 3134 static const struct llcc_slice_config sm8550_data[] = { 3135 { 3136 .usecase_id = LLCC_CPUSS, 3137 .slice_id = 1, 3138 .max_cap = 5120, 3139 .priority = 1, 3140 .bonus_ways = 0xffffff, 3141 .cache_mode = 0, 3142 .activate_on_init = true, 3143 .write_scid_en = true, 3144 }, { 3145 .usecase_id = LLCC_VIDSC0, 3146 .slice_id = 2, 3147 .max_cap = 512, 3148 .priority = 4, 3149 .fixed_size = true, 3150 .bonus_ways = 0xffffff, 3151 .cache_mode = 0, 3152 }, { 3153 .usecase_id = LLCC_AUDIO, 3154 .slice_id = 6, 3155 .max_cap = 1024, 3156 .priority = 1, 3157 .fixed_size = true, 3158 .bonus_ways = 0xffffff, 3159 .cache_mode = 0, 3160 }, { 3161 .usecase_id = LLCC_MDMHPGRW, 3162 .slice_id = 25, 3163 .max_cap = 1024, 3164 .priority = 4, 3165 .bonus_ways = 0xffffff, 3166 .cache_mode = 0, 3167 }, { 3168 .usecase_id = LLCC_MODHW, 3169 .slice_id = 26, 3170 .max_cap = 1024, 3171 .priority = 1, 3172 .fixed_size = true, 3173 .bonus_ways = 0xffffff, 3174 .cache_mode = 0, 3175 }, { 3176 .usecase_id = LLCC_CMPT, 3177 .slice_id = 10, 3178 .max_cap = 4096, 3179 .priority = 1, 3180 .fixed_size = true, 3181 .bonus_ways = 0xffffff, 3182 .cache_mode = 0, 3183 }, { 3184 .usecase_id = LLCC_GPUHTW, 3185 .slice_id = 11, 3186 .max_cap = 512, 3187 .priority = 1, 3188 .fixed_size = true, 3189 .bonus_ways = 0xffffff, 3190 .cache_mode = 0, 3191 }, { 3192 .usecase_id = LLCC_GPU, 3193 .slice_id = 9, 3194 .max_cap = 3096, 3195 .priority = 1, 3196 .bonus_ways = 0xffffff, 3197 .cache_mode = 0, 3198 .write_scid_en = true, 3199 .write_scid_cacheable_en = true, 3200 }, { 3201 .usecase_id = LLCC_MMUHWT, 3202 .slice_id = 18, 3203 .max_cap = 768, 3204 .priority = 1, 3205 .fixed_size = true, 3206 .bonus_ways = 0xffffff, 3207 .cache_mode = 0, 3208 .activate_on_init = true, 3209 }, { 3210 .usecase_id = LLCC_DISP, 3211 .slice_id = 16, 3212 .max_cap = 6144, 3213 .priority = 1, 3214 .fixed_size = true, 3215 .bonus_ways = 0xffffff, 3216 .cache_mode = 2, 3217 }, { 3218 .usecase_id = LLCC_MDMPNG, 3219 .slice_id = 27, 3220 .max_cap = 1024, 3221 .priority = 0, 3222 .fixed_size = true, 3223 .bonus_ways = 0xf00000, 3224 .cache_mode = 0, 3225 }, { 3226 .usecase_id = LLCC_AUDHW, 3227 .slice_id = 22, 3228 .max_cap = 1024, 3229 .priority = 1, 3230 .fixed_size = true, 3231 .bonus_ways = 0xffffff, 3232 .cache_mode = 0, 3233 }, { 3234 .usecase_id = LLCC_CVP, 3235 .slice_id = 8, 3236 .max_cap = 256, 3237 .priority = 4, 3238 .fixed_size = true, 3239 .bonus_ways = 0xffffff, 3240 .cache_mode = 0, 3241 }, { 3242 .usecase_id = LLCC_MODPE, 3243 .slice_id = 29, 3244 .max_cap = 64, 3245 .priority = 1, 3246 .fixed_size = true, 3247 .bonus_ways = 0xf00000, 3248 .cache_mode = 0, 3249 .alloc_oneway_en = true, 3250 .vict_prio = true, 3251 }, { 3252 .usecase_id = LLCC_WRCACHE, 3253 .slice_id = 31, 3254 .max_cap = 512, 3255 .priority = 1, 3256 .fixed_size = true, 3257 .bonus_ways = 0xffffff, 3258 .cache_mode = 0, 3259 .activate_on_init = true, 3260 }, { 3261 .usecase_id = LLCC_CAMEXP0, 3262 .slice_id = 4, 3263 .max_cap = 256, 3264 .priority = 4, 3265 .fixed_size = true, 3266 .bonus_ways = 0xf, 3267 .cache_mode = 0, 3268 }, { 3269 .usecase_id = LLCC_CPUHWT, 3270 .slice_id = 5, 3271 .max_cap = 512, 3272 .priority = 1, 3273 .fixed_size = true, 3274 .bonus_ways = 0xffffff, 3275 .cache_mode = 0, 3276 .activate_on_init = true, 3277 }, { 3278 .usecase_id = LLCC_CAMEXP1, 3279 .slice_id = 7, 3280 .max_cap = 3200, 3281 .priority = 3, 3282 .fixed_size = true, 3283 .bonus_ways = 0xfffff0, 3284 .cache_mode = 2, 3285 }, { 3286 .usecase_id = LLCC_CMPTHCP, 3287 .slice_id = 17, 3288 .max_cap = 256, 3289 .priority = 4, 3290 .fixed_size = true, 3291 .bonus_ways = 0xffffff, 3292 .cache_mode = 0, 3293 }, { 3294 .usecase_id = LLCC_LCPDARE, 3295 .slice_id = 30, 3296 .max_cap = 128, 3297 .priority = 4, 3298 .fixed_size = true, 3299 .bonus_ways = 0xffffff, 3300 .cache_mode = 0, 3301 .activate_on_init = true, 3302 .alloc_oneway_en = true, 3303 .vict_prio = true, 3304 }, { 3305 .usecase_id = LLCC_AENPU, 3306 .slice_id = 3, 3307 .max_cap = 3072, 3308 .priority = 1, 3309 .fixed_size = true, 3310 .bonus_ways = 0xfe01ff, 3311 .cache_mode = 2, 3312 }, { 3313 .usecase_id = LLCC_ISLAND1, 3314 .slice_id = 12, 3315 .max_cap = 1792, 3316 .priority = 7, 3317 .fixed_size = true, 3318 .bonus_ways = 0xfe00, 3319 .cache_mode = 0, 3320 }, { 3321 .usecase_id = LLCC_ISLAND4, 3322 .slice_id = 15, 3323 .max_cap = 256, 3324 .priority = 7, 3325 .fixed_size = true, 3326 .bonus_ways = 0x10000, 3327 .cache_mode = 0, 3328 }, { 3329 .usecase_id = LLCC_CAMEXP2, 3330 .slice_id = 19, 3331 .max_cap = 3200, 3332 .priority = 3, 3333 .fixed_size = true, 3334 .bonus_ways = 0xfffff0, 3335 .cache_mode = 2, 3336 }, { 3337 .usecase_id = LLCC_CAMEXP3, 3338 .slice_id = 20, 3339 .max_cap = 3200, 3340 .priority = 2, 3341 .fixed_size = true, 3342 .bonus_ways = 0xfffff0, 3343 .cache_mode = 2, 3344 }, { 3345 .usecase_id = LLCC_CAMEXP4, 3346 .slice_id = 21, 3347 .max_cap = 3200, 3348 .priority = 2, 3349 .fixed_size = true, 3350 .bonus_ways = 0xfffff0, 3351 .cache_mode = 2, 3352 }, { 3353 .usecase_id = LLCC_DISP_WB, 3354 .slice_id = 23, 3355 .max_cap = 1024, 3356 .priority = 4, 3357 .fixed_size = true, 3358 .bonus_ways = 0xffffff, 3359 .cache_mode = 0, 3360 }, { 3361 .usecase_id = LLCC_DISP_1, 3362 .slice_id = 24, 3363 .max_cap = 6144, 3364 .priority = 1, 3365 .fixed_size = true, 3366 .bonus_ways = 0xffffff, 3367 .cache_mode = 2, 3368 }, { 3369 .usecase_id = LLCC_VIDVSP, 3370 .slice_id = 28, 3371 .max_cap = 256, 3372 .priority = 4, 3373 .fixed_size = true, 3374 .bonus_ways = 0xffffff, 3375 .cache_mode = 0, 3376 }, 3377 }; 3378 3379 static const struct llcc_slice_config sm8650_data[] = { 3380 { 3381 .usecase_id = LLCC_CPUSS, 3382 .slice_id = 1, 3383 .max_cap = 5120, 3384 .priority = 1, 3385 .bonus_ways = 0xffffff, 3386 .cache_mode = 0, 3387 .activate_on_init = true, 3388 .stale_en = true, 3389 }, { 3390 .usecase_id = LLCC_VIDSC0, 3391 .slice_id = 2, 3392 .max_cap = 512, 3393 .priority = 3, 3394 .fixed_size = true, 3395 .bonus_ways = 0xffffff, 3396 .cache_mode = 0, 3397 }, { 3398 .usecase_id = LLCC_AUDIO, 3399 .slice_id = 6, 3400 .max_cap = 512, 3401 .priority = 1, 3402 .fixed_size = true, 3403 .bonus_ways = 0xffffff, 3404 .cache_mode = 0, 3405 }, { 3406 .usecase_id = LLCC_MDMHPGRW, 3407 .slice_id = 25, 3408 .max_cap = 1024, 3409 .priority = 3, 3410 .bonus_ways = 0xffffff, 3411 .cache_mode = 0, 3412 }, { 3413 .usecase_id = LLCC_MODHW, 3414 .slice_id = 26, 3415 .max_cap = 1024, 3416 .priority = 1, 3417 .fixed_size = true, 3418 .bonus_ways = 0xffffff, 3419 .cache_mode = 0, 3420 }, { 3421 .usecase_id = LLCC_CMPT, 3422 .slice_id = 10, 3423 .max_cap = 4096, 3424 .priority = 1, 3425 .fixed_size = true, 3426 .bonus_ways = 0xffffff, 3427 .cache_mode = 0, 3428 }, { 3429 .usecase_id = LLCC_GPUHTW, 3430 .slice_id = 11, 3431 .max_cap = 512, 3432 .priority = 1, 3433 .fixed_size = true, 3434 .bonus_ways = 0xffffff, 3435 .cache_mode = 0, 3436 }, { 3437 .usecase_id = LLCC_GPU, 3438 .slice_id = 9, 3439 .max_cap = 3096, 3440 .priority = 1, 3441 .bonus_ways = 0xffffff, 3442 .cache_mode = 0, 3443 .write_scid_en = true, 3444 .write_scid_cacheable_en = true, 3445 }, { 3446 .usecase_id = LLCC_MMUHWT, 3447 .slice_id = 18, 3448 .max_cap = 768, 3449 .priority = 1, 3450 .fixed_size = true, 3451 .bonus_ways = 0xffffff, 3452 .cache_mode = 0, 3453 .activate_on_init = true, 3454 }, { 3455 .usecase_id = LLCC_DISP, 3456 .slice_id = 16, 3457 .max_cap = 6144, 3458 .priority = 1, 3459 .fixed_size = true, 3460 .bonus_ways = 0xffffff, 3461 .cache_mode = 2, 3462 }, { 3463 .usecase_id = LLCC_MDMHPFX, 3464 .slice_id = 24, 3465 .max_cap = 1024, 3466 .priority = 3, 3467 .fixed_size = true, 3468 .bonus_ways = 0xffffff, 3469 .cache_mode = 0, 3470 }, { 3471 .usecase_id = LLCC_MDMPNG, 3472 .slice_id = 27, 3473 .max_cap = 1024, 3474 .priority = 0, 3475 .fixed_size = true, 3476 .cache_mode = 0, 3477 }, { 3478 .usecase_id = LLCC_AUDHW, 3479 .slice_id = 22, 3480 .max_cap = 1024, 3481 .priority = 1, 3482 .fixed_size = true, 3483 .bonus_ways = 0xffffff, 3484 .cache_mode = 0, 3485 }, { 3486 .usecase_id = LLCC_CVP, 3487 .slice_id = 8, 3488 .max_cap = 256, 3489 .priority = 3, 3490 .fixed_size = true, 3491 .bonus_ways = 0xffffff, 3492 .cache_mode = 0, 3493 }, { 3494 .usecase_id = LLCC_MODPE, 3495 .slice_id = 29, 3496 .max_cap = 128, 3497 .priority = 1, 3498 .fixed_size = true, 3499 .bonus_ways = 0xf00000, 3500 .cache_mode = 0, 3501 .alloc_oneway_en = true, 3502 }, { 3503 .usecase_id = LLCC_WRCACHE, 3504 .slice_id = 31, 3505 .max_cap = 512, 3506 .priority = 1, 3507 .fixed_size = true, 3508 .bonus_ways = 0xffffff, 3509 .cache_mode = 0, 3510 .activate_on_init = true, 3511 }, { 3512 .usecase_id = LLCC_CAMEXP0, 3513 .slice_id = 4, 3514 .max_cap = 256, 3515 .priority = 3, 3516 .fixed_size = true, 3517 .bonus_ways = 0xf, 3518 .cache_mode = 0, 3519 }, { 3520 .usecase_id = LLCC_CAMEXP1, 3521 .slice_id = 7, 3522 .max_cap = 3200, 3523 .priority = 3, 3524 .fixed_size = true, 3525 .bonus_ways = 0xfffff0, 3526 .cache_mode = 2, 3527 }, { 3528 .usecase_id = LLCC_CMPTHCP, 3529 .slice_id = 17, 3530 .max_cap = 256, 3531 .priority = 3, 3532 .fixed_size = true, 3533 .bonus_ways = 0xffffff, 3534 .cache_mode = 0, 3535 }, { 3536 .usecase_id = LLCC_LCPDARE, 3537 .slice_id = 30, 3538 .max_cap = 128, 3539 .priority = 3, 3540 .fixed_size = true, 3541 .bonus_ways = 0xffffff, 3542 .cache_mode = 0, 3543 .activate_on_init = true, 3544 .alloc_oneway_en = true, 3545 }, { 3546 .usecase_id = LLCC_AENPU, 3547 .slice_id = 3, 3548 .max_cap = 3072, 3549 .priority = 1, 3550 .fixed_size = true, 3551 .bonus_ways = 0xffffff, 3552 .cache_mode = 2, 3553 }, { 3554 .usecase_id = LLCC_ISLAND1, 3555 .slice_id = 12, 3556 .max_cap = 5888, 3557 .priority = 7, 3558 .fixed_size = true, 3559 .res_ways = 0x7fffff, 3560 .cache_mode = 0, 3561 }, { 3562 .usecase_id = LLCC_DISP_WB, 3563 .slice_id = 23, 3564 .max_cap = 1024, 3565 .priority = 3, 3566 .fixed_size = true, 3567 .bonus_ways = 0xffffff, 3568 .cache_mode = 0, 3569 }, { 3570 .usecase_id = LLCC_VIDVSP, 3571 .slice_id = 28, 3572 .max_cap = 256, 3573 .priority = 3, 3574 .fixed_size = true, 3575 .bonus_ways = 0xffffff, 3576 .cache_mode = 0, 3577 }, 3578 }; 3579 3580 static const struct llcc_slice_config sm8750_data[] = { 3581 { 3582 .usecase_id = LLCC_CPUSS, 3583 .slice_id = 1, 3584 .max_cap = 5120, 3585 .priority = 1, 3586 .bonus_ways = 0xffffffff, 3587 .activate_on_init = true, 3588 .write_scid_en = true, 3589 }, { 3590 .usecase_id = LLCC_MDMHPFX, 3591 .slice_id = 24, 3592 .max_cap = 1024, 3593 .priority = 5, 3594 .fixed_size = true, 3595 .bonus_ways = 0xffffffff, 3596 }, { 3597 .usecase_id = LLCC_VIDSC0, 3598 .slice_id = 2, 3599 .max_cap = 512, 3600 .priority = 4, 3601 .fixed_size = true, 3602 .bonus_ways = 0xffffffff, 3603 }, { 3604 .usecase_id = LLCC_AUDIO, 3605 .slice_id = 35, 3606 .max_cap = 512, 3607 .priority = 1, 3608 .fixed_size = true, 3609 .bonus_ways = 0xffffffff, 3610 }, { 3611 .usecase_id = LLCC_MDMHPGRW, 3612 .slice_id = 25, 3613 .max_cap = 1024, 3614 .priority = 5, 3615 .bonus_ways = 0xffffffff, 3616 }, { 3617 .usecase_id = LLCC_MODHW, 3618 .slice_id = 26, 3619 .max_cap = 1024, 3620 .priority = 1, 3621 .fixed_size = true, 3622 .bonus_ways = 0xffffffff, 3623 }, { 3624 .usecase_id = LLCC_CMPT, 3625 .slice_id = 34, 3626 .max_cap = 4096, 3627 .priority = 1, 3628 .fixed_size = true, 3629 .bonus_ways = 0xffffffff, 3630 }, { 3631 .usecase_id = LLCC_GPUHTW, 3632 .slice_id = 11, 3633 .max_cap = 512, 3634 .priority = 1, 3635 .fixed_size = true, 3636 .bonus_ways = 0xffffffff, 3637 }, { 3638 .usecase_id = LLCC_GPU, 3639 .slice_id = 9, 3640 .max_cap = 5632, 3641 .priority = 1, 3642 .fixed_size = true, 3643 .bonus_ways = 0xffffffff, 3644 .write_scid_en = true, 3645 .write_scid_cacheable_en = true 3646 }, { 3647 .usecase_id = LLCC_MMUHWT, 3648 .slice_id = 18, 3649 .max_cap = 768, 3650 .priority = 1, 3651 .fixed_size = true, 3652 .bonus_ways = 0xffffffff, 3653 .activate_on_init = true, 3654 }, { 3655 .usecase_id = LLCC_DISP, 3656 .slice_id = 16, 3657 .max_cap = 7168, 3658 .priority = 1, 3659 .fixed_size = true, 3660 .bonus_ways = 0xffffffff, 3661 .cache_mode = 2, 3662 .stale_en = true, 3663 }, { 3664 .usecase_id = LLCC_VIDFW, 3665 .slice_id = 17, 3666 .priority = 4, 3667 .fixed_size = true, 3668 .bonus_ways = 0xffffffff, 3669 }, { 3670 .usecase_id = LLCC_CAMFW, 3671 .slice_id = 20, 3672 .priority = 4, 3673 .fixed_size = true, 3674 .bonus_ways = 0xffffffff, 3675 }, { 3676 .usecase_id = LLCC_MDMPNG, 3677 .slice_id = 27, 3678 .max_cap = 256, 3679 .priority = 5, 3680 .fixed_size = true, 3681 .bonus_ways = 0xf0000000, 3682 }, { 3683 .usecase_id = LLCC_AUDHW, 3684 .slice_id = 22, 3685 .max_cap = 512, 3686 .priority = 1, 3687 .fixed_size = true, 3688 .bonus_ways = 0xffffffff, 3689 }, { 3690 .usecase_id = LLCC_CVP, 3691 .slice_id = 8, 3692 .max_cap = 800, 3693 .priority = 5, 3694 .fixed_size = true, 3695 .bonus_ways = 0xffffffff, 3696 .vict_prio = true, 3697 }, { 3698 .usecase_id = LLCC_MODPE, 3699 .slice_id = 29, 3700 .max_cap = 256, 3701 .priority = 1, 3702 .fixed_size = true, 3703 .bonus_ways = 0xf0000000, 3704 .alloc_oneway_en = true, 3705 }, { 3706 .usecase_id = LLCC_WRCACHE, 3707 .slice_id = 31, 3708 .max_cap = 512, 3709 .priority = 1, 3710 .fixed_size = true, 3711 .bonus_ways = 0xffffffff, 3712 .activate_on_init = true, 3713 }, { 3714 .usecase_id = LLCC_CVPFW, 3715 .slice_id = 19, 3716 .max_cap = 64, 3717 .priority = 4, 3718 .fixed_size = true, 3719 .bonus_ways = 0xffffffff, 3720 }, { 3721 .usecase_id = LLCC_CMPTHCP, 3722 .slice_id = 15, 3723 .max_cap = 256, 3724 .priority = 4, 3725 .fixed_size = true, 3726 .bonus_ways = 0xffffffff, 3727 }, { 3728 .usecase_id = LLCC_LCPDARE, 3729 .slice_id = 30, 3730 .max_cap = 128, 3731 .priority = 5, 3732 .fixed_size = true, 3733 .bonus_ways = 0xffffffff, 3734 .activate_on_init = true, 3735 .alloc_oneway_en = true, 3736 }, { 3737 .usecase_id = LLCC_AENPU, 3738 .slice_id = 3, 3739 .max_cap = 3072, 3740 .priority = 1, 3741 .fixed_size = true, 3742 .bonus_ways = 0xffffffff, 3743 .cache_mode = 2, 3744 }, { 3745 .usecase_id = LLCC_ISLAND1, 3746 .slice_id = 12, 3747 .max_cap = 7936, 3748 .priority = 7, 3749 .fixed_size = true, 3750 .bonus_ways = 0x7fffffff, 3751 }, { 3752 .usecase_id = LLCC_DISP_WB, 3753 .slice_id = 23, 3754 .max_cap = 512, 3755 .priority = 4, 3756 .fixed_size = true, 3757 .bonus_ways = 0xffffffff, 3758 }, { 3759 .usecase_id = LLCC_VIDVSP, 3760 .slice_id = 4, 3761 .max_cap = 256, 3762 .priority = 4, 3763 .fixed_size = true, 3764 .bonus_ways = 0xffffffff, 3765 }, { 3766 .usecase_id = LLCC_VIDDEC, 3767 .slice_id = 5, 3768 .max_cap = 6144, 3769 .priority = 4, 3770 .fixed_size = true, 3771 .bonus_ways = 0xffffffff, 3772 .cache_mode = 2, 3773 .ovcap_prio = true, 3774 .parent_slice_id = 33, 3775 }, { 3776 .usecase_id = LLCC_CAMOFE, 3777 .slice_id = 33, 3778 .max_cap = 6144, 3779 .priority = 4, 3780 .fixed_size = true, 3781 .bonus_ways = 0xffffffff, 3782 .stale_en = true, 3783 .ovcap_prio = true, 3784 .parent_slice_id = 33, 3785 }, { 3786 .usecase_id = LLCC_CAMRTIP, 3787 .slice_id = 13, 3788 .max_cap = 1024, 3789 .priority = 4, 3790 .fixed_size = true, 3791 .bonus_ways = 0xffffffff, 3792 .stale_en = true, 3793 .ovcap_prio = true, 3794 .parent_slice_id = 33, 3795 }, { 3796 .usecase_id = LLCC_CAMSRTIP, 3797 .slice_id = 14, 3798 .max_cap = 6144, 3799 .priority = 4, 3800 .fixed_size = true, 3801 .bonus_ways = 0xffffffff, 3802 .stale_en = true, 3803 .ovcap_prio = true, 3804 .parent_slice_id = 33, 3805 }, { 3806 .usecase_id = LLCC_CAMRTRF, 3807 .slice_id = 7, 3808 .max_cap = 3584, 3809 .priority = 1, 3810 .fixed_size = true, 3811 .bonus_ways = 0xffffffff, 3812 .stale_en = true, 3813 .ovcap_prio = true, 3814 .parent_slice_id = 33, 3815 }, { 3816 .usecase_id = LLCC_CAMSRTRF, 3817 .slice_id = 21, 3818 .max_cap = 6144, 3819 .priority = 1, 3820 .fixed_size = true, 3821 .bonus_ways = 0xffffffff, 3822 .stale_en = true, 3823 .ovcap_prio = true, 3824 .parent_slice_id = 33, 3825 }, { 3826 .usecase_id = LLCC_CPUSSMPAM, 3827 .slice_id = 6, 3828 .max_cap = 2048, 3829 .priority = 1, 3830 .fixed_size = true, 3831 .bonus_ways = 0xffffffff, 3832 .activate_on_init = true, 3833 .write_scid_en = true, 3834 }, 3835 }; 3836 3837 static const struct llcc_slice_config qcs615_data[] = { 3838 { 3839 .usecase_id = LLCC_CPUSS, 3840 .slice_id = 1, 3841 .max_cap = 128, 3842 .priority = 1, 3843 .bonus_ways = 0xf, 3844 .cache_mode = 0, 3845 .activate_on_init = true, 3846 .write_scid_en = true, 3847 }, { 3848 .usecase_id = LLCC_MDM, 3849 .slice_id = 8, 3850 .max_cap = 256, 3851 .priority = 0, 3852 .fixed_size = true, 3853 .bonus_ways = 0xf, 3854 .cache_mode = 0, 3855 .activate_on_init = true, 3856 }, { 3857 .usecase_id = LLCC_GPUHTW, 3858 .slice_id = 11, 3859 .max_cap = 128, 3860 .priority = 1, 3861 .fixed_size = true, 3862 .bonus_ways = 0xf, 3863 .cache_mode = 0, 3864 .activate_on_init = true, 3865 }, { 3866 .usecase_id = LLCC_GPU, 3867 .slice_id = 12, 3868 .max_cap = 128, 3869 .priority = 1, 3870 .bonus_ways = 0xf, 3871 .cache_mode = 0, 3872 .activate_on_init = true, 3873 }, 3874 }; 3875 3876 static const struct llcc_slice_config qcs8300_data[] = { 3877 { 3878 .usecase_id = LLCC_GPUHTW, 3879 .slice_id = 11, 3880 .max_cap = 128, 3881 .priority = 1, 3882 .fixed_size = true, 3883 .bonus_ways = 0xf, 3884 .cache_mode = 0, 3885 .retain_on_pc = true, 3886 }, { 3887 .usecase_id = LLCC_GPU, 3888 .slice_id = 12, 3889 .max_cap = 512, 3890 .priority = 1, 3891 .fixed_size = true, 3892 .bonus_ways = 0xf, 3893 .cache_mode = 0, 3894 .retain_on_pc = true, 3895 .write_scid_en = true, 3896 }, { 3897 .usecase_id = LLCC_MMUHWT, 3898 .slice_id = 13, 3899 .max_cap = 128, 3900 .priority = 1, 3901 .fixed_size = true, 3902 .bonus_ways = 0xf, 3903 .cache_mode = 0, 3904 .activate_on_init = true, 3905 }, { 3906 .usecase_id = LLCC_ECC, 3907 .slice_id = 26, 3908 .max_cap = 256, 3909 .priority = 3, 3910 .fixed_size = true, 3911 .bonus_ways = 0xf, 3912 .cache_mode = 0, 3913 .activate_on_init = true, 3914 }, { 3915 .usecase_id = LLCC_WRCACHE, 3916 .slice_id = 31, 3917 .max_cap = 128, 3918 .priority = 1, 3919 .fixed_size = true, 3920 .bonus_ways = 0xf, 3921 .cache_mode = 0, 3922 .activate_on_init = true, 3923 }, 3924 }; 3925 3926 static const struct llcc_slice_config qdu1000_data_2ch[] = { 3927 { 3928 .usecase_id = LLCC_MDMHPGRW, 3929 .slice_id = 7, 3930 .max_cap = 512, 3931 .priority = 1, 3932 .fixed_size = true, 3933 .bonus_ways = 0xfff, 3934 .cache_mode = 0, 3935 .retain_on_pc = true, 3936 }, { 3937 .usecase_id = LLCC_MODHW, 3938 .slice_id = 9, 3939 .max_cap = 256, 3940 .priority = 1, 3941 .fixed_size = true, 3942 .bonus_ways = 0xfff, 3943 .cache_mode = 0, 3944 .retain_on_pc = true, 3945 }, { 3946 .usecase_id = LLCC_MDMPNG, 3947 .slice_id = 21, 3948 .max_cap = 256, 3949 .priority = 0, 3950 .fixed_size = true, 3951 .bonus_ways = 0x3, 3952 .cache_mode = 0, 3953 .retain_on_pc = true, 3954 }, { 3955 .usecase_id = LLCC_ECC, 3956 .slice_id = 26, 3957 .max_cap = 512, 3958 .priority = 3, 3959 .fixed_size = true, 3960 .bonus_ways = 0xffc, 3961 .cache_mode = 0, 3962 .activate_on_init = true, 3963 }, { 3964 .usecase_id = LLCC_MODPE, 3965 .slice_id = 29, 3966 .max_cap = 256, 3967 .priority = 1, 3968 .fixed_size = true, 3969 .bonus_ways = 0xfff, 3970 .cache_mode = 0, 3971 .retain_on_pc = true, 3972 }, { 3973 .usecase_id = LLCC_APTCM, 3974 .slice_id = 30, 3975 .max_cap = 256, 3976 .priority = 3, 3977 .fixed_size = true, 3978 .res_ways = 0xc, 3979 .cache_mode = 1, 3980 .retain_on_pc = true, 3981 }, { 3982 .usecase_id = LLCC_WRCACHE, 3983 .slice_id = 31, 3984 .max_cap = 128, 3985 .priority = 1, 3986 .fixed_size = true, 3987 .bonus_ways = 0x3, 3988 .cache_mode = 0, 3989 .activate_on_init = true, 3990 }, 3991 }; 3992 3993 static const struct llcc_slice_config qdu1000_data_4ch[] = { 3994 { 3995 .usecase_id = LLCC_MDMHPGRW, 3996 .slice_id = 7, 3997 .max_cap = 1024, 3998 .priority = 1, 3999 .fixed_size = true, 4000 .bonus_ways = 0xfff, 4001 .cache_mode = 0, 4002 .retain_on_pc = true, 4003 }, { 4004 .usecase_id = LLCC_MODHW, 4005 .slice_id = 9, 4006 .max_cap = 512, 4007 .priority = 1, 4008 .fixed_size = true, 4009 .bonus_ways = 0xfff, 4010 .cache_mode = 0, 4011 .retain_on_pc = true, 4012 }, { 4013 .usecase_id = LLCC_MDMPNG, 4014 .slice_id = 21, 4015 .max_cap = 512, 4016 .priority = 0, 4017 .fixed_size = true, 4018 .bonus_ways = 0x3, 4019 .cache_mode = 0, 4020 .retain_on_pc = true, 4021 }, { 4022 .usecase_id = LLCC_ECC, 4023 .slice_id = 26, 4024 .max_cap = 1024, 4025 .priority = 3, 4026 .fixed_size = true, 4027 .bonus_ways = 0xffc, 4028 .cache_mode = 0, 4029 .activate_on_init = true, 4030 }, { 4031 .usecase_id = LLCC_MODPE, 4032 .slice_id = 29, 4033 .max_cap = 512, 4034 .priority = 1, 4035 .fixed_size = true, 4036 .bonus_ways = 0xfff, 4037 .cache_mode = 0, 4038 .retain_on_pc = true, 4039 }, { 4040 .usecase_id = LLCC_APTCM, 4041 .slice_id = 30, 4042 .max_cap = 512, 4043 .priority = 3, 4044 .fixed_size = true, 4045 .res_ways = 0xc, 4046 .cache_mode = 1, 4047 .retain_on_pc = true, 4048 }, { 4049 .usecase_id = LLCC_WRCACHE, 4050 .slice_id = 31, 4051 .max_cap = 256, 4052 .priority = 1, 4053 .fixed_size = true, 4054 .bonus_ways = 0x3, 4055 .cache_mode = 0, 4056 .activate_on_init = true, 4057 }, 4058 }; 4059 4060 static const struct llcc_slice_config qdu1000_data_8ch[] = { 4061 { 4062 .usecase_id = LLCC_MDMHPGRW, 4063 .slice_id = 7, 4064 .max_cap = 2048, 4065 .priority = 1, 4066 .fixed_size = true, 4067 .bonus_ways = 0xfff, 4068 .cache_mode = 0, 4069 .retain_on_pc = true, 4070 }, { 4071 .usecase_id = LLCC_MODHW, 4072 .slice_id = 9, 4073 .max_cap = 1024, 4074 .priority = 1, 4075 .fixed_size = true, 4076 .bonus_ways = 0xfff, 4077 .cache_mode = 0, 4078 .retain_on_pc = true, 4079 }, { 4080 .usecase_id = LLCC_MDMPNG, 4081 .slice_id = 21, 4082 .max_cap = 1024, 4083 .priority = 0, 4084 .fixed_size = true, 4085 .bonus_ways = 0x3, 4086 .cache_mode = 0, 4087 .retain_on_pc = true, 4088 }, { 4089 .usecase_id = LLCC_ECC, 4090 .slice_id = 26, 4091 .max_cap = 2048, 4092 .priority = 3, 4093 .fixed_size = true, 4094 .bonus_ways = 0xffc, 4095 .cache_mode = 0, 4096 .activate_on_init = true, 4097 }, { 4098 .usecase_id = LLCC_MODPE, 4099 .slice_id = 29, 4100 .max_cap = 1024, 4101 .priority = 1, 4102 .fixed_size = true, 4103 .bonus_ways = 0xfff, 4104 .cache_mode = 0, 4105 .retain_on_pc = true, 4106 }, { 4107 .usecase_id = LLCC_APTCM, 4108 .slice_id = 30, 4109 .max_cap = 1024, 4110 .priority = 3, 4111 .fixed_size = true, 4112 .res_ways = 0xc, 4113 .cache_mode = 1, 4114 .retain_on_pc = true, 4115 }, { 4116 .usecase_id = LLCC_WRCACHE, 4117 .slice_id = 31, 4118 .max_cap = 512, 4119 .priority = 1, 4120 .fixed_size = true, 4121 .bonus_ways = 0x3, 4122 .cache_mode = 0, 4123 .activate_on_init = true, 4124 }, 4125 }; 4126 4127 static const struct llcc_slice_config x1e80100_data[] = { 4128 { 4129 .usecase_id = LLCC_CPUSS, 4130 .slice_id = 1, 4131 .max_cap = 6144, 4132 .priority = 1, 4133 .fixed_size = true, 4134 .bonus_ways = 0xfff, 4135 .cache_mode = 0, 4136 .activate_on_init = true, 4137 }, { 4138 .usecase_id = LLCC_VIDSC0, 4139 .slice_id = 2, 4140 .max_cap = 512, 4141 .priority = 4, 4142 .fixed_size = true, 4143 .bonus_ways = 0xfff, 4144 .cache_mode = 0, 4145 }, { 4146 .usecase_id = LLCC_AUDIO, 4147 .slice_id = 6, 4148 .max_cap = 1024, 4149 .priority = 1, 4150 .fixed_size = true, 4151 .bonus_ways = 0xfff, 4152 .cache_mode = 0, 4153 }, { 4154 .usecase_id = LLCC_CMPT, 4155 .slice_id = 10, 4156 .max_cap = 6144, 4157 .priority = 1, 4158 .fixed_size = true, 4159 .bonus_ways = 0xfff, 4160 .cache_mode = 0, 4161 }, { 4162 .usecase_id = LLCC_GPUHTW, 4163 .slice_id = 11, 4164 .max_cap = 512, 4165 .priority = 1, 4166 .fixed_size = true, 4167 .bonus_ways = 0xfff, 4168 .cache_mode = 0, 4169 }, { 4170 .usecase_id = LLCC_GPU, 4171 .slice_id = 9, 4172 .max_cap = 4608, 4173 .priority = 1, 4174 .bonus_ways = 0xfff, 4175 .cache_mode = 0, 4176 .write_scid_en = true, 4177 .write_scid_cacheable_en = true, 4178 .stale_en = true, 4179 }, { 4180 .usecase_id = LLCC_MMUHWT, 4181 .slice_id = 18, 4182 .max_cap = 512, 4183 .priority = 1, 4184 .fixed_size = true, 4185 .bonus_ways = 0xfff, 4186 .cache_mode = 0, 4187 .activate_on_init = true, 4188 }, { 4189 .usecase_id = LLCC_AUDHW, 4190 .slice_id = 22, 4191 .max_cap = 1024, 4192 .priority = 1, 4193 .fixed_size = true, 4194 .bonus_ways = 0xfff, 4195 .cache_mode = 0, 4196 }, { 4197 .usecase_id = LLCC_CVP, 4198 .slice_id = 8, 4199 .max_cap = 512, 4200 .priority = 4, 4201 .fixed_size = true, 4202 .bonus_ways = 0xfff, 4203 .cache_mode = 0, 4204 }, { 4205 .usecase_id = LLCC_WRCACHE, 4206 .slice_id = 31, 4207 .max_cap = 1024, 4208 .priority = 1, 4209 .fixed_size = true, 4210 .bonus_ways = 0xfff, 4211 .cache_mode = 0, 4212 .activate_on_init = true, 4213 }, { 4214 .usecase_id = LLCC_CAMEXP0, 4215 .slice_id = 4, 4216 .max_cap = 256, 4217 .priority = 4, 4218 .fixed_size = true, 4219 .bonus_ways = 0x3, 4220 .cache_mode = 0, 4221 }, { 4222 .usecase_id = LLCC_CAMEXP1, 4223 .slice_id = 7, 4224 .max_cap = 3072, 4225 .priority = 3, 4226 .fixed_size = true, 4227 .bonus_ways = 0xffc, 4228 .cache_mode = 2, 4229 }, { 4230 .usecase_id = LLCC_LCPDARE, 4231 .slice_id = 30, 4232 .max_cap = 512, 4233 .priority = 3, 4234 .fixed_size = true, 4235 .bonus_ways = 0xfff, 4236 .cache_mode = 0, 4237 .activate_on_init = true, 4238 .alloc_oneway_en = true, 4239 }, { 4240 .usecase_id = LLCC_AENPU, 4241 .slice_id = 3, 4242 .max_cap = 3072, 4243 .priority = 1, 4244 .fixed_size = true, 4245 .bonus_ways = 0xfff, 4246 .cache_mode = 2, 4247 }, { 4248 .usecase_id = LLCC_ISLAND1, 4249 .slice_id = 12, 4250 .max_cap = 2048, 4251 .priority = 7, 4252 .fixed_size = true, 4253 .res_ways = 0xf, 4254 .cache_mode = 0, 4255 }, { 4256 .usecase_id = LLCC_CAMEXP2, 4257 .slice_id = 19, 4258 .max_cap = 3072, 4259 .priority = 3, 4260 .fixed_size = true, 4261 .bonus_ways = 0xffc, 4262 .cache_mode = 2, 4263 }, { 4264 .usecase_id = LLCC_CAMEXP3, 4265 .slice_id = 20, 4266 .max_cap = 3072, 4267 .priority = 2, 4268 .fixed_size = true, 4269 .bonus_ways = 0xffc, 4270 .cache_mode = 2, 4271 }, { 4272 .usecase_id = LLCC_CAMEXP4, 4273 .slice_id = 21, 4274 .max_cap = 3072, 4275 .priority = 2, 4276 .fixed_size = true, 4277 .bonus_ways = 0xffc, 4278 .cache_mode = 2, 4279 }, 4280 }; 4281 4282 static const struct llcc_edac_reg_offset llcc_v1_edac_reg_offset = { 4283 .trp_ecc_error_status0 = 0x20344, 4284 .trp_ecc_error_status1 = 0x20348, 4285 .trp_ecc_sb_err_syn0 = 0x2034c, 4286 .trp_ecc_db_err_syn0 = 0x20370, 4287 .trp_ecc_error_cntr_clear = 0x20440, 4288 .trp_interrupt_0_status = 0x20480, 4289 .trp_interrupt_0_clear = 0x20484, 4290 .trp_interrupt_0_enable = 0x20488, 4291 4292 /* LLCC Common registers */ 4293 .cmn_status0 = 0x3000c, 4294 .cmn_interrupt_0_enable = 0x3001c, 4295 .cmn_interrupt_2_enable = 0x3003c, 4296 4297 /* LLCC DRP registers */ 4298 .drp_ecc_error_cfg = 0x40000, 4299 .drp_ecc_error_cntr_clear = 0x40004, 4300 .drp_interrupt_status = 0x41000, 4301 .drp_interrupt_clear = 0x41008, 4302 .drp_interrupt_enable = 0x4100c, 4303 .drp_ecc_error_status0 = 0x42044, 4304 .drp_ecc_error_status1 = 0x42048, 4305 .drp_ecc_sb_err_syn0 = 0x4204c, 4306 .drp_ecc_db_err_syn0 = 0x42070, 4307 }; 4308 4309 static const struct llcc_edac_reg_offset llcc_v2_1_edac_reg_offset = { 4310 .trp_ecc_error_status0 = 0x20344, 4311 .trp_ecc_error_status1 = 0x20348, 4312 .trp_ecc_sb_err_syn0 = 0x2034c, 4313 .trp_ecc_db_err_syn0 = 0x20370, 4314 .trp_ecc_error_cntr_clear = 0x20440, 4315 .trp_interrupt_0_status = 0x20480, 4316 .trp_interrupt_0_clear = 0x20484, 4317 .trp_interrupt_0_enable = 0x20488, 4318 4319 /* LLCC Common registers */ 4320 .cmn_status0 = 0x3400c, 4321 .cmn_interrupt_0_enable = 0x3401c, 4322 .cmn_interrupt_2_enable = 0x3403c, 4323 4324 /* LLCC DRP registers */ 4325 .drp_ecc_error_cfg = 0x50000, 4326 .drp_ecc_error_cntr_clear = 0x50004, 4327 .drp_interrupt_status = 0x50020, 4328 .drp_interrupt_clear = 0x50028, 4329 .drp_interrupt_enable = 0x5002c, 4330 .drp_ecc_error_status0 = 0x520f4, 4331 .drp_ecc_error_status1 = 0x520f8, 4332 .drp_ecc_sb_err_syn0 = 0x520fc, 4333 .drp_ecc_db_err_syn0 = 0x52120, 4334 }; 4335 4336 static const struct llcc_edac_reg_offset llcc_v6_edac_reg_offset = { 4337 .trp_ecc_error_status0 = 0x47448, 4338 .trp_ecc_error_status1 = 0x47450, 4339 .trp_ecc_sb_err_syn0 = 0x47490, 4340 .trp_ecc_db_err_syn0 = 0x474d0, 4341 .trp_ecc_error_cntr_clear = 0x47444, 4342 .trp_interrupt_0_status = 0x47600, 4343 .trp_interrupt_0_clear = 0x47604, 4344 .trp_interrupt_0_enable = 0x47608, 4345 4346 /* LLCC Common registers */ 4347 .cmn_status0 = 0x6400c, 4348 .cmn_interrupt_0_enable = 0x6401c, 4349 .cmn_interrupt_2_enable = 0x6403c, 4350 4351 /* LLCC DRP registers */ 4352 .drp_ecc_error_cfg = 0x80000, 4353 .drp_ecc_error_cntr_clear = 0x80004, 4354 .drp_interrupt_status = 0x80020, 4355 .drp_interrupt_clear = 0x80028, 4356 .drp_interrupt_enable = 0x8002c, 4357 .drp_ecc_error_status0 = 0x820f4, 4358 .drp_ecc_error_status1 = 0x820f8, 4359 .drp_ecc_sb_err_syn0 = 0x820fc, 4360 .drp_ecc_db_err_syn0 = 0x82120, 4361 }; 4362 4363 /* LLCC register offset starting from v1.0.0 */ 4364 static const u32 llcc_v1_reg_offset[] = { 4365 [LLCC_COMMON_HW_INFO] = 0x00030000, 4366 [LLCC_COMMON_STATUS0] = 0x0003000c, 4367 }; 4368 4369 /* LLCC register offset starting from v2.0.1 */ 4370 static const u32 llcc_v2_1_reg_offset[] = { 4371 [LLCC_COMMON_HW_INFO] = 0x00034000, 4372 [LLCC_COMMON_STATUS0] = 0x0003400c, 4373 }; 4374 4375 /* LLCC register offset starting from v6.0.0 */ 4376 static const u32 llcc_v6_reg_offset[] = { 4377 [LLCC_COMMON_HW_INFO] = 0x00064000, 4378 [LLCC_COMMON_STATUS0] = 0x0006400c, 4379 [LLCC_TRP_ATTR0_CFG] = 0x00041000, 4380 [LLCC_TRP_ATTR1_CFG] = 0x00041008, 4381 [LLCC_TRP_ATTR2_CFG] = 0x00041010, 4382 [LLCC_TRP_ATTR3_CFG] = 0x00041014, 4383 [LLCC_TRP_SID_DIS_CAP_ALLOC] = 0x00042000, 4384 [LLCC_TRP_ALGO_STALE_EN] = 0x00042008, 4385 [LLCC_TRP_ALGO_STALE_CAP_EN] = 0x00042010, 4386 [LLCC_TRP_ALGO_MRU0] = 0x00042018, 4387 [LLCC_TRP_ALGO_MRU1] = 0x00042020, 4388 [LLCC_TRP_ALGO_ALLOC0] = 0x00042028, 4389 [LLCC_TRP_ALGO_ALLOC1] = 0x00042030, 4390 [LLCC_TRP_ALGO_ALLOC2] = 0x00042038, 4391 [LLCC_TRP_ALGO_ALLOC3] = 0x00042040, 4392 [LLCC_TRP_WRS_EN] = 0x00042080, 4393 [LLCC_TRP_WRS_CACHEABLE_EN] = 0x00042088, 4394 }; 4395 4396 static const struct qcom_llcc_config hawi_sct_cfg[] = { 4397 { 4398 .sct_data = NULL, 4399 .size = 0, 4400 .reg_offset = llcc_v6_reg_offset, 4401 .edac_reg_offset = &llcc_v6_edac_reg_offset, 4402 }, 4403 }; 4404 4405 static const struct qcom_llcc_config eliza_cfg[] = { 4406 { 4407 .sct_data = eliza_data, 4408 .size = ARRAY_SIZE(eliza_data), 4409 .reg_offset = llcc_v6_reg_offset, 4410 .edac_reg_offset = &llcc_v6_edac_reg_offset, 4411 }, 4412 }; 4413 4414 static const struct qcom_llcc_config kaanapali_cfg[] = { 4415 { 4416 .sct_data = kaanapali_data, 4417 .size = ARRAY_SIZE(kaanapali_data), 4418 .reg_offset = llcc_v6_reg_offset, 4419 .edac_reg_offset = &llcc_v6_edac_reg_offset, 4420 }, 4421 }; 4422 4423 static const struct qcom_llcc_config glymur_cfg[] = { 4424 { 4425 .sct_data = glymur_data, 4426 .size = ARRAY_SIZE(glymur_data), 4427 .reg_offset = llcc_v6_reg_offset, 4428 .edac_reg_offset = &llcc_v2_1_edac_reg_offset, 4429 .no_edac = true, 4430 }, 4431 }; 4432 4433 static const struct qcom_llcc_config qcs615_cfg[] = { 4434 { 4435 .sct_data = qcs615_data, 4436 .size = ARRAY_SIZE(qcs615_data), 4437 .reg_offset = llcc_v1_reg_offset, 4438 .edac_reg_offset = &llcc_v1_edac_reg_offset, 4439 }, 4440 }; 4441 4442 static const struct qcom_llcc_config qcs8300_cfg[] = { 4443 { 4444 .sct_data = qcs8300_data, 4445 .size = ARRAY_SIZE(qcs8300_data), 4446 .reg_offset = llcc_v2_1_reg_offset, 4447 .edac_reg_offset = &llcc_v2_1_edac_reg_offset, 4448 .num_banks = 4, 4449 }, 4450 }; 4451 4452 static const struct qcom_llcc_config qdu1000_cfg[] = { 4453 { 4454 .sct_data = qdu1000_data_8ch, 4455 .size = ARRAY_SIZE(qdu1000_data_8ch), 4456 .reg_offset = llcc_v2_1_reg_offset, 4457 .edac_reg_offset = &llcc_v2_1_edac_reg_offset, 4458 }, 4459 { 4460 .sct_data = qdu1000_data_4ch, 4461 .size = ARRAY_SIZE(qdu1000_data_4ch), 4462 .reg_offset = llcc_v2_1_reg_offset, 4463 .edac_reg_offset = &llcc_v2_1_edac_reg_offset, 4464 }, 4465 { 4466 .sct_data = qdu1000_data_4ch, 4467 .size = ARRAY_SIZE(qdu1000_data_4ch), 4468 .reg_offset = llcc_v2_1_reg_offset, 4469 .edac_reg_offset = &llcc_v2_1_edac_reg_offset, 4470 }, 4471 { 4472 .sct_data = qdu1000_data_2ch, 4473 .size = ARRAY_SIZE(qdu1000_data_2ch), 4474 .reg_offset = llcc_v2_1_reg_offset, 4475 .edac_reg_offset = &llcc_v2_1_edac_reg_offset, 4476 }, 4477 }; 4478 4479 static const struct qcom_llcc_config ipq5424_cfg[] = { 4480 { 4481 .sct_data = ipq5424_data, 4482 .size = ARRAY_SIZE(ipq5424_data), 4483 .reg_offset = llcc_v2_1_reg_offset, 4484 .edac_reg_offset = &llcc_v2_1_edac_reg_offset, 4485 .no_broadcast_register = true, 4486 }, 4487 }; 4488 4489 static const struct qcom_llcc_config sa8775p_cfg[] = { 4490 { 4491 .sct_data = sa8775p_data, 4492 .size = ARRAY_SIZE(sa8775p_data), 4493 .reg_offset = llcc_v2_1_reg_offset, 4494 .edac_reg_offset = &llcc_v2_1_edac_reg_offset, 4495 }, 4496 }; 4497 4498 static const struct qcom_llcc_config sar1130p_cfg[] = { 4499 { 4500 .sct_data = sar1130p_data, 4501 .size = ARRAY_SIZE(sar1130p_data), 4502 .reg_offset = llcc_v2_1_reg_offset, 4503 .edac_reg_offset = &llcc_v2_1_edac_reg_offset, 4504 .max_cap_shift = 14, 4505 .num_banks = 2, 4506 }, 4507 }; 4508 4509 static const struct qcom_llcc_config sar2130p_cfg[] = { 4510 { 4511 .sct_data = sar2130p_data, 4512 .size = ARRAY_SIZE(sar2130p_data), 4513 .reg_offset = llcc_v2_1_reg_offset, 4514 .edac_reg_offset = &llcc_v2_1_edac_reg_offset, 4515 .max_cap_shift = 14, 4516 .num_banks = 2, 4517 }, 4518 }; 4519 4520 static const struct qcom_llcc_config sc7180_cfg[] = { 4521 { 4522 .sct_data = sc7180_data, 4523 .size = ARRAY_SIZE(sc7180_data), 4524 .reg_offset = llcc_v1_reg_offset, 4525 .edac_reg_offset = &llcc_v1_edac_reg_offset, 4526 }, 4527 }; 4528 4529 static const struct qcom_llcc_config sc7280_cfg[] = { 4530 { 4531 .sct_data = sc7280_data, 4532 .size = ARRAY_SIZE(sc7280_data), 4533 .reg_offset = llcc_v1_reg_offset, 4534 .edac_reg_offset = &llcc_v1_edac_reg_offset, 4535 }, 4536 }; 4537 4538 static const struct qcom_llcc_config sc8180x_cfg[] = { 4539 { 4540 .sct_data = sc8180x_data, 4541 .size = ARRAY_SIZE(sc8180x_data), 4542 .reg_offset = llcc_v1_reg_offset, 4543 .edac_reg_offset = &llcc_v1_edac_reg_offset, 4544 }, 4545 }; 4546 4547 static const struct qcom_llcc_config sc8280xp_cfg[] = { 4548 { 4549 .sct_data = sc8280xp_data, 4550 .size = ARRAY_SIZE(sc8280xp_data), 4551 .reg_offset = llcc_v1_reg_offset, 4552 .edac_reg_offset = &llcc_v1_edac_reg_offset, 4553 }, 4554 }; 4555 4556 static const struct qcom_llcc_config sdm670_cfg[] = { 4557 { 4558 .sct_data = sdm670_data, 4559 .size = ARRAY_SIZE(sdm670_data), 4560 .skip_llcc_cfg = true, 4561 .reg_offset = llcc_v1_reg_offset, 4562 .edac_reg_offset = &llcc_v1_edac_reg_offset, 4563 .no_edac = true, 4564 }, 4565 }; 4566 4567 static const struct qcom_llcc_config sdm845_cfg[] = { 4568 { 4569 .sct_data = sdm845_data, 4570 .size = ARRAY_SIZE(sdm845_data), 4571 .skip_llcc_cfg = true, 4572 .reg_offset = llcc_v1_reg_offset, 4573 .edac_reg_offset = &llcc_v1_edac_reg_offset, 4574 .no_edac = true, 4575 }, 4576 }; 4577 4578 static const struct qcom_llcc_config sm6350_cfg[] = { 4579 { 4580 .sct_data = sm6350_data, 4581 .size = ARRAY_SIZE(sm6350_data), 4582 .reg_offset = llcc_v1_reg_offset, 4583 .edac_reg_offset = &llcc_v1_edac_reg_offset, 4584 }, 4585 }; 4586 4587 static const struct qcom_llcc_config sm7150_cfg[] = { 4588 { 4589 .sct_data = sm7150_data, 4590 .size = ARRAY_SIZE(sm7150_data), 4591 .reg_offset = llcc_v1_reg_offset, 4592 .edac_reg_offset = &llcc_v1_edac_reg_offset, 4593 }, 4594 }; 4595 4596 static const struct qcom_llcc_config sm8150_cfg[] = { 4597 { 4598 .sct_data = sm8150_data, 4599 .size = ARRAY_SIZE(sm8150_data), 4600 .reg_offset = llcc_v1_reg_offset, 4601 .edac_reg_offset = &llcc_v1_edac_reg_offset, 4602 }, 4603 }; 4604 4605 static const struct qcom_llcc_config sm8250_cfg[] = { 4606 { 4607 .sct_data = sm8250_data, 4608 .size = ARRAY_SIZE(sm8250_data), 4609 .reg_offset = llcc_v1_reg_offset, 4610 .edac_reg_offset = &llcc_v1_edac_reg_offset, 4611 }, 4612 }; 4613 4614 static const struct qcom_llcc_config sm8350_cfg[] = { 4615 { 4616 .sct_data = sm8350_data, 4617 .size = ARRAY_SIZE(sm8350_data), 4618 .reg_offset = llcc_v1_reg_offset, 4619 .edac_reg_offset = &llcc_v1_edac_reg_offset, 4620 }, 4621 }; 4622 4623 static const struct qcom_llcc_config sm8450_cfg[] = { 4624 { 4625 .sct_data = sm8450_data, 4626 .size = ARRAY_SIZE(sm8450_data), 4627 .reg_offset = llcc_v2_1_reg_offset, 4628 .edac_reg_offset = &llcc_v2_1_edac_reg_offset, 4629 }, 4630 }; 4631 4632 static const struct qcom_llcc_config sm8550_cfg[] = { 4633 { 4634 .sct_data = sm8550_data, 4635 .size = ARRAY_SIZE(sm8550_data), 4636 .reg_offset = llcc_v2_1_reg_offset, 4637 .edac_reg_offset = &llcc_v2_1_edac_reg_offset, 4638 }, 4639 }; 4640 4641 static const struct qcom_llcc_config sm8650_cfg[] = { 4642 { 4643 .sct_data = sm8650_data, 4644 .size = ARRAY_SIZE(sm8650_data), 4645 .reg_offset = llcc_v2_1_reg_offset, 4646 .edac_reg_offset = &llcc_v2_1_edac_reg_offset, 4647 }, 4648 }; 4649 4650 static const struct qcom_llcc_config sm8750_cfg[] = { 4651 { 4652 .sct_data = sm8750_data, 4653 .size = ARRAY_SIZE(sm8750_data), 4654 .skip_llcc_cfg = false, 4655 .reg_offset = llcc_v6_reg_offset, 4656 .edac_reg_offset = &llcc_v6_edac_reg_offset, 4657 }, 4658 }; 4659 4660 static const struct qcom_llcc_config x1e80100_cfg[] = { 4661 { 4662 .sct_data = x1e80100_data, 4663 .size = ARRAY_SIZE(x1e80100_data), 4664 .reg_offset = llcc_v2_1_reg_offset, 4665 .edac_reg_offset = &llcc_v2_1_edac_reg_offset, 4666 .irq_configured = true, 4667 }, 4668 }; 4669 4670 static const struct qcom_sct_config hawi_sct_cfgs = { 4671 .llcc_config = hawi_sct_cfg, 4672 .num_config = ARRAY_SIZE(hawi_sct_cfg), 4673 }; 4674 4675 static const struct qcom_sct_config eliza_cfgs = { 4676 .llcc_config = eliza_cfg, 4677 .num_config = ARRAY_SIZE(eliza_cfg), 4678 }; 4679 4680 static const struct qcom_sct_config kaanapali_cfgs = { 4681 .llcc_config = kaanapali_cfg, 4682 .num_config = ARRAY_SIZE(kaanapali_cfg), 4683 }; 4684 4685 static const struct qcom_sct_config glymur_cfgs = { 4686 .llcc_config = glymur_cfg, 4687 .num_config = ARRAY_SIZE(glymur_cfg), 4688 }; 4689 4690 static const struct qcom_sct_config qcs615_cfgs = { 4691 .llcc_config = qcs615_cfg, 4692 .num_config = ARRAY_SIZE(qcs615_cfg), 4693 }; 4694 4695 static const struct qcom_sct_config qcs8300_cfgs = { 4696 .llcc_config = qcs8300_cfg, 4697 .num_config = ARRAY_SIZE(qcs8300_cfg), 4698 }; 4699 4700 static const struct qcom_sct_config qdu1000_cfgs = { 4701 .llcc_config = qdu1000_cfg, 4702 .num_config = ARRAY_SIZE(qdu1000_cfg), 4703 }; 4704 4705 static const struct qcom_sct_config ipq5424_cfgs = { 4706 .llcc_config = ipq5424_cfg, 4707 .num_config = ARRAY_SIZE(ipq5424_cfg), 4708 }; 4709 4710 static const struct qcom_sct_config sa8775p_cfgs = { 4711 .llcc_config = sa8775p_cfg, 4712 .num_config = ARRAY_SIZE(sa8775p_cfg), 4713 }; 4714 4715 static const struct qcom_sct_config sar1130p_cfgs = { 4716 .llcc_config = sar1130p_cfg, 4717 .num_config = ARRAY_SIZE(sar1130p_cfg), 4718 }; 4719 4720 static const struct qcom_sct_config sar2130p_cfgs = { 4721 .llcc_config = sar2130p_cfg, 4722 .num_config = ARRAY_SIZE(sar2130p_cfg), 4723 }; 4724 4725 static const struct qcom_sct_config sc7180_cfgs = { 4726 .llcc_config = sc7180_cfg, 4727 .num_config = ARRAY_SIZE(sc7180_cfg), 4728 }; 4729 4730 static const struct qcom_sct_config sc7280_cfgs = { 4731 .llcc_config = sc7280_cfg, 4732 .num_config = ARRAY_SIZE(sc7280_cfg), 4733 }; 4734 4735 static const struct qcom_sct_config sc8180x_cfgs = { 4736 .llcc_config = sc8180x_cfg, 4737 .num_config = ARRAY_SIZE(sc8180x_cfg), 4738 }; 4739 4740 static const struct qcom_sct_config sc8280xp_cfgs = { 4741 .llcc_config = sc8280xp_cfg, 4742 .num_config = ARRAY_SIZE(sc8280xp_cfg), 4743 }; 4744 4745 static const struct qcom_sct_config sdm670_cfgs = { 4746 .llcc_config = sdm670_cfg, 4747 .num_config = ARRAY_SIZE(sdm670_cfg), 4748 }; 4749 4750 static const struct qcom_sct_config sdm845_cfgs = { 4751 .llcc_config = sdm845_cfg, 4752 .num_config = ARRAY_SIZE(sdm845_cfg), 4753 }; 4754 4755 static const struct qcom_sct_config sm6350_cfgs = { 4756 .llcc_config = sm6350_cfg, 4757 .num_config = ARRAY_SIZE(sm6350_cfg), 4758 }; 4759 4760 static const struct qcom_sct_config sm7150_cfgs = { 4761 .llcc_config = sm7150_cfg, 4762 .num_config = ARRAY_SIZE(sm7150_cfg), 4763 }; 4764 4765 static const struct qcom_sct_config sm8150_cfgs = { 4766 .llcc_config = sm8150_cfg, 4767 .num_config = ARRAY_SIZE(sm8150_cfg), 4768 }; 4769 4770 static const struct qcom_sct_config sm8250_cfgs = { 4771 .llcc_config = sm8250_cfg, 4772 .num_config = ARRAY_SIZE(sm8250_cfg), 4773 }; 4774 4775 static const struct qcom_sct_config sm8350_cfgs = { 4776 .llcc_config = sm8350_cfg, 4777 .num_config = ARRAY_SIZE(sm8350_cfg), 4778 }; 4779 4780 static const struct qcom_sct_config sm8450_cfgs = { 4781 .llcc_config = sm8450_cfg, 4782 .num_config = ARRAY_SIZE(sm8450_cfg), 4783 }; 4784 4785 static const struct qcom_sct_config sm8550_cfgs = { 4786 .llcc_config = sm8550_cfg, 4787 .num_config = ARRAY_SIZE(sm8550_cfg), 4788 }; 4789 4790 static const struct qcom_sct_config sm8650_cfgs = { 4791 .llcc_config = sm8650_cfg, 4792 .num_config = ARRAY_SIZE(sm8650_cfg), 4793 }; 4794 4795 static const struct qcom_sct_config sm8750_cfgs = { 4796 .llcc_config = sm8750_cfg, 4797 .num_config = ARRAY_SIZE(sm8750_cfg), 4798 }; 4799 4800 static const struct qcom_sct_config x1e80100_cfgs = { 4801 .llcc_config = x1e80100_cfg, 4802 .num_config = ARRAY_SIZE(x1e80100_cfg), 4803 }; 4804 4805 static struct llcc_drv_data *drv_data = (void *) -EPROBE_DEFER; 4806 4807 /** 4808 * llcc_slice_getd - get LLCC slice descriptor 4809 * @uid: usecase_id for the client 4810 * 4811 * A pointer to LLCC slice descriptor will be returned on success 4812 * and error pointer is returned on failure 4813 */ 4814 struct llcc_slice_desc *llcc_slice_getd(u32 uid) 4815 { 4816 if (IS_ERR(drv_data)) 4817 return ERR_CAST(drv_data); 4818 4819 if (IS_ERR_OR_NULL(drv_data->desc)) 4820 return ERR_PTR(-ENODEV); 4821 4822 for (u32 i = 0; i < drv_data->cfg_size; i++) { 4823 if (uid == drv_data->desc[i].uid) 4824 return &drv_data->desc[i]; 4825 } 4826 4827 dev_err(drv_data->dev, "Failed to get slice desc for uid: %u\n", uid); 4828 4829 return ERR_PTR(-EINVAL); 4830 } 4831 EXPORT_SYMBOL_GPL(llcc_slice_getd); 4832 4833 /** 4834 * llcc_slice_putd - LLCC slice descriptor 4835 * @desc: Pointer to LLCC slice descriptor 4836 */ 4837 void llcc_slice_putd(struct llcc_slice_desc *desc) 4838 { 4839 if (!IS_ERR_OR_NULL(desc)) 4840 return; 4841 } 4842 EXPORT_SYMBOL_GPL(llcc_slice_putd); 4843 4844 static int llcc_update_act_ctrl(u32 sid, 4845 u32 act_ctrl_reg_val, u32 status) 4846 { 4847 struct regmap *regmap; 4848 u32 act_ctrl_reg; 4849 u32 act_clear_reg; 4850 u32 status_reg; 4851 u32 slice_status; 4852 int ret; 4853 4854 if (IS_ERR(drv_data)) 4855 return PTR_ERR(drv_data); 4856 4857 act_ctrl_reg = LLCC_TRP_ACT_CTRLn(sid); 4858 act_clear_reg = LLCC_TRP_ACT_CLEARn(sid); 4859 status_reg = LLCC_TRP_STATUSn(sid); 4860 4861 /* Set the ACTIVE trigger */ 4862 act_ctrl_reg_val |= ACT_CTRL_ACT_TRIG; 4863 ret = regmap_write(drv_data->bcast_regmap, act_ctrl_reg, 4864 act_ctrl_reg_val); 4865 if (ret) 4866 return ret; 4867 4868 /* Clear the ACTIVE trigger */ 4869 act_ctrl_reg_val &= ~ACT_CTRL_ACT_TRIG; 4870 ret = regmap_write(drv_data->bcast_regmap, act_ctrl_reg, 4871 act_ctrl_reg_val); 4872 if (ret) 4873 return ret; 4874 4875 if (drv_data->version >= LLCC_VERSION_4_1_0_0) { 4876 regmap = drv_data->bcast_and_regmap ?: drv_data->bcast_regmap; 4877 ret = regmap_read_poll_timeout(regmap, status_reg, 4878 slice_status, (slice_status & ACT_COMPLETE), 4879 0, LLCC_STATUS_READ_DELAY); 4880 if (ret) 4881 return ret; 4882 } 4883 4884 ret = regmap_read_poll_timeout(drv_data->bcast_regmap, status_reg, 4885 slice_status, !(slice_status & status), 4886 0, LLCC_STATUS_READ_DELAY); 4887 if (ret) 4888 return ret; 4889 4890 if (drv_data->version >= LLCC_VERSION_4_1_0_0) 4891 ret = regmap_write(drv_data->bcast_regmap, act_clear_reg, 4892 ACT_CLEAR); 4893 4894 return ret; 4895 } 4896 4897 /** 4898 * llcc_slice_activate - Activate the LLCC slice 4899 * @desc: Pointer to LLCC slice descriptor 4900 * 4901 * A value of zero will be returned on success and a negative errno will 4902 * be returned in error cases 4903 */ 4904 int llcc_slice_activate(struct llcc_slice_desc *desc) 4905 { 4906 int ret; 4907 u32 act_ctrl_val; 4908 4909 if (IS_ERR(drv_data)) 4910 return PTR_ERR(drv_data); 4911 4912 if (IS_ERR_OR_NULL(desc)) 4913 return -EINVAL; 4914 4915 guard(mutex)(&drv_data->lock); 4916 /* Already active; try to take another reference. */ 4917 if (refcount_inc_not_zero(&desc->refcount)) 4918 return 0; 4919 4920 act_ctrl_val = ACT_CTRL_OPCODE_ACTIVATE << ACT_CTRL_OPCODE_SHIFT; 4921 ret = llcc_update_act_ctrl(desc->slice_id, act_ctrl_val, 4922 DEACTIVATE); 4923 if (ret) 4924 return ret; 4925 4926 /* Set first reference */ 4927 refcount_set(&desc->refcount, 1); 4928 4929 return 0; 4930 } 4931 EXPORT_SYMBOL_GPL(llcc_slice_activate); 4932 4933 /** 4934 * llcc_slice_deactivate - Deactivate the LLCC slice 4935 * @desc: Pointer to LLCC slice descriptor 4936 * 4937 * A value of zero will be returned on success and a negative errno will 4938 * be returned in error cases 4939 */ 4940 int llcc_slice_deactivate(struct llcc_slice_desc *desc) 4941 { 4942 u32 act_ctrl_val; 4943 int ret; 4944 4945 if (IS_ERR(drv_data)) 4946 return PTR_ERR(drv_data); 4947 4948 if (IS_ERR_OR_NULL(desc)) 4949 return -EINVAL; 4950 4951 guard(mutex)(&drv_data->lock); 4952 /* refcount > 1, drop one ref and we’re done. */ 4953 if (refcount_dec_not_one(&desc->refcount)) 4954 return 0; 4955 4956 act_ctrl_val = ACT_CTRL_OPCODE_DEACTIVATE << ACT_CTRL_OPCODE_SHIFT; 4957 ret = llcc_update_act_ctrl(desc->slice_id, act_ctrl_val, 4958 ACTIVATE); 4959 if (ret) 4960 return ret; 4961 4962 /* Finalize: atomically transition 1 -> 0 */ 4963 WARN_ON_ONCE(!refcount_dec_if_one(&desc->refcount)); 4964 4965 return 0; 4966 } 4967 EXPORT_SYMBOL_GPL(llcc_slice_deactivate); 4968 4969 /** 4970 * llcc_get_slice_id - return the slice id 4971 * @desc: Pointer to LLCC slice descriptor 4972 */ 4973 int llcc_get_slice_id(struct llcc_slice_desc *desc) 4974 { 4975 if (IS_ERR_OR_NULL(desc)) 4976 return -EINVAL; 4977 4978 return desc->slice_id; 4979 } 4980 EXPORT_SYMBOL_GPL(llcc_get_slice_id); 4981 4982 /** 4983 * llcc_get_slice_size - return the slice id 4984 * @desc: Pointer to LLCC slice descriptor 4985 */ 4986 size_t llcc_get_slice_size(struct llcc_slice_desc *desc) 4987 { 4988 if (IS_ERR_OR_NULL(desc)) 4989 return 0; 4990 4991 return desc->slice_size; 4992 } 4993 EXPORT_SYMBOL_GPL(llcc_get_slice_size); 4994 4995 static int _qcom_llcc_cfg_program(const struct llcc_slice_config *config, 4996 const struct qcom_llcc_config *cfg) 4997 { 4998 int ret; 4999 u32 attr2_cfg; 5000 u32 attr1_cfg; 5001 u32 attr0_cfg; 5002 u32 attr2_val; 5003 u32 attr1_val; 5004 u32 attr0_val; 5005 u32 max_cap_cacheline; 5006 struct llcc_slice_desc *desc; 5007 5008 attr1_val = config->cache_mode; 5009 attr1_val |= config->probe_target_ways << ATTR1_PROBE_TARGET_WAYS_SHIFT; 5010 attr1_val |= config->fixed_size << ATTR1_FIXED_SIZE_SHIFT; 5011 attr1_val |= config->priority << ATTR1_PRIORITY_SHIFT; 5012 5013 max_cap_cacheline = MAX_CAP_TO_BYTES(config->max_cap); 5014 5015 /* 5016 * LLCC instances can vary for each target. 5017 * The SW writes to broadcast register which gets propagated 5018 * to each LLCC instance (llcc0,.. llccN). 5019 * Since the size of the memory is divided equally amongst the 5020 * LLCC instances, we need to configure the max cap accordingly. 5021 */ 5022 max_cap_cacheline = max_cap_cacheline / drv_data->num_banks; 5023 max_cap_cacheline >>= CACHE_LINE_SIZE_SHIFT; 5024 if (cfg->max_cap_shift) 5025 attr1_val |= max_cap_cacheline << cfg->max_cap_shift; 5026 else 5027 attr1_val |= max_cap_cacheline << ATTR1_MAX_CAP_SHIFT; 5028 5029 attr1_cfg = LLCC_TRP_ATTR1_CFGn(config->slice_id); 5030 5031 ret = regmap_write(drv_data->bcast_regmap, attr1_cfg, attr1_val); 5032 if (ret) 5033 return ret; 5034 5035 if (drv_data->version >= LLCC_VERSION_4_1_0_0) { 5036 attr2_cfg = LLCC_TRP_ATTR2_CFGn(config->slice_id); 5037 attr0_val = config->res_ways; 5038 attr2_val = config->bonus_ways; 5039 } else { 5040 attr0_val = config->res_ways & ATTR0_RES_WAYS_MASK; 5041 attr0_val |= config->bonus_ways << ATTR0_BONUS_WAYS_SHIFT; 5042 } 5043 5044 attr0_cfg = LLCC_TRP_ATTR0_CFGn(config->slice_id); 5045 5046 ret = regmap_write(drv_data->bcast_regmap, attr0_cfg, attr0_val); 5047 if (ret) 5048 return ret; 5049 5050 if (drv_data->version >= LLCC_VERSION_4_1_0_0) { 5051 ret = regmap_write(drv_data->bcast_regmap, attr2_cfg, attr2_val); 5052 if (ret) 5053 return ret; 5054 } 5055 5056 /* At least SDM845 disallows non-secure writes to these registers */ 5057 if (!cfg->skip_llcc_cfg) { 5058 u32 disable_cap_alloc, retain_pc; 5059 5060 disable_cap_alloc = config->dis_cap_alloc << config->slice_id; 5061 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_SCID_DIS_CAP_ALLOC, 5062 BIT(config->slice_id), disable_cap_alloc); 5063 if (ret) 5064 return ret; 5065 5066 if (drv_data->version < LLCC_VERSION_4_1_0_0) { 5067 retain_pc = config->retain_on_pc << config->slice_id; 5068 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_PCB_ACT, 5069 BIT(config->slice_id), retain_pc); 5070 if (ret) 5071 return ret; 5072 } 5073 } 5074 5075 if (drv_data->version >= LLCC_VERSION_2_0_0_0) { 5076 u32 wren; 5077 5078 wren = config->write_scid_en << config->slice_id; 5079 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_WRSC_EN, 5080 BIT(config->slice_id), wren); 5081 if (ret) 5082 return ret; 5083 } 5084 5085 if (drv_data->version >= LLCC_VERSION_2_1_0_0) { 5086 u32 wr_cache_en; 5087 5088 wr_cache_en = config->write_scid_cacheable_en << config->slice_id; 5089 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_WRSC_CACHEABLE_EN, 5090 BIT(config->slice_id), wr_cache_en); 5091 if (ret) 5092 return ret; 5093 } 5094 5095 if (drv_data->version >= LLCC_VERSION_4_1_0_0) { 5096 u32 stale_en; 5097 u32 stale_cap_en; 5098 u32 mru_uncap_en; 5099 u32 mru_rollover; 5100 u32 alloc_oneway_en; 5101 u32 ovcap_en; 5102 u32 ovcap_prio; 5103 u32 vict_prio; 5104 5105 stale_en = config->stale_en << config->slice_id; 5106 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG1, 5107 BIT(config->slice_id), stale_en); 5108 if (ret) 5109 return ret; 5110 5111 stale_cap_en = config->stale_cap_en << config->slice_id; 5112 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG2, 5113 BIT(config->slice_id), stale_cap_en); 5114 if (ret) 5115 return ret; 5116 5117 mru_uncap_en = config->mru_uncap_en << config->slice_id; 5118 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG3, 5119 BIT(config->slice_id), mru_uncap_en); 5120 if (ret) 5121 return ret; 5122 5123 mru_rollover = config->mru_rollover << config->slice_id; 5124 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG4, 5125 BIT(config->slice_id), mru_rollover); 5126 if (ret) 5127 return ret; 5128 5129 alloc_oneway_en = config->alloc_oneway_en << config->slice_id; 5130 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG5, 5131 BIT(config->slice_id), alloc_oneway_en); 5132 if (ret) 5133 return ret; 5134 5135 ovcap_en = config->ovcap_en << config->slice_id; 5136 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG6, 5137 BIT(config->slice_id), ovcap_en); 5138 if (ret) 5139 return ret; 5140 5141 ovcap_prio = config->ovcap_prio << config->slice_id; 5142 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG7, 5143 BIT(config->slice_id), ovcap_prio); 5144 if (ret) 5145 return ret; 5146 5147 vict_prio = config->vict_prio << config->slice_id; 5148 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG8, 5149 BIT(config->slice_id), vict_prio); 5150 if (ret) 5151 return ret; 5152 } 5153 5154 if (config->activate_on_init) { 5155 desc = llcc_slice_getd(config->usecase_id); 5156 if (IS_ERR(desc)) 5157 return PTR_ERR(desc); 5158 5159 ret = llcc_slice_activate(desc); 5160 } 5161 5162 return ret; 5163 } 5164 5165 static int _qcom_llcc_cfg_program_v6(const struct llcc_slice_config *config, 5166 const struct qcom_llcc_config *cfg) 5167 { 5168 u32 stale_en, stale_cap_en, mru_uncap_en, mru_rollover; 5169 u32 alloc_oneway_en, ovcap_en, ovcap_prio, vict_prio; 5170 u32 attr0_cfg, attr1_cfg, attr2_cfg, attr3_cfg; 5171 u32 attr0_val, attr1_val, attr2_val, attr3_val; 5172 u32 slice_offset, reg_offset; 5173 struct llcc_slice_desc *desc; 5174 u32 wren, wr_cache_en; 5175 int ret; 5176 5177 attr0_cfg = LLCC_V6_TRP_ATTR0_CFGn(config->slice_id); 5178 attr1_cfg = LLCC_V6_TRP_ATTR1_CFGn(config->slice_id); 5179 attr2_cfg = LLCC_V6_TRP_ATTR2_CFGn(config->slice_id); 5180 attr3_cfg = LLCC_V6_TRP_ATTR3_CFGn(config->slice_id); 5181 5182 attr0_val = config->res_ways; 5183 attr1_val = config->bonus_ways; 5184 attr2_val = config->cache_mode; 5185 attr2_val |= FIELD_PREP(ATTR2_PROBE_TARGET_WAYS_MASK, config->probe_target_ways); 5186 attr2_val |= FIELD_PREP(ATTR2_FIXED_SIZE_MASK, config->fixed_size); 5187 attr2_val |= FIELD_PREP(ATTR2_PRIORITY_MASK, config->priority); 5188 5189 if (config->parent_slice_id && config->fixed_size) { 5190 attr2_val |= FIELD_PREP(ATTR2_PARENT_SCID_MASK, config->parent_slice_id); 5191 attr2_val |= ATTR2_IN_A_GROUP_MASK; 5192 } 5193 5194 attr3_val = MAX_CAP_TO_BYTES(config->max_cap); 5195 attr3_val /= drv_data->num_banks; 5196 attr3_val >>= CACHE_LINE_SIZE_SHIFT; 5197 5198 ret = regmap_write(drv_data->bcast_regmap, attr0_cfg, attr0_val); 5199 if (ret) 5200 return ret; 5201 5202 ret = regmap_write(drv_data->bcast_regmap, attr1_cfg, attr1_val); 5203 if (ret) 5204 return ret; 5205 5206 ret = regmap_write(drv_data->bcast_regmap, attr2_cfg, attr2_val); 5207 if (ret) 5208 return ret; 5209 5210 ret = regmap_write(drv_data->bcast_regmap, attr3_cfg, attr3_val); 5211 if (ret) 5212 return ret; 5213 5214 slice_offset = config->slice_id % 32; 5215 reg_offset = (config->slice_id / 32) * 4; 5216 5217 wren = config->write_scid_en << slice_offset; 5218 ret = regmap_update_bits(drv_data->bcast_regmap, 5219 cfg->reg_offset[LLCC_TRP_WRS_EN] + reg_offset, 5220 BIT(slice_offset), wren); 5221 if (ret) 5222 return ret; 5223 5224 wr_cache_en = config->write_scid_cacheable_en << slice_offset; 5225 ret = regmap_update_bits(drv_data->bcast_regmap, 5226 cfg->reg_offset[LLCC_TRP_WRS_CACHEABLE_EN] + reg_offset, 5227 BIT(slice_offset), wr_cache_en); 5228 if (ret) 5229 return ret; 5230 5231 stale_en = config->stale_en << slice_offset; 5232 ret = regmap_update_bits(drv_data->bcast_regmap, 5233 cfg->reg_offset[LLCC_TRP_ALGO_STALE_EN] + reg_offset, 5234 BIT(slice_offset), stale_en); 5235 if (ret) 5236 return ret; 5237 5238 stale_cap_en = config->stale_cap_en << slice_offset; 5239 ret = regmap_update_bits(drv_data->bcast_regmap, 5240 cfg->reg_offset[LLCC_TRP_ALGO_STALE_CAP_EN] + reg_offset, 5241 BIT(slice_offset), stale_cap_en); 5242 if (ret) 5243 return ret; 5244 5245 mru_uncap_en = config->mru_uncap_en << slice_offset; 5246 ret = regmap_update_bits(drv_data->bcast_regmap, 5247 cfg->reg_offset[LLCC_TRP_ALGO_MRU0] + reg_offset, 5248 BIT(slice_offset), mru_uncap_en); 5249 if (ret) 5250 return ret; 5251 5252 mru_rollover = config->mru_rollover << slice_offset; 5253 ret = regmap_update_bits(drv_data->bcast_regmap, 5254 cfg->reg_offset[LLCC_TRP_ALGO_MRU1] + reg_offset, 5255 BIT(slice_offset), mru_rollover); 5256 if (ret) 5257 return ret; 5258 5259 alloc_oneway_en = config->alloc_oneway_en << slice_offset; 5260 ret = regmap_update_bits(drv_data->bcast_regmap, 5261 cfg->reg_offset[LLCC_TRP_ALGO_ALLOC0] + reg_offset, 5262 BIT(slice_offset), alloc_oneway_en); 5263 if (ret) 5264 return ret; 5265 5266 ovcap_en = config->ovcap_en << slice_offset; 5267 ret = regmap_update_bits(drv_data->bcast_regmap, 5268 cfg->reg_offset[LLCC_TRP_ALGO_ALLOC1] + reg_offset, 5269 BIT(slice_offset), ovcap_en); 5270 if (ret) 5271 return ret; 5272 5273 ovcap_prio = config->ovcap_prio << slice_offset; 5274 ret = regmap_update_bits(drv_data->bcast_regmap, 5275 cfg->reg_offset[LLCC_TRP_ALGO_ALLOC2] + reg_offset, 5276 BIT(slice_offset), ovcap_prio); 5277 if (ret) 5278 return ret; 5279 5280 vict_prio = config->vict_prio << slice_offset; 5281 ret = regmap_update_bits(drv_data->bcast_regmap, 5282 cfg->reg_offset[LLCC_TRP_ALGO_ALLOC3] + reg_offset, 5283 BIT(slice_offset), vict_prio); 5284 if (ret) 5285 return ret; 5286 5287 if (config->activate_on_init) { 5288 desc = llcc_slice_getd(config->usecase_id); 5289 if (PTR_ERR_OR_ZERO(desc)) 5290 return -EINVAL; 5291 5292 ret = llcc_slice_activate(desc); 5293 } 5294 5295 return ret; 5296 } 5297 5298 static int qcom_llcc_cfg_program(struct platform_device *pdev, 5299 const struct qcom_llcc_config *cfg) 5300 { 5301 int i; 5302 u32 sz; 5303 int ret = 0; 5304 const struct llcc_slice_config *llcc_table; 5305 5306 sz = drv_data->cfg_size; 5307 llcc_table = drv_data->cfg; 5308 5309 for (i = 0; i < sz; i++) { 5310 drv_data->desc[i].uid = llcc_table[i].usecase_id; 5311 drv_data->desc[i].slice_id = llcc_table[i].slice_id; 5312 drv_data->desc[i].slice_size = llcc_table[i].max_cap; 5313 } 5314 5315 if (drv_data->version >= LLCC_VERSION_6_0_0_0) { 5316 for (i = 0; i < sz; i++) { 5317 ret = _qcom_llcc_cfg_program_v6(&llcc_table[i], cfg); 5318 if (ret) 5319 return ret; 5320 } 5321 } else { 5322 for (i = 0; i < sz; i++) { 5323 ret = _qcom_llcc_cfg_program(&llcc_table[i], cfg); 5324 if (ret) 5325 return ret; 5326 } 5327 } 5328 5329 return ret; 5330 } 5331 5332 static int qcom_llcc_get_cfg_index(struct platform_device *pdev, u8 *cfg_index, int num_config) 5333 { 5334 int ret; 5335 5336 ret = nvmem_cell_read_u8(&pdev->dev, "multi-chan-ddr", cfg_index); 5337 if (ret == -ENOENT || ret == -EOPNOTSUPP) { 5338 if (num_config > 1) 5339 return -EINVAL; 5340 *cfg_index = 0; 5341 return 0; 5342 } 5343 5344 if (!ret && *cfg_index >= num_config) 5345 ret = -EINVAL; 5346 5347 return ret; 5348 } 5349 5350 static int qcom_llcc_verify_fw_config(struct device *dev, 5351 const struct slc_sct_mem *slc_mem) 5352 { 5353 u64 program_status; 5354 5355 program_status = le64_to_cpu(slc_mem->sct_status.program_status); 5356 5357 if (program_status == SLC_SCT_DONE) { 5358 u32 desc_count = le32_to_cpu(slc_mem->slice_descs_count); 5359 u32 scid_max = le32_to_cpu(slc_mem->scid_max); 5360 5361 if (desc_count > scid_max) { 5362 dev_err(dev, "Descriptor count above max limit (%u > %u)\n", 5363 desc_count, scid_max); 5364 return -EINVAL; 5365 } 5366 5367 u8 revision = slc_mem->sct_details.revision; 5368 char name_buf[SLC_SCT_NAME_LEN]; 5369 5370 memcpy(name_buf, slc_mem->sct_details.name, 5371 SLC_SCT_NAME_LEN - 1); 5372 name_buf[SLC_SCT_NAME_LEN - 1] = '\0'; 5373 5374 dev_dbg(dev, "SCT init: desc_count=%u, rev=%u, name=%s\n", 5375 desc_count, revision, name_buf); 5376 5377 return 0; 5378 } else if (program_status == SLC_SCT_FAIL) { 5379 u8 version = (u8)(le64_to_cpu(slc_mem->sct_status.version)); 5380 u64 code = le64_to_cpu(slc_mem->sct_status.error.code); 5381 u64 param = le64_to_cpu(slc_mem->sct_status.error.param); 5382 5383 if (version == SLC_SCT_MEM_LAYOUT_VERSION1) { 5384 dev_err(dev, "SCT init failed: code = %llu, param = %llu, version = 0x%x\n", 5385 code, param, version); 5386 } else { 5387 dev_err(dev, "Found unsupported version %u\n", version); 5388 } 5389 } else { 5390 dev_err(dev, "Unknown SCT Initialization error\n"); 5391 } 5392 5393 return -EINVAL; 5394 } 5395 5396 static int qcom_llcc_get_fw_config(struct platform_device *pdev) 5397 { 5398 const struct slc_sct_mem *slc_mem = NULL; 5399 const struct slc_sct_slice_desc *memslice; 5400 struct device *dev = &pdev->dev; 5401 u32 slice_properties; 5402 struct resource res; 5403 u32 i, sz; 5404 int ret; 5405 5406 ret = of_reserved_mem_region_to_resource(dev->of_node, 0, &res); 5407 if (ret) { 5408 dev_err(dev, "Unable to locate DT /reserved-memory resource\n"); 5409 return ret; 5410 } 5411 5412 slc_mem = devm_memremap(dev, res.start, resource_size(&res), MEMREMAP_WB); 5413 if (IS_ERR(slc_mem)) { 5414 dev_err(dev, "Failed to memremap SLC shared memory\n"); 5415 return PTR_ERR(slc_mem); 5416 } 5417 5418 ret = qcom_llcc_verify_fw_config(dev, slc_mem); 5419 if (ret) 5420 return ret; 5421 5422 sz = le32_to_cpu(slc_mem->slice_descs_count); 5423 5424 drv_data->desc = devm_kcalloc(dev, sz, sizeof(struct llcc_slice_desc), 5425 GFP_KERNEL); 5426 if (!drv_data->desc) 5427 return -ENOMEM; 5428 5429 for (i = 0; i < sz; i++) { 5430 memslice = &slc_mem->slice_descs[i]; 5431 drv_data->desc[i].slice_id = le16_to_cpu(memslice->slice_id); 5432 drv_data->desc[i].uid = le16_to_cpu(memslice->usecase_id); 5433 slice_properties = le32_to_cpu(memslice->slice_properties); 5434 /* Set refcount to 1 if FW already activated this descriptor */ 5435 if (FIELD_GET(SLC_SCT_SLICE_ACT_ON_BOOT, slice_properties)) 5436 refcount_set(&drv_data->desc[i].refcount, 1); 5437 } 5438 5439 drv_data->cfg = NULL; 5440 drv_data->cfg_size = sz; 5441 5442 return 0; 5443 } 5444 5445 static void qcom_llcc_remove(struct platform_device *pdev) 5446 { 5447 /* Set the global pointer to a error code to avoid referencing it */ 5448 drv_data = ERR_PTR(-ENODEV); 5449 } 5450 5451 static struct regmap *qcom_llcc_init_mmio(struct platform_device *pdev, u8 index, 5452 const char *name) 5453 { 5454 void __iomem *base; 5455 struct regmap_config llcc_regmap_config = { 5456 .reg_bits = 32, 5457 .reg_stride = 4, 5458 .val_bits = 32, 5459 }; 5460 5461 base = devm_platform_ioremap_resource(pdev, index); 5462 if (IS_ERR(base)) 5463 return ERR_CAST(base); 5464 5465 llcc_regmap_config.name = name; 5466 return devm_regmap_init_mmio(&pdev->dev, base, &llcc_regmap_config); 5467 } 5468 5469 static int qcom_llcc_probe(struct platform_device *pdev) 5470 { 5471 u32 num_banks; 5472 struct device *dev = &pdev->dev; 5473 int ret, i; 5474 struct platform_device *llcc_edac; 5475 const struct qcom_sct_config *cfgs; 5476 const struct qcom_llcc_config *cfg; 5477 u8 cfg_index; 5478 u32 version; 5479 struct regmap *regmap; 5480 5481 if (!IS_ERR(drv_data)) 5482 return -EBUSY; 5483 5484 drv_data = devm_kzalloc(dev, sizeof(*drv_data), GFP_KERNEL); 5485 if (!drv_data) { 5486 ret = -ENOMEM; 5487 goto err; 5488 } 5489 5490 /* Initialize the first LLCC bank regmap */ 5491 regmap = qcom_llcc_init_mmio(pdev, 0, "llcc0_base"); 5492 if (IS_ERR(regmap)) { 5493 ret = PTR_ERR(regmap); 5494 goto err; 5495 } 5496 5497 cfgs = of_device_get_match_data(&pdev->dev); 5498 if (!cfgs) { 5499 ret = -EINVAL; 5500 goto err; 5501 } 5502 ret = qcom_llcc_get_cfg_index(pdev, &cfg_index, cfgs->num_config); 5503 if (ret) 5504 goto err; 5505 cfg = &cfgs->llcc_config[cfg_index]; 5506 5507 if (cfg->num_banks) { 5508 num_banks = cfg->num_banks; 5509 } else { 5510 ret = regmap_read(regmap, cfg->reg_offset[LLCC_COMMON_STATUS0], &num_banks); 5511 if (ret) 5512 goto err; 5513 5514 num_banks &= LLCC_LB_CNT_MASK; 5515 num_banks >>= LLCC_LB_CNT_SHIFT; 5516 } 5517 5518 drv_data->num_banks = num_banks; 5519 5520 drv_data->regmaps = devm_kcalloc(dev, num_banks, sizeof(*drv_data->regmaps), GFP_KERNEL); 5521 if (!drv_data->regmaps) { 5522 ret = -ENOMEM; 5523 goto err; 5524 } 5525 5526 drv_data->regmaps[0] = regmap; 5527 5528 /* Initialize rest of LLCC bank regmaps */ 5529 for (i = 1; i < num_banks; i++) { 5530 char *base __free(kfree) = kasprintf(GFP_KERNEL, "llcc%d_base", i); 5531 5532 drv_data->regmaps[i] = qcom_llcc_init_mmio(pdev, i, base); 5533 if (IS_ERR(drv_data->regmaps[i])) { 5534 ret = PTR_ERR(drv_data->regmaps[i]); 5535 goto err; 5536 } 5537 } 5538 5539 drv_data->bcast_regmap = qcom_llcc_init_mmio(pdev, i, "llcc_broadcast_base"); 5540 if (IS_ERR(drv_data->bcast_regmap)) { 5541 if (cfg->no_broadcast_register) { 5542 drv_data->bcast_regmap = regmap; 5543 } else { 5544 ret = PTR_ERR(drv_data->bcast_regmap); 5545 goto err; 5546 } 5547 } 5548 5549 /* Extract version of the IP */ 5550 ret = regmap_read(drv_data->bcast_regmap, cfg->reg_offset[LLCC_COMMON_HW_INFO], 5551 &version); 5552 if (ret) 5553 goto err; 5554 5555 drv_data->version = version; 5556 5557 /* Applicable only when drv_data->version >= 4.1 */ 5558 if (drv_data->version >= LLCC_VERSION_4_1_0_0) { 5559 drv_data->bcast_and_regmap = qcom_llcc_init_mmio(pdev, i + 1, "llcc_broadcast_and_base"); 5560 if (IS_ERR(drv_data->bcast_and_regmap)) { 5561 ret = PTR_ERR(drv_data->bcast_and_regmap); 5562 if (ret == -EINVAL) 5563 drv_data->bcast_and_regmap = NULL; 5564 else 5565 goto err; 5566 } 5567 } 5568 5569 mutex_init(&drv_data->lock); 5570 if (!cfg->size) { 5571 ret = qcom_llcc_get_fw_config(pdev); 5572 if (ret) 5573 goto err; 5574 } else { 5575 drv_data->cfg = cfg->sct_data; 5576 drv_data->cfg_size = cfg->size; 5577 drv_data->desc = devm_kcalloc(dev, cfg->size, 5578 sizeof(struct llcc_slice_desc), GFP_KERNEL); 5579 5580 if (!drv_data->desc) { 5581 ret = -ENOMEM; 5582 goto err; 5583 } 5584 5585 ret = qcom_llcc_cfg_program(pdev, cfg); 5586 if (ret) 5587 goto err; 5588 } 5589 5590 drv_data->ecc_irq = platform_get_irq_optional(pdev, 0); 5591 drv_data->edac_reg_offset = cfg->edac_reg_offset; 5592 drv_data->ecc_irq_configured = cfg->irq_configured; 5593 drv_data->dev = dev; 5594 5595 /* 5596 * On some platforms, the access to EDAC registers will be locked by 5597 * the bootloader. So probing the EDAC driver will result in a crash. 5598 * Hence, disable the creation of EDAC platform device for the 5599 * problematic platforms. 5600 */ 5601 if (!cfg->no_edac) { 5602 llcc_edac = platform_device_register_data(&pdev->dev, 5603 "qcom_llcc_edac", -1, drv_data, 5604 sizeof(*drv_data)); 5605 if (IS_ERR(llcc_edac)) 5606 dev_err(dev, "Failed to register LLCC EDAC driver\n"); 5607 } 5608 5609 platform_set_drvdata(pdev, drv_data); 5610 5611 return 0; 5612 err: 5613 drv_data = ERR_PTR(-ENODEV); 5614 return ret; 5615 } 5616 5617 static const struct of_device_id qcom_llcc_of_match[] = { 5618 { .compatible = "qcom,eliza-llcc", .data = &eliza_cfgs }, 5619 { .compatible = "qcom,glymur-llcc", .data = &glymur_cfgs }, 5620 { .compatible = "qcom,hawi-llcc", .data = &hawi_sct_cfgs }, 5621 { .compatible = "qcom,ipq5424-llcc", .data = &ipq5424_cfgs}, 5622 { .compatible = "qcom,kaanapali-llcc", .data = &kaanapali_cfgs}, 5623 { .compatible = "qcom,qcs615-llcc", .data = &qcs615_cfgs}, 5624 { .compatible = "qcom,qcs8300-llcc", .data = &qcs8300_cfgs}, 5625 { .compatible = "qcom,qdu1000-llcc", .data = &qdu1000_cfgs}, 5626 { .compatible = "qcom,sa8775p-llcc", .data = &sa8775p_cfgs }, 5627 { .compatible = "qcom,sar1130p-llcc", .data = &sar1130p_cfgs }, 5628 { .compatible = "qcom,sar2130p-llcc", .data = &sar2130p_cfgs }, 5629 { .compatible = "qcom,sc7180-llcc", .data = &sc7180_cfgs }, 5630 { .compatible = "qcom,sc7280-llcc", .data = &sc7280_cfgs }, 5631 { .compatible = "qcom,sc8180x-llcc", .data = &sc8180x_cfgs }, 5632 { .compatible = "qcom,sc8280xp-llcc", .data = &sc8280xp_cfgs }, 5633 { .compatible = "qcom,sdm670-llcc", .data = &sdm670_cfgs }, 5634 { .compatible = "qcom,sdm845-llcc", .data = &sdm845_cfgs }, 5635 { .compatible = "qcom,sm6350-llcc", .data = &sm6350_cfgs }, 5636 { .compatible = "qcom,sm7150-llcc", .data = &sm7150_cfgs }, 5637 { .compatible = "qcom,sm8150-llcc", .data = &sm8150_cfgs }, 5638 { .compatible = "qcom,sm8250-llcc", .data = &sm8250_cfgs }, 5639 { .compatible = "qcom,sm8350-llcc", .data = &sm8350_cfgs }, 5640 { .compatible = "qcom,sm8450-llcc", .data = &sm8450_cfgs }, 5641 { .compatible = "qcom,sm8550-llcc", .data = &sm8550_cfgs }, 5642 { .compatible = "qcom,sm8650-llcc", .data = &sm8650_cfgs }, 5643 { .compatible = "qcom,sm8750-llcc", .data = &sm8750_cfgs }, 5644 { .compatible = "qcom,x1e80100-llcc", .data = &x1e80100_cfgs }, 5645 { } 5646 }; 5647 MODULE_DEVICE_TABLE(of, qcom_llcc_of_match); 5648 5649 static struct platform_driver qcom_llcc_driver = { 5650 .driver = { 5651 .name = "qcom-llcc", 5652 .of_match_table = qcom_llcc_of_match, 5653 }, 5654 .probe = qcom_llcc_probe, 5655 .remove = qcom_llcc_remove, 5656 }; 5657 module_platform_driver(qcom_llcc_driver); 5658 5659 MODULE_DESCRIPTION("Qualcomm Last Level Cache Controller"); 5660 MODULE_LICENSE("GPL v2"); 5661