1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved. 4 * 5 */ 6 7 #include <linux/bitfield.h> 8 #include <linux/bitmap.h> 9 #include <linux/bitops.h> 10 #include <linux/cleanup.h> 11 #include <linux/device.h> 12 #include <linux/io.h> 13 #include <linux/kernel.h> 14 #include <linux/module.h> 15 #include <linux/mutex.h> 16 #include <linux/nvmem-consumer.h> 17 #include <linux/of.h> 18 #include <linux/regmap.h> 19 #include <linux/sizes.h> 20 #include <linux/slab.h> 21 #include <linux/soc/qcom/llcc-qcom.h> 22 23 #define ACTIVATE BIT(0) 24 #define DEACTIVATE BIT(1) 25 #define ACT_CLEAR BIT(0) 26 #define ACT_COMPLETE BIT(4) 27 #define ACT_CTRL_OPCODE_ACTIVATE BIT(0) 28 #define ACT_CTRL_OPCODE_DEACTIVATE BIT(1) 29 #define ACT_CTRL_ACT_TRIG BIT(0) 30 #define ACT_CTRL_OPCODE_SHIFT 1 31 #define ATTR1_PROBE_TARGET_WAYS_SHIFT 2 32 #define ATTR1_FIXED_SIZE_SHIFT 3 33 #define ATTR1_PRIORITY_SHIFT 4 34 #define ATTR1_MAX_CAP_SHIFT 16 35 #define ATTR0_RES_WAYS_MASK GENMASK(15, 0) 36 #define ATTR0_BONUS_WAYS_MASK GENMASK(31, 16) 37 #define ATTR0_BONUS_WAYS_SHIFT 16 38 #define ATTR2_PROBE_TARGET_WAYS_MASK BIT(4) 39 #define ATTR2_FIXED_SIZE_MASK BIT(8) 40 #define ATTR2_PRIORITY_MASK GENMASK(14, 12) 41 #define ATTR2_PARENT_SCID_MASK GENMASK(21, 16) 42 #define ATTR2_IN_A_GROUP_MASK BIT(24) 43 #define LLCC_STATUS_READ_DELAY 100 44 45 #define CACHE_LINE_SIZE_SHIFT 6 46 47 #define LLCC_LB_CNT_MASK GENMASK(31, 28) 48 #define LLCC_LB_CNT_SHIFT 28 49 50 #define MAX_CAP_TO_BYTES(n) (n * SZ_1K) 51 #define LLCC_TRP_ACT_CTRLn(n) (n * SZ_4K) 52 #define LLCC_TRP_ACT_CLEARn(n) (8 + n * SZ_4K) 53 #define LLCC_TRP_STATUSn(n) (4 + n * SZ_4K) 54 #define LLCC_TRP_ATTR0_CFGn(n) (0x21000 + SZ_8 * n) 55 #define LLCC_TRP_ATTR1_CFGn(n) (0x21004 + SZ_8 * n) 56 #define LLCC_TRP_ATTR2_CFGn(n) (0x21100 + SZ_4 * n) 57 #define LLCC_V6_TRP_ATTR0_CFGn(n) (cfg->reg_offset[LLCC_TRP_ATTR0_CFG] + SZ_64 * (n)) 58 #define LLCC_V6_TRP_ATTR1_CFGn(n) (cfg->reg_offset[LLCC_TRP_ATTR1_CFG] + SZ_64 * (n)) 59 #define LLCC_V6_TRP_ATTR2_CFGn(n) (cfg->reg_offset[LLCC_TRP_ATTR2_CFG] + SZ_64 * (n)) 60 #define LLCC_V6_TRP_ATTR3_CFGn(n) (cfg->reg_offset[LLCC_TRP_ATTR3_CFG] + SZ_64 * (n)) 61 62 #define LLCC_TRP_SCID_DIS_CAP_ALLOC 0x21f00 63 #define LLCC_TRP_PCB_ACT 0x21f04 64 #define LLCC_TRP_ALGO_CFG1 0x21f0c 65 #define LLCC_TRP_ALGO_CFG2 0x21f10 66 #define LLCC_TRP_ALGO_CFG3 0x21f14 67 #define LLCC_TRP_ALGO_CFG4 0x21f18 68 #define LLCC_TRP_ALGO_CFG5 0x21f1c 69 #define LLCC_TRP_WRSC_EN 0x21f20 70 #define LLCC_TRP_ALGO_CFG6 0x21f24 71 #define LLCC_TRP_ALGO_CFG7 0x21f28 72 #define LLCC_TRP_WRSC_CACHEABLE_EN 0x21f2c 73 #define LLCC_TRP_ALGO_CFG8 0x21f30 74 75 #define LLCC_VERSION_2_0_0_0 0x02000000 76 #define LLCC_VERSION_2_1_0_0 0x02010000 77 #define LLCC_VERSION_4_1_0_0 0x04010000 78 #define LLCC_VERSION_6_0_0_0 0X06000000 79 80 /** 81 * struct llcc_slice_config - Data associated with the llcc slice 82 * @usecase_id: Unique id for the client's use case 83 * @slice_id: llcc slice id for each client 84 * @max_cap: The maximum capacity of the cache slice provided in KB 85 * @priority: Priority of the client used to select victim line for replacement 86 * @fixed_size: Boolean indicating if the slice has a fixed capacity 87 * @bonus_ways: Bonus ways are additional ways to be used for any slice, 88 * if client ends up using more than reserved cache ways. Bonus 89 * ways are allocated only if they are not reserved for some 90 * other client. 91 * @res_ways: Reserved ways for the cache slice, the reserved ways cannot 92 * be used by any other client than the one its assigned to. 93 * @cache_mode: Each slice operates as a cache, this controls the mode of the 94 * slice: normal or TCM(Tightly Coupled Memory) 95 * @probe_target_ways: Determines what ways to probe for access hit. When 96 * configured to 1 only bonus and reserved ways are probed. 97 * When configured to 0 all ways in llcc are probed. 98 * @dis_cap_alloc: Disable capacity based allocation for a client 99 * @retain_on_pc: If this bit is set and client has maintained active vote 100 * then the ways assigned to this client are not flushed on power 101 * collapse. 102 * @activate_on_init: Activate the slice immediately after it is programmed 103 * @write_scid_en: Bit enables write cache support for a given scid. 104 * @write_scid_cacheable_en: Enables write cache cacheable support for a 105 * given scid (not supported on v2 or older hardware). 106 * @stale_en: Bit enables stale. 107 * @stale_cap_en: Bit enables stale only if current scid is over-cap. 108 * @mru_uncap_en: Roll-over on reserved cache ways if current scid is 109 * under-cap. 110 * @mru_rollover: Roll-over on reserved cache ways. 111 * @alloc_oneway_en: Allways allocate one way on over-cap even if there's no 112 * same-scid lines for replacement. 113 * @ovcap_en: Once current scid is over-capacity, allocate other over-cap SCID. 114 * @ovcap_prio: Once current scid is over-capacity, allocate other low priority 115 * over-cap scid. Depends on corresponding bit being set in 116 * ovcap_en. 117 * @vict_prio: When current scid is under-capacity, allocate over other 118 * lower-than victim priority-line threshold scid. 119 * @parent_slice_id: For grouped slices, specifies the slice id of the parent. 120 */ 121 struct llcc_slice_config { 122 u32 usecase_id; 123 u32 slice_id; 124 u32 max_cap; 125 u32 priority; 126 bool fixed_size; 127 u32 bonus_ways; 128 u32 res_ways; 129 u32 cache_mode; 130 u32 probe_target_ways; 131 bool dis_cap_alloc; 132 bool retain_on_pc; 133 bool activate_on_init; 134 bool write_scid_en; 135 bool write_scid_cacheable_en; 136 bool stale_en; 137 bool stale_cap_en; 138 bool mru_uncap_en; 139 bool mru_rollover; 140 bool alloc_oneway_en; 141 bool ovcap_en; 142 bool ovcap_prio; 143 bool vict_prio; 144 u32 parent_slice_id; 145 }; 146 147 struct qcom_llcc_config { 148 const struct llcc_slice_config *sct_data; 149 const u32 *reg_offset; 150 const struct llcc_edac_reg_offset *edac_reg_offset; 151 u32 max_cap_shift; /* instead of ATTR1_MAX_CAP_SHIFT */ 152 u32 num_banks; 153 int size; 154 bool skip_llcc_cfg; 155 bool no_edac; 156 bool irq_configured; 157 bool no_broadcast_register; 158 }; 159 160 struct qcom_sct_config { 161 const struct qcom_llcc_config *llcc_config; 162 int num_config; 163 }; 164 165 enum llcc_reg_offset { 166 LLCC_COMMON_HW_INFO, 167 LLCC_COMMON_STATUS0, 168 LLCC_TRP_ATTR0_CFG, 169 LLCC_TRP_ATTR1_CFG, 170 LLCC_TRP_ATTR2_CFG, 171 LLCC_TRP_ATTR3_CFG, 172 LLCC_TRP_SID_DIS_CAP_ALLOC, 173 LLCC_TRP_ALGO_STALE_EN, 174 LLCC_TRP_ALGO_STALE_CAP_EN, 175 LLCC_TRP_ALGO_MRU0, 176 LLCC_TRP_ALGO_MRU1, 177 LLCC_TRP_ALGO_ALLOC0, 178 LLCC_TRP_ALGO_ALLOC1, 179 LLCC_TRP_ALGO_ALLOC2, 180 LLCC_TRP_ALGO_ALLOC3, 181 LLCC_TRP_WRS_EN, 182 LLCC_TRP_WRS_CACHEABLE_EN, 183 }; 184 185 static const struct llcc_slice_config glymur_data[] = { 186 { 187 .usecase_id = LLCC_CPUSS, 188 .slice_id = 1, 189 .max_cap = 7680, 190 .priority = 1, 191 .bonus_ways = 0xFFF, 192 .res_ways = 0x0, 193 .vict_prio = true, 194 .activate_on_init = true, 195 }, { 196 .usecase_id = LLCC_VIDSC0, 197 .slice_id = 2, 198 .max_cap = 512, 199 .priority = 3, 200 .fixed_size = true, 201 .bonus_ways = 0xFFF, 202 .res_ways = 0x0, 203 .vict_prio = true, 204 }, { 205 .usecase_id = LLCC_AUDIO, 206 .slice_id = 6, 207 .max_cap = 1024, 208 .priority = 1, 209 .fixed_size = true, 210 .bonus_ways = 0xFFF, 211 .res_ways = 0x0, 212 .vict_prio = true, 213 }, { 214 .usecase_id = LLCC_VIDSC1, 215 .slice_id = 4, 216 .max_cap = 512, 217 .priority = 3, 218 .fixed_size = true, 219 .bonus_ways = 0xFFF, 220 .res_ways = 0x0, 221 .vict_prio = true, 222 }, { 223 .usecase_id = LLCC_CMPT, 224 .slice_id = 10, 225 .max_cap = 7680, 226 .priority = 1, 227 .fixed_size = true, 228 .bonus_ways = 0xFFF, 229 .res_ways = 0x0, 230 .vict_prio = true, 231 }, { 232 .usecase_id = LLCC_GPUHTW, 233 .slice_id = 11, 234 .max_cap = 512, 235 .priority = 1, 236 .fixed_size = true, 237 .bonus_ways = 0xFFF, 238 .res_ways = 0x0, 239 .vict_prio = true, 240 }, { 241 .usecase_id = LLCC_GPU, 242 .slice_id = 9, 243 .max_cap = 7680, 244 .priority = 1, 245 .bonus_ways = 0xFFF, 246 .res_ways = 0x0, 247 .write_scid_en = true, 248 .write_scid_cacheable_en = true, 249 .stale_en = true, 250 .vict_prio = true, 251 }, { 252 .usecase_id = LLCC_MMUHWT, 253 .slice_id = 18, 254 .max_cap = 768, 255 .priority = 1, 256 .fixed_size = true, 257 .bonus_ways = 0xFFF, 258 .res_ways = 0x0, 259 .vict_prio = true, 260 .activate_on_init = true, 261 }, { 262 .usecase_id = LLCC_AUDHW, 263 .slice_id = 22, 264 .max_cap = 1024, 265 .priority = 1, 266 .fixed_size = true, 267 .bonus_ways = 0xFFF, 268 .res_ways = 0x0, 269 .vict_prio = true, 270 }, { 271 .usecase_id = LLCC_CVP, 272 .slice_id = 8, 273 .max_cap = 64, 274 .priority = 3, 275 .fixed_size = true, 276 .bonus_ways = 0xFFF, 277 .res_ways = 0x0, 278 .vict_prio = true, 279 }, { 280 .usecase_id = LLCC_WRCACHE, 281 .slice_id = 31, 282 .max_cap = 1536, 283 .priority = 1, 284 .fixed_size = true, 285 .bonus_ways = 0xFFF, 286 .res_ways = 0x0, 287 .vict_prio = true, 288 .activate_on_init = true, 289 }, { 290 .usecase_id = LLCC_CMPTHCP, 291 .slice_id = 17, 292 .max_cap = 256, 293 .priority = 3, 294 .fixed_size = true, 295 .bonus_ways = 0xFFF, 296 .res_ways = 0x0, 297 .vict_prio = true, 298 }, { 299 .usecase_id = LLCC_LCPDARE, 300 .slice_id = 30, 301 .max_cap = 768, 302 .priority = 3, 303 .fixed_size = true, 304 .bonus_ways = 0xFFF, 305 .res_ways = 0x0, 306 .alloc_oneway_en = true, 307 .vict_prio = true, 308 .activate_on_init = true, 309 }, { 310 .usecase_id = LLCC_AENPU, 311 .slice_id = 3, 312 .max_cap = 3072, 313 .priority = 1, 314 .fixed_size = true, 315 .bonus_ways = 0xFFF, 316 .res_ways = 0x0, 317 .cache_mode = 2, 318 .vict_prio = true, 319 }, { 320 .usecase_id = LLCC_ISLAND1, 321 .slice_id = 12, 322 .max_cap = 5632, 323 .priority = 7, 324 .fixed_size = true, 325 .bonus_ways = 0x0, 326 .res_ways = 0x7FF, 327 .vict_prio = true, 328 }, { 329 .usecase_id = LLCC_VIDVSP, 330 .slice_id = 28, 331 .max_cap = 256, 332 .priority = 3, 333 .fixed_size = true, 334 .bonus_ways = 0xFFF, 335 .res_ways = 0x0, 336 .vict_prio = true, 337 }, { 338 .usecase_id = LLCC_OOBM_NS, 339 .slice_id = 5, 340 .max_cap = 512, 341 .priority = 1, 342 .bonus_ways = 0xFFF, 343 .res_ways = 0x0, 344 .vict_prio = true, 345 }, { 346 .usecase_id = LLCC_CPUSS_OPP, 347 .slice_id = 32, 348 .max_cap = 0, 349 .fixed_size = true, 350 .bonus_ways = 0x0, 351 .res_ways = 0x0, 352 .vict_prio = true, 353 .activate_on_init = true, 354 }, { 355 .usecase_id = LLCC_PCIE_TCU, 356 .slice_id = 19, 357 .max_cap = 256, 358 .priority = 1, 359 .fixed_size = true, 360 .bonus_ways = 0xFFF, 361 .res_ways = 0x0, 362 .vict_prio = true, 363 .activate_on_init = true, 364 }, { 365 .usecase_id = LLCC_VIDSC_VSP1, 366 .slice_id = 29, 367 .max_cap = 256, 368 .priority = 3, 369 .fixed_size = true, 370 .bonus_ways = 0xFFF, 371 .res_ways = 0x0, 372 .vict_prio = true, 373 } 374 }; 375 376 static const struct llcc_slice_config ipq5424_data[] = { 377 { 378 .usecase_id = LLCC_CPUSS, 379 .slice_id = 1, 380 .max_cap = 768, 381 .priority = 1, 382 .bonus_ways = 0xFFFF, 383 .retain_on_pc = true, 384 .activate_on_init = true, 385 .write_scid_cacheable_en = true, 386 .stale_en = true, 387 .stale_cap_en = true, 388 .alloc_oneway_en = true, 389 .ovcap_en = true, 390 .ovcap_prio = true, 391 .vict_prio = true, 392 }, 393 { 394 .usecase_id = LLCC_VIDSC0, 395 .slice_id = 2, 396 .max_cap = 256, 397 .priority = 2, 398 .fixed_size = true, 399 .bonus_ways = 0xF000, 400 .retain_on_pc = true, 401 .activate_on_init = true, 402 .write_scid_cacheable_en = true, 403 .stale_en = true, 404 .stale_cap_en = true, 405 }, 406 }; 407 408 static const struct llcc_slice_config kaanapali_data[] = { 409 { 410 .usecase_id = LLCC_CPUSS, 411 .slice_id = 1, 412 .max_cap = 5120, 413 .priority = 1, 414 .bonus_ways = 0xffffffff, 415 .activate_on_init = true, 416 .write_scid_en = true, 417 .stale_en = true, 418 .mru_uncap_en = true, 419 .vict_prio = true, 420 }, { 421 .usecase_id = LLCC_VIDSC0, 422 .slice_id = 2, 423 .max_cap = 512, 424 .priority = 4, 425 .fixed_size = true, 426 .bonus_ways = 0xffffffff, 427 .mru_uncap_en = true, 428 .vict_prio = true, 429 }, { 430 .usecase_id = LLCC_AUDIO, 431 .slice_id = 35, 432 .max_cap = 512, 433 .priority = 1, 434 .fixed_size = true, 435 .bonus_ways = 0xffffffff, 436 .mru_uncap_en = true, 437 .vict_prio = true, 438 }, { 439 .usecase_id = LLCC_MDMHPGRW, 440 .slice_id = 25, 441 .max_cap = 1024, 442 .priority = 5, 443 .bonus_ways = 0xffffffff, 444 .mru_uncap_en = true, 445 .vict_prio = true, 446 }, { 447 .usecase_id = LLCC_CMPT, 448 .slice_id = 34, 449 .max_cap = 4096, 450 .priority = 1, 451 .fixed_size = true, 452 .bonus_ways = 0xffffffff, 453 .mru_uncap_en = true, 454 .vict_prio = true, 455 }, { 456 .usecase_id = LLCC_GPUHTW, 457 .slice_id = 11, 458 .max_cap = 512, 459 .priority = 1, 460 .fixed_size = true, 461 .bonus_ways = 0xffffffff, 462 .mru_uncap_en = true, 463 .vict_prio = true, 464 }, { 465 .usecase_id = LLCC_GPU, 466 .slice_id = 9, 467 .max_cap = 5632, 468 .priority = 1, 469 .fixed_size = true, 470 .bonus_ways = 0xffffffff, 471 .write_scid_cacheable_en = true, 472 .mru_uncap_en = true, 473 .vict_prio = true, 474 }, { 475 .usecase_id = LLCC_MMUHWT, 476 .slice_id = 18, 477 .max_cap = 768, 478 .priority = 1, 479 .fixed_size = true, 480 .bonus_ways = 0xffffffff, 481 .activate_on_init = true, 482 .mru_uncap_en = true, 483 .vict_prio = true, 484 }, { 485 .usecase_id = LLCC_DISP, 486 .slice_id = 16, 487 .max_cap = 7168, 488 .priority = 1, 489 .fixed_size = true, 490 .bonus_ways = 0xffffffff, 491 .cache_mode = 2, 492 .stale_en = true, 493 .mru_uncap_en = true, 494 .vict_prio = true, 495 }, { 496 .usecase_id = LLCC_MDMHPFX, 497 .slice_id = 24, 498 .max_cap = 1024, 499 .priority = 5, 500 .fixed_size = true, 501 .bonus_ways = 0xffffffff, 502 .mru_uncap_en = true, 503 .vict_prio = true, 504 }, { 505 .usecase_id = LLCC_MDMPNG, 506 .slice_id = 27, 507 .max_cap = 256, 508 .priority = 5, 509 .bonus_ways = 0xfffff, 510 .mru_uncap_en = true, 511 .vict_prio = true, 512 }, { 513 .usecase_id = LLCC_CVP, 514 .slice_id = 8, 515 .max_cap = 800, 516 .priority = 5, 517 .fixed_size = true, 518 .bonus_ways = 0xffffffff, 519 .mru_uncap_en = true, 520 .ovcap_en = true, 521 .vict_prio = true, 522 .parent_slice_id = 33, 523 }, { 524 .usecase_id = LLCC_MODPE, 525 .slice_id = 29, 526 .max_cap = 256, 527 .priority = 1, 528 .fixed_size = true, 529 .bonus_ways = 0xf0000000, 530 .mru_uncap_en = true, 531 .alloc_oneway_en = true, 532 .vict_prio = true, 533 }, { 534 .usecase_id = LLCC_WRCACHE, 535 .slice_id = 31, 536 .max_cap = 512, 537 .priority = 1, 538 .fixed_size = true, 539 .bonus_ways = 0xffffffff, 540 .activate_on_init = true, 541 .mru_uncap_en = true, 542 .vict_prio = true, 543 }, { 544 .usecase_id = LLCC_CVPFW, 545 .slice_id = 19, 546 .max_cap = 512, 547 .priority = 5, 548 .fixed_size = true, 549 .bonus_ways = 0xffffffff, 550 .mru_uncap_en = true, 551 .vict_prio = true, 552 .parent_slice_id = 33, 553 }, { 554 .usecase_id = LLCC_CPUMTE, 555 .slice_id = 7, 556 .max_cap = 256, 557 .priority = 1, 558 .fixed_size = true, 559 .bonus_ways = 0xffffffff, 560 .mru_uncap_en = true, 561 .vict_prio = true, 562 }, { 563 .usecase_id = LLCC_CMPTHCP, 564 .slice_id = 15, 565 .max_cap = 256, 566 .priority = 4, 567 .fixed_size = true, 568 .bonus_ways = 0xffffffff, 569 .mru_uncap_en = true, 570 .vict_prio = true, 571 }, { 572 .usecase_id = LLCC_LCPDARE, 573 .slice_id = 30, 574 .max_cap = 128, 575 .priority = 5, 576 .fixed_size = true, 577 .bonus_ways = 0xffffffff, 578 .activate_on_init = true, 579 .mru_uncap_en = true, 580 .alloc_oneway_en = true, 581 .vict_prio = true, 582 }, { 583 .usecase_id = LLCC_AENPU, 584 .slice_id = 3, 585 .max_cap = 3072, 586 .priority = 1, 587 .fixed_size = true, 588 .bonus_ways = 0xffffffff, 589 .cache_mode = 2, 590 .mru_uncap_en = true, 591 .vict_prio = true, 592 }, { 593 .usecase_id = LLCC_ISLAND1, 594 .slice_id = 12, 595 .max_cap = 7936, 596 .priority = 7, 597 .fixed_size = true, 598 .bonus_ways = 0x7fffffff, 599 .mru_uncap_en = true, 600 .vict_prio = true, 601 }, { 602 .usecase_id = LLCC_DISP_WB, 603 .slice_id = 23, 604 .max_cap = 512, 605 .priority = 4, 606 .fixed_size = true, 607 .bonus_ways = 0xffffffff, 608 .mru_uncap_en = true, 609 .vict_prio = true, 610 }, { 611 .usecase_id = LLCC_VIDVSP, 612 .slice_id = 4, 613 .max_cap = 256, 614 .priority = 4, 615 .fixed_size = true, 616 .bonus_ways = 0xffffffff, 617 .mru_uncap_en = true, 618 .vict_prio = true, 619 }, { 620 .usecase_id = LLCC_VIDDEC, 621 .slice_id = 5, 622 .max_cap = 512, 623 .priority = 4, 624 .fixed_size = true, 625 .bonus_ways = 0xffffffff, 626 .cache_mode = 2, 627 .mru_uncap_en = true, 628 .ovcap_en = true, 629 .vict_prio = true, 630 .parent_slice_id = 33, 631 }, { 632 .usecase_id = LLCC_CAMOFE, 633 .slice_id = 33, 634 .max_cap = 6144, 635 .priority = 4, 636 .fixed_size = true, 637 .bonus_ways = 0xffffffff, 638 .stale_en = true, 639 .mru_uncap_en = true, 640 .ovcap_en = true, 641 .vict_prio = true, 642 .parent_slice_id = 33, 643 }, { 644 .usecase_id = LLCC_CAMRTIP, 645 .slice_id = 13, 646 .max_cap = 6144, 647 .priority = 4, 648 .fixed_size = true, 649 .bonus_ways = 0xffffffff, 650 .stale_en = true, 651 .mru_uncap_en = true, 652 .ovcap_en = true, 653 .vict_prio = true, 654 .parent_slice_id = 33, 655 }, { 656 .usecase_id = LLCC_CAMRTRF, 657 .slice_id = 10, 658 .max_cap = 3584, 659 .priority = 3, 660 .fixed_size = true, 661 .bonus_ways = 0xffffffff, 662 .stale_en = true, 663 .mru_uncap_en = true, 664 .ovcap_en = true, 665 .vict_prio = true, 666 .parent_slice_id = 33, 667 }, { 668 .usecase_id = LLCC_CAMSRTRF, 669 .slice_id = 21, 670 .max_cap = 6144, 671 .priority = 1, 672 .fixed_size = true, 673 .bonus_ways = 0xffffffff, 674 .stale_en = true, 675 .mru_uncap_en = true, 676 .ovcap_en = true, 677 .vict_prio = true, 678 .parent_slice_id = 33, 679 }, { 680 .usecase_id = LLCC_VIDEO_APV, 681 .slice_id = 6, 682 .max_cap = 768, 683 .priority = 4, 684 .fixed_size = true, 685 .bonus_ways = 0xffffffff, 686 .mru_uncap_en = true, 687 .vict_prio = true, 688 }, { 689 .usecase_id = LLCC_COMPUTE1, 690 .slice_id = 22, 691 .max_cap = 4096, 692 .priority = 1, 693 .fixed_size = true, 694 .bonus_ways = 0xffffffff, 695 .mru_uncap_en = true, 696 .vict_prio = true, 697 }, { 698 .usecase_id = LLCC_CPUSS_OPP, 699 .slice_id = 32, 700 .max_cap = 0, 701 .priority = 0, 702 .fixed_size = true, 703 .bonus_ways = 0, 704 .activate_on_init = true, 705 .write_scid_en = true, 706 .mru_uncap_en = true, 707 .vict_prio = true, 708 }, { 709 .usecase_id = LLCC_CPUSSMPAM, 710 .slice_id = 17, 711 .max_cap = 2048, 712 .priority = 1, 713 .fixed_size = true, 714 .bonus_ways = 0xffffffff, 715 .activate_on_init = true, 716 .write_scid_en = true, 717 .stale_en = true, 718 .mru_uncap_en = true, 719 .vict_prio = true, 720 }, { 721 .usecase_id = LLCC_CAM_IPE_STROV, 722 .slice_id = 14, 723 .max_cap = 400, 724 .priority = 5, 725 .fixed_size = true, 726 .bonus_ways = 0xffffffff, 727 .mru_uncap_en = true, 728 .ovcap_en = true, 729 .vict_prio = true, 730 .parent_slice_id = 33, 731 }, { 732 .usecase_id = LLCC_CAM_OFE_STROV, 733 .slice_id = 20, 734 .max_cap = 400, 735 .priority = 5, 736 .fixed_size = true, 737 .bonus_ways = 0xffffffff, 738 .mru_uncap_en = true, 739 .ovcap_en = true, 740 .vict_prio = true, 741 .parent_slice_id = 33, 742 }, { 743 .usecase_id = LLCC_CPUSS_HEU, 744 .slice_id = 28, 745 .max_cap = 0, 746 .priority = 0, 747 .fixed_size = true, 748 .bonus_ways = 0, 749 .mru_uncap_en = true, 750 .ovcap_en = true, 751 .vict_prio = true, 752 }, { 753 .usecase_id = LLCC_MDM_PNG_FIXED, 754 .slice_id = 26, 755 .max_cap = 256, 756 .priority = 5, 757 .fixed_size = true, 758 .bonus_ways = 0xff000000, 759 .activate_on_init = true, 760 .write_scid_en = true, 761 .mru_uncap_en = true, 762 .vict_prio = true, 763 }, 764 }; 765 766 static const struct llcc_slice_config sa8775p_data[] = { 767 { 768 .usecase_id = LLCC_CPUSS, 769 .slice_id = 1, 770 .max_cap = 2048, 771 .priority = 1, 772 .bonus_ways = 0xff, 773 .cache_mode = 0, 774 .retain_on_pc = true, 775 .activate_on_init = true, 776 }, { 777 .usecase_id = LLCC_VIDSC0, 778 .slice_id = 2, 779 .max_cap = 512, 780 .priority = 3, 781 .fixed_size = true, 782 .bonus_ways = 0xff, 783 .cache_mode = 0, 784 .retain_on_pc = true, 785 }, { 786 .usecase_id = LLCC_CPUSS1, 787 .slice_id = 3, 788 .max_cap = 1024, 789 .priority = 1, 790 .fixed_size = true, 791 .bonus_ways = 0xff, 792 .cache_mode = 0, 793 .retain_on_pc = true, 794 }, { 795 .usecase_id = LLCC_CPUHWT, 796 .slice_id = 5, 797 .max_cap = 512, 798 .priority = 1, 799 .fixed_size = true, 800 .bonus_ways = 0xff, 801 .cache_mode = 0, 802 .retain_on_pc = true, 803 }, { 804 .usecase_id = LLCC_AUDIO, 805 .slice_id = 6, 806 .max_cap = 1024, 807 .priority = 1, 808 .fixed_size = true, 809 .bonus_ways = 0xff, 810 .cache_mode = 0, 811 }, { 812 .usecase_id = LLCC_CMPT, 813 .slice_id = 10, 814 .max_cap = 4096, 815 .priority = 1, 816 .fixed_size = true, 817 .bonus_ways = 0xff, 818 .cache_mode = 0, 819 .retain_on_pc = true, 820 }, { 821 .usecase_id = LLCC_GPUHTW, 822 .slice_id = 11, 823 .max_cap = 1024, 824 .priority = 1, 825 .fixed_size = true, 826 .bonus_ways = 0xff, 827 .cache_mode = 0, 828 .retain_on_pc = true, 829 }, { 830 .usecase_id = LLCC_GPU, 831 .slice_id = 12, 832 .max_cap = 1024, 833 .priority = 1, 834 .fixed_size = true, 835 .bonus_ways = 0xff, 836 .cache_mode = 0, 837 .retain_on_pc = true, 838 .write_scid_en = true, 839 }, { 840 .usecase_id = LLCC_MMUHWT, 841 .slice_id = 13, 842 .max_cap = 1024, 843 .priority = 1, 844 .fixed_size = true, 845 .bonus_ways = 0xff, 846 .cache_mode = 0, 847 .activate_on_init = true, 848 }, { 849 .usecase_id = LLCC_CMPTDMA, 850 .slice_id = 15, 851 .max_cap = 1024, 852 .priority = 1, 853 .fixed_size = true, 854 .bonus_ways = 0xff, 855 .cache_mode = 0, 856 .retain_on_pc = true, 857 }, { 858 .usecase_id = LLCC_DISP, 859 .slice_id = 16, 860 .max_cap = 4096, 861 .priority = 2, 862 .fixed_size = true, 863 .bonus_ways = 0xff, 864 .cache_mode = 0, 865 .retain_on_pc = true, 866 }, { 867 .usecase_id = LLCC_VIDFW, 868 .slice_id = 17, 869 .max_cap = 3072, 870 .priority = 1, 871 .bonus_ways = 0xff, 872 .cache_mode = 0, 873 .retain_on_pc = true, 874 }, { 875 .usecase_id = LLCC_AUDHW, 876 .slice_id = 22, 877 .max_cap = 1024, 878 .priority = 1, 879 .fixed_size = true, 880 .bonus_ways = 0xff, 881 .cache_mode = 0, 882 }, { 883 .usecase_id = LLCC_CVP, 884 .slice_id = 28, 885 .max_cap = 256, 886 .priority = 3, 887 .fixed_size = true, 888 .bonus_ways = 0xff, 889 .cache_mode = 0, 890 .retain_on_pc = true, 891 }, { 892 .usecase_id = LLCC_APTCM, 893 .slice_id = 30, 894 .max_cap = 1024, 895 .priority = 3, 896 .fixed_size = true, 897 .res_ways = 0xf0, 898 .cache_mode = 1, 899 .retain_on_pc = true, 900 }, { 901 .usecase_id = LLCC_WRCACHE, 902 .slice_id = 31, 903 .max_cap = 512, 904 .priority = 1, 905 .fixed_size = true, 906 .bonus_ways = 0xff, 907 .cache_mode = 0, 908 .activate_on_init = true, 909 }, 910 }; 911 912 static const struct llcc_slice_config sar1130p_data[] = { 913 { 914 .usecase_id = LLCC_CPUSS, 915 .slice_id = 1, 916 .max_cap = 4096, 917 .priority = 1, 918 .bonus_ways = 0x1fff, 919 .res_ways = 0x0, 920 .cache_mode = 0, 921 .retain_on_pc = true, 922 .activate_on_init = true, 923 }, { 924 .usecase_id = LLCC_VIDSC0, 925 .slice_id = 2, 926 .max_cap = 512, 927 .priority = 3, 928 .fixed_size = true, 929 .bonus_ways = 0x1fff, 930 .res_ways = 0x0, 931 .cache_mode = 0, 932 .retain_on_pc = true, 933 }, { 934 .usecase_id = LLCC_AUDIO, 935 .slice_id = 6, 936 .max_cap = 1024, 937 .priority = 3, 938 .fixed_size = true, 939 .bonus_ways = 0x1fff, 940 .res_ways = 0x0, 941 .cache_mode = 0, 942 .retain_on_pc = true, 943 }, { 944 .usecase_id = LLCC_CMPT, 945 .slice_id = 10, 946 .max_cap = 1024, 947 .priority = 1, 948 .fixed_size = true, 949 .bonus_ways = 0x1fff, 950 .res_ways = 0x0, 951 .cache_mode = 0, 952 .retain_on_pc = true, 953 }, { 954 .usecase_id = LLCC_GPUHTW, 955 .slice_id = 11, 956 .max_cap = 0, 957 .priority = 1, 958 .fixed_size = true, 959 .bonus_ways = 0x1fff, 960 .res_ways = 0x0, 961 .cache_mode = 0, 962 .retain_on_pc = true, 963 }, { 964 .usecase_id = LLCC_GPU, 965 .slice_id = 12, 966 .max_cap = 3072, 967 .priority = 3, 968 .fixed_size = true, 969 .bonus_ways = 0x1fff, 970 .res_ways = 0x0, 971 .cache_mode = 0, 972 .retain_on_pc = true, 973 .write_scid_en = true, 974 }, { 975 .usecase_id = LLCC_MMUHWT, 976 .slice_id = 13, 977 .max_cap = 512, 978 .priority = 1, 979 .fixed_size = true, 980 .bonus_ways = 0x1fff, 981 .res_ways = 0x0, 982 .cache_mode = 0, 983 }, { 984 .usecase_id = LLCC_DISP, 985 .slice_id = 16, 986 .max_cap = 12800, 987 .priority = 1, 988 .fixed_size = true, 989 .bonus_ways = 0x1fff, 990 .res_ways = 0x0, 991 .cache_mode = 0, 992 .retain_on_pc = true, 993 }, { 994 .usecase_id = LLCC_CVP, 995 .slice_id = 28, 996 .max_cap = 256, 997 .priority = 3, 998 .fixed_size = true, 999 .bonus_ways = 0x1fff, 1000 .res_ways = 0x0, 1001 .cache_mode = 0, 1002 .retain_on_pc = true, 1003 }, { 1004 .usecase_id = LLCC_APTCM, 1005 .slice_id = 26, 1006 .max_cap = 2048, 1007 .priority = 3, 1008 .fixed_size = true, 1009 .bonus_ways = 0x0, 1010 .res_ways = 0x3, 1011 .cache_mode = true, 1012 .dis_cap_alloc = true, 1013 .retain_on_pc = true, 1014 }, { 1015 .usecase_id = LLCC_WRCACHE, 1016 .slice_id = 31, 1017 .max_cap = 256, 1018 .priority = 1, 1019 .fixed_size = true, 1020 .bonus_ways = 0x1fff, 1021 .res_ways = 0x0, 1022 .cache_mode = 0, 1023 .activate_on_init = true, 1024 }, { 1025 .usecase_id = LLCC_AENPU, 1026 .slice_id = 30, 1027 .max_cap = 3072, 1028 .priority = 3, 1029 .fixed_size = true, 1030 .bonus_ways = 0x1fff, 1031 .res_ways = 0x0, 1032 .cache_mode = 0, 1033 .retain_on_pc = true, 1034 }, { 1035 .usecase_id = LLCC_DISP_LEFT, 1036 .slice_id = 17, 1037 .max_cap = 0, 1038 .priority = 1, 1039 .fixed_size = true, 1040 .bonus_ways = 0x0, 1041 .res_ways = 0x0, 1042 .cache_mode = 0, 1043 .retain_on_pc = true, 1044 }, { 1045 .usecase_id = LLCC_DISP_RIGHT, 1046 .slice_id = 18, 1047 .max_cap = 0, 1048 .priority = 1, 1049 .fixed_size = true, 1050 .bonus_ways = 0x0, 1051 .res_ways = 0x0, 1052 .cache_mode = 0, 1053 .retain_on_pc = true, 1054 }, { 1055 .usecase_id = LLCC_EVCS_LEFT, 1056 .slice_id = 22, 1057 .max_cap = 0, 1058 .priority = 1, 1059 .fixed_size = true, 1060 .bonus_ways = 0x0, 1061 .res_ways = 0x0, 1062 .cache_mode = 0, 1063 .retain_on_pc = true, 1064 }, { 1065 .usecase_id = LLCC_EVCS_RIGHT, 1066 .slice_id = 23, 1067 .max_cap = 0, 1068 .priority = 1, 1069 .fixed_size = true, 1070 .bonus_ways = 0x0, 1071 .res_ways = 0x0, 1072 .cache_mode = 0, 1073 .retain_on_pc = true, 1074 }, 1075 }; 1076 1077 static const struct llcc_slice_config sar2130p_data[] = { 1078 { 1079 .usecase_id = LLCC_CPUSS, 1080 .slice_id = 1, 1081 .max_cap = 6144, 1082 .priority = 1, 1083 .fixed_size = 0, 1084 .bonus_ways = 0x3fffffff, 1085 .res_ways = 0x0, 1086 .cache_mode = 0, 1087 .retain_on_pc = true, 1088 .activate_on_init = true, 1089 }, { 1090 .usecase_id = LLCC_VIDSC0, 1091 .slice_id = 2, 1092 .max_cap = 128, 1093 .priority = 2, 1094 .fixed_size = true, 1095 .bonus_ways = 0x3fffffff, 1096 .res_ways = 0x0, 1097 .cache_mode = 0, 1098 .retain_on_pc = true, 1099 }, { 1100 .usecase_id = LLCC_AUDIO, 1101 .slice_id = 6, 1102 .max_cap = 1024, 1103 .priority = 3, 1104 .fixed_size = true, 1105 .bonus_ways = 0x3fffffff, 1106 .res_ways = 0x0, 1107 .cache_mode = 0, 1108 .retain_on_pc = true, 1109 }, { 1110 .usecase_id = LLCC_CMPT, 1111 .slice_id = 10, 1112 .max_cap = 1024, 1113 .priority = 1, 1114 .fixed_size = true, 1115 .bonus_ways = 0x3fffffff, 1116 .res_ways = 0x0, 1117 .cache_mode = 0, 1118 .retain_on_pc = true, 1119 }, { 1120 .usecase_id = LLCC_GPUHTW, 1121 .slice_id = 11, 1122 .max_cap = 0, 1123 .priority = 1, 1124 .fixed_size = true, 1125 .bonus_ways = 0x3fffffff, 1126 .res_ways = 0x0, 1127 .cache_mode = 0, 1128 .retain_on_pc = true, 1129 }, { 1130 .usecase_id = LLCC_GPU, 1131 .slice_id = 12, 1132 .max_cap = 1536, 1133 .priority = 2, 1134 .fixed_size = true, 1135 .bonus_ways = 0x3fffffff, 1136 .res_ways = 0x0, 1137 .cache_mode = 0, 1138 .retain_on_pc = true, 1139 .write_scid_en = true, 1140 }, { 1141 .usecase_id = LLCC_MMUHWT, 1142 .slice_id = 13, 1143 .max_cap = 1024, 1144 .priority = 1, 1145 .fixed_size = true, 1146 .bonus_ways = 0x3fffffff, 1147 .res_ways = 0x0, 1148 .cache_mode = 0, 1149 .activate_on_init = true, 1150 }, { 1151 .usecase_id = LLCC_DISP, 1152 .slice_id = 16, 1153 .max_cap = 0, 1154 .priority = 1, 1155 .fixed_size = true, 1156 .bonus_ways = 0x3fffffff, 1157 .res_ways = 0x0, 1158 .cache_mode = 0, 1159 .retain_on_pc = true, 1160 }, { 1161 .usecase_id = LLCC_APTCM, 1162 .slice_id = 26, 1163 .max_cap = 2048, 1164 .priority = 3, 1165 .fixed_size = true, 1166 .bonus_ways = 0x0, 1167 .res_ways = 0x3, 1168 .cache_mode = true, 1169 .dis_cap_alloc = true, 1170 .retain_on_pc = true, 1171 }, { 1172 .usecase_id = LLCC_WRCACHE, 1173 .slice_id = 31, 1174 .max_cap = 256, 1175 .priority = 1, 1176 .fixed_size = true, 1177 .bonus_ways = 0x3fffffff, 1178 .res_ways = 0x0, 1179 .cache_mode = 0, 1180 .activate_on_init = true, 1181 }, { 1182 .usecase_id = LLCC_VIEYE, 1183 .slice_id = 7, 1184 .max_cap = 7168, 1185 .priority = 4, 1186 .fixed_size = true, 1187 .bonus_ways = 0x3fffffff, 1188 .res_ways = 0x0, 1189 .cache_mode = 0, 1190 .retain_on_pc = true, 1191 }, { 1192 .usecase_id = LLCC_VIDPTH, 1193 .slice_id = 8, 1194 .max_cap = 7168, 1195 .priority = 4, 1196 .fixed_size = true, 1197 .bonus_ways = 0x3fffffff, 1198 .res_ways = 0x0, 1199 .cache_mode = 0, 1200 .retain_on_pc = true, 1201 }, { 1202 .usecase_id = LLCC_GPUMV, 1203 .slice_id = 9, 1204 .max_cap = 2048, 1205 .priority = 2, 1206 .fixed_size = true, 1207 .bonus_ways = 0x3fffffff, 1208 .res_ways = 0x0, 1209 .cache_mode = 0, 1210 .retain_on_pc = true, 1211 }, { 1212 .usecase_id = LLCC_EVA_LEFT, 1213 .slice_id = 20, 1214 .max_cap = 7168, 1215 .priority = 5, 1216 .fixed_size = true, 1217 .bonus_ways = 0x3ffffffc, 1218 .res_ways = 0x0, 1219 .cache_mode = 0, 1220 .retain_on_pc = true, 1221 }, { 1222 .usecase_id = LLCC_EVA_RIGHT, 1223 .slice_id = 21, 1224 .max_cap = 7168, 1225 .priority = 5, 1226 .fixed_size = true, 1227 .bonus_ways = 0x3ffffffc, 1228 .res_ways = 0x0, 1229 .cache_mode = 0, 1230 .retain_on_pc = true, 1231 }, { 1232 .usecase_id = LLCC_EVAGAIN, 1233 .slice_id = 25, 1234 .max_cap = 1024, 1235 .priority = 2, 1236 .fixed_size = true, 1237 .bonus_ways = 0x3fffffff, 1238 .res_ways = 0x0, 1239 .cache_mode = 0, 1240 .retain_on_pc = true, 1241 }, { 1242 .usecase_id = LLCC_AENPU, 1243 .slice_id = 30, 1244 .max_cap = 3072, 1245 .priority = 3, 1246 .fixed_size = true, 1247 .bonus_ways = 0x3fffffff, 1248 .res_ways = 0x0, 1249 .cache_mode = 0, 1250 .retain_on_pc = true, 1251 }, { 1252 .usecase_id = LLCC_VIPTH, 1253 .slice_id = 29, 1254 .max_cap = 1024, 1255 .priority = 4, 1256 .fixed_size = true, 1257 .bonus_ways = 0x3fffffff, 1258 .res_ways = 0x0, 1259 .cache_mode = 0, 1260 .retain_on_pc = true, 1261 }, { 1262 .usecase_id = LLCC_DISP_LEFT, 1263 .slice_id = 17, 1264 .max_cap = 0, 1265 .priority = 1, 1266 .fixed_size = true, 1267 .bonus_ways = 0x0, 1268 .res_ways = 0x0, 1269 .cache_mode = 0, 1270 .retain_on_pc = true, 1271 }, { 1272 .usecase_id = LLCC_DISP_RIGHT, 1273 .slice_id = 18, 1274 .max_cap = 0, 1275 .priority = 1, 1276 .fixed_size = true, 1277 .bonus_ways = 0x0, 1278 .res_ways = 0x0, 1279 .cache_mode = 0, 1280 .retain_on_pc = true, 1281 }, { 1282 .usecase_id = LLCC_EVCS_LEFT, 1283 .slice_id = 22, 1284 .max_cap = 0, 1285 .priority = 1, 1286 .fixed_size = true, 1287 .bonus_ways = 0x0, 1288 .res_ways = 0x0, 1289 .cache_mode = 0, 1290 .retain_on_pc = true, 1291 }, { 1292 .usecase_id = LLCC_EVCS_RIGHT, 1293 .slice_id = 23, 1294 .max_cap = 0, 1295 .priority = 1, 1296 .fixed_size = true, 1297 .bonus_ways = 0x0, 1298 .res_ways = 0x0, 1299 .cache_mode = 0, 1300 .retain_on_pc = true, 1301 }, { 1302 .usecase_id = LLCC_SPAD, 1303 .slice_id = 24, 1304 .max_cap = 7168, 1305 .priority = 1, 1306 .fixed_size = true, 1307 .bonus_ways = 0x0, 1308 .res_ways = 0x0, 1309 .cache_mode = 0, 1310 .retain_on_pc = true, 1311 }, 1312 }; 1313 1314 static const struct llcc_slice_config sc7180_data[] = { 1315 { 1316 .usecase_id = LLCC_CPUSS, 1317 .slice_id = 1, 1318 .max_cap = 256, 1319 .priority = 1, 1320 .bonus_ways = 0xf, 1321 .cache_mode = 0, 1322 .retain_on_pc = true, 1323 .activate_on_init = true, 1324 }, { 1325 .usecase_id = LLCC_MDM, 1326 .slice_id = 8, 1327 .max_cap = 128, 1328 .priority = 1, 1329 .bonus_ways = 0xf, 1330 .cache_mode = 0, 1331 .retain_on_pc = true, 1332 }, { 1333 .usecase_id = LLCC_GPUHTW, 1334 .slice_id = 11, 1335 .max_cap = 128, 1336 .priority = 1, 1337 .bonus_ways = 0xf, 1338 .cache_mode = 0, 1339 .retain_on_pc = true, 1340 }, { 1341 .usecase_id = LLCC_GPU, 1342 .slice_id = 12, 1343 .max_cap = 128, 1344 .priority = 1, 1345 .bonus_ways = 0xf, 1346 .cache_mode = 0, 1347 .retain_on_pc = true, 1348 }, 1349 }; 1350 1351 static const struct llcc_slice_config sc7280_data[] = { 1352 { 1353 .usecase_id = LLCC_CPUSS, 1354 .slice_id = 1, 1355 .max_cap = 768, 1356 .priority = 1, 1357 .bonus_ways = 0x3f, 1358 .cache_mode = 0, 1359 .retain_on_pc = true, 1360 .activate_on_init = true, 1361 }, { 1362 .usecase_id = LLCC_MDMHPGRW, 1363 .slice_id = 7, 1364 .max_cap = 512, 1365 .priority = 2, 1366 .fixed_size = true, 1367 .bonus_ways = 0x3f, 1368 .cache_mode = 0, 1369 .retain_on_pc = true, 1370 }, { 1371 .usecase_id = LLCC_CMPT, 1372 .slice_id = 10, 1373 .max_cap = 768, 1374 .priority = 1, 1375 .fixed_size = true, 1376 .bonus_ways = 0x3f, 1377 .cache_mode = 0, 1378 .retain_on_pc = true, 1379 }, { 1380 .usecase_id = LLCC_GPUHTW, 1381 .slice_id = 11, 1382 .max_cap = 256, 1383 .priority = 1, 1384 .fixed_size = true, 1385 .bonus_ways = 0x3f, 1386 .cache_mode = 0, 1387 .retain_on_pc = true, 1388 }, { 1389 .usecase_id = LLCC_GPU, 1390 .slice_id = 12, 1391 .max_cap = 512, 1392 .priority = 1, 1393 .bonus_ways = 0x3f, 1394 .cache_mode = 0, 1395 .retain_on_pc = true, 1396 }, { 1397 .usecase_id = LLCC_MMUHWT, 1398 .slice_id = 13, 1399 .max_cap = 256, 1400 .priority = 1, 1401 .fixed_size = true, 1402 .bonus_ways = 0x3f, 1403 .cache_mode = 0, 1404 .activate_on_init = true, 1405 }, { 1406 .usecase_id = LLCC_MDMPNG, 1407 .slice_id = 21, 1408 .max_cap = 768, 1409 .priority = 0, 1410 .fixed_size = true, 1411 .bonus_ways = 0x3f, 1412 .cache_mode = 0, 1413 .retain_on_pc = true, 1414 }, { 1415 .usecase_id = LLCC_WLHW, 1416 .slice_id = 24, 1417 .max_cap = 256, 1418 .priority = 1, 1419 .fixed_size = true, 1420 .bonus_ways = 0x3f, 1421 .cache_mode = 0, 1422 .retain_on_pc = true, 1423 }, { 1424 .usecase_id = LLCC_MODPE, 1425 .slice_id = 29, 1426 .max_cap = 64, 1427 .priority = 1, 1428 .fixed_size = true, 1429 .bonus_ways = 0x3f, 1430 .cache_mode = 0, 1431 .retain_on_pc = true, 1432 }, 1433 }; 1434 1435 static const struct llcc_slice_config sc8180x_data[] = { 1436 { 1437 .usecase_id = LLCC_CPUSS, 1438 .slice_id = 1, 1439 .max_cap = 6144, 1440 .priority = 1, 1441 .fixed_size = true, 1442 .bonus_ways = 0xfff, 1443 .cache_mode = 0, 1444 .retain_on_pc = true, 1445 .activate_on_init = true, 1446 }, { 1447 .usecase_id = LLCC_VIDSC0, 1448 .slice_id = 2, 1449 .max_cap = 512, 1450 .priority = 2, 1451 .fixed_size = true, 1452 .bonus_ways = 0xfff, 1453 .cache_mode = 0, 1454 .retain_on_pc = true, 1455 }, { 1456 .usecase_id = LLCC_VIDSC1, 1457 .slice_id = 3, 1458 .max_cap = 512, 1459 .priority = 2, 1460 .fixed_size = true, 1461 .bonus_ways = 0xfff, 1462 .cache_mode = 0, 1463 .retain_on_pc = true, 1464 }, { 1465 .usecase_id = LLCC_AUDIO, 1466 .slice_id = 6, 1467 .max_cap = 1024, 1468 .priority = 1, 1469 .fixed_size = true, 1470 .bonus_ways = 0xfff, 1471 .cache_mode = 0, 1472 .retain_on_pc = true, 1473 }, { 1474 .usecase_id = LLCC_MDMHPGRW, 1475 .slice_id = 7, 1476 .max_cap = 3072, 1477 .priority = 1, 1478 .fixed_size = true, 1479 .bonus_ways = 0x3ff, 1480 .res_ways = 0xc00, 1481 .cache_mode = 0, 1482 .retain_on_pc = true, 1483 }, { 1484 .usecase_id = LLCC_MDM, 1485 .slice_id = 8, 1486 .max_cap = 3072, 1487 .priority = 1, 1488 .fixed_size = true, 1489 .bonus_ways = 0xfff, 1490 .cache_mode = 0, 1491 .retain_on_pc = true, 1492 }, { 1493 .usecase_id = LLCC_MODHW, 1494 .slice_id = 9, 1495 .max_cap = 1024, 1496 .priority = 1, 1497 .fixed_size = true, 1498 .bonus_ways = 0xfff, 1499 .cache_mode = 0, 1500 .retain_on_pc = true, 1501 }, { 1502 .usecase_id = LLCC_CMPT, 1503 .slice_id = 10, 1504 .max_cap = 6144, 1505 .priority = 1, 1506 .fixed_size = true, 1507 .bonus_ways = 0xfff, 1508 .cache_mode = 0, 1509 .retain_on_pc = true, 1510 }, { 1511 .usecase_id = LLCC_GPUHTW, 1512 .slice_id = 11, 1513 .max_cap = 1024, 1514 .priority = 1, 1515 .fixed_size = true, 1516 .bonus_ways = 0xfff, 1517 .cache_mode = 0, 1518 .retain_on_pc = true, 1519 }, { 1520 .usecase_id = LLCC_GPU, 1521 .slice_id = 12, 1522 .max_cap = 5120, 1523 .priority = 1, 1524 .fixed_size = true, 1525 .bonus_ways = 0xfff, 1526 .cache_mode = 0, 1527 .retain_on_pc = true, 1528 }, { 1529 .usecase_id = LLCC_MMUHWT, 1530 .slice_id = 13, 1531 .max_cap = 1024, 1532 .priority = 1, 1533 .fixed_size = true, 1534 .bonus_ways = 0xfff, 1535 .cache_mode = 0, 1536 .activate_on_init = true, 1537 }, { 1538 .usecase_id = LLCC_CMPTDMA, 1539 .slice_id = 15, 1540 .max_cap = 6144, 1541 .priority = 1, 1542 .fixed_size = true, 1543 .bonus_ways = 0xfff, 1544 .cache_mode = 0, 1545 .retain_on_pc = true, 1546 }, { 1547 .usecase_id = LLCC_DISP, 1548 .slice_id = 16, 1549 .max_cap = 6144, 1550 .priority = 1, 1551 .fixed_size = true, 1552 .bonus_ways = 0xfff, 1553 .cache_mode = 0, 1554 .retain_on_pc = true, 1555 }, { 1556 .usecase_id = LLCC_VIDFW, 1557 .slice_id = 17, 1558 .max_cap = 1024, 1559 .priority = 1, 1560 .fixed_size = true, 1561 .bonus_ways = 0xfff, 1562 .cache_mode = 0, 1563 .retain_on_pc = true, 1564 }, { 1565 .usecase_id = LLCC_MDMHPFX, 1566 .slice_id = 20, 1567 .max_cap = 1024, 1568 .priority = 2, 1569 .fixed_size = true, 1570 .bonus_ways = 0xfff, 1571 .cache_mode = 0, 1572 .retain_on_pc = true, 1573 }, { 1574 .usecase_id = LLCC_MDMPNG, 1575 .slice_id = 21, 1576 .max_cap = 1024, 1577 .priority = 0, 1578 .fixed_size = true, 1579 .bonus_ways = 0xc, 1580 .cache_mode = 0, 1581 .retain_on_pc = true, 1582 }, { 1583 .usecase_id = LLCC_AUDHW, 1584 .slice_id = 22, 1585 .max_cap = 1024, 1586 .priority = 1, 1587 .fixed_size = true, 1588 .bonus_ways = 0xfff, 1589 .cache_mode = 0, 1590 .retain_on_pc = true, 1591 }, { 1592 .usecase_id = LLCC_NPU, 1593 .slice_id = 23, 1594 .max_cap = 6144, 1595 .priority = 1, 1596 .fixed_size = true, 1597 .bonus_ways = 0xfff, 1598 .cache_mode = 0, 1599 .retain_on_pc = true, 1600 }, { 1601 .usecase_id = LLCC_WLHW, 1602 .slice_id = 24, 1603 .max_cap = 6144, 1604 .priority = 1, 1605 .fixed_size = true, 1606 .bonus_ways = 0xfff, 1607 .cache_mode = 0, 1608 .retain_on_pc = true, 1609 }, { 1610 .usecase_id = LLCC_MODPE, 1611 .slice_id = 29, 1612 .max_cap = 512, 1613 .priority = 1, 1614 .fixed_size = true, 1615 .bonus_ways = 0xc, 1616 .cache_mode = 0, 1617 .retain_on_pc = true, 1618 }, { 1619 .usecase_id = LLCC_APTCM, 1620 .slice_id = 30, 1621 .max_cap = 512, 1622 .priority = 3, 1623 .fixed_size = true, 1624 .res_ways = 0x1, 1625 .cache_mode = 1, 1626 .retain_on_pc = true, 1627 }, { 1628 .usecase_id = LLCC_WRCACHE, 1629 .slice_id = 31, 1630 .max_cap = 128, 1631 .priority = 1, 1632 .fixed_size = true, 1633 .bonus_ways = 0xfff, 1634 .cache_mode = 0, 1635 }, 1636 }; 1637 1638 static const struct llcc_slice_config sc8280xp_data[] = { 1639 { 1640 .usecase_id = LLCC_CPUSS, 1641 .slice_id = 1, 1642 .max_cap = 6144, 1643 .priority = 1, 1644 .fixed_size = true, 1645 .bonus_ways = 0xfff, 1646 .cache_mode = 0, 1647 .retain_on_pc = true, 1648 .activate_on_init = true, 1649 }, { 1650 .usecase_id = LLCC_VIDSC0, 1651 .slice_id = 2, 1652 .max_cap = 512, 1653 .priority = 3, 1654 .fixed_size = true, 1655 .bonus_ways = 0xfff, 1656 .cache_mode = 0, 1657 .retain_on_pc = true, 1658 }, { 1659 .usecase_id = LLCC_AUDIO, 1660 .slice_id = 6, 1661 .max_cap = 1024, 1662 .priority = 1, 1663 .fixed_size = true, 1664 .bonus_ways = 0xfff, 1665 .cache_mode = 0, 1666 }, { 1667 .usecase_id = LLCC_CMPT, 1668 .slice_id = 10, 1669 .max_cap = 6144, 1670 .priority = 1, 1671 .fixed_size = true, 1672 .bonus_ways = 0xfff, 1673 .cache_mode = 0, 1674 }, { 1675 .usecase_id = LLCC_GPUHTW, 1676 .slice_id = 11, 1677 .max_cap = 1024, 1678 .priority = 1, 1679 .fixed_size = true, 1680 .bonus_ways = 0xfff, 1681 .cache_mode = 0, 1682 .retain_on_pc = true, 1683 }, { 1684 .usecase_id = LLCC_GPU, 1685 .slice_id = 12, 1686 .max_cap = 4096, 1687 .priority = 1, 1688 .fixed_size = true, 1689 .bonus_ways = 0xfff, 1690 .cache_mode = 0, 1691 .retain_on_pc = true, 1692 .write_scid_en = true, 1693 }, { 1694 .usecase_id = LLCC_MMUHWT, 1695 .slice_id = 13, 1696 .max_cap = 1024, 1697 .priority = 1, 1698 .fixed_size = true, 1699 .bonus_ways = 0xfff, 1700 .cache_mode = 0, 1701 .activate_on_init = true, 1702 }, { 1703 .usecase_id = LLCC_DISP, 1704 .slice_id = 16, 1705 .max_cap = 6144, 1706 .priority = 1, 1707 .fixed_size = true, 1708 .bonus_ways = 0xfff, 1709 .cache_mode = 0, 1710 .retain_on_pc = true, 1711 }, { 1712 .usecase_id = LLCC_AUDHW, 1713 .slice_id = 22, 1714 .max_cap = 2048, 1715 .priority = 1, 1716 .fixed_size = true, 1717 .bonus_ways = 0xfff, 1718 .cache_mode = 0, 1719 .retain_on_pc = true, 1720 }, { 1721 .usecase_id = LLCC_ECC, 1722 .slice_id = 26, 1723 .max_cap = 1024, 1724 .priority = 1, 1725 .fixed_size = true, 1726 .bonus_ways = 0xfff, 1727 .cache_mode = 0, 1728 .retain_on_pc = true, 1729 }, { 1730 .usecase_id = LLCC_CVP, 1731 .slice_id = 28, 1732 .max_cap = 512, 1733 .priority = 3, 1734 .fixed_size = true, 1735 .bonus_ways = 0xfff, 1736 .cache_mode = 0, 1737 .retain_on_pc = true, 1738 }, { 1739 .usecase_id = LLCC_APTCM, 1740 .slice_id = 30, 1741 .max_cap = 1024, 1742 .priority = 3, 1743 .fixed_size = true, 1744 .res_ways = 0x1, 1745 .cache_mode = 1, 1746 .retain_on_pc = true, 1747 }, { 1748 .usecase_id = LLCC_WRCACHE, 1749 .slice_id = 31, 1750 .max_cap = 1024, 1751 .priority = 1, 1752 .fixed_size = true, 1753 .bonus_ways = 0xfff, 1754 .cache_mode = 0, 1755 .activate_on_init = true, 1756 }, { 1757 .usecase_id = LLCC_CVPFW, 1758 .slice_id = 17, 1759 .max_cap = 512, 1760 .priority = 1, 1761 .bonus_ways = 0xfff, 1762 .cache_mode = 0, 1763 .retain_on_pc = true, 1764 }, { 1765 .usecase_id = LLCC_CPUSS1, 1766 .slice_id = 3, 1767 .max_cap = 2048, 1768 .priority = 1, 1769 .fixed_size = true, 1770 .bonus_ways = 0xfff, 1771 .cache_mode = 0, 1772 .retain_on_pc = true, 1773 }, { 1774 .usecase_id = LLCC_CPUHWT, 1775 .slice_id = 5, 1776 .max_cap = 512, 1777 .priority = 1, 1778 .fixed_size = true, 1779 .bonus_ways = 0xfff, 1780 .cache_mode = 0, 1781 .activate_on_init = true, 1782 }, 1783 }; 1784 1785 static const struct llcc_slice_config sdm670_data[] = { 1786 { 1787 .usecase_id = LLCC_CPUSS, 1788 .slice_id = 1, 1789 .max_cap = 512, 1790 .priority = 1, 1791 .bonus_ways = 0xf, 1792 .res_ways = 0x0, 1793 .cache_mode = 0, 1794 .dis_cap_alloc = true, 1795 .retain_on_pc = true, 1796 .activate_on_init = true, 1797 }, { 1798 .usecase_id = LLCC_ROTATOR, 1799 .slice_id = 4, 1800 .max_cap = 384, 1801 .priority = 2, 1802 .fixed_size = true, 1803 .bonus_ways = 0x0, 1804 .res_ways = 0xe, 1805 .cache_mode = 2, 1806 .dis_cap_alloc = true, 1807 .retain_on_pc = true, 1808 }, { 1809 .usecase_id = LLCC_VOICE, 1810 .slice_id = 5, 1811 .max_cap = 512, 1812 .priority = 1, 1813 .bonus_ways = 0xf, 1814 .res_ways = 0x0, 1815 .cache_mode = 0, 1816 .dis_cap_alloc = true, 1817 .retain_on_pc = true, 1818 }, { 1819 .usecase_id = LLCC_AUDIO, 1820 .slice_id = 6, 1821 .max_cap = 512, 1822 .priority = 1, 1823 .bonus_ways = 0xf, 1824 .res_ways = 0x0, 1825 .cache_mode = 0, 1826 .dis_cap_alloc = true, 1827 .retain_on_pc = true, 1828 }, { 1829 .usecase_id = LLCC_MDM, 1830 .slice_id = 8, 1831 .max_cap = 512, 1832 .priority = 1, 1833 .bonus_ways = 0xf, 1834 .res_ways = 0x0, 1835 .cache_mode = 0, 1836 .dis_cap_alloc = true, 1837 .retain_on_pc = true, 1838 }, { 1839 .usecase_id = LLCC_GPU, 1840 .slice_id = 12, 1841 .max_cap = 384, 1842 .priority = 1, 1843 .fixed_size = true, 1844 .bonus_ways = 0x0, 1845 .res_ways = 0x0, 1846 .cache_mode = 0, 1847 .dis_cap_alloc = true, 1848 .retain_on_pc = true, 1849 }, { 1850 .usecase_id = LLCC_MMUHWT, 1851 .slice_id = 13, 1852 .max_cap = 512, 1853 .priority = 1, 1854 .bonus_ways = 0xf, 1855 .res_ways = 0x0, 1856 .cache_mode = 0, 1857 .dis_cap_alloc = true, 1858 .activate_on_init = true, 1859 }, { 1860 .usecase_id = LLCC_AUDHW, 1861 .slice_id = 22, 1862 .max_cap = 512, 1863 .priority = 1, 1864 .fixed_size = true, 1865 .bonus_ways = 0xf, 1866 .res_ways = 0x0, 1867 .cache_mode = 0, 1868 .dis_cap_alloc = true, 1869 .retain_on_pc = true, 1870 }, 1871 }; 1872 1873 static const struct llcc_slice_config sdm845_data[] = {{ 1874 .usecase_id = LLCC_CPUSS, 1875 .slice_id = 1, 1876 .max_cap = 2816, 1877 .priority = 1, 1878 .bonus_ways = 0xffc, 1879 .res_ways = 0x2, 1880 .cache_mode = 0, 1881 .dis_cap_alloc = true, 1882 .retain_on_pc = true, 1883 .activate_on_init = true, 1884 }, { 1885 .usecase_id = LLCC_VIDSC0, 1886 .slice_id = 2, 1887 .max_cap = 512, 1888 .priority = 2, 1889 .fixed_size = true, 1890 .res_ways = 0xf0, 1891 .cache_mode = 0, 1892 .dis_cap_alloc = true, 1893 .retain_on_pc = true, 1894 }, { 1895 .usecase_id = LLCC_VIDSC1, 1896 .slice_id = 3, 1897 .max_cap = 512, 1898 .priority = 2, 1899 .fixed_size = true, 1900 .res_ways = 0xf0, 1901 .cache_mode = 0, 1902 .dis_cap_alloc = true, 1903 .retain_on_pc = true, 1904 }, { 1905 .usecase_id = LLCC_ROTATOR, 1906 .slice_id = 4, 1907 .max_cap = 563, 1908 .priority = 2, 1909 .fixed_size = true, 1910 .res_ways = 0xe, 1911 .cache_mode = 2, 1912 .dis_cap_alloc = true, 1913 .retain_on_pc = true, 1914 }, { 1915 .usecase_id = LLCC_VOICE, 1916 .slice_id = 5, 1917 .max_cap = 2816, 1918 .priority = 1, 1919 .bonus_ways = 0xffc, 1920 .res_ways = 0x2, 1921 .cache_mode = 0, 1922 .dis_cap_alloc = true, 1923 .retain_on_pc = true, 1924 }, { 1925 .usecase_id = LLCC_AUDIO, 1926 .slice_id = 6, 1927 .max_cap = 2816, 1928 .priority = 1, 1929 .bonus_ways = 0xffc, 1930 .res_ways = 0x2, 1931 .cache_mode = 0, 1932 .dis_cap_alloc = true, 1933 .retain_on_pc = true, 1934 }, { 1935 .usecase_id = LLCC_MDMHPGRW, 1936 .slice_id = 7, 1937 .max_cap = 1024, 1938 .priority = 2, 1939 .bonus_ways = 0xfc, 1940 .res_ways = 0xf00, 1941 .cache_mode = 0, 1942 .dis_cap_alloc = true, 1943 .retain_on_pc = true, 1944 }, { 1945 .usecase_id = LLCC_MDM, 1946 .slice_id = 8, 1947 .max_cap = 2816, 1948 .priority = 1, 1949 .bonus_ways = 0xffc, 1950 .res_ways = 0x2, 1951 .cache_mode = 0, 1952 .dis_cap_alloc = true, 1953 .retain_on_pc = true, 1954 }, { 1955 .usecase_id = LLCC_CMPT, 1956 .slice_id = 10, 1957 .max_cap = 2816, 1958 .priority = 1, 1959 .bonus_ways = 0xffc, 1960 .res_ways = 0x2, 1961 .cache_mode = 0, 1962 .dis_cap_alloc = true, 1963 .retain_on_pc = true, 1964 }, { 1965 .usecase_id = LLCC_GPUHTW, 1966 .slice_id = 11, 1967 .max_cap = 512, 1968 .priority = 1, 1969 .fixed_size = true, 1970 .bonus_ways = 0xc, 1971 .cache_mode = 0, 1972 .dis_cap_alloc = true, 1973 .retain_on_pc = true, 1974 }, { 1975 .usecase_id = LLCC_GPU, 1976 .slice_id = 12, 1977 .max_cap = 2304, 1978 .priority = 1, 1979 .bonus_ways = 0xff0, 1980 .res_ways = 0x2, 1981 .cache_mode = 0, 1982 .dis_cap_alloc = true, 1983 .retain_on_pc = true, 1984 }, { 1985 .usecase_id = LLCC_MMUHWT, 1986 .slice_id = 13, 1987 .max_cap = 256, 1988 .priority = 2, 1989 .res_ways = 0x1, 1990 .cache_mode = 0, 1991 .dis_cap_alloc = true, 1992 .activate_on_init = true, 1993 }, { 1994 .usecase_id = LLCC_CMPTDMA, 1995 .slice_id = 15, 1996 .max_cap = 2816, 1997 .priority = 1, 1998 .bonus_ways = 0xffc, 1999 .res_ways = 0x2, 2000 .cache_mode = 0, 2001 .dis_cap_alloc = true, 2002 .retain_on_pc = true, 2003 }, { 2004 .usecase_id = LLCC_DISP, 2005 .slice_id = 16, 2006 .max_cap = 2816, 2007 .priority = 1, 2008 .bonus_ways = 0xffc, 2009 .res_ways = 0x2, 2010 .cache_mode = 0, 2011 .dis_cap_alloc = true, 2012 .retain_on_pc = true, 2013 }, { 2014 .usecase_id = LLCC_VIDFW, 2015 .slice_id = 17, 2016 .max_cap = 2816, 2017 .priority = 1, 2018 .bonus_ways = 0xffc, 2019 .res_ways = 0x2, 2020 .cache_mode = 0, 2021 .dis_cap_alloc = true, 2022 .retain_on_pc = true, 2023 }, { 2024 .usecase_id = LLCC_MDMHPFX, 2025 .slice_id = 20, 2026 .max_cap = 1024, 2027 .priority = 2, 2028 .fixed_size = true, 2029 .res_ways = 0xf00, 2030 .cache_mode = 0, 2031 .dis_cap_alloc = true, 2032 .retain_on_pc = true, 2033 }, { 2034 .usecase_id = LLCC_MDMPNG, 2035 .slice_id = 21, 2036 .max_cap = 1024, 2037 .priority = 0, 2038 .fixed_size = true, 2039 .bonus_ways = 0x1e, 2040 .cache_mode = 0, 2041 .dis_cap_alloc = true, 2042 .retain_on_pc = true, 2043 }, { 2044 .usecase_id = LLCC_AUDHW, 2045 .slice_id = 22, 2046 .max_cap = 1024, 2047 .priority = 1, 2048 .fixed_size = true, 2049 .bonus_ways = 0xffc, 2050 .res_ways = 0x2, 2051 .cache_mode = 0, 2052 .dis_cap_alloc = true, 2053 .retain_on_pc = true, 2054 }, 2055 }; 2056 2057 static const struct llcc_slice_config sm6350_data[] = { 2058 { 2059 .usecase_id = LLCC_CPUSS, 2060 .slice_id = 1, 2061 .max_cap = 768, 2062 .priority = 1, 2063 .bonus_ways = 0xfff, 2064 .cache_mode = 0, 2065 .activate_on_init = true, 2066 .write_scid_en = true, 2067 }, { 2068 .usecase_id = LLCC_MDM, 2069 .slice_id = 8, 2070 .max_cap = 512, 2071 .priority = 2, 2072 .bonus_ways = 0xfff, 2073 .cache_mode = 0, 2074 .activate_on_init = true, 2075 }, { 2076 .usecase_id = LLCC_GPUHTW, 2077 .slice_id = 11, 2078 .max_cap = 256, 2079 .priority = 1, 2080 .bonus_ways = 0xfff, 2081 .cache_mode = 0, 2082 .activate_on_init = true, 2083 }, { 2084 .usecase_id = LLCC_GPU, 2085 .slice_id = 12, 2086 .max_cap = 512, 2087 .priority = 1, 2088 .bonus_ways = 0xfff, 2089 .cache_mode = 0, 2090 .activate_on_init = true, 2091 }, { 2092 .usecase_id = LLCC_MDMPNG, 2093 .slice_id = 21, 2094 .max_cap = 768, 2095 .priority = 0, 2096 .fixed_size = true, 2097 .bonus_ways = 0xfff, 2098 .cache_mode = 0, 2099 .activate_on_init = true, 2100 }, { 2101 .usecase_id = LLCC_NPU, 2102 .slice_id = 23, 2103 .max_cap = 768, 2104 .priority = 1, 2105 .bonus_ways = 0xfff, 2106 .cache_mode = 0, 2107 .activate_on_init = true, 2108 }, { 2109 .usecase_id = LLCC_MODPE, 2110 .slice_id = 29, 2111 .max_cap = 64, 2112 .priority = 1, 2113 .fixed_size = true, 2114 .bonus_ways = 0xfff, 2115 .cache_mode = 0, 2116 .activate_on_init = true, 2117 }, 2118 }; 2119 2120 static const struct llcc_slice_config sm7150_data[] = { 2121 { 2122 .usecase_id = LLCC_CPUSS, 2123 .slice_id = 1, 2124 .max_cap = 512, 2125 .priority = 1, 2126 .bonus_ways = 0xf, 2127 .cache_mode = 0, 2128 .retain_on_pc = true, 2129 .activate_on_init = true, 2130 }, { 2131 .usecase_id = LLCC_MDM, 2132 .slice_id = 8, 2133 .max_cap = 128, 2134 .priority = 2, 2135 .bonus_ways = 0xf, 2136 .cache_mode = 0, 2137 .retain_on_pc = true, 2138 }, { 2139 .usecase_id = LLCC_GPUHTW, 2140 .slice_id = 11, 2141 .max_cap = 256, 2142 .priority = 1, 2143 .fixed_size = true, 2144 .bonus_ways = 0xf, 2145 .cache_mode = 0, 2146 .retain_on_pc = true, 2147 }, { 2148 .usecase_id = LLCC_GPU, 2149 .slice_id = 12, 2150 .max_cap = 256, 2151 .priority = 1, 2152 .fixed_size = true, 2153 .bonus_ways = 0xf, 2154 .cache_mode = 0, 2155 .retain_on_pc = true, 2156 }, { 2157 .usecase_id = LLCC_NPU, 2158 .slice_id = 23, 2159 .max_cap = 512, 2160 .priority = 1, 2161 .bonus_ways = 0xf, 2162 .cache_mode = 0, 2163 .retain_on_pc = true, 2164 }, 2165 }; 2166 2167 static const struct llcc_slice_config sm8150_data[] = { 2168 { 2169 .usecase_id = LLCC_CPUSS, 2170 .slice_id = 1, 2171 .max_cap = 3072, 2172 .priority = 1, 2173 .fixed_size = true, 2174 .bonus_ways = 0xfff, 2175 .cache_mode = 0, 2176 .retain_on_pc = true, 2177 .activate_on_init = true, 2178 }, { 2179 .usecase_id = LLCC_VIDSC0, 2180 .slice_id = 2, 2181 .max_cap = 512, 2182 .priority = 2, 2183 .fixed_size = true, 2184 .bonus_ways = 0xfff, 2185 .cache_mode = 0, 2186 .retain_on_pc = true, 2187 }, { 2188 .usecase_id = LLCC_VIDSC1, 2189 .slice_id = 3, 2190 .max_cap = 512, 2191 .priority = 2, 2192 .fixed_size = true, 2193 .bonus_ways = 0xfff, 2194 .cache_mode = 0, 2195 .retain_on_pc = true, 2196 }, { 2197 .usecase_id = LLCC_AUDIO, 2198 .slice_id = 6, 2199 .max_cap = 1024, 2200 .priority = 1, 2201 .fixed_size = true, 2202 .bonus_ways = 0xfff, 2203 .cache_mode = 0, 2204 .retain_on_pc = true, 2205 }, { 2206 .usecase_id = LLCC_MDMHPGRW, 2207 .slice_id = 7, 2208 .max_cap = 3072, 2209 .priority = 1, 2210 .bonus_ways = 0xff, 2211 .res_ways = 0xf00, 2212 .cache_mode = 0, 2213 .retain_on_pc = true, 2214 }, { 2215 .usecase_id = LLCC_MDM, 2216 .slice_id = 8, 2217 .max_cap = 3072, 2218 .priority = 1, 2219 .fixed_size = true, 2220 .bonus_ways = 0xfff, 2221 .cache_mode = 0, 2222 .retain_on_pc = true, 2223 }, { 2224 .usecase_id = LLCC_MODHW, 2225 .slice_id = 9, 2226 .max_cap = 1024, 2227 .priority = 1, 2228 .fixed_size = true, 2229 .bonus_ways = 0xfff, 2230 .cache_mode = 0, 2231 .retain_on_pc = true, 2232 }, { 2233 .usecase_id = LLCC_CMPT, 2234 .slice_id = 10, 2235 .max_cap = 3072, 2236 .priority = 1, 2237 .fixed_size = true, 2238 .bonus_ways = 0xfff, 2239 .cache_mode = 0, 2240 .retain_on_pc = true, 2241 }, { 2242 .usecase_id = LLCC_GPUHTW, 2243 .slice_id = 11, 2244 .max_cap = 512, 2245 .priority = 1, 2246 .fixed_size = true, 2247 .bonus_ways = 0xfff, 2248 .cache_mode = 0, 2249 .retain_on_pc = true, 2250 }, { 2251 .usecase_id = LLCC_GPU, 2252 .slice_id = 12, 2253 .max_cap = 2560, 2254 .priority = 1, 2255 .fixed_size = true, 2256 .bonus_ways = 0xfff, 2257 .cache_mode = 0, 2258 .retain_on_pc = true, 2259 }, { 2260 .usecase_id = LLCC_MMUHWT, 2261 .slice_id = 13, 2262 .max_cap = 1024, 2263 .priority = 1, 2264 .fixed_size = true, 2265 .bonus_ways = 0xfff, 2266 .cache_mode = 0, 2267 .activate_on_init = true, 2268 }, { 2269 .usecase_id = LLCC_CMPTDMA, 2270 .slice_id = 15, 2271 .max_cap = 3072, 2272 .priority = 1, 2273 .fixed_size = true, 2274 .bonus_ways = 0xfff, 2275 .cache_mode = 0, 2276 .retain_on_pc = true, 2277 }, { 2278 .usecase_id = LLCC_DISP, 2279 .slice_id = 16, 2280 .max_cap = 3072, 2281 .priority = 1, 2282 .fixed_size = true, 2283 .bonus_ways = 0xfff, 2284 .cache_mode = 0, 2285 .retain_on_pc = true, 2286 }, { 2287 .usecase_id = LLCC_MDMHPFX, 2288 .slice_id = 20, 2289 .max_cap = 1024, 2290 .priority = 2, 2291 .fixed_size = true, 2292 .bonus_ways = 0xfff, 2293 .cache_mode = 0, 2294 .retain_on_pc = true, 2295 }, { 2296 .usecase_id = LLCC_MDMHPFX, 2297 .slice_id = 21, 2298 .max_cap = 1024, 2299 .priority = 0, 2300 .fixed_size = true, 2301 .bonus_ways = 0xf, 2302 .cache_mode = 0, 2303 .retain_on_pc = true, 2304 }, { 2305 .usecase_id = LLCC_AUDHW, 2306 .slice_id = 22, 2307 .max_cap = 1024, 2308 .priority = 1, 2309 .fixed_size = true, 2310 .bonus_ways = 0xfff, 2311 .cache_mode = 0, 2312 .retain_on_pc = true, 2313 }, { 2314 .usecase_id = LLCC_NPU, 2315 .slice_id = 23, 2316 .max_cap = 3072, 2317 .priority = 1, 2318 .fixed_size = true, 2319 .bonus_ways = 0xfff, 2320 .cache_mode = 0, 2321 .retain_on_pc = true, 2322 }, { 2323 .usecase_id = LLCC_WLHW, 2324 .slice_id = 24, 2325 .max_cap = 3072, 2326 .priority = 1, 2327 .fixed_size = true, 2328 .bonus_ways = 0xfff, 2329 .cache_mode = 0, 2330 .retain_on_pc = true, 2331 }, { 2332 .usecase_id = LLCC_MODPE, 2333 .slice_id = 29, 2334 .max_cap = 256, 2335 .priority = 1, 2336 .fixed_size = true, 2337 .bonus_ways = 0xf, 2338 .cache_mode = 0, 2339 .retain_on_pc = true, 2340 }, { 2341 .usecase_id = LLCC_APTCM, 2342 .slice_id = 30, 2343 .max_cap = 256, 2344 .priority = 3, 2345 .fixed_size = true, 2346 .res_ways = 0x1, 2347 .cache_mode = 1, 2348 .retain_on_pc = true, 2349 }, { 2350 .usecase_id = LLCC_WRCACHE, 2351 .slice_id = 31, 2352 .max_cap = 128, 2353 .priority = 1, 2354 .fixed_size = true, 2355 .bonus_ways = 0xfff, 2356 .cache_mode = 0, 2357 }, 2358 }; 2359 2360 static const struct llcc_slice_config sm8250_data[] = { 2361 { 2362 .usecase_id = LLCC_CPUSS, 2363 .slice_id = 1, 2364 .max_cap = 3072, 2365 .priority = 1, 2366 .fixed_size = true, 2367 .bonus_ways = 0xfff, 2368 .cache_mode = 0, 2369 .retain_on_pc = true, 2370 .activate_on_init = true, 2371 }, { 2372 .usecase_id = LLCC_VIDSC0, 2373 .slice_id = 2, 2374 .max_cap = 512, 2375 .priority = 3, 2376 .fixed_size = true, 2377 .bonus_ways = 0xfff, 2378 .cache_mode = 0, 2379 .retain_on_pc = true, 2380 }, { 2381 .usecase_id = LLCC_AUDIO, 2382 .slice_id = 6, 2383 .max_cap = 1024, 2384 .priority = 1, 2385 .bonus_ways = 0xfff, 2386 .cache_mode = 0, 2387 }, { 2388 .usecase_id = LLCC_CMPT, 2389 .slice_id = 10, 2390 .max_cap = 1024, 2391 .priority = 1, 2392 .bonus_ways = 0xfff, 2393 .cache_mode = 0, 2394 }, { 2395 .usecase_id = LLCC_GPUHTW, 2396 .slice_id = 11, 2397 .max_cap = 1024, 2398 .priority = 1, 2399 .fixed_size = true, 2400 .bonus_ways = 0xfff, 2401 .cache_mode = 0, 2402 .retain_on_pc = true, 2403 }, { 2404 .usecase_id = LLCC_GPU, 2405 .slice_id = 12, 2406 .max_cap = 1024, 2407 .priority = 1, 2408 .bonus_ways = 0xfff, 2409 .cache_mode = 0, 2410 .retain_on_pc = true, 2411 .write_scid_en = true, 2412 }, { 2413 .usecase_id = LLCC_MMUHWT, 2414 .slice_id = 13, 2415 .max_cap = 1024, 2416 .priority = 1, 2417 .fixed_size = true, 2418 .bonus_ways = 0xfff, 2419 .cache_mode = 0, 2420 .activate_on_init = true, 2421 }, { 2422 .usecase_id = LLCC_CMPTDMA, 2423 .slice_id = 15, 2424 .max_cap = 1024, 2425 .priority = 1, 2426 .bonus_ways = 0xfff, 2427 .cache_mode = 0, 2428 .retain_on_pc = true, 2429 }, { 2430 .usecase_id = LLCC_DISP, 2431 .slice_id = 16, 2432 .max_cap = 3072, 2433 .priority = 1, 2434 .fixed_size = true, 2435 .bonus_ways = 0xfff, 2436 .cache_mode = 0, 2437 .retain_on_pc = true, 2438 }, { 2439 .usecase_id = LLCC_VIDFW, 2440 .slice_id = 17, 2441 .max_cap = 512, 2442 .priority = 1, 2443 .bonus_ways = 0xfff, 2444 .cache_mode = 0, 2445 .retain_on_pc = true, 2446 }, { 2447 .usecase_id = LLCC_AUDHW, 2448 .slice_id = 22, 2449 .max_cap = 1024, 2450 .priority = 1, 2451 .fixed_size = true, 2452 .bonus_ways = 0xfff, 2453 .cache_mode = 0, 2454 .retain_on_pc = true, 2455 }, { 2456 .usecase_id = LLCC_NPU, 2457 .slice_id = 23, 2458 .max_cap = 3072, 2459 .priority = 1, 2460 .fixed_size = true, 2461 .bonus_ways = 0xfff, 2462 .cache_mode = 0, 2463 .retain_on_pc = true, 2464 }, { 2465 .usecase_id = LLCC_WLHW, 2466 .slice_id = 24, 2467 .max_cap = 1024, 2468 .priority = 1, 2469 .bonus_ways = 0xfff, 2470 .cache_mode = 0, 2471 .retain_on_pc = true, 2472 }, { 2473 .usecase_id = LLCC_CVP, 2474 .slice_id = 28, 2475 .max_cap = 256, 2476 .priority = 3, 2477 .fixed_size = true, 2478 .bonus_ways = 0xfff, 2479 .cache_mode = 0, 2480 .retain_on_pc = true, 2481 }, { 2482 .usecase_id = LLCC_APTCM, 2483 .slice_id = 30, 2484 .max_cap = 128, 2485 .priority = 3, 2486 .res_ways = 0x3, 2487 .cache_mode = 1, 2488 .retain_on_pc = true, 2489 }, { 2490 .usecase_id = LLCC_WRCACHE, 2491 .slice_id = 31, 2492 .max_cap = 256, 2493 .priority = 1, 2494 .fixed_size = true, 2495 .bonus_ways = 0xfff, 2496 .cache_mode = 0, 2497 .activate_on_init = true, 2498 }, 2499 }; 2500 2501 static const struct llcc_slice_config sm8350_data[] = { 2502 { 2503 .usecase_id = LLCC_CPUSS, 2504 .slice_id = 1, 2505 .max_cap = 3072, 2506 .priority = 1, 2507 .fixed_size = true, 2508 .bonus_ways = 0xfff, 2509 .cache_mode = 0, 2510 .activate_on_init = true, 2511 .write_scid_en = true, 2512 }, { 2513 .usecase_id = LLCC_VIDSC0, 2514 .slice_id = 2, 2515 .max_cap = 512, 2516 .priority = 3, 2517 .fixed_size = true, 2518 .bonus_ways = 0xfff, 2519 .cache_mode = 0, 2520 .activate_on_init = true, 2521 }, { 2522 .usecase_id = LLCC_AUDIO, 2523 .slice_id = 6, 2524 .max_cap = 1024, 2525 .priority = 1, 2526 .fixed_size = true, 2527 .bonus_ways = 0xfff, 2528 .cache_mode = 0, 2529 }, { 2530 .usecase_id = LLCC_MDMHPGRW, 2531 .slice_id = 7, 2532 .max_cap = 1024, 2533 .priority = 3, 2534 .bonus_ways = 0xfff, 2535 .cache_mode = 0, 2536 .activate_on_init = true, 2537 }, { 2538 .usecase_id = LLCC_MODHW, 2539 .slice_id = 9, 2540 .max_cap = 1024, 2541 .priority = 1, 2542 .fixed_size = true, 2543 .bonus_ways = 0xfff, 2544 .cache_mode = 0, 2545 .activate_on_init = true, 2546 }, { 2547 .usecase_id = LLCC_CMPT, 2548 .slice_id = 10, 2549 .max_cap = 3072, 2550 .priority = 1, 2551 .fixed_size = true, 2552 .bonus_ways = 0xfff, 2553 .cache_mode = 0, 2554 .activate_on_init = true, 2555 }, { 2556 .usecase_id = LLCC_GPUHTW, 2557 .slice_id = 11, 2558 .max_cap = 1024, 2559 .priority = 1, 2560 .fixed_size = true, 2561 .bonus_ways = 0xfff, 2562 .cache_mode = 0, 2563 .activate_on_init = true, 2564 }, { 2565 .usecase_id = LLCC_GPU, 2566 .slice_id = 12, 2567 .max_cap = 1024, 2568 .priority = 1, 2569 .bonus_ways = 0xfff, 2570 .cache_mode = 0, 2571 .retain_on_pc = true, 2572 .activate_on_init = true, 2573 }, { 2574 .usecase_id = LLCC_MMUHWT, 2575 .slice_id = 13, 2576 .max_cap = 1024, 2577 .priority = 1, 2578 .fixed_size = true, 2579 .bonus_ways = 0xfff, 2580 .cache_mode = 0, 2581 .write_scid_en = true, 2582 }, { 2583 .usecase_id = LLCC_DISP, 2584 .slice_id = 16, 2585 .max_cap = 3072, 2586 .priority = 2, 2587 .fixed_size = true, 2588 .bonus_ways = 0xfff, 2589 .cache_mode = 0, 2590 .activate_on_init = true, 2591 }, { 2592 .usecase_id = LLCC_MDMPNG, 2593 .slice_id = 21, 2594 .max_cap = 1024, 2595 .priority = 0, 2596 .fixed_size = true, 2597 .bonus_ways = 0xf, 2598 .cache_mode = 0, 2599 .activate_on_init = true, 2600 }, { 2601 .usecase_id = LLCC_AUDHW, 2602 .slice_id = 22, 2603 .max_cap = 1024, 2604 .priority = 1, 2605 .fixed_size = true, 2606 .bonus_ways = 0xfff, 2607 .cache_mode = 0, 2608 .activate_on_init = true, 2609 }, { 2610 .usecase_id = LLCC_CVP, 2611 .slice_id = 28, 2612 .max_cap = 512, 2613 .priority = 3, 2614 .fixed_size = true, 2615 .bonus_ways = 0xfff, 2616 .cache_mode = 0, 2617 .activate_on_init = true, 2618 }, { 2619 .usecase_id = LLCC_MODPE, 2620 .slice_id = 29, 2621 .max_cap = 256, 2622 .priority = 1, 2623 .fixed_size = true, 2624 .bonus_ways = 0xf, 2625 .cache_mode = 0, 2626 .activate_on_init = true, 2627 }, { 2628 .usecase_id = LLCC_APTCM, 2629 .slice_id = 30, 2630 .max_cap = 1024, 2631 .priority = 3, 2632 .fixed_size = true, 2633 .res_ways = 0x1, 2634 .cache_mode = 1, 2635 .activate_on_init = true, 2636 }, { 2637 .usecase_id = LLCC_WRCACHE, 2638 .slice_id = 31, 2639 .max_cap = 512, 2640 .priority = 1, 2641 .fixed_size = true, 2642 .bonus_ways = 0xfff, 2643 .cache_mode = 0, 2644 .write_scid_en = true, 2645 }, { 2646 .usecase_id = LLCC_CVPFW, 2647 .slice_id = 17, 2648 .max_cap = 512, 2649 .priority = 1, 2650 .bonus_ways = 0xfff, 2651 .cache_mode = 0, 2652 .activate_on_init = true, 2653 }, { 2654 .usecase_id = LLCC_CPUSS1, 2655 .slice_id = 3, 2656 .max_cap = 1024, 2657 .priority = 1, 2658 .fixed_size = true, 2659 .bonus_ways = 0xfff, 2660 .cache_mode = 0, 2661 .activate_on_init = true, 2662 }, { 2663 .usecase_id = LLCC_CPUHWT, 2664 .slice_id = 5, 2665 .max_cap = 512, 2666 .priority = 1, 2667 .fixed_size = true, 2668 .bonus_ways = 0xfff, 2669 .cache_mode = 0, 2670 .write_scid_en = true, 2671 }, 2672 }; 2673 2674 static const struct llcc_slice_config sm8450_data[] = { 2675 { 2676 .usecase_id = LLCC_CPUSS, 2677 .slice_id = 1, 2678 .max_cap = 3072, 2679 .priority = 1, 2680 .bonus_ways = 0xffff, 2681 .cache_mode = 0, 2682 .retain_on_pc = true, 2683 .activate_on_init = true, 2684 }, { 2685 .usecase_id = LLCC_VIDSC0, 2686 .slice_id = 2, 2687 .max_cap = 512, 2688 .priority = 3, 2689 .fixed_size = true, 2690 .bonus_ways = 0xffff, 2691 .cache_mode = 0, 2692 .retain_on_pc = true, 2693 }, { 2694 .usecase_id = LLCC_AUDIO, 2695 .slice_id = 6, 2696 .max_cap = 1024, 2697 .priority = 1, 2698 .fixed_size = true, 2699 .bonus_ways = 0xffff, 2700 .cache_mode = 0, 2701 }, { 2702 .usecase_id = LLCC_MDMHPGRW, 2703 .slice_id = 7, 2704 .max_cap = 1024, 2705 .priority = 3, 2706 .bonus_ways = 0xffff, 2707 .cache_mode = 0, 2708 .retain_on_pc = true, 2709 }, { 2710 .usecase_id = LLCC_MODHW, 2711 .slice_id = 9, 2712 .max_cap = 1024, 2713 .priority = 1, 2714 .fixed_size = true, 2715 .bonus_ways = 0xffff, 2716 .cache_mode = 0, 2717 .retain_on_pc = true, 2718 }, { 2719 .usecase_id = LLCC_CMPT, 2720 .slice_id = 10, 2721 .max_cap = 4096, 2722 .priority = 1, 2723 .fixed_size = true, 2724 .bonus_ways = 0xffff, 2725 .cache_mode = 0, 2726 .retain_on_pc = true, 2727 }, { 2728 .usecase_id = LLCC_GPUHTW, 2729 .slice_id = 11, 2730 .max_cap = 512, 2731 .priority = 1, 2732 .fixed_size = true, 2733 .bonus_ways = 0xffff, 2734 .cache_mode = 0, 2735 .retain_on_pc = true, 2736 }, { 2737 .usecase_id = LLCC_GPU, 2738 .slice_id = 12, 2739 .max_cap = 2048, 2740 .priority = 1, 2741 .fixed_size = true, 2742 .bonus_ways = 0xffff, 2743 .cache_mode = 0, 2744 .retain_on_pc = true, 2745 .write_scid_en = true, 2746 }, { 2747 .usecase_id = LLCC_MMUHWT, 2748 .slice_id = 13, 2749 .max_cap = 768, 2750 .priority = 1, 2751 .fixed_size = true, 2752 .bonus_ways = 0xffff, 2753 .cache_mode = 0, 2754 .activate_on_init = true, 2755 }, { 2756 .usecase_id = LLCC_DISP, 2757 .slice_id = 16, 2758 .max_cap = 4096, 2759 .priority = 2, 2760 .fixed_size = true, 2761 .bonus_ways = 0xffff, 2762 .cache_mode = 0, 2763 .retain_on_pc = true, 2764 }, { 2765 .usecase_id = LLCC_MDMPNG, 2766 .slice_id = 21, 2767 .max_cap = 1024, 2768 .priority = 1, 2769 .fixed_size = true, 2770 .bonus_ways = 0xf000, 2771 .cache_mode = 0, 2772 .retain_on_pc = true, 2773 }, { 2774 .usecase_id = LLCC_AUDHW, 2775 .slice_id = 22, 2776 .max_cap = 1024, 2777 .priority = 1, 2778 .fixed_size = true, 2779 .bonus_ways = 0xffff, 2780 .cache_mode = 0, 2781 }, { 2782 .usecase_id = LLCC_CVP, 2783 .slice_id = 28, 2784 .max_cap = 256, 2785 .priority = 3, 2786 .fixed_size = true, 2787 .bonus_ways = 0xffff, 2788 .cache_mode = 0, 2789 .retain_on_pc = true, 2790 }, { 2791 .usecase_id = LLCC_MODPE, 2792 .slice_id = 29, 2793 .max_cap = 64, 2794 .priority = 1, 2795 .fixed_size = true, 2796 .bonus_ways = 0xf000, 2797 .cache_mode = 0, 2798 .retain_on_pc = true, 2799 }, { 2800 .usecase_id = LLCC_APTCM, 2801 .slice_id = 30, 2802 .max_cap = 1024, 2803 .priority = 3, 2804 .fixed_size = true, 2805 .res_ways = 0xf0, 2806 .cache_mode = 1, 2807 .retain_on_pc = true, 2808 }, { 2809 .usecase_id = LLCC_WRCACHE, 2810 .slice_id = 31, 2811 .max_cap = 512, 2812 .priority = 1, 2813 .fixed_size = true, 2814 .bonus_ways = 0xffff, 2815 .cache_mode = 0, 2816 .activate_on_init = true, 2817 }, { 2818 .usecase_id = LLCC_CVPFW, 2819 .slice_id = 17, 2820 .max_cap = 512, 2821 .priority = 1, 2822 .fixed_size = true, 2823 .bonus_ways = 0xffff, 2824 .cache_mode = 0, 2825 .retain_on_pc = true, 2826 }, { 2827 .usecase_id = LLCC_CPUSS1, 2828 .slice_id = 3, 2829 .max_cap = 1024, 2830 .priority = 1, 2831 .fixed_size = true, 2832 .bonus_ways = 0xffff, 2833 .cache_mode = 0, 2834 .retain_on_pc = true, 2835 }, { 2836 .usecase_id = LLCC_CAMEXP0, 2837 .slice_id = 4, 2838 .max_cap = 256, 2839 .priority = 3, 2840 .fixed_size = true, 2841 .bonus_ways = 0xffff, 2842 .cache_mode = 0, 2843 .retain_on_pc = true, 2844 }, { 2845 .usecase_id = LLCC_CPUMTE, 2846 .slice_id = 23, 2847 .max_cap = 256, 2848 .priority = 1, 2849 .fixed_size = true, 2850 .bonus_ways = 0xfff, 2851 .cache_mode = 0, 2852 .activate_on_init = true, 2853 }, { 2854 .usecase_id = LLCC_CPUHWT, 2855 .slice_id = 5, 2856 .max_cap = 512, 2857 .priority = 1, 2858 .fixed_size = true, 2859 .bonus_ways = 0xffff, 2860 .cache_mode = 0, 2861 .retain_on_pc = true, 2862 .activate_on_init = true, 2863 }, { 2864 .usecase_id = LLCC_CAMEXP1, 2865 .slice_id = 27, 2866 .max_cap = 256, 2867 .priority = 3, 2868 .fixed_size = true, 2869 .bonus_ways = 0xffff, 2870 .cache_mode = 0, 2871 .retain_on_pc = true, 2872 }, { 2873 .usecase_id = LLCC_AENPU, 2874 .slice_id = 8, 2875 .max_cap = 2048, 2876 .priority = 1, 2877 .fixed_size = true, 2878 .bonus_ways = 0xffff, 2879 .cache_mode = 0, 2880 }, 2881 }; 2882 2883 static const struct llcc_slice_config sm8550_data[] = { 2884 { 2885 .usecase_id = LLCC_CPUSS, 2886 .slice_id = 1, 2887 .max_cap = 5120, 2888 .priority = 1, 2889 .bonus_ways = 0xffffff, 2890 .cache_mode = 0, 2891 .activate_on_init = true, 2892 .write_scid_en = true, 2893 }, { 2894 .usecase_id = LLCC_VIDSC0, 2895 .slice_id = 2, 2896 .max_cap = 512, 2897 .priority = 4, 2898 .fixed_size = true, 2899 .bonus_ways = 0xffffff, 2900 .cache_mode = 0, 2901 }, { 2902 .usecase_id = LLCC_AUDIO, 2903 .slice_id = 6, 2904 .max_cap = 1024, 2905 .priority = 1, 2906 .fixed_size = true, 2907 .bonus_ways = 0xffffff, 2908 .cache_mode = 0, 2909 }, { 2910 .usecase_id = LLCC_MDMHPGRW, 2911 .slice_id = 25, 2912 .max_cap = 1024, 2913 .priority = 4, 2914 .bonus_ways = 0xffffff, 2915 .cache_mode = 0, 2916 }, { 2917 .usecase_id = LLCC_MODHW, 2918 .slice_id = 26, 2919 .max_cap = 1024, 2920 .priority = 1, 2921 .fixed_size = true, 2922 .bonus_ways = 0xffffff, 2923 .cache_mode = 0, 2924 }, { 2925 .usecase_id = LLCC_CMPT, 2926 .slice_id = 10, 2927 .max_cap = 4096, 2928 .priority = 1, 2929 .fixed_size = true, 2930 .bonus_ways = 0xffffff, 2931 .cache_mode = 0, 2932 }, { 2933 .usecase_id = LLCC_GPUHTW, 2934 .slice_id = 11, 2935 .max_cap = 512, 2936 .priority = 1, 2937 .fixed_size = true, 2938 .bonus_ways = 0xffffff, 2939 .cache_mode = 0, 2940 }, { 2941 .usecase_id = LLCC_GPU, 2942 .slice_id = 9, 2943 .max_cap = 3096, 2944 .priority = 1, 2945 .bonus_ways = 0xffffff, 2946 .cache_mode = 0, 2947 .write_scid_en = true, 2948 .write_scid_cacheable_en = true, 2949 }, { 2950 .usecase_id = LLCC_MMUHWT, 2951 .slice_id = 18, 2952 .max_cap = 768, 2953 .priority = 1, 2954 .fixed_size = true, 2955 .bonus_ways = 0xffffff, 2956 .cache_mode = 0, 2957 .activate_on_init = true, 2958 }, { 2959 .usecase_id = LLCC_DISP, 2960 .slice_id = 16, 2961 .max_cap = 6144, 2962 .priority = 1, 2963 .fixed_size = true, 2964 .bonus_ways = 0xffffff, 2965 .cache_mode = 2, 2966 }, { 2967 .usecase_id = LLCC_MDMPNG, 2968 .slice_id = 27, 2969 .max_cap = 1024, 2970 .priority = 0, 2971 .fixed_size = true, 2972 .bonus_ways = 0xf00000, 2973 .cache_mode = 0, 2974 }, { 2975 .usecase_id = LLCC_AUDHW, 2976 .slice_id = 22, 2977 .max_cap = 1024, 2978 .priority = 1, 2979 .fixed_size = true, 2980 .bonus_ways = 0xffffff, 2981 .cache_mode = 0, 2982 }, { 2983 .usecase_id = LLCC_CVP, 2984 .slice_id = 8, 2985 .max_cap = 256, 2986 .priority = 4, 2987 .fixed_size = true, 2988 .bonus_ways = 0xffffff, 2989 .cache_mode = 0, 2990 }, { 2991 .usecase_id = LLCC_MODPE, 2992 .slice_id = 29, 2993 .max_cap = 64, 2994 .priority = 1, 2995 .fixed_size = true, 2996 .bonus_ways = 0xf00000, 2997 .cache_mode = 0, 2998 .alloc_oneway_en = true, 2999 .vict_prio = true, 3000 }, { 3001 .usecase_id = LLCC_WRCACHE, 3002 .slice_id = 31, 3003 .max_cap = 512, 3004 .priority = 1, 3005 .fixed_size = true, 3006 .bonus_ways = 0xffffff, 3007 .cache_mode = 0, 3008 .activate_on_init = true, 3009 }, { 3010 .usecase_id = LLCC_CAMEXP0, 3011 .slice_id = 4, 3012 .max_cap = 256, 3013 .priority = 4, 3014 .fixed_size = true, 3015 .bonus_ways = 0xf, 3016 .cache_mode = 0, 3017 }, { 3018 .usecase_id = LLCC_CPUHWT, 3019 .slice_id = 5, 3020 .max_cap = 512, 3021 .priority = 1, 3022 .fixed_size = true, 3023 .bonus_ways = 0xffffff, 3024 .cache_mode = 0, 3025 .activate_on_init = true, 3026 }, { 3027 .usecase_id = LLCC_CAMEXP1, 3028 .slice_id = 7, 3029 .max_cap = 3200, 3030 .priority = 3, 3031 .fixed_size = true, 3032 .bonus_ways = 0xfffff0, 3033 .cache_mode = 2, 3034 }, { 3035 .usecase_id = LLCC_CMPTHCP, 3036 .slice_id = 17, 3037 .max_cap = 256, 3038 .priority = 4, 3039 .fixed_size = true, 3040 .bonus_ways = 0xffffff, 3041 .cache_mode = 0, 3042 }, { 3043 .usecase_id = LLCC_LCPDARE, 3044 .slice_id = 30, 3045 .max_cap = 128, 3046 .priority = 4, 3047 .fixed_size = true, 3048 .bonus_ways = 0xffffff, 3049 .cache_mode = 0, 3050 .activate_on_init = true, 3051 .alloc_oneway_en = true, 3052 .vict_prio = true, 3053 }, { 3054 .usecase_id = LLCC_AENPU, 3055 .slice_id = 3, 3056 .max_cap = 3072, 3057 .priority = 1, 3058 .fixed_size = true, 3059 .bonus_ways = 0xfe01ff, 3060 .cache_mode = 2, 3061 }, { 3062 .usecase_id = LLCC_ISLAND1, 3063 .slice_id = 12, 3064 .max_cap = 1792, 3065 .priority = 7, 3066 .fixed_size = true, 3067 .bonus_ways = 0xfe00, 3068 .cache_mode = 0, 3069 }, { 3070 .usecase_id = LLCC_ISLAND4, 3071 .slice_id = 15, 3072 .max_cap = 256, 3073 .priority = 7, 3074 .fixed_size = true, 3075 .bonus_ways = 0x10000, 3076 .cache_mode = 0, 3077 }, { 3078 .usecase_id = LLCC_CAMEXP2, 3079 .slice_id = 19, 3080 .max_cap = 3200, 3081 .priority = 3, 3082 .fixed_size = true, 3083 .bonus_ways = 0xfffff0, 3084 .cache_mode = 2, 3085 }, { 3086 .usecase_id = LLCC_CAMEXP3, 3087 .slice_id = 20, 3088 .max_cap = 3200, 3089 .priority = 2, 3090 .fixed_size = true, 3091 .bonus_ways = 0xfffff0, 3092 .cache_mode = 2, 3093 }, { 3094 .usecase_id = LLCC_CAMEXP4, 3095 .slice_id = 21, 3096 .max_cap = 3200, 3097 .priority = 2, 3098 .fixed_size = true, 3099 .bonus_ways = 0xfffff0, 3100 .cache_mode = 2, 3101 }, { 3102 .usecase_id = LLCC_DISP_WB, 3103 .slice_id = 23, 3104 .max_cap = 1024, 3105 .priority = 4, 3106 .fixed_size = true, 3107 .bonus_ways = 0xffffff, 3108 .cache_mode = 0, 3109 }, { 3110 .usecase_id = LLCC_DISP_1, 3111 .slice_id = 24, 3112 .max_cap = 6144, 3113 .priority = 1, 3114 .fixed_size = true, 3115 .bonus_ways = 0xffffff, 3116 .cache_mode = 2, 3117 }, { 3118 .usecase_id = LLCC_VIDVSP, 3119 .slice_id = 28, 3120 .max_cap = 256, 3121 .priority = 4, 3122 .fixed_size = true, 3123 .bonus_ways = 0xffffff, 3124 .cache_mode = 0, 3125 }, 3126 }; 3127 3128 static const struct llcc_slice_config sm8650_data[] = { 3129 { 3130 .usecase_id = LLCC_CPUSS, 3131 .slice_id = 1, 3132 .max_cap = 5120, 3133 .priority = 1, 3134 .bonus_ways = 0xffffff, 3135 .cache_mode = 0, 3136 .activate_on_init = true, 3137 .stale_en = true, 3138 }, { 3139 .usecase_id = LLCC_VIDSC0, 3140 .slice_id = 2, 3141 .max_cap = 512, 3142 .priority = 3, 3143 .fixed_size = true, 3144 .bonus_ways = 0xffffff, 3145 .cache_mode = 0, 3146 }, { 3147 .usecase_id = LLCC_AUDIO, 3148 .slice_id = 6, 3149 .max_cap = 512, 3150 .priority = 1, 3151 .fixed_size = true, 3152 .bonus_ways = 0xffffff, 3153 .cache_mode = 0, 3154 }, { 3155 .usecase_id = LLCC_MDMHPGRW, 3156 .slice_id = 25, 3157 .max_cap = 1024, 3158 .priority = 3, 3159 .bonus_ways = 0xffffff, 3160 .cache_mode = 0, 3161 }, { 3162 .usecase_id = LLCC_MODHW, 3163 .slice_id = 26, 3164 .max_cap = 1024, 3165 .priority = 1, 3166 .fixed_size = true, 3167 .bonus_ways = 0xffffff, 3168 .cache_mode = 0, 3169 }, { 3170 .usecase_id = LLCC_CMPT, 3171 .slice_id = 10, 3172 .max_cap = 4096, 3173 .priority = 1, 3174 .fixed_size = true, 3175 .bonus_ways = 0xffffff, 3176 .cache_mode = 0, 3177 }, { 3178 .usecase_id = LLCC_GPUHTW, 3179 .slice_id = 11, 3180 .max_cap = 512, 3181 .priority = 1, 3182 .fixed_size = true, 3183 .bonus_ways = 0xffffff, 3184 .cache_mode = 0, 3185 }, { 3186 .usecase_id = LLCC_GPU, 3187 .slice_id = 9, 3188 .max_cap = 3096, 3189 .priority = 1, 3190 .bonus_ways = 0xffffff, 3191 .cache_mode = 0, 3192 .write_scid_en = true, 3193 .write_scid_cacheable_en = true, 3194 }, { 3195 .usecase_id = LLCC_MMUHWT, 3196 .slice_id = 18, 3197 .max_cap = 768, 3198 .priority = 1, 3199 .fixed_size = true, 3200 .bonus_ways = 0xffffff, 3201 .cache_mode = 0, 3202 .activate_on_init = true, 3203 }, { 3204 .usecase_id = LLCC_DISP, 3205 .slice_id = 16, 3206 .max_cap = 6144, 3207 .priority = 1, 3208 .fixed_size = true, 3209 .bonus_ways = 0xffffff, 3210 .cache_mode = 2, 3211 }, { 3212 .usecase_id = LLCC_MDMHPFX, 3213 .slice_id = 24, 3214 .max_cap = 1024, 3215 .priority = 3, 3216 .fixed_size = true, 3217 .bonus_ways = 0xffffff, 3218 .cache_mode = 0, 3219 }, { 3220 .usecase_id = LLCC_MDMPNG, 3221 .slice_id = 27, 3222 .max_cap = 1024, 3223 .priority = 0, 3224 .fixed_size = true, 3225 .cache_mode = 0, 3226 }, { 3227 .usecase_id = LLCC_AUDHW, 3228 .slice_id = 22, 3229 .max_cap = 1024, 3230 .priority = 1, 3231 .fixed_size = true, 3232 .bonus_ways = 0xffffff, 3233 .cache_mode = 0, 3234 }, { 3235 .usecase_id = LLCC_CVP, 3236 .slice_id = 8, 3237 .max_cap = 256, 3238 .priority = 3, 3239 .fixed_size = true, 3240 .bonus_ways = 0xffffff, 3241 .cache_mode = 0, 3242 }, { 3243 .usecase_id = LLCC_MODPE, 3244 .slice_id = 29, 3245 .max_cap = 128, 3246 .priority = 1, 3247 .fixed_size = true, 3248 .bonus_ways = 0xf00000, 3249 .cache_mode = 0, 3250 .alloc_oneway_en = true, 3251 }, { 3252 .usecase_id = LLCC_WRCACHE, 3253 .slice_id = 31, 3254 .max_cap = 512, 3255 .priority = 1, 3256 .fixed_size = true, 3257 .bonus_ways = 0xffffff, 3258 .cache_mode = 0, 3259 .activate_on_init = true, 3260 }, { 3261 .usecase_id = LLCC_CAMEXP0, 3262 .slice_id = 4, 3263 .max_cap = 256, 3264 .priority = 3, 3265 .fixed_size = true, 3266 .bonus_ways = 0xf, 3267 .cache_mode = 0, 3268 }, { 3269 .usecase_id = LLCC_CAMEXP1, 3270 .slice_id = 7, 3271 .max_cap = 3200, 3272 .priority = 3, 3273 .fixed_size = true, 3274 .bonus_ways = 0xfffff0, 3275 .cache_mode = 2, 3276 }, { 3277 .usecase_id = LLCC_CMPTHCP, 3278 .slice_id = 17, 3279 .max_cap = 256, 3280 .priority = 3, 3281 .fixed_size = true, 3282 .bonus_ways = 0xffffff, 3283 .cache_mode = 0, 3284 }, { 3285 .usecase_id = LLCC_LCPDARE, 3286 .slice_id = 30, 3287 .max_cap = 128, 3288 .priority = 3, 3289 .fixed_size = true, 3290 .bonus_ways = 0xffffff, 3291 .cache_mode = 0, 3292 .activate_on_init = true, 3293 .alloc_oneway_en = true, 3294 }, { 3295 .usecase_id = LLCC_AENPU, 3296 .slice_id = 3, 3297 .max_cap = 3072, 3298 .priority = 1, 3299 .fixed_size = true, 3300 .bonus_ways = 0xffffff, 3301 .cache_mode = 2, 3302 }, { 3303 .usecase_id = LLCC_ISLAND1, 3304 .slice_id = 12, 3305 .max_cap = 5888, 3306 .priority = 7, 3307 .fixed_size = true, 3308 .res_ways = 0x7fffff, 3309 .cache_mode = 0, 3310 }, { 3311 .usecase_id = LLCC_DISP_WB, 3312 .slice_id = 23, 3313 .max_cap = 1024, 3314 .priority = 3, 3315 .fixed_size = true, 3316 .bonus_ways = 0xffffff, 3317 .cache_mode = 0, 3318 }, { 3319 .usecase_id = LLCC_VIDVSP, 3320 .slice_id = 28, 3321 .max_cap = 256, 3322 .priority = 3, 3323 .fixed_size = true, 3324 .bonus_ways = 0xffffff, 3325 .cache_mode = 0, 3326 }, 3327 }; 3328 3329 static const struct llcc_slice_config sm8750_data[] = { 3330 { 3331 .usecase_id = LLCC_CPUSS, 3332 .slice_id = 1, 3333 .max_cap = 5120, 3334 .priority = 1, 3335 .bonus_ways = 0xffffffff, 3336 .activate_on_init = true, 3337 .write_scid_en = true, 3338 }, { 3339 .usecase_id = LLCC_MDMHPFX, 3340 .slice_id = 24, 3341 .max_cap = 1024, 3342 .priority = 5, 3343 .fixed_size = true, 3344 .bonus_ways = 0xffffffff, 3345 }, { 3346 .usecase_id = LLCC_VIDSC0, 3347 .slice_id = 2, 3348 .max_cap = 512, 3349 .priority = 4, 3350 .fixed_size = true, 3351 .bonus_ways = 0xffffffff, 3352 }, { 3353 .usecase_id = LLCC_AUDIO, 3354 .slice_id = 35, 3355 .max_cap = 512, 3356 .priority = 1, 3357 .fixed_size = true, 3358 .bonus_ways = 0xffffffff, 3359 }, { 3360 .usecase_id = LLCC_MDMHPGRW, 3361 .slice_id = 25, 3362 .max_cap = 1024, 3363 .priority = 5, 3364 .bonus_ways = 0xffffffff, 3365 }, { 3366 .usecase_id = LLCC_MODHW, 3367 .slice_id = 26, 3368 .max_cap = 1024, 3369 .priority = 1, 3370 .fixed_size = true, 3371 .bonus_ways = 0xffffffff, 3372 }, { 3373 .usecase_id = LLCC_CMPT, 3374 .slice_id = 34, 3375 .max_cap = 4096, 3376 .priority = 1, 3377 .fixed_size = true, 3378 .bonus_ways = 0xffffffff, 3379 }, { 3380 .usecase_id = LLCC_GPUHTW, 3381 .slice_id = 11, 3382 .max_cap = 512, 3383 .priority = 1, 3384 .fixed_size = true, 3385 .bonus_ways = 0xffffffff, 3386 }, { 3387 .usecase_id = LLCC_GPU, 3388 .slice_id = 9, 3389 .max_cap = 5632, 3390 .priority = 1, 3391 .fixed_size = true, 3392 .bonus_ways = 0xffffffff, 3393 .write_scid_en = true, 3394 .write_scid_cacheable_en = true 3395 }, { 3396 .usecase_id = LLCC_MMUHWT, 3397 .slice_id = 18, 3398 .max_cap = 768, 3399 .priority = 1, 3400 .fixed_size = true, 3401 .bonus_ways = 0xffffffff, 3402 .activate_on_init = true, 3403 }, { 3404 .usecase_id = LLCC_DISP, 3405 .slice_id = 16, 3406 .max_cap = 7168, 3407 .priority = 1, 3408 .fixed_size = true, 3409 .bonus_ways = 0xffffffff, 3410 .cache_mode = 2, 3411 .stale_en = true, 3412 }, { 3413 .usecase_id = LLCC_VIDFW, 3414 .slice_id = 17, 3415 .priority = 4, 3416 .fixed_size = true, 3417 .bonus_ways = 0xffffffff, 3418 }, { 3419 .usecase_id = LLCC_CAMFW, 3420 .slice_id = 20, 3421 .priority = 4, 3422 .fixed_size = true, 3423 .bonus_ways = 0xffffffff, 3424 }, { 3425 .usecase_id = LLCC_MDMPNG, 3426 .slice_id = 27, 3427 .max_cap = 256, 3428 .priority = 5, 3429 .fixed_size = true, 3430 .bonus_ways = 0xf0000000, 3431 }, { 3432 .usecase_id = LLCC_AUDHW, 3433 .slice_id = 22, 3434 .max_cap = 512, 3435 .priority = 1, 3436 .fixed_size = true, 3437 .bonus_ways = 0xffffffff, 3438 }, { 3439 .usecase_id = LLCC_CVP, 3440 .slice_id = 8, 3441 .max_cap = 800, 3442 .priority = 5, 3443 .fixed_size = true, 3444 .bonus_ways = 0xffffffff, 3445 .vict_prio = true, 3446 }, { 3447 .usecase_id = LLCC_MODPE, 3448 .slice_id = 29, 3449 .max_cap = 256, 3450 .priority = 1, 3451 .fixed_size = true, 3452 .bonus_ways = 0xf0000000, 3453 .alloc_oneway_en = true, 3454 }, { 3455 .usecase_id = LLCC_WRCACHE, 3456 .slice_id = 31, 3457 .max_cap = 512, 3458 .priority = 1, 3459 .fixed_size = true, 3460 .bonus_ways = 0xffffffff, 3461 .activate_on_init = true, 3462 }, { 3463 .usecase_id = LLCC_CVPFW, 3464 .slice_id = 19, 3465 .max_cap = 64, 3466 .priority = 4, 3467 .fixed_size = true, 3468 .bonus_ways = 0xffffffff, 3469 }, { 3470 .usecase_id = LLCC_CMPTHCP, 3471 .slice_id = 15, 3472 .max_cap = 256, 3473 .priority = 4, 3474 .fixed_size = true, 3475 .bonus_ways = 0xffffffff, 3476 }, { 3477 .usecase_id = LLCC_LCPDARE, 3478 .slice_id = 30, 3479 .max_cap = 128, 3480 .priority = 5, 3481 .fixed_size = true, 3482 .bonus_ways = 0xffffffff, 3483 .activate_on_init = true, 3484 .alloc_oneway_en = true, 3485 }, { 3486 .usecase_id = LLCC_AENPU, 3487 .slice_id = 3, 3488 .max_cap = 3072, 3489 .priority = 1, 3490 .fixed_size = true, 3491 .bonus_ways = 0xffffffff, 3492 .cache_mode = 2, 3493 }, { 3494 .usecase_id = LLCC_ISLAND1, 3495 .slice_id = 12, 3496 .max_cap = 7936, 3497 .priority = 7, 3498 .fixed_size = true, 3499 .bonus_ways = 0x7fffffff, 3500 }, { 3501 .usecase_id = LLCC_DISP_WB, 3502 .slice_id = 23, 3503 .max_cap = 512, 3504 .priority = 4, 3505 .fixed_size = true, 3506 .bonus_ways = 0xffffffff, 3507 }, { 3508 .usecase_id = LLCC_VIDVSP, 3509 .slice_id = 4, 3510 .max_cap = 256, 3511 .priority = 4, 3512 .fixed_size = true, 3513 .bonus_ways = 0xffffffff, 3514 }, { 3515 .usecase_id = LLCC_VIDDEC, 3516 .slice_id = 5, 3517 .max_cap = 6144, 3518 .priority = 4, 3519 .fixed_size = true, 3520 .bonus_ways = 0xffffffff, 3521 .cache_mode = 2, 3522 .ovcap_prio = true, 3523 .parent_slice_id = 33, 3524 }, { 3525 .usecase_id = LLCC_CAMOFE, 3526 .slice_id = 33, 3527 .max_cap = 6144, 3528 .priority = 4, 3529 .fixed_size = true, 3530 .bonus_ways = 0xffffffff, 3531 .stale_en = true, 3532 .ovcap_prio = true, 3533 .parent_slice_id = 33, 3534 }, { 3535 .usecase_id = LLCC_CAMRTIP, 3536 .slice_id = 13, 3537 .max_cap = 1024, 3538 .priority = 4, 3539 .fixed_size = true, 3540 .bonus_ways = 0xffffffff, 3541 .stale_en = true, 3542 .ovcap_prio = true, 3543 .parent_slice_id = 33, 3544 }, { 3545 .usecase_id = LLCC_CAMSRTIP, 3546 .slice_id = 14, 3547 .max_cap = 6144, 3548 .priority = 4, 3549 .fixed_size = true, 3550 .bonus_ways = 0xffffffff, 3551 .stale_en = true, 3552 .ovcap_prio = true, 3553 .parent_slice_id = 33, 3554 }, { 3555 .usecase_id = LLCC_CAMRTRF, 3556 .slice_id = 7, 3557 .max_cap = 3584, 3558 .priority = 1, 3559 .fixed_size = true, 3560 .bonus_ways = 0xffffffff, 3561 .stale_en = true, 3562 .ovcap_prio = true, 3563 .parent_slice_id = 33, 3564 }, { 3565 .usecase_id = LLCC_CAMSRTRF, 3566 .slice_id = 21, 3567 .max_cap = 6144, 3568 .priority = 1, 3569 .fixed_size = true, 3570 .bonus_ways = 0xffffffff, 3571 .stale_en = true, 3572 .ovcap_prio = true, 3573 .parent_slice_id = 33, 3574 }, { 3575 .usecase_id = LLCC_CPUSSMPAM, 3576 .slice_id = 6, 3577 .max_cap = 2048, 3578 .priority = 1, 3579 .fixed_size = true, 3580 .bonus_ways = 0xffffffff, 3581 .activate_on_init = true, 3582 .write_scid_en = true, 3583 }, 3584 }; 3585 3586 static const struct llcc_slice_config qcs615_data[] = { 3587 { 3588 .usecase_id = LLCC_CPUSS, 3589 .slice_id = 1, 3590 .max_cap = 128, 3591 .priority = 1, 3592 .bonus_ways = 0xf, 3593 .cache_mode = 0, 3594 .activate_on_init = true, 3595 .write_scid_en = true, 3596 }, { 3597 .usecase_id = LLCC_MDM, 3598 .slice_id = 8, 3599 .max_cap = 256, 3600 .priority = 0, 3601 .fixed_size = true, 3602 .bonus_ways = 0xf, 3603 .cache_mode = 0, 3604 .activate_on_init = true, 3605 }, { 3606 .usecase_id = LLCC_GPUHTW, 3607 .slice_id = 11, 3608 .max_cap = 128, 3609 .priority = 1, 3610 .fixed_size = true, 3611 .bonus_ways = 0xf, 3612 .cache_mode = 0, 3613 .activate_on_init = true, 3614 }, { 3615 .usecase_id = LLCC_GPU, 3616 .slice_id = 12, 3617 .max_cap = 128, 3618 .priority = 1, 3619 .bonus_ways = 0xf, 3620 .cache_mode = 0, 3621 .activate_on_init = true, 3622 }, 3623 }; 3624 3625 static const struct llcc_slice_config qcs8300_data[] = { 3626 { 3627 .usecase_id = LLCC_GPUHTW, 3628 .slice_id = 11, 3629 .max_cap = 128, 3630 .priority = 1, 3631 .fixed_size = true, 3632 .bonus_ways = 0xf, 3633 .cache_mode = 0, 3634 .retain_on_pc = true, 3635 }, { 3636 .usecase_id = LLCC_GPU, 3637 .slice_id = 12, 3638 .max_cap = 512, 3639 .priority = 1, 3640 .fixed_size = true, 3641 .bonus_ways = 0xf, 3642 .cache_mode = 0, 3643 .retain_on_pc = true, 3644 .write_scid_en = true, 3645 }, { 3646 .usecase_id = LLCC_MMUHWT, 3647 .slice_id = 13, 3648 .max_cap = 128, 3649 .priority = 1, 3650 .fixed_size = true, 3651 .bonus_ways = 0xf, 3652 .cache_mode = 0, 3653 .activate_on_init = true, 3654 }, { 3655 .usecase_id = LLCC_ECC, 3656 .slice_id = 26, 3657 .max_cap = 256, 3658 .priority = 3, 3659 .fixed_size = true, 3660 .bonus_ways = 0xf, 3661 .cache_mode = 0, 3662 .activate_on_init = true, 3663 }, { 3664 .usecase_id = LLCC_WRCACHE, 3665 .slice_id = 31, 3666 .max_cap = 128, 3667 .priority = 1, 3668 .fixed_size = true, 3669 .bonus_ways = 0xf, 3670 .cache_mode = 0, 3671 .activate_on_init = true, 3672 }, 3673 }; 3674 3675 static const struct llcc_slice_config qdu1000_data_2ch[] = { 3676 { 3677 .usecase_id = LLCC_MDMHPGRW, 3678 .slice_id = 7, 3679 .max_cap = 512, 3680 .priority = 1, 3681 .fixed_size = true, 3682 .bonus_ways = 0xfff, 3683 .cache_mode = 0, 3684 .retain_on_pc = true, 3685 }, { 3686 .usecase_id = LLCC_MODHW, 3687 .slice_id = 9, 3688 .max_cap = 256, 3689 .priority = 1, 3690 .fixed_size = true, 3691 .bonus_ways = 0xfff, 3692 .cache_mode = 0, 3693 .retain_on_pc = true, 3694 }, { 3695 .usecase_id = LLCC_MDMPNG, 3696 .slice_id = 21, 3697 .max_cap = 256, 3698 .priority = 0, 3699 .fixed_size = true, 3700 .bonus_ways = 0x3, 3701 .cache_mode = 0, 3702 .retain_on_pc = true, 3703 }, { 3704 .usecase_id = LLCC_ECC, 3705 .slice_id = 26, 3706 .max_cap = 512, 3707 .priority = 3, 3708 .fixed_size = true, 3709 .bonus_ways = 0xffc, 3710 .cache_mode = 0, 3711 .activate_on_init = true, 3712 }, { 3713 .usecase_id = LLCC_MODPE, 3714 .slice_id = 29, 3715 .max_cap = 256, 3716 .priority = 1, 3717 .fixed_size = true, 3718 .bonus_ways = 0xfff, 3719 .cache_mode = 0, 3720 .retain_on_pc = true, 3721 }, { 3722 .usecase_id = LLCC_APTCM, 3723 .slice_id = 30, 3724 .max_cap = 256, 3725 .priority = 3, 3726 .fixed_size = true, 3727 .res_ways = 0xc, 3728 .cache_mode = 1, 3729 .retain_on_pc = true, 3730 }, { 3731 .usecase_id = LLCC_WRCACHE, 3732 .slice_id = 31, 3733 .max_cap = 128, 3734 .priority = 1, 3735 .fixed_size = true, 3736 .bonus_ways = 0x3, 3737 .cache_mode = 0, 3738 .activate_on_init = true, 3739 }, 3740 }; 3741 3742 static const struct llcc_slice_config qdu1000_data_4ch[] = { 3743 { 3744 .usecase_id = LLCC_MDMHPGRW, 3745 .slice_id = 7, 3746 .max_cap = 1024, 3747 .priority = 1, 3748 .fixed_size = true, 3749 .bonus_ways = 0xfff, 3750 .cache_mode = 0, 3751 .retain_on_pc = true, 3752 }, { 3753 .usecase_id = LLCC_MODHW, 3754 .slice_id = 9, 3755 .max_cap = 512, 3756 .priority = 1, 3757 .fixed_size = true, 3758 .bonus_ways = 0xfff, 3759 .cache_mode = 0, 3760 .retain_on_pc = true, 3761 }, { 3762 .usecase_id = LLCC_MDMPNG, 3763 .slice_id = 21, 3764 .max_cap = 512, 3765 .priority = 0, 3766 .fixed_size = true, 3767 .bonus_ways = 0x3, 3768 .cache_mode = 0, 3769 .retain_on_pc = true, 3770 }, { 3771 .usecase_id = LLCC_ECC, 3772 .slice_id = 26, 3773 .max_cap = 1024, 3774 .priority = 3, 3775 .fixed_size = true, 3776 .bonus_ways = 0xffc, 3777 .cache_mode = 0, 3778 .activate_on_init = true, 3779 }, { 3780 .usecase_id = LLCC_MODPE, 3781 .slice_id = 29, 3782 .max_cap = 512, 3783 .priority = 1, 3784 .fixed_size = true, 3785 .bonus_ways = 0xfff, 3786 .cache_mode = 0, 3787 .retain_on_pc = true, 3788 }, { 3789 .usecase_id = LLCC_APTCM, 3790 .slice_id = 30, 3791 .max_cap = 512, 3792 .priority = 3, 3793 .fixed_size = true, 3794 .res_ways = 0xc, 3795 .cache_mode = 1, 3796 .retain_on_pc = true, 3797 }, { 3798 .usecase_id = LLCC_WRCACHE, 3799 .slice_id = 31, 3800 .max_cap = 256, 3801 .priority = 1, 3802 .fixed_size = true, 3803 .bonus_ways = 0x3, 3804 .cache_mode = 0, 3805 .activate_on_init = true, 3806 }, 3807 }; 3808 3809 static const struct llcc_slice_config qdu1000_data_8ch[] = { 3810 { 3811 .usecase_id = LLCC_MDMHPGRW, 3812 .slice_id = 7, 3813 .max_cap = 2048, 3814 .priority = 1, 3815 .fixed_size = true, 3816 .bonus_ways = 0xfff, 3817 .cache_mode = 0, 3818 .retain_on_pc = true, 3819 }, { 3820 .usecase_id = LLCC_MODHW, 3821 .slice_id = 9, 3822 .max_cap = 1024, 3823 .priority = 1, 3824 .fixed_size = true, 3825 .bonus_ways = 0xfff, 3826 .cache_mode = 0, 3827 .retain_on_pc = true, 3828 }, { 3829 .usecase_id = LLCC_MDMPNG, 3830 .slice_id = 21, 3831 .max_cap = 1024, 3832 .priority = 0, 3833 .fixed_size = true, 3834 .bonus_ways = 0x3, 3835 .cache_mode = 0, 3836 .retain_on_pc = true, 3837 }, { 3838 .usecase_id = LLCC_ECC, 3839 .slice_id = 26, 3840 .max_cap = 2048, 3841 .priority = 3, 3842 .fixed_size = true, 3843 .bonus_ways = 0xffc, 3844 .cache_mode = 0, 3845 .activate_on_init = true, 3846 }, { 3847 .usecase_id = LLCC_MODPE, 3848 .slice_id = 29, 3849 .max_cap = 1024, 3850 .priority = 1, 3851 .fixed_size = true, 3852 .bonus_ways = 0xfff, 3853 .cache_mode = 0, 3854 .retain_on_pc = true, 3855 }, { 3856 .usecase_id = LLCC_APTCM, 3857 .slice_id = 30, 3858 .max_cap = 1024, 3859 .priority = 3, 3860 .fixed_size = true, 3861 .res_ways = 0xc, 3862 .cache_mode = 1, 3863 .retain_on_pc = true, 3864 }, { 3865 .usecase_id = LLCC_WRCACHE, 3866 .slice_id = 31, 3867 .max_cap = 512, 3868 .priority = 1, 3869 .fixed_size = true, 3870 .bonus_ways = 0x3, 3871 .cache_mode = 0, 3872 .activate_on_init = true, 3873 }, 3874 }; 3875 3876 static const struct llcc_slice_config x1e80100_data[] = { 3877 { 3878 .usecase_id = LLCC_CPUSS, 3879 .slice_id = 1, 3880 .max_cap = 6144, 3881 .priority = 1, 3882 .fixed_size = true, 3883 .bonus_ways = 0xfff, 3884 .cache_mode = 0, 3885 .activate_on_init = true, 3886 }, { 3887 .usecase_id = LLCC_VIDSC0, 3888 .slice_id = 2, 3889 .max_cap = 512, 3890 .priority = 4, 3891 .fixed_size = true, 3892 .bonus_ways = 0xfff, 3893 .cache_mode = 0, 3894 }, { 3895 .usecase_id = LLCC_AUDIO, 3896 .slice_id = 6, 3897 .max_cap = 1024, 3898 .priority = 1, 3899 .fixed_size = true, 3900 .bonus_ways = 0xfff, 3901 .cache_mode = 0, 3902 }, { 3903 .usecase_id = LLCC_CMPT, 3904 .slice_id = 10, 3905 .max_cap = 6144, 3906 .priority = 1, 3907 .fixed_size = true, 3908 .bonus_ways = 0xfff, 3909 .cache_mode = 0, 3910 }, { 3911 .usecase_id = LLCC_GPUHTW, 3912 .slice_id = 11, 3913 .max_cap = 512, 3914 .priority = 1, 3915 .fixed_size = true, 3916 .bonus_ways = 0xfff, 3917 .cache_mode = 0, 3918 }, { 3919 .usecase_id = LLCC_GPU, 3920 .slice_id = 9, 3921 .max_cap = 4608, 3922 .priority = 1, 3923 .bonus_ways = 0xfff, 3924 .cache_mode = 0, 3925 .write_scid_en = true, 3926 .write_scid_cacheable_en = true, 3927 .stale_en = true, 3928 }, { 3929 .usecase_id = LLCC_MMUHWT, 3930 .slice_id = 18, 3931 .max_cap = 512, 3932 .priority = 1, 3933 .fixed_size = true, 3934 .bonus_ways = 0xfff, 3935 .cache_mode = 0, 3936 .activate_on_init = true, 3937 }, { 3938 .usecase_id = LLCC_AUDHW, 3939 .slice_id = 22, 3940 .max_cap = 1024, 3941 .priority = 1, 3942 .fixed_size = true, 3943 .bonus_ways = 0xfff, 3944 .cache_mode = 0, 3945 }, { 3946 .usecase_id = LLCC_CVP, 3947 .slice_id = 8, 3948 .max_cap = 512, 3949 .priority = 4, 3950 .fixed_size = true, 3951 .bonus_ways = 0xfff, 3952 .cache_mode = 0, 3953 }, { 3954 .usecase_id = LLCC_WRCACHE, 3955 .slice_id = 31, 3956 .max_cap = 1024, 3957 .priority = 1, 3958 .fixed_size = true, 3959 .bonus_ways = 0xfff, 3960 .cache_mode = 0, 3961 .activate_on_init = true, 3962 }, { 3963 .usecase_id = LLCC_CAMEXP0, 3964 .slice_id = 4, 3965 .max_cap = 256, 3966 .priority = 4, 3967 .fixed_size = true, 3968 .bonus_ways = 0x3, 3969 .cache_mode = 0, 3970 }, { 3971 .usecase_id = LLCC_CAMEXP1, 3972 .slice_id = 7, 3973 .max_cap = 3072, 3974 .priority = 3, 3975 .fixed_size = true, 3976 .bonus_ways = 0xffc, 3977 .cache_mode = 2, 3978 }, { 3979 .usecase_id = LLCC_LCPDARE, 3980 .slice_id = 30, 3981 .max_cap = 512, 3982 .priority = 3, 3983 .fixed_size = true, 3984 .bonus_ways = 0xfff, 3985 .cache_mode = 0, 3986 .activate_on_init = true, 3987 .alloc_oneway_en = true, 3988 }, { 3989 .usecase_id = LLCC_AENPU, 3990 .slice_id = 3, 3991 .max_cap = 3072, 3992 .priority = 1, 3993 .fixed_size = true, 3994 .bonus_ways = 0xfff, 3995 .cache_mode = 2, 3996 }, { 3997 .usecase_id = LLCC_ISLAND1, 3998 .slice_id = 12, 3999 .max_cap = 2048, 4000 .priority = 7, 4001 .fixed_size = true, 4002 .res_ways = 0xf, 4003 .cache_mode = 0, 4004 }, { 4005 .usecase_id = LLCC_CAMEXP2, 4006 .slice_id = 19, 4007 .max_cap = 3072, 4008 .priority = 3, 4009 .fixed_size = true, 4010 .bonus_ways = 0xffc, 4011 .cache_mode = 2, 4012 }, { 4013 .usecase_id = LLCC_CAMEXP3, 4014 .slice_id = 20, 4015 .max_cap = 3072, 4016 .priority = 2, 4017 .fixed_size = true, 4018 .bonus_ways = 0xffc, 4019 .cache_mode = 2, 4020 }, { 4021 .usecase_id = LLCC_CAMEXP4, 4022 .slice_id = 21, 4023 .max_cap = 3072, 4024 .priority = 2, 4025 .fixed_size = true, 4026 .bonus_ways = 0xffc, 4027 .cache_mode = 2, 4028 }, 4029 }; 4030 4031 static const struct llcc_edac_reg_offset llcc_v1_edac_reg_offset = { 4032 .trp_ecc_error_status0 = 0x20344, 4033 .trp_ecc_error_status1 = 0x20348, 4034 .trp_ecc_sb_err_syn0 = 0x2304c, 4035 .trp_ecc_db_err_syn0 = 0x20370, 4036 .trp_ecc_error_cntr_clear = 0x20440, 4037 .trp_interrupt_0_status = 0x20480, 4038 .trp_interrupt_0_clear = 0x20484, 4039 .trp_interrupt_0_enable = 0x20488, 4040 4041 /* LLCC Common registers */ 4042 .cmn_status0 = 0x3000c, 4043 .cmn_interrupt_0_enable = 0x3001c, 4044 .cmn_interrupt_2_enable = 0x3003c, 4045 4046 /* LLCC DRP registers */ 4047 .drp_ecc_error_cfg = 0x40000, 4048 .drp_ecc_error_cntr_clear = 0x40004, 4049 .drp_interrupt_status = 0x41000, 4050 .drp_interrupt_clear = 0x41008, 4051 .drp_interrupt_enable = 0x4100c, 4052 .drp_ecc_error_status0 = 0x42044, 4053 .drp_ecc_error_status1 = 0x42048, 4054 .drp_ecc_sb_err_syn0 = 0x4204c, 4055 .drp_ecc_db_err_syn0 = 0x42070, 4056 }; 4057 4058 static const struct llcc_edac_reg_offset llcc_v2_1_edac_reg_offset = { 4059 .trp_ecc_error_status0 = 0x20344, 4060 .trp_ecc_error_status1 = 0x20348, 4061 .trp_ecc_sb_err_syn0 = 0x2034c, 4062 .trp_ecc_db_err_syn0 = 0x20370, 4063 .trp_ecc_error_cntr_clear = 0x20440, 4064 .trp_interrupt_0_status = 0x20480, 4065 .trp_interrupt_0_clear = 0x20484, 4066 .trp_interrupt_0_enable = 0x20488, 4067 4068 /* LLCC Common registers */ 4069 .cmn_status0 = 0x3400c, 4070 .cmn_interrupt_0_enable = 0x3401c, 4071 .cmn_interrupt_2_enable = 0x3403c, 4072 4073 /* LLCC DRP registers */ 4074 .drp_ecc_error_cfg = 0x50000, 4075 .drp_ecc_error_cntr_clear = 0x50004, 4076 .drp_interrupt_status = 0x50020, 4077 .drp_interrupt_clear = 0x50028, 4078 .drp_interrupt_enable = 0x5002c, 4079 .drp_ecc_error_status0 = 0x520f4, 4080 .drp_ecc_error_status1 = 0x520f8, 4081 .drp_ecc_sb_err_syn0 = 0x520fc, 4082 .drp_ecc_db_err_syn0 = 0x52120, 4083 }; 4084 4085 static const struct llcc_edac_reg_offset llcc_v6_edac_reg_offset = { 4086 .trp_ecc_error_status0 = 0x47448, 4087 .trp_ecc_error_status1 = 0x47450, 4088 .trp_ecc_sb_err_syn0 = 0x47490, 4089 .trp_ecc_db_err_syn0 = 0x474d0, 4090 .trp_ecc_error_cntr_clear = 0x47444, 4091 .trp_interrupt_0_status = 0x47600, 4092 .trp_interrupt_0_clear = 0x47604, 4093 .trp_interrupt_0_enable = 0x47608, 4094 4095 /* LLCC Common registers */ 4096 .cmn_status0 = 0x6400c, 4097 .cmn_interrupt_0_enable = 0x6401c, 4098 .cmn_interrupt_2_enable = 0x6403c, 4099 4100 /* LLCC DRP registers */ 4101 .drp_ecc_error_cfg = 0x80000, 4102 .drp_ecc_error_cntr_clear = 0x80004, 4103 .drp_interrupt_status = 0x80020, 4104 .drp_interrupt_clear = 0x80028, 4105 .drp_interrupt_enable = 0x8002c, 4106 .drp_ecc_error_status0 = 0x820f4, 4107 .drp_ecc_error_status1 = 0x820f8, 4108 .drp_ecc_sb_err_syn0 = 0x820fc, 4109 .drp_ecc_db_err_syn0 = 0x82120, 4110 }; 4111 4112 /* LLCC register offset starting from v1.0.0 */ 4113 static const u32 llcc_v1_reg_offset[] = { 4114 [LLCC_COMMON_HW_INFO] = 0x00030000, 4115 [LLCC_COMMON_STATUS0] = 0x0003000c, 4116 }; 4117 4118 /* LLCC register offset starting from v2.0.1 */ 4119 static const u32 llcc_v2_1_reg_offset[] = { 4120 [LLCC_COMMON_HW_INFO] = 0x00034000, 4121 [LLCC_COMMON_STATUS0] = 0x0003400c, 4122 }; 4123 4124 /* LLCC register offset starting from v6.0.0 */ 4125 static const u32 llcc_v6_reg_offset[] = { 4126 [LLCC_COMMON_HW_INFO] = 0x00064000, 4127 [LLCC_COMMON_STATUS0] = 0x0006400c, 4128 [LLCC_TRP_ATTR0_CFG] = 0x00041000, 4129 [LLCC_TRP_ATTR1_CFG] = 0x00041008, 4130 [LLCC_TRP_ATTR2_CFG] = 0x00041010, 4131 [LLCC_TRP_ATTR3_CFG] = 0x00041014, 4132 [LLCC_TRP_SID_DIS_CAP_ALLOC] = 0x00042000, 4133 [LLCC_TRP_ALGO_STALE_EN] = 0x00042008, 4134 [LLCC_TRP_ALGO_STALE_CAP_EN] = 0x00042010, 4135 [LLCC_TRP_ALGO_MRU0] = 0x00042018, 4136 [LLCC_TRP_ALGO_MRU1] = 0x00042020, 4137 [LLCC_TRP_ALGO_ALLOC0] = 0x00042028, 4138 [LLCC_TRP_ALGO_ALLOC1] = 0x00042030, 4139 [LLCC_TRP_ALGO_ALLOC2] = 0x00042038, 4140 [LLCC_TRP_ALGO_ALLOC3] = 0x00042040, 4141 [LLCC_TRP_WRS_EN] = 0x00042080, 4142 [LLCC_TRP_WRS_CACHEABLE_EN] = 0x00042088, 4143 }; 4144 4145 static const struct qcom_llcc_config kaanapali_cfg[] = { 4146 { 4147 .sct_data = kaanapali_data, 4148 .size = ARRAY_SIZE(kaanapali_data), 4149 .reg_offset = llcc_v6_reg_offset, 4150 .edac_reg_offset = &llcc_v6_edac_reg_offset, 4151 }, 4152 }; 4153 4154 static const struct qcom_llcc_config glymur_cfg[] = { 4155 { 4156 .sct_data = glymur_data, 4157 .size = ARRAY_SIZE(glymur_data), 4158 .reg_offset = llcc_v6_reg_offset, 4159 .edac_reg_offset = &llcc_v2_1_edac_reg_offset, 4160 .no_edac = true, 4161 }, 4162 }; 4163 4164 static const struct qcom_llcc_config qcs615_cfg[] = { 4165 { 4166 .sct_data = qcs615_data, 4167 .size = ARRAY_SIZE(qcs615_data), 4168 .reg_offset = llcc_v1_reg_offset, 4169 .edac_reg_offset = &llcc_v1_edac_reg_offset, 4170 }, 4171 }; 4172 4173 static const struct qcom_llcc_config qcs8300_cfg[] = { 4174 { 4175 .sct_data = qcs8300_data, 4176 .size = ARRAY_SIZE(qcs8300_data), 4177 .reg_offset = llcc_v2_1_reg_offset, 4178 .edac_reg_offset = &llcc_v2_1_edac_reg_offset, 4179 .num_banks = 4, 4180 }, 4181 }; 4182 4183 static const struct qcom_llcc_config qdu1000_cfg[] = { 4184 { 4185 .sct_data = qdu1000_data_8ch, 4186 .size = ARRAY_SIZE(qdu1000_data_8ch), 4187 .reg_offset = llcc_v2_1_reg_offset, 4188 .edac_reg_offset = &llcc_v2_1_edac_reg_offset, 4189 }, 4190 { 4191 .sct_data = qdu1000_data_4ch, 4192 .size = ARRAY_SIZE(qdu1000_data_4ch), 4193 .reg_offset = llcc_v2_1_reg_offset, 4194 .edac_reg_offset = &llcc_v2_1_edac_reg_offset, 4195 }, 4196 { 4197 .sct_data = qdu1000_data_4ch, 4198 .size = ARRAY_SIZE(qdu1000_data_4ch), 4199 .reg_offset = llcc_v2_1_reg_offset, 4200 .edac_reg_offset = &llcc_v2_1_edac_reg_offset, 4201 }, 4202 { 4203 .sct_data = qdu1000_data_2ch, 4204 .size = ARRAY_SIZE(qdu1000_data_2ch), 4205 .reg_offset = llcc_v2_1_reg_offset, 4206 .edac_reg_offset = &llcc_v2_1_edac_reg_offset, 4207 }, 4208 }; 4209 4210 static const struct qcom_llcc_config ipq5424_cfg[] = { 4211 { 4212 .sct_data = ipq5424_data, 4213 .size = ARRAY_SIZE(ipq5424_data), 4214 .reg_offset = llcc_v2_1_reg_offset, 4215 .edac_reg_offset = &llcc_v2_1_edac_reg_offset, 4216 .no_broadcast_register = true, 4217 }, 4218 }; 4219 4220 static const struct qcom_llcc_config sa8775p_cfg[] = { 4221 { 4222 .sct_data = sa8775p_data, 4223 .size = ARRAY_SIZE(sa8775p_data), 4224 .reg_offset = llcc_v2_1_reg_offset, 4225 .edac_reg_offset = &llcc_v2_1_edac_reg_offset, 4226 }, 4227 }; 4228 4229 static const struct qcom_llcc_config sar1130p_cfg[] = { 4230 { 4231 .sct_data = sar1130p_data, 4232 .size = ARRAY_SIZE(sar1130p_data), 4233 .reg_offset = llcc_v2_1_reg_offset, 4234 .edac_reg_offset = &llcc_v2_1_edac_reg_offset, 4235 .max_cap_shift = 14, 4236 .num_banks = 2, 4237 }, 4238 }; 4239 4240 static const struct qcom_llcc_config sar2130p_cfg[] = { 4241 { 4242 .sct_data = sar2130p_data, 4243 .size = ARRAY_SIZE(sar2130p_data), 4244 .reg_offset = llcc_v2_1_reg_offset, 4245 .edac_reg_offset = &llcc_v2_1_edac_reg_offset, 4246 .max_cap_shift = 14, 4247 .num_banks = 2, 4248 }, 4249 }; 4250 4251 static const struct qcom_llcc_config sc7180_cfg[] = { 4252 { 4253 .sct_data = sc7180_data, 4254 .size = ARRAY_SIZE(sc7180_data), 4255 .reg_offset = llcc_v1_reg_offset, 4256 .edac_reg_offset = &llcc_v1_edac_reg_offset, 4257 }, 4258 }; 4259 4260 static const struct qcom_llcc_config sc7280_cfg[] = { 4261 { 4262 .sct_data = sc7280_data, 4263 .size = ARRAY_SIZE(sc7280_data), 4264 .reg_offset = llcc_v1_reg_offset, 4265 .edac_reg_offset = &llcc_v1_edac_reg_offset, 4266 }, 4267 }; 4268 4269 static const struct qcom_llcc_config sc8180x_cfg[] = { 4270 { 4271 .sct_data = sc8180x_data, 4272 .size = ARRAY_SIZE(sc8180x_data), 4273 .reg_offset = llcc_v1_reg_offset, 4274 .edac_reg_offset = &llcc_v1_edac_reg_offset, 4275 }, 4276 }; 4277 4278 static const struct qcom_llcc_config sc8280xp_cfg[] = { 4279 { 4280 .sct_data = sc8280xp_data, 4281 .size = ARRAY_SIZE(sc8280xp_data), 4282 .reg_offset = llcc_v1_reg_offset, 4283 .edac_reg_offset = &llcc_v1_edac_reg_offset, 4284 }, 4285 }; 4286 4287 static const struct qcom_llcc_config sdm670_cfg[] = { 4288 { 4289 .sct_data = sdm670_data, 4290 .size = ARRAY_SIZE(sdm670_data), 4291 .skip_llcc_cfg = true, 4292 .reg_offset = llcc_v1_reg_offset, 4293 .edac_reg_offset = &llcc_v1_edac_reg_offset, 4294 .no_edac = true, 4295 }, 4296 }; 4297 4298 static const struct qcom_llcc_config sdm845_cfg[] = { 4299 { 4300 .sct_data = sdm845_data, 4301 .size = ARRAY_SIZE(sdm845_data), 4302 .skip_llcc_cfg = true, 4303 .reg_offset = llcc_v1_reg_offset, 4304 .edac_reg_offset = &llcc_v1_edac_reg_offset, 4305 .no_edac = true, 4306 }, 4307 }; 4308 4309 static const struct qcom_llcc_config sm6350_cfg[] = { 4310 { 4311 .sct_data = sm6350_data, 4312 .size = ARRAY_SIZE(sm6350_data), 4313 .reg_offset = llcc_v1_reg_offset, 4314 .edac_reg_offset = &llcc_v1_edac_reg_offset, 4315 }, 4316 }; 4317 4318 static const struct qcom_llcc_config sm7150_cfg[] = { 4319 { 4320 .sct_data = sm7150_data, 4321 .size = ARRAY_SIZE(sm7150_data), 4322 .reg_offset = llcc_v1_reg_offset, 4323 .edac_reg_offset = &llcc_v1_edac_reg_offset, 4324 }, 4325 }; 4326 4327 static const struct qcom_llcc_config sm8150_cfg[] = { 4328 { 4329 .sct_data = sm8150_data, 4330 .size = ARRAY_SIZE(sm8150_data), 4331 .reg_offset = llcc_v1_reg_offset, 4332 .edac_reg_offset = &llcc_v1_edac_reg_offset, 4333 }, 4334 }; 4335 4336 static const struct qcom_llcc_config sm8250_cfg[] = { 4337 { 4338 .sct_data = sm8250_data, 4339 .size = ARRAY_SIZE(sm8250_data), 4340 .reg_offset = llcc_v1_reg_offset, 4341 .edac_reg_offset = &llcc_v1_edac_reg_offset, 4342 }, 4343 }; 4344 4345 static const struct qcom_llcc_config sm8350_cfg[] = { 4346 { 4347 .sct_data = sm8350_data, 4348 .size = ARRAY_SIZE(sm8350_data), 4349 .reg_offset = llcc_v1_reg_offset, 4350 .edac_reg_offset = &llcc_v1_edac_reg_offset, 4351 }, 4352 }; 4353 4354 static const struct qcom_llcc_config sm8450_cfg[] = { 4355 { 4356 .sct_data = sm8450_data, 4357 .size = ARRAY_SIZE(sm8450_data), 4358 .reg_offset = llcc_v2_1_reg_offset, 4359 .edac_reg_offset = &llcc_v2_1_edac_reg_offset, 4360 }, 4361 }; 4362 4363 static const struct qcom_llcc_config sm8550_cfg[] = { 4364 { 4365 .sct_data = sm8550_data, 4366 .size = ARRAY_SIZE(sm8550_data), 4367 .reg_offset = llcc_v2_1_reg_offset, 4368 .edac_reg_offset = &llcc_v2_1_edac_reg_offset, 4369 }, 4370 }; 4371 4372 static const struct qcom_llcc_config sm8650_cfg[] = { 4373 { 4374 .sct_data = sm8650_data, 4375 .size = ARRAY_SIZE(sm8650_data), 4376 .reg_offset = llcc_v2_1_reg_offset, 4377 .edac_reg_offset = &llcc_v2_1_edac_reg_offset, 4378 }, 4379 }; 4380 4381 static const struct qcom_llcc_config sm8750_cfg[] = { 4382 { 4383 .sct_data = sm8750_data, 4384 .size = ARRAY_SIZE(sm8750_data), 4385 .skip_llcc_cfg = false, 4386 .reg_offset = llcc_v6_reg_offset, 4387 .edac_reg_offset = &llcc_v6_edac_reg_offset, 4388 }, 4389 }; 4390 4391 static const struct qcom_llcc_config x1e80100_cfg[] = { 4392 { 4393 .sct_data = x1e80100_data, 4394 .size = ARRAY_SIZE(x1e80100_data), 4395 .reg_offset = llcc_v2_1_reg_offset, 4396 .edac_reg_offset = &llcc_v2_1_edac_reg_offset, 4397 .irq_configured = true, 4398 }, 4399 }; 4400 4401 static const struct qcom_sct_config kaanapali_cfgs = { 4402 .llcc_config = kaanapali_cfg, 4403 .num_config = ARRAY_SIZE(kaanapali_cfg), 4404 }; 4405 4406 static const struct qcom_sct_config glymur_cfgs = { 4407 .llcc_config = glymur_cfg, 4408 .num_config = ARRAY_SIZE(glymur_cfg), 4409 }; 4410 4411 static const struct qcom_sct_config qcs615_cfgs = { 4412 .llcc_config = qcs615_cfg, 4413 .num_config = ARRAY_SIZE(qcs615_cfg), 4414 }; 4415 4416 static const struct qcom_sct_config qcs8300_cfgs = { 4417 .llcc_config = qcs8300_cfg, 4418 .num_config = ARRAY_SIZE(qcs8300_cfg), 4419 }; 4420 4421 static const struct qcom_sct_config qdu1000_cfgs = { 4422 .llcc_config = qdu1000_cfg, 4423 .num_config = ARRAY_SIZE(qdu1000_cfg), 4424 }; 4425 4426 static const struct qcom_sct_config ipq5424_cfgs = { 4427 .llcc_config = ipq5424_cfg, 4428 .num_config = ARRAY_SIZE(ipq5424_cfg), 4429 }; 4430 4431 static const struct qcom_sct_config sa8775p_cfgs = { 4432 .llcc_config = sa8775p_cfg, 4433 .num_config = ARRAY_SIZE(sa8775p_cfg), 4434 }; 4435 4436 static const struct qcom_sct_config sar1130p_cfgs = { 4437 .llcc_config = sar1130p_cfg, 4438 .num_config = ARRAY_SIZE(sar1130p_cfg), 4439 }; 4440 4441 static const struct qcom_sct_config sar2130p_cfgs = { 4442 .llcc_config = sar2130p_cfg, 4443 .num_config = ARRAY_SIZE(sar2130p_cfg), 4444 }; 4445 4446 static const struct qcom_sct_config sc7180_cfgs = { 4447 .llcc_config = sc7180_cfg, 4448 .num_config = ARRAY_SIZE(sc7180_cfg), 4449 }; 4450 4451 static const struct qcom_sct_config sc7280_cfgs = { 4452 .llcc_config = sc7280_cfg, 4453 .num_config = ARRAY_SIZE(sc7280_cfg), 4454 }; 4455 4456 static const struct qcom_sct_config sc8180x_cfgs = { 4457 .llcc_config = sc8180x_cfg, 4458 .num_config = ARRAY_SIZE(sc8180x_cfg), 4459 }; 4460 4461 static const struct qcom_sct_config sc8280xp_cfgs = { 4462 .llcc_config = sc8280xp_cfg, 4463 .num_config = ARRAY_SIZE(sc8280xp_cfg), 4464 }; 4465 4466 static const struct qcom_sct_config sdm670_cfgs = { 4467 .llcc_config = sdm670_cfg, 4468 .num_config = ARRAY_SIZE(sdm670_cfg), 4469 }; 4470 4471 static const struct qcom_sct_config sdm845_cfgs = { 4472 .llcc_config = sdm845_cfg, 4473 .num_config = ARRAY_SIZE(sdm845_cfg), 4474 }; 4475 4476 static const struct qcom_sct_config sm6350_cfgs = { 4477 .llcc_config = sm6350_cfg, 4478 .num_config = ARRAY_SIZE(sm6350_cfg), 4479 }; 4480 4481 static const struct qcom_sct_config sm7150_cfgs = { 4482 .llcc_config = sm7150_cfg, 4483 .num_config = ARRAY_SIZE(sm7150_cfg), 4484 }; 4485 4486 static const struct qcom_sct_config sm8150_cfgs = { 4487 .llcc_config = sm8150_cfg, 4488 .num_config = ARRAY_SIZE(sm8150_cfg), 4489 }; 4490 4491 static const struct qcom_sct_config sm8250_cfgs = { 4492 .llcc_config = sm8250_cfg, 4493 .num_config = ARRAY_SIZE(sm8250_cfg), 4494 }; 4495 4496 static const struct qcom_sct_config sm8350_cfgs = { 4497 .llcc_config = sm8350_cfg, 4498 .num_config = ARRAY_SIZE(sm8350_cfg), 4499 }; 4500 4501 static const struct qcom_sct_config sm8450_cfgs = { 4502 .llcc_config = sm8450_cfg, 4503 .num_config = ARRAY_SIZE(sm8450_cfg), 4504 }; 4505 4506 static const struct qcom_sct_config sm8550_cfgs = { 4507 .llcc_config = sm8550_cfg, 4508 .num_config = ARRAY_SIZE(sm8550_cfg), 4509 }; 4510 4511 static const struct qcom_sct_config sm8650_cfgs = { 4512 .llcc_config = sm8650_cfg, 4513 .num_config = ARRAY_SIZE(sm8650_cfg), 4514 }; 4515 4516 static const struct qcom_sct_config sm8750_cfgs = { 4517 .llcc_config = sm8750_cfg, 4518 .num_config = ARRAY_SIZE(sm8750_cfg), 4519 }; 4520 4521 static const struct qcom_sct_config x1e80100_cfgs = { 4522 .llcc_config = x1e80100_cfg, 4523 .num_config = ARRAY_SIZE(x1e80100_cfg), 4524 }; 4525 4526 static struct llcc_drv_data *drv_data = (void *) -EPROBE_DEFER; 4527 4528 /** 4529 * llcc_slice_getd - get llcc slice descriptor 4530 * @uid: usecase_id for the client 4531 * 4532 * A pointer to llcc slice descriptor will be returned on success 4533 * and error pointer is returned on failure 4534 */ 4535 struct llcc_slice_desc *llcc_slice_getd(u32 uid) 4536 { 4537 const struct llcc_slice_config *cfg; 4538 struct llcc_slice_desc *desc; 4539 u32 sz, count; 4540 4541 if (IS_ERR(drv_data)) 4542 return ERR_CAST(drv_data); 4543 4544 cfg = drv_data->cfg; 4545 sz = drv_data->cfg_size; 4546 4547 for (count = 0; cfg && count < sz; count++, cfg++) 4548 if (cfg->usecase_id == uid) 4549 break; 4550 4551 if (count == sz || !cfg) 4552 return ERR_PTR(-ENODEV); 4553 4554 desc = kzalloc_obj(*desc); 4555 if (!desc) 4556 return ERR_PTR(-ENOMEM); 4557 4558 desc->slice_id = cfg->slice_id; 4559 desc->slice_size = cfg->max_cap; 4560 4561 return desc; 4562 } 4563 EXPORT_SYMBOL_GPL(llcc_slice_getd); 4564 4565 /** 4566 * llcc_slice_putd - llcc slice descriptor 4567 * @desc: Pointer to llcc slice descriptor 4568 */ 4569 void llcc_slice_putd(struct llcc_slice_desc *desc) 4570 { 4571 if (!IS_ERR_OR_NULL(desc)) 4572 kfree(desc); 4573 } 4574 EXPORT_SYMBOL_GPL(llcc_slice_putd); 4575 4576 static int llcc_update_act_ctrl(u32 sid, 4577 u32 act_ctrl_reg_val, u32 status) 4578 { 4579 struct regmap *regmap; 4580 u32 act_ctrl_reg; 4581 u32 act_clear_reg; 4582 u32 status_reg; 4583 u32 slice_status; 4584 int ret; 4585 4586 if (IS_ERR(drv_data)) 4587 return PTR_ERR(drv_data); 4588 4589 act_ctrl_reg = LLCC_TRP_ACT_CTRLn(sid); 4590 act_clear_reg = LLCC_TRP_ACT_CLEARn(sid); 4591 status_reg = LLCC_TRP_STATUSn(sid); 4592 4593 /* Set the ACTIVE trigger */ 4594 act_ctrl_reg_val |= ACT_CTRL_ACT_TRIG; 4595 ret = regmap_write(drv_data->bcast_regmap, act_ctrl_reg, 4596 act_ctrl_reg_val); 4597 if (ret) 4598 return ret; 4599 4600 /* Clear the ACTIVE trigger */ 4601 act_ctrl_reg_val &= ~ACT_CTRL_ACT_TRIG; 4602 ret = regmap_write(drv_data->bcast_regmap, act_ctrl_reg, 4603 act_ctrl_reg_val); 4604 if (ret) 4605 return ret; 4606 4607 if (drv_data->version >= LLCC_VERSION_4_1_0_0) { 4608 regmap = drv_data->bcast_and_regmap ?: drv_data->bcast_regmap; 4609 ret = regmap_read_poll_timeout(regmap, status_reg, 4610 slice_status, (slice_status & ACT_COMPLETE), 4611 0, LLCC_STATUS_READ_DELAY); 4612 if (ret) 4613 return ret; 4614 } 4615 4616 ret = regmap_read_poll_timeout(drv_data->bcast_regmap, status_reg, 4617 slice_status, !(slice_status & status), 4618 0, LLCC_STATUS_READ_DELAY); 4619 if (ret) 4620 return ret; 4621 4622 if (drv_data->version >= LLCC_VERSION_4_1_0_0) 4623 ret = regmap_write(drv_data->bcast_regmap, act_clear_reg, 4624 ACT_CLEAR); 4625 4626 return ret; 4627 } 4628 4629 /** 4630 * llcc_slice_activate - Activate the llcc slice 4631 * @desc: Pointer to llcc slice descriptor 4632 * 4633 * A value of zero will be returned on success and a negative errno will 4634 * be returned in error cases 4635 */ 4636 int llcc_slice_activate(struct llcc_slice_desc *desc) 4637 { 4638 int ret; 4639 u32 act_ctrl_val; 4640 4641 if (IS_ERR(drv_data)) 4642 return PTR_ERR(drv_data); 4643 4644 if (IS_ERR_OR_NULL(desc)) 4645 return -EINVAL; 4646 4647 mutex_lock(&drv_data->lock); 4648 if (test_bit(desc->slice_id, drv_data->bitmap)) { 4649 mutex_unlock(&drv_data->lock); 4650 return 0; 4651 } 4652 4653 act_ctrl_val = ACT_CTRL_OPCODE_ACTIVATE << ACT_CTRL_OPCODE_SHIFT; 4654 4655 ret = llcc_update_act_ctrl(desc->slice_id, act_ctrl_val, 4656 DEACTIVATE); 4657 if (ret) { 4658 mutex_unlock(&drv_data->lock); 4659 return ret; 4660 } 4661 4662 __set_bit(desc->slice_id, drv_data->bitmap); 4663 mutex_unlock(&drv_data->lock); 4664 4665 return ret; 4666 } 4667 EXPORT_SYMBOL_GPL(llcc_slice_activate); 4668 4669 /** 4670 * llcc_slice_deactivate - Deactivate the llcc slice 4671 * @desc: Pointer to llcc slice descriptor 4672 * 4673 * A value of zero will be returned on success and a negative errno will 4674 * be returned in error cases 4675 */ 4676 int llcc_slice_deactivate(struct llcc_slice_desc *desc) 4677 { 4678 u32 act_ctrl_val; 4679 int ret; 4680 4681 if (IS_ERR(drv_data)) 4682 return PTR_ERR(drv_data); 4683 4684 if (IS_ERR_OR_NULL(desc)) 4685 return -EINVAL; 4686 4687 mutex_lock(&drv_data->lock); 4688 if (!test_bit(desc->slice_id, drv_data->bitmap)) { 4689 mutex_unlock(&drv_data->lock); 4690 return 0; 4691 } 4692 act_ctrl_val = ACT_CTRL_OPCODE_DEACTIVATE << ACT_CTRL_OPCODE_SHIFT; 4693 4694 ret = llcc_update_act_ctrl(desc->slice_id, act_ctrl_val, 4695 ACTIVATE); 4696 if (ret) { 4697 mutex_unlock(&drv_data->lock); 4698 return ret; 4699 } 4700 4701 __clear_bit(desc->slice_id, drv_data->bitmap); 4702 mutex_unlock(&drv_data->lock); 4703 4704 return ret; 4705 } 4706 EXPORT_SYMBOL_GPL(llcc_slice_deactivate); 4707 4708 /** 4709 * llcc_get_slice_id - return the slice id 4710 * @desc: Pointer to llcc slice descriptor 4711 */ 4712 int llcc_get_slice_id(struct llcc_slice_desc *desc) 4713 { 4714 if (IS_ERR_OR_NULL(desc)) 4715 return -EINVAL; 4716 4717 return desc->slice_id; 4718 } 4719 EXPORT_SYMBOL_GPL(llcc_get_slice_id); 4720 4721 /** 4722 * llcc_get_slice_size - return the slice id 4723 * @desc: Pointer to llcc slice descriptor 4724 */ 4725 size_t llcc_get_slice_size(struct llcc_slice_desc *desc) 4726 { 4727 if (IS_ERR_OR_NULL(desc)) 4728 return 0; 4729 4730 return desc->slice_size; 4731 } 4732 EXPORT_SYMBOL_GPL(llcc_get_slice_size); 4733 4734 static int _qcom_llcc_cfg_program(const struct llcc_slice_config *config, 4735 const struct qcom_llcc_config *cfg) 4736 { 4737 int ret; 4738 u32 attr2_cfg; 4739 u32 attr1_cfg; 4740 u32 attr0_cfg; 4741 u32 attr2_val; 4742 u32 attr1_val; 4743 u32 attr0_val; 4744 u32 max_cap_cacheline; 4745 struct llcc_slice_desc desc; 4746 4747 attr1_val = config->cache_mode; 4748 attr1_val |= config->probe_target_ways << ATTR1_PROBE_TARGET_WAYS_SHIFT; 4749 attr1_val |= config->fixed_size << ATTR1_FIXED_SIZE_SHIFT; 4750 attr1_val |= config->priority << ATTR1_PRIORITY_SHIFT; 4751 4752 max_cap_cacheline = MAX_CAP_TO_BYTES(config->max_cap); 4753 4754 /* 4755 * LLCC instances can vary for each target. 4756 * The SW writes to broadcast register which gets propagated 4757 * to each llcc instance (llcc0,.. llccN). 4758 * Since the size of the memory is divided equally amongst the 4759 * llcc instances, we need to configure the max cap accordingly. 4760 */ 4761 max_cap_cacheline = max_cap_cacheline / drv_data->num_banks; 4762 max_cap_cacheline >>= CACHE_LINE_SIZE_SHIFT; 4763 if (cfg->max_cap_shift) 4764 attr1_val |= max_cap_cacheline << cfg->max_cap_shift; 4765 else 4766 attr1_val |= max_cap_cacheline << ATTR1_MAX_CAP_SHIFT; 4767 4768 attr1_cfg = LLCC_TRP_ATTR1_CFGn(config->slice_id); 4769 4770 ret = regmap_write(drv_data->bcast_regmap, attr1_cfg, attr1_val); 4771 if (ret) 4772 return ret; 4773 4774 if (drv_data->version >= LLCC_VERSION_4_1_0_0) { 4775 attr2_cfg = LLCC_TRP_ATTR2_CFGn(config->slice_id); 4776 attr0_val = config->res_ways; 4777 attr2_val = config->bonus_ways; 4778 } else { 4779 attr0_val = config->res_ways & ATTR0_RES_WAYS_MASK; 4780 attr0_val |= config->bonus_ways << ATTR0_BONUS_WAYS_SHIFT; 4781 } 4782 4783 attr0_cfg = LLCC_TRP_ATTR0_CFGn(config->slice_id); 4784 4785 ret = regmap_write(drv_data->bcast_regmap, attr0_cfg, attr0_val); 4786 if (ret) 4787 return ret; 4788 4789 if (drv_data->version >= LLCC_VERSION_4_1_0_0) { 4790 ret = regmap_write(drv_data->bcast_regmap, attr2_cfg, attr2_val); 4791 if (ret) 4792 return ret; 4793 } 4794 4795 /* At least SDM845 disallows non-secure writes to these registers */ 4796 if (!cfg->skip_llcc_cfg) { 4797 u32 disable_cap_alloc, retain_pc; 4798 4799 disable_cap_alloc = config->dis_cap_alloc << config->slice_id; 4800 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_SCID_DIS_CAP_ALLOC, 4801 BIT(config->slice_id), disable_cap_alloc); 4802 if (ret) 4803 return ret; 4804 4805 if (drv_data->version < LLCC_VERSION_4_1_0_0) { 4806 retain_pc = config->retain_on_pc << config->slice_id; 4807 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_PCB_ACT, 4808 BIT(config->slice_id), retain_pc); 4809 if (ret) 4810 return ret; 4811 } 4812 } 4813 4814 if (drv_data->version >= LLCC_VERSION_2_0_0_0) { 4815 u32 wren; 4816 4817 wren = config->write_scid_en << config->slice_id; 4818 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_WRSC_EN, 4819 BIT(config->slice_id), wren); 4820 if (ret) 4821 return ret; 4822 } 4823 4824 if (drv_data->version >= LLCC_VERSION_2_1_0_0) { 4825 u32 wr_cache_en; 4826 4827 wr_cache_en = config->write_scid_cacheable_en << config->slice_id; 4828 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_WRSC_CACHEABLE_EN, 4829 BIT(config->slice_id), wr_cache_en); 4830 if (ret) 4831 return ret; 4832 } 4833 4834 if (drv_data->version >= LLCC_VERSION_4_1_0_0) { 4835 u32 stale_en; 4836 u32 stale_cap_en; 4837 u32 mru_uncap_en; 4838 u32 mru_rollover; 4839 u32 alloc_oneway_en; 4840 u32 ovcap_en; 4841 u32 ovcap_prio; 4842 u32 vict_prio; 4843 4844 stale_en = config->stale_en << config->slice_id; 4845 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG1, 4846 BIT(config->slice_id), stale_en); 4847 if (ret) 4848 return ret; 4849 4850 stale_cap_en = config->stale_cap_en << config->slice_id; 4851 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG2, 4852 BIT(config->slice_id), stale_cap_en); 4853 if (ret) 4854 return ret; 4855 4856 mru_uncap_en = config->mru_uncap_en << config->slice_id; 4857 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG3, 4858 BIT(config->slice_id), mru_uncap_en); 4859 if (ret) 4860 return ret; 4861 4862 mru_rollover = config->mru_rollover << config->slice_id; 4863 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG4, 4864 BIT(config->slice_id), mru_rollover); 4865 if (ret) 4866 return ret; 4867 4868 alloc_oneway_en = config->alloc_oneway_en << config->slice_id; 4869 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG5, 4870 BIT(config->slice_id), alloc_oneway_en); 4871 if (ret) 4872 return ret; 4873 4874 ovcap_en = config->ovcap_en << config->slice_id; 4875 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG6, 4876 BIT(config->slice_id), ovcap_en); 4877 if (ret) 4878 return ret; 4879 4880 ovcap_prio = config->ovcap_prio << config->slice_id; 4881 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG7, 4882 BIT(config->slice_id), ovcap_prio); 4883 if (ret) 4884 return ret; 4885 4886 vict_prio = config->vict_prio << config->slice_id; 4887 ret = regmap_update_bits(drv_data->bcast_regmap, LLCC_TRP_ALGO_CFG8, 4888 BIT(config->slice_id), vict_prio); 4889 if (ret) 4890 return ret; 4891 } 4892 4893 if (config->activate_on_init) { 4894 desc.slice_id = config->slice_id; 4895 ret = llcc_slice_activate(&desc); 4896 } 4897 4898 return ret; 4899 } 4900 4901 static int _qcom_llcc_cfg_program_v6(const struct llcc_slice_config *config, 4902 const struct qcom_llcc_config *cfg) 4903 { 4904 u32 stale_en, stale_cap_en, mru_uncap_en, mru_rollover; 4905 u32 alloc_oneway_en, ovcap_en, ovcap_prio, vict_prio; 4906 u32 attr0_cfg, attr1_cfg, attr2_cfg, attr3_cfg; 4907 u32 attr0_val, attr1_val, attr2_val, attr3_val; 4908 u32 slice_offset, reg_offset; 4909 struct llcc_slice_desc *desc; 4910 u32 wren, wr_cache_en; 4911 int ret; 4912 4913 attr0_cfg = LLCC_V6_TRP_ATTR0_CFGn(config->slice_id); 4914 attr1_cfg = LLCC_V6_TRP_ATTR1_CFGn(config->slice_id); 4915 attr2_cfg = LLCC_V6_TRP_ATTR2_CFGn(config->slice_id); 4916 attr3_cfg = LLCC_V6_TRP_ATTR3_CFGn(config->slice_id); 4917 4918 attr0_val = config->res_ways; 4919 attr1_val = config->bonus_ways; 4920 attr2_val = config->cache_mode; 4921 attr2_val |= FIELD_PREP(ATTR2_PROBE_TARGET_WAYS_MASK, config->probe_target_ways); 4922 attr2_val |= FIELD_PREP(ATTR2_FIXED_SIZE_MASK, config->fixed_size); 4923 attr2_val |= FIELD_PREP(ATTR2_PRIORITY_MASK, config->priority); 4924 4925 if (config->parent_slice_id && config->fixed_size) { 4926 attr2_val |= FIELD_PREP(ATTR2_PARENT_SCID_MASK, config->parent_slice_id); 4927 attr2_val |= ATTR2_IN_A_GROUP_MASK; 4928 } 4929 4930 attr3_val = MAX_CAP_TO_BYTES(config->max_cap); 4931 attr3_val /= drv_data->num_banks; 4932 attr3_val >>= CACHE_LINE_SIZE_SHIFT; 4933 4934 ret = regmap_write(drv_data->bcast_regmap, attr0_cfg, attr0_val); 4935 if (ret) 4936 return ret; 4937 4938 ret = regmap_write(drv_data->bcast_regmap, attr1_cfg, attr1_val); 4939 if (ret) 4940 return ret; 4941 4942 ret = regmap_write(drv_data->bcast_regmap, attr2_cfg, attr2_val); 4943 if (ret) 4944 return ret; 4945 4946 ret = regmap_write(drv_data->bcast_regmap, attr3_cfg, attr3_val); 4947 if (ret) 4948 return ret; 4949 4950 slice_offset = config->slice_id % 32; 4951 reg_offset = (config->slice_id / 32) * 4; 4952 4953 wren = config->write_scid_en << slice_offset; 4954 ret = regmap_update_bits(drv_data->bcast_regmap, 4955 cfg->reg_offset[LLCC_TRP_WRS_EN] + reg_offset, 4956 BIT(slice_offset), wren); 4957 if (ret) 4958 return ret; 4959 4960 wr_cache_en = config->write_scid_cacheable_en << slice_offset; 4961 ret = regmap_update_bits(drv_data->bcast_regmap, 4962 cfg->reg_offset[LLCC_TRP_WRS_CACHEABLE_EN] + reg_offset, 4963 BIT(slice_offset), wr_cache_en); 4964 if (ret) 4965 return ret; 4966 4967 stale_en = config->stale_en << slice_offset; 4968 ret = regmap_update_bits(drv_data->bcast_regmap, 4969 cfg->reg_offset[LLCC_TRP_ALGO_STALE_EN] + reg_offset, 4970 BIT(slice_offset), stale_en); 4971 if (ret) 4972 return ret; 4973 4974 stale_cap_en = config->stale_cap_en << slice_offset; 4975 ret = regmap_update_bits(drv_data->bcast_regmap, 4976 cfg->reg_offset[LLCC_TRP_ALGO_STALE_CAP_EN] + reg_offset, 4977 BIT(slice_offset), stale_cap_en); 4978 if (ret) 4979 return ret; 4980 4981 mru_uncap_en = config->mru_uncap_en << slice_offset; 4982 ret = regmap_update_bits(drv_data->bcast_regmap, 4983 cfg->reg_offset[LLCC_TRP_ALGO_MRU0] + reg_offset, 4984 BIT(slice_offset), mru_uncap_en); 4985 if (ret) 4986 return ret; 4987 4988 mru_rollover = config->mru_rollover << slice_offset; 4989 ret = regmap_update_bits(drv_data->bcast_regmap, 4990 cfg->reg_offset[LLCC_TRP_ALGO_MRU1] + reg_offset, 4991 BIT(slice_offset), mru_rollover); 4992 if (ret) 4993 return ret; 4994 4995 alloc_oneway_en = config->alloc_oneway_en << slice_offset; 4996 ret = regmap_update_bits(drv_data->bcast_regmap, 4997 cfg->reg_offset[LLCC_TRP_ALGO_ALLOC0] + reg_offset, 4998 BIT(slice_offset), alloc_oneway_en); 4999 if (ret) 5000 return ret; 5001 5002 ovcap_en = config->ovcap_en << slice_offset; 5003 ret = regmap_update_bits(drv_data->bcast_regmap, 5004 cfg->reg_offset[LLCC_TRP_ALGO_ALLOC1] + reg_offset, 5005 BIT(slice_offset), ovcap_en); 5006 if (ret) 5007 return ret; 5008 5009 ovcap_prio = config->ovcap_prio << slice_offset; 5010 ret = regmap_update_bits(drv_data->bcast_regmap, 5011 cfg->reg_offset[LLCC_TRP_ALGO_ALLOC2] + reg_offset, 5012 BIT(slice_offset), ovcap_prio); 5013 if (ret) 5014 return ret; 5015 5016 vict_prio = config->vict_prio << slice_offset; 5017 ret = regmap_update_bits(drv_data->bcast_regmap, 5018 cfg->reg_offset[LLCC_TRP_ALGO_ALLOC3] + reg_offset, 5019 BIT(slice_offset), vict_prio); 5020 if (ret) 5021 return ret; 5022 5023 if (config->activate_on_init) { 5024 desc = llcc_slice_getd(config->usecase_id); 5025 if (PTR_ERR_OR_ZERO(desc)) 5026 return -EINVAL; 5027 5028 ret = llcc_slice_activate(desc); 5029 } 5030 5031 return ret; 5032 } 5033 5034 static int qcom_llcc_cfg_program(struct platform_device *pdev, 5035 const struct qcom_llcc_config *cfg) 5036 { 5037 int i; 5038 u32 sz; 5039 int ret = 0; 5040 const struct llcc_slice_config *llcc_table; 5041 5042 sz = drv_data->cfg_size; 5043 llcc_table = drv_data->cfg; 5044 5045 if (drv_data->version >= LLCC_VERSION_6_0_0_0) { 5046 for (i = 0; i < sz; i++) { 5047 ret = _qcom_llcc_cfg_program_v6(&llcc_table[i], cfg); 5048 if (ret) 5049 return ret; 5050 } 5051 } else { 5052 for (i = 0; i < sz; i++) { 5053 ret = _qcom_llcc_cfg_program(&llcc_table[i], cfg); 5054 if (ret) 5055 return ret; 5056 } 5057 } 5058 5059 return ret; 5060 } 5061 5062 static int qcom_llcc_get_cfg_index(struct platform_device *pdev, u8 *cfg_index, int num_config) 5063 { 5064 int ret; 5065 5066 ret = nvmem_cell_read_u8(&pdev->dev, "multi-chan-ddr", cfg_index); 5067 if (ret == -ENOENT || ret == -EOPNOTSUPP) { 5068 if (num_config > 1) 5069 return -EINVAL; 5070 *cfg_index = 0; 5071 return 0; 5072 } 5073 5074 if (!ret && *cfg_index >= num_config) 5075 ret = -EINVAL; 5076 5077 return ret; 5078 } 5079 5080 static void qcom_llcc_remove(struct platform_device *pdev) 5081 { 5082 /* Set the global pointer to a error code to avoid referencing it */ 5083 drv_data = ERR_PTR(-ENODEV); 5084 } 5085 5086 static struct regmap *qcom_llcc_init_mmio(struct platform_device *pdev, u8 index, 5087 const char *name) 5088 { 5089 void __iomem *base; 5090 struct regmap_config llcc_regmap_config = { 5091 .reg_bits = 32, 5092 .reg_stride = 4, 5093 .val_bits = 32, 5094 }; 5095 5096 base = devm_platform_ioremap_resource(pdev, index); 5097 if (IS_ERR(base)) 5098 return ERR_CAST(base); 5099 5100 llcc_regmap_config.name = name; 5101 return devm_regmap_init_mmio(&pdev->dev, base, &llcc_regmap_config); 5102 } 5103 5104 static int qcom_llcc_probe(struct platform_device *pdev) 5105 { 5106 u32 num_banks; 5107 struct device *dev = &pdev->dev; 5108 int ret, i; 5109 struct platform_device *llcc_edac; 5110 const struct qcom_sct_config *cfgs; 5111 const struct qcom_llcc_config *cfg; 5112 const struct llcc_slice_config *llcc_cfg; 5113 u32 sz; 5114 u8 cfg_index; 5115 u32 version; 5116 struct regmap *regmap; 5117 5118 if (!IS_ERR(drv_data)) 5119 return -EBUSY; 5120 5121 drv_data = devm_kzalloc(dev, sizeof(*drv_data), GFP_KERNEL); 5122 if (!drv_data) { 5123 ret = -ENOMEM; 5124 goto err; 5125 } 5126 5127 /* Initialize the first LLCC bank regmap */ 5128 regmap = qcom_llcc_init_mmio(pdev, 0, "llcc0_base"); 5129 if (IS_ERR(regmap)) { 5130 ret = PTR_ERR(regmap); 5131 goto err; 5132 } 5133 5134 cfgs = of_device_get_match_data(&pdev->dev); 5135 if (!cfgs) { 5136 ret = -EINVAL; 5137 goto err; 5138 } 5139 ret = qcom_llcc_get_cfg_index(pdev, &cfg_index, cfgs->num_config); 5140 if (ret) 5141 goto err; 5142 cfg = &cfgs->llcc_config[cfg_index]; 5143 5144 if (cfg->num_banks) { 5145 num_banks = cfg->num_banks; 5146 } else { 5147 ret = regmap_read(regmap, cfg->reg_offset[LLCC_COMMON_STATUS0], &num_banks); 5148 if (ret) 5149 goto err; 5150 5151 num_banks &= LLCC_LB_CNT_MASK; 5152 num_banks >>= LLCC_LB_CNT_SHIFT; 5153 } 5154 5155 drv_data->num_banks = num_banks; 5156 5157 drv_data->regmaps = devm_kcalloc(dev, num_banks, sizeof(*drv_data->regmaps), GFP_KERNEL); 5158 if (!drv_data->regmaps) { 5159 ret = -ENOMEM; 5160 goto err; 5161 } 5162 5163 drv_data->regmaps[0] = regmap; 5164 5165 /* Initialize rest of LLCC bank regmaps */ 5166 for (i = 1; i < num_banks; i++) { 5167 char *base __free(kfree) = kasprintf(GFP_KERNEL, "llcc%d_base", i); 5168 5169 drv_data->regmaps[i] = qcom_llcc_init_mmio(pdev, i, base); 5170 if (IS_ERR(drv_data->regmaps[i])) { 5171 ret = PTR_ERR(drv_data->regmaps[i]); 5172 goto err; 5173 } 5174 } 5175 5176 drv_data->bcast_regmap = qcom_llcc_init_mmio(pdev, i, "llcc_broadcast_base"); 5177 if (IS_ERR(drv_data->bcast_regmap)) { 5178 if (cfg->no_broadcast_register) { 5179 drv_data->bcast_regmap = regmap; 5180 } else { 5181 ret = PTR_ERR(drv_data->bcast_regmap); 5182 goto err; 5183 } 5184 } 5185 5186 /* Extract version of the IP */ 5187 ret = regmap_read(drv_data->bcast_regmap, cfg->reg_offset[LLCC_COMMON_HW_INFO], 5188 &version); 5189 if (ret) 5190 goto err; 5191 5192 drv_data->version = version; 5193 5194 /* Applicable only when drv_data->version >= 4.1 */ 5195 if (drv_data->version >= LLCC_VERSION_4_1_0_0) { 5196 drv_data->bcast_and_regmap = qcom_llcc_init_mmio(pdev, i + 1, "llcc_broadcast_and_base"); 5197 if (IS_ERR(drv_data->bcast_and_regmap)) { 5198 ret = PTR_ERR(drv_data->bcast_and_regmap); 5199 if (ret == -EINVAL) 5200 drv_data->bcast_and_regmap = NULL; 5201 else 5202 goto err; 5203 } 5204 } 5205 5206 llcc_cfg = cfg->sct_data; 5207 sz = cfg->size; 5208 5209 for (i = 0; i < sz; i++) 5210 if (llcc_cfg[i].slice_id > drv_data->max_slices) 5211 drv_data->max_slices = llcc_cfg[i].slice_id; 5212 5213 drv_data->bitmap = devm_bitmap_zalloc(dev, drv_data->max_slices, 5214 GFP_KERNEL); 5215 if (!drv_data->bitmap) { 5216 ret = -ENOMEM; 5217 goto err; 5218 } 5219 5220 drv_data->cfg = llcc_cfg; 5221 drv_data->cfg_size = sz; 5222 drv_data->edac_reg_offset = cfg->edac_reg_offset; 5223 drv_data->ecc_irq_configured = cfg->irq_configured; 5224 mutex_init(&drv_data->lock); 5225 platform_set_drvdata(pdev, drv_data); 5226 5227 ret = qcom_llcc_cfg_program(pdev, cfg); 5228 if (ret) 5229 goto err; 5230 5231 drv_data->ecc_irq = platform_get_irq_optional(pdev, 0); 5232 5233 /* 5234 * On some platforms, the access to EDAC registers will be locked by 5235 * the bootloader. So probing the EDAC driver will result in a crash. 5236 * Hence, disable the creation of EDAC platform device for the 5237 * problematic platforms. 5238 */ 5239 if (!cfg->no_edac) { 5240 llcc_edac = platform_device_register_data(&pdev->dev, 5241 "qcom_llcc_edac", -1, drv_data, 5242 sizeof(*drv_data)); 5243 if (IS_ERR(llcc_edac)) 5244 dev_err(dev, "Failed to register llcc edac driver\n"); 5245 } 5246 5247 return 0; 5248 err: 5249 drv_data = ERR_PTR(-ENODEV); 5250 return ret; 5251 } 5252 5253 static const struct of_device_id qcom_llcc_of_match[] = { 5254 { .compatible = "qcom,glymur-llcc", .data = &glymur_cfgs }, 5255 { .compatible = "qcom,ipq5424-llcc", .data = &ipq5424_cfgs}, 5256 { .compatible = "qcom,kaanapali-llcc", .data = &kaanapali_cfgs}, 5257 { .compatible = "qcom,qcs615-llcc", .data = &qcs615_cfgs}, 5258 { .compatible = "qcom,qcs8300-llcc", .data = &qcs8300_cfgs}, 5259 { .compatible = "qcom,qdu1000-llcc", .data = &qdu1000_cfgs}, 5260 { .compatible = "qcom,sa8775p-llcc", .data = &sa8775p_cfgs }, 5261 { .compatible = "qcom,sar1130p-llcc", .data = &sar1130p_cfgs }, 5262 { .compatible = "qcom,sar2130p-llcc", .data = &sar2130p_cfgs }, 5263 { .compatible = "qcom,sc7180-llcc", .data = &sc7180_cfgs }, 5264 { .compatible = "qcom,sc7280-llcc", .data = &sc7280_cfgs }, 5265 { .compatible = "qcom,sc8180x-llcc", .data = &sc8180x_cfgs }, 5266 { .compatible = "qcom,sc8280xp-llcc", .data = &sc8280xp_cfgs }, 5267 { .compatible = "qcom,sdm670-llcc", .data = &sdm670_cfgs }, 5268 { .compatible = "qcom,sdm845-llcc", .data = &sdm845_cfgs }, 5269 { .compatible = "qcom,sm6350-llcc", .data = &sm6350_cfgs }, 5270 { .compatible = "qcom,sm7150-llcc", .data = &sm7150_cfgs }, 5271 { .compatible = "qcom,sm8150-llcc", .data = &sm8150_cfgs }, 5272 { .compatible = "qcom,sm8250-llcc", .data = &sm8250_cfgs }, 5273 { .compatible = "qcom,sm8350-llcc", .data = &sm8350_cfgs }, 5274 { .compatible = "qcom,sm8450-llcc", .data = &sm8450_cfgs }, 5275 { .compatible = "qcom,sm8550-llcc", .data = &sm8550_cfgs }, 5276 { .compatible = "qcom,sm8650-llcc", .data = &sm8650_cfgs }, 5277 { .compatible = "qcom,sm8750-llcc", .data = &sm8750_cfgs }, 5278 { .compatible = "qcom,x1e80100-llcc", .data = &x1e80100_cfgs }, 5279 { } 5280 }; 5281 MODULE_DEVICE_TABLE(of, qcom_llcc_of_match); 5282 5283 static struct platform_driver qcom_llcc_driver = { 5284 .driver = { 5285 .name = "qcom-llcc", 5286 .of_match_table = qcom_llcc_of_match, 5287 }, 5288 .probe = qcom_llcc_probe, 5289 .remove = qcom_llcc_remove, 5290 }; 5291 module_platform_driver(qcom_llcc_driver); 5292 5293 MODULE_DESCRIPTION("Qualcomm Last Level Cache Controller"); 5294 MODULE_LICENSE("GPL v2"); 5295