xref: /linux/drivers/soc/qcom/Kconfig (revision f4cdf7ca9a1fdcca413157df19753f388a5a224e)
1# SPDX-License-Identifier: GPL-2.0-only
2#
3# QCOM Soc drivers
4#
5menuconfig QCOM_SOC
6	bool "Qualcomm SoC drivers"
7	depends on ARCH_QCOM || COMPILE_TEST
8	default ARCH_QCOM
9	help
10	  This collection of drivers is specific to Qualcomm System-on-Chips
11	  and most of them are necessary for a fully functional boot of the
12	  Linux kernel (plus a few debugging drivers).
13	  Drivers can be skipped when building Linux kernel not intended to run
14	  said processors.
15
16if QCOM_SOC
17
18config QCOM_AOSS_QMP
19	tristate "Qualcomm AOSS Driver"
20	depends on MAILBOX
21	depends on COMMON_CLK && PM
22	select PM_GENERIC_DOMAINS
23	default ARCH_QCOM
24	help
25	  This driver provides the means of communicating with and controlling
26	  the low-power state for resources related to the remoteproc
27	  subsystems as well as controlling the debug clocks exposed by the Always On
28	  Subsystem (AOSS) using Qualcomm Messaging Protocol (QMP).
29
30config QCOM_COMMAND_DB
31	tristate "Qualcomm Command DB"
32	depends on OF_RESERVED_MEM
33	default ARCH_QCOM
34	help
35	  Command DB queries shared memory by key string for shared system
36	  resources. Platform drivers that require to set state of a shared
37	  resource on a RPM-hardened platform must use this database to get
38	  SoC specific identifier and information for the shared resources.
39
40config QCOM_GENI_SE
41	tristate "Qualcomm GENI Serial Engine Driver"
42	depends on ARM64 || COMPILE_TEST
43	default ARCH_QCOM
44	help
45	  This driver is used to manage Generic Interface (GENI) firmware based
46	  Qualcomm Technologies, Inc. Universal Peripheral (QUP) Wrapper. This
47	  driver is also used to manage the common aspects of multiple Serial
48	  Engines present in the QUP.
49
50config QCOM_GSBI
51	tristate "Qualcomm General Serial Bus Interface"
52	depends on ARM || COMPILE_TEST
53	default ARCH_QCOM
54	select MFD_SYSCON
55	help
56	  Say y here to enable GSBI support.  The GSBI provides control
57	  functions for connecting the underlying serial UART, SPI, and I2C
58	  devices to the output pins.
59
60config QCOM_LLCC
61	tristate "Qualcomm LLCC driver"
62	select REGMAP_MMIO
63	default m if ARCH_QCOM
64	help
65	  Qualcomm Technologies, Inc. platform specific
66	  Last Level Cache Controller(LLCC) driver for platforms such as,
67	  SDM845. This provides interfaces to clients that use the LLCC.
68	  Say yes here to enable LLCC slice driver.
69
70config QCOM_OCMEM
71	tristate "Qualcomm On Chip Memory (OCMEM) driver"
72	select QCOM_SCM
73	default m if ARCH_QCOM
74	help
75	  The On Chip Memory (OCMEM) allocator allows various clients to
76	  allocate memory from OCMEM based on performance, latency and power
77	  requirements. This is typically used by the GPU, camera/video, and
78	  audio components on some Snapdragon SoCs.
79
80config QCOM_PD_MAPPER
81	tristate "Qualcomm Protection Domain Mapper"
82	select QCOM_QMI_HELPERS
83	select QCOM_PDR_MSG
84	select AUXILIARY_BUS
85	depends on NET && QRTR
86	default QCOM_RPROC_COMMON
87	help
88	  The Protection Domain Mapper maps registered services to the domains
89	  and instances handled by the remote DSPs. This is a kernel-space
90	  implementation of the service. It is a simpler alternative to the
91	  userspace daemon.
92
93config QCOM_PMIC_PDCHARGER_ULOG
94	tristate "Qualcomm PMIC PDCharger ULOG driver"
95	depends on RPMSG
96	depends on EVENT_TRACING
97	help
98	  The Qualcomm PMIC PDCharger ULOG driver provides access to logs of
99	  the ADSP firmware PDCharger module in charge of Battery and Power
100	  Delivery on modern systems.
101
102	  Say yes here to support PDCharger ULOG event tracing on modern
103	  Qualcomm platforms.
104
105config QCOM_PMIC_GLINK
106	tristate "Qualcomm PMIC GLINK driver"
107	depends on RPMSG
108	depends on TYPEC
109	depends on DRM
110	depends on NET
111	depends on OF
112	depends on ARM64 || COMPILE_TEST
113	select AUXILIARY_BUS
114	select QCOM_PDR_HELPERS
115	select DRM_AUX_HPD_BRIDGE
116	default m if ARCH_QCOM
117	help
118	  The Qualcomm PMIC GLINK driver provides access, over GLINK, to the
119	  USB and battery firmware running on one of the coprocessors in
120	  several modern Qualcomm platforms.
121
122	  Say yes here to support USB-C and battery status on modern Qualcomm
123	  platforms.
124
125config QCOM_RAMP_CTRL
126	tristate "Qualcomm Ramp Controller driver"
127	help
128	  The Ramp Controller is used to program the sequence ID for pulse
129	  swallowing, enable sequence and link sequence IDs for the CPU
130	  cores on some Qualcomm SoCs.
131	  Say y here to enable support for the ramp controller.
132
133config QCOM_RMTFS_MEM
134	tristate "Qualcomm Remote Filesystem memory driver"
135	select QCOM_SCM
136	default m if ARCH_QCOM
137	help
138	  The Qualcomm remote filesystem memory driver is used for allocating
139	  and exposing regions of shared memory with remote processors for the
140	  purpose of exchanging sector-data between the remote filesystem
141	  service and its clients.
142
143	  Say y here if you intend to boot the modem remoteproc.
144
145config QCOM_RPM_MASTER_STATS
146	tristate "Qualcomm RPM Master stats"
147	help
148	  The RPM Master sleep stats driver provides detailed per-subsystem
149	  sleep/wake data, read from the RPM message RAM. It can be used to
150	  assess whether all the low-power modes available are entered as
151	  expected or to check which part of the SoC prevents it from sleeping.
152
153	  Say y here if you intend to debug or monitor platform sleep.
154
155config QCOM_RPMH
156	tristate "Qualcomm RPM-Hardened (RPMH) Communication"
157	depends on (QCOM_COMMAND_DB || !QCOM_COMMAND_DB)
158	default ARCH_QCOM
159	help
160	  Support for communication with the hardened-RPM blocks in
161	  Qualcomm Technologies Inc (QTI) SoCs. RPMH communication uses an
162	  internal bus to transmit state requests for shared resources. A set
163	  of hardware components aggregate requests for these resources and
164	  help apply the aggregated state on the resource.
165
166config QCOM_SMEM
167	tristate "Qualcomm Shared Memory Manager (SMEM)"
168	depends on HWSPINLOCK
169	default ARCH_QCOM
170	help
171	  Say y here to enable support for the Qualcomm Shared Memory Manager.
172	  The driver provides an interface to items in a heap shared among all
173	  processors in a Qualcomm platform.
174
175config QCOM_SMD_RPM
176	tristate "Qualcomm Resource Power Manager (RPM) over SMD"
177	depends on RPMSG
178	depends on RPMSG_QCOM_SMD || RPMSG_QCOM_SMD=n
179	default ARCH_QCOM
180	help
181	  If you say yes to this option, support will be included for the
182	  Resource Power Manager system found in the Qualcomm 8974 based
183	  devices.
184
185	  This is required to access many regulators, clocks and bus
186	  frequencies controlled by the RPM on these devices.
187
188	  Say M here if you want to include support for the Qualcomm RPM as a
189	  module. This will build a module called "qcom-smd-rpm".
190
191config QCOM_SMEM_STATE
192	bool
193
194config QCOM_SMP2P
195	tristate "Qualcomm Shared Memory Point to Point support"
196	depends on MAILBOX
197	depends on QCOM_SMEM
198	select QCOM_SMEM_STATE
199	select IRQ_DOMAIN
200	default ARCH_QCOM
201	help
202	  Say yes here to support the Qualcomm Shared Memory Point to Point
203	  protocol.
204
205config QCOM_SMSM
206	tristate "Qualcomm Shared Memory State Machine"
207	depends on MAILBOX
208	depends on QCOM_SMEM
209	select QCOM_SMEM_STATE
210	select IRQ_DOMAIN
211	default ARCH_QCOM
212	help
213	  Say yes here to support the Qualcomm Shared Memory State Machine.
214	  The state machine is represented by bits in shared memory.
215
216config QCOM_SOCINFO
217	tristate "Qualcomm socinfo driver"
218	depends on QCOM_SMEM
219	select SOC_BUS
220	default m if ARCH_QCOM
221	help
222	 Say yes here to support the Qualcomm socinfo driver, providing
223	 information about the SoC to user space.
224
225config QCOM_SPM
226	tristate "Qualcomm Subsystem Power Manager (SPM)"
227	depends on QCOM_SCM
228	default ARCH_QCOM if ARM
229	help
230	  Enable the support for the Qualcomm Subsystem Power Manager, used
231	  to manage cores, L2 low power modes and to configure the internal
232	  Adaptive Voltage Scaler parameters, where supported.
233
234config QCOM_STATS
235	tristate "Qualcomm Sleep stats driver"
236	depends on DEBUG_FS || COMPILE_TEST
237	depends on QCOM_SMEM
238	depends on QCOM_AOSS_QMP || QCOM_AOSS_QMP=n
239	default m if ARCH_QCOM
240	help
241	  Qualcomm Technologies, Inc. (QTI) Sleep stats driver to read
242	  the shared memory exported by the remote processor related to
243	  various SoC level low power modes statistics and export to debugfs
244	  interface.
245
246config QCOM_WCNSS_CTRL
247	tristate "Qualcomm WCNSS control driver"
248	depends on RPMSG
249	default m if ARCH_QCOM
250	help
251	  Client driver for the WCNSS_CTRL SMD channel, used to download nv
252	  firmware to a newly booted WCNSS chip.
253
254config QCOM_APR
255	tristate "Qualcomm APR/GPR Bus (Asynchronous/Generic Packet Router)"
256	depends on RPMSG
257	depends on NET
258	select QCOM_PDR_HELPERS
259	default m if ARCH_QCOM
260	help
261	  Enable APR IPC protocol support between
262	  application processor and QDSP6. APR is
263	  used by audio driver to configure QDSP6
264	  ASM, ADM and AFE modules.
265
266config QCOM_ICC_BWMON
267	tristate "Qualcomm Interconnect Bandwidth Monitor driver"
268	depends on ARM64 || COMPILE_TEST
269	select PM_OPP
270	select REGMAP_MMIO
271	default m if ARCH_QCOM
272	help
273	  Sets up driver monitoring bandwidth on various interconnects and
274	  based on that voting for interconnect bandwidth, adjusting their
275	  speed to current demand.
276	  Current implementation brings support for BWMON v4, used for example
277	  on SDM845 to measure bandwidth between CPU (gladiator_noc) and Last
278	  Level Cache (memnoc).  Usage of this BWMON allows to remove some of
279	  the fixed bandwidth votes from cpufreq (CPU nodes) thus achieve high
280	  memory throughput even with lower CPU frequencies.
281
282config QCOM_PBS
283	tristate "PBS trigger support for Qualcomm PMICs"
284	depends on SPMI
285	default m if ARCH_QCOM
286	help
287	  This driver supports configuring software programmable boot sequencer (PBS)
288	  trigger event through PBS RAM on Qualcomm Technologies, Inc. PMICs.
289	  This module provides the APIs to the client drivers that wants to send the
290	  PBS trigger event to the PBS RAM.
291
292endif
293
294# Options selected by other drivers from different subsystems must be outside
295# of the menuconfig if-block:
296
297config QCOM_INLINE_CRYPTO_ENGINE
298	tristate
299	select QCOM_SCM
300
301config QCOM_KRYO_L2_ACCESSORS
302	bool
303	depends on ARM64
304
305config QCOM_MDT_LOADER
306	tristate
307	select QCOM_SCM
308
309config QCOM_PDR_HELPERS
310	tristate
311	select QCOM_QMI_HELPERS
312	select QCOM_PDR_MSG
313	depends on NET
314
315config QCOM_PDR_MSG
316	tristate
317
318config QCOM_QMI_HELPERS
319	tristate
320	depends on NET
321
322config QCOM_UBWC_CONFIG
323	tristate
324	depends on QCOM_SMEM
325	help
326	  Most Qualcomm SoCs feature a number of Universal Bandwidth Compression
327	  (UBWC) engines across various IP blocks, which need to be initialized
328	  with coherent configuration data. This module functions as a single
329	  source of truth for that information.
330