1# SPDX-License-Identifier: GPL-2.0-only 2# 3# QCOM Soc drivers 4# 5menuconfig QCOM_SOC 6 bool "Qualcomm SoC drivers" 7 depends on ARCH_QCOM || COMPILE_TEST 8 default ARCH_QCOM 9 help 10 This collection of drivers is specific to Qualcomm System-on-Chips 11 and most of them are necessary for a fully functional boot of the 12 Linux kernel (plus a few debugging drivers). 13 Drivers can be skipped when building Linux kernel not intended to run 14 said processors. 15 16if QCOM_SOC 17 18config QCOM_AOSS_QMP 19 tristate "Qualcomm AOSS Driver" 20 depends on MAILBOX 21 depends on COMMON_CLK && PM 22 select PM_GENERIC_DOMAINS 23 default ARCH_QCOM 24 help 25 This driver provides the means of communicating with and controlling 26 the low-power state for resources related to the remoteproc 27 subsystems as well as controlling the debug clocks exposed by the Always On 28 Subsystem (AOSS) using Qualcomm Messaging Protocol (QMP). 29 30config QCOM_COMMAND_DB 31 tristate "Qualcomm Command DB" 32 depends on OF_RESERVED_MEM 33 default ARCH_QCOM 34 help 35 Command DB queries shared memory by key string for shared system 36 resources. Platform drivers that require to set state of a shared 37 resource on a RPM-hardened platform must use this database to get 38 SoC specific identifier and information for the shared resources. 39 40config QCOM_GENI_SE 41 tristate "Qualcomm GENI Serial Engine Driver" 42 depends on ARM64 || COMPILE_TEST 43 default ARCH_QCOM 44 help 45 This driver is used to manage Generic Interface (GENI) firmware based 46 Qualcomm Technologies, Inc. Universal Peripheral (QUP) Wrapper. This 47 driver is also used to manage the common aspects of multiple Serial 48 Engines present in the QUP. 49 50config QCOM_GSBI 51 tristate "Qualcomm General Serial Bus Interface" 52 depends on ARM || COMPILE_TEST 53 default ARCH_QCOM 54 select MFD_SYSCON 55 help 56 Say y here to enable GSBI support. The GSBI provides control 57 functions for connecting the underlying serial UART, SPI, and I2C 58 devices to the output pins. 59 60config QCOM_LLCC 61 tristate "Qualcomm LLCC driver" 62 select REGMAP_MMIO 63 default m if ARCH_QCOM 64 help 65 Qualcomm Technologies, Inc. platform specific 66 Last Level Cache Controller(LLCC) driver for platforms such as, 67 SDM845. This provides interfaces to clients that use the LLCC. 68 Say yes here to enable LLCC slice driver. 69 70config QCOM_OCMEM 71 tristate "Qualcomm On Chip Memory (OCMEM) driver" 72 select QCOM_SCM 73 default m if ARCH_QCOM 74 help 75 The On Chip Memory (OCMEM) allocator allows various clients to 76 allocate memory from OCMEM based on performance, latency and power 77 requirements. This is typically used by the GPU, camera/video, and 78 audio components on some Snapdragon SoCs. 79 80config QCOM_PD_MAPPER 81 tristate "Qualcomm Protection Domain Mapper" 82 select QCOM_QMI_HELPERS 83 select QCOM_PDR_MSG 84 select AUXILIARY_BUS 85 depends on NET && QRTR 86 default QCOM_RPROC_COMMON 87 help 88 The Protection Domain Mapper maps registered services to the domains 89 and instances handled by the remote DSPs. This is a kernel-space 90 implementation of the service. It is a simpler alternative to the 91 userspace daemon. 92 93config QCOM_PDR_MSG 94 tristate 95 96config QCOM_PMIC_PDCHARGER_ULOG 97 tristate "Qualcomm PMIC PDCharger ULOG driver" 98 depends on RPMSG 99 depends on EVENT_TRACING 100 help 101 The Qualcomm PMIC PDCharger ULOG driver provides access to logs of 102 the ADSP firmware PDCharger module in charge of Battery and Power 103 Delivery on modern systems. 104 105 Say yes here to support PDCharger ULOG event tracing on modern 106 Qualcomm platforms. 107 108config QCOM_PMIC_GLINK 109 tristate "Qualcomm PMIC GLINK driver" 110 depends on RPMSG 111 depends on TYPEC 112 depends on DRM 113 depends on NET 114 depends on OF 115 depends on ARM64 || COMPILE_TEST 116 select AUXILIARY_BUS 117 select QCOM_PDR_HELPERS 118 select DRM_AUX_HPD_BRIDGE 119 default m if ARCH_QCOM 120 help 121 The Qualcomm PMIC GLINK driver provides access, over GLINK, to the 122 USB and battery firmware running on one of the coprocessors in 123 several modern Qualcomm platforms. 124 125 Say yes here to support USB-C and battery status on modern Qualcomm 126 platforms. 127 128config QCOM_RAMP_CTRL 129 tristate "Qualcomm Ramp Controller driver" 130 help 131 The Ramp Controller is used to program the sequence ID for pulse 132 swallowing, enable sequence and link sequence IDs for the CPU 133 cores on some Qualcomm SoCs. 134 Say y here to enable support for the ramp controller. 135 136config QCOM_RMTFS_MEM 137 tristate "Qualcomm Remote Filesystem memory driver" 138 select QCOM_SCM 139 default m if ARCH_QCOM 140 help 141 The Qualcomm remote filesystem memory driver is used for allocating 142 and exposing regions of shared memory with remote processors for the 143 purpose of exchanging sector-data between the remote filesystem 144 service and its clients. 145 146 Say y here if you intend to boot the modem remoteproc. 147 148config QCOM_RPM_MASTER_STATS 149 tristate "Qualcomm RPM Master stats" 150 help 151 The RPM Master sleep stats driver provides detailed per-subsystem 152 sleep/wake data, read from the RPM message RAM. It can be used to 153 assess whether all the low-power modes available are entered as 154 expected or to check which part of the SoC prevents it from sleeping. 155 156 Say y here if you intend to debug or monitor platform sleep. 157 158config QCOM_RPMH 159 tristate "Qualcomm RPM-Hardened (RPMH) Communication" 160 depends on (QCOM_COMMAND_DB || !QCOM_COMMAND_DB) 161 default ARCH_QCOM 162 help 163 Support for communication with the hardened-RPM blocks in 164 Qualcomm Technologies Inc (QTI) SoCs. RPMH communication uses an 165 internal bus to transmit state requests for shared resources. A set 166 of hardware components aggregate requests for these resources and 167 help apply the aggregated state on the resource. 168 169config QCOM_SMEM 170 tristate "Qualcomm Shared Memory Manager (SMEM)" 171 depends on HWSPINLOCK 172 default ARCH_QCOM 173 help 174 Say y here to enable support for the Qualcomm Shared Memory Manager. 175 The driver provides an interface to items in a heap shared among all 176 processors in a Qualcomm platform. 177 178config QCOM_SMD_RPM 179 tristate "Qualcomm Resource Power Manager (RPM) over SMD" 180 depends on RPMSG 181 depends on RPMSG_QCOM_SMD || RPMSG_QCOM_SMD=n 182 default ARCH_QCOM 183 help 184 If you say yes to this option, support will be included for the 185 Resource Power Manager system found in the Qualcomm 8974 based 186 devices. 187 188 This is required to access many regulators, clocks and bus 189 frequencies controlled by the RPM on these devices. 190 191 Say M here if you want to include support for the Qualcomm RPM as a 192 module. This will build a module called "qcom-smd-rpm". 193 194config QCOM_SMEM_STATE 195 bool 196 197config QCOM_SMP2P 198 tristate "Qualcomm Shared Memory Point to Point support" 199 depends on MAILBOX 200 depends on QCOM_SMEM 201 select QCOM_SMEM_STATE 202 select IRQ_DOMAIN 203 default ARCH_QCOM 204 help 205 Say yes here to support the Qualcomm Shared Memory Point to Point 206 protocol. 207 208config QCOM_SMSM 209 tristate "Qualcomm Shared Memory State Machine" 210 depends on MAILBOX 211 depends on QCOM_SMEM 212 select QCOM_SMEM_STATE 213 select IRQ_DOMAIN 214 default ARCH_QCOM 215 help 216 Say yes here to support the Qualcomm Shared Memory State Machine. 217 The state machine is represented by bits in shared memory. 218 219config QCOM_SOCINFO 220 tristate "Qualcomm socinfo driver" 221 depends on QCOM_SMEM 222 select SOC_BUS 223 default m if ARCH_QCOM 224 help 225 Say yes here to support the Qualcomm socinfo driver, providing 226 information about the SoC to user space. 227 228config QCOM_SPM 229 tristate "Qualcomm Subsystem Power Manager (SPM)" 230 depends on QCOM_SCM 231 default ARCH_QCOM if ARM 232 help 233 Enable the support for the Qualcomm Subsystem Power Manager, used 234 to manage cores, L2 low power modes and to configure the internal 235 Adaptive Voltage Scaler parameters, where supported. 236 237config QCOM_STATS 238 tristate "Qualcomm Sleep stats driver" 239 depends on DEBUG_FS || COMPILE_TEST 240 depends on QCOM_SMEM 241 depends on QCOM_AOSS_QMP || QCOM_AOSS_QMP=n 242 default m if ARCH_QCOM 243 help 244 Qualcomm Technologies, Inc. (QTI) Sleep stats driver to read 245 the shared memory exported by the remote processor related to 246 various SoC level low power modes statistics and export to debugfs 247 interface. 248 249config QCOM_WCNSS_CTRL 250 tristate "Qualcomm WCNSS control driver" 251 depends on RPMSG 252 default m if ARCH_QCOM 253 help 254 Client driver for the WCNSS_CTRL SMD channel, used to download nv 255 firmware to a newly booted WCNSS chip. 256 257config QCOM_APR 258 tristate "Qualcomm APR/GPR Bus (Asynchronous/Generic Packet Router)" 259 depends on RPMSG 260 depends on NET 261 select QCOM_PDR_HELPERS 262 default m if ARCH_QCOM 263 help 264 Enable APR IPC protocol support between 265 application processor and QDSP6. APR is 266 used by audio driver to configure QDSP6 267 ASM, ADM and AFE modules. 268 269config QCOM_ICC_BWMON 270 tristate "Qualcomm Interconnect Bandwidth Monitor driver" 271 depends on ARM64 || COMPILE_TEST 272 select PM_OPP 273 select REGMAP_MMIO 274 default m if ARCH_QCOM 275 help 276 Sets up driver monitoring bandwidth on various interconnects and 277 based on that voting for interconnect bandwidth, adjusting their 278 speed to current demand. 279 Current implementation brings support for BWMON v4, used for example 280 on SDM845 to measure bandwidth between CPU (gladiator_noc) and Last 281 Level Cache (memnoc). Usage of this BWMON allows to remove some of 282 the fixed bandwidth votes from cpufreq (CPU nodes) thus achieve high 283 memory throughput even with lower CPU frequencies. 284 285config QCOM_PBS 286 tristate "PBS trigger support for Qualcomm PMICs" 287 depends on SPMI 288 default m if ARCH_QCOM 289 help 290 This driver supports configuring software programmable boot sequencer (PBS) 291 trigger event through PBS RAM on Qualcomm Technologies, Inc. PMICs. 292 This module provides the APIs to the client drivers that wants to send the 293 PBS trigger event to the PBS RAM. 294 295endif 296 297# Options selected by other drivers from different subsystems must be outside 298# of the menuconfig if-block: 299 300config QCOM_INLINE_CRYPTO_ENGINE 301 tristate 302 select QCOM_SCM 303 304config QCOM_KRYO_L2_ACCESSORS 305 bool 306 depends on ARM64 307 308config QCOM_MDT_LOADER 309 tristate 310 select QCOM_SCM 311 312config QCOM_PDR_HELPERS 313 tristate 314 select QCOM_QMI_HELPERS 315 select QCOM_PDR_MSG 316 depends on NET 317 318config QCOM_QMI_HELPERS 319 tristate 320 depends on NET 321 322config QCOM_UBWC_CONFIG 323 tristate 324 depends on QCOM_SMEM 325 help 326 Most Qualcomm SoCs feature a number of Universal Bandwidth Compression 327 (UBWC) engines across various IP blocks, which need to be initialized 328 with coherent configuration data. This module functions as a single 329 source of truth for that information. 330