1# SPDX-License-Identifier: GPL-2.0-only 2# 3# QCOM Soc drivers 4# 5menu "Qualcomm SoC drivers" 6 7config QCOM_AOSS_QMP 8 tristate "Qualcomm AOSS Driver" 9 depends on ARCH_QCOM || COMPILE_TEST 10 depends on MAILBOX 11 depends on COMMON_CLK && PM 12 select PM_GENERIC_DOMAINS 13 help 14 This driver provides the means of communicating with and controlling 15 the low-power state for resources related to the remoteproc 16 subsystems as well as controlling the debug clocks exposed by the Always On 17 Subsystem (AOSS) using Qualcomm Messaging Protocol (QMP). 18 19config QCOM_COMMAND_DB 20 tristate "Qualcomm Command DB" 21 depends on ARCH_QCOM || COMPILE_TEST 22 depends on OF_RESERVED_MEM 23 help 24 Command DB queries shared memory by key string for shared system 25 resources. Platform drivers that require to set state of a shared 26 resource on a RPM-hardened platform must use this database to get 27 SoC specific identifier and information for the shared resources. 28 29config QCOM_CPR 30 tristate "QCOM Core Power Reduction (CPR) support" 31 depends on ARCH_QCOM && HAS_IOMEM 32 select PM_OPP 33 select REGMAP 34 help 35 Say Y here to enable support for the CPR hardware found on Qualcomm 36 SoCs like QCS404. 37 38 This driver populates CPU OPPs tables and makes adjustments to the 39 tables based on feedback from the CPR hardware. If you want to do 40 CPUfrequency scaling say Y here. 41 42 To compile this driver as a module, choose M here: the module will 43 be called qcom-cpr 44 45config QCOM_GENI_SE 46 tristate "QCOM GENI Serial Engine Driver" 47 depends on ARCH_QCOM || COMPILE_TEST 48 help 49 This driver is used to manage Generic Interface (GENI) firmware based 50 Qualcomm Technologies, Inc. Universal Peripheral (QUP) Wrapper. This 51 driver is also used to manage the common aspects of multiple Serial 52 Engines present in the QUP. 53 54config QCOM_GSBI 55 tristate "QCOM General Serial Bus Interface" 56 depends on ARCH_QCOM || COMPILE_TEST 57 select MFD_SYSCON 58 help 59 Say y here to enable GSBI support. The GSBI provides control 60 functions for connecting the underlying serial UART, SPI, and I2C 61 devices to the output pins. 62 63config QCOM_LLCC 64 tristate "Qualcomm Technologies, Inc. LLCC driver" 65 depends on ARCH_QCOM || COMPILE_TEST 66 select REGMAP_MMIO 67 help 68 Qualcomm Technologies, Inc. platform specific 69 Last Level Cache Controller(LLCC) driver for platforms such as, 70 SDM845. This provides interfaces to clients that use the LLCC. 71 Say yes here to enable LLCC slice driver. 72 73config QCOM_KRYO_L2_ACCESSORS 74 bool 75 depends on (ARCH_QCOM || COMPILE_TEST) && ARM64 76 77config QCOM_MDT_LOADER 78 tristate 79 select QCOM_SCM 80 81config QCOM_OCMEM 82 tristate "Qualcomm On Chip Memory (OCMEM) driver" 83 depends on ARCH_QCOM 84 select QCOM_SCM 85 help 86 The On Chip Memory (OCMEM) allocator allows various clients to 87 allocate memory from OCMEM based on performance, latency and power 88 requirements. This is typically used by the GPU, camera/video, and 89 audio components on some Snapdragon SoCs. 90 91config QCOM_PDR_HELPERS 92 tristate 93 select QCOM_QMI_HELPERS 94 depends on NET 95 96config QCOM_PMIC_GLINK 97 tristate "Qualcomm PMIC GLINK driver" 98 depends on RPMSG 99 depends on TYPEC 100 depends on DRM 101 depends on NET 102 depends on OF 103 select AUXILIARY_BUS 104 select QCOM_PDR_HELPERS 105 help 106 The Qualcomm PMIC GLINK driver provides access, over GLINK, to the 107 USB and battery firmware running on one of the coprocessors in 108 several modern Qualcomm platforms. 109 110 Say yes here to support USB-C and battery status on modern Qualcomm 111 platforms. 112 113config QCOM_QMI_HELPERS 114 tristate 115 depends on NET 116 117config QCOM_RAMP_CTRL 118 tristate "Qualcomm Ramp Controller driver" 119 depends on ARCH_QCOM || COMPILE_TEST 120 help 121 The Ramp Controller is used to program the sequence ID for pulse 122 swallowing, enable sequence and link sequence IDs for the CPU 123 cores on some Qualcomm SoCs. 124 Say y here to enable support for the ramp controller. 125 126config QCOM_RMTFS_MEM 127 tristate "Qualcomm Remote Filesystem memory driver" 128 depends on ARCH_QCOM 129 select QCOM_SCM 130 help 131 The Qualcomm remote filesystem memory driver is used for allocating 132 and exposing regions of shared memory with remote processors for the 133 purpose of exchanging sector-data between the remote filesystem 134 service and its clients. 135 136 Say y here if you intend to boot the modem remoteproc. 137 138config QCOM_RPM_MASTER_STATS 139 tristate "Qualcomm RPM Master stats" 140 depends on ARCH_QCOM || COMPILE_TEST 141 help 142 The RPM Master sleep stats driver provides detailed per-subsystem 143 sleep/wake data, read from the RPM message RAM. It can be used to 144 assess whether all the low-power modes available are entered as 145 expected or to check which part of the SoC prevents it from sleeping. 146 147 Say y here if you intend to debug or monitor platform sleep. 148 149config QCOM_RPMH 150 tristate "Qualcomm RPM-Hardened (RPMH) Communication" 151 depends on ARCH_QCOM || COMPILE_TEST 152 depends on (QCOM_COMMAND_DB || !QCOM_COMMAND_DB) 153 help 154 Support for communication with the hardened-RPM blocks in 155 Qualcomm Technologies Inc (QTI) SoCs. RPMH communication uses an 156 internal bus to transmit state requests for shared resources. A set 157 of hardware components aggregate requests for these resources and 158 help apply the aggregated state on the resource. 159 160config QCOM_RPMHPD 161 tristate "Qualcomm RPMh Power domain driver" 162 depends on QCOM_RPMH && QCOM_COMMAND_DB 163 help 164 QCOM RPMh Power domain driver to support power-domains with 165 performance states. The driver communicates a performance state 166 value to RPMh which then translates it into corresponding voltage 167 for the voltage rail. 168 169config QCOM_RPMPD 170 tristate "Qualcomm RPM Power domain driver" 171 depends on PM && OF 172 depends on QCOM_SMD_RPM 173 select PM_GENERIC_DOMAINS 174 select PM_GENERIC_DOMAINS_OF 175 help 176 QCOM RPM Power domain driver to support power-domains with 177 performance states. The driver communicates a performance state 178 value to RPM which then translates it into corresponding voltage 179 for the voltage rail. 180 181config QCOM_SMEM 182 tristate "Qualcomm Shared Memory Manager (SMEM)" 183 depends on ARCH_QCOM || COMPILE_TEST 184 depends on HWSPINLOCK 185 help 186 Say y here to enable support for the Qualcomm Shared Memory Manager. 187 The driver provides an interface to items in a heap shared among all 188 processors in a Qualcomm platform. 189 190config QCOM_SMD_RPM 191 tristate "Qualcomm Resource Power Manager (RPM) over SMD" 192 depends on ARCH_QCOM || COMPILE_TEST 193 depends on RPMSG 194 help 195 If you say yes to this option, support will be included for the 196 Resource Power Manager system found in the Qualcomm 8974 based 197 devices. 198 199 This is required to access many regulators, clocks and bus 200 frequencies controlled by the RPM on these devices. 201 202 Say M here if you want to include support for the Qualcomm RPM as a 203 module. This will build a module called "qcom-smd-rpm". 204 205config QCOM_SMEM_STATE 206 bool 207 208config QCOM_SMP2P 209 tristate "Qualcomm Shared Memory Point to Point support" 210 depends on MAILBOX 211 depends on QCOM_SMEM 212 select QCOM_SMEM_STATE 213 select IRQ_DOMAIN 214 help 215 Say yes here to support the Qualcomm Shared Memory Point to Point 216 protocol. 217 218config QCOM_SMSM 219 tristate "Qualcomm Shared Memory State Machine" 220 depends on QCOM_SMEM 221 select QCOM_SMEM_STATE 222 select IRQ_DOMAIN 223 help 224 Say yes here to support the Qualcomm Shared Memory State Machine. 225 The state machine is represented by bits in shared memory. 226 227config QCOM_SOCINFO 228 tristate "Qualcomm socinfo driver" 229 depends on QCOM_SMEM 230 select SOC_BUS 231 help 232 Say yes here to support the Qualcomm socinfo driver, providing 233 information about the SoC to user space. 234 235config QCOM_SPM 236 tristate "Qualcomm Subsystem Power Manager (SPM)" 237 depends on ARCH_QCOM || COMPILE_TEST 238 select QCOM_SCM 239 help 240 Enable the support for the Qualcomm Subsystem Power Manager, used 241 to manage cores, L2 low power modes and to configure the internal 242 Adaptive Voltage Scaler parameters, where supported. 243 244config QCOM_STATS 245 tristate "Qualcomm Technologies, Inc. (QTI) Sleep stats driver" 246 depends on (ARCH_QCOM && DEBUG_FS) || COMPILE_TEST 247 depends on QCOM_SMEM 248 help 249 Qualcomm Technologies, Inc. (QTI) Sleep stats driver to read 250 the shared memory exported by the remote processor related to 251 various SoC level low power modes statistics and export to debugfs 252 interface. 253 254config QCOM_WCNSS_CTRL 255 tristate "Qualcomm WCNSS control driver" 256 depends on ARCH_QCOM || COMPILE_TEST 257 depends on RPMSG 258 help 259 Client driver for the WCNSS_CTRL SMD channel, used to download nv 260 firmware to a newly booted WCNSS chip. 261 262config QCOM_APR 263 tristate "Qualcomm APR/GPR Bus (Asynchronous/Generic Packet Router)" 264 depends on ARCH_QCOM || COMPILE_TEST 265 depends on RPMSG 266 depends on NET 267 select QCOM_PDR_HELPERS 268 help 269 Enable APR IPC protocol support between 270 application processor and QDSP6. APR is 271 used by audio driver to configure QDSP6 272 ASM, ADM and AFE modules. 273 274config QCOM_ICC_BWMON 275 tristate "QCOM Interconnect Bandwidth Monitor driver" 276 depends on ARCH_QCOM || COMPILE_TEST 277 select PM_OPP 278 select REGMAP_MMIO 279 help 280 Sets up driver monitoring bandwidth on various interconnects and 281 based on that voting for interconnect bandwidth, adjusting their 282 speed to current demand. 283 Current implementation brings support for BWMON v4, used for example 284 on SDM845 to measure bandwidth between CPU (gladiator_noc) and Last 285 Level Cache (memnoc). Usage of this BWMON allows to remove some of 286 the fixed bandwidth votes from cpufreq (CPU nodes) thus achieve high 287 memory throughput even with lower CPU frequencies. 288 289config QCOM_INLINE_CRYPTO_ENGINE 290 tristate 291 select QCOM_SCM 292 293endmenu 294