1ec8f24b7SThomas Gleixner# SPDX-License-Identifier: GPL-2.0-only 21f022d84SFlora Fu# 31f022d84SFlora Fu# MediaTek SoC drivers 41f022d84SFlora Fu# 531d7b359SSean Wangmenu "MediaTek SoC drivers" 631d7b359SSean Wang depends on ARCH_MEDIATEK || COMPILE_TEST 731d7b359SSean Wang 8576f1b4bSHoulong Weiconfig MTK_CMDQ 9576f1b4bSHoulong Wei tristate "MediaTek CMDQ Support" 10576f1b4bSHoulong Wei depends on ARCH_MEDIATEK || COMPILE_TEST 11576f1b4bSHoulong Wei select MAILBOX 12576f1b4bSHoulong Wei select MTK_CMDQ_MBOX 13576f1b4bSHoulong Wei select MTK_INFRACFG 14576f1b4bSHoulong Wei help 15576f1b4bSHoulong Wei Say yes here to add support for the MediaTek Command Queue (CMDQ) 16576f1b4bSHoulong Wei driver. The CMDQ is used to help read/write registers with critical 17576f1b4bSHoulong Wei time limitation, such as updating display configuration during the 18576f1b4bSHoulong Wei vblank. 19576f1b4bSHoulong Wei 200890beb2SNeal Liuconfig MTK_DEVAPC 210890beb2SNeal Liu tristate "Mediatek Device APC Support" 220890beb2SNeal Liu help 230890beb2SNeal Liu Say yes here to enable support for Mediatek Device APC driver. 240890beb2SNeal Liu This driver is mainly used to handle the violation which catches 250890beb2SNeal Liu unexpected transaction. 260890beb2SNeal Liu The violation information is logged for further analysis or 270890beb2SNeal Liu countermeasures. 280890beb2SNeal Liu 29*192514aeSAngeloGioacchino Del Regnoconfig MTK_DVFSRC 30*192514aeSAngeloGioacchino Del Regno tristate "MediaTek DVFSRC Support" 31*192514aeSAngeloGioacchino Del Regno depends on ARCH_MEDIATEK 32*192514aeSAngeloGioacchino Del Regno help 33*192514aeSAngeloGioacchino Del Regno Say yes here to add support for the MediaTek Dynamic Voltage 34*192514aeSAngeloGioacchino Del Regno and Frequency Scaling Resource Collector (DVFSRC): a HW 35*192514aeSAngeloGioacchino Del Regno IP found on many MediaTek SoCs, which is responsible for 36*192514aeSAngeloGioacchino Del Regno collecting DVFS requests from various SoC IPs, other than 37*192514aeSAngeloGioacchino Del Regno software, and performing bandwidth scaling to provide the 38*192514aeSAngeloGioacchino Del Regno best achievable performance-per-watt. 39*192514aeSAngeloGioacchino Del Regno 4016a624a9SSascha Hauerconfig MTK_INFRACFG 4116a624a9SSascha Hauer bool "MediaTek INFRACFG Support" 4216a624a9SSascha Hauer select REGMAP 4316a624a9SSascha Hauer help 4416a624a9SSascha Hauer Say yes here to add support for the MediaTek INFRACFG controller. The 4516a624a9SSascha Hauer INFRACFG controller contains various infrastructure registers not 4616a624a9SSascha Hauer directly associated to any device. 4716a624a9SSascha Hauer 481f022d84SFlora Fuconfig MTK_PMIC_WRAP 491f022d84SFlora Fu tristate "MediaTek PMIC Wrapper Support" 502a910d13SMatthias Brugger depends on RESET_CONTROLLER 512778caedSJean Delvare depends on OF 521f022d84SFlora Fu select REGMAP 531f022d84SFlora Fu help 541f022d84SFlora Fu Say yes here to add support for MediaTek PMIC Wrapper found 551f022d84SFlora Fu on different MediaTek SoCs. The PMIC wrapper is a proprietary 561f022d84SFlora Fu hardware to connect the PMIC. 57c84e3587SSascha Hauer 58c200774aSAngeloGioacchino Del Regnoconfig MTK_REGULATOR_COUPLER 59c200774aSAngeloGioacchino Del Regno bool "MediaTek SoC Regulator Coupler" if COMPILE_TEST 60c200774aSAngeloGioacchino Del Regno default ARCH_MEDIATEK 61c200774aSAngeloGioacchino Del Regno depends on REGULATOR 62c200774aSAngeloGioacchino Del Regno 6313032709SMatthias Bruggerconfig MTK_MMSYS 64a7596e62SYongqiang Niu tristate "MediaTek MMSYS Support" 6552660e56SEnric Balletbo i Serra default ARCH_MEDIATEK 661dcdee6eSEnric Balletbo i Serra depends on HAS_IOMEM 675ce5e0d0SAngeloGioacchino Del Regno depends on MTK_CMDQ || MTK_CMDQ=n 6813032709SMatthias Brugger help 6913032709SMatthias Brugger Say yes here to add support for the MediaTek Multimedia 7013032709SMatthias Brugger Subsystem (MMSYS). 7113032709SMatthias Brugger 72681a02e9SRoger Luconfig MTK_SVS 73681a02e9SRoger Lu tristate "MediaTek Smart Voltage Scaling(SVS)" 7428fc7c98SRafał Miłecki depends on NVMEM_MTK_EFUSE && NVMEM 75681a02e9SRoger Lu help 76681a02e9SRoger Lu The Smart Voltage Scaling(SVS) engine is a piece of hardware 77681a02e9SRoger Lu which has several controllers(banks) for calculating suitable 78681a02e9SRoger Lu voltage to different power domains(CPU/GPU/CCI) according to 79681a02e9SRoger Lu chip process corner, temperatures and other factors. Then DVFS 80681a02e9SRoger Lu driver could apply SVS bank voltage to PMIC/Buck. 81681a02e9SRoger Lu 82423a54daSWilliam-tw Linconfig MTK_SOCINFO 83423a54daSWilliam-tw Lin tristate "MediaTek SoC Information" 84423a54daSWilliam-tw Lin default y 85423a54daSWilliam-tw Lin depends on NVMEM_MTK_EFUSE 86ab6cd6bbSDaniel Golle select SOC_BUS 87423a54daSWilliam-tw Lin help 88423a54daSWilliam-tw Lin The MediaTek SoC Information (mtk-socinfo) driver provides 89423a54daSWilliam-tw Lin information about the SoC to the userspace including the 90423a54daSWilliam-tw Lin manufacturer name, marketing name and soc name. 91423a54daSWilliam-tw Lin 9231d7b359SSean Wangendmenu 93