1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* Copyright (c) 2023 Hisilicon Limited. */ 3 4 #ifndef __KUNPENG_HCCS_H__ 5 #define __KUNPENG_HCCS_H__ 6 7 /* 8 * |--------------- Chip0 ---------------|---------------- ChipN -------------| 9 * |--------Die0-------|--------DieN-------|--------Die0-------|-------DieN-------| 10 * | P0 | P1 | P2 | P3 | P0 | P1 | P2 | P3 | P0 | P1 | P2 | P3 |P0 | P1 | P2 | P3 | 11 */ 12 13 enum hccs_port_type { 14 HCCS_V1 = 1, 15 HCCS_V2, 16 }; 17 18 #define HCCS_IP_PREFIX "HCCS-v" 19 #define HCCS_IP_MAX 255 20 #define HCCS_NAME_MAX_LEN 9 21 struct hccs_type_name_map { 22 u8 type; 23 char name[HCCS_NAME_MAX_LEN + 1]; 24 }; 25 26 /* 27 * This value cannot be 255, otherwise the loop of the multi-BD communication 28 * case cannot end. 29 */ 30 #define HCCS_DIE_MAX_PORT_ID 254 31 32 struct hccs_port_info { 33 u8 port_id; 34 u8 port_type; 35 u8 max_lane_num; 36 bool enable; /* if the port is enabled */ 37 struct kobject kobj; 38 bool dir_created; 39 struct hccs_die_info *die; /* point to the die the port is located */ 40 }; 41 42 struct hccs_die_info { 43 u8 die_id; 44 u8 port_num; 45 u8 min_port_id; 46 u8 max_port_id; 47 struct hccs_port_info *ports; 48 struct kobject kobj; 49 bool dir_created; 50 struct hccs_chip_info *chip; /* point to the chip the die is located */ 51 }; 52 53 struct hccs_chip_info { 54 u8 chip_id; 55 u8 die_num; 56 struct hccs_die_info *dies; 57 struct kobject kobj; 58 struct hccs_dev *hdev; 59 }; 60 61 struct hccs_mbox_client_info { 62 struct mbox_client client; 63 struct mbox_chan *mbox_chan; 64 struct pcc_mbox_chan *pcc_chan; 65 u64 deadline_us; 66 void __iomem *pcc_comm_addr; 67 struct completion done; 68 }; 69 70 struct hccs_desc; 71 72 struct hccs_verspecific_data { 73 void (*rx_callback)(struct mbox_client *cl, void *mssg); 74 int (*wait_cmd_complete)(struct hccs_dev *hdev); 75 void (*fill_pcc_shared_mem)(struct hccs_dev *hdev, 76 u8 cmd, struct hccs_desc *desc, 77 void __iomem *comm_space, 78 u16 space_size); 79 u16 shared_mem_size; 80 bool has_txdone_irq; 81 }; 82 83 #define HCCS_CAPS_HCCS_V2_PM BIT_ULL(0) 84 85 struct hccs_dev { 86 struct device *dev; 87 struct acpi_device *acpi_dev; 88 const struct hccs_verspecific_data *verspec_data; 89 /* device capabilities from firmware, like HCCS_CAPS_xxx. */ 90 u64 caps; 91 u8 chip_num; 92 struct hccs_chip_info *chips; 93 u16 used_type_num; 94 struct hccs_type_name_map *type_name_maps; 95 u8 chan_id; 96 struct mutex lock; 97 struct hccs_mbox_client_info cl_info; 98 }; 99 100 #define HCCS_SERDES_MODULE_CODE 0x32 101 enum hccs_subcmd_type { 102 HCCS_GET_CHIP_NUM = 0x1, 103 HCCS_GET_DIE_NUM, 104 HCCS_GET_DIE_INFO, 105 HCCS_GET_DIE_PORT_INFO, 106 HCCS_GET_DEV_CAP, 107 HCCS_GET_PORT_LINK_STATUS, 108 HCCS_GET_PORT_CRC_ERR_CNT, 109 HCCS_GET_DIE_PORTS_LANE_STA, 110 HCCS_GET_DIE_PORTS_LINK_STA, 111 HCCS_GET_DIE_PORTS_CRC_ERR_CNT, 112 HCCS_GET_PORT_IDLE_STATUS, 113 HCCS_PM_DEC_LANE, 114 HCCS_PM_INC_LANE, 115 HCCS_SUB_CMD_MAX = 255, 116 }; 117 118 struct hccs_die_num_req_param { 119 u8 chip_id; 120 }; 121 122 struct hccs_die_info_req_param { 123 u8 chip_id; 124 u8 die_idx; 125 }; 126 127 struct hccs_die_info_rsp_data { 128 u8 die_id; 129 u8 port_num; 130 u8 min_port_id; 131 u8 max_port_id; 132 }; 133 134 struct hccs_port_attr { 135 u8 port_id; 136 u8 port_type; 137 u8 max_lane_num; 138 u8 enable : 1; /* if the port is enabled */ 139 u16 rsv[2]; 140 }; 141 142 /* 143 * The common command request for getting the information of all HCCS port on 144 * specified DIE. 145 */ 146 struct hccs_die_comm_req_param { 147 u8 chip_id; 148 u8 die_id; /* id in hardware */ 149 }; 150 151 /* The common command request for getting the information of a specific port */ 152 struct hccs_port_comm_req_param { 153 u8 chip_id; 154 u8 die_id; 155 u8 port_id; 156 }; 157 158 #define HCCS_PREPARE_INC_LANE 1 159 #define HCCS_GET_ADAPT_RES 2 160 #define HCCS_START_RETRAINING 3 161 struct hccs_inc_lane_req_param { 162 u8 port_type; 163 u8 opt_type; 164 }; 165 166 #define HCCS_PORT_RESET 1 167 #define HCCS_PORT_SETUP 2 168 #define HCCS_PORT_CONFIG 3 169 #define HCCS_PORT_READY 4 170 struct hccs_link_status { 171 u8 lane_mask; /* indicate which lanes are used. */ 172 u8 link_fsm : 3; /* link fsm, 1: reset 2: setup 3: config 4: link-up */ 173 u8 lane_num : 5; /* current lane number */ 174 }; 175 176 struct hccs_req_head { 177 u8 module_code; /* set to 0x32 for serdes */ 178 u8 start_id; 179 u8 rsv[2]; 180 }; 181 182 struct hccs_rsp_head { 183 u8 data_len; 184 u8 next_id; 185 u8 rsv[2]; 186 }; 187 188 struct hccs_fw_inner_head { 189 u8 retStatus; /* 0: success, other: failure */ 190 u8 rsv[7]; 191 }; 192 193 #define HCCS_PCC_SHARE_MEM_BYTES 64 194 #define HCCS_FW_INNER_HEAD_BYTES 8 195 #define HCCS_RSP_HEAD_BYTES 4 196 197 #define HCCS_MAX_RSP_DATA_BYTES (HCCS_PCC_SHARE_MEM_BYTES - \ 198 HCCS_FW_INNER_HEAD_BYTES - \ 199 HCCS_RSP_HEAD_BYTES) 200 #define HCCS_MAX_RSP_DATA_SIZE_MAX (HCCS_MAX_RSP_DATA_BYTES / 4) 201 202 /* 203 * Note: Actual available size of data field also depands on the PCC header 204 * bytes of the specific type. Driver needs to copy the response data in the 205 * communication space based on the real length. 206 */ 207 struct hccs_rsp_desc { 208 struct hccs_fw_inner_head fw_inner_head; /* 8 Bytes */ 209 struct hccs_rsp_head rsp_head; /* 4 Bytes */ 210 u32 data[HCCS_MAX_RSP_DATA_SIZE_MAX]; 211 }; 212 213 #define HCCS_REQ_HEAD_BYTES 4 214 #define HCCS_MAX_REQ_DATA_BYTES (HCCS_PCC_SHARE_MEM_BYTES - \ 215 HCCS_REQ_HEAD_BYTES) 216 #define HCCS_MAX_REQ_DATA_SIZE_MAX (HCCS_MAX_REQ_DATA_BYTES / 4) 217 218 /* 219 * Note: Actual available size of data field also depands on the PCC header 220 * bytes of the specific type. Driver needs to copy the request data to the 221 * communication space based on the real length. 222 */ 223 struct hccs_req_desc { 224 struct hccs_req_head req_head; /* 4 Bytes */ 225 u32 data[HCCS_MAX_REQ_DATA_SIZE_MAX]; 226 }; 227 228 struct hccs_desc { 229 union { 230 struct hccs_req_desc req; 231 struct hccs_rsp_desc rsp; 232 }; 233 }; 234 235 #endif /* __KUNPENG_HCCS_H__ */ 236