1# SPDX-License-Identifier: GPL-2.0-only 2# 3# QE Communication options 4# 5 6config QUICC_ENGINE 7 bool "QUICC Engine (QE) framework support" 8 depends on OF && HAS_IOMEM 9 depends on PPC || ARM || ARM64 || COMPILE_TEST 10 select GENERIC_ALLOCATOR 11 select CRC32 12 help 13 The QUICC Engine (QE) is a new generation of communications 14 coprocessors on Freescale embedded CPUs (akin to CPM in older chips). 15 Selecting this option means that you wish to build a kernel 16 for a machine with a QE coprocessor. 17 18config UCC_SLOW 19 bool 20 default y if SERIAL_QE 21 help 22 This option provides qe_lib support to UCC slow 23 protocols: UART, BISYNC, QMC 24 25config UCC_FAST 26 bool 27 default y if UCC_GETH || QE_TDM 28 help 29 This option provides qe_lib support to UCC fast 30 protocols: HDLC, Ethernet, ATM, transparent 31 32config UCC 33 bool 34 default y if UCC_FAST || UCC_SLOW 35 36config CPM_TSA 37 tristate "CPM TSA support" 38 depends on OF && HAS_IOMEM 39 depends on CPM1 || (CPM && COMPILE_TEST) 40 help 41 Freescale CPM Time Slot Assigner (TSA) 42 controller. 43 44 This option enables support for this 45 controller 46 47config CPM_QMC 48 tristate "CPM QMC support" 49 depends on OF && HAS_IOMEM 50 depends on CPM1 || (FSL_SOC && CPM && COMPILE_TEST) 51 depends on CPM_TSA 52 help 53 Freescale CPM QUICC Multichannel Controller 54 (QMC) 55 56 This option enables support for this 57 controller 58 59config QE_TDM 60 bool 61 default y if FSL_UCC_HDLC 62 63config QE_USB 64 bool 65 depends on QUICC_ENGINE 66 default y if USB_FSL_QE 67 help 68 QE USB Controller support 69