1# SPDX-License-Identifier: GPL-2.0-only 2# 3# QE Communication options 4# 5 6config QUICC_ENGINE 7 bool "QUICC Engine (QE) framework support" 8 depends on OF && HAS_IOMEM 9 depends on PPC || ARM || ARM64 || COMPILE_TEST 10 select GENERIC_ALLOCATOR 11 select CRC32 12 help 13 The QUICC Engine (QE) is a new generation of communications 14 coprocessors on Freescale embedded CPUs (akin to CPM in older chips). 15 Selecting this option means that you wish to build a kernel 16 for a machine with a QE coprocessor. 17 18config UCC_SLOW 19 bool 20 default y if SERIAL_QE || (CPM_QMC && QUICC_ENGINE) 21 help 22 This option provides qe_lib support to UCC slow 23 protocols: UART, BISYNC, QMC 24 25config UCC_FAST 26 bool 27 default y if UCC_GETH || QE_TDM 28 help 29 This option provides qe_lib support to UCC fast 30 protocols: HDLC, Ethernet, ATM, transparent 31 32config UCC 33 bool 34 default y if UCC_FAST || UCC_SLOW || (CPM_TSA && QUICC_ENGINE) 35 36config CPM_TSA 37 tristate "CPM/QE TSA support" 38 depends on OF && HAS_IOMEM 39 depends on CPM1 || QUICC_ENGINE || \ 40 ((CPM || QUICC_ENGINE) && COMPILE_TEST) 41 help 42 Freescale CPM/QE Time Slot Assigner (TSA) 43 controller. 44 45 This option enables support for this 46 controller 47 48config CPM_QMC 49 tristate "CPM/QE QMC support" 50 depends on OF && HAS_IOMEM 51 depends on CPM1 || QUICC_ENGINE || \ 52 (FSL_SOC && (CPM || QUICC_ENGINE) && COMPILE_TEST) 53 depends on CPM_TSA 54 help 55 Freescale CPM/QE QUICC Multichannel Controller 56 (QMC) 57 58 This option enables support for this 59 controller 60 61config QE_TDM 62 bool 63 default y if FSL_UCC_HDLC 64 65config QE_USB 66 bool 67 depends on QUICC_ENGINE 68 default y if USB_FSL_QE 69 help 70 QE USB Controller support 71