xref: /linux/drivers/soc/fsl/qe/Kconfig (revision 2cd86f02c017bf9733e5cd891381b7d40f6f37ad)
1# SPDX-License-Identifier: GPL-2.0-only
2#
3# QE Communication options
4#
5
6config QUICC_ENGINE
7	bool "QUICC Engine (QE) framework support"
8	depends on OF && HAS_IOMEM
9	depends on PPC || ARM || ARM64 || COMPILE_TEST
10	select GENERIC_ALLOCATOR
11	select CRC32
12	help
13	  The QUICC Engine (QE) is a new generation of communications
14	  coprocessors on Freescale embedded CPUs (akin to CPM in older chips).
15	  Selecting this option means that you wish to build a kernel
16	  for a machine with a QE coprocessor.
17
18config UCC_SLOW
19	bool
20	default y if SERIAL_QE || (CPM_QMC && QUICC_ENGINE)
21	help
22	  This option provides qe_lib support to UCC slow
23	  protocols: UART, BISYNC, QMC
24
25config UCC_FAST
26	bool
27	default y if UCC_GETH || QE_TDM
28	help
29	  This option provides qe_lib support to UCC fast
30	  protocols: HDLC, Ethernet, ATM, transparent
31
32config UCC
33	bool
34	default y if UCC_FAST || UCC_SLOW || (CPM_TSA && QUICC_ENGINE)
35
36config CPM_TSA
37	tristate "CPM/QE TSA support"
38	depends on OF && HAS_IOMEM
39	depends on CPM1 || QUICC_ENGINE || \
40		   ((CPM || QUICC_ENGINE) && COMPILE_TEST)
41	help
42	  Freescale CPM/QE Time Slot Assigner (TSA)
43	  controller.
44
45	  This option enables support for this
46	  controller
47
48config CPM_QMC
49	tristate "CPM/QE QMC support"
50	depends on OF && HAS_IOMEM
51	depends on FSL_SOC
52	depends on CPM_TSA
53	help
54	  Freescale CPM/QE QUICC Multichannel Controller
55	  (QMC)
56
57	  This option enables support for this
58	  controller
59
60config QE_TDM
61	bool
62	default y if FSL_UCC_HDLC
63
64config QE_USB
65	bool
66	depends on QUICC_ENGINE
67	default y if USB_FSL_QE
68	help
69	  QE USB Controller support
70