xref: /linux/drivers/soc/fsl/qe/Kconfig (revision 7aa1aa6ecec2af19d9aa85430ce3e56119e21626)
1*7aa1aa6eSZhao Qiang#
2*7aa1aa6eSZhao Qiang# QE Communication options
3*7aa1aa6eSZhao Qiang#
4*7aa1aa6eSZhao Qiang
5*7aa1aa6eSZhao Qiangconfig QUICC_ENGINE
6*7aa1aa6eSZhao Qiang	bool "Freescale QUICC Engine (QE) Support"
7*7aa1aa6eSZhao Qiang	depends on FSL_SOC && PPC32
8*7aa1aa6eSZhao Qiang	select GENERIC_ALLOCATOR
9*7aa1aa6eSZhao Qiang	select CRC32
10*7aa1aa6eSZhao Qiang	help
11*7aa1aa6eSZhao Qiang	  The QUICC Engine (QE) is a new generation of communications
12*7aa1aa6eSZhao Qiang	  coprocessors on Freescale embedded CPUs (akin to CPM in older chips).
13*7aa1aa6eSZhao Qiang	  Selecting this option means that you wish to build a kernel
14*7aa1aa6eSZhao Qiang	  for a machine with a QE coprocessor.
15*7aa1aa6eSZhao Qiang
16*7aa1aa6eSZhao Qiangconfig UCC_SLOW
17*7aa1aa6eSZhao Qiang	bool
18*7aa1aa6eSZhao Qiang	default y if SERIAL_QE
19*7aa1aa6eSZhao Qiang	help
20*7aa1aa6eSZhao Qiang	  This option provides qe_lib support to UCC slow
21*7aa1aa6eSZhao Qiang	  protocols: UART, BISYNC, QMC
22*7aa1aa6eSZhao Qiang
23*7aa1aa6eSZhao Qiangconfig UCC_FAST
24*7aa1aa6eSZhao Qiang	bool
25*7aa1aa6eSZhao Qiang	default y if UCC_GETH
26*7aa1aa6eSZhao Qiang	help
27*7aa1aa6eSZhao Qiang	  This option provides qe_lib support to UCC fast
28*7aa1aa6eSZhao Qiang	  protocols: HDLC, Ethernet, ATM, transparent
29*7aa1aa6eSZhao Qiang
30*7aa1aa6eSZhao Qiangconfig UCC
31*7aa1aa6eSZhao Qiang	bool
32*7aa1aa6eSZhao Qiang	default y if UCC_FAST || UCC_SLOW
33*7aa1aa6eSZhao Qiang
34*7aa1aa6eSZhao Qiangconfig QE_USB
35*7aa1aa6eSZhao Qiang	bool
36*7aa1aa6eSZhao Qiang	default y if USB_FSL_QE
37*7aa1aa6eSZhao Qiang	help
38*7aa1aa6eSZhao Qiang	  QE USB Controller support
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