1# SPDX-License-Identifier: GPL-2.0-only 2 3if ARCH_ASPEED || COMPILE_TEST 4 5menu "ASPEED SoC drivers" 6 7config ASPEED_LPC_CTRL 8 tristate "ASPEED LPC firmware cycle control" 9 select REGMAP 10 select MFD_SYSCON 11 default ARCH_ASPEED 12 help 13 Control LPC firmware cycle mappings through ioctl()s. The driver 14 also provides a read/write interface to a BMC ram region where the 15 host LPC read/write region can be buffered. 16 17config ASPEED_LPC_SNOOP 18 tristate "ASPEED LPC snoop support" 19 select REGMAP 20 select MFD_SYSCON 21 default ARCH_ASPEED 22 help 23 Provides a driver to control the LPC snoop interface which 24 allows the BMC to listen on and save the data written by 25 the host to an arbitrary LPC I/O port. 26 27config ASPEED_P2A_CTRL 28 tristate "ASPEED P2A (VGA MMIO to BMC) bridge control" 29 select REGMAP 30 select MFD_SYSCON 31 default ARCH_ASPEED 32 help 33 Control ASPEED P2A VGA MMIO to BMC mappings through ioctl()s. The 34 driver also provides an interface for userspace mappings to a 35 pre-defined region. 36 37config ASPEED_SOCINFO 38 bool "ASPEED SoC Information driver" 39 default ARCH_ASPEED 40 select SOC_BUS 41 default ARCH_ASPEED 42 help 43 Say yes to support decoding of ASPEED BMC information. 44 45endmenu 46 47endif 48