1*33fc1a21SPaul Mundtcomment "Interrupt controller options" 2*33fc1a21SPaul Mundt 3*33fc1a21SPaul Mundtconfig INTC_USERIMASK 4*33fc1a21SPaul Mundt bool "Userspace interrupt masking support" 5*33fc1a21SPaul Mundt depends on ARCH_SHMOBILE || (SUPERH && CPU_SH4A) 6*33fc1a21SPaul Mundt help 7*33fc1a21SPaul Mundt This enables support for hardware-assisted userspace hardirq 8*33fc1a21SPaul Mundt masking. 9*33fc1a21SPaul Mundt 10*33fc1a21SPaul Mundt SH-4A and newer interrupt blocks all support a special shadowed 11*33fc1a21SPaul Mundt page with all non-masking registers obscured when mapped in to 12*33fc1a21SPaul Mundt userspace. This is primarily for use by userspace device 13*33fc1a21SPaul Mundt drivers that are using special priority levels. 14*33fc1a21SPaul Mundt 15*33fc1a21SPaul Mundt If in doubt, say N. 16*33fc1a21SPaul Mundt 17*33fc1a21SPaul Mundtconfig INTC_BALANCING 18*33fc1a21SPaul Mundt bool "Hardware IRQ balancing support" 19*33fc1a21SPaul Mundt depends on SMP && SUPERH && CPU_SHX3 20*33fc1a21SPaul Mundt help 21*33fc1a21SPaul Mundt This enables support for IRQ auto-distribution mode on SH-X3 22*33fc1a21SPaul Mundt SMP parts. All of the balancing and CPU wakeup decisions are 23*33fc1a21SPaul Mundt taken care of automatically by hardware for distributed 24*33fc1a21SPaul Mundt vectors. 25*33fc1a21SPaul Mundt 26*33fc1a21SPaul Mundt If in doubt, say N. 27*33fc1a21SPaul Mundt 28*33fc1a21SPaul Mundtconfig INTC_MAPPING_DEBUG 29*33fc1a21SPaul Mundt bool "Expose IRQ to per-controller id mapping via debugfs" 30*33fc1a21SPaul Mundt depends on DEBUG_FS 31*33fc1a21SPaul Mundt help 32*33fc1a21SPaul Mundt This will create a debugfs entry for showing the relationship 33*33fc1a21SPaul Mundt between system IRQs and the per-controller id tables. 34*33fc1a21SPaul Mundt 35*33fc1a21SPaul Mundt If in doubt, say N. 36