1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Driver for Western Digital WD7193, WD7197 and WD7296 SCSI cards 4 * Copyright 2013 Ondrej Zary 5 * 6 * Original driver by 7 * Aaron Dewell <dewell@woods.net> 8 * Gaerti <Juergen.Gaertner@mbox.si.uni-hannover.de> 9 * 10 * HW documentation available in book: 11 * 12 * SPIDER Command Protocol 13 * by Chandru M. Sippy 14 * SCSI Storage Products (MCP) 15 * Western Digital Corporation 16 * 09-15-95 17 * 18 * http://web.archive.org/web/20070717175254/http://sun1.rrzn.uni-hannover.de/gaertner.juergen/wd719x/Linux/Docu/Spider/ 19 */ 20 21 /* 22 * Driver workflow: 23 * 1. SCSI command is transformed to SCB (Spider Control Block) by the 24 * queuecommand function. 25 * 2. The address of the SCB is stored in a list to be able to access it, if 26 * something goes wrong. 27 * 3. The address of the SCB is written to the Controller, which loads the SCB 28 * via BM-DMA and processes it. 29 * 4. After it has finished, it generates an interrupt, and sets registers. 30 * 31 * flaws: 32 * - abort/reset functions 33 * 34 * ToDo: 35 * - tagged queueing 36 */ 37 38 #include <linux/interrupt.h> 39 #include <linux/module.h> 40 #include <linux/delay.h> 41 #include <linux/pci.h> 42 #include <linux/firmware.h> 43 #include <linux/eeprom_93cx6.h> 44 #include <scsi/scsi_cmnd.h> 45 #include <scsi/scsi_device.h> 46 #include <scsi/scsi_host.h> 47 #include "wd719x.h" 48 49 /* low-level register access */ 50 static inline u8 wd719x_readb(struct wd719x *wd, u8 reg) 51 { 52 return ioread8(wd->base + reg); 53 } 54 55 static inline u32 wd719x_readl(struct wd719x *wd, u8 reg) 56 { 57 return ioread32(wd->base + reg); 58 } 59 60 static inline void wd719x_writeb(struct wd719x *wd, u8 reg, u8 val) 61 { 62 iowrite8(val, wd->base + reg); 63 } 64 65 static inline void wd719x_writew(struct wd719x *wd, u8 reg, u16 val) 66 { 67 iowrite16(val, wd->base + reg); 68 } 69 70 static inline void wd719x_writel(struct wd719x *wd, u8 reg, u32 val) 71 { 72 iowrite32(val, wd->base + reg); 73 } 74 75 /* wait until the command register is ready */ 76 static inline int wd719x_wait_ready(struct wd719x *wd) 77 { 78 int i = 0; 79 80 do { 81 if (wd719x_readb(wd, WD719X_AMR_COMMAND) == WD719X_CMD_READY) 82 return 0; 83 udelay(1); 84 } while (i++ < WD719X_WAIT_FOR_CMD_READY); 85 86 dev_err(&wd->pdev->dev, "command register is not ready: 0x%02x\n", 87 wd719x_readb(wd, WD719X_AMR_COMMAND)); 88 89 return -ETIMEDOUT; 90 } 91 92 /* poll interrupt status register until command finishes */ 93 static inline int wd719x_wait_done(struct wd719x *wd, int timeout) 94 { 95 u8 status; 96 97 while (timeout > 0) { 98 status = wd719x_readb(wd, WD719X_AMR_INT_STATUS); 99 if (status) 100 break; 101 timeout--; 102 udelay(1); 103 } 104 105 if (timeout <= 0) { 106 dev_err(&wd->pdev->dev, "direct command timed out\n"); 107 return -ETIMEDOUT; 108 } 109 110 if (status != WD719X_INT_NOERRORS) { 111 u8 sue = wd719x_readb(wd, WD719X_AMR_SCB_ERROR); 112 /* we get this after wd719x_dev_reset, it's not an error */ 113 if (sue == WD719X_SUE_TERM) 114 return 0; 115 /* we get this after wd719x_bus_reset, it's not an error */ 116 if (sue == WD719X_SUE_RESET) 117 return 0; 118 dev_err(&wd->pdev->dev, "direct command failed, status 0x%02x, SUE 0x%02x\n", 119 status, sue); 120 return -EIO; 121 } 122 123 return 0; 124 } 125 126 static int wd719x_direct_cmd(struct wd719x *wd, u8 opcode, u8 dev, u8 lun, 127 u8 tag, dma_addr_t data, int timeout) 128 { 129 int ret = 0; 130 131 /* clear interrupt status register (allow command register to clear) */ 132 wd719x_writeb(wd, WD719X_AMR_INT_STATUS, WD719X_INT_NONE); 133 134 /* Wait for the Command register to become free */ 135 if (wd719x_wait_ready(wd)) 136 return -ETIMEDOUT; 137 138 /* disable interrupts except for RESET/ABORT (it breaks them) */ 139 if (opcode != WD719X_CMD_BUSRESET && opcode != WD719X_CMD_ABORT && 140 opcode != WD719X_CMD_ABORT_TAG && opcode != WD719X_CMD_RESET) 141 dev |= WD719X_DISABLE_INT; 142 wd719x_writeb(wd, WD719X_AMR_CMD_PARAM, dev); 143 wd719x_writeb(wd, WD719X_AMR_CMD_PARAM_2, lun); 144 wd719x_writeb(wd, WD719X_AMR_CMD_PARAM_3, tag); 145 if (data) 146 wd719x_writel(wd, WD719X_AMR_SCB_IN, data); 147 148 /* clear interrupt status register again */ 149 wd719x_writeb(wd, WD719X_AMR_INT_STATUS, WD719X_INT_NONE); 150 151 /* Now, write the command */ 152 wd719x_writeb(wd, WD719X_AMR_COMMAND, opcode); 153 154 if (timeout) /* wait for the command to complete */ 155 ret = wd719x_wait_done(wd, timeout); 156 157 /* clear interrupt status register (clean up) */ 158 if (opcode != WD719X_CMD_READ_FIRMVER) 159 wd719x_writeb(wd, WD719X_AMR_INT_STATUS, WD719X_INT_NONE); 160 161 return ret; 162 } 163 164 static void wd719x_destroy(struct wd719x *wd) 165 { 166 /* stop the RISC */ 167 if (wd719x_direct_cmd(wd, WD719X_CMD_SLEEP, 0, 0, 0, 0, 168 WD719X_WAIT_FOR_RISC)) 169 dev_warn(&wd->pdev->dev, "RISC sleep command failed\n"); 170 /* disable RISC */ 171 wd719x_writeb(wd, WD719X_PCI_MODE_SELECT, 0); 172 173 WARN_ON_ONCE(!list_empty(&wd->active_scbs)); 174 175 /* free internal buffers */ 176 dma_free_coherent(&wd->pdev->dev, wd->fw_size, wd->fw_virt, 177 wd->fw_phys); 178 wd->fw_virt = NULL; 179 dma_free_coherent(&wd->pdev->dev, WD719X_HASH_TABLE_SIZE, wd->hash_virt, 180 wd->hash_phys); 181 wd->hash_virt = NULL; 182 dma_free_coherent(&wd->pdev->dev, sizeof(struct wd719x_host_param), 183 wd->params, wd->params_phys); 184 wd->params = NULL; 185 free_irq(wd->pdev->irq, wd); 186 } 187 188 /* finish a SCSI command, unmap buffers */ 189 static void wd719x_finish_cmd(struct wd719x_scb *scb, int result) 190 { 191 struct scsi_cmnd *cmd = scb->cmd; 192 struct wd719x *wd = shost_priv(cmd->device->host); 193 194 list_del(&scb->list); 195 196 dma_unmap_single(&wd->pdev->dev, scb->phys, 197 sizeof(struct wd719x_scb), DMA_BIDIRECTIONAL); 198 scsi_dma_unmap(cmd); 199 dma_unmap_single(&wd->pdev->dev, scb->dma_handle, 200 SCSI_SENSE_BUFFERSIZE, DMA_FROM_DEVICE); 201 202 cmd->result = result << 16; 203 scsi_done(cmd); 204 } 205 206 /* Build a SCB and send it to the card */ 207 static enum scsi_qc_status wd719x_queuecommand(struct Scsi_Host *sh, 208 struct scsi_cmnd *cmd) 209 { 210 int i, count_sg; 211 unsigned long flags; 212 struct wd719x_scb *scb = scsi_cmd_priv(cmd); 213 struct wd719x *wd = shost_priv(sh); 214 215 scb->cmd = cmd; 216 217 scb->CDB_tag = 0; /* Tagged queueing not supported yet */ 218 scb->devid = cmd->device->id; 219 scb->lun = cmd->device->lun; 220 221 /* copy the command */ 222 memcpy(scb->CDB, cmd->cmnd, cmd->cmd_len); 223 224 /* map SCB */ 225 scb->phys = dma_map_single(&wd->pdev->dev, scb, sizeof(*scb), 226 DMA_BIDIRECTIONAL); 227 228 if (dma_mapping_error(&wd->pdev->dev, scb->phys)) 229 goto out_error; 230 231 /* map sense buffer */ 232 scb->sense_buf_length = SCSI_SENSE_BUFFERSIZE; 233 scb->dma_handle = dma_map_single(&wd->pdev->dev, cmd->sense_buffer, 234 SCSI_SENSE_BUFFERSIZE, DMA_FROM_DEVICE); 235 if (dma_mapping_error(&wd->pdev->dev, scb->dma_handle)) 236 goto out_unmap_scb; 237 scb->sense_buf = cpu_to_le32(scb->dma_handle); 238 239 /* request autosense */ 240 scb->SCB_options |= WD719X_SCB_FLAGS_AUTO_REQUEST_SENSE; 241 242 /* check direction */ 243 if (cmd->sc_data_direction == DMA_TO_DEVICE) 244 scb->SCB_options |= WD719X_SCB_FLAGS_CHECK_DIRECTION 245 | WD719X_SCB_FLAGS_PCI_TO_SCSI; 246 else if (cmd->sc_data_direction == DMA_FROM_DEVICE) 247 scb->SCB_options |= WD719X_SCB_FLAGS_CHECK_DIRECTION; 248 249 /* Scather/gather */ 250 count_sg = scsi_dma_map(cmd); 251 if (count_sg < 0) 252 goto out_unmap_sense; 253 BUG_ON(count_sg > WD719X_SG); 254 255 if (count_sg) { 256 struct scatterlist *sg; 257 258 scb->data_length = cpu_to_le32(count_sg * 259 sizeof(struct wd719x_sglist)); 260 scb->data_p = cpu_to_le32(scb->phys + 261 offsetof(struct wd719x_scb, sg_list)); 262 263 scsi_for_each_sg(cmd, sg, count_sg, i) { 264 scb->sg_list[i].ptr = cpu_to_le32(sg_dma_address(sg)); 265 scb->sg_list[i].length = cpu_to_le32(sg_dma_len(sg)); 266 } 267 scb->SCB_options |= WD719X_SCB_FLAGS_DO_SCATTER_GATHER; 268 } else { /* zero length */ 269 scb->data_length = 0; 270 scb->data_p = 0; 271 } 272 273 spin_lock_irqsave(wd->sh->host_lock, flags); 274 275 /* check if the Command register is free */ 276 if (wd719x_readb(wd, WD719X_AMR_COMMAND) != WD719X_CMD_READY) { 277 spin_unlock_irqrestore(wd->sh->host_lock, flags); 278 return SCSI_MLQUEUE_HOST_BUSY; 279 } 280 281 list_add(&scb->list, &wd->active_scbs); 282 283 /* write pointer to the AMR */ 284 wd719x_writel(wd, WD719X_AMR_SCB_IN, scb->phys); 285 /* send SCB opcode */ 286 wd719x_writeb(wd, WD719X_AMR_COMMAND, WD719X_CMD_PROCESS_SCB); 287 288 spin_unlock_irqrestore(wd->sh->host_lock, flags); 289 return 0; 290 291 out_unmap_sense: 292 dma_unmap_single(&wd->pdev->dev, scb->dma_handle, 293 SCSI_SENSE_BUFFERSIZE, DMA_FROM_DEVICE); 294 out_unmap_scb: 295 dma_unmap_single(&wd->pdev->dev, scb->phys, sizeof(*scb), 296 DMA_BIDIRECTIONAL); 297 out_error: 298 cmd->result = DID_ERROR << 16; 299 scsi_done(cmd); 300 return 0; 301 } 302 303 static int wd719x_chip_init(struct wd719x *wd) 304 { 305 int i, ret; 306 u32 risc_init[3]; 307 const struct firmware *fw_wcs, *fw_risc; 308 const char fwname_wcs[] = "wd719x-wcs.bin"; 309 const char fwname_risc[] = "wd719x-risc.bin"; 310 311 memset(wd->hash_virt, 0, WD719X_HASH_TABLE_SIZE); 312 313 /* WCS (sequencer) firmware */ 314 ret = request_firmware(&fw_wcs, fwname_wcs, &wd->pdev->dev); 315 if (ret) { 316 dev_err(&wd->pdev->dev, "Unable to load firmware %s: %d\n", 317 fwname_wcs, ret); 318 return ret; 319 } 320 /* RISC firmware */ 321 ret = request_firmware(&fw_risc, fwname_risc, &wd->pdev->dev); 322 if (ret) { 323 dev_err(&wd->pdev->dev, "Unable to load firmware %s: %d\n", 324 fwname_risc, ret); 325 release_firmware(fw_wcs); 326 return ret; 327 } 328 wd->fw_size = ALIGN(fw_wcs->size, 4) + fw_risc->size; 329 330 if (!wd->fw_virt) 331 wd->fw_virt = dma_alloc_coherent(&wd->pdev->dev, wd->fw_size, 332 &wd->fw_phys, GFP_KERNEL); 333 if (!wd->fw_virt) { 334 ret = -ENOMEM; 335 goto wd719x_init_end; 336 } 337 338 /* make a fresh copy of WCS and RISC code */ 339 memcpy(wd->fw_virt, fw_wcs->data, fw_wcs->size); 340 memcpy(wd->fw_virt + ALIGN(fw_wcs->size, 4), fw_risc->data, 341 fw_risc->size); 342 343 /* Reset the Spider Chip and adapter itself */ 344 wd719x_writeb(wd, WD719X_PCI_PORT_RESET, WD719X_PCI_RESET); 345 udelay(WD719X_WAIT_FOR_RISC); 346 /* Clear PIO mode bits set by BIOS */ 347 wd719x_writeb(wd, WD719X_AMR_CMD_PARAM, 0); 348 /* ensure RISC is not running */ 349 wd719x_writeb(wd, WD719X_PCI_MODE_SELECT, 0); 350 /* ensure command port is ready */ 351 wd719x_writeb(wd, WD719X_AMR_COMMAND, 0); 352 if (wd719x_wait_ready(wd)) { 353 ret = -ETIMEDOUT; 354 goto wd719x_init_end; 355 } 356 357 /* Transfer the first 2K words of RISC code to kick start the uP */ 358 risc_init[0] = wd->fw_phys; /* WCS FW */ 359 risc_init[1] = wd->fw_phys + ALIGN(fw_wcs->size, 4); /* RISC FW */ 360 risc_init[2] = wd->hash_phys; /* hash table */ 361 362 /* clear DMA status */ 363 wd719x_writeb(wd, WD719X_PCI_CHANNEL2_3STATUS, 0); 364 365 /* address to read firmware from */ 366 wd719x_writel(wd, WD719X_PCI_EXTERNAL_ADDR, risc_init[1]); 367 /* base address to write firmware to (on card) */ 368 wd719x_writew(wd, WD719X_PCI_INTERNAL_ADDR, WD719X_PRAM_BASE_ADDR); 369 /* size: first 2K words */ 370 wd719x_writew(wd, WD719X_PCI_DMA_TRANSFER_SIZE, 2048 * 2); 371 /* start DMA */ 372 wd719x_writeb(wd, WD719X_PCI_CHANNEL2_3CMD, WD719X_START_CHANNEL2_3DMA); 373 374 /* wait for DMA to complete */ 375 i = WD719X_WAIT_FOR_RISC; 376 while (i-- > 0) { 377 u8 status = wd719x_readb(wd, WD719X_PCI_CHANNEL2_3STATUS); 378 if (status == WD719X_START_CHANNEL2_3DONE) 379 break; 380 if (status == WD719X_START_CHANNEL2_3ABORT) { 381 dev_warn(&wd->pdev->dev, "RISC bootstrap failed: DMA aborted\n"); 382 ret = -EIO; 383 goto wd719x_init_end; 384 } 385 udelay(1); 386 } 387 if (i < 1) { 388 dev_warn(&wd->pdev->dev, "RISC bootstrap failed: DMA timeout\n"); 389 ret = -ETIMEDOUT; 390 goto wd719x_init_end; 391 } 392 393 /* firmware is loaded, now initialize and wake up the RISC */ 394 /* write RISC initialization long words to Spider */ 395 wd719x_writel(wd, WD719X_AMR_SCB_IN, risc_init[0]); 396 wd719x_writel(wd, WD719X_AMR_SCB_IN + 4, risc_init[1]); 397 wd719x_writel(wd, WD719X_AMR_SCB_IN + 8, risc_init[2]); 398 399 /* disable interrupts during initialization of RISC */ 400 wd719x_writeb(wd, WD719X_AMR_CMD_PARAM, WD719X_DISABLE_INT); 401 402 /* issue INITIALIZE RISC comand */ 403 wd719x_writeb(wd, WD719X_AMR_COMMAND, WD719X_CMD_INIT_RISC); 404 /* enable advanced mode (wake up RISC) */ 405 wd719x_writeb(wd, WD719X_PCI_MODE_SELECT, WD719X_ENABLE_ADVANCE_MODE); 406 udelay(WD719X_WAIT_FOR_RISC); 407 408 ret = wd719x_wait_done(wd, WD719X_WAIT_FOR_RISC); 409 /* clear interrupt status register */ 410 wd719x_writeb(wd, WD719X_AMR_INT_STATUS, WD719X_INT_NONE); 411 if (ret) { 412 dev_warn(&wd->pdev->dev, "Unable to initialize RISC\n"); 413 goto wd719x_init_end; 414 } 415 /* RISC is up and running */ 416 417 /* Read FW version from RISC */ 418 ret = wd719x_direct_cmd(wd, WD719X_CMD_READ_FIRMVER, 0, 0, 0, 0, 419 WD719X_WAIT_FOR_RISC); 420 if (ret) { 421 dev_warn(&wd->pdev->dev, "Unable to read firmware version\n"); 422 goto wd719x_init_end; 423 } 424 dev_info(&wd->pdev->dev, "RISC initialized with firmware version %.2x.%.2x\n", 425 wd719x_readb(wd, WD719X_AMR_SCB_OUT + 1), 426 wd719x_readb(wd, WD719X_AMR_SCB_OUT)); 427 428 /* RESET SCSI bus */ 429 ret = wd719x_direct_cmd(wd, WD719X_CMD_BUSRESET, 0, 0, 0, 0, 430 WD719X_WAIT_FOR_SCSI_RESET); 431 if (ret) { 432 dev_warn(&wd->pdev->dev, "SCSI bus reset failed\n"); 433 goto wd719x_init_end; 434 } 435 436 /* use HostParameter structure to set Spider's Host Parameter Block */ 437 ret = wd719x_direct_cmd(wd, WD719X_CMD_SET_PARAM, 0, 438 sizeof(struct wd719x_host_param), 0, 439 wd->params_phys, WD719X_WAIT_FOR_RISC); 440 if (ret) { 441 dev_warn(&wd->pdev->dev, "Failed to set HOST PARAMETERS\n"); 442 goto wd719x_init_end; 443 } 444 445 /* initiate SCAM (does nothing if disabled in BIOS) */ 446 /* bug?: we should pass a mask of static IDs which we don't have */ 447 ret = wd719x_direct_cmd(wd, WD719X_CMD_INIT_SCAM, 0, 0, 0, 0, 448 WD719X_WAIT_FOR_SCSI_RESET); 449 if (ret) { 450 dev_warn(&wd->pdev->dev, "SCAM initialization failed\n"); 451 goto wd719x_init_end; 452 } 453 454 /* clear AMR_BIOS_SHARE_INT register */ 455 wd719x_writeb(wd, WD719X_AMR_BIOS_SHARE_INT, 0); 456 457 wd719x_init_end: 458 release_firmware(fw_wcs); 459 release_firmware(fw_risc); 460 461 return ret; 462 } 463 464 static int wd719x_abort(struct scsi_cmnd *cmd) 465 { 466 int action, result; 467 unsigned long flags; 468 struct wd719x_scb *scb = scsi_cmd_priv(cmd); 469 struct wd719x *wd = shost_priv(cmd->device->host); 470 struct device *dev = &wd->pdev->dev; 471 472 dev_info(dev, "abort command, tag: %x\n", scsi_cmd_to_rq(cmd)->tag); 473 474 action = WD719X_CMD_ABORT; 475 476 spin_lock_irqsave(wd->sh->host_lock, flags); 477 result = wd719x_direct_cmd(wd, action, cmd->device->id, 478 cmd->device->lun, scsi_cmd_to_rq(cmd)->tag, 479 scb->phys, 0); 480 wd719x_finish_cmd(scb, DID_ABORT); 481 spin_unlock_irqrestore(wd->sh->host_lock, flags); 482 if (result) 483 return FAILED; 484 485 return SUCCESS; 486 } 487 488 static int wd719x_reset(struct scsi_cmnd *cmd, u8 opcode, u8 device) 489 { 490 int result; 491 unsigned long flags; 492 struct wd719x *wd = shost_priv(cmd->device->host); 493 struct wd719x_scb *scb, *tmp; 494 495 dev_info(&wd->pdev->dev, "%s reset requested\n", 496 (opcode == WD719X_CMD_BUSRESET) ? "bus" : "device"); 497 498 spin_lock_irqsave(wd->sh->host_lock, flags); 499 result = wd719x_direct_cmd(wd, opcode, device, 0, 0, 0, 500 WD719X_WAIT_FOR_SCSI_RESET); 501 /* flush all SCBs (or all for a device if dev_reset) */ 502 list_for_each_entry_safe(scb, tmp, &wd->active_scbs, list) { 503 if (opcode == WD719X_CMD_BUSRESET || 504 scb->cmd->device->id == device) 505 wd719x_finish_cmd(scb, DID_RESET); 506 } 507 spin_unlock_irqrestore(wd->sh->host_lock, flags); 508 if (result) 509 return FAILED; 510 511 return SUCCESS; 512 } 513 514 static int wd719x_dev_reset(struct scsi_cmnd *cmd) 515 { 516 return wd719x_reset(cmd, WD719X_CMD_RESET, cmd->device->id); 517 } 518 519 static int wd719x_bus_reset(struct scsi_cmnd *cmd) 520 { 521 return wd719x_reset(cmd, WD719X_CMD_BUSRESET, 0); 522 } 523 524 static int wd719x_host_reset(struct scsi_cmnd *cmd) 525 { 526 struct wd719x *wd = shost_priv(cmd->device->host); 527 struct wd719x_scb *scb, *tmp; 528 unsigned long flags; 529 530 dev_info(&wd->pdev->dev, "host reset requested\n"); 531 spin_lock_irqsave(wd->sh->host_lock, flags); 532 /* stop the RISC */ 533 if (wd719x_direct_cmd(wd, WD719X_CMD_SLEEP, 0, 0, 0, 0, 534 WD719X_WAIT_FOR_RISC)) 535 dev_warn(&wd->pdev->dev, "RISC sleep command failed\n"); 536 /* disable RISC */ 537 wd719x_writeb(wd, WD719X_PCI_MODE_SELECT, 0); 538 539 /* flush all SCBs */ 540 list_for_each_entry_safe(scb, tmp, &wd->active_scbs, list) 541 wd719x_finish_cmd(scb, DID_RESET); 542 spin_unlock_irqrestore(wd->sh->host_lock, flags); 543 544 /* Try to reinit the RISC */ 545 return wd719x_chip_init(wd) == 0 ? SUCCESS : FAILED; 546 } 547 548 static int wd719x_biosparam(struct scsi_device *sdev, struct gendisk *unused, 549 sector_t capacity, int geom[]) 550 { 551 if (capacity >= 0x200000) { 552 geom[0] = 255; /* heads */ 553 geom[1] = 63; /* sectors */ 554 } else { 555 geom[0] = 64; /* heads */ 556 geom[1] = 32; /* sectors */ 557 } 558 geom[2] = sector_div(capacity, geom[0] * geom[1]); /* cylinders */ 559 560 return 0; 561 } 562 563 /* process a SCB-completion interrupt */ 564 static inline void wd719x_interrupt_SCB(struct wd719x *wd, 565 union wd719x_regs regs, 566 struct wd719x_scb *scb) 567 { 568 int result; 569 570 /* now have to find result from card */ 571 switch (regs.bytes.SUE) { 572 case WD719X_SUE_NOERRORS: 573 result = DID_OK; 574 break; 575 case WD719X_SUE_REJECTED: 576 dev_err(&wd->pdev->dev, "command rejected\n"); 577 result = DID_ERROR; 578 break; 579 case WD719X_SUE_SCBQFULL: 580 dev_err(&wd->pdev->dev, "SCB queue is full\n"); 581 result = DID_ERROR; 582 break; 583 case WD719X_SUE_TERM: 584 dev_dbg(&wd->pdev->dev, "SCB terminated by direct command\n"); 585 result = DID_ABORT; /* or DID_RESET? */ 586 break; 587 case WD719X_SUE_CHAN1ABORT: 588 case WD719X_SUE_CHAN23ABORT: 589 result = DID_ABORT; 590 dev_err(&wd->pdev->dev, "DMA abort\n"); 591 break; 592 case WD719X_SUE_CHAN1PAR: 593 case WD719X_SUE_CHAN23PAR: 594 result = DID_PARITY; 595 dev_err(&wd->pdev->dev, "DMA parity error\n"); 596 break; 597 case WD719X_SUE_TIMEOUT: 598 result = DID_TIME_OUT; 599 dev_dbg(&wd->pdev->dev, "selection timeout\n"); 600 break; 601 case WD719X_SUE_RESET: 602 dev_dbg(&wd->pdev->dev, "bus reset occurred\n"); 603 result = DID_RESET; 604 break; 605 case WD719X_SUE_BUSERROR: 606 dev_dbg(&wd->pdev->dev, "SCSI bus error\n"); 607 result = DID_ERROR; 608 break; 609 case WD719X_SUE_WRONGWAY: 610 dev_err(&wd->pdev->dev, "wrong data transfer direction\n"); 611 result = DID_ERROR; 612 break; 613 case WD719X_SUE_BADPHASE: 614 dev_err(&wd->pdev->dev, "invalid SCSI phase\n"); 615 result = DID_ERROR; 616 break; 617 case WD719X_SUE_TOOLONG: 618 dev_err(&wd->pdev->dev, "record too long\n"); 619 result = DID_ERROR; 620 break; 621 case WD719X_SUE_BUSFREE: 622 dev_err(&wd->pdev->dev, "unexpected bus free\n"); 623 result = DID_NO_CONNECT; /* or DID_ERROR ???*/ 624 break; 625 case WD719X_SUE_ARSDONE: 626 dev_dbg(&wd->pdev->dev, "auto request sense\n"); 627 if (regs.bytes.SCSI == 0) 628 result = DID_OK; 629 else 630 result = DID_PARITY; 631 break; 632 case WD719X_SUE_IGNORED: 633 dev_err(&wd->pdev->dev, "target id %d ignored command\n", 634 scb->cmd->device->id); 635 result = DID_NO_CONNECT; 636 break; 637 case WD719X_SUE_WRONGTAGS: 638 dev_err(&wd->pdev->dev, "reversed tags\n"); 639 result = DID_ERROR; 640 break; 641 case WD719X_SUE_BADTAGS: 642 dev_err(&wd->pdev->dev, "tag type not supported by target\n"); 643 result = DID_ERROR; 644 break; 645 case WD719X_SUE_NOSCAMID: 646 dev_err(&wd->pdev->dev, "no SCAM soft ID available\n"); 647 result = DID_ERROR; 648 break; 649 default: 650 dev_warn(&wd->pdev->dev, "unknown SUE error code: 0x%x\n", 651 regs.bytes.SUE); 652 result = DID_ERROR; 653 break; 654 } 655 656 wd719x_finish_cmd(scb, result); 657 } 658 659 static irqreturn_t wd719x_interrupt(int irq, void *dev_id) 660 { 661 struct wd719x *wd = dev_id; 662 union wd719x_regs regs; 663 unsigned long flags; 664 u32 SCB_out; 665 666 spin_lock_irqsave(wd->sh->host_lock, flags); 667 /* read SCB pointer back from card */ 668 SCB_out = wd719x_readl(wd, WD719X_AMR_SCB_OUT); 669 /* read all status info at once */ 670 regs.all = cpu_to_le32(wd719x_readl(wd, WD719X_AMR_OP_CODE)); 671 672 switch (regs.bytes.INT) { 673 case WD719X_INT_NONE: 674 spin_unlock_irqrestore(wd->sh->host_lock, flags); 675 return IRQ_NONE; 676 case WD719X_INT_LINKNOSTATUS: 677 dev_err(&wd->pdev->dev, "linked command completed with no status\n"); 678 break; 679 case WD719X_INT_BADINT: 680 dev_err(&wd->pdev->dev, "unsolicited interrupt\n"); 681 break; 682 case WD719X_INT_NOERRORS: 683 case WD719X_INT_LINKNOERRORS: 684 case WD719X_INT_ERRORSLOGGED: 685 case WD719X_INT_SPIDERFAILED: 686 /* was the cmd completed a direct or SCB command? */ 687 if (regs.bytes.OPC == WD719X_CMD_PROCESS_SCB) { 688 struct wd719x_scb *scb; 689 list_for_each_entry(scb, &wd->active_scbs, list) 690 if (SCB_out == scb->phys) 691 break; 692 if (SCB_out == scb->phys) 693 wd719x_interrupt_SCB(wd, regs, scb); 694 else 695 dev_err(&wd->pdev->dev, "card returned invalid SCB pointer\n"); 696 } else 697 dev_dbg(&wd->pdev->dev, "direct command 0x%x completed\n", 698 regs.bytes.OPC); 699 break; 700 case WD719X_INT_PIOREADY: 701 dev_err(&wd->pdev->dev, "card indicates PIO data ready but we never use PIO\n"); 702 /* interrupt will not be cleared until all data is read */ 703 break; 704 default: 705 dev_err(&wd->pdev->dev, "unknown interrupt reason: %d\n", 706 regs.bytes.INT); 707 708 } 709 /* clear interrupt so another can happen */ 710 wd719x_writeb(wd, WD719X_AMR_INT_STATUS, WD719X_INT_NONE); 711 spin_unlock_irqrestore(wd->sh->host_lock, flags); 712 713 return IRQ_HANDLED; 714 } 715 716 static void wd719x_eeprom_reg_read(struct eeprom_93cx6 *eeprom) 717 { 718 struct wd719x *wd = eeprom->data; 719 u8 reg = wd719x_readb(wd, WD719X_PCI_GPIO_DATA); 720 721 eeprom->reg_data_out = reg & WD719X_EE_DO; 722 } 723 724 static void wd719x_eeprom_reg_write(struct eeprom_93cx6 *eeprom) 725 { 726 struct wd719x *wd = eeprom->data; 727 u8 reg = 0; 728 729 if (eeprom->reg_data_in) 730 reg |= WD719X_EE_DI; 731 if (eeprom->reg_data_clock) 732 reg |= WD719X_EE_CLK; 733 if (eeprom->reg_chip_select) 734 reg |= WD719X_EE_CS; 735 736 wd719x_writeb(wd, WD719X_PCI_GPIO_DATA, reg); 737 } 738 739 /* read config from EEPROM so it can be downloaded by the RISC on (re-)init */ 740 static void wd719x_read_eeprom(struct wd719x *wd) 741 { 742 struct eeprom_93cx6 eeprom; 743 u8 gpio; 744 struct wd719x_eeprom_header header; 745 746 eeprom.data = wd; 747 eeprom.register_read = wd719x_eeprom_reg_read; 748 eeprom.register_write = wd719x_eeprom_reg_write; 749 eeprom.width = PCI_EEPROM_WIDTH_93C46; 750 751 /* set all outputs to low */ 752 wd719x_writeb(wd, WD719X_PCI_GPIO_DATA, 0); 753 /* configure GPIO pins */ 754 gpio = wd719x_readb(wd, WD719X_PCI_GPIO_CONTROL); 755 /* GPIO outputs */ 756 gpio &= (~(WD719X_EE_CLK | WD719X_EE_DI | WD719X_EE_CS)); 757 /* GPIO input */ 758 gpio |= WD719X_EE_DO; 759 wd719x_writeb(wd, WD719X_PCI_GPIO_CONTROL, gpio); 760 761 /* read EEPROM header */ 762 eeprom_93cx6_multireadb(&eeprom, 0, (u8 *)&header, sizeof(header)); 763 764 if (header.sig1 == 'W' && header.sig2 == 'D') 765 eeprom_93cx6_multireadb(&eeprom, header.cfg_offset, 766 (u8 *)wd->params, 767 sizeof(struct wd719x_host_param)); 768 else { /* default EEPROM values */ 769 dev_warn(&wd->pdev->dev, "EEPROM signature is invalid (0x%02x 0x%02x), using default values\n", 770 header.sig1, header.sig2); 771 wd->params->ch_1_th = 0x10; /* 16 DWs = 64 B */ 772 wd->params->scsi_conf = 0x4c; /* 48ma, spue, parity check */ 773 wd->params->own_scsi_id = 0x07; /* ID 7, SCAM disabled */ 774 wd->params->sel_timeout = 0x4d; /* 250 ms */ 775 wd->params->sleep_timer = 0x01; 776 wd->params->cdb_size = cpu_to_le16(0x5555); /* all 6 B */ 777 wd->params->scsi_pad = 0x1b; 778 if (wd->type == WD719X_TYPE_7193) /* narrow card - disable */ 779 wd->params->wide = cpu_to_le32(0x00000000); 780 else /* initiate & respond to WIDE messages */ 781 wd->params->wide = cpu_to_le32(0xffffffff); 782 wd->params->sync = cpu_to_le32(0xffffffff); 783 wd->params->soft_mask = 0x00; /* all disabled */ 784 wd->params->unsol_mask = 0x00; /* all disabled */ 785 } 786 /* disable TAGGED messages */ 787 wd->params->tag_en = cpu_to_le16(0x0000); 788 } 789 790 /* Read card type from GPIO bits 1 and 3 */ 791 static enum wd719x_card_type wd719x_detect_type(struct wd719x *wd) 792 { 793 u8 card = wd719x_readb(wd, WD719X_PCI_GPIO_CONTROL); 794 795 card |= WD719X_GPIO_ID_BITS; 796 wd719x_writeb(wd, WD719X_PCI_GPIO_CONTROL, card); 797 card = wd719x_readb(wd, WD719X_PCI_GPIO_DATA) & WD719X_GPIO_ID_BITS; 798 switch (card) { 799 case 0x08: 800 return WD719X_TYPE_7193; 801 case 0x02: 802 return WD719X_TYPE_7197; 803 case 0x00: 804 return WD719X_TYPE_7296; 805 default: 806 dev_warn(&wd->pdev->dev, "unknown card type 0x%x\n", card); 807 return WD719X_TYPE_UNKNOWN; 808 } 809 } 810 811 static int wd719x_board_found(struct Scsi_Host *sh) 812 { 813 struct wd719x *wd = shost_priv(sh); 814 static const char * const card_types[] = { 815 "Unknown card", "WD7193", "WD7197", "WD7296" 816 }; 817 int ret; 818 819 INIT_LIST_HEAD(&wd->active_scbs); 820 821 sh->base = pci_resource_start(wd->pdev, 0); 822 823 wd->type = wd719x_detect_type(wd); 824 825 wd->sh = sh; 826 sh->irq = wd->pdev->irq; 827 wd->fw_virt = NULL; 828 829 /* memory area for host (EEPROM) parameters */ 830 wd->params = dma_alloc_coherent(&wd->pdev->dev, 831 sizeof(struct wd719x_host_param), 832 &wd->params_phys, GFP_KERNEL); 833 if (!wd->params) { 834 dev_warn(&wd->pdev->dev, "unable to allocate parameter buffer\n"); 835 return -ENOMEM; 836 } 837 838 /* memory area for the RISC for hash table of outstanding requests */ 839 wd->hash_virt = dma_alloc_coherent(&wd->pdev->dev, 840 WD719X_HASH_TABLE_SIZE, 841 &wd->hash_phys, GFP_KERNEL); 842 if (!wd->hash_virt) { 843 dev_warn(&wd->pdev->dev, "unable to allocate hash buffer\n"); 844 ret = -ENOMEM; 845 goto fail_free_params; 846 } 847 848 ret = request_irq(wd->pdev->irq, wd719x_interrupt, IRQF_SHARED, 849 "wd719x", wd); 850 if (ret) { 851 dev_warn(&wd->pdev->dev, "unable to assign IRQ %d\n", 852 wd->pdev->irq); 853 goto fail_free_hash; 854 } 855 856 /* read parameters from EEPROM */ 857 wd719x_read_eeprom(wd); 858 859 ret = wd719x_chip_init(wd); 860 if (ret) 861 goto fail_free_irq; 862 863 sh->this_id = wd->params->own_scsi_id & WD719X_EE_SCSI_ID_MASK; 864 865 dev_info(&wd->pdev->dev, "%s at I/O 0x%lx, IRQ %u, SCSI ID %d\n", 866 card_types[wd->type], sh->base, sh->irq, sh->this_id); 867 868 return 0; 869 870 fail_free_irq: 871 free_irq(wd->pdev->irq, wd); 872 fail_free_hash: 873 dma_free_coherent(&wd->pdev->dev, WD719X_HASH_TABLE_SIZE, wd->hash_virt, 874 wd->hash_phys); 875 fail_free_params: 876 dma_free_coherent(&wd->pdev->dev, sizeof(struct wd719x_host_param), 877 wd->params, wd->params_phys); 878 879 return ret; 880 } 881 882 static const struct scsi_host_template wd719x_template = { 883 .module = THIS_MODULE, 884 .name = "Western Digital 719x", 885 .cmd_size = sizeof(struct wd719x_scb), 886 .queuecommand = wd719x_queuecommand, 887 .eh_abort_handler = wd719x_abort, 888 .eh_device_reset_handler = wd719x_dev_reset, 889 .eh_bus_reset_handler = wd719x_bus_reset, 890 .eh_host_reset_handler = wd719x_host_reset, 891 .bios_param = wd719x_biosparam, 892 .proc_name = "wd719x", 893 .can_queue = 255, 894 .this_id = 7, 895 .sg_tablesize = WD719X_SG, 896 }; 897 898 static int wd719x_pci_probe(struct pci_dev *pdev, const struct pci_device_id *d) 899 { 900 int err; 901 struct Scsi_Host *sh; 902 struct wd719x *wd; 903 904 err = pci_enable_device(pdev); 905 if (err) 906 goto fail; 907 908 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)); 909 if (err) { 910 dev_warn(&pdev->dev, "Unable to set 32-bit DMA mask\n"); 911 goto disable_device; 912 } 913 914 err = pci_request_regions(pdev, "wd719x"); 915 if (err) 916 goto disable_device; 917 pci_set_master(pdev); 918 919 err = -ENODEV; 920 if (pci_resource_len(pdev, 0) == 0) 921 goto release_region; 922 923 err = -ENOMEM; 924 sh = scsi_host_alloc(&wd719x_template, sizeof(struct wd719x)); 925 if (!sh) 926 goto release_region; 927 928 wd = shost_priv(sh); 929 wd->base = pci_iomap(pdev, 0, 0); 930 if (!wd->base) 931 goto free_host; 932 wd->pdev = pdev; 933 934 err = wd719x_board_found(sh); 935 if (err) 936 goto unmap; 937 938 err = scsi_add_host(sh, &wd->pdev->dev); 939 if (err) 940 goto destroy; 941 942 scsi_scan_host(sh); 943 944 pci_set_drvdata(pdev, sh); 945 return 0; 946 947 destroy: 948 wd719x_destroy(wd); 949 unmap: 950 pci_iounmap(pdev, wd->base); 951 free_host: 952 scsi_host_put(sh); 953 release_region: 954 pci_release_regions(pdev); 955 disable_device: 956 pci_disable_device(pdev); 957 fail: 958 return err; 959 } 960 961 962 static void wd719x_pci_remove(struct pci_dev *pdev) 963 { 964 struct Scsi_Host *sh = pci_get_drvdata(pdev); 965 struct wd719x *wd = shost_priv(sh); 966 967 scsi_remove_host(sh); 968 wd719x_destroy(wd); 969 pci_iounmap(pdev, wd->base); 970 pci_release_regions(pdev); 971 pci_disable_device(pdev); 972 973 scsi_host_put(sh); 974 } 975 976 static const struct pci_device_id wd719x_pci_table[] = { 977 { PCI_DEVICE(PCI_VENDOR_ID_WD, 0x3296) }, 978 {} 979 }; 980 981 MODULE_DEVICE_TABLE(pci, wd719x_pci_table); 982 983 static struct pci_driver wd719x_pci_driver = { 984 .name = "wd719x", 985 .id_table = wd719x_pci_table, 986 .probe = wd719x_pci_probe, 987 .remove = wd719x_pci_remove, 988 }; 989 990 module_pci_driver(wd719x_pci_driver); 991 992 MODULE_DESCRIPTION("Western Digital WD7193/7197/7296 SCSI driver"); 993 MODULE_AUTHOR("Ondrej Zary, Aaron Dewell, Juergen Gaertner"); 994 MODULE_LICENSE("GPL"); 995 MODULE_FIRMWARE("wd719x-wcs.bin"); 996 MODULE_FIRMWARE("wd719x-risc.bin"); 997