13e0a4e85SThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-or-later */ 21da177e4SLinus Torvalds /* 31da177e4SLinus Torvalds * wd33c93.h - Linux device driver definitions for the 41da177e4SLinus Torvalds * Commodore Amiga A2091/590 SCSI controller card 51da177e4SLinus Torvalds * 61da177e4SLinus Torvalds * IMPORTANT: This file is for version 1.25 - 09/Jul/1997 71da177e4SLinus Torvalds * 81da177e4SLinus Torvalds * Copyright (c) 1996 John Shifflett, GeoLog Consulting 91da177e4SLinus Torvalds * john@geolog.com 101da177e4SLinus Torvalds * jshiffle@netcom.com 111da177e4SLinus Torvalds */ 121da177e4SLinus Torvalds #ifndef WD33C93_H 131da177e4SLinus Torvalds #define WD33C93_H 141da177e4SLinus Torvalds 151da177e4SLinus Torvalds 161da177e4SLinus Torvalds #define PROC_INTERFACE /* add code for /proc/scsi/wd33c93/xxx interface */ 171da177e4SLinus Torvalds #ifdef PROC_INTERFACE 181da177e4SLinus Torvalds #define PROC_STATISTICS /* add code for keeping various real time stats */ 191da177e4SLinus Torvalds #endif 201da177e4SLinus Torvalds 211da177e4SLinus Torvalds #define SYNC_DEBUG /* extra info on sync negotiation printed */ 221da177e4SLinus Torvalds #define DEBUGGING_ON /* enable command-line debugging bitmask */ 231da177e4SLinus Torvalds #define DEBUG_DEFAULTS 0 /* default debugging bitmask */ 241da177e4SLinus Torvalds 251da177e4SLinus Torvalds 261da177e4SLinus Torvalds #ifdef DEBUGGING_ON 271da177e4SLinus Torvalds #define DB(f,a) if (hostdata->args & (f)) a; 281da177e4SLinus Torvalds #else 291da177e4SLinus Torvalds #define DB(f,a) 301da177e4SLinus Torvalds #endif 311da177e4SLinus Torvalds 321da177e4SLinus Torvalds #define uchar unsigned char 331da177e4SLinus Torvalds 341da177e4SLinus Torvalds 351da177e4SLinus Torvalds /* wd register names */ 361da177e4SLinus Torvalds #define WD_OWN_ID 0x00 371da177e4SLinus Torvalds #define WD_CONTROL 0x01 381da177e4SLinus Torvalds #define WD_TIMEOUT_PERIOD 0x02 391da177e4SLinus Torvalds #define WD_CDB_1 0x03 401da177e4SLinus Torvalds #define WD_CDB_2 0x04 411da177e4SLinus Torvalds #define WD_CDB_3 0x05 421da177e4SLinus Torvalds #define WD_CDB_4 0x06 431da177e4SLinus Torvalds #define WD_CDB_5 0x07 441da177e4SLinus Torvalds #define WD_CDB_6 0x08 451da177e4SLinus Torvalds #define WD_CDB_7 0x09 461da177e4SLinus Torvalds #define WD_CDB_8 0x0a 471da177e4SLinus Torvalds #define WD_CDB_9 0x0b 481da177e4SLinus Torvalds #define WD_CDB_10 0x0c 491da177e4SLinus Torvalds #define WD_CDB_11 0x0d 501da177e4SLinus Torvalds #define WD_CDB_12 0x0e 511da177e4SLinus Torvalds #define WD_TARGET_LUN 0x0f 521da177e4SLinus Torvalds #define WD_COMMAND_PHASE 0x10 531da177e4SLinus Torvalds #define WD_SYNCHRONOUS_TRANSFER 0x11 541da177e4SLinus Torvalds #define WD_TRANSFER_COUNT_MSB 0x12 551da177e4SLinus Torvalds #define WD_TRANSFER_COUNT 0x13 561da177e4SLinus Torvalds #define WD_TRANSFER_COUNT_LSB 0x14 571da177e4SLinus Torvalds #define WD_DESTINATION_ID 0x15 581da177e4SLinus Torvalds #define WD_SOURCE_ID 0x16 591da177e4SLinus Torvalds #define WD_SCSI_STATUS 0x17 601da177e4SLinus Torvalds #define WD_COMMAND 0x18 611da177e4SLinus Torvalds #define WD_DATA 0x19 621da177e4SLinus Torvalds #define WD_QUEUE_TAG 0x1a 631da177e4SLinus Torvalds #define WD_AUXILIARY_STATUS 0x1f 641da177e4SLinus Torvalds 651da177e4SLinus Torvalds /* WD commands */ 661da177e4SLinus Torvalds #define WD_CMD_RESET 0x00 671da177e4SLinus Torvalds #define WD_CMD_ABORT 0x01 681da177e4SLinus Torvalds #define WD_CMD_ASSERT_ATN 0x02 691da177e4SLinus Torvalds #define WD_CMD_NEGATE_ACK 0x03 701da177e4SLinus Torvalds #define WD_CMD_DISCONNECT 0x04 711da177e4SLinus Torvalds #define WD_CMD_RESELECT 0x05 721da177e4SLinus Torvalds #define WD_CMD_SEL_ATN 0x06 731da177e4SLinus Torvalds #define WD_CMD_SEL 0x07 741da177e4SLinus Torvalds #define WD_CMD_SEL_ATN_XFER 0x08 751da177e4SLinus Torvalds #define WD_CMD_SEL_XFER 0x09 761da177e4SLinus Torvalds #define WD_CMD_RESEL_RECEIVE 0x0a 771da177e4SLinus Torvalds #define WD_CMD_RESEL_SEND 0x0b 781da177e4SLinus Torvalds #define WD_CMD_WAIT_SEL_RECEIVE 0x0c 791da177e4SLinus Torvalds #define WD_CMD_TRANS_ADDR 0x18 801da177e4SLinus Torvalds #define WD_CMD_TRANS_INFO 0x20 811da177e4SLinus Torvalds #define WD_CMD_TRANSFER_PAD 0x21 821da177e4SLinus Torvalds #define WD_CMD_SBT_MODE 0x80 831da177e4SLinus Torvalds 841da177e4SLinus Torvalds /* ASR register */ 851da177e4SLinus Torvalds #define ASR_INT (0x80) 861da177e4SLinus Torvalds #define ASR_LCI (0x40) 871da177e4SLinus Torvalds #define ASR_BSY (0x20) 881da177e4SLinus Torvalds #define ASR_CIP (0x10) 891da177e4SLinus Torvalds #define ASR_PE (0x02) 901da177e4SLinus Torvalds #define ASR_DBR (0x01) 911da177e4SLinus Torvalds 921da177e4SLinus Torvalds /* SCSI Bus Phases */ 931da177e4SLinus Torvalds #define PHS_DATA_OUT 0x00 941da177e4SLinus Torvalds #define PHS_DATA_IN 0x01 951da177e4SLinus Torvalds #define PHS_COMMAND 0x02 961da177e4SLinus Torvalds #define PHS_STATUS 0x03 971da177e4SLinus Torvalds #define PHS_MESS_OUT 0x06 981da177e4SLinus Torvalds #define PHS_MESS_IN 0x07 991da177e4SLinus Torvalds 1001da177e4SLinus Torvalds /* Command Status Register definitions */ 1011da177e4SLinus Torvalds 1021da177e4SLinus Torvalds /* reset state interrupts */ 1031da177e4SLinus Torvalds #define CSR_RESET 0x00 1041da177e4SLinus Torvalds #define CSR_RESET_AF 0x01 1051da177e4SLinus Torvalds 1061da177e4SLinus Torvalds /* successful completion interrupts */ 1071da177e4SLinus Torvalds #define CSR_RESELECT 0x10 1081da177e4SLinus Torvalds #define CSR_SELECT 0x11 1091da177e4SLinus Torvalds #define CSR_SEL_XFER_DONE 0x16 1101da177e4SLinus Torvalds #define CSR_XFER_DONE 0x18 1111da177e4SLinus Torvalds 1121da177e4SLinus Torvalds /* paused or aborted interrupts */ 1131da177e4SLinus Torvalds #define CSR_MSGIN 0x20 1141da177e4SLinus Torvalds #define CSR_SDP 0x21 1151da177e4SLinus Torvalds #define CSR_SEL_ABORT 0x22 1161da177e4SLinus Torvalds #define CSR_RESEL_ABORT 0x25 1171da177e4SLinus Torvalds #define CSR_RESEL_ABORT_AM 0x27 1181da177e4SLinus Torvalds #define CSR_ABORT 0x28 1191da177e4SLinus Torvalds 1201da177e4SLinus Torvalds /* terminated interrupts */ 1211da177e4SLinus Torvalds #define CSR_INVALID 0x40 1221da177e4SLinus Torvalds #define CSR_UNEXP_DISC 0x41 1231da177e4SLinus Torvalds #define CSR_TIMEOUT 0x42 1241da177e4SLinus Torvalds #define CSR_PARITY 0x43 1251da177e4SLinus Torvalds #define CSR_PARITY_ATN 0x44 1261da177e4SLinus Torvalds #define CSR_BAD_STATUS 0x45 1271da177e4SLinus Torvalds #define CSR_UNEXP 0x48 1281da177e4SLinus Torvalds 1291da177e4SLinus Torvalds /* service required interrupts */ 1301da177e4SLinus Torvalds #define CSR_RESEL 0x80 1311da177e4SLinus Torvalds #define CSR_RESEL_AM 0x81 1321da177e4SLinus Torvalds #define CSR_DISC 0x85 1331da177e4SLinus Torvalds #define CSR_SRV_REQ 0x88 1341da177e4SLinus Torvalds 1351da177e4SLinus Torvalds /* Own ID/CDB Size register */ 1361da177e4SLinus Torvalds #define OWNID_EAF 0x08 1371da177e4SLinus Torvalds #define OWNID_EHP 0x10 1381da177e4SLinus Torvalds #define OWNID_RAF 0x20 1391da177e4SLinus Torvalds #define OWNID_FS_8 0x00 1401da177e4SLinus Torvalds #define OWNID_FS_12 0x40 1411da177e4SLinus Torvalds #define OWNID_FS_16 0x80 1421da177e4SLinus Torvalds 1431da177e4SLinus Torvalds /* define these so we don't have to change a2091.c, etc. */ 1441da177e4SLinus Torvalds #define WD33C93_FS_8_10 OWNID_FS_8 1451da177e4SLinus Torvalds #define WD33C93_FS_12_15 OWNID_FS_12 1461da177e4SLinus Torvalds #define WD33C93_FS_16_20 OWNID_FS_16 1471da177e4SLinus Torvalds 148c03983acSJean Delvare /* pass input-clock explicitly. accepted mhz values are 8-10,12-20 */ 149a5d8421bSpeter fuerst #define WD33C93_FS_MHZ(mhz) (mhz) 150a5d8421bSpeter fuerst 1511da177e4SLinus Torvalds /* Control register */ 1521da177e4SLinus Torvalds #define CTRL_HSP 0x01 1531da177e4SLinus Torvalds #define CTRL_HA 0x02 1541da177e4SLinus Torvalds #define CTRL_IDI 0x04 1551da177e4SLinus Torvalds #define CTRL_EDI 0x08 1561da177e4SLinus Torvalds #define CTRL_HHP 0x10 1571da177e4SLinus Torvalds #define CTRL_POLLED 0x00 1581da177e4SLinus Torvalds #define CTRL_BURST 0x20 1591da177e4SLinus Torvalds #define CTRL_BUS 0x40 1601da177e4SLinus Torvalds #define CTRL_DMA 0x80 1611da177e4SLinus Torvalds 1621da177e4SLinus Torvalds /* Timeout Period register */ 1631da177e4SLinus Torvalds #define TIMEOUT_PERIOD_VALUE 20 /* 20 = 200 ms */ 1641da177e4SLinus Torvalds 1651da177e4SLinus Torvalds /* Synchronous Transfer Register */ 1661da177e4SLinus Torvalds #define STR_FSS 0x80 1671da177e4SLinus Torvalds 1681da177e4SLinus Torvalds /* Destination ID register */ 1691da177e4SLinus Torvalds #define DSTID_DPD 0x40 1701da177e4SLinus Torvalds #define DATA_OUT_DIR 0 1711da177e4SLinus Torvalds #define DATA_IN_DIR 1 1721da177e4SLinus Torvalds #define DSTID_SCC 0x80 1731da177e4SLinus Torvalds 1741da177e4SLinus Torvalds /* Source ID register */ 1751da177e4SLinus Torvalds #define SRCID_MASK 0x07 1761da177e4SLinus Torvalds #define SRCID_SIV 0x08 1771da177e4SLinus Torvalds #define SRCID_DSP 0x20 1781da177e4SLinus Torvalds #define SRCID_ES 0x40 1791da177e4SLinus Torvalds #define SRCID_ER 0x80 1801da177e4SLinus Torvalds 1811da177e4SLinus Torvalds /* This is what the 3393 chip looks like to us */ 1821da177e4SLinus Torvalds typedef struct { 1831da177e4SLinus Torvalds #ifdef CONFIG_WD33C93_PIO 1841da177e4SLinus Torvalds unsigned int SASR; 1851da177e4SLinus Torvalds unsigned int SCMD; 1861da177e4SLinus Torvalds #else 1871da177e4SLinus Torvalds volatile unsigned char *SASR; 1881da177e4SLinus Torvalds volatile unsigned char *SCMD; 1891da177e4SLinus Torvalds #endif 1901da177e4SLinus Torvalds } wd33c93_regs; 1911da177e4SLinus Torvalds 1921da177e4SLinus Torvalds 1931da177e4SLinus Torvalds typedef int (*dma_setup_t) (struct scsi_cmnd *SCpnt, int dir_in); 1941da177e4SLinus Torvalds typedef void (*dma_stop_t) (struct Scsi_Host *instance, 1951da177e4SLinus Torvalds struct scsi_cmnd *SCpnt, int status); 1961da177e4SLinus Torvalds 1971da177e4SLinus Torvalds 1981da177e4SLinus Torvalds #define ILLEGAL_STATUS_BYTE 0xff 1991da177e4SLinus Torvalds 2001da177e4SLinus Torvalds #define DEFAULT_SX_PER 376 /* (ns) fairly safe */ 2011da177e4SLinus Torvalds #define DEFAULT_SX_OFF 0 /* aka async */ 2021da177e4SLinus Torvalds 2031da177e4SLinus Torvalds #define OPTIMUM_SX_PER 252 /* (ns) best we can do (mult-of-4) */ 2041da177e4SLinus Torvalds #define OPTIMUM_SX_OFF 12 /* size of wd3393 fifo */ 2051da177e4SLinus Torvalds 2061da177e4SLinus Torvalds struct sx_period { 2071da177e4SLinus Torvalds unsigned int period_ns; 2081da177e4SLinus Torvalds uchar reg_value; 2091da177e4SLinus Torvalds }; 2101da177e4SLinus Torvalds 2111da177e4SLinus Torvalds /* FEF: defines for hostdata->dma_buffer_pool */ 2121da177e4SLinus Torvalds 2131da177e4SLinus Torvalds #define BUF_CHIP_ALLOCED 0 2141da177e4SLinus Torvalds #define BUF_SCSI_ALLOCED 1 2151da177e4SLinus Torvalds 2161da177e4SLinus Torvalds struct WD33C93_hostdata { 2171da177e4SLinus Torvalds struct Scsi_Host *next; 2181da177e4SLinus Torvalds wd33c93_regs regs; 2191da177e4SLinus Torvalds spinlock_t lock; 2201da177e4SLinus Torvalds uchar clock_freq; 2211da177e4SLinus Torvalds uchar chip; /* what kind of wd33c93? */ 2221da177e4SLinus Torvalds uchar microcode; /* microcode rev */ 2231da177e4SLinus Torvalds uchar dma_buffer_pool; /* FEF: buffer from chip_ram? */ 2241da177e4SLinus Torvalds int dma_dir; /* data transfer dir. */ 2251da177e4SLinus Torvalds dma_setup_t dma_setup; 2261da177e4SLinus Torvalds dma_stop_t dma_stop; 2271da177e4SLinus Torvalds unsigned int dma_xfer_mask; 2281da177e4SLinus Torvalds uchar *dma_bounce_buffer; 2291da177e4SLinus Torvalds unsigned int dma_bounce_len; 2301da177e4SLinus Torvalds volatile uchar busy[8]; /* index = target, bit = lun */ 2311da177e4SLinus Torvalds volatile struct scsi_cmnd *input_Q; /* commands waiting to be started */ 2321da177e4SLinus Torvalds volatile struct scsi_cmnd *selecting; /* trying to select this command */ 2331da177e4SLinus Torvalds volatile struct scsi_cmnd *connected; /* currently connected command */ 2341da177e4SLinus Torvalds volatile struct scsi_cmnd *disconnected_Q;/* commands waiting for reconnect */ 2351da177e4SLinus Torvalds uchar state; /* what we are currently doing */ 2361da177e4SLinus Torvalds uchar dma; /* current state of DMA (on/off) */ 2371da177e4SLinus Torvalds uchar level2; /* extent to which Level-2 commands are used */ 2381da177e4SLinus Torvalds uchar disconnect; /* disconnect/reselect policy */ 2391da177e4SLinus Torvalds unsigned int args; /* set from command-line argument */ 2401da177e4SLinus Torvalds uchar incoming_msg[8]; /* filled during message_in phase */ 2411da177e4SLinus Torvalds int incoming_ptr; /* mainly used with EXTENDED messages */ 2421da177e4SLinus Torvalds uchar outgoing_msg[8]; /* send this during next message_out */ 2431da177e4SLinus Torvalds int outgoing_len; /* length of outgoing message */ 2441da177e4SLinus Torvalds unsigned int default_sx_per; /* default transfer period for SCSI bus */ 2451da177e4SLinus Torvalds uchar sync_xfer[8]; /* sync_xfer reg settings per target */ 2461da177e4SLinus Torvalds uchar sync_stat[8]; /* status of sync negotiation per target */ 2471da177e4SLinus Torvalds uchar no_sync; /* bitmask: don't do sync on these targets */ 2481da177e4SLinus Torvalds uchar no_dma; /* set this flag to disable DMA */ 249a5d8421bSpeter fuerst uchar dma_mode; /* DMA Burst Mode or Single Byte DMA */ 250a5d8421bSpeter fuerst uchar fast; /* set this flag to enable Fast SCSI */ 251a5d8421bSpeter fuerst struct sx_period sx_table[9]; /* transfer periods for actual DTC-setting */ 2521da177e4SLinus Torvalds #ifdef PROC_INTERFACE 2531da177e4SLinus Torvalds uchar proc; /* bitmask: what's in proc output */ 2541da177e4SLinus Torvalds #ifdef PROC_STATISTICS 2551da177e4SLinus Torvalds unsigned long cmd_cnt[8]; /* # of commands issued per target */ 2561da177e4SLinus Torvalds unsigned long int_cnt; /* # of interrupts serviced */ 2571da177e4SLinus Torvalds unsigned long pio_cnt; /* # of pio data transfers */ 2581da177e4SLinus Torvalds unsigned long dma_cnt; /* # of DMA data transfers */ 2591da177e4SLinus Torvalds unsigned long disc_allowed_cnt[8]; /* # of disconnects allowed per target */ 2601da177e4SLinus Torvalds unsigned long disc_done_cnt[8]; /* # of disconnects done per target*/ 2611da177e4SLinus Torvalds #endif 2621da177e4SLinus Torvalds #endif 2631da177e4SLinus Torvalds }; 2641da177e4SLinus Torvalds 265*dbb2da55SBart Van Assche static inline struct scsi_pointer *WD33C93_scsi_pointer(struct scsi_cmnd *cmd) 266*dbb2da55SBart Van Assche { 267*dbb2da55SBart Van Assche return scsi_cmd_priv(cmd); 268*dbb2da55SBart Van Assche } 2691da177e4SLinus Torvalds 2701da177e4SLinus Torvalds /* defines for hostdata->chip */ 2711da177e4SLinus Torvalds 2721da177e4SLinus Torvalds #define C_WD33C93 0 2731da177e4SLinus Torvalds #define C_WD33C93A 1 2741da177e4SLinus Torvalds #define C_WD33C93B 2 2751da177e4SLinus Torvalds #define C_UNKNOWN_CHIP 100 2761da177e4SLinus Torvalds 2771da177e4SLinus Torvalds /* defines for hostdata->state */ 2781da177e4SLinus Torvalds 2791da177e4SLinus Torvalds #define S_UNCONNECTED 0 2801da177e4SLinus Torvalds #define S_SELECTING 1 2811da177e4SLinus Torvalds #define S_RUNNING_LEVEL2 2 2821da177e4SLinus Torvalds #define S_CONNECTED 3 2831da177e4SLinus Torvalds #define S_PRE_TMP_DISC 4 2841da177e4SLinus Torvalds #define S_PRE_CMP_DISC 5 2851da177e4SLinus Torvalds 2861da177e4SLinus Torvalds /* defines for hostdata->dma */ 2871da177e4SLinus Torvalds 2881da177e4SLinus Torvalds #define D_DMA_OFF 0 2891da177e4SLinus Torvalds #define D_DMA_RUNNING 1 2901da177e4SLinus Torvalds 2911da177e4SLinus Torvalds /* defines for hostdata->level2 */ 2921da177e4SLinus Torvalds /* NOTE: only the first 3 are implemented so far */ 2931da177e4SLinus Torvalds 2941da177e4SLinus Torvalds #define L2_NONE 1 /* no combination commands - we get lots of ints */ 2951da177e4SLinus Torvalds #define L2_SELECT 2 /* start with SEL_ATN_XFER, but never resume it */ 2961da177e4SLinus Torvalds #define L2_BASIC 3 /* resume after STATUS ints & RDP messages */ 2971da177e4SLinus Torvalds #define L2_DATA 4 /* resume after DATA_IN/OUT ints */ 2981da177e4SLinus Torvalds #define L2_MOST 5 /* resume after anything except a RESELECT int */ 2991da177e4SLinus Torvalds #define L2_RESELECT 6 /* resume after everything, including RESELECT ints */ 3001da177e4SLinus Torvalds #define L2_ALL 7 /* always resume */ 3011da177e4SLinus Torvalds 3021da177e4SLinus Torvalds /* defines for hostdata->disconnect */ 3031da177e4SLinus Torvalds 3041da177e4SLinus Torvalds #define DIS_NEVER 0 3051da177e4SLinus Torvalds #define DIS_ADAPTIVE 1 3061da177e4SLinus Torvalds #define DIS_ALWAYS 2 3071da177e4SLinus Torvalds 3081da177e4SLinus Torvalds /* defines for hostdata->args */ 3091da177e4SLinus Torvalds 3101da177e4SLinus Torvalds #define DB_TEST1 1<<0 3111da177e4SLinus Torvalds #define DB_TEST2 1<<1 3121da177e4SLinus Torvalds #define DB_QUEUE_COMMAND 1<<2 3131da177e4SLinus Torvalds #define DB_EXECUTE 1<<3 3141da177e4SLinus Torvalds #define DB_INTR 1<<4 3151da177e4SLinus Torvalds #define DB_TRANSFER 1<<5 3161da177e4SLinus Torvalds #define DB_MASK 0x3f 3171da177e4SLinus Torvalds 3181da177e4SLinus Torvalds /* defines for hostdata->sync_stat[] */ 3191da177e4SLinus Torvalds 3201da177e4SLinus Torvalds #define SS_UNSET 0 3211da177e4SLinus Torvalds #define SS_FIRST 1 3221da177e4SLinus Torvalds #define SS_WAITING 2 3231da177e4SLinus Torvalds #define SS_SET 3 3241da177e4SLinus Torvalds 3251da177e4SLinus Torvalds /* defines for hostdata->proc */ 3261da177e4SLinus Torvalds 3271da177e4SLinus Torvalds #define PR_VERSION 1<<0 3281da177e4SLinus Torvalds #define PR_INFO 1<<1 3291da177e4SLinus Torvalds #define PR_STATISTICS 1<<2 3301da177e4SLinus Torvalds #define PR_CONNECTED 1<<3 3311da177e4SLinus Torvalds #define PR_INPUTQ 1<<4 3321da177e4SLinus Torvalds #define PR_DISCQ 1<<5 3331da177e4SLinus Torvalds #define PR_TEST 1<<6 3341da177e4SLinus Torvalds #define PR_STOP 1<<7 3351da177e4SLinus Torvalds 3361da177e4SLinus Torvalds 3371da177e4SLinus Torvalds void wd33c93_init (struct Scsi_Host *instance, const wd33c93_regs regs, 3381da177e4SLinus Torvalds dma_setup_t setup, dma_stop_t stop, int clock_freq); 3391da177e4SLinus Torvalds int wd33c93_abort (struct scsi_cmnd *cmd); 340f281233dSJeff Garzik int wd33c93_queuecommand (struct Scsi_Host *h, struct scsi_cmnd *cmd); 3411da177e4SLinus Torvalds void wd33c93_intr (struct Scsi_Host *instance); 342408bb25bSAl Viro int wd33c93_show_info(struct seq_file *, struct Scsi_Host *); 343408bb25bSAl Viro int wd33c93_write_info(struct Scsi_Host *, char *, int); 3441da177e4SLinus Torvalds int wd33c93_host_reset (struct scsi_cmnd *); 3451da177e4SLinus Torvalds 3461da177e4SLinus Torvalds #endif /* WD33C93_H */ 347