1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * driver for Microchip PQI-based storage controllers 4 * Copyright (c) 2019-2023 Microchip Technology Inc. and its subsidiaries 5 * Copyright (c) 2016-2018 Microsemi Corporation 6 * Copyright (c) 2016 PMC-Sierra, Inc. 7 * 8 * Questions/Comments/Bugfixes to storagedev@microchip.com 9 * 10 */ 11 12 #include <linux/module.h> 13 #include <linux/kernel.h> 14 #include <linux/pci.h> 15 #include <linux/delay.h> 16 #include <linux/interrupt.h> 17 #include <linux/sched.h> 18 #include <linux/rtc.h> 19 #include <linux/bcd.h> 20 #include <linux/reboot.h> 21 #include <linux/cciss_ioctl.h> 22 #include <linux/blk-mq-pci.h> 23 #include <scsi/scsi_host.h> 24 #include <scsi/scsi_cmnd.h> 25 #include <scsi/scsi_device.h> 26 #include <scsi/scsi_eh.h> 27 #include <scsi/scsi_transport_sas.h> 28 #include <asm/unaligned.h> 29 #include "smartpqi.h" 30 #include "smartpqi_sis.h" 31 32 #if !defined(BUILD_TIMESTAMP) 33 #define BUILD_TIMESTAMP 34 #endif 35 36 #define DRIVER_VERSION "2.1.26-030" 37 #define DRIVER_MAJOR 2 38 #define DRIVER_MINOR 1 39 #define DRIVER_RELEASE 26 40 #define DRIVER_REVISION 30 41 42 #define DRIVER_NAME "Microchip SmartPQI Driver (v" \ 43 DRIVER_VERSION BUILD_TIMESTAMP ")" 44 #define DRIVER_NAME_SHORT "smartpqi" 45 46 #define PQI_EXTRA_SGL_MEMORY (12 * sizeof(struct pqi_sg_descriptor)) 47 48 #define PQI_POST_RESET_DELAY_SECS 5 49 #define PQI_POST_OFA_RESET_DELAY_UPON_TIMEOUT_SECS 10 50 51 #define PQI_NO_COMPLETION ((void *)-1) 52 53 MODULE_AUTHOR("Microchip"); 54 MODULE_DESCRIPTION("Driver for Microchip Smart Family Controller version " 55 DRIVER_VERSION); 56 MODULE_VERSION(DRIVER_VERSION); 57 MODULE_LICENSE("GPL"); 58 59 struct pqi_cmd_priv { 60 int this_residual; 61 }; 62 63 static struct pqi_cmd_priv *pqi_cmd_priv(struct scsi_cmnd *cmd) 64 { 65 return scsi_cmd_priv(cmd); 66 } 67 68 static void pqi_verify_structures(void); 69 static void pqi_take_ctrl_offline(struct pqi_ctrl_info *ctrl_info, 70 enum pqi_ctrl_shutdown_reason ctrl_shutdown_reason); 71 static void pqi_ctrl_offline_worker(struct work_struct *work); 72 static int pqi_scan_scsi_devices(struct pqi_ctrl_info *ctrl_info); 73 static void pqi_scan_start(struct Scsi_Host *shost); 74 static void pqi_start_io(struct pqi_ctrl_info *ctrl_info, 75 struct pqi_queue_group *queue_group, enum pqi_io_path path, 76 struct pqi_io_request *io_request); 77 static int pqi_submit_raid_request_synchronous(struct pqi_ctrl_info *ctrl_info, 78 struct pqi_iu_header *request, unsigned int flags, 79 struct pqi_raid_error_info *error_info); 80 static int pqi_aio_submit_io(struct pqi_ctrl_info *ctrl_info, 81 struct scsi_cmnd *scmd, u32 aio_handle, u8 *cdb, 82 unsigned int cdb_length, struct pqi_queue_group *queue_group, 83 struct pqi_encryption_info *encryption_info, bool raid_bypass, bool io_high_prio); 84 static int pqi_aio_submit_r1_write_io(struct pqi_ctrl_info *ctrl_info, 85 struct scsi_cmnd *scmd, struct pqi_queue_group *queue_group, 86 struct pqi_encryption_info *encryption_info, struct pqi_scsi_dev *device, 87 struct pqi_scsi_dev_raid_map_data *rmd); 88 static int pqi_aio_submit_r56_write_io(struct pqi_ctrl_info *ctrl_info, 89 struct scsi_cmnd *scmd, struct pqi_queue_group *queue_group, 90 struct pqi_encryption_info *encryption_info, struct pqi_scsi_dev *device, 91 struct pqi_scsi_dev_raid_map_data *rmd); 92 static void pqi_ofa_ctrl_quiesce(struct pqi_ctrl_info *ctrl_info); 93 static void pqi_ofa_ctrl_unquiesce(struct pqi_ctrl_info *ctrl_info); 94 static int pqi_ofa_ctrl_restart(struct pqi_ctrl_info *ctrl_info, unsigned int delay_secs); 95 static void pqi_ofa_setup_host_buffer(struct pqi_ctrl_info *ctrl_info); 96 static void pqi_ofa_free_host_buffer(struct pqi_ctrl_info *ctrl_info); 97 static int pqi_ofa_host_memory_update(struct pqi_ctrl_info *ctrl_info); 98 static int pqi_device_wait_for_pending_io(struct pqi_ctrl_info *ctrl_info, 99 struct pqi_scsi_dev *device, u8 lun, unsigned long timeout_msecs); 100 static void pqi_fail_all_outstanding_requests(struct pqi_ctrl_info *ctrl_info); 101 static void pqi_tmf_worker(struct work_struct *work); 102 103 /* for flags argument to pqi_submit_raid_request_synchronous() */ 104 #define PQI_SYNC_FLAGS_INTERRUPTABLE 0x1 105 106 static struct scsi_transport_template *pqi_sas_transport_template; 107 108 static atomic_t pqi_controller_count = ATOMIC_INIT(0); 109 110 enum pqi_lockup_action { 111 NONE, 112 REBOOT, 113 PANIC 114 }; 115 116 static enum pqi_lockup_action pqi_lockup_action = NONE; 117 118 static struct { 119 enum pqi_lockup_action action; 120 char *name; 121 } pqi_lockup_actions[] = { 122 { 123 .action = NONE, 124 .name = "none", 125 }, 126 { 127 .action = REBOOT, 128 .name = "reboot", 129 }, 130 { 131 .action = PANIC, 132 .name = "panic", 133 }, 134 }; 135 136 static unsigned int pqi_supported_event_types[] = { 137 PQI_EVENT_TYPE_HOTPLUG, 138 PQI_EVENT_TYPE_HARDWARE, 139 PQI_EVENT_TYPE_PHYSICAL_DEVICE, 140 PQI_EVENT_TYPE_LOGICAL_DEVICE, 141 PQI_EVENT_TYPE_OFA, 142 PQI_EVENT_TYPE_AIO_STATE_CHANGE, 143 PQI_EVENT_TYPE_AIO_CONFIG_CHANGE, 144 }; 145 146 static int pqi_disable_device_id_wildcards; 147 module_param_named(disable_device_id_wildcards, 148 pqi_disable_device_id_wildcards, int, 0644); 149 MODULE_PARM_DESC(disable_device_id_wildcards, 150 "Disable device ID wildcards."); 151 152 static int pqi_disable_heartbeat; 153 module_param_named(disable_heartbeat, 154 pqi_disable_heartbeat, int, 0644); 155 MODULE_PARM_DESC(disable_heartbeat, 156 "Disable heartbeat."); 157 158 static int pqi_disable_ctrl_shutdown; 159 module_param_named(disable_ctrl_shutdown, 160 pqi_disable_ctrl_shutdown, int, 0644); 161 MODULE_PARM_DESC(disable_ctrl_shutdown, 162 "Disable controller shutdown when controller locked up."); 163 164 static char *pqi_lockup_action_param; 165 module_param_named(lockup_action, 166 pqi_lockup_action_param, charp, 0644); 167 MODULE_PARM_DESC(lockup_action, "Action to take when controller locked up.\n" 168 "\t\tSupported: none, reboot, panic\n" 169 "\t\tDefault: none"); 170 171 static int pqi_expose_ld_first; 172 module_param_named(expose_ld_first, 173 pqi_expose_ld_first, int, 0644); 174 MODULE_PARM_DESC(expose_ld_first, "Expose logical drives before physical drives."); 175 176 static int pqi_hide_vsep; 177 module_param_named(hide_vsep, 178 pqi_hide_vsep, int, 0644); 179 MODULE_PARM_DESC(hide_vsep, "Hide the virtual SEP for direct attached drives."); 180 181 static int pqi_disable_managed_interrupts; 182 module_param_named(disable_managed_interrupts, 183 pqi_disable_managed_interrupts, int, 0644); 184 MODULE_PARM_DESC(disable_managed_interrupts, 185 "Disable the kernel automatically assigning SMP affinity to IRQs."); 186 187 static unsigned int pqi_ctrl_ready_timeout_secs; 188 module_param_named(ctrl_ready_timeout, 189 pqi_ctrl_ready_timeout_secs, uint, 0644); 190 MODULE_PARM_DESC(ctrl_ready_timeout, 191 "Timeout in seconds for driver to wait for controller ready."); 192 193 static char *raid_levels[] = { 194 "RAID-0", 195 "RAID-4", 196 "RAID-1(1+0)", 197 "RAID-5", 198 "RAID-5+1", 199 "RAID-6", 200 "RAID-1(Triple)", 201 }; 202 203 static char *pqi_raid_level_to_string(u8 raid_level) 204 { 205 if (raid_level < ARRAY_SIZE(raid_levels)) 206 return raid_levels[raid_level]; 207 208 return "RAID UNKNOWN"; 209 } 210 211 #define SA_RAID_0 0 212 #define SA_RAID_4 1 213 #define SA_RAID_1 2 /* also used for RAID 10 */ 214 #define SA_RAID_5 3 /* also used for RAID 50 */ 215 #define SA_RAID_51 4 216 #define SA_RAID_6 5 /* also used for RAID 60 */ 217 #define SA_RAID_TRIPLE 6 /* also used for RAID 1+0 Triple */ 218 #define SA_RAID_MAX SA_RAID_TRIPLE 219 #define SA_RAID_UNKNOWN 0xff 220 221 static inline void pqi_scsi_done(struct scsi_cmnd *scmd) 222 { 223 pqi_prep_for_scsi_done(scmd); 224 scsi_done(scmd); 225 } 226 227 static inline void pqi_disable_write_same(struct scsi_device *sdev) 228 { 229 sdev->no_write_same = 1; 230 } 231 232 static inline bool pqi_scsi3addr_equal(u8 *scsi3addr1, u8 *scsi3addr2) 233 { 234 return memcmp(scsi3addr1, scsi3addr2, 8) == 0; 235 } 236 237 static inline bool pqi_is_logical_device(struct pqi_scsi_dev *device) 238 { 239 return !device->is_physical_device; 240 } 241 242 static inline bool pqi_is_external_raid_addr(u8 *scsi3addr) 243 { 244 return scsi3addr[2] != 0; 245 } 246 247 static inline bool pqi_ctrl_offline(struct pqi_ctrl_info *ctrl_info) 248 { 249 return !ctrl_info->controller_online; 250 } 251 252 static inline void pqi_check_ctrl_health(struct pqi_ctrl_info *ctrl_info) 253 { 254 if (ctrl_info->controller_online) 255 if (!sis_is_firmware_running(ctrl_info)) 256 pqi_take_ctrl_offline(ctrl_info, PQI_FIRMWARE_KERNEL_NOT_UP); 257 } 258 259 static inline bool pqi_is_hba_lunid(u8 *scsi3addr) 260 { 261 return pqi_scsi3addr_equal(scsi3addr, RAID_CTLR_LUNID); 262 } 263 264 #define PQI_DRIVER_SCRATCH_PQI_MODE 0x1 265 #define PQI_DRIVER_SCRATCH_FW_TRIAGE_SUPPORTED 0x2 266 267 static inline enum pqi_ctrl_mode pqi_get_ctrl_mode(struct pqi_ctrl_info *ctrl_info) 268 { 269 return sis_read_driver_scratch(ctrl_info) & PQI_DRIVER_SCRATCH_PQI_MODE ? PQI_MODE : SIS_MODE; 270 } 271 272 static inline void pqi_save_ctrl_mode(struct pqi_ctrl_info *ctrl_info, 273 enum pqi_ctrl_mode mode) 274 { 275 u32 driver_scratch; 276 277 driver_scratch = sis_read_driver_scratch(ctrl_info); 278 279 if (mode == PQI_MODE) 280 driver_scratch |= PQI_DRIVER_SCRATCH_PQI_MODE; 281 else 282 driver_scratch &= ~PQI_DRIVER_SCRATCH_PQI_MODE; 283 284 sis_write_driver_scratch(ctrl_info, driver_scratch); 285 } 286 287 static inline bool pqi_is_fw_triage_supported(struct pqi_ctrl_info *ctrl_info) 288 { 289 return (sis_read_driver_scratch(ctrl_info) & PQI_DRIVER_SCRATCH_FW_TRIAGE_SUPPORTED) != 0; 290 } 291 292 static inline void pqi_save_fw_triage_setting(struct pqi_ctrl_info *ctrl_info, bool is_supported) 293 { 294 u32 driver_scratch; 295 296 driver_scratch = sis_read_driver_scratch(ctrl_info); 297 298 if (is_supported) 299 driver_scratch |= PQI_DRIVER_SCRATCH_FW_TRIAGE_SUPPORTED; 300 else 301 driver_scratch &= ~PQI_DRIVER_SCRATCH_FW_TRIAGE_SUPPORTED; 302 303 sis_write_driver_scratch(ctrl_info, driver_scratch); 304 } 305 306 static inline void pqi_ctrl_block_scan(struct pqi_ctrl_info *ctrl_info) 307 { 308 ctrl_info->scan_blocked = true; 309 mutex_lock(&ctrl_info->scan_mutex); 310 } 311 312 static inline void pqi_ctrl_unblock_scan(struct pqi_ctrl_info *ctrl_info) 313 { 314 ctrl_info->scan_blocked = false; 315 mutex_unlock(&ctrl_info->scan_mutex); 316 } 317 318 static inline bool pqi_ctrl_scan_blocked(struct pqi_ctrl_info *ctrl_info) 319 { 320 return ctrl_info->scan_blocked; 321 } 322 323 static inline void pqi_ctrl_block_device_reset(struct pqi_ctrl_info *ctrl_info) 324 { 325 mutex_lock(&ctrl_info->lun_reset_mutex); 326 } 327 328 static inline void pqi_ctrl_unblock_device_reset(struct pqi_ctrl_info *ctrl_info) 329 { 330 mutex_unlock(&ctrl_info->lun_reset_mutex); 331 } 332 333 static inline void pqi_scsi_block_requests(struct pqi_ctrl_info *ctrl_info) 334 { 335 struct Scsi_Host *shost; 336 unsigned int num_loops; 337 int msecs_sleep; 338 339 shost = ctrl_info->scsi_host; 340 341 scsi_block_requests(shost); 342 343 num_loops = 0; 344 msecs_sleep = 20; 345 while (scsi_host_busy(shost)) { 346 num_loops++; 347 if (num_loops == 10) 348 msecs_sleep = 500; 349 msleep(msecs_sleep); 350 } 351 } 352 353 static inline void pqi_scsi_unblock_requests(struct pqi_ctrl_info *ctrl_info) 354 { 355 scsi_unblock_requests(ctrl_info->scsi_host); 356 } 357 358 static inline void pqi_ctrl_busy(struct pqi_ctrl_info *ctrl_info) 359 { 360 atomic_inc(&ctrl_info->num_busy_threads); 361 } 362 363 static inline void pqi_ctrl_unbusy(struct pqi_ctrl_info *ctrl_info) 364 { 365 atomic_dec(&ctrl_info->num_busy_threads); 366 } 367 368 static inline bool pqi_ctrl_blocked(struct pqi_ctrl_info *ctrl_info) 369 { 370 return ctrl_info->block_requests; 371 } 372 373 static inline void pqi_ctrl_block_requests(struct pqi_ctrl_info *ctrl_info) 374 { 375 ctrl_info->block_requests = true; 376 } 377 378 static inline void pqi_ctrl_unblock_requests(struct pqi_ctrl_info *ctrl_info) 379 { 380 ctrl_info->block_requests = false; 381 wake_up_all(&ctrl_info->block_requests_wait); 382 } 383 384 static void pqi_wait_if_ctrl_blocked(struct pqi_ctrl_info *ctrl_info) 385 { 386 if (!pqi_ctrl_blocked(ctrl_info)) 387 return; 388 389 atomic_inc(&ctrl_info->num_blocked_threads); 390 wait_event(ctrl_info->block_requests_wait, 391 !pqi_ctrl_blocked(ctrl_info)); 392 atomic_dec(&ctrl_info->num_blocked_threads); 393 } 394 395 #define PQI_QUIESCE_WARNING_TIMEOUT_SECS 10 396 397 static inline void pqi_ctrl_wait_until_quiesced(struct pqi_ctrl_info *ctrl_info) 398 { 399 unsigned long start_jiffies; 400 unsigned long warning_timeout; 401 bool displayed_warning; 402 403 displayed_warning = false; 404 start_jiffies = jiffies; 405 warning_timeout = (PQI_QUIESCE_WARNING_TIMEOUT_SECS * HZ) + start_jiffies; 406 407 while (atomic_read(&ctrl_info->num_busy_threads) > 408 atomic_read(&ctrl_info->num_blocked_threads)) { 409 if (time_after(jiffies, warning_timeout)) { 410 dev_warn(&ctrl_info->pci_dev->dev, 411 "waiting %u seconds for driver activity to quiesce\n", 412 jiffies_to_msecs(jiffies - start_jiffies) / 1000); 413 displayed_warning = true; 414 warning_timeout = (PQI_QUIESCE_WARNING_TIMEOUT_SECS * HZ) + jiffies; 415 } 416 usleep_range(1000, 2000); 417 } 418 419 if (displayed_warning) 420 dev_warn(&ctrl_info->pci_dev->dev, 421 "driver activity quiesced after waiting for %u seconds\n", 422 jiffies_to_msecs(jiffies - start_jiffies) / 1000); 423 } 424 425 static inline bool pqi_device_offline(struct pqi_scsi_dev *device) 426 { 427 return device->device_offline; 428 } 429 430 static inline void pqi_ctrl_ofa_start(struct pqi_ctrl_info *ctrl_info) 431 { 432 mutex_lock(&ctrl_info->ofa_mutex); 433 } 434 435 static inline void pqi_ctrl_ofa_done(struct pqi_ctrl_info *ctrl_info) 436 { 437 mutex_unlock(&ctrl_info->ofa_mutex); 438 } 439 440 static inline void pqi_wait_until_ofa_finished(struct pqi_ctrl_info *ctrl_info) 441 { 442 mutex_lock(&ctrl_info->ofa_mutex); 443 mutex_unlock(&ctrl_info->ofa_mutex); 444 } 445 446 static inline bool pqi_ofa_in_progress(struct pqi_ctrl_info *ctrl_info) 447 { 448 return mutex_is_locked(&ctrl_info->ofa_mutex); 449 } 450 451 static inline void pqi_device_remove_start(struct pqi_scsi_dev *device) 452 { 453 device->in_remove = true; 454 } 455 456 static inline bool pqi_device_in_remove(struct pqi_scsi_dev *device) 457 { 458 return device->in_remove; 459 } 460 461 static inline void pqi_device_reset_start(struct pqi_scsi_dev *device, u8 lun) 462 { 463 device->in_reset[lun] = true; 464 } 465 466 static inline void pqi_device_reset_done(struct pqi_scsi_dev *device, u8 lun) 467 { 468 device->in_reset[lun] = false; 469 } 470 471 static inline bool pqi_device_in_reset(struct pqi_scsi_dev *device, u8 lun) 472 { 473 return device->in_reset[lun]; 474 } 475 476 static inline int pqi_event_type_to_event_index(unsigned int event_type) 477 { 478 int index; 479 480 for (index = 0; index < ARRAY_SIZE(pqi_supported_event_types); index++) 481 if (event_type == pqi_supported_event_types[index]) 482 return index; 483 484 return -1; 485 } 486 487 static inline bool pqi_is_supported_event(unsigned int event_type) 488 { 489 return pqi_event_type_to_event_index(event_type) != -1; 490 } 491 492 static inline void pqi_schedule_rescan_worker_with_delay(struct pqi_ctrl_info *ctrl_info, 493 unsigned long delay) 494 { 495 if (pqi_ctrl_offline(ctrl_info)) 496 return; 497 498 schedule_delayed_work(&ctrl_info->rescan_work, delay); 499 } 500 501 static inline void pqi_schedule_rescan_worker(struct pqi_ctrl_info *ctrl_info) 502 { 503 pqi_schedule_rescan_worker_with_delay(ctrl_info, 0); 504 } 505 506 #define PQI_RESCAN_WORK_DELAY (10 * HZ) 507 508 static inline void pqi_schedule_rescan_worker_delayed(struct pqi_ctrl_info *ctrl_info) 509 { 510 pqi_schedule_rescan_worker_with_delay(ctrl_info, PQI_RESCAN_WORK_DELAY); 511 } 512 513 static inline void pqi_cancel_rescan_worker(struct pqi_ctrl_info *ctrl_info) 514 { 515 cancel_delayed_work_sync(&ctrl_info->rescan_work); 516 } 517 518 static inline u32 pqi_read_heartbeat_counter(struct pqi_ctrl_info *ctrl_info) 519 { 520 if (!ctrl_info->heartbeat_counter) 521 return 0; 522 523 return readl(ctrl_info->heartbeat_counter); 524 } 525 526 static inline u8 pqi_read_soft_reset_status(struct pqi_ctrl_info *ctrl_info) 527 { 528 return readb(ctrl_info->soft_reset_status); 529 } 530 531 static inline void pqi_clear_soft_reset_status(struct pqi_ctrl_info *ctrl_info) 532 { 533 u8 status; 534 535 status = pqi_read_soft_reset_status(ctrl_info); 536 status &= ~PQI_SOFT_RESET_ABORT; 537 writeb(status, ctrl_info->soft_reset_status); 538 } 539 540 static inline bool pqi_is_io_high_priority(struct pqi_scsi_dev *device, struct scsi_cmnd *scmd) 541 { 542 bool io_high_prio; 543 int priority_class; 544 545 io_high_prio = false; 546 547 if (device->ncq_prio_enable) { 548 priority_class = 549 IOPRIO_PRIO_CLASS(req_get_ioprio(scsi_cmd_to_rq(scmd))); 550 if (priority_class == IOPRIO_CLASS_RT) { 551 /* Set NCQ priority for read/write commands. */ 552 switch (scmd->cmnd[0]) { 553 case WRITE_16: 554 case READ_16: 555 case WRITE_12: 556 case READ_12: 557 case WRITE_10: 558 case READ_10: 559 case WRITE_6: 560 case READ_6: 561 io_high_prio = true; 562 break; 563 } 564 } 565 } 566 567 return io_high_prio; 568 } 569 570 static int pqi_map_single(struct pci_dev *pci_dev, 571 struct pqi_sg_descriptor *sg_descriptor, void *buffer, 572 size_t buffer_length, enum dma_data_direction data_direction) 573 { 574 dma_addr_t bus_address; 575 576 if (!buffer || buffer_length == 0 || data_direction == DMA_NONE) 577 return 0; 578 579 bus_address = dma_map_single(&pci_dev->dev, buffer, buffer_length, 580 data_direction); 581 if (dma_mapping_error(&pci_dev->dev, bus_address)) 582 return -ENOMEM; 583 584 put_unaligned_le64((u64)bus_address, &sg_descriptor->address); 585 put_unaligned_le32(buffer_length, &sg_descriptor->length); 586 put_unaligned_le32(CISS_SG_LAST, &sg_descriptor->flags); 587 588 return 0; 589 } 590 591 static void pqi_pci_unmap(struct pci_dev *pci_dev, 592 struct pqi_sg_descriptor *descriptors, int num_descriptors, 593 enum dma_data_direction data_direction) 594 { 595 int i; 596 597 if (data_direction == DMA_NONE) 598 return; 599 600 for (i = 0; i < num_descriptors; i++) 601 dma_unmap_single(&pci_dev->dev, 602 (dma_addr_t)get_unaligned_le64(&descriptors[i].address), 603 get_unaligned_le32(&descriptors[i].length), 604 data_direction); 605 } 606 607 static int pqi_build_raid_path_request(struct pqi_ctrl_info *ctrl_info, 608 struct pqi_raid_path_request *request, u8 cmd, 609 u8 *scsi3addr, void *buffer, size_t buffer_length, 610 u16 vpd_page, enum dma_data_direction *dir) 611 { 612 u8 *cdb; 613 size_t cdb_length = buffer_length; 614 615 memset(request, 0, sizeof(*request)); 616 617 request->header.iu_type = PQI_REQUEST_IU_RAID_PATH_IO; 618 put_unaligned_le16(offsetof(struct pqi_raid_path_request, 619 sg_descriptors[1]) - PQI_REQUEST_HEADER_LENGTH, 620 &request->header.iu_length); 621 put_unaligned_le32(buffer_length, &request->buffer_length); 622 memcpy(request->lun_number, scsi3addr, sizeof(request->lun_number)); 623 request->task_attribute = SOP_TASK_ATTRIBUTE_SIMPLE; 624 request->additional_cdb_bytes_usage = SOP_ADDITIONAL_CDB_BYTES_0; 625 626 cdb = request->cdb; 627 628 switch (cmd) { 629 case INQUIRY: 630 request->data_direction = SOP_READ_FLAG; 631 cdb[0] = INQUIRY; 632 if (vpd_page & VPD_PAGE) { 633 cdb[1] = 0x1; 634 cdb[2] = (u8)vpd_page; 635 } 636 cdb[4] = (u8)cdb_length; 637 break; 638 case CISS_REPORT_LOG: 639 case CISS_REPORT_PHYS: 640 request->data_direction = SOP_READ_FLAG; 641 cdb[0] = cmd; 642 if (cmd == CISS_REPORT_PHYS) { 643 if (ctrl_info->rpl_extended_format_4_5_supported) 644 cdb[1] = CISS_REPORT_PHYS_FLAG_EXTENDED_FORMAT_4; 645 else 646 cdb[1] = CISS_REPORT_PHYS_FLAG_EXTENDED_FORMAT_2; 647 } else { 648 cdb[1] = ctrl_info->ciss_report_log_flags; 649 } 650 put_unaligned_be32(cdb_length, &cdb[6]); 651 break; 652 case CISS_GET_RAID_MAP: 653 request->data_direction = SOP_READ_FLAG; 654 cdb[0] = CISS_READ; 655 cdb[1] = CISS_GET_RAID_MAP; 656 put_unaligned_be32(cdb_length, &cdb[6]); 657 break; 658 case SA_FLUSH_CACHE: 659 request->header.driver_flags = PQI_DRIVER_NONBLOCKABLE_REQUEST; 660 request->data_direction = SOP_WRITE_FLAG; 661 cdb[0] = BMIC_WRITE; 662 cdb[6] = BMIC_FLUSH_CACHE; 663 put_unaligned_be16(cdb_length, &cdb[7]); 664 break; 665 case BMIC_SENSE_DIAG_OPTIONS: 666 cdb_length = 0; 667 fallthrough; 668 case BMIC_IDENTIFY_CONTROLLER: 669 case BMIC_IDENTIFY_PHYSICAL_DEVICE: 670 case BMIC_SENSE_SUBSYSTEM_INFORMATION: 671 case BMIC_SENSE_FEATURE: 672 request->data_direction = SOP_READ_FLAG; 673 cdb[0] = BMIC_READ; 674 cdb[6] = cmd; 675 put_unaligned_be16(cdb_length, &cdb[7]); 676 break; 677 case BMIC_SET_DIAG_OPTIONS: 678 cdb_length = 0; 679 fallthrough; 680 case BMIC_WRITE_HOST_WELLNESS: 681 request->data_direction = SOP_WRITE_FLAG; 682 cdb[0] = BMIC_WRITE; 683 cdb[6] = cmd; 684 put_unaligned_be16(cdb_length, &cdb[7]); 685 break; 686 case BMIC_CSMI_PASSTHRU: 687 request->data_direction = SOP_BIDIRECTIONAL; 688 cdb[0] = BMIC_WRITE; 689 cdb[5] = CSMI_CC_SAS_SMP_PASSTHRU; 690 cdb[6] = cmd; 691 put_unaligned_be16(cdb_length, &cdb[7]); 692 break; 693 default: 694 dev_err(&ctrl_info->pci_dev->dev, "unknown command 0x%c\n", cmd); 695 break; 696 } 697 698 switch (request->data_direction) { 699 case SOP_READ_FLAG: 700 *dir = DMA_FROM_DEVICE; 701 break; 702 case SOP_WRITE_FLAG: 703 *dir = DMA_TO_DEVICE; 704 break; 705 case SOP_NO_DIRECTION_FLAG: 706 *dir = DMA_NONE; 707 break; 708 default: 709 *dir = DMA_BIDIRECTIONAL; 710 break; 711 } 712 713 return pqi_map_single(ctrl_info->pci_dev, &request->sg_descriptors[0], 714 buffer, buffer_length, *dir); 715 } 716 717 static inline void pqi_reinit_io_request(struct pqi_io_request *io_request) 718 { 719 io_request->scmd = NULL; 720 io_request->status = 0; 721 io_request->error_info = NULL; 722 io_request->raid_bypass = false; 723 } 724 725 static inline struct pqi_io_request *pqi_alloc_io_request(struct pqi_ctrl_info *ctrl_info, struct scsi_cmnd *scmd) 726 { 727 struct pqi_io_request *io_request; 728 u16 i; 729 730 if (scmd) { /* SML I/O request */ 731 u32 blk_tag = blk_mq_unique_tag(scsi_cmd_to_rq(scmd)); 732 733 i = blk_mq_unique_tag_to_tag(blk_tag); 734 io_request = &ctrl_info->io_request_pool[i]; 735 if (atomic_inc_return(&io_request->refcount) > 1) { 736 atomic_dec(&io_request->refcount); 737 return NULL; 738 } 739 } else { /* IOCTL or driver internal request */ 740 /* 741 * benignly racy - may have to wait for an open slot. 742 * command slot range is scsi_ml_can_queue - 743 * [scsi_ml_can_queue + (PQI_RESERVED_IO_SLOTS - 1)] 744 */ 745 i = 0; 746 while (1) { 747 io_request = &ctrl_info->io_request_pool[ctrl_info->scsi_ml_can_queue + i]; 748 if (atomic_inc_return(&io_request->refcount) == 1) 749 break; 750 atomic_dec(&io_request->refcount); 751 i = (i + 1) % PQI_RESERVED_IO_SLOTS; 752 } 753 } 754 755 if (io_request) 756 pqi_reinit_io_request(io_request); 757 758 return io_request; 759 } 760 761 static void pqi_free_io_request(struct pqi_io_request *io_request) 762 { 763 atomic_dec(&io_request->refcount); 764 } 765 766 static int pqi_send_scsi_raid_request(struct pqi_ctrl_info *ctrl_info, u8 cmd, 767 u8 *scsi3addr, void *buffer, size_t buffer_length, u16 vpd_page, 768 struct pqi_raid_error_info *error_info) 769 { 770 int rc; 771 struct pqi_raid_path_request request; 772 enum dma_data_direction dir; 773 774 rc = pqi_build_raid_path_request(ctrl_info, &request, cmd, scsi3addr, 775 buffer, buffer_length, vpd_page, &dir); 776 if (rc) 777 return rc; 778 779 rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 0, error_info); 780 781 pqi_pci_unmap(ctrl_info->pci_dev, request.sg_descriptors, 1, dir); 782 783 return rc; 784 } 785 786 /* helper functions for pqi_send_scsi_raid_request */ 787 788 static inline int pqi_send_ctrl_raid_request(struct pqi_ctrl_info *ctrl_info, 789 u8 cmd, void *buffer, size_t buffer_length) 790 { 791 return pqi_send_scsi_raid_request(ctrl_info, cmd, RAID_CTLR_LUNID, 792 buffer, buffer_length, 0, NULL); 793 } 794 795 static inline int pqi_send_ctrl_raid_with_error(struct pqi_ctrl_info *ctrl_info, 796 u8 cmd, void *buffer, size_t buffer_length, 797 struct pqi_raid_error_info *error_info) 798 { 799 return pqi_send_scsi_raid_request(ctrl_info, cmd, RAID_CTLR_LUNID, 800 buffer, buffer_length, 0, error_info); 801 } 802 803 static inline int pqi_identify_controller(struct pqi_ctrl_info *ctrl_info, 804 struct bmic_identify_controller *buffer) 805 { 806 return pqi_send_ctrl_raid_request(ctrl_info, BMIC_IDENTIFY_CONTROLLER, 807 buffer, sizeof(*buffer)); 808 } 809 810 static inline int pqi_sense_subsystem_info(struct pqi_ctrl_info *ctrl_info, 811 struct bmic_sense_subsystem_info *sense_info) 812 { 813 return pqi_send_ctrl_raid_request(ctrl_info, 814 BMIC_SENSE_SUBSYSTEM_INFORMATION, sense_info, 815 sizeof(*sense_info)); 816 } 817 818 static inline int pqi_scsi_inquiry(struct pqi_ctrl_info *ctrl_info, 819 u8 *scsi3addr, u16 vpd_page, void *buffer, size_t buffer_length) 820 { 821 return pqi_send_scsi_raid_request(ctrl_info, INQUIRY, scsi3addr, 822 buffer, buffer_length, vpd_page, NULL); 823 } 824 825 static int pqi_identify_physical_device(struct pqi_ctrl_info *ctrl_info, 826 struct pqi_scsi_dev *device, 827 struct bmic_identify_physical_device *buffer, size_t buffer_length) 828 { 829 int rc; 830 enum dma_data_direction dir; 831 u16 bmic_device_index; 832 struct pqi_raid_path_request request; 833 834 rc = pqi_build_raid_path_request(ctrl_info, &request, 835 BMIC_IDENTIFY_PHYSICAL_DEVICE, RAID_CTLR_LUNID, buffer, 836 buffer_length, 0, &dir); 837 if (rc) 838 return rc; 839 840 bmic_device_index = CISS_GET_DRIVE_NUMBER(device->scsi3addr); 841 request.cdb[2] = (u8)bmic_device_index; 842 request.cdb[9] = (u8)(bmic_device_index >> 8); 843 844 rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 0, NULL); 845 846 pqi_pci_unmap(ctrl_info->pci_dev, request.sg_descriptors, 1, dir); 847 848 return rc; 849 } 850 851 static inline u32 pqi_aio_limit_to_bytes(__le16 *limit) 852 { 853 u32 bytes; 854 855 bytes = get_unaligned_le16(limit); 856 if (bytes == 0) 857 bytes = ~0; 858 else 859 bytes *= 1024; 860 861 return bytes; 862 } 863 864 #pragma pack(1) 865 866 struct bmic_sense_feature_buffer { 867 struct bmic_sense_feature_buffer_header header; 868 struct bmic_sense_feature_io_page_aio_subpage aio_subpage; 869 }; 870 871 #pragma pack() 872 873 #define MINIMUM_AIO_SUBPAGE_BUFFER_LENGTH \ 874 offsetofend(struct bmic_sense_feature_buffer, \ 875 aio_subpage.max_write_raid_1_10_3drive) 876 877 #define MINIMUM_AIO_SUBPAGE_LENGTH \ 878 (offsetofend(struct bmic_sense_feature_io_page_aio_subpage, \ 879 max_write_raid_1_10_3drive) - \ 880 sizeof_field(struct bmic_sense_feature_io_page_aio_subpage, header)) 881 882 static int pqi_get_advanced_raid_bypass_config(struct pqi_ctrl_info *ctrl_info) 883 { 884 int rc; 885 enum dma_data_direction dir; 886 struct pqi_raid_path_request request; 887 struct bmic_sense_feature_buffer *buffer; 888 889 buffer = kmalloc(sizeof(*buffer), GFP_KERNEL); 890 if (!buffer) 891 return -ENOMEM; 892 893 rc = pqi_build_raid_path_request(ctrl_info, &request, BMIC_SENSE_FEATURE, RAID_CTLR_LUNID, 894 buffer, sizeof(*buffer), 0, &dir); 895 if (rc) 896 goto error; 897 898 request.cdb[2] = BMIC_SENSE_FEATURE_IO_PAGE; 899 request.cdb[3] = BMIC_SENSE_FEATURE_IO_PAGE_AIO_SUBPAGE; 900 901 rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 0, NULL); 902 903 pqi_pci_unmap(ctrl_info->pci_dev, request.sg_descriptors, 1, dir); 904 905 if (rc) 906 goto error; 907 908 if (buffer->header.page_code != BMIC_SENSE_FEATURE_IO_PAGE || 909 buffer->header.subpage_code != 910 BMIC_SENSE_FEATURE_IO_PAGE_AIO_SUBPAGE || 911 get_unaligned_le16(&buffer->header.buffer_length) < 912 MINIMUM_AIO_SUBPAGE_BUFFER_LENGTH || 913 buffer->aio_subpage.header.page_code != 914 BMIC_SENSE_FEATURE_IO_PAGE || 915 buffer->aio_subpage.header.subpage_code != 916 BMIC_SENSE_FEATURE_IO_PAGE_AIO_SUBPAGE || 917 get_unaligned_le16(&buffer->aio_subpage.header.page_length) < 918 MINIMUM_AIO_SUBPAGE_LENGTH) { 919 goto error; 920 } 921 922 ctrl_info->max_transfer_encrypted_sas_sata = 923 pqi_aio_limit_to_bytes( 924 &buffer->aio_subpage.max_transfer_encrypted_sas_sata); 925 926 ctrl_info->max_transfer_encrypted_nvme = 927 pqi_aio_limit_to_bytes( 928 &buffer->aio_subpage.max_transfer_encrypted_nvme); 929 930 ctrl_info->max_write_raid_5_6 = 931 pqi_aio_limit_to_bytes( 932 &buffer->aio_subpage.max_write_raid_5_6); 933 934 ctrl_info->max_write_raid_1_10_2drive = 935 pqi_aio_limit_to_bytes( 936 &buffer->aio_subpage.max_write_raid_1_10_2drive); 937 938 ctrl_info->max_write_raid_1_10_3drive = 939 pqi_aio_limit_to_bytes( 940 &buffer->aio_subpage.max_write_raid_1_10_3drive); 941 942 error: 943 kfree(buffer); 944 945 return rc; 946 } 947 948 static int pqi_flush_cache(struct pqi_ctrl_info *ctrl_info, 949 enum bmic_flush_cache_shutdown_event shutdown_event) 950 { 951 int rc; 952 struct bmic_flush_cache *flush_cache; 953 954 flush_cache = kzalloc(sizeof(*flush_cache), GFP_KERNEL); 955 if (!flush_cache) 956 return -ENOMEM; 957 958 flush_cache->shutdown_event = shutdown_event; 959 960 rc = pqi_send_ctrl_raid_request(ctrl_info, SA_FLUSH_CACHE, flush_cache, 961 sizeof(*flush_cache)); 962 963 kfree(flush_cache); 964 965 return rc; 966 } 967 968 int pqi_csmi_smp_passthru(struct pqi_ctrl_info *ctrl_info, 969 struct bmic_csmi_smp_passthru_buffer *buffer, size_t buffer_length, 970 struct pqi_raid_error_info *error_info) 971 { 972 return pqi_send_ctrl_raid_with_error(ctrl_info, BMIC_CSMI_PASSTHRU, 973 buffer, buffer_length, error_info); 974 } 975 976 #define PQI_FETCH_PTRAID_DATA (1 << 31) 977 978 static int pqi_set_diag_rescan(struct pqi_ctrl_info *ctrl_info) 979 { 980 int rc; 981 struct bmic_diag_options *diag; 982 983 diag = kzalloc(sizeof(*diag), GFP_KERNEL); 984 if (!diag) 985 return -ENOMEM; 986 987 rc = pqi_send_ctrl_raid_request(ctrl_info, BMIC_SENSE_DIAG_OPTIONS, 988 diag, sizeof(*diag)); 989 if (rc) 990 goto out; 991 992 diag->options |= cpu_to_le32(PQI_FETCH_PTRAID_DATA); 993 994 rc = pqi_send_ctrl_raid_request(ctrl_info, BMIC_SET_DIAG_OPTIONS, diag, 995 sizeof(*diag)); 996 997 out: 998 kfree(diag); 999 1000 return rc; 1001 } 1002 1003 static inline int pqi_write_host_wellness(struct pqi_ctrl_info *ctrl_info, 1004 void *buffer, size_t buffer_length) 1005 { 1006 return pqi_send_ctrl_raid_request(ctrl_info, BMIC_WRITE_HOST_WELLNESS, 1007 buffer, buffer_length); 1008 } 1009 1010 #pragma pack(1) 1011 1012 struct bmic_host_wellness_driver_version { 1013 u8 start_tag[4]; 1014 u8 driver_version_tag[2]; 1015 __le16 driver_version_length; 1016 char driver_version[32]; 1017 u8 dont_write_tag[2]; 1018 u8 end_tag[2]; 1019 }; 1020 1021 #pragma pack() 1022 1023 static int pqi_write_driver_version_to_host_wellness( 1024 struct pqi_ctrl_info *ctrl_info) 1025 { 1026 int rc; 1027 struct bmic_host_wellness_driver_version *buffer; 1028 size_t buffer_length; 1029 1030 buffer_length = sizeof(*buffer); 1031 1032 buffer = kmalloc(buffer_length, GFP_KERNEL); 1033 if (!buffer) 1034 return -ENOMEM; 1035 1036 buffer->start_tag[0] = '<'; 1037 buffer->start_tag[1] = 'H'; 1038 buffer->start_tag[2] = 'W'; 1039 buffer->start_tag[3] = '>'; 1040 buffer->driver_version_tag[0] = 'D'; 1041 buffer->driver_version_tag[1] = 'V'; 1042 put_unaligned_le16(sizeof(buffer->driver_version), 1043 &buffer->driver_version_length); 1044 strscpy(buffer->driver_version, "Linux " DRIVER_VERSION, 1045 sizeof(buffer->driver_version)); 1046 buffer->dont_write_tag[0] = 'D'; 1047 buffer->dont_write_tag[1] = 'W'; 1048 buffer->end_tag[0] = 'Z'; 1049 buffer->end_tag[1] = 'Z'; 1050 1051 rc = pqi_write_host_wellness(ctrl_info, buffer, buffer_length); 1052 1053 kfree(buffer); 1054 1055 return rc; 1056 } 1057 1058 #pragma pack(1) 1059 1060 struct bmic_host_wellness_time { 1061 u8 start_tag[4]; 1062 u8 time_tag[2]; 1063 __le16 time_length; 1064 u8 time[8]; 1065 u8 dont_write_tag[2]; 1066 u8 end_tag[2]; 1067 }; 1068 1069 #pragma pack() 1070 1071 static int pqi_write_current_time_to_host_wellness( 1072 struct pqi_ctrl_info *ctrl_info) 1073 { 1074 int rc; 1075 struct bmic_host_wellness_time *buffer; 1076 size_t buffer_length; 1077 time64_t local_time; 1078 unsigned int year; 1079 struct tm tm; 1080 1081 buffer_length = sizeof(*buffer); 1082 1083 buffer = kmalloc(buffer_length, GFP_KERNEL); 1084 if (!buffer) 1085 return -ENOMEM; 1086 1087 buffer->start_tag[0] = '<'; 1088 buffer->start_tag[1] = 'H'; 1089 buffer->start_tag[2] = 'W'; 1090 buffer->start_tag[3] = '>'; 1091 buffer->time_tag[0] = 'T'; 1092 buffer->time_tag[1] = 'D'; 1093 put_unaligned_le16(sizeof(buffer->time), 1094 &buffer->time_length); 1095 1096 local_time = ktime_get_real_seconds(); 1097 time64_to_tm(local_time, -sys_tz.tz_minuteswest * 60, &tm); 1098 year = tm.tm_year + 1900; 1099 1100 buffer->time[0] = bin2bcd(tm.tm_hour); 1101 buffer->time[1] = bin2bcd(tm.tm_min); 1102 buffer->time[2] = bin2bcd(tm.tm_sec); 1103 buffer->time[3] = 0; 1104 buffer->time[4] = bin2bcd(tm.tm_mon + 1); 1105 buffer->time[5] = bin2bcd(tm.tm_mday); 1106 buffer->time[6] = bin2bcd(year / 100); 1107 buffer->time[7] = bin2bcd(year % 100); 1108 1109 buffer->dont_write_tag[0] = 'D'; 1110 buffer->dont_write_tag[1] = 'W'; 1111 buffer->end_tag[0] = 'Z'; 1112 buffer->end_tag[1] = 'Z'; 1113 1114 rc = pqi_write_host_wellness(ctrl_info, buffer, buffer_length); 1115 1116 kfree(buffer); 1117 1118 return rc; 1119 } 1120 1121 #define PQI_UPDATE_TIME_WORK_INTERVAL (24UL * 60 * 60 * HZ) 1122 1123 static void pqi_update_time_worker(struct work_struct *work) 1124 { 1125 int rc; 1126 struct pqi_ctrl_info *ctrl_info; 1127 1128 ctrl_info = container_of(to_delayed_work(work), struct pqi_ctrl_info, 1129 update_time_work); 1130 1131 rc = pqi_write_current_time_to_host_wellness(ctrl_info); 1132 if (rc) 1133 dev_warn(&ctrl_info->pci_dev->dev, 1134 "error updating time on controller\n"); 1135 1136 schedule_delayed_work(&ctrl_info->update_time_work, 1137 PQI_UPDATE_TIME_WORK_INTERVAL); 1138 } 1139 1140 static inline void pqi_schedule_update_time_worker(struct pqi_ctrl_info *ctrl_info) 1141 { 1142 schedule_delayed_work(&ctrl_info->update_time_work, 0); 1143 } 1144 1145 static inline void pqi_cancel_update_time_worker(struct pqi_ctrl_info *ctrl_info) 1146 { 1147 cancel_delayed_work_sync(&ctrl_info->update_time_work); 1148 } 1149 1150 static inline int pqi_report_luns(struct pqi_ctrl_info *ctrl_info, u8 cmd, void *buffer, 1151 size_t buffer_length) 1152 { 1153 return pqi_send_ctrl_raid_request(ctrl_info, cmd, buffer, buffer_length); 1154 } 1155 1156 static int pqi_report_phys_logical_luns(struct pqi_ctrl_info *ctrl_info, u8 cmd, void **buffer) 1157 { 1158 int rc; 1159 size_t lun_list_length; 1160 size_t lun_data_length; 1161 size_t new_lun_list_length; 1162 void *lun_data = NULL; 1163 struct report_lun_header *report_lun_header; 1164 1165 report_lun_header = kmalloc(sizeof(*report_lun_header), GFP_KERNEL); 1166 if (!report_lun_header) { 1167 rc = -ENOMEM; 1168 goto out; 1169 } 1170 1171 rc = pqi_report_luns(ctrl_info, cmd, report_lun_header, sizeof(*report_lun_header)); 1172 if (rc) 1173 goto out; 1174 1175 lun_list_length = get_unaligned_be32(&report_lun_header->list_length); 1176 1177 again: 1178 lun_data_length = sizeof(struct report_lun_header) + lun_list_length; 1179 1180 lun_data = kmalloc(lun_data_length, GFP_KERNEL); 1181 if (!lun_data) { 1182 rc = -ENOMEM; 1183 goto out; 1184 } 1185 1186 if (lun_list_length == 0) { 1187 memcpy(lun_data, report_lun_header, sizeof(*report_lun_header)); 1188 goto out; 1189 } 1190 1191 rc = pqi_report_luns(ctrl_info, cmd, lun_data, lun_data_length); 1192 if (rc) 1193 goto out; 1194 1195 new_lun_list_length = 1196 get_unaligned_be32(&((struct report_lun_header *)lun_data)->list_length); 1197 1198 if (new_lun_list_length > lun_list_length) { 1199 lun_list_length = new_lun_list_length; 1200 kfree(lun_data); 1201 goto again; 1202 } 1203 1204 out: 1205 kfree(report_lun_header); 1206 1207 if (rc) { 1208 kfree(lun_data); 1209 lun_data = NULL; 1210 } 1211 1212 *buffer = lun_data; 1213 1214 return rc; 1215 } 1216 1217 static inline int pqi_report_phys_luns(struct pqi_ctrl_info *ctrl_info, void **buffer) 1218 { 1219 int rc; 1220 unsigned int i; 1221 u8 rpl_response_format; 1222 u32 num_physicals; 1223 void *rpl_list; 1224 struct report_lun_header *rpl_header; 1225 struct report_phys_lun_8byte_wwid_list *rpl_8byte_wwid_list; 1226 struct report_phys_lun_16byte_wwid_list *rpl_16byte_wwid_list; 1227 1228 rc = pqi_report_phys_logical_luns(ctrl_info, CISS_REPORT_PHYS, &rpl_list); 1229 if (rc) 1230 return rc; 1231 1232 if (ctrl_info->rpl_extended_format_4_5_supported) { 1233 rpl_header = rpl_list; 1234 rpl_response_format = rpl_header->flags & CISS_REPORT_PHYS_FLAG_EXTENDED_FORMAT_MASK; 1235 if (rpl_response_format == CISS_REPORT_PHYS_FLAG_EXTENDED_FORMAT_4) { 1236 *buffer = rpl_list; 1237 return 0; 1238 } else if (rpl_response_format != CISS_REPORT_PHYS_FLAG_EXTENDED_FORMAT_2) { 1239 dev_err(&ctrl_info->pci_dev->dev, 1240 "RPL returned unsupported data format %u\n", 1241 rpl_response_format); 1242 return -EINVAL; 1243 } else { 1244 dev_warn(&ctrl_info->pci_dev->dev, 1245 "RPL returned extended format 2 instead of 4\n"); 1246 } 1247 } 1248 1249 rpl_8byte_wwid_list = rpl_list; 1250 num_physicals = get_unaligned_be32(&rpl_8byte_wwid_list->header.list_length) / sizeof(rpl_8byte_wwid_list->lun_entries[0]); 1251 1252 rpl_16byte_wwid_list = kmalloc(struct_size(rpl_16byte_wwid_list, lun_entries, 1253 num_physicals), GFP_KERNEL); 1254 if (!rpl_16byte_wwid_list) 1255 return -ENOMEM; 1256 1257 put_unaligned_be32(num_physicals * sizeof(struct report_phys_lun_16byte_wwid), 1258 &rpl_16byte_wwid_list->header.list_length); 1259 rpl_16byte_wwid_list->header.flags = rpl_8byte_wwid_list->header.flags; 1260 1261 for (i = 0; i < num_physicals; i++) { 1262 memcpy(&rpl_16byte_wwid_list->lun_entries[i].lunid, &rpl_8byte_wwid_list->lun_entries[i].lunid, sizeof(rpl_8byte_wwid_list->lun_entries[i].lunid)); 1263 memcpy(&rpl_16byte_wwid_list->lun_entries[i].wwid[0], &rpl_8byte_wwid_list->lun_entries[i].wwid, sizeof(rpl_8byte_wwid_list->lun_entries[i].wwid)); 1264 memset(&rpl_16byte_wwid_list->lun_entries[i].wwid[8], 0, 8); 1265 rpl_16byte_wwid_list->lun_entries[i].device_type = rpl_8byte_wwid_list->lun_entries[i].device_type; 1266 rpl_16byte_wwid_list->lun_entries[i].device_flags = rpl_8byte_wwid_list->lun_entries[i].device_flags; 1267 rpl_16byte_wwid_list->lun_entries[i].lun_count = rpl_8byte_wwid_list->lun_entries[i].lun_count; 1268 rpl_16byte_wwid_list->lun_entries[i].redundant_paths = rpl_8byte_wwid_list->lun_entries[i].redundant_paths; 1269 rpl_16byte_wwid_list->lun_entries[i].aio_handle = rpl_8byte_wwid_list->lun_entries[i].aio_handle; 1270 } 1271 1272 kfree(rpl_8byte_wwid_list); 1273 *buffer = rpl_16byte_wwid_list; 1274 1275 return 0; 1276 } 1277 1278 static inline int pqi_report_logical_luns(struct pqi_ctrl_info *ctrl_info, void **buffer) 1279 { 1280 return pqi_report_phys_logical_luns(ctrl_info, CISS_REPORT_LOG, buffer); 1281 } 1282 1283 static int pqi_get_device_lists(struct pqi_ctrl_info *ctrl_info, 1284 struct report_phys_lun_16byte_wwid_list **physdev_list, 1285 struct report_log_lun_list **logdev_list) 1286 { 1287 int rc; 1288 size_t logdev_list_length; 1289 size_t logdev_data_length; 1290 struct report_log_lun_list *internal_logdev_list; 1291 struct report_log_lun_list *logdev_data; 1292 struct report_lun_header report_lun_header; 1293 1294 rc = pqi_report_phys_luns(ctrl_info, (void **)physdev_list); 1295 if (rc) 1296 dev_err(&ctrl_info->pci_dev->dev, 1297 "report physical LUNs failed\n"); 1298 1299 rc = pqi_report_logical_luns(ctrl_info, (void **)logdev_list); 1300 if (rc) 1301 dev_err(&ctrl_info->pci_dev->dev, 1302 "report logical LUNs failed\n"); 1303 1304 /* 1305 * Tack the controller itself onto the end of the logical device list 1306 * by adding a list entry that is all zeros. 1307 */ 1308 1309 logdev_data = *logdev_list; 1310 1311 if (logdev_data) { 1312 logdev_list_length = 1313 get_unaligned_be32(&logdev_data->header.list_length); 1314 } else { 1315 memset(&report_lun_header, 0, sizeof(report_lun_header)); 1316 logdev_data = 1317 (struct report_log_lun_list *)&report_lun_header; 1318 logdev_list_length = 0; 1319 } 1320 1321 logdev_data_length = sizeof(struct report_lun_header) + 1322 logdev_list_length; 1323 1324 internal_logdev_list = kmalloc(logdev_data_length + 1325 sizeof(struct report_log_lun), GFP_KERNEL); 1326 if (!internal_logdev_list) { 1327 kfree(*logdev_list); 1328 *logdev_list = NULL; 1329 return -ENOMEM; 1330 } 1331 1332 memcpy(internal_logdev_list, logdev_data, logdev_data_length); 1333 memset((u8 *)internal_logdev_list + logdev_data_length, 0, 1334 sizeof(struct report_log_lun)); 1335 put_unaligned_be32(logdev_list_length + 1336 sizeof(struct report_log_lun), 1337 &internal_logdev_list->header.list_length); 1338 1339 kfree(*logdev_list); 1340 *logdev_list = internal_logdev_list; 1341 1342 return 0; 1343 } 1344 1345 static inline void pqi_set_bus_target_lun(struct pqi_scsi_dev *device, 1346 int bus, int target, int lun) 1347 { 1348 device->bus = bus; 1349 device->target = target; 1350 device->lun = lun; 1351 } 1352 1353 static void pqi_assign_bus_target_lun(struct pqi_scsi_dev *device) 1354 { 1355 u8 *scsi3addr; 1356 u32 lunid; 1357 int bus; 1358 int target; 1359 int lun; 1360 1361 scsi3addr = device->scsi3addr; 1362 lunid = get_unaligned_le32(scsi3addr); 1363 1364 if (pqi_is_hba_lunid(scsi3addr)) { 1365 /* The specified device is the controller. */ 1366 pqi_set_bus_target_lun(device, PQI_HBA_BUS, 0, lunid & 0x3fff); 1367 device->target_lun_valid = true; 1368 return; 1369 } 1370 1371 if (pqi_is_logical_device(device)) { 1372 if (device->is_external_raid_device) { 1373 bus = PQI_EXTERNAL_RAID_VOLUME_BUS; 1374 target = (lunid >> 16) & 0x3fff; 1375 lun = lunid & 0xff; 1376 } else { 1377 bus = PQI_RAID_VOLUME_BUS; 1378 target = 0; 1379 lun = lunid & 0x3fff; 1380 } 1381 pqi_set_bus_target_lun(device, bus, target, lun); 1382 device->target_lun_valid = true; 1383 return; 1384 } 1385 1386 /* 1387 * Defer target and LUN assignment for non-controller physical devices 1388 * because the SAS transport layer will make these assignments later. 1389 */ 1390 pqi_set_bus_target_lun(device, PQI_PHYSICAL_DEVICE_BUS, 0, 0); 1391 } 1392 1393 static void pqi_get_raid_level(struct pqi_ctrl_info *ctrl_info, 1394 struct pqi_scsi_dev *device) 1395 { 1396 int rc; 1397 u8 raid_level; 1398 u8 *buffer; 1399 1400 raid_level = SA_RAID_UNKNOWN; 1401 1402 buffer = kmalloc(64, GFP_KERNEL); 1403 if (buffer) { 1404 rc = pqi_scsi_inquiry(ctrl_info, device->scsi3addr, 1405 VPD_PAGE | CISS_VPD_LV_DEVICE_GEOMETRY, buffer, 64); 1406 if (rc == 0) { 1407 raid_level = buffer[8]; 1408 if (raid_level > SA_RAID_MAX) 1409 raid_level = SA_RAID_UNKNOWN; 1410 } 1411 kfree(buffer); 1412 } 1413 1414 device->raid_level = raid_level; 1415 } 1416 1417 static int pqi_validate_raid_map(struct pqi_ctrl_info *ctrl_info, 1418 struct pqi_scsi_dev *device, struct raid_map *raid_map) 1419 { 1420 char *err_msg; 1421 u32 raid_map_size; 1422 u32 r5or6_blocks_per_row; 1423 1424 raid_map_size = get_unaligned_le32(&raid_map->structure_size); 1425 1426 if (raid_map_size < offsetof(struct raid_map, disk_data)) { 1427 err_msg = "RAID map too small"; 1428 goto bad_raid_map; 1429 } 1430 1431 if (device->raid_level == SA_RAID_1) { 1432 if (get_unaligned_le16(&raid_map->layout_map_count) != 2) { 1433 err_msg = "invalid RAID-1 map"; 1434 goto bad_raid_map; 1435 } 1436 } else if (device->raid_level == SA_RAID_TRIPLE) { 1437 if (get_unaligned_le16(&raid_map->layout_map_count) != 3) { 1438 err_msg = "invalid RAID-1(Triple) map"; 1439 goto bad_raid_map; 1440 } 1441 } else if ((device->raid_level == SA_RAID_5 || 1442 device->raid_level == SA_RAID_6) && 1443 get_unaligned_le16(&raid_map->layout_map_count) > 1) { 1444 /* RAID 50/60 */ 1445 r5or6_blocks_per_row = 1446 get_unaligned_le16(&raid_map->strip_size) * 1447 get_unaligned_le16(&raid_map->data_disks_per_row); 1448 if (r5or6_blocks_per_row == 0) { 1449 err_msg = "invalid RAID-5 or RAID-6 map"; 1450 goto bad_raid_map; 1451 } 1452 } 1453 1454 return 0; 1455 1456 bad_raid_map: 1457 dev_warn(&ctrl_info->pci_dev->dev, 1458 "logical device %08x%08x %s\n", 1459 *((u32 *)&device->scsi3addr), 1460 *((u32 *)&device->scsi3addr[4]), err_msg); 1461 1462 return -EINVAL; 1463 } 1464 1465 static int pqi_get_raid_map(struct pqi_ctrl_info *ctrl_info, 1466 struct pqi_scsi_dev *device) 1467 { 1468 int rc; 1469 u32 raid_map_size; 1470 struct raid_map *raid_map; 1471 1472 raid_map = kmalloc(sizeof(*raid_map), GFP_KERNEL); 1473 if (!raid_map) 1474 return -ENOMEM; 1475 1476 rc = pqi_send_scsi_raid_request(ctrl_info, CISS_GET_RAID_MAP, 1477 device->scsi3addr, raid_map, sizeof(*raid_map), 0, NULL); 1478 if (rc) 1479 goto error; 1480 1481 raid_map_size = get_unaligned_le32(&raid_map->structure_size); 1482 1483 if (raid_map_size > sizeof(*raid_map)) { 1484 1485 kfree(raid_map); 1486 1487 raid_map = kmalloc(raid_map_size, GFP_KERNEL); 1488 if (!raid_map) 1489 return -ENOMEM; 1490 1491 rc = pqi_send_scsi_raid_request(ctrl_info, CISS_GET_RAID_MAP, 1492 device->scsi3addr, raid_map, raid_map_size, 0, NULL); 1493 if (rc) 1494 goto error; 1495 1496 if (get_unaligned_le32(&raid_map->structure_size) 1497 != raid_map_size) { 1498 dev_warn(&ctrl_info->pci_dev->dev, 1499 "requested %u bytes, received %u bytes\n", 1500 raid_map_size, 1501 get_unaligned_le32(&raid_map->structure_size)); 1502 rc = -EINVAL; 1503 goto error; 1504 } 1505 } 1506 1507 rc = pqi_validate_raid_map(ctrl_info, device, raid_map); 1508 if (rc) 1509 goto error; 1510 1511 device->raid_map = raid_map; 1512 1513 return 0; 1514 1515 error: 1516 kfree(raid_map); 1517 1518 return rc; 1519 } 1520 1521 static void pqi_set_max_transfer_encrypted(struct pqi_ctrl_info *ctrl_info, 1522 struct pqi_scsi_dev *device) 1523 { 1524 if (!ctrl_info->lv_drive_type_mix_valid) { 1525 device->max_transfer_encrypted = ~0; 1526 return; 1527 } 1528 1529 switch (LV_GET_DRIVE_TYPE_MIX(device->scsi3addr)) { 1530 case LV_DRIVE_TYPE_MIX_SAS_HDD_ONLY: 1531 case LV_DRIVE_TYPE_MIX_SATA_HDD_ONLY: 1532 case LV_DRIVE_TYPE_MIX_SAS_OR_SATA_SSD_ONLY: 1533 case LV_DRIVE_TYPE_MIX_SAS_SSD_ONLY: 1534 case LV_DRIVE_TYPE_MIX_SATA_SSD_ONLY: 1535 case LV_DRIVE_TYPE_MIX_SAS_ONLY: 1536 case LV_DRIVE_TYPE_MIX_SATA_ONLY: 1537 device->max_transfer_encrypted = 1538 ctrl_info->max_transfer_encrypted_sas_sata; 1539 break; 1540 case LV_DRIVE_TYPE_MIX_NVME_ONLY: 1541 device->max_transfer_encrypted = 1542 ctrl_info->max_transfer_encrypted_nvme; 1543 break; 1544 case LV_DRIVE_TYPE_MIX_UNKNOWN: 1545 case LV_DRIVE_TYPE_MIX_NO_RESTRICTION: 1546 default: 1547 device->max_transfer_encrypted = 1548 min(ctrl_info->max_transfer_encrypted_sas_sata, 1549 ctrl_info->max_transfer_encrypted_nvme); 1550 break; 1551 } 1552 } 1553 1554 static void pqi_get_raid_bypass_status(struct pqi_ctrl_info *ctrl_info, 1555 struct pqi_scsi_dev *device) 1556 { 1557 int rc; 1558 u8 *buffer; 1559 u8 bypass_status; 1560 1561 buffer = kmalloc(64, GFP_KERNEL); 1562 if (!buffer) 1563 return; 1564 1565 rc = pqi_scsi_inquiry(ctrl_info, device->scsi3addr, 1566 VPD_PAGE | CISS_VPD_LV_BYPASS_STATUS, buffer, 64); 1567 if (rc) 1568 goto out; 1569 1570 #define RAID_BYPASS_STATUS 4 1571 #define RAID_BYPASS_CONFIGURED 0x1 1572 #define RAID_BYPASS_ENABLED 0x2 1573 1574 bypass_status = buffer[RAID_BYPASS_STATUS]; 1575 device->raid_bypass_configured = 1576 (bypass_status & RAID_BYPASS_CONFIGURED) != 0; 1577 if (device->raid_bypass_configured && 1578 (bypass_status & RAID_BYPASS_ENABLED) && 1579 pqi_get_raid_map(ctrl_info, device) == 0) { 1580 device->raid_bypass_enabled = true; 1581 if (get_unaligned_le16(&device->raid_map->flags) & 1582 RAID_MAP_ENCRYPTION_ENABLED) 1583 pqi_set_max_transfer_encrypted(ctrl_info, device); 1584 } 1585 1586 out: 1587 kfree(buffer); 1588 } 1589 1590 /* 1591 * Use vendor-specific VPD to determine online/offline status of a volume. 1592 */ 1593 1594 static void pqi_get_volume_status(struct pqi_ctrl_info *ctrl_info, 1595 struct pqi_scsi_dev *device) 1596 { 1597 int rc; 1598 size_t page_length; 1599 u8 volume_status = CISS_LV_STATUS_UNAVAILABLE; 1600 bool volume_offline = true; 1601 u32 volume_flags; 1602 struct ciss_vpd_logical_volume_status *vpd; 1603 1604 vpd = kmalloc(sizeof(*vpd), GFP_KERNEL); 1605 if (!vpd) 1606 goto no_buffer; 1607 1608 rc = pqi_scsi_inquiry(ctrl_info, device->scsi3addr, 1609 VPD_PAGE | CISS_VPD_LV_STATUS, vpd, sizeof(*vpd)); 1610 if (rc) 1611 goto out; 1612 1613 if (vpd->page_code != CISS_VPD_LV_STATUS) 1614 goto out; 1615 1616 page_length = offsetof(struct ciss_vpd_logical_volume_status, 1617 volume_status) + vpd->page_length; 1618 if (page_length < sizeof(*vpd)) 1619 goto out; 1620 1621 volume_status = vpd->volume_status; 1622 volume_flags = get_unaligned_be32(&vpd->flags); 1623 volume_offline = (volume_flags & CISS_LV_FLAGS_NO_HOST_IO) != 0; 1624 1625 out: 1626 kfree(vpd); 1627 no_buffer: 1628 device->volume_status = volume_status; 1629 device->volume_offline = volume_offline; 1630 } 1631 1632 #define PQI_DEVICE_NCQ_PRIO_SUPPORTED 0x01 1633 #define PQI_DEVICE_PHY_MAP_SUPPORTED 0x10 1634 #define PQI_DEVICE_ERASE_IN_PROGRESS 0x10 1635 1636 static int pqi_get_physical_device_info(struct pqi_ctrl_info *ctrl_info, 1637 struct pqi_scsi_dev *device, 1638 struct bmic_identify_physical_device *id_phys) 1639 { 1640 int rc; 1641 1642 memset(id_phys, 0, sizeof(*id_phys)); 1643 1644 rc = pqi_identify_physical_device(ctrl_info, device, 1645 id_phys, sizeof(*id_phys)); 1646 if (rc) { 1647 device->queue_depth = PQI_PHYSICAL_DISK_DEFAULT_MAX_QUEUE_DEPTH; 1648 return rc; 1649 } 1650 1651 scsi_sanitize_inquiry_string(&id_phys->model[0], 8); 1652 scsi_sanitize_inquiry_string(&id_phys->model[8], 16); 1653 1654 memcpy(device->vendor, &id_phys->model[0], sizeof(device->vendor)); 1655 memcpy(device->model, &id_phys->model[8], sizeof(device->model)); 1656 1657 device->box_index = id_phys->box_index; 1658 device->phys_box_on_bus = id_phys->phys_box_on_bus; 1659 device->phy_connected_dev_type = id_phys->phy_connected_dev_type[0]; 1660 device->queue_depth = 1661 get_unaligned_le16(&id_phys->current_queue_depth_limit); 1662 device->active_path_index = id_phys->active_path_number; 1663 device->path_map = id_phys->redundant_path_present_map; 1664 memcpy(&device->box, 1665 &id_phys->alternate_paths_phys_box_on_port, 1666 sizeof(device->box)); 1667 memcpy(&device->phys_connector, 1668 &id_phys->alternate_paths_phys_connector, 1669 sizeof(device->phys_connector)); 1670 device->bay = id_phys->phys_bay_in_box; 1671 device->lun_count = id_phys->multi_lun_device_lun_count; 1672 if ((id_phys->even_more_flags & PQI_DEVICE_PHY_MAP_SUPPORTED) && 1673 id_phys->phy_count) 1674 device->phy_id = 1675 id_phys->phy_to_phy_map[device->active_path_index]; 1676 else 1677 device->phy_id = 0xFF; 1678 1679 device->ncq_prio_support = 1680 ((get_unaligned_le32(&id_phys->misc_drive_flags) >> 16) & 1681 PQI_DEVICE_NCQ_PRIO_SUPPORTED); 1682 1683 device->erase_in_progress = !!(get_unaligned_le16(&id_phys->extra_physical_drive_flags) & PQI_DEVICE_ERASE_IN_PROGRESS); 1684 1685 return 0; 1686 } 1687 1688 static int pqi_get_logical_device_info(struct pqi_ctrl_info *ctrl_info, 1689 struct pqi_scsi_dev *device) 1690 { 1691 int rc; 1692 u8 *buffer; 1693 1694 buffer = kmalloc(64, GFP_KERNEL); 1695 if (!buffer) 1696 return -ENOMEM; 1697 1698 /* Send an inquiry to the device to see what it is. */ 1699 rc = pqi_scsi_inquiry(ctrl_info, device->scsi3addr, 0, buffer, 64); 1700 if (rc) 1701 goto out; 1702 1703 scsi_sanitize_inquiry_string(&buffer[8], 8); 1704 scsi_sanitize_inquiry_string(&buffer[16], 16); 1705 1706 device->devtype = buffer[0] & 0x1f; 1707 memcpy(device->vendor, &buffer[8], sizeof(device->vendor)); 1708 memcpy(device->model, &buffer[16], sizeof(device->model)); 1709 1710 if (device->devtype == TYPE_DISK) { 1711 if (device->is_external_raid_device) { 1712 device->raid_level = SA_RAID_UNKNOWN; 1713 device->volume_status = CISS_LV_OK; 1714 device->volume_offline = false; 1715 } else { 1716 pqi_get_raid_level(ctrl_info, device); 1717 pqi_get_raid_bypass_status(ctrl_info, device); 1718 pqi_get_volume_status(ctrl_info, device); 1719 } 1720 } 1721 1722 out: 1723 kfree(buffer); 1724 1725 return rc; 1726 } 1727 1728 /* 1729 * Prevent adding drive to OS for some corner cases such as a drive 1730 * undergoing a sanitize (erase) operation. Some OSes will continue to poll 1731 * the drive until the sanitize completes, which can take hours, 1732 * resulting in long bootup delays. Commands such as TUR, READ_CAP 1733 * are allowed, but READ/WRITE cause check condition. So the OS 1734 * cannot check/read the partition table. 1735 * Note: devices that have completed sanitize must be re-enabled 1736 * using the management utility. 1737 */ 1738 static inline bool pqi_keep_device_offline(struct pqi_scsi_dev *device) 1739 { 1740 return device->erase_in_progress; 1741 } 1742 1743 static int pqi_get_device_info_phys_logical(struct pqi_ctrl_info *ctrl_info, 1744 struct pqi_scsi_dev *device, 1745 struct bmic_identify_physical_device *id_phys) 1746 { 1747 int rc; 1748 1749 if (device->is_expander_smp_device) 1750 return 0; 1751 1752 if (pqi_is_logical_device(device)) 1753 rc = pqi_get_logical_device_info(ctrl_info, device); 1754 else 1755 rc = pqi_get_physical_device_info(ctrl_info, device, id_phys); 1756 1757 return rc; 1758 } 1759 1760 static int pqi_get_device_info(struct pqi_ctrl_info *ctrl_info, 1761 struct pqi_scsi_dev *device, 1762 struct bmic_identify_physical_device *id_phys) 1763 { 1764 int rc; 1765 1766 rc = pqi_get_device_info_phys_logical(ctrl_info, device, id_phys); 1767 1768 if (rc == 0 && device->lun_count == 0) 1769 device->lun_count = 1; 1770 1771 return rc; 1772 } 1773 1774 static void pqi_show_volume_status(struct pqi_ctrl_info *ctrl_info, 1775 struct pqi_scsi_dev *device) 1776 { 1777 char *status; 1778 static const char unknown_state_str[] = 1779 "Volume is in an unknown state (%u)"; 1780 char unknown_state_buffer[sizeof(unknown_state_str) + 10]; 1781 1782 switch (device->volume_status) { 1783 case CISS_LV_OK: 1784 status = "Volume online"; 1785 break; 1786 case CISS_LV_FAILED: 1787 status = "Volume failed"; 1788 break; 1789 case CISS_LV_NOT_CONFIGURED: 1790 status = "Volume not configured"; 1791 break; 1792 case CISS_LV_DEGRADED: 1793 status = "Volume degraded"; 1794 break; 1795 case CISS_LV_READY_FOR_RECOVERY: 1796 status = "Volume ready for recovery operation"; 1797 break; 1798 case CISS_LV_UNDERGOING_RECOVERY: 1799 status = "Volume undergoing recovery"; 1800 break; 1801 case CISS_LV_WRONG_PHYSICAL_DRIVE_REPLACED: 1802 status = "Wrong physical drive was replaced"; 1803 break; 1804 case CISS_LV_PHYSICAL_DRIVE_CONNECTION_PROBLEM: 1805 status = "A physical drive not properly connected"; 1806 break; 1807 case CISS_LV_HARDWARE_OVERHEATING: 1808 status = "Hardware is overheating"; 1809 break; 1810 case CISS_LV_HARDWARE_HAS_OVERHEATED: 1811 status = "Hardware has overheated"; 1812 break; 1813 case CISS_LV_UNDERGOING_EXPANSION: 1814 status = "Volume undergoing expansion"; 1815 break; 1816 case CISS_LV_NOT_AVAILABLE: 1817 status = "Volume waiting for transforming volume"; 1818 break; 1819 case CISS_LV_QUEUED_FOR_EXPANSION: 1820 status = "Volume queued for expansion"; 1821 break; 1822 case CISS_LV_DISABLED_SCSI_ID_CONFLICT: 1823 status = "Volume disabled due to SCSI ID conflict"; 1824 break; 1825 case CISS_LV_EJECTED: 1826 status = "Volume has been ejected"; 1827 break; 1828 case CISS_LV_UNDERGOING_ERASE: 1829 status = "Volume undergoing background erase"; 1830 break; 1831 case CISS_LV_READY_FOR_PREDICTIVE_SPARE_REBUILD: 1832 status = "Volume ready for predictive spare rebuild"; 1833 break; 1834 case CISS_LV_UNDERGOING_RPI: 1835 status = "Volume undergoing rapid parity initialization"; 1836 break; 1837 case CISS_LV_PENDING_RPI: 1838 status = "Volume queued for rapid parity initialization"; 1839 break; 1840 case CISS_LV_ENCRYPTED_NO_KEY: 1841 status = "Encrypted volume inaccessible - key not present"; 1842 break; 1843 case CISS_LV_UNDERGOING_ENCRYPTION: 1844 status = "Volume undergoing encryption process"; 1845 break; 1846 case CISS_LV_UNDERGOING_ENCRYPTION_REKEYING: 1847 status = "Volume undergoing encryption re-keying process"; 1848 break; 1849 case CISS_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER: 1850 status = "Volume encrypted but encryption is disabled"; 1851 break; 1852 case CISS_LV_PENDING_ENCRYPTION: 1853 status = "Volume pending migration to encrypted state"; 1854 break; 1855 case CISS_LV_PENDING_ENCRYPTION_REKEYING: 1856 status = "Volume pending encryption rekeying"; 1857 break; 1858 case CISS_LV_NOT_SUPPORTED: 1859 status = "Volume not supported on this controller"; 1860 break; 1861 case CISS_LV_STATUS_UNAVAILABLE: 1862 status = "Volume status not available"; 1863 break; 1864 default: 1865 snprintf(unknown_state_buffer, sizeof(unknown_state_buffer), 1866 unknown_state_str, device->volume_status); 1867 status = unknown_state_buffer; 1868 break; 1869 } 1870 1871 dev_info(&ctrl_info->pci_dev->dev, 1872 "scsi %d:%d:%d:%d %s\n", 1873 ctrl_info->scsi_host->host_no, 1874 device->bus, device->target, device->lun, status); 1875 } 1876 1877 static void pqi_rescan_worker(struct work_struct *work) 1878 { 1879 struct pqi_ctrl_info *ctrl_info; 1880 1881 ctrl_info = container_of(to_delayed_work(work), struct pqi_ctrl_info, 1882 rescan_work); 1883 1884 pqi_scan_scsi_devices(ctrl_info); 1885 } 1886 1887 static int pqi_add_device(struct pqi_ctrl_info *ctrl_info, 1888 struct pqi_scsi_dev *device) 1889 { 1890 int rc; 1891 1892 if (pqi_is_logical_device(device)) 1893 rc = scsi_add_device(ctrl_info->scsi_host, device->bus, 1894 device->target, device->lun); 1895 else 1896 rc = pqi_add_sas_device(ctrl_info->sas_host, device); 1897 1898 return rc; 1899 } 1900 1901 #define PQI_REMOVE_DEVICE_PENDING_IO_TIMEOUT_MSECS (20 * 1000) 1902 1903 static inline void pqi_remove_device(struct pqi_ctrl_info *ctrl_info, struct pqi_scsi_dev *device) 1904 { 1905 int rc; 1906 int lun; 1907 1908 for (lun = 0; lun < device->lun_count; lun++) { 1909 rc = pqi_device_wait_for_pending_io(ctrl_info, device, lun, 1910 PQI_REMOVE_DEVICE_PENDING_IO_TIMEOUT_MSECS); 1911 if (rc) 1912 dev_err(&ctrl_info->pci_dev->dev, 1913 "scsi %d:%d:%d:%d removing device with %d outstanding command(s)\n", 1914 ctrl_info->scsi_host->host_no, device->bus, 1915 device->target, lun, 1916 atomic_read(&device->scsi_cmds_outstanding[lun])); 1917 } 1918 1919 if (pqi_is_logical_device(device)) 1920 scsi_remove_device(device->sdev); 1921 else 1922 pqi_remove_sas_device(device); 1923 1924 pqi_device_remove_start(device); 1925 } 1926 1927 /* Assumes the SCSI device list lock is held. */ 1928 1929 static struct pqi_scsi_dev *pqi_find_scsi_dev(struct pqi_ctrl_info *ctrl_info, 1930 int bus, int target, int lun) 1931 { 1932 struct pqi_scsi_dev *device; 1933 1934 list_for_each_entry(device, &ctrl_info->scsi_device_list, scsi_device_list_entry) 1935 if (device->bus == bus && device->target == target && device->lun == lun) 1936 return device; 1937 1938 return NULL; 1939 } 1940 1941 static inline bool pqi_device_equal(struct pqi_scsi_dev *dev1, struct pqi_scsi_dev *dev2) 1942 { 1943 if (dev1->is_physical_device != dev2->is_physical_device) 1944 return false; 1945 1946 if (dev1->is_physical_device) 1947 return memcmp(dev1->wwid, dev2->wwid, sizeof(dev1->wwid)) == 0; 1948 1949 return memcmp(dev1->volume_id, dev2->volume_id, sizeof(dev1->volume_id)) == 0; 1950 } 1951 1952 enum pqi_find_result { 1953 DEVICE_NOT_FOUND, 1954 DEVICE_CHANGED, 1955 DEVICE_SAME, 1956 }; 1957 1958 static enum pqi_find_result pqi_scsi_find_entry(struct pqi_ctrl_info *ctrl_info, 1959 struct pqi_scsi_dev *device_to_find, struct pqi_scsi_dev **matching_device) 1960 { 1961 struct pqi_scsi_dev *device; 1962 1963 list_for_each_entry(device, &ctrl_info->scsi_device_list, scsi_device_list_entry) { 1964 if (pqi_scsi3addr_equal(device_to_find->scsi3addr, device->scsi3addr)) { 1965 *matching_device = device; 1966 if (pqi_device_equal(device_to_find, device)) { 1967 if (device_to_find->volume_offline) 1968 return DEVICE_CHANGED; 1969 return DEVICE_SAME; 1970 } 1971 return DEVICE_CHANGED; 1972 } 1973 } 1974 1975 return DEVICE_NOT_FOUND; 1976 } 1977 1978 static inline const char *pqi_device_type(struct pqi_scsi_dev *device) 1979 { 1980 if (device->is_expander_smp_device) 1981 return "Enclosure SMP "; 1982 1983 return scsi_device_type(device->devtype); 1984 } 1985 1986 #define PQI_DEV_INFO_BUFFER_LENGTH 128 1987 1988 static void pqi_dev_info(struct pqi_ctrl_info *ctrl_info, 1989 char *action, struct pqi_scsi_dev *device) 1990 { 1991 ssize_t count; 1992 char buffer[PQI_DEV_INFO_BUFFER_LENGTH]; 1993 1994 count = scnprintf(buffer, PQI_DEV_INFO_BUFFER_LENGTH, 1995 "%d:%d:", ctrl_info->scsi_host->host_no, device->bus); 1996 1997 if (device->target_lun_valid) 1998 count += scnprintf(buffer + count, 1999 PQI_DEV_INFO_BUFFER_LENGTH - count, 2000 "%d:%d", 2001 device->target, 2002 device->lun); 2003 else 2004 count += scnprintf(buffer + count, 2005 PQI_DEV_INFO_BUFFER_LENGTH - count, 2006 "-:-"); 2007 2008 if (pqi_is_logical_device(device)) 2009 count += scnprintf(buffer + count, 2010 PQI_DEV_INFO_BUFFER_LENGTH - count, 2011 " %08x%08x", 2012 *((u32 *)&device->scsi3addr), 2013 *((u32 *)&device->scsi3addr[4])); 2014 else 2015 count += scnprintf(buffer + count, 2016 PQI_DEV_INFO_BUFFER_LENGTH - count, 2017 " %016llx%016llx", 2018 get_unaligned_be64(&device->wwid[0]), 2019 get_unaligned_be64(&device->wwid[8])); 2020 2021 count += scnprintf(buffer + count, PQI_DEV_INFO_BUFFER_LENGTH - count, 2022 " %s %.8s %.16s ", 2023 pqi_device_type(device), 2024 device->vendor, 2025 device->model); 2026 2027 if (pqi_is_logical_device(device)) { 2028 if (device->devtype == TYPE_DISK) 2029 count += scnprintf(buffer + count, 2030 PQI_DEV_INFO_BUFFER_LENGTH - count, 2031 "SSDSmartPathCap%c En%c %-12s", 2032 device->raid_bypass_configured ? '+' : '-', 2033 device->raid_bypass_enabled ? '+' : '-', 2034 pqi_raid_level_to_string(device->raid_level)); 2035 } else { 2036 count += scnprintf(buffer + count, 2037 PQI_DEV_INFO_BUFFER_LENGTH - count, 2038 "AIO%c", device->aio_enabled ? '+' : '-'); 2039 if (device->devtype == TYPE_DISK || 2040 device->devtype == TYPE_ZBC) 2041 count += scnprintf(buffer + count, 2042 PQI_DEV_INFO_BUFFER_LENGTH - count, 2043 " qd=%-6d", device->queue_depth); 2044 } 2045 2046 dev_info(&ctrl_info->pci_dev->dev, "%s %s\n", action, buffer); 2047 } 2048 2049 static bool pqi_raid_maps_equal(struct raid_map *raid_map1, struct raid_map *raid_map2) 2050 { 2051 u32 raid_map1_size; 2052 u32 raid_map2_size; 2053 2054 if (raid_map1 == NULL || raid_map2 == NULL) 2055 return raid_map1 == raid_map2; 2056 2057 raid_map1_size = get_unaligned_le32(&raid_map1->structure_size); 2058 raid_map2_size = get_unaligned_le32(&raid_map2->structure_size); 2059 2060 if (raid_map1_size != raid_map2_size) 2061 return false; 2062 2063 return memcmp(raid_map1, raid_map2, raid_map1_size) == 0; 2064 } 2065 2066 /* Assumes the SCSI device list lock is held. */ 2067 2068 static void pqi_scsi_update_device(struct pqi_ctrl_info *ctrl_info, 2069 struct pqi_scsi_dev *existing_device, struct pqi_scsi_dev *new_device) 2070 { 2071 existing_device->device_type = new_device->device_type; 2072 existing_device->bus = new_device->bus; 2073 if (new_device->target_lun_valid) { 2074 existing_device->target = new_device->target; 2075 existing_device->lun = new_device->lun; 2076 existing_device->target_lun_valid = true; 2077 } 2078 2079 /* By definition, the scsi3addr and wwid fields are already the same. */ 2080 2081 existing_device->is_physical_device = new_device->is_physical_device; 2082 memcpy(existing_device->vendor, new_device->vendor, sizeof(existing_device->vendor)); 2083 memcpy(existing_device->model, new_device->model, sizeof(existing_device->model)); 2084 existing_device->sas_address = new_device->sas_address; 2085 existing_device->queue_depth = new_device->queue_depth; 2086 existing_device->device_offline = false; 2087 existing_device->lun_count = new_device->lun_count; 2088 2089 if (pqi_is_logical_device(existing_device)) { 2090 existing_device->is_external_raid_device = new_device->is_external_raid_device; 2091 2092 if (existing_device->devtype == TYPE_DISK) { 2093 existing_device->raid_level = new_device->raid_level; 2094 existing_device->volume_status = new_device->volume_status; 2095 memset(existing_device->next_bypass_group, 0, sizeof(existing_device->next_bypass_group)); 2096 if (!pqi_raid_maps_equal(existing_device->raid_map, new_device->raid_map)) { 2097 kfree(existing_device->raid_map); 2098 existing_device->raid_map = new_device->raid_map; 2099 /* To prevent this from being freed later. */ 2100 new_device->raid_map = NULL; 2101 } 2102 existing_device->raid_bypass_configured = new_device->raid_bypass_configured; 2103 existing_device->raid_bypass_enabled = new_device->raid_bypass_enabled; 2104 } 2105 } else { 2106 existing_device->aio_enabled = new_device->aio_enabled; 2107 existing_device->aio_handle = new_device->aio_handle; 2108 existing_device->is_expander_smp_device = new_device->is_expander_smp_device; 2109 existing_device->active_path_index = new_device->active_path_index; 2110 existing_device->phy_id = new_device->phy_id; 2111 existing_device->path_map = new_device->path_map; 2112 existing_device->bay = new_device->bay; 2113 existing_device->box_index = new_device->box_index; 2114 existing_device->phys_box_on_bus = new_device->phys_box_on_bus; 2115 existing_device->phy_connected_dev_type = new_device->phy_connected_dev_type; 2116 memcpy(existing_device->box, new_device->box, sizeof(existing_device->box)); 2117 memcpy(existing_device->phys_connector, new_device->phys_connector, sizeof(existing_device->phys_connector)); 2118 } 2119 } 2120 2121 static inline void pqi_free_device(struct pqi_scsi_dev *device) 2122 { 2123 if (device) { 2124 kfree(device->raid_map); 2125 kfree(device); 2126 } 2127 } 2128 2129 /* 2130 * Called when exposing a new device to the OS fails in order to re-adjust 2131 * our internal SCSI device list to match the SCSI ML's view. 2132 */ 2133 2134 static inline void pqi_fixup_botched_add(struct pqi_ctrl_info *ctrl_info, 2135 struct pqi_scsi_dev *device) 2136 { 2137 unsigned long flags; 2138 2139 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 2140 list_del(&device->scsi_device_list_entry); 2141 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 2142 2143 /* Allow the device structure to be freed later. */ 2144 device->keep_device = false; 2145 } 2146 2147 static inline bool pqi_is_device_added(struct pqi_scsi_dev *device) 2148 { 2149 if (device->is_expander_smp_device) 2150 return device->sas_port != NULL; 2151 2152 return device->sdev != NULL; 2153 } 2154 2155 static inline void pqi_init_device_tmf_work(struct pqi_scsi_dev *device) 2156 { 2157 unsigned int lun; 2158 struct pqi_tmf_work *tmf_work; 2159 2160 for (lun = 0, tmf_work = device->tmf_work; lun < PQI_MAX_LUNS_PER_DEVICE; lun++, tmf_work++) 2161 INIT_WORK(&tmf_work->work_struct, pqi_tmf_worker); 2162 } 2163 2164 static inline bool pqi_volume_rescan_needed(struct pqi_scsi_dev *device) 2165 { 2166 if (pqi_device_in_remove(device)) 2167 return false; 2168 2169 if (device->sdev == NULL) 2170 return false; 2171 2172 if (!scsi_device_online(device->sdev)) 2173 return false; 2174 2175 return device->rescan; 2176 } 2177 2178 static void pqi_update_device_list(struct pqi_ctrl_info *ctrl_info, 2179 struct pqi_scsi_dev *new_device_list[], unsigned int num_new_devices) 2180 { 2181 int rc; 2182 unsigned int i; 2183 unsigned long flags; 2184 enum pqi_find_result find_result; 2185 struct pqi_scsi_dev *device; 2186 struct pqi_scsi_dev *next; 2187 struct pqi_scsi_dev *matching_device; 2188 LIST_HEAD(add_list); 2189 LIST_HEAD(delete_list); 2190 2191 /* 2192 * The idea here is to do as little work as possible while holding the 2193 * spinlock. That's why we go to great pains to defer anything other 2194 * than updating the internal device list until after we release the 2195 * spinlock. 2196 */ 2197 2198 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 2199 2200 /* Assume that all devices in the existing list have gone away. */ 2201 list_for_each_entry(device, &ctrl_info->scsi_device_list, scsi_device_list_entry) 2202 device->device_gone = true; 2203 2204 for (i = 0; i < num_new_devices; i++) { 2205 device = new_device_list[i]; 2206 2207 find_result = pqi_scsi_find_entry(ctrl_info, device, 2208 &matching_device); 2209 2210 switch (find_result) { 2211 case DEVICE_SAME: 2212 /* 2213 * The newly found device is already in the existing 2214 * device list. 2215 */ 2216 device->new_device = false; 2217 matching_device->device_gone = false; 2218 pqi_scsi_update_device(ctrl_info, matching_device, device); 2219 break; 2220 case DEVICE_NOT_FOUND: 2221 /* 2222 * The newly found device is NOT in the existing device 2223 * list. 2224 */ 2225 device->new_device = true; 2226 break; 2227 case DEVICE_CHANGED: 2228 /* 2229 * The original device has gone away and we need to add 2230 * the new device. 2231 */ 2232 device->new_device = true; 2233 break; 2234 } 2235 } 2236 2237 /* Process all devices that have gone away. */ 2238 list_for_each_entry_safe(device, next, &ctrl_info->scsi_device_list, 2239 scsi_device_list_entry) { 2240 if (device->device_gone) { 2241 list_del(&device->scsi_device_list_entry); 2242 list_add_tail(&device->delete_list_entry, &delete_list); 2243 } 2244 } 2245 2246 /* Process all new devices. */ 2247 for (i = 0; i < num_new_devices; i++) { 2248 device = new_device_list[i]; 2249 if (!device->new_device) 2250 continue; 2251 if (device->volume_offline) 2252 continue; 2253 list_add_tail(&device->scsi_device_list_entry, 2254 &ctrl_info->scsi_device_list); 2255 list_add_tail(&device->add_list_entry, &add_list); 2256 /* To prevent this device structure from being freed later. */ 2257 device->keep_device = true; 2258 pqi_init_device_tmf_work(device); 2259 } 2260 2261 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 2262 2263 /* 2264 * If OFA is in progress and there are devices that need to be deleted, 2265 * allow any pending reset operations to continue and unblock any SCSI 2266 * requests before removal. 2267 */ 2268 if (pqi_ofa_in_progress(ctrl_info)) { 2269 list_for_each_entry_safe(device, next, &delete_list, delete_list_entry) 2270 if (pqi_is_device_added(device)) 2271 pqi_device_remove_start(device); 2272 pqi_ctrl_unblock_device_reset(ctrl_info); 2273 pqi_scsi_unblock_requests(ctrl_info); 2274 } 2275 2276 /* Remove all devices that have gone away. */ 2277 list_for_each_entry_safe(device, next, &delete_list, delete_list_entry) { 2278 if (device->volume_offline) { 2279 pqi_dev_info(ctrl_info, "offline", device); 2280 pqi_show_volume_status(ctrl_info, device); 2281 } else { 2282 pqi_dev_info(ctrl_info, "removed", device); 2283 } 2284 if (pqi_is_device_added(device)) 2285 pqi_remove_device(ctrl_info, device); 2286 list_del(&device->delete_list_entry); 2287 pqi_free_device(device); 2288 } 2289 2290 /* 2291 * Notify the SML of any existing device changes such as; 2292 * queue depth, device size. 2293 */ 2294 list_for_each_entry(device, &ctrl_info->scsi_device_list, scsi_device_list_entry) { 2295 if (device->sdev && device->queue_depth != device->advertised_queue_depth) { 2296 device->advertised_queue_depth = device->queue_depth; 2297 scsi_change_queue_depth(device->sdev, device->advertised_queue_depth); 2298 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 2299 if (pqi_volume_rescan_needed(device)) { 2300 device->rescan = false; 2301 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 2302 scsi_rescan_device(device->sdev); 2303 } else { 2304 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 2305 } 2306 } 2307 } 2308 2309 /* Expose any new devices. */ 2310 list_for_each_entry_safe(device, next, &add_list, add_list_entry) { 2311 if (!pqi_is_device_added(device)) { 2312 rc = pqi_add_device(ctrl_info, device); 2313 if (rc == 0) { 2314 pqi_dev_info(ctrl_info, "added", device); 2315 } else { 2316 dev_warn(&ctrl_info->pci_dev->dev, 2317 "scsi %d:%d:%d:%d addition failed, device not added\n", 2318 ctrl_info->scsi_host->host_no, 2319 device->bus, device->target, 2320 device->lun); 2321 pqi_fixup_botched_add(ctrl_info, device); 2322 } 2323 } 2324 } 2325 2326 } 2327 2328 static inline bool pqi_is_supported_device(struct pqi_scsi_dev *device) 2329 { 2330 /* 2331 * Only support the HBA controller itself as a RAID 2332 * controller. If it's a RAID controller other than 2333 * the HBA itself (an external RAID controller, for 2334 * example), we don't support it. 2335 */ 2336 if (device->device_type == SA_DEVICE_TYPE_CONTROLLER && 2337 !pqi_is_hba_lunid(device->scsi3addr)) 2338 return false; 2339 2340 return true; 2341 } 2342 2343 static inline bool pqi_skip_device(u8 *scsi3addr) 2344 { 2345 /* Ignore all masked devices. */ 2346 if (MASKED_DEVICE(scsi3addr)) 2347 return true; 2348 2349 return false; 2350 } 2351 2352 static inline void pqi_mask_device(u8 *scsi3addr) 2353 { 2354 scsi3addr[3] |= 0xc0; 2355 } 2356 2357 static inline bool pqi_is_multipath_device(struct pqi_scsi_dev *device) 2358 { 2359 if (pqi_is_logical_device(device)) 2360 return false; 2361 2362 return (device->path_map & (device->path_map - 1)) != 0; 2363 } 2364 2365 static inline bool pqi_expose_device(struct pqi_scsi_dev *device) 2366 { 2367 return !device->is_physical_device || !pqi_skip_device(device->scsi3addr); 2368 } 2369 2370 static int pqi_update_scsi_devices(struct pqi_ctrl_info *ctrl_info) 2371 { 2372 int i; 2373 int rc; 2374 LIST_HEAD(new_device_list_head); 2375 struct report_phys_lun_16byte_wwid_list *physdev_list = NULL; 2376 struct report_log_lun_list *logdev_list = NULL; 2377 struct report_phys_lun_16byte_wwid *phys_lun; 2378 struct report_log_lun *log_lun; 2379 struct bmic_identify_physical_device *id_phys = NULL; 2380 u32 num_physicals; 2381 u32 num_logicals; 2382 struct pqi_scsi_dev **new_device_list = NULL; 2383 struct pqi_scsi_dev *device; 2384 struct pqi_scsi_dev *next; 2385 unsigned int num_new_devices; 2386 unsigned int num_valid_devices; 2387 bool is_physical_device; 2388 u8 *scsi3addr; 2389 unsigned int physical_index; 2390 unsigned int logical_index; 2391 static char *out_of_memory_msg = 2392 "failed to allocate memory, device discovery stopped"; 2393 2394 rc = pqi_get_device_lists(ctrl_info, &physdev_list, &logdev_list); 2395 if (rc) 2396 goto out; 2397 2398 if (physdev_list) 2399 num_physicals = 2400 get_unaligned_be32(&physdev_list->header.list_length) 2401 / sizeof(physdev_list->lun_entries[0]); 2402 else 2403 num_physicals = 0; 2404 2405 if (logdev_list) 2406 num_logicals = 2407 get_unaligned_be32(&logdev_list->header.list_length) 2408 / sizeof(logdev_list->lun_entries[0]); 2409 else 2410 num_logicals = 0; 2411 2412 if (num_physicals) { 2413 /* 2414 * We need this buffer for calls to pqi_get_physical_disk_info() 2415 * below. We allocate it here instead of inside 2416 * pqi_get_physical_disk_info() because it's a fairly large 2417 * buffer. 2418 */ 2419 id_phys = kmalloc(sizeof(*id_phys), GFP_KERNEL); 2420 if (!id_phys) { 2421 dev_warn(&ctrl_info->pci_dev->dev, "%s\n", 2422 out_of_memory_msg); 2423 rc = -ENOMEM; 2424 goto out; 2425 } 2426 2427 if (pqi_hide_vsep) { 2428 for (i = num_physicals - 1; i >= 0; i--) { 2429 phys_lun = &physdev_list->lun_entries[i]; 2430 if (CISS_GET_DRIVE_NUMBER(phys_lun->lunid) == PQI_VSEP_CISS_BTL) { 2431 pqi_mask_device(phys_lun->lunid); 2432 break; 2433 } 2434 } 2435 } 2436 } 2437 2438 if (num_logicals && 2439 (logdev_list->header.flags & CISS_REPORT_LOG_FLAG_DRIVE_TYPE_MIX)) 2440 ctrl_info->lv_drive_type_mix_valid = true; 2441 2442 num_new_devices = num_physicals + num_logicals; 2443 2444 new_device_list = kmalloc_array(num_new_devices, 2445 sizeof(*new_device_list), 2446 GFP_KERNEL); 2447 if (!new_device_list) { 2448 dev_warn(&ctrl_info->pci_dev->dev, "%s\n", out_of_memory_msg); 2449 rc = -ENOMEM; 2450 goto out; 2451 } 2452 2453 for (i = 0; i < num_new_devices; i++) { 2454 device = kzalloc(sizeof(*device), GFP_KERNEL); 2455 if (!device) { 2456 dev_warn(&ctrl_info->pci_dev->dev, "%s\n", 2457 out_of_memory_msg); 2458 rc = -ENOMEM; 2459 goto out; 2460 } 2461 list_add_tail(&device->new_device_list_entry, 2462 &new_device_list_head); 2463 } 2464 2465 device = NULL; 2466 num_valid_devices = 0; 2467 physical_index = 0; 2468 logical_index = 0; 2469 2470 for (i = 0; i < num_new_devices; i++) { 2471 2472 if ((!pqi_expose_ld_first && i < num_physicals) || 2473 (pqi_expose_ld_first && i >= num_logicals)) { 2474 is_physical_device = true; 2475 phys_lun = &physdev_list->lun_entries[physical_index++]; 2476 log_lun = NULL; 2477 scsi3addr = phys_lun->lunid; 2478 } else { 2479 is_physical_device = false; 2480 phys_lun = NULL; 2481 log_lun = &logdev_list->lun_entries[logical_index++]; 2482 scsi3addr = log_lun->lunid; 2483 } 2484 2485 if (is_physical_device && pqi_skip_device(scsi3addr)) 2486 continue; 2487 2488 if (device) 2489 device = list_next_entry(device, new_device_list_entry); 2490 else 2491 device = list_first_entry(&new_device_list_head, 2492 struct pqi_scsi_dev, new_device_list_entry); 2493 2494 memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr)); 2495 device->is_physical_device = is_physical_device; 2496 if (is_physical_device) { 2497 device->device_type = phys_lun->device_type; 2498 if (device->device_type == SA_DEVICE_TYPE_EXPANDER_SMP) 2499 device->is_expander_smp_device = true; 2500 } else { 2501 device->is_external_raid_device = 2502 pqi_is_external_raid_addr(scsi3addr); 2503 } 2504 2505 if (!pqi_is_supported_device(device)) 2506 continue; 2507 2508 /* Gather information about the device. */ 2509 rc = pqi_get_device_info(ctrl_info, device, id_phys); 2510 if (rc == -ENOMEM) { 2511 dev_warn(&ctrl_info->pci_dev->dev, "%s\n", 2512 out_of_memory_msg); 2513 goto out; 2514 } 2515 if (rc) { 2516 if (device->is_physical_device) 2517 dev_warn(&ctrl_info->pci_dev->dev, 2518 "obtaining device info failed, skipping physical device %016llx%016llx\n", 2519 get_unaligned_be64(&phys_lun->wwid[0]), 2520 get_unaligned_be64(&phys_lun->wwid[8])); 2521 else 2522 dev_warn(&ctrl_info->pci_dev->dev, 2523 "obtaining device info failed, skipping logical device %08x%08x\n", 2524 *((u32 *)&device->scsi3addr), 2525 *((u32 *)&device->scsi3addr[4])); 2526 rc = 0; 2527 continue; 2528 } 2529 2530 /* Do not present disks that the OS cannot fully probe. */ 2531 if (pqi_keep_device_offline(device)) 2532 continue; 2533 2534 pqi_assign_bus_target_lun(device); 2535 2536 if (device->is_physical_device) { 2537 memcpy(device->wwid, phys_lun->wwid, sizeof(device->wwid)); 2538 if ((phys_lun->device_flags & 2539 CISS_REPORT_PHYS_DEV_FLAG_AIO_ENABLED) && 2540 phys_lun->aio_handle) { 2541 device->aio_enabled = true; 2542 device->aio_handle = 2543 phys_lun->aio_handle; 2544 } 2545 } else { 2546 memcpy(device->volume_id, log_lun->volume_id, 2547 sizeof(device->volume_id)); 2548 } 2549 2550 device->sas_address = get_unaligned_be64(&device->wwid[0]); 2551 2552 new_device_list[num_valid_devices++] = device; 2553 } 2554 2555 pqi_update_device_list(ctrl_info, new_device_list, num_valid_devices); 2556 2557 out: 2558 list_for_each_entry_safe(device, next, &new_device_list_head, 2559 new_device_list_entry) { 2560 if (device->keep_device) 2561 continue; 2562 list_del(&device->new_device_list_entry); 2563 pqi_free_device(device); 2564 } 2565 2566 kfree(new_device_list); 2567 kfree(physdev_list); 2568 kfree(logdev_list); 2569 kfree(id_phys); 2570 2571 return rc; 2572 } 2573 2574 static int pqi_scan_scsi_devices(struct pqi_ctrl_info *ctrl_info) 2575 { 2576 int rc; 2577 int mutex_acquired; 2578 2579 if (pqi_ctrl_offline(ctrl_info)) 2580 return -ENXIO; 2581 2582 mutex_acquired = mutex_trylock(&ctrl_info->scan_mutex); 2583 2584 if (!mutex_acquired) { 2585 if (pqi_ctrl_scan_blocked(ctrl_info)) 2586 return -EBUSY; 2587 pqi_schedule_rescan_worker_delayed(ctrl_info); 2588 return -EINPROGRESS; 2589 } 2590 2591 rc = pqi_update_scsi_devices(ctrl_info); 2592 if (rc && !pqi_ctrl_scan_blocked(ctrl_info)) 2593 pqi_schedule_rescan_worker_delayed(ctrl_info); 2594 2595 mutex_unlock(&ctrl_info->scan_mutex); 2596 2597 return rc; 2598 } 2599 2600 static void pqi_scan_start(struct Scsi_Host *shost) 2601 { 2602 struct pqi_ctrl_info *ctrl_info; 2603 2604 ctrl_info = shost_to_hba(shost); 2605 2606 pqi_scan_scsi_devices(ctrl_info); 2607 } 2608 2609 /* Returns TRUE if scan is finished. */ 2610 2611 static int pqi_scan_finished(struct Scsi_Host *shost, 2612 unsigned long elapsed_time) 2613 { 2614 struct pqi_ctrl_info *ctrl_info; 2615 2616 ctrl_info = shost_priv(shost); 2617 2618 return !mutex_is_locked(&ctrl_info->scan_mutex); 2619 } 2620 2621 static inline void pqi_set_encryption_info(struct pqi_encryption_info *encryption_info, 2622 struct raid_map *raid_map, u64 first_block) 2623 { 2624 u32 volume_blk_size; 2625 2626 /* 2627 * Set the encryption tweak values based on logical block address. 2628 * If the block size is 512, the tweak value is equal to the LBA. 2629 * For other block sizes, tweak value is (LBA * block size) / 512. 2630 */ 2631 volume_blk_size = get_unaligned_le32(&raid_map->volume_blk_size); 2632 if (volume_blk_size != 512) 2633 first_block = (first_block * volume_blk_size) / 512; 2634 2635 encryption_info->data_encryption_key_index = 2636 get_unaligned_le16(&raid_map->data_encryption_key_index); 2637 encryption_info->encrypt_tweak_lower = lower_32_bits(first_block); 2638 encryption_info->encrypt_tweak_upper = upper_32_bits(first_block); 2639 } 2640 2641 /* 2642 * Attempt to perform RAID bypass mapping for a logical volume I/O. 2643 */ 2644 2645 static bool pqi_aio_raid_level_supported(struct pqi_ctrl_info *ctrl_info, 2646 struct pqi_scsi_dev_raid_map_data *rmd) 2647 { 2648 bool is_supported = true; 2649 2650 switch (rmd->raid_level) { 2651 case SA_RAID_0: 2652 break; 2653 case SA_RAID_1: 2654 if (rmd->is_write && (!ctrl_info->enable_r1_writes || 2655 rmd->data_length > ctrl_info->max_write_raid_1_10_2drive)) 2656 is_supported = false; 2657 break; 2658 case SA_RAID_TRIPLE: 2659 if (rmd->is_write && (!ctrl_info->enable_r1_writes || 2660 rmd->data_length > ctrl_info->max_write_raid_1_10_3drive)) 2661 is_supported = false; 2662 break; 2663 case SA_RAID_5: 2664 if (rmd->is_write && (!ctrl_info->enable_r5_writes || 2665 rmd->data_length > ctrl_info->max_write_raid_5_6)) 2666 is_supported = false; 2667 break; 2668 case SA_RAID_6: 2669 if (rmd->is_write && (!ctrl_info->enable_r6_writes || 2670 rmd->data_length > ctrl_info->max_write_raid_5_6)) 2671 is_supported = false; 2672 break; 2673 default: 2674 is_supported = false; 2675 break; 2676 } 2677 2678 return is_supported; 2679 } 2680 2681 #define PQI_RAID_BYPASS_INELIGIBLE 1 2682 2683 static int pqi_get_aio_lba_and_block_count(struct scsi_cmnd *scmd, 2684 struct pqi_scsi_dev_raid_map_data *rmd) 2685 { 2686 /* Check for valid opcode, get LBA and block count. */ 2687 switch (scmd->cmnd[0]) { 2688 case WRITE_6: 2689 rmd->is_write = true; 2690 fallthrough; 2691 case READ_6: 2692 rmd->first_block = (u64)(((scmd->cmnd[1] & 0x1f) << 16) | 2693 (scmd->cmnd[2] << 8) | scmd->cmnd[3]); 2694 rmd->block_cnt = (u32)scmd->cmnd[4]; 2695 if (rmd->block_cnt == 0) 2696 rmd->block_cnt = 256; 2697 break; 2698 case WRITE_10: 2699 rmd->is_write = true; 2700 fallthrough; 2701 case READ_10: 2702 rmd->first_block = (u64)get_unaligned_be32(&scmd->cmnd[2]); 2703 rmd->block_cnt = (u32)get_unaligned_be16(&scmd->cmnd[7]); 2704 break; 2705 case WRITE_12: 2706 rmd->is_write = true; 2707 fallthrough; 2708 case READ_12: 2709 rmd->first_block = (u64)get_unaligned_be32(&scmd->cmnd[2]); 2710 rmd->block_cnt = get_unaligned_be32(&scmd->cmnd[6]); 2711 break; 2712 case WRITE_16: 2713 rmd->is_write = true; 2714 fallthrough; 2715 case READ_16: 2716 rmd->first_block = get_unaligned_be64(&scmd->cmnd[2]); 2717 rmd->block_cnt = get_unaligned_be32(&scmd->cmnd[10]); 2718 break; 2719 default: 2720 /* Process via normal I/O path. */ 2721 return PQI_RAID_BYPASS_INELIGIBLE; 2722 } 2723 2724 put_unaligned_le32(scsi_bufflen(scmd), &rmd->data_length); 2725 2726 return 0; 2727 } 2728 2729 static int pci_get_aio_common_raid_map_values(struct pqi_ctrl_info *ctrl_info, 2730 struct pqi_scsi_dev_raid_map_data *rmd, struct raid_map *raid_map) 2731 { 2732 #if BITS_PER_LONG == 32 2733 u64 tmpdiv; 2734 #endif 2735 2736 rmd->last_block = rmd->first_block + rmd->block_cnt - 1; 2737 2738 /* Check for invalid block or wraparound. */ 2739 if (rmd->last_block >= 2740 get_unaligned_le64(&raid_map->volume_blk_cnt) || 2741 rmd->last_block < rmd->first_block) 2742 return PQI_RAID_BYPASS_INELIGIBLE; 2743 2744 rmd->data_disks_per_row = 2745 get_unaligned_le16(&raid_map->data_disks_per_row); 2746 rmd->strip_size = get_unaligned_le16(&raid_map->strip_size); 2747 rmd->layout_map_count = get_unaligned_le16(&raid_map->layout_map_count); 2748 2749 /* Calculate stripe information for the request. */ 2750 rmd->blocks_per_row = rmd->data_disks_per_row * rmd->strip_size; 2751 if (rmd->blocks_per_row == 0) /* Used as a divisor in many calculations */ 2752 return PQI_RAID_BYPASS_INELIGIBLE; 2753 #if BITS_PER_LONG == 32 2754 tmpdiv = rmd->first_block; 2755 do_div(tmpdiv, rmd->blocks_per_row); 2756 rmd->first_row = tmpdiv; 2757 tmpdiv = rmd->last_block; 2758 do_div(tmpdiv, rmd->blocks_per_row); 2759 rmd->last_row = tmpdiv; 2760 rmd->first_row_offset = (u32)(rmd->first_block - (rmd->first_row * rmd->blocks_per_row)); 2761 rmd->last_row_offset = (u32)(rmd->last_block - (rmd->last_row * rmd->blocks_per_row)); 2762 tmpdiv = rmd->first_row_offset; 2763 do_div(tmpdiv, rmd->strip_size); 2764 rmd->first_column = tmpdiv; 2765 tmpdiv = rmd->last_row_offset; 2766 do_div(tmpdiv, rmd->strip_size); 2767 rmd->last_column = tmpdiv; 2768 #else 2769 rmd->first_row = rmd->first_block / rmd->blocks_per_row; 2770 rmd->last_row = rmd->last_block / rmd->blocks_per_row; 2771 rmd->first_row_offset = (u32)(rmd->first_block - 2772 (rmd->first_row * rmd->blocks_per_row)); 2773 rmd->last_row_offset = (u32)(rmd->last_block - (rmd->last_row * 2774 rmd->blocks_per_row)); 2775 rmd->first_column = rmd->first_row_offset / rmd->strip_size; 2776 rmd->last_column = rmd->last_row_offset / rmd->strip_size; 2777 #endif 2778 2779 /* If this isn't a single row/column then give to the controller. */ 2780 if (rmd->first_row != rmd->last_row || 2781 rmd->first_column != rmd->last_column) 2782 return PQI_RAID_BYPASS_INELIGIBLE; 2783 2784 /* Proceeding with driver mapping. */ 2785 rmd->total_disks_per_row = rmd->data_disks_per_row + 2786 get_unaligned_le16(&raid_map->metadata_disks_per_row); 2787 rmd->map_row = ((u32)(rmd->first_row >> 2788 raid_map->parity_rotation_shift)) % 2789 get_unaligned_le16(&raid_map->row_cnt); 2790 rmd->map_index = (rmd->map_row * rmd->total_disks_per_row) + 2791 rmd->first_column; 2792 2793 return 0; 2794 } 2795 2796 static int pqi_calc_aio_r5_or_r6(struct pqi_scsi_dev_raid_map_data *rmd, 2797 struct raid_map *raid_map) 2798 { 2799 #if BITS_PER_LONG == 32 2800 u64 tmpdiv; 2801 #endif 2802 2803 if (rmd->blocks_per_row == 0) /* Used as a divisor in many calculations */ 2804 return PQI_RAID_BYPASS_INELIGIBLE; 2805 2806 /* RAID 50/60 */ 2807 /* Verify first and last block are in same RAID group. */ 2808 rmd->stripesize = rmd->blocks_per_row * rmd->layout_map_count; 2809 #if BITS_PER_LONG == 32 2810 tmpdiv = rmd->first_block; 2811 rmd->first_group = do_div(tmpdiv, rmd->stripesize); 2812 tmpdiv = rmd->first_group; 2813 do_div(tmpdiv, rmd->blocks_per_row); 2814 rmd->first_group = tmpdiv; 2815 tmpdiv = rmd->last_block; 2816 rmd->last_group = do_div(tmpdiv, rmd->stripesize); 2817 tmpdiv = rmd->last_group; 2818 do_div(tmpdiv, rmd->blocks_per_row); 2819 rmd->last_group = tmpdiv; 2820 #else 2821 rmd->first_group = (rmd->first_block % rmd->stripesize) / rmd->blocks_per_row; 2822 rmd->last_group = (rmd->last_block % rmd->stripesize) / rmd->blocks_per_row; 2823 #endif 2824 if (rmd->first_group != rmd->last_group) 2825 return PQI_RAID_BYPASS_INELIGIBLE; 2826 2827 /* Verify request is in a single row of RAID 5/6. */ 2828 #if BITS_PER_LONG == 32 2829 tmpdiv = rmd->first_block; 2830 do_div(tmpdiv, rmd->stripesize); 2831 rmd->first_row = tmpdiv; 2832 rmd->r5or6_first_row = tmpdiv; 2833 tmpdiv = rmd->last_block; 2834 do_div(tmpdiv, rmd->stripesize); 2835 rmd->r5or6_last_row = tmpdiv; 2836 #else 2837 rmd->first_row = rmd->r5or6_first_row = 2838 rmd->first_block / rmd->stripesize; 2839 rmd->r5or6_last_row = rmd->last_block / rmd->stripesize; 2840 #endif 2841 if (rmd->r5or6_first_row != rmd->r5or6_last_row) 2842 return PQI_RAID_BYPASS_INELIGIBLE; 2843 2844 /* Verify request is in a single column. */ 2845 #if BITS_PER_LONG == 32 2846 tmpdiv = rmd->first_block; 2847 rmd->first_row_offset = do_div(tmpdiv, rmd->stripesize); 2848 tmpdiv = rmd->first_row_offset; 2849 rmd->first_row_offset = (u32)do_div(tmpdiv, rmd->blocks_per_row); 2850 rmd->r5or6_first_row_offset = rmd->first_row_offset; 2851 tmpdiv = rmd->last_block; 2852 rmd->r5or6_last_row_offset = do_div(tmpdiv, rmd->stripesize); 2853 tmpdiv = rmd->r5or6_last_row_offset; 2854 rmd->r5or6_last_row_offset = do_div(tmpdiv, rmd->blocks_per_row); 2855 tmpdiv = rmd->r5or6_first_row_offset; 2856 do_div(tmpdiv, rmd->strip_size); 2857 rmd->first_column = rmd->r5or6_first_column = tmpdiv; 2858 tmpdiv = rmd->r5or6_last_row_offset; 2859 do_div(tmpdiv, rmd->strip_size); 2860 rmd->r5or6_last_column = tmpdiv; 2861 #else 2862 rmd->first_row_offset = rmd->r5or6_first_row_offset = 2863 (u32)((rmd->first_block % rmd->stripesize) % 2864 rmd->blocks_per_row); 2865 2866 rmd->r5or6_last_row_offset = 2867 (u32)((rmd->last_block % rmd->stripesize) % 2868 rmd->blocks_per_row); 2869 2870 rmd->first_column = 2871 rmd->r5or6_first_row_offset / rmd->strip_size; 2872 rmd->r5or6_first_column = rmd->first_column; 2873 rmd->r5or6_last_column = rmd->r5or6_last_row_offset / rmd->strip_size; 2874 #endif 2875 if (rmd->r5or6_first_column != rmd->r5or6_last_column) 2876 return PQI_RAID_BYPASS_INELIGIBLE; 2877 2878 /* Request is eligible. */ 2879 rmd->map_row = 2880 ((u32)(rmd->first_row >> raid_map->parity_rotation_shift)) % 2881 get_unaligned_le16(&raid_map->row_cnt); 2882 2883 rmd->map_index = (rmd->first_group * 2884 (get_unaligned_le16(&raid_map->row_cnt) * 2885 rmd->total_disks_per_row)) + 2886 (rmd->map_row * rmd->total_disks_per_row) + rmd->first_column; 2887 2888 if (rmd->is_write) { 2889 u32 index; 2890 2891 /* 2892 * p_parity_it_nexus and q_parity_it_nexus are pointers to the 2893 * parity entries inside the device's raid_map. 2894 * 2895 * A device's RAID map is bounded by: number of RAID disks squared. 2896 * 2897 * The devices RAID map size is checked during device 2898 * initialization. 2899 */ 2900 index = DIV_ROUND_UP(rmd->map_index + 1, rmd->total_disks_per_row); 2901 index *= rmd->total_disks_per_row; 2902 index -= get_unaligned_le16(&raid_map->metadata_disks_per_row); 2903 2904 rmd->p_parity_it_nexus = raid_map->disk_data[index].aio_handle; 2905 if (rmd->raid_level == SA_RAID_6) { 2906 rmd->q_parity_it_nexus = raid_map->disk_data[index + 1].aio_handle; 2907 rmd->xor_mult = raid_map->disk_data[rmd->map_index].xor_mult[1]; 2908 } 2909 #if BITS_PER_LONG == 32 2910 tmpdiv = rmd->first_block; 2911 do_div(tmpdiv, rmd->blocks_per_row); 2912 rmd->row = tmpdiv; 2913 #else 2914 rmd->row = rmd->first_block / rmd->blocks_per_row; 2915 #endif 2916 } 2917 2918 return 0; 2919 } 2920 2921 static void pqi_set_aio_cdb(struct pqi_scsi_dev_raid_map_data *rmd) 2922 { 2923 /* Build the new CDB for the physical disk I/O. */ 2924 if (rmd->disk_block > 0xffffffff) { 2925 rmd->cdb[0] = rmd->is_write ? WRITE_16 : READ_16; 2926 rmd->cdb[1] = 0; 2927 put_unaligned_be64(rmd->disk_block, &rmd->cdb[2]); 2928 put_unaligned_be32(rmd->disk_block_cnt, &rmd->cdb[10]); 2929 rmd->cdb[14] = 0; 2930 rmd->cdb[15] = 0; 2931 rmd->cdb_length = 16; 2932 } else { 2933 rmd->cdb[0] = rmd->is_write ? WRITE_10 : READ_10; 2934 rmd->cdb[1] = 0; 2935 put_unaligned_be32((u32)rmd->disk_block, &rmd->cdb[2]); 2936 rmd->cdb[6] = 0; 2937 put_unaligned_be16((u16)rmd->disk_block_cnt, &rmd->cdb[7]); 2938 rmd->cdb[9] = 0; 2939 rmd->cdb_length = 10; 2940 } 2941 } 2942 2943 static void pqi_calc_aio_r1_nexus(struct raid_map *raid_map, 2944 struct pqi_scsi_dev_raid_map_data *rmd) 2945 { 2946 u32 index; 2947 u32 group; 2948 2949 group = rmd->map_index / rmd->data_disks_per_row; 2950 2951 index = rmd->map_index - (group * rmd->data_disks_per_row); 2952 rmd->it_nexus[0] = raid_map->disk_data[index].aio_handle; 2953 index += rmd->data_disks_per_row; 2954 rmd->it_nexus[1] = raid_map->disk_data[index].aio_handle; 2955 if (rmd->layout_map_count > 2) { 2956 index += rmd->data_disks_per_row; 2957 rmd->it_nexus[2] = raid_map->disk_data[index].aio_handle; 2958 } 2959 2960 rmd->num_it_nexus_entries = rmd->layout_map_count; 2961 } 2962 2963 static int pqi_raid_bypass_submit_scsi_cmd(struct pqi_ctrl_info *ctrl_info, 2964 struct pqi_scsi_dev *device, struct scsi_cmnd *scmd, 2965 struct pqi_queue_group *queue_group) 2966 { 2967 int rc; 2968 struct raid_map *raid_map; 2969 u32 group; 2970 u32 next_bypass_group; 2971 struct pqi_encryption_info *encryption_info_ptr; 2972 struct pqi_encryption_info encryption_info; 2973 struct pqi_scsi_dev_raid_map_data rmd = { 0 }; 2974 2975 rc = pqi_get_aio_lba_and_block_count(scmd, &rmd); 2976 if (rc) 2977 return PQI_RAID_BYPASS_INELIGIBLE; 2978 2979 rmd.raid_level = device->raid_level; 2980 2981 if (!pqi_aio_raid_level_supported(ctrl_info, &rmd)) 2982 return PQI_RAID_BYPASS_INELIGIBLE; 2983 2984 if (unlikely(rmd.block_cnt == 0)) 2985 return PQI_RAID_BYPASS_INELIGIBLE; 2986 2987 raid_map = device->raid_map; 2988 2989 rc = pci_get_aio_common_raid_map_values(ctrl_info, &rmd, raid_map); 2990 if (rc) 2991 return PQI_RAID_BYPASS_INELIGIBLE; 2992 2993 if (device->raid_level == SA_RAID_1 || 2994 device->raid_level == SA_RAID_TRIPLE) { 2995 if (rmd.is_write) { 2996 pqi_calc_aio_r1_nexus(raid_map, &rmd); 2997 } else { 2998 group = device->next_bypass_group[rmd.map_index]; 2999 next_bypass_group = group + 1; 3000 if (next_bypass_group >= rmd.layout_map_count) 3001 next_bypass_group = 0; 3002 device->next_bypass_group[rmd.map_index] = next_bypass_group; 3003 rmd.map_index += group * rmd.data_disks_per_row; 3004 } 3005 } else if ((device->raid_level == SA_RAID_5 || 3006 device->raid_level == SA_RAID_6) && 3007 (rmd.layout_map_count > 1 || rmd.is_write)) { 3008 rc = pqi_calc_aio_r5_or_r6(&rmd, raid_map); 3009 if (rc) 3010 return PQI_RAID_BYPASS_INELIGIBLE; 3011 } 3012 3013 if (unlikely(rmd.map_index >= RAID_MAP_MAX_ENTRIES)) 3014 return PQI_RAID_BYPASS_INELIGIBLE; 3015 3016 rmd.aio_handle = raid_map->disk_data[rmd.map_index].aio_handle; 3017 rmd.disk_block = get_unaligned_le64(&raid_map->disk_starting_blk) + 3018 rmd.first_row * rmd.strip_size + 3019 (rmd.first_row_offset - rmd.first_column * rmd.strip_size); 3020 rmd.disk_block_cnt = rmd.block_cnt; 3021 3022 /* Handle differing logical/physical block sizes. */ 3023 if (raid_map->phys_blk_shift) { 3024 rmd.disk_block <<= raid_map->phys_blk_shift; 3025 rmd.disk_block_cnt <<= raid_map->phys_blk_shift; 3026 } 3027 3028 if (unlikely(rmd.disk_block_cnt > 0xffff)) 3029 return PQI_RAID_BYPASS_INELIGIBLE; 3030 3031 pqi_set_aio_cdb(&rmd); 3032 3033 if (get_unaligned_le16(&raid_map->flags) & RAID_MAP_ENCRYPTION_ENABLED) { 3034 if (rmd.data_length > device->max_transfer_encrypted) 3035 return PQI_RAID_BYPASS_INELIGIBLE; 3036 pqi_set_encryption_info(&encryption_info, raid_map, rmd.first_block); 3037 encryption_info_ptr = &encryption_info; 3038 } else { 3039 encryption_info_ptr = NULL; 3040 } 3041 3042 if (rmd.is_write) { 3043 switch (device->raid_level) { 3044 case SA_RAID_1: 3045 case SA_RAID_TRIPLE: 3046 return pqi_aio_submit_r1_write_io(ctrl_info, scmd, queue_group, 3047 encryption_info_ptr, device, &rmd); 3048 case SA_RAID_5: 3049 case SA_RAID_6: 3050 return pqi_aio_submit_r56_write_io(ctrl_info, scmd, queue_group, 3051 encryption_info_ptr, device, &rmd); 3052 } 3053 } 3054 3055 return pqi_aio_submit_io(ctrl_info, scmd, rmd.aio_handle, 3056 rmd.cdb, rmd.cdb_length, queue_group, 3057 encryption_info_ptr, true, false); 3058 } 3059 3060 #define PQI_STATUS_IDLE 0x0 3061 3062 #define PQI_CREATE_ADMIN_QUEUE_PAIR 1 3063 #define PQI_DELETE_ADMIN_QUEUE_PAIR 2 3064 3065 #define PQI_DEVICE_STATE_POWER_ON_AND_RESET 0x0 3066 #define PQI_DEVICE_STATE_STATUS_AVAILABLE 0x1 3067 #define PQI_DEVICE_STATE_ALL_REGISTERS_READY 0x2 3068 #define PQI_DEVICE_STATE_ADMIN_QUEUE_PAIR_READY 0x3 3069 #define PQI_DEVICE_STATE_ERROR 0x4 3070 3071 #define PQI_MODE_READY_TIMEOUT_SECS 30 3072 #define PQI_MODE_READY_POLL_INTERVAL_MSECS 1 3073 3074 static int pqi_wait_for_pqi_mode_ready(struct pqi_ctrl_info *ctrl_info) 3075 { 3076 struct pqi_device_registers __iomem *pqi_registers; 3077 unsigned long timeout; 3078 u64 signature; 3079 u8 status; 3080 3081 pqi_registers = ctrl_info->pqi_registers; 3082 timeout = (PQI_MODE_READY_TIMEOUT_SECS * HZ) + jiffies; 3083 3084 while (1) { 3085 signature = readq(&pqi_registers->signature); 3086 if (memcmp(&signature, PQI_DEVICE_SIGNATURE, 3087 sizeof(signature)) == 0) 3088 break; 3089 if (time_after(jiffies, timeout)) { 3090 dev_err(&ctrl_info->pci_dev->dev, 3091 "timed out waiting for PQI signature\n"); 3092 return -ETIMEDOUT; 3093 } 3094 msleep(PQI_MODE_READY_POLL_INTERVAL_MSECS); 3095 } 3096 3097 while (1) { 3098 status = readb(&pqi_registers->function_and_status_code); 3099 if (status == PQI_STATUS_IDLE) 3100 break; 3101 if (time_after(jiffies, timeout)) { 3102 dev_err(&ctrl_info->pci_dev->dev, 3103 "timed out waiting for PQI IDLE\n"); 3104 return -ETIMEDOUT; 3105 } 3106 msleep(PQI_MODE_READY_POLL_INTERVAL_MSECS); 3107 } 3108 3109 while (1) { 3110 if (readl(&pqi_registers->device_status) == 3111 PQI_DEVICE_STATE_ALL_REGISTERS_READY) 3112 break; 3113 if (time_after(jiffies, timeout)) { 3114 dev_err(&ctrl_info->pci_dev->dev, 3115 "timed out waiting for PQI all registers ready\n"); 3116 return -ETIMEDOUT; 3117 } 3118 msleep(PQI_MODE_READY_POLL_INTERVAL_MSECS); 3119 } 3120 3121 return 0; 3122 } 3123 3124 static inline void pqi_aio_path_disabled(struct pqi_io_request *io_request) 3125 { 3126 struct pqi_scsi_dev *device; 3127 3128 device = io_request->scmd->device->hostdata; 3129 device->raid_bypass_enabled = false; 3130 device->aio_enabled = false; 3131 } 3132 3133 static inline void pqi_take_device_offline(struct scsi_device *sdev, char *path) 3134 { 3135 struct pqi_ctrl_info *ctrl_info; 3136 struct pqi_scsi_dev *device; 3137 3138 device = sdev->hostdata; 3139 if (device->device_offline) 3140 return; 3141 3142 device->device_offline = true; 3143 ctrl_info = shost_to_hba(sdev->host); 3144 pqi_schedule_rescan_worker(ctrl_info); 3145 dev_err(&ctrl_info->pci_dev->dev, "re-scanning %s scsi %d:%d:%d:%d\n", 3146 path, ctrl_info->scsi_host->host_no, device->bus, 3147 device->target, device->lun); 3148 } 3149 3150 static void pqi_process_raid_io_error(struct pqi_io_request *io_request) 3151 { 3152 u8 scsi_status; 3153 u8 host_byte; 3154 struct scsi_cmnd *scmd; 3155 struct pqi_raid_error_info *error_info; 3156 size_t sense_data_length; 3157 int residual_count; 3158 int xfer_count; 3159 struct scsi_sense_hdr sshdr; 3160 3161 scmd = io_request->scmd; 3162 if (!scmd) 3163 return; 3164 3165 error_info = io_request->error_info; 3166 scsi_status = error_info->status; 3167 host_byte = DID_OK; 3168 3169 switch (error_info->data_out_result) { 3170 case PQI_DATA_IN_OUT_GOOD: 3171 break; 3172 case PQI_DATA_IN_OUT_UNDERFLOW: 3173 xfer_count = 3174 get_unaligned_le32(&error_info->data_out_transferred); 3175 residual_count = scsi_bufflen(scmd) - xfer_count; 3176 scsi_set_resid(scmd, residual_count); 3177 if (xfer_count < scmd->underflow) 3178 host_byte = DID_SOFT_ERROR; 3179 break; 3180 case PQI_DATA_IN_OUT_UNSOLICITED_ABORT: 3181 case PQI_DATA_IN_OUT_ABORTED: 3182 host_byte = DID_ABORT; 3183 break; 3184 case PQI_DATA_IN_OUT_TIMEOUT: 3185 host_byte = DID_TIME_OUT; 3186 break; 3187 case PQI_DATA_IN_OUT_BUFFER_OVERFLOW: 3188 case PQI_DATA_IN_OUT_PROTOCOL_ERROR: 3189 case PQI_DATA_IN_OUT_BUFFER_ERROR: 3190 case PQI_DATA_IN_OUT_BUFFER_OVERFLOW_DESCRIPTOR_AREA: 3191 case PQI_DATA_IN_OUT_BUFFER_OVERFLOW_BRIDGE: 3192 case PQI_DATA_IN_OUT_ERROR: 3193 case PQI_DATA_IN_OUT_HARDWARE_ERROR: 3194 case PQI_DATA_IN_OUT_PCIE_FABRIC_ERROR: 3195 case PQI_DATA_IN_OUT_PCIE_COMPLETION_TIMEOUT: 3196 case PQI_DATA_IN_OUT_PCIE_COMPLETER_ABORT_RECEIVED: 3197 case PQI_DATA_IN_OUT_PCIE_UNSUPPORTED_REQUEST_RECEIVED: 3198 case PQI_DATA_IN_OUT_PCIE_ECRC_CHECK_FAILED: 3199 case PQI_DATA_IN_OUT_PCIE_UNSUPPORTED_REQUEST: 3200 case PQI_DATA_IN_OUT_PCIE_ACS_VIOLATION: 3201 case PQI_DATA_IN_OUT_PCIE_TLP_PREFIX_BLOCKED: 3202 case PQI_DATA_IN_OUT_PCIE_POISONED_MEMORY_READ: 3203 default: 3204 host_byte = DID_ERROR; 3205 break; 3206 } 3207 3208 sense_data_length = get_unaligned_le16(&error_info->sense_data_length); 3209 if (sense_data_length == 0) 3210 sense_data_length = 3211 get_unaligned_le16(&error_info->response_data_length); 3212 if (sense_data_length) { 3213 if (sense_data_length > sizeof(error_info->data)) 3214 sense_data_length = sizeof(error_info->data); 3215 3216 if (scsi_status == SAM_STAT_CHECK_CONDITION && 3217 scsi_normalize_sense(error_info->data, 3218 sense_data_length, &sshdr) && 3219 sshdr.sense_key == HARDWARE_ERROR && 3220 sshdr.asc == 0x3e) { 3221 struct pqi_ctrl_info *ctrl_info = shost_to_hba(scmd->device->host); 3222 struct pqi_scsi_dev *device = scmd->device->hostdata; 3223 3224 switch (sshdr.ascq) { 3225 case 0x1: /* LOGICAL UNIT FAILURE */ 3226 if (printk_ratelimit()) 3227 scmd_printk(KERN_ERR, scmd, "received 'logical unit failure' from controller for scsi %d:%d:%d:%d\n", 3228 ctrl_info->scsi_host->host_no, device->bus, device->target, device->lun); 3229 pqi_take_device_offline(scmd->device, "RAID"); 3230 host_byte = DID_NO_CONNECT; 3231 break; 3232 3233 default: /* See http://www.t10.org/lists/asc-num.htm#ASC_3E */ 3234 if (printk_ratelimit()) 3235 scmd_printk(KERN_ERR, scmd, "received unhandled error %d from controller for scsi %d:%d:%d:%d\n", 3236 sshdr.ascq, ctrl_info->scsi_host->host_no, device->bus, device->target, device->lun); 3237 break; 3238 } 3239 } 3240 3241 if (sense_data_length > SCSI_SENSE_BUFFERSIZE) 3242 sense_data_length = SCSI_SENSE_BUFFERSIZE; 3243 memcpy(scmd->sense_buffer, error_info->data, 3244 sense_data_length); 3245 } 3246 3247 scmd->result = scsi_status; 3248 set_host_byte(scmd, host_byte); 3249 } 3250 3251 static void pqi_process_aio_io_error(struct pqi_io_request *io_request) 3252 { 3253 u8 scsi_status; 3254 u8 host_byte; 3255 struct scsi_cmnd *scmd; 3256 struct pqi_aio_error_info *error_info; 3257 size_t sense_data_length; 3258 int residual_count; 3259 int xfer_count; 3260 bool device_offline; 3261 struct pqi_scsi_dev *device; 3262 3263 scmd = io_request->scmd; 3264 error_info = io_request->error_info; 3265 host_byte = DID_OK; 3266 sense_data_length = 0; 3267 device_offline = false; 3268 device = scmd->device->hostdata; 3269 3270 switch (error_info->service_response) { 3271 case PQI_AIO_SERV_RESPONSE_COMPLETE: 3272 scsi_status = error_info->status; 3273 break; 3274 case PQI_AIO_SERV_RESPONSE_FAILURE: 3275 switch (error_info->status) { 3276 case PQI_AIO_STATUS_IO_ABORTED: 3277 scsi_status = SAM_STAT_TASK_ABORTED; 3278 break; 3279 case PQI_AIO_STATUS_UNDERRUN: 3280 scsi_status = SAM_STAT_GOOD; 3281 residual_count = get_unaligned_le32( 3282 &error_info->residual_count); 3283 scsi_set_resid(scmd, residual_count); 3284 xfer_count = scsi_bufflen(scmd) - residual_count; 3285 if (xfer_count < scmd->underflow) 3286 host_byte = DID_SOFT_ERROR; 3287 break; 3288 case PQI_AIO_STATUS_OVERRUN: 3289 scsi_status = SAM_STAT_GOOD; 3290 break; 3291 case PQI_AIO_STATUS_AIO_PATH_DISABLED: 3292 pqi_aio_path_disabled(io_request); 3293 if (pqi_is_multipath_device(device)) { 3294 pqi_device_remove_start(device); 3295 host_byte = DID_NO_CONNECT; 3296 scsi_status = SAM_STAT_CHECK_CONDITION; 3297 } else { 3298 scsi_status = SAM_STAT_GOOD; 3299 io_request->status = -EAGAIN; 3300 } 3301 break; 3302 case PQI_AIO_STATUS_NO_PATH_TO_DEVICE: 3303 case PQI_AIO_STATUS_INVALID_DEVICE: 3304 if (!io_request->raid_bypass) { 3305 device_offline = true; 3306 pqi_take_device_offline(scmd->device, "AIO"); 3307 host_byte = DID_NO_CONNECT; 3308 } 3309 scsi_status = SAM_STAT_CHECK_CONDITION; 3310 break; 3311 case PQI_AIO_STATUS_IO_ERROR: 3312 default: 3313 scsi_status = SAM_STAT_CHECK_CONDITION; 3314 break; 3315 } 3316 break; 3317 case PQI_AIO_SERV_RESPONSE_TMF_COMPLETE: 3318 case PQI_AIO_SERV_RESPONSE_TMF_SUCCEEDED: 3319 scsi_status = SAM_STAT_GOOD; 3320 break; 3321 case PQI_AIO_SERV_RESPONSE_TMF_REJECTED: 3322 case PQI_AIO_SERV_RESPONSE_TMF_INCORRECT_LUN: 3323 default: 3324 scsi_status = SAM_STAT_CHECK_CONDITION; 3325 break; 3326 } 3327 3328 if (error_info->data_present) { 3329 sense_data_length = 3330 get_unaligned_le16(&error_info->data_length); 3331 if (sense_data_length) { 3332 if (sense_data_length > sizeof(error_info->data)) 3333 sense_data_length = sizeof(error_info->data); 3334 if (sense_data_length > SCSI_SENSE_BUFFERSIZE) 3335 sense_data_length = SCSI_SENSE_BUFFERSIZE; 3336 memcpy(scmd->sense_buffer, error_info->data, 3337 sense_data_length); 3338 } 3339 } 3340 3341 if (device_offline && sense_data_length == 0) 3342 scsi_build_sense(scmd, 0, HARDWARE_ERROR, 0x3e, 0x1); 3343 3344 scmd->result = scsi_status; 3345 set_host_byte(scmd, host_byte); 3346 } 3347 3348 static void pqi_process_io_error(unsigned int iu_type, 3349 struct pqi_io_request *io_request) 3350 { 3351 switch (iu_type) { 3352 case PQI_RESPONSE_IU_RAID_PATH_IO_ERROR: 3353 pqi_process_raid_io_error(io_request); 3354 break; 3355 case PQI_RESPONSE_IU_AIO_PATH_IO_ERROR: 3356 pqi_process_aio_io_error(io_request); 3357 break; 3358 } 3359 } 3360 3361 static int pqi_interpret_task_management_response(struct pqi_ctrl_info *ctrl_info, 3362 struct pqi_task_management_response *response) 3363 { 3364 int rc; 3365 3366 switch (response->response_code) { 3367 case SOP_TMF_COMPLETE: 3368 case SOP_TMF_FUNCTION_SUCCEEDED: 3369 rc = 0; 3370 break; 3371 case SOP_TMF_REJECTED: 3372 rc = -EAGAIN; 3373 break; 3374 case SOP_TMF_INCORRECT_LOGICAL_UNIT: 3375 rc = -ENODEV; 3376 break; 3377 default: 3378 rc = -EIO; 3379 break; 3380 } 3381 3382 if (rc) 3383 dev_err(&ctrl_info->pci_dev->dev, 3384 "Task Management Function error: %d (response code: %u)\n", rc, response->response_code); 3385 3386 return rc; 3387 } 3388 3389 static inline void pqi_invalid_response(struct pqi_ctrl_info *ctrl_info, 3390 enum pqi_ctrl_shutdown_reason ctrl_shutdown_reason) 3391 { 3392 pqi_take_ctrl_offline(ctrl_info, ctrl_shutdown_reason); 3393 } 3394 3395 static int pqi_process_io_intr(struct pqi_ctrl_info *ctrl_info, struct pqi_queue_group *queue_group) 3396 { 3397 int num_responses; 3398 pqi_index_t oq_pi; 3399 pqi_index_t oq_ci; 3400 struct pqi_io_request *io_request; 3401 struct pqi_io_response *response; 3402 u16 request_id; 3403 3404 num_responses = 0; 3405 oq_ci = queue_group->oq_ci_copy; 3406 3407 while (1) { 3408 oq_pi = readl(queue_group->oq_pi); 3409 if (oq_pi >= ctrl_info->num_elements_per_oq) { 3410 pqi_invalid_response(ctrl_info, PQI_IO_PI_OUT_OF_RANGE); 3411 dev_err(&ctrl_info->pci_dev->dev, 3412 "I/O interrupt: producer index (%u) out of range (0-%u): consumer index: %u\n", 3413 oq_pi, ctrl_info->num_elements_per_oq - 1, oq_ci); 3414 return -1; 3415 } 3416 if (oq_pi == oq_ci) 3417 break; 3418 3419 num_responses++; 3420 response = queue_group->oq_element_array + 3421 (oq_ci * PQI_OPERATIONAL_OQ_ELEMENT_LENGTH); 3422 3423 request_id = get_unaligned_le16(&response->request_id); 3424 if (request_id >= ctrl_info->max_io_slots) { 3425 pqi_invalid_response(ctrl_info, PQI_INVALID_REQ_ID); 3426 dev_err(&ctrl_info->pci_dev->dev, 3427 "request ID in response (%u) out of range (0-%u): producer index: %u consumer index: %u\n", 3428 request_id, ctrl_info->max_io_slots - 1, oq_pi, oq_ci); 3429 return -1; 3430 } 3431 3432 io_request = &ctrl_info->io_request_pool[request_id]; 3433 if (atomic_read(&io_request->refcount) == 0) { 3434 pqi_invalid_response(ctrl_info, PQI_UNMATCHED_REQ_ID); 3435 dev_err(&ctrl_info->pci_dev->dev, 3436 "request ID in response (%u) does not match an outstanding I/O request: producer index: %u consumer index: %u\n", 3437 request_id, oq_pi, oq_ci); 3438 return -1; 3439 } 3440 3441 switch (response->header.iu_type) { 3442 case PQI_RESPONSE_IU_RAID_PATH_IO_SUCCESS: 3443 case PQI_RESPONSE_IU_AIO_PATH_IO_SUCCESS: 3444 if (io_request->scmd) 3445 io_request->scmd->result = 0; 3446 fallthrough; 3447 case PQI_RESPONSE_IU_GENERAL_MANAGEMENT: 3448 break; 3449 case PQI_RESPONSE_IU_VENDOR_GENERAL: 3450 io_request->status = 3451 get_unaligned_le16( 3452 &((struct pqi_vendor_general_response *)response)->status); 3453 break; 3454 case PQI_RESPONSE_IU_TASK_MANAGEMENT: 3455 io_request->status = pqi_interpret_task_management_response(ctrl_info, 3456 (void *)response); 3457 break; 3458 case PQI_RESPONSE_IU_AIO_PATH_DISABLED: 3459 pqi_aio_path_disabled(io_request); 3460 io_request->status = -EAGAIN; 3461 break; 3462 case PQI_RESPONSE_IU_RAID_PATH_IO_ERROR: 3463 case PQI_RESPONSE_IU_AIO_PATH_IO_ERROR: 3464 io_request->error_info = ctrl_info->error_buffer + 3465 (get_unaligned_le16(&response->error_index) * 3466 PQI_ERROR_BUFFER_ELEMENT_LENGTH); 3467 pqi_process_io_error(response->header.iu_type, io_request); 3468 break; 3469 default: 3470 pqi_invalid_response(ctrl_info, PQI_UNEXPECTED_IU_TYPE); 3471 dev_err(&ctrl_info->pci_dev->dev, 3472 "unexpected IU type: 0x%x: producer index: %u consumer index: %u\n", 3473 response->header.iu_type, oq_pi, oq_ci); 3474 return -1; 3475 } 3476 3477 io_request->io_complete_callback(io_request, io_request->context); 3478 3479 /* 3480 * Note that the I/O request structure CANNOT BE TOUCHED after 3481 * returning from the I/O completion callback! 3482 */ 3483 oq_ci = (oq_ci + 1) % ctrl_info->num_elements_per_oq; 3484 } 3485 3486 if (num_responses) { 3487 queue_group->oq_ci_copy = oq_ci; 3488 writel(oq_ci, queue_group->oq_ci); 3489 } 3490 3491 return num_responses; 3492 } 3493 3494 static inline unsigned int pqi_num_elements_free(unsigned int pi, 3495 unsigned int ci, unsigned int elements_in_queue) 3496 { 3497 unsigned int num_elements_used; 3498 3499 if (pi >= ci) 3500 num_elements_used = pi - ci; 3501 else 3502 num_elements_used = elements_in_queue - ci + pi; 3503 3504 return elements_in_queue - num_elements_used - 1; 3505 } 3506 3507 static void pqi_send_event_ack(struct pqi_ctrl_info *ctrl_info, 3508 struct pqi_event_acknowledge_request *iu, size_t iu_length) 3509 { 3510 pqi_index_t iq_pi; 3511 pqi_index_t iq_ci; 3512 unsigned long flags; 3513 void *next_element; 3514 struct pqi_queue_group *queue_group; 3515 3516 queue_group = &ctrl_info->queue_groups[PQI_DEFAULT_QUEUE_GROUP]; 3517 put_unaligned_le16(queue_group->oq_id, &iu->header.response_queue_id); 3518 3519 while (1) { 3520 spin_lock_irqsave(&queue_group->submit_lock[RAID_PATH], flags); 3521 3522 iq_pi = queue_group->iq_pi_copy[RAID_PATH]; 3523 iq_ci = readl(queue_group->iq_ci[RAID_PATH]); 3524 3525 if (pqi_num_elements_free(iq_pi, iq_ci, 3526 ctrl_info->num_elements_per_iq)) 3527 break; 3528 3529 spin_unlock_irqrestore( 3530 &queue_group->submit_lock[RAID_PATH], flags); 3531 3532 if (pqi_ctrl_offline(ctrl_info)) 3533 return; 3534 } 3535 3536 next_element = queue_group->iq_element_array[RAID_PATH] + 3537 (iq_pi * PQI_OPERATIONAL_IQ_ELEMENT_LENGTH); 3538 3539 memcpy(next_element, iu, iu_length); 3540 3541 iq_pi = (iq_pi + 1) % ctrl_info->num_elements_per_iq; 3542 queue_group->iq_pi_copy[RAID_PATH] = iq_pi; 3543 3544 /* 3545 * This write notifies the controller that an IU is available to be 3546 * processed. 3547 */ 3548 writel(iq_pi, queue_group->iq_pi[RAID_PATH]); 3549 3550 spin_unlock_irqrestore(&queue_group->submit_lock[RAID_PATH], flags); 3551 } 3552 3553 static void pqi_acknowledge_event(struct pqi_ctrl_info *ctrl_info, 3554 struct pqi_event *event) 3555 { 3556 struct pqi_event_acknowledge_request request; 3557 3558 memset(&request, 0, sizeof(request)); 3559 3560 request.header.iu_type = PQI_REQUEST_IU_ACKNOWLEDGE_VENDOR_EVENT; 3561 put_unaligned_le16(sizeof(request) - PQI_REQUEST_HEADER_LENGTH, 3562 &request.header.iu_length); 3563 request.event_type = event->event_type; 3564 put_unaligned_le16(event->event_id, &request.event_id); 3565 put_unaligned_le32(event->additional_event_id, &request.additional_event_id); 3566 3567 pqi_send_event_ack(ctrl_info, &request, sizeof(request)); 3568 } 3569 3570 #define PQI_SOFT_RESET_STATUS_TIMEOUT_SECS 30 3571 #define PQI_SOFT_RESET_STATUS_POLL_INTERVAL_SECS 1 3572 3573 static enum pqi_soft_reset_status pqi_poll_for_soft_reset_status( 3574 struct pqi_ctrl_info *ctrl_info) 3575 { 3576 u8 status; 3577 unsigned long timeout; 3578 3579 timeout = (PQI_SOFT_RESET_STATUS_TIMEOUT_SECS * HZ) + jiffies; 3580 3581 while (1) { 3582 status = pqi_read_soft_reset_status(ctrl_info); 3583 if (status & PQI_SOFT_RESET_INITIATE) 3584 return RESET_INITIATE_DRIVER; 3585 3586 if (status & PQI_SOFT_RESET_ABORT) 3587 return RESET_ABORT; 3588 3589 if (!sis_is_firmware_running(ctrl_info)) 3590 return RESET_NORESPONSE; 3591 3592 if (time_after(jiffies, timeout)) { 3593 dev_warn(&ctrl_info->pci_dev->dev, 3594 "timed out waiting for soft reset status\n"); 3595 return RESET_TIMEDOUT; 3596 } 3597 3598 ssleep(PQI_SOFT_RESET_STATUS_POLL_INTERVAL_SECS); 3599 } 3600 } 3601 3602 static void pqi_process_soft_reset(struct pqi_ctrl_info *ctrl_info) 3603 { 3604 int rc; 3605 unsigned int delay_secs; 3606 enum pqi_soft_reset_status reset_status; 3607 3608 if (ctrl_info->soft_reset_handshake_supported) 3609 reset_status = pqi_poll_for_soft_reset_status(ctrl_info); 3610 else 3611 reset_status = RESET_INITIATE_FIRMWARE; 3612 3613 delay_secs = PQI_POST_RESET_DELAY_SECS; 3614 3615 switch (reset_status) { 3616 case RESET_TIMEDOUT: 3617 delay_secs = PQI_POST_OFA_RESET_DELAY_UPON_TIMEOUT_SECS; 3618 fallthrough; 3619 case RESET_INITIATE_DRIVER: 3620 dev_info(&ctrl_info->pci_dev->dev, 3621 "Online Firmware Activation: resetting controller\n"); 3622 sis_soft_reset(ctrl_info); 3623 fallthrough; 3624 case RESET_INITIATE_FIRMWARE: 3625 ctrl_info->pqi_mode_enabled = false; 3626 pqi_save_ctrl_mode(ctrl_info, SIS_MODE); 3627 rc = pqi_ofa_ctrl_restart(ctrl_info, delay_secs); 3628 pqi_ofa_free_host_buffer(ctrl_info); 3629 pqi_ctrl_ofa_done(ctrl_info); 3630 dev_info(&ctrl_info->pci_dev->dev, 3631 "Online Firmware Activation: %s\n", 3632 rc == 0 ? "SUCCESS" : "FAILED"); 3633 break; 3634 case RESET_ABORT: 3635 dev_info(&ctrl_info->pci_dev->dev, 3636 "Online Firmware Activation ABORTED\n"); 3637 if (ctrl_info->soft_reset_handshake_supported) 3638 pqi_clear_soft_reset_status(ctrl_info); 3639 pqi_ofa_free_host_buffer(ctrl_info); 3640 pqi_ctrl_ofa_done(ctrl_info); 3641 pqi_ofa_ctrl_unquiesce(ctrl_info); 3642 break; 3643 case RESET_NORESPONSE: 3644 fallthrough; 3645 default: 3646 dev_err(&ctrl_info->pci_dev->dev, 3647 "unexpected Online Firmware Activation reset status: 0x%x\n", 3648 reset_status); 3649 pqi_ofa_free_host_buffer(ctrl_info); 3650 pqi_ctrl_ofa_done(ctrl_info); 3651 pqi_ofa_ctrl_unquiesce(ctrl_info); 3652 pqi_take_ctrl_offline(ctrl_info, PQI_OFA_RESPONSE_TIMEOUT); 3653 break; 3654 } 3655 } 3656 3657 static void pqi_ofa_memory_alloc_worker(struct work_struct *work) 3658 { 3659 struct pqi_ctrl_info *ctrl_info; 3660 3661 ctrl_info = container_of(work, struct pqi_ctrl_info, ofa_memory_alloc_work); 3662 3663 pqi_ctrl_ofa_start(ctrl_info); 3664 pqi_ofa_setup_host_buffer(ctrl_info); 3665 pqi_ofa_host_memory_update(ctrl_info); 3666 } 3667 3668 static void pqi_ofa_quiesce_worker(struct work_struct *work) 3669 { 3670 struct pqi_ctrl_info *ctrl_info; 3671 struct pqi_event *event; 3672 3673 ctrl_info = container_of(work, struct pqi_ctrl_info, ofa_quiesce_work); 3674 3675 event = &ctrl_info->events[pqi_event_type_to_event_index(PQI_EVENT_TYPE_OFA)]; 3676 3677 pqi_ofa_ctrl_quiesce(ctrl_info); 3678 pqi_acknowledge_event(ctrl_info, event); 3679 pqi_process_soft_reset(ctrl_info); 3680 } 3681 3682 static bool pqi_ofa_process_event(struct pqi_ctrl_info *ctrl_info, 3683 struct pqi_event *event) 3684 { 3685 bool ack_event; 3686 3687 ack_event = true; 3688 3689 switch (event->event_id) { 3690 case PQI_EVENT_OFA_MEMORY_ALLOCATION: 3691 dev_info(&ctrl_info->pci_dev->dev, 3692 "received Online Firmware Activation memory allocation request\n"); 3693 schedule_work(&ctrl_info->ofa_memory_alloc_work); 3694 break; 3695 case PQI_EVENT_OFA_QUIESCE: 3696 dev_info(&ctrl_info->pci_dev->dev, 3697 "received Online Firmware Activation quiesce request\n"); 3698 schedule_work(&ctrl_info->ofa_quiesce_work); 3699 ack_event = false; 3700 break; 3701 case PQI_EVENT_OFA_CANCELED: 3702 dev_info(&ctrl_info->pci_dev->dev, 3703 "received Online Firmware Activation cancel request: reason: %u\n", 3704 ctrl_info->ofa_cancel_reason); 3705 pqi_ofa_free_host_buffer(ctrl_info); 3706 pqi_ctrl_ofa_done(ctrl_info); 3707 break; 3708 default: 3709 dev_err(&ctrl_info->pci_dev->dev, 3710 "received unknown Online Firmware Activation request: event ID: %u\n", 3711 event->event_id); 3712 break; 3713 } 3714 3715 return ack_event; 3716 } 3717 3718 static void pqi_mark_volumes_for_rescan(struct pqi_ctrl_info *ctrl_info) 3719 { 3720 unsigned long flags; 3721 struct pqi_scsi_dev *device; 3722 3723 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 3724 3725 list_for_each_entry(device, &ctrl_info->scsi_device_list, scsi_device_list_entry) { 3726 if (pqi_is_logical_device(device) && device->devtype == TYPE_DISK) 3727 device->rescan = true; 3728 } 3729 3730 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 3731 } 3732 3733 static void pqi_disable_raid_bypass(struct pqi_ctrl_info *ctrl_info) 3734 { 3735 unsigned long flags; 3736 struct pqi_scsi_dev *device; 3737 3738 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 3739 3740 list_for_each_entry(device, &ctrl_info->scsi_device_list, scsi_device_list_entry) 3741 if (device->raid_bypass_enabled) 3742 device->raid_bypass_enabled = false; 3743 3744 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 3745 } 3746 3747 static void pqi_event_worker(struct work_struct *work) 3748 { 3749 unsigned int i; 3750 bool rescan_needed; 3751 struct pqi_ctrl_info *ctrl_info; 3752 struct pqi_event *event; 3753 bool ack_event; 3754 3755 ctrl_info = container_of(work, struct pqi_ctrl_info, event_work); 3756 3757 pqi_ctrl_busy(ctrl_info); 3758 pqi_wait_if_ctrl_blocked(ctrl_info); 3759 if (pqi_ctrl_offline(ctrl_info)) 3760 goto out; 3761 3762 rescan_needed = false; 3763 event = ctrl_info->events; 3764 for (i = 0; i < PQI_NUM_SUPPORTED_EVENTS; i++) { 3765 if (event->pending) { 3766 event->pending = false; 3767 if (event->event_type == PQI_EVENT_TYPE_OFA) { 3768 ack_event = pqi_ofa_process_event(ctrl_info, event); 3769 } else { 3770 ack_event = true; 3771 rescan_needed = true; 3772 if (event->event_type == PQI_EVENT_TYPE_LOGICAL_DEVICE) 3773 pqi_mark_volumes_for_rescan(ctrl_info); 3774 else if (event->event_type == PQI_EVENT_TYPE_AIO_STATE_CHANGE) 3775 pqi_disable_raid_bypass(ctrl_info); 3776 } 3777 if (ack_event) 3778 pqi_acknowledge_event(ctrl_info, event); 3779 } 3780 event++; 3781 } 3782 3783 #define PQI_RESCAN_WORK_FOR_EVENT_DELAY (5 * HZ) 3784 3785 if (rescan_needed) 3786 pqi_schedule_rescan_worker_with_delay(ctrl_info, 3787 PQI_RESCAN_WORK_FOR_EVENT_DELAY); 3788 3789 out: 3790 pqi_ctrl_unbusy(ctrl_info); 3791 } 3792 3793 #define PQI_HEARTBEAT_TIMER_INTERVAL (10 * HZ) 3794 3795 static void pqi_heartbeat_timer_handler(struct timer_list *t) 3796 { 3797 int num_interrupts; 3798 u32 heartbeat_count; 3799 struct pqi_ctrl_info *ctrl_info = from_timer(ctrl_info, t, heartbeat_timer); 3800 3801 pqi_check_ctrl_health(ctrl_info); 3802 if (pqi_ctrl_offline(ctrl_info)) 3803 return; 3804 3805 num_interrupts = atomic_read(&ctrl_info->num_interrupts); 3806 heartbeat_count = pqi_read_heartbeat_counter(ctrl_info); 3807 3808 if (num_interrupts == ctrl_info->previous_num_interrupts) { 3809 if (heartbeat_count == ctrl_info->previous_heartbeat_count) { 3810 dev_err(&ctrl_info->pci_dev->dev, 3811 "no heartbeat detected - last heartbeat count: %u\n", 3812 heartbeat_count); 3813 pqi_take_ctrl_offline(ctrl_info, PQI_NO_HEARTBEAT); 3814 return; 3815 } 3816 } else { 3817 ctrl_info->previous_num_interrupts = num_interrupts; 3818 } 3819 3820 ctrl_info->previous_heartbeat_count = heartbeat_count; 3821 mod_timer(&ctrl_info->heartbeat_timer, 3822 jiffies + PQI_HEARTBEAT_TIMER_INTERVAL); 3823 } 3824 3825 static void pqi_start_heartbeat_timer(struct pqi_ctrl_info *ctrl_info) 3826 { 3827 if (!ctrl_info->heartbeat_counter) 3828 return; 3829 3830 ctrl_info->previous_num_interrupts = 3831 atomic_read(&ctrl_info->num_interrupts); 3832 ctrl_info->previous_heartbeat_count = 3833 pqi_read_heartbeat_counter(ctrl_info); 3834 3835 ctrl_info->heartbeat_timer.expires = 3836 jiffies + PQI_HEARTBEAT_TIMER_INTERVAL; 3837 add_timer(&ctrl_info->heartbeat_timer); 3838 } 3839 3840 static inline void pqi_stop_heartbeat_timer(struct pqi_ctrl_info *ctrl_info) 3841 { 3842 del_timer_sync(&ctrl_info->heartbeat_timer); 3843 } 3844 3845 static void pqi_ofa_capture_event_payload(struct pqi_ctrl_info *ctrl_info, 3846 struct pqi_event *event, struct pqi_event_response *response) 3847 { 3848 switch (event->event_id) { 3849 case PQI_EVENT_OFA_MEMORY_ALLOCATION: 3850 ctrl_info->ofa_bytes_requested = 3851 get_unaligned_le32(&response->data.ofa_memory_allocation.bytes_requested); 3852 break; 3853 case PQI_EVENT_OFA_CANCELED: 3854 ctrl_info->ofa_cancel_reason = 3855 get_unaligned_le16(&response->data.ofa_cancelled.reason); 3856 break; 3857 } 3858 } 3859 3860 static int pqi_process_event_intr(struct pqi_ctrl_info *ctrl_info) 3861 { 3862 int num_events; 3863 pqi_index_t oq_pi; 3864 pqi_index_t oq_ci; 3865 struct pqi_event_queue *event_queue; 3866 struct pqi_event_response *response; 3867 struct pqi_event *event; 3868 int event_index; 3869 3870 event_queue = &ctrl_info->event_queue; 3871 num_events = 0; 3872 oq_ci = event_queue->oq_ci_copy; 3873 3874 while (1) { 3875 oq_pi = readl(event_queue->oq_pi); 3876 if (oq_pi >= PQI_NUM_EVENT_QUEUE_ELEMENTS) { 3877 pqi_invalid_response(ctrl_info, PQI_EVENT_PI_OUT_OF_RANGE); 3878 dev_err(&ctrl_info->pci_dev->dev, 3879 "event interrupt: producer index (%u) out of range (0-%u): consumer index: %u\n", 3880 oq_pi, PQI_NUM_EVENT_QUEUE_ELEMENTS - 1, oq_ci); 3881 return -1; 3882 } 3883 3884 if (oq_pi == oq_ci) 3885 break; 3886 3887 num_events++; 3888 response = event_queue->oq_element_array + (oq_ci * PQI_EVENT_OQ_ELEMENT_LENGTH); 3889 3890 event_index = pqi_event_type_to_event_index(response->event_type); 3891 3892 if (event_index >= 0 && response->request_acknowledge) { 3893 event = &ctrl_info->events[event_index]; 3894 event->pending = true; 3895 event->event_type = response->event_type; 3896 event->event_id = get_unaligned_le16(&response->event_id); 3897 event->additional_event_id = 3898 get_unaligned_le32(&response->additional_event_id); 3899 if (event->event_type == PQI_EVENT_TYPE_OFA) 3900 pqi_ofa_capture_event_payload(ctrl_info, event, response); 3901 } 3902 3903 oq_ci = (oq_ci + 1) % PQI_NUM_EVENT_QUEUE_ELEMENTS; 3904 } 3905 3906 if (num_events) { 3907 event_queue->oq_ci_copy = oq_ci; 3908 writel(oq_ci, event_queue->oq_ci); 3909 schedule_work(&ctrl_info->event_work); 3910 } 3911 3912 return num_events; 3913 } 3914 3915 #define PQI_LEGACY_INTX_MASK 0x1 3916 3917 static inline void pqi_configure_legacy_intx(struct pqi_ctrl_info *ctrl_info, bool enable_intx) 3918 { 3919 u32 intx_mask; 3920 struct pqi_device_registers __iomem *pqi_registers; 3921 volatile void __iomem *register_addr; 3922 3923 pqi_registers = ctrl_info->pqi_registers; 3924 3925 if (enable_intx) 3926 register_addr = &pqi_registers->legacy_intx_mask_clear; 3927 else 3928 register_addr = &pqi_registers->legacy_intx_mask_set; 3929 3930 intx_mask = readl(register_addr); 3931 intx_mask |= PQI_LEGACY_INTX_MASK; 3932 writel(intx_mask, register_addr); 3933 } 3934 3935 static void pqi_change_irq_mode(struct pqi_ctrl_info *ctrl_info, 3936 enum pqi_irq_mode new_mode) 3937 { 3938 switch (ctrl_info->irq_mode) { 3939 case IRQ_MODE_MSIX: 3940 switch (new_mode) { 3941 case IRQ_MODE_MSIX: 3942 break; 3943 case IRQ_MODE_INTX: 3944 pqi_configure_legacy_intx(ctrl_info, true); 3945 sis_enable_intx(ctrl_info); 3946 break; 3947 case IRQ_MODE_NONE: 3948 break; 3949 } 3950 break; 3951 case IRQ_MODE_INTX: 3952 switch (new_mode) { 3953 case IRQ_MODE_MSIX: 3954 pqi_configure_legacy_intx(ctrl_info, false); 3955 sis_enable_msix(ctrl_info); 3956 break; 3957 case IRQ_MODE_INTX: 3958 break; 3959 case IRQ_MODE_NONE: 3960 pqi_configure_legacy_intx(ctrl_info, false); 3961 break; 3962 } 3963 break; 3964 case IRQ_MODE_NONE: 3965 switch (new_mode) { 3966 case IRQ_MODE_MSIX: 3967 sis_enable_msix(ctrl_info); 3968 break; 3969 case IRQ_MODE_INTX: 3970 pqi_configure_legacy_intx(ctrl_info, true); 3971 sis_enable_intx(ctrl_info); 3972 break; 3973 case IRQ_MODE_NONE: 3974 break; 3975 } 3976 break; 3977 } 3978 3979 ctrl_info->irq_mode = new_mode; 3980 } 3981 3982 #define PQI_LEGACY_INTX_PENDING 0x1 3983 3984 static inline bool pqi_is_valid_irq(struct pqi_ctrl_info *ctrl_info) 3985 { 3986 bool valid_irq; 3987 u32 intx_status; 3988 3989 switch (ctrl_info->irq_mode) { 3990 case IRQ_MODE_MSIX: 3991 valid_irq = true; 3992 break; 3993 case IRQ_MODE_INTX: 3994 intx_status = readl(&ctrl_info->pqi_registers->legacy_intx_status); 3995 if (intx_status & PQI_LEGACY_INTX_PENDING) 3996 valid_irq = true; 3997 else 3998 valid_irq = false; 3999 break; 4000 case IRQ_MODE_NONE: 4001 default: 4002 valid_irq = false; 4003 break; 4004 } 4005 4006 return valid_irq; 4007 } 4008 4009 static irqreturn_t pqi_irq_handler(int irq, void *data) 4010 { 4011 struct pqi_ctrl_info *ctrl_info; 4012 struct pqi_queue_group *queue_group; 4013 int num_io_responses_handled; 4014 int num_events_handled; 4015 4016 queue_group = data; 4017 ctrl_info = queue_group->ctrl_info; 4018 4019 if (!pqi_is_valid_irq(ctrl_info)) 4020 return IRQ_NONE; 4021 4022 num_io_responses_handled = pqi_process_io_intr(ctrl_info, queue_group); 4023 if (num_io_responses_handled < 0) 4024 goto out; 4025 4026 if (irq == ctrl_info->event_irq) { 4027 num_events_handled = pqi_process_event_intr(ctrl_info); 4028 if (num_events_handled < 0) 4029 goto out; 4030 } else { 4031 num_events_handled = 0; 4032 } 4033 4034 if (num_io_responses_handled + num_events_handled > 0) 4035 atomic_inc(&ctrl_info->num_interrupts); 4036 4037 pqi_start_io(ctrl_info, queue_group, RAID_PATH, NULL); 4038 pqi_start_io(ctrl_info, queue_group, AIO_PATH, NULL); 4039 4040 out: 4041 return IRQ_HANDLED; 4042 } 4043 4044 static int pqi_request_irqs(struct pqi_ctrl_info *ctrl_info) 4045 { 4046 struct pci_dev *pci_dev = ctrl_info->pci_dev; 4047 int i; 4048 int rc; 4049 4050 ctrl_info->event_irq = pci_irq_vector(pci_dev, 0); 4051 4052 for (i = 0; i < ctrl_info->num_msix_vectors_enabled; i++) { 4053 rc = request_irq(pci_irq_vector(pci_dev, i), pqi_irq_handler, 0, 4054 DRIVER_NAME_SHORT, &ctrl_info->queue_groups[i]); 4055 if (rc) { 4056 dev_err(&pci_dev->dev, 4057 "irq %u init failed with error %d\n", 4058 pci_irq_vector(pci_dev, i), rc); 4059 return rc; 4060 } 4061 ctrl_info->num_msix_vectors_initialized++; 4062 } 4063 4064 return 0; 4065 } 4066 4067 static void pqi_free_irqs(struct pqi_ctrl_info *ctrl_info) 4068 { 4069 int i; 4070 4071 for (i = 0; i < ctrl_info->num_msix_vectors_initialized; i++) 4072 free_irq(pci_irq_vector(ctrl_info->pci_dev, i), 4073 &ctrl_info->queue_groups[i]); 4074 4075 ctrl_info->num_msix_vectors_initialized = 0; 4076 } 4077 4078 static int pqi_enable_msix_interrupts(struct pqi_ctrl_info *ctrl_info) 4079 { 4080 int num_vectors_enabled; 4081 unsigned int flags = PCI_IRQ_MSIX; 4082 4083 if (!pqi_disable_managed_interrupts) 4084 flags |= PCI_IRQ_AFFINITY; 4085 4086 num_vectors_enabled = pci_alloc_irq_vectors(ctrl_info->pci_dev, 4087 PQI_MIN_MSIX_VECTORS, ctrl_info->num_queue_groups, 4088 flags); 4089 if (num_vectors_enabled < 0) { 4090 dev_err(&ctrl_info->pci_dev->dev, 4091 "MSI-X init failed with error %d\n", 4092 num_vectors_enabled); 4093 return num_vectors_enabled; 4094 } 4095 4096 ctrl_info->num_msix_vectors_enabled = num_vectors_enabled; 4097 ctrl_info->irq_mode = IRQ_MODE_MSIX; 4098 return 0; 4099 } 4100 4101 static void pqi_disable_msix_interrupts(struct pqi_ctrl_info *ctrl_info) 4102 { 4103 if (ctrl_info->num_msix_vectors_enabled) { 4104 pci_free_irq_vectors(ctrl_info->pci_dev); 4105 ctrl_info->num_msix_vectors_enabled = 0; 4106 } 4107 } 4108 4109 static int pqi_alloc_operational_queues(struct pqi_ctrl_info *ctrl_info) 4110 { 4111 unsigned int i; 4112 size_t alloc_length; 4113 size_t element_array_length_per_iq; 4114 size_t element_array_length_per_oq; 4115 void *element_array; 4116 void __iomem *next_queue_index; 4117 void *aligned_pointer; 4118 unsigned int num_inbound_queues; 4119 unsigned int num_outbound_queues; 4120 unsigned int num_queue_indexes; 4121 struct pqi_queue_group *queue_group; 4122 4123 element_array_length_per_iq = 4124 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH * 4125 ctrl_info->num_elements_per_iq; 4126 element_array_length_per_oq = 4127 PQI_OPERATIONAL_OQ_ELEMENT_LENGTH * 4128 ctrl_info->num_elements_per_oq; 4129 num_inbound_queues = ctrl_info->num_queue_groups * 2; 4130 num_outbound_queues = ctrl_info->num_queue_groups; 4131 num_queue_indexes = (ctrl_info->num_queue_groups * 3) + 1; 4132 4133 aligned_pointer = NULL; 4134 4135 for (i = 0; i < num_inbound_queues; i++) { 4136 aligned_pointer = PTR_ALIGN(aligned_pointer, 4137 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT); 4138 aligned_pointer += element_array_length_per_iq; 4139 } 4140 4141 for (i = 0; i < num_outbound_queues; i++) { 4142 aligned_pointer = PTR_ALIGN(aligned_pointer, 4143 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT); 4144 aligned_pointer += element_array_length_per_oq; 4145 } 4146 4147 aligned_pointer = PTR_ALIGN(aligned_pointer, 4148 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT); 4149 aligned_pointer += PQI_NUM_EVENT_QUEUE_ELEMENTS * 4150 PQI_EVENT_OQ_ELEMENT_LENGTH; 4151 4152 for (i = 0; i < num_queue_indexes; i++) { 4153 aligned_pointer = PTR_ALIGN(aligned_pointer, 4154 PQI_OPERATIONAL_INDEX_ALIGNMENT); 4155 aligned_pointer += sizeof(pqi_index_t); 4156 } 4157 4158 alloc_length = (size_t)aligned_pointer + 4159 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT; 4160 4161 alloc_length += PQI_EXTRA_SGL_MEMORY; 4162 4163 ctrl_info->queue_memory_base = 4164 dma_alloc_coherent(&ctrl_info->pci_dev->dev, alloc_length, 4165 &ctrl_info->queue_memory_base_dma_handle, 4166 GFP_KERNEL); 4167 4168 if (!ctrl_info->queue_memory_base) 4169 return -ENOMEM; 4170 4171 ctrl_info->queue_memory_length = alloc_length; 4172 4173 element_array = PTR_ALIGN(ctrl_info->queue_memory_base, 4174 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT); 4175 4176 for (i = 0; i < ctrl_info->num_queue_groups; i++) { 4177 queue_group = &ctrl_info->queue_groups[i]; 4178 queue_group->iq_element_array[RAID_PATH] = element_array; 4179 queue_group->iq_element_array_bus_addr[RAID_PATH] = 4180 ctrl_info->queue_memory_base_dma_handle + 4181 (element_array - ctrl_info->queue_memory_base); 4182 element_array += element_array_length_per_iq; 4183 element_array = PTR_ALIGN(element_array, 4184 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT); 4185 queue_group->iq_element_array[AIO_PATH] = element_array; 4186 queue_group->iq_element_array_bus_addr[AIO_PATH] = 4187 ctrl_info->queue_memory_base_dma_handle + 4188 (element_array - ctrl_info->queue_memory_base); 4189 element_array += element_array_length_per_iq; 4190 element_array = PTR_ALIGN(element_array, 4191 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT); 4192 } 4193 4194 for (i = 0; i < ctrl_info->num_queue_groups; i++) { 4195 queue_group = &ctrl_info->queue_groups[i]; 4196 queue_group->oq_element_array = element_array; 4197 queue_group->oq_element_array_bus_addr = 4198 ctrl_info->queue_memory_base_dma_handle + 4199 (element_array - ctrl_info->queue_memory_base); 4200 element_array += element_array_length_per_oq; 4201 element_array = PTR_ALIGN(element_array, 4202 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT); 4203 } 4204 4205 ctrl_info->event_queue.oq_element_array = element_array; 4206 ctrl_info->event_queue.oq_element_array_bus_addr = 4207 ctrl_info->queue_memory_base_dma_handle + 4208 (element_array - ctrl_info->queue_memory_base); 4209 element_array += PQI_NUM_EVENT_QUEUE_ELEMENTS * 4210 PQI_EVENT_OQ_ELEMENT_LENGTH; 4211 4212 next_queue_index = (void __iomem *)PTR_ALIGN(element_array, 4213 PQI_OPERATIONAL_INDEX_ALIGNMENT); 4214 4215 for (i = 0; i < ctrl_info->num_queue_groups; i++) { 4216 queue_group = &ctrl_info->queue_groups[i]; 4217 queue_group->iq_ci[RAID_PATH] = next_queue_index; 4218 queue_group->iq_ci_bus_addr[RAID_PATH] = 4219 ctrl_info->queue_memory_base_dma_handle + 4220 (next_queue_index - 4221 (void __iomem *)ctrl_info->queue_memory_base); 4222 next_queue_index += sizeof(pqi_index_t); 4223 next_queue_index = PTR_ALIGN(next_queue_index, 4224 PQI_OPERATIONAL_INDEX_ALIGNMENT); 4225 queue_group->iq_ci[AIO_PATH] = next_queue_index; 4226 queue_group->iq_ci_bus_addr[AIO_PATH] = 4227 ctrl_info->queue_memory_base_dma_handle + 4228 (next_queue_index - 4229 (void __iomem *)ctrl_info->queue_memory_base); 4230 next_queue_index += sizeof(pqi_index_t); 4231 next_queue_index = PTR_ALIGN(next_queue_index, 4232 PQI_OPERATIONAL_INDEX_ALIGNMENT); 4233 queue_group->oq_pi = next_queue_index; 4234 queue_group->oq_pi_bus_addr = 4235 ctrl_info->queue_memory_base_dma_handle + 4236 (next_queue_index - 4237 (void __iomem *)ctrl_info->queue_memory_base); 4238 next_queue_index += sizeof(pqi_index_t); 4239 next_queue_index = PTR_ALIGN(next_queue_index, 4240 PQI_OPERATIONAL_INDEX_ALIGNMENT); 4241 } 4242 4243 ctrl_info->event_queue.oq_pi = next_queue_index; 4244 ctrl_info->event_queue.oq_pi_bus_addr = 4245 ctrl_info->queue_memory_base_dma_handle + 4246 (next_queue_index - 4247 (void __iomem *)ctrl_info->queue_memory_base); 4248 4249 return 0; 4250 } 4251 4252 static void pqi_init_operational_queues(struct pqi_ctrl_info *ctrl_info) 4253 { 4254 unsigned int i; 4255 u16 next_iq_id = PQI_MIN_OPERATIONAL_QUEUE_ID; 4256 u16 next_oq_id = PQI_MIN_OPERATIONAL_QUEUE_ID; 4257 4258 /* 4259 * Initialize the backpointers to the controller structure in 4260 * each operational queue group structure. 4261 */ 4262 for (i = 0; i < ctrl_info->num_queue_groups; i++) 4263 ctrl_info->queue_groups[i].ctrl_info = ctrl_info; 4264 4265 /* 4266 * Assign IDs to all operational queues. Note that the IDs 4267 * assigned to operational IQs are independent of the IDs 4268 * assigned to operational OQs. 4269 */ 4270 ctrl_info->event_queue.oq_id = next_oq_id++; 4271 for (i = 0; i < ctrl_info->num_queue_groups; i++) { 4272 ctrl_info->queue_groups[i].iq_id[RAID_PATH] = next_iq_id++; 4273 ctrl_info->queue_groups[i].iq_id[AIO_PATH] = next_iq_id++; 4274 ctrl_info->queue_groups[i].oq_id = next_oq_id++; 4275 } 4276 4277 /* 4278 * Assign MSI-X table entry indexes to all queues. Note that the 4279 * interrupt for the event queue is shared with the first queue group. 4280 */ 4281 ctrl_info->event_queue.int_msg_num = 0; 4282 for (i = 0; i < ctrl_info->num_queue_groups; i++) 4283 ctrl_info->queue_groups[i].int_msg_num = i; 4284 4285 for (i = 0; i < ctrl_info->num_queue_groups; i++) { 4286 spin_lock_init(&ctrl_info->queue_groups[i].submit_lock[0]); 4287 spin_lock_init(&ctrl_info->queue_groups[i].submit_lock[1]); 4288 INIT_LIST_HEAD(&ctrl_info->queue_groups[i].request_list[0]); 4289 INIT_LIST_HEAD(&ctrl_info->queue_groups[i].request_list[1]); 4290 } 4291 } 4292 4293 static int pqi_alloc_admin_queues(struct pqi_ctrl_info *ctrl_info) 4294 { 4295 size_t alloc_length; 4296 struct pqi_admin_queues_aligned *admin_queues_aligned; 4297 struct pqi_admin_queues *admin_queues; 4298 4299 alloc_length = sizeof(struct pqi_admin_queues_aligned) + 4300 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT; 4301 4302 ctrl_info->admin_queue_memory_base = 4303 dma_alloc_coherent(&ctrl_info->pci_dev->dev, alloc_length, 4304 &ctrl_info->admin_queue_memory_base_dma_handle, 4305 GFP_KERNEL); 4306 4307 if (!ctrl_info->admin_queue_memory_base) 4308 return -ENOMEM; 4309 4310 ctrl_info->admin_queue_memory_length = alloc_length; 4311 4312 admin_queues = &ctrl_info->admin_queues; 4313 admin_queues_aligned = PTR_ALIGN(ctrl_info->admin_queue_memory_base, 4314 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT); 4315 admin_queues->iq_element_array = 4316 &admin_queues_aligned->iq_element_array; 4317 admin_queues->oq_element_array = 4318 &admin_queues_aligned->oq_element_array; 4319 admin_queues->iq_ci = 4320 (pqi_index_t __iomem *)&admin_queues_aligned->iq_ci; 4321 admin_queues->oq_pi = 4322 (pqi_index_t __iomem *)&admin_queues_aligned->oq_pi; 4323 4324 admin_queues->iq_element_array_bus_addr = 4325 ctrl_info->admin_queue_memory_base_dma_handle + 4326 (admin_queues->iq_element_array - 4327 ctrl_info->admin_queue_memory_base); 4328 admin_queues->oq_element_array_bus_addr = 4329 ctrl_info->admin_queue_memory_base_dma_handle + 4330 (admin_queues->oq_element_array - 4331 ctrl_info->admin_queue_memory_base); 4332 admin_queues->iq_ci_bus_addr = 4333 ctrl_info->admin_queue_memory_base_dma_handle + 4334 ((void __iomem *)admin_queues->iq_ci - 4335 (void __iomem *)ctrl_info->admin_queue_memory_base); 4336 admin_queues->oq_pi_bus_addr = 4337 ctrl_info->admin_queue_memory_base_dma_handle + 4338 ((void __iomem *)admin_queues->oq_pi - 4339 (void __iomem *)ctrl_info->admin_queue_memory_base); 4340 4341 return 0; 4342 } 4343 4344 #define PQI_ADMIN_QUEUE_CREATE_TIMEOUT_JIFFIES HZ 4345 #define PQI_ADMIN_QUEUE_CREATE_POLL_INTERVAL_MSECS 1 4346 4347 static int pqi_create_admin_queues(struct pqi_ctrl_info *ctrl_info) 4348 { 4349 struct pqi_device_registers __iomem *pqi_registers; 4350 struct pqi_admin_queues *admin_queues; 4351 unsigned long timeout; 4352 u8 status; 4353 u32 reg; 4354 4355 pqi_registers = ctrl_info->pqi_registers; 4356 admin_queues = &ctrl_info->admin_queues; 4357 4358 writeq((u64)admin_queues->iq_element_array_bus_addr, 4359 &pqi_registers->admin_iq_element_array_addr); 4360 writeq((u64)admin_queues->oq_element_array_bus_addr, 4361 &pqi_registers->admin_oq_element_array_addr); 4362 writeq((u64)admin_queues->iq_ci_bus_addr, 4363 &pqi_registers->admin_iq_ci_addr); 4364 writeq((u64)admin_queues->oq_pi_bus_addr, 4365 &pqi_registers->admin_oq_pi_addr); 4366 4367 reg = PQI_ADMIN_IQ_NUM_ELEMENTS | 4368 (PQI_ADMIN_OQ_NUM_ELEMENTS << 8) | 4369 (admin_queues->int_msg_num << 16); 4370 writel(reg, &pqi_registers->admin_iq_num_elements); 4371 4372 writel(PQI_CREATE_ADMIN_QUEUE_PAIR, 4373 &pqi_registers->function_and_status_code); 4374 4375 timeout = PQI_ADMIN_QUEUE_CREATE_TIMEOUT_JIFFIES + jiffies; 4376 while (1) { 4377 msleep(PQI_ADMIN_QUEUE_CREATE_POLL_INTERVAL_MSECS); 4378 status = readb(&pqi_registers->function_and_status_code); 4379 if (status == PQI_STATUS_IDLE) 4380 break; 4381 if (time_after(jiffies, timeout)) 4382 return -ETIMEDOUT; 4383 } 4384 4385 /* 4386 * The offset registers are not initialized to the correct 4387 * offsets until *after* the create admin queue pair command 4388 * completes successfully. 4389 */ 4390 admin_queues->iq_pi = ctrl_info->iomem_base + 4391 PQI_DEVICE_REGISTERS_OFFSET + 4392 readq(&pqi_registers->admin_iq_pi_offset); 4393 admin_queues->oq_ci = ctrl_info->iomem_base + 4394 PQI_DEVICE_REGISTERS_OFFSET + 4395 readq(&pqi_registers->admin_oq_ci_offset); 4396 4397 return 0; 4398 } 4399 4400 static void pqi_submit_admin_request(struct pqi_ctrl_info *ctrl_info, 4401 struct pqi_general_admin_request *request) 4402 { 4403 struct pqi_admin_queues *admin_queues; 4404 void *next_element; 4405 pqi_index_t iq_pi; 4406 4407 admin_queues = &ctrl_info->admin_queues; 4408 iq_pi = admin_queues->iq_pi_copy; 4409 4410 next_element = admin_queues->iq_element_array + 4411 (iq_pi * PQI_ADMIN_IQ_ELEMENT_LENGTH); 4412 4413 memcpy(next_element, request, sizeof(*request)); 4414 4415 iq_pi = (iq_pi + 1) % PQI_ADMIN_IQ_NUM_ELEMENTS; 4416 admin_queues->iq_pi_copy = iq_pi; 4417 4418 /* 4419 * This write notifies the controller that an IU is available to be 4420 * processed. 4421 */ 4422 writel(iq_pi, admin_queues->iq_pi); 4423 } 4424 4425 #define PQI_ADMIN_REQUEST_TIMEOUT_SECS 60 4426 4427 static int pqi_poll_for_admin_response(struct pqi_ctrl_info *ctrl_info, 4428 struct pqi_general_admin_response *response) 4429 { 4430 struct pqi_admin_queues *admin_queues; 4431 pqi_index_t oq_pi; 4432 pqi_index_t oq_ci; 4433 unsigned long timeout; 4434 4435 admin_queues = &ctrl_info->admin_queues; 4436 oq_ci = admin_queues->oq_ci_copy; 4437 4438 timeout = (PQI_ADMIN_REQUEST_TIMEOUT_SECS * HZ) + jiffies; 4439 4440 while (1) { 4441 oq_pi = readl(admin_queues->oq_pi); 4442 if (oq_pi != oq_ci) 4443 break; 4444 if (time_after(jiffies, timeout)) { 4445 dev_err(&ctrl_info->pci_dev->dev, 4446 "timed out waiting for admin response\n"); 4447 return -ETIMEDOUT; 4448 } 4449 if (!sis_is_firmware_running(ctrl_info)) 4450 return -ENXIO; 4451 usleep_range(1000, 2000); 4452 } 4453 4454 memcpy(response, admin_queues->oq_element_array + 4455 (oq_ci * PQI_ADMIN_OQ_ELEMENT_LENGTH), sizeof(*response)); 4456 4457 oq_ci = (oq_ci + 1) % PQI_ADMIN_OQ_NUM_ELEMENTS; 4458 admin_queues->oq_ci_copy = oq_ci; 4459 writel(oq_ci, admin_queues->oq_ci); 4460 4461 return 0; 4462 } 4463 4464 static void pqi_start_io(struct pqi_ctrl_info *ctrl_info, 4465 struct pqi_queue_group *queue_group, enum pqi_io_path path, 4466 struct pqi_io_request *io_request) 4467 { 4468 struct pqi_io_request *next; 4469 void *next_element; 4470 pqi_index_t iq_pi; 4471 pqi_index_t iq_ci; 4472 size_t iu_length; 4473 unsigned long flags; 4474 unsigned int num_elements_needed; 4475 unsigned int num_elements_to_end_of_queue; 4476 size_t copy_count; 4477 struct pqi_iu_header *request; 4478 4479 spin_lock_irqsave(&queue_group->submit_lock[path], flags); 4480 4481 if (io_request) { 4482 io_request->queue_group = queue_group; 4483 list_add_tail(&io_request->request_list_entry, 4484 &queue_group->request_list[path]); 4485 } 4486 4487 iq_pi = queue_group->iq_pi_copy[path]; 4488 4489 list_for_each_entry_safe(io_request, next, 4490 &queue_group->request_list[path], request_list_entry) { 4491 4492 request = io_request->iu; 4493 4494 iu_length = get_unaligned_le16(&request->iu_length) + 4495 PQI_REQUEST_HEADER_LENGTH; 4496 num_elements_needed = 4497 DIV_ROUND_UP(iu_length, 4498 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH); 4499 4500 iq_ci = readl(queue_group->iq_ci[path]); 4501 4502 if (num_elements_needed > pqi_num_elements_free(iq_pi, iq_ci, 4503 ctrl_info->num_elements_per_iq)) 4504 break; 4505 4506 put_unaligned_le16(queue_group->oq_id, 4507 &request->response_queue_id); 4508 4509 next_element = queue_group->iq_element_array[path] + 4510 (iq_pi * PQI_OPERATIONAL_IQ_ELEMENT_LENGTH); 4511 4512 num_elements_to_end_of_queue = 4513 ctrl_info->num_elements_per_iq - iq_pi; 4514 4515 if (num_elements_needed <= num_elements_to_end_of_queue) { 4516 memcpy(next_element, request, iu_length); 4517 } else { 4518 copy_count = num_elements_to_end_of_queue * 4519 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH; 4520 memcpy(next_element, request, copy_count); 4521 memcpy(queue_group->iq_element_array[path], 4522 (u8 *)request + copy_count, 4523 iu_length - copy_count); 4524 } 4525 4526 iq_pi = (iq_pi + num_elements_needed) % 4527 ctrl_info->num_elements_per_iq; 4528 4529 list_del(&io_request->request_list_entry); 4530 } 4531 4532 if (iq_pi != queue_group->iq_pi_copy[path]) { 4533 queue_group->iq_pi_copy[path] = iq_pi; 4534 /* 4535 * This write notifies the controller that one or more IUs are 4536 * available to be processed. 4537 */ 4538 writel(iq_pi, queue_group->iq_pi[path]); 4539 } 4540 4541 spin_unlock_irqrestore(&queue_group->submit_lock[path], flags); 4542 } 4543 4544 #define PQI_WAIT_FOR_COMPLETION_IO_TIMEOUT_SECS 10 4545 4546 static int pqi_wait_for_completion_io(struct pqi_ctrl_info *ctrl_info, 4547 struct completion *wait) 4548 { 4549 int rc; 4550 4551 while (1) { 4552 if (wait_for_completion_io_timeout(wait, 4553 PQI_WAIT_FOR_COMPLETION_IO_TIMEOUT_SECS * HZ)) { 4554 rc = 0; 4555 break; 4556 } 4557 4558 pqi_check_ctrl_health(ctrl_info); 4559 if (pqi_ctrl_offline(ctrl_info)) { 4560 rc = -ENXIO; 4561 break; 4562 } 4563 } 4564 4565 return rc; 4566 } 4567 4568 static void pqi_raid_synchronous_complete(struct pqi_io_request *io_request, 4569 void *context) 4570 { 4571 struct completion *waiting = context; 4572 4573 complete(waiting); 4574 } 4575 4576 static int pqi_process_raid_io_error_synchronous( 4577 struct pqi_raid_error_info *error_info) 4578 { 4579 int rc = -EIO; 4580 4581 switch (error_info->data_out_result) { 4582 case PQI_DATA_IN_OUT_GOOD: 4583 if (error_info->status == SAM_STAT_GOOD) 4584 rc = 0; 4585 break; 4586 case PQI_DATA_IN_OUT_UNDERFLOW: 4587 if (error_info->status == SAM_STAT_GOOD || 4588 error_info->status == SAM_STAT_CHECK_CONDITION) 4589 rc = 0; 4590 break; 4591 case PQI_DATA_IN_OUT_ABORTED: 4592 rc = PQI_CMD_STATUS_ABORTED; 4593 break; 4594 } 4595 4596 return rc; 4597 } 4598 4599 static inline bool pqi_is_blockable_request(struct pqi_iu_header *request) 4600 { 4601 return (request->driver_flags & PQI_DRIVER_NONBLOCKABLE_REQUEST) == 0; 4602 } 4603 4604 static int pqi_submit_raid_request_synchronous(struct pqi_ctrl_info *ctrl_info, 4605 struct pqi_iu_header *request, unsigned int flags, 4606 struct pqi_raid_error_info *error_info) 4607 { 4608 int rc = 0; 4609 struct pqi_io_request *io_request; 4610 size_t iu_length; 4611 DECLARE_COMPLETION_ONSTACK(wait); 4612 4613 if (flags & PQI_SYNC_FLAGS_INTERRUPTABLE) { 4614 if (down_interruptible(&ctrl_info->sync_request_sem)) 4615 return -ERESTARTSYS; 4616 } else { 4617 down(&ctrl_info->sync_request_sem); 4618 } 4619 4620 pqi_ctrl_busy(ctrl_info); 4621 /* 4622 * Wait for other admin queue updates such as; 4623 * config table changes, OFA memory updates, ... 4624 */ 4625 if (pqi_is_blockable_request(request)) 4626 pqi_wait_if_ctrl_blocked(ctrl_info); 4627 4628 if (pqi_ctrl_offline(ctrl_info)) { 4629 rc = -ENXIO; 4630 goto out; 4631 } 4632 4633 io_request = pqi_alloc_io_request(ctrl_info, NULL); 4634 4635 put_unaligned_le16(io_request->index, 4636 &(((struct pqi_raid_path_request *)request)->request_id)); 4637 4638 if (request->iu_type == PQI_REQUEST_IU_RAID_PATH_IO) 4639 ((struct pqi_raid_path_request *)request)->error_index = 4640 ((struct pqi_raid_path_request *)request)->request_id; 4641 4642 iu_length = get_unaligned_le16(&request->iu_length) + 4643 PQI_REQUEST_HEADER_LENGTH; 4644 memcpy(io_request->iu, request, iu_length); 4645 4646 io_request->io_complete_callback = pqi_raid_synchronous_complete; 4647 io_request->context = &wait; 4648 4649 pqi_start_io(ctrl_info, &ctrl_info->queue_groups[PQI_DEFAULT_QUEUE_GROUP], RAID_PATH, 4650 io_request); 4651 4652 pqi_wait_for_completion_io(ctrl_info, &wait); 4653 4654 if (error_info) { 4655 if (io_request->error_info) 4656 memcpy(error_info, io_request->error_info, sizeof(*error_info)); 4657 else 4658 memset(error_info, 0, sizeof(*error_info)); 4659 } else if (rc == 0 && io_request->error_info) { 4660 rc = pqi_process_raid_io_error_synchronous(io_request->error_info); 4661 } 4662 4663 pqi_free_io_request(io_request); 4664 4665 out: 4666 pqi_ctrl_unbusy(ctrl_info); 4667 up(&ctrl_info->sync_request_sem); 4668 4669 return rc; 4670 } 4671 4672 static int pqi_validate_admin_response( 4673 struct pqi_general_admin_response *response, u8 expected_function_code) 4674 { 4675 if (response->header.iu_type != PQI_RESPONSE_IU_GENERAL_ADMIN) 4676 return -EINVAL; 4677 4678 if (get_unaligned_le16(&response->header.iu_length) != 4679 PQI_GENERAL_ADMIN_IU_LENGTH) 4680 return -EINVAL; 4681 4682 if (response->function_code != expected_function_code) 4683 return -EINVAL; 4684 4685 if (response->status != PQI_GENERAL_ADMIN_STATUS_SUCCESS) 4686 return -EINVAL; 4687 4688 return 0; 4689 } 4690 4691 static int pqi_submit_admin_request_synchronous( 4692 struct pqi_ctrl_info *ctrl_info, 4693 struct pqi_general_admin_request *request, 4694 struct pqi_general_admin_response *response) 4695 { 4696 int rc; 4697 4698 pqi_submit_admin_request(ctrl_info, request); 4699 4700 rc = pqi_poll_for_admin_response(ctrl_info, response); 4701 4702 if (rc == 0) 4703 rc = pqi_validate_admin_response(response, request->function_code); 4704 4705 return rc; 4706 } 4707 4708 static int pqi_report_device_capability(struct pqi_ctrl_info *ctrl_info) 4709 { 4710 int rc; 4711 struct pqi_general_admin_request request; 4712 struct pqi_general_admin_response response; 4713 struct pqi_device_capability *capability; 4714 struct pqi_iu_layer_descriptor *sop_iu_layer_descriptor; 4715 4716 capability = kmalloc(sizeof(*capability), GFP_KERNEL); 4717 if (!capability) 4718 return -ENOMEM; 4719 4720 memset(&request, 0, sizeof(request)); 4721 4722 request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN; 4723 put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH, 4724 &request.header.iu_length); 4725 request.function_code = 4726 PQI_GENERAL_ADMIN_FUNCTION_REPORT_DEVICE_CAPABILITY; 4727 put_unaligned_le32(sizeof(*capability), 4728 &request.data.report_device_capability.buffer_length); 4729 4730 rc = pqi_map_single(ctrl_info->pci_dev, 4731 &request.data.report_device_capability.sg_descriptor, 4732 capability, sizeof(*capability), 4733 DMA_FROM_DEVICE); 4734 if (rc) 4735 goto out; 4736 4737 rc = pqi_submit_admin_request_synchronous(ctrl_info, &request, &response); 4738 4739 pqi_pci_unmap(ctrl_info->pci_dev, 4740 &request.data.report_device_capability.sg_descriptor, 1, 4741 DMA_FROM_DEVICE); 4742 4743 if (rc) 4744 goto out; 4745 4746 if (response.status != PQI_GENERAL_ADMIN_STATUS_SUCCESS) { 4747 rc = -EIO; 4748 goto out; 4749 } 4750 4751 ctrl_info->max_inbound_queues = 4752 get_unaligned_le16(&capability->max_inbound_queues); 4753 ctrl_info->max_elements_per_iq = 4754 get_unaligned_le16(&capability->max_elements_per_iq); 4755 ctrl_info->max_iq_element_length = 4756 get_unaligned_le16(&capability->max_iq_element_length) 4757 * 16; 4758 ctrl_info->max_outbound_queues = 4759 get_unaligned_le16(&capability->max_outbound_queues); 4760 ctrl_info->max_elements_per_oq = 4761 get_unaligned_le16(&capability->max_elements_per_oq); 4762 ctrl_info->max_oq_element_length = 4763 get_unaligned_le16(&capability->max_oq_element_length) 4764 * 16; 4765 4766 sop_iu_layer_descriptor = 4767 &capability->iu_layer_descriptors[PQI_PROTOCOL_SOP]; 4768 4769 ctrl_info->max_inbound_iu_length_per_firmware = 4770 get_unaligned_le16( 4771 &sop_iu_layer_descriptor->max_inbound_iu_length); 4772 ctrl_info->inbound_spanning_supported = 4773 sop_iu_layer_descriptor->inbound_spanning_supported; 4774 ctrl_info->outbound_spanning_supported = 4775 sop_iu_layer_descriptor->outbound_spanning_supported; 4776 4777 out: 4778 kfree(capability); 4779 4780 return rc; 4781 } 4782 4783 static int pqi_validate_device_capability(struct pqi_ctrl_info *ctrl_info) 4784 { 4785 if (ctrl_info->max_iq_element_length < 4786 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH) { 4787 dev_err(&ctrl_info->pci_dev->dev, 4788 "max. inbound queue element length of %d is less than the required length of %d\n", 4789 ctrl_info->max_iq_element_length, 4790 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH); 4791 return -EINVAL; 4792 } 4793 4794 if (ctrl_info->max_oq_element_length < 4795 PQI_OPERATIONAL_OQ_ELEMENT_LENGTH) { 4796 dev_err(&ctrl_info->pci_dev->dev, 4797 "max. outbound queue element length of %d is less than the required length of %d\n", 4798 ctrl_info->max_oq_element_length, 4799 PQI_OPERATIONAL_OQ_ELEMENT_LENGTH); 4800 return -EINVAL; 4801 } 4802 4803 if (ctrl_info->max_inbound_iu_length_per_firmware < 4804 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH) { 4805 dev_err(&ctrl_info->pci_dev->dev, 4806 "max. inbound IU length of %u is less than the min. required length of %d\n", 4807 ctrl_info->max_inbound_iu_length_per_firmware, 4808 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH); 4809 return -EINVAL; 4810 } 4811 4812 if (!ctrl_info->inbound_spanning_supported) { 4813 dev_err(&ctrl_info->pci_dev->dev, 4814 "the controller does not support inbound spanning\n"); 4815 return -EINVAL; 4816 } 4817 4818 if (ctrl_info->outbound_spanning_supported) { 4819 dev_err(&ctrl_info->pci_dev->dev, 4820 "the controller supports outbound spanning but this driver does not\n"); 4821 return -EINVAL; 4822 } 4823 4824 return 0; 4825 } 4826 4827 static int pqi_create_event_queue(struct pqi_ctrl_info *ctrl_info) 4828 { 4829 int rc; 4830 struct pqi_event_queue *event_queue; 4831 struct pqi_general_admin_request request; 4832 struct pqi_general_admin_response response; 4833 4834 event_queue = &ctrl_info->event_queue; 4835 4836 /* 4837 * Create OQ (Outbound Queue - device to host queue) to dedicate 4838 * to events. 4839 */ 4840 memset(&request, 0, sizeof(request)); 4841 request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN; 4842 put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH, 4843 &request.header.iu_length); 4844 request.function_code = PQI_GENERAL_ADMIN_FUNCTION_CREATE_OQ; 4845 put_unaligned_le16(event_queue->oq_id, 4846 &request.data.create_operational_oq.queue_id); 4847 put_unaligned_le64((u64)event_queue->oq_element_array_bus_addr, 4848 &request.data.create_operational_oq.element_array_addr); 4849 put_unaligned_le64((u64)event_queue->oq_pi_bus_addr, 4850 &request.data.create_operational_oq.pi_addr); 4851 put_unaligned_le16(PQI_NUM_EVENT_QUEUE_ELEMENTS, 4852 &request.data.create_operational_oq.num_elements); 4853 put_unaligned_le16(PQI_EVENT_OQ_ELEMENT_LENGTH / 16, 4854 &request.data.create_operational_oq.element_length); 4855 request.data.create_operational_oq.queue_protocol = PQI_PROTOCOL_SOP; 4856 put_unaligned_le16(event_queue->int_msg_num, 4857 &request.data.create_operational_oq.int_msg_num); 4858 4859 rc = pqi_submit_admin_request_synchronous(ctrl_info, &request, 4860 &response); 4861 if (rc) 4862 return rc; 4863 4864 event_queue->oq_ci = ctrl_info->iomem_base + 4865 PQI_DEVICE_REGISTERS_OFFSET + 4866 get_unaligned_le64( 4867 &response.data.create_operational_oq.oq_ci_offset); 4868 4869 return 0; 4870 } 4871 4872 static int pqi_create_queue_group(struct pqi_ctrl_info *ctrl_info, 4873 unsigned int group_number) 4874 { 4875 int rc; 4876 struct pqi_queue_group *queue_group; 4877 struct pqi_general_admin_request request; 4878 struct pqi_general_admin_response response; 4879 4880 queue_group = &ctrl_info->queue_groups[group_number]; 4881 4882 /* 4883 * Create IQ (Inbound Queue - host to device queue) for 4884 * RAID path. 4885 */ 4886 memset(&request, 0, sizeof(request)); 4887 request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN; 4888 put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH, 4889 &request.header.iu_length); 4890 request.function_code = PQI_GENERAL_ADMIN_FUNCTION_CREATE_IQ; 4891 put_unaligned_le16(queue_group->iq_id[RAID_PATH], 4892 &request.data.create_operational_iq.queue_id); 4893 put_unaligned_le64( 4894 (u64)queue_group->iq_element_array_bus_addr[RAID_PATH], 4895 &request.data.create_operational_iq.element_array_addr); 4896 put_unaligned_le64((u64)queue_group->iq_ci_bus_addr[RAID_PATH], 4897 &request.data.create_operational_iq.ci_addr); 4898 put_unaligned_le16(ctrl_info->num_elements_per_iq, 4899 &request.data.create_operational_iq.num_elements); 4900 put_unaligned_le16(PQI_OPERATIONAL_IQ_ELEMENT_LENGTH / 16, 4901 &request.data.create_operational_iq.element_length); 4902 request.data.create_operational_iq.queue_protocol = PQI_PROTOCOL_SOP; 4903 4904 rc = pqi_submit_admin_request_synchronous(ctrl_info, &request, 4905 &response); 4906 if (rc) { 4907 dev_err(&ctrl_info->pci_dev->dev, 4908 "error creating inbound RAID queue\n"); 4909 return rc; 4910 } 4911 4912 queue_group->iq_pi[RAID_PATH] = ctrl_info->iomem_base + 4913 PQI_DEVICE_REGISTERS_OFFSET + 4914 get_unaligned_le64( 4915 &response.data.create_operational_iq.iq_pi_offset); 4916 4917 /* 4918 * Create IQ (Inbound Queue - host to device queue) for 4919 * Advanced I/O (AIO) path. 4920 */ 4921 memset(&request, 0, sizeof(request)); 4922 request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN; 4923 put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH, 4924 &request.header.iu_length); 4925 request.function_code = PQI_GENERAL_ADMIN_FUNCTION_CREATE_IQ; 4926 put_unaligned_le16(queue_group->iq_id[AIO_PATH], 4927 &request.data.create_operational_iq.queue_id); 4928 put_unaligned_le64((u64)queue_group-> 4929 iq_element_array_bus_addr[AIO_PATH], 4930 &request.data.create_operational_iq.element_array_addr); 4931 put_unaligned_le64((u64)queue_group->iq_ci_bus_addr[AIO_PATH], 4932 &request.data.create_operational_iq.ci_addr); 4933 put_unaligned_le16(ctrl_info->num_elements_per_iq, 4934 &request.data.create_operational_iq.num_elements); 4935 put_unaligned_le16(PQI_OPERATIONAL_IQ_ELEMENT_LENGTH / 16, 4936 &request.data.create_operational_iq.element_length); 4937 request.data.create_operational_iq.queue_protocol = PQI_PROTOCOL_SOP; 4938 4939 rc = pqi_submit_admin_request_synchronous(ctrl_info, &request, 4940 &response); 4941 if (rc) { 4942 dev_err(&ctrl_info->pci_dev->dev, 4943 "error creating inbound AIO queue\n"); 4944 return rc; 4945 } 4946 4947 queue_group->iq_pi[AIO_PATH] = ctrl_info->iomem_base + 4948 PQI_DEVICE_REGISTERS_OFFSET + 4949 get_unaligned_le64( 4950 &response.data.create_operational_iq.iq_pi_offset); 4951 4952 /* 4953 * Designate the 2nd IQ as the AIO path. By default, all IQs are 4954 * assumed to be for RAID path I/O unless we change the queue's 4955 * property. 4956 */ 4957 memset(&request, 0, sizeof(request)); 4958 request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN; 4959 put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH, 4960 &request.header.iu_length); 4961 request.function_code = PQI_GENERAL_ADMIN_FUNCTION_CHANGE_IQ_PROPERTY; 4962 put_unaligned_le16(queue_group->iq_id[AIO_PATH], 4963 &request.data.change_operational_iq_properties.queue_id); 4964 put_unaligned_le32(PQI_IQ_PROPERTY_IS_AIO_QUEUE, 4965 &request.data.change_operational_iq_properties.vendor_specific); 4966 4967 rc = pqi_submit_admin_request_synchronous(ctrl_info, &request, 4968 &response); 4969 if (rc) { 4970 dev_err(&ctrl_info->pci_dev->dev, 4971 "error changing queue property\n"); 4972 return rc; 4973 } 4974 4975 /* 4976 * Create OQ (Outbound Queue - device to host queue). 4977 */ 4978 memset(&request, 0, sizeof(request)); 4979 request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN; 4980 put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH, 4981 &request.header.iu_length); 4982 request.function_code = PQI_GENERAL_ADMIN_FUNCTION_CREATE_OQ; 4983 put_unaligned_le16(queue_group->oq_id, 4984 &request.data.create_operational_oq.queue_id); 4985 put_unaligned_le64((u64)queue_group->oq_element_array_bus_addr, 4986 &request.data.create_operational_oq.element_array_addr); 4987 put_unaligned_le64((u64)queue_group->oq_pi_bus_addr, 4988 &request.data.create_operational_oq.pi_addr); 4989 put_unaligned_le16(ctrl_info->num_elements_per_oq, 4990 &request.data.create_operational_oq.num_elements); 4991 put_unaligned_le16(PQI_OPERATIONAL_OQ_ELEMENT_LENGTH / 16, 4992 &request.data.create_operational_oq.element_length); 4993 request.data.create_operational_oq.queue_protocol = PQI_PROTOCOL_SOP; 4994 put_unaligned_le16(queue_group->int_msg_num, 4995 &request.data.create_operational_oq.int_msg_num); 4996 4997 rc = pqi_submit_admin_request_synchronous(ctrl_info, &request, 4998 &response); 4999 if (rc) { 5000 dev_err(&ctrl_info->pci_dev->dev, 5001 "error creating outbound queue\n"); 5002 return rc; 5003 } 5004 5005 queue_group->oq_ci = ctrl_info->iomem_base + 5006 PQI_DEVICE_REGISTERS_OFFSET + 5007 get_unaligned_le64( 5008 &response.data.create_operational_oq.oq_ci_offset); 5009 5010 return 0; 5011 } 5012 5013 static int pqi_create_queues(struct pqi_ctrl_info *ctrl_info) 5014 { 5015 int rc; 5016 unsigned int i; 5017 5018 rc = pqi_create_event_queue(ctrl_info); 5019 if (rc) { 5020 dev_err(&ctrl_info->pci_dev->dev, 5021 "error creating event queue\n"); 5022 return rc; 5023 } 5024 5025 for (i = 0; i < ctrl_info->num_queue_groups; i++) { 5026 rc = pqi_create_queue_group(ctrl_info, i); 5027 if (rc) { 5028 dev_err(&ctrl_info->pci_dev->dev, 5029 "error creating queue group number %u/%u\n", 5030 i, ctrl_info->num_queue_groups); 5031 return rc; 5032 } 5033 } 5034 5035 return 0; 5036 } 5037 5038 #define PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH \ 5039 struct_size_t(struct pqi_event_config, descriptors, PQI_MAX_EVENT_DESCRIPTORS) 5040 5041 static int pqi_configure_events(struct pqi_ctrl_info *ctrl_info, 5042 bool enable_events) 5043 { 5044 int rc; 5045 unsigned int i; 5046 struct pqi_event_config *event_config; 5047 struct pqi_event_descriptor *event_descriptor; 5048 struct pqi_general_management_request request; 5049 5050 event_config = kmalloc(PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH, 5051 GFP_KERNEL); 5052 if (!event_config) 5053 return -ENOMEM; 5054 5055 memset(&request, 0, sizeof(request)); 5056 5057 request.header.iu_type = PQI_REQUEST_IU_REPORT_VENDOR_EVENT_CONFIG; 5058 put_unaligned_le16(offsetof(struct pqi_general_management_request, 5059 data.report_event_configuration.sg_descriptors[1]) - 5060 PQI_REQUEST_HEADER_LENGTH, &request.header.iu_length); 5061 put_unaligned_le32(PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH, 5062 &request.data.report_event_configuration.buffer_length); 5063 5064 rc = pqi_map_single(ctrl_info->pci_dev, 5065 request.data.report_event_configuration.sg_descriptors, 5066 event_config, PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH, 5067 DMA_FROM_DEVICE); 5068 if (rc) 5069 goto out; 5070 5071 rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 0, NULL); 5072 5073 pqi_pci_unmap(ctrl_info->pci_dev, 5074 request.data.report_event_configuration.sg_descriptors, 1, 5075 DMA_FROM_DEVICE); 5076 5077 if (rc) 5078 goto out; 5079 5080 for (i = 0; i < event_config->num_event_descriptors; i++) { 5081 event_descriptor = &event_config->descriptors[i]; 5082 if (enable_events && 5083 pqi_is_supported_event(event_descriptor->event_type)) 5084 put_unaligned_le16(ctrl_info->event_queue.oq_id, 5085 &event_descriptor->oq_id); 5086 else 5087 put_unaligned_le16(0, &event_descriptor->oq_id); 5088 } 5089 5090 memset(&request, 0, sizeof(request)); 5091 5092 request.header.iu_type = PQI_REQUEST_IU_SET_VENDOR_EVENT_CONFIG; 5093 put_unaligned_le16(offsetof(struct pqi_general_management_request, 5094 data.report_event_configuration.sg_descriptors[1]) - 5095 PQI_REQUEST_HEADER_LENGTH, &request.header.iu_length); 5096 put_unaligned_le32(PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH, 5097 &request.data.report_event_configuration.buffer_length); 5098 5099 rc = pqi_map_single(ctrl_info->pci_dev, 5100 request.data.report_event_configuration.sg_descriptors, 5101 event_config, PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH, 5102 DMA_TO_DEVICE); 5103 if (rc) 5104 goto out; 5105 5106 rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 0, NULL); 5107 5108 pqi_pci_unmap(ctrl_info->pci_dev, 5109 request.data.report_event_configuration.sg_descriptors, 1, 5110 DMA_TO_DEVICE); 5111 5112 out: 5113 kfree(event_config); 5114 5115 return rc; 5116 } 5117 5118 static inline int pqi_enable_events(struct pqi_ctrl_info *ctrl_info) 5119 { 5120 return pqi_configure_events(ctrl_info, true); 5121 } 5122 5123 static void pqi_free_all_io_requests(struct pqi_ctrl_info *ctrl_info) 5124 { 5125 unsigned int i; 5126 struct device *dev; 5127 size_t sg_chain_buffer_length; 5128 struct pqi_io_request *io_request; 5129 5130 if (!ctrl_info->io_request_pool) 5131 return; 5132 5133 dev = &ctrl_info->pci_dev->dev; 5134 sg_chain_buffer_length = ctrl_info->sg_chain_buffer_length; 5135 io_request = ctrl_info->io_request_pool; 5136 5137 for (i = 0; i < ctrl_info->max_io_slots; i++) { 5138 kfree(io_request->iu); 5139 if (!io_request->sg_chain_buffer) 5140 break; 5141 dma_free_coherent(dev, sg_chain_buffer_length, 5142 io_request->sg_chain_buffer, 5143 io_request->sg_chain_buffer_dma_handle); 5144 io_request++; 5145 } 5146 5147 kfree(ctrl_info->io_request_pool); 5148 ctrl_info->io_request_pool = NULL; 5149 } 5150 5151 static inline int pqi_alloc_error_buffer(struct pqi_ctrl_info *ctrl_info) 5152 { 5153 ctrl_info->error_buffer = dma_alloc_coherent(&ctrl_info->pci_dev->dev, 5154 ctrl_info->error_buffer_length, 5155 &ctrl_info->error_buffer_dma_handle, 5156 GFP_KERNEL); 5157 if (!ctrl_info->error_buffer) 5158 return -ENOMEM; 5159 5160 return 0; 5161 } 5162 5163 static int pqi_alloc_io_resources(struct pqi_ctrl_info *ctrl_info) 5164 { 5165 unsigned int i; 5166 void *sg_chain_buffer; 5167 size_t sg_chain_buffer_length; 5168 dma_addr_t sg_chain_buffer_dma_handle; 5169 struct device *dev; 5170 struct pqi_io_request *io_request; 5171 5172 ctrl_info->io_request_pool = kcalloc(ctrl_info->max_io_slots, 5173 sizeof(ctrl_info->io_request_pool[0]), GFP_KERNEL); 5174 5175 if (!ctrl_info->io_request_pool) { 5176 dev_err(&ctrl_info->pci_dev->dev, 5177 "failed to allocate I/O request pool\n"); 5178 goto error; 5179 } 5180 5181 dev = &ctrl_info->pci_dev->dev; 5182 sg_chain_buffer_length = ctrl_info->sg_chain_buffer_length; 5183 io_request = ctrl_info->io_request_pool; 5184 5185 for (i = 0; i < ctrl_info->max_io_slots; i++) { 5186 io_request->iu = kmalloc(ctrl_info->max_inbound_iu_length, GFP_KERNEL); 5187 5188 if (!io_request->iu) { 5189 dev_err(&ctrl_info->pci_dev->dev, 5190 "failed to allocate IU buffers\n"); 5191 goto error; 5192 } 5193 5194 sg_chain_buffer = dma_alloc_coherent(dev, 5195 sg_chain_buffer_length, &sg_chain_buffer_dma_handle, 5196 GFP_KERNEL); 5197 5198 if (!sg_chain_buffer) { 5199 dev_err(&ctrl_info->pci_dev->dev, 5200 "failed to allocate PQI scatter-gather chain buffers\n"); 5201 goto error; 5202 } 5203 5204 io_request->index = i; 5205 io_request->sg_chain_buffer = sg_chain_buffer; 5206 io_request->sg_chain_buffer_dma_handle = sg_chain_buffer_dma_handle; 5207 io_request++; 5208 } 5209 5210 return 0; 5211 5212 error: 5213 pqi_free_all_io_requests(ctrl_info); 5214 5215 return -ENOMEM; 5216 } 5217 5218 /* 5219 * Calculate required resources that are sized based on max. outstanding 5220 * requests and max. transfer size. 5221 */ 5222 5223 static void pqi_calculate_io_resources(struct pqi_ctrl_info *ctrl_info) 5224 { 5225 u32 max_transfer_size; 5226 u32 max_sg_entries; 5227 5228 ctrl_info->scsi_ml_can_queue = 5229 ctrl_info->max_outstanding_requests - PQI_RESERVED_IO_SLOTS; 5230 ctrl_info->max_io_slots = ctrl_info->max_outstanding_requests; 5231 5232 ctrl_info->error_buffer_length = 5233 ctrl_info->max_io_slots * PQI_ERROR_BUFFER_ELEMENT_LENGTH; 5234 5235 if (reset_devices) 5236 max_transfer_size = min(ctrl_info->max_transfer_size, 5237 PQI_MAX_TRANSFER_SIZE_KDUMP); 5238 else 5239 max_transfer_size = min(ctrl_info->max_transfer_size, 5240 PQI_MAX_TRANSFER_SIZE); 5241 5242 max_sg_entries = max_transfer_size / PAGE_SIZE; 5243 5244 /* +1 to cover when the buffer is not page-aligned. */ 5245 max_sg_entries++; 5246 5247 max_sg_entries = min(ctrl_info->max_sg_entries, max_sg_entries); 5248 5249 max_transfer_size = (max_sg_entries - 1) * PAGE_SIZE; 5250 5251 ctrl_info->sg_chain_buffer_length = 5252 (max_sg_entries * sizeof(struct pqi_sg_descriptor)) + 5253 PQI_EXTRA_SGL_MEMORY; 5254 ctrl_info->sg_tablesize = max_sg_entries; 5255 ctrl_info->max_sectors = max_transfer_size / 512; 5256 } 5257 5258 static void pqi_calculate_queue_resources(struct pqi_ctrl_info *ctrl_info) 5259 { 5260 int num_queue_groups; 5261 u16 num_elements_per_iq; 5262 u16 num_elements_per_oq; 5263 5264 if (reset_devices) { 5265 num_queue_groups = 1; 5266 } else { 5267 int num_cpus; 5268 int max_queue_groups; 5269 5270 max_queue_groups = min(ctrl_info->max_inbound_queues / 2, 5271 ctrl_info->max_outbound_queues - 1); 5272 max_queue_groups = min(max_queue_groups, PQI_MAX_QUEUE_GROUPS); 5273 5274 num_cpus = num_online_cpus(); 5275 num_queue_groups = min(num_cpus, ctrl_info->max_msix_vectors); 5276 num_queue_groups = min(num_queue_groups, max_queue_groups); 5277 } 5278 5279 ctrl_info->num_queue_groups = num_queue_groups; 5280 5281 /* 5282 * Make sure that the max. inbound IU length is an even multiple 5283 * of our inbound element length. 5284 */ 5285 ctrl_info->max_inbound_iu_length = 5286 (ctrl_info->max_inbound_iu_length_per_firmware / 5287 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH) * 5288 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH; 5289 5290 num_elements_per_iq = 5291 (ctrl_info->max_inbound_iu_length / 5292 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH); 5293 5294 /* Add one because one element in each queue is unusable. */ 5295 num_elements_per_iq++; 5296 5297 num_elements_per_iq = min(num_elements_per_iq, 5298 ctrl_info->max_elements_per_iq); 5299 5300 num_elements_per_oq = ((num_elements_per_iq - 1) * 2) + 1; 5301 num_elements_per_oq = min(num_elements_per_oq, 5302 ctrl_info->max_elements_per_oq); 5303 5304 ctrl_info->num_elements_per_iq = num_elements_per_iq; 5305 ctrl_info->num_elements_per_oq = num_elements_per_oq; 5306 5307 ctrl_info->max_sg_per_iu = 5308 ((ctrl_info->max_inbound_iu_length - 5309 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH) / 5310 sizeof(struct pqi_sg_descriptor)) + 5311 PQI_MAX_EMBEDDED_SG_DESCRIPTORS; 5312 5313 ctrl_info->max_sg_per_r56_iu = 5314 ((ctrl_info->max_inbound_iu_length - 5315 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH) / 5316 sizeof(struct pqi_sg_descriptor)) + 5317 PQI_MAX_EMBEDDED_R56_SG_DESCRIPTORS; 5318 } 5319 5320 static inline void pqi_set_sg_descriptor(struct pqi_sg_descriptor *sg_descriptor, 5321 struct scatterlist *sg) 5322 { 5323 u64 address = (u64)sg_dma_address(sg); 5324 unsigned int length = sg_dma_len(sg); 5325 5326 put_unaligned_le64(address, &sg_descriptor->address); 5327 put_unaligned_le32(length, &sg_descriptor->length); 5328 put_unaligned_le32(0, &sg_descriptor->flags); 5329 } 5330 5331 static unsigned int pqi_build_sg_list(struct pqi_sg_descriptor *sg_descriptor, 5332 struct scatterlist *sg, int sg_count, struct pqi_io_request *io_request, 5333 int max_sg_per_iu, bool *chained) 5334 { 5335 int i; 5336 unsigned int num_sg_in_iu; 5337 5338 *chained = false; 5339 i = 0; 5340 num_sg_in_iu = 0; 5341 max_sg_per_iu--; /* Subtract 1 to leave room for chain marker. */ 5342 5343 while (1) { 5344 pqi_set_sg_descriptor(sg_descriptor, sg); 5345 if (!*chained) 5346 num_sg_in_iu++; 5347 i++; 5348 if (i == sg_count) 5349 break; 5350 sg_descriptor++; 5351 if (i == max_sg_per_iu) { 5352 put_unaligned_le64((u64)io_request->sg_chain_buffer_dma_handle, 5353 &sg_descriptor->address); 5354 put_unaligned_le32((sg_count - num_sg_in_iu) * sizeof(*sg_descriptor), 5355 &sg_descriptor->length); 5356 put_unaligned_le32(CISS_SG_CHAIN, &sg_descriptor->flags); 5357 *chained = true; 5358 num_sg_in_iu++; 5359 sg_descriptor = io_request->sg_chain_buffer; 5360 } 5361 sg = sg_next(sg); 5362 } 5363 5364 put_unaligned_le32(CISS_SG_LAST, &sg_descriptor->flags); 5365 5366 return num_sg_in_iu; 5367 } 5368 5369 static int pqi_build_raid_sg_list(struct pqi_ctrl_info *ctrl_info, 5370 struct pqi_raid_path_request *request, struct scsi_cmnd *scmd, 5371 struct pqi_io_request *io_request) 5372 { 5373 u16 iu_length; 5374 int sg_count; 5375 bool chained; 5376 unsigned int num_sg_in_iu; 5377 struct scatterlist *sg; 5378 struct pqi_sg_descriptor *sg_descriptor; 5379 5380 sg_count = scsi_dma_map(scmd); 5381 if (sg_count < 0) 5382 return sg_count; 5383 5384 iu_length = offsetof(struct pqi_raid_path_request, sg_descriptors) - 5385 PQI_REQUEST_HEADER_LENGTH; 5386 5387 if (sg_count == 0) 5388 goto out; 5389 5390 sg = scsi_sglist(scmd); 5391 sg_descriptor = request->sg_descriptors; 5392 5393 num_sg_in_iu = pqi_build_sg_list(sg_descriptor, sg, sg_count, io_request, 5394 ctrl_info->max_sg_per_iu, &chained); 5395 5396 request->partial = chained; 5397 iu_length += num_sg_in_iu * sizeof(*sg_descriptor); 5398 5399 out: 5400 put_unaligned_le16(iu_length, &request->header.iu_length); 5401 5402 return 0; 5403 } 5404 5405 static int pqi_build_aio_r1_sg_list(struct pqi_ctrl_info *ctrl_info, 5406 struct pqi_aio_r1_path_request *request, struct scsi_cmnd *scmd, 5407 struct pqi_io_request *io_request) 5408 { 5409 u16 iu_length; 5410 int sg_count; 5411 bool chained; 5412 unsigned int num_sg_in_iu; 5413 struct scatterlist *sg; 5414 struct pqi_sg_descriptor *sg_descriptor; 5415 5416 sg_count = scsi_dma_map(scmd); 5417 if (sg_count < 0) 5418 return sg_count; 5419 5420 iu_length = offsetof(struct pqi_aio_r1_path_request, sg_descriptors) - 5421 PQI_REQUEST_HEADER_LENGTH; 5422 num_sg_in_iu = 0; 5423 5424 if (sg_count == 0) 5425 goto out; 5426 5427 sg = scsi_sglist(scmd); 5428 sg_descriptor = request->sg_descriptors; 5429 5430 num_sg_in_iu = pqi_build_sg_list(sg_descriptor, sg, sg_count, io_request, 5431 ctrl_info->max_sg_per_iu, &chained); 5432 5433 request->partial = chained; 5434 iu_length += num_sg_in_iu * sizeof(*sg_descriptor); 5435 5436 out: 5437 put_unaligned_le16(iu_length, &request->header.iu_length); 5438 request->num_sg_descriptors = num_sg_in_iu; 5439 5440 return 0; 5441 } 5442 5443 static int pqi_build_aio_r56_sg_list(struct pqi_ctrl_info *ctrl_info, 5444 struct pqi_aio_r56_path_request *request, struct scsi_cmnd *scmd, 5445 struct pqi_io_request *io_request) 5446 { 5447 u16 iu_length; 5448 int sg_count; 5449 bool chained; 5450 unsigned int num_sg_in_iu; 5451 struct scatterlist *sg; 5452 struct pqi_sg_descriptor *sg_descriptor; 5453 5454 sg_count = scsi_dma_map(scmd); 5455 if (sg_count < 0) 5456 return sg_count; 5457 5458 iu_length = offsetof(struct pqi_aio_r56_path_request, sg_descriptors) - 5459 PQI_REQUEST_HEADER_LENGTH; 5460 num_sg_in_iu = 0; 5461 5462 if (sg_count != 0) { 5463 sg = scsi_sglist(scmd); 5464 sg_descriptor = request->sg_descriptors; 5465 5466 num_sg_in_iu = pqi_build_sg_list(sg_descriptor, sg, sg_count, io_request, 5467 ctrl_info->max_sg_per_r56_iu, &chained); 5468 5469 request->partial = chained; 5470 iu_length += num_sg_in_iu * sizeof(*sg_descriptor); 5471 } 5472 5473 put_unaligned_le16(iu_length, &request->header.iu_length); 5474 request->num_sg_descriptors = num_sg_in_iu; 5475 5476 return 0; 5477 } 5478 5479 static int pqi_build_aio_sg_list(struct pqi_ctrl_info *ctrl_info, 5480 struct pqi_aio_path_request *request, struct scsi_cmnd *scmd, 5481 struct pqi_io_request *io_request) 5482 { 5483 u16 iu_length; 5484 int sg_count; 5485 bool chained; 5486 unsigned int num_sg_in_iu; 5487 struct scatterlist *sg; 5488 struct pqi_sg_descriptor *sg_descriptor; 5489 5490 sg_count = scsi_dma_map(scmd); 5491 if (sg_count < 0) 5492 return sg_count; 5493 5494 iu_length = offsetof(struct pqi_aio_path_request, sg_descriptors) - 5495 PQI_REQUEST_HEADER_LENGTH; 5496 num_sg_in_iu = 0; 5497 5498 if (sg_count == 0) 5499 goto out; 5500 5501 sg = scsi_sglist(scmd); 5502 sg_descriptor = request->sg_descriptors; 5503 5504 num_sg_in_iu = pqi_build_sg_list(sg_descriptor, sg, sg_count, io_request, 5505 ctrl_info->max_sg_per_iu, &chained); 5506 5507 request->partial = chained; 5508 iu_length += num_sg_in_iu * sizeof(*sg_descriptor); 5509 5510 out: 5511 put_unaligned_le16(iu_length, &request->header.iu_length); 5512 request->num_sg_descriptors = num_sg_in_iu; 5513 5514 return 0; 5515 } 5516 5517 static void pqi_raid_io_complete(struct pqi_io_request *io_request, 5518 void *context) 5519 { 5520 struct scsi_cmnd *scmd; 5521 5522 scmd = io_request->scmd; 5523 pqi_free_io_request(io_request); 5524 scsi_dma_unmap(scmd); 5525 pqi_scsi_done(scmd); 5526 } 5527 5528 static int pqi_raid_submit_io(struct pqi_ctrl_info *ctrl_info, 5529 struct pqi_scsi_dev *device, struct scsi_cmnd *scmd, 5530 struct pqi_queue_group *queue_group, bool io_high_prio) 5531 { 5532 int rc; 5533 size_t cdb_length; 5534 struct pqi_io_request *io_request; 5535 struct pqi_raid_path_request *request; 5536 5537 io_request = pqi_alloc_io_request(ctrl_info, scmd); 5538 if (!io_request) 5539 return SCSI_MLQUEUE_HOST_BUSY; 5540 5541 io_request->io_complete_callback = pqi_raid_io_complete; 5542 io_request->scmd = scmd; 5543 5544 request = io_request->iu; 5545 memset(request, 0, offsetof(struct pqi_raid_path_request, sg_descriptors)); 5546 5547 request->header.iu_type = PQI_REQUEST_IU_RAID_PATH_IO; 5548 put_unaligned_le32(scsi_bufflen(scmd), &request->buffer_length); 5549 request->task_attribute = SOP_TASK_ATTRIBUTE_SIMPLE; 5550 request->command_priority = io_high_prio; 5551 put_unaligned_le16(io_request->index, &request->request_id); 5552 request->error_index = request->request_id; 5553 memcpy(request->lun_number, device->scsi3addr, sizeof(request->lun_number)); 5554 request->ml_device_lun_number = (u8)scmd->device->lun; 5555 5556 cdb_length = min_t(size_t, scmd->cmd_len, sizeof(request->cdb)); 5557 memcpy(request->cdb, scmd->cmnd, cdb_length); 5558 5559 switch (cdb_length) { 5560 case 6: 5561 case 10: 5562 case 12: 5563 case 16: 5564 request->additional_cdb_bytes_usage = SOP_ADDITIONAL_CDB_BYTES_0; 5565 break; 5566 case 20: 5567 request->additional_cdb_bytes_usage = SOP_ADDITIONAL_CDB_BYTES_4; 5568 break; 5569 case 24: 5570 request->additional_cdb_bytes_usage = SOP_ADDITIONAL_CDB_BYTES_8; 5571 break; 5572 case 28: 5573 request->additional_cdb_bytes_usage = SOP_ADDITIONAL_CDB_BYTES_12; 5574 break; 5575 case 32: 5576 default: 5577 request->additional_cdb_bytes_usage = SOP_ADDITIONAL_CDB_BYTES_16; 5578 break; 5579 } 5580 5581 switch (scmd->sc_data_direction) { 5582 case DMA_FROM_DEVICE: 5583 request->data_direction = SOP_READ_FLAG; 5584 break; 5585 case DMA_TO_DEVICE: 5586 request->data_direction = SOP_WRITE_FLAG; 5587 break; 5588 case DMA_NONE: 5589 request->data_direction = SOP_NO_DIRECTION_FLAG; 5590 break; 5591 case DMA_BIDIRECTIONAL: 5592 request->data_direction = SOP_BIDIRECTIONAL; 5593 break; 5594 default: 5595 dev_err(&ctrl_info->pci_dev->dev, 5596 "unknown data direction: %d\n", 5597 scmd->sc_data_direction); 5598 break; 5599 } 5600 5601 rc = pqi_build_raid_sg_list(ctrl_info, request, scmd, io_request); 5602 if (rc) { 5603 pqi_free_io_request(io_request); 5604 return SCSI_MLQUEUE_HOST_BUSY; 5605 } 5606 5607 pqi_start_io(ctrl_info, queue_group, RAID_PATH, io_request); 5608 5609 return 0; 5610 } 5611 5612 static inline int pqi_raid_submit_scsi_cmd(struct pqi_ctrl_info *ctrl_info, 5613 struct pqi_scsi_dev *device, struct scsi_cmnd *scmd, 5614 struct pqi_queue_group *queue_group) 5615 { 5616 bool io_high_prio; 5617 5618 io_high_prio = pqi_is_io_high_priority(device, scmd); 5619 5620 return pqi_raid_submit_io(ctrl_info, device, scmd, queue_group, io_high_prio); 5621 } 5622 5623 static bool pqi_raid_bypass_retry_needed(struct pqi_io_request *io_request) 5624 { 5625 struct scsi_cmnd *scmd; 5626 struct pqi_scsi_dev *device; 5627 struct pqi_ctrl_info *ctrl_info; 5628 5629 if (!io_request->raid_bypass) 5630 return false; 5631 5632 scmd = io_request->scmd; 5633 if ((scmd->result & 0xff) == SAM_STAT_GOOD) 5634 return false; 5635 if (host_byte(scmd->result) == DID_NO_CONNECT) 5636 return false; 5637 5638 device = scmd->device->hostdata; 5639 if (pqi_device_offline(device) || pqi_device_in_remove(device)) 5640 return false; 5641 5642 ctrl_info = shost_to_hba(scmd->device->host); 5643 if (pqi_ctrl_offline(ctrl_info)) 5644 return false; 5645 5646 return true; 5647 } 5648 5649 static void pqi_aio_io_complete(struct pqi_io_request *io_request, 5650 void *context) 5651 { 5652 struct scsi_cmnd *scmd; 5653 5654 scmd = io_request->scmd; 5655 scsi_dma_unmap(scmd); 5656 if (io_request->status == -EAGAIN || pqi_raid_bypass_retry_needed(io_request)) { 5657 set_host_byte(scmd, DID_IMM_RETRY); 5658 pqi_cmd_priv(scmd)->this_residual++; 5659 } 5660 5661 pqi_free_io_request(io_request); 5662 pqi_scsi_done(scmd); 5663 } 5664 5665 static inline int pqi_aio_submit_scsi_cmd(struct pqi_ctrl_info *ctrl_info, 5666 struct pqi_scsi_dev *device, struct scsi_cmnd *scmd, 5667 struct pqi_queue_group *queue_group) 5668 { 5669 bool io_high_prio; 5670 5671 io_high_prio = pqi_is_io_high_priority(device, scmd); 5672 5673 return pqi_aio_submit_io(ctrl_info, scmd, device->aio_handle, 5674 scmd->cmnd, scmd->cmd_len, queue_group, NULL, 5675 false, io_high_prio); 5676 } 5677 5678 static int pqi_aio_submit_io(struct pqi_ctrl_info *ctrl_info, 5679 struct scsi_cmnd *scmd, u32 aio_handle, u8 *cdb, 5680 unsigned int cdb_length, struct pqi_queue_group *queue_group, 5681 struct pqi_encryption_info *encryption_info, bool raid_bypass, 5682 bool io_high_prio) 5683 { 5684 int rc; 5685 struct pqi_io_request *io_request; 5686 struct pqi_aio_path_request *request; 5687 5688 io_request = pqi_alloc_io_request(ctrl_info, scmd); 5689 if (!io_request) 5690 return SCSI_MLQUEUE_HOST_BUSY; 5691 5692 io_request->io_complete_callback = pqi_aio_io_complete; 5693 io_request->scmd = scmd; 5694 io_request->raid_bypass = raid_bypass; 5695 5696 request = io_request->iu; 5697 memset(request, 0, offsetof(struct pqi_aio_path_request, sg_descriptors)); 5698 5699 request->header.iu_type = PQI_REQUEST_IU_AIO_PATH_IO; 5700 put_unaligned_le32(aio_handle, &request->nexus_id); 5701 put_unaligned_le32(scsi_bufflen(scmd), &request->buffer_length); 5702 request->task_attribute = SOP_TASK_ATTRIBUTE_SIMPLE; 5703 request->command_priority = io_high_prio; 5704 put_unaligned_le16(io_request->index, &request->request_id); 5705 request->error_index = request->request_id; 5706 if (!raid_bypass && ctrl_info->multi_lun_device_supported) 5707 put_unaligned_le64(scmd->device->lun << 8, &request->lun_number); 5708 if (cdb_length > sizeof(request->cdb)) 5709 cdb_length = sizeof(request->cdb); 5710 request->cdb_length = cdb_length; 5711 memcpy(request->cdb, cdb, cdb_length); 5712 5713 switch (scmd->sc_data_direction) { 5714 case DMA_TO_DEVICE: 5715 request->data_direction = SOP_READ_FLAG; 5716 break; 5717 case DMA_FROM_DEVICE: 5718 request->data_direction = SOP_WRITE_FLAG; 5719 break; 5720 case DMA_NONE: 5721 request->data_direction = SOP_NO_DIRECTION_FLAG; 5722 break; 5723 case DMA_BIDIRECTIONAL: 5724 request->data_direction = SOP_BIDIRECTIONAL; 5725 break; 5726 default: 5727 dev_err(&ctrl_info->pci_dev->dev, 5728 "unknown data direction: %d\n", 5729 scmd->sc_data_direction); 5730 break; 5731 } 5732 5733 if (encryption_info) { 5734 request->encryption_enable = true; 5735 put_unaligned_le16(encryption_info->data_encryption_key_index, 5736 &request->data_encryption_key_index); 5737 put_unaligned_le32(encryption_info->encrypt_tweak_lower, 5738 &request->encrypt_tweak_lower); 5739 put_unaligned_le32(encryption_info->encrypt_tweak_upper, 5740 &request->encrypt_tweak_upper); 5741 } 5742 5743 rc = pqi_build_aio_sg_list(ctrl_info, request, scmd, io_request); 5744 if (rc) { 5745 pqi_free_io_request(io_request); 5746 return SCSI_MLQUEUE_HOST_BUSY; 5747 } 5748 5749 pqi_start_io(ctrl_info, queue_group, AIO_PATH, io_request); 5750 5751 return 0; 5752 } 5753 5754 static int pqi_aio_submit_r1_write_io(struct pqi_ctrl_info *ctrl_info, 5755 struct scsi_cmnd *scmd, struct pqi_queue_group *queue_group, 5756 struct pqi_encryption_info *encryption_info, struct pqi_scsi_dev *device, 5757 struct pqi_scsi_dev_raid_map_data *rmd) 5758 { 5759 int rc; 5760 struct pqi_io_request *io_request; 5761 struct pqi_aio_r1_path_request *r1_request; 5762 5763 io_request = pqi_alloc_io_request(ctrl_info, scmd); 5764 if (!io_request) 5765 return SCSI_MLQUEUE_HOST_BUSY; 5766 5767 io_request->io_complete_callback = pqi_aio_io_complete; 5768 io_request->scmd = scmd; 5769 io_request->raid_bypass = true; 5770 5771 r1_request = io_request->iu; 5772 memset(r1_request, 0, offsetof(struct pqi_aio_r1_path_request, sg_descriptors)); 5773 5774 r1_request->header.iu_type = PQI_REQUEST_IU_AIO_PATH_RAID1_IO; 5775 put_unaligned_le16(*(u16 *)device->scsi3addr & 0x3fff, &r1_request->volume_id); 5776 r1_request->num_drives = rmd->num_it_nexus_entries; 5777 put_unaligned_le32(rmd->it_nexus[0], &r1_request->it_nexus_1); 5778 put_unaligned_le32(rmd->it_nexus[1], &r1_request->it_nexus_2); 5779 if (rmd->num_it_nexus_entries == 3) 5780 put_unaligned_le32(rmd->it_nexus[2], &r1_request->it_nexus_3); 5781 5782 put_unaligned_le32(scsi_bufflen(scmd), &r1_request->data_length); 5783 r1_request->task_attribute = SOP_TASK_ATTRIBUTE_SIMPLE; 5784 put_unaligned_le16(io_request->index, &r1_request->request_id); 5785 r1_request->error_index = r1_request->request_id; 5786 if (rmd->cdb_length > sizeof(r1_request->cdb)) 5787 rmd->cdb_length = sizeof(r1_request->cdb); 5788 r1_request->cdb_length = rmd->cdb_length; 5789 memcpy(r1_request->cdb, rmd->cdb, rmd->cdb_length); 5790 5791 /* The direction is always write. */ 5792 r1_request->data_direction = SOP_READ_FLAG; 5793 5794 if (encryption_info) { 5795 r1_request->encryption_enable = true; 5796 put_unaligned_le16(encryption_info->data_encryption_key_index, 5797 &r1_request->data_encryption_key_index); 5798 put_unaligned_le32(encryption_info->encrypt_tweak_lower, 5799 &r1_request->encrypt_tweak_lower); 5800 put_unaligned_le32(encryption_info->encrypt_tweak_upper, 5801 &r1_request->encrypt_tweak_upper); 5802 } 5803 5804 rc = pqi_build_aio_r1_sg_list(ctrl_info, r1_request, scmd, io_request); 5805 if (rc) { 5806 pqi_free_io_request(io_request); 5807 return SCSI_MLQUEUE_HOST_BUSY; 5808 } 5809 5810 pqi_start_io(ctrl_info, queue_group, AIO_PATH, io_request); 5811 5812 return 0; 5813 } 5814 5815 static int pqi_aio_submit_r56_write_io(struct pqi_ctrl_info *ctrl_info, 5816 struct scsi_cmnd *scmd, struct pqi_queue_group *queue_group, 5817 struct pqi_encryption_info *encryption_info, struct pqi_scsi_dev *device, 5818 struct pqi_scsi_dev_raid_map_data *rmd) 5819 { 5820 int rc; 5821 struct pqi_io_request *io_request; 5822 struct pqi_aio_r56_path_request *r56_request; 5823 5824 io_request = pqi_alloc_io_request(ctrl_info, scmd); 5825 if (!io_request) 5826 return SCSI_MLQUEUE_HOST_BUSY; 5827 io_request->io_complete_callback = pqi_aio_io_complete; 5828 io_request->scmd = scmd; 5829 io_request->raid_bypass = true; 5830 5831 r56_request = io_request->iu; 5832 memset(r56_request, 0, offsetof(struct pqi_aio_r56_path_request, sg_descriptors)); 5833 5834 if (device->raid_level == SA_RAID_5 || device->raid_level == SA_RAID_51) 5835 r56_request->header.iu_type = PQI_REQUEST_IU_AIO_PATH_RAID5_IO; 5836 else 5837 r56_request->header.iu_type = PQI_REQUEST_IU_AIO_PATH_RAID6_IO; 5838 5839 put_unaligned_le16(*(u16 *)device->scsi3addr & 0x3fff, &r56_request->volume_id); 5840 put_unaligned_le32(rmd->aio_handle, &r56_request->data_it_nexus); 5841 put_unaligned_le32(rmd->p_parity_it_nexus, &r56_request->p_parity_it_nexus); 5842 if (rmd->raid_level == SA_RAID_6) { 5843 put_unaligned_le32(rmd->q_parity_it_nexus, &r56_request->q_parity_it_nexus); 5844 r56_request->xor_multiplier = rmd->xor_mult; 5845 } 5846 put_unaligned_le32(scsi_bufflen(scmd), &r56_request->data_length); 5847 r56_request->task_attribute = SOP_TASK_ATTRIBUTE_SIMPLE; 5848 put_unaligned_le64(rmd->row, &r56_request->row); 5849 5850 put_unaligned_le16(io_request->index, &r56_request->request_id); 5851 r56_request->error_index = r56_request->request_id; 5852 5853 if (rmd->cdb_length > sizeof(r56_request->cdb)) 5854 rmd->cdb_length = sizeof(r56_request->cdb); 5855 r56_request->cdb_length = rmd->cdb_length; 5856 memcpy(r56_request->cdb, rmd->cdb, rmd->cdb_length); 5857 5858 /* The direction is always write. */ 5859 r56_request->data_direction = SOP_READ_FLAG; 5860 5861 if (encryption_info) { 5862 r56_request->encryption_enable = true; 5863 put_unaligned_le16(encryption_info->data_encryption_key_index, 5864 &r56_request->data_encryption_key_index); 5865 put_unaligned_le32(encryption_info->encrypt_tweak_lower, 5866 &r56_request->encrypt_tweak_lower); 5867 put_unaligned_le32(encryption_info->encrypt_tweak_upper, 5868 &r56_request->encrypt_tweak_upper); 5869 } 5870 5871 rc = pqi_build_aio_r56_sg_list(ctrl_info, r56_request, scmd, io_request); 5872 if (rc) { 5873 pqi_free_io_request(io_request); 5874 return SCSI_MLQUEUE_HOST_BUSY; 5875 } 5876 5877 pqi_start_io(ctrl_info, queue_group, AIO_PATH, io_request); 5878 5879 return 0; 5880 } 5881 5882 static inline u16 pqi_get_hw_queue(struct pqi_ctrl_info *ctrl_info, 5883 struct scsi_cmnd *scmd) 5884 { 5885 /* 5886 * We are setting host_tagset = 1 during init. 5887 */ 5888 return blk_mq_unique_tag_to_hwq(blk_mq_unique_tag(scsi_cmd_to_rq(scmd))); 5889 } 5890 5891 static inline bool pqi_is_bypass_eligible_request(struct scsi_cmnd *scmd) 5892 { 5893 if (blk_rq_is_passthrough(scsi_cmd_to_rq(scmd))) 5894 return false; 5895 5896 return pqi_cmd_priv(scmd)->this_residual == 0; 5897 } 5898 5899 /* 5900 * This function gets called just before we hand the completed SCSI request 5901 * back to the SML. 5902 */ 5903 5904 void pqi_prep_for_scsi_done(struct scsi_cmnd *scmd) 5905 { 5906 struct pqi_scsi_dev *device; 5907 struct completion *wait; 5908 5909 if (!scmd->device) { 5910 set_host_byte(scmd, DID_NO_CONNECT); 5911 return; 5912 } 5913 5914 device = scmd->device->hostdata; 5915 if (!device) { 5916 set_host_byte(scmd, DID_NO_CONNECT); 5917 return; 5918 } 5919 5920 atomic_dec(&device->scsi_cmds_outstanding[scmd->device->lun]); 5921 5922 wait = (struct completion *)xchg(&scmd->host_scribble, NULL); 5923 if (wait != PQI_NO_COMPLETION) 5924 complete(wait); 5925 } 5926 5927 static bool pqi_is_parity_write_stream(struct pqi_ctrl_info *ctrl_info, 5928 struct scsi_cmnd *scmd) 5929 { 5930 u32 oldest_jiffies; 5931 u8 lru_index; 5932 int i; 5933 int rc; 5934 struct pqi_scsi_dev *device; 5935 struct pqi_stream_data *pqi_stream_data; 5936 struct pqi_scsi_dev_raid_map_data rmd; 5937 5938 if (!ctrl_info->enable_stream_detection) 5939 return false; 5940 5941 rc = pqi_get_aio_lba_and_block_count(scmd, &rmd); 5942 if (rc) 5943 return false; 5944 5945 /* Check writes only. */ 5946 if (!rmd.is_write) 5947 return false; 5948 5949 device = scmd->device->hostdata; 5950 5951 /* Check for RAID 5/6 streams. */ 5952 if (device->raid_level != SA_RAID_5 && device->raid_level != SA_RAID_6) 5953 return false; 5954 5955 /* 5956 * If controller does not support AIO RAID{5,6} writes, need to send 5957 * requests down non-AIO path. 5958 */ 5959 if ((device->raid_level == SA_RAID_5 && !ctrl_info->enable_r5_writes) || 5960 (device->raid_level == SA_RAID_6 && !ctrl_info->enable_r6_writes)) 5961 return true; 5962 5963 lru_index = 0; 5964 oldest_jiffies = INT_MAX; 5965 for (i = 0; i < NUM_STREAMS_PER_LUN; i++) { 5966 pqi_stream_data = &device->stream_data[i]; 5967 /* 5968 * Check for adjacent request or request is within 5969 * the previous request. 5970 */ 5971 if ((pqi_stream_data->next_lba && 5972 rmd.first_block >= pqi_stream_data->next_lba) && 5973 rmd.first_block <= pqi_stream_data->next_lba + 5974 rmd.block_cnt) { 5975 pqi_stream_data->next_lba = rmd.first_block + 5976 rmd.block_cnt; 5977 pqi_stream_data->last_accessed = jiffies; 5978 return true; 5979 } 5980 5981 /* unused entry */ 5982 if (pqi_stream_data->last_accessed == 0) { 5983 lru_index = i; 5984 break; 5985 } 5986 5987 /* Find entry with oldest last accessed time. */ 5988 if (pqi_stream_data->last_accessed <= oldest_jiffies) { 5989 oldest_jiffies = pqi_stream_data->last_accessed; 5990 lru_index = i; 5991 } 5992 } 5993 5994 /* Set LRU entry. */ 5995 pqi_stream_data = &device->stream_data[lru_index]; 5996 pqi_stream_data->last_accessed = jiffies; 5997 pqi_stream_data->next_lba = rmd.first_block + rmd.block_cnt; 5998 5999 return false; 6000 } 6001 6002 static int pqi_scsi_queue_command(struct Scsi_Host *shost, struct scsi_cmnd *scmd) 6003 { 6004 int rc; 6005 struct pqi_ctrl_info *ctrl_info; 6006 struct pqi_scsi_dev *device; 6007 u16 hw_queue; 6008 struct pqi_queue_group *queue_group; 6009 bool raid_bypassed; 6010 u8 lun; 6011 6012 scmd->host_scribble = PQI_NO_COMPLETION; 6013 6014 device = scmd->device->hostdata; 6015 6016 if (!device) { 6017 set_host_byte(scmd, DID_NO_CONNECT); 6018 pqi_scsi_done(scmd); 6019 return 0; 6020 } 6021 6022 lun = (u8)scmd->device->lun; 6023 6024 atomic_inc(&device->scsi_cmds_outstanding[lun]); 6025 6026 ctrl_info = shost_to_hba(shost); 6027 6028 if (pqi_ctrl_offline(ctrl_info) || pqi_device_in_remove(device)) { 6029 set_host_byte(scmd, DID_NO_CONNECT); 6030 pqi_scsi_done(scmd); 6031 return 0; 6032 } 6033 6034 if (pqi_ctrl_blocked(ctrl_info) || pqi_device_in_reset(device, lun)) { 6035 rc = SCSI_MLQUEUE_HOST_BUSY; 6036 goto out; 6037 } 6038 6039 /* 6040 * This is necessary because the SML doesn't zero out this field during 6041 * error recovery. 6042 */ 6043 scmd->result = 0; 6044 6045 hw_queue = pqi_get_hw_queue(ctrl_info, scmd); 6046 queue_group = &ctrl_info->queue_groups[hw_queue]; 6047 6048 if (pqi_is_logical_device(device)) { 6049 raid_bypassed = false; 6050 if (device->raid_bypass_enabled && 6051 pqi_is_bypass_eligible_request(scmd) && 6052 !pqi_is_parity_write_stream(ctrl_info, scmd)) { 6053 rc = pqi_raid_bypass_submit_scsi_cmd(ctrl_info, device, scmd, queue_group); 6054 if (rc == 0 || rc == SCSI_MLQUEUE_HOST_BUSY) { 6055 raid_bypassed = true; 6056 device->raid_bypass_cnt++; 6057 } 6058 } 6059 if (!raid_bypassed) 6060 rc = pqi_raid_submit_scsi_cmd(ctrl_info, device, scmd, queue_group); 6061 } else { 6062 if (device->aio_enabled) 6063 rc = pqi_aio_submit_scsi_cmd(ctrl_info, device, scmd, queue_group); 6064 else 6065 rc = pqi_raid_submit_scsi_cmd(ctrl_info, device, scmd, queue_group); 6066 } 6067 6068 out: 6069 if (rc) { 6070 scmd->host_scribble = NULL; 6071 atomic_dec(&device->scsi_cmds_outstanding[lun]); 6072 } 6073 6074 return rc; 6075 } 6076 6077 static unsigned int pqi_queued_io_count(struct pqi_ctrl_info *ctrl_info) 6078 { 6079 unsigned int i; 6080 unsigned int path; 6081 unsigned long flags; 6082 unsigned int queued_io_count; 6083 struct pqi_queue_group *queue_group; 6084 struct pqi_io_request *io_request; 6085 6086 queued_io_count = 0; 6087 6088 for (i = 0; i < ctrl_info->num_queue_groups; i++) { 6089 queue_group = &ctrl_info->queue_groups[i]; 6090 for (path = 0; path < 2; path++) { 6091 spin_lock_irqsave(&queue_group->submit_lock[path], flags); 6092 list_for_each_entry(io_request, &queue_group->request_list[path], request_list_entry) 6093 queued_io_count++; 6094 spin_unlock_irqrestore(&queue_group->submit_lock[path], flags); 6095 } 6096 } 6097 6098 return queued_io_count; 6099 } 6100 6101 static unsigned int pqi_nonempty_inbound_queue_count(struct pqi_ctrl_info *ctrl_info) 6102 { 6103 unsigned int i; 6104 unsigned int path; 6105 unsigned int nonempty_inbound_queue_count; 6106 struct pqi_queue_group *queue_group; 6107 pqi_index_t iq_pi; 6108 pqi_index_t iq_ci; 6109 6110 nonempty_inbound_queue_count = 0; 6111 6112 for (i = 0; i < ctrl_info->num_queue_groups; i++) { 6113 queue_group = &ctrl_info->queue_groups[i]; 6114 for (path = 0; path < 2; path++) { 6115 iq_pi = queue_group->iq_pi_copy[path]; 6116 iq_ci = readl(queue_group->iq_ci[path]); 6117 if (iq_ci != iq_pi) 6118 nonempty_inbound_queue_count++; 6119 } 6120 } 6121 6122 return nonempty_inbound_queue_count; 6123 } 6124 6125 #define PQI_INBOUND_QUEUES_NONEMPTY_WARNING_TIMEOUT_SECS 10 6126 6127 static int pqi_wait_until_inbound_queues_empty(struct pqi_ctrl_info *ctrl_info) 6128 { 6129 unsigned long start_jiffies; 6130 unsigned long warning_timeout; 6131 unsigned int queued_io_count; 6132 unsigned int nonempty_inbound_queue_count; 6133 bool displayed_warning; 6134 6135 displayed_warning = false; 6136 start_jiffies = jiffies; 6137 warning_timeout = (PQI_INBOUND_QUEUES_NONEMPTY_WARNING_TIMEOUT_SECS * HZ) + start_jiffies; 6138 6139 while (1) { 6140 queued_io_count = pqi_queued_io_count(ctrl_info); 6141 nonempty_inbound_queue_count = pqi_nonempty_inbound_queue_count(ctrl_info); 6142 if (queued_io_count == 0 && nonempty_inbound_queue_count == 0) 6143 break; 6144 pqi_check_ctrl_health(ctrl_info); 6145 if (pqi_ctrl_offline(ctrl_info)) 6146 return -ENXIO; 6147 if (time_after(jiffies, warning_timeout)) { 6148 dev_warn(&ctrl_info->pci_dev->dev, 6149 "waiting %u seconds for queued I/O to drain (queued I/O count: %u; non-empty inbound queue count: %u)\n", 6150 jiffies_to_msecs(jiffies - start_jiffies) / 1000, queued_io_count, nonempty_inbound_queue_count); 6151 displayed_warning = true; 6152 warning_timeout = (PQI_INBOUND_QUEUES_NONEMPTY_WARNING_TIMEOUT_SECS * HZ) + jiffies; 6153 } 6154 usleep_range(1000, 2000); 6155 } 6156 6157 if (displayed_warning) 6158 dev_warn(&ctrl_info->pci_dev->dev, 6159 "queued I/O drained after waiting for %u seconds\n", 6160 jiffies_to_msecs(jiffies - start_jiffies) / 1000); 6161 6162 return 0; 6163 } 6164 6165 static void pqi_fail_io_queued_for_device(struct pqi_ctrl_info *ctrl_info, 6166 struct pqi_scsi_dev *device, u8 lun) 6167 { 6168 unsigned int i; 6169 unsigned int path; 6170 struct pqi_queue_group *queue_group; 6171 unsigned long flags; 6172 struct pqi_io_request *io_request; 6173 struct pqi_io_request *next; 6174 struct scsi_cmnd *scmd; 6175 struct pqi_scsi_dev *scsi_device; 6176 6177 for (i = 0; i < ctrl_info->num_queue_groups; i++) { 6178 queue_group = &ctrl_info->queue_groups[i]; 6179 6180 for (path = 0; path < 2; path++) { 6181 spin_lock_irqsave( 6182 &queue_group->submit_lock[path], flags); 6183 6184 list_for_each_entry_safe(io_request, next, 6185 &queue_group->request_list[path], 6186 request_list_entry) { 6187 6188 scmd = io_request->scmd; 6189 if (!scmd) 6190 continue; 6191 6192 scsi_device = scmd->device->hostdata; 6193 if (scsi_device != device) 6194 continue; 6195 6196 if ((u8)scmd->device->lun != lun) 6197 continue; 6198 6199 list_del(&io_request->request_list_entry); 6200 set_host_byte(scmd, DID_RESET); 6201 pqi_free_io_request(io_request); 6202 scsi_dma_unmap(scmd); 6203 pqi_scsi_done(scmd); 6204 } 6205 6206 spin_unlock_irqrestore( 6207 &queue_group->submit_lock[path], flags); 6208 } 6209 } 6210 } 6211 6212 #define PQI_PENDING_IO_WARNING_TIMEOUT_SECS 10 6213 6214 static int pqi_device_wait_for_pending_io(struct pqi_ctrl_info *ctrl_info, 6215 struct pqi_scsi_dev *device, u8 lun, unsigned long timeout_msecs) 6216 { 6217 int cmds_outstanding; 6218 unsigned long start_jiffies; 6219 unsigned long warning_timeout; 6220 unsigned long msecs_waiting; 6221 6222 start_jiffies = jiffies; 6223 warning_timeout = (PQI_PENDING_IO_WARNING_TIMEOUT_SECS * HZ) + start_jiffies; 6224 6225 while ((cmds_outstanding = atomic_read(&device->scsi_cmds_outstanding[lun])) > 0) { 6226 if (ctrl_info->ctrl_removal_state != PQI_CTRL_GRACEFUL_REMOVAL) { 6227 pqi_check_ctrl_health(ctrl_info); 6228 if (pqi_ctrl_offline(ctrl_info)) 6229 return -ENXIO; 6230 } 6231 msecs_waiting = jiffies_to_msecs(jiffies - start_jiffies); 6232 if (msecs_waiting >= timeout_msecs) { 6233 dev_err(&ctrl_info->pci_dev->dev, 6234 "scsi %d:%d:%d:%d: timed out after %lu seconds waiting for %d outstanding command(s)\n", 6235 ctrl_info->scsi_host->host_no, device->bus, device->target, 6236 lun, msecs_waiting / 1000, cmds_outstanding); 6237 return -ETIMEDOUT; 6238 } 6239 if (time_after(jiffies, warning_timeout)) { 6240 dev_warn(&ctrl_info->pci_dev->dev, 6241 "scsi %d:%d:%d:%d: waiting %lu seconds for %d outstanding command(s)\n", 6242 ctrl_info->scsi_host->host_no, device->bus, device->target, 6243 lun, msecs_waiting / 1000, cmds_outstanding); 6244 warning_timeout = (PQI_PENDING_IO_WARNING_TIMEOUT_SECS * HZ) + jiffies; 6245 } 6246 usleep_range(1000, 2000); 6247 } 6248 6249 return 0; 6250 } 6251 6252 static void pqi_lun_reset_complete(struct pqi_io_request *io_request, 6253 void *context) 6254 { 6255 struct completion *waiting = context; 6256 6257 complete(waiting); 6258 } 6259 6260 #define PQI_LUN_RESET_POLL_COMPLETION_SECS 10 6261 6262 static int pqi_wait_for_lun_reset_completion(struct pqi_ctrl_info *ctrl_info, 6263 struct pqi_scsi_dev *device, u8 lun, struct completion *wait) 6264 { 6265 int rc; 6266 unsigned int wait_secs; 6267 int cmds_outstanding; 6268 6269 wait_secs = 0; 6270 6271 while (1) { 6272 if (wait_for_completion_io_timeout(wait, 6273 PQI_LUN_RESET_POLL_COMPLETION_SECS * HZ)) { 6274 rc = 0; 6275 break; 6276 } 6277 6278 pqi_check_ctrl_health(ctrl_info); 6279 if (pqi_ctrl_offline(ctrl_info)) { 6280 rc = -ENXIO; 6281 break; 6282 } 6283 6284 wait_secs += PQI_LUN_RESET_POLL_COMPLETION_SECS; 6285 cmds_outstanding = atomic_read(&device->scsi_cmds_outstanding[lun]); 6286 dev_warn(&ctrl_info->pci_dev->dev, 6287 "scsi %d:%d:%d:%d: waiting %u seconds for LUN reset to complete (%d command(s) outstanding)\n", 6288 ctrl_info->scsi_host->host_no, device->bus, device->target, lun, wait_secs, cmds_outstanding); 6289 } 6290 6291 return rc; 6292 } 6293 6294 #define PQI_LUN_RESET_FIRMWARE_TIMEOUT_SECS 30 6295 6296 static int pqi_lun_reset(struct pqi_ctrl_info *ctrl_info, struct pqi_scsi_dev *device, u8 lun) 6297 { 6298 int rc; 6299 struct pqi_io_request *io_request; 6300 DECLARE_COMPLETION_ONSTACK(wait); 6301 struct pqi_task_management_request *request; 6302 6303 io_request = pqi_alloc_io_request(ctrl_info, NULL); 6304 io_request->io_complete_callback = pqi_lun_reset_complete; 6305 io_request->context = &wait; 6306 6307 request = io_request->iu; 6308 memset(request, 0, sizeof(*request)); 6309 6310 request->header.iu_type = PQI_REQUEST_IU_TASK_MANAGEMENT; 6311 put_unaligned_le16(sizeof(*request) - PQI_REQUEST_HEADER_LENGTH, 6312 &request->header.iu_length); 6313 put_unaligned_le16(io_request->index, &request->request_id); 6314 memcpy(request->lun_number, device->scsi3addr, 6315 sizeof(request->lun_number)); 6316 if (!pqi_is_logical_device(device) && ctrl_info->multi_lun_device_supported) 6317 request->ml_device_lun_number = lun; 6318 request->task_management_function = SOP_TASK_MANAGEMENT_LUN_RESET; 6319 if (ctrl_info->tmf_iu_timeout_supported) 6320 put_unaligned_le16(PQI_LUN_RESET_FIRMWARE_TIMEOUT_SECS, &request->timeout); 6321 6322 pqi_start_io(ctrl_info, &ctrl_info->queue_groups[PQI_DEFAULT_QUEUE_GROUP], RAID_PATH, 6323 io_request); 6324 6325 rc = pqi_wait_for_lun_reset_completion(ctrl_info, device, lun, &wait); 6326 if (rc == 0) 6327 rc = io_request->status; 6328 6329 pqi_free_io_request(io_request); 6330 6331 return rc; 6332 } 6333 6334 #define PQI_LUN_RESET_RETRIES 3 6335 #define PQI_LUN_RESET_RETRY_INTERVAL_MSECS (10 * 1000) 6336 #define PQI_LUN_RESET_PENDING_IO_TIMEOUT_MSECS (10 * 60 * 1000) 6337 #define PQI_LUN_RESET_FAILED_PENDING_IO_TIMEOUT_MSECS (2 * 60 * 1000) 6338 6339 static int pqi_lun_reset_with_retries(struct pqi_ctrl_info *ctrl_info, struct pqi_scsi_dev *device, u8 lun) 6340 { 6341 int reset_rc; 6342 int wait_rc; 6343 unsigned int retries; 6344 unsigned long timeout_msecs; 6345 6346 for (retries = 0;;) { 6347 reset_rc = pqi_lun_reset(ctrl_info, device, lun); 6348 if (reset_rc == 0 || reset_rc == -ENODEV || reset_rc == -ENXIO || ++retries > PQI_LUN_RESET_RETRIES) 6349 break; 6350 msleep(PQI_LUN_RESET_RETRY_INTERVAL_MSECS); 6351 } 6352 6353 timeout_msecs = reset_rc ? PQI_LUN_RESET_FAILED_PENDING_IO_TIMEOUT_MSECS : 6354 PQI_LUN_RESET_PENDING_IO_TIMEOUT_MSECS; 6355 6356 wait_rc = pqi_device_wait_for_pending_io(ctrl_info, device, lun, timeout_msecs); 6357 if (wait_rc && reset_rc == 0) 6358 reset_rc = wait_rc; 6359 6360 return reset_rc == 0 ? SUCCESS : FAILED; 6361 } 6362 6363 static int pqi_device_reset(struct pqi_ctrl_info *ctrl_info, struct pqi_scsi_dev *device, u8 lun) 6364 { 6365 int rc; 6366 6367 pqi_ctrl_block_requests(ctrl_info); 6368 pqi_ctrl_wait_until_quiesced(ctrl_info); 6369 pqi_fail_io_queued_for_device(ctrl_info, device, lun); 6370 rc = pqi_wait_until_inbound_queues_empty(ctrl_info); 6371 pqi_device_reset_start(device, lun); 6372 pqi_ctrl_unblock_requests(ctrl_info); 6373 if (rc) 6374 rc = FAILED; 6375 else 6376 rc = pqi_lun_reset_with_retries(ctrl_info, device, lun); 6377 pqi_device_reset_done(device, lun); 6378 6379 return rc; 6380 } 6381 6382 static int pqi_device_reset_handler(struct pqi_ctrl_info *ctrl_info, struct pqi_scsi_dev *device, u8 lun, struct scsi_cmnd *scmd, u8 scsi_opcode) 6383 { 6384 int rc; 6385 6386 mutex_lock(&ctrl_info->lun_reset_mutex); 6387 6388 dev_err(&ctrl_info->pci_dev->dev, 6389 "resetting scsi %d:%d:%d:%u SCSI cmd at %p due to cmd opcode 0x%02x\n", 6390 ctrl_info->scsi_host->host_no, device->bus, device->target, lun, scmd, scsi_opcode); 6391 6392 pqi_check_ctrl_health(ctrl_info); 6393 if (pqi_ctrl_offline(ctrl_info)) 6394 rc = FAILED; 6395 else 6396 rc = pqi_device_reset(ctrl_info, device, lun); 6397 6398 dev_err(&ctrl_info->pci_dev->dev, 6399 "reset of scsi %d:%d:%d:%u: %s\n", 6400 ctrl_info->scsi_host->host_no, device->bus, device->target, lun, 6401 rc == SUCCESS ? "SUCCESS" : "FAILED"); 6402 6403 mutex_unlock(&ctrl_info->lun_reset_mutex); 6404 6405 return rc; 6406 } 6407 6408 static int pqi_eh_device_reset_handler(struct scsi_cmnd *scmd) 6409 { 6410 struct Scsi_Host *shost; 6411 struct pqi_ctrl_info *ctrl_info; 6412 struct pqi_scsi_dev *device; 6413 u8 scsi_opcode; 6414 6415 shost = scmd->device->host; 6416 ctrl_info = shost_to_hba(shost); 6417 device = scmd->device->hostdata; 6418 scsi_opcode = scmd->cmd_len > 0 ? scmd->cmnd[0] : 0xff; 6419 6420 return pqi_device_reset_handler(ctrl_info, device, (u8)scmd->device->lun, scmd, scsi_opcode); 6421 } 6422 6423 static void pqi_tmf_worker(struct work_struct *work) 6424 { 6425 struct pqi_tmf_work *tmf_work; 6426 struct scsi_cmnd *scmd; 6427 6428 tmf_work = container_of(work, struct pqi_tmf_work, work_struct); 6429 scmd = (struct scsi_cmnd *)xchg(&tmf_work->scmd, NULL); 6430 6431 pqi_device_reset_handler(tmf_work->ctrl_info, tmf_work->device, tmf_work->lun, scmd, tmf_work->scsi_opcode); 6432 } 6433 6434 static int pqi_eh_abort_handler(struct scsi_cmnd *scmd) 6435 { 6436 struct Scsi_Host *shost; 6437 struct pqi_ctrl_info *ctrl_info; 6438 struct pqi_scsi_dev *device; 6439 struct pqi_tmf_work *tmf_work; 6440 DECLARE_COMPLETION_ONSTACK(wait); 6441 6442 shost = scmd->device->host; 6443 ctrl_info = shost_to_hba(shost); 6444 device = scmd->device->hostdata; 6445 6446 dev_err(&ctrl_info->pci_dev->dev, 6447 "attempting TASK ABORT on scsi %d:%d:%d:%d for SCSI cmd at %p\n", 6448 shost->host_no, device->bus, device->target, (int)scmd->device->lun, scmd); 6449 6450 if (cmpxchg(&scmd->host_scribble, PQI_NO_COMPLETION, (void *)&wait) == NULL) { 6451 dev_err(&ctrl_info->pci_dev->dev, 6452 "scsi %d:%d:%d:%d for SCSI cmd at %p already completed\n", 6453 shost->host_no, device->bus, device->target, (int)scmd->device->lun, scmd); 6454 scmd->result = DID_RESET << 16; 6455 goto out; 6456 } 6457 6458 tmf_work = &device->tmf_work[scmd->device->lun]; 6459 6460 if (cmpxchg(&tmf_work->scmd, NULL, scmd) == NULL) { 6461 tmf_work->ctrl_info = ctrl_info; 6462 tmf_work->device = device; 6463 tmf_work->lun = (u8)scmd->device->lun; 6464 tmf_work->scsi_opcode = scmd->cmd_len > 0 ? scmd->cmnd[0] : 0xff; 6465 schedule_work(&tmf_work->work_struct); 6466 } 6467 6468 wait_for_completion(&wait); 6469 6470 dev_err(&ctrl_info->pci_dev->dev, 6471 "TASK ABORT on scsi %d:%d:%d:%d for SCSI cmd at %p: SUCCESS\n", 6472 shost->host_no, device->bus, device->target, (int)scmd->device->lun, scmd); 6473 6474 out: 6475 6476 return SUCCESS; 6477 } 6478 6479 static int pqi_slave_alloc(struct scsi_device *sdev) 6480 { 6481 struct pqi_scsi_dev *device; 6482 unsigned long flags; 6483 struct pqi_ctrl_info *ctrl_info; 6484 struct scsi_target *starget; 6485 struct sas_rphy *rphy; 6486 6487 ctrl_info = shost_to_hba(sdev->host); 6488 6489 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 6490 6491 if (sdev_channel(sdev) == PQI_PHYSICAL_DEVICE_BUS) { 6492 starget = scsi_target(sdev); 6493 rphy = target_to_rphy(starget); 6494 device = pqi_find_device_by_sas_rphy(ctrl_info, rphy); 6495 if (device) { 6496 if (device->target_lun_valid) { 6497 device->ignore_device = true; 6498 } else { 6499 device->target = sdev_id(sdev); 6500 device->lun = sdev->lun; 6501 device->target_lun_valid = true; 6502 } 6503 } 6504 } else { 6505 device = pqi_find_scsi_dev(ctrl_info, sdev_channel(sdev), 6506 sdev_id(sdev), sdev->lun); 6507 } 6508 6509 if (device) { 6510 sdev->hostdata = device; 6511 device->sdev = sdev; 6512 if (device->queue_depth) { 6513 device->advertised_queue_depth = device->queue_depth; 6514 scsi_change_queue_depth(sdev, 6515 device->advertised_queue_depth); 6516 } 6517 if (pqi_is_logical_device(device)) { 6518 pqi_disable_write_same(sdev); 6519 } else { 6520 sdev->allow_restart = 1; 6521 if (device->device_type == SA_DEVICE_TYPE_NVME) 6522 pqi_disable_write_same(sdev); 6523 } 6524 } 6525 6526 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 6527 6528 return 0; 6529 } 6530 6531 static void pqi_map_queues(struct Scsi_Host *shost) 6532 { 6533 struct pqi_ctrl_info *ctrl_info = shost_to_hba(shost); 6534 6535 if (!ctrl_info->disable_managed_interrupts) 6536 return blk_mq_pci_map_queues(&shost->tag_set.map[HCTX_TYPE_DEFAULT], 6537 ctrl_info->pci_dev, 0); 6538 else 6539 return blk_mq_map_queues(&shost->tag_set.map[HCTX_TYPE_DEFAULT]); 6540 } 6541 6542 static inline bool pqi_is_tape_changer_device(struct pqi_scsi_dev *device) 6543 { 6544 return device->devtype == TYPE_TAPE || device->devtype == TYPE_MEDIUM_CHANGER; 6545 } 6546 6547 static int pqi_slave_configure(struct scsi_device *sdev) 6548 { 6549 int rc = 0; 6550 struct pqi_scsi_dev *device; 6551 6552 device = sdev->hostdata; 6553 device->devtype = sdev->type; 6554 6555 if (pqi_is_tape_changer_device(device) && device->ignore_device) { 6556 rc = -ENXIO; 6557 device->ignore_device = false; 6558 } 6559 6560 return rc; 6561 } 6562 6563 static void pqi_slave_destroy(struct scsi_device *sdev) 6564 { 6565 struct pqi_ctrl_info *ctrl_info; 6566 struct pqi_scsi_dev *device; 6567 int mutex_acquired; 6568 unsigned long flags; 6569 6570 ctrl_info = shost_to_hba(sdev->host); 6571 6572 mutex_acquired = mutex_trylock(&ctrl_info->scan_mutex); 6573 if (!mutex_acquired) 6574 return; 6575 6576 device = sdev->hostdata; 6577 if (!device) { 6578 mutex_unlock(&ctrl_info->scan_mutex); 6579 return; 6580 } 6581 6582 device->lun_count--; 6583 if (device->lun_count > 0) { 6584 mutex_unlock(&ctrl_info->scan_mutex); 6585 return; 6586 } 6587 6588 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 6589 list_del(&device->scsi_device_list_entry); 6590 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 6591 6592 mutex_unlock(&ctrl_info->scan_mutex); 6593 6594 pqi_dev_info(ctrl_info, "removed", device); 6595 pqi_free_device(device); 6596 } 6597 6598 static int pqi_getpciinfo_ioctl(struct pqi_ctrl_info *ctrl_info, void __user *arg) 6599 { 6600 struct pci_dev *pci_dev; 6601 u32 subsystem_vendor; 6602 u32 subsystem_device; 6603 cciss_pci_info_struct pci_info; 6604 6605 if (!arg) 6606 return -EINVAL; 6607 6608 pci_dev = ctrl_info->pci_dev; 6609 6610 pci_info.domain = pci_domain_nr(pci_dev->bus); 6611 pci_info.bus = pci_dev->bus->number; 6612 pci_info.dev_fn = pci_dev->devfn; 6613 subsystem_vendor = pci_dev->subsystem_vendor; 6614 subsystem_device = pci_dev->subsystem_device; 6615 pci_info.board_id = ((subsystem_device << 16) & 0xffff0000) | subsystem_vendor; 6616 6617 if (copy_to_user(arg, &pci_info, sizeof(pci_info))) 6618 return -EFAULT; 6619 6620 return 0; 6621 } 6622 6623 static int pqi_getdrivver_ioctl(void __user *arg) 6624 { 6625 u32 version; 6626 6627 if (!arg) 6628 return -EINVAL; 6629 6630 version = (DRIVER_MAJOR << 28) | (DRIVER_MINOR << 24) | 6631 (DRIVER_RELEASE << 16) | DRIVER_REVISION; 6632 6633 if (copy_to_user(arg, &version, sizeof(version))) 6634 return -EFAULT; 6635 6636 return 0; 6637 } 6638 6639 struct ciss_error_info { 6640 u8 scsi_status; 6641 int command_status; 6642 size_t sense_data_length; 6643 }; 6644 6645 static void pqi_error_info_to_ciss(struct pqi_raid_error_info *pqi_error_info, 6646 struct ciss_error_info *ciss_error_info) 6647 { 6648 int ciss_cmd_status; 6649 size_t sense_data_length; 6650 6651 switch (pqi_error_info->data_out_result) { 6652 case PQI_DATA_IN_OUT_GOOD: 6653 ciss_cmd_status = CISS_CMD_STATUS_SUCCESS; 6654 break; 6655 case PQI_DATA_IN_OUT_UNDERFLOW: 6656 ciss_cmd_status = CISS_CMD_STATUS_DATA_UNDERRUN; 6657 break; 6658 case PQI_DATA_IN_OUT_BUFFER_OVERFLOW: 6659 ciss_cmd_status = CISS_CMD_STATUS_DATA_OVERRUN; 6660 break; 6661 case PQI_DATA_IN_OUT_PROTOCOL_ERROR: 6662 case PQI_DATA_IN_OUT_BUFFER_ERROR: 6663 case PQI_DATA_IN_OUT_BUFFER_OVERFLOW_DESCRIPTOR_AREA: 6664 case PQI_DATA_IN_OUT_BUFFER_OVERFLOW_BRIDGE: 6665 case PQI_DATA_IN_OUT_ERROR: 6666 ciss_cmd_status = CISS_CMD_STATUS_PROTOCOL_ERROR; 6667 break; 6668 case PQI_DATA_IN_OUT_HARDWARE_ERROR: 6669 case PQI_DATA_IN_OUT_PCIE_FABRIC_ERROR: 6670 case PQI_DATA_IN_OUT_PCIE_COMPLETION_TIMEOUT: 6671 case PQI_DATA_IN_OUT_PCIE_COMPLETER_ABORT_RECEIVED: 6672 case PQI_DATA_IN_OUT_PCIE_UNSUPPORTED_REQUEST_RECEIVED: 6673 case PQI_DATA_IN_OUT_PCIE_ECRC_CHECK_FAILED: 6674 case PQI_DATA_IN_OUT_PCIE_UNSUPPORTED_REQUEST: 6675 case PQI_DATA_IN_OUT_PCIE_ACS_VIOLATION: 6676 case PQI_DATA_IN_OUT_PCIE_TLP_PREFIX_BLOCKED: 6677 case PQI_DATA_IN_OUT_PCIE_POISONED_MEMORY_READ: 6678 ciss_cmd_status = CISS_CMD_STATUS_HARDWARE_ERROR; 6679 break; 6680 case PQI_DATA_IN_OUT_UNSOLICITED_ABORT: 6681 ciss_cmd_status = CISS_CMD_STATUS_UNSOLICITED_ABORT; 6682 break; 6683 case PQI_DATA_IN_OUT_ABORTED: 6684 ciss_cmd_status = CISS_CMD_STATUS_ABORTED; 6685 break; 6686 case PQI_DATA_IN_OUT_TIMEOUT: 6687 ciss_cmd_status = CISS_CMD_STATUS_TIMEOUT; 6688 break; 6689 default: 6690 ciss_cmd_status = CISS_CMD_STATUS_TARGET_STATUS; 6691 break; 6692 } 6693 6694 sense_data_length = 6695 get_unaligned_le16(&pqi_error_info->sense_data_length); 6696 if (sense_data_length == 0) 6697 sense_data_length = 6698 get_unaligned_le16(&pqi_error_info->response_data_length); 6699 if (sense_data_length) 6700 if (sense_data_length > sizeof(pqi_error_info->data)) 6701 sense_data_length = sizeof(pqi_error_info->data); 6702 6703 ciss_error_info->scsi_status = pqi_error_info->status; 6704 ciss_error_info->command_status = ciss_cmd_status; 6705 ciss_error_info->sense_data_length = sense_data_length; 6706 } 6707 6708 static int pqi_passthru_ioctl(struct pqi_ctrl_info *ctrl_info, void __user *arg) 6709 { 6710 int rc; 6711 char *kernel_buffer = NULL; 6712 u16 iu_length; 6713 size_t sense_data_length; 6714 IOCTL_Command_struct iocommand; 6715 struct pqi_raid_path_request request; 6716 struct pqi_raid_error_info pqi_error_info; 6717 struct ciss_error_info ciss_error_info; 6718 6719 if (pqi_ctrl_offline(ctrl_info)) 6720 return -ENXIO; 6721 if (pqi_ofa_in_progress(ctrl_info) && pqi_ctrl_blocked(ctrl_info)) 6722 return -EBUSY; 6723 if (!arg) 6724 return -EINVAL; 6725 if (!capable(CAP_SYS_RAWIO)) 6726 return -EPERM; 6727 if (copy_from_user(&iocommand, arg, sizeof(iocommand))) 6728 return -EFAULT; 6729 if (iocommand.buf_size < 1 && 6730 iocommand.Request.Type.Direction != XFER_NONE) 6731 return -EINVAL; 6732 if (iocommand.Request.CDBLen > sizeof(request.cdb)) 6733 return -EINVAL; 6734 if (iocommand.Request.Type.Type != TYPE_CMD) 6735 return -EINVAL; 6736 6737 switch (iocommand.Request.Type.Direction) { 6738 case XFER_NONE: 6739 case XFER_WRITE: 6740 case XFER_READ: 6741 case XFER_READ | XFER_WRITE: 6742 break; 6743 default: 6744 return -EINVAL; 6745 } 6746 6747 if (iocommand.buf_size > 0) { 6748 kernel_buffer = kmalloc(iocommand.buf_size, GFP_KERNEL); 6749 if (!kernel_buffer) 6750 return -ENOMEM; 6751 if (iocommand.Request.Type.Direction & XFER_WRITE) { 6752 if (copy_from_user(kernel_buffer, iocommand.buf, 6753 iocommand.buf_size)) { 6754 rc = -EFAULT; 6755 goto out; 6756 } 6757 } else { 6758 memset(kernel_buffer, 0, iocommand.buf_size); 6759 } 6760 } 6761 6762 memset(&request, 0, sizeof(request)); 6763 6764 request.header.iu_type = PQI_REQUEST_IU_RAID_PATH_IO; 6765 iu_length = offsetof(struct pqi_raid_path_request, sg_descriptors) - 6766 PQI_REQUEST_HEADER_LENGTH; 6767 memcpy(request.lun_number, iocommand.LUN_info.LunAddrBytes, 6768 sizeof(request.lun_number)); 6769 memcpy(request.cdb, iocommand.Request.CDB, iocommand.Request.CDBLen); 6770 request.additional_cdb_bytes_usage = SOP_ADDITIONAL_CDB_BYTES_0; 6771 6772 switch (iocommand.Request.Type.Direction) { 6773 case XFER_NONE: 6774 request.data_direction = SOP_NO_DIRECTION_FLAG; 6775 break; 6776 case XFER_WRITE: 6777 request.data_direction = SOP_WRITE_FLAG; 6778 break; 6779 case XFER_READ: 6780 request.data_direction = SOP_READ_FLAG; 6781 break; 6782 case XFER_READ | XFER_WRITE: 6783 request.data_direction = SOP_BIDIRECTIONAL; 6784 break; 6785 } 6786 6787 request.task_attribute = SOP_TASK_ATTRIBUTE_SIMPLE; 6788 6789 if (iocommand.buf_size > 0) { 6790 put_unaligned_le32(iocommand.buf_size, &request.buffer_length); 6791 6792 rc = pqi_map_single(ctrl_info->pci_dev, 6793 &request.sg_descriptors[0], kernel_buffer, 6794 iocommand.buf_size, DMA_BIDIRECTIONAL); 6795 if (rc) 6796 goto out; 6797 6798 iu_length += sizeof(request.sg_descriptors[0]); 6799 } 6800 6801 put_unaligned_le16(iu_length, &request.header.iu_length); 6802 6803 if (ctrl_info->raid_iu_timeout_supported) 6804 put_unaligned_le32(iocommand.Request.Timeout, &request.timeout); 6805 6806 rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 6807 PQI_SYNC_FLAGS_INTERRUPTABLE, &pqi_error_info); 6808 6809 if (iocommand.buf_size > 0) 6810 pqi_pci_unmap(ctrl_info->pci_dev, request.sg_descriptors, 1, 6811 DMA_BIDIRECTIONAL); 6812 6813 memset(&iocommand.error_info, 0, sizeof(iocommand.error_info)); 6814 6815 if (rc == 0) { 6816 pqi_error_info_to_ciss(&pqi_error_info, &ciss_error_info); 6817 iocommand.error_info.ScsiStatus = ciss_error_info.scsi_status; 6818 iocommand.error_info.CommandStatus = 6819 ciss_error_info.command_status; 6820 sense_data_length = ciss_error_info.sense_data_length; 6821 if (sense_data_length) { 6822 if (sense_data_length > 6823 sizeof(iocommand.error_info.SenseInfo)) 6824 sense_data_length = 6825 sizeof(iocommand.error_info.SenseInfo); 6826 memcpy(iocommand.error_info.SenseInfo, 6827 pqi_error_info.data, sense_data_length); 6828 iocommand.error_info.SenseLen = sense_data_length; 6829 } 6830 } 6831 6832 if (copy_to_user(arg, &iocommand, sizeof(iocommand))) { 6833 rc = -EFAULT; 6834 goto out; 6835 } 6836 6837 if (rc == 0 && iocommand.buf_size > 0 && 6838 (iocommand.Request.Type.Direction & XFER_READ)) { 6839 if (copy_to_user(iocommand.buf, kernel_buffer, 6840 iocommand.buf_size)) { 6841 rc = -EFAULT; 6842 } 6843 } 6844 6845 out: 6846 kfree(kernel_buffer); 6847 6848 return rc; 6849 } 6850 6851 static int pqi_ioctl(struct scsi_device *sdev, unsigned int cmd, 6852 void __user *arg) 6853 { 6854 int rc; 6855 struct pqi_ctrl_info *ctrl_info; 6856 6857 ctrl_info = shost_to_hba(sdev->host); 6858 6859 switch (cmd) { 6860 case CCISS_DEREGDISK: 6861 case CCISS_REGNEWDISK: 6862 case CCISS_REGNEWD: 6863 rc = pqi_scan_scsi_devices(ctrl_info); 6864 break; 6865 case CCISS_GETPCIINFO: 6866 rc = pqi_getpciinfo_ioctl(ctrl_info, arg); 6867 break; 6868 case CCISS_GETDRIVVER: 6869 rc = pqi_getdrivver_ioctl(arg); 6870 break; 6871 case CCISS_PASSTHRU: 6872 rc = pqi_passthru_ioctl(ctrl_info, arg); 6873 break; 6874 default: 6875 rc = -EINVAL; 6876 break; 6877 } 6878 6879 return rc; 6880 } 6881 6882 static ssize_t pqi_firmware_version_show(struct device *dev, 6883 struct device_attribute *attr, char *buffer) 6884 { 6885 struct Scsi_Host *shost; 6886 struct pqi_ctrl_info *ctrl_info; 6887 6888 shost = class_to_shost(dev); 6889 ctrl_info = shost_to_hba(shost); 6890 6891 return scnprintf(buffer, PAGE_SIZE, "%s\n", ctrl_info->firmware_version); 6892 } 6893 6894 static ssize_t pqi_driver_version_show(struct device *dev, 6895 struct device_attribute *attr, char *buffer) 6896 { 6897 return scnprintf(buffer, PAGE_SIZE, "%s\n", DRIVER_VERSION BUILD_TIMESTAMP); 6898 } 6899 6900 static ssize_t pqi_serial_number_show(struct device *dev, 6901 struct device_attribute *attr, char *buffer) 6902 { 6903 struct Scsi_Host *shost; 6904 struct pqi_ctrl_info *ctrl_info; 6905 6906 shost = class_to_shost(dev); 6907 ctrl_info = shost_to_hba(shost); 6908 6909 return scnprintf(buffer, PAGE_SIZE, "%s\n", ctrl_info->serial_number); 6910 } 6911 6912 static ssize_t pqi_model_show(struct device *dev, 6913 struct device_attribute *attr, char *buffer) 6914 { 6915 struct Scsi_Host *shost; 6916 struct pqi_ctrl_info *ctrl_info; 6917 6918 shost = class_to_shost(dev); 6919 ctrl_info = shost_to_hba(shost); 6920 6921 return scnprintf(buffer, PAGE_SIZE, "%s\n", ctrl_info->model); 6922 } 6923 6924 static ssize_t pqi_vendor_show(struct device *dev, 6925 struct device_attribute *attr, char *buffer) 6926 { 6927 struct Scsi_Host *shost; 6928 struct pqi_ctrl_info *ctrl_info; 6929 6930 shost = class_to_shost(dev); 6931 ctrl_info = shost_to_hba(shost); 6932 6933 return scnprintf(buffer, PAGE_SIZE, "%s\n", ctrl_info->vendor); 6934 } 6935 6936 static ssize_t pqi_host_rescan_store(struct device *dev, 6937 struct device_attribute *attr, const char *buffer, size_t count) 6938 { 6939 struct Scsi_Host *shost = class_to_shost(dev); 6940 6941 pqi_scan_start(shost); 6942 6943 return count; 6944 } 6945 6946 static ssize_t pqi_lockup_action_show(struct device *dev, 6947 struct device_attribute *attr, char *buffer) 6948 { 6949 int count = 0; 6950 unsigned int i; 6951 6952 for (i = 0; i < ARRAY_SIZE(pqi_lockup_actions); i++) { 6953 if (pqi_lockup_actions[i].action == pqi_lockup_action) 6954 count += scnprintf(buffer + count, PAGE_SIZE - count, 6955 "[%s] ", pqi_lockup_actions[i].name); 6956 else 6957 count += scnprintf(buffer + count, PAGE_SIZE - count, 6958 "%s ", pqi_lockup_actions[i].name); 6959 } 6960 6961 count += scnprintf(buffer + count, PAGE_SIZE - count, "\n"); 6962 6963 return count; 6964 } 6965 6966 static ssize_t pqi_lockup_action_store(struct device *dev, 6967 struct device_attribute *attr, const char *buffer, size_t count) 6968 { 6969 unsigned int i; 6970 char *action_name; 6971 char action_name_buffer[32]; 6972 6973 strscpy(action_name_buffer, buffer, sizeof(action_name_buffer)); 6974 action_name = strstrip(action_name_buffer); 6975 6976 for (i = 0; i < ARRAY_SIZE(pqi_lockup_actions); i++) { 6977 if (strcmp(action_name, pqi_lockup_actions[i].name) == 0) { 6978 pqi_lockup_action = pqi_lockup_actions[i].action; 6979 return count; 6980 } 6981 } 6982 6983 return -EINVAL; 6984 } 6985 6986 static ssize_t pqi_host_enable_stream_detection_show(struct device *dev, 6987 struct device_attribute *attr, char *buffer) 6988 { 6989 struct Scsi_Host *shost = class_to_shost(dev); 6990 struct pqi_ctrl_info *ctrl_info = shost_to_hba(shost); 6991 6992 return scnprintf(buffer, 10, "%x\n", 6993 ctrl_info->enable_stream_detection); 6994 } 6995 6996 static ssize_t pqi_host_enable_stream_detection_store(struct device *dev, 6997 struct device_attribute *attr, const char *buffer, size_t count) 6998 { 6999 struct Scsi_Host *shost = class_to_shost(dev); 7000 struct pqi_ctrl_info *ctrl_info = shost_to_hba(shost); 7001 u8 set_stream_detection = 0; 7002 7003 if (kstrtou8(buffer, 0, &set_stream_detection)) 7004 return -EINVAL; 7005 7006 if (set_stream_detection > 0) 7007 set_stream_detection = 1; 7008 7009 ctrl_info->enable_stream_detection = set_stream_detection; 7010 7011 return count; 7012 } 7013 7014 static ssize_t pqi_host_enable_r5_writes_show(struct device *dev, 7015 struct device_attribute *attr, char *buffer) 7016 { 7017 struct Scsi_Host *shost = class_to_shost(dev); 7018 struct pqi_ctrl_info *ctrl_info = shost_to_hba(shost); 7019 7020 return scnprintf(buffer, 10, "%x\n", ctrl_info->enable_r5_writes); 7021 } 7022 7023 static ssize_t pqi_host_enable_r5_writes_store(struct device *dev, 7024 struct device_attribute *attr, const char *buffer, size_t count) 7025 { 7026 struct Scsi_Host *shost = class_to_shost(dev); 7027 struct pqi_ctrl_info *ctrl_info = shost_to_hba(shost); 7028 u8 set_r5_writes = 0; 7029 7030 if (kstrtou8(buffer, 0, &set_r5_writes)) 7031 return -EINVAL; 7032 7033 if (set_r5_writes > 0) 7034 set_r5_writes = 1; 7035 7036 ctrl_info->enable_r5_writes = set_r5_writes; 7037 7038 return count; 7039 } 7040 7041 static ssize_t pqi_host_enable_r6_writes_show(struct device *dev, 7042 struct device_attribute *attr, char *buffer) 7043 { 7044 struct Scsi_Host *shost = class_to_shost(dev); 7045 struct pqi_ctrl_info *ctrl_info = shost_to_hba(shost); 7046 7047 return scnprintf(buffer, 10, "%x\n", ctrl_info->enable_r6_writes); 7048 } 7049 7050 static ssize_t pqi_host_enable_r6_writes_store(struct device *dev, 7051 struct device_attribute *attr, const char *buffer, size_t count) 7052 { 7053 struct Scsi_Host *shost = class_to_shost(dev); 7054 struct pqi_ctrl_info *ctrl_info = shost_to_hba(shost); 7055 u8 set_r6_writes = 0; 7056 7057 if (kstrtou8(buffer, 0, &set_r6_writes)) 7058 return -EINVAL; 7059 7060 if (set_r6_writes > 0) 7061 set_r6_writes = 1; 7062 7063 ctrl_info->enable_r6_writes = set_r6_writes; 7064 7065 return count; 7066 } 7067 7068 static DEVICE_ATTR(driver_version, 0444, pqi_driver_version_show, NULL); 7069 static DEVICE_ATTR(firmware_version, 0444, pqi_firmware_version_show, NULL); 7070 static DEVICE_ATTR(model, 0444, pqi_model_show, NULL); 7071 static DEVICE_ATTR(serial_number, 0444, pqi_serial_number_show, NULL); 7072 static DEVICE_ATTR(vendor, 0444, pqi_vendor_show, NULL); 7073 static DEVICE_ATTR(rescan, 0200, NULL, pqi_host_rescan_store); 7074 static DEVICE_ATTR(lockup_action, 0644, pqi_lockup_action_show, 7075 pqi_lockup_action_store); 7076 static DEVICE_ATTR(enable_stream_detection, 0644, 7077 pqi_host_enable_stream_detection_show, 7078 pqi_host_enable_stream_detection_store); 7079 static DEVICE_ATTR(enable_r5_writes, 0644, 7080 pqi_host_enable_r5_writes_show, pqi_host_enable_r5_writes_store); 7081 static DEVICE_ATTR(enable_r6_writes, 0644, 7082 pqi_host_enable_r6_writes_show, pqi_host_enable_r6_writes_store); 7083 7084 static struct attribute *pqi_shost_attrs[] = { 7085 &dev_attr_driver_version.attr, 7086 &dev_attr_firmware_version.attr, 7087 &dev_attr_model.attr, 7088 &dev_attr_serial_number.attr, 7089 &dev_attr_vendor.attr, 7090 &dev_attr_rescan.attr, 7091 &dev_attr_lockup_action.attr, 7092 &dev_attr_enable_stream_detection.attr, 7093 &dev_attr_enable_r5_writes.attr, 7094 &dev_attr_enable_r6_writes.attr, 7095 NULL 7096 }; 7097 7098 ATTRIBUTE_GROUPS(pqi_shost); 7099 7100 static ssize_t pqi_unique_id_show(struct device *dev, 7101 struct device_attribute *attr, char *buffer) 7102 { 7103 struct pqi_ctrl_info *ctrl_info; 7104 struct scsi_device *sdev; 7105 struct pqi_scsi_dev *device; 7106 unsigned long flags; 7107 u8 unique_id[16]; 7108 7109 sdev = to_scsi_device(dev); 7110 ctrl_info = shost_to_hba(sdev->host); 7111 7112 if (pqi_ctrl_offline(ctrl_info)) 7113 return -ENODEV; 7114 7115 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 7116 7117 device = sdev->hostdata; 7118 if (!device) { 7119 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 7120 return -ENODEV; 7121 } 7122 7123 if (device->is_physical_device) 7124 memcpy(unique_id, device->wwid, sizeof(device->wwid)); 7125 else 7126 memcpy(unique_id, device->volume_id, sizeof(device->volume_id)); 7127 7128 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 7129 7130 return scnprintf(buffer, PAGE_SIZE, 7131 "%02X%02X%02X%02X%02X%02X%02X%02X" 7132 "%02X%02X%02X%02X%02X%02X%02X%02X\n", 7133 unique_id[0], unique_id[1], unique_id[2], unique_id[3], 7134 unique_id[4], unique_id[5], unique_id[6], unique_id[7], 7135 unique_id[8], unique_id[9], unique_id[10], unique_id[11], 7136 unique_id[12], unique_id[13], unique_id[14], unique_id[15]); 7137 } 7138 7139 static ssize_t pqi_lunid_show(struct device *dev, 7140 struct device_attribute *attr, char *buffer) 7141 { 7142 struct pqi_ctrl_info *ctrl_info; 7143 struct scsi_device *sdev; 7144 struct pqi_scsi_dev *device; 7145 unsigned long flags; 7146 u8 lunid[8]; 7147 7148 sdev = to_scsi_device(dev); 7149 ctrl_info = shost_to_hba(sdev->host); 7150 7151 if (pqi_ctrl_offline(ctrl_info)) 7152 return -ENODEV; 7153 7154 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 7155 7156 device = sdev->hostdata; 7157 if (!device) { 7158 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 7159 return -ENODEV; 7160 } 7161 7162 memcpy(lunid, device->scsi3addr, sizeof(lunid)); 7163 7164 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 7165 7166 return scnprintf(buffer, PAGE_SIZE, "0x%8phN\n", lunid); 7167 } 7168 7169 #define MAX_PATHS 8 7170 7171 static ssize_t pqi_path_info_show(struct device *dev, 7172 struct device_attribute *attr, char *buf) 7173 { 7174 struct pqi_ctrl_info *ctrl_info; 7175 struct scsi_device *sdev; 7176 struct pqi_scsi_dev *device; 7177 unsigned long flags; 7178 int i; 7179 int output_len = 0; 7180 u8 box; 7181 u8 bay; 7182 u8 path_map_index; 7183 char *active; 7184 u8 phys_connector[2]; 7185 7186 sdev = to_scsi_device(dev); 7187 ctrl_info = shost_to_hba(sdev->host); 7188 7189 if (pqi_ctrl_offline(ctrl_info)) 7190 return -ENODEV; 7191 7192 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 7193 7194 device = sdev->hostdata; 7195 if (!device) { 7196 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 7197 return -ENODEV; 7198 } 7199 7200 bay = device->bay; 7201 for (i = 0; i < MAX_PATHS; i++) { 7202 path_map_index = 1 << i; 7203 if (i == device->active_path_index) 7204 active = "Active"; 7205 else if (device->path_map & path_map_index) 7206 active = "Inactive"; 7207 else 7208 continue; 7209 7210 output_len += scnprintf(buf + output_len, 7211 PAGE_SIZE - output_len, 7212 "[%d:%d:%d:%d] %20.20s ", 7213 ctrl_info->scsi_host->host_no, 7214 device->bus, device->target, 7215 device->lun, 7216 scsi_device_type(device->devtype)); 7217 7218 if (device->devtype == TYPE_RAID || 7219 pqi_is_logical_device(device)) 7220 goto end_buffer; 7221 7222 memcpy(&phys_connector, &device->phys_connector[i], 7223 sizeof(phys_connector)); 7224 if (phys_connector[0] < '0') 7225 phys_connector[0] = '0'; 7226 if (phys_connector[1] < '0') 7227 phys_connector[1] = '0'; 7228 7229 output_len += scnprintf(buf + output_len, 7230 PAGE_SIZE - output_len, 7231 "PORT: %.2s ", phys_connector); 7232 7233 box = device->box[i]; 7234 if (box != 0 && box != 0xFF) 7235 output_len += scnprintf(buf + output_len, 7236 PAGE_SIZE - output_len, 7237 "BOX: %hhu ", box); 7238 7239 if ((device->devtype == TYPE_DISK || 7240 device->devtype == TYPE_ZBC) && 7241 pqi_expose_device(device)) 7242 output_len += scnprintf(buf + output_len, 7243 PAGE_SIZE - output_len, 7244 "BAY: %hhu ", bay); 7245 7246 end_buffer: 7247 output_len += scnprintf(buf + output_len, 7248 PAGE_SIZE - output_len, 7249 "%s\n", active); 7250 } 7251 7252 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 7253 7254 return output_len; 7255 } 7256 7257 static ssize_t pqi_sas_address_show(struct device *dev, 7258 struct device_attribute *attr, char *buffer) 7259 { 7260 struct pqi_ctrl_info *ctrl_info; 7261 struct scsi_device *sdev; 7262 struct pqi_scsi_dev *device; 7263 unsigned long flags; 7264 u64 sas_address; 7265 7266 sdev = to_scsi_device(dev); 7267 ctrl_info = shost_to_hba(sdev->host); 7268 7269 if (pqi_ctrl_offline(ctrl_info)) 7270 return -ENODEV; 7271 7272 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 7273 7274 device = sdev->hostdata; 7275 if (!device) { 7276 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 7277 return -ENODEV; 7278 } 7279 7280 sas_address = device->sas_address; 7281 7282 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 7283 7284 return scnprintf(buffer, PAGE_SIZE, "0x%016llx\n", sas_address); 7285 } 7286 7287 static ssize_t pqi_ssd_smart_path_enabled_show(struct device *dev, 7288 struct device_attribute *attr, char *buffer) 7289 { 7290 struct pqi_ctrl_info *ctrl_info; 7291 struct scsi_device *sdev; 7292 struct pqi_scsi_dev *device; 7293 unsigned long flags; 7294 7295 sdev = to_scsi_device(dev); 7296 ctrl_info = shost_to_hba(sdev->host); 7297 7298 if (pqi_ctrl_offline(ctrl_info)) 7299 return -ENODEV; 7300 7301 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 7302 7303 device = sdev->hostdata; 7304 if (!device) { 7305 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 7306 return -ENODEV; 7307 } 7308 7309 buffer[0] = device->raid_bypass_enabled ? '1' : '0'; 7310 buffer[1] = '\n'; 7311 buffer[2] = '\0'; 7312 7313 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 7314 7315 return 2; 7316 } 7317 7318 static ssize_t pqi_raid_level_show(struct device *dev, 7319 struct device_attribute *attr, char *buffer) 7320 { 7321 struct pqi_ctrl_info *ctrl_info; 7322 struct scsi_device *sdev; 7323 struct pqi_scsi_dev *device; 7324 unsigned long flags; 7325 char *raid_level; 7326 7327 sdev = to_scsi_device(dev); 7328 ctrl_info = shost_to_hba(sdev->host); 7329 7330 if (pqi_ctrl_offline(ctrl_info)) 7331 return -ENODEV; 7332 7333 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 7334 7335 device = sdev->hostdata; 7336 if (!device) { 7337 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 7338 return -ENODEV; 7339 } 7340 7341 if (pqi_is_logical_device(device) && device->devtype == TYPE_DISK) 7342 raid_level = pqi_raid_level_to_string(device->raid_level); 7343 else 7344 raid_level = "N/A"; 7345 7346 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 7347 7348 return scnprintf(buffer, PAGE_SIZE, "%s\n", raid_level); 7349 } 7350 7351 static ssize_t pqi_raid_bypass_cnt_show(struct device *dev, 7352 struct device_attribute *attr, char *buffer) 7353 { 7354 struct pqi_ctrl_info *ctrl_info; 7355 struct scsi_device *sdev; 7356 struct pqi_scsi_dev *device; 7357 unsigned long flags; 7358 unsigned int raid_bypass_cnt; 7359 7360 sdev = to_scsi_device(dev); 7361 ctrl_info = shost_to_hba(sdev->host); 7362 7363 if (pqi_ctrl_offline(ctrl_info)) 7364 return -ENODEV; 7365 7366 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 7367 7368 device = sdev->hostdata; 7369 if (!device) { 7370 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 7371 return -ENODEV; 7372 } 7373 7374 raid_bypass_cnt = device->raid_bypass_cnt; 7375 7376 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 7377 7378 return scnprintf(buffer, PAGE_SIZE, "0x%x\n", raid_bypass_cnt); 7379 } 7380 7381 static ssize_t pqi_sas_ncq_prio_enable_show(struct device *dev, 7382 struct device_attribute *attr, char *buf) 7383 { 7384 struct pqi_ctrl_info *ctrl_info; 7385 struct scsi_device *sdev; 7386 struct pqi_scsi_dev *device; 7387 unsigned long flags; 7388 int output_len = 0; 7389 7390 sdev = to_scsi_device(dev); 7391 ctrl_info = shost_to_hba(sdev->host); 7392 7393 if (pqi_ctrl_offline(ctrl_info)) 7394 return -ENODEV; 7395 7396 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 7397 7398 device = sdev->hostdata; 7399 if (!device) { 7400 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 7401 return -ENODEV; 7402 } 7403 7404 output_len = snprintf(buf, PAGE_SIZE, "%d\n", 7405 device->ncq_prio_enable); 7406 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 7407 7408 return output_len; 7409 } 7410 7411 static ssize_t pqi_sas_ncq_prio_enable_store(struct device *dev, 7412 struct device_attribute *attr, 7413 const char *buf, size_t count) 7414 { 7415 struct pqi_ctrl_info *ctrl_info; 7416 struct scsi_device *sdev; 7417 struct pqi_scsi_dev *device; 7418 unsigned long flags; 7419 u8 ncq_prio_enable = 0; 7420 7421 if (kstrtou8(buf, 0, &ncq_prio_enable)) 7422 return -EINVAL; 7423 7424 sdev = to_scsi_device(dev); 7425 ctrl_info = shost_to_hba(sdev->host); 7426 7427 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 7428 7429 device = sdev->hostdata; 7430 7431 if (!device) { 7432 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 7433 return -ENODEV; 7434 } 7435 7436 if (!device->ncq_prio_support) { 7437 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 7438 return -EINVAL; 7439 } 7440 7441 device->ncq_prio_enable = ncq_prio_enable; 7442 7443 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 7444 7445 return strlen(buf); 7446 } 7447 7448 static ssize_t pqi_numa_node_show(struct device *dev, 7449 struct device_attribute *attr, char *buffer) 7450 { 7451 struct scsi_device *sdev; 7452 struct pqi_ctrl_info *ctrl_info; 7453 7454 sdev = to_scsi_device(dev); 7455 ctrl_info = shost_to_hba(sdev->host); 7456 7457 return scnprintf(buffer, PAGE_SIZE, "%d\n", ctrl_info->numa_node); 7458 } 7459 7460 static DEVICE_ATTR(lunid, 0444, pqi_lunid_show, NULL); 7461 static DEVICE_ATTR(unique_id, 0444, pqi_unique_id_show, NULL); 7462 static DEVICE_ATTR(path_info, 0444, pqi_path_info_show, NULL); 7463 static DEVICE_ATTR(sas_address, 0444, pqi_sas_address_show, NULL); 7464 static DEVICE_ATTR(ssd_smart_path_enabled, 0444, pqi_ssd_smart_path_enabled_show, NULL); 7465 static DEVICE_ATTR(raid_level, 0444, pqi_raid_level_show, NULL); 7466 static DEVICE_ATTR(raid_bypass_cnt, 0444, pqi_raid_bypass_cnt_show, NULL); 7467 static DEVICE_ATTR(sas_ncq_prio_enable, 0644, 7468 pqi_sas_ncq_prio_enable_show, pqi_sas_ncq_prio_enable_store); 7469 static DEVICE_ATTR(numa_node, 0444, pqi_numa_node_show, NULL); 7470 7471 static struct attribute *pqi_sdev_attrs[] = { 7472 &dev_attr_lunid.attr, 7473 &dev_attr_unique_id.attr, 7474 &dev_attr_path_info.attr, 7475 &dev_attr_sas_address.attr, 7476 &dev_attr_ssd_smart_path_enabled.attr, 7477 &dev_attr_raid_level.attr, 7478 &dev_attr_raid_bypass_cnt.attr, 7479 &dev_attr_sas_ncq_prio_enable.attr, 7480 &dev_attr_numa_node.attr, 7481 NULL 7482 }; 7483 7484 ATTRIBUTE_GROUPS(pqi_sdev); 7485 7486 static const struct scsi_host_template pqi_driver_template = { 7487 .module = THIS_MODULE, 7488 .name = DRIVER_NAME_SHORT, 7489 .proc_name = DRIVER_NAME_SHORT, 7490 .queuecommand = pqi_scsi_queue_command, 7491 .scan_start = pqi_scan_start, 7492 .scan_finished = pqi_scan_finished, 7493 .this_id = -1, 7494 .eh_device_reset_handler = pqi_eh_device_reset_handler, 7495 .eh_abort_handler = pqi_eh_abort_handler, 7496 .ioctl = pqi_ioctl, 7497 .slave_alloc = pqi_slave_alloc, 7498 .slave_configure = pqi_slave_configure, 7499 .slave_destroy = pqi_slave_destroy, 7500 .map_queues = pqi_map_queues, 7501 .sdev_groups = pqi_sdev_groups, 7502 .shost_groups = pqi_shost_groups, 7503 .cmd_size = sizeof(struct pqi_cmd_priv), 7504 }; 7505 7506 static int pqi_register_scsi(struct pqi_ctrl_info *ctrl_info) 7507 { 7508 int rc; 7509 struct Scsi_Host *shost; 7510 7511 shost = scsi_host_alloc(&pqi_driver_template, sizeof(ctrl_info)); 7512 if (!shost) { 7513 dev_err(&ctrl_info->pci_dev->dev, "scsi_host_alloc failed\n"); 7514 return -ENOMEM; 7515 } 7516 7517 shost->io_port = 0; 7518 shost->n_io_port = 0; 7519 shost->this_id = -1; 7520 shost->max_channel = PQI_MAX_BUS; 7521 shost->max_cmd_len = MAX_COMMAND_SIZE; 7522 shost->max_lun = PQI_MAX_LUNS_PER_DEVICE; 7523 shost->max_id = ~0; 7524 shost->max_sectors = ctrl_info->max_sectors; 7525 shost->can_queue = ctrl_info->scsi_ml_can_queue; 7526 shost->cmd_per_lun = shost->can_queue; 7527 shost->sg_tablesize = ctrl_info->sg_tablesize; 7528 shost->transportt = pqi_sas_transport_template; 7529 shost->irq = pci_irq_vector(ctrl_info->pci_dev, 0); 7530 shost->unique_id = shost->irq; 7531 shost->nr_hw_queues = ctrl_info->num_queue_groups; 7532 shost->host_tagset = 1; 7533 shost->hostdata[0] = (unsigned long)ctrl_info; 7534 7535 rc = scsi_add_host(shost, &ctrl_info->pci_dev->dev); 7536 if (rc) { 7537 dev_err(&ctrl_info->pci_dev->dev, "scsi_add_host failed\n"); 7538 goto free_host; 7539 } 7540 7541 rc = pqi_add_sas_host(shost, ctrl_info); 7542 if (rc) { 7543 dev_err(&ctrl_info->pci_dev->dev, "add SAS host failed\n"); 7544 goto remove_host; 7545 } 7546 7547 ctrl_info->scsi_host = shost; 7548 7549 return 0; 7550 7551 remove_host: 7552 scsi_remove_host(shost); 7553 free_host: 7554 scsi_host_put(shost); 7555 7556 return rc; 7557 } 7558 7559 static void pqi_unregister_scsi(struct pqi_ctrl_info *ctrl_info) 7560 { 7561 struct Scsi_Host *shost; 7562 7563 pqi_delete_sas_host(ctrl_info); 7564 7565 shost = ctrl_info->scsi_host; 7566 if (!shost) 7567 return; 7568 7569 scsi_remove_host(shost); 7570 scsi_host_put(shost); 7571 } 7572 7573 static int pqi_wait_for_pqi_reset_completion(struct pqi_ctrl_info *ctrl_info) 7574 { 7575 int rc = 0; 7576 struct pqi_device_registers __iomem *pqi_registers; 7577 unsigned long timeout; 7578 unsigned int timeout_msecs; 7579 union pqi_reset_register reset_reg; 7580 7581 pqi_registers = ctrl_info->pqi_registers; 7582 timeout_msecs = readw(&pqi_registers->max_reset_timeout) * 100; 7583 timeout = msecs_to_jiffies(timeout_msecs) + jiffies; 7584 7585 while (1) { 7586 msleep(PQI_RESET_POLL_INTERVAL_MSECS); 7587 reset_reg.all_bits = readl(&pqi_registers->device_reset); 7588 if (reset_reg.bits.reset_action == PQI_RESET_ACTION_COMPLETED) 7589 break; 7590 if (!sis_is_firmware_running(ctrl_info)) { 7591 rc = -ENXIO; 7592 break; 7593 } 7594 if (time_after(jiffies, timeout)) { 7595 rc = -ETIMEDOUT; 7596 break; 7597 } 7598 } 7599 7600 return rc; 7601 } 7602 7603 static int pqi_reset(struct pqi_ctrl_info *ctrl_info) 7604 { 7605 int rc; 7606 union pqi_reset_register reset_reg; 7607 7608 if (ctrl_info->pqi_reset_quiesce_supported) { 7609 rc = sis_pqi_reset_quiesce(ctrl_info); 7610 if (rc) { 7611 dev_err(&ctrl_info->pci_dev->dev, 7612 "PQI reset failed during quiesce with error %d\n", rc); 7613 return rc; 7614 } 7615 } 7616 7617 reset_reg.all_bits = 0; 7618 reset_reg.bits.reset_type = PQI_RESET_TYPE_HARD_RESET; 7619 reset_reg.bits.reset_action = PQI_RESET_ACTION_RESET; 7620 7621 writel(reset_reg.all_bits, &ctrl_info->pqi_registers->device_reset); 7622 7623 rc = pqi_wait_for_pqi_reset_completion(ctrl_info); 7624 if (rc) 7625 dev_err(&ctrl_info->pci_dev->dev, 7626 "PQI reset failed with error %d\n", rc); 7627 7628 return rc; 7629 } 7630 7631 static int pqi_get_ctrl_serial_number(struct pqi_ctrl_info *ctrl_info) 7632 { 7633 int rc; 7634 struct bmic_sense_subsystem_info *sense_info; 7635 7636 sense_info = kzalloc(sizeof(*sense_info), GFP_KERNEL); 7637 if (!sense_info) 7638 return -ENOMEM; 7639 7640 rc = pqi_sense_subsystem_info(ctrl_info, sense_info); 7641 if (rc) 7642 goto out; 7643 7644 memcpy(ctrl_info->serial_number, sense_info->ctrl_serial_number, 7645 sizeof(sense_info->ctrl_serial_number)); 7646 ctrl_info->serial_number[sizeof(sense_info->ctrl_serial_number)] = '\0'; 7647 7648 out: 7649 kfree(sense_info); 7650 7651 return rc; 7652 } 7653 7654 static int pqi_get_ctrl_product_details(struct pqi_ctrl_info *ctrl_info) 7655 { 7656 int rc; 7657 struct bmic_identify_controller *identify; 7658 7659 identify = kmalloc(sizeof(*identify), GFP_KERNEL); 7660 if (!identify) 7661 return -ENOMEM; 7662 7663 rc = pqi_identify_controller(ctrl_info, identify); 7664 if (rc) 7665 goto out; 7666 7667 if (get_unaligned_le32(&identify->extra_controller_flags) & 7668 BMIC_IDENTIFY_EXTRA_FLAGS_LONG_FW_VERSION_SUPPORTED) { 7669 memcpy(ctrl_info->firmware_version, 7670 identify->firmware_version_long, 7671 sizeof(identify->firmware_version_long)); 7672 } else { 7673 memcpy(ctrl_info->firmware_version, 7674 identify->firmware_version_short, 7675 sizeof(identify->firmware_version_short)); 7676 ctrl_info->firmware_version 7677 [sizeof(identify->firmware_version_short)] = '\0'; 7678 snprintf(ctrl_info->firmware_version + 7679 strlen(ctrl_info->firmware_version), 7680 sizeof(ctrl_info->firmware_version) - 7681 sizeof(identify->firmware_version_short), 7682 "-%u", 7683 get_unaligned_le16(&identify->firmware_build_number)); 7684 } 7685 7686 memcpy(ctrl_info->model, identify->product_id, 7687 sizeof(identify->product_id)); 7688 ctrl_info->model[sizeof(identify->product_id)] = '\0'; 7689 7690 memcpy(ctrl_info->vendor, identify->vendor_id, 7691 sizeof(identify->vendor_id)); 7692 ctrl_info->vendor[sizeof(identify->vendor_id)] = '\0'; 7693 7694 dev_info(&ctrl_info->pci_dev->dev, 7695 "Firmware version: %s\n", ctrl_info->firmware_version); 7696 7697 out: 7698 kfree(identify); 7699 7700 return rc; 7701 } 7702 7703 struct pqi_config_table_section_info { 7704 struct pqi_ctrl_info *ctrl_info; 7705 void *section; 7706 u32 section_offset; 7707 void __iomem *section_iomem_addr; 7708 }; 7709 7710 static inline bool pqi_is_firmware_feature_supported( 7711 struct pqi_config_table_firmware_features *firmware_features, 7712 unsigned int bit_position) 7713 { 7714 unsigned int byte_index; 7715 7716 byte_index = bit_position / BITS_PER_BYTE; 7717 7718 if (byte_index >= le16_to_cpu(firmware_features->num_elements)) 7719 return false; 7720 7721 return firmware_features->features_supported[byte_index] & 7722 (1 << (bit_position % BITS_PER_BYTE)) ? true : false; 7723 } 7724 7725 static inline bool pqi_is_firmware_feature_enabled( 7726 struct pqi_config_table_firmware_features *firmware_features, 7727 void __iomem *firmware_features_iomem_addr, 7728 unsigned int bit_position) 7729 { 7730 unsigned int byte_index; 7731 u8 __iomem *features_enabled_iomem_addr; 7732 7733 byte_index = (bit_position / BITS_PER_BYTE) + 7734 (le16_to_cpu(firmware_features->num_elements) * 2); 7735 7736 features_enabled_iomem_addr = firmware_features_iomem_addr + 7737 offsetof(struct pqi_config_table_firmware_features, 7738 features_supported) + byte_index; 7739 7740 return *((__force u8 *)features_enabled_iomem_addr) & 7741 (1 << (bit_position % BITS_PER_BYTE)) ? true : false; 7742 } 7743 7744 static inline void pqi_request_firmware_feature( 7745 struct pqi_config_table_firmware_features *firmware_features, 7746 unsigned int bit_position) 7747 { 7748 unsigned int byte_index; 7749 7750 byte_index = (bit_position / BITS_PER_BYTE) + 7751 le16_to_cpu(firmware_features->num_elements); 7752 7753 firmware_features->features_supported[byte_index] |= 7754 (1 << (bit_position % BITS_PER_BYTE)); 7755 } 7756 7757 static int pqi_config_table_update(struct pqi_ctrl_info *ctrl_info, 7758 u16 first_section, u16 last_section) 7759 { 7760 struct pqi_vendor_general_request request; 7761 7762 memset(&request, 0, sizeof(request)); 7763 7764 request.header.iu_type = PQI_REQUEST_IU_VENDOR_GENERAL; 7765 put_unaligned_le16(sizeof(request) - PQI_REQUEST_HEADER_LENGTH, 7766 &request.header.iu_length); 7767 put_unaligned_le16(PQI_VENDOR_GENERAL_CONFIG_TABLE_UPDATE, 7768 &request.function_code); 7769 put_unaligned_le16(first_section, 7770 &request.data.config_table_update.first_section); 7771 put_unaligned_le16(last_section, 7772 &request.data.config_table_update.last_section); 7773 7774 return pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 0, NULL); 7775 } 7776 7777 static int pqi_enable_firmware_features(struct pqi_ctrl_info *ctrl_info, 7778 struct pqi_config_table_firmware_features *firmware_features, 7779 void __iomem *firmware_features_iomem_addr) 7780 { 7781 void *features_requested; 7782 void __iomem *features_requested_iomem_addr; 7783 void __iomem *host_max_known_feature_iomem_addr; 7784 7785 features_requested = firmware_features->features_supported + 7786 le16_to_cpu(firmware_features->num_elements); 7787 7788 features_requested_iomem_addr = firmware_features_iomem_addr + 7789 (features_requested - (void *)firmware_features); 7790 7791 memcpy_toio(features_requested_iomem_addr, features_requested, 7792 le16_to_cpu(firmware_features->num_elements)); 7793 7794 if (pqi_is_firmware_feature_supported(firmware_features, 7795 PQI_FIRMWARE_FEATURE_MAX_KNOWN_FEATURE)) { 7796 host_max_known_feature_iomem_addr = 7797 features_requested_iomem_addr + 7798 (le16_to_cpu(firmware_features->num_elements) * 2) + 7799 sizeof(__le16); 7800 writeb(PQI_FIRMWARE_FEATURE_MAXIMUM & 0xFF, host_max_known_feature_iomem_addr); 7801 writeb((PQI_FIRMWARE_FEATURE_MAXIMUM & 0xFF00) >> 8, host_max_known_feature_iomem_addr + 1); 7802 } 7803 7804 return pqi_config_table_update(ctrl_info, 7805 PQI_CONFIG_TABLE_SECTION_FIRMWARE_FEATURES, 7806 PQI_CONFIG_TABLE_SECTION_FIRMWARE_FEATURES); 7807 } 7808 7809 struct pqi_firmware_feature { 7810 char *feature_name; 7811 unsigned int feature_bit; 7812 bool supported; 7813 bool enabled; 7814 void (*feature_status)(struct pqi_ctrl_info *ctrl_info, 7815 struct pqi_firmware_feature *firmware_feature); 7816 }; 7817 7818 static void pqi_firmware_feature_status(struct pqi_ctrl_info *ctrl_info, 7819 struct pqi_firmware_feature *firmware_feature) 7820 { 7821 if (!firmware_feature->supported) { 7822 dev_info(&ctrl_info->pci_dev->dev, "%s not supported by controller\n", 7823 firmware_feature->feature_name); 7824 return; 7825 } 7826 7827 if (firmware_feature->enabled) { 7828 dev_info(&ctrl_info->pci_dev->dev, 7829 "%s enabled\n", firmware_feature->feature_name); 7830 return; 7831 } 7832 7833 dev_err(&ctrl_info->pci_dev->dev, "failed to enable %s\n", 7834 firmware_feature->feature_name); 7835 } 7836 7837 static void pqi_ctrl_update_feature_flags(struct pqi_ctrl_info *ctrl_info, 7838 struct pqi_firmware_feature *firmware_feature) 7839 { 7840 switch (firmware_feature->feature_bit) { 7841 case PQI_FIRMWARE_FEATURE_RAID_1_WRITE_BYPASS: 7842 ctrl_info->enable_r1_writes = firmware_feature->enabled; 7843 break; 7844 case PQI_FIRMWARE_FEATURE_RAID_5_WRITE_BYPASS: 7845 ctrl_info->enable_r5_writes = firmware_feature->enabled; 7846 break; 7847 case PQI_FIRMWARE_FEATURE_RAID_6_WRITE_BYPASS: 7848 ctrl_info->enable_r6_writes = firmware_feature->enabled; 7849 break; 7850 case PQI_FIRMWARE_FEATURE_SOFT_RESET_HANDSHAKE: 7851 ctrl_info->soft_reset_handshake_supported = 7852 firmware_feature->enabled && 7853 pqi_read_soft_reset_status(ctrl_info); 7854 break; 7855 case PQI_FIRMWARE_FEATURE_RAID_IU_TIMEOUT: 7856 ctrl_info->raid_iu_timeout_supported = firmware_feature->enabled; 7857 break; 7858 case PQI_FIRMWARE_FEATURE_TMF_IU_TIMEOUT: 7859 ctrl_info->tmf_iu_timeout_supported = firmware_feature->enabled; 7860 break; 7861 case PQI_FIRMWARE_FEATURE_FW_TRIAGE: 7862 ctrl_info->firmware_triage_supported = firmware_feature->enabled; 7863 pqi_save_fw_triage_setting(ctrl_info, firmware_feature->enabled); 7864 break; 7865 case PQI_FIRMWARE_FEATURE_RPL_EXTENDED_FORMAT_4_5: 7866 ctrl_info->rpl_extended_format_4_5_supported = firmware_feature->enabled; 7867 break; 7868 case PQI_FIRMWARE_FEATURE_MULTI_LUN_DEVICE_SUPPORT: 7869 ctrl_info->multi_lun_device_supported = firmware_feature->enabled; 7870 break; 7871 } 7872 7873 pqi_firmware_feature_status(ctrl_info, firmware_feature); 7874 } 7875 7876 static inline void pqi_firmware_feature_update(struct pqi_ctrl_info *ctrl_info, 7877 struct pqi_firmware_feature *firmware_feature) 7878 { 7879 if (firmware_feature->feature_status) 7880 firmware_feature->feature_status(ctrl_info, firmware_feature); 7881 } 7882 7883 static DEFINE_MUTEX(pqi_firmware_features_mutex); 7884 7885 static struct pqi_firmware_feature pqi_firmware_features[] = { 7886 { 7887 .feature_name = "Online Firmware Activation", 7888 .feature_bit = PQI_FIRMWARE_FEATURE_OFA, 7889 .feature_status = pqi_firmware_feature_status, 7890 }, 7891 { 7892 .feature_name = "Serial Management Protocol", 7893 .feature_bit = PQI_FIRMWARE_FEATURE_SMP, 7894 .feature_status = pqi_firmware_feature_status, 7895 }, 7896 { 7897 .feature_name = "Maximum Known Feature", 7898 .feature_bit = PQI_FIRMWARE_FEATURE_MAX_KNOWN_FEATURE, 7899 .feature_status = pqi_firmware_feature_status, 7900 }, 7901 { 7902 .feature_name = "RAID 0 Read Bypass", 7903 .feature_bit = PQI_FIRMWARE_FEATURE_RAID_0_READ_BYPASS, 7904 .feature_status = pqi_firmware_feature_status, 7905 }, 7906 { 7907 .feature_name = "RAID 1 Read Bypass", 7908 .feature_bit = PQI_FIRMWARE_FEATURE_RAID_1_READ_BYPASS, 7909 .feature_status = pqi_firmware_feature_status, 7910 }, 7911 { 7912 .feature_name = "RAID 5 Read Bypass", 7913 .feature_bit = PQI_FIRMWARE_FEATURE_RAID_5_READ_BYPASS, 7914 .feature_status = pqi_firmware_feature_status, 7915 }, 7916 { 7917 .feature_name = "RAID 6 Read Bypass", 7918 .feature_bit = PQI_FIRMWARE_FEATURE_RAID_6_READ_BYPASS, 7919 .feature_status = pqi_firmware_feature_status, 7920 }, 7921 { 7922 .feature_name = "RAID 0 Write Bypass", 7923 .feature_bit = PQI_FIRMWARE_FEATURE_RAID_0_WRITE_BYPASS, 7924 .feature_status = pqi_firmware_feature_status, 7925 }, 7926 { 7927 .feature_name = "RAID 1 Write Bypass", 7928 .feature_bit = PQI_FIRMWARE_FEATURE_RAID_1_WRITE_BYPASS, 7929 .feature_status = pqi_ctrl_update_feature_flags, 7930 }, 7931 { 7932 .feature_name = "RAID 5 Write Bypass", 7933 .feature_bit = PQI_FIRMWARE_FEATURE_RAID_5_WRITE_BYPASS, 7934 .feature_status = pqi_ctrl_update_feature_flags, 7935 }, 7936 { 7937 .feature_name = "RAID 6 Write Bypass", 7938 .feature_bit = PQI_FIRMWARE_FEATURE_RAID_6_WRITE_BYPASS, 7939 .feature_status = pqi_ctrl_update_feature_flags, 7940 }, 7941 { 7942 .feature_name = "New Soft Reset Handshake", 7943 .feature_bit = PQI_FIRMWARE_FEATURE_SOFT_RESET_HANDSHAKE, 7944 .feature_status = pqi_ctrl_update_feature_flags, 7945 }, 7946 { 7947 .feature_name = "RAID IU Timeout", 7948 .feature_bit = PQI_FIRMWARE_FEATURE_RAID_IU_TIMEOUT, 7949 .feature_status = pqi_ctrl_update_feature_flags, 7950 }, 7951 { 7952 .feature_name = "TMF IU Timeout", 7953 .feature_bit = PQI_FIRMWARE_FEATURE_TMF_IU_TIMEOUT, 7954 .feature_status = pqi_ctrl_update_feature_flags, 7955 }, 7956 { 7957 .feature_name = "RAID Bypass on encrypted logical volumes on NVMe", 7958 .feature_bit = PQI_FIRMWARE_FEATURE_RAID_BYPASS_ON_ENCRYPTED_NVME, 7959 .feature_status = pqi_firmware_feature_status, 7960 }, 7961 { 7962 .feature_name = "Firmware Triage", 7963 .feature_bit = PQI_FIRMWARE_FEATURE_FW_TRIAGE, 7964 .feature_status = pqi_ctrl_update_feature_flags, 7965 }, 7966 { 7967 .feature_name = "RPL Extended Formats 4 and 5", 7968 .feature_bit = PQI_FIRMWARE_FEATURE_RPL_EXTENDED_FORMAT_4_5, 7969 .feature_status = pqi_ctrl_update_feature_flags, 7970 }, 7971 { 7972 .feature_name = "Multi-LUN Target", 7973 .feature_bit = PQI_FIRMWARE_FEATURE_MULTI_LUN_DEVICE_SUPPORT, 7974 .feature_status = pqi_ctrl_update_feature_flags, 7975 }, 7976 }; 7977 7978 static void pqi_process_firmware_features( 7979 struct pqi_config_table_section_info *section_info) 7980 { 7981 int rc; 7982 struct pqi_ctrl_info *ctrl_info; 7983 struct pqi_config_table_firmware_features *firmware_features; 7984 void __iomem *firmware_features_iomem_addr; 7985 unsigned int i; 7986 unsigned int num_features_supported; 7987 7988 ctrl_info = section_info->ctrl_info; 7989 firmware_features = section_info->section; 7990 firmware_features_iomem_addr = section_info->section_iomem_addr; 7991 7992 for (i = 0, num_features_supported = 0; 7993 i < ARRAY_SIZE(pqi_firmware_features); i++) { 7994 if (pqi_is_firmware_feature_supported(firmware_features, 7995 pqi_firmware_features[i].feature_bit)) { 7996 pqi_firmware_features[i].supported = true; 7997 num_features_supported++; 7998 } else { 7999 pqi_firmware_feature_update(ctrl_info, 8000 &pqi_firmware_features[i]); 8001 } 8002 } 8003 8004 if (num_features_supported == 0) 8005 return; 8006 8007 for (i = 0; i < ARRAY_SIZE(pqi_firmware_features); i++) { 8008 if (!pqi_firmware_features[i].supported) 8009 continue; 8010 pqi_request_firmware_feature(firmware_features, 8011 pqi_firmware_features[i].feature_bit); 8012 } 8013 8014 rc = pqi_enable_firmware_features(ctrl_info, firmware_features, 8015 firmware_features_iomem_addr); 8016 if (rc) { 8017 dev_err(&ctrl_info->pci_dev->dev, 8018 "failed to enable firmware features in PQI configuration table\n"); 8019 for (i = 0; i < ARRAY_SIZE(pqi_firmware_features); i++) { 8020 if (!pqi_firmware_features[i].supported) 8021 continue; 8022 pqi_firmware_feature_update(ctrl_info, 8023 &pqi_firmware_features[i]); 8024 } 8025 return; 8026 } 8027 8028 for (i = 0; i < ARRAY_SIZE(pqi_firmware_features); i++) { 8029 if (!pqi_firmware_features[i].supported) 8030 continue; 8031 if (pqi_is_firmware_feature_enabled(firmware_features, 8032 firmware_features_iomem_addr, 8033 pqi_firmware_features[i].feature_bit)) { 8034 pqi_firmware_features[i].enabled = true; 8035 } 8036 pqi_firmware_feature_update(ctrl_info, 8037 &pqi_firmware_features[i]); 8038 } 8039 } 8040 8041 static void pqi_init_firmware_features(void) 8042 { 8043 unsigned int i; 8044 8045 for (i = 0; i < ARRAY_SIZE(pqi_firmware_features); i++) { 8046 pqi_firmware_features[i].supported = false; 8047 pqi_firmware_features[i].enabled = false; 8048 } 8049 } 8050 8051 static void pqi_process_firmware_features_section( 8052 struct pqi_config_table_section_info *section_info) 8053 { 8054 mutex_lock(&pqi_firmware_features_mutex); 8055 pqi_init_firmware_features(); 8056 pqi_process_firmware_features(section_info); 8057 mutex_unlock(&pqi_firmware_features_mutex); 8058 } 8059 8060 /* 8061 * Reset all controller settings that can be initialized during the processing 8062 * of the PQI Configuration Table. 8063 */ 8064 8065 static void pqi_ctrl_reset_config(struct pqi_ctrl_info *ctrl_info) 8066 { 8067 ctrl_info->heartbeat_counter = NULL; 8068 ctrl_info->soft_reset_status = NULL; 8069 ctrl_info->soft_reset_handshake_supported = false; 8070 ctrl_info->enable_r1_writes = false; 8071 ctrl_info->enable_r5_writes = false; 8072 ctrl_info->enable_r6_writes = false; 8073 ctrl_info->raid_iu_timeout_supported = false; 8074 ctrl_info->tmf_iu_timeout_supported = false; 8075 ctrl_info->firmware_triage_supported = false; 8076 ctrl_info->rpl_extended_format_4_5_supported = false; 8077 ctrl_info->multi_lun_device_supported = false; 8078 } 8079 8080 static int pqi_process_config_table(struct pqi_ctrl_info *ctrl_info) 8081 { 8082 u32 table_length; 8083 u32 section_offset; 8084 bool firmware_feature_section_present; 8085 void __iomem *table_iomem_addr; 8086 struct pqi_config_table *config_table; 8087 struct pqi_config_table_section_header *section; 8088 struct pqi_config_table_section_info section_info; 8089 struct pqi_config_table_section_info feature_section_info = {0}; 8090 8091 table_length = ctrl_info->config_table_length; 8092 if (table_length == 0) 8093 return 0; 8094 8095 config_table = kmalloc(table_length, GFP_KERNEL); 8096 if (!config_table) { 8097 dev_err(&ctrl_info->pci_dev->dev, 8098 "failed to allocate memory for PQI configuration table\n"); 8099 return -ENOMEM; 8100 } 8101 8102 /* 8103 * Copy the config table contents from I/O memory space into the 8104 * temporary buffer. 8105 */ 8106 table_iomem_addr = ctrl_info->iomem_base + ctrl_info->config_table_offset; 8107 memcpy_fromio(config_table, table_iomem_addr, table_length); 8108 8109 firmware_feature_section_present = false; 8110 section_info.ctrl_info = ctrl_info; 8111 section_offset = get_unaligned_le32(&config_table->first_section_offset); 8112 8113 while (section_offset) { 8114 section = (void *)config_table + section_offset; 8115 8116 section_info.section = section; 8117 section_info.section_offset = section_offset; 8118 section_info.section_iomem_addr = table_iomem_addr + section_offset; 8119 8120 switch (get_unaligned_le16(§ion->section_id)) { 8121 case PQI_CONFIG_TABLE_SECTION_FIRMWARE_FEATURES: 8122 firmware_feature_section_present = true; 8123 feature_section_info = section_info; 8124 break; 8125 case PQI_CONFIG_TABLE_SECTION_HEARTBEAT: 8126 if (pqi_disable_heartbeat) 8127 dev_warn(&ctrl_info->pci_dev->dev, 8128 "heartbeat disabled by module parameter\n"); 8129 else 8130 ctrl_info->heartbeat_counter = 8131 table_iomem_addr + 8132 section_offset + 8133 offsetof(struct pqi_config_table_heartbeat, 8134 heartbeat_counter); 8135 break; 8136 case PQI_CONFIG_TABLE_SECTION_SOFT_RESET: 8137 ctrl_info->soft_reset_status = 8138 table_iomem_addr + 8139 section_offset + 8140 offsetof(struct pqi_config_table_soft_reset, 8141 soft_reset_status); 8142 break; 8143 } 8144 8145 section_offset = get_unaligned_le16(§ion->next_section_offset); 8146 } 8147 8148 /* 8149 * We process the firmware feature section after all other sections 8150 * have been processed so that the feature bit callbacks can take 8151 * into account the settings configured by other sections. 8152 */ 8153 if (firmware_feature_section_present) 8154 pqi_process_firmware_features_section(&feature_section_info); 8155 8156 kfree(config_table); 8157 8158 return 0; 8159 } 8160 8161 /* Switches the controller from PQI mode back into SIS mode. */ 8162 8163 static int pqi_revert_to_sis_mode(struct pqi_ctrl_info *ctrl_info) 8164 { 8165 int rc; 8166 8167 pqi_change_irq_mode(ctrl_info, IRQ_MODE_NONE); 8168 rc = pqi_reset(ctrl_info); 8169 if (rc) 8170 return rc; 8171 rc = sis_reenable_sis_mode(ctrl_info); 8172 if (rc) { 8173 dev_err(&ctrl_info->pci_dev->dev, 8174 "re-enabling SIS mode failed with error %d\n", rc); 8175 return rc; 8176 } 8177 pqi_save_ctrl_mode(ctrl_info, SIS_MODE); 8178 8179 return 0; 8180 } 8181 8182 /* 8183 * If the controller isn't already in SIS mode, this function forces it into 8184 * SIS mode. 8185 */ 8186 8187 static int pqi_force_sis_mode(struct pqi_ctrl_info *ctrl_info) 8188 { 8189 if (!sis_is_firmware_running(ctrl_info)) 8190 return -ENXIO; 8191 8192 if (pqi_get_ctrl_mode(ctrl_info) == SIS_MODE) 8193 return 0; 8194 8195 if (sis_is_kernel_up(ctrl_info)) { 8196 pqi_save_ctrl_mode(ctrl_info, SIS_MODE); 8197 return 0; 8198 } 8199 8200 return pqi_revert_to_sis_mode(ctrl_info); 8201 } 8202 8203 static void pqi_perform_lockup_action(void) 8204 { 8205 switch (pqi_lockup_action) { 8206 case PANIC: 8207 panic("FATAL: Smart Family Controller lockup detected"); 8208 break; 8209 case REBOOT: 8210 emergency_restart(); 8211 break; 8212 case NONE: 8213 default: 8214 break; 8215 } 8216 } 8217 8218 static int pqi_ctrl_init(struct pqi_ctrl_info *ctrl_info) 8219 { 8220 int rc; 8221 u32 product_id; 8222 8223 if (reset_devices) { 8224 if (pqi_is_fw_triage_supported(ctrl_info)) { 8225 rc = sis_wait_for_fw_triage_completion(ctrl_info); 8226 if (rc) 8227 return rc; 8228 } 8229 sis_soft_reset(ctrl_info); 8230 ssleep(PQI_POST_RESET_DELAY_SECS); 8231 } else { 8232 rc = pqi_force_sis_mode(ctrl_info); 8233 if (rc) 8234 return rc; 8235 } 8236 8237 /* 8238 * Wait until the controller is ready to start accepting SIS 8239 * commands. 8240 */ 8241 rc = sis_wait_for_ctrl_ready(ctrl_info); 8242 if (rc) { 8243 if (reset_devices) { 8244 dev_err(&ctrl_info->pci_dev->dev, 8245 "kdump init failed with error %d\n", rc); 8246 pqi_lockup_action = REBOOT; 8247 pqi_perform_lockup_action(); 8248 } 8249 return rc; 8250 } 8251 8252 /* 8253 * Get the controller properties. This allows us to determine 8254 * whether or not it supports PQI mode. 8255 */ 8256 rc = sis_get_ctrl_properties(ctrl_info); 8257 if (rc) { 8258 dev_err(&ctrl_info->pci_dev->dev, 8259 "error obtaining controller properties\n"); 8260 return rc; 8261 } 8262 8263 rc = sis_get_pqi_capabilities(ctrl_info); 8264 if (rc) { 8265 dev_err(&ctrl_info->pci_dev->dev, 8266 "error obtaining controller capabilities\n"); 8267 return rc; 8268 } 8269 8270 product_id = sis_get_product_id(ctrl_info); 8271 ctrl_info->product_id = (u8)product_id; 8272 ctrl_info->product_revision = (u8)(product_id >> 8); 8273 8274 if (reset_devices) { 8275 if (ctrl_info->max_outstanding_requests > 8276 PQI_MAX_OUTSTANDING_REQUESTS_KDUMP) 8277 ctrl_info->max_outstanding_requests = 8278 PQI_MAX_OUTSTANDING_REQUESTS_KDUMP; 8279 } else { 8280 if (ctrl_info->max_outstanding_requests > 8281 PQI_MAX_OUTSTANDING_REQUESTS) 8282 ctrl_info->max_outstanding_requests = 8283 PQI_MAX_OUTSTANDING_REQUESTS; 8284 } 8285 8286 pqi_calculate_io_resources(ctrl_info); 8287 8288 rc = pqi_alloc_error_buffer(ctrl_info); 8289 if (rc) { 8290 dev_err(&ctrl_info->pci_dev->dev, 8291 "failed to allocate PQI error buffer\n"); 8292 return rc; 8293 } 8294 8295 /* 8296 * If the function we are about to call succeeds, the 8297 * controller will transition from legacy SIS mode 8298 * into PQI mode. 8299 */ 8300 rc = sis_init_base_struct_addr(ctrl_info); 8301 if (rc) { 8302 dev_err(&ctrl_info->pci_dev->dev, 8303 "error initializing PQI mode\n"); 8304 return rc; 8305 } 8306 8307 /* Wait for the controller to complete the SIS -> PQI transition. */ 8308 rc = pqi_wait_for_pqi_mode_ready(ctrl_info); 8309 if (rc) { 8310 dev_err(&ctrl_info->pci_dev->dev, 8311 "transition to PQI mode failed\n"); 8312 return rc; 8313 } 8314 8315 /* From here on, we are running in PQI mode. */ 8316 ctrl_info->pqi_mode_enabled = true; 8317 pqi_save_ctrl_mode(ctrl_info, PQI_MODE); 8318 8319 rc = pqi_alloc_admin_queues(ctrl_info); 8320 if (rc) { 8321 dev_err(&ctrl_info->pci_dev->dev, 8322 "failed to allocate admin queues\n"); 8323 return rc; 8324 } 8325 8326 rc = pqi_create_admin_queues(ctrl_info); 8327 if (rc) { 8328 dev_err(&ctrl_info->pci_dev->dev, 8329 "error creating admin queues\n"); 8330 return rc; 8331 } 8332 8333 rc = pqi_report_device_capability(ctrl_info); 8334 if (rc) { 8335 dev_err(&ctrl_info->pci_dev->dev, 8336 "obtaining device capability failed\n"); 8337 return rc; 8338 } 8339 8340 rc = pqi_validate_device_capability(ctrl_info); 8341 if (rc) 8342 return rc; 8343 8344 pqi_calculate_queue_resources(ctrl_info); 8345 8346 rc = pqi_enable_msix_interrupts(ctrl_info); 8347 if (rc) 8348 return rc; 8349 8350 if (ctrl_info->num_msix_vectors_enabled < ctrl_info->num_queue_groups) { 8351 ctrl_info->max_msix_vectors = 8352 ctrl_info->num_msix_vectors_enabled; 8353 pqi_calculate_queue_resources(ctrl_info); 8354 } 8355 8356 rc = pqi_alloc_io_resources(ctrl_info); 8357 if (rc) 8358 return rc; 8359 8360 rc = pqi_alloc_operational_queues(ctrl_info); 8361 if (rc) { 8362 dev_err(&ctrl_info->pci_dev->dev, 8363 "failed to allocate operational queues\n"); 8364 return rc; 8365 } 8366 8367 pqi_init_operational_queues(ctrl_info); 8368 8369 rc = pqi_create_queues(ctrl_info); 8370 if (rc) 8371 return rc; 8372 8373 rc = pqi_request_irqs(ctrl_info); 8374 if (rc) 8375 return rc; 8376 8377 pqi_change_irq_mode(ctrl_info, IRQ_MODE_MSIX); 8378 8379 ctrl_info->controller_online = true; 8380 8381 rc = pqi_process_config_table(ctrl_info); 8382 if (rc) 8383 return rc; 8384 8385 pqi_start_heartbeat_timer(ctrl_info); 8386 8387 if (ctrl_info->enable_r5_writes || ctrl_info->enable_r6_writes) { 8388 rc = pqi_get_advanced_raid_bypass_config(ctrl_info); 8389 if (rc) { /* Supported features not returned correctly. */ 8390 dev_err(&ctrl_info->pci_dev->dev, 8391 "error obtaining advanced RAID bypass configuration\n"); 8392 return rc; 8393 } 8394 ctrl_info->ciss_report_log_flags |= 8395 CISS_REPORT_LOG_FLAG_DRIVE_TYPE_MIX; 8396 } 8397 8398 rc = pqi_enable_events(ctrl_info); 8399 if (rc) { 8400 dev_err(&ctrl_info->pci_dev->dev, 8401 "error enabling events\n"); 8402 return rc; 8403 } 8404 8405 /* Register with the SCSI subsystem. */ 8406 rc = pqi_register_scsi(ctrl_info); 8407 if (rc) 8408 return rc; 8409 8410 rc = pqi_get_ctrl_product_details(ctrl_info); 8411 if (rc) { 8412 dev_err(&ctrl_info->pci_dev->dev, 8413 "error obtaining product details\n"); 8414 return rc; 8415 } 8416 8417 rc = pqi_get_ctrl_serial_number(ctrl_info); 8418 if (rc) { 8419 dev_err(&ctrl_info->pci_dev->dev, 8420 "error obtaining ctrl serial number\n"); 8421 return rc; 8422 } 8423 8424 rc = pqi_set_diag_rescan(ctrl_info); 8425 if (rc) { 8426 dev_err(&ctrl_info->pci_dev->dev, 8427 "error enabling multi-lun rescan\n"); 8428 return rc; 8429 } 8430 8431 rc = pqi_write_driver_version_to_host_wellness(ctrl_info); 8432 if (rc) { 8433 dev_err(&ctrl_info->pci_dev->dev, 8434 "error updating host wellness\n"); 8435 return rc; 8436 } 8437 8438 pqi_schedule_update_time_worker(ctrl_info); 8439 8440 pqi_scan_scsi_devices(ctrl_info); 8441 8442 return 0; 8443 } 8444 8445 static void pqi_reinit_queues(struct pqi_ctrl_info *ctrl_info) 8446 { 8447 unsigned int i; 8448 struct pqi_admin_queues *admin_queues; 8449 struct pqi_event_queue *event_queue; 8450 8451 admin_queues = &ctrl_info->admin_queues; 8452 admin_queues->iq_pi_copy = 0; 8453 admin_queues->oq_ci_copy = 0; 8454 writel(0, admin_queues->oq_pi); 8455 8456 for (i = 0; i < ctrl_info->num_queue_groups; i++) { 8457 ctrl_info->queue_groups[i].iq_pi_copy[RAID_PATH] = 0; 8458 ctrl_info->queue_groups[i].iq_pi_copy[AIO_PATH] = 0; 8459 ctrl_info->queue_groups[i].oq_ci_copy = 0; 8460 8461 writel(0, ctrl_info->queue_groups[i].iq_ci[RAID_PATH]); 8462 writel(0, ctrl_info->queue_groups[i].iq_ci[AIO_PATH]); 8463 writel(0, ctrl_info->queue_groups[i].oq_pi); 8464 } 8465 8466 event_queue = &ctrl_info->event_queue; 8467 writel(0, event_queue->oq_pi); 8468 event_queue->oq_ci_copy = 0; 8469 } 8470 8471 static int pqi_ctrl_init_resume(struct pqi_ctrl_info *ctrl_info) 8472 { 8473 int rc; 8474 8475 rc = pqi_force_sis_mode(ctrl_info); 8476 if (rc) 8477 return rc; 8478 8479 /* 8480 * Wait until the controller is ready to start accepting SIS 8481 * commands. 8482 */ 8483 rc = sis_wait_for_ctrl_ready_resume(ctrl_info); 8484 if (rc) 8485 return rc; 8486 8487 /* 8488 * Get the controller properties. This allows us to determine 8489 * whether or not it supports PQI mode. 8490 */ 8491 rc = sis_get_ctrl_properties(ctrl_info); 8492 if (rc) { 8493 dev_err(&ctrl_info->pci_dev->dev, 8494 "error obtaining controller properties\n"); 8495 return rc; 8496 } 8497 8498 rc = sis_get_pqi_capabilities(ctrl_info); 8499 if (rc) { 8500 dev_err(&ctrl_info->pci_dev->dev, 8501 "error obtaining controller capabilities\n"); 8502 return rc; 8503 } 8504 8505 /* 8506 * If the function we are about to call succeeds, the 8507 * controller will transition from legacy SIS mode 8508 * into PQI mode. 8509 */ 8510 rc = sis_init_base_struct_addr(ctrl_info); 8511 if (rc) { 8512 dev_err(&ctrl_info->pci_dev->dev, 8513 "error initializing PQI mode\n"); 8514 return rc; 8515 } 8516 8517 /* Wait for the controller to complete the SIS -> PQI transition. */ 8518 rc = pqi_wait_for_pqi_mode_ready(ctrl_info); 8519 if (rc) { 8520 dev_err(&ctrl_info->pci_dev->dev, 8521 "transition to PQI mode failed\n"); 8522 return rc; 8523 } 8524 8525 /* From here on, we are running in PQI mode. */ 8526 ctrl_info->pqi_mode_enabled = true; 8527 pqi_save_ctrl_mode(ctrl_info, PQI_MODE); 8528 8529 pqi_reinit_queues(ctrl_info); 8530 8531 rc = pqi_create_admin_queues(ctrl_info); 8532 if (rc) { 8533 dev_err(&ctrl_info->pci_dev->dev, 8534 "error creating admin queues\n"); 8535 return rc; 8536 } 8537 8538 rc = pqi_create_queues(ctrl_info); 8539 if (rc) 8540 return rc; 8541 8542 pqi_change_irq_mode(ctrl_info, IRQ_MODE_MSIX); 8543 8544 ctrl_info->controller_online = true; 8545 pqi_ctrl_unblock_requests(ctrl_info); 8546 8547 pqi_ctrl_reset_config(ctrl_info); 8548 8549 rc = pqi_process_config_table(ctrl_info); 8550 if (rc) 8551 return rc; 8552 8553 pqi_start_heartbeat_timer(ctrl_info); 8554 8555 if (ctrl_info->enable_r5_writes || ctrl_info->enable_r6_writes) { 8556 rc = pqi_get_advanced_raid_bypass_config(ctrl_info); 8557 if (rc) { 8558 dev_err(&ctrl_info->pci_dev->dev, 8559 "error obtaining advanced RAID bypass configuration\n"); 8560 return rc; 8561 } 8562 ctrl_info->ciss_report_log_flags |= 8563 CISS_REPORT_LOG_FLAG_DRIVE_TYPE_MIX; 8564 } 8565 8566 rc = pqi_enable_events(ctrl_info); 8567 if (rc) { 8568 dev_err(&ctrl_info->pci_dev->dev, 8569 "error enabling events\n"); 8570 return rc; 8571 } 8572 8573 rc = pqi_get_ctrl_product_details(ctrl_info); 8574 if (rc) { 8575 dev_err(&ctrl_info->pci_dev->dev, 8576 "error obtaining product details\n"); 8577 return rc; 8578 } 8579 8580 rc = pqi_set_diag_rescan(ctrl_info); 8581 if (rc) { 8582 dev_err(&ctrl_info->pci_dev->dev, 8583 "error enabling multi-lun rescan\n"); 8584 return rc; 8585 } 8586 8587 rc = pqi_write_driver_version_to_host_wellness(ctrl_info); 8588 if (rc) { 8589 dev_err(&ctrl_info->pci_dev->dev, 8590 "error updating host wellness\n"); 8591 return rc; 8592 } 8593 8594 if (pqi_ofa_in_progress(ctrl_info)) 8595 pqi_ctrl_unblock_scan(ctrl_info); 8596 8597 pqi_scan_scsi_devices(ctrl_info); 8598 8599 return 0; 8600 } 8601 8602 static inline int pqi_set_pcie_completion_timeout(struct pci_dev *pci_dev, u16 timeout) 8603 { 8604 int rc; 8605 8606 rc = pcie_capability_clear_and_set_word(pci_dev, PCI_EXP_DEVCTL2, 8607 PCI_EXP_DEVCTL2_COMP_TIMEOUT, timeout); 8608 8609 return pcibios_err_to_errno(rc); 8610 } 8611 8612 static int pqi_pci_init(struct pqi_ctrl_info *ctrl_info) 8613 { 8614 int rc; 8615 u64 mask; 8616 8617 rc = pci_enable_device(ctrl_info->pci_dev); 8618 if (rc) { 8619 dev_err(&ctrl_info->pci_dev->dev, 8620 "failed to enable PCI device\n"); 8621 return rc; 8622 } 8623 8624 if (sizeof(dma_addr_t) > 4) 8625 mask = DMA_BIT_MASK(64); 8626 else 8627 mask = DMA_BIT_MASK(32); 8628 8629 rc = dma_set_mask_and_coherent(&ctrl_info->pci_dev->dev, mask); 8630 if (rc) { 8631 dev_err(&ctrl_info->pci_dev->dev, "failed to set DMA mask\n"); 8632 goto disable_device; 8633 } 8634 8635 rc = pci_request_regions(ctrl_info->pci_dev, DRIVER_NAME_SHORT); 8636 if (rc) { 8637 dev_err(&ctrl_info->pci_dev->dev, 8638 "failed to obtain PCI resources\n"); 8639 goto disable_device; 8640 } 8641 8642 ctrl_info->iomem_base = ioremap(pci_resource_start( 8643 ctrl_info->pci_dev, 0), 8644 pci_resource_len(ctrl_info->pci_dev, 0)); 8645 if (!ctrl_info->iomem_base) { 8646 dev_err(&ctrl_info->pci_dev->dev, 8647 "failed to map memory for controller registers\n"); 8648 rc = -ENOMEM; 8649 goto release_regions; 8650 } 8651 8652 #define PCI_EXP_COMP_TIMEOUT_65_TO_210_MS 0x6 8653 8654 /* Increase the PCIe completion timeout. */ 8655 rc = pqi_set_pcie_completion_timeout(ctrl_info->pci_dev, 8656 PCI_EXP_COMP_TIMEOUT_65_TO_210_MS); 8657 if (rc) { 8658 dev_err(&ctrl_info->pci_dev->dev, 8659 "failed to set PCIe completion timeout\n"); 8660 goto release_regions; 8661 } 8662 8663 /* Enable bus mastering. */ 8664 pci_set_master(ctrl_info->pci_dev); 8665 8666 ctrl_info->registers = ctrl_info->iomem_base; 8667 ctrl_info->pqi_registers = &ctrl_info->registers->pqi_registers; 8668 8669 pci_set_drvdata(ctrl_info->pci_dev, ctrl_info); 8670 8671 return 0; 8672 8673 release_regions: 8674 pci_release_regions(ctrl_info->pci_dev); 8675 disable_device: 8676 pci_disable_device(ctrl_info->pci_dev); 8677 8678 return rc; 8679 } 8680 8681 static void pqi_cleanup_pci_init(struct pqi_ctrl_info *ctrl_info) 8682 { 8683 iounmap(ctrl_info->iomem_base); 8684 pci_release_regions(ctrl_info->pci_dev); 8685 if (pci_is_enabled(ctrl_info->pci_dev)) 8686 pci_disable_device(ctrl_info->pci_dev); 8687 pci_set_drvdata(ctrl_info->pci_dev, NULL); 8688 } 8689 8690 static struct pqi_ctrl_info *pqi_alloc_ctrl_info(int numa_node) 8691 { 8692 struct pqi_ctrl_info *ctrl_info; 8693 8694 ctrl_info = kzalloc_node(sizeof(struct pqi_ctrl_info), 8695 GFP_KERNEL, numa_node); 8696 if (!ctrl_info) 8697 return NULL; 8698 8699 mutex_init(&ctrl_info->scan_mutex); 8700 mutex_init(&ctrl_info->lun_reset_mutex); 8701 mutex_init(&ctrl_info->ofa_mutex); 8702 8703 INIT_LIST_HEAD(&ctrl_info->scsi_device_list); 8704 spin_lock_init(&ctrl_info->scsi_device_list_lock); 8705 8706 INIT_WORK(&ctrl_info->event_work, pqi_event_worker); 8707 atomic_set(&ctrl_info->num_interrupts, 0); 8708 8709 INIT_DELAYED_WORK(&ctrl_info->rescan_work, pqi_rescan_worker); 8710 INIT_DELAYED_WORK(&ctrl_info->update_time_work, pqi_update_time_worker); 8711 8712 timer_setup(&ctrl_info->heartbeat_timer, pqi_heartbeat_timer_handler, 0); 8713 INIT_WORK(&ctrl_info->ctrl_offline_work, pqi_ctrl_offline_worker); 8714 8715 INIT_WORK(&ctrl_info->ofa_memory_alloc_work, pqi_ofa_memory_alloc_worker); 8716 INIT_WORK(&ctrl_info->ofa_quiesce_work, pqi_ofa_quiesce_worker); 8717 8718 sema_init(&ctrl_info->sync_request_sem, 8719 PQI_RESERVED_IO_SLOTS_SYNCHRONOUS_REQUESTS); 8720 init_waitqueue_head(&ctrl_info->block_requests_wait); 8721 8722 ctrl_info->ctrl_id = atomic_inc_return(&pqi_controller_count) - 1; 8723 ctrl_info->irq_mode = IRQ_MODE_NONE; 8724 ctrl_info->max_msix_vectors = PQI_MAX_MSIX_VECTORS; 8725 8726 ctrl_info->ciss_report_log_flags = CISS_REPORT_LOG_FLAG_UNIQUE_LUN_ID; 8727 ctrl_info->max_transfer_encrypted_sas_sata = 8728 PQI_DEFAULT_MAX_TRANSFER_ENCRYPTED_SAS_SATA; 8729 ctrl_info->max_transfer_encrypted_nvme = 8730 PQI_DEFAULT_MAX_TRANSFER_ENCRYPTED_NVME; 8731 ctrl_info->max_write_raid_5_6 = PQI_DEFAULT_MAX_WRITE_RAID_5_6; 8732 ctrl_info->max_write_raid_1_10_2drive = ~0; 8733 ctrl_info->max_write_raid_1_10_3drive = ~0; 8734 ctrl_info->disable_managed_interrupts = pqi_disable_managed_interrupts; 8735 8736 return ctrl_info; 8737 } 8738 8739 static inline void pqi_free_ctrl_info(struct pqi_ctrl_info *ctrl_info) 8740 { 8741 kfree(ctrl_info); 8742 } 8743 8744 static void pqi_free_interrupts(struct pqi_ctrl_info *ctrl_info) 8745 { 8746 pqi_free_irqs(ctrl_info); 8747 pqi_disable_msix_interrupts(ctrl_info); 8748 } 8749 8750 static void pqi_free_ctrl_resources(struct pqi_ctrl_info *ctrl_info) 8751 { 8752 pqi_free_interrupts(ctrl_info); 8753 if (ctrl_info->queue_memory_base) 8754 dma_free_coherent(&ctrl_info->pci_dev->dev, 8755 ctrl_info->queue_memory_length, 8756 ctrl_info->queue_memory_base, 8757 ctrl_info->queue_memory_base_dma_handle); 8758 if (ctrl_info->admin_queue_memory_base) 8759 dma_free_coherent(&ctrl_info->pci_dev->dev, 8760 ctrl_info->admin_queue_memory_length, 8761 ctrl_info->admin_queue_memory_base, 8762 ctrl_info->admin_queue_memory_base_dma_handle); 8763 pqi_free_all_io_requests(ctrl_info); 8764 if (ctrl_info->error_buffer) 8765 dma_free_coherent(&ctrl_info->pci_dev->dev, 8766 ctrl_info->error_buffer_length, 8767 ctrl_info->error_buffer, 8768 ctrl_info->error_buffer_dma_handle); 8769 if (ctrl_info->iomem_base) 8770 pqi_cleanup_pci_init(ctrl_info); 8771 pqi_free_ctrl_info(ctrl_info); 8772 } 8773 8774 static void pqi_remove_ctrl(struct pqi_ctrl_info *ctrl_info) 8775 { 8776 ctrl_info->controller_online = false; 8777 pqi_stop_heartbeat_timer(ctrl_info); 8778 pqi_ctrl_block_requests(ctrl_info); 8779 pqi_cancel_rescan_worker(ctrl_info); 8780 pqi_cancel_update_time_worker(ctrl_info); 8781 if (ctrl_info->ctrl_removal_state == PQI_CTRL_SURPRISE_REMOVAL) { 8782 pqi_fail_all_outstanding_requests(ctrl_info); 8783 ctrl_info->pqi_mode_enabled = false; 8784 } 8785 pqi_unregister_scsi(ctrl_info); 8786 if (ctrl_info->pqi_mode_enabled) 8787 pqi_revert_to_sis_mode(ctrl_info); 8788 pqi_free_ctrl_resources(ctrl_info); 8789 } 8790 8791 static void pqi_ofa_ctrl_quiesce(struct pqi_ctrl_info *ctrl_info) 8792 { 8793 pqi_ctrl_block_scan(ctrl_info); 8794 pqi_scsi_block_requests(ctrl_info); 8795 pqi_ctrl_block_device_reset(ctrl_info); 8796 pqi_ctrl_block_requests(ctrl_info); 8797 pqi_ctrl_wait_until_quiesced(ctrl_info); 8798 pqi_stop_heartbeat_timer(ctrl_info); 8799 } 8800 8801 static void pqi_ofa_ctrl_unquiesce(struct pqi_ctrl_info *ctrl_info) 8802 { 8803 pqi_start_heartbeat_timer(ctrl_info); 8804 pqi_ctrl_unblock_requests(ctrl_info); 8805 pqi_ctrl_unblock_device_reset(ctrl_info); 8806 pqi_scsi_unblock_requests(ctrl_info); 8807 pqi_ctrl_unblock_scan(ctrl_info); 8808 } 8809 8810 static int pqi_ofa_alloc_mem(struct pqi_ctrl_info *ctrl_info, u32 total_size, u32 chunk_size) 8811 { 8812 int i; 8813 u32 sg_count; 8814 struct device *dev; 8815 struct pqi_ofa_memory *ofap; 8816 struct pqi_sg_descriptor *mem_descriptor; 8817 dma_addr_t dma_handle; 8818 8819 ofap = ctrl_info->pqi_ofa_mem_virt_addr; 8820 8821 sg_count = DIV_ROUND_UP(total_size, chunk_size); 8822 if (sg_count == 0 || sg_count > PQI_OFA_MAX_SG_DESCRIPTORS) 8823 goto out; 8824 8825 ctrl_info->pqi_ofa_chunk_virt_addr = kmalloc_array(sg_count, sizeof(void *), GFP_KERNEL); 8826 if (!ctrl_info->pqi_ofa_chunk_virt_addr) 8827 goto out; 8828 8829 dev = &ctrl_info->pci_dev->dev; 8830 8831 for (i = 0; i < sg_count; i++) { 8832 ctrl_info->pqi_ofa_chunk_virt_addr[i] = 8833 dma_alloc_coherent(dev, chunk_size, &dma_handle, GFP_KERNEL); 8834 if (!ctrl_info->pqi_ofa_chunk_virt_addr[i]) 8835 goto out_free_chunks; 8836 mem_descriptor = &ofap->sg_descriptor[i]; 8837 put_unaligned_le64((u64)dma_handle, &mem_descriptor->address); 8838 put_unaligned_le32(chunk_size, &mem_descriptor->length); 8839 } 8840 8841 put_unaligned_le32(CISS_SG_LAST, &mem_descriptor->flags); 8842 put_unaligned_le16(sg_count, &ofap->num_memory_descriptors); 8843 put_unaligned_le32(sg_count * chunk_size, &ofap->bytes_allocated); 8844 8845 return 0; 8846 8847 out_free_chunks: 8848 while (--i >= 0) { 8849 mem_descriptor = &ofap->sg_descriptor[i]; 8850 dma_free_coherent(dev, chunk_size, 8851 ctrl_info->pqi_ofa_chunk_virt_addr[i], 8852 get_unaligned_le64(&mem_descriptor->address)); 8853 } 8854 kfree(ctrl_info->pqi_ofa_chunk_virt_addr); 8855 8856 out: 8857 return -ENOMEM; 8858 } 8859 8860 static int pqi_ofa_alloc_host_buffer(struct pqi_ctrl_info *ctrl_info) 8861 { 8862 u32 total_size; 8863 u32 chunk_size; 8864 u32 min_chunk_size; 8865 8866 if (ctrl_info->ofa_bytes_requested == 0) 8867 return 0; 8868 8869 total_size = PAGE_ALIGN(ctrl_info->ofa_bytes_requested); 8870 min_chunk_size = DIV_ROUND_UP(total_size, PQI_OFA_MAX_SG_DESCRIPTORS); 8871 min_chunk_size = PAGE_ALIGN(min_chunk_size); 8872 8873 for (chunk_size = total_size; chunk_size >= min_chunk_size;) { 8874 if (pqi_ofa_alloc_mem(ctrl_info, total_size, chunk_size) == 0) 8875 return 0; 8876 chunk_size /= 2; 8877 chunk_size = PAGE_ALIGN(chunk_size); 8878 } 8879 8880 return -ENOMEM; 8881 } 8882 8883 static void pqi_ofa_setup_host_buffer(struct pqi_ctrl_info *ctrl_info) 8884 { 8885 struct device *dev; 8886 struct pqi_ofa_memory *ofap; 8887 8888 dev = &ctrl_info->pci_dev->dev; 8889 8890 ofap = dma_alloc_coherent(dev, sizeof(*ofap), 8891 &ctrl_info->pqi_ofa_mem_dma_handle, GFP_KERNEL); 8892 if (!ofap) 8893 return; 8894 8895 ctrl_info->pqi_ofa_mem_virt_addr = ofap; 8896 8897 if (pqi_ofa_alloc_host_buffer(ctrl_info) < 0) { 8898 dev_err(dev, 8899 "failed to allocate host buffer for Online Firmware Activation\n"); 8900 dma_free_coherent(dev, sizeof(*ofap), ofap, ctrl_info->pqi_ofa_mem_dma_handle); 8901 ctrl_info->pqi_ofa_mem_virt_addr = NULL; 8902 return; 8903 } 8904 8905 put_unaligned_le16(PQI_OFA_VERSION, &ofap->version); 8906 memcpy(&ofap->signature, PQI_OFA_SIGNATURE, sizeof(ofap->signature)); 8907 } 8908 8909 static void pqi_ofa_free_host_buffer(struct pqi_ctrl_info *ctrl_info) 8910 { 8911 unsigned int i; 8912 struct device *dev; 8913 struct pqi_ofa_memory *ofap; 8914 struct pqi_sg_descriptor *mem_descriptor; 8915 unsigned int num_memory_descriptors; 8916 8917 ofap = ctrl_info->pqi_ofa_mem_virt_addr; 8918 if (!ofap) 8919 return; 8920 8921 dev = &ctrl_info->pci_dev->dev; 8922 8923 if (get_unaligned_le32(&ofap->bytes_allocated) == 0) 8924 goto out; 8925 8926 mem_descriptor = ofap->sg_descriptor; 8927 num_memory_descriptors = 8928 get_unaligned_le16(&ofap->num_memory_descriptors); 8929 8930 for (i = 0; i < num_memory_descriptors; i++) { 8931 dma_free_coherent(dev, 8932 get_unaligned_le32(&mem_descriptor[i].length), 8933 ctrl_info->pqi_ofa_chunk_virt_addr[i], 8934 get_unaligned_le64(&mem_descriptor[i].address)); 8935 } 8936 kfree(ctrl_info->pqi_ofa_chunk_virt_addr); 8937 8938 out: 8939 dma_free_coherent(dev, sizeof(*ofap), ofap, 8940 ctrl_info->pqi_ofa_mem_dma_handle); 8941 ctrl_info->pqi_ofa_mem_virt_addr = NULL; 8942 } 8943 8944 static int pqi_ofa_host_memory_update(struct pqi_ctrl_info *ctrl_info) 8945 { 8946 u32 buffer_length; 8947 struct pqi_vendor_general_request request; 8948 struct pqi_ofa_memory *ofap; 8949 8950 memset(&request, 0, sizeof(request)); 8951 8952 request.header.iu_type = PQI_REQUEST_IU_VENDOR_GENERAL; 8953 put_unaligned_le16(sizeof(request) - PQI_REQUEST_HEADER_LENGTH, 8954 &request.header.iu_length); 8955 put_unaligned_le16(PQI_VENDOR_GENERAL_HOST_MEMORY_UPDATE, 8956 &request.function_code); 8957 8958 ofap = ctrl_info->pqi_ofa_mem_virt_addr; 8959 8960 if (ofap) { 8961 buffer_length = offsetof(struct pqi_ofa_memory, sg_descriptor) + 8962 get_unaligned_le16(&ofap->num_memory_descriptors) * 8963 sizeof(struct pqi_sg_descriptor); 8964 8965 put_unaligned_le64((u64)ctrl_info->pqi_ofa_mem_dma_handle, 8966 &request.data.ofa_memory_allocation.buffer_address); 8967 put_unaligned_le32(buffer_length, 8968 &request.data.ofa_memory_allocation.buffer_length); 8969 } 8970 8971 return pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 0, NULL); 8972 } 8973 8974 static int pqi_ofa_ctrl_restart(struct pqi_ctrl_info *ctrl_info, unsigned int delay_secs) 8975 { 8976 ssleep(delay_secs); 8977 8978 return pqi_ctrl_init_resume(ctrl_info); 8979 } 8980 8981 static struct pqi_raid_error_info pqi_ctrl_offline_raid_error_info = { 8982 .data_out_result = PQI_DATA_IN_OUT_HARDWARE_ERROR, 8983 .status = SAM_STAT_CHECK_CONDITION, 8984 }; 8985 8986 static void pqi_fail_all_outstanding_requests(struct pqi_ctrl_info *ctrl_info) 8987 { 8988 unsigned int i; 8989 struct pqi_io_request *io_request; 8990 struct scsi_cmnd *scmd; 8991 struct scsi_device *sdev; 8992 8993 for (i = 0; i < ctrl_info->max_io_slots; i++) { 8994 io_request = &ctrl_info->io_request_pool[i]; 8995 if (atomic_read(&io_request->refcount) == 0) 8996 continue; 8997 8998 scmd = io_request->scmd; 8999 if (scmd) { 9000 sdev = scmd->device; 9001 if (!sdev || !scsi_device_online(sdev)) { 9002 pqi_free_io_request(io_request); 9003 continue; 9004 } else { 9005 set_host_byte(scmd, DID_NO_CONNECT); 9006 } 9007 } else { 9008 io_request->status = -ENXIO; 9009 io_request->error_info = 9010 &pqi_ctrl_offline_raid_error_info; 9011 } 9012 9013 io_request->io_complete_callback(io_request, 9014 io_request->context); 9015 } 9016 } 9017 9018 static void pqi_take_ctrl_offline_deferred(struct pqi_ctrl_info *ctrl_info) 9019 { 9020 pqi_perform_lockup_action(); 9021 pqi_stop_heartbeat_timer(ctrl_info); 9022 pqi_free_interrupts(ctrl_info); 9023 pqi_cancel_rescan_worker(ctrl_info); 9024 pqi_cancel_update_time_worker(ctrl_info); 9025 pqi_ctrl_wait_until_quiesced(ctrl_info); 9026 pqi_fail_all_outstanding_requests(ctrl_info); 9027 pqi_ctrl_unblock_requests(ctrl_info); 9028 } 9029 9030 static void pqi_ctrl_offline_worker(struct work_struct *work) 9031 { 9032 struct pqi_ctrl_info *ctrl_info; 9033 9034 ctrl_info = container_of(work, struct pqi_ctrl_info, ctrl_offline_work); 9035 pqi_take_ctrl_offline_deferred(ctrl_info); 9036 } 9037 9038 static char *pqi_ctrl_shutdown_reason_to_string(enum pqi_ctrl_shutdown_reason ctrl_shutdown_reason) 9039 { 9040 char *string; 9041 9042 switch (ctrl_shutdown_reason) { 9043 case PQI_IQ_NOT_DRAINED_TIMEOUT: 9044 string = "inbound queue not drained timeout"; 9045 break; 9046 case PQI_LUN_RESET_TIMEOUT: 9047 string = "LUN reset timeout"; 9048 break; 9049 case PQI_IO_PENDING_POST_LUN_RESET_TIMEOUT: 9050 string = "I/O pending timeout after LUN reset"; 9051 break; 9052 case PQI_NO_HEARTBEAT: 9053 string = "no controller heartbeat detected"; 9054 break; 9055 case PQI_FIRMWARE_KERNEL_NOT_UP: 9056 string = "firmware kernel not ready"; 9057 break; 9058 case PQI_OFA_RESPONSE_TIMEOUT: 9059 string = "OFA response timeout"; 9060 break; 9061 case PQI_INVALID_REQ_ID: 9062 string = "invalid request ID"; 9063 break; 9064 case PQI_UNMATCHED_REQ_ID: 9065 string = "unmatched request ID"; 9066 break; 9067 case PQI_IO_PI_OUT_OF_RANGE: 9068 string = "I/O queue producer index out of range"; 9069 break; 9070 case PQI_EVENT_PI_OUT_OF_RANGE: 9071 string = "event queue producer index out of range"; 9072 break; 9073 case PQI_UNEXPECTED_IU_TYPE: 9074 string = "unexpected IU type"; 9075 break; 9076 default: 9077 string = "unknown reason"; 9078 break; 9079 } 9080 9081 return string; 9082 } 9083 9084 static void pqi_take_ctrl_offline(struct pqi_ctrl_info *ctrl_info, 9085 enum pqi_ctrl_shutdown_reason ctrl_shutdown_reason) 9086 { 9087 if (!ctrl_info->controller_online) 9088 return; 9089 9090 ctrl_info->controller_online = false; 9091 ctrl_info->pqi_mode_enabled = false; 9092 pqi_ctrl_block_requests(ctrl_info); 9093 if (!pqi_disable_ctrl_shutdown) 9094 sis_shutdown_ctrl(ctrl_info, ctrl_shutdown_reason); 9095 pci_disable_device(ctrl_info->pci_dev); 9096 dev_err(&ctrl_info->pci_dev->dev, 9097 "controller offline: reason code 0x%x (%s)\n", 9098 ctrl_shutdown_reason, pqi_ctrl_shutdown_reason_to_string(ctrl_shutdown_reason)); 9099 schedule_work(&ctrl_info->ctrl_offline_work); 9100 } 9101 9102 static void pqi_print_ctrl_info(struct pci_dev *pci_dev, 9103 const struct pci_device_id *id) 9104 { 9105 char *ctrl_description; 9106 9107 if (id->driver_data) 9108 ctrl_description = (char *)id->driver_data; 9109 else 9110 ctrl_description = "Microchip Smart Family Controller"; 9111 9112 dev_info(&pci_dev->dev, "%s found\n", ctrl_description); 9113 } 9114 9115 static int pqi_pci_probe(struct pci_dev *pci_dev, 9116 const struct pci_device_id *id) 9117 { 9118 int rc; 9119 int node; 9120 struct pqi_ctrl_info *ctrl_info; 9121 9122 pqi_print_ctrl_info(pci_dev, id); 9123 9124 if (pqi_disable_device_id_wildcards && 9125 id->subvendor == PCI_ANY_ID && 9126 id->subdevice == PCI_ANY_ID) { 9127 dev_warn(&pci_dev->dev, 9128 "controller not probed because device ID wildcards are disabled\n"); 9129 return -ENODEV; 9130 } 9131 9132 if (id->subvendor == PCI_ANY_ID || id->subdevice == PCI_ANY_ID) 9133 dev_warn(&pci_dev->dev, 9134 "controller device ID matched using wildcards\n"); 9135 9136 node = dev_to_node(&pci_dev->dev); 9137 if (node == NUMA_NO_NODE) { 9138 node = cpu_to_node(0); 9139 if (node == NUMA_NO_NODE) 9140 node = 0; 9141 set_dev_node(&pci_dev->dev, node); 9142 } 9143 9144 ctrl_info = pqi_alloc_ctrl_info(node); 9145 if (!ctrl_info) { 9146 dev_err(&pci_dev->dev, 9147 "failed to allocate controller info block\n"); 9148 return -ENOMEM; 9149 } 9150 ctrl_info->numa_node = node; 9151 9152 ctrl_info->pci_dev = pci_dev; 9153 9154 rc = pqi_pci_init(ctrl_info); 9155 if (rc) 9156 goto error; 9157 9158 rc = pqi_ctrl_init(ctrl_info); 9159 if (rc) 9160 goto error; 9161 9162 return 0; 9163 9164 error: 9165 pqi_remove_ctrl(ctrl_info); 9166 9167 return rc; 9168 } 9169 9170 static void pqi_pci_remove(struct pci_dev *pci_dev) 9171 { 9172 struct pqi_ctrl_info *ctrl_info; 9173 u16 vendor_id; 9174 int rc; 9175 9176 ctrl_info = pci_get_drvdata(pci_dev); 9177 if (!ctrl_info) 9178 return; 9179 9180 pci_read_config_word(ctrl_info->pci_dev, PCI_SUBSYSTEM_VENDOR_ID, &vendor_id); 9181 if (vendor_id == 0xffff) 9182 ctrl_info->ctrl_removal_state = PQI_CTRL_SURPRISE_REMOVAL; 9183 else 9184 ctrl_info->ctrl_removal_state = PQI_CTRL_GRACEFUL_REMOVAL; 9185 9186 if (ctrl_info->ctrl_removal_state == PQI_CTRL_GRACEFUL_REMOVAL) { 9187 rc = pqi_flush_cache(ctrl_info, RESTART); 9188 if (rc) 9189 dev_err(&pci_dev->dev, 9190 "unable to flush controller cache during remove\n"); 9191 } 9192 9193 pqi_remove_ctrl(ctrl_info); 9194 } 9195 9196 static void pqi_crash_if_pending_command(struct pqi_ctrl_info *ctrl_info) 9197 { 9198 unsigned int i; 9199 struct pqi_io_request *io_request; 9200 struct scsi_cmnd *scmd; 9201 9202 for (i = 0; i < ctrl_info->max_io_slots; i++) { 9203 io_request = &ctrl_info->io_request_pool[i]; 9204 if (atomic_read(&io_request->refcount) == 0) 9205 continue; 9206 scmd = io_request->scmd; 9207 WARN_ON(scmd != NULL); /* IO command from SML */ 9208 WARN_ON(scmd == NULL); /* Non-IO cmd or driver initiated*/ 9209 } 9210 } 9211 9212 static void pqi_shutdown(struct pci_dev *pci_dev) 9213 { 9214 int rc; 9215 struct pqi_ctrl_info *ctrl_info; 9216 enum bmic_flush_cache_shutdown_event shutdown_event; 9217 9218 ctrl_info = pci_get_drvdata(pci_dev); 9219 if (!ctrl_info) { 9220 dev_err(&pci_dev->dev, 9221 "cache could not be flushed\n"); 9222 return; 9223 } 9224 9225 pqi_wait_until_ofa_finished(ctrl_info); 9226 9227 pqi_scsi_block_requests(ctrl_info); 9228 pqi_ctrl_block_device_reset(ctrl_info); 9229 pqi_ctrl_block_requests(ctrl_info); 9230 pqi_ctrl_wait_until_quiesced(ctrl_info); 9231 9232 if (system_state == SYSTEM_RESTART) 9233 shutdown_event = RESTART; 9234 else 9235 shutdown_event = SHUTDOWN; 9236 9237 /* 9238 * Write all data in the controller's battery-backed cache to 9239 * storage. 9240 */ 9241 rc = pqi_flush_cache(ctrl_info, shutdown_event); 9242 if (rc) 9243 dev_err(&pci_dev->dev, 9244 "unable to flush controller cache during shutdown\n"); 9245 9246 pqi_crash_if_pending_command(ctrl_info); 9247 pqi_reset(ctrl_info); 9248 } 9249 9250 static void pqi_process_lockup_action_param(void) 9251 { 9252 unsigned int i; 9253 9254 if (!pqi_lockup_action_param) 9255 return; 9256 9257 for (i = 0; i < ARRAY_SIZE(pqi_lockup_actions); i++) { 9258 if (strcmp(pqi_lockup_action_param, 9259 pqi_lockup_actions[i].name) == 0) { 9260 pqi_lockup_action = pqi_lockup_actions[i].action; 9261 return; 9262 } 9263 } 9264 9265 pr_warn("%s: invalid lockup action setting \"%s\" - supported settings: none, reboot, panic\n", 9266 DRIVER_NAME_SHORT, pqi_lockup_action_param); 9267 } 9268 9269 #define PQI_CTRL_READY_TIMEOUT_PARAM_MIN_SECS 30 9270 #define PQI_CTRL_READY_TIMEOUT_PARAM_MAX_SECS (30 * 60) 9271 9272 static void pqi_process_ctrl_ready_timeout_param(void) 9273 { 9274 if (pqi_ctrl_ready_timeout_secs == 0) 9275 return; 9276 9277 if (pqi_ctrl_ready_timeout_secs < PQI_CTRL_READY_TIMEOUT_PARAM_MIN_SECS) { 9278 pr_warn("%s: ctrl_ready_timeout parm of %u second(s) is less than minimum timeout of %d seconds - setting timeout to %d seconds\n", 9279 DRIVER_NAME_SHORT, pqi_ctrl_ready_timeout_secs, PQI_CTRL_READY_TIMEOUT_PARAM_MIN_SECS, PQI_CTRL_READY_TIMEOUT_PARAM_MIN_SECS); 9280 pqi_ctrl_ready_timeout_secs = PQI_CTRL_READY_TIMEOUT_PARAM_MIN_SECS; 9281 } else if (pqi_ctrl_ready_timeout_secs > PQI_CTRL_READY_TIMEOUT_PARAM_MAX_SECS) { 9282 pr_warn("%s: ctrl_ready_timeout parm of %u seconds is greater than maximum timeout of %d seconds - setting timeout to %d seconds\n", 9283 DRIVER_NAME_SHORT, pqi_ctrl_ready_timeout_secs, PQI_CTRL_READY_TIMEOUT_PARAM_MAX_SECS, PQI_CTRL_READY_TIMEOUT_PARAM_MAX_SECS); 9284 pqi_ctrl_ready_timeout_secs = PQI_CTRL_READY_TIMEOUT_PARAM_MAX_SECS; 9285 } 9286 9287 sis_ctrl_ready_timeout_secs = pqi_ctrl_ready_timeout_secs; 9288 } 9289 9290 static void pqi_process_module_params(void) 9291 { 9292 pqi_process_lockup_action_param(); 9293 pqi_process_ctrl_ready_timeout_param(); 9294 } 9295 9296 #if defined(CONFIG_PM) 9297 9298 static inline enum bmic_flush_cache_shutdown_event pqi_get_flush_cache_shutdown_event(struct pci_dev *pci_dev) 9299 { 9300 if (pci_dev->subsystem_vendor == PCI_VENDOR_ID_ADAPTEC2 && pci_dev->subsystem_device == 0x1304) 9301 return RESTART; 9302 9303 return SUSPEND; 9304 } 9305 9306 static int pqi_suspend_or_freeze(struct device *dev, bool suspend) 9307 { 9308 struct pci_dev *pci_dev; 9309 struct pqi_ctrl_info *ctrl_info; 9310 9311 pci_dev = to_pci_dev(dev); 9312 ctrl_info = pci_get_drvdata(pci_dev); 9313 9314 pqi_wait_until_ofa_finished(ctrl_info); 9315 9316 pqi_ctrl_block_scan(ctrl_info); 9317 pqi_scsi_block_requests(ctrl_info); 9318 pqi_ctrl_block_device_reset(ctrl_info); 9319 pqi_ctrl_block_requests(ctrl_info); 9320 pqi_ctrl_wait_until_quiesced(ctrl_info); 9321 9322 if (suspend) { 9323 enum bmic_flush_cache_shutdown_event shutdown_event; 9324 9325 shutdown_event = pqi_get_flush_cache_shutdown_event(pci_dev); 9326 pqi_flush_cache(ctrl_info, shutdown_event); 9327 } 9328 9329 pqi_stop_heartbeat_timer(ctrl_info); 9330 pqi_crash_if_pending_command(ctrl_info); 9331 pqi_free_irqs(ctrl_info); 9332 9333 ctrl_info->controller_online = false; 9334 ctrl_info->pqi_mode_enabled = false; 9335 9336 return 0; 9337 } 9338 9339 static __maybe_unused int pqi_suspend(struct device *dev) 9340 { 9341 return pqi_suspend_or_freeze(dev, true); 9342 } 9343 9344 static int pqi_resume_or_restore(struct device *dev) 9345 { 9346 int rc; 9347 struct pci_dev *pci_dev; 9348 struct pqi_ctrl_info *ctrl_info; 9349 9350 pci_dev = to_pci_dev(dev); 9351 ctrl_info = pci_get_drvdata(pci_dev); 9352 9353 rc = pqi_request_irqs(ctrl_info); 9354 if (rc) 9355 return rc; 9356 9357 pqi_ctrl_unblock_device_reset(ctrl_info); 9358 pqi_ctrl_unblock_requests(ctrl_info); 9359 pqi_scsi_unblock_requests(ctrl_info); 9360 pqi_ctrl_unblock_scan(ctrl_info); 9361 9362 ssleep(PQI_POST_RESET_DELAY_SECS); 9363 9364 return pqi_ctrl_init_resume(ctrl_info); 9365 } 9366 9367 static int pqi_freeze(struct device *dev) 9368 { 9369 return pqi_suspend_or_freeze(dev, false); 9370 } 9371 9372 static int pqi_thaw(struct device *dev) 9373 { 9374 int rc; 9375 struct pci_dev *pci_dev; 9376 struct pqi_ctrl_info *ctrl_info; 9377 9378 pci_dev = to_pci_dev(dev); 9379 ctrl_info = pci_get_drvdata(pci_dev); 9380 9381 rc = pqi_request_irqs(ctrl_info); 9382 if (rc) 9383 return rc; 9384 9385 ctrl_info->controller_online = true; 9386 ctrl_info->pqi_mode_enabled = true; 9387 9388 pqi_ctrl_unblock_device_reset(ctrl_info); 9389 pqi_ctrl_unblock_requests(ctrl_info); 9390 pqi_scsi_unblock_requests(ctrl_info); 9391 pqi_ctrl_unblock_scan(ctrl_info); 9392 9393 return 0; 9394 } 9395 9396 static int pqi_poweroff(struct device *dev) 9397 { 9398 struct pci_dev *pci_dev; 9399 struct pqi_ctrl_info *ctrl_info; 9400 enum bmic_flush_cache_shutdown_event shutdown_event; 9401 9402 pci_dev = to_pci_dev(dev); 9403 ctrl_info = pci_get_drvdata(pci_dev); 9404 9405 shutdown_event = pqi_get_flush_cache_shutdown_event(pci_dev); 9406 pqi_flush_cache(ctrl_info, shutdown_event); 9407 9408 return 0; 9409 } 9410 9411 static const struct dev_pm_ops pqi_pm_ops = { 9412 .suspend = pqi_suspend, 9413 .resume = pqi_resume_or_restore, 9414 .freeze = pqi_freeze, 9415 .thaw = pqi_thaw, 9416 .poweroff = pqi_poweroff, 9417 .restore = pqi_resume_or_restore, 9418 }; 9419 9420 #endif /* CONFIG_PM */ 9421 9422 /* Define the PCI IDs for the controllers that we support. */ 9423 static const struct pci_device_id pqi_pci_id_table[] = { 9424 { 9425 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9426 0x105b, 0x1211) 9427 }, 9428 { 9429 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9430 0x105b, 0x1321) 9431 }, 9432 { 9433 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9434 0x152d, 0x8a22) 9435 }, 9436 { 9437 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9438 0x152d, 0x8a23) 9439 }, 9440 { 9441 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9442 0x152d, 0x8a24) 9443 }, 9444 { 9445 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9446 0x152d, 0x8a36) 9447 }, 9448 { 9449 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9450 0x152d, 0x8a37) 9451 }, 9452 { 9453 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9454 0x193d, 0x1104) 9455 }, 9456 { 9457 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9458 0x193d, 0x1105) 9459 }, 9460 { 9461 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9462 0x193d, 0x1106) 9463 }, 9464 { 9465 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9466 0x193d, 0x1107) 9467 }, 9468 { 9469 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9470 0x193d, 0x1108) 9471 }, 9472 { 9473 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9474 0x193d, 0x1109) 9475 }, 9476 { 9477 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9478 0x193d, 0x110b) 9479 }, 9480 { 9481 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9482 0x193d, 0x8460) 9483 }, 9484 { 9485 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9486 0x193d, 0x8461) 9487 }, 9488 { 9489 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9490 0x193d, 0xc460) 9491 }, 9492 { 9493 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9494 0x193d, 0xc461) 9495 }, 9496 { 9497 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9498 0x193d, 0xf460) 9499 }, 9500 { 9501 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9502 0x193d, 0xf461) 9503 }, 9504 { 9505 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9506 0x1bd4, 0x0045) 9507 }, 9508 { 9509 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9510 0x1bd4, 0x0046) 9511 }, 9512 { 9513 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9514 0x1bd4, 0x0047) 9515 }, 9516 { 9517 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9518 0x1bd4, 0x0048) 9519 }, 9520 { 9521 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9522 0x1bd4, 0x004a) 9523 }, 9524 { 9525 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9526 0x1bd4, 0x004b) 9527 }, 9528 { 9529 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9530 0x1bd4, 0x004c) 9531 }, 9532 { 9533 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9534 0x1bd4, 0x004f) 9535 }, 9536 { 9537 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9538 0x1bd4, 0x0051) 9539 }, 9540 { 9541 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9542 0x1bd4, 0x0052) 9543 }, 9544 { 9545 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9546 0x1bd4, 0x0053) 9547 }, 9548 { 9549 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9550 0x1bd4, 0x0054) 9551 }, 9552 { 9553 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9554 0x1bd4, 0x006b) 9555 }, 9556 { 9557 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9558 0x1bd4, 0x006c) 9559 }, 9560 { 9561 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9562 0x1bd4, 0x006d) 9563 }, 9564 { 9565 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9566 0x1bd4, 0x006f) 9567 }, 9568 { 9569 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9570 0x1bd4, 0x0070) 9571 }, 9572 { 9573 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9574 0x1bd4, 0x0071) 9575 }, 9576 { 9577 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9578 0x1bd4, 0x0072) 9579 }, 9580 { 9581 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9582 0x1bd4, 0x0086) 9583 }, 9584 { 9585 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9586 0x1bd4, 0x0087) 9587 }, 9588 { 9589 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9590 0x1bd4, 0x0088) 9591 }, 9592 { 9593 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9594 0x1bd4, 0x0089) 9595 }, 9596 { 9597 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9598 0x19e5, 0xd227) 9599 }, 9600 { 9601 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9602 0x19e5, 0xd228) 9603 }, 9604 { 9605 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9606 0x19e5, 0xd229) 9607 }, 9608 { 9609 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9610 0x19e5, 0xd22a) 9611 }, 9612 { 9613 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9614 0x19e5, 0xd22b) 9615 }, 9616 { 9617 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9618 0x19e5, 0xd22c) 9619 }, 9620 { 9621 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9622 PCI_VENDOR_ID_ADAPTEC2, 0x0110) 9623 }, 9624 { 9625 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9626 PCI_VENDOR_ID_ADAPTEC2, 0x0608) 9627 }, 9628 { 9629 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9630 PCI_VENDOR_ID_ADAPTEC2, 0x0659) 9631 }, 9632 { 9633 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9634 PCI_VENDOR_ID_ADAPTEC2, 0x0800) 9635 }, 9636 { 9637 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9638 PCI_VENDOR_ID_ADAPTEC2, 0x0801) 9639 }, 9640 { 9641 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9642 PCI_VENDOR_ID_ADAPTEC2, 0x0802) 9643 }, 9644 { 9645 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9646 PCI_VENDOR_ID_ADAPTEC2, 0x0803) 9647 }, 9648 { 9649 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9650 PCI_VENDOR_ID_ADAPTEC2, 0x0804) 9651 }, 9652 { 9653 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9654 PCI_VENDOR_ID_ADAPTEC2, 0x0805) 9655 }, 9656 { 9657 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9658 PCI_VENDOR_ID_ADAPTEC2, 0x0806) 9659 }, 9660 { 9661 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9662 PCI_VENDOR_ID_ADAPTEC2, 0x0807) 9663 }, 9664 { 9665 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9666 PCI_VENDOR_ID_ADAPTEC2, 0x0808) 9667 }, 9668 { 9669 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9670 PCI_VENDOR_ID_ADAPTEC2, 0x0809) 9671 }, 9672 { 9673 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9674 PCI_VENDOR_ID_ADAPTEC2, 0x080a) 9675 }, 9676 { 9677 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9678 PCI_VENDOR_ID_ADAPTEC2, 0x0900) 9679 }, 9680 { 9681 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9682 PCI_VENDOR_ID_ADAPTEC2, 0x0901) 9683 }, 9684 { 9685 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9686 PCI_VENDOR_ID_ADAPTEC2, 0x0902) 9687 }, 9688 { 9689 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9690 PCI_VENDOR_ID_ADAPTEC2, 0x0903) 9691 }, 9692 { 9693 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9694 PCI_VENDOR_ID_ADAPTEC2, 0x0904) 9695 }, 9696 { 9697 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9698 PCI_VENDOR_ID_ADAPTEC2, 0x0905) 9699 }, 9700 { 9701 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9702 PCI_VENDOR_ID_ADAPTEC2, 0x0906) 9703 }, 9704 { 9705 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9706 PCI_VENDOR_ID_ADAPTEC2, 0x0907) 9707 }, 9708 { 9709 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9710 PCI_VENDOR_ID_ADAPTEC2, 0x0908) 9711 }, 9712 { 9713 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9714 PCI_VENDOR_ID_ADAPTEC2, 0x090a) 9715 }, 9716 { 9717 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9718 PCI_VENDOR_ID_ADAPTEC2, 0x1200) 9719 }, 9720 { 9721 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9722 PCI_VENDOR_ID_ADAPTEC2, 0x1201) 9723 }, 9724 { 9725 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9726 PCI_VENDOR_ID_ADAPTEC2, 0x1202) 9727 }, 9728 { 9729 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9730 PCI_VENDOR_ID_ADAPTEC2, 0x1280) 9731 }, 9732 { 9733 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9734 PCI_VENDOR_ID_ADAPTEC2, 0x1281) 9735 }, 9736 { 9737 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9738 PCI_VENDOR_ID_ADAPTEC2, 0x1282) 9739 }, 9740 { 9741 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9742 PCI_VENDOR_ID_ADAPTEC2, 0x1300) 9743 }, 9744 { 9745 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9746 PCI_VENDOR_ID_ADAPTEC2, 0x1301) 9747 }, 9748 { 9749 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9750 PCI_VENDOR_ID_ADAPTEC2, 0x1302) 9751 }, 9752 { 9753 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9754 PCI_VENDOR_ID_ADAPTEC2, 0x1303) 9755 }, 9756 { 9757 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9758 PCI_VENDOR_ID_ADAPTEC2, 0x1304) 9759 }, 9760 { 9761 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9762 PCI_VENDOR_ID_ADAPTEC2, 0x1380) 9763 }, 9764 { 9765 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9766 PCI_VENDOR_ID_ADAPTEC2, 0x1400) 9767 }, 9768 { 9769 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9770 PCI_VENDOR_ID_ADAPTEC2, 0x1402) 9771 }, 9772 { 9773 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9774 PCI_VENDOR_ID_ADAPTEC2, 0x1410) 9775 }, 9776 { 9777 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9778 PCI_VENDOR_ID_ADAPTEC2, 0x1411) 9779 }, 9780 { 9781 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9782 PCI_VENDOR_ID_ADAPTEC2, 0x1412) 9783 }, 9784 { 9785 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9786 PCI_VENDOR_ID_ADAPTEC2, 0x1420) 9787 }, 9788 { 9789 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9790 PCI_VENDOR_ID_ADAPTEC2, 0x1430) 9791 }, 9792 { 9793 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9794 PCI_VENDOR_ID_ADAPTEC2, 0x1440) 9795 }, 9796 { 9797 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9798 PCI_VENDOR_ID_ADAPTEC2, 0x1441) 9799 }, 9800 { 9801 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9802 PCI_VENDOR_ID_ADAPTEC2, 0x1450) 9803 }, 9804 { 9805 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9806 PCI_VENDOR_ID_ADAPTEC2, 0x1452) 9807 }, 9808 { 9809 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9810 PCI_VENDOR_ID_ADAPTEC2, 0x1460) 9811 }, 9812 { 9813 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9814 PCI_VENDOR_ID_ADAPTEC2, 0x1461) 9815 }, 9816 { 9817 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9818 PCI_VENDOR_ID_ADAPTEC2, 0x1462) 9819 }, 9820 { 9821 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9822 PCI_VENDOR_ID_ADAPTEC2, 0x1463) 9823 }, 9824 { 9825 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9826 PCI_VENDOR_ID_ADAPTEC2, 0x1470) 9827 }, 9828 { 9829 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9830 PCI_VENDOR_ID_ADAPTEC2, 0x1471) 9831 }, 9832 { 9833 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9834 PCI_VENDOR_ID_ADAPTEC2, 0x1472) 9835 }, 9836 { 9837 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9838 PCI_VENDOR_ID_ADAPTEC2, 0x1473) 9839 }, 9840 { 9841 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9842 PCI_VENDOR_ID_ADAPTEC2, 0x1474) 9843 }, 9844 { 9845 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9846 PCI_VENDOR_ID_ADAPTEC2, 0x1475) 9847 }, 9848 { 9849 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9850 PCI_VENDOR_ID_ADAPTEC2, 0x1480) 9851 }, 9852 { 9853 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9854 PCI_VENDOR_ID_ADAPTEC2, 0x1490) 9855 }, 9856 { 9857 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9858 PCI_VENDOR_ID_ADAPTEC2, 0x1491) 9859 }, 9860 { 9861 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9862 PCI_VENDOR_ID_ADAPTEC2, 0x14a0) 9863 }, 9864 { 9865 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9866 PCI_VENDOR_ID_ADAPTEC2, 0x14a1) 9867 }, 9868 { 9869 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9870 PCI_VENDOR_ID_ADAPTEC2, 0x14a2) 9871 }, 9872 { 9873 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9874 PCI_VENDOR_ID_ADAPTEC2, 0x14a4) 9875 }, 9876 { 9877 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9878 PCI_VENDOR_ID_ADAPTEC2, 0x14a5) 9879 }, 9880 { 9881 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9882 PCI_VENDOR_ID_ADAPTEC2, 0x14a6) 9883 }, 9884 { 9885 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9886 PCI_VENDOR_ID_ADAPTEC2, 0x14b0) 9887 }, 9888 { 9889 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9890 PCI_VENDOR_ID_ADAPTEC2, 0x14b1) 9891 }, 9892 { 9893 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9894 PCI_VENDOR_ID_ADAPTEC2, 0x14c0) 9895 }, 9896 { 9897 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9898 PCI_VENDOR_ID_ADAPTEC2, 0x14c1) 9899 }, 9900 { 9901 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9902 PCI_VENDOR_ID_ADAPTEC2, 0x14c2) 9903 }, 9904 { 9905 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9906 PCI_VENDOR_ID_ADAPTEC2, 0x14c3) 9907 }, 9908 { 9909 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9910 PCI_VENDOR_ID_ADAPTEC2, 0x14c4) 9911 }, 9912 { 9913 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9914 PCI_VENDOR_ID_ADAPTEC2, 0x14d0) 9915 }, 9916 { 9917 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9918 PCI_VENDOR_ID_ADAPTEC2, 0x14e0) 9919 }, 9920 { 9921 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9922 PCI_VENDOR_ID_ADAPTEC2, 0x14f0) 9923 }, 9924 { 9925 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9926 PCI_VENDOR_ID_ADVANTECH, 0x8312) 9927 }, 9928 { 9929 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9930 PCI_VENDOR_ID_DELL, 0x1fe0) 9931 }, 9932 { 9933 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9934 PCI_VENDOR_ID_HP, 0x0600) 9935 }, 9936 { 9937 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9938 PCI_VENDOR_ID_HP, 0x0601) 9939 }, 9940 { 9941 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9942 PCI_VENDOR_ID_HP, 0x0602) 9943 }, 9944 { 9945 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9946 PCI_VENDOR_ID_HP, 0x0603) 9947 }, 9948 { 9949 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9950 PCI_VENDOR_ID_HP, 0x0609) 9951 }, 9952 { 9953 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9954 PCI_VENDOR_ID_HP, 0x0650) 9955 }, 9956 { 9957 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9958 PCI_VENDOR_ID_HP, 0x0651) 9959 }, 9960 { 9961 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9962 PCI_VENDOR_ID_HP, 0x0652) 9963 }, 9964 { 9965 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9966 PCI_VENDOR_ID_HP, 0x0653) 9967 }, 9968 { 9969 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9970 PCI_VENDOR_ID_HP, 0x0654) 9971 }, 9972 { 9973 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9974 PCI_VENDOR_ID_HP, 0x0655) 9975 }, 9976 { 9977 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9978 PCI_VENDOR_ID_HP, 0x0700) 9979 }, 9980 { 9981 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9982 PCI_VENDOR_ID_HP, 0x0701) 9983 }, 9984 { 9985 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9986 PCI_VENDOR_ID_HP, 0x1001) 9987 }, 9988 { 9989 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9990 PCI_VENDOR_ID_HP, 0x1002) 9991 }, 9992 { 9993 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9994 PCI_VENDOR_ID_HP, 0x1100) 9995 }, 9996 { 9997 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9998 PCI_VENDOR_ID_HP, 0x1101) 9999 }, 10000 { 10001 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10002 0x1590, 0x0294) 10003 }, 10004 { 10005 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10006 0x1590, 0x02db) 10007 }, 10008 { 10009 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10010 0x1590, 0x02dc) 10011 }, 10012 { 10013 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10014 0x1590, 0x032e) 10015 }, 10016 { 10017 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10018 0x1590, 0x036f) 10019 }, 10020 { 10021 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10022 0x1590, 0x0381) 10023 }, 10024 { 10025 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10026 0x1590, 0x0382) 10027 }, 10028 { 10029 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10030 0x1590, 0x0383) 10031 }, 10032 { 10033 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10034 0x1d8d, 0x0800) 10035 }, 10036 { 10037 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10038 0x1d8d, 0x0908) 10039 }, 10040 { 10041 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10042 0x1d8d, 0x0806) 10043 }, 10044 { 10045 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10046 0x1d8d, 0x0916) 10047 }, 10048 { 10049 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10050 PCI_VENDOR_ID_GIGABYTE, 0x1000) 10051 }, 10052 { 10053 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10054 0x1dfc, 0x3161) 10055 }, 10056 { 10057 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10058 0x1f0c, 0x3161) 10059 }, 10060 { 10061 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10062 0x1cf2, 0x0804) 10063 }, 10064 { 10065 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10066 0x1cf2, 0x0805) 10067 }, 10068 { 10069 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10070 0x1cf2, 0x0806) 10071 }, 10072 { 10073 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10074 0x1cf2, 0x5445) 10075 }, 10076 { 10077 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10078 0x1cf2, 0x5446) 10079 }, 10080 { 10081 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10082 0x1cf2, 0x5447) 10083 }, 10084 { 10085 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10086 0x1cf2, 0x5449) 10087 }, 10088 { 10089 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10090 0x1cf2, 0x544a) 10091 }, 10092 { 10093 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10094 0x1cf2, 0x544b) 10095 }, 10096 { 10097 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10098 0x1cf2, 0x544d) 10099 }, 10100 { 10101 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10102 0x1cf2, 0x544e) 10103 }, 10104 { 10105 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10106 0x1cf2, 0x544f) 10107 }, 10108 { 10109 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10110 0x1cf2, 0x54da) 10111 }, 10112 { 10113 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10114 0x1cf2, 0x54db) 10115 }, 10116 { 10117 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10118 0x1cf2, 0x54dc) 10119 }, 10120 { 10121 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10122 0x1cf2, 0x0b27) 10123 }, 10124 { 10125 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10126 0x1cf2, 0x0b29) 10127 }, 10128 { 10129 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10130 0x1cf2, 0x0b45) 10131 }, 10132 { 10133 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10134 0x1cc4, 0x0101) 10135 }, 10136 { 10137 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10138 0x1cc4, 0x0201) 10139 }, 10140 { 10141 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10142 PCI_VENDOR_ID_LENOVO, 0x0220) 10143 }, 10144 { 10145 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10146 PCI_VENDOR_ID_LENOVO, 0x0221) 10147 }, 10148 { 10149 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10150 PCI_VENDOR_ID_LENOVO, 0x0520) 10151 }, 10152 { 10153 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10154 PCI_VENDOR_ID_LENOVO, 0x0522) 10155 }, 10156 { 10157 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10158 PCI_VENDOR_ID_LENOVO, 0x0620) 10159 }, 10160 { 10161 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10162 PCI_VENDOR_ID_LENOVO, 0x0621) 10163 }, 10164 { 10165 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10166 PCI_VENDOR_ID_LENOVO, 0x0622) 10167 }, 10168 { 10169 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10170 PCI_VENDOR_ID_LENOVO, 0x0623) 10171 }, 10172 { 10173 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10174 0x1014, 0x0718) 10175 }, 10176 { 10177 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10178 0x1137, 0x02f8) 10179 }, 10180 { 10181 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10182 0x1137, 0x02f9) 10183 }, 10184 { 10185 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10186 0x1137, 0x02fa) 10187 }, 10188 { 10189 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10190 0x1e93, 0x1000) 10191 }, 10192 { 10193 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10194 0x1e93, 0x1001) 10195 }, 10196 { 10197 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10198 0x1e93, 0x1002) 10199 }, 10200 { 10201 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10202 0x1e93, 0x1005) 10203 }, 10204 { 10205 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10206 0x1f51, 0x1001) 10207 }, 10208 { 10209 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10210 0x1f51, 0x1002) 10211 }, 10212 { 10213 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10214 0x1f51, 0x1003) 10215 }, 10216 { 10217 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10218 0x1f51, 0x1004) 10219 }, 10220 { 10221 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10222 0x1f51, 0x1005) 10223 }, 10224 { 10225 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10226 0x1f51, 0x1006) 10227 }, 10228 { 10229 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10230 0x1f51, 0x1007) 10231 }, 10232 { 10233 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10234 0x1f51, 0x1008) 10235 }, 10236 { 10237 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10238 0x1f51, 0x1009) 10239 }, 10240 { 10241 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10242 0x1f51, 0x100a) 10243 }, 10244 { 10245 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10246 0x1f51, 0x100e) 10247 }, 10248 { 10249 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10250 0x1f51, 0x100f) 10251 }, 10252 { 10253 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10254 0x1f51, 0x1010) 10255 }, 10256 { 10257 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10258 0x1f51, 0x1011) 10259 }, 10260 { 10261 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10262 0x1f51, 0x1043) 10263 }, 10264 { 10265 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10266 0x1f51, 0x1044) 10267 }, 10268 { 10269 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10270 0x1f51, 0x1045) 10271 }, 10272 { 10273 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 10274 PCI_ANY_ID, PCI_ANY_ID) 10275 }, 10276 { 0 } 10277 }; 10278 10279 MODULE_DEVICE_TABLE(pci, pqi_pci_id_table); 10280 10281 static struct pci_driver pqi_pci_driver = { 10282 .name = DRIVER_NAME_SHORT, 10283 .id_table = pqi_pci_id_table, 10284 .probe = pqi_pci_probe, 10285 .remove = pqi_pci_remove, 10286 .shutdown = pqi_shutdown, 10287 #if defined(CONFIG_PM) 10288 .driver = { 10289 .pm = &pqi_pm_ops 10290 }, 10291 #endif 10292 }; 10293 10294 static int __init pqi_init(void) 10295 { 10296 int rc; 10297 10298 pr_info(DRIVER_NAME "\n"); 10299 pqi_verify_structures(); 10300 sis_verify_structures(); 10301 10302 pqi_sas_transport_template = sas_attach_transport(&pqi_sas_transport_functions); 10303 if (!pqi_sas_transport_template) 10304 return -ENODEV; 10305 10306 pqi_process_module_params(); 10307 10308 rc = pci_register_driver(&pqi_pci_driver); 10309 if (rc) 10310 sas_release_transport(pqi_sas_transport_template); 10311 10312 return rc; 10313 } 10314 10315 static void __exit pqi_cleanup(void) 10316 { 10317 pci_unregister_driver(&pqi_pci_driver); 10318 sas_release_transport(pqi_sas_transport_template); 10319 } 10320 10321 module_init(pqi_init); 10322 module_exit(pqi_cleanup); 10323 10324 static void pqi_verify_structures(void) 10325 { 10326 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers, 10327 sis_host_to_ctrl_doorbell) != 0x20); 10328 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers, 10329 sis_interrupt_mask) != 0x34); 10330 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers, 10331 sis_ctrl_to_host_doorbell) != 0x9c); 10332 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers, 10333 sis_ctrl_to_host_doorbell_clear) != 0xa0); 10334 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers, 10335 sis_driver_scratch) != 0xb0); 10336 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers, 10337 sis_product_identifier) != 0xb4); 10338 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers, 10339 sis_firmware_status) != 0xbc); 10340 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers, 10341 sis_ctrl_shutdown_reason_code) != 0xcc); 10342 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers, 10343 sis_mailbox) != 0x1000); 10344 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers, 10345 pqi_registers) != 0x4000); 10346 10347 BUILD_BUG_ON(offsetof(struct pqi_iu_header, 10348 iu_type) != 0x0); 10349 BUILD_BUG_ON(offsetof(struct pqi_iu_header, 10350 iu_length) != 0x2); 10351 BUILD_BUG_ON(offsetof(struct pqi_iu_header, 10352 response_queue_id) != 0x4); 10353 BUILD_BUG_ON(offsetof(struct pqi_iu_header, 10354 driver_flags) != 0x6); 10355 BUILD_BUG_ON(sizeof(struct pqi_iu_header) != 0x8); 10356 10357 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info, 10358 status) != 0x0); 10359 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info, 10360 service_response) != 0x1); 10361 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info, 10362 data_present) != 0x2); 10363 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info, 10364 reserved) != 0x3); 10365 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info, 10366 residual_count) != 0x4); 10367 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info, 10368 data_length) != 0x8); 10369 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info, 10370 reserved1) != 0xa); 10371 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info, 10372 data) != 0xc); 10373 BUILD_BUG_ON(sizeof(struct pqi_aio_error_info) != 0x10c); 10374 10375 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info, 10376 data_in_result) != 0x0); 10377 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info, 10378 data_out_result) != 0x1); 10379 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info, 10380 reserved) != 0x2); 10381 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info, 10382 status) != 0x5); 10383 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info, 10384 status_qualifier) != 0x6); 10385 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info, 10386 sense_data_length) != 0x8); 10387 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info, 10388 response_data_length) != 0xa); 10389 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info, 10390 data_in_transferred) != 0xc); 10391 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info, 10392 data_out_transferred) != 0x10); 10393 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info, 10394 data) != 0x14); 10395 BUILD_BUG_ON(sizeof(struct pqi_raid_error_info) != 0x114); 10396 10397 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10398 signature) != 0x0); 10399 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10400 function_and_status_code) != 0x8); 10401 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10402 max_admin_iq_elements) != 0x10); 10403 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10404 max_admin_oq_elements) != 0x11); 10405 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10406 admin_iq_element_length) != 0x12); 10407 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10408 admin_oq_element_length) != 0x13); 10409 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10410 max_reset_timeout) != 0x14); 10411 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10412 legacy_intx_status) != 0x18); 10413 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10414 legacy_intx_mask_set) != 0x1c); 10415 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10416 legacy_intx_mask_clear) != 0x20); 10417 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10418 device_status) != 0x40); 10419 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10420 admin_iq_pi_offset) != 0x48); 10421 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10422 admin_oq_ci_offset) != 0x50); 10423 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10424 admin_iq_element_array_addr) != 0x58); 10425 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10426 admin_oq_element_array_addr) != 0x60); 10427 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10428 admin_iq_ci_addr) != 0x68); 10429 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10430 admin_oq_pi_addr) != 0x70); 10431 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10432 admin_iq_num_elements) != 0x78); 10433 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10434 admin_oq_num_elements) != 0x79); 10435 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10436 admin_queue_int_msg_num) != 0x7a); 10437 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10438 device_error) != 0x80); 10439 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10440 error_details) != 0x88); 10441 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10442 device_reset) != 0x90); 10443 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 10444 power_action) != 0x94); 10445 BUILD_BUG_ON(sizeof(struct pqi_device_registers) != 0x100); 10446 10447 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10448 header.iu_type) != 0); 10449 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10450 header.iu_length) != 2); 10451 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10452 header.driver_flags) != 6); 10453 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10454 request_id) != 8); 10455 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10456 function_code) != 10); 10457 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10458 data.report_device_capability.buffer_length) != 44); 10459 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10460 data.report_device_capability.sg_descriptor) != 48); 10461 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10462 data.create_operational_iq.queue_id) != 12); 10463 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10464 data.create_operational_iq.element_array_addr) != 16); 10465 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10466 data.create_operational_iq.ci_addr) != 24); 10467 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10468 data.create_operational_iq.num_elements) != 32); 10469 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10470 data.create_operational_iq.element_length) != 34); 10471 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10472 data.create_operational_iq.queue_protocol) != 36); 10473 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10474 data.create_operational_oq.queue_id) != 12); 10475 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10476 data.create_operational_oq.element_array_addr) != 16); 10477 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10478 data.create_operational_oq.pi_addr) != 24); 10479 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10480 data.create_operational_oq.num_elements) != 32); 10481 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10482 data.create_operational_oq.element_length) != 34); 10483 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10484 data.create_operational_oq.queue_protocol) != 36); 10485 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10486 data.create_operational_oq.int_msg_num) != 40); 10487 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10488 data.create_operational_oq.coalescing_count) != 42); 10489 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10490 data.create_operational_oq.min_coalescing_time) != 44); 10491 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10492 data.create_operational_oq.max_coalescing_time) != 48); 10493 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 10494 data.delete_operational_queue.queue_id) != 12); 10495 BUILD_BUG_ON(sizeof(struct pqi_general_admin_request) != 64); 10496 BUILD_BUG_ON(sizeof_field(struct pqi_general_admin_request, 10497 data.create_operational_iq) != 64 - 11); 10498 BUILD_BUG_ON(sizeof_field(struct pqi_general_admin_request, 10499 data.create_operational_oq) != 64 - 11); 10500 BUILD_BUG_ON(sizeof_field(struct pqi_general_admin_request, 10501 data.delete_operational_queue) != 64 - 11); 10502 10503 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response, 10504 header.iu_type) != 0); 10505 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response, 10506 header.iu_length) != 2); 10507 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response, 10508 header.driver_flags) != 6); 10509 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response, 10510 request_id) != 8); 10511 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response, 10512 function_code) != 10); 10513 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response, 10514 status) != 11); 10515 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response, 10516 data.create_operational_iq.status_descriptor) != 12); 10517 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response, 10518 data.create_operational_iq.iq_pi_offset) != 16); 10519 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response, 10520 data.create_operational_oq.status_descriptor) != 12); 10521 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response, 10522 data.create_operational_oq.oq_ci_offset) != 16); 10523 BUILD_BUG_ON(sizeof(struct pqi_general_admin_response) != 64); 10524 10525 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 10526 header.iu_type) != 0); 10527 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 10528 header.iu_length) != 2); 10529 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 10530 header.response_queue_id) != 4); 10531 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 10532 header.driver_flags) != 6); 10533 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 10534 request_id) != 8); 10535 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 10536 nexus_id) != 10); 10537 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 10538 buffer_length) != 12); 10539 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 10540 lun_number) != 16); 10541 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 10542 protocol_specific) != 24); 10543 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 10544 error_index) != 27); 10545 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 10546 cdb) != 32); 10547 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 10548 timeout) != 60); 10549 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 10550 sg_descriptors) != 64); 10551 BUILD_BUG_ON(sizeof(struct pqi_raid_path_request) != 10552 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH); 10553 10554 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 10555 header.iu_type) != 0); 10556 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 10557 header.iu_length) != 2); 10558 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 10559 header.response_queue_id) != 4); 10560 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 10561 header.driver_flags) != 6); 10562 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 10563 request_id) != 8); 10564 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 10565 nexus_id) != 12); 10566 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 10567 buffer_length) != 16); 10568 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 10569 data_encryption_key_index) != 22); 10570 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 10571 encrypt_tweak_lower) != 24); 10572 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 10573 encrypt_tweak_upper) != 28); 10574 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 10575 cdb) != 32); 10576 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 10577 error_index) != 48); 10578 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 10579 num_sg_descriptors) != 50); 10580 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 10581 cdb_length) != 51); 10582 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 10583 lun_number) != 52); 10584 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 10585 sg_descriptors) != 64); 10586 BUILD_BUG_ON(sizeof(struct pqi_aio_path_request) != 10587 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH); 10588 10589 BUILD_BUG_ON(offsetof(struct pqi_io_response, 10590 header.iu_type) != 0); 10591 BUILD_BUG_ON(offsetof(struct pqi_io_response, 10592 header.iu_length) != 2); 10593 BUILD_BUG_ON(offsetof(struct pqi_io_response, 10594 request_id) != 8); 10595 BUILD_BUG_ON(offsetof(struct pqi_io_response, 10596 error_index) != 10); 10597 10598 BUILD_BUG_ON(offsetof(struct pqi_general_management_request, 10599 header.iu_type) != 0); 10600 BUILD_BUG_ON(offsetof(struct pqi_general_management_request, 10601 header.iu_length) != 2); 10602 BUILD_BUG_ON(offsetof(struct pqi_general_management_request, 10603 header.response_queue_id) != 4); 10604 BUILD_BUG_ON(offsetof(struct pqi_general_management_request, 10605 request_id) != 8); 10606 BUILD_BUG_ON(offsetof(struct pqi_general_management_request, 10607 data.report_event_configuration.buffer_length) != 12); 10608 BUILD_BUG_ON(offsetof(struct pqi_general_management_request, 10609 data.report_event_configuration.sg_descriptors) != 16); 10610 BUILD_BUG_ON(offsetof(struct pqi_general_management_request, 10611 data.set_event_configuration.global_event_oq_id) != 10); 10612 BUILD_BUG_ON(offsetof(struct pqi_general_management_request, 10613 data.set_event_configuration.buffer_length) != 12); 10614 BUILD_BUG_ON(offsetof(struct pqi_general_management_request, 10615 data.set_event_configuration.sg_descriptors) != 16); 10616 10617 BUILD_BUG_ON(offsetof(struct pqi_iu_layer_descriptor, 10618 max_inbound_iu_length) != 6); 10619 BUILD_BUG_ON(offsetof(struct pqi_iu_layer_descriptor, 10620 max_outbound_iu_length) != 14); 10621 BUILD_BUG_ON(sizeof(struct pqi_iu_layer_descriptor) != 16); 10622 10623 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 10624 data_length) != 0); 10625 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 10626 iq_arbitration_priority_support_bitmask) != 8); 10627 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 10628 maximum_aw_a) != 9); 10629 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 10630 maximum_aw_b) != 10); 10631 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 10632 maximum_aw_c) != 11); 10633 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 10634 max_inbound_queues) != 16); 10635 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 10636 max_elements_per_iq) != 18); 10637 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 10638 max_iq_element_length) != 24); 10639 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 10640 min_iq_element_length) != 26); 10641 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 10642 max_outbound_queues) != 30); 10643 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 10644 max_elements_per_oq) != 32); 10645 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 10646 intr_coalescing_time_granularity) != 34); 10647 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 10648 max_oq_element_length) != 36); 10649 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 10650 min_oq_element_length) != 38); 10651 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 10652 iu_layer_descriptors) != 64); 10653 BUILD_BUG_ON(sizeof(struct pqi_device_capability) != 576); 10654 10655 BUILD_BUG_ON(offsetof(struct pqi_event_descriptor, 10656 event_type) != 0); 10657 BUILD_BUG_ON(offsetof(struct pqi_event_descriptor, 10658 oq_id) != 2); 10659 BUILD_BUG_ON(sizeof(struct pqi_event_descriptor) != 4); 10660 10661 BUILD_BUG_ON(offsetof(struct pqi_event_config, 10662 num_event_descriptors) != 2); 10663 BUILD_BUG_ON(offsetof(struct pqi_event_config, 10664 descriptors) != 4); 10665 10666 BUILD_BUG_ON(PQI_NUM_SUPPORTED_EVENTS != 10667 ARRAY_SIZE(pqi_supported_event_types)); 10668 10669 BUILD_BUG_ON(offsetof(struct pqi_event_response, 10670 header.iu_type) != 0); 10671 BUILD_BUG_ON(offsetof(struct pqi_event_response, 10672 header.iu_length) != 2); 10673 BUILD_BUG_ON(offsetof(struct pqi_event_response, 10674 event_type) != 8); 10675 BUILD_BUG_ON(offsetof(struct pqi_event_response, 10676 event_id) != 10); 10677 BUILD_BUG_ON(offsetof(struct pqi_event_response, 10678 additional_event_id) != 12); 10679 BUILD_BUG_ON(offsetof(struct pqi_event_response, 10680 data) != 16); 10681 BUILD_BUG_ON(sizeof(struct pqi_event_response) != 32); 10682 10683 BUILD_BUG_ON(offsetof(struct pqi_event_acknowledge_request, 10684 header.iu_type) != 0); 10685 BUILD_BUG_ON(offsetof(struct pqi_event_acknowledge_request, 10686 header.iu_length) != 2); 10687 BUILD_BUG_ON(offsetof(struct pqi_event_acknowledge_request, 10688 event_type) != 8); 10689 BUILD_BUG_ON(offsetof(struct pqi_event_acknowledge_request, 10690 event_id) != 10); 10691 BUILD_BUG_ON(offsetof(struct pqi_event_acknowledge_request, 10692 additional_event_id) != 12); 10693 BUILD_BUG_ON(sizeof(struct pqi_event_acknowledge_request) != 16); 10694 10695 BUILD_BUG_ON(offsetof(struct pqi_task_management_request, 10696 header.iu_type) != 0); 10697 BUILD_BUG_ON(offsetof(struct pqi_task_management_request, 10698 header.iu_length) != 2); 10699 BUILD_BUG_ON(offsetof(struct pqi_task_management_request, 10700 request_id) != 8); 10701 BUILD_BUG_ON(offsetof(struct pqi_task_management_request, 10702 nexus_id) != 10); 10703 BUILD_BUG_ON(offsetof(struct pqi_task_management_request, 10704 timeout) != 14); 10705 BUILD_BUG_ON(offsetof(struct pqi_task_management_request, 10706 lun_number) != 16); 10707 BUILD_BUG_ON(offsetof(struct pqi_task_management_request, 10708 protocol_specific) != 24); 10709 BUILD_BUG_ON(offsetof(struct pqi_task_management_request, 10710 outbound_queue_id_to_manage) != 26); 10711 BUILD_BUG_ON(offsetof(struct pqi_task_management_request, 10712 request_id_to_manage) != 28); 10713 BUILD_BUG_ON(offsetof(struct pqi_task_management_request, 10714 task_management_function) != 30); 10715 BUILD_BUG_ON(sizeof(struct pqi_task_management_request) != 32); 10716 10717 BUILD_BUG_ON(offsetof(struct pqi_task_management_response, 10718 header.iu_type) != 0); 10719 BUILD_BUG_ON(offsetof(struct pqi_task_management_response, 10720 header.iu_length) != 2); 10721 BUILD_BUG_ON(offsetof(struct pqi_task_management_response, 10722 request_id) != 8); 10723 BUILD_BUG_ON(offsetof(struct pqi_task_management_response, 10724 nexus_id) != 10); 10725 BUILD_BUG_ON(offsetof(struct pqi_task_management_response, 10726 additional_response_info) != 12); 10727 BUILD_BUG_ON(offsetof(struct pqi_task_management_response, 10728 response_code) != 15); 10729 BUILD_BUG_ON(sizeof(struct pqi_task_management_response) != 16); 10730 10731 BUILD_BUG_ON(offsetof(struct bmic_identify_controller, 10732 configured_logical_drive_count) != 0); 10733 BUILD_BUG_ON(offsetof(struct bmic_identify_controller, 10734 configuration_signature) != 1); 10735 BUILD_BUG_ON(offsetof(struct bmic_identify_controller, 10736 firmware_version_short) != 5); 10737 BUILD_BUG_ON(offsetof(struct bmic_identify_controller, 10738 extended_logical_unit_count) != 154); 10739 BUILD_BUG_ON(offsetof(struct bmic_identify_controller, 10740 firmware_build_number) != 190); 10741 BUILD_BUG_ON(offsetof(struct bmic_identify_controller, 10742 vendor_id) != 200); 10743 BUILD_BUG_ON(offsetof(struct bmic_identify_controller, 10744 product_id) != 208); 10745 BUILD_BUG_ON(offsetof(struct bmic_identify_controller, 10746 extra_controller_flags) != 286); 10747 BUILD_BUG_ON(offsetof(struct bmic_identify_controller, 10748 controller_mode) != 292); 10749 BUILD_BUG_ON(offsetof(struct bmic_identify_controller, 10750 spare_part_number) != 293); 10751 BUILD_BUG_ON(offsetof(struct bmic_identify_controller, 10752 firmware_version_long) != 325); 10753 10754 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device, 10755 phys_bay_in_box) != 115); 10756 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device, 10757 device_type) != 120); 10758 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device, 10759 redundant_path_present_map) != 1736); 10760 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device, 10761 active_path_number) != 1738); 10762 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device, 10763 alternate_paths_phys_connector) != 1739); 10764 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device, 10765 alternate_paths_phys_box_on_port) != 1755); 10766 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device, 10767 current_queue_depth_limit) != 1796); 10768 BUILD_BUG_ON(sizeof(struct bmic_identify_physical_device) != 2560); 10769 10770 BUILD_BUG_ON(sizeof(struct bmic_sense_feature_buffer_header) != 4); 10771 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_buffer_header, 10772 page_code) != 0); 10773 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_buffer_header, 10774 subpage_code) != 1); 10775 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_buffer_header, 10776 buffer_length) != 2); 10777 10778 BUILD_BUG_ON(sizeof(struct bmic_sense_feature_page_header) != 4); 10779 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_page_header, 10780 page_code) != 0); 10781 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_page_header, 10782 subpage_code) != 1); 10783 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_page_header, 10784 page_length) != 2); 10785 10786 BUILD_BUG_ON(sizeof(struct bmic_sense_feature_io_page_aio_subpage) 10787 != 18); 10788 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_io_page_aio_subpage, 10789 header) != 0); 10790 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_io_page_aio_subpage, 10791 firmware_read_support) != 4); 10792 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_io_page_aio_subpage, 10793 driver_read_support) != 5); 10794 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_io_page_aio_subpage, 10795 firmware_write_support) != 6); 10796 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_io_page_aio_subpage, 10797 driver_write_support) != 7); 10798 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_io_page_aio_subpage, 10799 max_transfer_encrypted_sas_sata) != 8); 10800 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_io_page_aio_subpage, 10801 max_transfer_encrypted_nvme) != 10); 10802 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_io_page_aio_subpage, 10803 max_write_raid_5_6) != 12); 10804 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_io_page_aio_subpage, 10805 max_write_raid_1_10_2drive) != 14); 10806 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_io_page_aio_subpage, 10807 max_write_raid_1_10_3drive) != 16); 10808 10809 BUILD_BUG_ON(PQI_ADMIN_IQ_NUM_ELEMENTS > 255); 10810 BUILD_BUG_ON(PQI_ADMIN_OQ_NUM_ELEMENTS > 255); 10811 BUILD_BUG_ON(PQI_ADMIN_IQ_ELEMENT_LENGTH % 10812 PQI_QUEUE_ELEMENT_LENGTH_ALIGNMENT != 0); 10813 BUILD_BUG_ON(PQI_ADMIN_OQ_ELEMENT_LENGTH % 10814 PQI_QUEUE_ELEMENT_LENGTH_ALIGNMENT != 0); 10815 BUILD_BUG_ON(PQI_OPERATIONAL_IQ_ELEMENT_LENGTH > 1048560); 10816 BUILD_BUG_ON(PQI_OPERATIONAL_IQ_ELEMENT_LENGTH % 10817 PQI_QUEUE_ELEMENT_LENGTH_ALIGNMENT != 0); 10818 BUILD_BUG_ON(PQI_OPERATIONAL_OQ_ELEMENT_LENGTH > 1048560); 10819 BUILD_BUG_ON(PQI_OPERATIONAL_OQ_ELEMENT_LENGTH % 10820 PQI_QUEUE_ELEMENT_LENGTH_ALIGNMENT != 0); 10821 10822 BUILD_BUG_ON(PQI_RESERVED_IO_SLOTS >= PQI_MAX_OUTSTANDING_REQUESTS); 10823 BUILD_BUG_ON(PQI_RESERVED_IO_SLOTS >= 10824 PQI_MAX_OUTSTANDING_REQUESTS_KDUMP); 10825 } 10826