12cc37b15SDon Brace /* SPDX-License-Identifier: GPL-2.0 */ 26c223761SKevin Barnett /* 36c223761SKevin Barnett * driver for Microsemi PQI-based storage controllers 42f4c4b92SDon Brace * Copyright (c) 2019 Microchip Technology Inc. and its subsidiaries 52f4c4b92SDon Brace * Copyright (c) 2016-2018 Microsemi Corporation 66c223761SKevin Barnett * Copyright (c) 2016 PMC-Sierra, Inc. 76c223761SKevin Barnett * 82f4c4b92SDon Brace * Questions/Comments/Bugfixes to storagedev@microchip.com 96c223761SKevin Barnett * 106c223761SKevin Barnett */ 116c223761SKevin Barnett 12ebaec8e3SCorentin Labbe #include <linux/io-64-nonatomic-lo-hi.h> 13ebaec8e3SCorentin Labbe 146c223761SKevin Barnett #if !defined(_SMARTPQI_H) 156c223761SKevin Barnett #define _SMARTPQI_H 166c223761SKevin Barnett 173d46a59aSDon Brace #include <scsi/scsi_host.h> 183d46a59aSDon Brace #include <linux/bsg-lib.h> 193d46a59aSDon Brace 206c223761SKevin Barnett #pragma pack(1) 216c223761SKevin Barnett 226c223761SKevin Barnett #define PQI_DEVICE_SIGNATURE "PQI DREG" 236c223761SKevin Barnett 246c223761SKevin Barnett /* This structure is defined by the PQI specification. */ 256c223761SKevin Barnett struct pqi_device_registers { 266c223761SKevin Barnett __le64 signature; 276c223761SKevin Barnett u8 function_and_status_code; 286c223761SKevin Barnett u8 reserved[7]; 296c223761SKevin Barnett u8 max_admin_iq_elements; 306c223761SKevin Barnett u8 max_admin_oq_elements; 316c223761SKevin Barnett u8 admin_iq_element_length; /* in 16-byte units */ 326c223761SKevin Barnett u8 admin_oq_element_length; /* in 16-byte units */ 336c223761SKevin Barnett __le16 max_reset_timeout; /* in 100-millisecond units */ 346c223761SKevin Barnett u8 reserved1[2]; 356c223761SKevin Barnett __le32 legacy_intx_status; 366c223761SKevin Barnett __le32 legacy_intx_mask_set; 376c223761SKevin Barnett __le32 legacy_intx_mask_clear; 386c223761SKevin Barnett u8 reserved2[28]; 396c223761SKevin Barnett __le32 device_status; 406c223761SKevin Barnett u8 reserved3[4]; 416c223761SKevin Barnett __le64 admin_iq_pi_offset; 426c223761SKevin Barnett __le64 admin_oq_ci_offset; 436c223761SKevin Barnett __le64 admin_iq_element_array_addr; 446c223761SKevin Barnett __le64 admin_oq_element_array_addr; 456c223761SKevin Barnett __le64 admin_iq_ci_addr; 466c223761SKevin Barnett __le64 admin_oq_pi_addr; 476c223761SKevin Barnett u8 admin_iq_num_elements; 486c223761SKevin Barnett u8 admin_oq_num_elements; 496c223761SKevin Barnett __le16 admin_queue_int_msg_num; 506c223761SKevin Barnett u8 reserved4[4]; 516c223761SKevin Barnett __le32 device_error; 526c223761SKevin Barnett u8 reserved5[4]; 536c223761SKevin Barnett __le64 error_details; 546c223761SKevin Barnett __le32 device_reset; 556c223761SKevin Barnett __le32 power_action; 566c223761SKevin Barnett u8 reserved6[104]; 576c223761SKevin Barnett }; 586c223761SKevin Barnett 596c223761SKevin Barnett /* 606c223761SKevin Barnett * controller registers 616c223761SKevin Barnett * 62061ef06aSKevin Barnett * These are defined by the Microsemi implementation. 636c223761SKevin Barnett * 646c223761SKevin Barnett * Some registers (those named sis_*) are only used when in 656c223761SKevin Barnett * legacy SIS mode before we transition the controller into 666c223761SKevin Barnett * PQI mode. There are a number of other SIS mode registers, 676c223761SKevin Barnett * but we don't use them, so only the SIS registers that we 686c223761SKevin Barnett * care about are defined here. The offsets mentioned in the 696c223761SKevin Barnett * comments are the offsets from the PCIe BAR 0. 706c223761SKevin Barnett */ 716c223761SKevin Barnett struct pqi_ctrl_registers { 726c223761SKevin Barnett u8 reserved[0x20]; 736c223761SKevin Barnett __le32 sis_host_to_ctrl_doorbell; /* 20h */ 746c223761SKevin Barnett u8 reserved1[0x34 - (0x20 + sizeof(__le32))]; 756c223761SKevin Barnett __le32 sis_interrupt_mask; /* 34h */ 766c223761SKevin Barnett u8 reserved2[0x9c - (0x34 + sizeof(__le32))]; 776c223761SKevin Barnett __le32 sis_ctrl_to_host_doorbell; /* 9Ch */ 786c223761SKevin Barnett u8 reserved3[0xa0 - (0x9c + sizeof(__le32))]; 796c223761SKevin Barnett __le32 sis_ctrl_to_host_doorbell_clear; /* A0h */ 80ff6abb73SKevin Barnett u8 reserved4[0xb0 - (0xa0 + sizeof(__le32))]; 81ff6abb73SKevin Barnett __le32 sis_driver_scratch; /* B0h */ 82ff6abb73SKevin Barnett u8 reserved5[0xbc - (0xb0 + sizeof(__le32))]; 836c223761SKevin Barnett __le32 sis_firmware_status; /* BCh */ 84ff6abb73SKevin Barnett u8 reserved6[0x1000 - (0xbc + sizeof(__le32))]; 856c223761SKevin Barnett __le32 sis_mailbox[8]; /* 1000h */ 86ff6abb73SKevin Barnett u8 reserved7[0x4000 - (0x1000 + (sizeof(__le32) * 8))]; 876c223761SKevin Barnett /* 886c223761SKevin Barnett * The PQI spec states that the PQI registers should be at 896c223761SKevin Barnett * offset 0 from the PCIe BAR 0. However, we can't map 906c223761SKevin Barnett * them at offset 0 because that would break compatibility 916c223761SKevin Barnett * with the SIS registers. So we map them at offset 4000h. 926c223761SKevin Barnett */ 936c223761SKevin Barnett struct pqi_device_registers pqi_registers; /* 4000h */ 946c223761SKevin Barnett }; 956c223761SKevin Barnett 964fd22c13SMahesh Rajashekhara #if ((HZ) < 1000) 974fd22c13SMahesh Rajashekhara #define PQI_HZ 1000 984fd22c13SMahesh Rajashekhara #else 994fd22c13SMahesh Rajashekhara #define PQI_HZ (HZ) 1004fd22c13SMahesh Rajashekhara #endif 1014fd22c13SMahesh Rajashekhara 1026c223761SKevin Barnett #define PQI_DEVICE_REGISTERS_OFFSET 0x4000 1036c223761SKevin Barnett 1046c223761SKevin Barnett enum pqi_io_path { 1056c223761SKevin Barnett RAID_PATH = 0, 1066c223761SKevin Barnett AIO_PATH = 1 1076c223761SKevin Barnett }; 1086c223761SKevin Barnett 109061ef06aSKevin Barnett enum pqi_irq_mode { 110061ef06aSKevin Barnett IRQ_MODE_NONE, 111061ef06aSKevin Barnett IRQ_MODE_INTX, 112061ef06aSKevin Barnett IRQ_MODE_MSIX 113061ef06aSKevin Barnett }; 114061ef06aSKevin Barnett 1156c223761SKevin Barnett struct pqi_sg_descriptor { 1166c223761SKevin Barnett __le64 address; 1176c223761SKevin Barnett __le32 length; 1186c223761SKevin Barnett __le32 flags; 1196c223761SKevin Barnett }; 1206c223761SKevin Barnett 1216c223761SKevin Barnett /* manifest constants for the flags field of pqi_sg_descriptor */ 1226c223761SKevin Barnett #define CISS_SG_LAST 0x40000000 1236c223761SKevin Barnett #define CISS_SG_CHAIN 0x80000000 1246c223761SKevin Barnett 1256c223761SKevin Barnett struct pqi_iu_header { 1266c223761SKevin Barnett u8 iu_type; 1276c223761SKevin Barnett u8 reserved; 1286c223761SKevin Barnett __le16 iu_length; /* in bytes - does not include the length */ 1296c223761SKevin Barnett /* of this header */ 1306c223761SKevin Barnett __le16 response_queue_id; /* specifies the OQ where the */ 1316c223761SKevin Barnett /* response IU is to be delivered */ 1326c223761SKevin Barnett u8 work_area[2]; /* reserved for driver use */ 1336c223761SKevin Barnett }; 1346c223761SKevin Barnett 1356c223761SKevin Barnett /* 1366c223761SKevin Barnett * According to the PQI spec, the IU header is only the first 4 bytes of our 1376c223761SKevin Barnett * pqi_iu_header structure. 1386c223761SKevin Barnett */ 1396c223761SKevin Barnett #define PQI_REQUEST_HEADER_LENGTH 4 1406c223761SKevin Barnett 1416c223761SKevin Barnett struct pqi_general_admin_request { 1426c223761SKevin Barnett struct pqi_iu_header header; 1436c223761SKevin Barnett __le16 request_id; 1446c223761SKevin Barnett u8 function_code; 1456c223761SKevin Barnett union { 1466c223761SKevin Barnett struct { 1476c223761SKevin Barnett u8 reserved[33]; 1486c223761SKevin Barnett __le32 buffer_length; 1496c223761SKevin Barnett struct pqi_sg_descriptor sg_descriptor; 1506c223761SKevin Barnett } report_device_capability; 1516c223761SKevin Barnett 1526c223761SKevin Barnett struct { 1536c223761SKevin Barnett u8 reserved; 1546c223761SKevin Barnett __le16 queue_id; 1556c223761SKevin Barnett u8 reserved1[2]; 1566c223761SKevin Barnett __le64 element_array_addr; 1576c223761SKevin Barnett __le64 ci_addr; 1586c223761SKevin Barnett __le16 num_elements; 1596c223761SKevin Barnett __le16 element_length; 1606c223761SKevin Barnett u8 queue_protocol; 1616c223761SKevin Barnett u8 reserved2[23]; 1626c223761SKevin Barnett __le32 vendor_specific; 1636c223761SKevin Barnett } create_operational_iq; 1646c223761SKevin Barnett 1656c223761SKevin Barnett struct { 1666c223761SKevin Barnett u8 reserved; 1676c223761SKevin Barnett __le16 queue_id; 1686c223761SKevin Barnett u8 reserved1[2]; 1696c223761SKevin Barnett __le64 element_array_addr; 1706c223761SKevin Barnett __le64 pi_addr; 1716c223761SKevin Barnett __le16 num_elements; 1726c223761SKevin Barnett __le16 element_length; 1736c223761SKevin Barnett u8 queue_protocol; 1746c223761SKevin Barnett u8 reserved2[3]; 1756c223761SKevin Barnett __le16 int_msg_num; 1766c223761SKevin Barnett __le16 coalescing_count; 1776c223761SKevin Barnett __le32 min_coalescing_time; 1786c223761SKevin Barnett __le32 max_coalescing_time; 1796c223761SKevin Barnett u8 reserved3[8]; 1806c223761SKevin Barnett __le32 vendor_specific; 1816c223761SKevin Barnett } create_operational_oq; 1826c223761SKevin Barnett 1836c223761SKevin Barnett struct { 1846c223761SKevin Barnett u8 reserved; 1856c223761SKevin Barnett __le16 queue_id; 1866c223761SKevin Barnett u8 reserved1[50]; 1876c223761SKevin Barnett } delete_operational_queue; 1886c223761SKevin Barnett 1896c223761SKevin Barnett struct { 1906c223761SKevin Barnett u8 reserved; 1916c223761SKevin Barnett __le16 queue_id; 1926c223761SKevin Barnett u8 reserved1[46]; 1936c223761SKevin Barnett __le32 vendor_specific; 1946c223761SKevin Barnett } change_operational_iq_properties; 1956c223761SKevin Barnett 1966c223761SKevin Barnett } data; 1976c223761SKevin Barnett }; 1986c223761SKevin Barnett 1996c223761SKevin Barnett struct pqi_general_admin_response { 2006c223761SKevin Barnett struct pqi_iu_header header; 2016c223761SKevin Barnett __le16 request_id; 2026c223761SKevin Barnett u8 function_code; 2036c223761SKevin Barnett u8 status; 2046c223761SKevin Barnett union { 2056c223761SKevin Barnett struct { 2066c223761SKevin Barnett u8 status_descriptor[4]; 2076c223761SKevin Barnett __le64 iq_pi_offset; 2086c223761SKevin Barnett u8 reserved[40]; 2096c223761SKevin Barnett } create_operational_iq; 2106c223761SKevin Barnett 2116c223761SKevin Barnett struct { 2126c223761SKevin Barnett u8 status_descriptor[4]; 2136c223761SKevin Barnett __le64 oq_ci_offset; 2146c223761SKevin Barnett u8 reserved[40]; 2156c223761SKevin Barnett } create_operational_oq; 2166c223761SKevin Barnett } data; 2176c223761SKevin Barnett }; 2186c223761SKevin Barnett 2196c223761SKevin Barnett struct pqi_iu_layer_descriptor { 2206c223761SKevin Barnett u8 inbound_spanning_supported : 1; 2216c223761SKevin Barnett u8 reserved : 7; 2226c223761SKevin Barnett u8 reserved1[5]; 2236c223761SKevin Barnett __le16 max_inbound_iu_length; 2246c223761SKevin Barnett u8 outbound_spanning_supported : 1; 2256c223761SKevin Barnett u8 reserved2 : 7; 2266c223761SKevin Barnett u8 reserved3[5]; 2276c223761SKevin Barnett __le16 max_outbound_iu_length; 2286c223761SKevin Barnett }; 2296c223761SKevin Barnett 2306c223761SKevin Barnett struct pqi_device_capability { 2316c223761SKevin Barnett __le16 data_length; 2326c223761SKevin Barnett u8 reserved[6]; 2336c223761SKevin Barnett u8 iq_arbitration_priority_support_bitmask; 2346c223761SKevin Barnett u8 maximum_aw_a; 2356c223761SKevin Barnett u8 maximum_aw_b; 2366c223761SKevin Barnett u8 maximum_aw_c; 2376c223761SKevin Barnett u8 max_arbitration_burst : 3; 2386c223761SKevin Barnett u8 reserved1 : 4; 2396c223761SKevin Barnett u8 iqa : 1; 2406c223761SKevin Barnett u8 reserved2[2]; 2416c223761SKevin Barnett u8 iq_freeze : 1; 2426c223761SKevin Barnett u8 reserved3 : 7; 2436c223761SKevin Barnett __le16 max_inbound_queues; 2446c223761SKevin Barnett __le16 max_elements_per_iq; 2456c223761SKevin Barnett u8 reserved4[4]; 2466c223761SKevin Barnett __le16 max_iq_element_length; 2476c223761SKevin Barnett __le16 min_iq_element_length; 2486c223761SKevin Barnett u8 reserved5[2]; 2496c223761SKevin Barnett __le16 max_outbound_queues; 2506c223761SKevin Barnett __le16 max_elements_per_oq; 2516c223761SKevin Barnett __le16 intr_coalescing_time_granularity; 2526c223761SKevin Barnett __le16 max_oq_element_length; 2536c223761SKevin Barnett __le16 min_oq_element_length; 2546c223761SKevin Barnett u8 reserved6[24]; 2556c223761SKevin Barnett struct pqi_iu_layer_descriptor iu_layer_descriptors[32]; 2566c223761SKevin Barnett }; 2576c223761SKevin Barnett 2586c223761SKevin Barnett #define PQI_MAX_EMBEDDED_SG_DESCRIPTORS 4 2596c223761SKevin Barnett 2606c223761SKevin Barnett struct pqi_raid_path_request { 2616c223761SKevin Barnett struct pqi_iu_header header; 2626c223761SKevin Barnett __le16 request_id; 2636c223761SKevin Barnett __le16 nexus_id; 2646c223761SKevin Barnett __le32 buffer_length; 2656c223761SKevin Barnett u8 lun_number[8]; 2666c223761SKevin Barnett __le16 protocol_specific; 2676c223761SKevin Barnett u8 data_direction : 2; 2686c223761SKevin Barnett u8 partial : 1; 2696c223761SKevin Barnett u8 reserved1 : 4; 2706c223761SKevin Barnett u8 fence : 1; 2716c223761SKevin Barnett __le16 error_index; 2726c223761SKevin Barnett u8 reserved2; 2736c223761SKevin Barnett u8 task_attribute : 3; 2746c223761SKevin Barnett u8 command_priority : 4; 2756c223761SKevin Barnett u8 reserved3 : 1; 2766c223761SKevin Barnett u8 reserved4 : 2; 2776c223761SKevin Barnett u8 additional_cdb_bytes_usage : 3; 2786c223761SKevin Barnett u8 reserved5 : 3; 27921432010Skoshyaji u8 cdb[16]; 28021432010Skoshyaji u8 reserved6[12]; 28121432010Skoshyaji __le32 timeout; 2826c223761SKevin Barnett struct pqi_sg_descriptor 2836c223761SKevin Barnett sg_descriptors[PQI_MAX_EMBEDDED_SG_DESCRIPTORS]; 2846c223761SKevin Barnett }; 2856c223761SKevin Barnett 2866c223761SKevin Barnett struct pqi_aio_path_request { 2876c223761SKevin Barnett struct pqi_iu_header header; 2886c223761SKevin Barnett __le16 request_id; 2896c223761SKevin Barnett u8 reserved1[2]; 2906c223761SKevin Barnett __le32 nexus_id; 2916c223761SKevin Barnett __le32 buffer_length; 2926c223761SKevin Barnett u8 data_direction : 2; 2936c223761SKevin Barnett u8 partial : 1; 2946c223761SKevin Barnett u8 memory_type : 1; 2956c223761SKevin Barnett u8 fence : 1; 2966c223761SKevin Barnett u8 encryption_enable : 1; 2976c223761SKevin Barnett u8 reserved2 : 2; 2986c223761SKevin Barnett u8 task_attribute : 3; 2996c223761SKevin Barnett u8 command_priority : 4; 3006c223761SKevin Barnett u8 reserved3 : 1; 3016c223761SKevin Barnett __le16 data_encryption_key_index; 3026c223761SKevin Barnett __le32 encrypt_tweak_lower; 3036c223761SKevin Barnett __le32 encrypt_tweak_upper; 3046c223761SKevin Barnett u8 cdb[16]; 3056c223761SKevin Barnett __le16 error_index; 3066c223761SKevin Barnett u8 num_sg_descriptors; 3076c223761SKevin Barnett u8 cdb_length; 3086c223761SKevin Barnett u8 lun_number[8]; 3096c223761SKevin Barnett u8 reserved4[4]; 3106c223761SKevin Barnett struct pqi_sg_descriptor 3116c223761SKevin Barnett sg_descriptors[PQI_MAX_EMBEDDED_SG_DESCRIPTORS]; 3126c223761SKevin Barnett }; 3136c223761SKevin Barnett 3146c223761SKevin Barnett struct pqi_io_response { 3156c223761SKevin Barnett struct pqi_iu_header header; 3166c223761SKevin Barnett __le16 request_id; 3176c223761SKevin Barnett __le16 error_index; 3186c223761SKevin Barnett u8 reserved2[4]; 3196c223761SKevin Barnett }; 3206c223761SKevin Barnett 3216c223761SKevin Barnett struct pqi_general_management_request { 3226c223761SKevin Barnett struct pqi_iu_header header; 3236c223761SKevin Barnett __le16 request_id; 3246c223761SKevin Barnett union { 3256c223761SKevin Barnett struct { 3266c223761SKevin Barnett u8 reserved[2]; 3276c223761SKevin Barnett __le32 buffer_length; 3286c223761SKevin Barnett struct pqi_sg_descriptor sg_descriptors[3]; 3296c223761SKevin Barnett } report_event_configuration; 3306c223761SKevin Barnett 3316c223761SKevin Barnett struct { 3326c223761SKevin Barnett __le16 global_event_oq_id; 3336c223761SKevin Barnett __le32 buffer_length; 3346c223761SKevin Barnett struct pqi_sg_descriptor sg_descriptors[3]; 3356c223761SKevin Barnett } set_event_configuration; 3366c223761SKevin Barnett } data; 3376c223761SKevin Barnett }; 3386c223761SKevin Barnett 3396c223761SKevin Barnett struct pqi_event_descriptor { 3406c223761SKevin Barnett u8 event_type; 3416c223761SKevin Barnett u8 reserved; 3426c223761SKevin Barnett __le16 oq_id; 3436c223761SKevin Barnett }; 3446c223761SKevin Barnett 3456c223761SKevin Barnett struct pqi_event_config { 3466c223761SKevin Barnett u8 reserved[2]; 3476c223761SKevin Barnett u8 num_event_descriptors; 3486c223761SKevin Barnett u8 reserved1; 3496c223761SKevin Barnett struct pqi_event_descriptor descriptors[1]; 3506c223761SKevin Barnett }; 3516c223761SKevin Barnett 3526c223761SKevin Barnett #define PQI_MAX_EVENT_DESCRIPTORS 255 3536c223761SKevin Barnett 3544fd22c13SMahesh Rajashekhara #define PQI_EVENT_OFA_MEMORY_ALLOCATION 0x0 3554fd22c13SMahesh Rajashekhara #define PQI_EVENT_OFA_QUIESCE 0x1 3564fd22c13SMahesh Rajashekhara #define PQI_EVENT_OFA_CANCELLED 0x2 3574fd22c13SMahesh Rajashekhara 3586c223761SKevin Barnett struct pqi_event_response { 3596c223761SKevin Barnett struct pqi_iu_header header; 3606c223761SKevin Barnett u8 event_type; 3616c223761SKevin Barnett u8 reserved2 : 7; 3626c223761SKevin Barnett u8 request_acknowlege : 1; 3636c223761SKevin Barnett __le16 event_id; 3646c223761SKevin Barnett __le32 additional_event_id; 3654fd22c13SMahesh Rajashekhara union { 3664fd22c13SMahesh Rajashekhara struct { 3674fd22c13SMahesh Rajashekhara __le32 bytes_requested; 3684fd22c13SMahesh Rajashekhara u8 reserved[12]; 3694fd22c13SMahesh Rajashekhara } ofa_memory_allocation; 3704fd22c13SMahesh Rajashekhara 3714fd22c13SMahesh Rajashekhara struct { 3724fd22c13SMahesh Rajashekhara __le16 reason; /* reason for cancellation */ 3734fd22c13SMahesh Rajashekhara u8 reserved[14]; 3744fd22c13SMahesh Rajashekhara } ofa_cancelled; 3754fd22c13SMahesh Rajashekhara } data; 3766c223761SKevin Barnett }; 3776c223761SKevin Barnett 3786c223761SKevin Barnett struct pqi_event_acknowledge_request { 3796c223761SKevin Barnett struct pqi_iu_header header; 3806c223761SKevin Barnett u8 event_type; 3816c223761SKevin Barnett u8 reserved2; 3826c223761SKevin Barnett __le16 event_id; 3836c223761SKevin Barnett __le32 additional_event_id; 3846c223761SKevin Barnett }; 3856c223761SKevin Barnett 3866c223761SKevin Barnett struct pqi_task_management_request { 3876c223761SKevin Barnett struct pqi_iu_header header; 3886c223761SKevin Barnett __le16 request_id; 3896c223761SKevin Barnett __le16 nexus_id; 390*c2922f17SMurthy Bhat u8 reserved[2]; 391*c2922f17SMurthy Bhat __le16 timeout; 3926c223761SKevin Barnett u8 lun_number[8]; 3936c223761SKevin Barnett __le16 protocol_specific; 3946c223761SKevin Barnett __le16 outbound_queue_id_to_manage; 3956c223761SKevin Barnett __le16 request_id_to_manage; 3966c223761SKevin Barnett u8 task_management_function; 3976c223761SKevin Barnett u8 reserved2 : 7; 3986c223761SKevin Barnett u8 fence : 1; 3996c223761SKevin Barnett }; 4006c223761SKevin Barnett 4016c223761SKevin Barnett #define SOP_TASK_MANAGEMENT_LUN_RESET 0x8 4026c223761SKevin Barnett 4036c223761SKevin Barnett struct pqi_task_management_response { 4046c223761SKevin Barnett struct pqi_iu_header header; 4056c223761SKevin Barnett __le16 request_id; 4066c223761SKevin Barnett __le16 nexus_id; 4076c223761SKevin Barnett u8 additional_response_info[3]; 4086c223761SKevin Barnett u8 response_code; 4096c223761SKevin Barnett }; 4106c223761SKevin Barnett 411b212c251SKevin Barnett struct pqi_vendor_general_request { 412b212c251SKevin Barnett struct pqi_iu_header header; 413b212c251SKevin Barnett __le16 request_id; 414b212c251SKevin Barnett __le16 function_code; 415b212c251SKevin Barnett union { 416b212c251SKevin Barnett struct { 417b212c251SKevin Barnett __le16 first_section; 418b212c251SKevin Barnett __le16 last_section; 419b212c251SKevin Barnett u8 reserved[48]; 420b212c251SKevin Barnett } config_table_update; 421b212c251SKevin Barnett 422b212c251SKevin Barnett struct { 423b212c251SKevin Barnett __le64 buffer_address; 424b212c251SKevin Barnett __le32 buffer_length; 425b212c251SKevin Barnett u8 reserved[40]; 426b212c251SKevin Barnett } ofa_memory_allocation; 427b212c251SKevin Barnett } data; 428b212c251SKevin Barnett }; 429b212c251SKevin Barnett 430b212c251SKevin Barnett struct pqi_vendor_general_response { 431b212c251SKevin Barnett struct pqi_iu_header header; 432b212c251SKevin Barnett __le16 request_id; 433b212c251SKevin Barnett __le16 function_code; 434b212c251SKevin Barnett __le16 status; 435b212c251SKevin Barnett u8 reserved[2]; 436b212c251SKevin Barnett }; 437b212c251SKevin Barnett 438b212c251SKevin Barnett #define PQI_VENDOR_GENERAL_CONFIG_TABLE_UPDATE 0 4394fd22c13SMahesh Rajashekhara #define PQI_VENDOR_GENERAL_HOST_MEMORY_UPDATE 1 4404fd22c13SMahesh Rajashekhara 4414fd22c13SMahesh Rajashekhara #define PQI_OFA_VERSION 1 4424fd22c13SMahesh Rajashekhara #define PQI_OFA_SIGNATURE "OFA_QRM" 4434fd22c13SMahesh Rajashekhara #define PQI_OFA_MAX_SG_DESCRIPTORS 64 4444fd22c13SMahesh Rajashekhara 4454fd22c13SMahesh Rajashekhara #define PQI_OFA_MEMORY_DESCRIPTOR_LENGTH \ 4464fd22c13SMahesh Rajashekhara (offsetof(struct pqi_ofa_memory, sg_descriptor) + \ 4474fd22c13SMahesh Rajashekhara (PQI_OFA_MAX_SG_DESCRIPTORS * sizeof(struct pqi_sg_descriptor))) 4484fd22c13SMahesh Rajashekhara 4494fd22c13SMahesh Rajashekhara struct pqi_ofa_memory { 4504fd22c13SMahesh Rajashekhara __le64 signature; /* "OFA_QRM" */ 4514fd22c13SMahesh Rajashekhara __le16 version; /* version of this struct(1 = 1st version) */ 4524fd22c13SMahesh Rajashekhara u8 reserved[62]; 4534fd22c13SMahesh Rajashekhara __le32 bytes_allocated; /* total allocated memory in bytes */ 4544fd22c13SMahesh Rajashekhara __le16 num_memory_descriptors; 4554fd22c13SMahesh Rajashekhara u8 reserved1[2]; 4564fd22c13SMahesh Rajashekhara struct pqi_sg_descriptor sg_descriptor[1]; 4574fd22c13SMahesh Rajashekhara }; 458b212c251SKevin Barnett 4596c223761SKevin Barnett struct pqi_aio_error_info { 4606c223761SKevin Barnett u8 status; 4616c223761SKevin Barnett u8 service_response; 4626c223761SKevin Barnett u8 data_present; 4636c223761SKevin Barnett u8 reserved; 4646c223761SKevin Barnett __le32 residual_count; 4656c223761SKevin Barnett __le16 data_length; 4666c223761SKevin Barnett __le16 reserved1; 4676c223761SKevin Barnett u8 data[256]; 4686c223761SKevin Barnett }; 4696c223761SKevin Barnett 4706c223761SKevin Barnett struct pqi_raid_error_info { 4716c223761SKevin Barnett u8 data_in_result; 4726c223761SKevin Barnett u8 data_out_result; 4736c223761SKevin Barnett u8 reserved[3]; 4746c223761SKevin Barnett u8 status; 4756c223761SKevin Barnett __le16 status_qualifier; 4766c223761SKevin Barnett __le16 sense_data_length; 4776c223761SKevin Barnett __le16 response_data_length; 4786c223761SKevin Barnett __le32 data_in_transferred; 4796c223761SKevin Barnett __le32 data_out_transferred; 4806c223761SKevin Barnett u8 data[256]; 4816c223761SKevin Barnett }; 4826c223761SKevin Barnett 4836c223761SKevin Barnett #define PQI_REQUEST_IU_TASK_MANAGEMENT 0x13 4846c223761SKevin Barnett #define PQI_REQUEST_IU_RAID_PATH_IO 0x14 4856c223761SKevin Barnett #define PQI_REQUEST_IU_AIO_PATH_IO 0x15 4866c223761SKevin Barnett #define PQI_REQUEST_IU_GENERAL_ADMIN 0x60 4876c223761SKevin Barnett #define PQI_REQUEST_IU_REPORT_VENDOR_EVENT_CONFIG 0x72 4886c223761SKevin Barnett #define PQI_REQUEST_IU_SET_VENDOR_EVENT_CONFIG 0x73 489b212c251SKevin Barnett #define PQI_REQUEST_IU_VENDOR_GENERAL 0x75 4906c223761SKevin Barnett #define PQI_REQUEST_IU_ACKNOWLEDGE_VENDOR_EVENT 0xf6 4916c223761SKevin Barnett 4926c223761SKevin Barnett #define PQI_RESPONSE_IU_GENERAL_MANAGEMENT 0x81 4936c223761SKevin Barnett #define PQI_RESPONSE_IU_TASK_MANAGEMENT 0x93 4946c223761SKevin Barnett #define PQI_RESPONSE_IU_GENERAL_ADMIN 0xe0 4956c223761SKevin Barnett #define PQI_RESPONSE_IU_RAID_PATH_IO_SUCCESS 0xf0 4966c223761SKevin Barnett #define PQI_RESPONSE_IU_AIO_PATH_IO_SUCCESS 0xf1 4976c223761SKevin Barnett #define PQI_RESPONSE_IU_RAID_PATH_IO_ERROR 0xf2 4986c223761SKevin Barnett #define PQI_RESPONSE_IU_AIO_PATH_IO_ERROR 0xf3 4996c223761SKevin Barnett #define PQI_RESPONSE_IU_AIO_PATH_DISABLED 0xf4 5006c223761SKevin Barnett #define PQI_RESPONSE_IU_VENDOR_EVENT 0xf5 501b212c251SKevin Barnett #define PQI_RESPONSE_IU_VENDOR_GENERAL 0xf7 5026c223761SKevin Barnett 5036c223761SKevin Barnett #define PQI_GENERAL_ADMIN_FUNCTION_REPORT_DEVICE_CAPABILITY 0x0 5046c223761SKevin Barnett #define PQI_GENERAL_ADMIN_FUNCTION_CREATE_IQ 0x10 5056c223761SKevin Barnett #define PQI_GENERAL_ADMIN_FUNCTION_CREATE_OQ 0x11 5066c223761SKevin Barnett #define PQI_GENERAL_ADMIN_FUNCTION_DELETE_IQ 0x12 5076c223761SKevin Barnett #define PQI_GENERAL_ADMIN_FUNCTION_DELETE_OQ 0x13 5086c223761SKevin Barnett #define PQI_GENERAL_ADMIN_FUNCTION_CHANGE_IQ_PROPERTY 0x14 5096c223761SKevin Barnett 5106c223761SKevin Barnett #define PQI_GENERAL_ADMIN_STATUS_SUCCESS 0x0 5116c223761SKevin Barnett 5126c223761SKevin Barnett #define PQI_IQ_PROPERTY_IS_AIO_QUEUE 0x1 5136c223761SKevin Barnett 5146c223761SKevin Barnett #define PQI_GENERAL_ADMIN_IU_LENGTH 0x3c 5156c223761SKevin Barnett #define PQI_PROTOCOL_SOP 0x0 5166c223761SKevin Barnett 5176c223761SKevin Barnett #define PQI_DATA_IN_OUT_GOOD 0x0 5186c223761SKevin Barnett #define PQI_DATA_IN_OUT_UNDERFLOW 0x1 5196c223761SKevin Barnett #define PQI_DATA_IN_OUT_BUFFER_ERROR 0x40 5206c223761SKevin Barnett #define PQI_DATA_IN_OUT_BUFFER_OVERFLOW 0x41 5216c223761SKevin Barnett #define PQI_DATA_IN_OUT_BUFFER_OVERFLOW_DESCRIPTOR_AREA 0x42 5226c223761SKevin Barnett #define PQI_DATA_IN_OUT_BUFFER_OVERFLOW_BRIDGE 0x43 5236c223761SKevin Barnett #define PQI_DATA_IN_OUT_PCIE_FABRIC_ERROR 0x60 5246c223761SKevin Barnett #define PQI_DATA_IN_OUT_PCIE_COMPLETION_TIMEOUT 0x61 5256c223761SKevin Barnett #define PQI_DATA_IN_OUT_PCIE_COMPLETER_ABORT_RECEIVED 0x62 5266c223761SKevin Barnett #define PQI_DATA_IN_OUT_PCIE_UNSUPPORTED_REQUEST_RECEIVED 0x63 5276c223761SKevin Barnett #define PQI_DATA_IN_OUT_PCIE_ECRC_CHECK_FAILED 0x64 5286c223761SKevin Barnett #define PQI_DATA_IN_OUT_PCIE_UNSUPPORTED_REQUEST 0x65 5296c223761SKevin Barnett #define PQI_DATA_IN_OUT_PCIE_ACS_VIOLATION 0x66 5306c223761SKevin Barnett #define PQI_DATA_IN_OUT_PCIE_TLP_PREFIX_BLOCKED 0x67 5316c223761SKevin Barnett #define PQI_DATA_IN_OUT_PCIE_POISONED_MEMORY_READ 0x6F 5326c223761SKevin Barnett #define PQI_DATA_IN_OUT_ERROR 0xf0 5336c223761SKevin Barnett #define PQI_DATA_IN_OUT_PROTOCOL_ERROR 0xf1 5346c223761SKevin Barnett #define PQI_DATA_IN_OUT_HARDWARE_ERROR 0xf2 5356c223761SKevin Barnett #define PQI_DATA_IN_OUT_UNSOLICITED_ABORT 0xf3 5366c223761SKevin Barnett #define PQI_DATA_IN_OUT_ABORTED 0xf4 5376c223761SKevin Barnett #define PQI_DATA_IN_OUT_TIMEOUT 0xf5 5386c223761SKevin Barnett 5396c223761SKevin Barnett #define CISS_CMD_STATUS_SUCCESS 0x0 5406c223761SKevin Barnett #define CISS_CMD_STATUS_TARGET_STATUS 0x1 5416c223761SKevin Barnett #define CISS_CMD_STATUS_DATA_UNDERRUN 0x2 5426c223761SKevin Barnett #define CISS_CMD_STATUS_DATA_OVERRUN 0x3 5436c223761SKevin Barnett #define CISS_CMD_STATUS_INVALID 0x4 5446c223761SKevin Barnett #define CISS_CMD_STATUS_PROTOCOL_ERROR 0x5 5456c223761SKevin Barnett #define CISS_CMD_STATUS_HARDWARE_ERROR 0x6 5466c223761SKevin Barnett #define CISS_CMD_STATUS_CONNECTION_LOST 0x7 5476c223761SKevin Barnett #define CISS_CMD_STATUS_ABORTED 0x8 5486c223761SKevin Barnett #define CISS_CMD_STATUS_ABORT_FAILED 0x9 5496c223761SKevin Barnett #define CISS_CMD_STATUS_UNSOLICITED_ABORT 0xa 5506c223761SKevin Barnett #define CISS_CMD_STATUS_TIMEOUT 0xb 5516c223761SKevin Barnett #define CISS_CMD_STATUS_UNABORTABLE 0xc 5526c223761SKevin Barnett #define CISS_CMD_STATUS_TMF 0xd 5536c223761SKevin Barnett #define CISS_CMD_STATUS_AIO_DISABLED 0xe 5546c223761SKevin Barnett 55526b390abSKevin Barnett #define PQI_CMD_STATUS_ABORTED CISS_CMD_STATUS_ABORTED 55626b390abSKevin Barnett 5576c223761SKevin Barnett #define PQI_NUM_EVENT_QUEUE_ELEMENTS 32 5586c223761SKevin Barnett #define PQI_EVENT_OQ_ELEMENT_LENGTH sizeof(struct pqi_event_response) 5596c223761SKevin Barnett 5606c223761SKevin Barnett #define PQI_EVENT_TYPE_HOTPLUG 0x1 5616c223761SKevin Barnett #define PQI_EVENT_TYPE_HARDWARE 0x2 5626c223761SKevin Barnett #define PQI_EVENT_TYPE_PHYSICAL_DEVICE 0x4 5636c223761SKevin Barnett #define PQI_EVENT_TYPE_LOGICAL_DEVICE 0x5 5644fd22c13SMahesh Rajashekhara #define PQI_EVENT_TYPE_OFA 0xfb 5656c223761SKevin Barnett #define PQI_EVENT_TYPE_AIO_STATE_CHANGE 0xfd 5666c223761SKevin Barnett #define PQI_EVENT_TYPE_AIO_CONFIG_CHANGE 0xfe 5676c223761SKevin Barnett 5686c223761SKevin Barnett #pragma pack() 5696c223761SKevin Barnett 5706c223761SKevin Barnett #define PQI_ERROR_BUFFER_ELEMENT_LENGTH \ 5716c223761SKevin Barnett sizeof(struct pqi_raid_error_info) 5726c223761SKevin Barnett 5736c223761SKevin Barnett /* these values are based on our implementation */ 5746c223761SKevin Barnett #define PQI_ADMIN_IQ_NUM_ELEMENTS 8 5756c223761SKevin Barnett #define PQI_ADMIN_OQ_NUM_ELEMENTS 20 5766c223761SKevin Barnett #define PQI_ADMIN_IQ_ELEMENT_LENGTH 64 5776c223761SKevin Barnett #define PQI_ADMIN_OQ_ELEMENT_LENGTH 64 5786c223761SKevin Barnett 5796c223761SKevin Barnett #define PQI_OPERATIONAL_IQ_ELEMENT_LENGTH 128 5806c223761SKevin Barnett #define PQI_OPERATIONAL_OQ_ELEMENT_LENGTH 16 5816c223761SKevin Barnett 5826c223761SKevin Barnett #define PQI_MIN_MSIX_VECTORS 1 5836c223761SKevin Barnett #define PQI_MAX_MSIX_VECTORS 64 5846c223761SKevin Barnett 5856c223761SKevin Barnett /* these values are defined by the PQI spec */ 5866c223761SKevin Barnett #define PQI_MAX_NUM_ELEMENTS_ADMIN_QUEUE 255 5876c223761SKevin Barnett #define PQI_MAX_NUM_ELEMENTS_OPERATIONAL_QUEUE 65535 5886c223761SKevin Barnett #define PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT 64 5896c223761SKevin Barnett #define PQI_QUEUE_ELEMENT_LENGTH_ALIGNMENT 16 5906c223761SKevin Barnett #define PQI_ADMIN_INDEX_ALIGNMENT 64 5916c223761SKevin Barnett #define PQI_OPERATIONAL_INDEX_ALIGNMENT 4 5926c223761SKevin Barnett 5936c223761SKevin Barnett #define PQI_MIN_OPERATIONAL_QUEUE_ID 1 5946c223761SKevin Barnett #define PQI_MAX_OPERATIONAL_QUEUE_ID 65535 5956c223761SKevin Barnett 5966c223761SKevin Barnett #define PQI_AIO_SERV_RESPONSE_COMPLETE 0 5976c223761SKevin Barnett #define PQI_AIO_SERV_RESPONSE_FAILURE 1 5986c223761SKevin Barnett #define PQI_AIO_SERV_RESPONSE_TMF_COMPLETE 2 5996c223761SKevin Barnett #define PQI_AIO_SERV_RESPONSE_TMF_SUCCEEDED 3 6006c223761SKevin Barnett #define PQI_AIO_SERV_RESPONSE_TMF_REJECTED 4 6016c223761SKevin Barnett #define PQI_AIO_SERV_RESPONSE_TMF_INCORRECT_LUN 5 6026c223761SKevin Barnett 6036c223761SKevin Barnett #define PQI_AIO_STATUS_IO_ERROR 0x1 6046c223761SKevin Barnett #define PQI_AIO_STATUS_IO_ABORTED 0x2 6056c223761SKevin Barnett #define PQI_AIO_STATUS_NO_PATH_TO_DEVICE 0x3 6066c223761SKevin Barnett #define PQI_AIO_STATUS_INVALID_DEVICE 0x4 6076c223761SKevin Barnett #define PQI_AIO_STATUS_AIO_PATH_DISABLED 0xe 6086c223761SKevin Barnett #define PQI_AIO_STATUS_UNDERRUN 0x51 6096c223761SKevin Barnett #define PQI_AIO_STATUS_OVERRUN 0x75 6106c223761SKevin Barnett 6116c223761SKevin Barnett typedef u32 pqi_index_t; 6126c223761SKevin Barnett 6136c223761SKevin Barnett /* SOP data direction flags */ 6146c223761SKevin Barnett #define SOP_NO_DIRECTION_FLAG 0 6156c223761SKevin Barnett #define SOP_WRITE_FLAG 1 /* host writes data to Data-Out */ 6166c223761SKevin Barnett /* buffer */ 6176c223761SKevin Barnett #define SOP_READ_FLAG 2 /* host receives data from Data-In */ 6186c223761SKevin Barnett /* buffer */ 6196c223761SKevin Barnett #define SOP_BIDIRECTIONAL 3 /* data is transferred from the */ 6206c223761SKevin Barnett /* Data-Out buffer and data is */ 6216c223761SKevin Barnett /* transferred to the Data-In buffer */ 6226c223761SKevin Barnett 6236c223761SKevin Barnett #define SOP_TASK_ATTRIBUTE_SIMPLE 0 6246c223761SKevin Barnett #define SOP_TASK_ATTRIBUTE_HEAD_OF_QUEUE 1 6256c223761SKevin Barnett #define SOP_TASK_ATTRIBUTE_ORDERED 2 6266c223761SKevin Barnett #define SOP_TASK_ATTRIBUTE_ACA 4 6276c223761SKevin Barnett 628b17f0486SKevin Barnett #define SOP_TMF_COMPLETE 0x0 6293406384bSMahesh Rajashekhara #define SOP_TMF_REJECTED 0x4 630b17f0486SKevin Barnett #define SOP_TMF_FUNCTION_SUCCEEDED 0x8 6316c223761SKevin Barnett 6326c223761SKevin Barnett /* additional CDB bytes usage field codes */ 6336c223761SKevin Barnett #define SOP_ADDITIONAL_CDB_BYTES_0 0 /* 16-byte CDB */ 6346c223761SKevin Barnett #define SOP_ADDITIONAL_CDB_BYTES_4 1 /* 20-byte CDB */ 6356c223761SKevin Barnett #define SOP_ADDITIONAL_CDB_BYTES_8 2 /* 24-byte CDB */ 6366c223761SKevin Barnett #define SOP_ADDITIONAL_CDB_BYTES_12 3 /* 28-byte CDB */ 6376c223761SKevin Barnett #define SOP_ADDITIONAL_CDB_BYTES_16 4 /* 32-byte CDB */ 6386c223761SKevin Barnett 6396c223761SKevin Barnett /* 6406c223761SKevin Barnett * The purpose of this structure is to obtain proper alignment of objects in 6416c223761SKevin Barnett * an admin queue pair. 6426c223761SKevin Barnett */ 6436c223761SKevin Barnett struct pqi_admin_queues_aligned { 6446c223761SKevin Barnett __aligned(PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT) 6456c223761SKevin Barnett u8 iq_element_array[PQI_ADMIN_IQ_ELEMENT_LENGTH] 6466c223761SKevin Barnett [PQI_ADMIN_IQ_NUM_ELEMENTS]; 6476c223761SKevin Barnett __aligned(PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT) 6486c223761SKevin Barnett u8 oq_element_array[PQI_ADMIN_OQ_ELEMENT_LENGTH] 6496c223761SKevin Barnett [PQI_ADMIN_OQ_NUM_ELEMENTS]; 6506c223761SKevin Barnett __aligned(PQI_ADMIN_INDEX_ALIGNMENT) pqi_index_t iq_ci; 6516c223761SKevin Barnett __aligned(PQI_ADMIN_INDEX_ALIGNMENT) pqi_index_t oq_pi; 6526c223761SKevin Barnett }; 6536c223761SKevin Barnett 6546c223761SKevin Barnett struct pqi_admin_queues { 6556c223761SKevin Barnett void *iq_element_array; 6566c223761SKevin Barnett void *oq_element_array; 657dac12fbcSKevin Barnett pqi_index_t *iq_ci; 658dac12fbcSKevin Barnett pqi_index_t __iomem *oq_pi; 6596c223761SKevin Barnett dma_addr_t iq_element_array_bus_addr; 6606c223761SKevin Barnett dma_addr_t oq_element_array_bus_addr; 6616c223761SKevin Barnett dma_addr_t iq_ci_bus_addr; 6626c223761SKevin Barnett dma_addr_t oq_pi_bus_addr; 6636c223761SKevin Barnett __le32 __iomem *iq_pi; 6646c223761SKevin Barnett pqi_index_t iq_pi_copy; 6656c223761SKevin Barnett __le32 __iomem *oq_ci; 6666c223761SKevin Barnett pqi_index_t oq_ci_copy; 6676c223761SKevin Barnett struct task_struct *task; 6686c223761SKevin Barnett u16 int_msg_num; 6696c223761SKevin Barnett }; 6706c223761SKevin Barnett 6716c223761SKevin Barnett struct pqi_queue_group { 6726c223761SKevin Barnett struct pqi_ctrl_info *ctrl_info; /* backpointer */ 6736c223761SKevin Barnett u16 iq_id[2]; 6746c223761SKevin Barnett u16 oq_id; 6756c223761SKevin Barnett u16 int_msg_num; 6766c223761SKevin Barnett void *iq_element_array[2]; 6776c223761SKevin Barnett void *oq_element_array; 6786c223761SKevin Barnett dma_addr_t iq_element_array_bus_addr[2]; 6796c223761SKevin Barnett dma_addr_t oq_element_array_bus_addr; 6806c223761SKevin Barnett __le32 __iomem *iq_pi[2]; 6816c223761SKevin Barnett pqi_index_t iq_pi_copy[2]; 682dac12fbcSKevin Barnett pqi_index_t __iomem *iq_ci[2]; 683dac12fbcSKevin Barnett pqi_index_t __iomem *oq_pi; 6846c223761SKevin Barnett dma_addr_t iq_ci_bus_addr[2]; 6856c223761SKevin Barnett dma_addr_t oq_pi_bus_addr; 6866c223761SKevin Barnett __le32 __iomem *oq_ci; 6876c223761SKevin Barnett pqi_index_t oq_ci_copy; 6886c223761SKevin Barnett spinlock_t submit_lock[2]; /* protect submission queue */ 6896c223761SKevin Barnett struct list_head request_list[2]; 6906c223761SKevin Barnett }; 6916c223761SKevin Barnett 6926c223761SKevin Barnett struct pqi_event_queue { 6936c223761SKevin Barnett u16 oq_id; 6946c223761SKevin Barnett u16 int_msg_num; 6956c223761SKevin Barnett void *oq_element_array; 696dac12fbcSKevin Barnett pqi_index_t __iomem *oq_pi; 6976c223761SKevin Barnett dma_addr_t oq_element_array_bus_addr; 6986c223761SKevin Barnett dma_addr_t oq_pi_bus_addr; 6996c223761SKevin Barnett __le32 __iomem *oq_ci; 7006c223761SKevin Barnett pqi_index_t oq_ci_copy; 7016c223761SKevin Barnett }; 7026c223761SKevin Barnett 7036c223761SKevin Barnett #define PQI_DEFAULT_QUEUE_GROUP 0 7046c223761SKevin Barnett #define PQI_MAX_QUEUE_GROUPS PQI_MAX_MSIX_VECTORS 7056c223761SKevin Barnett 7066c223761SKevin Barnett struct pqi_encryption_info { 7076c223761SKevin Barnett u16 data_encryption_key_index; 7086c223761SKevin Barnett u32 encrypt_tweak_lower; 7096c223761SKevin Barnett u32 encrypt_tweak_upper; 7106c223761SKevin Barnett }; 7116c223761SKevin Barnett 71298f87667SKevin Barnett #pragma pack(1) 71398f87667SKevin Barnett 71498f87667SKevin Barnett #define PQI_CONFIG_TABLE_SIGNATURE "CFGTABLE" 71598f87667SKevin Barnett #define PQI_CONFIG_TABLE_MAX_LENGTH ((u16)~0) 71698f87667SKevin Barnett 71798f87667SKevin Barnett /* configuration table section IDs */ 718b212c251SKevin Barnett #define PQI_CONFIG_TABLE_ALL_SECTIONS (-1) 71998f87667SKevin Barnett #define PQI_CONFIG_TABLE_SECTION_GENERAL_INFO 0 72098f87667SKevin Barnett #define PQI_CONFIG_TABLE_SECTION_FIRMWARE_FEATURES 1 72198f87667SKevin Barnett #define PQI_CONFIG_TABLE_SECTION_FIRMWARE_ERRATA 2 72298f87667SKevin Barnett #define PQI_CONFIG_TABLE_SECTION_DEBUG 3 72398f87667SKevin Barnett #define PQI_CONFIG_TABLE_SECTION_HEARTBEAT 4 7244fd22c13SMahesh Rajashekhara #define PQI_CONFIG_TABLE_SECTION_SOFT_RESET 5 72598f87667SKevin Barnett 72698f87667SKevin Barnett struct pqi_config_table { 72798f87667SKevin Barnett u8 signature[8]; /* "CFGTABLE" */ 72898f87667SKevin Barnett __le32 first_section_offset; /* offset in bytes from the base */ 72998f87667SKevin Barnett /* address of this table to the */ 73098f87667SKevin Barnett /* first section */ 73198f87667SKevin Barnett }; 73298f87667SKevin Barnett 73398f87667SKevin Barnett struct pqi_config_table_section_header { 73498f87667SKevin Barnett __le16 section_id; /* as defined by the */ 73598f87667SKevin Barnett /* PQI_CONFIG_TABLE_SECTION_* */ 73698f87667SKevin Barnett /* manifest constants above */ 73798f87667SKevin Barnett __le16 next_section_offset; /* offset in bytes from base */ 73898f87667SKevin Barnett /* address of the table of the */ 73998f87667SKevin Barnett /* next section or 0 if last entry */ 74098f87667SKevin Barnett }; 74198f87667SKevin Barnett 74298f87667SKevin Barnett struct pqi_config_table_general_info { 74398f87667SKevin Barnett struct pqi_config_table_section_header header; 74498f87667SKevin Barnett __le32 section_length; /* size of this section in bytes */ 74598f87667SKevin Barnett /* including the section header */ 74698f87667SKevin Barnett __le32 max_outstanding_requests; /* max. outstanding */ 74798f87667SKevin Barnett /* commands supported by */ 74898f87667SKevin Barnett /* the controller */ 74998f87667SKevin Barnett __le32 max_sg_size; /* max. transfer size of a single */ 75098f87667SKevin Barnett /* command */ 75198f87667SKevin Barnett __le32 max_sg_per_request; /* max. number of scatter-gather */ 75298f87667SKevin Barnett /* entries supported in a single */ 75398f87667SKevin Barnett /* command */ 75498f87667SKevin Barnett }; 75598f87667SKevin Barnett 756b212c251SKevin Barnett struct pqi_config_table_firmware_features { 757b212c251SKevin Barnett struct pqi_config_table_section_header header; 758b212c251SKevin Barnett __le16 num_elements; 759b212c251SKevin Barnett u8 features_supported[]; 760b212c251SKevin Barnett /* u8 features_requested_by_host[]; */ 761b212c251SKevin Barnett /* u8 features_enabled[]; */ 762b212c251SKevin Barnett }; 763b212c251SKevin Barnett 764b212c251SKevin Barnett #define PQI_FIRMWARE_FEATURE_OFA 0 765b212c251SKevin Barnett #define PQI_FIRMWARE_FEATURE_SMP 1 7664fd22c13SMahesh Rajashekhara #define PQI_FIRMWARE_FEATURE_SOFT_RESET_HANDSHAKE 11 76721432010Skoshyaji #define PQI_FIRMWARE_FEATURE_RAID_IU_TIMEOUT 13 768*c2922f17SMurthy Bhat #define PQI_FIRMWARE_FEATURE_TMF_IU_TIMEOUT 14 769b212c251SKevin Barnett 77098f87667SKevin Barnett struct pqi_config_table_debug { 77198f87667SKevin Barnett struct pqi_config_table_section_header header; 77298f87667SKevin Barnett __le32 scratchpad; 77398f87667SKevin Barnett }; 77498f87667SKevin Barnett 77598f87667SKevin Barnett struct pqi_config_table_heartbeat { 77698f87667SKevin Barnett struct pqi_config_table_section_header header; 77798f87667SKevin Barnett __le32 heartbeat_counter; 77898f87667SKevin Barnett }; 77998f87667SKevin Barnett 7804fd22c13SMahesh Rajashekhara struct pqi_config_table_soft_reset { 7814fd22c13SMahesh Rajashekhara struct pqi_config_table_section_header header; 7824fd22c13SMahesh Rajashekhara u8 soft_reset_status; 7834fd22c13SMahesh Rajashekhara }; 7844fd22c13SMahesh Rajashekhara 7854fd22c13SMahesh Rajashekhara #define PQI_SOFT_RESET_INITIATE 0x1 7864fd22c13SMahesh Rajashekhara #define PQI_SOFT_RESET_ABORT 0x2 7874fd22c13SMahesh Rajashekhara 7884fd22c13SMahesh Rajashekhara enum pqi_soft_reset_status { 7894fd22c13SMahesh Rajashekhara RESET_INITIATE_FIRMWARE, 7904fd22c13SMahesh Rajashekhara RESET_INITIATE_DRIVER, 7914fd22c13SMahesh Rajashekhara RESET_ABORT, 7924fd22c13SMahesh Rajashekhara RESET_NORESPONSE, 7934fd22c13SMahesh Rajashekhara RESET_TIMEDOUT 7944fd22c13SMahesh Rajashekhara }; 7954fd22c13SMahesh Rajashekhara 796336b6819SKevin Barnett union pqi_reset_register { 797336b6819SKevin Barnett struct { 798336b6819SKevin Barnett u32 reset_type : 3; 799336b6819SKevin Barnett u32 reserved : 2; 800336b6819SKevin Barnett u32 reset_action : 3; 801336b6819SKevin Barnett u32 hold_in_pd1 : 1; 802336b6819SKevin Barnett u32 reserved2 : 23; 803336b6819SKevin Barnett } bits; 804336b6819SKevin Barnett u32 all_bits; 805336b6819SKevin Barnett }; 806336b6819SKevin Barnett 807336b6819SKevin Barnett #define PQI_RESET_ACTION_RESET 0x1 808336b6819SKevin Barnett 809336b6819SKevin Barnett #define PQI_RESET_TYPE_NO_RESET 0x0 810336b6819SKevin Barnett #define PQI_RESET_TYPE_SOFT_RESET 0x1 811336b6819SKevin Barnett #define PQI_RESET_TYPE_FIRM_RESET 0x2 812336b6819SKevin Barnett #define PQI_RESET_TYPE_HARD_RESET 0x3 813336b6819SKevin Barnett 814336b6819SKevin Barnett #define PQI_RESET_ACTION_COMPLETED 0x2 815336b6819SKevin Barnett 816336b6819SKevin Barnett #define PQI_RESET_POLL_INTERVAL_MSECS 100 817336b6819SKevin Barnett 8186c223761SKevin Barnett #define PQI_MAX_OUTSTANDING_REQUESTS ((u32)~0) 819d727a776SKevin Barnett #define PQI_MAX_OUTSTANDING_REQUESTS_KDUMP 32 820eeee4107SYadan Fan #define PQI_MAX_TRANSFER_SIZE (1024U * 1024U) 821d727a776SKevin Barnett #define PQI_MAX_TRANSFER_SIZE_KDUMP (512 * 1024U) 8226c223761SKevin Barnett 8236c223761SKevin Barnett #define RAID_MAP_MAX_ENTRIES 1024 8246c223761SKevin Barnett 8256c223761SKevin Barnett #define PQI_PHYSICAL_DEVICE_BUS 0 8266c223761SKevin Barnett #define PQI_RAID_VOLUME_BUS 1 8276c223761SKevin Barnett #define PQI_HBA_BUS 2 828bd10cf0bSKevin Barnett #define PQI_EXTERNAL_RAID_VOLUME_BUS 3 829bd10cf0bSKevin Barnett #define PQI_MAX_BUS PQI_EXTERNAL_RAID_VOLUME_BUS 830522bc026SDave Carroll #define PQI_VSEP_CISS_BTL 379 8316c223761SKevin Barnett 8326c223761SKevin Barnett struct report_lun_header { 8336c223761SKevin Barnett __be32 list_length; 8346c223761SKevin Barnett u8 extended_response; 8356c223761SKevin Barnett u8 reserved[3]; 8366c223761SKevin Barnett }; 8376c223761SKevin Barnett 8386c223761SKevin Barnett struct report_log_lun_extended_entry { 8396c223761SKevin Barnett u8 lunid[8]; 8406c223761SKevin Barnett u8 volume_id[16]; 8416c223761SKevin Barnett }; 8426c223761SKevin Barnett 8436c223761SKevin Barnett struct report_log_lun_extended { 8446c223761SKevin Barnett struct report_lun_header header; 8456c223761SKevin Barnett struct report_log_lun_extended_entry lun_entries[1]; 8466c223761SKevin Barnett }; 8476c223761SKevin Barnett 8486c223761SKevin Barnett struct report_phys_lun_extended_entry { 8496c223761SKevin Barnett u8 lunid[8]; 8506c223761SKevin Barnett __be64 wwid; 8516c223761SKevin Barnett u8 device_type; 8526c223761SKevin Barnett u8 device_flags; 8536c223761SKevin Barnett u8 lun_count; /* number of LUNs in a multi-LUN device */ 8546c223761SKevin Barnett u8 redundant_paths; 8556c223761SKevin Barnett u32 aio_handle; 8566c223761SKevin Barnett }; 8576c223761SKevin Barnett 8586c223761SKevin Barnett /* for device_flags field of struct report_phys_lun_extended_entry */ 8596c223761SKevin Barnett #define REPORT_PHYS_LUN_DEV_FLAG_AIO_ENABLED 0x8 8606c223761SKevin Barnett 8616c223761SKevin Barnett struct report_phys_lun_extended { 8626c223761SKevin Barnett struct report_lun_header header; 8636c223761SKevin Barnett struct report_phys_lun_extended_entry lun_entries[1]; 8646c223761SKevin Barnett }; 8656c223761SKevin Barnett 8666c223761SKevin Barnett struct raid_map_disk_data { 8676c223761SKevin Barnett u32 aio_handle; 8686c223761SKevin Barnett u8 xor_mult[2]; 8696c223761SKevin Barnett u8 reserved[2]; 8706c223761SKevin Barnett }; 8716c223761SKevin Barnett 8726c223761SKevin Barnett /* constants for flags field of RAID map */ 8736c223761SKevin Barnett #define RAID_MAP_ENCRYPTION_ENABLED 0x1 8746c223761SKevin Barnett 8756c223761SKevin Barnett struct raid_map { 8766c223761SKevin Barnett __le32 structure_size; /* size of entire structure in bytes */ 8776c223761SKevin Barnett __le32 volume_blk_size; /* bytes / block in the volume */ 8786c223761SKevin Barnett __le64 volume_blk_cnt; /* logical blocks on the volume */ 8796c223761SKevin Barnett u8 phys_blk_shift; /* shift factor to convert between */ 8806c223761SKevin Barnett /* units of logical blocks and */ 8816c223761SKevin Barnett /* physical disk blocks */ 8826c223761SKevin Barnett u8 parity_rotation_shift; /* shift factor to convert between */ 8836c223761SKevin Barnett /* units of logical stripes and */ 8846c223761SKevin Barnett /* physical stripes */ 8856c223761SKevin Barnett __le16 strip_size; /* blocks used on each disk / stripe */ 8866c223761SKevin Barnett __le64 disk_starting_blk; /* first disk block used in volume */ 8876c223761SKevin Barnett __le64 disk_blk_cnt; /* disk blocks used by volume / disk */ 8886c223761SKevin Barnett __le16 data_disks_per_row; /* data disk entries / row in the map */ 8896c223761SKevin Barnett __le16 metadata_disks_per_row; /* mirror/parity disk entries / row */ 8906c223761SKevin Barnett /* in the map */ 8916c223761SKevin Barnett __le16 row_cnt; /* rows in each layout map */ 8926c223761SKevin Barnett __le16 layout_map_count; /* layout maps (1 map per */ 8936c223761SKevin Barnett /* mirror parity group) */ 8946c223761SKevin Barnett __le16 flags; 8956c223761SKevin Barnett __le16 data_encryption_key_index; 8966c223761SKevin Barnett u8 reserved[16]; 8976c223761SKevin Barnett struct raid_map_disk_data disk_data[RAID_MAP_MAX_ENTRIES]; 8986c223761SKevin Barnett }; 8996c223761SKevin Barnett 9006c223761SKevin Barnett #pragma pack() 9016c223761SKevin Barnett 9026c223761SKevin Barnett #define RAID_CTLR_LUNID "\0\0\0\0\0\0\0\0" 9036c223761SKevin Barnett 9046c223761SKevin Barnett struct pqi_scsi_dev { 9056c223761SKevin Barnett int devtype; /* as reported by INQUIRY commmand */ 9066c223761SKevin Barnett u8 device_type; /* as reported by */ 9076c223761SKevin Barnett /* BMIC_IDENTIFY_PHYSICAL_DEVICE */ 9086c223761SKevin Barnett /* only valid for devtype = TYPE_DISK */ 9096c223761SKevin Barnett int bus; 9106c223761SKevin Barnett int target; 9116c223761SKevin Barnett int lun; 9126c223761SKevin Barnett u8 scsi3addr[8]; 9136c223761SKevin Barnett __be64 wwid; 9146c223761SKevin Barnett u8 volume_id[16]; 915cd128244SDave Carroll u8 unique_id[16]; 9166c223761SKevin Barnett u8 is_physical_device : 1; 917bd10cf0bSKevin Barnett u8 is_external_raid_device : 1; 9183d46a59aSDon Brace u8 is_expander_smp_device : 1; 9196c223761SKevin Barnett u8 target_lun_valid : 1; 9206c223761SKevin Barnett u8 device_gone : 1; 9216c223761SKevin Barnett u8 new_device : 1; 9226c223761SKevin Barnett u8 keep_device : 1; 9236c223761SKevin Barnett u8 volume_offline : 1; 924376fb880SKevin Barnett bool aio_enabled; /* only valid for physical disks */ 9257561a7e4SKevin Barnett bool in_reset; 9261e46731eSMahesh Rajashekhara bool in_remove; 9277561a7e4SKevin Barnett bool device_offline; 9286c223761SKevin Barnett u8 vendor[8]; /* bytes 8-15 of inquiry data */ 9296c223761SKevin Barnett u8 model[16]; /* bytes 16-31 of inquiry data */ 9306c223761SKevin Barnett u64 sas_address; 9316c223761SKevin Barnett u8 raid_level; 9326c223761SKevin Barnett u16 queue_depth; /* max. queue_depth for this device */ 9336c223761SKevin Barnett u16 advertised_queue_depth; 9346c223761SKevin Barnett u32 aio_handle; 9356c223761SKevin Barnett u8 volume_status; 9366c223761SKevin Barnett u8 active_path_index; 9376c223761SKevin Barnett u8 path_map; 9386c223761SKevin Barnett u8 bay; 9392d2ad4bcSGilbert Wu u8 box_index; 9402d2ad4bcSGilbert Wu u8 phys_box_on_bus; 9412d2ad4bcSGilbert Wu u8 phy_connected_dev_type; 9426c223761SKevin Barnett u8 box[8]; 9436c223761SKevin Barnett u16 phys_connector[8]; 944588a63feSKevin Barnett bool raid_bypass_configured; /* RAID bypass configured */ 945588a63feSKevin Barnett bool raid_bypass_enabled; /* RAID bypass enabled */ 946588a63feSKevin Barnett int offload_to_mirror; /* Send next RAID bypass request */ 947588a63feSKevin Barnett /* to mirror drive. */ 948588a63feSKevin Barnett struct raid_map *raid_map; /* RAID bypass map */ 9496c223761SKevin Barnett 9506c223761SKevin Barnett struct pqi_sas_port *sas_port; 9516c223761SKevin Barnett struct scsi_device *sdev; 9526c223761SKevin Barnett 9536c223761SKevin Barnett struct list_head scsi_device_list_entry; 9546c223761SKevin Barnett struct list_head new_device_list_entry; 9556c223761SKevin Barnett struct list_head add_list_entry; 9566c223761SKevin Barnett struct list_head delete_list_entry; 9577561a7e4SKevin Barnett 9587561a7e4SKevin Barnett atomic_t scsi_cmds_outstanding; 9596c223761SKevin Barnett }; 9606c223761SKevin Barnett 9616c223761SKevin Barnett /* VPD inquiry pages */ 9626c223761SKevin Barnett #define SCSI_VPD_SUPPORTED_PAGES 0x0 /* standard page */ 9636c223761SKevin Barnett #define SCSI_VPD_DEVICE_ID 0x83 /* standard page */ 9646c223761SKevin Barnett #define CISS_VPD_LV_DEVICE_GEOMETRY 0xc1 /* vendor-specific page */ 965588a63feSKevin Barnett #define CISS_VPD_LV_BYPASS_STATUS 0xc2 /* vendor-specific page */ 9666c223761SKevin Barnett #define CISS_VPD_LV_STATUS 0xc3 /* vendor-specific page */ 967cd128244SDave Carroll #define SCSI_VPD_HEADER_SZ 4 968cd128244SDave Carroll #define SCSI_VPD_DEVICE_ID_IDX 8 /* Index of page id in page */ 9696c223761SKevin Barnett 9706c223761SKevin Barnett #define VPD_PAGE (1 << 8) 9716c223761SKevin Barnett 9726c223761SKevin Barnett #pragma pack(1) 9736c223761SKevin Barnett 9746c223761SKevin Barnett /* structure for CISS_VPD_LV_STATUS */ 9756c223761SKevin Barnett struct ciss_vpd_logical_volume_status { 9766c223761SKevin Barnett u8 peripheral_info; 9776c223761SKevin Barnett u8 page_code; 9786c223761SKevin Barnett u8 reserved; 9796c223761SKevin Barnett u8 page_length; 9806c223761SKevin Barnett u8 volume_status; 9816c223761SKevin Barnett u8 reserved2[3]; 9826c223761SKevin Barnett __be32 flags; 9836c223761SKevin Barnett }; 9846c223761SKevin Barnett 9856c223761SKevin Barnett #pragma pack() 9866c223761SKevin Barnett 9876c223761SKevin Barnett /* constants for volume_status field of ciss_vpd_logical_volume_status */ 9886c223761SKevin Barnett #define CISS_LV_OK 0 9896c223761SKevin Barnett #define CISS_LV_FAILED 1 9906c223761SKevin Barnett #define CISS_LV_NOT_CONFIGURED 2 9916c223761SKevin Barnett #define CISS_LV_DEGRADED 3 9926c223761SKevin Barnett #define CISS_LV_READY_FOR_RECOVERY 4 9936c223761SKevin Barnett #define CISS_LV_UNDERGOING_RECOVERY 5 9946c223761SKevin Barnett #define CISS_LV_WRONG_PHYSICAL_DRIVE_REPLACED 6 9956c223761SKevin Barnett #define CISS_LV_PHYSICAL_DRIVE_CONNECTION_PROBLEM 7 9966c223761SKevin Barnett #define CISS_LV_HARDWARE_OVERHEATING 8 9976c223761SKevin Barnett #define CISS_LV_HARDWARE_HAS_OVERHEATED 9 9986c223761SKevin Barnett #define CISS_LV_UNDERGOING_EXPANSION 10 9996c223761SKevin Barnett #define CISS_LV_NOT_AVAILABLE 11 10006c223761SKevin Barnett #define CISS_LV_QUEUED_FOR_EXPANSION 12 10016c223761SKevin Barnett #define CISS_LV_DISABLED_SCSI_ID_CONFLICT 13 10026c223761SKevin Barnett #define CISS_LV_EJECTED 14 10036c223761SKevin Barnett #define CISS_LV_UNDERGOING_ERASE 15 10046c223761SKevin Barnett /* state 16 not used */ 10056c223761SKevin Barnett #define CISS_LV_READY_FOR_PREDICTIVE_SPARE_REBUILD 17 10066c223761SKevin Barnett #define CISS_LV_UNDERGOING_RPI 18 10076c223761SKevin Barnett #define CISS_LV_PENDING_RPI 19 10086c223761SKevin Barnett #define CISS_LV_ENCRYPTED_NO_KEY 20 10096c223761SKevin Barnett /* state 21 not used */ 10106c223761SKevin Barnett #define CISS_LV_UNDERGOING_ENCRYPTION 22 10116c223761SKevin Barnett #define CISS_LV_UNDERGOING_ENCRYPTION_REKEYING 23 10126c223761SKevin Barnett #define CISS_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER 24 10136c223761SKevin Barnett #define CISS_LV_PENDING_ENCRYPTION 25 10146c223761SKevin Barnett #define CISS_LV_PENDING_ENCRYPTION_REKEYING 26 10156c223761SKevin Barnett #define CISS_LV_NOT_SUPPORTED 27 10166c223761SKevin Barnett #define CISS_LV_STATUS_UNAVAILABLE 255 10176c223761SKevin Barnett 10186c223761SKevin Barnett /* constants for flags field of ciss_vpd_logical_volume_status */ 10196c223761SKevin Barnett #define CISS_LV_FLAGS_NO_HOST_IO 0x1 /* volume not available for */ 10206c223761SKevin Barnett /* host I/O */ 10216c223761SKevin Barnett 10226c223761SKevin Barnett /* for SAS hosts and SAS expanders */ 10236c223761SKevin Barnett struct pqi_sas_node { 10246c223761SKevin Barnett struct device *parent_dev; 10256c223761SKevin Barnett struct list_head port_list_head; 10266c223761SKevin Barnett }; 10276c223761SKevin Barnett 10286c223761SKevin Barnett struct pqi_sas_port { 10296c223761SKevin Barnett struct list_head port_list_entry; 10306c223761SKevin Barnett u64 sas_address; 10313d46a59aSDon Brace struct pqi_scsi_dev *device; 10326c223761SKevin Barnett struct sas_port *port; 10336c223761SKevin Barnett int next_phy_index; 10346c223761SKevin Barnett struct list_head phy_list_head; 10356c223761SKevin Barnett struct pqi_sas_node *parent_node; 10366c223761SKevin Barnett struct sas_rphy *rphy; 10376c223761SKevin Barnett }; 10386c223761SKevin Barnett 10396c223761SKevin Barnett struct pqi_sas_phy { 10406c223761SKevin Barnett struct list_head phy_list_entry; 10416c223761SKevin Barnett struct sas_phy *phy; 10426c223761SKevin Barnett struct pqi_sas_port *parent_port; 10436c223761SKevin Barnett bool added_to_port; 10446c223761SKevin Barnett }; 10456c223761SKevin Barnett 10466c223761SKevin Barnett struct pqi_io_request { 10476c223761SKevin Barnett atomic_t refcount; 10486c223761SKevin Barnett u16 index; 10496c223761SKevin Barnett void (*io_complete_callback)(struct pqi_io_request *io_request, 10506c223761SKevin Barnett void *context); 10516c223761SKevin Barnett void *context; 1052376fb880SKevin Barnett u8 raid_bypass : 1; 10536c223761SKevin Barnett int status; 1054376fb880SKevin Barnett struct pqi_queue_group *queue_group; 10556c223761SKevin Barnett struct scsi_cmnd *scmd; 10566c223761SKevin Barnett void *error_info; 10576c223761SKevin Barnett struct pqi_sg_descriptor *sg_chain_buffer; 10586c223761SKevin Barnett dma_addr_t sg_chain_buffer_dma_handle; 10596c223761SKevin Barnett void *iu; 10606c223761SKevin Barnett struct list_head request_list_entry; 10616c223761SKevin Barnett }; 10626c223761SKevin Barnett 10634fd22c13SMahesh Rajashekhara #define PQI_NUM_SUPPORTED_EVENTS 7 10646c223761SKevin Barnett 10656c223761SKevin Barnett struct pqi_event { 10666c223761SKevin Barnett bool pending; 10676c223761SKevin Barnett u8 event_type; 10686c223761SKevin Barnett __le16 event_id; 10696c223761SKevin Barnett __le32 additional_event_id; 10704fd22c13SMahesh Rajashekhara __le32 ofa_bytes_requested; 10714fd22c13SMahesh Rajashekhara __le16 ofa_cancel_reason; 10726c223761SKevin Barnett }; 10736c223761SKevin Barnett 10745e6429dfSKevin Barnett #define PQI_RESERVED_IO_SLOTS_LUN_RESET 1 10755e6429dfSKevin Barnett #define PQI_RESERVED_IO_SLOTS_EVENT_ACK PQI_NUM_SUPPORTED_EVENTS 10765e6429dfSKevin Barnett #define PQI_RESERVED_IO_SLOTS_SYNCHRONOUS_REQUESTS 3 10775e6429dfSKevin Barnett #define PQI_RESERVED_IO_SLOTS \ 10785e6429dfSKevin Barnett (PQI_RESERVED_IO_SLOTS_LUN_RESET + PQI_RESERVED_IO_SLOTS_EVENT_ACK + \ 10795e6429dfSKevin Barnett PQI_RESERVED_IO_SLOTS_SYNCHRONOUS_REQUESTS) 10805e6429dfSKevin Barnett 10816c223761SKevin Barnett struct pqi_ctrl_info { 10826c223761SKevin Barnett unsigned int ctrl_id; 10836c223761SKevin Barnett struct pci_dev *pci_dev; 10846c223761SKevin Barnett char firmware_version[11]; 10856d90615fSMurthy Bhat char serial_number[17]; 10866d90615fSMurthy Bhat char model[17]; 10876d90615fSMurthy Bhat char vendor[9]; 10886c223761SKevin Barnett void __iomem *iomem_base; 10896c223761SKevin Barnett struct pqi_ctrl_registers __iomem *registers; 10906c223761SKevin Barnett struct pqi_device_registers __iomem *pqi_registers; 10916c223761SKevin Barnett u32 max_sg_entries; 10926c223761SKevin Barnett u32 config_table_offset; 10936c223761SKevin Barnett u32 config_table_length; 10946c223761SKevin Barnett u16 max_inbound_queues; 10956c223761SKevin Barnett u16 max_elements_per_iq; 10966c223761SKevin Barnett u16 max_iq_element_length; 10976c223761SKevin Barnett u16 max_outbound_queues; 10986c223761SKevin Barnett u16 max_elements_per_oq; 10996c223761SKevin Barnett u16 max_oq_element_length; 11006c223761SKevin Barnett u32 max_transfer_size; 11016c223761SKevin Barnett u32 max_outstanding_requests; 11026c223761SKevin Barnett u32 max_io_slots; 11036c223761SKevin Barnett unsigned int scsi_ml_can_queue; 11046c223761SKevin Barnett unsigned short sg_tablesize; 11056c223761SKevin Barnett unsigned int max_sectors; 11066c223761SKevin Barnett u32 error_buffer_length; 11076c223761SKevin Barnett void *error_buffer; 11086c223761SKevin Barnett dma_addr_t error_buffer_dma_handle; 11096c223761SKevin Barnett size_t sg_chain_buffer_length; 11106c223761SKevin Barnett unsigned int num_queue_groups; 1111061ef06aSKevin Barnett u16 max_hw_queue_index; 11126c223761SKevin Barnett u16 num_elements_per_iq; 11136c223761SKevin Barnett u16 num_elements_per_oq; 11146c223761SKevin Barnett u16 max_inbound_iu_length_per_firmware; 11156c223761SKevin Barnett u16 max_inbound_iu_length; 11166c223761SKevin Barnett unsigned int max_sg_per_iu; 11176c223761SKevin Barnett void *admin_queue_memory_base; 11186c223761SKevin Barnett u32 admin_queue_memory_length; 11196c223761SKevin Barnett dma_addr_t admin_queue_memory_base_dma_handle; 11206c223761SKevin Barnett void *queue_memory_base; 11216c223761SKevin Barnett u32 queue_memory_length; 11226c223761SKevin Barnett dma_addr_t queue_memory_base_dma_handle; 11236c223761SKevin Barnett struct pqi_admin_queues admin_queues; 11246c223761SKevin Barnett struct pqi_queue_group queue_groups[PQI_MAX_QUEUE_GROUPS]; 11256c223761SKevin Barnett struct pqi_event_queue event_queue; 1126061ef06aSKevin Barnett enum pqi_irq_mode irq_mode; 11276c223761SKevin Barnett int max_msix_vectors; 11286c223761SKevin Barnett int num_msix_vectors_enabled; 11296c223761SKevin Barnett int num_msix_vectors_initialized; 11306c223761SKevin Barnett int event_irq; 11316c223761SKevin Barnett struct Scsi_Host *scsi_host; 11326c223761SKevin Barnett 11336c223761SKevin Barnett struct mutex scan_mutex; 11347561a7e4SKevin Barnett struct mutex lun_reset_mutex; 11354fd22c13SMahesh Rajashekhara struct mutex ofa_mutex; /* serialize ofa */ 11367561a7e4SKevin Barnett bool controller_online; 11377561a7e4SKevin Barnett bool block_requests; 11380530736eSKevin Barnett bool block_device_reset; 11394fd22c13SMahesh Rajashekhara bool in_ofa; 11400530736eSKevin Barnett bool in_shutdown; 11416c223761SKevin Barnett u8 inbound_spanning_supported : 1; 11426c223761SKevin Barnett u8 outbound_spanning_supported : 1; 11436c223761SKevin Barnett u8 pqi_mode_enabled : 1; 1144336b6819SKevin Barnett u8 pqi_reset_quiesce_supported : 1; 11454fd22c13SMahesh Rajashekhara u8 soft_reset_handshake_supported : 1; 114621432010Skoshyaji u8 raid_iu_timeout_supported: 1; 1147*c2922f17SMurthy Bhat u8 tmf_iu_timeout_supported: 1; 11486c223761SKevin Barnett 11496c223761SKevin Barnett struct list_head scsi_device_list; 11506c223761SKevin Barnett spinlock_t scsi_device_list_lock; 11516c223761SKevin Barnett 11526c223761SKevin Barnett struct delayed_work rescan_work; 11536c223761SKevin Barnett struct delayed_work update_time_work; 11546c223761SKevin Barnett 11556c223761SKevin Barnett struct pqi_sas_node *sas_host; 11566c223761SKevin Barnett u64 sas_address; 11576c223761SKevin Barnett 11586c223761SKevin Barnett struct pqi_io_request *io_request_pool; 11596c223761SKevin Barnett u16 next_io_request_slot; 11606c223761SKevin Barnett 11616a50d6adSKevin Barnett struct pqi_event events[PQI_NUM_SUPPORTED_EVENTS]; 11626c223761SKevin Barnett struct work_struct event_work; 11636c223761SKevin Barnett 11646c223761SKevin Barnett atomic_t num_interrupts; 11656c223761SKevin Barnett int previous_num_interrupts; 116698f87667SKevin Barnett u32 previous_heartbeat_count; 116798f87667SKevin Barnett __le32 __iomem *heartbeat_counter; 11684fd22c13SMahesh Rajashekhara u8 __iomem *soft_reset_status; 11696c223761SKevin Barnett struct timer_list heartbeat_timer; 11705f310425SKevin Barnett struct work_struct ctrl_offline_work; 11716c223761SKevin Barnett 11726c223761SKevin Barnett struct semaphore sync_request_sem; 11737561a7e4SKevin Barnett atomic_t num_busy_threads; 11747561a7e4SKevin Barnett atomic_t num_blocked_threads; 11757561a7e4SKevin Barnett wait_queue_head_t block_requests_wait; 1176376fb880SKevin Barnett 1177376fb880SKevin Barnett struct list_head raid_bypass_retry_list; 1178376fb880SKevin Barnett spinlock_t raid_bypass_retry_list_lock; 1179376fb880SKevin Barnett struct work_struct raid_bypass_retry_work; 11804fd22c13SMahesh Rajashekhara 11814fd22c13SMahesh Rajashekhara struct pqi_ofa_memory *pqi_ofa_mem_virt_addr; 11824fd22c13SMahesh Rajashekhara dma_addr_t pqi_ofa_mem_dma_handle; 11834fd22c13SMahesh Rajashekhara void **pqi_ofa_chunk_virt_addr; 11840530736eSKevin Barnett atomic_t sync_cmds_outstanding; 11856c223761SKevin Barnett }; 11866c223761SKevin Barnett 1187ff6abb73SKevin Barnett enum pqi_ctrl_mode { 1188162d7753SKevin Barnett SIS_MODE = 0, 1189ff6abb73SKevin Barnett PQI_MODE 1190ff6abb73SKevin Barnett }; 1191ff6abb73SKevin Barnett 11926c223761SKevin Barnett /* 11936c223761SKevin Barnett * assume worst case: SATA queue depth of 31 minus 4 internal firmware commands 11946c223761SKevin Barnett */ 11956c223761SKevin Barnett #define PQI_PHYSICAL_DISK_DEFAULT_MAX_QUEUE_DEPTH 27 11966c223761SKevin Barnett 11976c223761SKevin Barnett /* CISS commands */ 11986c223761SKevin Barnett #define CISS_READ 0xc0 11996c223761SKevin Barnett #define CISS_REPORT_LOG 0xc2 /* Report Logical LUNs */ 12006c223761SKevin Barnett #define CISS_REPORT_PHYS 0xc3 /* Report Physical LUNs */ 12016c223761SKevin Barnett #define CISS_GET_RAID_MAP 0xc8 12026c223761SKevin Barnett 12036c223761SKevin Barnett /* constants for CISS_REPORT_LOG/CISS_REPORT_PHYS commands */ 12046c223761SKevin Barnett #define CISS_REPORT_LOG_EXTENDED 0x1 12056c223761SKevin Barnett #define CISS_REPORT_PHYS_EXTENDED 0x2 12066c223761SKevin Barnett 12076c223761SKevin Barnett /* BMIC commands */ 12086c223761SKevin Barnett #define BMIC_IDENTIFY_CONTROLLER 0x11 12096c223761SKevin Barnett #define BMIC_IDENTIFY_PHYSICAL_DEVICE 0x15 12106c223761SKevin Barnett #define BMIC_READ 0x26 12116c223761SKevin Barnett #define BMIC_WRITE 0x27 12126c223761SKevin Barnett #define BMIC_SENSE_CONTROLLER_PARAMETERS 0x64 12136c223761SKevin Barnett #define BMIC_SENSE_SUBSYSTEM_INFORMATION 0x66 12143d46a59aSDon Brace #define BMIC_CSMI_PASSTHRU 0x68 12156c223761SKevin Barnett #define BMIC_WRITE_HOST_WELLNESS 0xa5 121658322fe0SKevin Barnett #define BMIC_FLUSH_CACHE 0xc2 1217171c2865SDave Carroll #define BMIC_SET_DIAG_OPTIONS 0xf4 1218171c2865SDave Carroll #define BMIC_SENSE_DIAG_OPTIONS 0xf5 12196c223761SKevin Barnett 12203d46a59aSDon Brace #define CSMI_CC_SAS_SMP_PASSTHRU 0X17 12213d46a59aSDon Brace 122258322fe0SKevin Barnett #define SA_FLUSH_CACHE 0x1 12236c223761SKevin Barnett 12246c223761SKevin Barnett #define MASKED_DEVICE(lunid) ((lunid)[3] & 0xc0) 1225bd10cf0bSKevin Barnett #define CISS_GET_LEVEL_2_BUS(lunid) ((lunid)[7] & 0x3f) 12266c223761SKevin Barnett #define CISS_GET_LEVEL_2_TARGET(lunid) ((lunid)[6]) 12276c223761SKevin Barnett #define CISS_GET_DRIVE_NUMBER(lunid) \ 1228bd10cf0bSKevin Barnett (((CISS_GET_LEVEL_2_BUS((lunid)) - 1) << 8) + \ 12296c223761SKevin Barnett CISS_GET_LEVEL_2_TARGET((lunid))) 12306c223761SKevin Barnett 12316c223761SKevin Barnett #define NO_TIMEOUT ((unsigned long) -1) 12326c223761SKevin Barnett 12336c223761SKevin Barnett #pragma pack(1) 12346c223761SKevin Barnett 12356c223761SKevin Barnett struct bmic_identify_controller { 12366c223761SKevin Barnett u8 configured_logical_drive_count; 12376c223761SKevin Barnett __le32 configuration_signature; 12386c223761SKevin Barnett u8 firmware_version[4]; 12396c223761SKevin Barnett u8 reserved[145]; 12406c223761SKevin Barnett __le16 extended_logical_unit_count; 12416c223761SKevin Barnett u8 reserved1[34]; 12426c223761SKevin Barnett __le16 firmware_build_number; 12436d90615fSMurthy Bhat u8 reserved2[8]; 12446d90615fSMurthy Bhat u8 vendor_id[8]; 12456d90615fSMurthy Bhat u8 product_id[16]; 12466d90615fSMurthy Bhat u8 reserved3[68]; 12476c223761SKevin Barnett u8 controller_mode; 12486d90615fSMurthy Bhat u8 reserved4[32]; 12496d90615fSMurthy Bhat }; 12506d90615fSMurthy Bhat 12516d90615fSMurthy Bhat struct bmic_sense_subsystem_info { 12526d90615fSMurthy Bhat u8 reserved[44]; 12536d90615fSMurthy Bhat u8 ctrl_serial_number[16]; 12546c223761SKevin Barnett }; 12556c223761SKevin Barnett 12563d46a59aSDon Brace #define SA_EXPANDER_SMP_DEVICE 0x05 12572d2ad4bcSGilbert Wu #define SA_CONTROLLER_DEVICE 0x07 12583d46a59aSDon Brace /*SCSI Invalid Device Type for SAS devices*/ 12593d46a59aSDon Brace #define PQI_SAS_SCSI_INVALID_DEVTYPE 0xff 12603d46a59aSDon Brace 12616c223761SKevin Barnett struct bmic_identify_physical_device { 12626c223761SKevin Barnett u8 scsi_bus; /* SCSI Bus number on controller */ 12636c223761SKevin Barnett u8 scsi_id; /* SCSI ID on this bus */ 12646c223761SKevin Barnett __le16 block_size; /* sector size in bytes */ 12656c223761SKevin Barnett __le32 total_blocks; /* number for sectors on drive */ 12666c223761SKevin Barnett __le32 reserved_blocks; /* controller reserved (RIS) */ 12676c223761SKevin Barnett u8 model[40]; /* Physical Drive Model */ 12686c223761SKevin Barnett u8 serial_number[40]; /* Drive Serial Number */ 12696c223761SKevin Barnett u8 firmware_revision[8]; /* drive firmware revision */ 12706c223761SKevin Barnett u8 scsi_inquiry_bits; /* inquiry byte 7 bits */ 12716c223761SKevin Barnett u8 compaq_drive_stamp; /* 0 means drive not stamped */ 12726c223761SKevin Barnett u8 last_failure_reason; 12736c223761SKevin Barnett u8 flags; 12746c223761SKevin Barnett u8 more_flags; 12756c223761SKevin Barnett u8 scsi_lun; /* SCSI LUN for phys drive */ 12766c223761SKevin Barnett u8 yet_more_flags; 12776c223761SKevin Barnett u8 even_more_flags; 12786c223761SKevin Barnett __le32 spi_speed_rules; 12796c223761SKevin Barnett u8 phys_connector[2]; /* connector number on controller */ 12806c223761SKevin Barnett u8 phys_box_on_bus; /* phys enclosure this drive resides */ 12816c223761SKevin Barnett u8 phys_bay_in_box; /* phys drv bay this drive resides */ 12826c223761SKevin Barnett __le32 rpm; /* drive rotational speed in RPM */ 12836c223761SKevin Barnett u8 device_type; /* type of drive */ 12846c223761SKevin Barnett u8 sata_version; /* only valid when device_type = */ 12856c223761SKevin Barnett /* BMIC_DEVICE_TYPE_SATA */ 12866c223761SKevin Barnett __le64 big_total_block_count; 12876c223761SKevin Barnett __le64 ris_starting_lba; 12886c223761SKevin Barnett __le32 ris_size; 12896c223761SKevin Barnett u8 wwid[20]; 12906c223761SKevin Barnett u8 controller_phy_map[32]; 12916c223761SKevin Barnett __le16 phy_count; 12926c223761SKevin Barnett u8 phy_connected_dev_type[256]; 12936c223761SKevin Barnett u8 phy_to_drive_bay_num[256]; 12946c223761SKevin Barnett __le16 phy_to_attached_dev_index[256]; 12956c223761SKevin Barnett u8 box_index; 12966c223761SKevin Barnett u8 reserved; 12976c223761SKevin Barnett __le16 extra_physical_drive_flags; 12986c223761SKevin Barnett u8 negotiated_link_rate[256]; 12996c223761SKevin Barnett u8 phy_to_phy_map[256]; 13006c223761SKevin Barnett u8 redundant_path_present_map; 13016c223761SKevin Barnett u8 redundant_path_failure_map; 13026c223761SKevin Barnett u8 active_path_number; 13036c223761SKevin Barnett __le16 alternate_paths_phys_connector[8]; 13046c223761SKevin Barnett u8 alternate_paths_phys_box_on_port[8]; 13056c223761SKevin Barnett u8 multi_lun_device_lun_count; 13066c223761SKevin Barnett u8 minimum_good_fw_revision[8]; 13076c223761SKevin Barnett u8 unique_inquiry_bytes[20]; 13081be42f46SKevin Barnett u8 current_temperature_degrees; 13091be42f46SKevin Barnett u8 temperature_threshold_degrees; 13101be42f46SKevin Barnett u8 max_temperature_degrees; 13116c223761SKevin Barnett u8 logical_blocks_per_phys_block_exp; 13126c223761SKevin Barnett __le16 current_queue_depth_limit; 13136c223761SKevin Barnett u8 switch_name[10]; 13146c223761SKevin Barnett __le16 switch_port; 13156c223761SKevin Barnett u8 alternate_paths_switch_name[40]; 13166c223761SKevin Barnett u8 alternate_paths_switch_port[8]; 13176c223761SKevin Barnett __le16 power_on_hours; 13186c223761SKevin Barnett __le16 percent_endurance_used; 13196c223761SKevin Barnett u8 drive_authentication; 13206c223761SKevin Barnett u8 smart_carrier_authentication; 13216c223761SKevin Barnett u8 smart_carrier_app_fw_version; 13226c223761SKevin Barnett u8 smart_carrier_bootloader_fw_version; 13231be42f46SKevin Barnett u8 sanitize_flags; 13241be42f46SKevin Barnett u8 encryption_key_flags; 13256c223761SKevin Barnett u8 encryption_key_name[64]; 13266c223761SKevin Barnett __le32 misc_drive_flags; 13276c223761SKevin Barnett __le16 dek_index; 13281be42f46SKevin Barnett __le16 hba_drive_encryption_flags; 13291be42f46SKevin Barnett __le16 max_overwrite_time; 13301be42f46SKevin Barnett __le16 max_block_erase_time; 13311be42f46SKevin Barnett __le16 max_crypto_erase_time; 13321be42f46SKevin Barnett u8 connector_info[5]; 13331be42f46SKevin Barnett u8 connector_name[8][8]; 13341be42f46SKevin Barnett u8 page_83_identifier[16]; 13351be42f46SKevin Barnett u8 maximum_link_rate[256]; 13361be42f46SKevin Barnett u8 negotiated_physical_link_rate[256]; 13371be42f46SKevin Barnett u8 box_connector_name[8]; 13381be42f46SKevin Barnett u8 padding_to_multiple_of_512[9]; 13396c223761SKevin Barnett }; 13406c223761SKevin Barnett 13413d46a59aSDon Brace struct bmic_smp_request { 13423d46a59aSDon Brace u8 frame_type; 13433d46a59aSDon Brace u8 function; 13443d46a59aSDon Brace u8 allocated_response_length; 13453d46a59aSDon Brace u8 request_length; 13463d46a59aSDon Brace u8 additional_request_bytes[1016]; 13473d46a59aSDon Brace }; 13483d46a59aSDon Brace 13493d46a59aSDon Brace struct bmic_smp_response { 13503d46a59aSDon Brace u8 frame_type; 13513d46a59aSDon Brace u8 function; 13523d46a59aSDon Brace u8 function_result; 13533d46a59aSDon Brace u8 response_length; 13543d46a59aSDon Brace u8 additional_response_bytes[1016]; 13553d46a59aSDon Brace }; 13563d46a59aSDon Brace 13573d46a59aSDon Brace struct bmic_csmi_ioctl_header { 13583d46a59aSDon Brace __le32 header_length; 13593d46a59aSDon Brace u8 signature[8]; 13603d46a59aSDon Brace __le32 timeout; 13613d46a59aSDon Brace __le32 control_code; 13623d46a59aSDon Brace __le32 return_code; 13633d46a59aSDon Brace __le32 length; 13643d46a59aSDon Brace }; 13653d46a59aSDon Brace 13663d46a59aSDon Brace struct bmic_csmi_smp_passthru { 13673d46a59aSDon Brace u8 phy_identifier; 13683d46a59aSDon Brace u8 port_identifier; 13693d46a59aSDon Brace u8 connection_rate; 13703d46a59aSDon Brace u8 reserved; 13713d46a59aSDon Brace __be64 destination_sas_address; 13723d46a59aSDon Brace __le32 request_length; 13733d46a59aSDon Brace struct bmic_smp_request request; 13743d46a59aSDon Brace u8 connection_status; 13753d46a59aSDon Brace u8 reserved1[3]; 13763d46a59aSDon Brace __le32 response_length; 13773d46a59aSDon Brace struct bmic_smp_response response; 13783d46a59aSDon Brace }; 13793d46a59aSDon Brace 13803d46a59aSDon Brace struct bmic_csmi_smp_passthru_buffer { 13813d46a59aSDon Brace struct bmic_csmi_ioctl_header ioctl_header; 13823d46a59aSDon Brace struct bmic_csmi_smp_passthru parameters; 13833d46a59aSDon Brace }; 13843d46a59aSDon Brace 138558322fe0SKevin Barnett struct bmic_flush_cache { 138658322fe0SKevin Barnett u8 disable_flag; 138758322fe0SKevin Barnett u8 system_power_action; 138858322fe0SKevin Barnett u8 ndu_flush; 138958322fe0SKevin Barnett u8 shutdown_event; 139058322fe0SKevin Barnett u8 reserved[28]; 139158322fe0SKevin Barnett }; 139258322fe0SKevin Barnett 139358322fe0SKevin Barnett /* for shutdown_event member of struct bmic_flush_cache */ 139458322fe0SKevin Barnett enum bmic_flush_cache_shutdown_event { 139558322fe0SKevin Barnett NONE_CACHE_FLUSH_ONLY = 0, 139658322fe0SKevin Barnett SHUTDOWN = 1, 139758322fe0SKevin Barnett HIBERNATE = 2, 139858322fe0SKevin Barnett SUSPEND = 3, 139958322fe0SKevin Barnett RESTART = 4 140058322fe0SKevin Barnett }; 140158322fe0SKevin Barnett 1402171c2865SDave Carroll struct bmic_diag_options { 1403171c2865SDave Carroll __le32 options; 1404171c2865SDave Carroll }; 1405171c2865SDave Carroll 14066c223761SKevin Barnett #pragma pack() 14076c223761SKevin Barnett 14083d46a59aSDon Brace static inline struct pqi_ctrl_info *shost_to_hba(struct Scsi_Host *shost) 14093d46a59aSDon Brace { 14103d46a59aSDon Brace void *hostdata = shost_priv(shost); 14113d46a59aSDon Brace 14123d46a59aSDon Brace return *((struct pqi_ctrl_info **)hostdata); 14133d46a59aSDon Brace } 14143d46a59aSDon Brace 14153d46a59aSDon Brace static inline bool pqi_ctrl_offline(struct pqi_ctrl_info *ctrl_info) 14163d46a59aSDon Brace { 14173d46a59aSDon Brace return !ctrl_info->controller_online; 14183d46a59aSDon Brace } 14193d46a59aSDon Brace 14203d46a59aSDon Brace static inline void pqi_ctrl_busy(struct pqi_ctrl_info *ctrl_info) 14213d46a59aSDon Brace { 14223d46a59aSDon Brace atomic_inc(&ctrl_info->num_busy_threads); 14233d46a59aSDon Brace } 14243d46a59aSDon Brace 14253d46a59aSDon Brace static inline void pqi_ctrl_unbusy(struct pqi_ctrl_info *ctrl_info) 14263d46a59aSDon Brace { 14273d46a59aSDon Brace atomic_dec(&ctrl_info->num_busy_threads); 14283d46a59aSDon Brace } 14293d46a59aSDon Brace 14303d46a59aSDon Brace static inline bool pqi_ctrl_blocked(struct pqi_ctrl_info *ctrl_info) 14313d46a59aSDon Brace { 14323d46a59aSDon Brace return ctrl_info->block_requests; 14333d46a59aSDon Brace } 14343d46a59aSDon Brace 14350530736eSKevin Barnett static inline bool pqi_device_reset_blocked(struct pqi_ctrl_info *ctrl_info) 14360530736eSKevin Barnett { 14370530736eSKevin Barnett return ctrl_info->block_device_reset; 14380530736eSKevin Barnett } 14390530736eSKevin Barnett 14403d46a59aSDon Brace void pqi_sas_smp_handler(struct bsg_job *job, struct Scsi_Host *shost, 14413d46a59aSDon Brace struct sas_rphy *rphy); 14423d46a59aSDon Brace 14436c223761SKevin Barnett int pqi_add_sas_host(struct Scsi_Host *shost, struct pqi_ctrl_info *ctrl_info); 14446c223761SKevin Barnett void pqi_delete_sas_host(struct pqi_ctrl_info *ctrl_info); 14456c223761SKevin Barnett int pqi_add_sas_device(struct pqi_sas_node *pqi_sas_node, 14466c223761SKevin Barnett struct pqi_scsi_dev *device); 14476c223761SKevin Barnett void pqi_remove_sas_device(struct pqi_scsi_dev *device); 14486c223761SKevin Barnett struct pqi_scsi_dev *pqi_find_device_by_sas_rphy( 14496c223761SKevin Barnett struct pqi_ctrl_info *ctrl_info, struct sas_rphy *rphy); 14507561a7e4SKevin Barnett void pqi_prep_for_scsi_done(struct scsi_cmnd *scmd); 14513d46a59aSDon Brace int pqi_csmi_smp_passthru(struct pqi_ctrl_info *ctrl_info, 14523d46a59aSDon Brace struct bmic_csmi_smp_passthru_buffer *buffer, size_t buffer_length, 14533d46a59aSDon Brace struct pqi_raid_error_info *error_info); 14546c223761SKevin Barnett 14556c223761SKevin Barnett extern struct sas_function_template pqi_sas_transport_functions; 14566c223761SKevin Barnett 14576c223761SKevin Barnett #endif /* _SMARTPQI_H */ 1458