12cc37b15SDon Brace /* SPDX-License-Identifier: GPL-2.0 */ 26c223761SKevin Barnett /* 3889653ecSKevin Barnett * driver for Microchip PQI-based storage controllers 449fd52d4SDon Brace * Copyright (c) 2019-2023 Microchip Technology Inc. and its subsidiaries 52f4c4b92SDon Brace * Copyright (c) 2016-2018 Microsemi Corporation 66c223761SKevin Barnett * Copyright (c) 2016 PMC-Sierra, Inc. 76c223761SKevin Barnett * 82f4c4b92SDon Brace * Questions/Comments/Bugfixes to storagedev@microchip.com 96c223761SKevin Barnett * 106c223761SKevin Barnett */ 116c223761SKevin Barnett 12ebaec8e3SCorentin Labbe #include <linux/io-64-nonatomic-lo-hi.h> 13ebaec8e3SCorentin Labbe 146c223761SKevin Barnett #if !defined(_SMARTPQI_H) 156c223761SKevin Barnett #define _SMARTPQI_H 166c223761SKevin Barnett 173d46a59aSDon Brace #include <scsi/scsi_host.h> 183d46a59aSDon Brace #include <linux/bsg-lib.h> 193d46a59aSDon Brace 206c223761SKevin Barnett #pragma pack(1) 216c223761SKevin Barnett 226c223761SKevin Barnett #define PQI_DEVICE_SIGNATURE "PQI DREG" 236c223761SKevin Barnett 246c223761SKevin Barnett /* This structure is defined by the PQI specification. */ 256c223761SKevin Barnett struct pqi_device_registers { 266c223761SKevin Barnett __le64 signature; 276c223761SKevin Barnett u8 function_and_status_code; 286c223761SKevin Barnett u8 reserved[7]; 296c223761SKevin Barnett u8 max_admin_iq_elements; 306c223761SKevin Barnett u8 max_admin_oq_elements; 316c223761SKevin Barnett u8 admin_iq_element_length; /* in 16-byte units */ 326c223761SKevin Barnett u8 admin_oq_element_length; /* in 16-byte units */ 336c223761SKevin Barnett __le16 max_reset_timeout; /* in 100-millisecond units */ 346c223761SKevin Barnett u8 reserved1[2]; 356c223761SKevin Barnett __le32 legacy_intx_status; 366c223761SKevin Barnett __le32 legacy_intx_mask_set; 376c223761SKevin Barnett __le32 legacy_intx_mask_clear; 386c223761SKevin Barnett u8 reserved2[28]; 396c223761SKevin Barnett __le32 device_status; 406c223761SKevin Barnett u8 reserved3[4]; 416c223761SKevin Barnett __le64 admin_iq_pi_offset; 426c223761SKevin Barnett __le64 admin_oq_ci_offset; 436c223761SKevin Barnett __le64 admin_iq_element_array_addr; 446c223761SKevin Barnett __le64 admin_oq_element_array_addr; 456c223761SKevin Barnett __le64 admin_iq_ci_addr; 466c223761SKevin Barnett __le64 admin_oq_pi_addr; 476c223761SKevin Barnett u8 admin_iq_num_elements; 486c223761SKevin Barnett u8 admin_oq_num_elements; 496c223761SKevin Barnett __le16 admin_queue_int_msg_num; 506c223761SKevin Barnett u8 reserved4[4]; 516c223761SKevin Barnett __le32 device_error; 526c223761SKevin Barnett u8 reserved5[4]; 536c223761SKevin Barnett __le64 error_details; 546c223761SKevin Barnett __le32 device_reset; 556c223761SKevin Barnett __le32 power_action; 566c223761SKevin Barnett u8 reserved6[104]; 576c223761SKevin Barnett }; 586c223761SKevin Barnett 596c223761SKevin Barnett /* 606c223761SKevin Barnett * controller registers 616c223761SKevin Barnett * 62889653ecSKevin Barnett * These are defined by the Microchip implementation. 636c223761SKevin Barnett * 646c223761SKevin Barnett * Some registers (those named sis_*) are only used when in 656c223761SKevin Barnett * legacy SIS mode before we transition the controller into 666c223761SKevin Barnett * PQI mode. There are a number of other SIS mode registers, 676c223761SKevin Barnett * but we don't use them, so only the SIS registers that we 686c223761SKevin Barnett * care about are defined here. The offsets mentioned in the 696c223761SKevin Barnett * comments are the offsets from the PCIe BAR 0. 706c223761SKevin Barnett */ 716c223761SKevin Barnett struct pqi_ctrl_registers { 726c223761SKevin Barnett u8 reserved[0x20]; 736c223761SKevin Barnett __le32 sis_host_to_ctrl_doorbell; /* 20h */ 746c223761SKevin Barnett u8 reserved1[0x34 - (0x20 + sizeof(__le32))]; 756c223761SKevin Barnett __le32 sis_interrupt_mask; /* 34h */ 766c223761SKevin Barnett u8 reserved2[0x9c - (0x34 + sizeof(__le32))]; 776c223761SKevin Barnett __le32 sis_ctrl_to_host_doorbell; /* 9Ch */ 786c223761SKevin Barnett u8 reserved3[0xa0 - (0x9c + sizeof(__le32))]; 796c223761SKevin Barnett __le32 sis_ctrl_to_host_doorbell_clear; /* A0h */ 80ff6abb73SKevin Barnett u8 reserved4[0xb0 - (0xa0 + sizeof(__le32))]; 81ff6abb73SKevin Barnett __le32 sis_driver_scratch; /* B0h */ 822708a256SKevin Barnett __le32 sis_product_identifier; /* B4h */ 832708a256SKevin Barnett u8 reserved5[0xbc - (0xb4 + sizeof(__le32))]; 846c223761SKevin Barnett __le32 sis_firmware_status; /* BCh */ 855d1f03e6SMurthy Bhat u8 reserved6[0xcc - (0xbc + sizeof(__le32))]; 865d1f03e6SMurthy Bhat __le32 sis_ctrl_shutdown_reason_code; /* CCh */ 875d1f03e6SMurthy Bhat u8 reserved7[0x1000 - (0xcc + sizeof(__le32))]; 886c223761SKevin Barnett __le32 sis_mailbox[8]; /* 1000h */ 895d1f03e6SMurthy Bhat u8 reserved8[0x4000 - (0x1000 + (sizeof(__le32) * 8))]; 906c223761SKevin Barnett /* 916c223761SKevin Barnett * The PQI spec states that the PQI registers should be at 926c223761SKevin Barnett * offset 0 from the PCIe BAR 0. However, we can't map 936c223761SKevin Barnett * them at offset 0 because that would break compatibility 946c223761SKevin Barnett * with the SIS registers. So we map them at offset 4000h. 956c223761SKevin Barnett */ 966c223761SKevin Barnett struct pqi_device_registers pqi_registers; /* 4000h */ 976c223761SKevin Barnett }; 986c223761SKevin Barnett 996c223761SKevin Barnett #define PQI_DEVICE_REGISTERS_OFFSET 0x4000 1006c223761SKevin Barnett 1015d1f03e6SMurthy Bhat /* shutdown reasons for taking the controller offline */ 1025d1f03e6SMurthy Bhat enum pqi_ctrl_shutdown_reason { 1035d1f03e6SMurthy Bhat PQI_IQ_NOT_DRAINED_TIMEOUT = 1, 1045d1f03e6SMurthy Bhat PQI_LUN_RESET_TIMEOUT = 2, 1055d1f03e6SMurthy Bhat PQI_IO_PENDING_POST_LUN_RESET_TIMEOUT = 3, 1065d1f03e6SMurthy Bhat PQI_NO_HEARTBEAT = 4, 1075d1f03e6SMurthy Bhat PQI_FIRMWARE_KERNEL_NOT_UP = 5, 1085d1f03e6SMurthy Bhat PQI_OFA_RESPONSE_TIMEOUT = 6, 1095d1f03e6SMurthy Bhat PQI_INVALID_REQ_ID = 7, 1105d1f03e6SMurthy Bhat PQI_UNMATCHED_REQ_ID = 8, 1115d1f03e6SMurthy Bhat PQI_IO_PI_OUT_OF_RANGE = 9, 1125d1f03e6SMurthy Bhat PQI_EVENT_PI_OUT_OF_RANGE = 10, 1135d1f03e6SMurthy Bhat PQI_UNEXPECTED_IU_TYPE = 11 1145d1f03e6SMurthy Bhat }; 1155d1f03e6SMurthy Bhat 1166c223761SKevin Barnett enum pqi_io_path { 1176c223761SKevin Barnett RAID_PATH = 0, 1186c223761SKevin Barnett AIO_PATH = 1 1196c223761SKevin Barnett }; 1206c223761SKevin Barnett 121061ef06aSKevin Barnett enum pqi_irq_mode { 122061ef06aSKevin Barnett IRQ_MODE_NONE, 123061ef06aSKevin Barnett IRQ_MODE_INTX, 124061ef06aSKevin Barnett IRQ_MODE_MSIX 125061ef06aSKevin Barnett }; 126061ef06aSKevin Barnett 1276c223761SKevin Barnett struct pqi_sg_descriptor { 1286c223761SKevin Barnett __le64 address; 1296c223761SKevin Barnett __le32 length; 1306c223761SKevin Barnett __le32 flags; 1316c223761SKevin Barnett }; 1326c223761SKevin Barnett 1336c223761SKevin Barnett /* manifest constants for the flags field of pqi_sg_descriptor */ 1346c223761SKevin Barnett #define CISS_SG_LAST 0x40000000 1356c223761SKevin Barnett #define CISS_SG_CHAIN 0x80000000 1366c223761SKevin Barnett 1376c223761SKevin Barnett struct pqi_iu_header { 1386c223761SKevin Barnett u8 iu_type; 1396c223761SKevin Barnett u8 reserved; 1406c223761SKevin Barnett __le16 iu_length; /* in bytes - does not include the length */ 1416c223761SKevin Barnett /* of this header */ 1426c223761SKevin Barnett __le16 response_queue_id; /* specifies the OQ where the */ 1436c223761SKevin Barnett /* response IU is to be delivered */ 144ae0c189dSKevin Barnett u16 driver_flags; /* reserved for driver use */ 1456c223761SKevin Barnett }; 1466c223761SKevin Barnett 147ae0c189dSKevin Barnett /* manifest constants for pqi_iu_header.driver_flags */ 148ae0c189dSKevin Barnett #define PQI_DRIVER_NONBLOCKABLE_REQUEST 0x1 149ae0c189dSKevin Barnett 1506c223761SKevin Barnett /* 1516c223761SKevin Barnett * According to the PQI spec, the IU header is only the first 4 bytes of our 1526c223761SKevin Barnett * pqi_iu_header structure. 1536c223761SKevin Barnett */ 1546c223761SKevin Barnett #define PQI_REQUEST_HEADER_LENGTH 4 1556c223761SKevin Barnett 1566c223761SKevin Barnett struct pqi_general_admin_request { 1576c223761SKevin Barnett struct pqi_iu_header header; 1586c223761SKevin Barnett __le16 request_id; 1596c223761SKevin Barnett u8 function_code; 1606c223761SKevin Barnett union { 1616c223761SKevin Barnett struct { 1626c223761SKevin Barnett u8 reserved[33]; 1636c223761SKevin Barnett __le32 buffer_length; 1646c223761SKevin Barnett struct pqi_sg_descriptor sg_descriptor; 1656c223761SKevin Barnett } report_device_capability; 1666c223761SKevin Barnett 1676c223761SKevin Barnett struct { 1686c223761SKevin Barnett u8 reserved; 1696c223761SKevin Barnett __le16 queue_id; 1706c223761SKevin Barnett u8 reserved1[2]; 1716c223761SKevin Barnett __le64 element_array_addr; 1726c223761SKevin Barnett __le64 ci_addr; 1736c223761SKevin Barnett __le16 num_elements; 1746c223761SKevin Barnett __le16 element_length; 1756c223761SKevin Barnett u8 queue_protocol; 1766c223761SKevin Barnett u8 reserved2[23]; 1776c223761SKevin Barnett __le32 vendor_specific; 1786c223761SKevin Barnett } create_operational_iq; 1796c223761SKevin Barnett 1806c223761SKevin Barnett struct { 1816c223761SKevin Barnett u8 reserved; 1826c223761SKevin Barnett __le16 queue_id; 1836c223761SKevin Barnett u8 reserved1[2]; 1846c223761SKevin Barnett __le64 element_array_addr; 1856c223761SKevin Barnett __le64 pi_addr; 1866c223761SKevin Barnett __le16 num_elements; 1876c223761SKevin Barnett __le16 element_length; 1886c223761SKevin Barnett u8 queue_protocol; 1896c223761SKevin Barnett u8 reserved2[3]; 1906c223761SKevin Barnett __le16 int_msg_num; 1916c223761SKevin Barnett __le16 coalescing_count; 1926c223761SKevin Barnett __le32 min_coalescing_time; 1936c223761SKevin Barnett __le32 max_coalescing_time; 1946c223761SKevin Barnett u8 reserved3[8]; 1956c223761SKevin Barnett __le32 vendor_specific; 1966c223761SKevin Barnett } create_operational_oq; 1976c223761SKevin Barnett 1986c223761SKevin Barnett struct { 1996c223761SKevin Barnett u8 reserved; 2006c223761SKevin Barnett __le16 queue_id; 2016c223761SKevin Barnett u8 reserved1[50]; 2026c223761SKevin Barnett } delete_operational_queue; 2036c223761SKevin Barnett 2046c223761SKevin Barnett struct { 2056c223761SKevin Barnett u8 reserved; 2066c223761SKevin Barnett __le16 queue_id; 2076c223761SKevin Barnett u8 reserved1[46]; 2086c223761SKevin Barnett __le32 vendor_specific; 2096c223761SKevin Barnett } change_operational_iq_properties; 2106c223761SKevin Barnett 2116c223761SKevin Barnett } data; 2126c223761SKevin Barnett }; 2136c223761SKevin Barnett 2146c223761SKevin Barnett struct pqi_general_admin_response { 2156c223761SKevin Barnett struct pqi_iu_header header; 2166c223761SKevin Barnett __le16 request_id; 2176c223761SKevin Barnett u8 function_code; 2186c223761SKevin Barnett u8 status; 2196c223761SKevin Barnett union { 2206c223761SKevin Barnett struct { 2216c223761SKevin Barnett u8 status_descriptor[4]; 2226c223761SKevin Barnett __le64 iq_pi_offset; 2236c223761SKevin Barnett u8 reserved[40]; 2246c223761SKevin Barnett } create_operational_iq; 2256c223761SKevin Barnett 2266c223761SKevin Barnett struct { 2276c223761SKevin Barnett u8 status_descriptor[4]; 2286c223761SKevin Barnett __le64 oq_ci_offset; 2296c223761SKevin Barnett u8 reserved[40]; 2306c223761SKevin Barnett } create_operational_oq; 2316c223761SKevin Barnett } data; 2326c223761SKevin Barnett }; 2336c223761SKevin Barnett 2346c223761SKevin Barnett struct pqi_iu_layer_descriptor { 2356c223761SKevin Barnett u8 inbound_spanning_supported : 1; 2366c223761SKevin Barnett u8 reserved : 7; 2376c223761SKevin Barnett u8 reserved1[5]; 2386c223761SKevin Barnett __le16 max_inbound_iu_length; 2396c223761SKevin Barnett u8 outbound_spanning_supported : 1; 2406c223761SKevin Barnett u8 reserved2 : 7; 2416c223761SKevin Barnett u8 reserved3[5]; 2426c223761SKevin Barnett __le16 max_outbound_iu_length; 2436c223761SKevin Barnett }; 2446c223761SKevin Barnett 2456c223761SKevin Barnett struct pqi_device_capability { 2466c223761SKevin Barnett __le16 data_length; 2476c223761SKevin Barnett u8 reserved[6]; 2486c223761SKevin Barnett u8 iq_arbitration_priority_support_bitmask; 2496c223761SKevin Barnett u8 maximum_aw_a; 2506c223761SKevin Barnett u8 maximum_aw_b; 2516c223761SKevin Barnett u8 maximum_aw_c; 2526c223761SKevin Barnett u8 max_arbitration_burst : 3; 2536c223761SKevin Barnett u8 reserved1 : 4; 2546c223761SKevin Barnett u8 iqa : 1; 2556c223761SKevin Barnett u8 reserved2[2]; 2566c223761SKevin Barnett u8 iq_freeze : 1; 2576c223761SKevin Barnett u8 reserved3 : 7; 2586c223761SKevin Barnett __le16 max_inbound_queues; 2596c223761SKevin Barnett __le16 max_elements_per_iq; 2606c223761SKevin Barnett u8 reserved4[4]; 2616c223761SKevin Barnett __le16 max_iq_element_length; 2626c223761SKevin Barnett __le16 min_iq_element_length; 2636c223761SKevin Barnett u8 reserved5[2]; 2646c223761SKevin Barnett __le16 max_outbound_queues; 2656c223761SKevin Barnett __le16 max_elements_per_oq; 2666c223761SKevin Barnett __le16 intr_coalescing_time_granularity; 2676c223761SKevin Barnett __le16 max_oq_element_length; 2686c223761SKevin Barnett __le16 min_oq_element_length; 2696c223761SKevin Barnett u8 reserved6[24]; 2706c223761SKevin Barnett struct pqi_iu_layer_descriptor iu_layer_descriptors[32]; 2716c223761SKevin Barnett }; 2726c223761SKevin Barnett 2736c223761SKevin Barnett #define PQI_MAX_EMBEDDED_SG_DESCRIPTORS 4 2746702d2c4SDon Brace #define PQI_MAX_EMBEDDED_R56_SG_DESCRIPTORS 3 2756c223761SKevin Barnett 2766c223761SKevin Barnett struct pqi_raid_path_request { 2776c223761SKevin Barnett struct pqi_iu_header header; 2786c223761SKevin Barnett __le16 request_id; 2796c223761SKevin Barnett __le16 nexus_id; 2806c223761SKevin Barnett __le32 buffer_length; 2816c223761SKevin Barnett u8 lun_number[8]; 2826c223761SKevin Barnett __le16 protocol_specific; 2836c223761SKevin Barnett u8 data_direction : 2; 2846c223761SKevin Barnett u8 partial : 1; 2856c223761SKevin Barnett u8 reserved1 : 4; 2866c223761SKevin Barnett u8 fence : 1; 2876c223761SKevin Barnett __le16 error_index; 2886c223761SKevin Barnett u8 reserved2; 2896c223761SKevin Barnett u8 task_attribute : 3; 2906c223761SKevin Barnett u8 command_priority : 4; 2916c223761SKevin Barnett u8 reserved3 : 1; 2926c223761SKevin Barnett u8 reserved4 : 2; 2936c223761SKevin Barnett u8 additional_cdb_bytes_usage : 3; 2946c223761SKevin Barnett u8 reserved5 : 3; 29521432010Skoshyaji u8 cdb[16]; 296904f2bfdSKumar Meiyappan u8 reserved6[11]; 297904f2bfdSKumar Meiyappan u8 ml_device_lun_number; 29821432010Skoshyaji __le32 timeout; 299583891c9SKevin Barnett struct pqi_sg_descriptor sg_descriptors[PQI_MAX_EMBEDDED_SG_DESCRIPTORS]; 3006c223761SKevin Barnett }; 3016c223761SKevin Barnett 3026c223761SKevin Barnett struct pqi_aio_path_request { 3036c223761SKevin Barnett struct pqi_iu_header header; 3046c223761SKevin Barnett __le16 request_id; 3056c223761SKevin Barnett u8 reserved1[2]; 3066c223761SKevin Barnett __le32 nexus_id; 3076c223761SKevin Barnett __le32 buffer_length; 3086c223761SKevin Barnett u8 data_direction : 2; 3096c223761SKevin Barnett u8 partial : 1; 3106c223761SKevin Barnett u8 memory_type : 1; 3116c223761SKevin Barnett u8 fence : 1; 3126c223761SKevin Barnett u8 encryption_enable : 1; 3136c223761SKevin Barnett u8 reserved2 : 2; 3146c223761SKevin Barnett u8 task_attribute : 3; 3156c223761SKevin Barnett u8 command_priority : 4; 3166c223761SKevin Barnett u8 reserved3 : 1; 3176c223761SKevin Barnett __le16 data_encryption_key_index; 3186c223761SKevin Barnett __le32 encrypt_tweak_lower; 3196c223761SKevin Barnett __le32 encrypt_tweak_upper; 3206c223761SKevin Barnett u8 cdb[16]; 3216c223761SKevin Barnett __le16 error_index; 3226c223761SKevin Barnett u8 num_sg_descriptors; 3236c223761SKevin Barnett u8 cdb_length; 3246c223761SKevin Barnett u8 lun_number[8]; 3256c223761SKevin Barnett u8 reserved4[4]; 326583891c9SKevin Barnett struct pqi_sg_descriptor sg_descriptors[PQI_MAX_EMBEDDED_SG_DESCRIPTORS]; 3276c223761SKevin Barnett }; 3286c223761SKevin Barnett 3297a012c23SDon Brace #define PQI_RAID1_NVME_XFER_LIMIT (32 * 1024) /* 32 KiB */ 330583891c9SKevin Barnett 3317a012c23SDon Brace struct pqi_aio_r1_path_request { 3327a012c23SDon Brace struct pqi_iu_header header; 3337a012c23SDon Brace __le16 request_id; 3347a012c23SDon Brace __le16 volume_id; /* ID of the RAID volume */ 3357a012c23SDon Brace __le32 it_nexus_1; /* IT nexus of the 1st drive in the RAID volume */ 3367a012c23SDon Brace __le32 it_nexus_2; /* IT nexus of the 2nd drive in the RAID volume */ 3377a012c23SDon Brace __le32 it_nexus_3; /* IT nexus of the 3rd drive in the RAID volume */ 3387a012c23SDon Brace __le32 data_length; /* total bytes to read/write */ 3397a012c23SDon Brace u8 data_direction : 2; 3407a012c23SDon Brace u8 partial : 1; 3417a012c23SDon Brace u8 memory_type : 1; 3427a012c23SDon Brace u8 fence : 1; 3437a012c23SDon Brace u8 encryption_enable : 1; 3447a012c23SDon Brace u8 reserved : 2; 3457a012c23SDon Brace u8 task_attribute : 3; 3467a012c23SDon Brace u8 command_priority : 4; 3477a012c23SDon Brace u8 reserved2 : 1; 3487a012c23SDon Brace __le16 data_encryption_key_index; 3497a012c23SDon Brace u8 cdb[16]; 3507a012c23SDon Brace __le16 error_index; 3517a012c23SDon Brace u8 num_sg_descriptors; 3527a012c23SDon Brace u8 cdb_length; 3537a012c23SDon Brace u8 num_drives; /* number of drives in the RAID volume (2 or 3) */ 3547a012c23SDon Brace u8 reserved3[3]; 3557a012c23SDon Brace __le32 encrypt_tweak_lower; 3567a012c23SDon Brace __le32 encrypt_tweak_upper; 3577a012c23SDon Brace struct pqi_sg_descriptor sg_descriptors[PQI_MAX_EMBEDDED_SG_DESCRIPTORS]; 3587a012c23SDon Brace }; 3597a012c23SDon Brace 360f6cc2a77SKevin Barnett #define PQI_DEFAULT_MAX_WRITE_RAID_5_6 (8 * 1024U) 361f6cc2a77SKevin Barnett #define PQI_DEFAULT_MAX_TRANSFER_ENCRYPTED_SAS_SATA (~0U) 362f6cc2a77SKevin Barnett #define PQI_DEFAULT_MAX_TRANSFER_ENCRYPTED_NVME (32 * 1024U) 363f6cc2a77SKevin Barnett 3646702d2c4SDon Brace struct pqi_aio_r56_path_request { 3656702d2c4SDon Brace struct pqi_iu_header header; 3666702d2c4SDon Brace __le16 request_id; 3676702d2c4SDon Brace __le16 volume_id; /* ID of the RAID volume */ 3686702d2c4SDon Brace __le32 data_it_nexus; /* IT nexus for the data drive */ 3696702d2c4SDon Brace __le32 p_parity_it_nexus; /* IT nexus for the P parity drive */ 3706702d2c4SDon Brace __le32 q_parity_it_nexus; /* IT nexus for the Q parity drive */ 3716702d2c4SDon Brace __le32 data_length; /* total bytes to read/write */ 3726702d2c4SDon Brace u8 data_direction : 2; 3736702d2c4SDon Brace u8 partial : 1; 3746702d2c4SDon Brace u8 mem_type : 1; /* 0 = PCIe, 1 = DDR */ 3756702d2c4SDon Brace u8 fence : 1; 3766702d2c4SDon Brace u8 encryption_enable : 1; 3776702d2c4SDon Brace u8 reserved : 2; 3786702d2c4SDon Brace u8 task_attribute : 3; 3796702d2c4SDon Brace u8 command_priority : 4; 3806702d2c4SDon Brace u8 reserved1 : 1; 3816702d2c4SDon Brace __le16 data_encryption_key_index; 3826702d2c4SDon Brace u8 cdb[16]; 3836702d2c4SDon Brace __le16 error_index; 3846702d2c4SDon Brace u8 num_sg_descriptors; 3856702d2c4SDon Brace u8 cdb_length; 3866702d2c4SDon Brace u8 xor_multiplier; 3876702d2c4SDon Brace u8 reserved2[3]; 3886702d2c4SDon Brace __le32 encrypt_tweak_lower; 3896702d2c4SDon Brace __le32 encrypt_tweak_upper; 3906702d2c4SDon Brace __le64 row; /* row = logical LBA/blocks per row */ 3916702d2c4SDon Brace u8 reserved3[8]; 3926702d2c4SDon Brace struct pqi_sg_descriptor sg_descriptors[PQI_MAX_EMBEDDED_R56_SG_DESCRIPTORS]; 3936702d2c4SDon Brace }; 3946702d2c4SDon Brace 3956c223761SKevin Barnett struct pqi_io_response { 3966c223761SKevin Barnett struct pqi_iu_header header; 3976c223761SKevin Barnett __le16 request_id; 3986c223761SKevin Barnett __le16 error_index; 3996c223761SKevin Barnett u8 reserved2[4]; 4006c223761SKevin Barnett }; 4016c223761SKevin Barnett 4026c223761SKevin Barnett struct pqi_general_management_request { 4036c223761SKevin Barnett struct pqi_iu_header header; 4046c223761SKevin Barnett __le16 request_id; 4056c223761SKevin Barnett union { 4066c223761SKevin Barnett struct { 4076c223761SKevin Barnett u8 reserved[2]; 4086c223761SKevin Barnett __le32 buffer_length; 4096c223761SKevin Barnett struct pqi_sg_descriptor sg_descriptors[3]; 4106c223761SKevin Barnett } report_event_configuration; 4116c223761SKevin Barnett 4126c223761SKevin Barnett struct { 4136c223761SKevin Barnett __le16 global_event_oq_id; 4146c223761SKevin Barnett __le32 buffer_length; 4156c223761SKevin Barnett struct pqi_sg_descriptor sg_descriptors[3]; 4166c223761SKevin Barnett } set_event_configuration; 4176c223761SKevin Barnett } data; 4186c223761SKevin Barnett }; 4196c223761SKevin Barnett 4206c223761SKevin Barnett struct pqi_event_descriptor { 4216c223761SKevin Barnett u8 event_type; 4226c223761SKevin Barnett u8 reserved; 4236c223761SKevin Barnett __le16 oq_id; 4246c223761SKevin Barnett }; 4256c223761SKevin Barnett 4266c223761SKevin Barnett struct pqi_event_config { 4276c223761SKevin Barnett u8 reserved[2]; 4286c223761SKevin Barnett u8 num_event_descriptors; 4296c223761SKevin Barnett u8 reserved1; 4305f492a7aSGustavo A. R. Silva struct pqi_event_descriptor descriptors[]; 4316c223761SKevin Barnett }; 4326c223761SKevin Barnett 4336c223761SKevin Barnett #define PQI_MAX_EVENT_DESCRIPTORS 255 4346c223761SKevin Barnett 4354fd22c13SMahesh Rajashekhara #define PQI_EVENT_OFA_MEMORY_ALLOCATION 0x0 4364fd22c13SMahesh Rajashekhara #define PQI_EVENT_OFA_QUIESCE 0x1 437583891c9SKevin Barnett #define PQI_EVENT_OFA_CANCELED 0x2 4384fd22c13SMahesh Rajashekhara 4396c223761SKevin Barnett struct pqi_event_response { 4406c223761SKevin Barnett struct pqi_iu_header header; 4416c223761SKevin Barnett u8 event_type; 4426c223761SKevin Barnett u8 reserved2 : 7; 4439e68ccccSKevin Barnett u8 request_acknowledge : 1; 4446c223761SKevin Barnett __le16 event_id; 4456c223761SKevin Barnett __le32 additional_event_id; 4464fd22c13SMahesh Rajashekhara union { 4474fd22c13SMahesh Rajashekhara struct { 4484fd22c13SMahesh Rajashekhara __le32 bytes_requested; 4494fd22c13SMahesh Rajashekhara u8 reserved[12]; 4504fd22c13SMahesh Rajashekhara } ofa_memory_allocation; 4514fd22c13SMahesh Rajashekhara 4524fd22c13SMahesh Rajashekhara struct { 4534fd22c13SMahesh Rajashekhara __le16 reason; /* reason for cancellation */ 4544fd22c13SMahesh Rajashekhara u8 reserved[14]; 4554fd22c13SMahesh Rajashekhara } ofa_cancelled; 4564fd22c13SMahesh Rajashekhara } data; 4576c223761SKevin Barnett }; 4586c223761SKevin Barnett 4596c223761SKevin Barnett struct pqi_event_acknowledge_request { 4606c223761SKevin Barnett struct pqi_iu_header header; 4616c223761SKevin Barnett u8 event_type; 4626c223761SKevin Barnett u8 reserved2; 4636c223761SKevin Barnett __le16 event_id; 4646c223761SKevin Barnett __le32 additional_event_id; 4656c223761SKevin Barnett }; 4666c223761SKevin Barnett 4676c223761SKevin Barnett struct pqi_task_management_request { 4686c223761SKevin Barnett struct pqi_iu_header header; 4696c223761SKevin Barnett __le16 request_id; 4706c223761SKevin Barnett __le16 nexus_id; 471904f2bfdSKumar Meiyappan u8 reserved; 472904f2bfdSKumar Meiyappan u8 ml_device_lun_number; 473c2922f17SMurthy Bhat __le16 timeout; 4746c223761SKevin Barnett u8 lun_number[8]; 4756c223761SKevin Barnett __le16 protocol_specific; 4766c223761SKevin Barnett __le16 outbound_queue_id_to_manage; 4776c223761SKevin Barnett __le16 request_id_to_manage; 4786c223761SKevin Barnett u8 task_management_function; 4796c223761SKevin Barnett u8 reserved2 : 7; 4806c223761SKevin Barnett u8 fence : 1; 4816c223761SKevin Barnett }; 4826c223761SKevin Barnett 4836c223761SKevin Barnett #define SOP_TASK_MANAGEMENT_LUN_RESET 0x8 4846c223761SKevin Barnett 4856c223761SKevin Barnett struct pqi_task_management_response { 4866c223761SKevin Barnett struct pqi_iu_header header; 4876c223761SKevin Barnett __le16 request_id; 4886c223761SKevin Barnett __le16 nexus_id; 4896c223761SKevin Barnett u8 additional_response_info[3]; 4906c223761SKevin Barnett u8 response_code; 4916c223761SKevin Barnett }; 4926c223761SKevin Barnett 493b212c251SKevin Barnett struct pqi_vendor_general_request { 494b212c251SKevin Barnett struct pqi_iu_header header; 495b212c251SKevin Barnett __le16 request_id; 496b212c251SKevin Barnett __le16 function_code; 497b212c251SKevin Barnett union { 498b212c251SKevin Barnett struct { 499b212c251SKevin Barnett __le16 first_section; 500b212c251SKevin Barnett __le16 last_section; 501b212c251SKevin Barnett u8 reserved[48]; 502b212c251SKevin Barnett } config_table_update; 503b212c251SKevin Barnett 504b212c251SKevin Barnett struct { 505b212c251SKevin Barnett __le64 buffer_address; 506b212c251SKevin Barnett __le32 buffer_length; 507b212c251SKevin Barnett u8 reserved[40]; 508058311b7SMurthy Bhat } host_memory_allocation; 509b212c251SKevin Barnett } data; 510b212c251SKevin Barnett }; 511b212c251SKevin Barnett 512b212c251SKevin Barnett struct pqi_vendor_general_response { 513b212c251SKevin Barnett struct pqi_iu_header header; 514b212c251SKevin Barnett __le16 request_id; 515b212c251SKevin Barnett __le16 function_code; 516b212c251SKevin Barnett __le16 status; 517b212c251SKevin Barnett u8 reserved[2]; 518b212c251SKevin Barnett }; 519b212c251SKevin Barnett 520b212c251SKevin Barnett #define PQI_VENDOR_GENERAL_CONFIG_TABLE_UPDATE 0 521058311b7SMurthy Bhat #define PQI_VENDOR_GENERAL_OFA_MEMORY_UPDATE 1 522058311b7SMurthy Bhat #define PQI_VENDOR_GENERAL_CTRL_LOG_MEMORY_UPDATE 2 5234fd22c13SMahesh Rajashekhara 5244fd22c13SMahesh Rajashekhara #define PQI_OFA_VERSION 1 5254fd22c13SMahesh Rajashekhara #define PQI_OFA_SIGNATURE "OFA_QRM" 526058311b7SMurthy Bhat #define PQI_CTRL_LOG_VERSION 1 527058311b7SMurthy Bhat #define PQI_CTRL_LOG_SIGNATURE "FW_DATA" 528058311b7SMurthy Bhat #define PQI_HOST_MAX_SG_DESCRIPTORS 64 5294fd22c13SMahesh Rajashekhara 530058311b7SMurthy Bhat struct pqi_host_memory { 531058311b7SMurthy Bhat __le64 signature; /* "OFA_QRM", "FW_DATA", etc. */ 5324fd22c13SMahesh Rajashekhara __le16 version; /* version of this struct (1 = 1st version) */ 5334fd22c13SMahesh Rajashekhara u8 reserved[62]; 5344fd22c13SMahesh Rajashekhara __le32 bytes_allocated; /* total allocated memory in bytes */ 5354fd22c13SMahesh Rajashekhara __le16 num_memory_descriptors; 5364fd22c13SMahesh Rajashekhara u8 reserved1[2]; 537058311b7SMurthy Bhat struct pqi_sg_descriptor sg_descriptor[PQI_HOST_MAX_SG_DESCRIPTORS]; 538058311b7SMurthy Bhat }; 539058311b7SMurthy Bhat 540058311b7SMurthy Bhat struct pqi_host_memory_descriptor { 541058311b7SMurthy Bhat struct pqi_host_memory *host_memory; 542058311b7SMurthy Bhat dma_addr_t host_memory_dma_handle; 543058311b7SMurthy Bhat void **host_chunk_virt_address; 5444fd22c13SMahesh Rajashekhara }; 545b212c251SKevin Barnett 5466c223761SKevin Barnett struct pqi_aio_error_info { 5476c223761SKevin Barnett u8 status; 5486c223761SKevin Barnett u8 service_response; 5496c223761SKevin Barnett u8 data_present; 5506c223761SKevin Barnett u8 reserved; 5516c223761SKevin Barnett __le32 residual_count; 5526c223761SKevin Barnett __le16 data_length; 5536c223761SKevin Barnett __le16 reserved1; 5546c223761SKevin Barnett u8 data[256]; 5556c223761SKevin Barnett }; 5566c223761SKevin Barnett 5576c223761SKevin Barnett struct pqi_raid_error_info { 5586c223761SKevin Barnett u8 data_in_result; 5596c223761SKevin Barnett u8 data_out_result; 5606c223761SKevin Barnett u8 reserved[3]; 5616c223761SKevin Barnett u8 status; 5626c223761SKevin Barnett __le16 status_qualifier; 5636c223761SKevin Barnett __le16 sense_data_length; 5646c223761SKevin Barnett __le16 response_data_length; 5656c223761SKevin Barnett __le32 data_in_transferred; 5666c223761SKevin Barnett __le32 data_out_transferred; 5676c223761SKevin Barnett u8 data[256]; 5686c223761SKevin Barnett }; 5696c223761SKevin Barnett 5706c223761SKevin Barnett #define PQI_REQUEST_IU_TASK_MANAGEMENT 0x13 5716c223761SKevin Barnett #define PQI_REQUEST_IU_RAID_PATH_IO 0x14 5726c223761SKevin Barnett #define PQI_REQUEST_IU_AIO_PATH_IO 0x15 5736702d2c4SDon Brace #define PQI_REQUEST_IU_AIO_PATH_RAID5_IO 0x18 5746702d2c4SDon Brace #define PQI_REQUEST_IU_AIO_PATH_RAID6_IO 0x19 5757a012c23SDon Brace #define PQI_REQUEST_IU_AIO_PATH_RAID1_IO 0x1A 5766c223761SKevin Barnett #define PQI_REQUEST_IU_GENERAL_ADMIN 0x60 5776c223761SKevin Barnett #define PQI_REQUEST_IU_REPORT_VENDOR_EVENT_CONFIG 0x72 5786c223761SKevin Barnett #define PQI_REQUEST_IU_SET_VENDOR_EVENT_CONFIG 0x73 579b212c251SKevin Barnett #define PQI_REQUEST_IU_VENDOR_GENERAL 0x75 5806c223761SKevin Barnett #define PQI_REQUEST_IU_ACKNOWLEDGE_VENDOR_EVENT 0xf6 5816c223761SKevin Barnett 5826c223761SKevin Barnett #define PQI_RESPONSE_IU_GENERAL_MANAGEMENT 0x81 5836c223761SKevin Barnett #define PQI_RESPONSE_IU_TASK_MANAGEMENT 0x93 5846c223761SKevin Barnett #define PQI_RESPONSE_IU_GENERAL_ADMIN 0xe0 5856c223761SKevin Barnett #define PQI_RESPONSE_IU_RAID_PATH_IO_SUCCESS 0xf0 5866c223761SKevin Barnett #define PQI_RESPONSE_IU_AIO_PATH_IO_SUCCESS 0xf1 5876c223761SKevin Barnett #define PQI_RESPONSE_IU_RAID_PATH_IO_ERROR 0xf2 5886c223761SKevin Barnett #define PQI_RESPONSE_IU_AIO_PATH_IO_ERROR 0xf3 5896c223761SKevin Barnett #define PQI_RESPONSE_IU_AIO_PATH_DISABLED 0xf4 5906c223761SKevin Barnett #define PQI_RESPONSE_IU_VENDOR_EVENT 0xf5 591b212c251SKevin Barnett #define PQI_RESPONSE_IU_VENDOR_GENERAL 0xf7 5926c223761SKevin Barnett 5936c223761SKevin Barnett #define PQI_GENERAL_ADMIN_FUNCTION_REPORT_DEVICE_CAPABILITY 0x0 5946c223761SKevin Barnett #define PQI_GENERAL_ADMIN_FUNCTION_CREATE_IQ 0x10 5956c223761SKevin Barnett #define PQI_GENERAL_ADMIN_FUNCTION_CREATE_OQ 0x11 5966c223761SKevin Barnett #define PQI_GENERAL_ADMIN_FUNCTION_DELETE_IQ 0x12 5976c223761SKevin Barnett #define PQI_GENERAL_ADMIN_FUNCTION_DELETE_OQ 0x13 5986c223761SKevin Barnett #define PQI_GENERAL_ADMIN_FUNCTION_CHANGE_IQ_PROPERTY 0x14 5996c223761SKevin Barnett 6006c223761SKevin Barnett #define PQI_GENERAL_ADMIN_STATUS_SUCCESS 0x0 6016c223761SKevin Barnett 6026c223761SKevin Barnett #define PQI_IQ_PROPERTY_IS_AIO_QUEUE 0x1 6036c223761SKevin Barnett 6046c223761SKevin Barnett #define PQI_GENERAL_ADMIN_IU_LENGTH 0x3c 6056c223761SKevin Barnett #define PQI_PROTOCOL_SOP 0x0 6066c223761SKevin Barnett 6076c223761SKevin Barnett #define PQI_DATA_IN_OUT_GOOD 0x0 6086c223761SKevin Barnett #define PQI_DATA_IN_OUT_UNDERFLOW 0x1 6096c223761SKevin Barnett #define PQI_DATA_IN_OUT_BUFFER_ERROR 0x40 6106c223761SKevin Barnett #define PQI_DATA_IN_OUT_BUFFER_OVERFLOW 0x41 6116c223761SKevin Barnett #define PQI_DATA_IN_OUT_BUFFER_OVERFLOW_DESCRIPTOR_AREA 0x42 6126c223761SKevin Barnett #define PQI_DATA_IN_OUT_BUFFER_OVERFLOW_BRIDGE 0x43 6136c223761SKevin Barnett #define PQI_DATA_IN_OUT_PCIE_FABRIC_ERROR 0x60 6146c223761SKevin Barnett #define PQI_DATA_IN_OUT_PCIE_COMPLETION_TIMEOUT 0x61 6156c223761SKevin Barnett #define PQI_DATA_IN_OUT_PCIE_COMPLETER_ABORT_RECEIVED 0x62 6166c223761SKevin Barnett #define PQI_DATA_IN_OUT_PCIE_UNSUPPORTED_REQUEST_RECEIVED 0x63 6176c223761SKevin Barnett #define PQI_DATA_IN_OUT_PCIE_ECRC_CHECK_FAILED 0x64 6186c223761SKevin Barnett #define PQI_DATA_IN_OUT_PCIE_UNSUPPORTED_REQUEST 0x65 6196c223761SKevin Barnett #define PQI_DATA_IN_OUT_PCIE_ACS_VIOLATION 0x66 6206c223761SKevin Barnett #define PQI_DATA_IN_OUT_PCIE_TLP_PREFIX_BLOCKED 0x67 6216c223761SKevin Barnett #define PQI_DATA_IN_OUT_PCIE_POISONED_MEMORY_READ 0x6F 6226c223761SKevin Barnett #define PQI_DATA_IN_OUT_ERROR 0xf0 6236c223761SKevin Barnett #define PQI_DATA_IN_OUT_PROTOCOL_ERROR 0xf1 6246c223761SKevin Barnett #define PQI_DATA_IN_OUT_HARDWARE_ERROR 0xf2 6256c223761SKevin Barnett #define PQI_DATA_IN_OUT_UNSOLICITED_ABORT 0xf3 6266c223761SKevin Barnett #define PQI_DATA_IN_OUT_ABORTED 0xf4 6276c223761SKevin Barnett #define PQI_DATA_IN_OUT_TIMEOUT 0xf5 6286c223761SKevin Barnett 6296c223761SKevin Barnett #define CISS_CMD_STATUS_SUCCESS 0x0 6306c223761SKevin Barnett #define CISS_CMD_STATUS_TARGET_STATUS 0x1 6316c223761SKevin Barnett #define CISS_CMD_STATUS_DATA_UNDERRUN 0x2 6326c223761SKevin Barnett #define CISS_CMD_STATUS_DATA_OVERRUN 0x3 6336c223761SKevin Barnett #define CISS_CMD_STATUS_INVALID 0x4 6346c223761SKevin Barnett #define CISS_CMD_STATUS_PROTOCOL_ERROR 0x5 6356c223761SKevin Barnett #define CISS_CMD_STATUS_HARDWARE_ERROR 0x6 6366c223761SKevin Barnett #define CISS_CMD_STATUS_CONNECTION_LOST 0x7 6376c223761SKevin Barnett #define CISS_CMD_STATUS_ABORTED 0x8 6386c223761SKevin Barnett #define CISS_CMD_STATUS_ABORT_FAILED 0x9 6396c223761SKevin Barnett #define CISS_CMD_STATUS_UNSOLICITED_ABORT 0xa 6406c223761SKevin Barnett #define CISS_CMD_STATUS_TIMEOUT 0xb 6416c223761SKevin Barnett #define CISS_CMD_STATUS_UNABORTABLE 0xc 6426c223761SKevin Barnett #define CISS_CMD_STATUS_TMF 0xd 6436c223761SKevin Barnett #define CISS_CMD_STATUS_AIO_DISABLED 0xe 6446c223761SKevin Barnett 64526b390abSKevin Barnett #define PQI_CMD_STATUS_ABORTED CISS_CMD_STATUS_ABORTED 64626b390abSKevin Barnett 6476c223761SKevin Barnett #define PQI_NUM_EVENT_QUEUE_ELEMENTS 32 6486c223761SKevin Barnett #define PQI_EVENT_OQ_ELEMENT_LENGTH sizeof(struct pqi_event_response) 6496c223761SKevin Barnett 6506c223761SKevin Barnett #define PQI_EVENT_TYPE_HOTPLUG 0x1 6516c223761SKevin Barnett #define PQI_EVENT_TYPE_HARDWARE 0x2 6526c223761SKevin Barnett #define PQI_EVENT_TYPE_PHYSICAL_DEVICE 0x4 6536c223761SKevin Barnett #define PQI_EVENT_TYPE_LOGICAL_DEVICE 0x5 6544fd22c13SMahesh Rajashekhara #define PQI_EVENT_TYPE_OFA 0xfb 6556c223761SKevin Barnett #define PQI_EVENT_TYPE_AIO_STATE_CHANGE 0xfd 6566c223761SKevin Barnett #define PQI_EVENT_TYPE_AIO_CONFIG_CHANGE 0xfe 6576c223761SKevin Barnett 6586c223761SKevin Barnett #pragma pack() 6596c223761SKevin Barnett 6606c223761SKevin Barnett #define PQI_ERROR_BUFFER_ELEMENT_LENGTH \ 6616c223761SKevin Barnett sizeof(struct pqi_raid_error_info) 6626c223761SKevin Barnett 6636c223761SKevin Barnett /* these values are based on our implementation */ 6646c223761SKevin Barnett #define PQI_ADMIN_IQ_NUM_ELEMENTS 8 6656c223761SKevin Barnett #define PQI_ADMIN_OQ_NUM_ELEMENTS 20 6666c223761SKevin Barnett #define PQI_ADMIN_IQ_ELEMENT_LENGTH 64 6676c223761SKevin Barnett #define PQI_ADMIN_OQ_ELEMENT_LENGTH 64 6686c223761SKevin Barnett 6696c223761SKevin Barnett #define PQI_OPERATIONAL_IQ_ELEMENT_LENGTH 128 6706c223761SKevin Barnett #define PQI_OPERATIONAL_OQ_ELEMENT_LENGTH 16 6716c223761SKevin Barnett 6726c223761SKevin Barnett #define PQI_MIN_MSIX_VECTORS 1 6736c223761SKevin Barnett #define PQI_MAX_MSIX_VECTORS 64 6746c223761SKevin Barnett 6756c223761SKevin Barnett /* these values are defined by the PQI spec */ 6766c223761SKevin Barnett #define PQI_MAX_NUM_ELEMENTS_ADMIN_QUEUE 255 6776c223761SKevin Barnett #define PQI_MAX_NUM_ELEMENTS_OPERATIONAL_QUEUE 65535 6782708a256SKevin Barnett 6796c223761SKevin Barnett #define PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT 64 6806c223761SKevin Barnett #define PQI_QUEUE_ELEMENT_LENGTH_ALIGNMENT 16 6816c223761SKevin Barnett #define PQI_ADMIN_INDEX_ALIGNMENT 64 6826c223761SKevin Barnett #define PQI_OPERATIONAL_INDEX_ALIGNMENT 4 6836c223761SKevin Barnett 6846c223761SKevin Barnett #define PQI_MIN_OPERATIONAL_QUEUE_ID 1 6856c223761SKevin Barnett #define PQI_MAX_OPERATIONAL_QUEUE_ID 65535 6866c223761SKevin Barnett 6876c223761SKevin Barnett #define PQI_AIO_SERV_RESPONSE_COMPLETE 0 6886c223761SKevin Barnett #define PQI_AIO_SERV_RESPONSE_FAILURE 1 6896c223761SKevin Barnett #define PQI_AIO_SERV_RESPONSE_TMF_COMPLETE 2 6906c223761SKevin Barnett #define PQI_AIO_SERV_RESPONSE_TMF_SUCCEEDED 3 6916c223761SKevin Barnett #define PQI_AIO_SERV_RESPONSE_TMF_REJECTED 4 6926c223761SKevin Barnett #define PQI_AIO_SERV_RESPONSE_TMF_INCORRECT_LUN 5 6936c223761SKevin Barnett 6946c223761SKevin Barnett #define PQI_AIO_STATUS_IO_ERROR 0x1 6956c223761SKevin Barnett #define PQI_AIO_STATUS_IO_ABORTED 0x2 6966c223761SKevin Barnett #define PQI_AIO_STATUS_NO_PATH_TO_DEVICE 0x3 6976c223761SKevin Barnett #define PQI_AIO_STATUS_INVALID_DEVICE 0x4 6986c223761SKevin Barnett #define PQI_AIO_STATUS_AIO_PATH_DISABLED 0xe 6996c223761SKevin Barnett #define PQI_AIO_STATUS_UNDERRUN 0x51 7006c223761SKevin Barnett #define PQI_AIO_STATUS_OVERRUN 0x75 7016c223761SKevin Barnett 7026c223761SKevin Barnett typedef u32 pqi_index_t; 7036c223761SKevin Barnett 7046c223761SKevin Barnett /* SOP data direction flags */ 7056c223761SKevin Barnett #define SOP_NO_DIRECTION_FLAG 0 7066c223761SKevin Barnett #define SOP_WRITE_FLAG 1 /* host writes data to Data-Out */ 7076c223761SKevin Barnett /* buffer */ 7086c223761SKevin Barnett #define SOP_READ_FLAG 2 /* host receives data from Data-In */ 7096c223761SKevin Barnett /* buffer */ 7106c223761SKevin Barnett #define SOP_BIDIRECTIONAL 3 /* data is transferred from the */ 7116c223761SKevin Barnett /* Data-Out buffer and data is */ 7126c223761SKevin Barnett /* transferred to the Data-In buffer */ 7136c223761SKevin Barnett 7146c223761SKevin Barnett #define SOP_TASK_ATTRIBUTE_SIMPLE 0 7156c223761SKevin Barnett #define SOP_TASK_ATTRIBUTE_HEAD_OF_QUEUE 1 7166c223761SKevin Barnett #define SOP_TASK_ATTRIBUTE_ORDERED 2 7176c223761SKevin Barnett #define SOP_TASK_ATTRIBUTE_ACA 4 7186c223761SKevin Barnett 719b17f0486SKevin Barnett #define SOP_TMF_COMPLETE 0x0 7203406384bSMahesh Rajashekhara #define SOP_TMF_REJECTED 0x4 721b17f0486SKevin Barnett #define SOP_TMF_FUNCTION_SUCCEEDED 0x8 72243cf3a6eSKevin Barnett #define SOP_TMF_INCORRECT_LOGICAL_UNIT 0x9 7236c223761SKevin Barnett 7246c223761SKevin Barnett /* additional CDB bytes usage field codes */ 7256c223761SKevin Barnett #define SOP_ADDITIONAL_CDB_BYTES_0 0 /* 16-byte CDB */ 7266c223761SKevin Barnett #define SOP_ADDITIONAL_CDB_BYTES_4 1 /* 20-byte CDB */ 7276c223761SKevin Barnett #define SOP_ADDITIONAL_CDB_BYTES_8 2 /* 24-byte CDB */ 7286c223761SKevin Barnett #define SOP_ADDITIONAL_CDB_BYTES_12 3 /* 28-byte CDB */ 7296c223761SKevin Barnett #define SOP_ADDITIONAL_CDB_BYTES_16 4 /* 32-byte CDB */ 7306c223761SKevin Barnett 7316c223761SKevin Barnett /* 7326c223761SKevin Barnett * The purpose of this structure is to obtain proper alignment of objects in 7336c223761SKevin Barnett * an admin queue pair. 7346c223761SKevin Barnett */ 7356c223761SKevin Barnett struct pqi_admin_queues_aligned { 7366c223761SKevin Barnett __aligned(PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT) 7376c223761SKevin Barnett u8 iq_element_array[PQI_ADMIN_IQ_ELEMENT_LENGTH] 7386c223761SKevin Barnett [PQI_ADMIN_IQ_NUM_ELEMENTS]; 7396c223761SKevin Barnett __aligned(PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT) 7406c223761SKevin Barnett u8 oq_element_array[PQI_ADMIN_OQ_ELEMENT_LENGTH] 7416c223761SKevin Barnett [PQI_ADMIN_OQ_NUM_ELEMENTS]; 7426c223761SKevin Barnett __aligned(PQI_ADMIN_INDEX_ALIGNMENT) pqi_index_t iq_ci; 7436c223761SKevin Barnett __aligned(PQI_ADMIN_INDEX_ALIGNMENT) pqi_index_t oq_pi; 7446c223761SKevin Barnett }; 7456c223761SKevin Barnett 7466c223761SKevin Barnett struct pqi_admin_queues { 7476c223761SKevin Barnett void *iq_element_array; 7486c223761SKevin Barnett void *oq_element_array; 749583891c9SKevin Barnett pqi_index_t __iomem *iq_ci; 750dac12fbcSKevin Barnett pqi_index_t __iomem *oq_pi; 7516c223761SKevin Barnett dma_addr_t iq_element_array_bus_addr; 7526c223761SKevin Barnett dma_addr_t oq_element_array_bus_addr; 7536c223761SKevin Barnett dma_addr_t iq_ci_bus_addr; 7546c223761SKevin Barnett dma_addr_t oq_pi_bus_addr; 7556c223761SKevin Barnett __le32 __iomem *iq_pi; 7566c223761SKevin Barnett pqi_index_t iq_pi_copy; 7576c223761SKevin Barnett __le32 __iomem *oq_ci; 7586c223761SKevin Barnett pqi_index_t oq_ci_copy; 7596c223761SKevin Barnett struct task_struct *task; 7606c223761SKevin Barnett u16 int_msg_num; 7616c223761SKevin Barnett }; 7626c223761SKevin Barnett 7636c223761SKevin Barnett struct pqi_queue_group { 7646c223761SKevin Barnett struct pqi_ctrl_info *ctrl_info; /* backpointer */ 7656c223761SKevin Barnett u16 iq_id[2]; 7666c223761SKevin Barnett u16 oq_id; 7676c223761SKevin Barnett u16 int_msg_num; 7686c223761SKevin Barnett void *iq_element_array[2]; 7696c223761SKevin Barnett void *oq_element_array; 7706c223761SKevin Barnett dma_addr_t iq_element_array_bus_addr[2]; 7716c223761SKevin Barnett dma_addr_t oq_element_array_bus_addr; 7726c223761SKevin Barnett __le32 __iomem *iq_pi[2]; 7736c223761SKevin Barnett pqi_index_t iq_pi_copy[2]; 774dac12fbcSKevin Barnett pqi_index_t __iomem *iq_ci[2]; 775dac12fbcSKevin Barnett pqi_index_t __iomem *oq_pi; 7766c223761SKevin Barnett dma_addr_t iq_ci_bus_addr[2]; 7776c223761SKevin Barnett dma_addr_t oq_pi_bus_addr; 7786c223761SKevin Barnett __le32 __iomem *oq_ci; 7796c223761SKevin Barnett pqi_index_t oq_ci_copy; 7806c223761SKevin Barnett spinlock_t submit_lock[2]; /* protect submission queue */ 7816c223761SKevin Barnett struct list_head request_list[2]; 7826c223761SKevin Barnett }; 7836c223761SKevin Barnett 7846c223761SKevin Barnett struct pqi_event_queue { 7856c223761SKevin Barnett u16 oq_id; 7866c223761SKevin Barnett u16 int_msg_num; 7876c223761SKevin Barnett void *oq_element_array; 788dac12fbcSKevin Barnett pqi_index_t __iomem *oq_pi; 7896c223761SKevin Barnett dma_addr_t oq_element_array_bus_addr; 7906c223761SKevin Barnett dma_addr_t oq_pi_bus_addr; 7916c223761SKevin Barnett __le32 __iomem *oq_ci; 7926c223761SKevin Barnett pqi_index_t oq_ci_copy; 7936c223761SKevin Barnett }; 7946c223761SKevin Barnett 7956c223761SKevin Barnett #define PQI_DEFAULT_QUEUE_GROUP 0 7966c223761SKevin Barnett #define PQI_MAX_QUEUE_GROUPS PQI_MAX_MSIX_VECTORS 7976c223761SKevin Barnett 7986c223761SKevin Barnett struct pqi_encryption_info { 7996c223761SKevin Barnett u16 data_encryption_key_index; 8006c223761SKevin Barnett u32 encrypt_tweak_lower; 8016c223761SKevin Barnett u32 encrypt_tweak_upper; 8026c223761SKevin Barnett }; 8036c223761SKevin Barnett 80498f87667SKevin Barnett #pragma pack(1) 80598f87667SKevin Barnett 80698f87667SKevin Barnett #define PQI_CONFIG_TABLE_SIGNATURE "CFGTABLE" 80798f87667SKevin Barnett #define PQI_CONFIG_TABLE_MAX_LENGTH ((u16)~0) 80898f87667SKevin Barnett 80998f87667SKevin Barnett /* configuration table section IDs */ 810b212c251SKevin Barnett #define PQI_CONFIG_TABLE_ALL_SECTIONS (-1) 81198f87667SKevin Barnett #define PQI_CONFIG_TABLE_SECTION_GENERAL_INFO 0 81298f87667SKevin Barnett #define PQI_CONFIG_TABLE_SECTION_FIRMWARE_FEATURES 1 81398f87667SKevin Barnett #define PQI_CONFIG_TABLE_SECTION_FIRMWARE_ERRATA 2 81498f87667SKevin Barnett #define PQI_CONFIG_TABLE_SECTION_DEBUG 3 81598f87667SKevin Barnett #define PQI_CONFIG_TABLE_SECTION_HEARTBEAT 4 8164fd22c13SMahesh Rajashekhara #define PQI_CONFIG_TABLE_SECTION_SOFT_RESET 5 81798f87667SKevin Barnett 81898f87667SKevin Barnett struct pqi_config_table { 81998f87667SKevin Barnett u8 signature[8]; /* "CFGTABLE" */ 82098f87667SKevin Barnett __le32 first_section_offset; /* offset in bytes from the base */ 82198f87667SKevin Barnett /* address of this table to the */ 82298f87667SKevin Barnett /* first section */ 82398f87667SKevin Barnett }; 82498f87667SKevin Barnett 82598f87667SKevin Barnett struct pqi_config_table_section_header { 82698f87667SKevin Barnett __le16 section_id; /* as defined by the */ 82798f87667SKevin Barnett /* PQI_CONFIG_TABLE_SECTION_* */ 82898f87667SKevin Barnett /* manifest constants above */ 82998f87667SKevin Barnett __le16 next_section_offset; /* offset in bytes from base */ 83098f87667SKevin Barnett /* address of the table of the */ 83198f87667SKevin Barnett /* next section or 0 if last entry */ 83298f87667SKevin Barnett }; 83398f87667SKevin Barnett 83498f87667SKevin Barnett struct pqi_config_table_general_info { 83598f87667SKevin Barnett struct pqi_config_table_section_header header; 83698f87667SKevin Barnett __le32 section_length; /* size of this section in bytes */ 83798f87667SKevin Barnett /* including the section header */ 83898f87667SKevin Barnett __le32 max_outstanding_requests; /* max. outstanding */ 83998f87667SKevin Barnett /* commands supported by */ 84098f87667SKevin Barnett /* the controller */ 84198f87667SKevin Barnett __le32 max_sg_size; /* max. transfer size of a single */ 84298f87667SKevin Barnett /* command */ 84398f87667SKevin Barnett __le32 max_sg_per_request; /* max. number of scatter-gather */ 84498f87667SKevin Barnett /* entries supported in a single */ 84598f87667SKevin Barnett /* command */ 84698f87667SKevin Barnett }; 84798f87667SKevin Barnett 848b212c251SKevin Barnett struct pqi_config_table_firmware_features { 849b212c251SKevin Barnett struct pqi_config_table_section_header header; 850b212c251SKevin Barnett __le16 num_elements; 851b212c251SKevin Barnett u8 features_supported[]; 852b212c251SKevin Barnett /* u8 features_requested_by_host[]; */ 853b212c251SKevin Barnett /* u8 features_enabled[]; */ 854f6cc2a77SKevin Barnett /* The 2 fields below are only valid if the MAX_KNOWN_FEATURE bit is set. */ 855f6cc2a77SKevin Barnett /* __le16 firmware_max_known_feature; */ 856f6cc2a77SKevin Barnett /* __le16 host_max_known_feature; */ 857b212c251SKevin Barnett }; 858b212c251SKevin Barnett 859b212c251SKevin Barnett #define PQI_FIRMWARE_FEATURE_OFA 0 860b212c251SKevin Barnett #define PQI_FIRMWARE_FEATURE_SMP 1 861f6cc2a77SKevin Barnett #define PQI_FIRMWARE_FEATURE_MAX_KNOWN_FEATURE 2 862f6cc2a77SKevin Barnett #define PQI_FIRMWARE_FEATURE_RAID_0_READ_BYPASS 3 863f6cc2a77SKevin Barnett #define PQI_FIRMWARE_FEATURE_RAID_1_READ_BYPASS 4 864f6cc2a77SKevin Barnett #define PQI_FIRMWARE_FEATURE_RAID_5_READ_BYPASS 5 865f6cc2a77SKevin Barnett #define PQI_FIRMWARE_FEATURE_RAID_6_READ_BYPASS 6 866f6cc2a77SKevin Barnett #define PQI_FIRMWARE_FEATURE_RAID_0_WRITE_BYPASS 7 867f6cc2a77SKevin Barnett #define PQI_FIRMWARE_FEATURE_RAID_1_WRITE_BYPASS 8 868f6cc2a77SKevin Barnett #define PQI_FIRMWARE_FEATURE_RAID_5_WRITE_BYPASS 9 869f6cc2a77SKevin Barnett #define PQI_FIRMWARE_FEATURE_RAID_6_WRITE_BYPASS 10 8704fd22c13SMahesh Rajashekhara #define PQI_FIRMWARE_FEATURE_SOFT_RESET_HANDSHAKE 11 871f6cc2a77SKevin Barnett #define PQI_FIRMWARE_FEATURE_UNIQUE_SATA_WWN 12 87221432010Skoshyaji #define PQI_FIRMWARE_FEATURE_RAID_IU_TIMEOUT 13 873c2922f17SMurthy Bhat #define PQI_FIRMWARE_FEATURE_TMF_IU_TIMEOUT 14 874f6cc2a77SKevin Barnett #define PQI_FIRMWARE_FEATURE_RAID_BYPASS_ON_ENCRYPTED_NVME 15 8757a84a821SKevin Barnett #define PQI_FIRMWARE_FEATURE_UNIQUE_WWID_IN_REPORT_PHYS_LUN 16 8765d1f03e6SMurthy Bhat #define PQI_FIRMWARE_FEATURE_FW_TRIAGE 17 87728ca6d87SMike McGowen #define PQI_FIRMWARE_FEATURE_RPL_EXTENDED_FORMAT_4_5 18 878904f2bfdSKumar Meiyappan #define PQI_FIRMWARE_FEATURE_MULTI_LUN_DEVICE_SUPPORT 21 879058311b7SMurthy Bhat #define PQI_FIRMWARE_FEATURE_CTRL_LOGGING 22 880058311b7SMurthy Bhat #define PQI_FIRMWARE_FEATURE_MAXIMUM 22 881b212c251SKevin Barnett 88298f87667SKevin Barnett struct pqi_config_table_debug { 88398f87667SKevin Barnett struct pqi_config_table_section_header header; 88498f87667SKevin Barnett __le32 scratchpad; 88598f87667SKevin Barnett }; 88698f87667SKevin Barnett 88798f87667SKevin Barnett struct pqi_config_table_heartbeat { 88898f87667SKevin Barnett struct pqi_config_table_section_header header; 88998f87667SKevin Barnett __le32 heartbeat_counter; 89098f87667SKevin Barnett }; 89198f87667SKevin Barnett 8924fd22c13SMahesh Rajashekhara struct pqi_config_table_soft_reset { 8934fd22c13SMahesh Rajashekhara struct pqi_config_table_section_header header; 8944fd22c13SMahesh Rajashekhara u8 soft_reset_status; 8954fd22c13SMahesh Rajashekhara }; 8964fd22c13SMahesh Rajashekhara 8974fd22c13SMahesh Rajashekhara #define PQI_SOFT_RESET_INITIATE 0x1 8984fd22c13SMahesh Rajashekhara #define PQI_SOFT_RESET_ABORT 0x2 8994fd22c13SMahesh Rajashekhara 9004fd22c13SMahesh Rajashekhara enum pqi_soft_reset_status { 9014fd22c13SMahesh Rajashekhara RESET_INITIATE_FIRMWARE, 9024fd22c13SMahesh Rajashekhara RESET_INITIATE_DRIVER, 9034fd22c13SMahesh Rajashekhara RESET_ABORT, 9044fd22c13SMahesh Rajashekhara RESET_NORESPONSE, 9054fd22c13SMahesh Rajashekhara RESET_TIMEDOUT 9064fd22c13SMahesh Rajashekhara }; 9074fd22c13SMahesh Rajashekhara 908336b6819SKevin Barnett union pqi_reset_register { 909336b6819SKevin Barnett struct { 910336b6819SKevin Barnett u32 reset_type : 3; 911336b6819SKevin Barnett u32 reserved : 2; 912336b6819SKevin Barnett u32 reset_action : 3; 913336b6819SKevin Barnett u32 hold_in_pd1 : 1; 914336b6819SKevin Barnett u32 reserved2 : 23; 915336b6819SKevin Barnett } bits; 916336b6819SKevin Barnett u32 all_bits; 917336b6819SKevin Barnett }; 918336b6819SKevin Barnett 919336b6819SKevin Barnett #define PQI_RESET_ACTION_RESET 0x1 920336b6819SKevin Barnett 921336b6819SKevin Barnett #define PQI_RESET_TYPE_NO_RESET 0x0 922336b6819SKevin Barnett #define PQI_RESET_TYPE_SOFT_RESET 0x1 923336b6819SKevin Barnett #define PQI_RESET_TYPE_FIRM_RESET 0x2 924336b6819SKevin Barnett #define PQI_RESET_TYPE_HARD_RESET 0x3 925336b6819SKevin Barnett 926336b6819SKevin Barnett #define PQI_RESET_ACTION_COMPLETED 0x2 927336b6819SKevin Barnett 928336b6819SKevin Barnett #define PQI_RESET_POLL_INTERVAL_MSECS 100 929336b6819SKevin Barnett 9306c223761SKevin Barnett #define PQI_MAX_OUTSTANDING_REQUESTS ((u32)~0) 931d727a776SKevin Barnett #define PQI_MAX_OUTSTANDING_REQUESTS_KDUMP 32 932eeee4107SYadan Fan #define PQI_MAX_TRANSFER_SIZE (1024U * 1024U) 933d727a776SKevin Barnett #define PQI_MAX_TRANSFER_SIZE_KDUMP (512 * 1024U) 9346c223761SKevin Barnett 9356c223761SKevin Barnett #define RAID_MAP_MAX_ENTRIES 1024 9365d8fbce0SMike McGowen #define RAID_MAP_MAX_DATA_DISKS_PER_ROW 128 9376c223761SKevin Barnett 9386c223761SKevin Barnett #define PQI_PHYSICAL_DEVICE_BUS 0 9396c223761SKevin Barnett #define PQI_RAID_VOLUME_BUS 1 9406c223761SKevin Barnett #define PQI_HBA_BUS 2 941bd10cf0bSKevin Barnett #define PQI_EXTERNAL_RAID_VOLUME_BUS 3 942bd10cf0bSKevin Barnett #define PQI_MAX_BUS PQI_EXTERNAL_RAID_VOLUME_BUS 943522bc026SDave Carroll #define PQI_VSEP_CISS_BTL 379 9446c223761SKevin Barnett 9456c223761SKevin Barnett struct report_lun_header { 9466c223761SKevin Barnett __be32 list_length; 947694c5d5bSKevin Barnett u8 flags; 9486c223761SKevin Barnett u8 reserved[3]; 9496c223761SKevin Barnett }; 9506c223761SKevin Barnett 951694c5d5bSKevin Barnett /* for flags field of struct report_lun_header */ 952694c5d5bSKevin Barnett #define CISS_REPORT_LOG_FLAG_UNIQUE_LUN_ID (1 << 0) 953694c5d5bSKevin Barnett #define CISS_REPORT_LOG_FLAG_QUEUE_DEPTH (1 << 5) 954694c5d5bSKevin Barnett #define CISS_REPORT_LOG_FLAG_DRIVE_TYPE_MIX (1 << 6) 955694c5d5bSKevin Barnett 95628ca6d87SMike McGowen #define CISS_REPORT_PHYS_FLAG_EXTENDED_FORMAT_2 0x2 95728ca6d87SMike McGowen #define CISS_REPORT_PHYS_FLAG_EXTENDED_FORMAT_4 0x4 95828ca6d87SMike McGowen #define CISS_REPORT_PHYS_FLAG_EXTENDED_FORMAT_MASK 0xf 959694c5d5bSKevin Barnett 96028ca6d87SMike McGowen struct report_log_lun { 9616c223761SKevin Barnett u8 lunid[8]; 9626c223761SKevin Barnett u8 volume_id[16]; 9636c223761SKevin Barnett }; 9646c223761SKevin Barnett 96528ca6d87SMike McGowen struct report_log_lun_list { 9666c223761SKevin Barnett struct report_lun_header header; 967ead82126SGustavo A. R. Silva struct report_log_lun lun_entries[]; 9686c223761SKevin Barnett }; 9696c223761SKevin Barnett 97028ca6d87SMike McGowen struct report_phys_lun_8byte_wwid { 9716c223761SKevin Barnett u8 lunid[8]; 9726c223761SKevin Barnett __be64 wwid; 9736c223761SKevin Barnett u8 device_type; 9746c223761SKevin Barnett u8 device_flags; 9756c223761SKevin Barnett u8 lun_count; /* number of LUNs in a multi-LUN device */ 9766c223761SKevin Barnett u8 redundant_paths; 9776c223761SKevin Barnett u32 aio_handle; 9786c223761SKevin Barnett }; 9796c223761SKevin Barnett 98028ca6d87SMike McGowen struct report_phys_lun_16byte_wwid { 98128ca6d87SMike McGowen u8 lunid[8]; 98228ca6d87SMike McGowen u8 wwid[16]; 98328ca6d87SMike McGowen u8 device_type; 98428ca6d87SMike McGowen u8 device_flags; 98528ca6d87SMike McGowen u8 lun_count; /* number of LUNs in a multi-LUN device */ 98628ca6d87SMike McGowen u8 redundant_paths; 98728ca6d87SMike McGowen u32 aio_handle; 98828ca6d87SMike McGowen }; 98928ca6d87SMike McGowen 9906c223761SKevin Barnett /* for device_flags field of struct report_phys_lun_extended_entry */ 991694c5d5bSKevin Barnett #define CISS_REPORT_PHYS_DEV_FLAG_AIO_ENABLED 0x8 9926c223761SKevin Barnett 99328ca6d87SMike McGowen struct report_phys_lun_8byte_wwid_list { 9946c223761SKevin Barnett struct report_lun_header header; 9956f0a92fdSGustavo A. R. Silva struct report_phys_lun_8byte_wwid lun_entries[]; 99628ca6d87SMike McGowen }; 99728ca6d87SMike McGowen 99828ca6d87SMike McGowen struct report_phys_lun_16byte_wwid_list { 99928ca6d87SMike McGowen struct report_lun_header header; 10006f0a92fdSGustavo A. R. Silva struct report_phys_lun_16byte_wwid lun_entries[]; 10016c223761SKevin Barnett }; 10026c223761SKevin Barnett 10036c223761SKevin Barnett struct raid_map_disk_data { 10046c223761SKevin Barnett u32 aio_handle; 10056c223761SKevin Barnett u8 xor_mult[2]; 10066c223761SKevin Barnett u8 reserved[2]; 10076c223761SKevin Barnett }; 10086c223761SKevin Barnett 1009694c5d5bSKevin Barnett /* for flags field of RAID map */ 10106c223761SKevin Barnett #define RAID_MAP_ENCRYPTION_ENABLED 0x1 10116c223761SKevin Barnett 10126c223761SKevin Barnett struct raid_map { 10136c223761SKevin Barnett __le32 structure_size; /* size of entire structure in bytes */ 10146c223761SKevin Barnett __le32 volume_blk_size; /* bytes / block in the volume */ 10156c223761SKevin Barnett __le64 volume_blk_cnt; /* logical blocks on the volume */ 10166c223761SKevin Barnett u8 phys_blk_shift; /* shift factor to convert between */ 10176c223761SKevin Barnett /* units of logical blocks and */ 10186c223761SKevin Barnett /* physical disk blocks */ 10196c223761SKevin Barnett u8 parity_rotation_shift; /* shift factor to convert between */ 10206c223761SKevin Barnett /* units of logical stripes and */ 10216c223761SKevin Barnett /* physical stripes */ 10226c223761SKevin Barnett __le16 strip_size; /* blocks used on each disk / stripe */ 10236c223761SKevin Barnett __le64 disk_starting_blk; /* first disk block used in volume */ 10246c223761SKevin Barnett __le64 disk_blk_cnt; /* disk blocks used by volume / disk */ 10256c223761SKevin Barnett __le16 data_disks_per_row; /* data disk entries / row in the map */ 10266c223761SKevin Barnett __le16 metadata_disks_per_row; /* mirror/parity disk entries / row */ 10276c223761SKevin Barnett /* in the map */ 10286c223761SKevin Barnett __le16 row_cnt; /* rows in each layout map */ 10296c223761SKevin Barnett __le16 layout_map_count; /* layout maps (1 map per */ 10306c223761SKevin Barnett /* mirror parity group) */ 10316c223761SKevin Barnett __le16 flags; 10326c223761SKevin Barnett __le16 data_encryption_key_index; 10336c223761SKevin Barnett u8 reserved[16]; 10346c223761SKevin Barnett struct raid_map_disk_data disk_data[RAID_MAP_MAX_ENTRIES]; 10356c223761SKevin Barnett }; 10366c223761SKevin Barnett 10376c223761SKevin Barnett #pragma pack() 10386c223761SKevin Barnett 1039281a817fSDon Brace struct pqi_scsi_dev_raid_map_data { 1040281a817fSDon Brace bool is_write; 1041281a817fSDon Brace u8 raid_level; 1042281a817fSDon Brace u32 map_index; 1043281a817fSDon Brace u64 first_block; 1044281a817fSDon Brace u64 last_block; 1045281a817fSDon Brace u32 data_length; 1046281a817fSDon Brace u32 block_cnt; 1047281a817fSDon Brace u32 blocks_per_row; 1048281a817fSDon Brace u64 first_row; 1049281a817fSDon Brace u64 last_row; 1050281a817fSDon Brace u32 first_row_offset; 1051281a817fSDon Brace u32 last_row_offset; 1052281a817fSDon Brace u32 first_column; 1053281a817fSDon Brace u32 last_column; 1054281a817fSDon Brace u64 r5or6_first_row; 1055281a817fSDon Brace u64 r5or6_last_row; 1056281a817fSDon Brace u32 r5or6_first_row_offset; 1057281a817fSDon Brace u32 r5or6_last_row_offset; 1058281a817fSDon Brace u32 r5or6_first_column; 1059281a817fSDon Brace u32 r5or6_last_column; 1060281a817fSDon Brace u16 data_disks_per_row; 1061281a817fSDon Brace u32 total_disks_per_row; 1062281a817fSDon Brace u16 layout_map_count; 1063281a817fSDon Brace u32 stripesize; 1064281a817fSDon Brace u16 strip_size; 1065281a817fSDon Brace u32 first_group; 1066281a817fSDon Brace u32 last_group; 1067281a817fSDon Brace u32 map_row; 1068281a817fSDon Brace u32 aio_handle; 1069281a817fSDon Brace u64 disk_block; 1070281a817fSDon Brace u32 disk_block_cnt; 1071281a817fSDon Brace u8 cdb[16]; 1072281a817fSDon Brace u8 cdb_length; 1073281a817fSDon Brace 1074281a817fSDon Brace /* RAID 1 specific */ 1075281a817fSDon Brace #define NUM_RAID1_MAP_ENTRIES 3 1076281a817fSDon Brace u32 num_it_nexus_entries; 1077281a817fSDon Brace u32 it_nexus[NUM_RAID1_MAP_ENTRIES]; 1078281a817fSDon Brace 1079583891c9SKevin Barnett /* RAID 5 / RAID 6 specific */ 1080281a817fSDon Brace u32 p_parity_it_nexus; /* aio_handle */ 1081281a817fSDon Brace u32 q_parity_it_nexus; /* aio_handle */ 1082281a817fSDon Brace u8 xor_mult; 1083281a817fSDon Brace u64 row; 1084281a817fSDon Brace u64 stripe_lba; 1085281a817fSDon Brace u32 p_index; 1086281a817fSDon Brace u32 q_index; 1087281a817fSDon Brace }; 1088281a817fSDon Brace 10896c223761SKevin Barnett #define RAID_CTLR_LUNID "\0\0\0\0\0\0\0\0" 10906c223761SKevin Barnett 1091c7ffedb3SDon Brace #define NUM_STREAMS_PER_LUN 8 1092c7ffedb3SDon Brace 1093c7ffedb3SDon Brace struct pqi_stream_data { 1094c7ffedb3SDon Brace u64 next_lba; 1095c7ffedb3SDon Brace u32 last_accessed; 1096c7ffedb3SDon Brace }; 1097c7ffedb3SDon Brace 1098904f2bfdSKumar Meiyappan #define PQI_MAX_LUNS_PER_DEVICE 256 1099904f2bfdSKumar Meiyappan 1100153c45ddSKevin Barnett struct pqi_tmf_work { 1101153c45ddSKevin Barnett struct work_struct work_struct; 1102153c45ddSKevin Barnett struct scsi_cmnd *scmd; 1103153c45ddSKevin Barnett struct pqi_ctrl_info *ctrl_info; 1104153c45ddSKevin Barnett struct pqi_scsi_dev *device; 1105153c45ddSKevin Barnett u8 lun; 1106153c45ddSKevin Barnett u8 scsi_opcode; 1107153c45ddSKevin Barnett }; 1108153c45ddSKevin Barnett 1109*283dcc1bSMahesh Rajashekhara struct pqi_raid_io_stats { 1110*283dcc1bSMahesh Rajashekhara u64 raid_bypass_cnt; 1111*283dcc1bSMahesh Rajashekhara u64 write_stream_cnt; 1112*283dcc1bSMahesh Rajashekhara }; 1113*283dcc1bSMahesh Rajashekhara 11146c223761SKevin Barnett struct pqi_scsi_dev { 11158946ea28SJulia Lawall int devtype; /* as reported by INQUIRY command */ 11166c223761SKevin Barnett u8 device_type; /* as reported by */ 11176c223761SKevin Barnett /* BMIC_IDENTIFY_PHYSICAL_DEVICE */ 11186c223761SKevin Barnett /* only valid for devtype = TYPE_DISK */ 11196c223761SKevin Barnett int bus; 11206c223761SKevin Barnett int target; 11216c223761SKevin Barnett int lun; 11226c223761SKevin Barnett u8 scsi3addr[8]; 112328ca6d87SMike McGowen u8 wwid[16]; 11246c223761SKevin Barnett u8 volume_id[16]; 11256c223761SKevin Barnett u8 is_physical_device : 1; 1126bd10cf0bSKevin Barnett u8 is_external_raid_device : 1; 11273d46a59aSDon Brace u8 is_expander_smp_device : 1; 11286c223761SKevin Barnett u8 target_lun_valid : 1; 11296c223761SKevin Barnett u8 device_gone : 1; 11306c223761SKevin Barnett u8 new_device : 1; 11316c223761SKevin Barnett u8 keep_device : 1; 11326c223761SKevin Barnett u8 volume_offline : 1; 1133244ca45eSMahesh Rajashekhara u8 rescan : 1; 1134d4dc6aeaSKevin Barnett u8 ignore_device : 1; 11352eddf98dSKevin Barnett u8 erase_in_progress : 1; 1136376fb880SKevin Barnett bool aio_enabled; /* only valid for physical disks */ 11371e46731eSMahesh Rajashekhara bool in_remove; 1138153c45ddSKevin Barnett bool in_reset[PQI_MAX_LUNS_PER_DEVICE]; 11397561a7e4SKevin Barnett bool device_offline; 11406c223761SKevin Barnett u8 vendor[8]; /* bytes 8-15 of inquiry data */ 11416c223761SKevin Barnett u8 model[16]; /* bytes 16-31 of inquiry data */ 11426c223761SKevin Barnett u64 sas_address; 11436c223761SKevin Barnett u8 raid_level; 11446c223761SKevin Barnett u16 queue_depth; /* max. queue_depth for this device */ 11456c223761SKevin Barnett u16 advertised_queue_depth; 11466c223761SKevin Barnett u32 aio_handle; 11476c223761SKevin Barnett u8 volume_status; 11486c223761SKevin Barnett u8 active_path_index; 11496c223761SKevin Barnett u8 path_map; 11506c223761SKevin Barnett u8 bay; 11512d2ad4bcSGilbert Wu u8 box_index; 11522d2ad4bcSGilbert Wu u8 phys_box_on_bus; 11532d2ad4bcSGilbert Wu u8 phy_connected_dev_type; 11546c223761SKevin Barnett u8 box[8]; 11556c223761SKevin Barnett u16 phys_connector[8]; 1156ec504b23SMurthy Bhat u8 phy_id; 11572a47834dSGilbert Wu u8 ncq_prio_enable; 11582a47834dSGilbert Wu u8 ncq_prio_support; 1159cc9befcbSKumar Meiyappan u8 lun_count; 1160588a63feSKevin Barnett bool raid_bypass_configured; /* RAID bypass configured */ 1161588a63feSKevin Barnett bool raid_bypass_enabled; /* RAID bypass enabled */ 11625d8fbce0SMike McGowen u32 next_bypass_group[RAID_MAP_MAX_DATA_DISKS_PER_ROW]; 1163588a63feSKevin Barnett struct raid_map *raid_map; /* RAID bypass map */ 1164f6cc2a77SKevin Barnett u32 max_transfer_encrypted; 11656c223761SKevin Barnett 11666c223761SKevin Barnett struct pqi_sas_port *sas_port; 11676c223761SKevin Barnett struct scsi_device *sdev; 11686c223761SKevin Barnett 11696c223761SKevin Barnett struct list_head scsi_device_list_entry; 11706c223761SKevin Barnett struct list_head new_device_list_entry; 11716c223761SKevin Barnett struct list_head add_list_entry; 11726c223761SKevin Barnett struct list_head delete_list_entry; 11737561a7e4SKevin Barnett 1174c7ffedb3SDon Brace struct pqi_stream_data stream_data[NUM_STREAMS_PER_LUN]; 1175904f2bfdSKumar Meiyappan atomic_t scsi_cmds_outstanding[PQI_MAX_LUNS_PER_DEVICE]; 1176*283dcc1bSMahesh Rajashekhara struct pqi_raid_io_stats __percpu *raid_io_stats; 1177153c45ddSKevin Barnett 1178153c45ddSKevin Barnett struct pqi_tmf_work tmf_work[PQI_MAX_LUNS_PER_DEVICE]; 11796c223761SKevin Barnett }; 11806c223761SKevin Barnett 11816c223761SKevin Barnett /* VPD inquiry pages */ 11826c223761SKevin Barnett #define CISS_VPD_LV_DEVICE_GEOMETRY 0xc1 /* vendor-specific page */ 1183588a63feSKevin Barnett #define CISS_VPD_LV_BYPASS_STATUS 0xc2 /* vendor-specific page */ 11846c223761SKevin Barnett #define CISS_VPD_LV_STATUS 0xc3 /* vendor-specific page */ 11856c223761SKevin Barnett 11866c223761SKevin Barnett #define VPD_PAGE (1 << 8) 11876c223761SKevin Barnett 11886c223761SKevin Barnett #pragma pack(1) 11896c223761SKevin Barnett 11906c223761SKevin Barnett /* structure for CISS_VPD_LV_STATUS */ 11916c223761SKevin Barnett struct ciss_vpd_logical_volume_status { 11926c223761SKevin Barnett u8 peripheral_info; 11936c223761SKevin Barnett u8 page_code; 11946c223761SKevin Barnett u8 reserved; 11956c223761SKevin Barnett u8 page_length; 11966c223761SKevin Barnett u8 volume_status; 11976c223761SKevin Barnett u8 reserved2[3]; 11986c223761SKevin Barnett __be32 flags; 11996c223761SKevin Barnett }; 12006c223761SKevin Barnett 12016c223761SKevin Barnett #pragma pack() 12026c223761SKevin Barnett 12036c223761SKevin Barnett /* constants for volume_status field of ciss_vpd_logical_volume_status */ 12046c223761SKevin Barnett #define CISS_LV_OK 0 12056c223761SKevin Barnett #define CISS_LV_FAILED 1 12066c223761SKevin Barnett #define CISS_LV_NOT_CONFIGURED 2 12076c223761SKevin Barnett #define CISS_LV_DEGRADED 3 12086c223761SKevin Barnett #define CISS_LV_READY_FOR_RECOVERY 4 12096c223761SKevin Barnett #define CISS_LV_UNDERGOING_RECOVERY 5 12106c223761SKevin Barnett #define CISS_LV_WRONG_PHYSICAL_DRIVE_REPLACED 6 12116c223761SKevin Barnett #define CISS_LV_PHYSICAL_DRIVE_CONNECTION_PROBLEM 7 12126c223761SKevin Barnett #define CISS_LV_HARDWARE_OVERHEATING 8 12136c223761SKevin Barnett #define CISS_LV_HARDWARE_HAS_OVERHEATED 9 12146c223761SKevin Barnett #define CISS_LV_UNDERGOING_EXPANSION 10 12156c223761SKevin Barnett #define CISS_LV_NOT_AVAILABLE 11 12166c223761SKevin Barnett #define CISS_LV_QUEUED_FOR_EXPANSION 12 12176c223761SKevin Barnett #define CISS_LV_DISABLED_SCSI_ID_CONFLICT 13 12186c223761SKevin Barnett #define CISS_LV_EJECTED 14 12196c223761SKevin Barnett #define CISS_LV_UNDERGOING_ERASE 15 12206c223761SKevin Barnett /* state 16 not used */ 12216c223761SKevin Barnett #define CISS_LV_READY_FOR_PREDICTIVE_SPARE_REBUILD 17 12226c223761SKevin Barnett #define CISS_LV_UNDERGOING_RPI 18 12236c223761SKevin Barnett #define CISS_LV_PENDING_RPI 19 12246c223761SKevin Barnett #define CISS_LV_ENCRYPTED_NO_KEY 20 12256c223761SKevin Barnett /* state 21 not used */ 12266c223761SKevin Barnett #define CISS_LV_UNDERGOING_ENCRYPTION 22 12276c223761SKevin Barnett #define CISS_LV_UNDERGOING_ENCRYPTION_REKEYING 23 12286c223761SKevin Barnett #define CISS_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER 24 12296c223761SKevin Barnett #define CISS_LV_PENDING_ENCRYPTION 25 12306c223761SKevin Barnett #define CISS_LV_PENDING_ENCRYPTION_REKEYING 26 12316c223761SKevin Barnett #define CISS_LV_NOT_SUPPORTED 27 12326c223761SKevin Barnett #define CISS_LV_STATUS_UNAVAILABLE 255 12336c223761SKevin Barnett 12346c223761SKevin Barnett /* constants for flags field of ciss_vpd_logical_volume_status */ 12356c223761SKevin Barnett #define CISS_LV_FLAGS_NO_HOST_IO 0x1 /* volume not available for */ 12366c223761SKevin Barnett /* host I/O */ 12376c223761SKevin Barnett 12386c223761SKevin Barnett /* for SAS hosts and SAS expanders */ 12396c223761SKevin Barnett struct pqi_sas_node { 12406c223761SKevin Barnett struct device *parent_dev; 12416c223761SKevin Barnett struct list_head port_list_head; 12426c223761SKevin Barnett }; 12436c223761SKevin Barnett 12446c223761SKevin Barnett struct pqi_sas_port { 12456c223761SKevin Barnett struct list_head port_list_entry; 12466c223761SKevin Barnett u64 sas_address; 12473d46a59aSDon Brace struct pqi_scsi_dev *device; 12486c223761SKevin Barnett struct sas_port *port; 12496c223761SKevin Barnett int next_phy_index; 12506c223761SKevin Barnett struct list_head phy_list_head; 12516c223761SKevin Barnett struct pqi_sas_node *parent_node; 12526c223761SKevin Barnett struct sas_rphy *rphy; 12536c223761SKevin Barnett }; 12546c223761SKevin Barnett 12556c223761SKevin Barnett struct pqi_sas_phy { 12566c223761SKevin Barnett struct list_head phy_list_entry; 12576c223761SKevin Barnett struct sas_phy *phy; 12586c223761SKevin Barnett struct pqi_sas_port *parent_port; 12596c223761SKevin Barnett bool added_to_port; 12606c223761SKevin Barnett }; 12616c223761SKevin Barnett 12626c223761SKevin Barnett struct pqi_io_request { 12636c223761SKevin Barnett atomic_t refcount; 12646c223761SKevin Barnett u16 index; 12656c223761SKevin Barnett void (*io_complete_callback)(struct pqi_io_request *io_request, 12666c223761SKevin Barnett void *context); 12676c223761SKevin Barnett void *context; 1268376fb880SKevin Barnett u8 raid_bypass : 1; 12696c223761SKevin Barnett int status; 1270376fb880SKevin Barnett struct pqi_queue_group *queue_group; 12716c223761SKevin Barnett struct scsi_cmnd *scmd; 12726c223761SKevin Barnett void *error_info; 12736c223761SKevin Barnett struct pqi_sg_descriptor *sg_chain_buffer; 12746c223761SKevin Barnett dma_addr_t sg_chain_buffer_dma_handle; 12756c223761SKevin Barnett void *iu; 12766c223761SKevin Barnett struct list_head request_list_entry; 12776c223761SKevin Barnett }; 12786c223761SKevin Barnett 12794fd22c13SMahesh Rajashekhara #define PQI_NUM_SUPPORTED_EVENTS 7 12806c223761SKevin Barnett 12816c223761SKevin Barnett struct pqi_event { 12826c223761SKevin Barnett bool pending; 12836c223761SKevin Barnett u8 event_type; 128406b41e0dSKevin Barnett u16 event_id; 128506b41e0dSKevin Barnett u32 additional_event_id; 12866c223761SKevin Barnett }; 12876c223761SKevin Barnett 12885e6429dfSKevin Barnett #define PQI_RESERVED_IO_SLOTS_LUN_RESET 1 12895e6429dfSKevin Barnett #define PQI_RESERVED_IO_SLOTS_EVENT_ACK PQI_NUM_SUPPORTED_EVENTS 12905e6429dfSKevin Barnett #define PQI_RESERVED_IO_SLOTS_SYNCHRONOUS_REQUESTS 3 12915e6429dfSKevin Barnett #define PQI_RESERVED_IO_SLOTS \ 12925e6429dfSKevin Barnett (PQI_RESERVED_IO_SLOTS_LUN_RESET + PQI_RESERVED_IO_SLOTS_EVENT_ACK + \ 12935e6429dfSKevin Barnett PQI_RESERVED_IO_SLOTS_SYNCHRONOUS_REQUESTS) 12945e6429dfSKevin Barnett 12952708a256SKevin Barnett #define PQI_CTRL_PRODUCT_ID_GEN1 0 12962708a256SKevin Barnett #define PQI_CTRL_PRODUCT_ID_GEN2 7 12972708a256SKevin Barnett #define PQI_CTRL_PRODUCT_REVISION_A 0 12982708a256SKevin Barnett #define PQI_CTRL_PRODUCT_REVISION_B 1 12992708a256SKevin Barnett 1300331f7e99SSagar Biradar enum pqi_ctrl_removal_state { 1301331f7e99SSagar Biradar PQI_CTRL_PRESENT = 0, 1302331f7e99SSagar Biradar PQI_CTRL_GRACEFUL_REMOVAL, 1303331f7e99SSagar Biradar PQI_CTRL_SURPRISE_REMOVAL 1304331f7e99SSagar Biradar }; 1305331f7e99SSagar Biradar 13066c223761SKevin Barnett struct pqi_ctrl_info { 13076c223761SKevin Barnett unsigned int ctrl_id; 13086c223761SKevin Barnett struct pci_dev *pci_dev; 1309598bef8dSKevin Barnett char firmware_version[32]; 13106d90615fSMurthy Bhat char serial_number[17]; 13116d90615fSMurthy Bhat char model[17]; 13126d90615fSMurthy Bhat char vendor[9]; 13132708a256SKevin Barnett u8 product_id; 13142708a256SKevin Barnett u8 product_revision; 13156c223761SKevin Barnett void __iomem *iomem_base; 13166c223761SKevin Barnett struct pqi_ctrl_registers __iomem *registers; 13176c223761SKevin Barnett struct pqi_device_registers __iomem *pqi_registers; 13186c223761SKevin Barnett u32 max_sg_entries; 13196c223761SKevin Barnett u32 config_table_offset; 13206c223761SKevin Barnett u32 config_table_length; 13216c223761SKevin Barnett u16 max_inbound_queues; 13226c223761SKevin Barnett u16 max_elements_per_iq; 13236c223761SKevin Barnett u16 max_iq_element_length; 13246c223761SKevin Barnett u16 max_outbound_queues; 13256c223761SKevin Barnett u16 max_elements_per_oq; 13266c223761SKevin Barnett u16 max_oq_element_length; 13276c223761SKevin Barnett u32 max_transfer_size; 13286c223761SKevin Barnett u32 max_outstanding_requests; 13296c223761SKevin Barnett u32 max_io_slots; 13306c223761SKevin Barnett unsigned int scsi_ml_can_queue; 13316c223761SKevin Barnett unsigned short sg_tablesize; 13326c223761SKevin Barnett unsigned int max_sectors; 13336c223761SKevin Barnett u32 error_buffer_length; 13346c223761SKevin Barnett void *error_buffer; 13356c223761SKevin Barnett dma_addr_t error_buffer_dma_handle; 13366c223761SKevin Barnett size_t sg_chain_buffer_length; 13376c223761SKevin Barnett unsigned int num_queue_groups; 13386c223761SKevin Barnett u16 num_elements_per_iq; 13396c223761SKevin Barnett u16 num_elements_per_oq; 13406c223761SKevin Barnett u16 max_inbound_iu_length_per_firmware; 13416c223761SKevin Barnett u16 max_inbound_iu_length; 13426c223761SKevin Barnett unsigned int max_sg_per_iu; 13436702d2c4SDon Brace unsigned int max_sg_per_r56_iu; 13446c223761SKevin Barnett void *admin_queue_memory_base; 13456c223761SKevin Barnett u32 admin_queue_memory_length; 13466c223761SKevin Barnett dma_addr_t admin_queue_memory_base_dma_handle; 13476c223761SKevin Barnett void *queue_memory_base; 13486c223761SKevin Barnett u32 queue_memory_length; 13496c223761SKevin Barnett dma_addr_t queue_memory_base_dma_handle; 13506c223761SKevin Barnett struct pqi_admin_queues admin_queues; 13516c223761SKevin Barnett struct pqi_queue_group queue_groups[PQI_MAX_QUEUE_GROUPS]; 13526c223761SKevin Barnett struct pqi_event_queue event_queue; 1353061ef06aSKevin Barnett enum pqi_irq_mode irq_mode; 13546c223761SKevin Barnett int max_msix_vectors; 13556c223761SKevin Barnett int num_msix_vectors_enabled; 13566c223761SKevin Barnett int num_msix_vectors_initialized; 13576c223761SKevin Barnett int event_irq; 13586c223761SKevin Barnett struct Scsi_Host *scsi_host; 13596c223761SKevin Barnett 13606c223761SKevin Barnett struct mutex scan_mutex; 13617561a7e4SKevin Barnett struct mutex lun_reset_mutex; 13627561a7e4SKevin Barnett bool controller_online; 13637561a7e4SKevin Barnett bool block_requests; 13649fa82023SKevin Barnett bool scan_blocked; 13656c223761SKevin Barnett u8 inbound_spanning_supported : 1; 13666c223761SKevin Barnett u8 outbound_spanning_supported : 1; 13676c223761SKevin Barnett u8 pqi_mode_enabled : 1; 1368336b6819SKevin Barnett u8 pqi_reset_quiesce_supported : 1; 13694fd22c13SMahesh Rajashekhara u8 soft_reset_handshake_supported : 1; 137021432010Skoshyaji u8 raid_iu_timeout_supported : 1; 1371c2922f17SMurthy Bhat u8 tmf_iu_timeout_supported : 1; 13725d1f03e6SMurthy Bhat u8 firmware_triage_supported : 1; 137328ca6d87SMike McGowen u8 rpl_extended_format_4_5_supported : 1; 1374904f2bfdSKumar Meiyappan u8 multi_lun_device_supported : 1; 1375058311b7SMurthy Bhat u8 ctrl_logging_supported : 1; 13767a012c23SDon Brace u8 enable_r1_writes : 1; 13776702d2c4SDon Brace u8 enable_r5_writes : 1; 13786702d2c4SDon Brace u8 enable_r6_writes : 1; 1379f6cc2a77SKevin Barnett u8 lv_drive_type_mix_valid : 1; 1380c7ffedb3SDon Brace u8 enable_stream_detection : 1; 1381cf15c3e7SMike McGowen u8 disable_managed_interrupts : 1; 1382f6cc2a77SKevin Barnett u8 ciss_report_log_flags; 1383f6cc2a77SKevin Barnett u32 max_transfer_encrypted_sas_sata; 1384f6cc2a77SKevin Barnett u32 max_transfer_encrypted_nvme; 1385f6cc2a77SKevin Barnett u32 max_write_raid_5_6; 1386f6cc2a77SKevin Barnett u32 max_write_raid_1_10_2drive; 1387f6cc2a77SKevin Barnett u32 max_write_raid_1_10_3drive; 1388d2c7583fSDon Brace int numa_node; 13896c223761SKevin Barnett 13906c223761SKevin Barnett struct list_head scsi_device_list; 13916c223761SKevin Barnett spinlock_t scsi_device_list_lock; 13926c223761SKevin Barnett 13936c223761SKevin Barnett struct delayed_work rescan_work; 13946c223761SKevin Barnett struct delayed_work update_time_work; 13956c223761SKevin Barnett 13966c223761SKevin Barnett struct pqi_sas_node *sas_host; 13976c223761SKevin Barnett u64 sas_address; 13986c223761SKevin Barnett 13996c223761SKevin Barnett struct pqi_io_request *io_request_pool; 14006a50d6adSKevin Barnett struct pqi_event events[PQI_NUM_SUPPORTED_EVENTS]; 14016c223761SKevin Barnett struct work_struct event_work; 14026c223761SKevin Barnett 14036c223761SKevin Barnett atomic_t num_interrupts; 14046c223761SKevin Barnett int previous_num_interrupts; 140598f87667SKevin Barnett u32 previous_heartbeat_count; 140698f87667SKevin Barnett __le32 __iomem *heartbeat_counter; 14074fd22c13SMahesh Rajashekhara u8 __iomem *soft_reset_status; 14086c223761SKevin Barnett struct timer_list heartbeat_timer; 14095f310425SKevin Barnett struct work_struct ctrl_offline_work; 14106c223761SKevin Barnett 14116c223761SKevin Barnett struct semaphore sync_request_sem; 14127561a7e4SKevin Barnett atomic_t num_busy_threads; 14137561a7e4SKevin Barnett atomic_t num_blocked_threads; 14147561a7e4SKevin Barnett wait_queue_head_t block_requests_wait; 1415376fb880SKevin Barnett 14162790cd4dSKevin Barnett struct mutex ofa_mutex; 14172790cd4dSKevin Barnett struct work_struct ofa_memory_alloc_work; 14182790cd4dSKevin Barnett struct work_struct ofa_quiesce_work; 14192790cd4dSKevin Barnett u32 ofa_bytes_requested; 14202790cd4dSKevin Barnett u16 ofa_cancel_reason; 1421058311b7SMurthy Bhat struct pqi_host_memory_descriptor ofa_memory; 1422058311b7SMurthy Bhat struct pqi_host_memory_descriptor ctrl_log_memory; 1423331f7e99SSagar Biradar enum pqi_ctrl_removal_state ctrl_removal_state; 14246c223761SKevin Barnett }; 14256c223761SKevin Barnett 1426ff6abb73SKevin Barnett enum pqi_ctrl_mode { 1427162d7753SKevin Barnett SIS_MODE = 0, 1428ff6abb73SKevin Barnett PQI_MODE 1429ff6abb73SKevin Barnett }; 1430ff6abb73SKevin Barnett 14316c223761SKevin Barnett /* 14326c223761SKevin Barnett * assume worst case: SATA queue depth of 31 minus 4 internal firmware commands 14336c223761SKevin Barnett */ 14346c223761SKevin Barnett #define PQI_PHYSICAL_DISK_DEFAULT_MAX_QUEUE_DEPTH 27 14356c223761SKevin Barnett 14366c223761SKevin Barnett /* CISS commands */ 14376c223761SKevin Barnett #define CISS_READ 0xc0 14386c223761SKevin Barnett #define CISS_REPORT_LOG 0xc2 /* Report Logical LUNs */ 14396c223761SKevin Barnett #define CISS_REPORT_PHYS 0xc3 /* Report Physical LUNs */ 14406c223761SKevin Barnett #define CISS_GET_RAID_MAP 0xc8 14416c223761SKevin Barnett 14426c223761SKevin Barnett /* BMIC commands */ 14436c223761SKevin Barnett #define BMIC_IDENTIFY_CONTROLLER 0x11 14446c223761SKevin Barnett #define BMIC_IDENTIFY_PHYSICAL_DEVICE 0x15 14456c223761SKevin Barnett #define BMIC_READ 0x26 14466c223761SKevin Barnett #define BMIC_WRITE 0x27 1447f6cc2a77SKevin Barnett #define BMIC_SENSE_FEATURE 0x61 14486c223761SKevin Barnett #define BMIC_SENSE_CONTROLLER_PARAMETERS 0x64 14496c223761SKevin Barnett #define BMIC_SENSE_SUBSYSTEM_INFORMATION 0x66 14503d46a59aSDon Brace #define BMIC_CSMI_PASSTHRU 0x68 14516c223761SKevin Barnett #define BMIC_WRITE_HOST_WELLNESS 0xa5 145258322fe0SKevin Barnett #define BMIC_FLUSH_CACHE 0xc2 1453171c2865SDave Carroll #define BMIC_SET_DIAG_OPTIONS 0xf4 1454171c2865SDave Carroll #define BMIC_SENSE_DIAG_OPTIONS 0xf5 14556c223761SKevin Barnett 1456694c5d5bSKevin Barnett #define CSMI_CC_SAS_SMP_PASSTHRU 0x17 14573d46a59aSDon Brace 145858322fe0SKevin Barnett #define SA_FLUSH_CACHE 0x1 14596c223761SKevin Barnett 14606c223761SKevin Barnett #define MASKED_DEVICE(lunid) ((lunid)[3] & 0xc0) 1461bd10cf0bSKevin Barnett #define CISS_GET_LEVEL_2_BUS(lunid) ((lunid)[7] & 0x3f) 14626c223761SKevin Barnett #define CISS_GET_LEVEL_2_TARGET(lunid) ((lunid)[6]) 14636c223761SKevin Barnett #define CISS_GET_DRIVE_NUMBER(lunid) \ 1464bd10cf0bSKevin Barnett (((CISS_GET_LEVEL_2_BUS((lunid)) - 1) << 8) + \ 14656c223761SKevin Barnett CISS_GET_LEVEL_2_TARGET((lunid))) 14666c223761SKevin Barnett 1467f6cc2a77SKevin Barnett #define LV_GET_DRIVE_TYPE_MIX(lunid) ((lunid)[6]) 1468f6cc2a77SKevin Barnett 1469f6cc2a77SKevin Barnett #define LV_DRIVE_TYPE_MIX_UNKNOWN 0 1470f6cc2a77SKevin Barnett #define LV_DRIVE_TYPE_MIX_NO_RESTRICTION 1 1471f6cc2a77SKevin Barnett #define LV_DRIVE_TYPE_MIX_SAS_HDD_ONLY 2 1472f6cc2a77SKevin Barnett #define LV_DRIVE_TYPE_MIX_SATA_HDD_ONLY 3 1473f6cc2a77SKevin Barnett #define LV_DRIVE_TYPE_MIX_SAS_OR_SATA_SSD_ONLY 4 1474f6cc2a77SKevin Barnett #define LV_DRIVE_TYPE_MIX_SAS_SSD_ONLY 5 1475f6cc2a77SKevin Barnett #define LV_DRIVE_TYPE_MIX_SATA_SSD_ONLY 6 1476f6cc2a77SKevin Barnett #define LV_DRIVE_TYPE_MIX_SAS_ONLY 7 1477f6cc2a77SKevin Barnett #define LV_DRIVE_TYPE_MIX_SATA_ONLY 8 1478f6cc2a77SKevin Barnett #define LV_DRIVE_TYPE_MIX_NVME_ONLY 9 1479f6cc2a77SKevin Barnett 14806c223761SKevin Barnett #define NO_TIMEOUT ((unsigned long) -1) 14816c223761SKevin Barnett 14826c223761SKevin Barnett #pragma pack(1) 14836c223761SKevin Barnett 14846c223761SKevin Barnett struct bmic_identify_controller { 14856c223761SKevin Barnett u8 configured_logical_drive_count; 14866c223761SKevin Barnett __le32 configuration_signature; 1487598bef8dSKevin Barnett u8 firmware_version_short[4]; 14886c223761SKevin Barnett u8 reserved[145]; 14896c223761SKevin Barnett __le16 extended_logical_unit_count; 14906c223761SKevin Barnett u8 reserved1[34]; 14916c223761SKevin Barnett __le16 firmware_build_number; 14926d90615fSMurthy Bhat u8 reserved2[8]; 14936d90615fSMurthy Bhat u8 vendor_id[8]; 14946d90615fSMurthy Bhat u8 product_id[16]; 1495598bef8dSKevin Barnett u8 reserved3[62]; 1496598bef8dSKevin Barnett __le32 extra_controller_flags; 1497598bef8dSKevin Barnett u8 reserved4[2]; 14986c223761SKevin Barnett u8 controller_mode; 1499598bef8dSKevin Barnett u8 spare_part_number[32]; 1500598bef8dSKevin Barnett u8 firmware_version_long[32]; 15016d90615fSMurthy Bhat }; 15026d90615fSMurthy Bhat 1503598bef8dSKevin Barnett /* constants for extra_controller_flags field of bmic_identify_controller */ 1504598bef8dSKevin Barnett #define BMIC_IDENTIFY_EXTRA_FLAGS_LONG_FW_VERSION_SUPPORTED 0x20000000 1505598bef8dSKevin Barnett 15066d90615fSMurthy Bhat struct bmic_sense_subsystem_info { 15076d90615fSMurthy Bhat u8 reserved[44]; 15086d90615fSMurthy Bhat u8 ctrl_serial_number[16]; 15096c223761SKevin Barnett }; 15106c223761SKevin Barnett 1511694c5d5bSKevin Barnett /* constants for device_type field */ 1512694c5d5bSKevin Barnett #define SA_DEVICE_TYPE_SATA 0x1 1513694c5d5bSKevin Barnett #define SA_DEVICE_TYPE_SAS 0x2 1514694c5d5bSKevin Barnett #define SA_DEVICE_TYPE_EXPANDER_SMP 0x5 1515ce143793SKevin Barnett #define SA_DEVICE_TYPE_SES 0x6 1516694c5d5bSKevin Barnett #define SA_DEVICE_TYPE_CONTROLLER 0x7 1517694c5d5bSKevin Barnett #define SA_DEVICE_TYPE_NVME 0x9 15183d46a59aSDon Brace 15196c223761SKevin Barnett struct bmic_identify_physical_device { 15206c223761SKevin Barnett u8 scsi_bus; /* SCSI Bus number on controller */ 15216c223761SKevin Barnett u8 scsi_id; /* SCSI ID on this bus */ 15226c223761SKevin Barnett __le16 block_size; /* sector size in bytes */ 15236c223761SKevin Barnett __le32 total_blocks; /* number for sectors on drive */ 15246c223761SKevin Barnett __le32 reserved_blocks; /* controller reserved (RIS) */ 15256c223761SKevin Barnett u8 model[40]; /* Physical Drive Model */ 15266c223761SKevin Barnett u8 serial_number[40]; /* Drive Serial Number */ 15276c223761SKevin Barnett u8 firmware_revision[8]; /* drive firmware revision */ 15286c223761SKevin Barnett u8 scsi_inquiry_bits; /* inquiry byte 7 bits */ 15296c223761SKevin Barnett u8 compaq_drive_stamp; /* 0 means drive not stamped */ 15306c223761SKevin Barnett u8 last_failure_reason; 15316c223761SKevin Barnett u8 flags; 15326c223761SKevin Barnett u8 more_flags; 15336c223761SKevin Barnett u8 scsi_lun; /* SCSI LUN for phys drive */ 15346c223761SKevin Barnett u8 yet_more_flags; 15356c223761SKevin Barnett u8 even_more_flags; 15366c223761SKevin Barnett __le32 spi_speed_rules; 15376c223761SKevin Barnett u8 phys_connector[2]; /* connector number on controller */ 15386c223761SKevin Barnett u8 phys_box_on_bus; /* phys enclosure this drive resides */ 15396c223761SKevin Barnett u8 phys_bay_in_box; /* phys drv bay this drive resides */ 15406c223761SKevin Barnett __le32 rpm; /* drive rotational speed in RPM */ 15416c223761SKevin Barnett u8 device_type; /* type of drive */ 15426c223761SKevin Barnett u8 sata_version; /* only valid when device_type = */ 1543694c5d5bSKevin Barnett /* SA_DEVICE_TYPE_SATA */ 15446c223761SKevin Barnett __le64 big_total_block_count; 15456c223761SKevin Barnett __le64 ris_starting_lba; 15466c223761SKevin Barnett __le32 ris_size; 15476c223761SKevin Barnett u8 wwid[20]; 15486c223761SKevin Barnett u8 controller_phy_map[32]; 15496c223761SKevin Barnett __le16 phy_count; 15506c223761SKevin Barnett u8 phy_connected_dev_type[256]; 15516c223761SKevin Barnett u8 phy_to_drive_bay_num[256]; 15526c223761SKevin Barnett __le16 phy_to_attached_dev_index[256]; 15536c223761SKevin Barnett u8 box_index; 15546c223761SKevin Barnett u8 reserved; 15556c223761SKevin Barnett __le16 extra_physical_drive_flags; 15566c223761SKevin Barnett u8 negotiated_link_rate[256]; 15576c223761SKevin Barnett u8 phy_to_phy_map[256]; 15586c223761SKevin Barnett u8 redundant_path_present_map; 15596c223761SKevin Barnett u8 redundant_path_failure_map; 15606c223761SKevin Barnett u8 active_path_number; 15616c223761SKevin Barnett __le16 alternate_paths_phys_connector[8]; 15626c223761SKevin Barnett u8 alternate_paths_phys_box_on_port[8]; 15636c223761SKevin Barnett u8 multi_lun_device_lun_count; 15646c223761SKevin Barnett u8 minimum_good_fw_revision[8]; 15656c223761SKevin Barnett u8 unique_inquiry_bytes[20]; 15661be42f46SKevin Barnett u8 current_temperature_degrees; 15671be42f46SKevin Barnett u8 temperature_threshold_degrees; 15681be42f46SKevin Barnett u8 max_temperature_degrees; 15696c223761SKevin Barnett u8 logical_blocks_per_phys_block_exp; 15706c223761SKevin Barnett __le16 current_queue_depth_limit; 15716c223761SKevin Barnett u8 switch_name[10]; 15726c223761SKevin Barnett __le16 switch_port; 15736c223761SKevin Barnett u8 alternate_paths_switch_name[40]; 15746c223761SKevin Barnett u8 alternate_paths_switch_port[8]; 15756c223761SKevin Barnett __le16 power_on_hours; 15766c223761SKevin Barnett __le16 percent_endurance_used; 15776c223761SKevin Barnett u8 drive_authentication; 15786c223761SKevin Barnett u8 smart_carrier_authentication; 15796c223761SKevin Barnett u8 smart_carrier_app_fw_version; 15806c223761SKevin Barnett u8 smart_carrier_bootloader_fw_version; 15811be42f46SKevin Barnett u8 sanitize_flags; 15821be42f46SKevin Barnett u8 encryption_key_flags; 15836c223761SKevin Barnett u8 encryption_key_name[64]; 15846c223761SKevin Barnett __le32 misc_drive_flags; 15856c223761SKevin Barnett __le16 dek_index; 15861be42f46SKevin Barnett __le16 hba_drive_encryption_flags; 15871be42f46SKevin Barnett __le16 max_overwrite_time; 15881be42f46SKevin Barnett __le16 max_block_erase_time; 15891be42f46SKevin Barnett __le16 max_crypto_erase_time; 15901be42f46SKevin Barnett u8 connector_info[5]; 15911be42f46SKevin Barnett u8 connector_name[8][8]; 15921be42f46SKevin Barnett u8 page_83_identifier[16]; 15931be42f46SKevin Barnett u8 maximum_link_rate[256]; 15941be42f46SKevin Barnett u8 negotiated_physical_link_rate[256]; 15951be42f46SKevin Barnett u8 box_connector_name[8]; 15961be42f46SKevin Barnett u8 padding_to_multiple_of_512[9]; 15976c223761SKevin Barnett }; 15986c223761SKevin Barnett 1599f6cc2a77SKevin Barnett #define BMIC_SENSE_FEATURE_IO_PAGE 0x8 1600f6cc2a77SKevin Barnett #define BMIC_SENSE_FEATURE_IO_PAGE_AIO_SUBPAGE 0x2 1601f6cc2a77SKevin Barnett 1602f6cc2a77SKevin Barnett struct bmic_sense_feature_buffer_header { 1603f6cc2a77SKevin Barnett u8 page_code; 1604f6cc2a77SKevin Barnett u8 subpage_code; 1605f6cc2a77SKevin Barnett __le16 buffer_length; 1606f6cc2a77SKevin Barnett }; 1607f6cc2a77SKevin Barnett 1608f6cc2a77SKevin Barnett struct bmic_sense_feature_page_header { 1609f6cc2a77SKevin Barnett u8 page_code; 1610f6cc2a77SKevin Barnett u8 subpage_code; 1611f6cc2a77SKevin Barnett __le16 page_length; 1612f6cc2a77SKevin Barnett }; 1613f6cc2a77SKevin Barnett 1614f6cc2a77SKevin Barnett struct bmic_sense_feature_io_page_aio_subpage { 1615f6cc2a77SKevin Barnett struct bmic_sense_feature_page_header header; 1616f6cc2a77SKevin Barnett u8 firmware_read_support; 1617f6cc2a77SKevin Barnett u8 driver_read_support; 1618f6cc2a77SKevin Barnett u8 firmware_write_support; 1619f6cc2a77SKevin Barnett u8 driver_write_support; 1620f6cc2a77SKevin Barnett __le16 max_transfer_encrypted_sas_sata; 1621f6cc2a77SKevin Barnett __le16 max_transfer_encrypted_nvme; 1622f6cc2a77SKevin Barnett __le16 max_write_raid_5_6; 1623f6cc2a77SKevin Barnett __le16 max_write_raid_1_10_2drive; 1624f6cc2a77SKevin Barnett __le16 max_write_raid_1_10_3drive; 1625f6cc2a77SKevin Barnett }; 1626f6cc2a77SKevin Barnett 16273d46a59aSDon Brace struct bmic_smp_request { 16283d46a59aSDon Brace u8 frame_type; 16293d46a59aSDon Brace u8 function; 16303d46a59aSDon Brace u8 allocated_response_length; 16313d46a59aSDon Brace u8 request_length; 16323d46a59aSDon Brace u8 additional_request_bytes[1016]; 16333d46a59aSDon Brace }; 16343d46a59aSDon Brace 16353d46a59aSDon Brace struct bmic_smp_response { 16363d46a59aSDon Brace u8 frame_type; 16373d46a59aSDon Brace u8 function; 16383d46a59aSDon Brace u8 function_result; 16393d46a59aSDon Brace u8 response_length; 16403d46a59aSDon Brace u8 additional_response_bytes[1016]; 16413d46a59aSDon Brace }; 16423d46a59aSDon Brace 16433d46a59aSDon Brace struct bmic_csmi_ioctl_header { 16443d46a59aSDon Brace __le32 header_length; 16453d46a59aSDon Brace u8 signature[8]; 16463d46a59aSDon Brace __le32 timeout; 16473d46a59aSDon Brace __le32 control_code; 16483d46a59aSDon Brace __le32 return_code; 16493d46a59aSDon Brace __le32 length; 16503d46a59aSDon Brace }; 16513d46a59aSDon Brace 16523d46a59aSDon Brace struct bmic_csmi_smp_passthru { 16533d46a59aSDon Brace u8 phy_identifier; 16543d46a59aSDon Brace u8 port_identifier; 16553d46a59aSDon Brace u8 connection_rate; 16563d46a59aSDon Brace u8 reserved; 16573d46a59aSDon Brace __be64 destination_sas_address; 16583d46a59aSDon Brace __le32 request_length; 16593d46a59aSDon Brace struct bmic_smp_request request; 16603d46a59aSDon Brace u8 connection_status; 16613d46a59aSDon Brace u8 reserved1[3]; 16623d46a59aSDon Brace __le32 response_length; 16633d46a59aSDon Brace struct bmic_smp_response response; 16643d46a59aSDon Brace }; 16653d46a59aSDon Brace 16663d46a59aSDon Brace struct bmic_csmi_smp_passthru_buffer { 16673d46a59aSDon Brace struct bmic_csmi_ioctl_header ioctl_header; 16683d46a59aSDon Brace struct bmic_csmi_smp_passthru parameters; 16693d46a59aSDon Brace }; 16703d46a59aSDon Brace 167158322fe0SKevin Barnett struct bmic_flush_cache { 167258322fe0SKevin Barnett u8 disable_flag; 167358322fe0SKevin Barnett u8 system_power_action; 167458322fe0SKevin Barnett u8 ndu_flush; 167558322fe0SKevin Barnett u8 shutdown_event; 167658322fe0SKevin Barnett u8 reserved[28]; 167758322fe0SKevin Barnett }; 167858322fe0SKevin Barnett 167958322fe0SKevin Barnett /* for shutdown_event member of struct bmic_flush_cache */ 168058322fe0SKevin Barnett enum bmic_flush_cache_shutdown_event { 168158322fe0SKevin Barnett NONE_CACHE_FLUSH_ONLY = 0, 168258322fe0SKevin Barnett SHUTDOWN = 1, 168358322fe0SKevin Barnett HIBERNATE = 2, 168458322fe0SKevin Barnett SUSPEND = 3, 168558322fe0SKevin Barnett RESTART = 4 168658322fe0SKevin Barnett }; 168758322fe0SKevin Barnett 1688171c2865SDave Carroll struct bmic_diag_options { 1689171c2865SDave Carroll __le32 options; 1690171c2865SDave Carroll }; 1691171c2865SDave Carroll 16926c223761SKevin Barnett #pragma pack() 16936c223761SKevin Barnett 1694694c5d5bSKevin Barnett static inline struct pqi_ctrl_info *shost_to_hba(struct Scsi_Host *shost) 16953d46a59aSDon Brace { 1696694c5d5bSKevin Barnett void *hostdata = shost_priv(shost); 16973d46a59aSDon Brace 1698694c5d5bSKevin Barnett return *((struct pqi_ctrl_info **)hostdata); 16990530736eSKevin Barnett } 17000530736eSKevin Barnett 17013d46a59aSDon Brace void pqi_sas_smp_handler(struct bsg_job *job, struct Scsi_Host *shost, 17023d46a59aSDon Brace struct sas_rphy *rphy); 17033d46a59aSDon Brace 17046c223761SKevin Barnett int pqi_add_sas_host(struct Scsi_Host *shost, struct pqi_ctrl_info *ctrl_info); 17056c223761SKevin Barnett void pqi_delete_sas_host(struct pqi_ctrl_info *ctrl_info); 17066c223761SKevin Barnett int pqi_add_sas_device(struct pqi_sas_node *pqi_sas_node, 17076c223761SKevin Barnett struct pqi_scsi_dev *device); 17086c223761SKevin Barnett void pqi_remove_sas_device(struct pqi_scsi_dev *device); 17096c223761SKevin Barnett struct pqi_scsi_dev *pqi_find_device_by_sas_rphy( 17106c223761SKevin Barnett struct pqi_ctrl_info *ctrl_info, struct sas_rphy *rphy); 17117561a7e4SKevin Barnett void pqi_prep_for_scsi_done(struct scsi_cmnd *scmd); 17123d46a59aSDon Brace int pqi_csmi_smp_passthru(struct pqi_ctrl_info *ctrl_info, 17133d46a59aSDon Brace struct bmic_csmi_smp_passthru_buffer *buffer, size_t buffer_length, 17143d46a59aSDon Brace struct pqi_raid_error_info *error_info); 17156c223761SKevin Barnett 17166c223761SKevin Barnett extern struct sas_function_template pqi_sas_transport_functions; 17176c223761SKevin Barnett 17186c223761SKevin Barnett #endif /* _SMARTPQI_H */ 1719