1 /* 2 * QLogic Fibre Channel HBA Driver 3 * Copyright (c) 2003-2013 QLogic Corporation 4 * 5 * See LICENSE.qla2xxx for copyright and licensing details. 6 */ 7 #include "qla_def.h" 8 #include <linux/delay.h> 9 #include <linux/pci.h> 10 #include <linux/ratelimit.h> 11 #include <linux/vmalloc.h> 12 #include <scsi/scsi_tcq.h> 13 #include <linux/utsname.h> 14 15 16 /* QLAFX00 specific Mailbox implementation functions */ 17 18 /* 19 * qlafx00_mailbox_command 20 * Issue mailbox command and waits for completion. 21 * 22 * Input: 23 * ha = adapter block pointer. 24 * mcp = driver internal mbx struct pointer. 25 * 26 * Output: 27 * mb[MAX_MAILBOX_REGISTER_COUNT] = returned mailbox data. 28 * 29 * Returns: 30 * 0 : QLA_SUCCESS = cmd performed success 31 * 1 : QLA_FUNCTION_FAILED (error encountered) 32 * 6 : QLA_FUNCTION_TIMEOUT (timeout condition encountered) 33 * 34 * Context: 35 * Kernel context. 36 */ 37 static int 38 qlafx00_mailbox_command(scsi_qla_host_t *vha, struct mbx_cmd_32 *mcp) 39 40 { 41 int rval; 42 unsigned long flags = 0; 43 device_reg_t __iomem *reg; 44 uint8_t abort_active; 45 uint8_t io_lock_on; 46 uint16_t command = 0; 47 uint32_t *iptr; 48 uint32_t __iomem *optr; 49 uint32_t cnt; 50 uint32_t mboxes; 51 unsigned long wait_time; 52 struct qla_hw_data *ha = vha->hw; 53 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); 54 55 if (ha->pdev->error_state > pci_channel_io_frozen) { 56 ql_log(ql_log_warn, vha, 0x115c, 57 "error_state is greater than pci_channel_io_frozen, " 58 "exiting.\n"); 59 return QLA_FUNCTION_TIMEOUT; 60 } 61 62 if (vha->device_flags & DFLG_DEV_FAILED) { 63 ql_log(ql_log_warn, vha, 0x115f, 64 "Device in failed state, exiting.\n"); 65 return QLA_FUNCTION_TIMEOUT; 66 } 67 68 reg = ha->iobase; 69 io_lock_on = base_vha->flags.init_done; 70 71 rval = QLA_SUCCESS; 72 abort_active = test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags); 73 74 if (ha->flags.pci_channel_io_perm_failure) { 75 ql_log(ql_log_warn, vha, 0x1175, 76 "Perm failure on EEH timeout MBX, exiting.\n"); 77 return QLA_FUNCTION_TIMEOUT; 78 } 79 80 if (ha->flags.isp82xx_fw_hung) { 81 /* Setting Link-Down error */ 82 mcp->mb[0] = MBS_LINK_DOWN_ERROR; 83 ql_log(ql_log_warn, vha, 0x1176, 84 "FW hung = %d.\n", ha->flags.isp82xx_fw_hung); 85 rval = QLA_FUNCTION_FAILED; 86 goto premature_exit; 87 } 88 89 /* 90 * Wait for active mailbox commands to finish by waiting at most tov 91 * seconds. This is to serialize actual issuing of mailbox cmds during 92 * non ISP abort time. 93 */ 94 if (!wait_for_completion_timeout(&ha->mbx_cmd_comp, mcp->tov * HZ)) { 95 /* Timeout occurred. Return error. */ 96 ql_log(ql_log_warn, vha, 0x1177, 97 "Cmd access timeout, cmd=0x%x, Exiting.\n", 98 mcp->mb[0]); 99 return QLA_FUNCTION_TIMEOUT; 100 } 101 102 ha->flags.mbox_busy = 1; 103 /* Save mailbox command for debug */ 104 ha->mcp32 = mcp; 105 106 ql_dbg(ql_dbg_mbx, vha, 0x1178, 107 "Prepare to issue mbox cmd=0x%x.\n", mcp->mb[0]); 108 109 spin_lock_irqsave(&ha->hardware_lock, flags); 110 111 /* Load mailbox registers. */ 112 optr = (uint32_t __iomem *)®->ispfx00.mailbox0; 113 114 iptr = mcp->mb; 115 command = mcp->mb[0]; 116 mboxes = mcp->out_mb; 117 118 for (cnt = 0; cnt < ha->mbx_count; cnt++) { 119 if (mboxes & BIT_0) 120 WRT_REG_DWORD(optr, *iptr); 121 122 mboxes >>= 1; 123 optr++; 124 iptr++; 125 } 126 127 /* Issue set host interrupt command to send cmd out. */ 128 ha->flags.mbox_int = 0; 129 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags); 130 131 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1172, 132 (uint8_t *)mcp->mb, 16); 133 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1173, 134 ((uint8_t *)mcp->mb + 0x10), 16); 135 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1174, 136 ((uint8_t *)mcp->mb + 0x20), 8); 137 138 /* Unlock mbx registers and wait for interrupt */ 139 ql_dbg(ql_dbg_mbx, vha, 0x1179, 140 "Going to unlock irq & waiting for interrupts. " 141 "jiffies=%lx.\n", jiffies); 142 143 /* Wait for mbx cmd completion until timeout */ 144 if ((!abort_active && io_lock_on) || IS_NOPOLLING_TYPE(ha)) { 145 set_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags); 146 147 QLAFX00_SET_HST_INTR(ha, ha->mbx_intr_code); 148 spin_unlock_irqrestore(&ha->hardware_lock, flags); 149 150 wait_for_completion_timeout(&ha->mbx_intr_comp, mcp->tov * HZ); 151 } else { 152 ql_dbg(ql_dbg_mbx, vha, 0x112c, 153 "Cmd=%x Polling Mode.\n", command); 154 155 QLAFX00_SET_HST_INTR(ha, ha->mbx_intr_code); 156 spin_unlock_irqrestore(&ha->hardware_lock, flags); 157 158 wait_time = jiffies + mcp->tov * HZ; /* wait at most tov secs */ 159 while (!ha->flags.mbox_int) { 160 if (time_after(jiffies, wait_time)) 161 break; 162 163 /* Check for pending interrupts. */ 164 qla2x00_poll(ha->rsp_q_map[0]); 165 166 if (!ha->flags.mbox_int && 167 !(IS_QLA2200(ha) && 168 command == MBC_LOAD_RISC_RAM_EXTENDED)) 169 usleep_range(10000, 11000); 170 } /* while */ 171 ql_dbg(ql_dbg_mbx, vha, 0x112d, 172 "Waited %d sec.\n", 173 (uint)((jiffies - (wait_time - (mcp->tov * HZ)))/HZ)); 174 } 175 176 /* Check whether we timed out */ 177 if (ha->flags.mbox_int) { 178 uint32_t *iptr2; 179 180 ql_dbg(ql_dbg_mbx, vha, 0x112e, 181 "Cmd=%x completed.\n", command); 182 183 /* Got interrupt. Clear the flag. */ 184 ha->flags.mbox_int = 0; 185 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags); 186 187 if (ha->mailbox_out32[0] != MBS_COMMAND_COMPLETE) 188 rval = QLA_FUNCTION_FAILED; 189 190 /* Load return mailbox registers. */ 191 iptr2 = mcp->mb; 192 iptr = (uint32_t *)&ha->mailbox_out32[0]; 193 mboxes = mcp->in_mb; 194 for (cnt = 0; cnt < ha->mbx_count; cnt++) { 195 if (mboxes & BIT_0) 196 *iptr2 = *iptr; 197 198 mboxes >>= 1; 199 iptr2++; 200 iptr++; 201 } 202 } else { 203 204 rval = QLA_FUNCTION_TIMEOUT; 205 } 206 207 ha->flags.mbox_busy = 0; 208 209 /* Clean up */ 210 ha->mcp32 = NULL; 211 212 if ((abort_active || !io_lock_on) && !IS_NOPOLLING_TYPE(ha)) { 213 ql_dbg(ql_dbg_mbx, vha, 0x113a, 214 "checking for additional resp interrupt.\n"); 215 216 /* polling mode for non isp_abort commands. */ 217 qla2x00_poll(ha->rsp_q_map[0]); 218 } 219 220 if (rval == QLA_FUNCTION_TIMEOUT && 221 mcp->mb[0] != MBC_GEN_SYSTEM_ERROR) { 222 if (!io_lock_on || (mcp->flags & IOCTL_CMD) || 223 ha->flags.eeh_busy) { 224 /* not in dpc. schedule it for dpc to take over. */ 225 ql_dbg(ql_dbg_mbx, vha, 0x115d, 226 "Timeout, schedule isp_abort_needed.\n"); 227 228 if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) && 229 !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) && 230 !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) { 231 232 ql_log(ql_log_info, base_vha, 0x115e, 233 "Mailbox cmd timeout occurred, cmd=0x%x, " 234 "mb[0]=0x%x, eeh_busy=0x%x. Scheduling ISP " 235 "abort.\n", command, mcp->mb[0], 236 ha->flags.eeh_busy); 237 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 238 qla2xxx_wake_dpc(vha); 239 } 240 } else if (!abort_active) { 241 /* call abort directly since we are in the DPC thread */ 242 ql_dbg(ql_dbg_mbx, vha, 0x1160, 243 "Timeout, calling abort_isp.\n"); 244 245 if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) && 246 !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) && 247 !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) { 248 249 ql_log(ql_log_info, base_vha, 0x1161, 250 "Mailbox cmd timeout occurred, cmd=0x%x, " 251 "mb[0]=0x%x. Scheduling ISP abort ", 252 command, mcp->mb[0]); 253 254 set_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags); 255 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 256 if (ha->isp_ops->abort_isp(vha)) { 257 /* Failed. retry later. */ 258 set_bit(ISP_ABORT_NEEDED, 259 &vha->dpc_flags); 260 } 261 clear_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags); 262 ql_dbg(ql_dbg_mbx, vha, 0x1162, 263 "Finished abort_isp.\n"); 264 } 265 } 266 } 267 268 premature_exit: 269 /* Allow next mbx cmd to come in. */ 270 complete(&ha->mbx_cmd_comp); 271 272 if (rval) { 273 ql_log(ql_log_warn, base_vha, 0x1163, 274 "**** Failed mbx[0]=%x, mb[1]=%x, mb[2]=%x, " 275 "mb[3]=%x, cmd=%x ****.\n", 276 mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3], command); 277 } else { 278 ql_dbg(ql_dbg_mbx, base_vha, 0x1164, "Done %s.\n", __func__); 279 } 280 281 return rval; 282 } 283 284 /* 285 * qlafx00_driver_shutdown 286 * Indicate a driver shutdown to firmware. 287 * 288 * Input: 289 * ha = adapter block pointer. 290 * 291 * Returns: 292 * local function return status code. 293 * 294 * Context: 295 * Kernel context. 296 */ 297 static int 298 qlafx00_driver_shutdown(scsi_qla_host_t *vha, int tmo) 299 { 300 int rval; 301 struct mbx_cmd_32 mc; 302 struct mbx_cmd_32 *mcp = &mc; 303 304 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1166, 305 "Entered %s.\n", __func__); 306 307 mcp->mb[0] = MBC_MR_DRV_SHUTDOWN; 308 mcp->out_mb = MBX_0; 309 mcp->in_mb = MBX_0; 310 if (tmo) 311 mcp->tov = tmo; 312 else 313 mcp->tov = MBX_TOV_SECONDS; 314 mcp->flags = 0; 315 rval = qlafx00_mailbox_command(vha, mcp); 316 317 if (rval != QLA_SUCCESS) { 318 ql_dbg(ql_dbg_mbx, vha, 0x1167, 319 "Failed=%x.\n", rval); 320 } else { 321 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1168, 322 "Done %s.\n", __func__); 323 } 324 325 return rval; 326 } 327 328 /* 329 * qlafx00_get_firmware_state 330 * Get adapter firmware state. 331 * 332 * Input: 333 * ha = adapter block pointer. 334 * TARGET_QUEUE_LOCK must be released. 335 * ADAPTER_STATE_LOCK must be released. 336 * 337 * Returns: 338 * qla7xxx local function return status code. 339 * 340 * Context: 341 * Kernel context. 342 */ 343 static int 344 qlafx00_get_firmware_state(scsi_qla_host_t *vha, uint32_t *states) 345 { 346 int rval; 347 struct mbx_cmd_32 mc; 348 struct mbx_cmd_32 *mcp = &mc; 349 350 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1169, 351 "Entered %s.\n", __func__); 352 353 mcp->mb[0] = MBC_GET_FIRMWARE_STATE; 354 mcp->out_mb = MBX_0; 355 mcp->in_mb = MBX_1|MBX_0; 356 mcp->tov = MBX_TOV_SECONDS; 357 mcp->flags = 0; 358 rval = qlafx00_mailbox_command(vha, mcp); 359 360 /* Return firmware states. */ 361 states[0] = mcp->mb[1]; 362 363 if (rval != QLA_SUCCESS) { 364 ql_dbg(ql_dbg_mbx, vha, 0x116a, 365 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); 366 } else { 367 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x116b, 368 "Done %s.\n", __func__); 369 } 370 return rval; 371 } 372 373 /* 374 * qlafx00_init_firmware 375 * Initialize adapter firmware. 376 * 377 * Input: 378 * ha = adapter block pointer. 379 * dptr = Initialization control block pointer. 380 * size = size of initialization control block. 381 * TARGET_QUEUE_LOCK must be released. 382 * ADAPTER_STATE_LOCK must be released. 383 * 384 * Returns: 385 * qlafx00 local function return status code. 386 * 387 * Context: 388 * Kernel context. 389 */ 390 int 391 qlafx00_init_firmware(scsi_qla_host_t *vha, uint16_t size) 392 { 393 int rval; 394 struct mbx_cmd_32 mc; 395 struct mbx_cmd_32 *mcp = &mc; 396 struct qla_hw_data *ha = vha->hw; 397 398 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x116c, 399 "Entered %s.\n", __func__); 400 401 mcp->mb[0] = MBC_INITIALIZE_FIRMWARE; 402 403 mcp->mb[1] = 0; 404 mcp->mb[2] = MSD(ha->init_cb_dma); 405 mcp->mb[3] = LSD(ha->init_cb_dma); 406 407 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0; 408 mcp->in_mb = MBX_0; 409 mcp->buf_size = size; 410 mcp->flags = MBX_DMA_OUT; 411 mcp->tov = MBX_TOV_SECONDS; 412 rval = qlafx00_mailbox_command(vha, mcp); 413 414 if (rval != QLA_SUCCESS) { 415 ql_dbg(ql_dbg_mbx, vha, 0x116d, 416 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); 417 } else { 418 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x116e, 419 "Done %s.\n", __func__); 420 } 421 return rval; 422 } 423 424 /* 425 * qlafx00_mbx_reg_test 426 */ 427 static int 428 qlafx00_mbx_reg_test(scsi_qla_host_t *vha) 429 { 430 int rval; 431 struct mbx_cmd_32 mc; 432 struct mbx_cmd_32 *mcp = &mc; 433 434 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x116f, 435 "Entered %s.\n", __func__); 436 437 438 mcp->mb[0] = MBC_MAILBOX_REGISTER_TEST; 439 mcp->mb[1] = 0xAAAA; 440 mcp->mb[2] = 0x5555; 441 mcp->mb[3] = 0xAA55; 442 mcp->mb[4] = 0x55AA; 443 mcp->mb[5] = 0xA5A5; 444 mcp->mb[6] = 0x5A5A; 445 mcp->mb[7] = 0x2525; 446 mcp->mb[8] = 0xBBBB; 447 mcp->mb[9] = 0x6666; 448 mcp->mb[10] = 0xBB66; 449 mcp->mb[11] = 0x66BB; 450 mcp->mb[12] = 0xB6B6; 451 mcp->mb[13] = 0x6B6B; 452 mcp->mb[14] = 0x3636; 453 mcp->mb[15] = 0xCCCC; 454 455 456 mcp->out_mb = MBX_15|MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8| 457 MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0; 458 mcp->in_mb = MBX_15|MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8| 459 MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0; 460 mcp->buf_size = 0; 461 mcp->flags = MBX_DMA_OUT; 462 mcp->tov = MBX_TOV_SECONDS; 463 rval = qlafx00_mailbox_command(vha, mcp); 464 if (rval == QLA_SUCCESS) { 465 if (mcp->mb[17] != 0xAAAA || mcp->mb[18] != 0x5555 || 466 mcp->mb[19] != 0xAA55 || mcp->mb[20] != 0x55AA) 467 rval = QLA_FUNCTION_FAILED; 468 if (mcp->mb[21] != 0xA5A5 || mcp->mb[22] != 0x5A5A || 469 mcp->mb[23] != 0x2525 || mcp->mb[24] != 0xBBBB) 470 rval = QLA_FUNCTION_FAILED; 471 if (mcp->mb[25] != 0x6666 || mcp->mb[26] != 0xBB66 || 472 mcp->mb[27] != 0x66BB || mcp->mb[28] != 0xB6B6) 473 rval = QLA_FUNCTION_FAILED; 474 if (mcp->mb[29] != 0x6B6B || mcp->mb[30] != 0x3636 || 475 mcp->mb[31] != 0xCCCC) 476 rval = QLA_FUNCTION_FAILED; 477 } 478 479 if (rval != QLA_SUCCESS) { 480 ql_dbg(ql_dbg_mbx, vha, 0x1170, 481 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]); 482 } else { 483 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1171, 484 "Done %s.\n", __func__); 485 } 486 return rval; 487 } 488 489 /** 490 * qlafx00_pci_config() - Setup ISPFx00 PCI configuration registers. 491 * @ha: HA context 492 * 493 * Returns 0 on success. 494 */ 495 int 496 qlafx00_pci_config(scsi_qla_host_t *vha) 497 { 498 uint16_t w; 499 struct qla_hw_data *ha = vha->hw; 500 501 pci_set_master(ha->pdev); 502 pci_try_set_mwi(ha->pdev); 503 504 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 505 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 506 w &= ~PCI_COMMAND_INTX_DISABLE; 507 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 508 509 /* PCIe -- adjust Maximum Read Request Size (2048). */ 510 if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP)) 511 pcie_set_readrq(ha->pdev, 2048); 512 513 ha->chip_revision = ha->pdev->revision; 514 515 return QLA_SUCCESS; 516 } 517 518 /** 519 * qlafx00_warm_reset() - Perform warm reset of iSA(CPUs being reset on SOC). 520 * @ha: HA context 521 * 522 */ 523 static inline void 524 qlafx00_soc_cpu_reset(scsi_qla_host_t *vha) 525 { 526 unsigned long flags = 0; 527 struct qla_hw_data *ha = vha->hw; 528 int i, core; 529 uint32_t cnt; 530 531 /* Set all 4 cores in reset */ 532 for (i = 0; i < 4; i++) { 533 QLAFX00_SET_HBA_SOC_REG(ha, 534 (SOC_SW_RST_CONTROL_REG_CORE0 + 8*i), (0xF01)); 535 } 536 537 /* Set all 4 core Clock gating control */ 538 for (i = 0; i < 4; i++) { 539 QLAFX00_SET_HBA_SOC_REG(ha, 540 (SOC_SW_RST_CONTROL_REG_CORE0 + 4 + 8*i), (0x01010101)); 541 } 542 543 /* Reset all units in Fabric */ 544 QLAFX00_SET_HBA_SOC_REG(ha, SOC_FABRIC_RST_CONTROL_REG, (0x11F0101)); 545 546 /* Reset all interrupt control registers */ 547 for (i = 0; i < 115; i++) { 548 QLAFX00_SET_HBA_SOC_REG(ha, 549 (SOC_INTERRUPT_SOURCE_I_CONTROL_REG + 4*i), (0x0)); 550 } 551 552 /* Reset Timers control registers. per core */ 553 for (core = 0; core < 4; core++) 554 for (i = 0; i < 8; i++) 555 QLAFX00_SET_HBA_SOC_REG(ha, 556 (SOC_CORE_TIMER_REG + 0x100*core + 4*i), (0x0)); 557 558 /* Reset per core IRQ ack register */ 559 for (core = 0; core < 4; core++) 560 QLAFX00_SET_HBA_SOC_REG(ha, 561 (SOC_IRQ_ACK_REG + 0x100*core), (0x3FF)); 562 563 /* Set Fabric control and config to defaults */ 564 QLAFX00_SET_HBA_SOC_REG(ha, SOC_FABRIC_CONTROL_REG, (0x2)); 565 QLAFX00_SET_HBA_SOC_REG(ha, SOC_FABRIC_CONFIG_REG, (0x3)); 566 567 spin_lock_irqsave(&ha->hardware_lock, flags); 568 569 /* Kick in Fabric units */ 570 QLAFX00_SET_HBA_SOC_REG(ha, SOC_FABRIC_RST_CONTROL_REG, (0x0)); 571 572 /* Kick in Core0 to start boot process */ 573 QLAFX00_SET_HBA_SOC_REG(ha, SOC_SW_RST_CONTROL_REG_CORE0, (0xF00)); 574 575 /* Wait 10secs for soft-reset to complete. */ 576 for (cnt = 10; cnt; cnt--) { 577 msleep(1000); 578 barrier(); 579 } 580 spin_unlock_irqrestore(&ha->hardware_lock, flags); 581 } 582 583 /** 584 * qlafx00_soft_reset() - Soft Reset ISPFx00. 585 * @ha: HA context 586 * 587 * Returns 0 on success. 588 */ 589 void 590 qlafx00_soft_reset(scsi_qla_host_t *vha) 591 { 592 struct qla_hw_data *ha = vha->hw; 593 594 if (unlikely(pci_channel_offline(ha->pdev) && 595 ha->flags.pci_channel_io_perm_failure)) 596 return; 597 598 ha->isp_ops->disable_intrs(ha); 599 qlafx00_soc_cpu_reset(vha); 600 ha->isp_ops->enable_intrs(ha); 601 } 602 603 /** 604 * qlafx00_chip_diag() - Test ISPFx00 for proper operation. 605 * @ha: HA context 606 * 607 * Returns 0 on success. 608 */ 609 int 610 qlafx00_chip_diag(scsi_qla_host_t *vha) 611 { 612 int rval = 0; 613 struct qla_hw_data *ha = vha->hw; 614 struct req_que *req = ha->req_q_map[0]; 615 616 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length; 617 618 rval = qlafx00_mbx_reg_test(vha); 619 if (rval) { 620 ql_log(ql_log_warn, vha, 0x1165, 621 "Failed mailbox send register test\n"); 622 } else { 623 /* Flag a successful rval */ 624 rval = QLA_SUCCESS; 625 } 626 return rval; 627 } 628 629 void 630 qlafx00_config_rings(struct scsi_qla_host *vha) 631 { 632 struct qla_hw_data *ha = vha->hw; 633 struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00; 634 struct init_cb_fx *icb; 635 struct req_que *req = ha->req_q_map[0]; 636 struct rsp_que *rsp = ha->rsp_q_map[0]; 637 638 /* Setup ring parameters in initialization control block. */ 639 icb = (struct init_cb_fx *)ha->init_cb; 640 icb->request_q_outpointer = __constant_cpu_to_le16(0); 641 icb->response_q_inpointer = __constant_cpu_to_le16(0); 642 icb->request_q_length = cpu_to_le16(req->length); 643 icb->response_q_length = cpu_to_le16(rsp->length); 644 icb->request_q_address[0] = cpu_to_le32(LSD(req->dma)); 645 icb->request_q_address[1] = cpu_to_le32(MSD(req->dma)); 646 icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma)); 647 icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma)); 648 649 WRT_REG_DWORD(®->req_q_in, 0); 650 WRT_REG_DWORD(®->req_q_out, 0); 651 652 WRT_REG_DWORD(®->rsp_q_in, 0); 653 WRT_REG_DWORD(®->rsp_q_out, 0); 654 655 /* PCI posting */ 656 RD_REG_DWORD(®->rsp_q_out); 657 } 658 659 char * 660 qlafx00_pci_info_str(struct scsi_qla_host *vha, char *str) 661 { 662 struct qla_hw_data *ha = vha->hw; 663 int pcie_reg; 664 665 pcie_reg = pci_find_capability(ha->pdev, PCI_CAP_ID_EXP); 666 if (pcie_reg) { 667 strcpy(str, "PCIe iSA"); 668 return str; 669 } 670 return str; 671 } 672 673 char * 674 qlafx00_fw_version_str(struct scsi_qla_host *vha, char *str) 675 { 676 struct qla_hw_data *ha = vha->hw; 677 678 sprintf(str, "%s", ha->mr.fw_version); 679 return str; 680 } 681 682 void 683 qlafx00_enable_intrs(struct qla_hw_data *ha) 684 { 685 unsigned long flags = 0; 686 687 spin_lock_irqsave(&ha->hardware_lock, flags); 688 ha->interrupts_on = 1; 689 QLAFX00_ENABLE_ICNTRL_REG(ha); 690 spin_unlock_irqrestore(&ha->hardware_lock, flags); 691 } 692 693 void 694 qlafx00_disable_intrs(struct qla_hw_data *ha) 695 { 696 unsigned long flags = 0; 697 698 spin_lock_irqsave(&ha->hardware_lock, flags); 699 ha->interrupts_on = 0; 700 QLAFX00_DISABLE_ICNTRL_REG(ha); 701 spin_unlock_irqrestore(&ha->hardware_lock, flags); 702 } 703 704 static void 705 qlafx00_tmf_iocb_timeout(void *data) 706 { 707 srb_t *sp = (srb_t *)data; 708 struct srb_iocb *tmf = &sp->u.iocb_cmd; 709 710 tmf->u.tmf.comp_status = CS_TIMEOUT; 711 complete(&tmf->u.tmf.comp); 712 } 713 714 static void 715 qlafx00_tmf_sp_done(void *data, void *ptr, int res) 716 { 717 srb_t *sp = (srb_t *)ptr; 718 struct srb_iocb *tmf = &sp->u.iocb_cmd; 719 720 complete(&tmf->u.tmf.comp); 721 } 722 723 static int 724 qlafx00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, 725 uint32_t lun, uint32_t tag) 726 { 727 scsi_qla_host_t *vha = fcport->vha; 728 struct srb_iocb *tm_iocb; 729 srb_t *sp; 730 int rval = QLA_FUNCTION_FAILED; 731 732 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 733 if (!sp) 734 goto done; 735 736 tm_iocb = &sp->u.iocb_cmd; 737 sp->type = SRB_TM_CMD; 738 sp->name = "tmf"; 739 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)); 740 tm_iocb->u.tmf.flags = flags; 741 tm_iocb->u.tmf.lun = lun; 742 tm_iocb->u.tmf.data = tag; 743 sp->done = qlafx00_tmf_sp_done; 744 tm_iocb->timeout = qlafx00_tmf_iocb_timeout; 745 init_completion(&tm_iocb->u.tmf.comp); 746 747 rval = qla2x00_start_sp(sp); 748 if (rval != QLA_SUCCESS) 749 goto done_free_sp; 750 751 ql_dbg(ql_dbg_async, vha, 0x507b, 752 "Task management command issued target_id=%x\n", 753 fcport->tgt_id); 754 755 wait_for_completion(&tm_iocb->u.tmf.comp); 756 757 rval = tm_iocb->u.tmf.comp_status == CS_COMPLETE ? 758 QLA_SUCCESS : QLA_FUNCTION_FAILED; 759 760 done_free_sp: 761 sp->free(vha, sp); 762 done: 763 return rval; 764 } 765 766 int 767 qlafx00_abort_target(fc_port_t *fcport, unsigned int l, int tag) 768 { 769 return qlafx00_async_tm_cmd(fcport, TCF_TARGET_RESET, l, tag); 770 } 771 772 int 773 qlafx00_lun_reset(fc_port_t *fcport, unsigned int l, int tag) 774 { 775 return qlafx00_async_tm_cmd(fcport, TCF_LUN_RESET, l, tag); 776 } 777 778 int 779 qlafx00_iospace_config(struct qla_hw_data *ha) 780 { 781 if (pci_request_selected_regions(ha->pdev, ha->bars, 782 QLA2XXX_DRIVER_NAME)) { 783 ql_log_pci(ql_log_fatal, ha->pdev, 0x014e, 784 "Failed to reserve PIO/MMIO regions (%s), aborting.\n", 785 pci_name(ha->pdev)); 786 goto iospace_error_exit; 787 } 788 789 /* Use MMIO operations for all accesses. */ 790 if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) { 791 ql_log_pci(ql_log_warn, ha->pdev, 0x014f, 792 "Invalid pci I/O region size (%s).\n", 793 pci_name(ha->pdev)); 794 goto iospace_error_exit; 795 } 796 if (pci_resource_len(ha->pdev, 0) < BAR0_LEN_FX00) { 797 ql_log_pci(ql_log_warn, ha->pdev, 0x0127, 798 "Invalid PCI mem BAR0 region size (%s), aborting\n", 799 pci_name(ha->pdev)); 800 goto iospace_error_exit; 801 } 802 803 ha->cregbase = 804 ioremap_nocache(pci_resource_start(ha->pdev, 0), BAR0_LEN_FX00); 805 if (!ha->cregbase) { 806 ql_log_pci(ql_log_fatal, ha->pdev, 0x0128, 807 "cannot remap MMIO (%s), aborting\n", pci_name(ha->pdev)); 808 goto iospace_error_exit; 809 } 810 811 if (!(pci_resource_flags(ha->pdev, 2) & IORESOURCE_MEM)) { 812 ql_log_pci(ql_log_warn, ha->pdev, 0x0129, 813 "region #2 not an MMIO resource (%s), aborting\n", 814 pci_name(ha->pdev)); 815 goto iospace_error_exit; 816 } 817 if (pci_resource_len(ha->pdev, 2) < BAR2_LEN_FX00) { 818 ql_log_pci(ql_log_warn, ha->pdev, 0x012a, 819 "Invalid PCI mem BAR2 region size (%s), aborting\n", 820 pci_name(ha->pdev)); 821 goto iospace_error_exit; 822 } 823 824 ha->iobase = 825 ioremap_nocache(pci_resource_start(ha->pdev, 2), BAR2_LEN_FX00); 826 if (!ha->iobase) { 827 ql_log_pci(ql_log_fatal, ha->pdev, 0x012b, 828 "cannot remap MMIO (%s), aborting\n", pci_name(ha->pdev)); 829 goto iospace_error_exit; 830 } 831 832 /* Determine queue resources */ 833 ha->max_req_queues = ha->max_rsp_queues = 1; 834 835 ql_log_pci(ql_log_info, ha->pdev, 0x012c, 836 "Bars 0x%x, iobase0 0x%p, iobase2 0x%p\n", 837 ha->bars, ha->cregbase, ha->iobase); 838 839 return 0; 840 841 iospace_error_exit: 842 return -ENOMEM; 843 } 844 845 static void 846 qlafx00_save_queue_ptrs(struct scsi_qla_host *vha) 847 { 848 struct qla_hw_data *ha = vha->hw; 849 struct req_que *req = ha->req_q_map[0]; 850 struct rsp_que *rsp = ha->rsp_q_map[0]; 851 852 req->length_fx00 = req->length; 853 req->ring_fx00 = req->ring; 854 req->dma_fx00 = req->dma; 855 856 rsp->length_fx00 = rsp->length; 857 rsp->ring_fx00 = rsp->ring; 858 rsp->dma_fx00 = rsp->dma; 859 860 ql_dbg(ql_dbg_init, vha, 0x012d, 861 "req: %p, ring_fx00: %p, length_fx00: 0x%x," 862 "req->dma_fx00: 0x%llx\n", req, req->ring_fx00, 863 req->length_fx00, (u64)req->dma_fx00); 864 865 ql_dbg(ql_dbg_init, vha, 0x012e, 866 "rsp: %p, ring_fx00: %p, length_fx00: 0x%x," 867 "rsp->dma_fx00: 0x%llx\n", rsp, rsp->ring_fx00, 868 rsp->length_fx00, (u64)rsp->dma_fx00); 869 } 870 871 static int 872 qlafx00_config_queues(struct scsi_qla_host *vha) 873 { 874 struct qla_hw_data *ha = vha->hw; 875 struct req_que *req = ha->req_q_map[0]; 876 struct rsp_que *rsp = ha->rsp_q_map[0]; 877 dma_addr_t bar2_hdl = pci_resource_start(ha->pdev, 2); 878 879 req->length = ha->req_que_len; 880 req->ring = (void *)ha->iobase + ha->req_que_off; 881 req->dma = bar2_hdl + ha->req_que_off; 882 if ((!req->ring) || (req->length == 0)) { 883 ql_log_pci(ql_log_info, ha->pdev, 0x012f, 884 "Unable to allocate memory for req_ring\n"); 885 return QLA_FUNCTION_FAILED; 886 } 887 888 ql_dbg(ql_dbg_init, vha, 0x0130, 889 "req: %p req_ring pointer %p req len 0x%x " 890 "req off 0x%x\n, req->dma: 0x%llx", 891 req, req->ring, req->length, 892 ha->req_que_off, (u64)req->dma); 893 894 rsp->length = ha->rsp_que_len; 895 rsp->ring = (void *)ha->iobase + ha->rsp_que_off; 896 rsp->dma = bar2_hdl + ha->rsp_que_off; 897 if ((!rsp->ring) || (rsp->length == 0)) { 898 ql_log_pci(ql_log_info, ha->pdev, 0x0131, 899 "Unable to allocate memory for rsp_ring\n"); 900 return QLA_FUNCTION_FAILED; 901 } 902 903 ql_dbg(ql_dbg_init, vha, 0x0132, 904 "rsp: %p rsp_ring pointer %p rsp len 0x%x " 905 "rsp off 0x%x, rsp->dma: 0x%llx\n", 906 rsp, rsp->ring, rsp->length, 907 ha->rsp_que_off, (u64)rsp->dma); 908 909 return QLA_SUCCESS; 910 } 911 912 static int 913 qlafx00_init_fw_ready(scsi_qla_host_t *vha) 914 { 915 int rval = 0; 916 unsigned long wtime; 917 uint16_t wait_time; /* Wait time */ 918 struct qla_hw_data *ha = vha->hw; 919 struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00; 920 uint32_t aenmbx, aenmbx7 = 0; 921 uint32_t state[5]; 922 bool done = false; 923 924 /* 30 seconds wait - Adjust if required */ 925 wait_time = 30; 926 927 /* wait time before firmware ready */ 928 wtime = jiffies + (wait_time * HZ); 929 do { 930 aenmbx = RD_REG_DWORD(®->aenmailbox0); 931 barrier(); 932 ql_dbg(ql_dbg_mbx, vha, 0x0133, 933 "aenmbx: 0x%x\n", aenmbx); 934 935 switch (aenmbx) { 936 case MBA_FW_NOT_STARTED: 937 case MBA_FW_STARTING: 938 break; 939 940 case MBA_SYSTEM_ERR: 941 case MBA_REQ_TRANSFER_ERR: 942 case MBA_RSP_TRANSFER_ERR: 943 case MBA_FW_INIT_FAILURE: 944 qlafx00_soft_reset(vha); 945 break; 946 947 case MBA_FW_RESTART_CMPLT: 948 /* Set the mbx and rqstq intr code */ 949 aenmbx7 = RD_REG_DWORD(®->aenmailbox7); 950 ha->mbx_intr_code = MSW(aenmbx7); 951 ha->rqstq_intr_code = LSW(aenmbx7); 952 ha->req_que_off = RD_REG_DWORD(®->aenmailbox1); 953 ha->rsp_que_off = RD_REG_DWORD(®->aenmailbox3); 954 ha->req_que_len = RD_REG_DWORD(®->aenmailbox5); 955 ha->rsp_que_len = RD_REG_DWORD(®->aenmailbox6); 956 WRT_REG_DWORD(®->aenmailbox0, 0); 957 RD_REG_DWORD_RELAXED(®->aenmailbox0); 958 ql_dbg(ql_dbg_init, vha, 0x0134, 959 "f/w returned mbx_intr_code: 0x%x, " 960 "rqstq_intr_code: 0x%x\n", 961 ha->mbx_intr_code, ha->rqstq_intr_code); 962 QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS); 963 rval = QLA_SUCCESS; 964 done = true; 965 break; 966 967 default: 968 /* If fw is apparently not ready. In order to continue, 969 * we might need to issue Mbox cmd, but the problem is 970 * that the DoorBell vector values that come with the 971 * 8060 AEN are most likely gone by now (and thus no 972 * bell would be rung on the fw side when mbox cmd is 973 * issued). We have to therefore grab the 8060 AEN 974 * shadow regs (filled in by FW when the last 8060 975 * AEN was being posted). 976 * Do the following to determine what is needed in 977 * order to get the FW ready: 978 * 1. reload the 8060 AEN values from the shadow regs 979 * 2. clear int status to get rid of possible pending 980 * interrupts 981 * 3. issue Get FW State Mbox cmd to determine fw state 982 * Set the mbx and rqstq intr code from Shadow Regs 983 */ 984 aenmbx7 = RD_REG_DWORD(®->initval7); 985 ha->mbx_intr_code = MSW(aenmbx7); 986 ha->rqstq_intr_code = LSW(aenmbx7); 987 ha->req_que_off = RD_REG_DWORD(®->initval1); 988 ha->rsp_que_off = RD_REG_DWORD(®->initval3); 989 ha->req_que_len = RD_REG_DWORD(®->initval5); 990 ha->rsp_que_len = RD_REG_DWORD(®->initval6); 991 ql_dbg(ql_dbg_init, vha, 0x0135, 992 "f/w returned mbx_intr_code: 0x%x, " 993 "rqstq_intr_code: 0x%x\n", 994 ha->mbx_intr_code, ha->rqstq_intr_code); 995 QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS); 996 997 /* Get the FW state */ 998 rval = qlafx00_get_firmware_state(vha, state); 999 if (rval != QLA_SUCCESS) { 1000 /* Retry if timer has not expired */ 1001 break; 1002 } 1003 1004 if (state[0] == FSTATE_FX00_CONFIG_WAIT) { 1005 /* Firmware is waiting to be 1006 * initialized by driver 1007 */ 1008 rval = QLA_SUCCESS; 1009 done = true; 1010 break; 1011 } 1012 1013 /* Issue driver shutdown and wait until f/w recovers. 1014 * Driver should continue to poll until 8060 AEN is 1015 * received indicating firmware recovery. 1016 */ 1017 ql_dbg(ql_dbg_init, vha, 0x0136, 1018 "Sending Driver shutdown fw_state 0x%x\n", 1019 state[0]); 1020 1021 rval = qlafx00_driver_shutdown(vha, 10); 1022 if (rval != QLA_SUCCESS) { 1023 rval = QLA_FUNCTION_FAILED; 1024 break; 1025 } 1026 msleep(500); 1027 1028 wtime = jiffies + (wait_time * HZ); 1029 break; 1030 } 1031 1032 if (!done) { 1033 if (time_after_eq(jiffies, wtime)) { 1034 ql_dbg(ql_dbg_init, vha, 0x0137, 1035 "Init f/w failed: aen[7]: 0x%x\n", 1036 RD_REG_DWORD(®->aenmailbox7)); 1037 rval = QLA_FUNCTION_FAILED; 1038 done = true; 1039 break; 1040 } 1041 /* Delay for a while */ 1042 msleep(500); 1043 } 1044 } while (!done); 1045 1046 if (rval) 1047 ql_dbg(ql_dbg_init, vha, 0x0138, 1048 "%s **** FAILED ****.\n", __func__); 1049 else 1050 ql_dbg(ql_dbg_init, vha, 0x0139, 1051 "%s **** SUCCESS ****.\n", __func__); 1052 1053 return rval; 1054 } 1055 1056 /* 1057 * qlafx00_fw_ready() - Waits for firmware ready. 1058 * @ha: HA context 1059 * 1060 * Returns 0 on success. 1061 */ 1062 int 1063 qlafx00_fw_ready(scsi_qla_host_t *vha) 1064 { 1065 int rval; 1066 unsigned long wtime; 1067 uint16_t wait_time; /* Wait time if loop is coming ready */ 1068 uint32_t state[5]; 1069 1070 rval = QLA_SUCCESS; 1071 1072 wait_time = 10; 1073 1074 /* wait time before firmware ready */ 1075 wtime = jiffies + (wait_time * HZ); 1076 1077 /* Wait for ISP to finish init */ 1078 if (!vha->flags.init_done) 1079 ql_dbg(ql_dbg_init, vha, 0x013a, 1080 "Waiting for init to complete...\n"); 1081 1082 do { 1083 rval = qlafx00_get_firmware_state(vha, state); 1084 1085 if (rval == QLA_SUCCESS) { 1086 if (state[0] == FSTATE_FX00_INITIALIZED) { 1087 ql_dbg(ql_dbg_init, vha, 0x013b, 1088 "fw_state=%x\n", state[0]); 1089 rval = QLA_SUCCESS; 1090 break; 1091 } 1092 } 1093 rval = QLA_FUNCTION_FAILED; 1094 1095 if (time_after_eq(jiffies, wtime)) 1096 break; 1097 1098 /* Delay for a while */ 1099 msleep(500); 1100 1101 ql_dbg(ql_dbg_init, vha, 0x013c, 1102 "fw_state=%x curr time=%lx.\n", state[0], jiffies); 1103 } while (1); 1104 1105 1106 if (rval) 1107 ql_dbg(ql_dbg_init, vha, 0x013d, 1108 "Firmware ready **** FAILED ****.\n"); 1109 else 1110 ql_dbg(ql_dbg_init, vha, 0x013e, 1111 "Firmware ready **** SUCCESS ****.\n"); 1112 1113 return rval; 1114 } 1115 1116 static int 1117 qlafx00_find_all_targets(scsi_qla_host_t *vha, 1118 struct list_head *new_fcports) 1119 { 1120 int rval; 1121 uint16_t tgt_id; 1122 fc_port_t *fcport, *new_fcport; 1123 int found; 1124 struct qla_hw_data *ha = vha->hw; 1125 1126 rval = QLA_SUCCESS; 1127 1128 if (!test_bit(LOOP_RESYNC_ACTIVE, &vha->dpc_flags)) 1129 return QLA_FUNCTION_FAILED; 1130 1131 if ((atomic_read(&vha->loop_down_timer) || 1132 STATE_TRANSITION(vha))) { 1133 atomic_set(&vha->loop_down_timer, 0); 1134 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 1135 return QLA_FUNCTION_FAILED; 1136 } 1137 1138 ql_dbg(ql_dbg_disc + ql_dbg_init, vha, 0x2088, 1139 "Listing Target bit map...\n"); 1140 ql_dump_buffer(ql_dbg_disc + ql_dbg_init, vha, 1141 0x2089, (uint8_t *)ha->gid_list, 32); 1142 1143 /* Allocate temporary rmtport for any new rmtports discovered. */ 1144 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 1145 if (new_fcport == NULL) 1146 return QLA_MEMORY_ALLOC_FAILED; 1147 1148 for_each_set_bit(tgt_id, (void *)ha->gid_list, 1149 QLAFX00_TGT_NODE_LIST_SIZE) { 1150 1151 /* Send get target node info */ 1152 new_fcport->tgt_id = tgt_id; 1153 rval = qlafx00_fx_disc(vha, new_fcport, 1154 FXDISC_GET_TGT_NODE_INFO); 1155 if (rval != QLA_SUCCESS) { 1156 ql_log(ql_log_warn, vha, 0x208a, 1157 "Target info scan failed -- assuming zero-entry " 1158 "result...\n"); 1159 continue; 1160 } 1161 1162 /* Locate matching device in database. */ 1163 found = 0; 1164 list_for_each_entry(fcport, &vha->vp_fcports, list) { 1165 if (memcmp(new_fcport->port_name, 1166 fcport->port_name, WWN_SIZE)) 1167 continue; 1168 1169 found++; 1170 1171 /* 1172 * If tgt_id is same and state FCS_ONLINE, nothing 1173 * changed. 1174 */ 1175 if (fcport->tgt_id == new_fcport->tgt_id && 1176 atomic_read(&fcport->state) == FCS_ONLINE) 1177 break; 1178 1179 /* 1180 * Tgt ID changed or device was marked to be updated. 1181 */ 1182 ql_dbg(ql_dbg_disc + ql_dbg_init, vha, 0x208b, 1183 "TGT-ID Change(%s): Present tgt id: " 1184 "0x%x state: 0x%x " 1185 "wwnn = %llx wwpn = %llx.\n", 1186 __func__, fcport->tgt_id, 1187 atomic_read(&fcport->state), 1188 (unsigned long long)wwn_to_u64(fcport->node_name), 1189 (unsigned long long)wwn_to_u64(fcport->port_name)); 1190 1191 ql_log(ql_log_info, vha, 0x208c, 1192 "TGT-ID Announce(%s): Discovered tgt " 1193 "id 0x%x wwnn = %llx " 1194 "wwpn = %llx.\n", __func__, new_fcport->tgt_id, 1195 (unsigned long long) 1196 wwn_to_u64(new_fcport->node_name), 1197 (unsigned long long) 1198 wwn_to_u64(new_fcport->port_name)); 1199 1200 if (atomic_read(&fcport->state) != FCS_ONLINE) { 1201 fcport->old_tgt_id = fcport->tgt_id; 1202 fcport->tgt_id = new_fcport->tgt_id; 1203 ql_log(ql_log_info, vha, 0x208d, 1204 "TGT-ID: New fcport Added: %p\n", fcport); 1205 qla2x00_update_fcport(vha, fcport); 1206 } else { 1207 ql_log(ql_log_info, vha, 0x208e, 1208 " Existing TGT-ID %x did not get " 1209 " offline event from firmware.\n", 1210 fcport->old_tgt_id); 1211 qla2x00_mark_device_lost(vha, fcport, 0, 0); 1212 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 1213 kfree(new_fcport); 1214 return rval; 1215 } 1216 break; 1217 } 1218 1219 if (found) 1220 continue; 1221 1222 /* If device was not in our fcports list, then add it. */ 1223 list_add_tail(&new_fcport->list, new_fcports); 1224 1225 /* Allocate a new replacement fcport. */ 1226 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 1227 if (new_fcport == NULL) 1228 return QLA_MEMORY_ALLOC_FAILED; 1229 } 1230 1231 kfree(new_fcport); 1232 return rval; 1233 } 1234 1235 /* 1236 * qlafx00_configure_all_targets 1237 * Setup target devices with node ID's. 1238 * 1239 * Input: 1240 * ha = adapter block pointer. 1241 * 1242 * Returns: 1243 * 0 = success. 1244 * BIT_0 = error 1245 */ 1246 static int 1247 qlafx00_configure_all_targets(scsi_qla_host_t *vha) 1248 { 1249 int rval; 1250 fc_port_t *fcport, *rmptemp; 1251 LIST_HEAD(new_fcports); 1252 1253 rval = qlafx00_fx_disc(vha, &vha->hw->mr.fcport, 1254 FXDISC_GET_TGT_NODE_LIST); 1255 if (rval != QLA_SUCCESS) { 1256 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 1257 return rval; 1258 } 1259 1260 rval = qlafx00_find_all_targets(vha, &new_fcports); 1261 if (rval != QLA_SUCCESS) { 1262 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 1263 return rval; 1264 } 1265 1266 /* 1267 * Delete all previous devices marked lost. 1268 */ 1269 list_for_each_entry(fcport, &vha->vp_fcports, list) { 1270 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 1271 break; 1272 1273 if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) { 1274 if (fcport->port_type != FCT_INITIATOR) 1275 qla2x00_mark_device_lost(vha, fcport, 0, 0); 1276 } 1277 } 1278 1279 /* 1280 * Add the new devices to our devices list. 1281 */ 1282 list_for_each_entry_safe(fcport, rmptemp, &new_fcports, list) { 1283 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 1284 break; 1285 1286 qla2x00_update_fcport(vha, fcport); 1287 list_move_tail(&fcport->list, &vha->vp_fcports); 1288 ql_log(ql_log_info, vha, 0x208f, 1289 "Attach new target id 0x%x wwnn = %llx " 1290 "wwpn = %llx.\n", 1291 fcport->tgt_id, 1292 (unsigned long long)wwn_to_u64(fcport->node_name), 1293 (unsigned long long)wwn_to_u64(fcport->port_name)); 1294 } 1295 1296 /* Free all new device structures not processed. */ 1297 list_for_each_entry_safe(fcport, rmptemp, &new_fcports, list) { 1298 list_del(&fcport->list); 1299 kfree(fcport); 1300 } 1301 1302 return rval; 1303 } 1304 1305 /* 1306 * qlafx00_configure_devices 1307 * Updates Fibre Channel Device Database with what is actually on loop. 1308 * 1309 * Input: 1310 * ha = adapter block pointer. 1311 * 1312 * Returns: 1313 * 0 = success. 1314 * 1 = error. 1315 * 2 = database was full and device was not configured. 1316 */ 1317 int 1318 qlafx00_configure_devices(scsi_qla_host_t *vha) 1319 { 1320 int rval; 1321 unsigned long flags, save_flags; 1322 rval = QLA_SUCCESS; 1323 1324 save_flags = flags = vha->dpc_flags; 1325 1326 ql_dbg(ql_dbg_disc, vha, 0x2090, 1327 "Configure devices -- dpc flags =0x%lx\n", flags); 1328 1329 rval = qlafx00_configure_all_targets(vha); 1330 1331 if (rval == QLA_SUCCESS) { 1332 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 1333 rval = QLA_FUNCTION_FAILED; 1334 } else { 1335 atomic_set(&vha->loop_state, LOOP_READY); 1336 ql_log(ql_log_info, vha, 0x2091, 1337 "Device Ready\n"); 1338 } 1339 } 1340 1341 if (rval) { 1342 ql_dbg(ql_dbg_disc, vha, 0x2092, 1343 "%s *** FAILED ***.\n", __func__); 1344 } else { 1345 ql_dbg(ql_dbg_disc, vha, 0x2093, 1346 "%s: exiting normally.\n", __func__); 1347 } 1348 return rval; 1349 } 1350 1351 static void 1352 qlafx00_abort_isp_cleanup(scsi_qla_host_t *vha) 1353 { 1354 struct qla_hw_data *ha = vha->hw; 1355 fc_port_t *fcport; 1356 1357 vha->flags.online = 0; 1358 ha->flags.chip_reset_done = 0; 1359 ha->mr.fw_hbt_en = 0; 1360 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 1361 vha->qla_stats.total_isp_aborts++; 1362 1363 ql_log(ql_log_info, vha, 0x013f, 1364 "Performing ISP error recovery - ha = %p.\n", ha); 1365 1366 ha->isp_ops->reset_chip(vha); 1367 1368 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 1369 atomic_set(&vha->loop_state, LOOP_DOWN); 1370 atomic_set(&vha->loop_down_timer, 1371 QLAFX00_LOOP_DOWN_TIME); 1372 } else { 1373 if (!atomic_read(&vha->loop_down_timer)) 1374 atomic_set(&vha->loop_down_timer, 1375 QLAFX00_LOOP_DOWN_TIME); 1376 } 1377 1378 /* Clear all async request states across all VPs. */ 1379 list_for_each_entry(fcport, &vha->vp_fcports, list) { 1380 fcport->flags = 0; 1381 if (atomic_read(&fcport->state) == FCS_ONLINE) 1382 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST); 1383 } 1384 1385 if (!ha->flags.eeh_busy) { 1386 /* Requeue all commands in outstanding command list. */ 1387 qla2x00_abort_all_cmds(vha, DID_RESET << 16); 1388 } 1389 1390 qla2x00_free_irqs(vha); 1391 set_bit(FX00_RESET_RECOVERY, &vha->dpc_flags); 1392 1393 /* Clear the Interrupts */ 1394 QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS); 1395 1396 ql_log(ql_log_info, vha, 0x0140, 1397 "%s Done done - ha=%p.\n", __func__, ha); 1398 } 1399 1400 /** 1401 * qlafx00_init_response_q_entries() - Initializes response queue entries. 1402 * @ha: HA context 1403 * 1404 * Beginning of request ring has initialization control block already built 1405 * by nvram config routine. 1406 * 1407 * Returns 0 on success. 1408 */ 1409 void 1410 qlafx00_init_response_q_entries(struct rsp_que *rsp) 1411 { 1412 uint16_t cnt; 1413 response_t *pkt; 1414 1415 rsp->ring_ptr = rsp->ring; 1416 rsp->ring_index = 0; 1417 rsp->status_srb = NULL; 1418 pkt = rsp->ring_ptr; 1419 for (cnt = 0; cnt < rsp->length; cnt++) { 1420 pkt->signature = RESPONSE_PROCESSED; 1421 WRT_REG_DWORD(&pkt->signature, RESPONSE_PROCESSED); 1422 pkt++; 1423 } 1424 } 1425 1426 int 1427 qlafx00_rescan_isp(scsi_qla_host_t *vha) 1428 { 1429 uint32_t status = QLA_FUNCTION_FAILED; 1430 struct qla_hw_data *ha = vha->hw; 1431 struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00; 1432 uint32_t aenmbx7; 1433 1434 qla2x00_request_irqs(ha, ha->rsp_q_map[0]); 1435 1436 aenmbx7 = RD_REG_DWORD(®->aenmailbox7); 1437 ha->mbx_intr_code = MSW(aenmbx7); 1438 ha->rqstq_intr_code = LSW(aenmbx7); 1439 ha->req_que_off = RD_REG_DWORD(®->aenmailbox1); 1440 ha->rsp_que_off = RD_REG_DWORD(®->aenmailbox3); 1441 ha->req_que_len = RD_REG_DWORD(®->aenmailbox5); 1442 ha->rsp_que_len = RD_REG_DWORD(®->aenmailbox6); 1443 1444 ql_dbg(ql_dbg_disc, vha, 0x2094, 1445 "fw returned mbx_intr_code: 0x%x, rqstq_intr_code: 0x%x " 1446 " Req que offset 0x%x Rsp que offset 0x%x\n", 1447 ha->mbx_intr_code, ha->rqstq_intr_code, 1448 ha->req_que_off, ha->rsp_que_len); 1449 1450 /* Clear the Interrupts */ 1451 QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS); 1452 1453 status = qla2x00_init_rings(vha); 1454 if (!status) { 1455 vha->flags.online = 1; 1456 1457 /* if no cable then assume it's good */ 1458 if ((vha->device_flags & DFLG_NO_CABLE)) 1459 status = 0; 1460 /* Register system information */ 1461 if (qlafx00_fx_disc(vha, 1462 &vha->hw->mr.fcport, FXDISC_REG_HOST_INFO)) 1463 ql_dbg(ql_dbg_disc, vha, 0x2095, 1464 "failed to register host info\n"); 1465 } 1466 scsi_unblock_requests(vha->host); 1467 return status; 1468 } 1469 1470 void 1471 qlafx00_timer_routine(scsi_qla_host_t *vha) 1472 { 1473 struct qla_hw_data *ha = vha->hw; 1474 uint32_t fw_heart_beat; 1475 uint32_t aenmbx0; 1476 struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00; 1477 1478 /* Check firmware health */ 1479 if (ha->mr.fw_hbt_cnt) 1480 ha->mr.fw_hbt_cnt--; 1481 else { 1482 if ((!ha->flags.mr_reset_hdlr_active) && 1483 (!test_bit(UNLOADING, &vha->dpc_flags)) && 1484 (!test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) && 1485 (ha->mr.fw_hbt_en)) { 1486 fw_heart_beat = RD_REG_DWORD(®->fwheartbeat); 1487 if (fw_heart_beat != ha->mr.old_fw_hbt_cnt) { 1488 ha->mr.old_fw_hbt_cnt = fw_heart_beat; 1489 ha->mr.fw_hbt_miss_cnt = 0; 1490 } else { 1491 ha->mr.fw_hbt_miss_cnt++; 1492 if (ha->mr.fw_hbt_miss_cnt == 1493 QLAFX00_HEARTBEAT_MISS_CNT) { 1494 set_bit(ISP_ABORT_NEEDED, 1495 &vha->dpc_flags); 1496 qla2xxx_wake_dpc(vha); 1497 ha->mr.fw_hbt_miss_cnt = 0; 1498 } 1499 } 1500 } 1501 ha->mr.fw_hbt_cnt = QLAFX00_HEARTBEAT_INTERVAL; 1502 } 1503 1504 if (test_bit(FX00_RESET_RECOVERY, &vha->dpc_flags)) { 1505 /* Reset recovery to be performed in timer routine */ 1506 aenmbx0 = RD_REG_DWORD(®->aenmailbox0); 1507 if (ha->mr.fw_reset_timer_exp) { 1508 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 1509 qla2xxx_wake_dpc(vha); 1510 ha->mr.fw_reset_timer_exp = 0; 1511 } else if (aenmbx0 == MBA_FW_RESTART_CMPLT) { 1512 /* Wake up DPC to rescan the targets */ 1513 set_bit(FX00_TARGET_SCAN, &vha->dpc_flags); 1514 clear_bit(FX00_RESET_RECOVERY, &vha->dpc_flags); 1515 qla2xxx_wake_dpc(vha); 1516 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL; 1517 } else if ((aenmbx0 == MBA_FW_STARTING) && 1518 (!ha->mr.fw_hbt_en)) { 1519 ha->mr.fw_hbt_en = 1; 1520 } else if (!ha->mr.fw_reset_timer_tick) { 1521 if (aenmbx0 == ha->mr.old_aenmbx0_state) 1522 ha->mr.fw_reset_timer_exp = 1; 1523 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL; 1524 } else if (aenmbx0 == 0xFFFFFFFF) { 1525 uint32_t data0, data1; 1526 1527 data0 = QLAFX00_RD_REG(ha, 1528 QLAFX00_BAR1_BASE_ADDR_REG); 1529 data1 = QLAFX00_RD_REG(ha, 1530 QLAFX00_PEX0_WIN0_BASE_ADDR_REG); 1531 1532 data0 &= 0xffff0000; 1533 data1 &= 0x0000ffff; 1534 1535 QLAFX00_WR_REG(ha, 1536 QLAFX00_PEX0_WIN0_BASE_ADDR_REG, 1537 (data0 | data1)); 1538 } else if ((aenmbx0 & 0xFF00) == MBA_FW_POLL_STATE) { 1539 ha->mr.fw_reset_timer_tick = 1540 QLAFX00_MAX_RESET_INTERVAL; 1541 } 1542 ha->mr.old_aenmbx0_state = aenmbx0; 1543 ha->mr.fw_reset_timer_tick--; 1544 } 1545 } 1546 1547 /* 1548 * qlfx00a_reset_initialize 1549 * Re-initialize after a iSA device reset. 1550 * 1551 * Input: 1552 * ha = adapter block pointer. 1553 * 1554 * Returns: 1555 * 0 = success 1556 */ 1557 int 1558 qlafx00_reset_initialize(scsi_qla_host_t *vha) 1559 { 1560 struct qla_hw_data *ha = vha->hw; 1561 1562 if (vha->device_flags & DFLG_DEV_FAILED) { 1563 ql_dbg(ql_dbg_init, vha, 0x0142, 1564 "Device in failed state\n"); 1565 return QLA_SUCCESS; 1566 } 1567 1568 ha->flags.mr_reset_hdlr_active = 1; 1569 1570 if (vha->flags.online) { 1571 scsi_block_requests(vha->host); 1572 qlafx00_abort_isp_cleanup(vha); 1573 } 1574 1575 ql_log(ql_log_info, vha, 0x0143, 1576 "(%s): succeeded.\n", __func__); 1577 ha->flags.mr_reset_hdlr_active = 0; 1578 return QLA_SUCCESS; 1579 } 1580 1581 /* 1582 * qlafx00_abort_isp 1583 * Resets ISP and aborts all outstanding commands. 1584 * 1585 * Input: 1586 * ha = adapter block pointer. 1587 * 1588 * Returns: 1589 * 0 = success 1590 */ 1591 int 1592 qlafx00_abort_isp(scsi_qla_host_t *vha) 1593 { 1594 struct qla_hw_data *ha = vha->hw; 1595 1596 if (vha->flags.online) { 1597 if (unlikely(pci_channel_offline(ha->pdev) && 1598 ha->flags.pci_channel_io_perm_failure)) { 1599 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 1600 return QLA_SUCCESS; 1601 } 1602 1603 scsi_block_requests(vha->host); 1604 qlafx00_abort_isp_cleanup(vha); 1605 } 1606 1607 ql_log(ql_log_info, vha, 0x0145, 1608 "(%s): succeeded.\n", __func__); 1609 1610 return QLA_SUCCESS; 1611 } 1612 1613 static inline fc_port_t* 1614 qlafx00_get_fcport(struct scsi_qla_host *vha, int tgt_id) 1615 { 1616 fc_port_t *fcport; 1617 1618 /* Check for matching device in remote port list. */ 1619 fcport = NULL; 1620 list_for_each_entry(fcport, &vha->vp_fcports, list) { 1621 if (fcport->tgt_id == tgt_id) { 1622 ql_dbg(ql_dbg_async, vha, 0x5072, 1623 "Matching fcport(%p) found with TGT-ID: 0x%x " 1624 "and Remote TGT_ID: 0x%x\n", 1625 fcport, fcport->tgt_id, tgt_id); 1626 break; 1627 } 1628 } 1629 return fcport; 1630 } 1631 1632 static void 1633 qlafx00_tgt_detach(struct scsi_qla_host *vha, int tgt_id) 1634 { 1635 fc_port_t *fcport; 1636 1637 ql_log(ql_log_info, vha, 0x5073, 1638 "Detach TGT-ID: 0x%x\n", tgt_id); 1639 1640 fcport = qlafx00_get_fcport(vha, tgt_id); 1641 if (!fcport) 1642 return; 1643 1644 qla2x00_mark_device_lost(vha, fcport, 0, 0); 1645 1646 return; 1647 } 1648 1649 int 1650 qlafx00_process_aen(struct scsi_qla_host *vha, struct qla_work_evt *evt) 1651 { 1652 int rval = 0; 1653 uint32_t aen_code, aen_data; 1654 1655 aen_code = FCH_EVT_VENDOR_UNIQUE; 1656 aen_data = evt->u.aenfx.evtcode; 1657 1658 switch (evt->u.aenfx.evtcode) { 1659 case QLAFX00_MBA_PORT_UPDATE: /* Port database update */ 1660 if (evt->u.aenfx.mbx[1] == 0) { 1661 if (evt->u.aenfx.mbx[2] == 1) { 1662 if (!vha->flags.fw_tgt_reported) 1663 vha->flags.fw_tgt_reported = 1; 1664 atomic_set(&vha->loop_down_timer, 0); 1665 atomic_set(&vha->loop_state, LOOP_UP); 1666 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 1667 qla2xxx_wake_dpc(vha); 1668 } else if (evt->u.aenfx.mbx[2] == 2) { 1669 qlafx00_tgt_detach(vha, evt->u.aenfx.mbx[3]); 1670 } 1671 } else if (evt->u.aenfx.mbx[1] == 0xffff) { 1672 if (evt->u.aenfx.mbx[2] == 1) { 1673 if (!vha->flags.fw_tgt_reported) 1674 vha->flags.fw_tgt_reported = 1; 1675 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 1676 } else if (evt->u.aenfx.mbx[2] == 2) { 1677 vha->device_flags |= DFLG_NO_CABLE; 1678 qla2x00_mark_all_devices_lost(vha, 1); 1679 } 1680 } 1681 break; 1682 case QLAFX00_MBA_LINK_UP: 1683 aen_code = FCH_EVT_LINKUP; 1684 aen_data = 0; 1685 break; 1686 case QLAFX00_MBA_LINK_DOWN: 1687 aen_code = FCH_EVT_LINKDOWN; 1688 aen_data = 0; 1689 break; 1690 } 1691 1692 fc_host_post_event(vha->host, fc_get_event_number(), 1693 aen_code, aen_data); 1694 1695 return rval; 1696 } 1697 1698 static void 1699 qlafx00_update_host_attr(scsi_qla_host_t *vha, struct port_info_data *pinfo) 1700 { 1701 u64 port_name = 0, node_name = 0; 1702 1703 port_name = (unsigned long long)wwn_to_u64(pinfo->port_name); 1704 node_name = (unsigned long long)wwn_to_u64(pinfo->node_name); 1705 1706 fc_host_node_name(vha->host) = node_name; 1707 fc_host_port_name(vha->host) = port_name; 1708 if (!pinfo->port_type) 1709 vha->hw->current_topology = ISP_CFG_F; 1710 if (pinfo->link_status == QLAFX00_LINK_STATUS_UP) 1711 atomic_set(&vha->loop_state, LOOP_READY); 1712 else if (pinfo->link_status == QLAFX00_LINK_STATUS_DOWN) 1713 atomic_set(&vha->loop_state, LOOP_DOWN); 1714 vha->hw->link_data_rate = (uint16_t)pinfo->link_config; 1715 } 1716 1717 static void 1718 qla2x00_fxdisc_iocb_timeout(void *data) 1719 { 1720 srb_t *sp = (srb_t *)data; 1721 struct srb_iocb *lio = &sp->u.iocb_cmd; 1722 1723 complete(&lio->u.fxiocb.fxiocb_comp); 1724 } 1725 1726 static void 1727 qla2x00_fxdisc_sp_done(void *data, void *ptr, int res) 1728 { 1729 srb_t *sp = (srb_t *)ptr; 1730 struct srb_iocb *lio = &sp->u.iocb_cmd; 1731 1732 complete(&lio->u.fxiocb.fxiocb_comp); 1733 } 1734 1735 int 1736 qlafx00_fx_disc(scsi_qla_host_t *vha, fc_port_t *fcport, uint8_t fx_type) 1737 { 1738 srb_t *sp; 1739 struct srb_iocb *fdisc; 1740 int rval = QLA_FUNCTION_FAILED; 1741 struct qla_hw_data *ha = vha->hw; 1742 struct host_system_info *phost_info; 1743 struct register_host_info *preg_hsi; 1744 struct new_utsname *p_sysid = NULL; 1745 struct timeval tv; 1746 1747 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1748 if (!sp) 1749 goto done; 1750 1751 fdisc = &sp->u.iocb_cmd; 1752 switch (fx_type) { 1753 case FXDISC_GET_CONFIG_INFO: 1754 fdisc->u.fxiocb.flags = 1755 SRB_FXDISC_RESP_DMA_VALID; 1756 fdisc->u.fxiocb.rsp_len = sizeof(struct config_info_data); 1757 break; 1758 case FXDISC_GET_PORT_INFO: 1759 fdisc->u.fxiocb.flags = 1760 SRB_FXDISC_RESP_DMA_VALID | SRB_FXDISC_REQ_DWRD_VALID; 1761 fdisc->u.fxiocb.rsp_len = QLAFX00_PORT_DATA_INFO; 1762 fdisc->u.fxiocb.req_data = fcport->port_id; 1763 break; 1764 case FXDISC_GET_TGT_NODE_INFO: 1765 fdisc->u.fxiocb.flags = 1766 SRB_FXDISC_RESP_DMA_VALID | SRB_FXDISC_REQ_DWRD_VALID; 1767 fdisc->u.fxiocb.rsp_len = QLAFX00_TGT_NODE_INFO; 1768 fdisc->u.fxiocb.req_data = fcport->tgt_id; 1769 break; 1770 case FXDISC_GET_TGT_NODE_LIST: 1771 fdisc->u.fxiocb.flags = 1772 SRB_FXDISC_RESP_DMA_VALID | SRB_FXDISC_REQ_DWRD_VALID; 1773 fdisc->u.fxiocb.rsp_len = QLAFX00_TGT_NODE_LIST_SIZE; 1774 break; 1775 case FXDISC_REG_HOST_INFO: 1776 fdisc->u.fxiocb.flags = SRB_FXDISC_REQ_DMA_VALID; 1777 fdisc->u.fxiocb.req_len = sizeof(struct register_host_info); 1778 p_sysid = utsname(); 1779 if (!p_sysid) { 1780 ql_log(ql_log_warn, vha, 0x303c, 1781 "Not able to get the system informtion\n"); 1782 goto done_free_sp; 1783 } 1784 break; 1785 default: 1786 break; 1787 } 1788 1789 if (fdisc->u.fxiocb.flags & SRB_FXDISC_REQ_DMA_VALID) { 1790 fdisc->u.fxiocb.req_addr = dma_alloc_coherent(&ha->pdev->dev, 1791 fdisc->u.fxiocb.req_len, 1792 &fdisc->u.fxiocb.req_dma_handle, GFP_KERNEL); 1793 if (!fdisc->u.fxiocb.req_addr) 1794 goto done_free_sp; 1795 1796 if (fx_type == FXDISC_REG_HOST_INFO) { 1797 preg_hsi = (struct register_host_info *) 1798 fdisc->u.fxiocb.req_addr; 1799 phost_info = &preg_hsi->hsi; 1800 memset(preg_hsi, 0, sizeof(struct register_host_info)); 1801 phost_info->os_type = OS_TYPE_LINUX; 1802 strncpy(phost_info->sysname, 1803 p_sysid->sysname, SYSNAME_LENGTH); 1804 strncpy(phost_info->nodename, 1805 p_sysid->nodename, NODENAME_LENGTH); 1806 strncpy(phost_info->release, 1807 p_sysid->release, RELEASE_LENGTH); 1808 strncpy(phost_info->version, 1809 p_sysid->version, VERSION_LENGTH); 1810 strncpy(phost_info->machine, 1811 p_sysid->machine, MACHINE_LENGTH); 1812 strncpy(phost_info->domainname, 1813 p_sysid->domainname, DOMNAME_LENGTH); 1814 strncpy(phost_info->hostdriver, 1815 QLA2XXX_VERSION, VERSION_LENGTH); 1816 do_gettimeofday(&tv); 1817 preg_hsi->utc = (uint64_t)tv.tv_sec; 1818 ql_dbg(ql_dbg_init, vha, 0x0149, 1819 "ISP%04X: Host registration with firmware\n", 1820 ha->pdev->device); 1821 ql_dbg(ql_dbg_init, vha, 0x014a, 1822 "os_type = '%d', sysname = '%s', nodname = '%s'\n", 1823 phost_info->os_type, 1824 phost_info->sysname, 1825 phost_info->nodename); 1826 ql_dbg(ql_dbg_init, vha, 0x014b, 1827 "release = '%s', version = '%s'\n", 1828 phost_info->release, 1829 phost_info->version); 1830 ql_dbg(ql_dbg_init, vha, 0x014c, 1831 "machine = '%s' " 1832 "domainname = '%s', hostdriver = '%s'\n", 1833 phost_info->machine, 1834 phost_info->domainname, 1835 phost_info->hostdriver); 1836 ql_dump_buffer(ql_dbg_init + ql_dbg_disc, vha, 0x014d, 1837 (uint8_t *)phost_info, 1838 sizeof(struct host_system_info)); 1839 } 1840 } 1841 1842 if (fdisc->u.fxiocb.flags & SRB_FXDISC_RESP_DMA_VALID) { 1843 fdisc->u.fxiocb.rsp_addr = dma_alloc_coherent(&ha->pdev->dev, 1844 fdisc->u.fxiocb.rsp_len, 1845 &fdisc->u.fxiocb.rsp_dma_handle, GFP_KERNEL); 1846 if (!fdisc->u.fxiocb.rsp_addr) 1847 goto done_unmap_req; 1848 } 1849 1850 sp->type = SRB_FXIOCB_DCMD; 1851 sp->name = "fxdisc"; 1852 qla2x00_init_timer(sp, FXDISC_TIMEOUT); 1853 fdisc->timeout = qla2x00_fxdisc_iocb_timeout; 1854 fdisc->u.fxiocb.req_func_type = fx_type; 1855 sp->done = qla2x00_fxdisc_sp_done; 1856 1857 rval = qla2x00_start_sp(sp); 1858 if (rval != QLA_SUCCESS) 1859 goto done_unmap_dma; 1860 1861 wait_for_completion(&fdisc->u.fxiocb.fxiocb_comp); 1862 1863 if (fx_type == FXDISC_GET_CONFIG_INFO) { 1864 struct config_info_data *pinfo = 1865 (struct config_info_data *) fdisc->u.fxiocb.rsp_addr; 1866 memcpy(&vha->hw->mr.product_name, pinfo->product_name, 1867 sizeof(vha->hw->mr.product_name)); 1868 memcpy(&vha->hw->mr.symbolic_name, pinfo->symbolic_name, 1869 sizeof(vha->hw->mr.symbolic_name)); 1870 memcpy(&vha->hw->mr.serial_num, pinfo->serial_num, 1871 sizeof(vha->hw->mr.serial_num)); 1872 memcpy(&vha->hw->mr.hw_version, pinfo->hw_version, 1873 sizeof(vha->hw->mr.hw_version)); 1874 memcpy(&vha->hw->mr.fw_version, pinfo->fw_version, 1875 sizeof(vha->hw->mr.fw_version)); 1876 strim(vha->hw->mr.fw_version); 1877 memcpy(&vha->hw->mr.uboot_version, pinfo->uboot_version, 1878 sizeof(vha->hw->mr.uboot_version)); 1879 memcpy(&vha->hw->mr.fru_serial_num, pinfo->fru_serial_num, 1880 sizeof(vha->hw->mr.fru_serial_num)); 1881 } else if (fx_type == FXDISC_GET_PORT_INFO) { 1882 struct port_info_data *pinfo = 1883 (struct port_info_data *) fdisc->u.fxiocb.rsp_addr; 1884 memcpy(vha->node_name, pinfo->node_name, WWN_SIZE); 1885 memcpy(vha->port_name, pinfo->port_name, WWN_SIZE); 1886 vha->d_id.b.domain = pinfo->port_id[0]; 1887 vha->d_id.b.area = pinfo->port_id[1]; 1888 vha->d_id.b.al_pa = pinfo->port_id[2]; 1889 qlafx00_update_host_attr(vha, pinfo); 1890 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0141, 1891 (uint8_t *)pinfo, 16); 1892 } else if (fx_type == FXDISC_GET_TGT_NODE_INFO) { 1893 struct qlafx00_tgt_node_info *pinfo = 1894 (struct qlafx00_tgt_node_info *) fdisc->u.fxiocb.rsp_addr; 1895 memcpy(fcport->node_name, pinfo->tgt_node_wwnn, WWN_SIZE); 1896 memcpy(fcport->port_name, pinfo->tgt_node_wwpn, WWN_SIZE); 1897 fcport->port_type = FCT_TARGET; 1898 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0144, 1899 (uint8_t *)pinfo, 16); 1900 } else if (fx_type == FXDISC_GET_TGT_NODE_LIST) { 1901 struct qlafx00_tgt_node_info *pinfo = 1902 (struct qlafx00_tgt_node_info *) fdisc->u.fxiocb.rsp_addr; 1903 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0146, 1904 (uint8_t *)pinfo, 16); 1905 memcpy(vha->hw->gid_list, pinfo, QLAFX00_TGT_NODE_LIST_SIZE); 1906 } 1907 rval = fdisc->u.fxiocb.result; 1908 1909 done_unmap_dma: 1910 if (fdisc->u.fxiocb.rsp_addr) 1911 dma_free_coherent(&ha->pdev->dev, fdisc->u.fxiocb.rsp_len, 1912 fdisc->u.fxiocb.rsp_addr, fdisc->u.fxiocb.rsp_dma_handle); 1913 1914 done_unmap_req: 1915 if (fdisc->u.fxiocb.req_addr) 1916 dma_free_coherent(&ha->pdev->dev, fdisc->u.fxiocb.req_len, 1917 fdisc->u.fxiocb.req_addr, fdisc->u.fxiocb.req_dma_handle); 1918 done_free_sp: 1919 sp->free(vha, sp); 1920 done: 1921 return rval; 1922 } 1923 1924 static void 1925 qlafx00_abort_iocb_timeout(void *data) 1926 { 1927 srb_t *sp = (srb_t *)data; 1928 struct srb_iocb *abt = &sp->u.iocb_cmd; 1929 1930 abt->u.abt.comp_status = CS_TIMEOUT; 1931 complete(&abt->u.abt.comp); 1932 } 1933 1934 static void 1935 qlafx00_abort_sp_done(void *data, void *ptr, int res) 1936 { 1937 srb_t *sp = (srb_t *)ptr; 1938 struct srb_iocb *abt = &sp->u.iocb_cmd; 1939 1940 complete(&abt->u.abt.comp); 1941 } 1942 1943 static int 1944 qlafx00_async_abt_cmd(srb_t *cmd_sp) 1945 { 1946 scsi_qla_host_t *vha = cmd_sp->fcport->vha; 1947 fc_port_t *fcport = cmd_sp->fcport; 1948 struct srb_iocb *abt_iocb; 1949 srb_t *sp; 1950 int rval = QLA_FUNCTION_FAILED; 1951 1952 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1953 if (!sp) 1954 goto done; 1955 1956 abt_iocb = &sp->u.iocb_cmd; 1957 sp->type = SRB_ABT_CMD; 1958 sp->name = "abort"; 1959 qla2x00_init_timer(sp, FXDISC_TIMEOUT); 1960 abt_iocb->u.abt.cmd_hndl = cmd_sp->handle; 1961 sp->done = qlafx00_abort_sp_done; 1962 abt_iocb->timeout = qlafx00_abort_iocb_timeout; 1963 init_completion(&abt_iocb->u.abt.comp); 1964 1965 rval = qla2x00_start_sp(sp); 1966 if (rval != QLA_SUCCESS) 1967 goto done_free_sp; 1968 1969 ql_dbg(ql_dbg_async, vha, 0x507c, 1970 "Abort command issued - hdl=%x, target_id=%x\n", 1971 cmd_sp->handle, fcport->tgt_id); 1972 1973 wait_for_completion(&abt_iocb->u.abt.comp); 1974 1975 rval = abt_iocb->u.abt.comp_status == CS_COMPLETE ? 1976 QLA_SUCCESS : QLA_FUNCTION_FAILED; 1977 1978 done_free_sp: 1979 sp->free(vha, sp); 1980 done: 1981 return rval; 1982 } 1983 1984 int 1985 qlafx00_abort_command(srb_t *sp) 1986 { 1987 unsigned long flags = 0; 1988 1989 uint32_t handle; 1990 fc_port_t *fcport = sp->fcport; 1991 struct scsi_qla_host *vha = fcport->vha; 1992 struct qla_hw_data *ha = vha->hw; 1993 struct req_que *req = vha->req; 1994 1995 spin_lock_irqsave(&ha->hardware_lock, flags); 1996 for (handle = 1; handle < DEFAULT_OUTSTANDING_COMMANDS; handle++) { 1997 if (req->outstanding_cmds[handle] == sp) 1998 break; 1999 } 2000 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2001 if (handle == DEFAULT_OUTSTANDING_COMMANDS) { 2002 /* Command not found. */ 2003 return QLA_FUNCTION_FAILED; 2004 } 2005 return qlafx00_async_abt_cmd(sp); 2006 } 2007 2008 /* 2009 * qlafx00_initialize_adapter 2010 * Initialize board. 2011 * 2012 * Input: 2013 * ha = adapter block pointer. 2014 * 2015 * Returns: 2016 * 0 = success 2017 */ 2018 int 2019 qlafx00_initialize_adapter(scsi_qla_host_t *vha) 2020 { 2021 int rval; 2022 struct qla_hw_data *ha = vha->hw; 2023 2024 /* Clear adapter flags. */ 2025 vha->flags.online = 0; 2026 ha->flags.chip_reset_done = 0; 2027 vha->flags.reset_active = 0; 2028 ha->flags.pci_channel_io_perm_failure = 0; 2029 ha->flags.eeh_busy = 0; 2030 ha->thermal_support = 0; 2031 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 2032 atomic_set(&vha->loop_state, LOOP_DOWN); 2033 vha->device_flags = DFLG_NO_CABLE; 2034 vha->dpc_flags = 0; 2035 vha->flags.management_server_logged_in = 0; 2036 vha->marker_needed = 0; 2037 ha->isp_abort_cnt = 0; 2038 ha->beacon_blink_led = 0; 2039 2040 set_bit(0, ha->req_qid_map); 2041 set_bit(0, ha->rsp_qid_map); 2042 2043 ql_dbg(ql_dbg_init, vha, 0x0147, 2044 "Configuring PCI space...\n"); 2045 2046 rval = ha->isp_ops->pci_config(vha); 2047 if (rval) { 2048 ql_log(ql_log_warn, vha, 0x0148, 2049 "Unable to configure PCI space.\n"); 2050 return rval; 2051 } 2052 2053 rval = qlafx00_init_fw_ready(vha); 2054 if (rval != QLA_SUCCESS) 2055 return rval; 2056 2057 qlafx00_save_queue_ptrs(vha); 2058 2059 rval = qlafx00_config_queues(vha); 2060 if (rval != QLA_SUCCESS) 2061 return rval; 2062 2063 /* 2064 * Allocate the array of outstanding commands 2065 * now that we know the firmware resources. 2066 */ 2067 rval = qla2x00_alloc_outstanding_cmds(ha, vha->req); 2068 if (rval != QLA_SUCCESS) 2069 return rval; 2070 2071 rval = qla2x00_init_rings(vha); 2072 ha->flags.chip_reset_done = 1; 2073 2074 return rval; 2075 } 2076 2077 uint32_t 2078 qlafx00_fw_state_show(struct device *dev, struct device_attribute *attr, 2079 char *buf) 2080 { 2081 scsi_qla_host_t *vha = shost_priv(class_to_shost(dev)); 2082 int rval = QLA_FUNCTION_FAILED; 2083 uint32_t state[1]; 2084 2085 if (qla2x00_reset_active(vha)) 2086 ql_log(ql_log_warn, vha, 0x70ce, 2087 "ISP reset active.\n"); 2088 else if (!vha->hw->flags.eeh_busy) { 2089 rval = qlafx00_get_firmware_state(vha, state); 2090 } 2091 if (rval != QLA_SUCCESS) 2092 memset(state, -1, sizeof(state)); 2093 2094 return state[0]; 2095 } 2096 2097 void 2098 qlafx00_get_host_speed(struct Scsi_Host *shost) 2099 { 2100 struct qla_hw_data *ha = ((struct scsi_qla_host *) 2101 (shost_priv(shost)))->hw; 2102 u32 speed = FC_PORTSPEED_UNKNOWN; 2103 2104 switch (ha->link_data_rate) { 2105 case QLAFX00_PORT_SPEED_2G: 2106 speed = FC_PORTSPEED_2GBIT; 2107 break; 2108 case QLAFX00_PORT_SPEED_4G: 2109 speed = FC_PORTSPEED_4GBIT; 2110 break; 2111 case QLAFX00_PORT_SPEED_8G: 2112 speed = FC_PORTSPEED_8GBIT; 2113 break; 2114 case QLAFX00_PORT_SPEED_10G: 2115 speed = FC_PORTSPEED_10GBIT; 2116 break; 2117 } 2118 fc_host_speed(shost) = speed; 2119 } 2120 2121 /** QLAFX00 specific ISR implementation functions */ 2122 2123 static inline void 2124 qlafx00_handle_sense(srb_t *sp, uint8_t *sense_data, uint32_t par_sense_len, 2125 uint32_t sense_len, struct rsp_que *rsp, int res) 2126 { 2127 struct scsi_qla_host *vha = sp->fcport->vha; 2128 struct scsi_cmnd *cp = GET_CMD_SP(sp); 2129 uint32_t track_sense_len; 2130 2131 SET_FW_SENSE_LEN(sp, sense_len); 2132 2133 if (sense_len >= SCSI_SENSE_BUFFERSIZE) 2134 sense_len = SCSI_SENSE_BUFFERSIZE; 2135 2136 SET_CMD_SENSE_LEN(sp, sense_len); 2137 SET_CMD_SENSE_PTR(sp, cp->sense_buffer); 2138 track_sense_len = sense_len; 2139 2140 if (sense_len > par_sense_len) 2141 sense_len = par_sense_len; 2142 2143 memcpy(cp->sense_buffer, sense_data, sense_len); 2144 2145 SET_FW_SENSE_LEN(sp, GET_FW_SENSE_LEN(sp) - sense_len); 2146 2147 SET_CMD_SENSE_PTR(sp, cp->sense_buffer + sense_len); 2148 track_sense_len -= sense_len; 2149 SET_CMD_SENSE_LEN(sp, track_sense_len); 2150 2151 ql_dbg(ql_dbg_io, vha, 0x304d, 2152 "sense_len=0x%x par_sense_len=0x%x track_sense_len=0x%x.\n", 2153 sense_len, par_sense_len, track_sense_len); 2154 if (GET_FW_SENSE_LEN(sp) > 0) { 2155 rsp->status_srb = sp; 2156 cp->result = res; 2157 } 2158 2159 if (sense_len) { 2160 ql_dbg(ql_dbg_io + ql_dbg_buffer, vha, 0x3039, 2161 "Check condition Sense data, nexus%ld:%d:%d cmd=%p.\n", 2162 sp->fcport->vha->host_no, cp->device->id, cp->device->lun, 2163 cp); 2164 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x3049, 2165 cp->sense_buffer, sense_len); 2166 } 2167 } 2168 2169 static void 2170 qlafx00_tm_iocb_entry(scsi_qla_host_t *vha, struct req_que *req, 2171 struct tsk_mgmt_entry_fx00 *pkt, srb_t *sp, 2172 uint16_t sstatus, uint16_t cpstatus) 2173 { 2174 struct srb_iocb *tmf; 2175 2176 tmf = &sp->u.iocb_cmd; 2177 if (cpstatus != CS_COMPLETE || 2178 (sstatus & SS_RESPONSE_INFO_LEN_VALID)) 2179 cpstatus = CS_INCOMPLETE; 2180 tmf->u.tmf.comp_status = cpstatus; 2181 sp->done(vha, sp, 0); 2182 } 2183 2184 static void 2185 qlafx00_abort_iocb_entry(scsi_qla_host_t *vha, struct req_que *req, 2186 struct abort_iocb_entry_fx00 *pkt) 2187 { 2188 const char func[] = "ABT_IOCB"; 2189 srb_t *sp; 2190 struct srb_iocb *abt; 2191 2192 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt); 2193 if (!sp) 2194 return; 2195 2196 abt = &sp->u.iocb_cmd; 2197 abt->u.abt.comp_status = le32_to_cpu(pkt->tgt_id_sts); 2198 sp->done(vha, sp, 0); 2199 } 2200 2201 static void 2202 qlafx00_ioctl_iosb_entry(scsi_qla_host_t *vha, struct req_que *req, 2203 struct ioctl_iocb_entry_fx00 *pkt) 2204 { 2205 const char func[] = "IOSB_IOCB"; 2206 srb_t *sp; 2207 struct fc_bsg_job *bsg_job; 2208 struct srb_iocb *iocb_job; 2209 int res; 2210 struct qla_mt_iocb_rsp_fx00 fstatus; 2211 uint8_t *fw_sts_ptr; 2212 2213 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt); 2214 if (!sp) 2215 return; 2216 2217 if (sp->type == SRB_FXIOCB_DCMD) { 2218 iocb_job = &sp->u.iocb_cmd; 2219 iocb_job->u.fxiocb.seq_number = le32_to_cpu(pkt->seq_no); 2220 iocb_job->u.fxiocb.fw_flags = le32_to_cpu(pkt->fw_iotcl_flags); 2221 iocb_job->u.fxiocb.result = le32_to_cpu(pkt->status); 2222 if (iocb_job->u.fxiocb.flags & SRB_FXDISC_RSP_DWRD_VALID) 2223 iocb_job->u.fxiocb.req_data = 2224 le32_to_cpu(pkt->dataword_r); 2225 } else { 2226 bsg_job = sp->u.bsg_job; 2227 2228 memset(&fstatus, 0, sizeof(struct qla_mt_iocb_rsp_fx00)); 2229 2230 fstatus.reserved_1 = pkt->reserved_0; 2231 fstatus.func_type = pkt->comp_func_num; 2232 fstatus.ioctl_flags = pkt->fw_iotcl_flags; 2233 fstatus.ioctl_data = pkt->dataword_r; 2234 fstatus.adapid = pkt->adapid; 2235 fstatus.adapid_hi = pkt->adapid_hi; 2236 fstatus.reserved_2 = pkt->reserved_1; 2237 fstatus.res_count = pkt->residuallen; 2238 fstatus.status = pkt->status; 2239 fstatus.seq_number = pkt->seq_no; 2240 memcpy(fstatus.reserved_3, 2241 pkt->reserved_2, 20 * sizeof(uint8_t)); 2242 2243 fw_sts_ptr = ((uint8_t *)bsg_job->req->sense) + 2244 sizeof(struct fc_bsg_reply); 2245 2246 memcpy(fw_sts_ptr, (uint8_t *)&fstatus, 2247 sizeof(struct qla_mt_iocb_rsp_fx00)); 2248 bsg_job->reply_len = sizeof(struct fc_bsg_reply) + 2249 sizeof(struct qla_mt_iocb_rsp_fx00) + sizeof(uint8_t); 2250 2251 ql_dump_buffer(ql_dbg_user + ql_dbg_verbose, 2252 sp->fcport->vha, 0x5080, 2253 (uint8_t *)pkt, sizeof(struct ioctl_iocb_entry_fx00)); 2254 2255 ql_dump_buffer(ql_dbg_user + ql_dbg_verbose, 2256 sp->fcport->vha, 0x5074, 2257 (uint8_t *)fw_sts_ptr, sizeof(struct qla_mt_iocb_rsp_fx00)); 2258 2259 res = bsg_job->reply->result = DID_OK << 16; 2260 bsg_job->reply->reply_payload_rcv_len = 2261 bsg_job->reply_payload.payload_len; 2262 } 2263 sp->done(vha, sp, res); 2264 } 2265 2266 /** 2267 * qlafx00_status_entry() - Process a Status IOCB entry. 2268 * @ha: SCSI driver HA context 2269 * @pkt: Entry pointer 2270 */ 2271 static void 2272 qlafx00_status_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, void *pkt) 2273 { 2274 srb_t *sp; 2275 fc_port_t *fcport; 2276 struct scsi_cmnd *cp; 2277 struct sts_entry_fx00 *sts; 2278 uint16_t comp_status; 2279 uint16_t scsi_status; 2280 uint16_t ox_id; 2281 uint8_t lscsi_status; 2282 int32_t resid; 2283 uint32_t sense_len, par_sense_len, rsp_info_len, resid_len, 2284 fw_resid_len; 2285 uint8_t *rsp_info = NULL, *sense_data = NULL; 2286 struct qla_hw_data *ha = vha->hw; 2287 uint32_t hindex, handle; 2288 uint16_t que; 2289 struct req_que *req; 2290 int logit = 1; 2291 int res = 0; 2292 2293 sts = (struct sts_entry_fx00 *) pkt; 2294 2295 comp_status = le16_to_cpu(sts->comp_status); 2296 scsi_status = le16_to_cpu(sts->scsi_status) & SS_MASK; 2297 hindex = sts->handle; 2298 handle = LSW(hindex); 2299 2300 que = MSW(hindex); 2301 req = ha->req_q_map[que]; 2302 2303 /* Validate handle. */ 2304 if (handle < req->num_outstanding_cmds) 2305 sp = req->outstanding_cmds[handle]; 2306 else 2307 sp = NULL; 2308 2309 if (sp == NULL) { 2310 ql_dbg(ql_dbg_io, vha, 0x3034, 2311 "Invalid status handle (0x%x).\n", handle); 2312 2313 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 2314 qla2xxx_wake_dpc(vha); 2315 return; 2316 } 2317 2318 if (sp->type == SRB_TM_CMD) { 2319 req->outstanding_cmds[handle] = NULL; 2320 qlafx00_tm_iocb_entry(vha, req, pkt, sp, 2321 scsi_status, comp_status); 2322 return; 2323 } 2324 2325 /* Fast path completion. */ 2326 if (comp_status == CS_COMPLETE && scsi_status == 0) { 2327 qla2x00_do_host_ramp_up(vha); 2328 qla2x00_process_completed_request(vha, req, handle); 2329 return; 2330 } 2331 2332 req->outstanding_cmds[handle] = NULL; 2333 cp = GET_CMD_SP(sp); 2334 if (cp == NULL) { 2335 ql_dbg(ql_dbg_io, vha, 0x3048, 2336 "Command already returned (0x%x/%p).\n", 2337 handle, sp); 2338 2339 return; 2340 } 2341 2342 lscsi_status = scsi_status & STATUS_MASK; 2343 2344 fcport = sp->fcport; 2345 2346 ox_id = 0; 2347 sense_len = par_sense_len = rsp_info_len = resid_len = 2348 fw_resid_len = 0; 2349 if (scsi_status & SS_SENSE_LEN_VALID) 2350 sense_len = le32_to_cpu(sts->sense_len); 2351 if (scsi_status & (SS_RESIDUAL_UNDER | SS_RESIDUAL_OVER)) 2352 resid_len = le32_to_cpu(sts->residual_len); 2353 if (comp_status == CS_DATA_UNDERRUN) 2354 fw_resid_len = le32_to_cpu(sts->residual_len); 2355 rsp_info = sense_data = sts->data; 2356 par_sense_len = sizeof(sts->data); 2357 2358 /* Check for overrun. */ 2359 if (comp_status == CS_COMPLETE && 2360 scsi_status & SS_RESIDUAL_OVER) 2361 comp_status = CS_DATA_OVERRUN; 2362 2363 /* 2364 * Based on Host and scsi status generate status code for Linux 2365 */ 2366 switch (comp_status) { 2367 case CS_COMPLETE: 2368 case CS_QUEUE_FULL: 2369 if (scsi_status == 0) { 2370 res = DID_OK << 16; 2371 break; 2372 } 2373 if (scsi_status & (SS_RESIDUAL_UNDER | SS_RESIDUAL_OVER)) { 2374 resid = resid_len; 2375 scsi_set_resid(cp, resid); 2376 2377 if (!lscsi_status && 2378 ((unsigned)(scsi_bufflen(cp) - resid) < 2379 cp->underflow)) { 2380 ql_dbg(ql_dbg_io, fcport->vha, 0x3050, 2381 "Mid-layer underflow " 2382 "detected (0x%x of 0x%x bytes).\n", 2383 resid, scsi_bufflen(cp)); 2384 2385 res = DID_ERROR << 16; 2386 break; 2387 } 2388 } 2389 res = DID_OK << 16 | lscsi_status; 2390 2391 if (lscsi_status == SAM_STAT_TASK_SET_FULL) { 2392 ql_dbg(ql_dbg_io, fcport->vha, 0x3051, 2393 "QUEUE FULL detected.\n"); 2394 break; 2395 } 2396 logit = 0; 2397 if (lscsi_status != SS_CHECK_CONDITION) 2398 break; 2399 2400 memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE); 2401 if (!(scsi_status & SS_SENSE_LEN_VALID)) 2402 break; 2403 2404 qlafx00_handle_sense(sp, sense_data, par_sense_len, sense_len, 2405 rsp, res); 2406 break; 2407 2408 case CS_DATA_UNDERRUN: 2409 /* Use F/W calculated residual length. */ 2410 if (IS_FWI2_CAPABLE(ha) || IS_QLAFX00(ha)) 2411 resid = fw_resid_len; 2412 else 2413 resid = resid_len; 2414 scsi_set_resid(cp, resid); 2415 if (scsi_status & SS_RESIDUAL_UNDER) { 2416 if ((IS_FWI2_CAPABLE(ha) || IS_QLAFX00(ha)) 2417 && fw_resid_len != resid_len) { 2418 ql_dbg(ql_dbg_io, fcport->vha, 0x3052, 2419 "Dropped frame(s) detected " 2420 "(0x%x of 0x%x bytes).\n", 2421 resid, scsi_bufflen(cp)); 2422 2423 res = DID_ERROR << 16 | lscsi_status; 2424 goto check_scsi_status; 2425 } 2426 2427 if (!lscsi_status && 2428 ((unsigned)(scsi_bufflen(cp) - resid) < 2429 cp->underflow)) { 2430 ql_dbg(ql_dbg_io, fcport->vha, 0x3053, 2431 "Mid-layer underflow " 2432 "detected (0x%x of 0x%x bytes, " 2433 "cp->underflow: 0x%x).\n", 2434 resid, scsi_bufflen(cp), cp->underflow); 2435 2436 res = DID_ERROR << 16; 2437 break; 2438 } 2439 } else if (lscsi_status != SAM_STAT_TASK_SET_FULL && 2440 lscsi_status != SAM_STAT_BUSY) { 2441 /* 2442 * scsi status of task set and busy are considered 2443 * to be task not completed. 2444 */ 2445 2446 ql_dbg(ql_dbg_io, fcport->vha, 0x3054, 2447 "Dropped frame(s) detected (0x%x " 2448 "of 0x%x bytes).\n", resid, 2449 scsi_bufflen(cp)); 2450 2451 res = DID_ERROR << 16 | lscsi_status; 2452 goto check_scsi_status; 2453 } else { 2454 ql_dbg(ql_dbg_io, fcport->vha, 0x3055, 2455 "scsi_status: 0x%x, lscsi_status: 0x%x\n", 2456 scsi_status, lscsi_status); 2457 } 2458 2459 res = DID_OK << 16 | lscsi_status; 2460 logit = 0; 2461 2462 check_scsi_status: 2463 /* 2464 * Check to see if SCSI Status is non zero. If so report SCSI 2465 * Status. 2466 */ 2467 if (lscsi_status != 0) { 2468 if (lscsi_status == SAM_STAT_TASK_SET_FULL) { 2469 ql_dbg(ql_dbg_io, fcport->vha, 0x3056, 2470 "QUEUE FULL detected.\n"); 2471 logit = 1; 2472 break; 2473 } 2474 if (lscsi_status != SS_CHECK_CONDITION) 2475 break; 2476 2477 memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE); 2478 if (!(scsi_status & SS_SENSE_LEN_VALID)) 2479 break; 2480 2481 qlafx00_handle_sense(sp, sense_data, par_sense_len, 2482 sense_len, rsp, res); 2483 } 2484 break; 2485 2486 case CS_PORT_LOGGED_OUT: 2487 case CS_PORT_CONFIG_CHG: 2488 case CS_PORT_BUSY: 2489 case CS_INCOMPLETE: 2490 case CS_PORT_UNAVAILABLE: 2491 case CS_TIMEOUT: 2492 case CS_RESET: 2493 2494 /* 2495 * We are going to have the fc class block the rport 2496 * while we try to recover so instruct the mid layer 2497 * to requeue until the class decides how to handle this. 2498 */ 2499 res = DID_TRANSPORT_DISRUPTED << 16; 2500 2501 ql_dbg(ql_dbg_io, fcport->vha, 0x3057, 2502 "Port down status: port-state=0x%x.\n", 2503 atomic_read(&fcport->state)); 2504 2505 if (atomic_read(&fcport->state) == FCS_ONLINE) 2506 qla2x00_mark_device_lost(fcport->vha, fcport, 1, 1); 2507 break; 2508 2509 case CS_ABORTED: 2510 res = DID_RESET << 16; 2511 break; 2512 2513 default: 2514 res = DID_ERROR << 16; 2515 break; 2516 } 2517 2518 if (logit) 2519 ql_dbg(ql_dbg_io, fcport->vha, 0x3058, 2520 "FCP command status: 0x%x-0x%x (0x%x) " 2521 "nexus=%ld:%d:%d tgt_id: 0x%x lscsi_status: 0x%x" 2522 "cdb=%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x len=0x%x " 2523 "rsp_info=0x%x resid=0x%x fw_resid=0x%x " 2524 "sense_len=0x%x, par_sense_len=0x%x, rsp_info_len=0x%x\n", 2525 comp_status, scsi_status, res, vha->host_no, 2526 cp->device->id, cp->device->lun, fcport->tgt_id, 2527 lscsi_status, cp->cmnd[0], cp->cmnd[1], cp->cmnd[2], 2528 cp->cmnd[3], cp->cmnd[4], cp->cmnd[5], cp->cmnd[6], 2529 cp->cmnd[7], cp->cmnd[8], cp->cmnd[9], scsi_bufflen(cp), 2530 rsp_info_len, resid_len, fw_resid_len, sense_len, 2531 par_sense_len, rsp_info_len); 2532 2533 if (!res) 2534 qla2x00_do_host_ramp_up(vha); 2535 2536 if (rsp->status_srb == NULL) 2537 sp->done(ha, sp, res); 2538 } 2539 2540 /** 2541 * qlafx00_status_cont_entry() - Process a Status Continuations entry. 2542 * @ha: SCSI driver HA context 2543 * @pkt: Entry pointer 2544 * 2545 * Extended sense data. 2546 */ 2547 static void 2548 qlafx00_status_cont_entry(struct rsp_que *rsp, sts_cont_entry_t *pkt) 2549 { 2550 uint8_t sense_sz = 0; 2551 struct qla_hw_data *ha = rsp->hw; 2552 struct scsi_qla_host *vha = pci_get_drvdata(ha->pdev); 2553 srb_t *sp = rsp->status_srb; 2554 struct scsi_cmnd *cp; 2555 uint32_t sense_len; 2556 uint8_t *sense_ptr; 2557 2558 if (!sp) { 2559 ql_dbg(ql_dbg_io, vha, 0x3037, 2560 "no SP, sp = %p\n", sp); 2561 return; 2562 } 2563 2564 if (!GET_FW_SENSE_LEN(sp)) { 2565 ql_dbg(ql_dbg_io, vha, 0x304b, 2566 "no fw sense data, sp = %p\n", sp); 2567 return; 2568 } 2569 cp = GET_CMD_SP(sp); 2570 if (cp == NULL) { 2571 ql_log(ql_log_warn, vha, 0x303b, 2572 "cmd is NULL: already returned to OS (sp=%p).\n", sp); 2573 2574 rsp->status_srb = NULL; 2575 return; 2576 } 2577 2578 if (!GET_CMD_SENSE_LEN(sp)) { 2579 ql_dbg(ql_dbg_io, vha, 0x304c, 2580 "no sense data, sp = %p\n", sp); 2581 } else { 2582 sense_len = GET_CMD_SENSE_LEN(sp); 2583 sense_ptr = GET_CMD_SENSE_PTR(sp); 2584 ql_dbg(ql_dbg_io, vha, 0x304f, 2585 "sp=%p sense_len=0x%x sense_ptr=%p.\n", 2586 sp, sense_len, sense_ptr); 2587 2588 if (sense_len > sizeof(pkt->data)) 2589 sense_sz = sizeof(pkt->data); 2590 else 2591 sense_sz = sense_len; 2592 2593 /* Move sense data. */ 2594 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x304e, 2595 (uint8_t *)pkt, sizeof(sts_cont_entry_t)); 2596 memcpy(sense_ptr, pkt->data, sense_sz); 2597 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x304a, 2598 sense_ptr, sense_sz); 2599 2600 sense_len -= sense_sz; 2601 sense_ptr += sense_sz; 2602 2603 SET_CMD_SENSE_PTR(sp, sense_ptr); 2604 SET_CMD_SENSE_LEN(sp, sense_len); 2605 } 2606 sense_len = GET_FW_SENSE_LEN(sp); 2607 sense_len = (sense_len > sizeof(pkt->data)) ? 2608 (sense_len - sizeof(pkt->data)) : 0; 2609 SET_FW_SENSE_LEN(sp, sense_len); 2610 2611 /* Place command on done queue. */ 2612 if (sense_len == 0) { 2613 rsp->status_srb = NULL; 2614 sp->done(ha, sp, cp->result); 2615 } 2616 } 2617 2618 /** 2619 * qlafx00_multistatus_entry() - Process Multi response queue entries. 2620 * @ha: SCSI driver HA context 2621 */ 2622 static void 2623 qlafx00_multistatus_entry(struct scsi_qla_host *vha, 2624 struct rsp_que *rsp, void *pkt) 2625 { 2626 srb_t *sp; 2627 struct multi_sts_entry_fx00 *stsmfx; 2628 struct qla_hw_data *ha = vha->hw; 2629 uint32_t handle, hindex, handle_count, i; 2630 uint16_t que; 2631 struct req_que *req; 2632 uint32_t *handle_ptr; 2633 2634 stsmfx = (struct multi_sts_entry_fx00 *) pkt; 2635 2636 handle_count = stsmfx->handle_count; 2637 2638 if (handle_count > MAX_HANDLE_COUNT) { 2639 ql_dbg(ql_dbg_io, vha, 0x3035, 2640 "Invalid handle count (0x%x).\n", handle_count); 2641 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 2642 qla2xxx_wake_dpc(vha); 2643 return; 2644 } 2645 2646 handle_ptr = (uint32_t *) &stsmfx->handles[0]; 2647 2648 for (i = 0; i < handle_count; i++) { 2649 hindex = le32_to_cpu(*handle_ptr); 2650 handle = LSW(hindex); 2651 que = MSW(hindex); 2652 req = ha->req_q_map[que]; 2653 2654 /* Validate handle. */ 2655 if (handle < req->num_outstanding_cmds) 2656 sp = req->outstanding_cmds[handle]; 2657 else 2658 sp = NULL; 2659 2660 if (sp == NULL) { 2661 ql_dbg(ql_dbg_io, vha, 0x3044, 2662 "Invalid status handle (0x%x).\n", handle); 2663 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 2664 qla2xxx_wake_dpc(vha); 2665 return; 2666 } 2667 qla2x00_process_completed_request(vha, req, handle); 2668 handle_ptr++; 2669 } 2670 } 2671 2672 /** 2673 * qlafx00_error_entry() - Process an error entry. 2674 * @ha: SCSI driver HA context 2675 * @pkt: Entry pointer 2676 */ 2677 static void 2678 qlafx00_error_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, 2679 struct sts_entry_fx00 *pkt, uint8_t estatus, uint8_t etype) 2680 { 2681 srb_t *sp; 2682 struct qla_hw_data *ha = vha->hw; 2683 const char func[] = "ERROR-IOCB"; 2684 uint16_t que = MSW(pkt->handle); 2685 struct req_que *req = NULL; 2686 int res = DID_ERROR << 16; 2687 2688 ql_dbg(ql_dbg_async, vha, 0x507f, 2689 "type of error status in response: 0x%x\n", estatus); 2690 2691 req = ha->req_q_map[que]; 2692 2693 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt); 2694 if (sp) { 2695 sp->done(ha, sp, res); 2696 return; 2697 } 2698 2699 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 2700 qla2xxx_wake_dpc(vha); 2701 } 2702 2703 /** 2704 * qlafx00_process_response_queue() - Process response queue entries. 2705 * @ha: SCSI driver HA context 2706 */ 2707 static void 2708 qlafx00_process_response_queue(struct scsi_qla_host *vha, 2709 struct rsp_que *rsp) 2710 { 2711 struct sts_entry_fx00 *pkt; 2712 response_t *lptr; 2713 2714 if (!vha->flags.online) 2715 return; 2716 2717 while (RD_REG_DWORD(&(rsp->ring_ptr->signature)) != 2718 RESPONSE_PROCESSED) { 2719 lptr = rsp->ring_ptr; 2720 memcpy_fromio(rsp->rsp_pkt, lptr, sizeof(rsp->rsp_pkt)); 2721 pkt = (struct sts_entry_fx00 *)rsp->rsp_pkt; 2722 2723 rsp->ring_index++; 2724 if (rsp->ring_index == rsp->length) { 2725 rsp->ring_index = 0; 2726 rsp->ring_ptr = rsp->ring; 2727 } else { 2728 rsp->ring_ptr++; 2729 } 2730 2731 if (pkt->entry_status != 0 && 2732 pkt->entry_type != IOCTL_IOSB_TYPE_FX00) { 2733 qlafx00_error_entry(vha, rsp, 2734 (struct sts_entry_fx00 *)pkt, pkt->entry_status, 2735 pkt->entry_type); 2736 goto next_iter; 2737 continue; 2738 } 2739 2740 switch (pkt->entry_type) { 2741 case STATUS_TYPE_FX00: 2742 qlafx00_status_entry(vha, rsp, pkt); 2743 break; 2744 2745 case STATUS_CONT_TYPE_FX00: 2746 qlafx00_status_cont_entry(rsp, (sts_cont_entry_t *)pkt); 2747 break; 2748 2749 case MULTI_STATUS_TYPE_FX00: 2750 qlafx00_multistatus_entry(vha, rsp, pkt); 2751 break; 2752 2753 case ABORT_IOCB_TYPE_FX00: 2754 qlafx00_abort_iocb_entry(vha, rsp->req, 2755 (struct abort_iocb_entry_fx00 *)pkt); 2756 break; 2757 2758 case IOCTL_IOSB_TYPE_FX00: 2759 qlafx00_ioctl_iosb_entry(vha, rsp->req, 2760 (struct ioctl_iocb_entry_fx00 *)pkt); 2761 break; 2762 default: 2763 /* Type Not Supported. */ 2764 ql_dbg(ql_dbg_async, vha, 0x5081, 2765 "Received unknown response pkt type %x " 2766 "entry status=%x.\n", 2767 pkt->entry_type, pkt->entry_status); 2768 break; 2769 } 2770 next_iter: 2771 WRT_REG_DWORD(&lptr->signature, RESPONSE_PROCESSED); 2772 wmb(); 2773 } 2774 2775 /* Adjust ring index */ 2776 WRT_REG_DWORD(rsp->rsp_q_out, rsp->ring_index); 2777 } 2778 2779 /** 2780 * qlafx00_async_event() - Process aynchronous events. 2781 * @ha: SCSI driver HA context 2782 */ 2783 static void 2784 qlafx00_async_event(scsi_qla_host_t *vha) 2785 { 2786 struct qla_hw_data *ha = vha->hw; 2787 struct device_reg_fx00 __iomem *reg; 2788 int data_size = 1; 2789 2790 reg = &ha->iobase->ispfx00; 2791 /* Setup to process RIO completion. */ 2792 switch (ha->aenmb[0]) { 2793 case QLAFX00_MBA_SYSTEM_ERR: /* System Error */ 2794 ql_log(ql_log_warn, vha, 0x5079, 2795 "ISP System Error - mbx1=%x\n", ha->aenmb[0]); 2796 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 2797 break; 2798 2799 case QLAFX00_MBA_SHUTDOWN_RQSTD: /* Shutdown requested */ 2800 ql_dbg(ql_dbg_async, vha, 0x5076, 2801 "Asynchronous FW shutdown requested.\n"); 2802 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 2803 qla2xxx_wake_dpc(vha); 2804 break; 2805 2806 case QLAFX00_MBA_PORT_UPDATE: /* Port database update */ 2807 ha->aenmb[1] = RD_REG_WORD(®->aenmailbox1); 2808 ha->aenmb[2] = RD_REG_WORD(®->aenmailbox2); 2809 ha->aenmb[3] = RD_REG_WORD(®->aenmailbox3); 2810 ql_dbg(ql_dbg_async, vha, 0x5077, 2811 "Asynchronous port Update received " 2812 "aenmb[0]: %x, aenmb[1]: %x, aenmb[2]: %x, aenmb[3]: %x\n", 2813 ha->aenmb[0], ha->aenmb[1], ha->aenmb[2], ha->aenmb[3]); 2814 data_size = 4; 2815 break; 2816 default: 2817 ha->aenmb[1] = RD_REG_WORD(®->aenmailbox1); 2818 ha->aenmb[2] = RD_REG_WORD(®->aenmailbox2); 2819 ha->aenmb[3] = RD_REG_WORD(®->aenmailbox3); 2820 ha->aenmb[4] = RD_REG_WORD(®->aenmailbox4); 2821 ha->aenmb[5] = RD_REG_WORD(®->aenmailbox5); 2822 ha->aenmb[6] = RD_REG_WORD(®->aenmailbox6); 2823 ha->aenmb[7] = RD_REG_WORD(®->aenmailbox7); 2824 ql_dbg(ql_dbg_async, vha, 0x5078, 2825 "AEN:%04x %04x %04x %04x :%04x %04x %04x %04x\n", 2826 ha->aenmb[0], ha->aenmb[1], ha->aenmb[2], ha->aenmb[3], 2827 ha->aenmb[4], ha->aenmb[5], ha->aenmb[6], ha->aenmb[7]); 2828 break; 2829 } 2830 qlafx00_post_aenfx_work(vha, ha->aenmb[0], 2831 (uint32_t *)ha->aenmb, data_size); 2832 } 2833 2834 /** 2835 * 2836 * qlafx00x_mbx_completion() - Process mailbox command completions. 2837 * @ha: SCSI driver HA context 2838 * @mb16: Mailbox16 register 2839 */ 2840 static void 2841 qlafx00_mbx_completion(scsi_qla_host_t *vha, uint32_t mb0) 2842 { 2843 uint16_t cnt; 2844 uint16_t __iomem *wptr; 2845 struct qla_hw_data *ha = vha->hw; 2846 struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00; 2847 2848 if (!ha->mcp32) 2849 ql_dbg(ql_dbg_async, vha, 0x507e, "MBX pointer ERROR.\n"); 2850 2851 /* Load return mailbox registers. */ 2852 ha->flags.mbox_int = 1; 2853 ha->mailbox_out32[0] = mb0; 2854 wptr = (uint16_t __iomem *)®->mailbox17; 2855 2856 for (cnt = 1; cnt < ha->mbx_count; cnt++) { 2857 ha->mailbox_out32[cnt] = RD_REG_WORD(wptr); 2858 wptr++; 2859 } 2860 } 2861 2862 /** 2863 * qlafx00_intr_handler() - Process interrupts for the ISPFX00. 2864 * @irq: 2865 * @dev_id: SCSI driver HA context 2866 * 2867 * Called by system whenever the host adapter generates an interrupt. 2868 * 2869 * Returns handled flag. 2870 */ 2871 irqreturn_t 2872 qlafx00_intr_handler(int irq, void *dev_id) 2873 { 2874 scsi_qla_host_t *vha; 2875 struct qla_hw_data *ha; 2876 struct device_reg_fx00 __iomem *reg; 2877 int status; 2878 unsigned long iter; 2879 uint32_t stat; 2880 uint32_t mb[8]; 2881 struct rsp_que *rsp; 2882 unsigned long flags; 2883 uint32_t clr_intr = 0; 2884 2885 rsp = (struct rsp_que *) dev_id; 2886 if (!rsp) { 2887 ql_log(ql_log_info, NULL, 0x507d, 2888 "%s: NULL response queue pointer.\n", __func__); 2889 return IRQ_NONE; 2890 } 2891 2892 ha = rsp->hw; 2893 reg = &ha->iobase->ispfx00; 2894 status = 0; 2895 2896 if (unlikely(pci_channel_offline(ha->pdev))) 2897 return IRQ_HANDLED; 2898 2899 spin_lock_irqsave(&ha->hardware_lock, flags); 2900 vha = pci_get_drvdata(ha->pdev); 2901 for (iter = 50; iter--; clr_intr = 0) { 2902 stat = QLAFX00_RD_INTR_REG(ha); 2903 if ((stat & QLAFX00_HST_INT_STS_BITS) == 0) 2904 break; 2905 2906 switch (stat & QLAFX00_HST_INT_STS_BITS) { 2907 case QLAFX00_INTR_MB_CMPLT: 2908 case QLAFX00_INTR_MB_RSP_CMPLT: 2909 case QLAFX00_INTR_MB_ASYNC_CMPLT: 2910 case QLAFX00_INTR_ALL_CMPLT: 2911 mb[0] = RD_REG_WORD(®->mailbox16); 2912 qlafx00_mbx_completion(vha, mb[0]); 2913 status |= MBX_INTERRUPT; 2914 clr_intr |= QLAFX00_INTR_MB_CMPLT; 2915 break; 2916 case QLAFX00_INTR_ASYNC_CMPLT: 2917 case QLAFX00_INTR_RSP_ASYNC_CMPLT: 2918 ha->aenmb[0] = RD_REG_WORD(®->aenmailbox0); 2919 qlafx00_async_event(vha); 2920 clr_intr |= QLAFX00_INTR_ASYNC_CMPLT; 2921 break; 2922 case QLAFX00_INTR_RSP_CMPLT: 2923 qlafx00_process_response_queue(vha, rsp); 2924 clr_intr |= QLAFX00_INTR_RSP_CMPLT; 2925 break; 2926 default: 2927 ql_dbg(ql_dbg_async, vha, 0x507a, 2928 "Unrecognized interrupt type (%d).\n", stat); 2929 break; 2930 } 2931 QLAFX00_CLR_INTR_REG(ha, clr_intr); 2932 QLAFX00_RD_INTR_REG(ha); 2933 } 2934 2935 qla2x00_handle_mbx_completion(ha, status); 2936 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2937 2938 return IRQ_HANDLED; 2939 } 2940 2941 /** QLAFX00 specific IOCB implementation functions */ 2942 2943 static inline cont_a64_entry_t * 2944 qlafx00_prep_cont_type1_iocb(struct req_que *req, 2945 cont_a64_entry_t *lcont_pkt) 2946 { 2947 cont_a64_entry_t *cont_pkt; 2948 2949 /* Adjust ring index. */ 2950 req->ring_index++; 2951 if (req->ring_index == req->length) { 2952 req->ring_index = 0; 2953 req->ring_ptr = req->ring; 2954 } else { 2955 req->ring_ptr++; 2956 } 2957 2958 cont_pkt = (cont_a64_entry_t *)req->ring_ptr; 2959 2960 /* Load packet defaults. */ 2961 *((uint32_t *)(&lcont_pkt->entry_type)) = 2962 __constant_cpu_to_le32(CONTINUE_A64_TYPE_FX00); 2963 2964 return cont_pkt; 2965 } 2966 2967 static inline void 2968 qlafx00_build_scsi_iocbs(srb_t *sp, struct cmd_type_7_fx00 *cmd_pkt, 2969 uint16_t tot_dsds, struct cmd_type_7_fx00 *lcmd_pkt) 2970 { 2971 uint16_t avail_dsds; 2972 uint32_t *cur_dsd; 2973 scsi_qla_host_t *vha; 2974 struct scsi_cmnd *cmd; 2975 struct scatterlist *sg; 2976 int i, cont; 2977 struct req_que *req; 2978 cont_a64_entry_t lcont_pkt; 2979 cont_a64_entry_t *cont_pkt; 2980 2981 vha = sp->fcport->vha; 2982 req = vha->req; 2983 2984 cmd = GET_CMD_SP(sp); 2985 cont = 0; 2986 cont_pkt = NULL; 2987 2988 /* Update entry type to indicate Command Type 3 IOCB */ 2989 *((uint32_t *)(&lcmd_pkt->entry_type)) = 2990 __constant_cpu_to_le32(FX00_COMMAND_TYPE_7); 2991 2992 /* No data transfer */ 2993 if (!scsi_bufflen(cmd) || cmd->sc_data_direction == DMA_NONE) { 2994 lcmd_pkt->byte_count = __constant_cpu_to_le32(0); 2995 return; 2996 } 2997 2998 /* Set transfer direction */ 2999 if (cmd->sc_data_direction == DMA_TO_DEVICE) { 3000 lcmd_pkt->cntrl_flags = TMF_WRITE_DATA; 3001 vha->qla_stats.output_bytes += scsi_bufflen(cmd); 3002 } else if (cmd->sc_data_direction == DMA_FROM_DEVICE) { 3003 lcmd_pkt->cntrl_flags = TMF_READ_DATA; 3004 vha->qla_stats.input_bytes += scsi_bufflen(cmd); 3005 } 3006 3007 /* One DSD is available in the Command Type 3 IOCB */ 3008 avail_dsds = 1; 3009 cur_dsd = (uint32_t *)&lcmd_pkt->dseg_0_address; 3010 3011 /* Load data segments */ 3012 scsi_for_each_sg(cmd, sg, tot_dsds, i) { 3013 dma_addr_t sle_dma; 3014 3015 /* Allocate additional continuation packets? */ 3016 if (avail_dsds == 0) { 3017 /* 3018 * Five DSDs are available in the Continuation 3019 * Type 1 IOCB. 3020 */ 3021 memset(&lcont_pkt, 0, REQUEST_ENTRY_SIZE); 3022 cont_pkt = 3023 qlafx00_prep_cont_type1_iocb(req, &lcont_pkt); 3024 cur_dsd = (uint32_t *)lcont_pkt.dseg_0_address; 3025 avail_dsds = 5; 3026 cont = 1; 3027 } 3028 3029 sle_dma = sg_dma_address(sg); 3030 *cur_dsd++ = cpu_to_le32(LSD(sle_dma)); 3031 *cur_dsd++ = cpu_to_le32(MSD(sle_dma)); 3032 *cur_dsd++ = cpu_to_le32(sg_dma_len(sg)); 3033 avail_dsds--; 3034 if (avail_dsds == 0 && cont == 1) { 3035 cont = 0; 3036 memcpy_toio((void __iomem *)cont_pkt, &lcont_pkt, 3037 REQUEST_ENTRY_SIZE); 3038 } 3039 3040 } 3041 if (avail_dsds != 0 && cont == 1) { 3042 memcpy_toio((void __iomem *)cont_pkt, &lcont_pkt, 3043 REQUEST_ENTRY_SIZE); 3044 } 3045 } 3046 3047 /** 3048 * qlafx00_start_scsi() - Send a SCSI command to the ISP 3049 * @sp: command to send to the ISP 3050 * 3051 * Returns non-zero if a failure occurred, else zero. 3052 */ 3053 int 3054 qlafx00_start_scsi(srb_t *sp) 3055 { 3056 int ret, nseg; 3057 unsigned long flags; 3058 uint32_t index; 3059 uint32_t handle; 3060 uint16_t cnt; 3061 uint16_t req_cnt; 3062 uint16_t tot_dsds; 3063 struct req_que *req = NULL; 3064 struct rsp_que *rsp = NULL; 3065 struct scsi_cmnd *cmd = GET_CMD_SP(sp); 3066 struct scsi_qla_host *vha = sp->fcport->vha; 3067 struct qla_hw_data *ha = vha->hw; 3068 struct cmd_type_7_fx00 *cmd_pkt; 3069 struct cmd_type_7_fx00 lcmd_pkt; 3070 struct scsi_lun llun; 3071 char tag[2]; 3072 3073 /* Setup device pointers. */ 3074 ret = 0; 3075 3076 rsp = ha->rsp_q_map[0]; 3077 req = vha->req; 3078 3079 /* So we know we haven't pci_map'ed anything yet */ 3080 tot_dsds = 0; 3081 3082 /* Forcing marker needed for now */ 3083 vha->marker_needed = 0; 3084 3085 /* Send marker if required */ 3086 if (vha->marker_needed != 0) { 3087 if (qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL) != 3088 QLA_SUCCESS) 3089 return QLA_FUNCTION_FAILED; 3090 vha->marker_needed = 0; 3091 } 3092 3093 /* Acquire ring specific lock */ 3094 spin_lock_irqsave(&ha->hardware_lock, flags); 3095 3096 /* Check for room in outstanding command list. */ 3097 handle = req->current_outstanding_cmd; 3098 for (index = 1; index < req->num_outstanding_cmds; index++) { 3099 handle++; 3100 if (handle == req->num_outstanding_cmds) 3101 handle = 1; 3102 if (!req->outstanding_cmds[handle]) 3103 break; 3104 } 3105 if (index == req->num_outstanding_cmds) 3106 goto queuing_error; 3107 3108 /* Map the sg table so we have an accurate count of sg entries needed */ 3109 if (scsi_sg_count(cmd)) { 3110 nseg = dma_map_sg(&ha->pdev->dev, scsi_sglist(cmd), 3111 scsi_sg_count(cmd), cmd->sc_data_direction); 3112 if (unlikely(!nseg)) 3113 goto queuing_error; 3114 } else 3115 nseg = 0; 3116 3117 tot_dsds = nseg; 3118 req_cnt = qla24xx_calc_iocbs(vha, tot_dsds); 3119 if (req->cnt < (req_cnt + 2)) { 3120 cnt = RD_REG_DWORD_RELAXED(req->req_q_out); 3121 3122 if (req->ring_index < cnt) 3123 req->cnt = cnt - req->ring_index; 3124 else 3125 req->cnt = req->length - 3126 (req->ring_index - cnt); 3127 if (req->cnt < (req_cnt + 2)) 3128 goto queuing_error; 3129 } 3130 3131 /* Build command packet. */ 3132 req->current_outstanding_cmd = handle; 3133 req->outstanding_cmds[handle] = sp; 3134 sp->handle = handle; 3135 cmd->host_scribble = (unsigned char *)(unsigned long)handle; 3136 req->cnt -= req_cnt; 3137 3138 cmd_pkt = (struct cmd_type_7_fx00 *)req->ring_ptr; 3139 3140 memset(&lcmd_pkt, 0, REQUEST_ENTRY_SIZE); 3141 3142 lcmd_pkt.handle = MAKE_HANDLE(req->id, sp->handle); 3143 lcmd_pkt.handle_hi = 0; 3144 lcmd_pkt.dseg_count = cpu_to_le16(tot_dsds); 3145 lcmd_pkt.tgt_idx = cpu_to_le16(sp->fcport->tgt_id); 3146 3147 int_to_scsilun(cmd->device->lun, &llun); 3148 host_to_adap((uint8_t *)&llun, (uint8_t *)&lcmd_pkt.lun, 3149 sizeof(lcmd_pkt.lun)); 3150 3151 /* Update tagged queuing modifier -- default is TSK_SIMPLE (0). */ 3152 if (scsi_populate_tag_msg(cmd, tag)) { 3153 switch (tag[0]) { 3154 case HEAD_OF_QUEUE_TAG: 3155 lcmd_pkt.task = TSK_HEAD_OF_QUEUE; 3156 break; 3157 case ORDERED_QUEUE_TAG: 3158 lcmd_pkt.task = TSK_ORDERED; 3159 break; 3160 } 3161 } 3162 3163 /* Load SCSI command packet. */ 3164 host_to_adap(cmd->cmnd, lcmd_pkt.fcp_cdb, sizeof(lcmd_pkt.fcp_cdb)); 3165 lcmd_pkt.byte_count = cpu_to_le32((uint32_t)scsi_bufflen(cmd)); 3166 3167 /* Build IOCB segments */ 3168 qlafx00_build_scsi_iocbs(sp, cmd_pkt, tot_dsds, &lcmd_pkt); 3169 3170 /* Set total data segment count. */ 3171 lcmd_pkt.entry_count = (uint8_t)req_cnt; 3172 3173 /* Specify response queue number where completion should happen */ 3174 lcmd_pkt.entry_status = (uint8_t) rsp->id; 3175 3176 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x302e, 3177 (uint8_t *)cmd->cmnd, cmd->cmd_len); 3178 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x3032, 3179 (uint8_t *)&lcmd_pkt, REQUEST_ENTRY_SIZE); 3180 3181 memcpy_toio((void __iomem *)cmd_pkt, &lcmd_pkt, REQUEST_ENTRY_SIZE); 3182 wmb(); 3183 3184 /* Adjust ring index. */ 3185 req->ring_index++; 3186 if (req->ring_index == req->length) { 3187 req->ring_index = 0; 3188 req->ring_ptr = req->ring; 3189 } else 3190 req->ring_ptr++; 3191 3192 sp->flags |= SRB_DMA_VALID; 3193 3194 /* Set chip new ring index. */ 3195 WRT_REG_DWORD(req->req_q_in, req->ring_index); 3196 QLAFX00_SET_HST_INTR(ha, ha->rqstq_intr_code); 3197 3198 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3199 return QLA_SUCCESS; 3200 3201 queuing_error: 3202 if (tot_dsds) 3203 scsi_dma_unmap(cmd); 3204 3205 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3206 3207 return QLA_FUNCTION_FAILED; 3208 } 3209 3210 void 3211 qlafx00_tm_iocb(srb_t *sp, struct tsk_mgmt_entry_fx00 *ptm_iocb) 3212 { 3213 struct srb_iocb *fxio = &sp->u.iocb_cmd; 3214 scsi_qla_host_t *vha = sp->fcport->vha; 3215 struct req_que *req = vha->req; 3216 struct tsk_mgmt_entry_fx00 tm_iocb; 3217 struct scsi_lun llun; 3218 3219 memset(&tm_iocb, 0, sizeof(struct tsk_mgmt_entry_fx00)); 3220 tm_iocb.entry_type = TSK_MGMT_IOCB_TYPE_FX00; 3221 tm_iocb.entry_count = 1; 3222 tm_iocb.handle = cpu_to_le32(MAKE_HANDLE(req->id, sp->handle)); 3223 tm_iocb.handle_hi = 0; 3224 tm_iocb.timeout = cpu_to_le16(qla2x00_get_async_timeout(vha) + 2); 3225 tm_iocb.tgt_id = cpu_to_le16(sp->fcport->tgt_id); 3226 tm_iocb.control_flags = cpu_to_le32(fxio->u.tmf.flags); 3227 if (tm_iocb.control_flags == TCF_LUN_RESET) { 3228 int_to_scsilun(fxio->u.tmf.lun, &llun); 3229 host_to_adap((uint8_t *)&llun, (uint8_t *)&tm_iocb.lun, 3230 sizeof(struct scsi_lun)); 3231 } 3232 3233 memcpy((void __iomem *)ptm_iocb, &tm_iocb, 3234 sizeof(struct tsk_mgmt_entry_fx00)); 3235 wmb(); 3236 } 3237 3238 void 3239 qlafx00_abort_iocb(srb_t *sp, struct abort_iocb_entry_fx00 *pabt_iocb) 3240 { 3241 struct srb_iocb *fxio = &sp->u.iocb_cmd; 3242 scsi_qla_host_t *vha = sp->fcport->vha; 3243 struct req_que *req = vha->req; 3244 struct abort_iocb_entry_fx00 abt_iocb; 3245 3246 memset(&abt_iocb, 0, sizeof(struct abort_iocb_entry_fx00)); 3247 abt_iocb.entry_type = ABORT_IOCB_TYPE_FX00; 3248 abt_iocb.entry_count = 1; 3249 abt_iocb.handle = cpu_to_le32(MAKE_HANDLE(req->id, sp->handle)); 3250 abt_iocb.abort_handle = 3251 cpu_to_le32(MAKE_HANDLE(req->id, fxio->u.abt.cmd_hndl)); 3252 abt_iocb.tgt_id_sts = cpu_to_le16(sp->fcport->tgt_id); 3253 abt_iocb.req_que_no = cpu_to_le16(req->id); 3254 3255 memcpy((void __iomem *)pabt_iocb, &abt_iocb, 3256 sizeof(struct abort_iocb_entry_fx00)); 3257 wmb(); 3258 } 3259 3260 void 3261 qlafx00_fxdisc_iocb(srb_t *sp, struct fxdisc_entry_fx00 *pfxiocb) 3262 { 3263 struct srb_iocb *fxio = &sp->u.iocb_cmd; 3264 struct qla_mt_iocb_rqst_fx00 *piocb_rqst; 3265 struct fc_bsg_job *bsg_job; 3266 struct fxdisc_entry_fx00 fx_iocb; 3267 uint8_t entry_cnt = 1; 3268 3269 memset(&fx_iocb, 0, sizeof(struct fxdisc_entry_fx00)); 3270 fx_iocb.entry_type = FX00_IOCB_TYPE; 3271 fx_iocb.handle = cpu_to_le32(sp->handle); 3272 fx_iocb.entry_count = entry_cnt; 3273 3274 if (sp->type == SRB_FXIOCB_DCMD) { 3275 fx_iocb.func_num = 3276 cpu_to_le16(sp->u.iocb_cmd.u.fxiocb.req_func_type); 3277 fx_iocb.adapid = cpu_to_le32(fxio->u.fxiocb.adapter_id); 3278 fx_iocb.adapid_hi = cpu_to_le32(fxio->u.fxiocb.adapter_id_hi); 3279 fx_iocb.reserved_0 = cpu_to_le32(fxio->u.fxiocb.reserved_0); 3280 fx_iocb.reserved_1 = cpu_to_le32(fxio->u.fxiocb.reserved_1); 3281 fx_iocb.dataword_extra = 3282 cpu_to_le32(fxio->u.fxiocb.req_data_extra); 3283 3284 if (fxio->u.fxiocb.flags & SRB_FXDISC_REQ_DMA_VALID) { 3285 fx_iocb.req_dsdcnt = cpu_to_le16(1); 3286 fx_iocb.req_xfrcnt = 3287 cpu_to_le16(fxio->u.fxiocb.req_len); 3288 fx_iocb.dseg_rq_address[0] = 3289 cpu_to_le32(LSD(fxio->u.fxiocb.req_dma_handle)); 3290 fx_iocb.dseg_rq_address[1] = 3291 cpu_to_le32(MSD(fxio->u.fxiocb.req_dma_handle)); 3292 fx_iocb.dseg_rq_len = 3293 cpu_to_le32(fxio->u.fxiocb.req_len); 3294 } 3295 3296 if (fxio->u.fxiocb.flags & SRB_FXDISC_RESP_DMA_VALID) { 3297 fx_iocb.rsp_dsdcnt = cpu_to_le16(1); 3298 fx_iocb.rsp_xfrcnt = 3299 cpu_to_le16(fxio->u.fxiocb.rsp_len); 3300 fx_iocb.dseg_rsp_address[0] = 3301 cpu_to_le32(LSD(fxio->u.fxiocb.rsp_dma_handle)); 3302 fx_iocb.dseg_rsp_address[1] = 3303 cpu_to_le32(MSD(fxio->u.fxiocb.rsp_dma_handle)); 3304 fx_iocb.dseg_rsp_len = 3305 cpu_to_le32(fxio->u.fxiocb.rsp_len); 3306 } 3307 3308 if (fxio->u.fxiocb.flags & SRB_FXDISC_REQ_DWRD_VALID) { 3309 fx_iocb.dataword = 3310 cpu_to_le32(fxio->u.fxiocb.req_data); 3311 } 3312 fx_iocb.flags = fxio->u.fxiocb.flags; 3313 } else { 3314 struct scatterlist *sg; 3315 bsg_job = sp->u.bsg_job; 3316 piocb_rqst = (struct qla_mt_iocb_rqst_fx00 *) 3317 &bsg_job->request->rqst_data.h_vendor.vendor_cmd[1]; 3318 3319 fx_iocb.func_num = piocb_rqst->func_type; 3320 fx_iocb.adapid = piocb_rqst->adapid; 3321 fx_iocb.adapid_hi = piocb_rqst->adapid_hi; 3322 fx_iocb.reserved_0 = piocb_rqst->reserved_0; 3323 fx_iocb.reserved_1 = piocb_rqst->reserved_1; 3324 fx_iocb.dataword_extra = piocb_rqst->dataword_extra; 3325 fx_iocb.dataword = piocb_rqst->dataword; 3326 fx_iocb.req_xfrcnt = cpu_to_le16(piocb_rqst->req_len); 3327 fx_iocb.rsp_xfrcnt = cpu_to_le16(piocb_rqst->rsp_len); 3328 3329 if (piocb_rqst->flags & SRB_FXDISC_REQ_DMA_VALID) { 3330 int avail_dsds, tot_dsds; 3331 cont_a64_entry_t lcont_pkt; 3332 cont_a64_entry_t *cont_pkt = NULL; 3333 uint32_t *cur_dsd; 3334 int index = 0, cont = 0; 3335 3336 fx_iocb.req_dsdcnt = 3337 cpu_to_le16(bsg_job->request_payload.sg_cnt); 3338 tot_dsds = 3339 cpu_to_le32(bsg_job->request_payload.sg_cnt); 3340 cur_dsd = (uint32_t *)&fx_iocb.dseg_rq_address[0]; 3341 avail_dsds = 1; 3342 for_each_sg(bsg_job->request_payload.sg_list, sg, 3343 tot_dsds, index) { 3344 dma_addr_t sle_dma; 3345 3346 /* Allocate additional continuation packets? */ 3347 if (avail_dsds == 0) { 3348 /* 3349 * Five DSDs are available in the Cont. 3350 * Type 1 IOCB. 3351 */ 3352 memset(&lcont_pkt, 0, 3353 REQUEST_ENTRY_SIZE); 3354 cont_pkt = 3355 qlafx00_prep_cont_type1_iocb( 3356 sp->fcport->vha->req, 3357 &lcont_pkt); 3358 cur_dsd = (uint32_t *) 3359 lcont_pkt.dseg_0_address; 3360 avail_dsds = 5; 3361 cont = 1; 3362 entry_cnt++; 3363 } 3364 3365 sle_dma = sg_dma_address(sg); 3366 *cur_dsd++ = cpu_to_le32(LSD(sle_dma)); 3367 *cur_dsd++ = cpu_to_le32(MSD(sle_dma)); 3368 *cur_dsd++ = cpu_to_le32(sg_dma_len(sg)); 3369 avail_dsds--; 3370 3371 if (avail_dsds == 0 && cont == 1) { 3372 cont = 0; 3373 memcpy_toio( 3374 (void __iomem *)cont_pkt, 3375 &lcont_pkt, REQUEST_ENTRY_SIZE); 3376 ql_dump_buffer( 3377 ql_dbg_user + ql_dbg_verbose, 3378 sp->fcport->vha, 0x3042, 3379 (uint8_t *)&lcont_pkt, 3380 REQUEST_ENTRY_SIZE); 3381 } 3382 } 3383 if (avail_dsds != 0 && cont == 1) { 3384 memcpy_toio((void __iomem *)cont_pkt, 3385 &lcont_pkt, REQUEST_ENTRY_SIZE); 3386 ql_dump_buffer(ql_dbg_user + ql_dbg_verbose, 3387 sp->fcport->vha, 0x3043, 3388 (uint8_t *)&lcont_pkt, REQUEST_ENTRY_SIZE); 3389 } 3390 } 3391 3392 if (piocb_rqst->flags & SRB_FXDISC_RESP_DMA_VALID) { 3393 int avail_dsds, tot_dsds; 3394 cont_a64_entry_t lcont_pkt; 3395 cont_a64_entry_t *cont_pkt = NULL; 3396 uint32_t *cur_dsd; 3397 int index = 0, cont = 0; 3398 3399 fx_iocb.rsp_dsdcnt = 3400 cpu_to_le16(bsg_job->reply_payload.sg_cnt); 3401 tot_dsds = cpu_to_le32(bsg_job->reply_payload.sg_cnt); 3402 cur_dsd = (uint32_t *)&fx_iocb.dseg_rsp_address[0]; 3403 avail_dsds = 1; 3404 3405 for_each_sg(bsg_job->reply_payload.sg_list, sg, 3406 tot_dsds, index) { 3407 dma_addr_t sle_dma; 3408 3409 /* Allocate additional continuation packets? */ 3410 if (avail_dsds == 0) { 3411 /* 3412 * Five DSDs are available in the Cont. 3413 * Type 1 IOCB. 3414 */ 3415 memset(&lcont_pkt, 0, 3416 REQUEST_ENTRY_SIZE); 3417 cont_pkt = 3418 qlafx00_prep_cont_type1_iocb( 3419 sp->fcport->vha->req, 3420 &lcont_pkt); 3421 cur_dsd = (uint32_t *) 3422 lcont_pkt.dseg_0_address; 3423 avail_dsds = 5; 3424 cont = 1; 3425 entry_cnt++; 3426 } 3427 3428 sle_dma = sg_dma_address(sg); 3429 *cur_dsd++ = cpu_to_le32(LSD(sle_dma)); 3430 *cur_dsd++ = cpu_to_le32(MSD(sle_dma)); 3431 *cur_dsd++ = cpu_to_le32(sg_dma_len(sg)); 3432 avail_dsds--; 3433 3434 if (avail_dsds == 0 && cont == 1) { 3435 cont = 0; 3436 memcpy_toio((void __iomem *)cont_pkt, 3437 &lcont_pkt, 3438 REQUEST_ENTRY_SIZE); 3439 ql_dump_buffer( 3440 ql_dbg_user + ql_dbg_verbose, 3441 sp->fcport->vha, 0x3045, 3442 (uint8_t *)&lcont_pkt, 3443 REQUEST_ENTRY_SIZE); 3444 } 3445 } 3446 if (avail_dsds != 0 && cont == 1) { 3447 memcpy_toio((void __iomem *)cont_pkt, 3448 &lcont_pkt, REQUEST_ENTRY_SIZE); 3449 ql_dump_buffer(ql_dbg_user + ql_dbg_verbose, 3450 sp->fcport->vha, 0x3046, 3451 (uint8_t *)&lcont_pkt, REQUEST_ENTRY_SIZE); 3452 } 3453 } 3454 3455 if (piocb_rqst->flags & SRB_FXDISC_REQ_DWRD_VALID) 3456 fx_iocb.dataword = cpu_to_le32(piocb_rqst->dataword); 3457 fx_iocb.flags = piocb_rqst->flags; 3458 fx_iocb.entry_count = entry_cnt; 3459 } 3460 3461 ql_dump_buffer(ql_dbg_user + ql_dbg_verbose, 3462 sp->fcport->vha, 0x3047, 3463 (uint8_t *)&fx_iocb, sizeof(struct fxdisc_entry_fx00)); 3464 3465 memcpy((void __iomem *)pfxiocb, &fx_iocb, 3466 sizeof(struct fxdisc_entry_fx00)); 3467 wmb(); 3468 } 3469