1 /* 2 * QLogic Fibre Channel HBA Driver 3 * Copyright (c) 2003-2011 QLogic Corporation 4 * 5 * See LICENSE.qla2xxx for copyright and licensing details. 6 */ 7 #include "qla_def.h" 8 #include "qla_gbl.h" 9 10 #include <linux/delay.h> 11 #include <linux/slab.h> 12 #include <linux/vmalloc.h> 13 14 #include "qla_devtbl.h" 15 16 #ifdef CONFIG_SPARC 17 #include <asm/prom.h> 18 #endif 19 20 /* 21 * QLogic ISP2x00 Hardware Support Function Prototypes. 22 */ 23 static int qla2x00_isp_firmware(scsi_qla_host_t *); 24 static int qla2x00_setup_chip(scsi_qla_host_t *); 25 static int qla2x00_init_rings(scsi_qla_host_t *); 26 static int qla2x00_fw_ready(scsi_qla_host_t *); 27 static int qla2x00_configure_hba(scsi_qla_host_t *); 28 static int qla2x00_configure_loop(scsi_qla_host_t *); 29 static int qla2x00_configure_local_loop(scsi_qla_host_t *); 30 static int qla2x00_configure_fabric(scsi_qla_host_t *); 31 static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *, struct list_head *); 32 static int qla2x00_device_resync(scsi_qla_host_t *); 33 static int qla2x00_fabric_dev_login(scsi_qla_host_t *, fc_port_t *, 34 uint16_t *); 35 36 static int qla2x00_restart_isp(scsi_qla_host_t *); 37 38 static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *); 39 static int qla84xx_init_chip(scsi_qla_host_t *); 40 static int qla25xx_init_queues(struct qla_hw_data *); 41 42 /* SRB Extensions ---------------------------------------------------------- */ 43 44 static void 45 qla2x00_ctx_sp_timeout(unsigned long __data) 46 { 47 srb_t *sp = (srb_t *)__data; 48 struct srb_ctx *ctx; 49 struct srb_iocb *iocb; 50 fc_port_t *fcport = sp->fcport; 51 struct qla_hw_data *ha = fcport->vha->hw; 52 struct req_que *req; 53 unsigned long flags; 54 55 spin_lock_irqsave(&ha->hardware_lock, flags); 56 req = ha->req_q_map[0]; 57 req->outstanding_cmds[sp->handle] = NULL; 58 ctx = sp->ctx; 59 iocb = ctx->u.iocb_cmd; 60 iocb->timeout(sp); 61 iocb->free(sp); 62 spin_unlock_irqrestore(&ha->hardware_lock, flags); 63 } 64 65 static void 66 qla2x00_ctx_sp_free(srb_t *sp) 67 { 68 struct srb_ctx *ctx = sp->ctx; 69 struct srb_iocb *iocb = ctx->u.iocb_cmd; 70 struct scsi_qla_host *vha = sp->fcport->vha; 71 72 del_timer(&iocb->timer); 73 kfree(iocb); 74 kfree(ctx); 75 mempool_free(sp, sp->fcport->vha->hw->srb_mempool); 76 77 QLA_VHA_MARK_NOT_BUSY(vha); 78 } 79 80 inline srb_t * 81 qla2x00_get_ctx_sp(scsi_qla_host_t *vha, fc_port_t *fcport, size_t size, 82 unsigned long tmo) 83 { 84 srb_t *sp = NULL; 85 struct qla_hw_data *ha = vha->hw; 86 struct srb_ctx *ctx; 87 struct srb_iocb *iocb; 88 uint8_t bail; 89 90 QLA_VHA_MARK_BUSY(vha, bail); 91 if (bail) 92 return NULL; 93 94 sp = mempool_alloc(ha->srb_mempool, GFP_KERNEL); 95 if (!sp) 96 goto done; 97 ctx = kzalloc(size, GFP_KERNEL); 98 if (!ctx) { 99 mempool_free(sp, ha->srb_mempool); 100 sp = NULL; 101 goto done; 102 } 103 iocb = kzalloc(sizeof(struct srb_iocb), GFP_KERNEL); 104 if (!iocb) { 105 mempool_free(sp, ha->srb_mempool); 106 sp = NULL; 107 kfree(ctx); 108 goto done; 109 } 110 111 memset(sp, 0, sizeof(*sp)); 112 sp->fcport = fcport; 113 sp->ctx = ctx; 114 ctx->u.iocb_cmd = iocb; 115 iocb->free = qla2x00_ctx_sp_free; 116 117 init_timer(&iocb->timer); 118 if (!tmo) 119 goto done; 120 iocb->timer.expires = jiffies + tmo * HZ; 121 iocb->timer.data = (unsigned long)sp; 122 iocb->timer.function = qla2x00_ctx_sp_timeout; 123 add_timer(&iocb->timer); 124 done: 125 if (!sp) 126 QLA_VHA_MARK_NOT_BUSY(vha); 127 return sp; 128 } 129 130 /* Asynchronous Login/Logout Routines -------------------------------------- */ 131 132 static inline unsigned long 133 qla2x00_get_async_timeout(struct scsi_qla_host *vha) 134 { 135 unsigned long tmo; 136 struct qla_hw_data *ha = vha->hw; 137 138 /* Firmware should use switch negotiated r_a_tov for timeout. */ 139 tmo = ha->r_a_tov / 10 * 2; 140 if (!IS_FWI2_CAPABLE(ha)) { 141 /* 142 * Except for earlier ISPs where the timeout is seeded from the 143 * initialization control block. 144 */ 145 tmo = ha->login_timeout; 146 } 147 return tmo; 148 } 149 150 static void 151 qla2x00_async_iocb_timeout(srb_t *sp) 152 { 153 fc_port_t *fcport = sp->fcport; 154 struct srb_ctx *ctx = sp->ctx; 155 156 ql_dbg(ql_dbg_disc, fcport->vha, 0x2071, 157 "Async-%s timeout - portid=%02x%02x%02x.\n", 158 ctx->name, fcport->d_id.b.domain, fcport->d_id.b.area, 159 fcport->d_id.b.al_pa); 160 161 fcport->flags &= ~FCF_ASYNC_SENT; 162 if (ctx->type == SRB_LOGIN_CMD) { 163 struct srb_iocb *lio = ctx->u.iocb_cmd; 164 qla2x00_post_async_logout_work(fcport->vha, fcport, NULL); 165 /* Retry as needed. */ 166 lio->u.logio.data[0] = MBS_COMMAND_ERROR; 167 lio->u.logio.data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ? 168 QLA_LOGIO_LOGIN_RETRIED : 0; 169 qla2x00_post_async_login_done_work(fcport->vha, fcport, 170 lio->u.logio.data); 171 } 172 } 173 174 static void 175 qla2x00_async_login_ctx_done(srb_t *sp) 176 { 177 struct srb_ctx *ctx = sp->ctx; 178 struct srb_iocb *lio = ctx->u.iocb_cmd; 179 180 qla2x00_post_async_login_done_work(sp->fcport->vha, sp->fcport, 181 lio->u.logio.data); 182 lio->free(sp); 183 } 184 185 int 186 qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport, 187 uint16_t *data) 188 { 189 srb_t *sp; 190 struct srb_ctx *ctx; 191 struct srb_iocb *lio; 192 int rval; 193 194 rval = QLA_FUNCTION_FAILED; 195 sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx), 196 qla2x00_get_async_timeout(vha) + 2); 197 if (!sp) 198 goto done; 199 200 ctx = sp->ctx; 201 ctx->type = SRB_LOGIN_CMD; 202 ctx->name = "login"; 203 lio = ctx->u.iocb_cmd; 204 lio->timeout = qla2x00_async_iocb_timeout; 205 lio->done = qla2x00_async_login_ctx_done; 206 lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI; 207 if (data[1] & QLA_LOGIO_LOGIN_RETRIED) 208 lio->u.logio.flags |= SRB_LOGIN_RETRIED; 209 rval = qla2x00_start_sp(sp); 210 if (rval != QLA_SUCCESS) 211 goto done_free_sp; 212 213 ql_dbg(ql_dbg_disc, vha, 0x2072, 214 "Async-login - loopid=%x portid=%02x%02x%02x retries=%d.\n", 215 fcport->loop_id, fcport->d_id.b.domain, fcport->d_id.b.area, 216 fcport->d_id.b.al_pa, fcport->login_retry); 217 return rval; 218 219 done_free_sp: 220 lio->free(sp); 221 done: 222 return rval; 223 } 224 225 static void 226 qla2x00_async_logout_ctx_done(srb_t *sp) 227 { 228 struct srb_ctx *ctx = sp->ctx; 229 struct srb_iocb *lio = ctx->u.iocb_cmd; 230 231 qla2x00_post_async_logout_done_work(sp->fcport->vha, sp->fcport, 232 lio->u.logio.data); 233 lio->free(sp); 234 } 235 236 int 237 qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport) 238 { 239 srb_t *sp; 240 struct srb_ctx *ctx; 241 struct srb_iocb *lio; 242 int rval; 243 244 rval = QLA_FUNCTION_FAILED; 245 sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx), 246 qla2x00_get_async_timeout(vha) + 2); 247 if (!sp) 248 goto done; 249 250 ctx = sp->ctx; 251 ctx->type = SRB_LOGOUT_CMD; 252 ctx->name = "logout"; 253 lio = ctx->u.iocb_cmd; 254 lio->timeout = qla2x00_async_iocb_timeout; 255 lio->done = qla2x00_async_logout_ctx_done; 256 rval = qla2x00_start_sp(sp); 257 if (rval != QLA_SUCCESS) 258 goto done_free_sp; 259 260 ql_dbg(ql_dbg_disc, vha, 0x2070, 261 "Async-logout - loop-id=%x portid=%02x%02x%02x.\n", 262 fcport->loop_id, fcport->d_id.b.domain, fcport->d_id.b.area, 263 fcport->d_id.b.al_pa); 264 return rval; 265 266 done_free_sp: 267 lio->free(sp); 268 done: 269 return rval; 270 } 271 272 static void 273 qla2x00_async_adisc_ctx_done(srb_t *sp) 274 { 275 struct srb_ctx *ctx = sp->ctx; 276 struct srb_iocb *lio = ctx->u.iocb_cmd; 277 278 qla2x00_post_async_adisc_done_work(sp->fcport->vha, sp->fcport, 279 lio->u.logio.data); 280 lio->free(sp); 281 } 282 283 int 284 qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport, 285 uint16_t *data) 286 { 287 srb_t *sp; 288 struct srb_ctx *ctx; 289 struct srb_iocb *lio; 290 int rval; 291 292 rval = QLA_FUNCTION_FAILED; 293 sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx), 294 qla2x00_get_async_timeout(vha) + 2); 295 if (!sp) 296 goto done; 297 298 ctx = sp->ctx; 299 ctx->type = SRB_ADISC_CMD; 300 ctx->name = "adisc"; 301 lio = ctx->u.iocb_cmd; 302 lio->timeout = qla2x00_async_iocb_timeout; 303 lio->done = qla2x00_async_adisc_ctx_done; 304 if (data[1] & QLA_LOGIO_LOGIN_RETRIED) 305 lio->u.logio.flags |= SRB_LOGIN_RETRIED; 306 rval = qla2x00_start_sp(sp); 307 if (rval != QLA_SUCCESS) 308 goto done_free_sp; 309 310 ql_dbg(ql_dbg_disc, vha, 0x206f, 311 "Async-adisc - loopid=%x portid=%02x%02x%02x.\n", 312 fcport->loop_id, fcport->d_id.b.domain, fcport->d_id.b.area, 313 fcport->d_id.b.al_pa); 314 return rval; 315 316 done_free_sp: 317 lio->free(sp); 318 done: 319 return rval; 320 } 321 322 static void 323 qla2x00_async_tm_cmd_ctx_done(srb_t *sp) 324 { 325 struct srb_ctx *ctx = sp->ctx; 326 struct srb_iocb *iocb = (struct srb_iocb *)ctx->u.iocb_cmd; 327 328 qla2x00_async_tm_cmd_done(sp->fcport->vha, sp->fcport, iocb); 329 iocb->free(sp); 330 } 331 332 int 333 qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint32_t lun, 334 uint32_t tag) 335 { 336 struct scsi_qla_host *vha = fcport->vha; 337 srb_t *sp; 338 struct srb_ctx *ctx; 339 struct srb_iocb *tcf; 340 int rval; 341 342 rval = QLA_FUNCTION_FAILED; 343 sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx), 344 qla2x00_get_async_timeout(vha) + 2); 345 if (!sp) 346 goto done; 347 348 ctx = sp->ctx; 349 ctx->type = SRB_TM_CMD; 350 ctx->name = "tmf"; 351 tcf = ctx->u.iocb_cmd; 352 tcf->u.tmf.flags = flags; 353 tcf->u.tmf.lun = lun; 354 tcf->u.tmf.data = tag; 355 tcf->timeout = qla2x00_async_iocb_timeout; 356 tcf->done = qla2x00_async_tm_cmd_ctx_done; 357 358 rval = qla2x00_start_sp(sp); 359 if (rval != QLA_SUCCESS) 360 goto done_free_sp; 361 362 ql_dbg(ql_dbg_taskm, vha, 0x802f, 363 "Async-tmf loop-id=%x portid=%02x%02x%02x.\n", 364 fcport->loop_id, fcport->d_id.b.domain, fcport->d_id.b.area, 365 fcport->d_id.b.al_pa); 366 return rval; 367 368 done_free_sp: 369 tcf->free(sp); 370 done: 371 return rval; 372 } 373 374 void 375 qla2x00_async_login_done(struct scsi_qla_host *vha, fc_port_t *fcport, 376 uint16_t *data) 377 { 378 int rval; 379 380 switch (data[0]) { 381 case MBS_COMMAND_COMPLETE: 382 /* 383 * Driver must validate login state - If PRLI not complete, 384 * force a relogin attempt via implicit LOGO, PLOGI, and PRLI 385 * requests. 386 */ 387 rval = qla2x00_get_port_database(vha, fcport, 0); 388 if (rval != QLA_SUCCESS) { 389 qla2x00_post_async_logout_work(vha, fcport, NULL); 390 qla2x00_post_async_login_work(vha, fcport, NULL); 391 break; 392 } 393 if (fcport->flags & FCF_FCP2_DEVICE) { 394 qla2x00_post_async_adisc_work(vha, fcport, data); 395 break; 396 } 397 qla2x00_update_fcport(vha, fcport); 398 break; 399 case MBS_COMMAND_ERROR: 400 fcport->flags &= ~FCF_ASYNC_SENT; 401 if (data[1] & QLA_LOGIO_LOGIN_RETRIED) 402 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 403 else 404 qla2x00_mark_device_lost(vha, fcport, 1, 0); 405 break; 406 case MBS_PORT_ID_USED: 407 fcport->loop_id = data[1]; 408 qla2x00_post_async_logout_work(vha, fcport, NULL); 409 qla2x00_post_async_login_work(vha, fcport, NULL); 410 break; 411 case MBS_LOOP_ID_USED: 412 fcport->loop_id++; 413 rval = qla2x00_find_new_loop_id(vha, fcport); 414 if (rval != QLA_SUCCESS) { 415 fcport->flags &= ~FCF_ASYNC_SENT; 416 qla2x00_mark_device_lost(vha, fcport, 1, 0); 417 break; 418 } 419 qla2x00_post_async_login_work(vha, fcport, NULL); 420 break; 421 } 422 return; 423 } 424 425 void 426 qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport, 427 uint16_t *data) 428 { 429 qla2x00_mark_device_lost(vha, fcport, 1, 0); 430 return; 431 } 432 433 void 434 qla2x00_async_adisc_done(struct scsi_qla_host *vha, fc_port_t *fcport, 435 uint16_t *data) 436 { 437 if (data[0] == MBS_COMMAND_COMPLETE) { 438 qla2x00_update_fcport(vha, fcport); 439 440 return; 441 } 442 443 /* Retry login. */ 444 fcport->flags &= ~FCF_ASYNC_SENT; 445 if (data[1] & QLA_LOGIO_LOGIN_RETRIED) 446 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 447 else 448 qla2x00_mark_device_lost(vha, fcport, 1, 0); 449 450 return; 451 } 452 453 void 454 qla2x00_async_tm_cmd_done(struct scsi_qla_host *vha, fc_port_t *fcport, 455 struct srb_iocb *iocb) 456 { 457 int rval; 458 uint32_t flags; 459 uint16_t lun; 460 461 flags = iocb->u.tmf.flags; 462 lun = (uint16_t)iocb->u.tmf.lun; 463 464 /* Issue Marker IOCB */ 465 rval = qla2x00_marker(vha, vha->hw->req_q_map[0], 466 vha->hw->rsp_q_map[0], fcport->loop_id, lun, 467 flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID); 468 469 if ((rval != QLA_SUCCESS) || iocb->u.tmf.data) { 470 ql_dbg(ql_dbg_taskm, vha, 0x8030, 471 "TM IOCB failed (%x).\n", rval); 472 } 473 474 return; 475 } 476 477 /****************************************************************************/ 478 /* QLogic ISP2x00 Hardware Support Functions. */ 479 /****************************************************************************/ 480 481 /* 482 * qla2x00_initialize_adapter 483 * Initialize board. 484 * 485 * Input: 486 * ha = adapter block pointer. 487 * 488 * Returns: 489 * 0 = success 490 */ 491 int 492 qla2x00_initialize_adapter(scsi_qla_host_t *vha) 493 { 494 int rval; 495 struct qla_hw_data *ha = vha->hw; 496 struct req_que *req = ha->req_q_map[0]; 497 498 /* Clear adapter flags. */ 499 vha->flags.online = 0; 500 ha->flags.chip_reset_done = 0; 501 vha->flags.reset_active = 0; 502 ha->flags.pci_channel_io_perm_failure = 0; 503 ha->flags.eeh_busy = 0; 504 ha->flags.thermal_supported = 1; 505 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 506 atomic_set(&vha->loop_state, LOOP_DOWN); 507 vha->device_flags = DFLG_NO_CABLE; 508 vha->dpc_flags = 0; 509 vha->flags.management_server_logged_in = 0; 510 vha->marker_needed = 0; 511 ha->isp_abort_cnt = 0; 512 ha->beacon_blink_led = 0; 513 514 set_bit(0, ha->req_qid_map); 515 set_bit(0, ha->rsp_qid_map); 516 517 ql_log(ql_log_info, vha, 0x0040, 518 "Configuring PCI space...\n"); 519 rval = ha->isp_ops->pci_config(vha); 520 if (rval) { 521 ql_log(ql_log_warn, vha, 0x0044, 522 "Unable to configure PCI space.\n"); 523 return (rval); 524 } 525 526 ha->isp_ops->reset_chip(vha); 527 528 rval = qla2xxx_get_flash_info(vha); 529 if (rval) { 530 ql_log(ql_log_fatal, vha, 0x004f, 531 "Unable to validate FLASH data.\n"); 532 return (rval); 533 } 534 535 ha->isp_ops->get_flash_version(vha, req->ring); 536 ql_log(ql_log_info, vha, 0x0061, 537 "Configure NVRAM parameters...\n"); 538 539 ha->isp_ops->nvram_config(vha); 540 541 if (ha->flags.disable_serdes) { 542 /* Mask HBA via NVRAM settings? */ 543 ql_log(ql_log_info, vha, 0x0077, 544 "Masking HBA WWPN " 545 "%02x%02x%02x%02x%02x%02x%02x%02x (via NVRAM).\n", 546 vha->port_name[0], vha->port_name[1], 547 vha->port_name[2], vha->port_name[3], 548 vha->port_name[4], vha->port_name[5], 549 vha->port_name[6], vha->port_name[7]); 550 return QLA_FUNCTION_FAILED; 551 } 552 553 ql_log(ql_log_info, vha, 0x0078, 554 "Verifying loaded RISC code...\n"); 555 556 if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) { 557 rval = ha->isp_ops->chip_diag(vha); 558 if (rval) 559 return (rval); 560 rval = qla2x00_setup_chip(vha); 561 if (rval) 562 return (rval); 563 } 564 565 if (IS_QLA84XX(ha)) { 566 ha->cs84xx = qla84xx_get_chip(vha); 567 if (!ha->cs84xx) { 568 ql_log(ql_log_warn, vha, 0x00d0, 569 "Unable to configure ISP84XX.\n"); 570 return QLA_FUNCTION_FAILED; 571 } 572 } 573 rval = qla2x00_init_rings(vha); 574 ha->flags.chip_reset_done = 1; 575 576 if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) { 577 /* Issue verify 84xx FW IOCB to complete 84xx initialization */ 578 rval = qla84xx_init_chip(vha); 579 if (rval != QLA_SUCCESS) { 580 ql_log(ql_log_warn, vha, 0x00d4, 581 "Unable to initialize ISP84XX.\n"); 582 qla84xx_put_chip(vha); 583 } 584 } 585 586 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha)) 587 qla24xx_read_fcp_prio_cfg(vha); 588 589 return (rval); 590 } 591 592 /** 593 * qla2100_pci_config() - Setup ISP21xx PCI configuration registers. 594 * @ha: HA context 595 * 596 * Returns 0 on success. 597 */ 598 int 599 qla2100_pci_config(scsi_qla_host_t *vha) 600 { 601 uint16_t w; 602 unsigned long flags; 603 struct qla_hw_data *ha = vha->hw; 604 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 605 606 pci_set_master(ha->pdev); 607 pci_try_set_mwi(ha->pdev); 608 609 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 610 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 611 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 612 613 pci_disable_rom(ha->pdev); 614 615 /* Get PCI bus information. */ 616 spin_lock_irqsave(&ha->hardware_lock, flags); 617 ha->pci_attr = RD_REG_WORD(®->ctrl_status); 618 spin_unlock_irqrestore(&ha->hardware_lock, flags); 619 620 return QLA_SUCCESS; 621 } 622 623 /** 624 * qla2300_pci_config() - Setup ISP23xx PCI configuration registers. 625 * @ha: HA context 626 * 627 * Returns 0 on success. 628 */ 629 int 630 qla2300_pci_config(scsi_qla_host_t *vha) 631 { 632 uint16_t w; 633 unsigned long flags = 0; 634 uint32_t cnt; 635 struct qla_hw_data *ha = vha->hw; 636 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 637 638 pci_set_master(ha->pdev); 639 pci_try_set_mwi(ha->pdev); 640 641 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 642 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 643 644 if (IS_QLA2322(ha) || IS_QLA6322(ha)) 645 w &= ~PCI_COMMAND_INTX_DISABLE; 646 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 647 648 /* 649 * If this is a 2300 card and not 2312, reset the 650 * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately, 651 * the 2310 also reports itself as a 2300 so we need to get the 652 * fb revision level -- a 6 indicates it really is a 2300 and 653 * not a 2310. 654 */ 655 if (IS_QLA2300(ha)) { 656 spin_lock_irqsave(&ha->hardware_lock, flags); 657 658 /* Pause RISC. */ 659 WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); 660 for (cnt = 0; cnt < 30000; cnt++) { 661 if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) != 0) 662 break; 663 664 udelay(10); 665 } 666 667 /* Select FPM registers. */ 668 WRT_REG_WORD(®->ctrl_status, 0x20); 669 RD_REG_WORD(®->ctrl_status); 670 671 /* Get the fb rev level */ 672 ha->fb_rev = RD_FB_CMD_REG(ha, reg); 673 674 if (ha->fb_rev == FPM_2300) 675 pci_clear_mwi(ha->pdev); 676 677 /* Deselect FPM registers. */ 678 WRT_REG_WORD(®->ctrl_status, 0x0); 679 RD_REG_WORD(®->ctrl_status); 680 681 /* Release RISC module. */ 682 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 683 for (cnt = 0; cnt < 30000; cnt++) { 684 if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) == 0) 685 break; 686 687 udelay(10); 688 } 689 690 spin_unlock_irqrestore(&ha->hardware_lock, flags); 691 } 692 693 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); 694 695 pci_disable_rom(ha->pdev); 696 697 /* Get PCI bus information. */ 698 spin_lock_irqsave(&ha->hardware_lock, flags); 699 ha->pci_attr = RD_REG_WORD(®->ctrl_status); 700 spin_unlock_irqrestore(&ha->hardware_lock, flags); 701 702 return QLA_SUCCESS; 703 } 704 705 /** 706 * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers. 707 * @ha: HA context 708 * 709 * Returns 0 on success. 710 */ 711 int 712 qla24xx_pci_config(scsi_qla_host_t *vha) 713 { 714 uint16_t w; 715 unsigned long flags = 0; 716 struct qla_hw_data *ha = vha->hw; 717 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 718 719 pci_set_master(ha->pdev); 720 pci_try_set_mwi(ha->pdev); 721 722 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 723 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 724 w &= ~PCI_COMMAND_INTX_DISABLE; 725 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 726 727 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); 728 729 /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */ 730 if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX)) 731 pcix_set_mmrbc(ha->pdev, 2048); 732 733 /* PCIe -- adjust Maximum Read Request Size (2048). */ 734 if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP)) 735 pcie_set_readrq(ha->pdev, 2048); 736 737 pci_disable_rom(ha->pdev); 738 739 ha->chip_revision = ha->pdev->revision; 740 741 /* Get PCI bus information. */ 742 spin_lock_irqsave(&ha->hardware_lock, flags); 743 ha->pci_attr = RD_REG_DWORD(®->ctrl_status); 744 spin_unlock_irqrestore(&ha->hardware_lock, flags); 745 746 return QLA_SUCCESS; 747 } 748 749 /** 750 * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers. 751 * @ha: HA context 752 * 753 * Returns 0 on success. 754 */ 755 int 756 qla25xx_pci_config(scsi_qla_host_t *vha) 757 { 758 uint16_t w; 759 struct qla_hw_data *ha = vha->hw; 760 761 pci_set_master(ha->pdev); 762 pci_try_set_mwi(ha->pdev); 763 764 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 765 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 766 w &= ~PCI_COMMAND_INTX_DISABLE; 767 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 768 769 /* PCIe -- adjust Maximum Read Request Size (2048). */ 770 if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP)) 771 pcie_set_readrq(ha->pdev, 2048); 772 773 pci_disable_rom(ha->pdev); 774 775 ha->chip_revision = ha->pdev->revision; 776 777 return QLA_SUCCESS; 778 } 779 780 /** 781 * qla2x00_isp_firmware() - Choose firmware image. 782 * @ha: HA context 783 * 784 * Returns 0 on success. 785 */ 786 static int 787 qla2x00_isp_firmware(scsi_qla_host_t *vha) 788 { 789 int rval; 790 uint16_t loop_id, topo, sw_cap; 791 uint8_t domain, area, al_pa; 792 struct qla_hw_data *ha = vha->hw; 793 794 /* Assume loading risc code */ 795 rval = QLA_FUNCTION_FAILED; 796 797 if (ha->flags.disable_risc_code_load) { 798 ql_log(ql_log_info, vha, 0x0079, "RISC CODE NOT loaded.\n"); 799 800 /* Verify checksum of loaded RISC code. */ 801 rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address); 802 if (rval == QLA_SUCCESS) { 803 /* And, verify we are not in ROM code. */ 804 rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa, 805 &area, &domain, &topo, &sw_cap); 806 } 807 } 808 809 if (rval) 810 ql_dbg(ql_dbg_init, vha, 0x007a, 811 "**** Load RISC code ****.\n"); 812 813 return (rval); 814 } 815 816 /** 817 * qla2x00_reset_chip() - Reset ISP chip. 818 * @ha: HA context 819 * 820 * Returns 0 on success. 821 */ 822 void 823 qla2x00_reset_chip(scsi_qla_host_t *vha) 824 { 825 unsigned long flags = 0; 826 struct qla_hw_data *ha = vha->hw; 827 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 828 uint32_t cnt; 829 uint16_t cmd; 830 831 if (unlikely(pci_channel_offline(ha->pdev))) 832 return; 833 834 ha->isp_ops->disable_intrs(ha); 835 836 spin_lock_irqsave(&ha->hardware_lock, flags); 837 838 /* Turn off master enable */ 839 cmd = 0; 840 pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd); 841 cmd &= ~PCI_COMMAND_MASTER; 842 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); 843 844 if (!IS_QLA2100(ha)) { 845 /* Pause RISC. */ 846 WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); 847 if (IS_QLA2200(ha) || IS_QLA2300(ha)) { 848 for (cnt = 0; cnt < 30000; cnt++) { 849 if ((RD_REG_WORD(®->hccr) & 850 HCCR_RISC_PAUSE) != 0) 851 break; 852 udelay(100); 853 } 854 } else { 855 RD_REG_WORD(®->hccr); /* PCI Posting. */ 856 udelay(10); 857 } 858 859 /* Select FPM registers. */ 860 WRT_REG_WORD(®->ctrl_status, 0x20); 861 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ 862 863 /* FPM Soft Reset. */ 864 WRT_REG_WORD(®->fpm_diag_config, 0x100); 865 RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */ 866 867 /* Toggle Fpm Reset. */ 868 if (!IS_QLA2200(ha)) { 869 WRT_REG_WORD(®->fpm_diag_config, 0x0); 870 RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */ 871 } 872 873 /* Select frame buffer registers. */ 874 WRT_REG_WORD(®->ctrl_status, 0x10); 875 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ 876 877 /* Reset frame buffer FIFOs. */ 878 if (IS_QLA2200(ha)) { 879 WRT_FB_CMD_REG(ha, reg, 0xa000); 880 RD_FB_CMD_REG(ha, reg); /* PCI Posting. */ 881 } else { 882 WRT_FB_CMD_REG(ha, reg, 0x00fc); 883 884 /* Read back fb_cmd until zero or 3 seconds max */ 885 for (cnt = 0; cnt < 3000; cnt++) { 886 if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0) 887 break; 888 udelay(100); 889 } 890 } 891 892 /* Select RISC module registers. */ 893 WRT_REG_WORD(®->ctrl_status, 0); 894 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ 895 896 /* Reset RISC processor. */ 897 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 898 RD_REG_WORD(®->hccr); /* PCI Posting. */ 899 900 /* Release RISC processor. */ 901 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 902 RD_REG_WORD(®->hccr); /* PCI Posting. */ 903 } 904 905 WRT_REG_WORD(®->hccr, HCCR_CLR_RISC_INT); 906 WRT_REG_WORD(®->hccr, HCCR_CLR_HOST_INT); 907 908 /* Reset ISP chip. */ 909 WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET); 910 911 /* Wait for RISC to recover from reset. */ 912 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 913 /* 914 * It is necessary to for a delay here since the card doesn't 915 * respond to PCI reads during a reset. On some architectures 916 * this will result in an MCA. 917 */ 918 udelay(20); 919 for (cnt = 30000; cnt; cnt--) { 920 if ((RD_REG_WORD(®->ctrl_status) & 921 CSR_ISP_SOFT_RESET) == 0) 922 break; 923 udelay(100); 924 } 925 } else 926 udelay(10); 927 928 /* Reset RISC processor. */ 929 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 930 931 WRT_REG_WORD(®->semaphore, 0); 932 933 /* Release RISC processor. */ 934 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 935 RD_REG_WORD(®->hccr); /* PCI Posting. */ 936 937 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 938 for (cnt = 0; cnt < 30000; cnt++) { 939 if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY) 940 break; 941 942 udelay(100); 943 } 944 } else 945 udelay(100); 946 947 /* Turn on master enable */ 948 cmd |= PCI_COMMAND_MASTER; 949 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); 950 951 /* Disable RISC pause on FPM parity error. */ 952 if (!IS_QLA2100(ha)) { 953 WRT_REG_WORD(®->hccr, HCCR_DISABLE_PARITY_PAUSE); 954 RD_REG_WORD(®->hccr); /* PCI Posting. */ 955 } 956 957 spin_unlock_irqrestore(&ha->hardware_lock, flags); 958 } 959 960 /** 961 * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC. 962 * 963 * Returns 0 on success. 964 */ 965 int 966 qla81xx_reset_mpi(scsi_qla_host_t *vha) 967 { 968 uint16_t mb[4] = {0x1010, 0, 1, 0}; 969 970 return qla81xx_write_mpi_register(vha, mb); 971 } 972 973 /** 974 * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC. 975 * @ha: HA context 976 * 977 * Returns 0 on success. 978 */ 979 static inline void 980 qla24xx_reset_risc(scsi_qla_host_t *vha) 981 { 982 unsigned long flags = 0; 983 struct qla_hw_data *ha = vha->hw; 984 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 985 uint32_t cnt, d2; 986 uint16_t wd; 987 static int abts_cnt; /* ISP abort retry counts */ 988 989 spin_lock_irqsave(&ha->hardware_lock, flags); 990 991 /* Reset RISC. */ 992 WRT_REG_DWORD(®->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); 993 for (cnt = 0; cnt < 30000; cnt++) { 994 if ((RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE) == 0) 995 break; 996 997 udelay(10); 998 } 999 1000 WRT_REG_DWORD(®->ctrl_status, 1001 CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); 1002 pci_read_config_word(ha->pdev, PCI_COMMAND, &wd); 1003 1004 udelay(100); 1005 /* Wait for firmware to complete NVRAM accesses. */ 1006 d2 = (uint32_t) RD_REG_WORD(®->mailbox0); 1007 for (cnt = 10000 ; cnt && d2; cnt--) { 1008 udelay(5); 1009 d2 = (uint32_t) RD_REG_WORD(®->mailbox0); 1010 barrier(); 1011 } 1012 1013 /* Wait for soft-reset to complete. */ 1014 d2 = RD_REG_DWORD(®->ctrl_status); 1015 for (cnt = 6000000 ; cnt && (d2 & CSRX_ISP_SOFT_RESET); cnt--) { 1016 udelay(5); 1017 d2 = RD_REG_DWORD(®->ctrl_status); 1018 barrier(); 1019 } 1020 1021 /* If required, do an MPI FW reset now */ 1022 if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) { 1023 if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) { 1024 if (++abts_cnt < 5) { 1025 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 1026 set_bit(MPI_RESET_NEEDED, &vha->dpc_flags); 1027 } else { 1028 /* 1029 * We exhausted the ISP abort retries. We have to 1030 * set the board offline. 1031 */ 1032 abts_cnt = 0; 1033 vha->flags.online = 0; 1034 } 1035 } 1036 } 1037 1038 WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET); 1039 RD_REG_DWORD(®->hccr); 1040 1041 WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE); 1042 RD_REG_DWORD(®->hccr); 1043 1044 WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_RESET); 1045 RD_REG_DWORD(®->hccr); 1046 1047 d2 = (uint32_t) RD_REG_WORD(®->mailbox0); 1048 for (cnt = 6000000 ; cnt && d2; cnt--) { 1049 udelay(5); 1050 d2 = (uint32_t) RD_REG_WORD(®->mailbox0); 1051 barrier(); 1052 } 1053 1054 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1055 1056 if (IS_NOPOLLING_TYPE(ha)) 1057 ha->isp_ops->enable_intrs(ha); 1058 } 1059 1060 /** 1061 * qla24xx_reset_chip() - Reset ISP24xx chip. 1062 * @ha: HA context 1063 * 1064 * Returns 0 on success. 1065 */ 1066 void 1067 qla24xx_reset_chip(scsi_qla_host_t *vha) 1068 { 1069 struct qla_hw_data *ha = vha->hw; 1070 1071 if (pci_channel_offline(ha->pdev) && 1072 ha->flags.pci_channel_io_perm_failure) { 1073 return; 1074 } 1075 1076 ha->isp_ops->disable_intrs(ha); 1077 1078 /* Perform RISC reset. */ 1079 qla24xx_reset_risc(vha); 1080 } 1081 1082 /** 1083 * qla2x00_chip_diag() - Test chip for proper operation. 1084 * @ha: HA context 1085 * 1086 * Returns 0 on success. 1087 */ 1088 int 1089 qla2x00_chip_diag(scsi_qla_host_t *vha) 1090 { 1091 int rval; 1092 struct qla_hw_data *ha = vha->hw; 1093 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 1094 unsigned long flags = 0; 1095 uint16_t data; 1096 uint32_t cnt; 1097 uint16_t mb[5]; 1098 struct req_que *req = ha->req_q_map[0]; 1099 1100 /* Assume a failed state */ 1101 rval = QLA_FUNCTION_FAILED; 1102 1103 ql_dbg(ql_dbg_init, vha, 0x007b, 1104 "Testing device at %lx.\n", (u_long)®->flash_address); 1105 1106 spin_lock_irqsave(&ha->hardware_lock, flags); 1107 1108 /* Reset ISP chip. */ 1109 WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET); 1110 1111 /* 1112 * We need to have a delay here since the card will not respond while 1113 * in reset causing an MCA on some architectures. 1114 */ 1115 udelay(20); 1116 data = qla2x00_debounce_register(®->ctrl_status); 1117 for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) { 1118 udelay(5); 1119 data = RD_REG_WORD(®->ctrl_status); 1120 barrier(); 1121 } 1122 1123 if (!cnt) 1124 goto chip_diag_failed; 1125 1126 ql_dbg(ql_dbg_init, vha, 0x007c, 1127 "Reset register cleared by chip reset.\n"); 1128 1129 /* Reset RISC processor. */ 1130 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 1131 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 1132 1133 /* Workaround for QLA2312 PCI parity error */ 1134 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 1135 data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0)); 1136 for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) { 1137 udelay(5); 1138 data = RD_MAILBOX_REG(ha, reg, 0); 1139 barrier(); 1140 } 1141 } else 1142 udelay(10); 1143 1144 if (!cnt) 1145 goto chip_diag_failed; 1146 1147 /* Check product ID of chip */ 1148 ql_dbg(ql_dbg_init, vha, 0x007d, "Checking product Id of chip.\n"); 1149 1150 mb[1] = RD_MAILBOX_REG(ha, reg, 1); 1151 mb[2] = RD_MAILBOX_REG(ha, reg, 2); 1152 mb[3] = RD_MAILBOX_REG(ha, reg, 3); 1153 mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4)); 1154 if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) || 1155 mb[3] != PROD_ID_3) { 1156 ql_log(ql_log_warn, vha, 0x0062, 1157 "Wrong product ID = 0x%x,0x%x,0x%x.\n", 1158 mb[1], mb[2], mb[3]); 1159 1160 goto chip_diag_failed; 1161 } 1162 ha->product_id[0] = mb[1]; 1163 ha->product_id[1] = mb[2]; 1164 ha->product_id[2] = mb[3]; 1165 ha->product_id[3] = mb[4]; 1166 1167 /* Adjust fw RISC transfer size */ 1168 if (req->length > 1024) 1169 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024; 1170 else 1171 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1172 req->length; 1173 1174 if (IS_QLA2200(ha) && 1175 RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) { 1176 /* Limit firmware transfer size with a 2200A */ 1177 ql_dbg(ql_dbg_init, vha, 0x007e, "Found QLA2200A Chip.\n"); 1178 1179 ha->device_type |= DT_ISP2200A; 1180 ha->fw_transfer_size = 128; 1181 } 1182 1183 /* Wrap Incoming Mailboxes Test. */ 1184 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1185 1186 ql_dbg(ql_dbg_init, vha, 0x007f, "Checking mailboxes.\n"); 1187 rval = qla2x00_mbx_reg_test(vha); 1188 if (rval) 1189 ql_log(ql_log_warn, vha, 0x0080, 1190 "Failed mailbox send register test.\n"); 1191 else 1192 /* Flag a successful rval */ 1193 rval = QLA_SUCCESS; 1194 spin_lock_irqsave(&ha->hardware_lock, flags); 1195 1196 chip_diag_failed: 1197 if (rval) 1198 ql_log(ql_log_info, vha, 0x0081, 1199 "Chip diagnostics **** FAILED ****.\n"); 1200 1201 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1202 1203 return (rval); 1204 } 1205 1206 /** 1207 * qla24xx_chip_diag() - Test ISP24xx for proper operation. 1208 * @ha: HA context 1209 * 1210 * Returns 0 on success. 1211 */ 1212 int 1213 qla24xx_chip_diag(scsi_qla_host_t *vha) 1214 { 1215 int rval; 1216 struct qla_hw_data *ha = vha->hw; 1217 struct req_que *req = ha->req_q_map[0]; 1218 1219 if (IS_QLA82XX(ha)) 1220 return QLA_SUCCESS; 1221 1222 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length; 1223 1224 rval = qla2x00_mbx_reg_test(vha); 1225 if (rval) { 1226 ql_log(ql_log_warn, vha, 0x0082, 1227 "Failed mailbox send register test.\n"); 1228 } else { 1229 /* Flag a successful rval */ 1230 rval = QLA_SUCCESS; 1231 } 1232 1233 return rval; 1234 } 1235 1236 void 1237 qla2x00_alloc_fw_dump(scsi_qla_host_t *vha) 1238 { 1239 int rval; 1240 uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size, 1241 eft_size, fce_size, mq_size; 1242 dma_addr_t tc_dma; 1243 void *tc; 1244 struct qla_hw_data *ha = vha->hw; 1245 struct req_que *req = ha->req_q_map[0]; 1246 struct rsp_que *rsp = ha->rsp_q_map[0]; 1247 1248 if (ha->fw_dump) { 1249 ql_dbg(ql_dbg_init, vha, 0x00bd, 1250 "Firmware dump already allocated.\n"); 1251 return; 1252 } 1253 1254 ha->fw_dumped = 0; 1255 fixed_size = mem_size = eft_size = fce_size = mq_size = 0; 1256 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { 1257 fixed_size = sizeof(struct qla2100_fw_dump); 1258 } else if (IS_QLA23XX(ha)) { 1259 fixed_size = offsetof(struct qla2300_fw_dump, data_ram); 1260 mem_size = (ha->fw_memory_size - 0x11000 + 1) * 1261 sizeof(uint16_t); 1262 } else if (IS_FWI2_CAPABLE(ha)) { 1263 if (IS_QLA81XX(ha)) 1264 fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem); 1265 else if (IS_QLA25XX(ha)) 1266 fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem); 1267 else 1268 fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem); 1269 mem_size = (ha->fw_memory_size - 0x100000 + 1) * 1270 sizeof(uint32_t); 1271 if (ha->mqenable) 1272 mq_size = sizeof(struct qla2xxx_mq_chain); 1273 /* Allocate memory for Fibre Channel Event Buffer. */ 1274 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)) 1275 goto try_eft; 1276 1277 tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma, 1278 GFP_KERNEL); 1279 if (!tc) { 1280 ql_log(ql_log_warn, vha, 0x00be, 1281 "Unable to allocate (%d KB) for FCE.\n", 1282 FCE_SIZE / 1024); 1283 goto try_eft; 1284 } 1285 1286 memset(tc, 0, FCE_SIZE); 1287 rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS, 1288 ha->fce_mb, &ha->fce_bufs); 1289 if (rval) { 1290 ql_log(ql_log_warn, vha, 0x00bf, 1291 "Unable to initialize FCE (%d).\n", rval); 1292 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc, 1293 tc_dma); 1294 ha->flags.fce_enabled = 0; 1295 goto try_eft; 1296 } 1297 ql_log(ql_log_info, vha, 0x00c0, 1298 "Allocate (%d KB) for FCE...\n", FCE_SIZE / 1024); 1299 1300 fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE; 1301 ha->flags.fce_enabled = 1; 1302 ha->fce_dma = tc_dma; 1303 ha->fce = tc; 1304 try_eft: 1305 /* Allocate memory for Extended Trace Buffer. */ 1306 tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma, 1307 GFP_KERNEL); 1308 if (!tc) { 1309 ql_log(ql_log_warn, vha, 0x00c1, 1310 "Unable to allocate (%d KB) for EFT.\n", 1311 EFT_SIZE / 1024); 1312 goto cont_alloc; 1313 } 1314 1315 memset(tc, 0, EFT_SIZE); 1316 rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS); 1317 if (rval) { 1318 ql_log(ql_log_warn, vha, 0x00c2, 1319 "Unable to initialize EFT (%d).\n", rval); 1320 dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc, 1321 tc_dma); 1322 goto cont_alloc; 1323 } 1324 ql_log(ql_log_info, vha, 0x00c3, 1325 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024); 1326 1327 eft_size = EFT_SIZE; 1328 ha->eft_dma = tc_dma; 1329 ha->eft = tc; 1330 } 1331 cont_alloc: 1332 req_q_size = req->length * sizeof(request_t); 1333 rsp_q_size = rsp->length * sizeof(response_t); 1334 1335 dump_size = offsetof(struct qla2xxx_fw_dump, isp); 1336 dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size; 1337 ha->chain_offset = dump_size; 1338 dump_size += mq_size + fce_size; 1339 1340 ha->fw_dump = vmalloc(dump_size); 1341 if (!ha->fw_dump) { 1342 ql_log(ql_log_warn, vha, 0x00c4, 1343 "Unable to allocate (%d KB) for firmware dump.\n", 1344 dump_size / 1024); 1345 1346 if (ha->fce) { 1347 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, ha->fce, 1348 ha->fce_dma); 1349 ha->fce = NULL; 1350 ha->fce_dma = 0; 1351 } 1352 1353 if (ha->eft) { 1354 dma_free_coherent(&ha->pdev->dev, eft_size, ha->eft, 1355 ha->eft_dma); 1356 ha->eft = NULL; 1357 ha->eft_dma = 0; 1358 } 1359 return; 1360 } 1361 ql_log(ql_log_info, vha, 0x00c5, 1362 "Allocated (%d KB) for firmware dump.\n", dump_size / 1024); 1363 1364 ha->fw_dump_len = dump_size; 1365 ha->fw_dump->signature[0] = 'Q'; 1366 ha->fw_dump->signature[1] = 'L'; 1367 ha->fw_dump->signature[2] = 'G'; 1368 ha->fw_dump->signature[3] = 'C'; 1369 ha->fw_dump->version = __constant_htonl(1); 1370 1371 ha->fw_dump->fixed_size = htonl(fixed_size); 1372 ha->fw_dump->mem_size = htonl(mem_size); 1373 ha->fw_dump->req_q_size = htonl(req_q_size); 1374 ha->fw_dump->rsp_q_size = htonl(rsp_q_size); 1375 1376 ha->fw_dump->eft_size = htonl(eft_size); 1377 ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma)); 1378 ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma)); 1379 1380 ha->fw_dump->header_size = 1381 htonl(offsetof(struct qla2xxx_fw_dump, isp)); 1382 } 1383 1384 static int 1385 qla81xx_mpi_sync(scsi_qla_host_t *vha) 1386 { 1387 #define MPS_MASK 0xe0 1388 int rval; 1389 uint16_t dc; 1390 uint32_t dw; 1391 1392 if (!IS_QLA81XX(vha->hw)) 1393 return QLA_SUCCESS; 1394 1395 rval = qla2x00_write_ram_word(vha, 0x7c00, 1); 1396 if (rval != QLA_SUCCESS) { 1397 ql_log(ql_log_warn, vha, 0x0105, 1398 "Unable to acquire semaphore.\n"); 1399 goto done; 1400 } 1401 1402 pci_read_config_word(vha->hw->pdev, 0x54, &dc); 1403 rval = qla2x00_read_ram_word(vha, 0x7a15, &dw); 1404 if (rval != QLA_SUCCESS) { 1405 ql_log(ql_log_warn, vha, 0x0067, "Unable to read sync.\n"); 1406 goto done_release; 1407 } 1408 1409 dc &= MPS_MASK; 1410 if (dc == (dw & MPS_MASK)) 1411 goto done_release; 1412 1413 dw &= ~MPS_MASK; 1414 dw |= dc; 1415 rval = qla2x00_write_ram_word(vha, 0x7a15, dw); 1416 if (rval != QLA_SUCCESS) { 1417 ql_log(ql_log_warn, vha, 0x0114, "Unable to gain sync.\n"); 1418 } 1419 1420 done_release: 1421 rval = qla2x00_write_ram_word(vha, 0x7c00, 0); 1422 if (rval != QLA_SUCCESS) { 1423 ql_log(ql_log_warn, vha, 0x006d, 1424 "Unable to release semaphore.\n"); 1425 } 1426 1427 done: 1428 return rval; 1429 } 1430 1431 /** 1432 * qla2x00_setup_chip() - Load and start RISC firmware. 1433 * @ha: HA context 1434 * 1435 * Returns 0 on success. 1436 */ 1437 static int 1438 qla2x00_setup_chip(scsi_qla_host_t *vha) 1439 { 1440 int rval; 1441 uint32_t srisc_address = 0; 1442 struct qla_hw_data *ha = vha->hw; 1443 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 1444 unsigned long flags; 1445 uint16_t fw_major_version; 1446 1447 if (IS_QLA82XX(ha)) { 1448 rval = ha->isp_ops->load_risc(vha, &srisc_address); 1449 if (rval == QLA_SUCCESS) { 1450 qla2x00_stop_firmware(vha); 1451 goto enable_82xx_npiv; 1452 } else 1453 goto failed; 1454 } 1455 1456 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { 1457 /* Disable SRAM, Instruction RAM and GP RAM parity. */ 1458 spin_lock_irqsave(&ha->hardware_lock, flags); 1459 WRT_REG_WORD(®->hccr, (HCCR_ENABLE_PARITY + 0x0)); 1460 RD_REG_WORD(®->hccr); 1461 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1462 } 1463 1464 qla81xx_mpi_sync(vha); 1465 1466 /* Load firmware sequences */ 1467 rval = ha->isp_ops->load_risc(vha, &srisc_address); 1468 if (rval == QLA_SUCCESS) { 1469 ql_dbg(ql_dbg_init, vha, 0x00c9, 1470 "Verifying Checksum of loaded RISC code.\n"); 1471 1472 rval = qla2x00_verify_checksum(vha, srisc_address); 1473 if (rval == QLA_SUCCESS) { 1474 /* Start firmware execution. */ 1475 ql_dbg(ql_dbg_init, vha, 0x00ca, 1476 "Starting firmware.\n"); 1477 1478 rval = qla2x00_execute_fw(vha, srisc_address); 1479 /* Retrieve firmware information. */ 1480 if (rval == QLA_SUCCESS) { 1481 enable_82xx_npiv: 1482 fw_major_version = ha->fw_major_version; 1483 if (IS_QLA82XX(ha)) 1484 qla82xx_check_md_needed(vha); 1485 else { 1486 rval = qla2x00_get_fw_version(vha, 1487 &ha->fw_major_version, 1488 &ha->fw_minor_version, 1489 &ha->fw_subminor_version, 1490 &ha->fw_attributes, 1491 &ha->fw_memory_size, 1492 ha->mpi_version, 1493 &ha->mpi_capabilities, 1494 ha->phy_version); 1495 } 1496 if (rval != QLA_SUCCESS) 1497 goto failed; 1498 ha->flags.npiv_supported = 0; 1499 if (IS_QLA2XXX_MIDTYPE(ha) && 1500 (ha->fw_attributes & BIT_2)) { 1501 ha->flags.npiv_supported = 1; 1502 if ((!ha->max_npiv_vports) || 1503 ((ha->max_npiv_vports + 1) % 1504 MIN_MULTI_ID_FABRIC)) 1505 ha->max_npiv_vports = 1506 MIN_MULTI_ID_FABRIC - 1; 1507 } 1508 qla2x00_get_resource_cnts(vha, NULL, 1509 &ha->fw_xcb_count, NULL, NULL, 1510 &ha->max_npiv_vports, NULL); 1511 1512 if (!fw_major_version && ql2xallocfwdump) 1513 qla2x00_alloc_fw_dump(vha); 1514 } 1515 } else { 1516 ql_log(ql_log_fatal, vha, 0x00cd, 1517 "ISP Firmware failed checksum.\n"); 1518 goto failed; 1519 } 1520 } 1521 1522 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { 1523 /* Enable proper parity. */ 1524 spin_lock_irqsave(&ha->hardware_lock, flags); 1525 if (IS_QLA2300(ha)) 1526 /* SRAM parity */ 1527 WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x1); 1528 else 1529 /* SRAM, Instruction RAM and GP RAM parity */ 1530 WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x7); 1531 RD_REG_WORD(®->hccr); 1532 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1533 } 1534 1535 if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) { 1536 uint32_t size; 1537 1538 rval = qla81xx_fac_get_sector_size(vha, &size); 1539 if (rval == QLA_SUCCESS) { 1540 ha->flags.fac_supported = 1; 1541 ha->fdt_block_size = size << 2; 1542 } else { 1543 ql_log(ql_log_warn, vha, 0x00ce, 1544 "Unsupported FAC firmware (%d.%02d.%02d).\n", 1545 ha->fw_major_version, ha->fw_minor_version, 1546 ha->fw_subminor_version); 1547 } 1548 } 1549 failed: 1550 if (rval) { 1551 ql_log(ql_log_fatal, vha, 0x00cf, 1552 "Setup chip ****FAILED****.\n"); 1553 } 1554 1555 return (rval); 1556 } 1557 1558 /** 1559 * qla2x00_init_response_q_entries() - Initializes response queue entries. 1560 * @ha: HA context 1561 * 1562 * Beginning of request ring has initialization control block already built 1563 * by nvram config routine. 1564 * 1565 * Returns 0 on success. 1566 */ 1567 void 1568 qla2x00_init_response_q_entries(struct rsp_que *rsp) 1569 { 1570 uint16_t cnt; 1571 response_t *pkt; 1572 1573 rsp->ring_ptr = rsp->ring; 1574 rsp->ring_index = 0; 1575 rsp->status_srb = NULL; 1576 pkt = rsp->ring_ptr; 1577 for (cnt = 0; cnt < rsp->length; cnt++) { 1578 pkt->signature = RESPONSE_PROCESSED; 1579 pkt++; 1580 } 1581 } 1582 1583 /** 1584 * qla2x00_update_fw_options() - Read and process firmware options. 1585 * @ha: HA context 1586 * 1587 * Returns 0 on success. 1588 */ 1589 void 1590 qla2x00_update_fw_options(scsi_qla_host_t *vha) 1591 { 1592 uint16_t swing, emphasis, tx_sens, rx_sens; 1593 struct qla_hw_data *ha = vha->hw; 1594 1595 memset(ha->fw_options, 0, sizeof(ha->fw_options)); 1596 qla2x00_get_fw_options(vha, ha->fw_options); 1597 1598 if (IS_QLA2100(ha) || IS_QLA2200(ha)) 1599 return; 1600 1601 /* Serial Link options. */ 1602 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115, 1603 "Serial link options.\n"); 1604 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109, 1605 (uint8_t *)&ha->fw_seriallink_options, 1606 sizeof(ha->fw_seriallink_options)); 1607 1608 ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING; 1609 if (ha->fw_seriallink_options[3] & BIT_2) { 1610 ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING; 1611 1612 /* 1G settings */ 1613 swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0); 1614 emphasis = (ha->fw_seriallink_options[2] & 1615 (BIT_4 | BIT_3)) >> 3; 1616 tx_sens = ha->fw_seriallink_options[0] & 1617 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 1618 rx_sens = (ha->fw_seriallink_options[0] & 1619 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; 1620 ha->fw_options[10] = (emphasis << 14) | (swing << 8); 1621 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { 1622 if (rx_sens == 0x0) 1623 rx_sens = 0x3; 1624 ha->fw_options[10] |= (tx_sens << 4) | rx_sens; 1625 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) 1626 ha->fw_options[10] |= BIT_5 | 1627 ((rx_sens & (BIT_1 | BIT_0)) << 2) | 1628 (tx_sens & (BIT_1 | BIT_0)); 1629 1630 /* 2G settings */ 1631 swing = (ha->fw_seriallink_options[2] & 1632 (BIT_7 | BIT_6 | BIT_5)) >> 5; 1633 emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0); 1634 tx_sens = ha->fw_seriallink_options[1] & 1635 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 1636 rx_sens = (ha->fw_seriallink_options[1] & 1637 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; 1638 ha->fw_options[11] = (emphasis << 14) | (swing << 8); 1639 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { 1640 if (rx_sens == 0x0) 1641 rx_sens = 0x3; 1642 ha->fw_options[11] |= (tx_sens << 4) | rx_sens; 1643 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) 1644 ha->fw_options[11] |= BIT_5 | 1645 ((rx_sens & (BIT_1 | BIT_0)) << 2) | 1646 (tx_sens & (BIT_1 | BIT_0)); 1647 } 1648 1649 /* FCP2 options. */ 1650 /* Return command IOCBs without waiting for an ABTS to complete. */ 1651 ha->fw_options[3] |= BIT_13; 1652 1653 /* LED scheme. */ 1654 if (ha->flags.enable_led_scheme) 1655 ha->fw_options[2] |= BIT_12; 1656 1657 /* Detect ISP6312. */ 1658 if (IS_QLA6312(ha)) 1659 ha->fw_options[2] |= BIT_13; 1660 1661 /* Update firmware options. */ 1662 qla2x00_set_fw_options(vha, ha->fw_options); 1663 } 1664 1665 void 1666 qla24xx_update_fw_options(scsi_qla_host_t *vha) 1667 { 1668 int rval; 1669 struct qla_hw_data *ha = vha->hw; 1670 1671 if (IS_QLA82XX(ha)) 1672 return; 1673 1674 /* Update Serial Link options. */ 1675 if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0) 1676 return; 1677 1678 rval = qla2x00_set_serdes_params(vha, 1679 le16_to_cpu(ha->fw_seriallink_options24[1]), 1680 le16_to_cpu(ha->fw_seriallink_options24[2]), 1681 le16_to_cpu(ha->fw_seriallink_options24[3])); 1682 if (rval != QLA_SUCCESS) { 1683 ql_log(ql_log_warn, vha, 0x0104, 1684 "Unable to update Serial Link options (%x).\n", rval); 1685 } 1686 } 1687 1688 void 1689 qla2x00_config_rings(struct scsi_qla_host *vha) 1690 { 1691 struct qla_hw_data *ha = vha->hw; 1692 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 1693 struct req_que *req = ha->req_q_map[0]; 1694 struct rsp_que *rsp = ha->rsp_q_map[0]; 1695 1696 /* Setup ring parameters in initialization control block. */ 1697 ha->init_cb->request_q_outpointer = __constant_cpu_to_le16(0); 1698 ha->init_cb->response_q_inpointer = __constant_cpu_to_le16(0); 1699 ha->init_cb->request_q_length = cpu_to_le16(req->length); 1700 ha->init_cb->response_q_length = cpu_to_le16(rsp->length); 1701 ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma)); 1702 ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma)); 1703 ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma)); 1704 ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma)); 1705 1706 WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0); 1707 WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0); 1708 WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0); 1709 WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0); 1710 RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */ 1711 } 1712 1713 void 1714 qla24xx_config_rings(struct scsi_qla_host *vha) 1715 { 1716 struct qla_hw_data *ha = vha->hw; 1717 device_reg_t __iomem *reg = ISP_QUE_REG(ha, 0); 1718 struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp; 1719 struct qla_msix_entry *msix; 1720 struct init_cb_24xx *icb; 1721 uint16_t rid = 0; 1722 struct req_que *req = ha->req_q_map[0]; 1723 struct rsp_que *rsp = ha->rsp_q_map[0]; 1724 1725 /* Setup ring parameters in initialization control block. */ 1726 icb = (struct init_cb_24xx *)ha->init_cb; 1727 icb->request_q_outpointer = __constant_cpu_to_le16(0); 1728 icb->response_q_inpointer = __constant_cpu_to_le16(0); 1729 icb->request_q_length = cpu_to_le16(req->length); 1730 icb->response_q_length = cpu_to_le16(rsp->length); 1731 icb->request_q_address[0] = cpu_to_le32(LSD(req->dma)); 1732 icb->request_q_address[1] = cpu_to_le32(MSD(req->dma)); 1733 icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma)); 1734 icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma)); 1735 1736 if (ha->mqenable) { 1737 icb->qos = __constant_cpu_to_le16(QLA_DEFAULT_QUE_QOS); 1738 icb->rid = __constant_cpu_to_le16(rid); 1739 if (ha->flags.msix_enabled) { 1740 msix = &ha->msix_entries[1]; 1741 ql_dbg(ql_dbg_init, vha, 0x00fd, 1742 "Registering vector 0x%x for base que.\n", 1743 msix->entry); 1744 icb->msix = cpu_to_le16(msix->entry); 1745 } 1746 /* Use alternate PCI bus number */ 1747 if (MSB(rid)) 1748 icb->firmware_options_2 |= 1749 __constant_cpu_to_le32(BIT_19); 1750 /* Use alternate PCI devfn */ 1751 if (LSB(rid)) 1752 icb->firmware_options_2 |= 1753 __constant_cpu_to_le32(BIT_18); 1754 1755 /* Use Disable MSIX Handshake mode for capable adapters */ 1756 if (IS_MSIX_NACK_CAPABLE(ha)) { 1757 icb->firmware_options_2 &= 1758 __constant_cpu_to_le32(~BIT_22); 1759 ha->flags.disable_msix_handshake = 1; 1760 ql_dbg(ql_dbg_init, vha, 0x00fe, 1761 "MSIX Handshake Disable Mode turned on.\n"); 1762 } else { 1763 icb->firmware_options_2 |= 1764 __constant_cpu_to_le32(BIT_22); 1765 } 1766 icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_23); 1767 1768 WRT_REG_DWORD(®->isp25mq.req_q_in, 0); 1769 WRT_REG_DWORD(®->isp25mq.req_q_out, 0); 1770 WRT_REG_DWORD(®->isp25mq.rsp_q_in, 0); 1771 WRT_REG_DWORD(®->isp25mq.rsp_q_out, 0); 1772 } else { 1773 WRT_REG_DWORD(®->isp24.req_q_in, 0); 1774 WRT_REG_DWORD(®->isp24.req_q_out, 0); 1775 WRT_REG_DWORD(®->isp24.rsp_q_in, 0); 1776 WRT_REG_DWORD(®->isp24.rsp_q_out, 0); 1777 } 1778 /* PCI posting */ 1779 RD_REG_DWORD(&ioreg->hccr); 1780 } 1781 1782 /** 1783 * qla2x00_init_rings() - Initializes firmware. 1784 * @ha: HA context 1785 * 1786 * Beginning of request ring has initialization control block already built 1787 * by nvram config routine. 1788 * 1789 * Returns 0 on success. 1790 */ 1791 static int 1792 qla2x00_init_rings(scsi_qla_host_t *vha) 1793 { 1794 int rval; 1795 unsigned long flags = 0; 1796 int cnt, que; 1797 struct qla_hw_data *ha = vha->hw; 1798 struct req_que *req; 1799 struct rsp_que *rsp; 1800 struct scsi_qla_host *vp; 1801 struct mid_init_cb_24xx *mid_init_cb = 1802 (struct mid_init_cb_24xx *) ha->init_cb; 1803 1804 spin_lock_irqsave(&ha->hardware_lock, flags); 1805 1806 /* Clear outstanding commands array. */ 1807 for (que = 0; que < ha->max_req_queues; que++) { 1808 req = ha->req_q_map[que]; 1809 if (!req) 1810 continue; 1811 for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++) 1812 req->outstanding_cmds[cnt] = NULL; 1813 1814 req->current_outstanding_cmd = 1; 1815 1816 /* Initialize firmware. */ 1817 req->ring_ptr = req->ring; 1818 req->ring_index = 0; 1819 req->cnt = req->length; 1820 } 1821 1822 for (que = 0; que < ha->max_rsp_queues; que++) { 1823 rsp = ha->rsp_q_map[que]; 1824 if (!rsp) 1825 continue; 1826 /* Initialize response queue entries */ 1827 qla2x00_init_response_q_entries(rsp); 1828 } 1829 1830 spin_lock(&ha->vport_slock); 1831 /* Clear RSCN queue. */ 1832 list_for_each_entry(vp, &ha->vp_list, list) { 1833 vp->rscn_in_ptr = 0; 1834 vp->rscn_out_ptr = 0; 1835 } 1836 1837 spin_unlock(&ha->vport_slock); 1838 1839 ha->isp_ops->config_rings(vha); 1840 1841 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1842 1843 /* Update any ISP specific firmware options before initialization. */ 1844 ha->isp_ops->update_fw_options(vha); 1845 1846 ql_dbg(ql_dbg_init, vha, 0x00d1, "Issue init firmware.\n"); 1847 1848 if (ha->flags.npiv_supported) { 1849 if (ha->operating_mode == LOOP) 1850 ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1; 1851 mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports); 1852 } 1853 1854 if (IS_FWI2_CAPABLE(ha)) { 1855 mid_init_cb->options = __constant_cpu_to_le16(BIT_1); 1856 mid_init_cb->init_cb.execution_throttle = 1857 cpu_to_le16(ha->fw_xcb_count); 1858 } 1859 1860 rval = qla2x00_init_firmware(vha, ha->init_cb_size); 1861 if (rval) { 1862 ql_log(ql_log_fatal, vha, 0x00d2, 1863 "Init Firmware **** FAILED ****.\n"); 1864 } else { 1865 ql_dbg(ql_dbg_init, vha, 0x00d3, 1866 "Init Firmware -- success.\n"); 1867 } 1868 1869 return (rval); 1870 } 1871 1872 /** 1873 * qla2x00_fw_ready() - Waits for firmware ready. 1874 * @ha: HA context 1875 * 1876 * Returns 0 on success. 1877 */ 1878 static int 1879 qla2x00_fw_ready(scsi_qla_host_t *vha) 1880 { 1881 int rval; 1882 unsigned long wtime, mtime, cs84xx_time; 1883 uint16_t min_wait; /* Minimum wait time if loop is down */ 1884 uint16_t wait_time; /* Wait time if loop is coming ready */ 1885 uint16_t state[5]; 1886 struct qla_hw_data *ha = vha->hw; 1887 1888 rval = QLA_SUCCESS; 1889 1890 /* 20 seconds for loop down. */ 1891 min_wait = 20; 1892 1893 /* 1894 * Firmware should take at most one RATOV to login, plus 5 seconds for 1895 * our own processing. 1896 */ 1897 if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) { 1898 wait_time = min_wait; 1899 } 1900 1901 /* Min wait time if loop down */ 1902 mtime = jiffies + (min_wait * HZ); 1903 1904 /* wait time before firmware ready */ 1905 wtime = jiffies + (wait_time * HZ); 1906 1907 /* Wait for ISP to finish LIP */ 1908 if (!vha->flags.init_done) 1909 ql_log(ql_log_info, vha, 0x801e, 1910 "Waiting for LIP to complete.\n"); 1911 1912 do { 1913 rval = qla2x00_get_firmware_state(vha, state); 1914 if (rval == QLA_SUCCESS) { 1915 if (state[0] < FSTATE_LOSS_OF_SYNC) { 1916 vha->device_flags &= ~DFLG_NO_CABLE; 1917 } 1918 if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) { 1919 ql_dbg(ql_dbg_taskm, vha, 0x801f, 1920 "fw_state=%x 84xx=%x.\n", state[0], 1921 state[2]); 1922 if ((state[2] & FSTATE_LOGGED_IN) && 1923 (state[2] & FSTATE_WAITING_FOR_VERIFY)) { 1924 ql_dbg(ql_dbg_taskm, vha, 0x8028, 1925 "Sending verify iocb.\n"); 1926 1927 cs84xx_time = jiffies; 1928 rval = qla84xx_init_chip(vha); 1929 if (rval != QLA_SUCCESS) { 1930 ql_log(ql_log_warn, 1931 vha, 0x8026, 1932 "Init chip failed.\n"); 1933 break; 1934 } 1935 1936 /* Add time taken to initialize. */ 1937 cs84xx_time = jiffies - cs84xx_time; 1938 wtime += cs84xx_time; 1939 mtime += cs84xx_time; 1940 ql_dbg(ql_dbg_taskm, vha, 0x8025, 1941 "Increasing wait time by %ld. " 1942 "New time %ld.\n", cs84xx_time, 1943 wtime); 1944 } 1945 } else if (state[0] == FSTATE_READY) { 1946 ql_dbg(ql_dbg_taskm, vha, 0x8037, 1947 "F/W Ready - OK.\n"); 1948 1949 qla2x00_get_retry_cnt(vha, &ha->retry_count, 1950 &ha->login_timeout, &ha->r_a_tov); 1951 1952 rval = QLA_SUCCESS; 1953 break; 1954 } 1955 1956 rval = QLA_FUNCTION_FAILED; 1957 1958 if (atomic_read(&vha->loop_down_timer) && 1959 state[0] != FSTATE_READY) { 1960 /* Loop down. Timeout on min_wait for states 1961 * other than Wait for Login. 1962 */ 1963 if (time_after_eq(jiffies, mtime)) { 1964 ql_log(ql_log_info, vha, 0x8038, 1965 "Cable is unplugged...\n"); 1966 1967 vha->device_flags |= DFLG_NO_CABLE; 1968 break; 1969 } 1970 } 1971 } else { 1972 /* Mailbox cmd failed. Timeout on min_wait. */ 1973 if (time_after_eq(jiffies, mtime) || 1974 ha->flags.isp82xx_fw_hung) 1975 break; 1976 } 1977 1978 if (time_after_eq(jiffies, wtime)) 1979 break; 1980 1981 /* Delay for a while */ 1982 msleep(500); 1983 1984 ql_dbg(ql_dbg_taskm, vha, 0x8039, 1985 "fw_state=%x curr time=%lx.\n", state[0], jiffies); 1986 } while (1); 1987 1988 ql_dbg(ql_dbg_taskm, vha, 0x803a, 1989 "fw_state=%x (%x, %x, %x, %x) " "curr time=%lx.\n", state[0], 1990 state[1], state[2], state[3], state[4], jiffies); 1991 1992 if (rval) { 1993 ql_log(ql_log_warn, vha, 0x803b, 1994 "Firmware ready **** FAILED ****.\n"); 1995 } 1996 1997 return (rval); 1998 } 1999 2000 /* 2001 * qla2x00_configure_hba 2002 * Setup adapter context. 2003 * 2004 * Input: 2005 * ha = adapter state pointer. 2006 * 2007 * Returns: 2008 * 0 = success 2009 * 2010 * Context: 2011 * Kernel context. 2012 */ 2013 static int 2014 qla2x00_configure_hba(scsi_qla_host_t *vha) 2015 { 2016 int rval; 2017 uint16_t loop_id; 2018 uint16_t topo; 2019 uint16_t sw_cap; 2020 uint8_t al_pa; 2021 uint8_t area; 2022 uint8_t domain; 2023 char connect_type[22]; 2024 struct qla_hw_data *ha = vha->hw; 2025 2026 /* Get host addresses. */ 2027 rval = qla2x00_get_adapter_id(vha, 2028 &loop_id, &al_pa, &area, &domain, &topo, &sw_cap); 2029 if (rval != QLA_SUCCESS) { 2030 if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) || 2031 IS_QLA8XXX_TYPE(ha) || 2032 (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) { 2033 ql_dbg(ql_dbg_disc, vha, 0x2008, 2034 "Loop is in a transition state.\n"); 2035 } else { 2036 ql_log(ql_log_warn, vha, 0x2009, 2037 "Unable to get host loop ID.\n"); 2038 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 2039 } 2040 return (rval); 2041 } 2042 2043 if (topo == 4) { 2044 ql_log(ql_log_info, vha, 0x200a, 2045 "Cannot get topology - retrying.\n"); 2046 return (QLA_FUNCTION_FAILED); 2047 } 2048 2049 vha->loop_id = loop_id; 2050 2051 /* initialize */ 2052 ha->min_external_loopid = SNS_FIRST_LOOP_ID; 2053 ha->operating_mode = LOOP; 2054 ha->switch_cap = 0; 2055 2056 switch (topo) { 2057 case 0: 2058 ql_dbg(ql_dbg_disc, vha, 0x200b, "HBA in NL topology.\n"); 2059 ha->current_topology = ISP_CFG_NL; 2060 strcpy(connect_type, "(Loop)"); 2061 break; 2062 2063 case 1: 2064 ql_dbg(ql_dbg_disc, vha, 0x200c, "HBA in FL topology.\n"); 2065 ha->switch_cap = sw_cap; 2066 ha->current_topology = ISP_CFG_FL; 2067 strcpy(connect_type, "(FL_Port)"); 2068 break; 2069 2070 case 2: 2071 ql_dbg(ql_dbg_disc, vha, 0x200d, "HBA in N P2P topology.\n"); 2072 ha->operating_mode = P2P; 2073 ha->current_topology = ISP_CFG_N; 2074 strcpy(connect_type, "(N_Port-to-N_Port)"); 2075 break; 2076 2077 case 3: 2078 ql_dbg(ql_dbg_disc, vha, 0x200e, "HBA in F P2P topology.\n"); 2079 ha->switch_cap = sw_cap; 2080 ha->operating_mode = P2P; 2081 ha->current_topology = ISP_CFG_F; 2082 strcpy(connect_type, "(F_Port)"); 2083 break; 2084 2085 default: 2086 ql_dbg(ql_dbg_disc, vha, 0x200f, 2087 "HBA in unknown topology %x, using NL.\n", topo); 2088 ha->current_topology = ISP_CFG_NL; 2089 strcpy(connect_type, "(Loop)"); 2090 break; 2091 } 2092 2093 /* Save Host port and loop ID. */ 2094 /* byte order - Big Endian */ 2095 vha->d_id.b.domain = domain; 2096 vha->d_id.b.area = area; 2097 vha->d_id.b.al_pa = al_pa; 2098 2099 if (!vha->flags.init_done) 2100 ql_log(ql_log_info, vha, 0x2010, 2101 "Topology - %s, Host Loop address 0x%x.\n", 2102 connect_type, vha->loop_id); 2103 2104 if (rval) { 2105 ql_log(ql_log_warn, vha, 0x2011, 2106 "%s FAILED\n", __func__); 2107 } else { 2108 ql_dbg(ql_dbg_disc, vha, 0x2012, 2109 "%s success\n", __func__); 2110 } 2111 2112 return(rval); 2113 } 2114 2115 inline void 2116 qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len, 2117 char *def) 2118 { 2119 char *st, *en; 2120 uint16_t index; 2121 struct qla_hw_data *ha = vha->hw; 2122 int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) && 2123 !IS_QLA8XXX_TYPE(ha); 2124 2125 if (memcmp(model, BINZERO, len) != 0) { 2126 strncpy(ha->model_number, model, len); 2127 st = en = ha->model_number; 2128 en += len - 1; 2129 while (en > st) { 2130 if (*en != 0x20 && *en != 0x00) 2131 break; 2132 *en-- = '\0'; 2133 } 2134 2135 index = (ha->pdev->subsystem_device & 0xff); 2136 if (use_tbl && 2137 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && 2138 index < QLA_MODEL_NAMES) 2139 strncpy(ha->model_desc, 2140 qla2x00_model_name[index * 2 + 1], 2141 sizeof(ha->model_desc) - 1); 2142 } else { 2143 index = (ha->pdev->subsystem_device & 0xff); 2144 if (use_tbl && 2145 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && 2146 index < QLA_MODEL_NAMES) { 2147 strcpy(ha->model_number, 2148 qla2x00_model_name[index * 2]); 2149 strncpy(ha->model_desc, 2150 qla2x00_model_name[index * 2 + 1], 2151 sizeof(ha->model_desc) - 1); 2152 } else { 2153 strcpy(ha->model_number, def); 2154 } 2155 } 2156 if (IS_FWI2_CAPABLE(ha)) 2157 qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc, 2158 sizeof(ha->model_desc)); 2159 } 2160 2161 /* On sparc systems, obtain port and node WWN from firmware 2162 * properties. 2163 */ 2164 static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv) 2165 { 2166 #ifdef CONFIG_SPARC 2167 struct qla_hw_data *ha = vha->hw; 2168 struct pci_dev *pdev = ha->pdev; 2169 struct device_node *dp = pci_device_to_OF_node(pdev); 2170 const u8 *val; 2171 int len; 2172 2173 val = of_get_property(dp, "port-wwn", &len); 2174 if (val && len >= WWN_SIZE) 2175 memcpy(nv->port_name, val, WWN_SIZE); 2176 2177 val = of_get_property(dp, "node-wwn", &len); 2178 if (val && len >= WWN_SIZE) 2179 memcpy(nv->node_name, val, WWN_SIZE); 2180 #endif 2181 } 2182 2183 /* 2184 * NVRAM configuration for ISP 2xxx 2185 * 2186 * Input: 2187 * ha = adapter block pointer. 2188 * 2189 * Output: 2190 * initialization control block in response_ring 2191 * host adapters parameters in host adapter block 2192 * 2193 * Returns: 2194 * 0 = success. 2195 */ 2196 int 2197 qla2x00_nvram_config(scsi_qla_host_t *vha) 2198 { 2199 int rval; 2200 uint8_t chksum = 0; 2201 uint16_t cnt; 2202 uint8_t *dptr1, *dptr2; 2203 struct qla_hw_data *ha = vha->hw; 2204 init_cb_t *icb = ha->init_cb; 2205 nvram_t *nv = ha->nvram; 2206 uint8_t *ptr = ha->nvram; 2207 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2208 2209 rval = QLA_SUCCESS; 2210 2211 /* Determine NVRAM starting address. */ 2212 ha->nvram_size = sizeof(nvram_t); 2213 ha->nvram_base = 0; 2214 if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha)) 2215 if ((RD_REG_WORD(®->ctrl_status) >> 14) == 1) 2216 ha->nvram_base = 0x80; 2217 2218 /* Get NVRAM data and calculate checksum. */ 2219 ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size); 2220 for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++) 2221 chksum += *ptr++; 2222 2223 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f, 2224 "Contents of NVRAM.\n"); 2225 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110, 2226 (uint8_t *)nv, ha->nvram_size); 2227 2228 /* Bad NVRAM data, set defaults parameters. */ 2229 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || 2230 nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) { 2231 /* Reset NVRAM data. */ 2232 ql_log(ql_log_warn, vha, 0x0064, 2233 "Inconisistent NVRAM " 2234 "detected: checksum=0x%x id=%c version=0x%x.\n", 2235 chksum, nv->id[0], nv->nvram_version); 2236 ql_log(ql_log_warn, vha, 0x0065, 2237 "Falling back to " 2238 "functioning (yet invalid -- WWPN) defaults.\n"); 2239 2240 /* 2241 * Set default initialization control block. 2242 */ 2243 memset(nv, 0, ha->nvram_size); 2244 nv->parameter_block_version = ICB_VERSION; 2245 2246 if (IS_QLA23XX(ha)) { 2247 nv->firmware_options[0] = BIT_2 | BIT_1; 2248 nv->firmware_options[1] = BIT_7 | BIT_5; 2249 nv->add_firmware_options[0] = BIT_5; 2250 nv->add_firmware_options[1] = BIT_5 | BIT_4; 2251 nv->frame_payload_size = __constant_cpu_to_le16(2048); 2252 nv->special_options[1] = BIT_7; 2253 } else if (IS_QLA2200(ha)) { 2254 nv->firmware_options[0] = BIT_2 | BIT_1; 2255 nv->firmware_options[1] = BIT_7 | BIT_5; 2256 nv->add_firmware_options[0] = BIT_5; 2257 nv->add_firmware_options[1] = BIT_5 | BIT_4; 2258 nv->frame_payload_size = __constant_cpu_to_le16(1024); 2259 } else if (IS_QLA2100(ha)) { 2260 nv->firmware_options[0] = BIT_3 | BIT_1; 2261 nv->firmware_options[1] = BIT_5; 2262 nv->frame_payload_size = __constant_cpu_to_le16(1024); 2263 } 2264 2265 nv->max_iocb_allocation = __constant_cpu_to_le16(256); 2266 nv->execution_throttle = __constant_cpu_to_le16(16); 2267 nv->retry_count = 8; 2268 nv->retry_delay = 1; 2269 2270 nv->port_name[0] = 33; 2271 nv->port_name[3] = 224; 2272 nv->port_name[4] = 139; 2273 2274 qla2xxx_nvram_wwn_from_ofw(vha, nv); 2275 2276 nv->login_timeout = 4; 2277 2278 /* 2279 * Set default host adapter parameters 2280 */ 2281 nv->host_p[1] = BIT_2; 2282 nv->reset_delay = 5; 2283 nv->port_down_retry_count = 8; 2284 nv->max_luns_per_target = __constant_cpu_to_le16(8); 2285 nv->link_down_timeout = 60; 2286 2287 rval = 1; 2288 } 2289 2290 #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2) 2291 /* 2292 * The SN2 does not provide BIOS emulation which means you can't change 2293 * potentially bogus BIOS settings. Force the use of default settings 2294 * for link rate and frame size. Hope that the rest of the settings 2295 * are valid. 2296 */ 2297 if (ia64_platform_is("sn2")) { 2298 nv->frame_payload_size = __constant_cpu_to_le16(2048); 2299 if (IS_QLA23XX(ha)) 2300 nv->special_options[1] = BIT_7; 2301 } 2302 #endif 2303 2304 /* Reset Initialization control block */ 2305 memset(icb, 0, ha->init_cb_size); 2306 2307 /* 2308 * Setup driver NVRAM options. 2309 */ 2310 nv->firmware_options[0] |= (BIT_6 | BIT_1); 2311 nv->firmware_options[0] &= ~(BIT_5 | BIT_4); 2312 nv->firmware_options[1] |= (BIT_5 | BIT_0); 2313 nv->firmware_options[1] &= ~BIT_4; 2314 2315 if (IS_QLA23XX(ha)) { 2316 nv->firmware_options[0] |= BIT_2; 2317 nv->firmware_options[0] &= ~BIT_3; 2318 nv->firmware_options[0] &= ~BIT_6; 2319 nv->add_firmware_options[1] |= BIT_5 | BIT_4; 2320 2321 if (IS_QLA2300(ha)) { 2322 if (ha->fb_rev == FPM_2310) { 2323 strcpy(ha->model_number, "QLA2310"); 2324 } else { 2325 strcpy(ha->model_number, "QLA2300"); 2326 } 2327 } else { 2328 qla2x00_set_model_info(vha, nv->model_number, 2329 sizeof(nv->model_number), "QLA23xx"); 2330 } 2331 } else if (IS_QLA2200(ha)) { 2332 nv->firmware_options[0] |= BIT_2; 2333 /* 2334 * 'Point-to-point preferred, else loop' is not a safe 2335 * connection mode setting. 2336 */ 2337 if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) == 2338 (BIT_5 | BIT_4)) { 2339 /* Force 'loop preferred, else point-to-point'. */ 2340 nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4); 2341 nv->add_firmware_options[0] |= BIT_5; 2342 } 2343 strcpy(ha->model_number, "QLA22xx"); 2344 } else /*if (IS_QLA2100(ha))*/ { 2345 strcpy(ha->model_number, "QLA2100"); 2346 } 2347 2348 /* 2349 * Copy over NVRAM RISC parameter block to initialization control block. 2350 */ 2351 dptr1 = (uint8_t *)icb; 2352 dptr2 = (uint8_t *)&nv->parameter_block_version; 2353 cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version; 2354 while (cnt--) 2355 *dptr1++ = *dptr2++; 2356 2357 /* Copy 2nd half. */ 2358 dptr1 = (uint8_t *)icb->add_firmware_options; 2359 cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options; 2360 while (cnt--) 2361 *dptr1++ = *dptr2++; 2362 2363 /* Use alternate WWN? */ 2364 if (nv->host_p[1] & BIT_7) { 2365 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 2366 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 2367 } 2368 2369 /* Prepare nodename */ 2370 if ((icb->firmware_options[1] & BIT_6) == 0) { 2371 /* 2372 * Firmware will apply the following mask if the nodename was 2373 * not provided. 2374 */ 2375 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 2376 icb->node_name[0] &= 0xF0; 2377 } 2378 2379 /* 2380 * Set host adapter parameters. 2381 */ 2382 2383 /* 2384 * BIT_7 in the host-parameters section allows for modification to 2385 * internal driver logging. 2386 */ 2387 if (nv->host_p[0] & BIT_7) 2388 ql2xextended_error_logging = 0x7fffffff; 2389 ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0); 2390 /* Always load RISC code on non ISP2[12]00 chips. */ 2391 if (!IS_QLA2100(ha) && !IS_QLA2200(ha)) 2392 ha->flags.disable_risc_code_load = 0; 2393 ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0); 2394 ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0); 2395 ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0); 2396 ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0; 2397 ha->flags.disable_serdes = 0; 2398 2399 ha->operating_mode = 2400 (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4; 2401 2402 memcpy(ha->fw_seriallink_options, nv->seriallink_options, 2403 sizeof(ha->fw_seriallink_options)); 2404 2405 /* save HBA serial number */ 2406 ha->serial0 = icb->port_name[5]; 2407 ha->serial1 = icb->port_name[6]; 2408 ha->serial2 = icb->port_name[7]; 2409 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 2410 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 2411 2412 icb->execution_throttle = __constant_cpu_to_le16(0xFFFF); 2413 2414 ha->retry_count = nv->retry_count; 2415 2416 /* Set minimum login_timeout to 4 seconds. */ 2417 if (nv->login_timeout != ql2xlogintimeout) 2418 nv->login_timeout = ql2xlogintimeout; 2419 if (nv->login_timeout < 4) 2420 nv->login_timeout = 4; 2421 ha->login_timeout = nv->login_timeout; 2422 icb->login_timeout = nv->login_timeout; 2423 2424 /* Set minimum RATOV to 100 tenths of a second. */ 2425 ha->r_a_tov = 100; 2426 2427 ha->loop_reset_delay = nv->reset_delay; 2428 2429 /* Link Down Timeout = 0: 2430 * 2431 * When Port Down timer expires we will start returning 2432 * I/O's to OS with "DID_NO_CONNECT". 2433 * 2434 * Link Down Timeout != 0: 2435 * 2436 * The driver waits for the link to come up after link down 2437 * before returning I/Os to OS with "DID_NO_CONNECT". 2438 */ 2439 if (nv->link_down_timeout == 0) { 2440 ha->loop_down_abort_time = 2441 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 2442 } else { 2443 ha->link_down_timeout = nv->link_down_timeout; 2444 ha->loop_down_abort_time = 2445 (LOOP_DOWN_TIME - ha->link_down_timeout); 2446 } 2447 2448 /* 2449 * Need enough time to try and get the port back. 2450 */ 2451 ha->port_down_retry_count = nv->port_down_retry_count; 2452 if (qlport_down_retry) 2453 ha->port_down_retry_count = qlport_down_retry; 2454 /* Set login_retry_count */ 2455 ha->login_retry_count = nv->retry_count; 2456 if (ha->port_down_retry_count == nv->port_down_retry_count && 2457 ha->port_down_retry_count > 3) 2458 ha->login_retry_count = ha->port_down_retry_count; 2459 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 2460 ha->login_retry_count = ha->port_down_retry_count; 2461 if (ql2xloginretrycount) 2462 ha->login_retry_count = ql2xloginretrycount; 2463 2464 icb->lun_enables = __constant_cpu_to_le16(0); 2465 icb->command_resource_count = 0; 2466 icb->immediate_notify_resource_count = 0; 2467 icb->timeout = __constant_cpu_to_le16(0); 2468 2469 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { 2470 /* Enable RIO */ 2471 icb->firmware_options[0] &= ~BIT_3; 2472 icb->add_firmware_options[0] &= 2473 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); 2474 icb->add_firmware_options[0] |= BIT_2; 2475 icb->response_accumulation_timer = 3; 2476 icb->interrupt_delay_timer = 5; 2477 2478 vha->flags.process_response_queue = 1; 2479 } else { 2480 /* Enable ZIO. */ 2481 if (!vha->flags.init_done) { 2482 ha->zio_mode = icb->add_firmware_options[0] & 2483 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 2484 ha->zio_timer = icb->interrupt_delay_timer ? 2485 icb->interrupt_delay_timer: 2; 2486 } 2487 icb->add_firmware_options[0] &= 2488 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); 2489 vha->flags.process_response_queue = 0; 2490 if (ha->zio_mode != QLA_ZIO_DISABLED) { 2491 ha->zio_mode = QLA_ZIO_MODE_6; 2492 2493 ql_log(ql_log_info, vha, 0x0068, 2494 "ZIO mode %d enabled; timer delay (%d us).\n", 2495 ha->zio_mode, ha->zio_timer * 100); 2496 2497 icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode; 2498 icb->interrupt_delay_timer = (uint8_t)ha->zio_timer; 2499 vha->flags.process_response_queue = 1; 2500 } 2501 } 2502 2503 if (rval) { 2504 ql_log(ql_log_warn, vha, 0x0069, 2505 "NVRAM configuration failed.\n"); 2506 } 2507 return (rval); 2508 } 2509 2510 static void 2511 qla2x00_rport_del(void *data) 2512 { 2513 fc_port_t *fcport = data; 2514 struct fc_rport *rport; 2515 unsigned long flags; 2516 2517 spin_lock_irqsave(fcport->vha->host->host_lock, flags); 2518 rport = fcport->drport ? fcport->drport: fcport->rport; 2519 fcport->drport = NULL; 2520 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags); 2521 if (rport) 2522 fc_remote_port_delete(rport); 2523 } 2524 2525 /** 2526 * qla2x00_alloc_fcport() - Allocate a generic fcport. 2527 * @ha: HA context 2528 * @flags: allocation flags 2529 * 2530 * Returns a pointer to the allocated fcport, or NULL, if none available. 2531 */ 2532 fc_port_t * 2533 qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags) 2534 { 2535 fc_port_t *fcport; 2536 2537 fcport = kzalloc(sizeof(fc_port_t), flags); 2538 if (!fcport) 2539 return NULL; 2540 2541 /* Setup fcport template structure. */ 2542 fcport->vha = vha; 2543 fcport->vp_idx = vha->vp_idx; 2544 fcport->port_type = FCT_UNKNOWN; 2545 fcport->loop_id = FC_NO_LOOP_ID; 2546 qla2x00_set_fcport_state(fcport, FCS_UNCONFIGURED); 2547 fcport->supported_classes = FC_COS_UNSPECIFIED; 2548 2549 return fcport; 2550 } 2551 2552 /* 2553 * qla2x00_configure_loop 2554 * Updates Fibre Channel Device Database with what is actually on loop. 2555 * 2556 * Input: 2557 * ha = adapter block pointer. 2558 * 2559 * Returns: 2560 * 0 = success. 2561 * 1 = error. 2562 * 2 = database was full and device was not configured. 2563 */ 2564 static int 2565 qla2x00_configure_loop(scsi_qla_host_t *vha) 2566 { 2567 int rval; 2568 unsigned long flags, save_flags; 2569 struct qla_hw_data *ha = vha->hw; 2570 rval = QLA_SUCCESS; 2571 2572 /* Get Initiator ID */ 2573 if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) { 2574 rval = qla2x00_configure_hba(vha); 2575 if (rval != QLA_SUCCESS) { 2576 ql_dbg(ql_dbg_disc, vha, 0x2013, 2577 "Unable to configure HBA.\n"); 2578 return (rval); 2579 } 2580 } 2581 2582 save_flags = flags = vha->dpc_flags; 2583 ql_dbg(ql_dbg_disc, vha, 0x2014, 2584 "Configure loop -- dpc flags = 0x%lx.\n", flags); 2585 2586 /* 2587 * If we have both an RSCN and PORT UPDATE pending then handle them 2588 * both at the same time. 2589 */ 2590 clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 2591 clear_bit(RSCN_UPDATE, &vha->dpc_flags); 2592 2593 qla2x00_get_data_rate(vha); 2594 2595 /* Determine what we need to do */ 2596 if (ha->current_topology == ISP_CFG_FL && 2597 (test_bit(LOCAL_LOOP_UPDATE, &flags))) { 2598 2599 vha->flags.rscn_queue_overflow = 1; 2600 set_bit(RSCN_UPDATE, &flags); 2601 2602 } else if (ha->current_topology == ISP_CFG_F && 2603 (test_bit(LOCAL_LOOP_UPDATE, &flags))) { 2604 2605 vha->flags.rscn_queue_overflow = 1; 2606 set_bit(RSCN_UPDATE, &flags); 2607 clear_bit(LOCAL_LOOP_UPDATE, &flags); 2608 2609 } else if (ha->current_topology == ISP_CFG_N) { 2610 clear_bit(RSCN_UPDATE, &flags); 2611 2612 } else if (!vha->flags.online || 2613 (test_bit(ABORT_ISP_ACTIVE, &flags))) { 2614 2615 vha->flags.rscn_queue_overflow = 1; 2616 set_bit(RSCN_UPDATE, &flags); 2617 set_bit(LOCAL_LOOP_UPDATE, &flags); 2618 } 2619 2620 if (test_bit(LOCAL_LOOP_UPDATE, &flags)) { 2621 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 2622 ql_dbg(ql_dbg_disc, vha, 0x2015, 2623 "Loop resync needed, failing.\n"); 2624 rval = QLA_FUNCTION_FAILED; 2625 } 2626 else 2627 rval = qla2x00_configure_local_loop(vha); 2628 } 2629 2630 if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) { 2631 if (LOOP_TRANSITION(vha)) { 2632 ql_dbg(ql_dbg_disc, vha, 0x201e, 2633 "Needs RSCN update and loop transition.\n"); 2634 rval = QLA_FUNCTION_FAILED; 2635 } 2636 else 2637 rval = qla2x00_configure_fabric(vha); 2638 } 2639 2640 if (rval == QLA_SUCCESS) { 2641 if (atomic_read(&vha->loop_down_timer) || 2642 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 2643 rval = QLA_FUNCTION_FAILED; 2644 } else { 2645 atomic_set(&vha->loop_state, LOOP_READY); 2646 ql_dbg(ql_dbg_disc, vha, 0x2069, 2647 "LOOP READY.\n"); 2648 } 2649 } 2650 2651 if (rval) { 2652 ql_dbg(ql_dbg_disc, vha, 0x206a, 2653 "%s *** FAILED ***.\n", __func__); 2654 } else { 2655 ql_dbg(ql_dbg_disc, vha, 0x206b, 2656 "%s: exiting normally.\n", __func__); 2657 } 2658 2659 /* Restore state if a resync event occurred during processing */ 2660 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 2661 if (test_bit(LOCAL_LOOP_UPDATE, &save_flags)) 2662 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 2663 if (test_bit(RSCN_UPDATE, &save_flags)) { 2664 set_bit(RSCN_UPDATE, &vha->dpc_flags); 2665 if (!IS_ALOGIO_CAPABLE(ha)) 2666 vha->flags.rscn_queue_overflow = 1; 2667 } 2668 } 2669 2670 return (rval); 2671 } 2672 2673 2674 2675 /* 2676 * qla2x00_configure_local_loop 2677 * Updates Fibre Channel Device Database with local loop devices. 2678 * 2679 * Input: 2680 * ha = adapter block pointer. 2681 * 2682 * Returns: 2683 * 0 = success. 2684 */ 2685 static int 2686 qla2x00_configure_local_loop(scsi_qla_host_t *vha) 2687 { 2688 int rval, rval2; 2689 int found_devs; 2690 int found; 2691 fc_port_t *fcport, *new_fcport; 2692 2693 uint16_t index; 2694 uint16_t entries; 2695 char *id_iter; 2696 uint16_t loop_id; 2697 uint8_t domain, area, al_pa; 2698 struct qla_hw_data *ha = vha->hw; 2699 2700 found_devs = 0; 2701 new_fcport = NULL; 2702 entries = MAX_FIBRE_DEVICES; 2703 2704 ql_dbg(ql_dbg_disc, vha, 0x2016, 2705 "Getting FCAL position map.\n"); 2706 if (ql2xextended_error_logging & ql_dbg_disc) 2707 qla2x00_get_fcal_position_map(vha, NULL); 2708 2709 /* Get list of logged in devices. */ 2710 memset(ha->gid_list, 0, GID_LIST_SIZE); 2711 rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma, 2712 &entries); 2713 if (rval != QLA_SUCCESS) 2714 goto cleanup_allocation; 2715 2716 ql_dbg(ql_dbg_disc, vha, 0x2017, 2717 "Entries in ID list (%d).\n", entries); 2718 ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075, 2719 (uint8_t *)ha->gid_list, 2720 entries * sizeof(struct gid_list_info)); 2721 2722 /* Allocate temporary fcport for any new fcports discovered. */ 2723 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 2724 if (new_fcport == NULL) { 2725 ql_log(ql_log_warn, vha, 0x2018, 2726 "Memory allocation failed for fcport.\n"); 2727 rval = QLA_MEMORY_ALLOC_FAILED; 2728 goto cleanup_allocation; 2729 } 2730 new_fcport->flags &= ~FCF_FABRIC_DEVICE; 2731 2732 /* 2733 * Mark local devices that were present with FCF_DEVICE_LOST for now. 2734 */ 2735 list_for_each_entry(fcport, &vha->vp_fcports, list) { 2736 if (atomic_read(&fcport->state) == FCS_ONLINE && 2737 fcport->port_type != FCT_BROADCAST && 2738 (fcport->flags & FCF_FABRIC_DEVICE) == 0) { 2739 2740 ql_dbg(ql_dbg_disc, vha, 0x2019, 2741 "Marking port lost loop_id=0x%04x.\n", 2742 fcport->loop_id); 2743 2744 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST); 2745 } 2746 } 2747 2748 /* Add devices to port list. */ 2749 id_iter = (char *)ha->gid_list; 2750 for (index = 0; index < entries; index++) { 2751 domain = ((struct gid_list_info *)id_iter)->domain; 2752 area = ((struct gid_list_info *)id_iter)->area; 2753 al_pa = ((struct gid_list_info *)id_iter)->al_pa; 2754 if (IS_QLA2100(ha) || IS_QLA2200(ha)) 2755 loop_id = (uint16_t) 2756 ((struct gid_list_info *)id_iter)->loop_id_2100; 2757 else 2758 loop_id = le16_to_cpu( 2759 ((struct gid_list_info *)id_iter)->loop_id); 2760 id_iter += ha->gid_list_info_size; 2761 2762 /* Bypass reserved domain fields. */ 2763 if ((domain & 0xf0) == 0xf0) 2764 continue; 2765 2766 /* Bypass if not same domain and area of adapter. */ 2767 if (area && domain && 2768 (area != vha->d_id.b.area || domain != vha->d_id.b.domain)) 2769 continue; 2770 2771 /* Bypass invalid local loop ID. */ 2772 if (loop_id > LAST_LOCAL_LOOP_ID) 2773 continue; 2774 2775 /* Fill in member data. */ 2776 new_fcport->d_id.b.domain = domain; 2777 new_fcport->d_id.b.area = area; 2778 new_fcport->d_id.b.al_pa = al_pa; 2779 new_fcport->loop_id = loop_id; 2780 new_fcport->vp_idx = vha->vp_idx; 2781 rval2 = qla2x00_get_port_database(vha, new_fcport, 0); 2782 if (rval2 != QLA_SUCCESS) { 2783 ql_dbg(ql_dbg_disc, vha, 0x201a, 2784 "Failed to retrieve fcport information " 2785 "-- get_port_database=%x, loop_id=0x%04x.\n", 2786 rval2, new_fcport->loop_id); 2787 ql_dbg(ql_dbg_disc, vha, 0x201b, 2788 "Scheduling resync.\n"); 2789 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 2790 continue; 2791 } 2792 2793 /* Check for matching device in port list. */ 2794 found = 0; 2795 fcport = NULL; 2796 list_for_each_entry(fcport, &vha->vp_fcports, list) { 2797 if (memcmp(new_fcport->port_name, fcport->port_name, 2798 WWN_SIZE)) 2799 continue; 2800 2801 fcport->flags &= ~FCF_FABRIC_DEVICE; 2802 fcport->loop_id = new_fcport->loop_id; 2803 fcport->port_type = new_fcport->port_type; 2804 fcport->d_id.b24 = new_fcport->d_id.b24; 2805 memcpy(fcport->node_name, new_fcport->node_name, 2806 WWN_SIZE); 2807 2808 found++; 2809 break; 2810 } 2811 2812 if (!found) { 2813 /* New device, add to fcports list. */ 2814 if (vha->vp_idx) { 2815 new_fcport->vha = vha; 2816 new_fcport->vp_idx = vha->vp_idx; 2817 } 2818 list_add_tail(&new_fcport->list, &vha->vp_fcports); 2819 2820 /* Allocate a new replacement fcport. */ 2821 fcport = new_fcport; 2822 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 2823 if (new_fcport == NULL) { 2824 ql_log(ql_log_warn, vha, 0x201c, 2825 "Failed to allocate memory for fcport.\n"); 2826 rval = QLA_MEMORY_ALLOC_FAILED; 2827 goto cleanup_allocation; 2828 } 2829 new_fcport->flags &= ~FCF_FABRIC_DEVICE; 2830 } 2831 2832 /* Base iIDMA settings on HBA port speed. */ 2833 fcport->fp_speed = ha->link_data_rate; 2834 2835 qla2x00_update_fcport(vha, fcport); 2836 2837 found_devs++; 2838 } 2839 2840 cleanup_allocation: 2841 kfree(new_fcport); 2842 2843 if (rval != QLA_SUCCESS) { 2844 ql_dbg(ql_dbg_disc, vha, 0x201d, 2845 "Configure local loop error exit: rval=%x.\n", rval); 2846 } 2847 2848 return (rval); 2849 } 2850 2851 static void 2852 qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) 2853 { 2854 #define LS_UNKNOWN 2 2855 static char *link_speeds[] = { "1", "2", "?", "4", "8", "10" }; 2856 char *link_speed; 2857 int rval; 2858 uint16_t mb[4]; 2859 struct qla_hw_data *ha = vha->hw; 2860 2861 if (!IS_IIDMA_CAPABLE(ha)) 2862 return; 2863 2864 if (atomic_read(&fcport->state) != FCS_ONLINE) 2865 return; 2866 2867 if (fcport->fp_speed == PORT_SPEED_UNKNOWN || 2868 fcport->fp_speed > ha->link_data_rate) 2869 return; 2870 2871 rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed, 2872 mb); 2873 if (rval != QLA_SUCCESS) { 2874 ql_dbg(ql_dbg_disc, vha, 0x2004, 2875 "Unable to adjust iIDMA " 2876 "%02x%02x%02x%02x%02x%02x%02x%02x -- %04x %x %04x " 2877 "%04x.\n", fcport->port_name[0], fcport->port_name[1], 2878 fcport->port_name[2], fcport->port_name[3], 2879 fcport->port_name[4], fcport->port_name[5], 2880 fcport->port_name[6], fcport->port_name[7], rval, 2881 fcport->fp_speed, mb[0], mb[1]); 2882 } else { 2883 link_speed = link_speeds[LS_UNKNOWN]; 2884 if (fcport->fp_speed < 5) 2885 link_speed = link_speeds[fcport->fp_speed]; 2886 else if (fcport->fp_speed == 0x13) 2887 link_speed = link_speeds[5]; 2888 ql_dbg(ql_dbg_disc, vha, 0x2005, 2889 "iIDMA adjusted to %s GB/s " 2890 "on %02x%02x%02x%02x%02x%02x%02x%02x.\n", link_speed, 2891 fcport->port_name[0], fcport->port_name[1], 2892 fcport->port_name[2], fcport->port_name[3], 2893 fcport->port_name[4], fcport->port_name[5], 2894 fcport->port_name[6], fcport->port_name[7]); 2895 } 2896 } 2897 2898 static void 2899 qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport) 2900 { 2901 struct fc_rport_identifiers rport_ids; 2902 struct fc_rport *rport; 2903 unsigned long flags; 2904 2905 qla2x00_rport_del(fcport); 2906 2907 rport_ids.node_name = wwn_to_u64(fcport->node_name); 2908 rport_ids.port_name = wwn_to_u64(fcport->port_name); 2909 rport_ids.port_id = fcport->d_id.b.domain << 16 | 2910 fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa; 2911 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; 2912 fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids); 2913 if (!rport) { 2914 ql_log(ql_log_warn, vha, 0x2006, 2915 "Unable to allocate fc remote port.\n"); 2916 return; 2917 } 2918 spin_lock_irqsave(fcport->vha->host->host_lock, flags); 2919 *((fc_port_t **)rport->dd_data) = fcport; 2920 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags); 2921 2922 rport->supported_classes = fcport->supported_classes; 2923 2924 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; 2925 if (fcport->port_type == FCT_INITIATOR) 2926 rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR; 2927 if (fcport->port_type == FCT_TARGET) 2928 rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET; 2929 fc_remote_port_rolechg(rport, rport_ids.roles); 2930 } 2931 2932 /* 2933 * qla2x00_update_fcport 2934 * Updates device on list. 2935 * 2936 * Input: 2937 * ha = adapter block pointer. 2938 * fcport = port structure pointer. 2939 * 2940 * Return: 2941 * 0 - Success 2942 * BIT_0 - error 2943 * 2944 * Context: 2945 * Kernel context. 2946 */ 2947 void 2948 qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) 2949 { 2950 fcport->vha = vha; 2951 fcport->login_retry = 0; 2952 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 2953 2954 qla2x00_iidma_fcport(vha, fcport); 2955 qla24xx_update_fcport_fcp_prio(vha, fcport); 2956 qla2x00_reg_remote_port(vha, fcport); 2957 qla2x00_set_fcport_state(fcport, FCS_ONLINE); 2958 } 2959 2960 /* 2961 * qla2x00_configure_fabric 2962 * Setup SNS devices with loop ID's. 2963 * 2964 * Input: 2965 * ha = adapter block pointer. 2966 * 2967 * Returns: 2968 * 0 = success. 2969 * BIT_0 = error 2970 */ 2971 static int 2972 qla2x00_configure_fabric(scsi_qla_host_t *vha) 2973 { 2974 int rval, rval2; 2975 fc_port_t *fcport, *fcptemp; 2976 uint16_t next_loopid; 2977 uint16_t mb[MAILBOX_REGISTER_COUNT]; 2978 uint16_t loop_id; 2979 LIST_HEAD(new_fcports); 2980 struct qla_hw_data *ha = vha->hw; 2981 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 2982 2983 /* If FL port exists, then SNS is present */ 2984 if (IS_FWI2_CAPABLE(ha)) 2985 loop_id = NPH_F_PORT; 2986 else 2987 loop_id = SNS_FL_PORT; 2988 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1); 2989 if (rval != QLA_SUCCESS) { 2990 ql_dbg(ql_dbg_disc, vha, 0x201f, 2991 "MBX_GET_PORT_NAME failed, No FL Port.\n"); 2992 2993 vha->device_flags &= ~SWITCH_FOUND; 2994 return (QLA_SUCCESS); 2995 } 2996 vha->device_flags |= SWITCH_FOUND; 2997 2998 /* Mark devices that need re-synchronization. */ 2999 rval2 = qla2x00_device_resync(vha); 3000 if (rval2 == QLA_RSCNS_HANDLED) { 3001 /* No point doing the scan, just continue. */ 3002 return (QLA_SUCCESS); 3003 } 3004 do { 3005 /* FDMI support. */ 3006 if (ql2xfdmienable && 3007 test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags)) 3008 qla2x00_fdmi_register(vha); 3009 3010 /* Ensure we are logged into the SNS. */ 3011 if (IS_FWI2_CAPABLE(ha)) 3012 loop_id = NPH_SNS; 3013 else 3014 loop_id = SIMPLE_NAME_SERVER; 3015 ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff, 3016 0xfc, mb, BIT_1 | BIT_0); 3017 if (mb[0] != MBS_COMMAND_COMPLETE) { 3018 ql_dbg(ql_dbg_disc, vha, 0x2042, 3019 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x " 3020 "mb[6]=%x mb[7]=%x.\n", loop_id, mb[0], mb[1], 3021 mb[2], mb[6], mb[7]); 3022 return (QLA_SUCCESS); 3023 } 3024 3025 if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) { 3026 if (qla2x00_rft_id(vha)) { 3027 /* EMPTY */ 3028 ql_dbg(ql_dbg_disc, vha, 0x2045, 3029 "Register FC-4 TYPE failed.\n"); 3030 } 3031 if (qla2x00_rff_id(vha)) { 3032 /* EMPTY */ 3033 ql_dbg(ql_dbg_disc, vha, 0x2049, 3034 "Register FC-4 Features failed.\n"); 3035 } 3036 if (qla2x00_rnn_id(vha)) { 3037 /* EMPTY */ 3038 ql_dbg(ql_dbg_disc, vha, 0x204f, 3039 "Register Node Name failed.\n"); 3040 } else if (qla2x00_rsnn_nn(vha)) { 3041 /* EMPTY */ 3042 ql_dbg(ql_dbg_disc, vha, 0x2053, 3043 "Register Symobilic Node Name failed.\n"); 3044 } 3045 } 3046 3047 rval = qla2x00_find_all_fabric_devs(vha, &new_fcports); 3048 if (rval != QLA_SUCCESS) 3049 break; 3050 3051 /* 3052 * Logout all previous fabric devices marked lost, except 3053 * FCP2 devices. 3054 */ 3055 list_for_each_entry(fcport, &vha->vp_fcports, list) { 3056 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 3057 break; 3058 3059 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) 3060 continue; 3061 3062 if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) { 3063 qla2x00_mark_device_lost(vha, fcport, 3064 ql2xplogiabsentdevice, 0); 3065 if (fcport->loop_id != FC_NO_LOOP_ID && 3066 (fcport->flags & FCF_FCP2_DEVICE) == 0 && 3067 fcport->port_type != FCT_INITIATOR && 3068 fcport->port_type != FCT_BROADCAST) { 3069 ha->isp_ops->fabric_logout(vha, 3070 fcport->loop_id, 3071 fcport->d_id.b.domain, 3072 fcport->d_id.b.area, 3073 fcport->d_id.b.al_pa); 3074 fcport->loop_id = FC_NO_LOOP_ID; 3075 } 3076 } 3077 } 3078 3079 /* Starting free loop ID. */ 3080 next_loopid = ha->min_external_loopid; 3081 3082 /* 3083 * Scan through our port list and login entries that need to be 3084 * logged in. 3085 */ 3086 list_for_each_entry(fcport, &vha->vp_fcports, list) { 3087 if (atomic_read(&vha->loop_down_timer) || 3088 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 3089 break; 3090 3091 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 || 3092 (fcport->flags & FCF_LOGIN_NEEDED) == 0) 3093 continue; 3094 3095 if (fcport->loop_id == FC_NO_LOOP_ID) { 3096 fcport->loop_id = next_loopid; 3097 rval = qla2x00_find_new_loop_id( 3098 base_vha, fcport); 3099 if (rval != QLA_SUCCESS) { 3100 /* Ran out of IDs to use */ 3101 break; 3102 } 3103 } 3104 /* Login and update database */ 3105 qla2x00_fabric_dev_login(vha, fcport, &next_loopid); 3106 } 3107 3108 /* Exit if out of loop IDs. */ 3109 if (rval != QLA_SUCCESS) { 3110 break; 3111 } 3112 3113 /* 3114 * Login and add the new devices to our port list. 3115 */ 3116 list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) { 3117 if (atomic_read(&vha->loop_down_timer) || 3118 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 3119 break; 3120 3121 /* Find a new loop ID to use. */ 3122 fcport->loop_id = next_loopid; 3123 rval = qla2x00_find_new_loop_id(base_vha, fcport); 3124 if (rval != QLA_SUCCESS) { 3125 /* Ran out of IDs to use */ 3126 break; 3127 } 3128 3129 /* Login and update database */ 3130 qla2x00_fabric_dev_login(vha, fcport, &next_loopid); 3131 3132 if (vha->vp_idx) { 3133 fcport->vha = vha; 3134 fcport->vp_idx = vha->vp_idx; 3135 } 3136 list_move_tail(&fcport->list, &vha->vp_fcports); 3137 } 3138 } while (0); 3139 3140 /* Free all new device structures not processed. */ 3141 list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) { 3142 list_del(&fcport->list); 3143 kfree(fcport); 3144 } 3145 3146 if (rval) { 3147 ql_dbg(ql_dbg_disc, vha, 0x2068, 3148 "Configure fabric error exit rval=%d.\n", rval); 3149 } 3150 3151 return (rval); 3152 } 3153 3154 /* 3155 * qla2x00_find_all_fabric_devs 3156 * 3157 * Input: 3158 * ha = adapter block pointer. 3159 * dev = database device entry pointer. 3160 * 3161 * Returns: 3162 * 0 = success. 3163 * 3164 * Context: 3165 * Kernel context. 3166 */ 3167 static int 3168 qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha, 3169 struct list_head *new_fcports) 3170 { 3171 int rval; 3172 uint16_t loop_id; 3173 fc_port_t *fcport, *new_fcport, *fcptemp; 3174 int found; 3175 3176 sw_info_t *swl; 3177 int swl_idx; 3178 int first_dev, last_dev; 3179 port_id_t wrap = {}, nxt_d_id; 3180 struct qla_hw_data *ha = vha->hw; 3181 struct scsi_qla_host *vp, *base_vha = pci_get_drvdata(ha->pdev); 3182 struct scsi_qla_host *tvp; 3183 3184 rval = QLA_SUCCESS; 3185 3186 /* Try GID_PT to get device list, else GAN. */ 3187 swl = kcalloc(MAX_FIBRE_DEVICES, sizeof(sw_info_t), GFP_KERNEL); 3188 if (!swl) { 3189 /*EMPTY*/ 3190 ql_dbg(ql_dbg_disc, vha, 0x2054, 3191 "GID_PT allocations failed, fallback on GA_NXT.\n"); 3192 } else { 3193 if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) { 3194 kfree(swl); 3195 swl = NULL; 3196 } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) { 3197 kfree(swl); 3198 swl = NULL; 3199 } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) { 3200 kfree(swl); 3201 swl = NULL; 3202 } else if (ql2xiidmaenable && 3203 qla2x00_gfpn_id(vha, swl) == QLA_SUCCESS) { 3204 qla2x00_gpsc(vha, swl); 3205 } 3206 3207 /* If other queries succeeded probe for FC-4 type */ 3208 if (swl) 3209 qla2x00_gff_id(vha, swl); 3210 } 3211 swl_idx = 0; 3212 3213 /* Allocate temporary fcport for any new fcports discovered. */ 3214 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 3215 if (new_fcport == NULL) { 3216 ql_log(ql_log_warn, vha, 0x205e, 3217 "Failed to allocate memory for fcport.\n"); 3218 kfree(swl); 3219 return (QLA_MEMORY_ALLOC_FAILED); 3220 } 3221 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); 3222 /* Set start port ID scan at adapter ID. */ 3223 first_dev = 1; 3224 last_dev = 0; 3225 3226 /* Starting free loop ID. */ 3227 loop_id = ha->min_external_loopid; 3228 for (; loop_id <= ha->max_loop_id; loop_id++) { 3229 if (qla2x00_is_reserved_id(vha, loop_id)) 3230 continue; 3231 3232 if (ha->current_topology == ISP_CFG_FL && 3233 (atomic_read(&vha->loop_down_timer) || 3234 LOOP_TRANSITION(vha))) { 3235 atomic_set(&vha->loop_down_timer, 0); 3236 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 3237 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 3238 break; 3239 } 3240 3241 if (swl != NULL) { 3242 if (last_dev) { 3243 wrap.b24 = new_fcport->d_id.b24; 3244 } else { 3245 new_fcport->d_id.b24 = swl[swl_idx].d_id.b24; 3246 memcpy(new_fcport->node_name, 3247 swl[swl_idx].node_name, WWN_SIZE); 3248 memcpy(new_fcport->port_name, 3249 swl[swl_idx].port_name, WWN_SIZE); 3250 memcpy(new_fcport->fabric_port_name, 3251 swl[swl_idx].fabric_port_name, WWN_SIZE); 3252 new_fcport->fp_speed = swl[swl_idx].fp_speed; 3253 new_fcport->fc4_type = swl[swl_idx].fc4_type; 3254 3255 if (swl[swl_idx].d_id.b.rsvd_1 != 0) { 3256 last_dev = 1; 3257 } 3258 swl_idx++; 3259 } 3260 } else { 3261 /* Send GA_NXT to the switch */ 3262 rval = qla2x00_ga_nxt(vha, new_fcport); 3263 if (rval != QLA_SUCCESS) { 3264 ql_log(ql_log_warn, vha, 0x2064, 3265 "SNS scan failed -- assuming " 3266 "zero-entry result.\n"); 3267 list_for_each_entry_safe(fcport, fcptemp, 3268 new_fcports, list) { 3269 list_del(&fcport->list); 3270 kfree(fcport); 3271 } 3272 rval = QLA_SUCCESS; 3273 break; 3274 } 3275 } 3276 3277 /* If wrap on switch device list, exit. */ 3278 if (first_dev) { 3279 wrap.b24 = new_fcport->d_id.b24; 3280 first_dev = 0; 3281 } else if (new_fcport->d_id.b24 == wrap.b24) { 3282 ql_dbg(ql_dbg_disc, vha, 0x2065, 3283 "Device wrap (%02x%02x%02x).\n", 3284 new_fcport->d_id.b.domain, 3285 new_fcport->d_id.b.area, 3286 new_fcport->d_id.b.al_pa); 3287 break; 3288 } 3289 3290 /* Bypass if same physical adapter. */ 3291 if (new_fcport->d_id.b24 == base_vha->d_id.b24) 3292 continue; 3293 3294 /* Bypass virtual ports of the same host. */ 3295 found = 0; 3296 if (ha->num_vhosts) { 3297 unsigned long flags; 3298 3299 spin_lock_irqsave(&ha->vport_slock, flags); 3300 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) { 3301 if (new_fcport->d_id.b24 == vp->d_id.b24) { 3302 found = 1; 3303 break; 3304 } 3305 } 3306 spin_unlock_irqrestore(&ha->vport_slock, flags); 3307 3308 if (found) 3309 continue; 3310 } 3311 3312 /* Bypass if same domain and area of adapter. */ 3313 if (((new_fcport->d_id.b24 & 0xffff00) == 3314 (vha->d_id.b24 & 0xffff00)) && ha->current_topology == 3315 ISP_CFG_FL) 3316 continue; 3317 3318 /* Bypass reserved domain fields. */ 3319 if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0) 3320 continue; 3321 3322 /* Bypass ports whose FCP-4 type is not FCP_SCSI */ 3323 if (ql2xgffidenable && 3324 (new_fcport->fc4_type != FC4_TYPE_FCP_SCSI && 3325 new_fcport->fc4_type != FC4_TYPE_UNKNOWN)) 3326 continue; 3327 3328 /* Locate matching device in database. */ 3329 found = 0; 3330 list_for_each_entry(fcport, &vha->vp_fcports, list) { 3331 if (memcmp(new_fcport->port_name, fcport->port_name, 3332 WWN_SIZE)) 3333 continue; 3334 3335 found++; 3336 3337 /* Update port state. */ 3338 memcpy(fcport->fabric_port_name, 3339 new_fcport->fabric_port_name, WWN_SIZE); 3340 fcport->fp_speed = new_fcport->fp_speed; 3341 3342 /* 3343 * If address the same and state FCS_ONLINE, nothing 3344 * changed. 3345 */ 3346 if (fcport->d_id.b24 == new_fcport->d_id.b24 && 3347 atomic_read(&fcport->state) == FCS_ONLINE) { 3348 break; 3349 } 3350 3351 /* 3352 * If device was not a fabric device before. 3353 */ 3354 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) { 3355 fcport->d_id.b24 = new_fcport->d_id.b24; 3356 fcport->loop_id = FC_NO_LOOP_ID; 3357 fcport->flags |= (FCF_FABRIC_DEVICE | 3358 FCF_LOGIN_NEEDED); 3359 break; 3360 } 3361 3362 /* 3363 * Port ID changed or device was marked to be updated; 3364 * Log it out if still logged in and mark it for 3365 * relogin later. 3366 */ 3367 fcport->d_id.b24 = new_fcport->d_id.b24; 3368 fcport->flags |= FCF_LOGIN_NEEDED; 3369 if (fcport->loop_id != FC_NO_LOOP_ID && 3370 (fcport->flags & FCF_FCP2_DEVICE) == 0 && 3371 fcport->port_type != FCT_INITIATOR && 3372 fcport->port_type != FCT_BROADCAST) { 3373 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 3374 fcport->d_id.b.domain, fcport->d_id.b.area, 3375 fcport->d_id.b.al_pa); 3376 fcport->loop_id = FC_NO_LOOP_ID; 3377 } 3378 3379 break; 3380 } 3381 3382 if (found) 3383 continue; 3384 /* If device was not in our fcports list, then add it. */ 3385 list_add_tail(&new_fcport->list, new_fcports); 3386 3387 /* Allocate a new replacement fcport. */ 3388 nxt_d_id.b24 = new_fcport->d_id.b24; 3389 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 3390 if (new_fcport == NULL) { 3391 ql_log(ql_log_warn, vha, 0x2066, 3392 "Memory allocation failed for fcport.\n"); 3393 kfree(swl); 3394 return (QLA_MEMORY_ALLOC_FAILED); 3395 } 3396 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); 3397 new_fcport->d_id.b24 = nxt_d_id.b24; 3398 } 3399 3400 kfree(swl); 3401 kfree(new_fcport); 3402 3403 return (rval); 3404 } 3405 3406 /* 3407 * qla2x00_find_new_loop_id 3408 * Scan through our port list and find a new usable loop ID. 3409 * 3410 * Input: 3411 * ha: adapter state pointer. 3412 * dev: port structure pointer. 3413 * 3414 * Returns: 3415 * qla2x00 local function return status code. 3416 * 3417 * Context: 3418 * Kernel context. 3419 */ 3420 int 3421 qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev) 3422 { 3423 int rval; 3424 int found; 3425 fc_port_t *fcport; 3426 uint16_t first_loop_id; 3427 struct qla_hw_data *ha = vha->hw; 3428 struct scsi_qla_host *vp; 3429 struct scsi_qla_host *tvp; 3430 unsigned long flags = 0; 3431 3432 rval = QLA_SUCCESS; 3433 3434 /* Save starting loop ID. */ 3435 first_loop_id = dev->loop_id; 3436 3437 for (;;) { 3438 /* Skip loop ID if already used by adapter. */ 3439 if (dev->loop_id == vha->loop_id) 3440 dev->loop_id++; 3441 3442 /* Skip reserved loop IDs. */ 3443 while (qla2x00_is_reserved_id(vha, dev->loop_id)) 3444 dev->loop_id++; 3445 3446 /* Reset loop ID if passed the end. */ 3447 if (dev->loop_id > ha->max_loop_id) { 3448 /* first loop ID. */ 3449 dev->loop_id = ha->min_external_loopid; 3450 } 3451 3452 /* Check for loop ID being already in use. */ 3453 found = 0; 3454 fcport = NULL; 3455 3456 spin_lock_irqsave(&ha->vport_slock, flags); 3457 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) { 3458 list_for_each_entry(fcport, &vp->vp_fcports, list) { 3459 if (fcport->loop_id == dev->loop_id && 3460 fcport != dev) { 3461 /* ID possibly in use */ 3462 found++; 3463 break; 3464 } 3465 } 3466 if (found) 3467 break; 3468 } 3469 spin_unlock_irqrestore(&ha->vport_slock, flags); 3470 3471 /* If not in use then it is free to use. */ 3472 if (!found) { 3473 break; 3474 } 3475 3476 /* ID in use. Try next value. */ 3477 dev->loop_id++; 3478 3479 /* If wrap around. No free ID to use. */ 3480 if (dev->loop_id == first_loop_id) { 3481 dev->loop_id = FC_NO_LOOP_ID; 3482 rval = QLA_FUNCTION_FAILED; 3483 break; 3484 } 3485 } 3486 3487 return (rval); 3488 } 3489 3490 /* 3491 * qla2x00_device_resync 3492 * Marks devices in the database that needs resynchronization. 3493 * 3494 * Input: 3495 * ha = adapter block pointer. 3496 * 3497 * Context: 3498 * Kernel context. 3499 */ 3500 static int 3501 qla2x00_device_resync(scsi_qla_host_t *vha) 3502 { 3503 int rval; 3504 uint32_t mask; 3505 fc_port_t *fcport; 3506 uint32_t rscn_entry; 3507 uint8_t rscn_out_iter; 3508 uint8_t format; 3509 port_id_t d_id = {}; 3510 3511 rval = QLA_RSCNS_HANDLED; 3512 3513 while (vha->rscn_out_ptr != vha->rscn_in_ptr || 3514 vha->flags.rscn_queue_overflow) { 3515 3516 rscn_entry = vha->rscn_queue[vha->rscn_out_ptr]; 3517 format = MSB(MSW(rscn_entry)); 3518 d_id.b.domain = LSB(MSW(rscn_entry)); 3519 d_id.b.area = MSB(LSW(rscn_entry)); 3520 d_id.b.al_pa = LSB(LSW(rscn_entry)); 3521 3522 ql_dbg(ql_dbg_disc, vha, 0x2020, 3523 "RSCN queue entry[%d] = [%02x/%02x%02x%02x].\n", 3524 vha->rscn_out_ptr, format, d_id.b.domain, d_id.b.area, 3525 d_id.b.al_pa); 3526 3527 vha->rscn_out_ptr++; 3528 if (vha->rscn_out_ptr == MAX_RSCN_COUNT) 3529 vha->rscn_out_ptr = 0; 3530 3531 /* Skip duplicate entries. */ 3532 for (rscn_out_iter = vha->rscn_out_ptr; 3533 !vha->flags.rscn_queue_overflow && 3534 rscn_out_iter != vha->rscn_in_ptr; 3535 rscn_out_iter = (rscn_out_iter == 3536 (MAX_RSCN_COUNT - 1)) ? 0: rscn_out_iter + 1) { 3537 3538 if (rscn_entry != vha->rscn_queue[rscn_out_iter]) 3539 break; 3540 3541 ql_dbg(ql_dbg_disc, vha, 0x2021, 3542 "Skipping duplicate RSCN queue entry found at " 3543 "[%d].\n", rscn_out_iter); 3544 3545 vha->rscn_out_ptr = rscn_out_iter; 3546 } 3547 3548 /* Queue overflow, set switch default case. */ 3549 if (vha->flags.rscn_queue_overflow) { 3550 ql_dbg(ql_dbg_disc, vha, 0x2022, 3551 "device_resync: rscn overflow.\n"); 3552 3553 format = 3; 3554 vha->flags.rscn_queue_overflow = 0; 3555 } 3556 3557 switch (format) { 3558 case 0: 3559 mask = 0xffffff; 3560 break; 3561 case 1: 3562 mask = 0xffff00; 3563 break; 3564 case 2: 3565 mask = 0xff0000; 3566 break; 3567 default: 3568 mask = 0x0; 3569 d_id.b24 = 0; 3570 vha->rscn_out_ptr = vha->rscn_in_ptr; 3571 break; 3572 } 3573 3574 rval = QLA_SUCCESS; 3575 3576 list_for_each_entry(fcport, &vha->vp_fcports, list) { 3577 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 || 3578 (fcport->d_id.b24 & mask) != d_id.b24 || 3579 fcport->port_type == FCT_BROADCAST) 3580 continue; 3581 3582 if (atomic_read(&fcport->state) == FCS_ONLINE) { 3583 if (format != 3 || 3584 fcport->port_type != FCT_INITIATOR) { 3585 qla2x00_mark_device_lost(vha, fcport, 3586 0, 0); 3587 } 3588 } 3589 } 3590 } 3591 return (rval); 3592 } 3593 3594 /* 3595 * qla2x00_fabric_dev_login 3596 * Login fabric target device and update FC port database. 3597 * 3598 * Input: 3599 * ha: adapter state pointer. 3600 * fcport: port structure list pointer. 3601 * next_loopid: contains value of a new loop ID that can be used 3602 * by the next login attempt. 3603 * 3604 * Returns: 3605 * qla2x00 local function return status code. 3606 * 3607 * Context: 3608 * Kernel context. 3609 */ 3610 static int 3611 qla2x00_fabric_dev_login(scsi_qla_host_t *vha, fc_port_t *fcport, 3612 uint16_t *next_loopid) 3613 { 3614 int rval; 3615 int retry; 3616 uint8_t opts; 3617 struct qla_hw_data *ha = vha->hw; 3618 3619 rval = QLA_SUCCESS; 3620 retry = 0; 3621 3622 if (IS_ALOGIO_CAPABLE(ha)) { 3623 if (fcport->flags & FCF_ASYNC_SENT) 3624 return rval; 3625 fcport->flags |= FCF_ASYNC_SENT; 3626 rval = qla2x00_post_async_login_work(vha, fcport, NULL); 3627 if (!rval) 3628 return rval; 3629 } 3630 3631 fcport->flags &= ~FCF_ASYNC_SENT; 3632 rval = qla2x00_fabric_login(vha, fcport, next_loopid); 3633 if (rval == QLA_SUCCESS) { 3634 /* Send an ADISC to FCP2 devices.*/ 3635 opts = 0; 3636 if (fcport->flags & FCF_FCP2_DEVICE) 3637 opts |= BIT_1; 3638 rval = qla2x00_get_port_database(vha, fcport, opts); 3639 if (rval != QLA_SUCCESS) { 3640 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 3641 fcport->d_id.b.domain, fcport->d_id.b.area, 3642 fcport->d_id.b.al_pa); 3643 qla2x00_mark_device_lost(vha, fcport, 1, 0); 3644 } else { 3645 qla2x00_update_fcport(vha, fcport); 3646 } 3647 } 3648 3649 return (rval); 3650 } 3651 3652 /* 3653 * qla2x00_fabric_login 3654 * Issue fabric login command. 3655 * 3656 * Input: 3657 * ha = adapter block pointer. 3658 * device = pointer to FC device type structure. 3659 * 3660 * Returns: 3661 * 0 - Login successfully 3662 * 1 - Login failed 3663 * 2 - Initiator device 3664 * 3 - Fatal error 3665 */ 3666 int 3667 qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport, 3668 uint16_t *next_loopid) 3669 { 3670 int rval; 3671 int retry; 3672 uint16_t tmp_loopid; 3673 uint16_t mb[MAILBOX_REGISTER_COUNT]; 3674 struct qla_hw_data *ha = vha->hw; 3675 3676 retry = 0; 3677 tmp_loopid = 0; 3678 3679 for (;;) { 3680 ql_dbg(ql_dbg_disc, vha, 0x2000, 3681 "Trying Fabric Login w/loop id 0x%04x for port " 3682 "%02x%02x%02x.\n", 3683 fcport->loop_id, fcport->d_id.b.domain, 3684 fcport->d_id.b.area, fcport->d_id.b.al_pa); 3685 3686 /* Login fcport on switch. */ 3687 ha->isp_ops->fabric_login(vha, fcport->loop_id, 3688 fcport->d_id.b.domain, fcport->d_id.b.area, 3689 fcport->d_id.b.al_pa, mb, BIT_0); 3690 if (mb[0] == MBS_PORT_ID_USED) { 3691 /* 3692 * Device has another loop ID. The firmware team 3693 * recommends the driver perform an implicit login with 3694 * the specified ID again. The ID we just used is save 3695 * here so we return with an ID that can be tried by 3696 * the next login. 3697 */ 3698 retry++; 3699 tmp_loopid = fcport->loop_id; 3700 fcport->loop_id = mb[1]; 3701 3702 ql_dbg(ql_dbg_disc, vha, 0x2001, 3703 "Fabric Login: port in use - next loop " 3704 "id=0x%04x, port id= %02x%02x%02x.\n", 3705 fcport->loop_id, fcport->d_id.b.domain, 3706 fcport->d_id.b.area, fcport->d_id.b.al_pa); 3707 3708 } else if (mb[0] == MBS_COMMAND_COMPLETE) { 3709 /* 3710 * Login succeeded. 3711 */ 3712 if (retry) { 3713 /* A retry occurred before. */ 3714 *next_loopid = tmp_loopid; 3715 } else { 3716 /* 3717 * No retry occurred before. Just increment the 3718 * ID value for next login. 3719 */ 3720 *next_loopid = (fcport->loop_id + 1); 3721 } 3722 3723 if (mb[1] & BIT_0) { 3724 fcport->port_type = FCT_INITIATOR; 3725 } else { 3726 fcport->port_type = FCT_TARGET; 3727 if (mb[1] & BIT_1) { 3728 fcport->flags |= FCF_FCP2_DEVICE; 3729 } 3730 } 3731 3732 if (mb[10] & BIT_0) 3733 fcport->supported_classes |= FC_COS_CLASS2; 3734 if (mb[10] & BIT_1) 3735 fcport->supported_classes |= FC_COS_CLASS3; 3736 3737 rval = QLA_SUCCESS; 3738 break; 3739 } else if (mb[0] == MBS_LOOP_ID_USED) { 3740 /* 3741 * Loop ID already used, try next loop ID. 3742 */ 3743 fcport->loop_id++; 3744 rval = qla2x00_find_new_loop_id(vha, fcport); 3745 if (rval != QLA_SUCCESS) { 3746 /* Ran out of loop IDs to use */ 3747 break; 3748 } 3749 } else if (mb[0] == MBS_COMMAND_ERROR) { 3750 /* 3751 * Firmware possibly timed out during login. If NO 3752 * retries are left to do then the device is declared 3753 * dead. 3754 */ 3755 *next_loopid = fcport->loop_id; 3756 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 3757 fcport->d_id.b.domain, fcport->d_id.b.area, 3758 fcport->d_id.b.al_pa); 3759 qla2x00_mark_device_lost(vha, fcport, 1, 0); 3760 3761 rval = 1; 3762 break; 3763 } else { 3764 /* 3765 * unrecoverable / not handled error 3766 */ 3767 ql_dbg(ql_dbg_disc, vha, 0x2002, 3768 "Failed=%x port_id=%02x%02x%02x loop_id=%x " 3769 "jiffies=%lx.\n", mb[0], fcport->d_id.b.domain, 3770 fcport->d_id.b.area, fcport->d_id.b.al_pa, 3771 fcport->loop_id, jiffies); 3772 3773 *next_loopid = fcport->loop_id; 3774 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 3775 fcport->d_id.b.domain, fcport->d_id.b.area, 3776 fcport->d_id.b.al_pa); 3777 fcport->loop_id = FC_NO_LOOP_ID; 3778 fcport->login_retry = 0; 3779 3780 rval = 3; 3781 break; 3782 } 3783 } 3784 3785 return (rval); 3786 } 3787 3788 /* 3789 * qla2x00_local_device_login 3790 * Issue local device login command. 3791 * 3792 * Input: 3793 * ha = adapter block pointer. 3794 * loop_id = loop id of device to login to. 3795 * 3796 * Returns (Where's the #define!!!!): 3797 * 0 - Login successfully 3798 * 1 - Login failed 3799 * 3 - Fatal error 3800 */ 3801 int 3802 qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport) 3803 { 3804 int rval; 3805 uint16_t mb[MAILBOX_REGISTER_COUNT]; 3806 3807 memset(mb, 0, sizeof(mb)); 3808 rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0); 3809 if (rval == QLA_SUCCESS) { 3810 /* Interrogate mailbox registers for any errors */ 3811 if (mb[0] == MBS_COMMAND_ERROR) 3812 rval = 1; 3813 else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR) 3814 /* device not in PCB table */ 3815 rval = 3; 3816 } 3817 3818 return (rval); 3819 } 3820 3821 /* 3822 * qla2x00_loop_resync 3823 * Resync with fibre channel devices. 3824 * 3825 * Input: 3826 * ha = adapter block pointer. 3827 * 3828 * Returns: 3829 * 0 = success 3830 */ 3831 int 3832 qla2x00_loop_resync(scsi_qla_host_t *vha) 3833 { 3834 int rval = QLA_SUCCESS; 3835 uint32_t wait_time; 3836 struct req_que *req; 3837 struct rsp_que *rsp; 3838 3839 if (vha->hw->flags.cpu_affinity_enabled) 3840 req = vha->hw->req_q_map[0]; 3841 else 3842 req = vha->req; 3843 rsp = req->rsp; 3844 3845 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 3846 if (vha->flags.online) { 3847 if (!(rval = qla2x00_fw_ready(vha))) { 3848 /* Wait at most MAX_TARGET RSCNs for a stable link. */ 3849 wait_time = 256; 3850 do { 3851 /* Issue a marker after FW becomes ready. */ 3852 qla2x00_marker(vha, req, rsp, 0, 0, 3853 MK_SYNC_ALL); 3854 vha->marker_needed = 0; 3855 3856 /* Remap devices on Loop. */ 3857 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 3858 3859 qla2x00_configure_loop(vha); 3860 wait_time--; 3861 } while (!atomic_read(&vha->loop_down_timer) && 3862 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) 3863 && wait_time && (test_bit(LOOP_RESYNC_NEEDED, 3864 &vha->dpc_flags))); 3865 } 3866 } 3867 3868 if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) 3869 return (QLA_FUNCTION_FAILED); 3870 3871 if (rval) 3872 ql_dbg(ql_dbg_disc, vha, 0x206c, 3873 "%s *** FAILED ***.\n", __func__); 3874 3875 return (rval); 3876 } 3877 3878 /* 3879 * qla2x00_perform_loop_resync 3880 * Description: This function will set the appropriate flags and call 3881 * qla2x00_loop_resync. If successful loop will be resynced 3882 * Arguments : scsi_qla_host_t pointer 3883 * returm : Success or Failure 3884 */ 3885 3886 int qla2x00_perform_loop_resync(scsi_qla_host_t *ha) 3887 { 3888 int32_t rval = 0; 3889 3890 if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) { 3891 /*Configure the flags so that resync happens properly*/ 3892 atomic_set(&ha->loop_down_timer, 0); 3893 if (!(ha->device_flags & DFLG_NO_CABLE)) { 3894 atomic_set(&ha->loop_state, LOOP_UP); 3895 set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags); 3896 set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags); 3897 set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags); 3898 3899 rval = qla2x00_loop_resync(ha); 3900 } else 3901 atomic_set(&ha->loop_state, LOOP_DEAD); 3902 3903 clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags); 3904 } 3905 3906 return rval; 3907 } 3908 3909 void 3910 qla2x00_update_fcports(scsi_qla_host_t *base_vha) 3911 { 3912 fc_port_t *fcport; 3913 struct scsi_qla_host *vha; 3914 struct qla_hw_data *ha = base_vha->hw; 3915 unsigned long flags; 3916 3917 spin_lock_irqsave(&ha->vport_slock, flags); 3918 /* Go with deferred removal of rport references. */ 3919 list_for_each_entry(vha, &base_vha->hw->vp_list, list) { 3920 atomic_inc(&vha->vref_count); 3921 list_for_each_entry(fcport, &vha->vp_fcports, list) { 3922 if (fcport->drport && 3923 atomic_read(&fcport->state) != FCS_UNCONFIGURED) { 3924 spin_unlock_irqrestore(&ha->vport_slock, flags); 3925 3926 qla2x00_rport_del(fcport); 3927 3928 spin_lock_irqsave(&ha->vport_slock, flags); 3929 } 3930 } 3931 atomic_dec(&vha->vref_count); 3932 } 3933 spin_unlock_irqrestore(&ha->vport_slock, flags); 3934 } 3935 3936 /* 3937 * qla82xx_quiescent_state_cleanup 3938 * Description: This function will block the new I/Os 3939 * Its not aborting any I/Os as context 3940 * is not destroyed during quiescence 3941 * Arguments: scsi_qla_host_t 3942 * return : void 3943 */ 3944 void 3945 qla82xx_quiescent_state_cleanup(scsi_qla_host_t *vha) 3946 { 3947 struct qla_hw_data *ha = vha->hw; 3948 struct scsi_qla_host *vp; 3949 3950 ql_dbg(ql_dbg_p3p, vha, 0xb002, 3951 "Performing ISP error recovery - ha=%p.\n", ha); 3952 3953 atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME); 3954 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 3955 atomic_set(&vha->loop_state, LOOP_DOWN); 3956 qla2x00_mark_all_devices_lost(vha, 0); 3957 list_for_each_entry(vp, &ha->vp_list, list) 3958 qla2x00_mark_all_devices_lost(vha, 0); 3959 } else { 3960 if (!atomic_read(&vha->loop_down_timer)) 3961 atomic_set(&vha->loop_down_timer, 3962 LOOP_DOWN_TIME); 3963 } 3964 /* Wait for pending cmds to complete */ 3965 qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST); 3966 } 3967 3968 void 3969 qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha) 3970 { 3971 struct qla_hw_data *ha = vha->hw; 3972 struct scsi_qla_host *vp; 3973 unsigned long flags; 3974 fc_port_t *fcport; 3975 3976 /* For ISP82XX, driver waits for completion of the commands. 3977 * online flag should be set. 3978 */ 3979 if (!IS_QLA82XX(ha)) 3980 vha->flags.online = 0; 3981 ha->flags.chip_reset_done = 0; 3982 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 3983 ha->qla_stats.total_isp_aborts++; 3984 3985 ql_log(ql_log_info, vha, 0x00af, 3986 "Performing ISP error recovery - ha=%p.\n", ha); 3987 3988 /* For ISP82XX, reset_chip is just disabling interrupts. 3989 * Driver waits for the completion of the commands. 3990 * the interrupts need to be enabled. 3991 */ 3992 if (!IS_QLA82XX(ha)) 3993 ha->isp_ops->reset_chip(vha); 3994 3995 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 3996 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 3997 atomic_set(&vha->loop_state, LOOP_DOWN); 3998 qla2x00_mark_all_devices_lost(vha, 0); 3999 4000 spin_lock_irqsave(&ha->vport_slock, flags); 4001 list_for_each_entry(vp, &ha->vp_list, list) { 4002 atomic_inc(&vp->vref_count); 4003 spin_unlock_irqrestore(&ha->vport_slock, flags); 4004 4005 qla2x00_mark_all_devices_lost(vp, 0); 4006 4007 spin_lock_irqsave(&ha->vport_slock, flags); 4008 atomic_dec(&vp->vref_count); 4009 } 4010 spin_unlock_irqrestore(&ha->vport_slock, flags); 4011 } else { 4012 if (!atomic_read(&vha->loop_down_timer)) 4013 atomic_set(&vha->loop_down_timer, 4014 LOOP_DOWN_TIME); 4015 } 4016 4017 /* Clear all async request states across all VPs. */ 4018 list_for_each_entry(fcport, &vha->vp_fcports, list) 4019 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 4020 spin_lock_irqsave(&ha->vport_slock, flags); 4021 list_for_each_entry(vp, &ha->vp_list, list) { 4022 atomic_inc(&vp->vref_count); 4023 spin_unlock_irqrestore(&ha->vport_slock, flags); 4024 4025 list_for_each_entry(fcport, &vp->vp_fcports, list) 4026 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 4027 4028 spin_lock_irqsave(&ha->vport_slock, flags); 4029 atomic_dec(&vp->vref_count); 4030 } 4031 spin_unlock_irqrestore(&ha->vport_slock, flags); 4032 4033 if (!ha->flags.eeh_busy) { 4034 /* Make sure for ISP 82XX IO DMA is complete */ 4035 if (IS_QLA82XX(ha)) { 4036 qla82xx_chip_reset_cleanup(vha); 4037 ql_log(ql_log_info, vha, 0x00b4, 4038 "Done chip reset cleanup.\n"); 4039 4040 /* Done waiting for pending commands. 4041 * Reset the online flag. 4042 */ 4043 vha->flags.online = 0; 4044 } 4045 4046 /* Requeue all commands in outstanding command list. */ 4047 qla2x00_abort_all_cmds(vha, DID_RESET << 16); 4048 } 4049 } 4050 4051 /* 4052 * qla2x00_abort_isp 4053 * Resets ISP and aborts all outstanding commands. 4054 * 4055 * Input: 4056 * ha = adapter block pointer. 4057 * 4058 * Returns: 4059 * 0 = success 4060 */ 4061 int 4062 qla2x00_abort_isp(scsi_qla_host_t *vha) 4063 { 4064 int rval; 4065 uint8_t status = 0; 4066 struct qla_hw_data *ha = vha->hw; 4067 struct scsi_qla_host *vp; 4068 struct req_que *req = ha->req_q_map[0]; 4069 unsigned long flags; 4070 4071 if (vha->flags.online) { 4072 qla2x00_abort_isp_cleanup(vha); 4073 4074 if (unlikely(pci_channel_offline(ha->pdev) && 4075 ha->flags.pci_channel_io_perm_failure)) { 4076 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 4077 status = 0; 4078 return status; 4079 } 4080 4081 ha->isp_ops->get_flash_version(vha, req->ring); 4082 4083 ha->isp_ops->nvram_config(vha); 4084 4085 if (!qla2x00_restart_isp(vha)) { 4086 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 4087 4088 if (!atomic_read(&vha->loop_down_timer)) { 4089 /* 4090 * Issue marker command only when we are going 4091 * to start the I/O . 4092 */ 4093 vha->marker_needed = 1; 4094 } 4095 4096 vha->flags.online = 1; 4097 4098 ha->isp_ops->enable_intrs(ha); 4099 4100 ha->isp_abort_cnt = 0; 4101 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 4102 4103 if (IS_QLA81XX(ha)) 4104 qla2x00_get_fw_version(vha, 4105 &ha->fw_major_version, 4106 &ha->fw_minor_version, 4107 &ha->fw_subminor_version, 4108 &ha->fw_attributes, &ha->fw_memory_size, 4109 ha->mpi_version, &ha->mpi_capabilities, 4110 ha->phy_version); 4111 4112 if (ha->fce) { 4113 ha->flags.fce_enabled = 1; 4114 memset(ha->fce, 0, 4115 fce_calc_size(ha->fce_bufs)); 4116 rval = qla2x00_enable_fce_trace(vha, 4117 ha->fce_dma, ha->fce_bufs, ha->fce_mb, 4118 &ha->fce_bufs); 4119 if (rval) { 4120 ql_log(ql_log_warn, vha, 0x8033, 4121 "Unable to reinitialize FCE " 4122 "(%d).\n", rval); 4123 ha->flags.fce_enabled = 0; 4124 } 4125 } 4126 4127 if (ha->eft) { 4128 memset(ha->eft, 0, EFT_SIZE); 4129 rval = qla2x00_enable_eft_trace(vha, 4130 ha->eft_dma, EFT_NUM_BUFFERS); 4131 if (rval) { 4132 ql_log(ql_log_warn, vha, 0x8034, 4133 "Unable to reinitialize EFT " 4134 "(%d).\n", rval); 4135 } 4136 } 4137 } else { /* failed the ISP abort */ 4138 vha->flags.online = 1; 4139 if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) { 4140 if (ha->isp_abort_cnt == 0) { 4141 ql_log(ql_log_fatal, vha, 0x8035, 4142 "ISP error recover failed - " 4143 "board disabled.\n"); 4144 /* 4145 * The next call disables the board 4146 * completely. 4147 */ 4148 ha->isp_ops->reset_adapter(vha); 4149 vha->flags.online = 0; 4150 clear_bit(ISP_ABORT_RETRY, 4151 &vha->dpc_flags); 4152 status = 0; 4153 } else { /* schedule another ISP abort */ 4154 ha->isp_abort_cnt--; 4155 ql_dbg(ql_dbg_taskm, vha, 0x8020, 4156 "ISP abort - retry remaining %d.\n", 4157 ha->isp_abort_cnt); 4158 status = 1; 4159 } 4160 } else { 4161 ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT; 4162 ql_dbg(ql_dbg_taskm, vha, 0x8021, 4163 "ISP error recovery - retrying (%d) " 4164 "more times.\n", ha->isp_abort_cnt); 4165 set_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 4166 status = 1; 4167 } 4168 } 4169 4170 } 4171 4172 if (!status) { 4173 ql_dbg(ql_dbg_taskm, vha, 0x8022, "%s succeeded.\n", __func__); 4174 4175 spin_lock_irqsave(&ha->vport_slock, flags); 4176 list_for_each_entry(vp, &ha->vp_list, list) { 4177 if (vp->vp_idx) { 4178 atomic_inc(&vp->vref_count); 4179 spin_unlock_irqrestore(&ha->vport_slock, flags); 4180 4181 qla2x00_vp_abort_isp(vp); 4182 4183 spin_lock_irqsave(&ha->vport_slock, flags); 4184 atomic_dec(&vp->vref_count); 4185 } 4186 } 4187 spin_unlock_irqrestore(&ha->vport_slock, flags); 4188 4189 } else { 4190 ql_log(ql_log_warn, vha, 0x8023, "%s **** FAILED ****.\n"); 4191 } 4192 4193 return(status); 4194 } 4195 4196 /* 4197 * qla2x00_restart_isp 4198 * restarts the ISP after a reset 4199 * 4200 * Input: 4201 * ha = adapter block pointer. 4202 * 4203 * Returns: 4204 * 0 = success 4205 */ 4206 static int 4207 qla2x00_restart_isp(scsi_qla_host_t *vha) 4208 { 4209 int status = 0; 4210 uint32_t wait_time; 4211 struct qla_hw_data *ha = vha->hw; 4212 struct req_que *req = ha->req_q_map[0]; 4213 struct rsp_que *rsp = ha->rsp_q_map[0]; 4214 4215 /* If firmware needs to be loaded */ 4216 if (qla2x00_isp_firmware(vha)) { 4217 vha->flags.online = 0; 4218 status = ha->isp_ops->chip_diag(vha); 4219 if (!status) 4220 status = qla2x00_setup_chip(vha); 4221 } 4222 4223 if (!status && !(status = qla2x00_init_rings(vha))) { 4224 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 4225 ha->flags.chip_reset_done = 1; 4226 /* Initialize the queues in use */ 4227 qla25xx_init_queues(ha); 4228 4229 status = qla2x00_fw_ready(vha); 4230 if (!status) { 4231 ql_dbg(ql_dbg_taskm, vha, 0x8031, 4232 "Start configure loop status = %d.\n", status); 4233 4234 /* Issue a marker after FW becomes ready. */ 4235 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); 4236 4237 vha->flags.online = 1; 4238 /* Wait at most MAX_TARGET RSCNs for a stable link. */ 4239 wait_time = 256; 4240 do { 4241 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 4242 qla2x00_configure_loop(vha); 4243 wait_time--; 4244 } while (!atomic_read(&vha->loop_down_timer) && 4245 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) 4246 && wait_time && (test_bit(LOOP_RESYNC_NEEDED, 4247 &vha->dpc_flags))); 4248 } 4249 4250 /* if no cable then assume it's good */ 4251 if ((vha->device_flags & DFLG_NO_CABLE)) 4252 status = 0; 4253 4254 ql_dbg(ql_dbg_taskm, vha, 0x8032, 4255 "Configure loop done, status = 0x%x.\n", status); 4256 } 4257 return (status); 4258 } 4259 4260 static int 4261 qla25xx_init_queues(struct qla_hw_data *ha) 4262 { 4263 struct rsp_que *rsp = NULL; 4264 struct req_que *req = NULL; 4265 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 4266 int ret = -1; 4267 int i; 4268 4269 for (i = 1; i < ha->max_rsp_queues; i++) { 4270 rsp = ha->rsp_q_map[i]; 4271 if (rsp) { 4272 rsp->options &= ~BIT_0; 4273 ret = qla25xx_init_rsp_que(base_vha, rsp); 4274 if (ret != QLA_SUCCESS) 4275 ql_dbg(ql_dbg_init, base_vha, 0x00ff, 4276 "%s Rsp que: %d init failed.\n", 4277 __func__, rsp->id); 4278 else 4279 ql_dbg(ql_dbg_init, base_vha, 0x0100, 4280 "%s Rsp que: %d inited.\n", 4281 __func__, rsp->id); 4282 } 4283 } 4284 for (i = 1; i < ha->max_req_queues; i++) { 4285 req = ha->req_q_map[i]; 4286 if (req) { 4287 /* Clear outstanding commands array. */ 4288 req->options &= ~BIT_0; 4289 ret = qla25xx_init_req_que(base_vha, req); 4290 if (ret != QLA_SUCCESS) 4291 ql_dbg(ql_dbg_init, base_vha, 0x0101, 4292 "%s Req que: %d init failed.\n", 4293 __func__, req->id); 4294 else 4295 ql_dbg(ql_dbg_init, base_vha, 0x0102, 4296 "%s Req que: %d inited.\n", 4297 __func__, req->id); 4298 } 4299 } 4300 return ret; 4301 } 4302 4303 /* 4304 * qla2x00_reset_adapter 4305 * Reset adapter. 4306 * 4307 * Input: 4308 * ha = adapter block pointer. 4309 */ 4310 void 4311 qla2x00_reset_adapter(scsi_qla_host_t *vha) 4312 { 4313 unsigned long flags = 0; 4314 struct qla_hw_data *ha = vha->hw; 4315 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 4316 4317 vha->flags.online = 0; 4318 ha->isp_ops->disable_intrs(ha); 4319 4320 spin_lock_irqsave(&ha->hardware_lock, flags); 4321 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 4322 RD_REG_WORD(®->hccr); /* PCI Posting. */ 4323 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 4324 RD_REG_WORD(®->hccr); /* PCI Posting. */ 4325 spin_unlock_irqrestore(&ha->hardware_lock, flags); 4326 } 4327 4328 void 4329 qla24xx_reset_adapter(scsi_qla_host_t *vha) 4330 { 4331 unsigned long flags = 0; 4332 struct qla_hw_data *ha = vha->hw; 4333 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 4334 4335 if (IS_QLA82XX(ha)) 4336 return; 4337 4338 vha->flags.online = 0; 4339 ha->isp_ops->disable_intrs(ha); 4340 4341 spin_lock_irqsave(&ha->hardware_lock, flags); 4342 WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET); 4343 RD_REG_DWORD(®->hccr); 4344 WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE); 4345 RD_REG_DWORD(®->hccr); 4346 spin_unlock_irqrestore(&ha->hardware_lock, flags); 4347 4348 if (IS_NOPOLLING_TYPE(ha)) 4349 ha->isp_ops->enable_intrs(ha); 4350 } 4351 4352 /* On sparc systems, obtain port and node WWN from firmware 4353 * properties. 4354 */ 4355 static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, 4356 struct nvram_24xx *nv) 4357 { 4358 #ifdef CONFIG_SPARC 4359 struct qla_hw_data *ha = vha->hw; 4360 struct pci_dev *pdev = ha->pdev; 4361 struct device_node *dp = pci_device_to_OF_node(pdev); 4362 const u8 *val; 4363 int len; 4364 4365 val = of_get_property(dp, "port-wwn", &len); 4366 if (val && len >= WWN_SIZE) 4367 memcpy(nv->port_name, val, WWN_SIZE); 4368 4369 val = of_get_property(dp, "node-wwn", &len); 4370 if (val && len >= WWN_SIZE) 4371 memcpy(nv->node_name, val, WWN_SIZE); 4372 #endif 4373 } 4374 4375 int 4376 qla24xx_nvram_config(scsi_qla_host_t *vha) 4377 { 4378 int rval; 4379 struct init_cb_24xx *icb; 4380 struct nvram_24xx *nv; 4381 uint32_t *dptr; 4382 uint8_t *dptr1, *dptr2; 4383 uint32_t chksum; 4384 uint16_t cnt; 4385 struct qla_hw_data *ha = vha->hw; 4386 4387 rval = QLA_SUCCESS; 4388 icb = (struct init_cb_24xx *)ha->init_cb; 4389 nv = ha->nvram; 4390 4391 /* Determine NVRAM starting address. */ 4392 if (ha->flags.port0) { 4393 ha->nvram_base = FA_NVRAM_FUNC0_ADDR; 4394 ha->vpd_base = FA_NVRAM_VPD0_ADDR; 4395 } else { 4396 ha->nvram_base = FA_NVRAM_FUNC1_ADDR; 4397 ha->vpd_base = FA_NVRAM_VPD1_ADDR; 4398 } 4399 ha->nvram_size = sizeof(struct nvram_24xx); 4400 ha->vpd_size = FA_NVRAM_VPD_SIZE; 4401 if (IS_QLA82XX(ha)) 4402 ha->vpd_size = FA_VPD_SIZE_82XX; 4403 4404 /* Get VPD data into cache */ 4405 ha->vpd = ha->nvram + VPD_OFFSET; 4406 ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd, 4407 ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4); 4408 4409 /* Get NVRAM data into cache and calculate checksum. */ 4410 dptr = (uint32_t *)nv; 4411 ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base, 4412 ha->nvram_size); 4413 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++) 4414 chksum += le32_to_cpu(*dptr++); 4415 4416 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a, 4417 "Contents of NVRAM\n"); 4418 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d, 4419 (uint8_t *)nv, ha->nvram_size); 4420 4421 /* Bad NVRAM data, set defaults parameters. */ 4422 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P' 4423 || nv->id[3] != ' ' || 4424 nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) { 4425 /* Reset NVRAM data. */ 4426 ql_log(ql_log_warn, vha, 0x006b, 4427 "Inconisistent NVRAM detected: checksum=0x%x id=%c " 4428 "version=0x%x.\n", chksum, nv->id[0], nv->nvram_version); 4429 ql_log(ql_log_warn, vha, 0x006c, 4430 "Falling back to functioning (yet invalid -- WWPN) " 4431 "defaults.\n"); 4432 4433 /* 4434 * Set default initialization control block. 4435 */ 4436 memset(nv, 0, ha->nvram_size); 4437 nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION); 4438 nv->version = __constant_cpu_to_le16(ICB_VERSION); 4439 nv->frame_payload_size = __constant_cpu_to_le16(2048); 4440 nv->execution_throttle = __constant_cpu_to_le16(0xFFFF); 4441 nv->exchange_count = __constant_cpu_to_le16(0); 4442 nv->hard_address = __constant_cpu_to_le16(124); 4443 nv->port_name[0] = 0x21; 4444 nv->port_name[1] = 0x00 + ha->port_no; 4445 nv->port_name[2] = 0x00; 4446 nv->port_name[3] = 0xe0; 4447 nv->port_name[4] = 0x8b; 4448 nv->port_name[5] = 0x1c; 4449 nv->port_name[6] = 0x55; 4450 nv->port_name[7] = 0x86; 4451 nv->node_name[0] = 0x20; 4452 nv->node_name[1] = 0x00; 4453 nv->node_name[2] = 0x00; 4454 nv->node_name[3] = 0xe0; 4455 nv->node_name[4] = 0x8b; 4456 nv->node_name[5] = 0x1c; 4457 nv->node_name[6] = 0x55; 4458 nv->node_name[7] = 0x86; 4459 qla24xx_nvram_wwn_from_ofw(vha, nv); 4460 nv->login_retry_count = __constant_cpu_to_le16(8); 4461 nv->interrupt_delay_timer = __constant_cpu_to_le16(0); 4462 nv->login_timeout = __constant_cpu_to_le16(0); 4463 nv->firmware_options_1 = 4464 __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); 4465 nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4); 4466 nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12); 4467 nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13); 4468 nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10); 4469 nv->efi_parameters = __constant_cpu_to_le32(0); 4470 nv->reset_delay = 5; 4471 nv->max_luns_per_target = __constant_cpu_to_le16(128); 4472 nv->port_down_retry_count = __constant_cpu_to_le16(30); 4473 nv->link_down_timeout = __constant_cpu_to_le16(30); 4474 4475 rval = 1; 4476 } 4477 4478 /* Reset Initialization control block */ 4479 memset(icb, 0, ha->init_cb_size); 4480 4481 /* Copy 1st segment. */ 4482 dptr1 = (uint8_t *)icb; 4483 dptr2 = (uint8_t *)&nv->version; 4484 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; 4485 while (cnt--) 4486 *dptr1++ = *dptr2++; 4487 4488 icb->login_retry_count = nv->login_retry_count; 4489 icb->link_down_on_nos = nv->link_down_on_nos; 4490 4491 /* Copy 2nd segment. */ 4492 dptr1 = (uint8_t *)&icb->interrupt_delay_timer; 4493 dptr2 = (uint8_t *)&nv->interrupt_delay_timer; 4494 cnt = (uint8_t *)&icb->reserved_3 - 4495 (uint8_t *)&icb->interrupt_delay_timer; 4496 while (cnt--) 4497 *dptr1++ = *dptr2++; 4498 4499 /* 4500 * Setup driver NVRAM options. 4501 */ 4502 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), 4503 "QLA2462"); 4504 4505 /* Use alternate WWN? */ 4506 if (nv->host_p & __constant_cpu_to_le32(BIT_15)) { 4507 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 4508 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 4509 } 4510 4511 /* Prepare nodename */ 4512 if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) { 4513 /* 4514 * Firmware will apply the following mask if the nodename was 4515 * not provided. 4516 */ 4517 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 4518 icb->node_name[0] &= 0xF0; 4519 } 4520 4521 /* Set host adapter parameters. */ 4522 ha->flags.disable_risc_code_load = 0; 4523 ha->flags.enable_lip_reset = 0; 4524 ha->flags.enable_lip_full_login = 4525 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0; 4526 ha->flags.enable_target_reset = 4527 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0; 4528 ha->flags.enable_led_scheme = 0; 4529 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0; 4530 4531 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & 4532 (BIT_6 | BIT_5 | BIT_4)) >> 4; 4533 4534 memcpy(ha->fw_seriallink_options24, nv->seriallink_options, 4535 sizeof(ha->fw_seriallink_options24)); 4536 4537 /* save HBA serial number */ 4538 ha->serial0 = icb->port_name[5]; 4539 ha->serial1 = icb->port_name[6]; 4540 ha->serial2 = icb->port_name[7]; 4541 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 4542 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 4543 4544 icb->execution_throttle = __constant_cpu_to_le16(0xFFFF); 4545 4546 ha->retry_count = le16_to_cpu(nv->login_retry_count); 4547 4548 /* Set minimum login_timeout to 4 seconds. */ 4549 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) 4550 nv->login_timeout = cpu_to_le16(ql2xlogintimeout); 4551 if (le16_to_cpu(nv->login_timeout) < 4) 4552 nv->login_timeout = __constant_cpu_to_le16(4); 4553 ha->login_timeout = le16_to_cpu(nv->login_timeout); 4554 icb->login_timeout = nv->login_timeout; 4555 4556 /* Set minimum RATOV to 100 tenths of a second. */ 4557 ha->r_a_tov = 100; 4558 4559 ha->loop_reset_delay = nv->reset_delay; 4560 4561 /* Link Down Timeout = 0: 4562 * 4563 * When Port Down timer expires we will start returning 4564 * I/O's to OS with "DID_NO_CONNECT". 4565 * 4566 * Link Down Timeout != 0: 4567 * 4568 * The driver waits for the link to come up after link down 4569 * before returning I/Os to OS with "DID_NO_CONNECT". 4570 */ 4571 if (le16_to_cpu(nv->link_down_timeout) == 0) { 4572 ha->loop_down_abort_time = 4573 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 4574 } else { 4575 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); 4576 ha->loop_down_abort_time = 4577 (LOOP_DOWN_TIME - ha->link_down_timeout); 4578 } 4579 4580 /* Need enough time to try and get the port back. */ 4581 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); 4582 if (qlport_down_retry) 4583 ha->port_down_retry_count = qlport_down_retry; 4584 4585 /* Set login_retry_count */ 4586 ha->login_retry_count = le16_to_cpu(nv->login_retry_count); 4587 if (ha->port_down_retry_count == 4588 le16_to_cpu(nv->port_down_retry_count) && 4589 ha->port_down_retry_count > 3) 4590 ha->login_retry_count = ha->port_down_retry_count; 4591 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 4592 ha->login_retry_count = ha->port_down_retry_count; 4593 if (ql2xloginretrycount) 4594 ha->login_retry_count = ql2xloginretrycount; 4595 4596 /* Enable ZIO. */ 4597 if (!vha->flags.init_done) { 4598 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & 4599 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 4600 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? 4601 le16_to_cpu(icb->interrupt_delay_timer): 2; 4602 } 4603 icb->firmware_options_2 &= __constant_cpu_to_le32( 4604 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); 4605 vha->flags.process_response_queue = 0; 4606 if (ha->zio_mode != QLA_ZIO_DISABLED) { 4607 ha->zio_mode = QLA_ZIO_MODE_6; 4608 4609 ql_log(ql_log_info, vha, 0x006f, 4610 "ZIO mode %d enabled; timer delay (%d us).\n", 4611 ha->zio_mode, ha->zio_timer * 100); 4612 4613 icb->firmware_options_2 |= cpu_to_le32( 4614 (uint32_t)ha->zio_mode); 4615 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); 4616 vha->flags.process_response_queue = 1; 4617 } 4618 4619 if (rval) { 4620 ql_log(ql_log_warn, vha, 0x0070, 4621 "NVRAM configuration failed.\n"); 4622 } 4623 return (rval); 4624 } 4625 4626 static int 4627 qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr, 4628 uint32_t faddr) 4629 { 4630 int rval = QLA_SUCCESS; 4631 int segments, fragment; 4632 uint32_t *dcode, dlen; 4633 uint32_t risc_addr; 4634 uint32_t risc_size; 4635 uint32_t i; 4636 struct qla_hw_data *ha = vha->hw; 4637 struct req_que *req = ha->req_q_map[0]; 4638 4639 ql_dbg(ql_dbg_init, vha, 0x008b, 4640 "Loading firmware from flash (%x).\n", faddr); 4641 4642 rval = QLA_SUCCESS; 4643 4644 segments = FA_RISC_CODE_SEGMENTS; 4645 dcode = (uint32_t *)req->ring; 4646 *srisc_addr = 0; 4647 4648 /* Validate firmware image by checking version. */ 4649 qla24xx_read_flash_data(vha, dcode, faddr + 4, 4); 4650 for (i = 0; i < 4; i++) 4651 dcode[i] = be32_to_cpu(dcode[i]); 4652 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff && 4653 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) || 4654 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 && 4655 dcode[3] == 0)) { 4656 ql_log(ql_log_fatal, vha, 0x008c, 4657 "Unable to verify the integrity of flash firmware " 4658 "image.\n"); 4659 ql_log(ql_log_fatal, vha, 0x008d, 4660 "Firmware data: %08x %08x %08x %08x.\n", 4661 dcode[0], dcode[1], dcode[2], dcode[3]); 4662 4663 return QLA_FUNCTION_FAILED; 4664 } 4665 4666 while (segments && rval == QLA_SUCCESS) { 4667 /* Read segment's load information. */ 4668 qla24xx_read_flash_data(vha, dcode, faddr, 4); 4669 4670 risc_addr = be32_to_cpu(dcode[2]); 4671 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr; 4672 risc_size = be32_to_cpu(dcode[3]); 4673 4674 fragment = 0; 4675 while (risc_size > 0 && rval == QLA_SUCCESS) { 4676 dlen = (uint32_t)(ha->fw_transfer_size >> 2); 4677 if (dlen > risc_size) 4678 dlen = risc_size; 4679 4680 ql_dbg(ql_dbg_init, vha, 0x008e, 4681 "Loading risc segment@ risc addr %x " 4682 "number of dwords 0x%x offset 0x%x.\n", 4683 risc_addr, dlen, faddr); 4684 4685 qla24xx_read_flash_data(vha, dcode, faddr, dlen); 4686 for (i = 0; i < dlen; i++) 4687 dcode[i] = swab32(dcode[i]); 4688 4689 rval = qla2x00_load_ram(vha, req->dma, risc_addr, 4690 dlen); 4691 if (rval) { 4692 ql_log(ql_log_fatal, vha, 0x008f, 4693 "Failed to load segment %d of firmware.\n", 4694 fragment); 4695 break; 4696 } 4697 4698 faddr += dlen; 4699 risc_addr += dlen; 4700 risc_size -= dlen; 4701 fragment++; 4702 } 4703 4704 /* Next segment. */ 4705 segments--; 4706 } 4707 4708 return rval; 4709 } 4710 4711 #define QLA_FW_URL "ftp://ftp.qlogic.com/outgoing/linux/firmware/" 4712 4713 int 4714 qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 4715 { 4716 int rval; 4717 int i, fragment; 4718 uint16_t *wcode, *fwcode; 4719 uint32_t risc_addr, risc_size, fwclen, wlen, *seg; 4720 struct fw_blob *blob; 4721 struct qla_hw_data *ha = vha->hw; 4722 struct req_que *req = ha->req_q_map[0]; 4723 4724 /* Load firmware blob. */ 4725 blob = qla2x00_request_firmware(vha); 4726 if (!blob) { 4727 ql_log(ql_log_info, vha, 0x0083, 4728 "Fimware image unavailable.\n"); 4729 ql_log(ql_log_info, vha, 0x0084, 4730 "Firmware images can be retrieved from: "QLA_FW_URL ".\n"); 4731 return QLA_FUNCTION_FAILED; 4732 } 4733 4734 rval = QLA_SUCCESS; 4735 4736 wcode = (uint16_t *)req->ring; 4737 *srisc_addr = 0; 4738 fwcode = (uint16_t *)blob->fw->data; 4739 fwclen = 0; 4740 4741 /* Validate firmware image by checking version. */ 4742 if (blob->fw->size < 8 * sizeof(uint16_t)) { 4743 ql_log(ql_log_fatal, vha, 0x0085, 4744 "Unable to verify integrity of firmware image (%Zd).\n", 4745 blob->fw->size); 4746 goto fail_fw_integrity; 4747 } 4748 for (i = 0; i < 4; i++) 4749 wcode[i] = be16_to_cpu(fwcode[i + 4]); 4750 if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff && 4751 wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 && 4752 wcode[2] == 0 && wcode[3] == 0)) { 4753 ql_log(ql_log_fatal, vha, 0x0086, 4754 "Unable to verify integrity of firmware image.\n"); 4755 ql_log(ql_log_fatal, vha, 0x0087, 4756 "Firmware data: %04x %04x %04x %04x.\n", 4757 wcode[0], wcode[1], wcode[2], wcode[3]); 4758 goto fail_fw_integrity; 4759 } 4760 4761 seg = blob->segs; 4762 while (*seg && rval == QLA_SUCCESS) { 4763 risc_addr = *seg; 4764 *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr; 4765 risc_size = be16_to_cpu(fwcode[3]); 4766 4767 /* Validate firmware image size. */ 4768 fwclen += risc_size * sizeof(uint16_t); 4769 if (blob->fw->size < fwclen) { 4770 ql_log(ql_log_fatal, vha, 0x0088, 4771 "Unable to verify integrity of firmware image " 4772 "(%Zd).\n", blob->fw->size); 4773 goto fail_fw_integrity; 4774 } 4775 4776 fragment = 0; 4777 while (risc_size > 0 && rval == QLA_SUCCESS) { 4778 wlen = (uint16_t)(ha->fw_transfer_size >> 1); 4779 if (wlen > risc_size) 4780 wlen = risc_size; 4781 ql_dbg(ql_dbg_init, vha, 0x0089, 4782 "Loading risc segment@ risc addr %x number of " 4783 "words 0x%x.\n", risc_addr, wlen); 4784 4785 for (i = 0; i < wlen; i++) 4786 wcode[i] = swab16(fwcode[i]); 4787 4788 rval = qla2x00_load_ram(vha, req->dma, risc_addr, 4789 wlen); 4790 if (rval) { 4791 ql_log(ql_log_fatal, vha, 0x008a, 4792 "Failed to load segment %d of firmware.\n", 4793 fragment); 4794 break; 4795 } 4796 4797 fwcode += wlen; 4798 risc_addr += wlen; 4799 risc_size -= wlen; 4800 fragment++; 4801 } 4802 4803 /* Next segment. */ 4804 seg++; 4805 } 4806 return rval; 4807 4808 fail_fw_integrity: 4809 return QLA_FUNCTION_FAILED; 4810 } 4811 4812 static int 4813 qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr) 4814 { 4815 int rval; 4816 int segments, fragment; 4817 uint32_t *dcode, dlen; 4818 uint32_t risc_addr; 4819 uint32_t risc_size; 4820 uint32_t i; 4821 struct fw_blob *blob; 4822 uint32_t *fwcode, fwclen; 4823 struct qla_hw_data *ha = vha->hw; 4824 struct req_que *req = ha->req_q_map[0]; 4825 4826 /* Load firmware blob. */ 4827 blob = qla2x00_request_firmware(vha); 4828 if (!blob) { 4829 ql_log(ql_log_warn, vha, 0x0090, 4830 "Fimware image unavailable.\n"); 4831 ql_log(ql_log_warn, vha, 0x0091, 4832 "Firmware images can be retrieved from: " 4833 QLA_FW_URL ".\n"); 4834 4835 return QLA_FUNCTION_FAILED; 4836 } 4837 4838 ql_log(ql_log_info, vha, 0x0092, 4839 "Loading via request-firmware.\n"); 4840 4841 rval = QLA_SUCCESS; 4842 4843 segments = FA_RISC_CODE_SEGMENTS; 4844 dcode = (uint32_t *)req->ring; 4845 *srisc_addr = 0; 4846 fwcode = (uint32_t *)blob->fw->data; 4847 fwclen = 0; 4848 4849 /* Validate firmware image by checking version. */ 4850 if (blob->fw->size < 8 * sizeof(uint32_t)) { 4851 ql_log(ql_log_fatal, vha, 0x0093, 4852 "Unable to verify integrity of firmware image (%Zd).\n", 4853 blob->fw->size); 4854 goto fail_fw_integrity; 4855 } 4856 for (i = 0; i < 4; i++) 4857 dcode[i] = be32_to_cpu(fwcode[i + 4]); 4858 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff && 4859 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) || 4860 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 && 4861 dcode[3] == 0)) { 4862 ql_log(ql_log_fatal, vha, 0x0094, 4863 "Unable to verify integrity of firmware image (%Zd).\n", 4864 blob->fw->size); 4865 ql_log(ql_log_fatal, vha, 0x0095, 4866 "Firmware data: %08x %08x %08x %08x.\n", 4867 dcode[0], dcode[1], dcode[2], dcode[3]); 4868 goto fail_fw_integrity; 4869 } 4870 4871 while (segments && rval == QLA_SUCCESS) { 4872 risc_addr = be32_to_cpu(fwcode[2]); 4873 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr; 4874 risc_size = be32_to_cpu(fwcode[3]); 4875 4876 /* Validate firmware image size. */ 4877 fwclen += risc_size * sizeof(uint32_t); 4878 if (blob->fw->size < fwclen) { 4879 ql_log(ql_log_fatal, vha, 0x0096, 4880 "Unable to verify integrity of firmware image " 4881 "(%Zd).\n", blob->fw->size); 4882 4883 goto fail_fw_integrity; 4884 } 4885 4886 fragment = 0; 4887 while (risc_size > 0 && rval == QLA_SUCCESS) { 4888 dlen = (uint32_t)(ha->fw_transfer_size >> 2); 4889 if (dlen > risc_size) 4890 dlen = risc_size; 4891 4892 ql_dbg(ql_dbg_init, vha, 0x0097, 4893 "Loading risc segment@ risc addr %x " 4894 "number of dwords 0x%x.\n", risc_addr, dlen); 4895 4896 for (i = 0; i < dlen; i++) 4897 dcode[i] = swab32(fwcode[i]); 4898 4899 rval = qla2x00_load_ram(vha, req->dma, risc_addr, 4900 dlen); 4901 if (rval) { 4902 ql_log(ql_log_fatal, vha, 0x0098, 4903 "Failed to load segment %d of firmware.\n", 4904 fragment); 4905 break; 4906 } 4907 4908 fwcode += dlen; 4909 risc_addr += dlen; 4910 risc_size -= dlen; 4911 fragment++; 4912 } 4913 4914 /* Next segment. */ 4915 segments--; 4916 } 4917 return rval; 4918 4919 fail_fw_integrity: 4920 return QLA_FUNCTION_FAILED; 4921 } 4922 4923 int 4924 qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 4925 { 4926 int rval; 4927 4928 if (ql2xfwloadbin == 1) 4929 return qla81xx_load_risc(vha, srisc_addr); 4930 4931 /* 4932 * FW Load priority: 4933 * 1) Firmware via request-firmware interface (.bin file). 4934 * 2) Firmware residing in flash. 4935 */ 4936 rval = qla24xx_load_risc_blob(vha, srisc_addr); 4937 if (rval == QLA_SUCCESS) 4938 return rval; 4939 4940 return qla24xx_load_risc_flash(vha, srisc_addr, 4941 vha->hw->flt_region_fw); 4942 } 4943 4944 int 4945 qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 4946 { 4947 int rval; 4948 struct qla_hw_data *ha = vha->hw; 4949 4950 if (ql2xfwloadbin == 2) 4951 goto try_blob_fw; 4952 4953 /* 4954 * FW Load priority: 4955 * 1) Firmware residing in flash. 4956 * 2) Firmware via request-firmware interface (.bin file). 4957 * 3) Golden-Firmware residing in flash -- limited operation. 4958 */ 4959 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw); 4960 if (rval == QLA_SUCCESS) 4961 return rval; 4962 4963 try_blob_fw: 4964 rval = qla24xx_load_risc_blob(vha, srisc_addr); 4965 if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw) 4966 return rval; 4967 4968 ql_log(ql_log_info, vha, 0x0099, 4969 "Attempting to fallback to golden firmware.\n"); 4970 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw); 4971 if (rval != QLA_SUCCESS) 4972 return rval; 4973 4974 ql_log(ql_log_info, vha, 0x009a, "Update operational firmware.\n"); 4975 ha->flags.running_gold_fw = 1; 4976 4977 return rval; 4978 } 4979 4980 void 4981 qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha) 4982 { 4983 int ret, retries; 4984 struct qla_hw_data *ha = vha->hw; 4985 4986 if (ha->flags.pci_channel_io_perm_failure) 4987 return; 4988 if (!IS_FWI2_CAPABLE(ha)) 4989 return; 4990 if (!ha->fw_major_version) 4991 return; 4992 4993 ret = qla2x00_stop_firmware(vha); 4994 for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT && 4995 ret != QLA_INVALID_COMMAND && retries ; retries--) { 4996 ha->isp_ops->reset_chip(vha); 4997 if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS) 4998 continue; 4999 if (qla2x00_setup_chip(vha) != QLA_SUCCESS) 5000 continue; 5001 ql_log(ql_log_info, vha, 0x8015, 5002 "Attempting retry of stop-firmware command.\n"); 5003 ret = qla2x00_stop_firmware(vha); 5004 } 5005 } 5006 5007 int 5008 qla24xx_configure_vhba(scsi_qla_host_t *vha) 5009 { 5010 int rval = QLA_SUCCESS; 5011 uint16_t mb[MAILBOX_REGISTER_COUNT]; 5012 struct qla_hw_data *ha = vha->hw; 5013 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 5014 struct req_que *req; 5015 struct rsp_que *rsp; 5016 5017 if (!vha->vp_idx) 5018 return -EINVAL; 5019 5020 rval = qla2x00_fw_ready(base_vha); 5021 if (ha->flags.cpu_affinity_enabled) 5022 req = ha->req_q_map[0]; 5023 else 5024 req = vha->req; 5025 rsp = req->rsp; 5026 5027 if (rval == QLA_SUCCESS) { 5028 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 5029 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); 5030 } 5031 5032 vha->flags.management_server_logged_in = 0; 5033 5034 /* Login to SNS first */ 5035 ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, BIT_1); 5036 if (mb[0] != MBS_COMMAND_COMPLETE) { 5037 ql_dbg(ql_dbg_init, vha, 0x0103, 5038 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x " 5039 "mb[6]=%x mb[7]=%x.\n", 5040 NPH_SNS, mb[0], mb[1], mb[2], mb[6], mb[7]); 5041 return (QLA_FUNCTION_FAILED); 5042 } 5043 5044 atomic_set(&vha->loop_down_timer, 0); 5045 atomic_set(&vha->loop_state, LOOP_UP); 5046 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5047 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 5048 rval = qla2x00_loop_resync(base_vha); 5049 5050 return rval; 5051 } 5052 5053 /* 84XX Support **************************************************************/ 5054 5055 static LIST_HEAD(qla_cs84xx_list); 5056 static DEFINE_MUTEX(qla_cs84xx_mutex); 5057 5058 static struct qla_chip_state_84xx * 5059 qla84xx_get_chip(struct scsi_qla_host *vha) 5060 { 5061 struct qla_chip_state_84xx *cs84xx; 5062 struct qla_hw_data *ha = vha->hw; 5063 5064 mutex_lock(&qla_cs84xx_mutex); 5065 5066 /* Find any shared 84xx chip. */ 5067 list_for_each_entry(cs84xx, &qla_cs84xx_list, list) { 5068 if (cs84xx->bus == ha->pdev->bus) { 5069 kref_get(&cs84xx->kref); 5070 goto done; 5071 } 5072 } 5073 5074 cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL); 5075 if (!cs84xx) 5076 goto done; 5077 5078 kref_init(&cs84xx->kref); 5079 spin_lock_init(&cs84xx->access_lock); 5080 mutex_init(&cs84xx->fw_update_mutex); 5081 cs84xx->bus = ha->pdev->bus; 5082 5083 list_add_tail(&cs84xx->list, &qla_cs84xx_list); 5084 done: 5085 mutex_unlock(&qla_cs84xx_mutex); 5086 return cs84xx; 5087 } 5088 5089 static void 5090 __qla84xx_chip_release(struct kref *kref) 5091 { 5092 struct qla_chip_state_84xx *cs84xx = 5093 container_of(kref, struct qla_chip_state_84xx, kref); 5094 5095 mutex_lock(&qla_cs84xx_mutex); 5096 list_del(&cs84xx->list); 5097 mutex_unlock(&qla_cs84xx_mutex); 5098 kfree(cs84xx); 5099 } 5100 5101 void 5102 qla84xx_put_chip(struct scsi_qla_host *vha) 5103 { 5104 struct qla_hw_data *ha = vha->hw; 5105 if (ha->cs84xx) 5106 kref_put(&ha->cs84xx->kref, __qla84xx_chip_release); 5107 } 5108 5109 static int 5110 qla84xx_init_chip(scsi_qla_host_t *vha) 5111 { 5112 int rval; 5113 uint16_t status[2]; 5114 struct qla_hw_data *ha = vha->hw; 5115 5116 mutex_lock(&ha->cs84xx->fw_update_mutex); 5117 5118 rval = qla84xx_verify_chip(vha, status); 5119 5120 mutex_unlock(&ha->cs84xx->fw_update_mutex); 5121 5122 return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED: 5123 QLA_SUCCESS; 5124 } 5125 5126 /* 81XX Support **************************************************************/ 5127 5128 int 5129 qla81xx_nvram_config(scsi_qla_host_t *vha) 5130 { 5131 int rval; 5132 struct init_cb_81xx *icb; 5133 struct nvram_81xx *nv; 5134 uint32_t *dptr; 5135 uint8_t *dptr1, *dptr2; 5136 uint32_t chksum; 5137 uint16_t cnt; 5138 struct qla_hw_data *ha = vha->hw; 5139 5140 rval = QLA_SUCCESS; 5141 icb = (struct init_cb_81xx *)ha->init_cb; 5142 nv = ha->nvram; 5143 5144 /* Determine NVRAM starting address. */ 5145 ha->nvram_size = sizeof(struct nvram_81xx); 5146 ha->vpd_size = FA_NVRAM_VPD_SIZE; 5147 5148 /* Get VPD data into cache */ 5149 ha->vpd = ha->nvram + VPD_OFFSET; 5150 ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2, 5151 ha->vpd_size); 5152 5153 /* Get NVRAM data into cache and calculate checksum. */ 5154 ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2, 5155 ha->nvram_size); 5156 dptr = (uint32_t *)nv; 5157 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++) 5158 chksum += le32_to_cpu(*dptr++); 5159 5160 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111, 5161 "Contents of NVRAM:\n"); 5162 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112, 5163 (uint8_t *)nv, ha->nvram_size); 5164 5165 /* Bad NVRAM data, set defaults parameters. */ 5166 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P' 5167 || nv->id[3] != ' ' || 5168 nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) { 5169 /* Reset NVRAM data. */ 5170 ql_log(ql_log_info, vha, 0x0073, 5171 "Inconisistent NVRAM detected: checksum=0x%x id=%c " 5172 "version=0x%x.\n", chksum, nv->id[0], 5173 le16_to_cpu(nv->nvram_version)); 5174 ql_log(ql_log_info, vha, 0x0074, 5175 "Falling back to functioning (yet invalid -- WWPN) " 5176 "defaults.\n"); 5177 5178 /* 5179 * Set default initialization control block. 5180 */ 5181 memset(nv, 0, ha->nvram_size); 5182 nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION); 5183 nv->version = __constant_cpu_to_le16(ICB_VERSION); 5184 nv->frame_payload_size = __constant_cpu_to_le16(2048); 5185 nv->execution_throttle = __constant_cpu_to_le16(0xFFFF); 5186 nv->exchange_count = __constant_cpu_to_le16(0); 5187 nv->port_name[0] = 0x21; 5188 nv->port_name[1] = 0x00 + ha->port_no; 5189 nv->port_name[2] = 0x00; 5190 nv->port_name[3] = 0xe0; 5191 nv->port_name[4] = 0x8b; 5192 nv->port_name[5] = 0x1c; 5193 nv->port_name[6] = 0x55; 5194 nv->port_name[7] = 0x86; 5195 nv->node_name[0] = 0x20; 5196 nv->node_name[1] = 0x00; 5197 nv->node_name[2] = 0x00; 5198 nv->node_name[3] = 0xe0; 5199 nv->node_name[4] = 0x8b; 5200 nv->node_name[5] = 0x1c; 5201 nv->node_name[6] = 0x55; 5202 nv->node_name[7] = 0x86; 5203 nv->login_retry_count = __constant_cpu_to_le16(8); 5204 nv->interrupt_delay_timer = __constant_cpu_to_le16(0); 5205 nv->login_timeout = __constant_cpu_to_le16(0); 5206 nv->firmware_options_1 = 5207 __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); 5208 nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4); 5209 nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12); 5210 nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13); 5211 nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10); 5212 nv->efi_parameters = __constant_cpu_to_le32(0); 5213 nv->reset_delay = 5; 5214 nv->max_luns_per_target = __constant_cpu_to_le16(128); 5215 nv->port_down_retry_count = __constant_cpu_to_le16(30); 5216 nv->link_down_timeout = __constant_cpu_to_le16(30); 5217 nv->enode_mac[0] = 0x00; 5218 nv->enode_mac[1] = 0x02; 5219 nv->enode_mac[2] = 0x03; 5220 nv->enode_mac[3] = 0x04; 5221 nv->enode_mac[4] = 0x05; 5222 nv->enode_mac[5] = 0x06 + ha->port_no; 5223 5224 rval = 1; 5225 } 5226 5227 /* Reset Initialization control block */ 5228 memset(icb, 0, ha->init_cb_size); 5229 5230 /* Copy 1st segment. */ 5231 dptr1 = (uint8_t *)icb; 5232 dptr2 = (uint8_t *)&nv->version; 5233 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; 5234 while (cnt--) 5235 *dptr1++ = *dptr2++; 5236 5237 icb->login_retry_count = nv->login_retry_count; 5238 5239 /* Copy 2nd segment. */ 5240 dptr1 = (uint8_t *)&icb->interrupt_delay_timer; 5241 dptr2 = (uint8_t *)&nv->interrupt_delay_timer; 5242 cnt = (uint8_t *)&icb->reserved_5 - 5243 (uint8_t *)&icb->interrupt_delay_timer; 5244 while (cnt--) 5245 *dptr1++ = *dptr2++; 5246 5247 memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac)); 5248 /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */ 5249 if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) { 5250 icb->enode_mac[0] = 0x01; 5251 icb->enode_mac[1] = 0x02; 5252 icb->enode_mac[2] = 0x03; 5253 icb->enode_mac[3] = 0x04; 5254 icb->enode_mac[4] = 0x05; 5255 icb->enode_mac[5] = 0x06 + ha->port_no; 5256 } 5257 5258 /* Use extended-initialization control block. */ 5259 memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb)); 5260 5261 /* 5262 * Setup driver NVRAM options. 5263 */ 5264 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), 5265 "QLE8XXX"); 5266 5267 /* Use alternate WWN? */ 5268 if (nv->host_p & __constant_cpu_to_le32(BIT_15)) { 5269 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 5270 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 5271 } 5272 5273 /* Prepare nodename */ 5274 if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) { 5275 /* 5276 * Firmware will apply the following mask if the nodename was 5277 * not provided. 5278 */ 5279 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 5280 icb->node_name[0] &= 0xF0; 5281 } 5282 5283 /* Set host adapter parameters. */ 5284 ha->flags.disable_risc_code_load = 0; 5285 ha->flags.enable_lip_reset = 0; 5286 ha->flags.enable_lip_full_login = 5287 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0; 5288 ha->flags.enable_target_reset = 5289 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0; 5290 ha->flags.enable_led_scheme = 0; 5291 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0; 5292 5293 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & 5294 (BIT_6 | BIT_5 | BIT_4)) >> 4; 5295 5296 /* save HBA serial number */ 5297 ha->serial0 = icb->port_name[5]; 5298 ha->serial1 = icb->port_name[6]; 5299 ha->serial2 = icb->port_name[7]; 5300 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 5301 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 5302 5303 icb->execution_throttle = __constant_cpu_to_le16(0xFFFF); 5304 5305 ha->retry_count = le16_to_cpu(nv->login_retry_count); 5306 5307 /* Set minimum login_timeout to 4 seconds. */ 5308 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) 5309 nv->login_timeout = cpu_to_le16(ql2xlogintimeout); 5310 if (le16_to_cpu(nv->login_timeout) < 4) 5311 nv->login_timeout = __constant_cpu_to_le16(4); 5312 ha->login_timeout = le16_to_cpu(nv->login_timeout); 5313 icb->login_timeout = nv->login_timeout; 5314 5315 /* Set minimum RATOV to 100 tenths of a second. */ 5316 ha->r_a_tov = 100; 5317 5318 ha->loop_reset_delay = nv->reset_delay; 5319 5320 /* Link Down Timeout = 0: 5321 * 5322 * When Port Down timer expires we will start returning 5323 * I/O's to OS with "DID_NO_CONNECT". 5324 * 5325 * Link Down Timeout != 0: 5326 * 5327 * The driver waits for the link to come up after link down 5328 * before returning I/Os to OS with "DID_NO_CONNECT". 5329 */ 5330 if (le16_to_cpu(nv->link_down_timeout) == 0) { 5331 ha->loop_down_abort_time = 5332 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 5333 } else { 5334 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); 5335 ha->loop_down_abort_time = 5336 (LOOP_DOWN_TIME - ha->link_down_timeout); 5337 } 5338 5339 /* Need enough time to try and get the port back. */ 5340 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); 5341 if (qlport_down_retry) 5342 ha->port_down_retry_count = qlport_down_retry; 5343 5344 /* Set login_retry_count */ 5345 ha->login_retry_count = le16_to_cpu(nv->login_retry_count); 5346 if (ha->port_down_retry_count == 5347 le16_to_cpu(nv->port_down_retry_count) && 5348 ha->port_down_retry_count > 3) 5349 ha->login_retry_count = ha->port_down_retry_count; 5350 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 5351 ha->login_retry_count = ha->port_down_retry_count; 5352 if (ql2xloginretrycount) 5353 ha->login_retry_count = ql2xloginretrycount; 5354 5355 /* Enable ZIO. */ 5356 if (!vha->flags.init_done) { 5357 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & 5358 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 5359 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? 5360 le16_to_cpu(icb->interrupt_delay_timer): 2; 5361 } 5362 icb->firmware_options_2 &= __constant_cpu_to_le32( 5363 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); 5364 vha->flags.process_response_queue = 0; 5365 if (ha->zio_mode != QLA_ZIO_DISABLED) { 5366 ha->zio_mode = QLA_ZIO_MODE_6; 5367 5368 ql_log(ql_log_info, vha, 0x0075, 5369 "ZIO mode %d enabled; timer delay (%d us).\n", 5370 ha->zio_mode, 5371 ha->zio_timer * 100); 5372 5373 icb->firmware_options_2 |= cpu_to_le32( 5374 (uint32_t)ha->zio_mode); 5375 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); 5376 vha->flags.process_response_queue = 1; 5377 } 5378 5379 if (rval) { 5380 ql_log(ql_log_warn, vha, 0x0076, 5381 "NVRAM configuration failed.\n"); 5382 } 5383 return (rval); 5384 } 5385 5386 int 5387 qla82xx_restart_isp(scsi_qla_host_t *vha) 5388 { 5389 int status, rval; 5390 uint32_t wait_time; 5391 struct qla_hw_data *ha = vha->hw; 5392 struct req_que *req = ha->req_q_map[0]; 5393 struct rsp_que *rsp = ha->rsp_q_map[0]; 5394 struct scsi_qla_host *vp; 5395 unsigned long flags; 5396 5397 status = qla2x00_init_rings(vha); 5398 if (!status) { 5399 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 5400 ha->flags.chip_reset_done = 1; 5401 5402 status = qla2x00_fw_ready(vha); 5403 if (!status) { 5404 ql_log(ql_log_info, vha, 0x803c, 5405 "Start configure loop, status =%d.\n", status); 5406 5407 /* Issue a marker after FW becomes ready. */ 5408 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); 5409 5410 vha->flags.online = 1; 5411 /* Wait at most MAX_TARGET RSCNs for a stable link. */ 5412 wait_time = 256; 5413 do { 5414 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5415 qla2x00_configure_loop(vha); 5416 wait_time--; 5417 } while (!atomic_read(&vha->loop_down_timer) && 5418 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) && 5419 wait_time && 5420 (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))); 5421 } 5422 5423 /* if no cable then assume it's good */ 5424 if ((vha->device_flags & DFLG_NO_CABLE)) 5425 status = 0; 5426 5427 ql_log(ql_log_info, vha, 0x803d, 5428 "Configure loop done, status = 0x%x.\n", status); 5429 } 5430 5431 if (!status) { 5432 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 5433 5434 if (!atomic_read(&vha->loop_down_timer)) { 5435 /* 5436 * Issue marker command only when we are going 5437 * to start the I/O . 5438 */ 5439 vha->marker_needed = 1; 5440 } 5441 5442 vha->flags.online = 1; 5443 5444 ha->isp_ops->enable_intrs(ha); 5445 5446 ha->isp_abort_cnt = 0; 5447 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 5448 5449 /* Update the firmware version */ 5450 status = qla82xx_check_md_needed(vha); 5451 5452 if (ha->fce) { 5453 ha->flags.fce_enabled = 1; 5454 memset(ha->fce, 0, 5455 fce_calc_size(ha->fce_bufs)); 5456 rval = qla2x00_enable_fce_trace(vha, 5457 ha->fce_dma, ha->fce_bufs, ha->fce_mb, 5458 &ha->fce_bufs); 5459 if (rval) { 5460 ql_log(ql_log_warn, vha, 0x803e, 5461 "Unable to reinitialize FCE (%d).\n", 5462 rval); 5463 ha->flags.fce_enabled = 0; 5464 } 5465 } 5466 5467 if (ha->eft) { 5468 memset(ha->eft, 0, EFT_SIZE); 5469 rval = qla2x00_enable_eft_trace(vha, 5470 ha->eft_dma, EFT_NUM_BUFFERS); 5471 if (rval) { 5472 ql_log(ql_log_warn, vha, 0x803f, 5473 "Unable to reinitialize EFT (%d).\n", 5474 rval); 5475 } 5476 } 5477 } 5478 5479 if (!status) { 5480 ql_dbg(ql_dbg_taskm, vha, 0x8040, 5481 "qla82xx_restart_isp succeeded.\n"); 5482 5483 spin_lock_irqsave(&ha->vport_slock, flags); 5484 list_for_each_entry(vp, &ha->vp_list, list) { 5485 if (vp->vp_idx) { 5486 atomic_inc(&vp->vref_count); 5487 spin_unlock_irqrestore(&ha->vport_slock, flags); 5488 5489 qla2x00_vp_abort_isp(vp); 5490 5491 spin_lock_irqsave(&ha->vport_slock, flags); 5492 atomic_dec(&vp->vref_count); 5493 } 5494 } 5495 spin_unlock_irqrestore(&ha->vport_slock, flags); 5496 5497 } else { 5498 ql_log(ql_log_warn, vha, 0x8041, 5499 "qla82xx_restart_isp **** FAILED ****.\n"); 5500 } 5501 5502 return status; 5503 } 5504 5505 void 5506 qla81xx_update_fw_options(scsi_qla_host_t *vha) 5507 { 5508 struct qla_hw_data *ha = vha->hw; 5509 5510 if (!ql2xetsenable) 5511 return; 5512 5513 /* Enable ETS Burst. */ 5514 memset(ha->fw_options, 0, sizeof(ha->fw_options)); 5515 ha->fw_options[2] |= BIT_9; 5516 qla2x00_set_fw_options(vha, ha->fw_options); 5517 } 5518 5519 /* 5520 * qla24xx_get_fcp_prio 5521 * Gets the fcp cmd priority value for the logged in port. 5522 * Looks for a match of the port descriptors within 5523 * each of the fcp prio config entries. If a match is found, 5524 * the tag (priority) value is returned. 5525 * 5526 * Input: 5527 * vha = scsi host structure pointer. 5528 * fcport = port structure pointer. 5529 * 5530 * Return: 5531 * non-zero (if found) 5532 * -1 (if not found) 5533 * 5534 * Context: 5535 * Kernel context 5536 */ 5537 static int 5538 qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) 5539 { 5540 int i, entries; 5541 uint8_t pid_match, wwn_match; 5542 int priority; 5543 uint32_t pid1, pid2; 5544 uint64_t wwn1, wwn2; 5545 struct qla_fcp_prio_entry *pri_entry; 5546 struct qla_hw_data *ha = vha->hw; 5547 5548 if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled) 5549 return -1; 5550 5551 priority = -1; 5552 entries = ha->fcp_prio_cfg->num_entries; 5553 pri_entry = &ha->fcp_prio_cfg->entry[0]; 5554 5555 for (i = 0; i < entries; i++) { 5556 pid_match = wwn_match = 0; 5557 5558 if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) { 5559 pri_entry++; 5560 continue; 5561 } 5562 5563 /* check source pid for a match */ 5564 if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) { 5565 pid1 = pri_entry->src_pid & INVALID_PORT_ID; 5566 pid2 = vha->d_id.b24 & INVALID_PORT_ID; 5567 if (pid1 == INVALID_PORT_ID) 5568 pid_match++; 5569 else if (pid1 == pid2) 5570 pid_match++; 5571 } 5572 5573 /* check destination pid for a match */ 5574 if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) { 5575 pid1 = pri_entry->dst_pid & INVALID_PORT_ID; 5576 pid2 = fcport->d_id.b24 & INVALID_PORT_ID; 5577 if (pid1 == INVALID_PORT_ID) 5578 pid_match++; 5579 else if (pid1 == pid2) 5580 pid_match++; 5581 } 5582 5583 /* check source WWN for a match */ 5584 if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) { 5585 wwn1 = wwn_to_u64(vha->port_name); 5586 wwn2 = wwn_to_u64(pri_entry->src_wwpn); 5587 if (wwn2 == (uint64_t)-1) 5588 wwn_match++; 5589 else if (wwn1 == wwn2) 5590 wwn_match++; 5591 } 5592 5593 /* check destination WWN for a match */ 5594 if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) { 5595 wwn1 = wwn_to_u64(fcport->port_name); 5596 wwn2 = wwn_to_u64(pri_entry->dst_wwpn); 5597 if (wwn2 == (uint64_t)-1) 5598 wwn_match++; 5599 else if (wwn1 == wwn2) 5600 wwn_match++; 5601 } 5602 5603 if (pid_match == 2 || wwn_match == 2) { 5604 /* Found a matching entry */ 5605 if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID) 5606 priority = pri_entry->tag; 5607 break; 5608 } 5609 5610 pri_entry++; 5611 } 5612 5613 return priority; 5614 } 5615 5616 /* 5617 * qla24xx_update_fcport_fcp_prio 5618 * Activates fcp priority for the logged in fc port 5619 * 5620 * Input: 5621 * vha = scsi host structure pointer. 5622 * fcp = port structure pointer. 5623 * 5624 * Return: 5625 * QLA_SUCCESS or QLA_FUNCTION_FAILED 5626 * 5627 * Context: 5628 * Kernel context. 5629 */ 5630 int 5631 qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) 5632 { 5633 int ret; 5634 int priority; 5635 uint16_t mb[5]; 5636 5637 if (fcport->port_type != FCT_TARGET || 5638 fcport->loop_id == FC_NO_LOOP_ID) 5639 return QLA_FUNCTION_FAILED; 5640 5641 priority = qla24xx_get_fcp_prio(vha, fcport); 5642 if (priority < 0) 5643 return QLA_FUNCTION_FAILED; 5644 5645 ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb); 5646 if (ret == QLA_SUCCESS) 5647 fcport->fcp_prio = priority; 5648 else 5649 ql_dbg(ql_dbg_user, vha, 0x704f, 5650 "Unable to activate fcp priority, ret=0x%x.\n", ret); 5651 5652 return ret; 5653 } 5654 5655 /* 5656 * qla24xx_update_all_fcp_prio 5657 * Activates fcp priority for all the logged in ports 5658 * 5659 * Input: 5660 * ha = adapter block pointer. 5661 * 5662 * Return: 5663 * QLA_SUCCESS or QLA_FUNCTION_FAILED 5664 * 5665 * Context: 5666 * Kernel context. 5667 */ 5668 int 5669 qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha) 5670 { 5671 int ret; 5672 fc_port_t *fcport; 5673 5674 ret = QLA_FUNCTION_FAILED; 5675 /* We need to set priority for all logged in ports */ 5676 list_for_each_entry(fcport, &vha->vp_fcports, list) 5677 ret = qla24xx_update_fcport_fcp_prio(vha, fcport); 5678 5679 return ret; 5680 } 5681