1 /* 2 * QLogic Fibre Channel HBA Driver 3 * Copyright (c) 2003-2014 QLogic Corporation 4 * 5 * See LICENSE.qla2xxx for copyright and licensing details. 6 */ 7 #include "qla_def.h" 8 #include "qla_gbl.h" 9 10 #include <linux/delay.h> 11 #include <linux/slab.h> 12 #include <linux/vmalloc.h> 13 14 #include "qla_devtbl.h" 15 16 #ifdef CONFIG_SPARC 17 #include <asm/prom.h> 18 #endif 19 20 #include <target/target_core_base.h> 21 #include "qla_target.h" 22 23 /* 24 * QLogic ISP2x00 Hardware Support Function Prototypes. 25 */ 26 static int qla2x00_isp_firmware(scsi_qla_host_t *); 27 static int qla2x00_setup_chip(scsi_qla_host_t *); 28 static int qla2x00_fw_ready(scsi_qla_host_t *); 29 static int qla2x00_configure_hba(scsi_qla_host_t *); 30 static int qla2x00_configure_loop(scsi_qla_host_t *); 31 static int qla2x00_configure_local_loop(scsi_qla_host_t *); 32 static int qla2x00_configure_fabric(scsi_qla_host_t *); 33 static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *); 34 static int qla2x00_restart_isp(scsi_qla_host_t *); 35 36 static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *); 37 static int qla84xx_init_chip(scsi_qla_host_t *); 38 static int qla25xx_init_queues(struct qla_hw_data *); 39 static int qla24xx_post_prli_work(struct scsi_qla_host*, fc_port_t *); 40 static void qla24xx_handle_plogi_done_event(struct scsi_qla_host *, 41 struct event_arg *); 42 static void qla24xx_handle_prli_done_event(struct scsi_qla_host *, 43 struct event_arg *); 44 static void __qla24xx_handle_gpdb_event(scsi_qla_host_t *, struct event_arg *); 45 46 /* SRB Extensions ---------------------------------------------------------- */ 47 48 void 49 qla2x00_sp_timeout(struct timer_list *t) 50 { 51 srb_t *sp = from_timer(sp, t, u.iocb_cmd.timer); 52 struct srb_iocb *iocb; 53 scsi_qla_host_t *vha = sp->vha; 54 struct req_que *req; 55 unsigned long flags; 56 57 spin_lock_irqsave(&vha->hw->hardware_lock, flags); 58 req = vha->hw->req_q_map[0]; 59 req->outstanding_cmds[sp->handle] = NULL; 60 iocb = &sp->u.iocb_cmd; 61 iocb->timeout(sp); 62 spin_unlock_irqrestore(&vha->hw->hardware_lock, flags); 63 } 64 65 void 66 qla2x00_sp_free(void *ptr) 67 { 68 srb_t *sp = ptr; 69 struct srb_iocb *iocb = &sp->u.iocb_cmd; 70 71 del_timer(&iocb->timer); 72 qla2x00_rel_sp(sp); 73 } 74 75 /* Asynchronous Login/Logout Routines -------------------------------------- */ 76 77 unsigned long 78 qla2x00_get_async_timeout(struct scsi_qla_host *vha) 79 { 80 unsigned long tmo; 81 struct qla_hw_data *ha = vha->hw; 82 83 /* Firmware should use switch negotiated r_a_tov for timeout. */ 84 tmo = ha->r_a_tov / 10 * 2; 85 if (IS_QLAFX00(ha)) { 86 tmo = FX00_DEF_RATOV * 2; 87 } else if (!IS_FWI2_CAPABLE(ha)) { 88 /* 89 * Except for earlier ISPs where the timeout is seeded from the 90 * initialization control block. 91 */ 92 tmo = ha->login_timeout; 93 } 94 return tmo; 95 } 96 97 void 98 qla2x00_async_iocb_timeout(void *data) 99 { 100 srb_t *sp = data; 101 fc_port_t *fcport = sp->fcport; 102 struct srb_iocb *lio = &sp->u.iocb_cmd; 103 104 if (fcport) { 105 ql_dbg(ql_dbg_disc, fcport->vha, 0x2071, 106 "Async-%s timeout - hdl=%x portid=%06x %8phC.\n", 107 sp->name, sp->handle, fcport->d_id.b24, fcport->port_name); 108 109 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 110 } else { 111 pr_info("Async-%s timeout - hdl=%x.\n", 112 sp->name, sp->handle); 113 } 114 115 switch (sp->type) { 116 case SRB_LOGIN_CMD: 117 /* Retry as needed. */ 118 lio->u.logio.data[0] = MBS_COMMAND_ERROR; 119 lio->u.logio.data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ? 120 QLA_LOGIO_LOGIN_RETRIED : 0; 121 sp->done(sp, QLA_FUNCTION_TIMEOUT); 122 break; 123 case SRB_LOGOUT_CMD: 124 case SRB_CT_PTHRU_CMD: 125 case SRB_MB_IOCB: 126 case SRB_NACK_PLOGI: 127 case SRB_NACK_PRLI: 128 case SRB_NACK_LOGO: 129 case SRB_CTRL_VP: 130 sp->done(sp, QLA_FUNCTION_TIMEOUT); 131 break; 132 } 133 } 134 135 static void 136 qla2x00_async_login_sp_done(void *ptr, int res) 137 { 138 srb_t *sp = ptr; 139 struct scsi_qla_host *vha = sp->vha; 140 struct srb_iocb *lio = &sp->u.iocb_cmd; 141 struct event_arg ea; 142 143 ql_dbg(ql_dbg_disc, vha, 0x20dd, 144 "%s %8phC res %d \n", __func__, sp->fcport->port_name, res); 145 146 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 147 148 if (!test_bit(UNLOADING, &vha->dpc_flags)) { 149 memset(&ea, 0, sizeof(ea)); 150 ea.event = FCME_PLOGI_DONE; 151 ea.fcport = sp->fcport; 152 ea.data[0] = lio->u.logio.data[0]; 153 ea.data[1] = lio->u.logio.data[1]; 154 ea.iop[0] = lio->u.logio.iop[0]; 155 ea.iop[1] = lio->u.logio.iop[1]; 156 ea.sp = sp; 157 qla2x00_fcport_event_handler(vha, &ea); 158 } 159 160 sp->free(sp); 161 } 162 163 int 164 qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport, 165 uint16_t *data) 166 { 167 srb_t *sp; 168 struct srb_iocb *lio; 169 int rval = QLA_FUNCTION_FAILED; 170 171 if (!vha->flags.online) 172 goto done; 173 174 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 175 if (!sp) 176 goto done; 177 178 fcport->flags |= FCF_ASYNC_SENT; 179 fcport->logout_completed = 0; 180 181 fcport->disc_state = DSC_LOGIN_PEND; 182 sp->type = SRB_LOGIN_CMD; 183 sp->name = "login"; 184 sp->gen1 = fcport->rscn_gen; 185 sp->gen2 = fcport->login_gen; 186 187 lio = &sp->u.iocb_cmd; 188 lio->timeout = qla2x00_async_iocb_timeout; 189 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 190 191 sp->done = qla2x00_async_login_sp_done; 192 lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI; 193 194 if (fcport->fc4f_nvme) 195 lio->u.logio.flags |= SRB_LOGIN_SKIP_PRLI; 196 197 if (data[1] & QLA_LOGIO_LOGIN_RETRIED) 198 lio->u.logio.flags |= SRB_LOGIN_RETRIED; 199 rval = qla2x00_start_sp(sp); 200 if (rval != QLA_SUCCESS) { 201 fcport->flags |= FCF_LOGIN_NEEDED; 202 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 203 goto done_free_sp; 204 } 205 206 ql_dbg(ql_dbg_disc, vha, 0x2072, 207 "Async-login - %8phC hdl=%x, loopid=%x portid=%02x%02x%02x " 208 "retries=%d.\n", fcport->port_name, sp->handle, fcport->loop_id, 209 fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa, 210 fcport->login_retry); 211 return rval; 212 213 done_free_sp: 214 sp->free(sp); 215 fcport->flags &= ~FCF_ASYNC_SENT; 216 done: 217 fcport->flags &= ~FCF_ASYNC_ACTIVE; 218 return rval; 219 } 220 221 static void 222 qla2x00_async_logout_sp_done(void *ptr, int res) 223 { 224 srb_t *sp = ptr; 225 226 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 227 sp->fcport->login_gen++; 228 qlt_logo_completion_handler(sp->fcport, res); 229 sp->free(sp); 230 } 231 232 int 233 qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport) 234 { 235 srb_t *sp; 236 struct srb_iocb *lio; 237 int rval = QLA_FUNCTION_FAILED; 238 239 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT)) 240 return rval; 241 242 fcport->flags |= FCF_ASYNC_SENT; 243 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 244 if (!sp) 245 goto done; 246 247 sp->type = SRB_LOGOUT_CMD; 248 sp->name = "logout"; 249 250 lio = &sp->u.iocb_cmd; 251 lio->timeout = qla2x00_async_iocb_timeout; 252 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 253 254 sp->done = qla2x00_async_logout_sp_done; 255 rval = qla2x00_start_sp(sp); 256 if (rval != QLA_SUCCESS) 257 goto done_free_sp; 258 259 ql_dbg(ql_dbg_disc, vha, 0x2070, 260 "Async-logout - hdl=%x loop-id=%x portid=%02x%02x%02x %8phC.\n", 261 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 262 fcport->d_id.b.area, fcport->d_id.b.al_pa, 263 fcport->port_name); 264 return rval; 265 266 done_free_sp: 267 sp->free(sp); 268 done: 269 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 270 return rval; 271 } 272 273 void 274 qla2x00_async_prlo_done(struct scsi_qla_host *vha, fc_port_t *fcport, 275 uint16_t *data) 276 { 277 fcport->flags &= ~FCF_ASYNC_ACTIVE; 278 /* Don't re-login in target mode */ 279 if (!fcport->tgt_session) 280 qla2x00_mark_device_lost(vha, fcport, 1, 0); 281 qlt_logo_completion_handler(fcport, data[0]); 282 } 283 284 static void 285 qla2x00_async_prlo_sp_done(void *s, int res) 286 { 287 srb_t *sp = (srb_t *)s; 288 struct srb_iocb *lio = &sp->u.iocb_cmd; 289 struct scsi_qla_host *vha = sp->vha; 290 291 sp->fcport->flags &= ~FCF_ASYNC_ACTIVE; 292 if (!test_bit(UNLOADING, &vha->dpc_flags)) 293 qla2x00_post_async_prlo_done_work(sp->fcport->vha, sp->fcport, 294 lio->u.logio.data); 295 sp->free(sp); 296 } 297 298 int 299 qla2x00_async_prlo(struct scsi_qla_host *vha, fc_port_t *fcport) 300 { 301 srb_t *sp; 302 struct srb_iocb *lio; 303 int rval; 304 305 rval = QLA_FUNCTION_FAILED; 306 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 307 if (!sp) 308 goto done; 309 310 sp->type = SRB_PRLO_CMD; 311 sp->name = "prlo"; 312 313 lio = &sp->u.iocb_cmd; 314 lio->timeout = qla2x00_async_iocb_timeout; 315 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 316 317 sp->done = qla2x00_async_prlo_sp_done; 318 rval = qla2x00_start_sp(sp); 319 if (rval != QLA_SUCCESS) 320 goto done_free_sp; 321 322 ql_dbg(ql_dbg_disc, vha, 0x2070, 323 "Async-prlo - hdl=%x loop-id=%x portid=%02x%02x%02x.\n", 324 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 325 fcport->d_id.b.area, fcport->d_id.b.al_pa); 326 return rval; 327 328 done_free_sp: 329 sp->free(sp); 330 done: 331 fcport->flags &= ~FCF_ASYNC_ACTIVE; 332 return rval; 333 } 334 335 static 336 void qla24xx_handle_adisc_event(scsi_qla_host_t *vha, struct event_arg *ea) 337 { 338 struct fc_port *fcport = ea->fcport; 339 340 ql_dbg(ql_dbg_disc, vha, 0x20d2, 341 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d lid %d\n", 342 __func__, fcport->port_name, fcport->disc_state, 343 fcport->fw_login_state, ea->rc, fcport->login_gen, ea->sp->gen2, 344 fcport->rscn_gen, ea->sp->gen1, fcport->loop_id); 345 346 if (ea->data[0] != MBS_COMMAND_COMPLETE) { 347 ql_dbg(ql_dbg_disc, vha, 0x2066, 348 "%s %8phC: adisc fail: post delete\n", 349 __func__, ea->fcport->port_name); 350 qlt_schedule_sess_for_deletion(ea->fcport); 351 return; 352 } 353 354 if (ea->fcport->disc_state == DSC_DELETE_PEND) 355 return; 356 357 if (ea->sp->gen2 != ea->fcport->login_gen) { 358 /* target side must have changed it. */ 359 ql_dbg(ql_dbg_disc, vha, 0x20d3, 360 "%s %8phC generation changed\n", 361 __func__, ea->fcport->port_name); 362 return; 363 } else if (ea->sp->gen1 != ea->fcport->rscn_gen) { 364 ql_dbg(ql_dbg_disc, vha, 0x20d4, "%s %d %8phC post gidpn\n", 365 __func__, __LINE__, ea->fcport->port_name); 366 qla24xx_post_gidpn_work(vha, ea->fcport); 367 return; 368 } 369 370 __qla24xx_handle_gpdb_event(vha, ea); 371 } 372 373 static void 374 qla2x00_async_adisc_sp_done(void *ptr, int res) 375 { 376 srb_t *sp = ptr; 377 struct scsi_qla_host *vha = sp->vha; 378 struct event_arg ea; 379 struct srb_iocb *lio = &sp->u.iocb_cmd; 380 381 ql_dbg(ql_dbg_disc, vha, 0x2066, 382 "Async done-%s res %x %8phC\n", 383 sp->name, res, sp->fcport->port_name); 384 385 sp->fcport->flags &= ~FCF_ASYNC_SENT; 386 387 memset(&ea, 0, sizeof(ea)); 388 ea.event = FCME_ADISC_DONE; 389 ea.rc = res; 390 ea.data[0] = lio->u.logio.data[0]; 391 ea.data[1] = lio->u.logio.data[1]; 392 ea.iop[0] = lio->u.logio.iop[0]; 393 ea.iop[1] = lio->u.logio.iop[1]; 394 ea.fcport = sp->fcport; 395 ea.sp = sp; 396 397 qla2x00_fcport_event_handler(vha, &ea); 398 399 sp->free(sp); 400 } 401 402 int 403 qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport, 404 uint16_t *data) 405 { 406 srb_t *sp; 407 struct srb_iocb *lio; 408 int rval; 409 410 rval = QLA_FUNCTION_FAILED; 411 fcport->flags |= FCF_ASYNC_SENT; 412 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 413 if (!sp) 414 goto done; 415 416 sp->type = SRB_ADISC_CMD; 417 sp->name = "adisc"; 418 419 lio = &sp->u.iocb_cmd; 420 lio->timeout = qla2x00_async_iocb_timeout; 421 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 422 423 sp->done = qla2x00_async_adisc_sp_done; 424 if (data[1] & QLA_LOGIO_LOGIN_RETRIED) 425 lio->u.logio.flags |= SRB_LOGIN_RETRIED; 426 rval = qla2x00_start_sp(sp); 427 if (rval != QLA_SUCCESS) 428 goto done_free_sp; 429 430 ql_dbg(ql_dbg_disc, vha, 0x206f, 431 "Async-adisc - hdl=%x loopid=%x portid=%06x %8phC.\n", 432 sp->handle, fcport->loop_id, fcport->d_id.b24, fcport->port_name); 433 return rval; 434 435 done_free_sp: 436 sp->free(sp); 437 done: 438 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 439 qla2x00_post_async_adisc_work(vha, fcport, data); 440 return rval; 441 } 442 443 static void qla24xx_handle_gnl_done_event(scsi_qla_host_t *vha, 444 struct event_arg *ea) 445 { 446 fc_port_t *fcport, *conflict_fcport; 447 struct get_name_list_extended *e; 448 u16 i, n, found = 0, loop_id; 449 port_id_t id; 450 u64 wwn; 451 u16 data[2]; 452 u8 current_login_state; 453 454 fcport = ea->fcport; 455 ql_dbg(ql_dbg_disc, vha, 0xffff, 456 "%s %8phC DS %d LS rc %d %d login %d|%d rscn %d|%d lid %d\n", 457 __func__, fcport->port_name, fcport->disc_state, 458 fcport->fw_login_state, ea->rc, 459 fcport->login_gen, fcport->last_login_gen, 460 fcport->rscn_gen, fcport->last_rscn_gen, vha->loop_id); 461 462 if (fcport->disc_state == DSC_DELETE_PEND) 463 return; 464 465 if (ea->rc) { /* rval */ 466 if (fcport->login_retry == 0) { 467 fcport->login_retry = vha->hw->login_retry_count; 468 ql_dbg(ql_dbg_disc, vha, 0x20de, 469 "GNL failed Port login retry %8phN, retry cnt=%d.\n", 470 fcport->port_name, fcport->login_retry); 471 } 472 return; 473 } 474 475 if (fcport->last_rscn_gen != fcport->rscn_gen) { 476 ql_dbg(ql_dbg_disc, vha, 0x20df, 477 "%s %8phC rscn gen changed rscn %d|%d \n", 478 __func__, fcport->port_name, 479 fcport->last_rscn_gen, fcport->rscn_gen); 480 qla24xx_post_gidpn_work(vha, fcport); 481 return; 482 } else if (fcport->last_login_gen != fcport->login_gen) { 483 ql_dbg(ql_dbg_disc, vha, 0x20e0, 484 "%s %8phC login gen changed\n", 485 __func__, fcport->port_name); 486 return; 487 } 488 489 n = ea->data[0] / sizeof(struct get_name_list_extended); 490 491 ql_dbg(ql_dbg_disc, vha, 0x20e1, 492 "%s %d %8phC n %d %02x%02x%02x lid %d \n", 493 __func__, __LINE__, fcport->port_name, n, 494 fcport->d_id.b.domain, fcport->d_id.b.area, 495 fcport->d_id.b.al_pa, fcport->loop_id); 496 497 for (i = 0; i < n; i++) { 498 e = &vha->gnl.l[i]; 499 wwn = wwn_to_u64(e->port_name); 500 501 if (memcmp((u8 *)&wwn, fcport->port_name, WWN_SIZE)) 502 continue; 503 504 found = 1; 505 id.b.domain = e->port_id[2]; 506 id.b.area = e->port_id[1]; 507 id.b.al_pa = e->port_id[0]; 508 id.b.rsvd_1 = 0; 509 510 loop_id = le16_to_cpu(e->nport_handle); 511 loop_id = (loop_id & 0x7fff); 512 513 ql_dbg(ql_dbg_disc, vha, 0x20e2, 514 "%s found %8phC CLS [%d|%d] ID[%02x%02x%02x|%02x%02x%02x] lid[%d|%d]\n", 515 __func__, fcport->port_name, 516 e->current_login_state, fcport->fw_login_state, 517 id.b.domain, id.b.area, id.b.al_pa, 518 fcport->d_id.b.domain, fcport->d_id.b.area, 519 fcport->d_id.b.al_pa, loop_id, fcport->loop_id); 520 521 if ((id.b24 != fcport->d_id.b24) || 522 ((fcport->loop_id != FC_NO_LOOP_ID) && 523 (fcport->loop_id != loop_id))) { 524 ql_dbg(ql_dbg_disc, vha, 0x20e3, 525 "%s %d %8phC post del sess\n", 526 __func__, __LINE__, fcport->port_name); 527 qlt_schedule_sess_for_deletion(fcport); 528 return; 529 } 530 531 fcport->loop_id = loop_id; 532 533 wwn = wwn_to_u64(fcport->port_name); 534 qlt_find_sess_invalidate_other(vha, wwn, 535 id, loop_id, &conflict_fcport); 536 537 if (conflict_fcport) { 538 /* 539 * Another share fcport share the same loop_id & 540 * nport id. Conflict fcport needs to finish 541 * cleanup before this fcport can proceed to login. 542 */ 543 conflict_fcport->conflict = fcport; 544 fcport->login_pause = 1; 545 } 546 547 if (fcport->fc4f_nvme) 548 current_login_state = e->current_login_state >> 4; 549 else 550 current_login_state = e->current_login_state & 0xf; 551 552 switch (current_login_state) { 553 case DSC_LS_PRLI_COMP: 554 ql_dbg(ql_dbg_disc, vha, 0x20e4, 555 "%s %d %8phC post gpdb\n", 556 __func__, __LINE__, fcport->port_name); 557 558 if ((e->prli_svc_param_word_3[0] & BIT_4) == 0) 559 fcport->port_type = FCT_INITIATOR; 560 else 561 fcport->port_type = FCT_TARGET; 562 563 data[0] = data[1] = 0; 564 qla2x00_post_async_adisc_work(vha, fcport, data); 565 break; 566 case DSC_LS_PORT_UNAVAIL: 567 default: 568 if (fcport->loop_id == FC_NO_LOOP_ID) { 569 qla2x00_find_new_loop_id(vha, fcport); 570 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL; 571 } 572 ql_dbg(ql_dbg_disc, vha, 0x20e5, 573 "%s %d %8phC\n", 574 __func__, __LINE__, fcport->port_name); 575 qla24xx_fcport_handle_login(vha, fcport); 576 break; 577 } 578 } 579 580 if (!found) { 581 /* fw has no record of this port */ 582 for (i = 0; i < n; i++) { 583 e = &vha->gnl.l[i]; 584 id.b.domain = e->port_id[0]; 585 id.b.area = e->port_id[1]; 586 id.b.al_pa = e->port_id[2]; 587 id.b.rsvd_1 = 0; 588 loop_id = le16_to_cpu(e->nport_handle); 589 590 if (fcport->d_id.b24 == id.b24) { 591 conflict_fcport = 592 qla2x00_find_fcport_by_wwpn(vha, 593 e->port_name, 0); 594 if (conflict_fcport) { 595 qlt_schedule_sess_for_deletion 596 (conflict_fcport); 597 ql_dbg(ql_dbg_disc, vha, 0x20e6, 598 "%s %d %8phC post del sess\n", 599 __func__, __LINE__, 600 conflict_fcport->port_name); 601 } 602 } 603 604 /* FW already picked this loop id for another fcport */ 605 if (fcport->loop_id == loop_id) 606 fcport->loop_id = FC_NO_LOOP_ID; 607 } 608 qla24xx_fcport_handle_login(vha, fcport); 609 } 610 } /* gnl_event */ 611 612 static void 613 qla24xx_async_gnl_sp_done(void *s, int res) 614 { 615 struct srb *sp = s; 616 struct scsi_qla_host *vha = sp->vha; 617 unsigned long flags; 618 struct fc_port *fcport = NULL, *tf; 619 u16 i, n = 0, loop_id; 620 struct event_arg ea; 621 struct get_name_list_extended *e; 622 u64 wwn; 623 struct list_head h; 624 bool found = false; 625 626 ql_dbg(ql_dbg_disc, vha, 0x20e7, 627 "Async done-%s res %x mb[1]=%x mb[2]=%x \n", 628 sp->name, res, sp->u.iocb_cmd.u.mbx.in_mb[1], 629 sp->u.iocb_cmd.u.mbx.in_mb[2]); 630 631 memset(&ea, 0, sizeof(ea)); 632 ea.sp = sp; 633 ea.rc = res; 634 ea.event = FCME_GNL_DONE; 635 636 if (sp->u.iocb_cmd.u.mbx.in_mb[1] >= 637 sizeof(struct get_name_list_extended)) { 638 n = sp->u.iocb_cmd.u.mbx.in_mb[1] / 639 sizeof(struct get_name_list_extended); 640 ea.data[0] = sp->u.iocb_cmd.u.mbx.in_mb[1]; /* amnt xfered */ 641 } 642 643 for (i = 0; i < n; i++) { 644 e = &vha->gnl.l[i]; 645 loop_id = le16_to_cpu(e->nport_handle); 646 /* mask out reserve bit */ 647 loop_id = (loop_id & 0x7fff); 648 set_bit(loop_id, vha->hw->loop_id_map); 649 wwn = wwn_to_u64(e->port_name); 650 651 ql_dbg(ql_dbg_disc + ql_dbg_verbose, vha, 0x20e8, 652 "%s %8phC %02x:%02x:%02x state %d/%d lid %x \n", 653 __func__, (void *)&wwn, e->port_id[2], e->port_id[1], 654 e->port_id[0], e->current_login_state, e->last_login_state, 655 (loop_id & 0x7fff)); 656 } 657 658 spin_lock_irqsave(&vha->gnl.fcports_lock, flags); 659 660 INIT_LIST_HEAD(&h); 661 fcport = tf = NULL; 662 if (!list_empty(&vha->gnl.fcports)) 663 list_splice_init(&vha->gnl.fcports, &h); 664 665 list_for_each_entry_safe(fcport, tf, &h, gnl_entry) { 666 list_del_init(&fcport->gnl_entry); 667 spin_lock(&vha->hw->tgt.sess_lock); 668 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 669 spin_unlock(&vha->hw->tgt.sess_lock); 670 ea.fcport = fcport; 671 672 qla2x00_fcport_event_handler(vha, &ea); 673 } 674 spin_unlock_irqrestore(&vha->gnl.fcports_lock, flags); 675 676 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 677 /* create new fcport if fw has knowledge of new sessions */ 678 for (i = 0; i < n; i++) { 679 port_id_t id; 680 u64 wwnn; 681 682 e = &vha->gnl.l[i]; 683 wwn = wwn_to_u64(e->port_name); 684 685 found = false; 686 list_for_each_entry_safe(fcport, tf, &vha->vp_fcports, list) { 687 if (!memcmp((u8 *)&wwn, fcport->port_name, 688 WWN_SIZE)) { 689 found = true; 690 break; 691 } 692 } 693 694 id.b.domain = e->port_id[2]; 695 id.b.area = e->port_id[1]; 696 id.b.al_pa = e->port_id[0]; 697 id.b.rsvd_1 = 0; 698 699 if (!found && wwn && !IS_SW_RESV_ADDR(id)) { 700 ql_dbg(ql_dbg_disc, vha, 0x2065, 701 "%s %d %8phC %06x post new sess\n", 702 __func__, __LINE__, (u8 *)&wwn, id.b24); 703 wwnn = wwn_to_u64(e->node_name); 704 qla24xx_post_newsess_work(vha, &id, (u8 *)&wwn, 705 (u8 *)&wwnn, NULL, FC4_TYPE_UNKNOWN); 706 } 707 } 708 709 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 710 711 sp->free(sp); 712 } 713 714 int qla24xx_async_gnl(struct scsi_qla_host *vha, fc_port_t *fcport) 715 { 716 srb_t *sp; 717 struct srb_iocb *mbx; 718 int rval = QLA_FUNCTION_FAILED; 719 unsigned long flags; 720 u16 *mb; 721 722 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT)) 723 return rval; 724 725 ql_dbg(ql_dbg_disc, vha, 0x20d9, 726 "Async-gnlist WWPN %8phC \n", fcport->port_name); 727 728 spin_lock_irqsave(&vha->gnl.fcports_lock, flags); 729 if (!list_empty(&fcport->gnl_entry)) { 730 spin_unlock_irqrestore(&vha->gnl.fcports_lock, flags); 731 rval = QLA_SUCCESS; 732 goto done; 733 } 734 735 spin_lock(&vha->hw->tgt.sess_lock); 736 fcport->disc_state = DSC_GNL; 737 fcport->last_rscn_gen = fcport->rscn_gen; 738 fcport->last_login_gen = fcport->login_gen; 739 spin_unlock(&vha->hw->tgt.sess_lock); 740 741 list_add_tail(&fcport->gnl_entry, &vha->gnl.fcports); 742 spin_unlock_irqrestore(&vha->gnl.fcports_lock, flags); 743 744 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 745 if (!sp) 746 goto done; 747 748 fcport->flags |= FCF_ASYNC_SENT; 749 sp->type = SRB_MB_IOCB; 750 sp->name = "gnlist"; 751 sp->gen1 = fcport->rscn_gen; 752 sp->gen2 = fcport->login_gen; 753 754 mbx = &sp->u.iocb_cmd; 755 mbx->timeout = qla2x00_async_iocb_timeout; 756 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)+2); 757 758 mb = sp->u.iocb_cmd.u.mbx.out_mb; 759 mb[0] = MBC_PORT_NODE_NAME_LIST; 760 mb[1] = BIT_2 | BIT_3; 761 mb[2] = MSW(vha->gnl.ldma); 762 mb[3] = LSW(vha->gnl.ldma); 763 mb[6] = MSW(MSD(vha->gnl.ldma)); 764 mb[7] = LSW(MSD(vha->gnl.ldma)); 765 mb[8] = vha->gnl.size; 766 mb[9] = vha->vp_idx; 767 768 sp->done = qla24xx_async_gnl_sp_done; 769 770 rval = qla2x00_start_sp(sp); 771 if (rval != QLA_SUCCESS) 772 goto done_free_sp; 773 774 ql_dbg(ql_dbg_disc, vha, 0x20da, 775 "Async-%s - OUT WWPN %8phC hndl %x\n", 776 sp->name, fcport->port_name, sp->handle); 777 778 return rval; 779 780 done_free_sp: 781 sp->free(sp); 782 fcport->flags &= ~FCF_ASYNC_SENT; 783 done: 784 return rval; 785 } 786 787 int qla24xx_post_gnl_work(struct scsi_qla_host *vha, fc_port_t *fcport) 788 { 789 struct qla_work_evt *e; 790 791 e = qla2x00_alloc_work(vha, QLA_EVT_GNL); 792 if (!e) 793 return QLA_FUNCTION_FAILED; 794 795 e->u.fcport.fcport = fcport; 796 fcport->flags |= FCF_ASYNC_ACTIVE; 797 return qla2x00_post_work(vha, e); 798 } 799 800 static 801 void qla24xx_async_gpdb_sp_done(void *s, int res) 802 { 803 struct srb *sp = s; 804 struct scsi_qla_host *vha = sp->vha; 805 struct qla_hw_data *ha = vha->hw; 806 fc_port_t *fcport = sp->fcport; 807 u16 *mb = sp->u.iocb_cmd.u.mbx.in_mb; 808 struct event_arg ea; 809 810 ql_dbg(ql_dbg_disc, vha, 0x20db, 811 "Async done-%s res %x, WWPN %8phC mb[1]=%x mb[2]=%x \n", 812 sp->name, res, fcport->port_name, mb[1], mb[2]); 813 814 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 815 816 memset(&ea, 0, sizeof(ea)); 817 ea.event = FCME_GPDB_DONE; 818 ea.fcport = fcport; 819 ea.sp = sp; 820 821 qla2x00_fcport_event_handler(vha, &ea); 822 823 dma_pool_free(ha->s_dma_pool, sp->u.iocb_cmd.u.mbx.in, 824 sp->u.iocb_cmd.u.mbx.in_dma); 825 826 sp->free(sp); 827 } 828 829 static int qla24xx_post_prli_work(struct scsi_qla_host *vha, fc_port_t *fcport) 830 { 831 struct qla_work_evt *e; 832 833 e = qla2x00_alloc_work(vha, QLA_EVT_PRLI); 834 if (!e) 835 return QLA_FUNCTION_FAILED; 836 837 e->u.fcport.fcport = fcport; 838 839 return qla2x00_post_work(vha, e); 840 } 841 842 static void 843 qla2x00_async_prli_sp_done(void *ptr, int res) 844 { 845 srb_t *sp = ptr; 846 struct scsi_qla_host *vha = sp->vha; 847 struct srb_iocb *lio = &sp->u.iocb_cmd; 848 struct event_arg ea; 849 850 ql_dbg(ql_dbg_disc, vha, 0x2129, 851 "%s %8phC res %d \n", __func__, 852 sp->fcport->port_name, res); 853 854 sp->fcport->flags &= ~FCF_ASYNC_SENT; 855 856 if (!test_bit(UNLOADING, &vha->dpc_flags)) { 857 memset(&ea, 0, sizeof(ea)); 858 ea.event = FCME_PRLI_DONE; 859 ea.fcport = sp->fcport; 860 ea.data[0] = lio->u.logio.data[0]; 861 ea.data[1] = lio->u.logio.data[1]; 862 ea.iop[0] = lio->u.logio.iop[0]; 863 ea.iop[1] = lio->u.logio.iop[1]; 864 ea.sp = sp; 865 866 qla2x00_fcport_event_handler(vha, &ea); 867 } 868 869 sp->free(sp); 870 } 871 872 int 873 qla24xx_async_prli(struct scsi_qla_host *vha, fc_port_t *fcport) 874 { 875 srb_t *sp; 876 struct srb_iocb *lio; 877 int rval = QLA_FUNCTION_FAILED; 878 879 if (!vha->flags.online) 880 return rval; 881 882 if (fcport->fw_login_state == DSC_LS_PLOGI_PEND || 883 fcport->fw_login_state == DSC_LS_PRLI_PEND) 884 return rval; 885 886 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 887 if (!sp) 888 return rval; 889 890 fcport->flags |= FCF_ASYNC_SENT; 891 fcport->logout_completed = 0; 892 893 sp->type = SRB_PRLI_CMD; 894 sp->name = "prli"; 895 896 lio = &sp->u.iocb_cmd; 897 lio->timeout = qla2x00_async_iocb_timeout; 898 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 899 900 sp->done = qla2x00_async_prli_sp_done; 901 lio->u.logio.flags = 0; 902 903 if (fcport->fc4f_nvme) 904 lio->u.logio.flags |= SRB_LOGIN_NVME_PRLI; 905 906 rval = qla2x00_start_sp(sp); 907 if (rval != QLA_SUCCESS) { 908 fcport->flags |= FCF_LOGIN_NEEDED; 909 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 910 goto done_free_sp; 911 } 912 913 ql_dbg(ql_dbg_disc, vha, 0x211b, 914 "Async-prli - %8phC hdl=%x, loopid=%x portid=%06x retries=%d.\n", 915 fcport->port_name, sp->handle, fcport->loop_id, 916 fcport->d_id.b24, fcport->login_retry); 917 918 return rval; 919 920 done_free_sp: 921 sp->free(sp); 922 fcport->flags &= ~FCF_ASYNC_SENT; 923 return rval; 924 } 925 926 int qla24xx_post_gpdb_work(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt) 927 { 928 struct qla_work_evt *e; 929 930 e = qla2x00_alloc_work(vha, QLA_EVT_GPDB); 931 if (!e) 932 return QLA_FUNCTION_FAILED; 933 934 e->u.fcport.fcport = fcport; 935 e->u.fcport.opt = opt; 936 fcport->flags |= FCF_ASYNC_ACTIVE; 937 return qla2x00_post_work(vha, e); 938 } 939 940 int qla24xx_async_gpdb(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt) 941 { 942 srb_t *sp; 943 struct srb_iocb *mbx; 944 int rval = QLA_FUNCTION_FAILED; 945 u16 *mb; 946 dma_addr_t pd_dma; 947 struct port_database_24xx *pd; 948 struct qla_hw_data *ha = vha->hw; 949 950 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT)) 951 return rval; 952 953 fcport->disc_state = DSC_GPDB; 954 955 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 956 if (!sp) 957 goto done; 958 959 fcport->flags |= FCF_ASYNC_SENT; 960 sp->type = SRB_MB_IOCB; 961 sp->name = "gpdb"; 962 sp->gen1 = fcport->rscn_gen; 963 sp->gen2 = fcport->login_gen; 964 965 mbx = &sp->u.iocb_cmd; 966 mbx->timeout = qla2x00_async_iocb_timeout; 967 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 968 969 pd = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma); 970 if (pd == NULL) { 971 ql_log(ql_log_warn, vha, 0xd043, 972 "Failed to allocate port database structure.\n"); 973 goto done_free_sp; 974 } 975 976 mb = sp->u.iocb_cmd.u.mbx.out_mb; 977 mb[0] = MBC_GET_PORT_DATABASE; 978 mb[1] = fcport->loop_id; 979 mb[2] = MSW(pd_dma); 980 mb[3] = LSW(pd_dma); 981 mb[6] = MSW(MSD(pd_dma)); 982 mb[7] = LSW(MSD(pd_dma)); 983 mb[9] = vha->vp_idx; 984 mb[10] = opt; 985 986 mbx->u.mbx.in = (void *)pd; 987 mbx->u.mbx.in_dma = pd_dma; 988 989 sp->done = qla24xx_async_gpdb_sp_done; 990 991 rval = qla2x00_start_sp(sp); 992 if (rval != QLA_SUCCESS) 993 goto done_free_sp; 994 995 ql_dbg(ql_dbg_disc, vha, 0x20dc, 996 "Async-%s %8phC hndl %x opt %x\n", 997 sp->name, fcport->port_name, sp->handle, opt); 998 999 return rval; 1000 1001 done_free_sp: 1002 if (pd) 1003 dma_pool_free(ha->s_dma_pool, pd, pd_dma); 1004 1005 sp->free(sp); 1006 fcport->flags &= ~FCF_ASYNC_SENT; 1007 done: 1008 qla24xx_post_gpdb_work(vha, fcport, opt); 1009 return rval; 1010 } 1011 1012 static 1013 void __qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea) 1014 { 1015 unsigned long flags; 1016 1017 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1018 ea->fcport->login_gen++; 1019 ea->fcport->deleted = 0; 1020 ea->fcport->logout_on_delete = 1; 1021 1022 if (!ea->fcport->login_succ && !IS_SW_RESV_ADDR(ea->fcport->d_id)) { 1023 vha->fcport_count++; 1024 ea->fcport->login_succ = 1; 1025 1026 ql_dbg(ql_dbg_disc, vha, 0x20d6, 1027 "%s %d %8phC post upd_fcport fcp_cnt %d\n", 1028 __func__, __LINE__, ea->fcport->port_name, 1029 vha->fcport_count); 1030 qla24xx_post_upd_fcport_work(vha, ea->fcport); 1031 } else if (ea->fcport->login_succ) { 1032 /* 1033 * We have an existing session. A late RSCN delivery 1034 * must have triggered the session to be re-validate. 1035 * Session is still valid. 1036 */ 1037 ql_dbg(ql_dbg_disc, vha, 0x20d6, 1038 "%s %d %8phC session revalidate success\n", 1039 __func__, __LINE__, ea->fcport->port_name); 1040 ea->fcport->disc_state = DSC_LOGIN_COMPLETE; 1041 } 1042 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1043 } 1044 1045 static 1046 void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea) 1047 { 1048 fc_port_t *fcport = ea->fcport; 1049 struct port_database_24xx *pd; 1050 struct srb *sp = ea->sp; 1051 uint8_t ls; 1052 1053 pd = (struct port_database_24xx *)sp->u.iocb_cmd.u.mbx.in; 1054 1055 fcport->flags &= ~FCF_ASYNC_SENT; 1056 1057 ql_dbg(ql_dbg_disc, vha, 0x20d2, 1058 "%s %8phC DS %d LS %d rc %d\n", __func__, fcport->port_name, 1059 fcport->disc_state, pd->current_login_state, ea->rc); 1060 1061 if (fcport->disc_state == DSC_DELETE_PEND) 1062 return; 1063 1064 if (fcport->fc4f_nvme) 1065 ls = pd->current_login_state >> 4; 1066 else 1067 ls = pd->current_login_state & 0xf; 1068 1069 switch (ls) { 1070 case PDS_PRLI_COMPLETE: 1071 __qla24xx_parse_gpdb(vha, fcport, pd); 1072 break; 1073 case PDS_PLOGI_PENDING: 1074 case PDS_PLOGI_COMPLETE: 1075 case PDS_PRLI_PENDING: 1076 case PDS_PRLI2_PENDING: 1077 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC relogin needed\n", 1078 __func__, __LINE__, fcport->port_name); 1079 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1080 return; 1081 case PDS_LOGO_PENDING: 1082 case PDS_PORT_UNAVAILABLE: 1083 default: 1084 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC post del sess\n", 1085 __func__, __LINE__, fcport->port_name); 1086 qlt_schedule_sess_for_deletion(fcport); 1087 return; 1088 } 1089 __qla24xx_handle_gpdb_event(vha, ea); 1090 } /* gpdb event */ 1091 1092 static void qla_chk_n2n_b4_login(struct scsi_qla_host *vha, fc_port_t *fcport) 1093 { 1094 u8 login = 0; 1095 int rc; 1096 1097 if (qla_tgt_mode_enabled(vha)) 1098 return; 1099 1100 if (qla_dual_mode_enabled(vha)) { 1101 if (N2N_TOPO(vha->hw)) { 1102 u64 mywwn, wwn; 1103 1104 mywwn = wwn_to_u64(vha->port_name); 1105 wwn = wwn_to_u64(fcport->port_name); 1106 if (mywwn > wwn) 1107 login = 1; 1108 else if ((fcport->fw_login_state == DSC_LS_PLOGI_COMP) 1109 && time_after_eq(jiffies, 1110 fcport->plogi_nack_done_deadline)) 1111 login = 1; 1112 } else { 1113 login = 1; 1114 } 1115 } else { 1116 /* initiator mode */ 1117 login = 1; 1118 } 1119 1120 if (login) { 1121 if (fcport->loop_id == FC_NO_LOOP_ID) { 1122 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL; 1123 rc = qla2x00_find_new_loop_id(vha, fcport); 1124 if (rc) { 1125 ql_dbg(ql_dbg_disc, vha, 0x20e6, 1126 "%s %d %8phC post del sess - out of loopid\n", 1127 __func__, __LINE__, fcport->port_name); 1128 fcport->scan_state = 0; 1129 qlt_schedule_sess_for_deletion(fcport); 1130 return; 1131 } 1132 } 1133 ql_dbg(ql_dbg_disc, vha, 0x20bf, 1134 "%s %d %8phC post login\n", 1135 __func__, __LINE__, fcport->port_name); 1136 qla2x00_post_async_login_work(vha, fcport, NULL); 1137 } 1138 } 1139 1140 int qla24xx_fcport_handle_login(struct scsi_qla_host *vha, fc_port_t *fcport) 1141 { 1142 u16 data[2]; 1143 u64 wwn; 1144 1145 ql_dbg(ql_dbg_disc, vha, 0x20d8, 1146 "%s %8phC DS %d LS %d P %d fl %x confl %p rscn %d|%d login %d retry %d lid %d scan %d\n", 1147 __func__, fcport->port_name, fcport->disc_state, 1148 fcport->fw_login_state, fcport->login_pause, fcport->flags, 1149 fcport->conflict, fcport->last_rscn_gen, fcport->rscn_gen, 1150 fcport->login_gen, fcport->login_retry, 1151 fcport->loop_id, fcport->scan_state); 1152 1153 if (fcport->scan_state != QLA_FCPORT_FOUND) 1154 return 0; 1155 1156 if ((fcport->loop_id != FC_NO_LOOP_ID) && 1157 ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) || 1158 (fcport->fw_login_state == DSC_LS_PRLI_PEND))) 1159 return 0; 1160 1161 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) { 1162 if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) { 1163 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1164 return 0; 1165 } 1166 } 1167 1168 /* for pure Target Mode. Login will not be initiated */ 1169 if (vha->host->active_mode == MODE_TARGET) 1170 return 0; 1171 1172 if (fcport->flags & FCF_ASYNC_SENT) { 1173 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1174 return 0; 1175 } 1176 1177 if (fcport->login_retry > 0) 1178 fcport->login_retry--; 1179 1180 switch (fcport->disc_state) { 1181 case DSC_DELETED: 1182 wwn = wwn_to_u64(fcport->node_name); 1183 if (wwn == 0) { 1184 ql_dbg(ql_dbg_disc, vha, 0xffff, 1185 "%s %d %8phC post GNNID\n", 1186 __func__, __LINE__, fcport->port_name); 1187 qla24xx_post_gnnid_work(vha, fcport); 1188 } else if (fcport->loop_id == FC_NO_LOOP_ID) { 1189 ql_dbg(ql_dbg_disc, vha, 0x20bd, 1190 "%s %d %8phC post gnl\n", 1191 __func__, __LINE__, fcport->port_name); 1192 qla24xx_post_gnl_work(vha, fcport); 1193 } else { 1194 qla_chk_n2n_b4_login(vha, fcport); 1195 } 1196 break; 1197 1198 case DSC_GNL: 1199 if (fcport->login_pause) { 1200 fcport->last_rscn_gen = fcport->rscn_gen; 1201 fcport->last_login_gen = fcport->login_gen; 1202 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1203 break; 1204 } 1205 1206 qla_chk_n2n_b4_login(vha, fcport); 1207 break; 1208 1209 case DSC_LOGIN_FAILED: 1210 ql_dbg(ql_dbg_disc, vha, 0x20d0, 1211 "%s %d %8phC post gidpn\n", 1212 __func__, __LINE__, fcport->port_name); 1213 if (N2N_TOPO(vha->hw)) 1214 qla_chk_n2n_b4_login(vha, fcport); 1215 else 1216 qla24xx_post_gidpn_work(vha, fcport); 1217 break; 1218 1219 case DSC_LOGIN_COMPLETE: 1220 /* recheck login state */ 1221 ql_dbg(ql_dbg_disc, vha, 0x20d1, 1222 "%s %d %8phC post adisc\n", 1223 __func__, __LINE__, fcport->port_name); 1224 data[0] = data[1] = 0; 1225 qla2x00_post_async_adisc_work(vha, fcport, data); 1226 break; 1227 1228 case DSC_LOGIN_PEND: 1229 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) 1230 qla24xx_post_prli_work(vha, fcport); 1231 break; 1232 1233 default: 1234 break; 1235 } 1236 1237 return 0; 1238 } 1239 1240 static 1241 void qla24xx_handle_rscn_event(fc_port_t *fcport, struct event_arg *ea) 1242 { 1243 fcport->rscn_gen++; 1244 1245 ql_dbg(ql_dbg_disc, fcport->vha, 0x210c, 1246 "%s %8phC DS %d LS %d\n", 1247 __func__, fcport->port_name, fcport->disc_state, 1248 fcport->fw_login_state); 1249 1250 if (fcport->flags & FCF_ASYNC_SENT) 1251 return; 1252 1253 switch (fcport->disc_state) { 1254 case DSC_DELETED: 1255 case DSC_LOGIN_COMPLETE: 1256 qla24xx_post_gpnid_work(fcport->vha, &ea->id); 1257 break; 1258 default: 1259 break; 1260 } 1261 } 1262 1263 int qla24xx_post_newsess_work(struct scsi_qla_host *vha, port_id_t *id, 1264 u8 *port_name, u8 *node_name, void *pla, u8 fc4_type) 1265 { 1266 struct qla_work_evt *e; 1267 e = qla2x00_alloc_work(vha, QLA_EVT_NEW_SESS); 1268 if (!e) 1269 return QLA_FUNCTION_FAILED; 1270 1271 e->u.new_sess.id = *id; 1272 e->u.new_sess.pla = pla; 1273 e->u.new_sess.fc4_type = fc4_type; 1274 memcpy(e->u.new_sess.port_name, port_name, WWN_SIZE); 1275 if (node_name) 1276 memcpy(e->u.new_sess.node_name, node_name, WWN_SIZE); 1277 1278 return qla2x00_post_work(vha, e); 1279 } 1280 1281 static 1282 void qla24xx_handle_relogin_event(scsi_qla_host_t *vha, 1283 struct event_arg *ea) 1284 { 1285 fc_port_t *fcport = ea->fcport; 1286 1287 ql_dbg(ql_dbg_disc, vha, 0x2102, 1288 "%s %8phC DS %d LS %d P %d del %d cnfl %p rscn %d|%d login %d|%d fl %x\n", 1289 __func__, fcport->port_name, fcport->disc_state, 1290 fcport->fw_login_state, fcport->login_pause, 1291 fcport->deleted, fcport->conflict, 1292 fcport->last_rscn_gen, fcport->rscn_gen, 1293 fcport->last_login_gen, fcport->login_gen, 1294 fcport->flags); 1295 1296 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) || 1297 (fcport->fw_login_state == DSC_LS_PRLI_PEND)) 1298 return; 1299 1300 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) { 1301 if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) { 1302 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1303 return; 1304 } 1305 } 1306 1307 if (fcport->flags & FCF_ASYNC_SENT) { 1308 fcport->login_retry++; 1309 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1310 return; 1311 } 1312 1313 if (fcport->disc_state == DSC_DELETE_PEND) { 1314 fcport->login_retry++; 1315 return; 1316 } 1317 1318 if (fcport->last_rscn_gen != fcport->rscn_gen) { 1319 ql_dbg(ql_dbg_disc, vha, 0x20e9, "%s %d %8phC post gidpn\n", 1320 __func__, __LINE__, fcport->port_name); 1321 1322 qla24xx_post_gidpn_work(vha, fcport); 1323 return; 1324 } 1325 1326 qla24xx_fcport_handle_login(vha, fcport); 1327 } 1328 1329 void qla2x00_fcport_event_handler(scsi_qla_host_t *vha, struct event_arg *ea) 1330 { 1331 fc_port_t *f, *tf; 1332 uint32_t id = 0, mask, rid; 1333 unsigned long flags; 1334 fc_port_t *fcport; 1335 1336 switch (ea->event) { 1337 case FCME_RELOGIN: 1338 if (test_bit(UNLOADING, &vha->dpc_flags)) 1339 return; 1340 1341 qla24xx_handle_relogin_event(vha, ea); 1342 break; 1343 case FCME_RSCN: 1344 if (test_bit(UNLOADING, &vha->dpc_flags)) 1345 return; 1346 switch (ea->id.b.rsvd_1) { 1347 case RSCN_PORT_ADDR: 1348 fcport = qla2x00_find_fcport_by_nportid 1349 (vha, &ea->id, 1); 1350 if (fcport) 1351 fcport->rscn_rcvd = 1; 1352 1353 spin_lock_irqsave(&vha->work_lock, flags); 1354 if (vha->scan.scan_flags == 0) { 1355 ql_dbg(ql_dbg_disc, vha, 0xffff, 1356 "%s: schedule\n", __func__); 1357 vha->scan.scan_flags |= SF_QUEUED; 1358 schedule_delayed_work(&vha->scan.scan_work, 5); 1359 } 1360 spin_unlock_irqrestore(&vha->work_lock, flags); 1361 1362 break; 1363 case RSCN_AREA_ADDR: 1364 case RSCN_DOM_ADDR: 1365 if (ea->id.b.rsvd_1 == RSCN_AREA_ADDR) { 1366 mask = 0xffff00; 1367 ql_dbg(ql_dbg_async, vha, 0x5044, 1368 "RSCN: Area 0x%06x was affected\n", 1369 ea->id.b24); 1370 } else { 1371 mask = 0xff0000; 1372 ql_dbg(ql_dbg_async, vha, 0x507a, 1373 "RSCN: Domain 0x%06x was affected\n", 1374 ea->id.b24); 1375 } 1376 1377 rid = ea->id.b24 & mask; 1378 list_for_each_entry_safe(f, tf, &vha->vp_fcports, 1379 list) { 1380 id = f->d_id.b24 & mask; 1381 if (rid == id) { 1382 ea->fcport = f; 1383 qla24xx_handle_rscn_event(f, ea); 1384 } 1385 } 1386 break; 1387 case RSCN_FAB_ADDR: 1388 default: 1389 ql_log(ql_log_warn, vha, 0xd045, 1390 "RSCN: Fabric was affected. Addr format %d\n", 1391 ea->id.b.rsvd_1); 1392 qla2x00_mark_all_devices_lost(vha, 1); 1393 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 1394 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 1395 } 1396 break; 1397 case FCME_GIDPN_DONE: 1398 qla24xx_handle_gidpn_event(vha, ea); 1399 break; 1400 case FCME_GNL_DONE: 1401 qla24xx_handle_gnl_done_event(vha, ea); 1402 break; 1403 case FCME_GPSC_DONE: 1404 qla24xx_handle_gpsc_event(vha, ea); 1405 break; 1406 case FCME_PLOGI_DONE: /* Initiator side sent LLIOCB */ 1407 qla24xx_handle_plogi_done_event(vha, ea); 1408 break; 1409 case FCME_PRLI_DONE: 1410 qla24xx_handle_prli_done_event(vha, ea); 1411 break; 1412 case FCME_GPDB_DONE: 1413 qla24xx_handle_gpdb_event(vha, ea); 1414 break; 1415 case FCME_GPNID_DONE: 1416 qla24xx_handle_gpnid_event(vha, ea); 1417 break; 1418 case FCME_GFFID_DONE: 1419 qla24xx_handle_gffid_event(vha, ea); 1420 break; 1421 case FCME_ADISC_DONE: 1422 qla24xx_handle_adisc_event(vha, ea); 1423 break; 1424 case FCME_GNNID_DONE: 1425 qla24xx_handle_gnnid_event(vha, ea); 1426 break; 1427 case FCME_GFPNID_DONE: 1428 qla24xx_handle_gfpnid_event(vha, ea); 1429 break; 1430 default: 1431 BUG_ON(1); 1432 break; 1433 } 1434 } 1435 1436 static void 1437 qla2x00_tmf_iocb_timeout(void *data) 1438 { 1439 srb_t *sp = data; 1440 struct srb_iocb *tmf = &sp->u.iocb_cmd; 1441 1442 tmf->u.tmf.comp_status = CS_TIMEOUT; 1443 complete(&tmf->u.tmf.comp); 1444 } 1445 1446 static void 1447 qla2x00_tmf_sp_done(void *ptr, int res) 1448 { 1449 srb_t *sp = ptr; 1450 struct srb_iocb *tmf = &sp->u.iocb_cmd; 1451 1452 complete(&tmf->u.tmf.comp); 1453 } 1454 1455 int 1456 qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint32_t lun, 1457 uint32_t tag) 1458 { 1459 struct scsi_qla_host *vha = fcport->vha; 1460 struct srb_iocb *tm_iocb; 1461 srb_t *sp; 1462 int rval = QLA_FUNCTION_FAILED; 1463 1464 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1465 if (!sp) 1466 goto done; 1467 1468 tm_iocb = &sp->u.iocb_cmd; 1469 sp->type = SRB_TM_CMD; 1470 sp->name = "tmf"; 1471 1472 tm_iocb->timeout = qla2x00_tmf_iocb_timeout; 1473 init_completion(&tm_iocb->u.tmf.comp); 1474 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)); 1475 1476 tm_iocb->u.tmf.flags = flags; 1477 tm_iocb->u.tmf.lun = lun; 1478 tm_iocb->u.tmf.data = tag; 1479 sp->done = qla2x00_tmf_sp_done; 1480 1481 rval = qla2x00_start_sp(sp); 1482 if (rval != QLA_SUCCESS) 1483 goto done_free_sp; 1484 1485 ql_dbg(ql_dbg_taskm, vha, 0x802f, 1486 "Async-tmf hdl=%x loop-id=%x portid=%02x%02x%02x.\n", 1487 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 1488 fcport->d_id.b.area, fcport->d_id.b.al_pa); 1489 1490 wait_for_completion(&tm_iocb->u.tmf.comp); 1491 1492 rval = tm_iocb->u.tmf.data; 1493 1494 if (rval != QLA_SUCCESS) { 1495 ql_log(ql_log_warn, vha, 0x8030, 1496 "TM IOCB failed (%x).\n", rval); 1497 } 1498 1499 if (!test_bit(UNLOADING, &vha->dpc_flags) && !IS_QLAFX00(vha->hw)) { 1500 flags = tm_iocb->u.tmf.flags; 1501 lun = (uint16_t)tm_iocb->u.tmf.lun; 1502 1503 /* Issue Marker IOCB */ 1504 qla2x00_marker(vha, vha->hw->req_q_map[0], 1505 vha->hw->rsp_q_map[0], sp->fcport->loop_id, lun, 1506 flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID); 1507 } 1508 1509 done_free_sp: 1510 sp->free(sp); 1511 sp->fcport->flags &= ~FCF_ASYNC_SENT; 1512 done: 1513 return rval; 1514 } 1515 1516 static void 1517 qla24xx_abort_iocb_timeout(void *data) 1518 { 1519 srb_t *sp = data; 1520 struct srb_iocb *abt = &sp->u.iocb_cmd; 1521 1522 abt->u.abt.comp_status = CS_TIMEOUT; 1523 complete(&abt->u.abt.comp); 1524 } 1525 1526 static void 1527 qla24xx_abort_sp_done(void *ptr, int res) 1528 { 1529 srb_t *sp = ptr; 1530 struct srb_iocb *abt = &sp->u.iocb_cmd; 1531 1532 if (del_timer(&sp->u.iocb_cmd.timer)) 1533 complete(&abt->u.abt.comp); 1534 } 1535 1536 int 1537 qla24xx_async_abort_cmd(srb_t *cmd_sp) 1538 { 1539 scsi_qla_host_t *vha = cmd_sp->vha; 1540 fc_port_t *fcport = cmd_sp->fcport; 1541 struct srb_iocb *abt_iocb; 1542 srb_t *sp; 1543 int rval = QLA_FUNCTION_FAILED; 1544 1545 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1546 if (!sp) 1547 goto done; 1548 1549 abt_iocb = &sp->u.iocb_cmd; 1550 sp->type = SRB_ABT_CMD; 1551 sp->name = "abort"; 1552 1553 abt_iocb->timeout = qla24xx_abort_iocb_timeout; 1554 init_completion(&abt_iocb->u.abt.comp); 1555 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)); 1556 1557 abt_iocb->u.abt.cmd_hndl = cmd_sp->handle; 1558 1559 if (vha->flags.qpairs_available && cmd_sp->qpair) 1560 abt_iocb->u.abt.req_que_no = 1561 cpu_to_le16(cmd_sp->qpair->req->id); 1562 else 1563 abt_iocb->u.abt.req_que_no = cpu_to_le16(vha->req->id); 1564 1565 sp->done = qla24xx_abort_sp_done; 1566 1567 rval = qla2x00_start_sp(sp); 1568 if (rval != QLA_SUCCESS) 1569 goto done_free_sp; 1570 1571 ql_dbg(ql_dbg_async, vha, 0x507c, 1572 "Abort command issued - hdl=%x, target_id=%x\n", 1573 cmd_sp->handle, fcport->tgt_id); 1574 1575 wait_for_completion(&abt_iocb->u.abt.comp); 1576 1577 rval = abt_iocb->u.abt.comp_status == CS_COMPLETE ? 1578 QLA_SUCCESS : QLA_FUNCTION_FAILED; 1579 1580 done_free_sp: 1581 sp->free(sp); 1582 done: 1583 return rval; 1584 } 1585 1586 int 1587 qla24xx_async_abort_command(srb_t *sp) 1588 { 1589 unsigned long flags = 0; 1590 1591 uint32_t handle; 1592 fc_port_t *fcport = sp->fcport; 1593 struct scsi_qla_host *vha = fcport->vha; 1594 struct qla_hw_data *ha = vha->hw; 1595 struct req_que *req = vha->req; 1596 1597 if (vha->flags.qpairs_available && sp->qpair) 1598 req = sp->qpair->req; 1599 1600 spin_lock_irqsave(&ha->hardware_lock, flags); 1601 for (handle = 1; handle < req->num_outstanding_cmds; handle++) { 1602 if (req->outstanding_cmds[handle] == sp) 1603 break; 1604 } 1605 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1606 if (handle == req->num_outstanding_cmds) { 1607 /* Command not found. */ 1608 return QLA_FUNCTION_FAILED; 1609 } 1610 if (sp->type == SRB_FXIOCB_DCMD) 1611 return qlafx00_fx_disc(vha, &vha->hw->mr.fcport, 1612 FXDISC_ABORT_IOCTL); 1613 1614 return qla24xx_async_abort_cmd(sp); 1615 } 1616 1617 static void 1618 qla24xx_handle_prli_done_event(struct scsi_qla_host *vha, struct event_arg *ea) 1619 { 1620 switch (ea->data[0]) { 1621 case MBS_COMMAND_COMPLETE: 1622 ql_dbg(ql_dbg_disc, vha, 0x2118, 1623 "%s %d %8phC post gpdb\n", 1624 __func__, __LINE__, ea->fcport->port_name); 1625 1626 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset; 1627 ea->fcport->logout_on_delete = 1; 1628 qla24xx_post_gpdb_work(vha, ea->fcport, 0); 1629 break; 1630 default: 1631 if ((ea->iop[0] == LSC_SCODE_ELS_REJECT) && 1632 (ea->iop[1] == 0x50000)) { /* reson 5=busy expl:0x0 */ 1633 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1634 ea->fcport->fw_login_state = DSC_LS_PLOGI_COMP; 1635 break; 1636 } 1637 1638 if (ea->fcport->n2n_flag) { 1639 ql_dbg(ql_dbg_disc, vha, 0x2118, 1640 "%s %d %8phC post fc4 prli\n", 1641 __func__, __LINE__, ea->fcport->port_name); 1642 ea->fcport->fc4f_nvme = 0; 1643 ea->fcport->n2n_flag = 0; 1644 qla24xx_post_prli_work(vha, ea->fcport); 1645 } 1646 ql_dbg(ql_dbg_disc, vha, 0x2119, 1647 "%s %d %8phC unhandle event of %x\n", 1648 __func__, __LINE__, ea->fcport->port_name, ea->data[0]); 1649 break; 1650 } 1651 } 1652 1653 static void 1654 qla24xx_handle_plogi_done_event(struct scsi_qla_host *vha, struct event_arg *ea) 1655 { 1656 port_id_t cid; /* conflict Nport id */ 1657 u16 lid; 1658 struct fc_port *conflict_fcport; 1659 unsigned long flags; 1660 struct fc_port *fcport = ea->fcport; 1661 1662 ql_dbg(ql_dbg_disc, vha, 0xffff, 1663 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d data %x|%x iop %x|%x\n", 1664 __func__, fcport->port_name, fcport->disc_state, 1665 fcport->fw_login_state, ea->rc, ea->sp->gen2, fcport->login_gen, 1666 ea->sp->gen2, fcport->rscn_gen|ea->sp->gen1, 1667 ea->data[0], ea->data[1], ea->iop[0], ea->iop[1]); 1668 1669 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) || 1670 (fcport->fw_login_state == DSC_LS_PRLI_PEND)) { 1671 ql_dbg(ql_dbg_disc, vha, 0x20ea, 1672 "%s %d %8phC Remote is trying to login\n", 1673 __func__, __LINE__, fcport->port_name); 1674 return; 1675 } 1676 1677 if (fcport->disc_state == DSC_DELETE_PEND) 1678 return; 1679 1680 if (ea->sp->gen2 != fcport->login_gen) { 1681 /* target side must have changed it. */ 1682 ql_dbg(ql_dbg_disc, vha, 0x20d3, 1683 "%s %8phC generation changed\n", 1684 __func__, fcport->port_name); 1685 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1686 return; 1687 } else if (ea->sp->gen1 != fcport->rscn_gen) { 1688 ql_dbg(ql_dbg_disc, vha, 0x20d4, "%s %d %8phC post gidpn\n", 1689 __func__, __LINE__, fcport->port_name); 1690 qla24xx_post_gidpn_work(vha, fcport); 1691 return; 1692 } 1693 1694 switch (ea->data[0]) { 1695 case MBS_COMMAND_COMPLETE: 1696 /* 1697 * Driver must validate login state - If PRLI not complete, 1698 * force a relogin attempt via implicit LOGO, PLOGI, and PRLI 1699 * requests. 1700 */ 1701 if (ea->fcport->fc4f_nvme) { 1702 ql_dbg(ql_dbg_disc, vha, 0x2117, 1703 "%s %d %8phC post prli\n", 1704 __func__, __LINE__, ea->fcport->port_name); 1705 qla24xx_post_prli_work(vha, ea->fcport); 1706 } else { 1707 ql_dbg(ql_dbg_disc, vha, 0x20ea, 1708 "%s %d %8phC LoopID 0x%x in use with %06x. post gnl\n", 1709 __func__, __LINE__, ea->fcport->port_name, 1710 ea->fcport->loop_id, ea->fcport->d_id.b24); 1711 1712 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map); 1713 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1714 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset; 1715 ea->fcport->logout_on_delete = 1; 1716 ea->fcport->send_els_logo = 0; 1717 ea->fcport->fw_login_state = DSC_LS_PRLI_COMP; 1718 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1719 1720 qla24xx_post_gpdb_work(vha, ea->fcport, 0); 1721 } 1722 break; 1723 case MBS_COMMAND_ERROR: 1724 ql_dbg(ql_dbg_disc, vha, 0x20eb, "%s %d %8phC cmd error %x\n", 1725 __func__, __LINE__, ea->fcport->port_name, ea->data[1]); 1726 1727 ea->fcport->flags &= ~FCF_ASYNC_SENT; 1728 ea->fcport->disc_state = DSC_LOGIN_FAILED; 1729 if (ea->data[1] & QLA_LOGIO_LOGIN_RETRIED) 1730 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1731 else 1732 qla2x00_mark_device_lost(vha, ea->fcport, 1, 0); 1733 break; 1734 case MBS_LOOP_ID_USED: 1735 /* data[1] = IO PARAM 1 = nport ID */ 1736 cid.b.domain = (ea->iop[1] >> 16) & 0xff; 1737 cid.b.area = (ea->iop[1] >> 8) & 0xff; 1738 cid.b.al_pa = ea->iop[1] & 0xff; 1739 cid.b.rsvd_1 = 0; 1740 1741 ql_dbg(ql_dbg_disc, vha, 0x20ec, 1742 "%s %d %8phC LoopID 0x%x in use post gnl\n", 1743 __func__, __LINE__, ea->fcport->port_name, 1744 ea->fcport->loop_id); 1745 1746 if (IS_SW_RESV_ADDR(cid)) { 1747 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map); 1748 ea->fcport->loop_id = FC_NO_LOOP_ID; 1749 } else { 1750 qla2x00_clear_loop_id(ea->fcport); 1751 } 1752 qla24xx_post_gnl_work(vha, ea->fcport); 1753 break; 1754 case MBS_PORT_ID_USED: 1755 ql_dbg(ql_dbg_disc, vha, 0x20ed, 1756 "%s %d %8phC NPortId %02x%02x%02x inuse post gidpn\n", 1757 __func__, __LINE__, ea->fcport->port_name, 1758 ea->fcport->d_id.b.domain, ea->fcport->d_id.b.area, 1759 ea->fcport->d_id.b.al_pa); 1760 1761 lid = ea->iop[1] & 0xffff; 1762 qlt_find_sess_invalidate_other(vha, 1763 wwn_to_u64(ea->fcport->port_name), 1764 ea->fcport->d_id, lid, &conflict_fcport); 1765 1766 if (conflict_fcport) { 1767 /* 1768 * Another fcport share the same loop_id/nport id. 1769 * Conflict fcport needs to finish cleanup before this 1770 * fcport can proceed to login. 1771 */ 1772 conflict_fcport->conflict = ea->fcport; 1773 ea->fcport->login_pause = 1; 1774 1775 ql_dbg(ql_dbg_disc, vha, 0x20ed, 1776 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. post gidpn\n", 1777 __func__, __LINE__, ea->fcport->port_name, 1778 ea->fcport->d_id.b24, lid); 1779 qla2x00_clear_loop_id(ea->fcport); 1780 qla24xx_post_gidpn_work(vha, ea->fcport); 1781 } else { 1782 ql_dbg(ql_dbg_disc, vha, 0x20ed, 1783 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. sched delete\n", 1784 __func__, __LINE__, ea->fcport->port_name, 1785 ea->fcport->d_id.b24, lid); 1786 1787 qla2x00_clear_loop_id(ea->fcport); 1788 set_bit(lid, vha->hw->loop_id_map); 1789 ea->fcport->loop_id = lid; 1790 ea->fcport->keep_nport_handle = 0; 1791 qlt_schedule_sess_for_deletion(ea->fcport); 1792 } 1793 break; 1794 } 1795 return; 1796 } 1797 1798 void 1799 qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport, 1800 uint16_t *data) 1801 { 1802 qla2x00_mark_device_lost(vha, fcport, 1, 0); 1803 qlt_logo_completion_handler(fcport, data[0]); 1804 fcport->login_gen++; 1805 fcport->flags &= ~FCF_ASYNC_ACTIVE; 1806 return; 1807 } 1808 1809 void 1810 qla2x00_async_adisc_done(struct scsi_qla_host *vha, fc_port_t *fcport, 1811 uint16_t *data) 1812 { 1813 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 1814 if (data[0] == MBS_COMMAND_COMPLETE) { 1815 qla2x00_update_fcport(vha, fcport); 1816 1817 return; 1818 } 1819 1820 /* Retry login. */ 1821 if (data[1] & QLA_LOGIO_LOGIN_RETRIED) 1822 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1823 else 1824 qla2x00_mark_device_lost(vha, fcport, 1, 0); 1825 1826 return; 1827 } 1828 1829 /****************************************************************************/ 1830 /* QLogic ISP2x00 Hardware Support Functions. */ 1831 /****************************************************************************/ 1832 1833 static int 1834 qla83xx_nic_core_fw_load(scsi_qla_host_t *vha) 1835 { 1836 int rval = QLA_SUCCESS; 1837 struct qla_hw_data *ha = vha->hw; 1838 uint32_t idc_major_ver, idc_minor_ver; 1839 uint16_t config[4]; 1840 1841 qla83xx_idc_lock(vha, 0); 1842 1843 /* SV: TODO: Assign initialization timeout from 1844 * flash-info / other param 1845 */ 1846 ha->fcoe_dev_init_timeout = QLA83XX_IDC_INITIALIZATION_TIMEOUT; 1847 ha->fcoe_reset_timeout = QLA83XX_IDC_RESET_ACK_TIMEOUT; 1848 1849 /* Set our fcoe function presence */ 1850 if (__qla83xx_set_drv_presence(vha) != QLA_SUCCESS) { 1851 ql_dbg(ql_dbg_p3p, vha, 0xb077, 1852 "Error while setting DRV-Presence.\n"); 1853 rval = QLA_FUNCTION_FAILED; 1854 goto exit; 1855 } 1856 1857 /* Decide the reset ownership */ 1858 qla83xx_reset_ownership(vha); 1859 1860 /* 1861 * On first protocol driver load: 1862 * Init-Owner: Set IDC-Major-Version and Clear IDC-Lock-Recovery 1863 * register. 1864 * Others: Check compatibility with current IDC Major version. 1865 */ 1866 qla83xx_rd_reg(vha, QLA83XX_IDC_MAJOR_VERSION, &idc_major_ver); 1867 if (ha->flags.nic_core_reset_owner) { 1868 /* Set IDC Major version */ 1869 idc_major_ver = QLA83XX_SUPP_IDC_MAJOR_VERSION; 1870 qla83xx_wr_reg(vha, QLA83XX_IDC_MAJOR_VERSION, idc_major_ver); 1871 1872 /* Clearing IDC-Lock-Recovery register */ 1873 qla83xx_wr_reg(vha, QLA83XX_IDC_LOCK_RECOVERY, 0); 1874 } else if (idc_major_ver != QLA83XX_SUPP_IDC_MAJOR_VERSION) { 1875 /* 1876 * Clear further IDC participation if we are not compatible with 1877 * the current IDC Major Version. 1878 */ 1879 ql_log(ql_log_warn, vha, 0xb07d, 1880 "Failing load, idc_major_ver=%d, expected_major_ver=%d.\n", 1881 idc_major_ver, QLA83XX_SUPP_IDC_MAJOR_VERSION); 1882 __qla83xx_clear_drv_presence(vha); 1883 rval = QLA_FUNCTION_FAILED; 1884 goto exit; 1885 } 1886 /* Each function sets its supported Minor version. */ 1887 qla83xx_rd_reg(vha, QLA83XX_IDC_MINOR_VERSION, &idc_minor_ver); 1888 idc_minor_ver |= (QLA83XX_SUPP_IDC_MINOR_VERSION << (ha->portnum * 2)); 1889 qla83xx_wr_reg(vha, QLA83XX_IDC_MINOR_VERSION, idc_minor_ver); 1890 1891 if (ha->flags.nic_core_reset_owner) { 1892 memset(config, 0, sizeof(config)); 1893 if (!qla81xx_get_port_config(vha, config)) 1894 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, 1895 QLA8XXX_DEV_READY); 1896 } 1897 1898 rval = qla83xx_idc_state_handler(vha); 1899 1900 exit: 1901 qla83xx_idc_unlock(vha, 0); 1902 1903 return rval; 1904 } 1905 1906 /* 1907 * qla2x00_initialize_adapter 1908 * Initialize board. 1909 * 1910 * Input: 1911 * ha = adapter block pointer. 1912 * 1913 * Returns: 1914 * 0 = success 1915 */ 1916 int 1917 qla2x00_initialize_adapter(scsi_qla_host_t *vha) 1918 { 1919 int rval; 1920 struct qla_hw_data *ha = vha->hw; 1921 struct req_que *req = ha->req_q_map[0]; 1922 1923 memset(&vha->qla_stats, 0, sizeof(vha->qla_stats)); 1924 memset(&vha->fc_host_stat, 0, sizeof(vha->fc_host_stat)); 1925 1926 /* Clear adapter flags. */ 1927 vha->flags.online = 0; 1928 ha->flags.chip_reset_done = 0; 1929 vha->flags.reset_active = 0; 1930 ha->flags.pci_channel_io_perm_failure = 0; 1931 ha->flags.eeh_busy = 0; 1932 vha->qla_stats.jiffies_at_last_reset = get_jiffies_64(); 1933 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 1934 atomic_set(&vha->loop_state, LOOP_DOWN); 1935 vha->device_flags = DFLG_NO_CABLE; 1936 vha->dpc_flags = 0; 1937 vha->flags.management_server_logged_in = 0; 1938 vha->marker_needed = 0; 1939 ha->isp_abort_cnt = 0; 1940 ha->beacon_blink_led = 0; 1941 1942 set_bit(0, ha->req_qid_map); 1943 set_bit(0, ha->rsp_qid_map); 1944 1945 ql_dbg(ql_dbg_init, vha, 0x0040, 1946 "Configuring PCI space...\n"); 1947 rval = ha->isp_ops->pci_config(vha); 1948 if (rval) { 1949 ql_log(ql_log_warn, vha, 0x0044, 1950 "Unable to configure PCI space.\n"); 1951 return (rval); 1952 } 1953 1954 ha->isp_ops->reset_chip(vha); 1955 1956 rval = qla2xxx_get_flash_info(vha); 1957 if (rval) { 1958 ql_log(ql_log_fatal, vha, 0x004f, 1959 "Unable to validate FLASH data.\n"); 1960 return rval; 1961 } 1962 1963 if (IS_QLA8044(ha)) { 1964 qla8044_read_reset_template(vha); 1965 1966 /* NOTE: If ql2xdontresethba==1, set IDC_CTRL DONTRESET_BIT0. 1967 * If DONRESET_BIT0 is set, drivers should not set dev_state 1968 * to NEED_RESET. But if NEED_RESET is set, drivers should 1969 * should honor the reset. */ 1970 if (ql2xdontresethba == 1) 1971 qla8044_set_idc_dontreset(vha); 1972 } 1973 1974 ha->isp_ops->get_flash_version(vha, req->ring); 1975 ql_dbg(ql_dbg_init, vha, 0x0061, 1976 "Configure NVRAM parameters...\n"); 1977 1978 ha->isp_ops->nvram_config(vha); 1979 1980 if (ha->flags.disable_serdes) { 1981 /* Mask HBA via NVRAM settings? */ 1982 ql_log(ql_log_info, vha, 0x0077, 1983 "Masking HBA WWPN %8phN (via NVRAM).\n", vha->port_name); 1984 return QLA_FUNCTION_FAILED; 1985 } 1986 1987 ql_dbg(ql_dbg_init, vha, 0x0078, 1988 "Verifying loaded RISC code...\n"); 1989 1990 if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) { 1991 rval = ha->isp_ops->chip_diag(vha); 1992 if (rval) 1993 return (rval); 1994 rval = qla2x00_setup_chip(vha); 1995 if (rval) 1996 return (rval); 1997 } 1998 1999 if (IS_QLA84XX(ha)) { 2000 ha->cs84xx = qla84xx_get_chip(vha); 2001 if (!ha->cs84xx) { 2002 ql_log(ql_log_warn, vha, 0x00d0, 2003 "Unable to configure ISP84XX.\n"); 2004 return QLA_FUNCTION_FAILED; 2005 } 2006 } 2007 2008 if (qla_ini_mode_enabled(vha) || qla_dual_mode_enabled(vha)) 2009 rval = qla2x00_init_rings(vha); 2010 2011 ha->flags.chip_reset_done = 1; 2012 2013 if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) { 2014 /* Issue verify 84xx FW IOCB to complete 84xx initialization */ 2015 rval = qla84xx_init_chip(vha); 2016 if (rval != QLA_SUCCESS) { 2017 ql_log(ql_log_warn, vha, 0x00d4, 2018 "Unable to initialize ISP84XX.\n"); 2019 qla84xx_put_chip(vha); 2020 } 2021 } 2022 2023 /* Load the NIC Core f/w if we are the first protocol driver. */ 2024 if (IS_QLA8031(ha)) { 2025 rval = qla83xx_nic_core_fw_load(vha); 2026 if (rval) 2027 ql_log(ql_log_warn, vha, 0x0124, 2028 "Error in initializing NIC Core f/w.\n"); 2029 } 2030 2031 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha)) 2032 qla24xx_read_fcp_prio_cfg(vha); 2033 2034 if (IS_P3P_TYPE(ha)) 2035 qla82xx_set_driver_version(vha, QLA2XXX_VERSION); 2036 else 2037 qla25xx_set_driver_version(vha, QLA2XXX_VERSION); 2038 2039 return (rval); 2040 } 2041 2042 /** 2043 * qla2100_pci_config() - Setup ISP21xx PCI configuration registers. 2044 * @vha: HA context 2045 * 2046 * Returns 0 on success. 2047 */ 2048 int 2049 qla2100_pci_config(scsi_qla_host_t *vha) 2050 { 2051 uint16_t w; 2052 unsigned long flags; 2053 struct qla_hw_data *ha = vha->hw; 2054 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2055 2056 pci_set_master(ha->pdev); 2057 pci_try_set_mwi(ha->pdev); 2058 2059 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2060 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2061 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2062 2063 pci_disable_rom(ha->pdev); 2064 2065 /* Get PCI bus information. */ 2066 spin_lock_irqsave(&ha->hardware_lock, flags); 2067 ha->pci_attr = RD_REG_WORD(®->ctrl_status); 2068 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2069 2070 return QLA_SUCCESS; 2071 } 2072 2073 /** 2074 * qla2300_pci_config() - Setup ISP23xx PCI configuration registers. 2075 * @vha: HA context 2076 * 2077 * Returns 0 on success. 2078 */ 2079 int 2080 qla2300_pci_config(scsi_qla_host_t *vha) 2081 { 2082 uint16_t w; 2083 unsigned long flags = 0; 2084 uint32_t cnt; 2085 struct qla_hw_data *ha = vha->hw; 2086 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2087 2088 pci_set_master(ha->pdev); 2089 pci_try_set_mwi(ha->pdev); 2090 2091 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2092 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2093 2094 if (IS_QLA2322(ha) || IS_QLA6322(ha)) 2095 w &= ~PCI_COMMAND_INTX_DISABLE; 2096 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2097 2098 /* 2099 * If this is a 2300 card and not 2312, reset the 2100 * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately, 2101 * the 2310 also reports itself as a 2300 so we need to get the 2102 * fb revision level -- a 6 indicates it really is a 2300 and 2103 * not a 2310. 2104 */ 2105 if (IS_QLA2300(ha)) { 2106 spin_lock_irqsave(&ha->hardware_lock, flags); 2107 2108 /* Pause RISC. */ 2109 WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); 2110 for (cnt = 0; cnt < 30000; cnt++) { 2111 if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) != 0) 2112 break; 2113 2114 udelay(10); 2115 } 2116 2117 /* Select FPM registers. */ 2118 WRT_REG_WORD(®->ctrl_status, 0x20); 2119 RD_REG_WORD(®->ctrl_status); 2120 2121 /* Get the fb rev level */ 2122 ha->fb_rev = RD_FB_CMD_REG(ha, reg); 2123 2124 if (ha->fb_rev == FPM_2300) 2125 pci_clear_mwi(ha->pdev); 2126 2127 /* Deselect FPM registers. */ 2128 WRT_REG_WORD(®->ctrl_status, 0x0); 2129 RD_REG_WORD(®->ctrl_status); 2130 2131 /* Release RISC module. */ 2132 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 2133 for (cnt = 0; cnt < 30000; cnt++) { 2134 if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) == 0) 2135 break; 2136 2137 udelay(10); 2138 } 2139 2140 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2141 } 2142 2143 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); 2144 2145 pci_disable_rom(ha->pdev); 2146 2147 /* Get PCI bus information. */ 2148 spin_lock_irqsave(&ha->hardware_lock, flags); 2149 ha->pci_attr = RD_REG_WORD(®->ctrl_status); 2150 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2151 2152 return QLA_SUCCESS; 2153 } 2154 2155 /** 2156 * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers. 2157 * @vha: HA context 2158 * 2159 * Returns 0 on success. 2160 */ 2161 int 2162 qla24xx_pci_config(scsi_qla_host_t *vha) 2163 { 2164 uint16_t w; 2165 unsigned long flags = 0; 2166 struct qla_hw_data *ha = vha->hw; 2167 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 2168 2169 pci_set_master(ha->pdev); 2170 pci_try_set_mwi(ha->pdev); 2171 2172 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2173 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2174 w &= ~PCI_COMMAND_INTX_DISABLE; 2175 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2176 2177 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); 2178 2179 /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */ 2180 if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX)) 2181 pcix_set_mmrbc(ha->pdev, 2048); 2182 2183 /* PCIe -- adjust Maximum Read Request Size (2048). */ 2184 if (pci_is_pcie(ha->pdev)) 2185 pcie_set_readrq(ha->pdev, 4096); 2186 2187 pci_disable_rom(ha->pdev); 2188 2189 ha->chip_revision = ha->pdev->revision; 2190 2191 /* Get PCI bus information. */ 2192 spin_lock_irqsave(&ha->hardware_lock, flags); 2193 ha->pci_attr = RD_REG_DWORD(®->ctrl_status); 2194 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2195 2196 return QLA_SUCCESS; 2197 } 2198 2199 /** 2200 * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers. 2201 * @vha: HA context 2202 * 2203 * Returns 0 on success. 2204 */ 2205 int 2206 qla25xx_pci_config(scsi_qla_host_t *vha) 2207 { 2208 uint16_t w; 2209 struct qla_hw_data *ha = vha->hw; 2210 2211 pci_set_master(ha->pdev); 2212 pci_try_set_mwi(ha->pdev); 2213 2214 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2215 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2216 w &= ~PCI_COMMAND_INTX_DISABLE; 2217 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2218 2219 /* PCIe -- adjust Maximum Read Request Size (2048). */ 2220 if (pci_is_pcie(ha->pdev)) 2221 pcie_set_readrq(ha->pdev, 4096); 2222 2223 pci_disable_rom(ha->pdev); 2224 2225 ha->chip_revision = ha->pdev->revision; 2226 2227 return QLA_SUCCESS; 2228 } 2229 2230 /** 2231 * qla2x00_isp_firmware() - Choose firmware image. 2232 * @vha: HA context 2233 * 2234 * Returns 0 on success. 2235 */ 2236 static int 2237 qla2x00_isp_firmware(scsi_qla_host_t *vha) 2238 { 2239 int rval; 2240 uint16_t loop_id, topo, sw_cap; 2241 uint8_t domain, area, al_pa; 2242 struct qla_hw_data *ha = vha->hw; 2243 2244 /* Assume loading risc code */ 2245 rval = QLA_FUNCTION_FAILED; 2246 2247 if (ha->flags.disable_risc_code_load) { 2248 ql_log(ql_log_info, vha, 0x0079, "RISC CODE NOT loaded.\n"); 2249 2250 /* Verify checksum of loaded RISC code. */ 2251 rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address); 2252 if (rval == QLA_SUCCESS) { 2253 /* And, verify we are not in ROM code. */ 2254 rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa, 2255 &area, &domain, &topo, &sw_cap); 2256 } 2257 } 2258 2259 if (rval) 2260 ql_dbg(ql_dbg_init, vha, 0x007a, 2261 "**** Load RISC code ****.\n"); 2262 2263 return (rval); 2264 } 2265 2266 /** 2267 * qla2x00_reset_chip() - Reset ISP chip. 2268 * @vha: HA context 2269 * 2270 * Returns 0 on success. 2271 */ 2272 void 2273 qla2x00_reset_chip(scsi_qla_host_t *vha) 2274 { 2275 unsigned long flags = 0; 2276 struct qla_hw_data *ha = vha->hw; 2277 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2278 uint32_t cnt; 2279 uint16_t cmd; 2280 2281 if (unlikely(pci_channel_offline(ha->pdev))) 2282 return; 2283 2284 ha->isp_ops->disable_intrs(ha); 2285 2286 spin_lock_irqsave(&ha->hardware_lock, flags); 2287 2288 /* Turn off master enable */ 2289 cmd = 0; 2290 pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd); 2291 cmd &= ~PCI_COMMAND_MASTER; 2292 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); 2293 2294 if (!IS_QLA2100(ha)) { 2295 /* Pause RISC. */ 2296 WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); 2297 if (IS_QLA2200(ha) || IS_QLA2300(ha)) { 2298 for (cnt = 0; cnt < 30000; cnt++) { 2299 if ((RD_REG_WORD(®->hccr) & 2300 HCCR_RISC_PAUSE) != 0) 2301 break; 2302 udelay(100); 2303 } 2304 } else { 2305 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2306 udelay(10); 2307 } 2308 2309 /* Select FPM registers. */ 2310 WRT_REG_WORD(®->ctrl_status, 0x20); 2311 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ 2312 2313 /* FPM Soft Reset. */ 2314 WRT_REG_WORD(®->fpm_diag_config, 0x100); 2315 RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */ 2316 2317 /* Toggle Fpm Reset. */ 2318 if (!IS_QLA2200(ha)) { 2319 WRT_REG_WORD(®->fpm_diag_config, 0x0); 2320 RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */ 2321 } 2322 2323 /* Select frame buffer registers. */ 2324 WRT_REG_WORD(®->ctrl_status, 0x10); 2325 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ 2326 2327 /* Reset frame buffer FIFOs. */ 2328 if (IS_QLA2200(ha)) { 2329 WRT_FB_CMD_REG(ha, reg, 0xa000); 2330 RD_FB_CMD_REG(ha, reg); /* PCI Posting. */ 2331 } else { 2332 WRT_FB_CMD_REG(ha, reg, 0x00fc); 2333 2334 /* Read back fb_cmd until zero or 3 seconds max */ 2335 for (cnt = 0; cnt < 3000; cnt++) { 2336 if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0) 2337 break; 2338 udelay(100); 2339 } 2340 } 2341 2342 /* Select RISC module registers. */ 2343 WRT_REG_WORD(®->ctrl_status, 0); 2344 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ 2345 2346 /* Reset RISC processor. */ 2347 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 2348 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2349 2350 /* Release RISC processor. */ 2351 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 2352 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2353 } 2354 2355 WRT_REG_WORD(®->hccr, HCCR_CLR_RISC_INT); 2356 WRT_REG_WORD(®->hccr, HCCR_CLR_HOST_INT); 2357 2358 /* Reset ISP chip. */ 2359 WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET); 2360 2361 /* Wait for RISC to recover from reset. */ 2362 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 2363 /* 2364 * It is necessary to for a delay here since the card doesn't 2365 * respond to PCI reads during a reset. On some architectures 2366 * this will result in an MCA. 2367 */ 2368 udelay(20); 2369 for (cnt = 30000; cnt; cnt--) { 2370 if ((RD_REG_WORD(®->ctrl_status) & 2371 CSR_ISP_SOFT_RESET) == 0) 2372 break; 2373 udelay(100); 2374 } 2375 } else 2376 udelay(10); 2377 2378 /* Reset RISC processor. */ 2379 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 2380 2381 WRT_REG_WORD(®->semaphore, 0); 2382 2383 /* Release RISC processor. */ 2384 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 2385 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2386 2387 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 2388 for (cnt = 0; cnt < 30000; cnt++) { 2389 if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY) 2390 break; 2391 2392 udelay(100); 2393 } 2394 } else 2395 udelay(100); 2396 2397 /* Turn on master enable */ 2398 cmd |= PCI_COMMAND_MASTER; 2399 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); 2400 2401 /* Disable RISC pause on FPM parity error. */ 2402 if (!IS_QLA2100(ha)) { 2403 WRT_REG_WORD(®->hccr, HCCR_DISABLE_PARITY_PAUSE); 2404 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2405 } 2406 2407 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2408 } 2409 2410 /** 2411 * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC. 2412 * @vha: HA context 2413 * 2414 * Returns 0 on success. 2415 */ 2416 static int 2417 qla81xx_reset_mpi(scsi_qla_host_t *vha) 2418 { 2419 uint16_t mb[4] = {0x1010, 0, 1, 0}; 2420 2421 if (!IS_QLA81XX(vha->hw)) 2422 return QLA_SUCCESS; 2423 2424 return qla81xx_write_mpi_register(vha, mb); 2425 } 2426 2427 /** 2428 * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC. 2429 * @vha: HA context 2430 * 2431 * Returns 0 on success. 2432 */ 2433 static inline int 2434 qla24xx_reset_risc(scsi_qla_host_t *vha) 2435 { 2436 unsigned long flags = 0; 2437 struct qla_hw_data *ha = vha->hw; 2438 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 2439 uint32_t cnt; 2440 uint16_t wd; 2441 static int abts_cnt; /* ISP abort retry counts */ 2442 int rval = QLA_SUCCESS; 2443 2444 spin_lock_irqsave(&ha->hardware_lock, flags); 2445 2446 /* Reset RISC. */ 2447 WRT_REG_DWORD(®->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); 2448 for (cnt = 0; cnt < 30000; cnt++) { 2449 if ((RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE) == 0) 2450 break; 2451 2452 udelay(10); 2453 } 2454 2455 if (!(RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE)) 2456 set_bit(DMA_SHUTDOWN_CMPL, &ha->fw_dump_cap_flags); 2457 2458 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017e, 2459 "HCCR: 0x%x, Control Status %x, DMA active status:0x%x\n", 2460 RD_REG_DWORD(®->hccr), 2461 RD_REG_DWORD(®->ctrl_status), 2462 (RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE)); 2463 2464 WRT_REG_DWORD(®->ctrl_status, 2465 CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); 2466 pci_read_config_word(ha->pdev, PCI_COMMAND, &wd); 2467 2468 udelay(100); 2469 2470 /* Wait for firmware to complete NVRAM accesses. */ 2471 RD_REG_WORD(®->mailbox0); 2472 for (cnt = 10000; RD_REG_WORD(®->mailbox0) != 0 && 2473 rval == QLA_SUCCESS; cnt--) { 2474 barrier(); 2475 if (cnt) 2476 udelay(5); 2477 else 2478 rval = QLA_FUNCTION_TIMEOUT; 2479 } 2480 2481 if (rval == QLA_SUCCESS) 2482 set_bit(ISP_MBX_RDY, &ha->fw_dump_cap_flags); 2483 2484 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017f, 2485 "HCCR: 0x%x, MailBox0 Status 0x%x\n", 2486 RD_REG_DWORD(®->hccr), 2487 RD_REG_DWORD(®->mailbox0)); 2488 2489 /* Wait for soft-reset to complete. */ 2490 RD_REG_DWORD(®->ctrl_status); 2491 for (cnt = 0; cnt < 60; cnt++) { 2492 barrier(); 2493 if ((RD_REG_DWORD(®->ctrl_status) & 2494 CSRX_ISP_SOFT_RESET) == 0) 2495 break; 2496 2497 udelay(5); 2498 } 2499 if (!(RD_REG_DWORD(®->ctrl_status) & CSRX_ISP_SOFT_RESET)) 2500 set_bit(ISP_SOFT_RESET_CMPL, &ha->fw_dump_cap_flags); 2501 2502 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015d, 2503 "HCCR: 0x%x, Soft Reset status: 0x%x\n", 2504 RD_REG_DWORD(®->hccr), 2505 RD_REG_DWORD(®->ctrl_status)); 2506 2507 /* If required, do an MPI FW reset now */ 2508 if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) { 2509 if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) { 2510 if (++abts_cnt < 5) { 2511 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 2512 set_bit(MPI_RESET_NEEDED, &vha->dpc_flags); 2513 } else { 2514 /* 2515 * We exhausted the ISP abort retries. We have to 2516 * set the board offline. 2517 */ 2518 abts_cnt = 0; 2519 vha->flags.online = 0; 2520 } 2521 } 2522 } 2523 2524 WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET); 2525 RD_REG_DWORD(®->hccr); 2526 2527 WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE); 2528 RD_REG_DWORD(®->hccr); 2529 2530 WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_RESET); 2531 RD_REG_DWORD(®->hccr); 2532 2533 RD_REG_WORD(®->mailbox0); 2534 for (cnt = 60; RD_REG_WORD(®->mailbox0) != 0 && 2535 rval == QLA_SUCCESS; cnt--) { 2536 barrier(); 2537 if (cnt) 2538 udelay(5); 2539 else 2540 rval = QLA_FUNCTION_TIMEOUT; 2541 } 2542 if (rval == QLA_SUCCESS) 2543 set_bit(RISC_RDY_AFT_RESET, &ha->fw_dump_cap_flags); 2544 2545 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015e, 2546 "Host Risc 0x%x, mailbox0 0x%x\n", 2547 RD_REG_DWORD(®->hccr), 2548 RD_REG_WORD(®->mailbox0)); 2549 2550 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2551 2552 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015f, 2553 "Driver in %s mode\n", 2554 IS_NOPOLLING_TYPE(ha) ? "Interrupt" : "Polling"); 2555 2556 if (IS_NOPOLLING_TYPE(ha)) 2557 ha->isp_ops->enable_intrs(ha); 2558 2559 return rval; 2560 } 2561 2562 static void 2563 qla25xx_read_risc_sema_reg(scsi_qla_host_t *vha, uint32_t *data) 2564 { 2565 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24; 2566 2567 WRT_REG_DWORD(®->iobase_addr, RISC_REGISTER_BASE_OFFSET); 2568 *data = RD_REG_DWORD(®->iobase_window + RISC_REGISTER_WINDOW_OFFET); 2569 2570 } 2571 2572 static void 2573 qla25xx_write_risc_sema_reg(scsi_qla_host_t *vha, uint32_t data) 2574 { 2575 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24; 2576 2577 WRT_REG_DWORD(®->iobase_addr, RISC_REGISTER_BASE_OFFSET); 2578 WRT_REG_DWORD(®->iobase_window + RISC_REGISTER_WINDOW_OFFET, data); 2579 } 2580 2581 static void 2582 qla25xx_manipulate_risc_semaphore(scsi_qla_host_t *vha) 2583 { 2584 uint32_t wd32 = 0; 2585 uint delta_msec = 100; 2586 uint elapsed_msec = 0; 2587 uint timeout_msec; 2588 ulong n; 2589 2590 if (vha->hw->pdev->subsystem_device != 0x0175 && 2591 vha->hw->pdev->subsystem_device != 0x0240) 2592 return; 2593 2594 WRT_REG_DWORD(&vha->hw->iobase->isp24.hccr, HCCRX_SET_RISC_PAUSE); 2595 udelay(100); 2596 2597 attempt: 2598 timeout_msec = TIMEOUT_SEMAPHORE; 2599 n = timeout_msec / delta_msec; 2600 while (n--) { 2601 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_SET); 2602 qla25xx_read_risc_sema_reg(vha, &wd32); 2603 if (wd32 & RISC_SEMAPHORE) 2604 break; 2605 msleep(delta_msec); 2606 elapsed_msec += delta_msec; 2607 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED) 2608 goto force; 2609 } 2610 2611 if (!(wd32 & RISC_SEMAPHORE)) 2612 goto force; 2613 2614 if (!(wd32 & RISC_SEMAPHORE_FORCE)) 2615 goto acquired; 2616 2617 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_CLR); 2618 timeout_msec = TIMEOUT_SEMAPHORE_FORCE; 2619 n = timeout_msec / delta_msec; 2620 while (n--) { 2621 qla25xx_read_risc_sema_reg(vha, &wd32); 2622 if (!(wd32 & RISC_SEMAPHORE_FORCE)) 2623 break; 2624 msleep(delta_msec); 2625 elapsed_msec += delta_msec; 2626 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED) 2627 goto force; 2628 } 2629 2630 if (wd32 & RISC_SEMAPHORE_FORCE) 2631 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_CLR); 2632 2633 goto attempt; 2634 2635 force: 2636 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_SET); 2637 2638 acquired: 2639 return; 2640 } 2641 2642 /** 2643 * qla24xx_reset_chip() - Reset ISP24xx chip. 2644 * @vha: HA context 2645 * 2646 * Returns 0 on success. 2647 */ 2648 void 2649 qla24xx_reset_chip(scsi_qla_host_t *vha) 2650 { 2651 struct qla_hw_data *ha = vha->hw; 2652 2653 if (pci_channel_offline(ha->pdev) && 2654 ha->flags.pci_channel_io_perm_failure) { 2655 return; 2656 } 2657 2658 ha->isp_ops->disable_intrs(ha); 2659 2660 qla25xx_manipulate_risc_semaphore(vha); 2661 2662 /* Perform RISC reset. */ 2663 qla24xx_reset_risc(vha); 2664 } 2665 2666 /** 2667 * qla2x00_chip_diag() - Test chip for proper operation. 2668 * @vha: HA context 2669 * 2670 * Returns 0 on success. 2671 */ 2672 int 2673 qla2x00_chip_diag(scsi_qla_host_t *vha) 2674 { 2675 int rval; 2676 struct qla_hw_data *ha = vha->hw; 2677 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2678 unsigned long flags = 0; 2679 uint16_t data; 2680 uint32_t cnt; 2681 uint16_t mb[5]; 2682 struct req_que *req = ha->req_q_map[0]; 2683 2684 /* Assume a failed state */ 2685 rval = QLA_FUNCTION_FAILED; 2686 2687 ql_dbg(ql_dbg_init, vha, 0x007b, "Testing device at %p.\n", 2688 ®->flash_address); 2689 2690 spin_lock_irqsave(&ha->hardware_lock, flags); 2691 2692 /* Reset ISP chip. */ 2693 WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET); 2694 2695 /* 2696 * We need to have a delay here since the card will not respond while 2697 * in reset causing an MCA on some architectures. 2698 */ 2699 udelay(20); 2700 data = qla2x00_debounce_register(®->ctrl_status); 2701 for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) { 2702 udelay(5); 2703 data = RD_REG_WORD(®->ctrl_status); 2704 barrier(); 2705 } 2706 2707 if (!cnt) 2708 goto chip_diag_failed; 2709 2710 ql_dbg(ql_dbg_init, vha, 0x007c, 2711 "Reset register cleared by chip reset.\n"); 2712 2713 /* Reset RISC processor. */ 2714 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 2715 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 2716 2717 /* Workaround for QLA2312 PCI parity error */ 2718 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 2719 data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0)); 2720 for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) { 2721 udelay(5); 2722 data = RD_MAILBOX_REG(ha, reg, 0); 2723 barrier(); 2724 } 2725 } else 2726 udelay(10); 2727 2728 if (!cnt) 2729 goto chip_diag_failed; 2730 2731 /* Check product ID of chip */ 2732 ql_dbg(ql_dbg_init, vha, 0x007d, "Checking product ID of chip.\n"); 2733 2734 mb[1] = RD_MAILBOX_REG(ha, reg, 1); 2735 mb[2] = RD_MAILBOX_REG(ha, reg, 2); 2736 mb[3] = RD_MAILBOX_REG(ha, reg, 3); 2737 mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4)); 2738 if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) || 2739 mb[3] != PROD_ID_3) { 2740 ql_log(ql_log_warn, vha, 0x0062, 2741 "Wrong product ID = 0x%x,0x%x,0x%x.\n", 2742 mb[1], mb[2], mb[3]); 2743 2744 goto chip_diag_failed; 2745 } 2746 ha->product_id[0] = mb[1]; 2747 ha->product_id[1] = mb[2]; 2748 ha->product_id[2] = mb[3]; 2749 ha->product_id[3] = mb[4]; 2750 2751 /* Adjust fw RISC transfer size */ 2752 if (req->length > 1024) 2753 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024; 2754 else 2755 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 2756 req->length; 2757 2758 if (IS_QLA2200(ha) && 2759 RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) { 2760 /* Limit firmware transfer size with a 2200A */ 2761 ql_dbg(ql_dbg_init, vha, 0x007e, "Found QLA2200A Chip.\n"); 2762 2763 ha->device_type |= DT_ISP2200A; 2764 ha->fw_transfer_size = 128; 2765 } 2766 2767 /* Wrap Incoming Mailboxes Test. */ 2768 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2769 2770 ql_dbg(ql_dbg_init, vha, 0x007f, "Checking mailboxes.\n"); 2771 rval = qla2x00_mbx_reg_test(vha); 2772 if (rval) 2773 ql_log(ql_log_warn, vha, 0x0080, 2774 "Failed mailbox send register test.\n"); 2775 else 2776 /* Flag a successful rval */ 2777 rval = QLA_SUCCESS; 2778 spin_lock_irqsave(&ha->hardware_lock, flags); 2779 2780 chip_diag_failed: 2781 if (rval) 2782 ql_log(ql_log_info, vha, 0x0081, 2783 "Chip diagnostics **** FAILED ****.\n"); 2784 2785 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2786 2787 return (rval); 2788 } 2789 2790 /** 2791 * qla24xx_chip_diag() - Test ISP24xx for proper operation. 2792 * @vha: HA context 2793 * 2794 * Returns 0 on success. 2795 */ 2796 int 2797 qla24xx_chip_diag(scsi_qla_host_t *vha) 2798 { 2799 int rval; 2800 struct qla_hw_data *ha = vha->hw; 2801 struct req_que *req = ha->req_q_map[0]; 2802 2803 if (IS_P3P_TYPE(ha)) 2804 return QLA_SUCCESS; 2805 2806 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length; 2807 2808 rval = qla2x00_mbx_reg_test(vha); 2809 if (rval) { 2810 ql_log(ql_log_warn, vha, 0x0082, 2811 "Failed mailbox send register test.\n"); 2812 } else { 2813 /* Flag a successful rval */ 2814 rval = QLA_SUCCESS; 2815 } 2816 2817 return rval; 2818 } 2819 2820 static void 2821 qla2x00_alloc_offload_mem(scsi_qla_host_t *vha) 2822 { 2823 int rval; 2824 dma_addr_t tc_dma; 2825 void *tc; 2826 struct qla_hw_data *ha = vha->hw; 2827 2828 if (ha->eft) { 2829 ql_dbg(ql_dbg_init, vha, 0x00bd, 2830 "%s: Offload Mem is already allocated.\n", 2831 __func__); 2832 return; 2833 } 2834 2835 if (IS_FWI2_CAPABLE(ha)) { 2836 /* Allocate memory for Fibre Channel Event Buffer. */ 2837 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) && 2838 !IS_QLA27XX(ha)) 2839 goto try_eft; 2840 2841 if (ha->fce) 2842 dma_free_coherent(&ha->pdev->dev, 2843 FCE_SIZE, ha->fce, ha->fce_dma); 2844 2845 /* Allocate memory for Fibre Channel Event Buffer. */ 2846 tc = dma_zalloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma, 2847 GFP_KERNEL); 2848 if (!tc) { 2849 ql_log(ql_log_warn, vha, 0x00be, 2850 "Unable to allocate (%d KB) for FCE.\n", 2851 FCE_SIZE / 1024); 2852 goto try_eft; 2853 } 2854 2855 rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS, 2856 ha->fce_mb, &ha->fce_bufs); 2857 if (rval) { 2858 ql_log(ql_log_warn, vha, 0x00bf, 2859 "Unable to initialize FCE (%d).\n", rval); 2860 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc, 2861 tc_dma); 2862 ha->flags.fce_enabled = 0; 2863 goto try_eft; 2864 } 2865 ql_dbg(ql_dbg_init, vha, 0x00c0, 2866 "Allocate (%d KB) for FCE...\n", FCE_SIZE / 1024); 2867 2868 ha->flags.fce_enabled = 1; 2869 ha->fce_dma = tc_dma; 2870 ha->fce = tc; 2871 2872 try_eft: 2873 if (ha->eft) 2874 dma_free_coherent(&ha->pdev->dev, 2875 EFT_SIZE, ha->eft, ha->eft_dma); 2876 2877 /* Allocate memory for Extended Trace Buffer. */ 2878 tc = dma_zalloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma, 2879 GFP_KERNEL); 2880 if (!tc) { 2881 ql_log(ql_log_warn, vha, 0x00c1, 2882 "Unable to allocate (%d KB) for EFT.\n", 2883 EFT_SIZE / 1024); 2884 goto eft_err; 2885 } 2886 2887 rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS); 2888 if (rval) { 2889 ql_log(ql_log_warn, vha, 0x00c2, 2890 "Unable to initialize EFT (%d).\n", rval); 2891 dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc, 2892 tc_dma); 2893 goto eft_err; 2894 } 2895 ql_dbg(ql_dbg_init, vha, 0x00c3, 2896 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024); 2897 2898 ha->eft_dma = tc_dma; 2899 ha->eft = tc; 2900 } 2901 2902 eft_err: 2903 return; 2904 } 2905 2906 void 2907 qla2x00_alloc_fw_dump(scsi_qla_host_t *vha) 2908 { 2909 uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size, 2910 eft_size, fce_size, mq_size; 2911 struct qla_hw_data *ha = vha->hw; 2912 struct req_que *req = ha->req_q_map[0]; 2913 struct rsp_que *rsp = ha->rsp_q_map[0]; 2914 struct qla2xxx_fw_dump *fw_dump; 2915 2916 dump_size = fixed_size = mem_size = eft_size = fce_size = mq_size = 0; 2917 req_q_size = rsp_q_size = 0; 2918 2919 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { 2920 fixed_size = sizeof(struct qla2100_fw_dump); 2921 } else if (IS_QLA23XX(ha)) { 2922 fixed_size = offsetof(struct qla2300_fw_dump, data_ram); 2923 mem_size = (ha->fw_memory_size - 0x11000 + 1) * 2924 sizeof(uint16_t); 2925 } else if (IS_FWI2_CAPABLE(ha)) { 2926 if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) 2927 fixed_size = offsetof(struct qla83xx_fw_dump, ext_mem); 2928 else if (IS_QLA81XX(ha)) 2929 fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem); 2930 else if (IS_QLA25XX(ha)) 2931 fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem); 2932 else 2933 fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem); 2934 2935 mem_size = (ha->fw_memory_size - 0x100000 + 1) * 2936 sizeof(uint32_t); 2937 if (ha->mqenable) { 2938 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha)) 2939 mq_size = sizeof(struct qla2xxx_mq_chain); 2940 /* 2941 * Allocate maximum buffer size for all queues. 2942 * Resizing must be done at end-of-dump processing. 2943 */ 2944 mq_size += ha->max_req_queues * 2945 (req->length * sizeof(request_t)); 2946 mq_size += ha->max_rsp_queues * 2947 (rsp->length * sizeof(response_t)); 2948 } 2949 if (ha->tgt.atio_ring) 2950 mq_size += ha->tgt.atio_q_length * sizeof(request_t); 2951 /* Allocate memory for Fibre Channel Event Buffer. */ 2952 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) && 2953 !IS_QLA27XX(ha)) 2954 goto try_eft; 2955 2956 fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE; 2957 try_eft: 2958 ql_dbg(ql_dbg_init, vha, 0x00c3, 2959 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024); 2960 eft_size = EFT_SIZE; 2961 } 2962 2963 if (IS_QLA27XX(ha)) { 2964 if (!ha->fw_dump_template) { 2965 ql_log(ql_log_warn, vha, 0x00ba, 2966 "Failed missing fwdump template\n"); 2967 return; 2968 } 2969 dump_size = qla27xx_fwdt_calculate_dump_size(vha); 2970 ql_dbg(ql_dbg_init, vha, 0x00fa, 2971 "-> allocating fwdump (%x bytes)...\n", dump_size); 2972 goto allocate; 2973 } 2974 2975 req_q_size = req->length * sizeof(request_t); 2976 rsp_q_size = rsp->length * sizeof(response_t); 2977 dump_size = offsetof(struct qla2xxx_fw_dump, isp); 2978 dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size; 2979 ha->chain_offset = dump_size; 2980 dump_size += mq_size + fce_size; 2981 2982 if (ha->exchoffld_buf) 2983 dump_size += sizeof(struct qla2xxx_offld_chain) + 2984 ha->exchoffld_size; 2985 if (ha->exlogin_buf) 2986 dump_size += sizeof(struct qla2xxx_offld_chain) + 2987 ha->exlogin_size; 2988 2989 allocate: 2990 if (!ha->fw_dump_len || dump_size != ha->fw_dump_len) { 2991 fw_dump = vmalloc(dump_size); 2992 if (!fw_dump) { 2993 ql_log(ql_log_warn, vha, 0x00c4, 2994 "Unable to allocate (%d KB) for firmware dump.\n", 2995 dump_size / 1024); 2996 } else { 2997 if (ha->fw_dump) 2998 vfree(ha->fw_dump); 2999 ha->fw_dump = fw_dump; 3000 3001 ha->fw_dump_len = dump_size; 3002 ql_dbg(ql_dbg_init, vha, 0x00c5, 3003 "Allocated (%d KB) for firmware dump.\n", 3004 dump_size / 1024); 3005 3006 if (IS_QLA27XX(ha)) 3007 return; 3008 3009 ha->fw_dump->signature[0] = 'Q'; 3010 ha->fw_dump->signature[1] = 'L'; 3011 ha->fw_dump->signature[2] = 'G'; 3012 ha->fw_dump->signature[3] = 'C'; 3013 ha->fw_dump->version = htonl(1); 3014 3015 ha->fw_dump->fixed_size = htonl(fixed_size); 3016 ha->fw_dump->mem_size = htonl(mem_size); 3017 ha->fw_dump->req_q_size = htonl(req_q_size); 3018 ha->fw_dump->rsp_q_size = htonl(rsp_q_size); 3019 3020 ha->fw_dump->eft_size = htonl(eft_size); 3021 ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma)); 3022 ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma)); 3023 3024 ha->fw_dump->header_size = 3025 htonl(offsetof(struct qla2xxx_fw_dump, isp)); 3026 } 3027 } 3028 } 3029 3030 static int 3031 qla81xx_mpi_sync(scsi_qla_host_t *vha) 3032 { 3033 #define MPS_MASK 0xe0 3034 int rval; 3035 uint16_t dc; 3036 uint32_t dw; 3037 3038 if (!IS_QLA81XX(vha->hw)) 3039 return QLA_SUCCESS; 3040 3041 rval = qla2x00_write_ram_word(vha, 0x7c00, 1); 3042 if (rval != QLA_SUCCESS) { 3043 ql_log(ql_log_warn, vha, 0x0105, 3044 "Unable to acquire semaphore.\n"); 3045 goto done; 3046 } 3047 3048 pci_read_config_word(vha->hw->pdev, 0x54, &dc); 3049 rval = qla2x00_read_ram_word(vha, 0x7a15, &dw); 3050 if (rval != QLA_SUCCESS) { 3051 ql_log(ql_log_warn, vha, 0x0067, "Unable to read sync.\n"); 3052 goto done_release; 3053 } 3054 3055 dc &= MPS_MASK; 3056 if (dc == (dw & MPS_MASK)) 3057 goto done_release; 3058 3059 dw &= ~MPS_MASK; 3060 dw |= dc; 3061 rval = qla2x00_write_ram_word(vha, 0x7a15, dw); 3062 if (rval != QLA_SUCCESS) { 3063 ql_log(ql_log_warn, vha, 0x0114, "Unable to gain sync.\n"); 3064 } 3065 3066 done_release: 3067 rval = qla2x00_write_ram_word(vha, 0x7c00, 0); 3068 if (rval != QLA_SUCCESS) { 3069 ql_log(ql_log_warn, vha, 0x006d, 3070 "Unable to release semaphore.\n"); 3071 } 3072 3073 done: 3074 return rval; 3075 } 3076 3077 int 3078 qla2x00_alloc_outstanding_cmds(struct qla_hw_data *ha, struct req_que *req) 3079 { 3080 /* Don't try to reallocate the array */ 3081 if (req->outstanding_cmds) 3082 return QLA_SUCCESS; 3083 3084 if (!IS_FWI2_CAPABLE(ha)) 3085 req->num_outstanding_cmds = DEFAULT_OUTSTANDING_COMMANDS; 3086 else { 3087 if (ha->cur_fw_xcb_count <= ha->cur_fw_iocb_count) 3088 req->num_outstanding_cmds = ha->cur_fw_xcb_count; 3089 else 3090 req->num_outstanding_cmds = ha->cur_fw_iocb_count; 3091 } 3092 3093 req->outstanding_cmds = kcalloc(req->num_outstanding_cmds, 3094 sizeof(srb_t *), 3095 GFP_KERNEL); 3096 3097 if (!req->outstanding_cmds) { 3098 /* 3099 * Try to allocate a minimal size just so we can get through 3100 * initialization. 3101 */ 3102 req->num_outstanding_cmds = MIN_OUTSTANDING_COMMANDS; 3103 req->outstanding_cmds = kcalloc(req->num_outstanding_cmds, 3104 sizeof(srb_t *), 3105 GFP_KERNEL); 3106 3107 if (!req->outstanding_cmds) { 3108 ql_log(ql_log_fatal, NULL, 0x0126, 3109 "Failed to allocate memory for " 3110 "outstanding_cmds for req_que %p.\n", req); 3111 req->num_outstanding_cmds = 0; 3112 return QLA_FUNCTION_FAILED; 3113 } 3114 } 3115 3116 return QLA_SUCCESS; 3117 } 3118 3119 #define PRINT_FIELD(_field, _flag, _str) { \ 3120 if (a0->_field & _flag) {\ 3121 if (p) {\ 3122 strcat(ptr, "|");\ 3123 ptr++;\ 3124 leftover--;\ 3125 } \ 3126 len = snprintf(ptr, leftover, "%s", _str); \ 3127 p = 1;\ 3128 leftover -= len;\ 3129 ptr += len; \ 3130 } \ 3131 } 3132 3133 static void qla2xxx_print_sfp_info(struct scsi_qla_host *vha) 3134 { 3135 #define STR_LEN 64 3136 struct sff_8247_a0 *a0 = (struct sff_8247_a0 *)vha->hw->sfp_data; 3137 u8 str[STR_LEN], *ptr, p; 3138 int leftover, len; 3139 3140 memset(str, 0, STR_LEN); 3141 snprintf(str, SFF_VEN_NAME_LEN+1, a0->vendor_name); 3142 ql_dbg(ql_dbg_init, vha, 0x015a, 3143 "SFP MFG Name: %s\n", str); 3144 3145 memset(str, 0, STR_LEN); 3146 snprintf(str, SFF_PART_NAME_LEN+1, a0->vendor_pn); 3147 ql_dbg(ql_dbg_init, vha, 0x015c, 3148 "SFP Part Name: %s\n", str); 3149 3150 /* media */ 3151 memset(str, 0, STR_LEN); 3152 ptr = str; 3153 leftover = STR_LEN; 3154 p = len = 0; 3155 PRINT_FIELD(fc_med_cc9, FC_MED_TW, "Twin AX"); 3156 PRINT_FIELD(fc_med_cc9, FC_MED_TP, "Twisted Pair"); 3157 PRINT_FIELD(fc_med_cc9, FC_MED_MI, "Min Coax"); 3158 PRINT_FIELD(fc_med_cc9, FC_MED_TV, "Video Coax"); 3159 PRINT_FIELD(fc_med_cc9, FC_MED_M6, "MultiMode 62.5um"); 3160 PRINT_FIELD(fc_med_cc9, FC_MED_M5, "MultiMode 50um"); 3161 PRINT_FIELD(fc_med_cc9, FC_MED_SM, "SingleMode"); 3162 ql_dbg(ql_dbg_init, vha, 0x0160, 3163 "SFP Media: %s\n", str); 3164 3165 /* link length */ 3166 memset(str, 0, STR_LEN); 3167 ptr = str; 3168 leftover = STR_LEN; 3169 p = len = 0; 3170 PRINT_FIELD(fc_ll_cc7, FC_LL_VL, "Very Long"); 3171 PRINT_FIELD(fc_ll_cc7, FC_LL_S, "Short"); 3172 PRINT_FIELD(fc_ll_cc7, FC_LL_I, "Intermediate"); 3173 PRINT_FIELD(fc_ll_cc7, FC_LL_L, "Long"); 3174 PRINT_FIELD(fc_ll_cc7, FC_LL_M, "Medium"); 3175 ql_dbg(ql_dbg_init, vha, 0x0196, 3176 "SFP Link Length: %s\n", str); 3177 3178 memset(str, 0, STR_LEN); 3179 ptr = str; 3180 leftover = STR_LEN; 3181 p = len = 0; 3182 PRINT_FIELD(fc_ll_cc7, FC_LL_SA, "Short Wave (SA)"); 3183 PRINT_FIELD(fc_ll_cc7, FC_LL_LC, "Long Wave(LC)"); 3184 PRINT_FIELD(fc_tec_cc8, FC_TEC_SN, "Short Wave (SN)"); 3185 PRINT_FIELD(fc_tec_cc8, FC_TEC_SL, "Short Wave (SL)"); 3186 PRINT_FIELD(fc_tec_cc8, FC_TEC_LL, "Long Wave (LL)"); 3187 ql_dbg(ql_dbg_init, vha, 0x016e, 3188 "SFP FC Link Tech: %s\n", str); 3189 3190 if (a0->length_km) 3191 ql_dbg(ql_dbg_init, vha, 0x016f, 3192 "SFP Distant: %d km\n", a0->length_km); 3193 if (a0->length_100m) 3194 ql_dbg(ql_dbg_init, vha, 0x0170, 3195 "SFP Distant: %d m\n", a0->length_100m*100); 3196 if (a0->length_50um_10m) 3197 ql_dbg(ql_dbg_init, vha, 0x0189, 3198 "SFP Distant (WL=50um): %d m\n", a0->length_50um_10m * 10); 3199 if (a0->length_62um_10m) 3200 ql_dbg(ql_dbg_init, vha, 0x018a, 3201 "SFP Distant (WL=62.5um): %d m\n", a0->length_62um_10m * 10); 3202 if (a0->length_om4_10m) 3203 ql_dbg(ql_dbg_init, vha, 0x0194, 3204 "SFP Distant (OM4): %d m\n", a0->length_om4_10m * 10); 3205 if (a0->length_om3_10m) 3206 ql_dbg(ql_dbg_init, vha, 0x0195, 3207 "SFP Distant (OM3): %d m\n", a0->length_om3_10m * 10); 3208 } 3209 3210 3211 /* 3212 * Return Code: 3213 * QLA_SUCCESS: no action 3214 * QLA_INTERFACE_ERROR: SFP is not there. 3215 * QLA_FUNCTION_FAILED: detected New SFP 3216 */ 3217 int 3218 qla24xx_detect_sfp(scsi_qla_host_t *vha) 3219 { 3220 int rc = QLA_SUCCESS; 3221 struct sff_8247_a0 *a; 3222 struct qla_hw_data *ha = vha->hw; 3223 3224 if (!AUTO_DETECT_SFP_SUPPORT(vha)) 3225 goto out; 3226 3227 rc = qla2x00_read_sfp_dev(vha, NULL, 0); 3228 if (rc) 3229 goto out; 3230 3231 a = (struct sff_8247_a0 *)vha->hw->sfp_data; 3232 qla2xxx_print_sfp_info(vha); 3233 3234 if (a->fc_ll_cc7 & FC_LL_VL || a->fc_ll_cc7 & FC_LL_L) { 3235 /* long range */ 3236 ha->flags.detected_lr_sfp = 1; 3237 3238 if (a->length_km > 5 || a->length_100m > 50) 3239 ha->long_range_distance = LR_DISTANCE_10K; 3240 else 3241 ha->long_range_distance = LR_DISTANCE_5K; 3242 3243 if (ha->flags.detected_lr_sfp != ha->flags.using_lr_setting) 3244 ql_dbg(ql_dbg_async, vha, 0x507b, 3245 "Detected Long Range SFP.\n"); 3246 } else { 3247 /* short range */ 3248 ha->flags.detected_lr_sfp = 0; 3249 if (ha->flags.using_lr_setting) 3250 ql_dbg(ql_dbg_async, vha, 0x5084, 3251 "Detected Short Range SFP.\n"); 3252 } 3253 3254 if (!vha->flags.init_done) 3255 rc = QLA_SUCCESS; 3256 out: 3257 return rc; 3258 } 3259 3260 /** 3261 * qla2x00_setup_chip() - Load and start RISC firmware. 3262 * @vha: HA context 3263 * 3264 * Returns 0 on success. 3265 */ 3266 static int 3267 qla2x00_setup_chip(scsi_qla_host_t *vha) 3268 { 3269 int rval; 3270 uint32_t srisc_address = 0; 3271 struct qla_hw_data *ha = vha->hw; 3272 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 3273 unsigned long flags; 3274 uint16_t fw_major_version; 3275 3276 if (IS_P3P_TYPE(ha)) { 3277 rval = ha->isp_ops->load_risc(vha, &srisc_address); 3278 if (rval == QLA_SUCCESS) { 3279 qla2x00_stop_firmware(vha); 3280 goto enable_82xx_npiv; 3281 } else 3282 goto failed; 3283 } 3284 3285 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { 3286 /* Disable SRAM, Instruction RAM and GP RAM parity. */ 3287 spin_lock_irqsave(&ha->hardware_lock, flags); 3288 WRT_REG_WORD(®->hccr, (HCCR_ENABLE_PARITY + 0x0)); 3289 RD_REG_WORD(®->hccr); 3290 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3291 } 3292 3293 qla81xx_mpi_sync(vha); 3294 3295 /* Load firmware sequences */ 3296 rval = ha->isp_ops->load_risc(vha, &srisc_address); 3297 if (rval == QLA_SUCCESS) { 3298 ql_dbg(ql_dbg_init, vha, 0x00c9, 3299 "Verifying Checksum of loaded RISC code.\n"); 3300 3301 rval = qla2x00_verify_checksum(vha, srisc_address); 3302 if (rval == QLA_SUCCESS) { 3303 /* Start firmware execution. */ 3304 ql_dbg(ql_dbg_init, vha, 0x00ca, 3305 "Starting firmware.\n"); 3306 3307 if (ql2xexlogins) 3308 ha->flags.exlogins_enabled = 1; 3309 3310 if (qla_is_exch_offld_enabled(vha)) 3311 ha->flags.exchoffld_enabled = 1; 3312 3313 rval = qla2x00_execute_fw(vha, srisc_address); 3314 /* Retrieve firmware information. */ 3315 if (rval == QLA_SUCCESS) { 3316 qla24xx_detect_sfp(vha); 3317 3318 rval = qla2x00_set_exlogins_buffer(vha); 3319 if (rval != QLA_SUCCESS) 3320 goto failed; 3321 3322 rval = qla2x00_set_exchoffld_buffer(vha); 3323 if (rval != QLA_SUCCESS) 3324 goto failed; 3325 3326 enable_82xx_npiv: 3327 fw_major_version = ha->fw_major_version; 3328 if (IS_P3P_TYPE(ha)) 3329 qla82xx_check_md_needed(vha); 3330 else 3331 rval = qla2x00_get_fw_version(vha); 3332 if (rval != QLA_SUCCESS) 3333 goto failed; 3334 ha->flags.npiv_supported = 0; 3335 if (IS_QLA2XXX_MIDTYPE(ha) && 3336 (ha->fw_attributes & BIT_2)) { 3337 ha->flags.npiv_supported = 1; 3338 if ((!ha->max_npiv_vports) || 3339 ((ha->max_npiv_vports + 1) % 3340 MIN_MULTI_ID_FABRIC)) 3341 ha->max_npiv_vports = 3342 MIN_MULTI_ID_FABRIC - 1; 3343 } 3344 qla2x00_get_resource_cnts(vha); 3345 3346 /* 3347 * Allocate the array of outstanding commands 3348 * now that we know the firmware resources. 3349 */ 3350 rval = qla2x00_alloc_outstanding_cmds(ha, 3351 vha->req); 3352 if (rval != QLA_SUCCESS) 3353 goto failed; 3354 3355 if (!fw_major_version && !(IS_P3P_TYPE(ha))) 3356 qla2x00_alloc_offload_mem(vha); 3357 3358 if (ql2xallocfwdump && !(IS_P3P_TYPE(ha))) 3359 qla2x00_alloc_fw_dump(vha); 3360 3361 } else { 3362 goto failed; 3363 } 3364 } else { 3365 ql_log(ql_log_fatal, vha, 0x00cd, 3366 "ISP Firmware failed checksum.\n"); 3367 goto failed; 3368 } 3369 } else 3370 goto failed; 3371 3372 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { 3373 /* Enable proper parity. */ 3374 spin_lock_irqsave(&ha->hardware_lock, flags); 3375 if (IS_QLA2300(ha)) 3376 /* SRAM parity */ 3377 WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x1); 3378 else 3379 /* SRAM, Instruction RAM and GP RAM parity */ 3380 WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x7); 3381 RD_REG_WORD(®->hccr); 3382 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3383 } 3384 3385 if (IS_QLA27XX(ha)) 3386 ha->flags.fac_supported = 1; 3387 else if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) { 3388 uint32_t size; 3389 3390 rval = qla81xx_fac_get_sector_size(vha, &size); 3391 if (rval == QLA_SUCCESS) { 3392 ha->flags.fac_supported = 1; 3393 ha->fdt_block_size = size << 2; 3394 } else { 3395 ql_log(ql_log_warn, vha, 0x00ce, 3396 "Unsupported FAC firmware (%d.%02d.%02d).\n", 3397 ha->fw_major_version, ha->fw_minor_version, 3398 ha->fw_subminor_version); 3399 3400 if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) { 3401 ha->flags.fac_supported = 0; 3402 rval = QLA_SUCCESS; 3403 } 3404 } 3405 } 3406 failed: 3407 if (rval) { 3408 ql_log(ql_log_fatal, vha, 0x00cf, 3409 "Setup chip ****FAILED****.\n"); 3410 } 3411 3412 return (rval); 3413 } 3414 3415 /** 3416 * qla2x00_init_response_q_entries() - Initializes response queue entries. 3417 * @rsp: response queue 3418 * 3419 * Beginning of request ring has initialization control block already built 3420 * by nvram config routine. 3421 * 3422 * Returns 0 on success. 3423 */ 3424 void 3425 qla2x00_init_response_q_entries(struct rsp_que *rsp) 3426 { 3427 uint16_t cnt; 3428 response_t *pkt; 3429 3430 rsp->ring_ptr = rsp->ring; 3431 rsp->ring_index = 0; 3432 rsp->status_srb = NULL; 3433 pkt = rsp->ring_ptr; 3434 for (cnt = 0; cnt < rsp->length; cnt++) { 3435 pkt->signature = RESPONSE_PROCESSED; 3436 pkt++; 3437 } 3438 } 3439 3440 /** 3441 * qla2x00_update_fw_options() - Read and process firmware options. 3442 * @vha: HA context 3443 * 3444 * Returns 0 on success. 3445 */ 3446 void 3447 qla2x00_update_fw_options(scsi_qla_host_t *vha) 3448 { 3449 uint16_t swing, emphasis, tx_sens, rx_sens; 3450 struct qla_hw_data *ha = vha->hw; 3451 3452 memset(ha->fw_options, 0, sizeof(ha->fw_options)); 3453 qla2x00_get_fw_options(vha, ha->fw_options); 3454 3455 if (IS_QLA2100(ha) || IS_QLA2200(ha)) 3456 return; 3457 3458 /* Serial Link options. */ 3459 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115, 3460 "Serial link options.\n"); 3461 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109, 3462 (uint8_t *)&ha->fw_seriallink_options, 3463 sizeof(ha->fw_seriallink_options)); 3464 3465 ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING; 3466 if (ha->fw_seriallink_options[3] & BIT_2) { 3467 ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING; 3468 3469 /* 1G settings */ 3470 swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0); 3471 emphasis = (ha->fw_seriallink_options[2] & 3472 (BIT_4 | BIT_3)) >> 3; 3473 tx_sens = ha->fw_seriallink_options[0] & 3474 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 3475 rx_sens = (ha->fw_seriallink_options[0] & 3476 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; 3477 ha->fw_options[10] = (emphasis << 14) | (swing << 8); 3478 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { 3479 if (rx_sens == 0x0) 3480 rx_sens = 0x3; 3481 ha->fw_options[10] |= (tx_sens << 4) | rx_sens; 3482 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) 3483 ha->fw_options[10] |= BIT_5 | 3484 ((rx_sens & (BIT_1 | BIT_0)) << 2) | 3485 (tx_sens & (BIT_1 | BIT_0)); 3486 3487 /* 2G settings */ 3488 swing = (ha->fw_seriallink_options[2] & 3489 (BIT_7 | BIT_6 | BIT_5)) >> 5; 3490 emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0); 3491 tx_sens = ha->fw_seriallink_options[1] & 3492 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 3493 rx_sens = (ha->fw_seriallink_options[1] & 3494 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; 3495 ha->fw_options[11] = (emphasis << 14) | (swing << 8); 3496 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { 3497 if (rx_sens == 0x0) 3498 rx_sens = 0x3; 3499 ha->fw_options[11] |= (tx_sens << 4) | rx_sens; 3500 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) 3501 ha->fw_options[11] |= BIT_5 | 3502 ((rx_sens & (BIT_1 | BIT_0)) << 2) | 3503 (tx_sens & (BIT_1 | BIT_0)); 3504 } 3505 3506 /* FCP2 options. */ 3507 /* Return command IOCBs without waiting for an ABTS to complete. */ 3508 ha->fw_options[3] |= BIT_13; 3509 3510 /* LED scheme. */ 3511 if (ha->flags.enable_led_scheme) 3512 ha->fw_options[2] |= BIT_12; 3513 3514 /* Detect ISP6312. */ 3515 if (IS_QLA6312(ha)) 3516 ha->fw_options[2] |= BIT_13; 3517 3518 /* Set Retry FLOGI in case of P2P connection */ 3519 if (ha->operating_mode == P2P) { 3520 ha->fw_options[2] |= BIT_3; 3521 ql_dbg(ql_dbg_disc, vha, 0x2100, 3522 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n", 3523 __func__, ha->fw_options[2]); 3524 } 3525 3526 /* Update firmware options. */ 3527 qla2x00_set_fw_options(vha, ha->fw_options); 3528 } 3529 3530 void 3531 qla24xx_update_fw_options(scsi_qla_host_t *vha) 3532 { 3533 int rval; 3534 struct qla_hw_data *ha = vha->hw; 3535 3536 if (IS_P3P_TYPE(ha)) 3537 return; 3538 3539 /* Hold status IOCBs until ABTS response received. */ 3540 if (ql2xfwholdabts) 3541 ha->fw_options[3] |= BIT_12; 3542 3543 /* Set Retry FLOGI in case of P2P connection */ 3544 if (ha->operating_mode == P2P) { 3545 ha->fw_options[2] |= BIT_3; 3546 ql_dbg(ql_dbg_disc, vha, 0x2101, 3547 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n", 3548 __func__, ha->fw_options[2]); 3549 } 3550 3551 /* Move PUREX, ABTS RX & RIDA to ATIOQ */ 3552 if (ql2xmvasynctoatio && 3553 (IS_QLA83XX(ha) || IS_QLA27XX(ha))) { 3554 if (qla_tgt_mode_enabled(vha) || 3555 qla_dual_mode_enabled(vha)) 3556 ha->fw_options[2] |= BIT_11; 3557 else 3558 ha->fw_options[2] &= ~BIT_11; 3559 } 3560 3561 if (IS_QLA25XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha)) { 3562 /* 3563 * Tell FW to track each exchange to prevent 3564 * driver from using stale exchange. 3565 */ 3566 if (qla_tgt_mode_enabled(vha) || 3567 qla_dual_mode_enabled(vha)) 3568 ha->fw_options[2] |= BIT_4; 3569 else 3570 ha->fw_options[2] &= ~BIT_4; 3571 3572 /* Reserve 1/2 of emergency exchanges for ELS.*/ 3573 if (qla2xuseresexchforels) 3574 ha->fw_options[2] |= BIT_8; 3575 else 3576 ha->fw_options[2] &= ~BIT_8; 3577 } 3578 3579 ql_dbg(ql_dbg_init, vha, 0x00e8, 3580 "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n", 3581 __func__, ha->fw_options[1], ha->fw_options[2], 3582 ha->fw_options[3], vha->host->active_mode); 3583 3584 if (ha->fw_options[1] || ha->fw_options[2] || ha->fw_options[3]) 3585 qla2x00_set_fw_options(vha, ha->fw_options); 3586 3587 /* Update Serial Link options. */ 3588 if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0) 3589 return; 3590 3591 rval = qla2x00_set_serdes_params(vha, 3592 le16_to_cpu(ha->fw_seriallink_options24[1]), 3593 le16_to_cpu(ha->fw_seriallink_options24[2]), 3594 le16_to_cpu(ha->fw_seriallink_options24[3])); 3595 if (rval != QLA_SUCCESS) { 3596 ql_log(ql_log_warn, vha, 0x0104, 3597 "Unable to update Serial Link options (%x).\n", rval); 3598 } 3599 } 3600 3601 void 3602 qla2x00_config_rings(struct scsi_qla_host *vha) 3603 { 3604 struct qla_hw_data *ha = vha->hw; 3605 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 3606 struct req_que *req = ha->req_q_map[0]; 3607 struct rsp_que *rsp = ha->rsp_q_map[0]; 3608 3609 /* Setup ring parameters in initialization control block. */ 3610 ha->init_cb->request_q_outpointer = cpu_to_le16(0); 3611 ha->init_cb->response_q_inpointer = cpu_to_le16(0); 3612 ha->init_cb->request_q_length = cpu_to_le16(req->length); 3613 ha->init_cb->response_q_length = cpu_to_le16(rsp->length); 3614 ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma)); 3615 ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma)); 3616 ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma)); 3617 ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma)); 3618 3619 WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0); 3620 WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0); 3621 WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0); 3622 WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0); 3623 RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */ 3624 } 3625 3626 void 3627 qla24xx_config_rings(struct scsi_qla_host *vha) 3628 { 3629 struct qla_hw_data *ha = vha->hw; 3630 device_reg_t *reg = ISP_QUE_REG(ha, 0); 3631 struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp; 3632 struct qla_msix_entry *msix; 3633 struct init_cb_24xx *icb; 3634 uint16_t rid = 0; 3635 struct req_que *req = ha->req_q_map[0]; 3636 struct rsp_que *rsp = ha->rsp_q_map[0]; 3637 3638 /* Setup ring parameters in initialization control block. */ 3639 icb = (struct init_cb_24xx *)ha->init_cb; 3640 icb->request_q_outpointer = cpu_to_le16(0); 3641 icb->response_q_inpointer = cpu_to_le16(0); 3642 icb->request_q_length = cpu_to_le16(req->length); 3643 icb->response_q_length = cpu_to_le16(rsp->length); 3644 icb->request_q_address[0] = cpu_to_le32(LSD(req->dma)); 3645 icb->request_q_address[1] = cpu_to_le32(MSD(req->dma)); 3646 icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma)); 3647 icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma)); 3648 3649 /* Setup ATIO queue dma pointers for target mode */ 3650 icb->atio_q_inpointer = cpu_to_le16(0); 3651 icb->atio_q_length = cpu_to_le16(ha->tgt.atio_q_length); 3652 icb->atio_q_address[0] = cpu_to_le32(LSD(ha->tgt.atio_dma)); 3653 icb->atio_q_address[1] = cpu_to_le32(MSD(ha->tgt.atio_dma)); 3654 3655 if (IS_SHADOW_REG_CAPABLE(ha)) 3656 icb->firmware_options_2 |= cpu_to_le32(BIT_30|BIT_29); 3657 3658 if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha)) { 3659 icb->qos = cpu_to_le16(QLA_DEFAULT_QUE_QOS); 3660 icb->rid = cpu_to_le16(rid); 3661 if (ha->flags.msix_enabled) { 3662 msix = &ha->msix_entries[1]; 3663 ql_dbg(ql_dbg_init, vha, 0x0019, 3664 "Registering vector 0x%x for base que.\n", 3665 msix->entry); 3666 icb->msix = cpu_to_le16(msix->entry); 3667 } 3668 /* Use alternate PCI bus number */ 3669 if (MSB(rid)) 3670 icb->firmware_options_2 |= cpu_to_le32(BIT_19); 3671 /* Use alternate PCI devfn */ 3672 if (LSB(rid)) 3673 icb->firmware_options_2 |= cpu_to_le32(BIT_18); 3674 3675 /* Use Disable MSIX Handshake mode for capable adapters */ 3676 if ((ha->fw_attributes & BIT_6) && (IS_MSIX_NACK_CAPABLE(ha)) && 3677 (ha->flags.msix_enabled)) { 3678 icb->firmware_options_2 &= cpu_to_le32(~BIT_22); 3679 ha->flags.disable_msix_handshake = 1; 3680 ql_dbg(ql_dbg_init, vha, 0x00fe, 3681 "MSIX Handshake Disable Mode turned on.\n"); 3682 } else { 3683 icb->firmware_options_2 |= cpu_to_le32(BIT_22); 3684 } 3685 icb->firmware_options_2 |= cpu_to_le32(BIT_23); 3686 3687 WRT_REG_DWORD(®->isp25mq.req_q_in, 0); 3688 WRT_REG_DWORD(®->isp25mq.req_q_out, 0); 3689 WRT_REG_DWORD(®->isp25mq.rsp_q_in, 0); 3690 WRT_REG_DWORD(®->isp25mq.rsp_q_out, 0); 3691 } else { 3692 WRT_REG_DWORD(®->isp24.req_q_in, 0); 3693 WRT_REG_DWORD(®->isp24.req_q_out, 0); 3694 WRT_REG_DWORD(®->isp24.rsp_q_in, 0); 3695 WRT_REG_DWORD(®->isp24.rsp_q_out, 0); 3696 } 3697 qlt_24xx_config_rings(vha); 3698 3699 /* PCI posting */ 3700 RD_REG_DWORD(&ioreg->hccr); 3701 } 3702 3703 /** 3704 * qla2x00_init_rings() - Initializes firmware. 3705 * @vha: HA context 3706 * 3707 * Beginning of request ring has initialization control block already built 3708 * by nvram config routine. 3709 * 3710 * Returns 0 on success. 3711 */ 3712 int 3713 qla2x00_init_rings(scsi_qla_host_t *vha) 3714 { 3715 int rval; 3716 unsigned long flags = 0; 3717 int cnt, que; 3718 struct qla_hw_data *ha = vha->hw; 3719 struct req_que *req; 3720 struct rsp_que *rsp; 3721 struct mid_init_cb_24xx *mid_init_cb = 3722 (struct mid_init_cb_24xx *) ha->init_cb; 3723 3724 spin_lock_irqsave(&ha->hardware_lock, flags); 3725 3726 /* Clear outstanding commands array. */ 3727 for (que = 0; que < ha->max_req_queues; que++) { 3728 req = ha->req_q_map[que]; 3729 if (!req || !test_bit(que, ha->req_qid_map)) 3730 continue; 3731 req->out_ptr = (void *)(req->ring + req->length); 3732 *req->out_ptr = 0; 3733 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) 3734 req->outstanding_cmds[cnt] = NULL; 3735 3736 req->current_outstanding_cmd = 1; 3737 3738 /* Initialize firmware. */ 3739 req->ring_ptr = req->ring; 3740 req->ring_index = 0; 3741 req->cnt = req->length; 3742 } 3743 3744 for (que = 0; que < ha->max_rsp_queues; que++) { 3745 rsp = ha->rsp_q_map[que]; 3746 if (!rsp || !test_bit(que, ha->rsp_qid_map)) 3747 continue; 3748 rsp->in_ptr = (void *)(rsp->ring + rsp->length); 3749 *rsp->in_ptr = 0; 3750 /* Initialize response queue entries */ 3751 if (IS_QLAFX00(ha)) 3752 qlafx00_init_response_q_entries(rsp); 3753 else 3754 qla2x00_init_response_q_entries(rsp); 3755 } 3756 3757 ha->tgt.atio_ring_ptr = ha->tgt.atio_ring; 3758 ha->tgt.atio_ring_index = 0; 3759 /* Initialize ATIO queue entries */ 3760 qlt_init_atio_q_entries(vha); 3761 3762 ha->isp_ops->config_rings(vha); 3763 3764 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3765 3766 ql_dbg(ql_dbg_init, vha, 0x00d1, "Issue init firmware.\n"); 3767 3768 if (IS_QLAFX00(ha)) { 3769 rval = qlafx00_init_firmware(vha, ha->init_cb_size); 3770 goto next_check; 3771 } 3772 3773 /* Update any ISP specific firmware options before initialization. */ 3774 ha->isp_ops->update_fw_options(vha); 3775 3776 if (ha->flags.npiv_supported) { 3777 if (ha->operating_mode == LOOP && !IS_CNA_CAPABLE(ha)) 3778 ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1; 3779 mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports); 3780 } 3781 3782 if (IS_FWI2_CAPABLE(ha)) { 3783 mid_init_cb->options = cpu_to_le16(BIT_1); 3784 mid_init_cb->init_cb.execution_throttle = 3785 cpu_to_le16(ha->cur_fw_xcb_count); 3786 ha->flags.dport_enabled = 3787 (mid_init_cb->init_cb.firmware_options_1 & BIT_7) != 0; 3788 ql_dbg(ql_dbg_init, vha, 0x0191, "DPORT Support: %s.\n", 3789 (ha->flags.dport_enabled) ? "enabled" : "disabled"); 3790 /* FA-WWPN Status */ 3791 ha->flags.fawwpn_enabled = 3792 (mid_init_cb->init_cb.firmware_options_1 & BIT_6) != 0; 3793 ql_dbg(ql_dbg_init, vha, 0x00bc, "FA-WWPN Support: %s.\n", 3794 (ha->flags.fawwpn_enabled) ? "enabled" : "disabled"); 3795 } 3796 3797 rval = qla2x00_init_firmware(vha, ha->init_cb_size); 3798 next_check: 3799 if (rval) { 3800 ql_log(ql_log_fatal, vha, 0x00d2, 3801 "Init Firmware **** FAILED ****.\n"); 3802 } else { 3803 ql_dbg(ql_dbg_init, vha, 0x00d3, 3804 "Init Firmware -- success.\n"); 3805 QLA_FW_STARTED(ha); 3806 } 3807 3808 return (rval); 3809 } 3810 3811 /** 3812 * qla2x00_fw_ready() - Waits for firmware ready. 3813 * @vha: HA context 3814 * 3815 * Returns 0 on success. 3816 */ 3817 static int 3818 qla2x00_fw_ready(scsi_qla_host_t *vha) 3819 { 3820 int rval; 3821 unsigned long wtime, mtime, cs84xx_time; 3822 uint16_t min_wait; /* Minimum wait time if loop is down */ 3823 uint16_t wait_time; /* Wait time if loop is coming ready */ 3824 uint16_t state[6]; 3825 struct qla_hw_data *ha = vha->hw; 3826 3827 if (IS_QLAFX00(vha->hw)) 3828 return qlafx00_fw_ready(vha); 3829 3830 rval = QLA_SUCCESS; 3831 3832 /* Time to wait for loop down */ 3833 if (IS_P3P_TYPE(ha)) 3834 min_wait = 30; 3835 else 3836 min_wait = 20; 3837 3838 /* 3839 * Firmware should take at most one RATOV to login, plus 5 seconds for 3840 * our own processing. 3841 */ 3842 if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) { 3843 wait_time = min_wait; 3844 } 3845 3846 /* Min wait time if loop down */ 3847 mtime = jiffies + (min_wait * HZ); 3848 3849 /* wait time before firmware ready */ 3850 wtime = jiffies + (wait_time * HZ); 3851 3852 /* Wait for ISP to finish LIP */ 3853 if (!vha->flags.init_done) 3854 ql_log(ql_log_info, vha, 0x801e, 3855 "Waiting for LIP to complete.\n"); 3856 3857 do { 3858 memset(state, -1, sizeof(state)); 3859 rval = qla2x00_get_firmware_state(vha, state); 3860 if (rval == QLA_SUCCESS) { 3861 if (state[0] < FSTATE_LOSS_OF_SYNC) { 3862 vha->device_flags &= ~DFLG_NO_CABLE; 3863 } 3864 if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) { 3865 ql_dbg(ql_dbg_taskm, vha, 0x801f, 3866 "fw_state=%x 84xx=%x.\n", state[0], 3867 state[2]); 3868 if ((state[2] & FSTATE_LOGGED_IN) && 3869 (state[2] & FSTATE_WAITING_FOR_VERIFY)) { 3870 ql_dbg(ql_dbg_taskm, vha, 0x8028, 3871 "Sending verify iocb.\n"); 3872 3873 cs84xx_time = jiffies; 3874 rval = qla84xx_init_chip(vha); 3875 if (rval != QLA_SUCCESS) { 3876 ql_log(ql_log_warn, 3877 vha, 0x8007, 3878 "Init chip failed.\n"); 3879 break; 3880 } 3881 3882 /* Add time taken to initialize. */ 3883 cs84xx_time = jiffies - cs84xx_time; 3884 wtime += cs84xx_time; 3885 mtime += cs84xx_time; 3886 ql_dbg(ql_dbg_taskm, vha, 0x8008, 3887 "Increasing wait time by %ld. " 3888 "New time %ld.\n", cs84xx_time, 3889 wtime); 3890 } 3891 } else if (state[0] == FSTATE_READY) { 3892 ql_dbg(ql_dbg_taskm, vha, 0x8037, 3893 "F/W Ready - OK.\n"); 3894 3895 qla2x00_get_retry_cnt(vha, &ha->retry_count, 3896 &ha->login_timeout, &ha->r_a_tov); 3897 3898 rval = QLA_SUCCESS; 3899 break; 3900 } 3901 3902 rval = QLA_FUNCTION_FAILED; 3903 3904 if (atomic_read(&vha->loop_down_timer) && 3905 state[0] != FSTATE_READY) { 3906 /* Loop down. Timeout on min_wait for states 3907 * other than Wait for Login. 3908 */ 3909 if (time_after_eq(jiffies, mtime)) { 3910 ql_log(ql_log_info, vha, 0x8038, 3911 "Cable is unplugged...\n"); 3912 3913 vha->device_flags |= DFLG_NO_CABLE; 3914 break; 3915 } 3916 } 3917 } else { 3918 /* Mailbox cmd failed. Timeout on min_wait. */ 3919 if (time_after_eq(jiffies, mtime) || 3920 ha->flags.isp82xx_fw_hung) 3921 break; 3922 } 3923 3924 if (time_after_eq(jiffies, wtime)) 3925 break; 3926 3927 /* Delay for a while */ 3928 msleep(500); 3929 } while (1); 3930 3931 ql_dbg(ql_dbg_taskm, vha, 0x803a, 3932 "fw_state=%x (%x, %x, %x, %x %x) curr time=%lx.\n", state[0], 3933 state[1], state[2], state[3], state[4], state[5], jiffies); 3934 3935 if (rval && !(vha->device_flags & DFLG_NO_CABLE)) { 3936 ql_log(ql_log_warn, vha, 0x803b, 3937 "Firmware ready **** FAILED ****.\n"); 3938 } 3939 3940 return (rval); 3941 } 3942 3943 /* 3944 * qla2x00_configure_hba 3945 * Setup adapter context. 3946 * 3947 * Input: 3948 * ha = adapter state pointer. 3949 * 3950 * Returns: 3951 * 0 = success 3952 * 3953 * Context: 3954 * Kernel context. 3955 */ 3956 static int 3957 qla2x00_configure_hba(scsi_qla_host_t *vha) 3958 { 3959 int rval; 3960 uint16_t loop_id; 3961 uint16_t topo; 3962 uint16_t sw_cap; 3963 uint8_t al_pa; 3964 uint8_t area; 3965 uint8_t domain; 3966 char connect_type[22]; 3967 struct qla_hw_data *ha = vha->hw; 3968 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); 3969 port_id_t id; 3970 unsigned long flags; 3971 3972 /* Get host addresses. */ 3973 rval = qla2x00_get_adapter_id(vha, 3974 &loop_id, &al_pa, &area, &domain, &topo, &sw_cap); 3975 if (rval != QLA_SUCCESS) { 3976 if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) || 3977 IS_CNA_CAPABLE(ha) || 3978 (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) { 3979 ql_dbg(ql_dbg_disc, vha, 0x2008, 3980 "Loop is in a transition state.\n"); 3981 } else { 3982 ql_log(ql_log_warn, vha, 0x2009, 3983 "Unable to get host loop ID.\n"); 3984 if (IS_FWI2_CAPABLE(ha) && (vha == base_vha) && 3985 (rval == QLA_COMMAND_ERROR && loop_id == 0x1b)) { 3986 ql_log(ql_log_warn, vha, 0x1151, 3987 "Doing link init.\n"); 3988 if (qla24xx_link_initialize(vha) == QLA_SUCCESS) 3989 return rval; 3990 } 3991 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 3992 } 3993 return (rval); 3994 } 3995 3996 if (topo == 4) { 3997 ql_log(ql_log_info, vha, 0x200a, 3998 "Cannot get topology - retrying.\n"); 3999 return (QLA_FUNCTION_FAILED); 4000 } 4001 4002 vha->loop_id = loop_id; 4003 4004 /* initialize */ 4005 ha->min_external_loopid = SNS_FIRST_LOOP_ID; 4006 ha->operating_mode = LOOP; 4007 ha->switch_cap = 0; 4008 4009 switch (topo) { 4010 case 0: 4011 ql_dbg(ql_dbg_disc, vha, 0x200b, "HBA in NL topology.\n"); 4012 ha->current_topology = ISP_CFG_NL; 4013 strcpy(connect_type, "(Loop)"); 4014 break; 4015 4016 case 1: 4017 ql_dbg(ql_dbg_disc, vha, 0x200c, "HBA in FL topology.\n"); 4018 ha->switch_cap = sw_cap; 4019 ha->current_topology = ISP_CFG_FL; 4020 strcpy(connect_type, "(FL_Port)"); 4021 break; 4022 4023 case 2: 4024 ql_dbg(ql_dbg_disc, vha, 0x200d, "HBA in N P2P topology.\n"); 4025 ha->operating_mode = P2P; 4026 ha->current_topology = ISP_CFG_N; 4027 strcpy(connect_type, "(N_Port-to-N_Port)"); 4028 break; 4029 4030 case 3: 4031 ql_dbg(ql_dbg_disc, vha, 0x200e, "HBA in F P2P topology.\n"); 4032 ha->switch_cap = sw_cap; 4033 ha->operating_mode = P2P; 4034 ha->current_topology = ISP_CFG_F; 4035 strcpy(connect_type, "(F_Port)"); 4036 break; 4037 4038 default: 4039 ql_dbg(ql_dbg_disc, vha, 0x200f, 4040 "HBA in unknown topology %x, using NL.\n", topo); 4041 ha->current_topology = ISP_CFG_NL; 4042 strcpy(connect_type, "(Loop)"); 4043 break; 4044 } 4045 4046 /* Save Host port and loop ID. */ 4047 /* byte order - Big Endian */ 4048 id.b.domain = domain; 4049 id.b.area = area; 4050 id.b.al_pa = al_pa; 4051 id.b.rsvd_1 = 0; 4052 spin_lock_irqsave(&ha->hardware_lock, flags); 4053 qlt_update_host_map(vha, id); 4054 spin_unlock_irqrestore(&ha->hardware_lock, flags); 4055 4056 if (!vha->flags.init_done) 4057 ql_log(ql_log_info, vha, 0x2010, 4058 "Topology - %s, Host Loop address 0x%x.\n", 4059 connect_type, vha->loop_id); 4060 4061 return(rval); 4062 } 4063 4064 inline void 4065 qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len, 4066 char *def) 4067 { 4068 char *st, *en; 4069 uint16_t index; 4070 struct qla_hw_data *ha = vha->hw; 4071 int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) && 4072 !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha); 4073 4074 if (memcmp(model, BINZERO, len) != 0) { 4075 strncpy(ha->model_number, model, len); 4076 st = en = ha->model_number; 4077 en += len - 1; 4078 while (en > st) { 4079 if (*en != 0x20 && *en != 0x00) 4080 break; 4081 *en-- = '\0'; 4082 } 4083 4084 index = (ha->pdev->subsystem_device & 0xff); 4085 if (use_tbl && 4086 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && 4087 index < QLA_MODEL_NAMES) 4088 strncpy(ha->model_desc, 4089 qla2x00_model_name[index * 2 + 1], 4090 sizeof(ha->model_desc) - 1); 4091 } else { 4092 index = (ha->pdev->subsystem_device & 0xff); 4093 if (use_tbl && 4094 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && 4095 index < QLA_MODEL_NAMES) { 4096 strcpy(ha->model_number, 4097 qla2x00_model_name[index * 2]); 4098 strncpy(ha->model_desc, 4099 qla2x00_model_name[index * 2 + 1], 4100 sizeof(ha->model_desc) - 1); 4101 } else { 4102 strcpy(ha->model_number, def); 4103 } 4104 } 4105 if (IS_FWI2_CAPABLE(ha)) 4106 qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc, 4107 sizeof(ha->model_desc)); 4108 } 4109 4110 /* On sparc systems, obtain port and node WWN from firmware 4111 * properties. 4112 */ 4113 static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv) 4114 { 4115 #ifdef CONFIG_SPARC 4116 struct qla_hw_data *ha = vha->hw; 4117 struct pci_dev *pdev = ha->pdev; 4118 struct device_node *dp = pci_device_to_OF_node(pdev); 4119 const u8 *val; 4120 int len; 4121 4122 val = of_get_property(dp, "port-wwn", &len); 4123 if (val && len >= WWN_SIZE) 4124 memcpy(nv->port_name, val, WWN_SIZE); 4125 4126 val = of_get_property(dp, "node-wwn", &len); 4127 if (val && len >= WWN_SIZE) 4128 memcpy(nv->node_name, val, WWN_SIZE); 4129 #endif 4130 } 4131 4132 /* 4133 * NVRAM configuration for ISP 2xxx 4134 * 4135 * Input: 4136 * ha = adapter block pointer. 4137 * 4138 * Output: 4139 * initialization control block in response_ring 4140 * host adapters parameters in host adapter block 4141 * 4142 * Returns: 4143 * 0 = success. 4144 */ 4145 int 4146 qla2x00_nvram_config(scsi_qla_host_t *vha) 4147 { 4148 int rval; 4149 uint8_t chksum = 0; 4150 uint16_t cnt; 4151 uint8_t *dptr1, *dptr2; 4152 struct qla_hw_data *ha = vha->hw; 4153 init_cb_t *icb = ha->init_cb; 4154 nvram_t *nv = ha->nvram; 4155 uint8_t *ptr = ha->nvram; 4156 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 4157 4158 rval = QLA_SUCCESS; 4159 4160 /* Determine NVRAM starting address. */ 4161 ha->nvram_size = sizeof(nvram_t); 4162 ha->nvram_base = 0; 4163 if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha)) 4164 if ((RD_REG_WORD(®->ctrl_status) >> 14) == 1) 4165 ha->nvram_base = 0x80; 4166 4167 /* Get NVRAM data and calculate checksum. */ 4168 ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size); 4169 for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++) 4170 chksum += *ptr++; 4171 4172 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f, 4173 "Contents of NVRAM.\n"); 4174 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110, 4175 (uint8_t *)nv, ha->nvram_size); 4176 4177 /* Bad NVRAM data, set defaults parameters. */ 4178 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || 4179 nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) { 4180 /* Reset NVRAM data. */ 4181 ql_log(ql_log_warn, vha, 0x0064, 4182 "Inconsistent NVRAM " 4183 "detected: checksum=0x%x id=%c version=0x%x.\n", 4184 chksum, nv->id[0], nv->nvram_version); 4185 ql_log(ql_log_warn, vha, 0x0065, 4186 "Falling back to " 4187 "functioning (yet invalid -- WWPN) defaults.\n"); 4188 4189 /* 4190 * Set default initialization control block. 4191 */ 4192 memset(nv, 0, ha->nvram_size); 4193 nv->parameter_block_version = ICB_VERSION; 4194 4195 if (IS_QLA23XX(ha)) { 4196 nv->firmware_options[0] = BIT_2 | BIT_1; 4197 nv->firmware_options[1] = BIT_7 | BIT_5; 4198 nv->add_firmware_options[0] = BIT_5; 4199 nv->add_firmware_options[1] = BIT_5 | BIT_4; 4200 nv->frame_payload_size = 2048; 4201 nv->special_options[1] = BIT_7; 4202 } else if (IS_QLA2200(ha)) { 4203 nv->firmware_options[0] = BIT_2 | BIT_1; 4204 nv->firmware_options[1] = BIT_7 | BIT_5; 4205 nv->add_firmware_options[0] = BIT_5; 4206 nv->add_firmware_options[1] = BIT_5 | BIT_4; 4207 nv->frame_payload_size = 1024; 4208 } else if (IS_QLA2100(ha)) { 4209 nv->firmware_options[0] = BIT_3 | BIT_1; 4210 nv->firmware_options[1] = BIT_5; 4211 nv->frame_payload_size = 1024; 4212 } 4213 4214 nv->max_iocb_allocation = cpu_to_le16(256); 4215 nv->execution_throttle = cpu_to_le16(16); 4216 nv->retry_count = 8; 4217 nv->retry_delay = 1; 4218 4219 nv->port_name[0] = 33; 4220 nv->port_name[3] = 224; 4221 nv->port_name[4] = 139; 4222 4223 qla2xxx_nvram_wwn_from_ofw(vha, nv); 4224 4225 nv->login_timeout = 4; 4226 4227 /* 4228 * Set default host adapter parameters 4229 */ 4230 nv->host_p[1] = BIT_2; 4231 nv->reset_delay = 5; 4232 nv->port_down_retry_count = 8; 4233 nv->max_luns_per_target = cpu_to_le16(8); 4234 nv->link_down_timeout = 60; 4235 4236 rval = 1; 4237 } 4238 4239 #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2) 4240 /* 4241 * The SN2 does not provide BIOS emulation which means you can't change 4242 * potentially bogus BIOS settings. Force the use of default settings 4243 * for link rate and frame size. Hope that the rest of the settings 4244 * are valid. 4245 */ 4246 if (ia64_platform_is("sn2")) { 4247 nv->frame_payload_size = 2048; 4248 if (IS_QLA23XX(ha)) 4249 nv->special_options[1] = BIT_7; 4250 } 4251 #endif 4252 4253 /* Reset Initialization control block */ 4254 memset(icb, 0, ha->init_cb_size); 4255 4256 /* 4257 * Setup driver NVRAM options. 4258 */ 4259 nv->firmware_options[0] |= (BIT_6 | BIT_1); 4260 nv->firmware_options[0] &= ~(BIT_5 | BIT_4); 4261 nv->firmware_options[1] |= (BIT_5 | BIT_0); 4262 nv->firmware_options[1] &= ~BIT_4; 4263 4264 if (IS_QLA23XX(ha)) { 4265 nv->firmware_options[0] |= BIT_2; 4266 nv->firmware_options[0] &= ~BIT_3; 4267 nv->special_options[0] &= ~BIT_6; 4268 nv->add_firmware_options[1] |= BIT_5 | BIT_4; 4269 4270 if (IS_QLA2300(ha)) { 4271 if (ha->fb_rev == FPM_2310) { 4272 strcpy(ha->model_number, "QLA2310"); 4273 } else { 4274 strcpy(ha->model_number, "QLA2300"); 4275 } 4276 } else { 4277 qla2x00_set_model_info(vha, nv->model_number, 4278 sizeof(nv->model_number), "QLA23xx"); 4279 } 4280 } else if (IS_QLA2200(ha)) { 4281 nv->firmware_options[0] |= BIT_2; 4282 /* 4283 * 'Point-to-point preferred, else loop' is not a safe 4284 * connection mode setting. 4285 */ 4286 if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) == 4287 (BIT_5 | BIT_4)) { 4288 /* Force 'loop preferred, else point-to-point'. */ 4289 nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4); 4290 nv->add_firmware_options[0] |= BIT_5; 4291 } 4292 strcpy(ha->model_number, "QLA22xx"); 4293 } else /*if (IS_QLA2100(ha))*/ { 4294 strcpy(ha->model_number, "QLA2100"); 4295 } 4296 4297 /* 4298 * Copy over NVRAM RISC parameter block to initialization control block. 4299 */ 4300 dptr1 = (uint8_t *)icb; 4301 dptr2 = (uint8_t *)&nv->parameter_block_version; 4302 cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version; 4303 while (cnt--) 4304 *dptr1++ = *dptr2++; 4305 4306 /* Copy 2nd half. */ 4307 dptr1 = (uint8_t *)icb->add_firmware_options; 4308 cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options; 4309 while (cnt--) 4310 *dptr1++ = *dptr2++; 4311 4312 /* Use alternate WWN? */ 4313 if (nv->host_p[1] & BIT_7) { 4314 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 4315 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 4316 } 4317 4318 /* Prepare nodename */ 4319 if ((icb->firmware_options[1] & BIT_6) == 0) { 4320 /* 4321 * Firmware will apply the following mask if the nodename was 4322 * not provided. 4323 */ 4324 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 4325 icb->node_name[0] &= 0xF0; 4326 } 4327 4328 /* 4329 * Set host adapter parameters. 4330 */ 4331 4332 /* 4333 * BIT_7 in the host-parameters section allows for modification to 4334 * internal driver logging. 4335 */ 4336 if (nv->host_p[0] & BIT_7) 4337 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK; 4338 ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0); 4339 /* Always load RISC code on non ISP2[12]00 chips. */ 4340 if (!IS_QLA2100(ha) && !IS_QLA2200(ha)) 4341 ha->flags.disable_risc_code_load = 0; 4342 ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0); 4343 ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0); 4344 ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0); 4345 ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0; 4346 ha->flags.disable_serdes = 0; 4347 4348 ha->operating_mode = 4349 (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4; 4350 4351 memcpy(ha->fw_seriallink_options, nv->seriallink_options, 4352 sizeof(ha->fw_seriallink_options)); 4353 4354 /* save HBA serial number */ 4355 ha->serial0 = icb->port_name[5]; 4356 ha->serial1 = icb->port_name[6]; 4357 ha->serial2 = icb->port_name[7]; 4358 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 4359 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 4360 4361 icb->execution_throttle = cpu_to_le16(0xFFFF); 4362 4363 ha->retry_count = nv->retry_count; 4364 4365 /* Set minimum login_timeout to 4 seconds. */ 4366 if (nv->login_timeout != ql2xlogintimeout) 4367 nv->login_timeout = ql2xlogintimeout; 4368 if (nv->login_timeout < 4) 4369 nv->login_timeout = 4; 4370 ha->login_timeout = nv->login_timeout; 4371 4372 /* Set minimum RATOV to 100 tenths of a second. */ 4373 ha->r_a_tov = 100; 4374 4375 ha->loop_reset_delay = nv->reset_delay; 4376 4377 /* Link Down Timeout = 0: 4378 * 4379 * When Port Down timer expires we will start returning 4380 * I/O's to OS with "DID_NO_CONNECT". 4381 * 4382 * Link Down Timeout != 0: 4383 * 4384 * The driver waits for the link to come up after link down 4385 * before returning I/Os to OS with "DID_NO_CONNECT". 4386 */ 4387 if (nv->link_down_timeout == 0) { 4388 ha->loop_down_abort_time = 4389 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 4390 } else { 4391 ha->link_down_timeout = nv->link_down_timeout; 4392 ha->loop_down_abort_time = 4393 (LOOP_DOWN_TIME - ha->link_down_timeout); 4394 } 4395 4396 /* 4397 * Need enough time to try and get the port back. 4398 */ 4399 ha->port_down_retry_count = nv->port_down_retry_count; 4400 if (qlport_down_retry) 4401 ha->port_down_retry_count = qlport_down_retry; 4402 /* Set login_retry_count */ 4403 ha->login_retry_count = nv->retry_count; 4404 if (ha->port_down_retry_count == nv->port_down_retry_count && 4405 ha->port_down_retry_count > 3) 4406 ha->login_retry_count = ha->port_down_retry_count; 4407 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 4408 ha->login_retry_count = ha->port_down_retry_count; 4409 if (ql2xloginretrycount) 4410 ha->login_retry_count = ql2xloginretrycount; 4411 4412 icb->lun_enables = cpu_to_le16(0); 4413 icb->command_resource_count = 0; 4414 icb->immediate_notify_resource_count = 0; 4415 icb->timeout = cpu_to_le16(0); 4416 4417 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { 4418 /* Enable RIO */ 4419 icb->firmware_options[0] &= ~BIT_3; 4420 icb->add_firmware_options[0] &= 4421 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); 4422 icb->add_firmware_options[0] |= BIT_2; 4423 icb->response_accumulation_timer = 3; 4424 icb->interrupt_delay_timer = 5; 4425 4426 vha->flags.process_response_queue = 1; 4427 } else { 4428 /* Enable ZIO. */ 4429 if (!vha->flags.init_done) { 4430 ha->zio_mode = icb->add_firmware_options[0] & 4431 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 4432 ha->zio_timer = icb->interrupt_delay_timer ? 4433 icb->interrupt_delay_timer: 2; 4434 } 4435 icb->add_firmware_options[0] &= 4436 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); 4437 vha->flags.process_response_queue = 0; 4438 if (ha->zio_mode != QLA_ZIO_DISABLED) { 4439 ha->zio_mode = QLA_ZIO_MODE_6; 4440 4441 ql_log(ql_log_info, vha, 0x0068, 4442 "ZIO mode %d enabled; timer delay (%d us).\n", 4443 ha->zio_mode, ha->zio_timer * 100); 4444 4445 icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode; 4446 icb->interrupt_delay_timer = (uint8_t)ha->zio_timer; 4447 vha->flags.process_response_queue = 1; 4448 } 4449 } 4450 4451 if (rval) { 4452 ql_log(ql_log_warn, vha, 0x0069, 4453 "NVRAM configuration failed.\n"); 4454 } 4455 return (rval); 4456 } 4457 4458 static void 4459 qla2x00_rport_del(void *data) 4460 { 4461 fc_port_t *fcport = data; 4462 struct fc_rport *rport; 4463 unsigned long flags; 4464 4465 spin_lock_irqsave(fcport->vha->host->host_lock, flags); 4466 rport = fcport->drport ? fcport->drport: fcport->rport; 4467 fcport->drport = NULL; 4468 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags); 4469 if (rport) { 4470 ql_dbg(ql_dbg_disc, fcport->vha, 0x210b, 4471 "%s %8phN. rport %p roles %x\n", 4472 __func__, fcport->port_name, rport, 4473 rport->roles); 4474 4475 fc_remote_port_delete(rport); 4476 } 4477 } 4478 4479 /** 4480 * qla2x00_alloc_fcport() - Allocate a generic fcport. 4481 * @vha: HA context 4482 * @flags: allocation flags 4483 * 4484 * Returns a pointer to the allocated fcport, or NULL, if none available. 4485 */ 4486 fc_port_t * 4487 qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags) 4488 { 4489 fc_port_t *fcport; 4490 4491 fcport = kzalloc(sizeof(fc_port_t), flags); 4492 if (!fcport) 4493 return NULL; 4494 4495 /* Setup fcport template structure. */ 4496 fcport->vha = vha; 4497 fcport->port_type = FCT_UNKNOWN; 4498 fcport->loop_id = FC_NO_LOOP_ID; 4499 qla2x00_set_fcport_state(fcport, FCS_UNCONFIGURED); 4500 fcport->supported_classes = FC_COS_UNSPECIFIED; 4501 4502 fcport->ct_desc.ct_sns = dma_alloc_coherent(&vha->hw->pdev->dev, 4503 sizeof(struct ct_sns_pkt), &fcport->ct_desc.ct_sns_dma, 4504 flags); 4505 fcport->disc_state = DSC_DELETED; 4506 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL; 4507 fcport->deleted = QLA_SESS_DELETED; 4508 fcport->login_retry = vha->hw->login_retry_count; 4509 fcport->logout_on_delete = 1; 4510 4511 if (!fcport->ct_desc.ct_sns) { 4512 ql_log(ql_log_warn, vha, 0xd049, 4513 "Failed to allocate ct_sns request.\n"); 4514 kfree(fcport); 4515 fcport = NULL; 4516 } 4517 INIT_WORK(&fcport->del_work, qla24xx_delete_sess_fn); 4518 INIT_LIST_HEAD(&fcport->gnl_entry); 4519 INIT_LIST_HEAD(&fcport->list); 4520 4521 return fcport; 4522 } 4523 4524 void 4525 qla2x00_free_fcport(fc_port_t *fcport) 4526 { 4527 if (fcport->ct_desc.ct_sns) { 4528 dma_free_coherent(&fcport->vha->hw->pdev->dev, 4529 sizeof(struct ct_sns_pkt), fcport->ct_desc.ct_sns, 4530 fcport->ct_desc.ct_sns_dma); 4531 4532 fcport->ct_desc.ct_sns = NULL; 4533 } 4534 kfree(fcport); 4535 } 4536 4537 /* 4538 * qla2x00_configure_loop 4539 * Updates Fibre Channel Device Database with what is actually on loop. 4540 * 4541 * Input: 4542 * ha = adapter block pointer. 4543 * 4544 * Returns: 4545 * 0 = success. 4546 * 1 = error. 4547 * 2 = database was full and device was not configured. 4548 */ 4549 static int 4550 qla2x00_configure_loop(scsi_qla_host_t *vha) 4551 { 4552 int rval; 4553 unsigned long flags, save_flags; 4554 struct qla_hw_data *ha = vha->hw; 4555 rval = QLA_SUCCESS; 4556 4557 /* Get Initiator ID */ 4558 if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) { 4559 rval = qla2x00_configure_hba(vha); 4560 if (rval != QLA_SUCCESS) { 4561 ql_dbg(ql_dbg_disc, vha, 0x2013, 4562 "Unable to configure HBA.\n"); 4563 return (rval); 4564 } 4565 } 4566 4567 save_flags = flags = vha->dpc_flags; 4568 ql_dbg(ql_dbg_disc, vha, 0x2014, 4569 "Configure loop -- dpc flags = 0x%lx.\n", flags); 4570 4571 /* 4572 * If we have both an RSCN and PORT UPDATE pending then handle them 4573 * both at the same time. 4574 */ 4575 clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 4576 clear_bit(RSCN_UPDATE, &vha->dpc_flags); 4577 4578 qla2x00_get_data_rate(vha); 4579 4580 /* Determine what we need to do */ 4581 if (ha->current_topology == ISP_CFG_FL && 4582 (test_bit(LOCAL_LOOP_UPDATE, &flags))) { 4583 4584 set_bit(RSCN_UPDATE, &flags); 4585 4586 } else if (ha->current_topology == ISP_CFG_F && 4587 (test_bit(LOCAL_LOOP_UPDATE, &flags))) { 4588 4589 set_bit(RSCN_UPDATE, &flags); 4590 clear_bit(LOCAL_LOOP_UPDATE, &flags); 4591 4592 } else if (ha->current_topology == ISP_CFG_N) { 4593 clear_bit(RSCN_UPDATE, &flags); 4594 if (ha->flags.rida_fmt2) { 4595 /* With Rida Format 2, the login is already triggered. 4596 * We know who is on the other side of the wire. 4597 * No need to login to do login to find out or drop into 4598 * qla2x00_configure_local_loop(). 4599 */ 4600 clear_bit(LOCAL_LOOP_UPDATE, &flags); 4601 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 4602 } else { 4603 if (qla_tgt_mode_enabled(vha)) { 4604 /* allow the other side to start the login */ 4605 clear_bit(LOCAL_LOOP_UPDATE, &flags); 4606 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 4607 } 4608 } 4609 } else if (ha->current_topology == ISP_CFG_NL) { 4610 clear_bit(RSCN_UPDATE, &flags); 4611 set_bit(LOCAL_LOOP_UPDATE, &flags); 4612 } else if (!vha->flags.online || 4613 (test_bit(ABORT_ISP_ACTIVE, &flags))) { 4614 set_bit(RSCN_UPDATE, &flags); 4615 set_bit(LOCAL_LOOP_UPDATE, &flags); 4616 } 4617 4618 if (test_bit(LOCAL_LOOP_UPDATE, &flags)) { 4619 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 4620 ql_dbg(ql_dbg_disc, vha, 0x2015, 4621 "Loop resync needed, failing.\n"); 4622 rval = QLA_FUNCTION_FAILED; 4623 } else 4624 rval = qla2x00_configure_local_loop(vha); 4625 } 4626 4627 if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) { 4628 if (LOOP_TRANSITION(vha)) { 4629 ql_dbg(ql_dbg_disc, vha, 0x2099, 4630 "Needs RSCN update and loop transition.\n"); 4631 rval = QLA_FUNCTION_FAILED; 4632 } 4633 else 4634 rval = qla2x00_configure_fabric(vha); 4635 } 4636 4637 if (rval == QLA_SUCCESS) { 4638 if (atomic_read(&vha->loop_down_timer) || 4639 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 4640 rval = QLA_FUNCTION_FAILED; 4641 } else { 4642 atomic_set(&vha->loop_state, LOOP_READY); 4643 ql_dbg(ql_dbg_disc, vha, 0x2069, 4644 "LOOP READY.\n"); 4645 ha->flags.fw_init_done = 1; 4646 4647 /* 4648 * Process any ATIO queue entries that came in 4649 * while we weren't online. 4650 */ 4651 if (qla_tgt_mode_enabled(vha) || 4652 qla_dual_mode_enabled(vha)) { 4653 if (IS_QLA27XX(ha) || IS_QLA83XX(ha)) { 4654 spin_lock_irqsave(&ha->tgt.atio_lock, 4655 flags); 4656 qlt_24xx_process_atio_queue(vha, 0); 4657 spin_unlock_irqrestore( 4658 &ha->tgt.atio_lock, flags); 4659 } else { 4660 spin_lock_irqsave(&ha->hardware_lock, 4661 flags); 4662 qlt_24xx_process_atio_queue(vha, 1); 4663 spin_unlock_irqrestore( 4664 &ha->hardware_lock, flags); 4665 } 4666 } 4667 } 4668 } 4669 4670 if (rval) { 4671 ql_dbg(ql_dbg_disc, vha, 0x206a, 4672 "%s *** FAILED ***.\n", __func__); 4673 } else { 4674 ql_dbg(ql_dbg_disc, vha, 0x206b, 4675 "%s: exiting normally.\n", __func__); 4676 } 4677 4678 /* Restore state if a resync event occurred during processing */ 4679 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 4680 if (test_bit(LOCAL_LOOP_UPDATE, &save_flags)) 4681 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 4682 if (test_bit(RSCN_UPDATE, &save_flags)) { 4683 set_bit(RSCN_UPDATE, &vha->dpc_flags); 4684 } 4685 } 4686 4687 return (rval); 4688 } 4689 4690 /* 4691 * N2N Login 4692 * Updates Fibre Channel Device Database with local loop devices. 4693 * 4694 * Input: 4695 * ha = adapter block pointer. 4696 * 4697 * Returns: 4698 */ 4699 static int qla24xx_n2n_handle_login(struct scsi_qla_host *vha, 4700 fc_port_t *fcport) 4701 { 4702 struct qla_hw_data *ha = vha->hw; 4703 int res = QLA_SUCCESS, rval; 4704 int greater_wwpn = 0; 4705 int logged_in = 0; 4706 4707 if (ha->current_topology != ISP_CFG_N) 4708 return res; 4709 4710 if (wwn_to_u64(vha->port_name) > 4711 wwn_to_u64(vha->n2n_port_name)) { 4712 ql_dbg(ql_dbg_disc, vha, 0x2002, 4713 "HBA WWPN is greater %llx > target %llx\n", 4714 wwn_to_u64(vha->port_name), 4715 wwn_to_u64(vha->n2n_port_name)); 4716 greater_wwpn = 1; 4717 fcport->d_id.b24 = vha->n2n_id; 4718 } 4719 4720 fcport->loop_id = vha->loop_id; 4721 fcport->fc4f_nvme = 0; 4722 fcport->query = 1; 4723 4724 ql_dbg(ql_dbg_disc, vha, 0x4001, 4725 "Initiate N2N login handler: HBA port_id=%06x loopid=%d\n", 4726 fcport->d_id.b24, vha->loop_id); 4727 4728 /* Fill in member data. */ 4729 if (!greater_wwpn) { 4730 rval = qla2x00_get_port_database(vha, fcport, 0); 4731 ql_dbg(ql_dbg_disc, vha, 0x1051, 4732 "Remote login-state (%x/%x) port_id=%06x loop_id=%x, rval=%d\n", 4733 fcport->current_login_state, fcport->last_login_state, 4734 fcport->d_id.b24, fcport->loop_id, rval); 4735 4736 if (((fcport->current_login_state & 0xf) == 0x4) || 4737 ((fcport->current_login_state & 0xf) == 0x6)) 4738 logged_in = 1; 4739 } 4740 4741 if (logged_in || greater_wwpn) { 4742 if (!vha->nvme_local_port && vha->flags.nvme_enabled) 4743 qla_nvme_register_hba(vha); 4744 4745 /* Set connected N_Port d_id */ 4746 if (vha->flags.nvme_enabled) 4747 fcport->fc4f_nvme = 1; 4748 4749 fcport->scan_state = QLA_FCPORT_FOUND; 4750 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL; 4751 fcport->disc_state = DSC_GNL; 4752 fcport->n2n_flag = 1; 4753 fcport->flags = 3; 4754 vha->hw->flags.gpsc_supported = 0; 4755 4756 if (greater_wwpn) { 4757 ql_dbg(ql_dbg_disc, vha, 0x20e5, 4758 "%s %d PLOGI ELS %8phC\n", 4759 __func__, __LINE__, fcport->port_name); 4760 4761 res = qla24xx_els_dcmd2_iocb(vha, ELS_DCMD_PLOGI, 4762 fcport, fcport->d_id); 4763 } 4764 4765 if (res != QLA_SUCCESS) { 4766 ql_log(ql_log_info, vha, 0xd04d, 4767 "PLOGI Failed: portid=%06x - retrying\n", 4768 fcport->d_id.b24); 4769 res = QLA_SUCCESS; 4770 } else { 4771 /* State 0x6 means FCP PRLI complete */ 4772 if ((fcport->current_login_state & 0xf) == 0x6) { 4773 ql_dbg(ql_dbg_disc, vha, 0x2118, 4774 "%s %d %8phC post GPDB work\n", 4775 __func__, __LINE__, fcport->port_name); 4776 fcport->chip_reset = 4777 vha->hw->base_qpair->chip_reset; 4778 qla24xx_post_gpdb_work(vha, fcport, 0); 4779 } else { 4780 ql_dbg(ql_dbg_disc, vha, 0x2118, 4781 "%s %d %8phC post NVMe PRLI\n", 4782 __func__, __LINE__, fcport->port_name); 4783 qla24xx_post_prli_work(vha, fcport); 4784 } 4785 } 4786 } else { 4787 /* Wait for next database change */ 4788 set_bit(N2N_LOGIN_NEEDED, &vha->dpc_flags); 4789 } 4790 4791 return res; 4792 } 4793 4794 /* 4795 * qla2x00_configure_local_loop 4796 * Updates Fibre Channel Device Database with local loop devices. 4797 * 4798 * Input: 4799 * ha = adapter block pointer. 4800 * 4801 * Returns: 4802 * 0 = success. 4803 */ 4804 static int 4805 qla2x00_configure_local_loop(scsi_qla_host_t *vha) 4806 { 4807 int rval, rval2; 4808 int found_devs; 4809 int found; 4810 fc_port_t *fcport, *new_fcport; 4811 4812 uint16_t index; 4813 uint16_t entries; 4814 char *id_iter; 4815 uint16_t loop_id; 4816 uint8_t domain, area, al_pa; 4817 struct qla_hw_data *ha = vha->hw; 4818 unsigned long flags; 4819 4820 found_devs = 0; 4821 new_fcport = NULL; 4822 entries = MAX_FIBRE_DEVICES_LOOP; 4823 4824 /* Get list of logged in devices. */ 4825 memset(ha->gid_list, 0, qla2x00_gid_list_size(ha)); 4826 rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma, 4827 &entries); 4828 if (rval != QLA_SUCCESS) 4829 goto cleanup_allocation; 4830 4831 ql_dbg(ql_dbg_disc, vha, 0x2011, 4832 "Entries in ID list (%d).\n", entries); 4833 ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075, 4834 (uint8_t *)ha->gid_list, 4835 entries * sizeof(struct gid_list_info)); 4836 4837 list_for_each_entry(fcport, &vha->vp_fcports, list) { 4838 fcport->scan_state = QLA_FCPORT_SCAN; 4839 } 4840 4841 /* Allocate temporary fcport for any new fcports discovered. */ 4842 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 4843 if (new_fcport == NULL) { 4844 ql_log(ql_log_warn, vha, 0x2012, 4845 "Memory allocation failed for fcport.\n"); 4846 rval = QLA_MEMORY_ALLOC_FAILED; 4847 goto cleanup_allocation; 4848 } 4849 new_fcport->flags &= ~FCF_FABRIC_DEVICE; 4850 4851 /* Inititae N2N login. */ 4852 if (test_and_clear_bit(N2N_LOGIN_NEEDED, &vha->dpc_flags)) { 4853 rval = qla24xx_n2n_handle_login(vha, new_fcport); 4854 if (rval != QLA_SUCCESS) 4855 goto cleanup_allocation; 4856 return QLA_SUCCESS; 4857 } 4858 4859 /* Add devices to port list. */ 4860 id_iter = (char *)ha->gid_list; 4861 for (index = 0; index < entries; index++) { 4862 domain = ((struct gid_list_info *)id_iter)->domain; 4863 area = ((struct gid_list_info *)id_iter)->area; 4864 al_pa = ((struct gid_list_info *)id_iter)->al_pa; 4865 if (IS_QLA2100(ha) || IS_QLA2200(ha)) 4866 loop_id = (uint16_t) 4867 ((struct gid_list_info *)id_iter)->loop_id_2100; 4868 else 4869 loop_id = le16_to_cpu( 4870 ((struct gid_list_info *)id_iter)->loop_id); 4871 id_iter += ha->gid_list_info_size; 4872 4873 /* Bypass reserved domain fields. */ 4874 if ((domain & 0xf0) == 0xf0) 4875 continue; 4876 4877 /* Bypass if not same domain and area of adapter. */ 4878 if (area && domain && 4879 (area != vha->d_id.b.area || domain != vha->d_id.b.domain)) 4880 continue; 4881 4882 /* Bypass invalid local loop ID. */ 4883 if (loop_id > LAST_LOCAL_LOOP_ID) 4884 continue; 4885 4886 memset(new_fcport->port_name, 0, WWN_SIZE); 4887 4888 /* Fill in member data. */ 4889 new_fcport->d_id.b.domain = domain; 4890 new_fcport->d_id.b.area = area; 4891 new_fcport->d_id.b.al_pa = al_pa; 4892 new_fcport->loop_id = loop_id; 4893 new_fcport->scan_state = QLA_FCPORT_FOUND; 4894 4895 rval2 = qla2x00_get_port_database(vha, new_fcport, 0); 4896 if (rval2 != QLA_SUCCESS) { 4897 ql_dbg(ql_dbg_disc, vha, 0x2097, 4898 "Failed to retrieve fcport information " 4899 "-- get_port_database=%x, loop_id=0x%04x.\n", 4900 rval2, new_fcport->loop_id); 4901 /* Skip retry if N2N */ 4902 if (ha->current_topology != ISP_CFG_N) { 4903 ql_dbg(ql_dbg_disc, vha, 0x2105, 4904 "Scheduling resync.\n"); 4905 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 4906 continue; 4907 } 4908 } 4909 4910 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 4911 /* Check for matching device in port list. */ 4912 found = 0; 4913 fcport = NULL; 4914 list_for_each_entry(fcport, &vha->vp_fcports, list) { 4915 if (memcmp(new_fcport->port_name, fcport->port_name, 4916 WWN_SIZE)) 4917 continue; 4918 4919 fcport->flags &= ~FCF_FABRIC_DEVICE; 4920 fcport->loop_id = new_fcport->loop_id; 4921 fcport->port_type = new_fcport->port_type; 4922 fcport->d_id.b24 = new_fcport->d_id.b24; 4923 memcpy(fcport->node_name, new_fcport->node_name, 4924 WWN_SIZE); 4925 fcport->scan_state = QLA_FCPORT_FOUND; 4926 found++; 4927 break; 4928 } 4929 4930 if (!found) { 4931 /* New device, add to fcports list. */ 4932 list_add_tail(&new_fcport->list, &vha->vp_fcports); 4933 4934 /* Allocate a new replacement fcport. */ 4935 fcport = new_fcport; 4936 4937 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 4938 4939 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 4940 4941 if (new_fcport == NULL) { 4942 ql_log(ql_log_warn, vha, 0xd031, 4943 "Failed to allocate memory for fcport.\n"); 4944 rval = QLA_MEMORY_ALLOC_FAILED; 4945 goto cleanup_allocation; 4946 } 4947 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 4948 new_fcport->flags &= ~FCF_FABRIC_DEVICE; 4949 } 4950 4951 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 4952 4953 /* Base iIDMA settings on HBA port speed. */ 4954 fcport->fp_speed = ha->link_data_rate; 4955 4956 found_devs++; 4957 } 4958 4959 list_for_each_entry(fcport, &vha->vp_fcports, list) { 4960 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 4961 break; 4962 4963 if (fcport->scan_state == QLA_FCPORT_SCAN) { 4964 if ((qla_dual_mode_enabled(vha) || 4965 qla_ini_mode_enabled(vha)) && 4966 atomic_read(&fcport->state) == FCS_ONLINE) { 4967 qla2x00_mark_device_lost(vha, fcport, 4968 ql2xplogiabsentdevice, 0); 4969 if (fcport->loop_id != FC_NO_LOOP_ID && 4970 (fcport->flags & FCF_FCP2_DEVICE) == 0 && 4971 fcport->port_type != FCT_INITIATOR && 4972 fcport->port_type != FCT_BROADCAST) { 4973 ql_dbg(ql_dbg_disc, vha, 0x20f0, 4974 "%s %d %8phC post del sess\n", 4975 __func__, __LINE__, 4976 fcport->port_name); 4977 4978 qlt_schedule_sess_for_deletion(fcport); 4979 continue; 4980 } 4981 } 4982 } 4983 4984 if (fcport->scan_state == QLA_FCPORT_FOUND) 4985 qla24xx_fcport_handle_login(vha, fcport); 4986 } 4987 4988 cleanup_allocation: 4989 kfree(new_fcport); 4990 4991 if (rval != QLA_SUCCESS) { 4992 ql_dbg(ql_dbg_disc, vha, 0x2098, 4993 "Configure local loop error exit: rval=%x.\n", rval); 4994 } 4995 4996 return (rval); 4997 } 4998 4999 static void 5000 qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) 5001 { 5002 int rval; 5003 uint16_t mb[MAILBOX_REGISTER_COUNT]; 5004 struct qla_hw_data *ha = vha->hw; 5005 5006 if (!IS_IIDMA_CAPABLE(ha)) 5007 return; 5008 5009 if (atomic_read(&fcport->state) != FCS_ONLINE) 5010 return; 5011 5012 if (fcport->fp_speed == PORT_SPEED_UNKNOWN || 5013 fcport->fp_speed > ha->link_data_rate || 5014 !ha->flags.gpsc_supported) 5015 return; 5016 5017 rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed, 5018 mb); 5019 if (rval != QLA_SUCCESS) { 5020 ql_dbg(ql_dbg_disc, vha, 0x2004, 5021 "Unable to adjust iIDMA %8phN -- %04x %x %04x %04x.\n", 5022 fcport->port_name, rval, fcport->fp_speed, mb[0], mb[1]); 5023 } else { 5024 ql_dbg(ql_dbg_disc, vha, 0x2005, 5025 "iIDMA adjusted to %s GB/s (%X) on %8phN.\n", 5026 qla2x00_get_link_speed_str(ha, fcport->fp_speed), 5027 fcport->fp_speed, fcport->port_name); 5028 } 5029 } 5030 5031 void qla_do_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport) 5032 { 5033 qla2x00_iidma_fcport(vha, fcport); 5034 qla24xx_update_fcport_fcp_prio(vha, fcport); 5035 } 5036 5037 int qla_post_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport) 5038 { 5039 struct qla_work_evt *e; 5040 5041 e = qla2x00_alloc_work(vha, QLA_EVT_IIDMA); 5042 if (!e) 5043 return QLA_FUNCTION_FAILED; 5044 5045 e->u.fcport.fcport = fcport; 5046 return qla2x00_post_work(vha, e); 5047 } 5048 5049 /* qla2x00_reg_remote_port is reserved for Initiator Mode only.*/ 5050 static void 5051 qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport) 5052 { 5053 struct fc_rport_identifiers rport_ids; 5054 struct fc_rport *rport; 5055 unsigned long flags; 5056 5057 rport_ids.node_name = wwn_to_u64(fcport->node_name); 5058 rport_ids.port_name = wwn_to_u64(fcport->port_name); 5059 rport_ids.port_id = fcport->d_id.b.domain << 16 | 5060 fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa; 5061 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; 5062 fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids); 5063 if (!rport) { 5064 ql_log(ql_log_warn, vha, 0x2006, 5065 "Unable to allocate fc remote port.\n"); 5066 return; 5067 } 5068 5069 spin_lock_irqsave(fcport->vha->host->host_lock, flags); 5070 *((fc_port_t **)rport->dd_data) = fcport; 5071 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags); 5072 5073 rport->supported_classes = fcport->supported_classes; 5074 5075 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; 5076 if (fcport->port_type == FCT_INITIATOR) 5077 rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR; 5078 if (fcport->port_type == FCT_TARGET) 5079 rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET; 5080 5081 ql_dbg(ql_dbg_disc, vha, 0x20ee, 5082 "%s %8phN. rport %p is %s mode\n", 5083 __func__, fcport->port_name, rport, 5084 (fcport->port_type == FCT_TARGET) ? "tgt" : "ini"); 5085 5086 fc_remote_port_rolechg(rport, rport_ids.roles); 5087 } 5088 5089 /* 5090 * qla2x00_update_fcport 5091 * Updates device on list. 5092 * 5093 * Input: 5094 * ha = adapter block pointer. 5095 * fcport = port structure pointer. 5096 * 5097 * Return: 5098 * 0 - Success 5099 * BIT_0 - error 5100 * 5101 * Context: 5102 * Kernel context. 5103 */ 5104 void 5105 qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) 5106 { 5107 fcport->vha = vha; 5108 5109 if (IS_SW_RESV_ADDR(fcport->d_id)) 5110 return; 5111 5112 ql_dbg(ql_dbg_disc, vha, 0x20ef, "%s %8phC\n", 5113 __func__, fcport->port_name); 5114 5115 if (IS_QLAFX00(vha->hw)) { 5116 qla2x00_set_fcport_state(fcport, FCS_ONLINE); 5117 } else { 5118 fcport->login_retry = 0; 5119 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 5120 fcport->disc_state = DSC_LOGIN_COMPLETE; 5121 fcport->deleted = 0; 5122 fcport->logout_on_delete = 1; 5123 qla2x00_set_fcport_state(fcport, FCS_ONLINE); 5124 } 5125 5126 qla2x00_set_fcport_state(fcport, FCS_ONLINE); 5127 qla2x00_iidma_fcport(vha, fcport); 5128 5129 if (fcport->fc4f_nvme) { 5130 qla_nvme_register_remote(vha, fcport); 5131 return; 5132 } 5133 5134 qla24xx_update_fcport_fcp_prio(vha, fcport); 5135 5136 switch (vha->host->active_mode) { 5137 case MODE_INITIATOR: 5138 qla2x00_reg_remote_port(vha, fcport); 5139 break; 5140 case MODE_TARGET: 5141 if (!vha->vha_tgt.qla_tgt->tgt_stop && 5142 !vha->vha_tgt.qla_tgt->tgt_stopped) 5143 qlt_fc_port_added(vha, fcport); 5144 break; 5145 case MODE_DUAL: 5146 qla2x00_reg_remote_port(vha, fcport); 5147 if (!vha->vha_tgt.qla_tgt->tgt_stop && 5148 !vha->vha_tgt.qla_tgt->tgt_stopped) 5149 qlt_fc_port_added(vha, fcport); 5150 break; 5151 default: 5152 break; 5153 } 5154 5155 if (IS_IIDMA_CAPABLE(vha->hw) && vha->hw->flags.gpsc_supported) { 5156 if (fcport->id_changed) { 5157 fcport->id_changed = 0; 5158 ql_dbg(ql_dbg_disc, vha, 0x20d7, 5159 "%s %d %8phC post gfpnid fcp_cnt %d\n", 5160 __func__, __LINE__, fcport->port_name, 5161 vha->fcport_count); 5162 qla24xx_post_gfpnid_work(vha, fcport); 5163 } else { 5164 ql_dbg(ql_dbg_disc, vha, 0x20d7, 5165 "%s %d %8phC post gpsc fcp_cnt %d\n", 5166 __func__, __LINE__, fcport->port_name, 5167 vha->fcport_count); 5168 qla24xx_post_gpsc_work(vha, fcport); 5169 } 5170 } 5171 } 5172 5173 /* 5174 * qla2x00_configure_fabric 5175 * Setup SNS devices with loop ID's. 5176 * 5177 * Input: 5178 * ha = adapter block pointer. 5179 * 5180 * Returns: 5181 * 0 = success. 5182 * BIT_0 = error 5183 */ 5184 static int 5185 qla2x00_configure_fabric(scsi_qla_host_t *vha) 5186 { 5187 int rval; 5188 fc_port_t *fcport; 5189 uint16_t mb[MAILBOX_REGISTER_COUNT]; 5190 uint16_t loop_id; 5191 LIST_HEAD(new_fcports); 5192 struct qla_hw_data *ha = vha->hw; 5193 int discovery_gen; 5194 5195 /* If FL port exists, then SNS is present */ 5196 if (IS_FWI2_CAPABLE(ha)) 5197 loop_id = NPH_F_PORT; 5198 else 5199 loop_id = SNS_FL_PORT; 5200 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1); 5201 if (rval != QLA_SUCCESS) { 5202 ql_dbg(ql_dbg_disc, vha, 0x20a0, 5203 "MBX_GET_PORT_NAME failed, No FL Port.\n"); 5204 5205 vha->device_flags &= ~SWITCH_FOUND; 5206 return (QLA_SUCCESS); 5207 } 5208 vha->device_flags |= SWITCH_FOUND; 5209 5210 5211 if (qla_tgt_mode_enabled(vha) || qla_dual_mode_enabled(vha)) { 5212 rval = qla2x00_send_change_request(vha, 0x3, 0); 5213 if (rval != QLA_SUCCESS) 5214 ql_log(ql_log_warn, vha, 0x121, 5215 "Failed to enable receiving of RSCN requests: 0x%x.\n", 5216 rval); 5217 } 5218 5219 5220 do { 5221 qla2x00_mgmt_svr_login(vha); 5222 5223 /* FDMI support. */ 5224 if (ql2xfdmienable && 5225 test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags)) 5226 qla2x00_fdmi_register(vha); 5227 5228 /* Ensure we are logged into the SNS. */ 5229 loop_id = NPH_SNS_LID(ha); 5230 rval = ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff, 5231 0xfc, mb, BIT_1|BIT_0); 5232 if (rval != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) { 5233 ql_dbg(ql_dbg_disc, vha, 0x20a1, 5234 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[6]=%x mb[7]=%x (%x).\n", 5235 loop_id, mb[0], mb[1], mb[2], mb[6], mb[7], rval); 5236 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5237 return rval; 5238 } 5239 if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) { 5240 if (qla2x00_rft_id(vha)) { 5241 /* EMPTY */ 5242 ql_dbg(ql_dbg_disc, vha, 0x20a2, 5243 "Register FC-4 TYPE failed.\n"); 5244 if (test_bit(LOOP_RESYNC_NEEDED, 5245 &vha->dpc_flags)) 5246 break; 5247 } 5248 if (qla2x00_rff_id(vha, FC4_TYPE_FCP_SCSI)) { 5249 /* EMPTY */ 5250 ql_dbg(ql_dbg_disc, vha, 0x209a, 5251 "Register FC-4 Features failed.\n"); 5252 if (test_bit(LOOP_RESYNC_NEEDED, 5253 &vha->dpc_flags)) 5254 break; 5255 } 5256 if (vha->flags.nvme_enabled) { 5257 if (qla2x00_rff_id(vha, FC_TYPE_NVME)) { 5258 ql_dbg(ql_dbg_disc, vha, 0x2049, 5259 "Register NVME FC Type Features failed.\n"); 5260 } 5261 } 5262 if (qla2x00_rnn_id(vha)) { 5263 /* EMPTY */ 5264 ql_dbg(ql_dbg_disc, vha, 0x2104, 5265 "Register Node Name failed.\n"); 5266 if (test_bit(LOOP_RESYNC_NEEDED, 5267 &vha->dpc_flags)) 5268 break; 5269 } else if (qla2x00_rsnn_nn(vha)) { 5270 /* EMPTY */ 5271 ql_dbg(ql_dbg_disc, vha, 0x209b, 5272 "Register Symbolic Node Name failed.\n"); 5273 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5274 break; 5275 } 5276 } 5277 5278 5279 /* Mark the time right before querying FW for connected ports. 5280 * This process is long, asynchronous and by the time it's done, 5281 * collected information might not be accurate anymore. E.g. 5282 * disconnected port might have re-connected and a brand new 5283 * session has been created. In this case session's generation 5284 * will be newer than discovery_gen. */ 5285 qlt_do_generation_tick(vha, &discovery_gen); 5286 5287 if (USE_ASYNC_SCAN(ha)) { 5288 rval = qla24xx_async_gpnft(vha, FC4_TYPE_FCP_SCSI, 5289 NULL); 5290 if (rval) 5291 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5292 } else { 5293 list_for_each_entry(fcport, &vha->vp_fcports, list) 5294 fcport->scan_state = QLA_FCPORT_SCAN; 5295 5296 rval = qla2x00_find_all_fabric_devs(vha); 5297 } 5298 if (rval != QLA_SUCCESS) 5299 break; 5300 } while (0); 5301 5302 if (!vha->nvme_local_port && vha->flags.nvme_enabled) 5303 qla_nvme_register_hba(vha); 5304 5305 if (rval) 5306 ql_dbg(ql_dbg_disc, vha, 0x2068, 5307 "Configure fabric error exit rval=%d.\n", rval); 5308 5309 return (rval); 5310 } 5311 5312 /* 5313 * qla2x00_find_all_fabric_devs 5314 * 5315 * Input: 5316 * ha = adapter block pointer. 5317 * dev = database device entry pointer. 5318 * 5319 * Returns: 5320 * 0 = success. 5321 * 5322 * Context: 5323 * Kernel context. 5324 */ 5325 static int 5326 qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha) 5327 { 5328 int rval; 5329 uint16_t loop_id; 5330 fc_port_t *fcport, *new_fcport; 5331 int found; 5332 5333 sw_info_t *swl; 5334 int swl_idx; 5335 int first_dev, last_dev; 5336 port_id_t wrap = {}, nxt_d_id; 5337 struct qla_hw_data *ha = vha->hw; 5338 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 5339 unsigned long flags; 5340 5341 rval = QLA_SUCCESS; 5342 5343 /* Try GID_PT to get device list, else GAN. */ 5344 if (!ha->swl) 5345 ha->swl = kcalloc(ha->max_fibre_devices, sizeof(sw_info_t), 5346 GFP_KERNEL); 5347 swl = ha->swl; 5348 if (!swl) { 5349 /*EMPTY*/ 5350 ql_dbg(ql_dbg_disc, vha, 0x209c, 5351 "GID_PT allocations failed, fallback on GA_NXT.\n"); 5352 } else { 5353 memset(swl, 0, ha->max_fibre_devices * sizeof(sw_info_t)); 5354 if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) { 5355 swl = NULL; 5356 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5357 return rval; 5358 } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) { 5359 swl = NULL; 5360 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5361 return rval; 5362 } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) { 5363 swl = NULL; 5364 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5365 return rval; 5366 } else if (qla2x00_gfpn_id(vha, swl) != QLA_SUCCESS) { 5367 swl = NULL; 5368 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5369 return rval; 5370 } 5371 5372 /* If other queries succeeded probe for FC-4 type */ 5373 if (swl) { 5374 qla2x00_gff_id(vha, swl); 5375 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5376 return rval; 5377 } 5378 } 5379 swl_idx = 0; 5380 5381 /* Allocate temporary fcport for any new fcports discovered. */ 5382 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 5383 if (new_fcport == NULL) { 5384 ql_log(ql_log_warn, vha, 0x209d, 5385 "Failed to allocate memory for fcport.\n"); 5386 return (QLA_MEMORY_ALLOC_FAILED); 5387 } 5388 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); 5389 /* Set start port ID scan at adapter ID. */ 5390 first_dev = 1; 5391 last_dev = 0; 5392 5393 /* Starting free loop ID. */ 5394 loop_id = ha->min_external_loopid; 5395 for (; loop_id <= ha->max_loop_id; loop_id++) { 5396 if (qla2x00_is_reserved_id(vha, loop_id)) 5397 continue; 5398 5399 if (ha->current_topology == ISP_CFG_FL && 5400 (atomic_read(&vha->loop_down_timer) || 5401 LOOP_TRANSITION(vha))) { 5402 atomic_set(&vha->loop_down_timer, 0); 5403 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5404 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 5405 break; 5406 } 5407 5408 if (swl != NULL) { 5409 if (last_dev) { 5410 wrap.b24 = new_fcport->d_id.b24; 5411 } else { 5412 new_fcport->d_id.b24 = swl[swl_idx].d_id.b24; 5413 memcpy(new_fcport->node_name, 5414 swl[swl_idx].node_name, WWN_SIZE); 5415 memcpy(new_fcport->port_name, 5416 swl[swl_idx].port_name, WWN_SIZE); 5417 memcpy(new_fcport->fabric_port_name, 5418 swl[swl_idx].fabric_port_name, WWN_SIZE); 5419 new_fcport->fp_speed = swl[swl_idx].fp_speed; 5420 new_fcport->fc4_type = swl[swl_idx].fc4_type; 5421 5422 new_fcport->nvme_flag = 0; 5423 new_fcport->fc4f_nvme = 0; 5424 if (vha->flags.nvme_enabled && 5425 swl[swl_idx].fc4f_nvme) { 5426 new_fcport->fc4f_nvme = 5427 swl[swl_idx].fc4f_nvme; 5428 ql_log(ql_log_info, vha, 0x2131, 5429 "FOUND: NVME port %8phC as FC Type 28h\n", 5430 new_fcport->port_name); 5431 } 5432 5433 if (swl[swl_idx].d_id.b.rsvd_1 != 0) { 5434 last_dev = 1; 5435 } 5436 swl_idx++; 5437 } 5438 } else { 5439 /* Send GA_NXT to the switch */ 5440 rval = qla2x00_ga_nxt(vha, new_fcport); 5441 if (rval != QLA_SUCCESS) { 5442 ql_log(ql_log_warn, vha, 0x209e, 5443 "SNS scan failed -- assuming " 5444 "zero-entry result.\n"); 5445 rval = QLA_SUCCESS; 5446 break; 5447 } 5448 } 5449 5450 /* If wrap on switch device list, exit. */ 5451 if (first_dev) { 5452 wrap.b24 = new_fcport->d_id.b24; 5453 first_dev = 0; 5454 } else if (new_fcport->d_id.b24 == wrap.b24) { 5455 ql_dbg(ql_dbg_disc, vha, 0x209f, 5456 "Device wrap (%02x%02x%02x).\n", 5457 new_fcport->d_id.b.domain, 5458 new_fcport->d_id.b.area, 5459 new_fcport->d_id.b.al_pa); 5460 break; 5461 } 5462 5463 /* Bypass if same physical adapter. */ 5464 if (new_fcport->d_id.b24 == base_vha->d_id.b24) 5465 continue; 5466 5467 /* Bypass virtual ports of the same host. */ 5468 if (qla2x00_is_a_vp_did(vha, new_fcport->d_id.b24)) 5469 continue; 5470 5471 /* Bypass if same domain and area of adapter. */ 5472 if (((new_fcport->d_id.b24 & 0xffff00) == 5473 (vha->d_id.b24 & 0xffff00)) && ha->current_topology == 5474 ISP_CFG_FL) 5475 continue; 5476 5477 /* Bypass reserved domain fields. */ 5478 if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0) 5479 continue; 5480 5481 /* Bypass ports whose FCP-4 type is not FCP_SCSI */ 5482 if (ql2xgffidenable && 5483 (new_fcport->fc4_type != FC4_TYPE_FCP_SCSI && 5484 new_fcport->fc4_type != FC4_TYPE_UNKNOWN)) 5485 continue; 5486 5487 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 5488 5489 /* Locate matching device in database. */ 5490 found = 0; 5491 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5492 if (memcmp(new_fcport->port_name, fcport->port_name, 5493 WWN_SIZE)) 5494 continue; 5495 5496 fcport->scan_state = QLA_FCPORT_FOUND; 5497 5498 found++; 5499 5500 /* Update port state. */ 5501 memcpy(fcport->fabric_port_name, 5502 new_fcport->fabric_port_name, WWN_SIZE); 5503 fcport->fp_speed = new_fcport->fp_speed; 5504 5505 /* 5506 * If address the same and state FCS_ONLINE 5507 * (or in target mode), nothing changed. 5508 */ 5509 if (fcport->d_id.b24 == new_fcport->d_id.b24 && 5510 (atomic_read(&fcport->state) == FCS_ONLINE || 5511 (vha->host->active_mode == MODE_TARGET))) { 5512 break; 5513 } 5514 5515 /* 5516 * If device was not a fabric device before. 5517 */ 5518 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) { 5519 fcport->d_id.b24 = new_fcport->d_id.b24; 5520 qla2x00_clear_loop_id(fcport); 5521 fcport->flags |= (FCF_FABRIC_DEVICE | 5522 FCF_LOGIN_NEEDED); 5523 break; 5524 } 5525 5526 /* 5527 * Port ID changed or device was marked to be updated; 5528 * Log it out if still logged in and mark it for 5529 * relogin later. 5530 */ 5531 if (qla_tgt_mode_enabled(base_vha)) { 5532 ql_dbg(ql_dbg_tgt_mgt, vha, 0xf080, 5533 "port changed FC ID, %8phC" 5534 " old %x:%x:%x (loop_id 0x%04x)-> new %x:%x:%x\n", 5535 fcport->port_name, 5536 fcport->d_id.b.domain, 5537 fcport->d_id.b.area, 5538 fcport->d_id.b.al_pa, 5539 fcport->loop_id, 5540 new_fcport->d_id.b.domain, 5541 new_fcport->d_id.b.area, 5542 new_fcport->d_id.b.al_pa); 5543 fcport->d_id.b24 = new_fcport->d_id.b24; 5544 break; 5545 } 5546 5547 fcport->d_id.b24 = new_fcport->d_id.b24; 5548 fcport->flags |= FCF_LOGIN_NEEDED; 5549 break; 5550 } 5551 5552 if (fcport->fc4f_nvme) { 5553 if (fcport->disc_state == DSC_DELETE_PEND) { 5554 fcport->disc_state = DSC_GNL; 5555 vha->fcport_count--; 5556 fcport->login_succ = 0; 5557 } 5558 } 5559 5560 if (found) { 5561 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 5562 continue; 5563 } 5564 /* If device was not in our fcports list, then add it. */ 5565 new_fcport->scan_state = QLA_FCPORT_FOUND; 5566 list_add_tail(&new_fcport->list, &vha->vp_fcports); 5567 5568 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 5569 5570 5571 /* Allocate a new replacement fcport. */ 5572 nxt_d_id.b24 = new_fcport->d_id.b24; 5573 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 5574 if (new_fcport == NULL) { 5575 ql_log(ql_log_warn, vha, 0xd032, 5576 "Memory allocation failed for fcport.\n"); 5577 return (QLA_MEMORY_ALLOC_FAILED); 5578 } 5579 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); 5580 new_fcport->d_id.b24 = nxt_d_id.b24; 5581 } 5582 5583 qla2x00_free_fcport(new_fcport); 5584 5585 /* 5586 * Logout all previous fabric dev marked lost, except FCP2 devices. 5587 */ 5588 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5589 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5590 break; 5591 5592 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 || 5593 (fcport->flags & FCF_LOGIN_NEEDED) == 0) 5594 continue; 5595 5596 if (fcport->scan_state == QLA_FCPORT_SCAN) { 5597 if ((qla_dual_mode_enabled(vha) || 5598 qla_ini_mode_enabled(vha)) && 5599 atomic_read(&fcport->state) == FCS_ONLINE) { 5600 qla2x00_mark_device_lost(vha, fcport, 5601 ql2xplogiabsentdevice, 0); 5602 if (fcport->loop_id != FC_NO_LOOP_ID && 5603 (fcport->flags & FCF_FCP2_DEVICE) == 0 && 5604 fcport->port_type != FCT_INITIATOR && 5605 fcport->port_type != FCT_BROADCAST) { 5606 ql_dbg(ql_dbg_disc, vha, 0x20f0, 5607 "%s %d %8phC post del sess\n", 5608 __func__, __LINE__, 5609 fcport->port_name); 5610 qlt_schedule_sess_for_deletion(fcport); 5611 continue; 5612 } 5613 } 5614 } 5615 5616 if (fcport->scan_state == QLA_FCPORT_FOUND) 5617 qla24xx_fcport_handle_login(vha, fcport); 5618 } 5619 return (rval); 5620 } 5621 5622 /* 5623 * qla2x00_find_new_loop_id 5624 * Scan through our port list and find a new usable loop ID. 5625 * 5626 * Input: 5627 * ha: adapter state pointer. 5628 * dev: port structure pointer. 5629 * 5630 * Returns: 5631 * qla2x00 local function return status code. 5632 * 5633 * Context: 5634 * Kernel context. 5635 */ 5636 int 5637 qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev) 5638 { 5639 int rval; 5640 struct qla_hw_data *ha = vha->hw; 5641 unsigned long flags = 0; 5642 5643 rval = QLA_SUCCESS; 5644 5645 spin_lock_irqsave(&ha->vport_slock, flags); 5646 5647 dev->loop_id = find_first_zero_bit(ha->loop_id_map, 5648 LOOPID_MAP_SIZE); 5649 if (dev->loop_id >= LOOPID_MAP_SIZE || 5650 qla2x00_is_reserved_id(vha, dev->loop_id)) { 5651 dev->loop_id = FC_NO_LOOP_ID; 5652 rval = QLA_FUNCTION_FAILED; 5653 } else 5654 set_bit(dev->loop_id, ha->loop_id_map); 5655 5656 spin_unlock_irqrestore(&ha->vport_slock, flags); 5657 5658 if (rval == QLA_SUCCESS) 5659 ql_dbg(ql_dbg_disc, dev->vha, 0x2086, 5660 "Assigning new loopid=%x, portid=%x.\n", 5661 dev->loop_id, dev->d_id.b24); 5662 else 5663 ql_log(ql_log_warn, dev->vha, 0x2087, 5664 "No loop_id's available, portid=%x.\n", 5665 dev->d_id.b24); 5666 5667 return (rval); 5668 } 5669 5670 5671 /* 5672 * qla2x00_fabric_login 5673 * Issue fabric login command. 5674 * 5675 * Input: 5676 * ha = adapter block pointer. 5677 * device = pointer to FC device type structure. 5678 * 5679 * Returns: 5680 * 0 - Login successfully 5681 * 1 - Login failed 5682 * 2 - Initiator device 5683 * 3 - Fatal error 5684 */ 5685 int 5686 qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport, 5687 uint16_t *next_loopid) 5688 { 5689 int rval; 5690 int retry; 5691 uint16_t tmp_loopid; 5692 uint16_t mb[MAILBOX_REGISTER_COUNT]; 5693 struct qla_hw_data *ha = vha->hw; 5694 5695 retry = 0; 5696 tmp_loopid = 0; 5697 5698 for (;;) { 5699 ql_dbg(ql_dbg_disc, vha, 0x2000, 5700 "Trying Fabric Login w/loop id 0x%04x for port " 5701 "%02x%02x%02x.\n", 5702 fcport->loop_id, fcport->d_id.b.domain, 5703 fcport->d_id.b.area, fcport->d_id.b.al_pa); 5704 5705 /* Login fcport on switch. */ 5706 rval = ha->isp_ops->fabric_login(vha, fcport->loop_id, 5707 fcport->d_id.b.domain, fcport->d_id.b.area, 5708 fcport->d_id.b.al_pa, mb, BIT_0); 5709 if (rval != QLA_SUCCESS) { 5710 return rval; 5711 } 5712 if (mb[0] == MBS_PORT_ID_USED) { 5713 /* 5714 * Device has another loop ID. The firmware team 5715 * recommends the driver perform an implicit login with 5716 * the specified ID again. The ID we just used is save 5717 * here so we return with an ID that can be tried by 5718 * the next login. 5719 */ 5720 retry++; 5721 tmp_loopid = fcport->loop_id; 5722 fcport->loop_id = mb[1]; 5723 5724 ql_dbg(ql_dbg_disc, vha, 0x2001, 5725 "Fabric Login: port in use - next loop " 5726 "id=0x%04x, port id= %02x%02x%02x.\n", 5727 fcport->loop_id, fcport->d_id.b.domain, 5728 fcport->d_id.b.area, fcport->d_id.b.al_pa); 5729 5730 } else if (mb[0] == MBS_COMMAND_COMPLETE) { 5731 /* 5732 * Login succeeded. 5733 */ 5734 if (retry) { 5735 /* A retry occurred before. */ 5736 *next_loopid = tmp_loopid; 5737 } else { 5738 /* 5739 * No retry occurred before. Just increment the 5740 * ID value for next login. 5741 */ 5742 *next_loopid = (fcport->loop_id + 1); 5743 } 5744 5745 if (mb[1] & BIT_0) { 5746 fcport->port_type = FCT_INITIATOR; 5747 } else { 5748 fcport->port_type = FCT_TARGET; 5749 if (mb[1] & BIT_1) { 5750 fcport->flags |= FCF_FCP2_DEVICE; 5751 } 5752 } 5753 5754 if (mb[10] & BIT_0) 5755 fcport->supported_classes |= FC_COS_CLASS2; 5756 if (mb[10] & BIT_1) 5757 fcport->supported_classes |= FC_COS_CLASS3; 5758 5759 if (IS_FWI2_CAPABLE(ha)) { 5760 if (mb[10] & BIT_7) 5761 fcport->flags |= 5762 FCF_CONF_COMP_SUPPORTED; 5763 } 5764 5765 rval = QLA_SUCCESS; 5766 break; 5767 } else if (mb[0] == MBS_LOOP_ID_USED) { 5768 /* 5769 * Loop ID already used, try next loop ID. 5770 */ 5771 fcport->loop_id++; 5772 rval = qla2x00_find_new_loop_id(vha, fcport); 5773 if (rval != QLA_SUCCESS) { 5774 /* Ran out of loop IDs to use */ 5775 break; 5776 } 5777 } else if (mb[0] == MBS_COMMAND_ERROR) { 5778 /* 5779 * Firmware possibly timed out during login. If NO 5780 * retries are left to do then the device is declared 5781 * dead. 5782 */ 5783 *next_loopid = fcport->loop_id; 5784 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 5785 fcport->d_id.b.domain, fcport->d_id.b.area, 5786 fcport->d_id.b.al_pa); 5787 qla2x00_mark_device_lost(vha, fcport, 1, 0); 5788 5789 rval = 1; 5790 break; 5791 } else { 5792 /* 5793 * unrecoverable / not handled error 5794 */ 5795 ql_dbg(ql_dbg_disc, vha, 0x2002, 5796 "Failed=%x port_id=%02x%02x%02x loop_id=%x " 5797 "jiffies=%lx.\n", mb[0], fcport->d_id.b.domain, 5798 fcport->d_id.b.area, fcport->d_id.b.al_pa, 5799 fcport->loop_id, jiffies); 5800 5801 *next_loopid = fcport->loop_id; 5802 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 5803 fcport->d_id.b.domain, fcport->d_id.b.area, 5804 fcport->d_id.b.al_pa); 5805 qla2x00_clear_loop_id(fcport); 5806 fcport->login_retry = 0; 5807 5808 rval = 3; 5809 break; 5810 } 5811 } 5812 5813 return (rval); 5814 } 5815 5816 /* 5817 * qla2x00_local_device_login 5818 * Issue local device login command. 5819 * 5820 * Input: 5821 * ha = adapter block pointer. 5822 * loop_id = loop id of device to login to. 5823 * 5824 * Returns (Where's the #define!!!!): 5825 * 0 - Login successfully 5826 * 1 - Login failed 5827 * 3 - Fatal error 5828 */ 5829 int 5830 qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport) 5831 { 5832 int rval; 5833 uint16_t mb[MAILBOX_REGISTER_COUNT]; 5834 5835 memset(mb, 0, sizeof(mb)); 5836 rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0); 5837 if (rval == QLA_SUCCESS) { 5838 /* Interrogate mailbox registers for any errors */ 5839 if (mb[0] == MBS_COMMAND_ERROR) 5840 rval = 1; 5841 else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR) 5842 /* device not in PCB table */ 5843 rval = 3; 5844 } 5845 5846 return (rval); 5847 } 5848 5849 /* 5850 * qla2x00_loop_resync 5851 * Resync with fibre channel devices. 5852 * 5853 * Input: 5854 * ha = adapter block pointer. 5855 * 5856 * Returns: 5857 * 0 = success 5858 */ 5859 int 5860 qla2x00_loop_resync(scsi_qla_host_t *vha) 5861 { 5862 int rval = QLA_SUCCESS; 5863 uint32_t wait_time; 5864 struct req_que *req; 5865 struct rsp_que *rsp; 5866 5867 req = vha->req; 5868 rsp = req->rsp; 5869 5870 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 5871 if (vha->flags.online) { 5872 if (!(rval = qla2x00_fw_ready(vha))) { 5873 /* Wait at most MAX_TARGET RSCNs for a stable link. */ 5874 wait_time = 256; 5875 do { 5876 if (!IS_QLAFX00(vha->hw)) { 5877 /* 5878 * Issue a marker after FW becomes 5879 * ready. 5880 */ 5881 qla2x00_marker(vha, req, rsp, 0, 0, 5882 MK_SYNC_ALL); 5883 vha->marker_needed = 0; 5884 } 5885 5886 /* Remap devices on Loop. */ 5887 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5888 5889 if (IS_QLAFX00(vha->hw)) 5890 qlafx00_configure_devices(vha); 5891 else 5892 qla2x00_configure_loop(vha); 5893 5894 wait_time--; 5895 } while (!atomic_read(&vha->loop_down_timer) && 5896 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) 5897 && wait_time && (test_bit(LOOP_RESYNC_NEEDED, 5898 &vha->dpc_flags))); 5899 } 5900 } 5901 5902 if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) 5903 return (QLA_FUNCTION_FAILED); 5904 5905 if (rval) 5906 ql_dbg(ql_dbg_disc, vha, 0x206c, 5907 "%s *** FAILED ***.\n", __func__); 5908 5909 return (rval); 5910 } 5911 5912 /* 5913 * qla2x00_perform_loop_resync 5914 * Description: This function will set the appropriate flags and call 5915 * qla2x00_loop_resync. If successful loop will be resynced 5916 * Arguments : scsi_qla_host_t pointer 5917 * returm : Success or Failure 5918 */ 5919 5920 int qla2x00_perform_loop_resync(scsi_qla_host_t *ha) 5921 { 5922 int32_t rval = 0; 5923 5924 if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) { 5925 /*Configure the flags so that resync happens properly*/ 5926 atomic_set(&ha->loop_down_timer, 0); 5927 if (!(ha->device_flags & DFLG_NO_CABLE)) { 5928 atomic_set(&ha->loop_state, LOOP_UP); 5929 set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags); 5930 set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags); 5931 set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags); 5932 5933 rval = qla2x00_loop_resync(ha); 5934 } else 5935 atomic_set(&ha->loop_state, LOOP_DEAD); 5936 5937 clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags); 5938 } 5939 5940 return rval; 5941 } 5942 5943 void 5944 qla2x00_update_fcports(scsi_qla_host_t *base_vha) 5945 { 5946 fc_port_t *fcport; 5947 struct scsi_qla_host *vha; 5948 struct qla_hw_data *ha = base_vha->hw; 5949 unsigned long flags; 5950 5951 spin_lock_irqsave(&ha->vport_slock, flags); 5952 /* Go with deferred removal of rport references. */ 5953 list_for_each_entry(vha, &base_vha->hw->vp_list, list) { 5954 atomic_inc(&vha->vref_count); 5955 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5956 if (fcport->drport && 5957 atomic_read(&fcport->state) != FCS_UNCONFIGURED) { 5958 spin_unlock_irqrestore(&ha->vport_slock, flags); 5959 qla2x00_rport_del(fcport); 5960 5961 spin_lock_irqsave(&ha->vport_slock, flags); 5962 } 5963 } 5964 atomic_dec(&vha->vref_count); 5965 wake_up(&vha->vref_waitq); 5966 } 5967 spin_unlock_irqrestore(&ha->vport_slock, flags); 5968 } 5969 5970 /* Assumes idc_lock always held on entry */ 5971 void 5972 qla83xx_reset_ownership(scsi_qla_host_t *vha) 5973 { 5974 struct qla_hw_data *ha = vha->hw; 5975 uint32_t drv_presence, drv_presence_mask; 5976 uint32_t dev_part_info1, dev_part_info2, class_type; 5977 uint32_t class_type_mask = 0x3; 5978 uint16_t fcoe_other_function = 0xffff, i; 5979 5980 if (IS_QLA8044(ha)) { 5981 drv_presence = qla8044_rd_direct(vha, 5982 QLA8044_CRB_DRV_ACTIVE_INDEX); 5983 dev_part_info1 = qla8044_rd_direct(vha, 5984 QLA8044_CRB_DEV_PART_INFO_INDEX); 5985 dev_part_info2 = qla8044_rd_direct(vha, 5986 QLA8044_CRB_DEV_PART_INFO2); 5987 } else { 5988 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence); 5989 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO1, &dev_part_info1); 5990 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO2, &dev_part_info2); 5991 } 5992 for (i = 0; i < 8; i++) { 5993 class_type = ((dev_part_info1 >> (i * 4)) & class_type_mask); 5994 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) && 5995 (i != ha->portnum)) { 5996 fcoe_other_function = i; 5997 break; 5998 } 5999 } 6000 if (fcoe_other_function == 0xffff) { 6001 for (i = 0; i < 8; i++) { 6002 class_type = ((dev_part_info2 >> (i * 4)) & 6003 class_type_mask); 6004 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) && 6005 ((i + 8) != ha->portnum)) { 6006 fcoe_other_function = i + 8; 6007 break; 6008 } 6009 } 6010 } 6011 /* 6012 * Prepare drv-presence mask based on fcoe functions present. 6013 * However consider only valid physical fcoe function numbers (0-15). 6014 */ 6015 drv_presence_mask = ~((1 << (ha->portnum)) | 6016 ((fcoe_other_function == 0xffff) ? 6017 0 : (1 << (fcoe_other_function)))); 6018 6019 /* We are the reset owner iff: 6020 * - No other protocol drivers present. 6021 * - This is the lowest among fcoe functions. */ 6022 if (!(drv_presence & drv_presence_mask) && 6023 (ha->portnum < fcoe_other_function)) { 6024 ql_dbg(ql_dbg_p3p, vha, 0xb07f, 6025 "This host is Reset owner.\n"); 6026 ha->flags.nic_core_reset_owner = 1; 6027 } 6028 } 6029 6030 static int 6031 __qla83xx_set_drv_ack(scsi_qla_host_t *vha) 6032 { 6033 int rval = QLA_SUCCESS; 6034 struct qla_hw_data *ha = vha->hw; 6035 uint32_t drv_ack; 6036 6037 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack); 6038 if (rval == QLA_SUCCESS) { 6039 drv_ack |= (1 << ha->portnum); 6040 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack); 6041 } 6042 6043 return rval; 6044 } 6045 6046 static int 6047 __qla83xx_clear_drv_ack(scsi_qla_host_t *vha) 6048 { 6049 int rval = QLA_SUCCESS; 6050 struct qla_hw_data *ha = vha->hw; 6051 uint32_t drv_ack; 6052 6053 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack); 6054 if (rval == QLA_SUCCESS) { 6055 drv_ack &= ~(1 << ha->portnum); 6056 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack); 6057 } 6058 6059 return rval; 6060 } 6061 6062 static const char * 6063 qla83xx_dev_state_to_string(uint32_t dev_state) 6064 { 6065 switch (dev_state) { 6066 case QLA8XXX_DEV_COLD: 6067 return "COLD/RE-INIT"; 6068 case QLA8XXX_DEV_INITIALIZING: 6069 return "INITIALIZING"; 6070 case QLA8XXX_DEV_READY: 6071 return "READY"; 6072 case QLA8XXX_DEV_NEED_RESET: 6073 return "NEED RESET"; 6074 case QLA8XXX_DEV_NEED_QUIESCENT: 6075 return "NEED QUIESCENT"; 6076 case QLA8XXX_DEV_FAILED: 6077 return "FAILED"; 6078 case QLA8XXX_DEV_QUIESCENT: 6079 return "QUIESCENT"; 6080 default: 6081 return "Unknown"; 6082 } 6083 } 6084 6085 /* Assumes idc-lock always held on entry */ 6086 void 6087 qla83xx_idc_audit(scsi_qla_host_t *vha, int audit_type) 6088 { 6089 struct qla_hw_data *ha = vha->hw; 6090 uint32_t idc_audit_reg = 0, duration_secs = 0; 6091 6092 switch (audit_type) { 6093 case IDC_AUDIT_TIMESTAMP: 6094 ha->idc_audit_ts = (jiffies_to_msecs(jiffies) / 1000); 6095 idc_audit_reg = (ha->portnum) | 6096 (IDC_AUDIT_TIMESTAMP << 7) | (ha->idc_audit_ts << 8); 6097 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg); 6098 break; 6099 6100 case IDC_AUDIT_COMPLETION: 6101 duration_secs = ((jiffies_to_msecs(jiffies) - 6102 jiffies_to_msecs(ha->idc_audit_ts)) / 1000); 6103 idc_audit_reg = (ha->portnum) | 6104 (IDC_AUDIT_COMPLETION << 7) | (duration_secs << 8); 6105 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg); 6106 break; 6107 6108 default: 6109 ql_log(ql_log_warn, vha, 0xb078, 6110 "Invalid audit type specified.\n"); 6111 break; 6112 } 6113 } 6114 6115 /* Assumes idc_lock always held on entry */ 6116 static int 6117 qla83xx_initiating_reset(scsi_qla_host_t *vha) 6118 { 6119 struct qla_hw_data *ha = vha->hw; 6120 uint32_t idc_control, dev_state; 6121 6122 __qla83xx_get_idc_control(vha, &idc_control); 6123 if ((idc_control & QLA83XX_IDC_RESET_DISABLED)) { 6124 ql_log(ql_log_info, vha, 0xb080, 6125 "NIC Core reset has been disabled. idc-control=0x%x\n", 6126 idc_control); 6127 return QLA_FUNCTION_FAILED; 6128 } 6129 6130 /* Set NEED-RESET iff in READY state and we are the reset-owner */ 6131 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state); 6132 if (ha->flags.nic_core_reset_owner && dev_state == QLA8XXX_DEV_READY) { 6133 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, 6134 QLA8XXX_DEV_NEED_RESET); 6135 ql_log(ql_log_info, vha, 0xb056, "HW State: NEED RESET.\n"); 6136 qla83xx_idc_audit(vha, IDC_AUDIT_TIMESTAMP); 6137 } else { 6138 const char *state = qla83xx_dev_state_to_string(dev_state); 6139 ql_log(ql_log_info, vha, 0xb057, "HW State: %s.\n", state); 6140 6141 /* SV: XXX: Is timeout required here? */ 6142 /* Wait for IDC state change READY -> NEED_RESET */ 6143 while (dev_state == QLA8XXX_DEV_READY) { 6144 qla83xx_idc_unlock(vha, 0); 6145 msleep(200); 6146 qla83xx_idc_lock(vha, 0); 6147 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state); 6148 } 6149 } 6150 6151 /* Send IDC ack by writing to drv-ack register */ 6152 __qla83xx_set_drv_ack(vha); 6153 6154 return QLA_SUCCESS; 6155 } 6156 6157 int 6158 __qla83xx_set_idc_control(scsi_qla_host_t *vha, uint32_t idc_control) 6159 { 6160 return qla83xx_wr_reg(vha, QLA83XX_IDC_CONTROL, idc_control); 6161 } 6162 6163 int 6164 __qla83xx_get_idc_control(scsi_qla_host_t *vha, uint32_t *idc_control) 6165 { 6166 return qla83xx_rd_reg(vha, QLA83XX_IDC_CONTROL, idc_control); 6167 } 6168 6169 static int 6170 qla83xx_check_driver_presence(scsi_qla_host_t *vha) 6171 { 6172 uint32_t drv_presence = 0; 6173 struct qla_hw_data *ha = vha->hw; 6174 6175 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence); 6176 if (drv_presence & (1 << ha->portnum)) 6177 return QLA_SUCCESS; 6178 else 6179 return QLA_TEST_FAILED; 6180 } 6181 6182 int 6183 qla83xx_nic_core_reset(scsi_qla_host_t *vha) 6184 { 6185 int rval = QLA_SUCCESS; 6186 struct qla_hw_data *ha = vha->hw; 6187 6188 ql_dbg(ql_dbg_p3p, vha, 0xb058, 6189 "Entered %s().\n", __func__); 6190 6191 if (vha->device_flags & DFLG_DEV_FAILED) { 6192 ql_log(ql_log_warn, vha, 0xb059, 6193 "Device in unrecoverable FAILED state.\n"); 6194 return QLA_FUNCTION_FAILED; 6195 } 6196 6197 qla83xx_idc_lock(vha, 0); 6198 6199 if (qla83xx_check_driver_presence(vha) != QLA_SUCCESS) { 6200 ql_log(ql_log_warn, vha, 0xb05a, 6201 "Function=0x%x has been removed from IDC participation.\n", 6202 ha->portnum); 6203 rval = QLA_FUNCTION_FAILED; 6204 goto exit; 6205 } 6206 6207 qla83xx_reset_ownership(vha); 6208 6209 rval = qla83xx_initiating_reset(vha); 6210 6211 /* 6212 * Perform reset if we are the reset-owner, 6213 * else wait till IDC state changes to READY/FAILED. 6214 */ 6215 if (rval == QLA_SUCCESS) { 6216 rval = qla83xx_idc_state_handler(vha); 6217 6218 if (rval == QLA_SUCCESS) 6219 ha->flags.nic_core_hung = 0; 6220 __qla83xx_clear_drv_ack(vha); 6221 } 6222 6223 exit: 6224 qla83xx_idc_unlock(vha, 0); 6225 6226 ql_dbg(ql_dbg_p3p, vha, 0xb05b, "Exiting %s.\n", __func__); 6227 6228 return rval; 6229 } 6230 6231 int 6232 qla2xxx_mctp_dump(scsi_qla_host_t *vha) 6233 { 6234 struct qla_hw_data *ha = vha->hw; 6235 int rval = QLA_FUNCTION_FAILED; 6236 6237 if (!IS_MCTP_CAPABLE(ha)) { 6238 /* This message can be removed from the final version */ 6239 ql_log(ql_log_info, vha, 0x506d, 6240 "This board is not MCTP capable\n"); 6241 return rval; 6242 } 6243 6244 if (!ha->mctp_dump) { 6245 ha->mctp_dump = dma_alloc_coherent(&ha->pdev->dev, 6246 MCTP_DUMP_SIZE, &ha->mctp_dump_dma, GFP_KERNEL); 6247 6248 if (!ha->mctp_dump) { 6249 ql_log(ql_log_warn, vha, 0x506e, 6250 "Failed to allocate memory for mctp dump\n"); 6251 return rval; 6252 } 6253 } 6254 6255 #define MCTP_DUMP_STR_ADDR 0x00000000 6256 rval = qla2x00_dump_mctp_data(vha, ha->mctp_dump_dma, 6257 MCTP_DUMP_STR_ADDR, MCTP_DUMP_SIZE/4); 6258 if (rval != QLA_SUCCESS) { 6259 ql_log(ql_log_warn, vha, 0x506f, 6260 "Failed to capture mctp dump\n"); 6261 } else { 6262 ql_log(ql_log_info, vha, 0x5070, 6263 "Mctp dump capture for host (%ld/%p).\n", 6264 vha->host_no, ha->mctp_dump); 6265 ha->mctp_dumped = 1; 6266 } 6267 6268 if (!ha->flags.nic_core_reset_hdlr_active && !ha->portnum) { 6269 ha->flags.nic_core_reset_hdlr_active = 1; 6270 rval = qla83xx_restart_nic_firmware(vha); 6271 if (rval) 6272 /* NIC Core reset failed. */ 6273 ql_log(ql_log_warn, vha, 0x5071, 6274 "Failed to restart nic firmware\n"); 6275 else 6276 ql_dbg(ql_dbg_p3p, vha, 0xb084, 6277 "Restarted NIC firmware successfully.\n"); 6278 ha->flags.nic_core_reset_hdlr_active = 0; 6279 } 6280 6281 return rval; 6282 6283 } 6284 6285 /* 6286 * qla2x00_quiesce_io 6287 * Description: This function will block the new I/Os 6288 * Its not aborting any I/Os as context 6289 * is not destroyed during quiescence 6290 * Arguments: scsi_qla_host_t 6291 * return : void 6292 */ 6293 void 6294 qla2x00_quiesce_io(scsi_qla_host_t *vha) 6295 { 6296 struct qla_hw_data *ha = vha->hw; 6297 struct scsi_qla_host *vp; 6298 6299 ql_dbg(ql_dbg_dpc, vha, 0x401d, 6300 "Quiescing I/O - ha=%p.\n", ha); 6301 6302 atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME); 6303 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 6304 atomic_set(&vha->loop_state, LOOP_DOWN); 6305 qla2x00_mark_all_devices_lost(vha, 0); 6306 list_for_each_entry(vp, &ha->vp_list, list) 6307 qla2x00_mark_all_devices_lost(vp, 0); 6308 } else { 6309 if (!atomic_read(&vha->loop_down_timer)) 6310 atomic_set(&vha->loop_down_timer, 6311 LOOP_DOWN_TIME); 6312 } 6313 /* Wait for pending cmds to complete */ 6314 qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST); 6315 } 6316 6317 void 6318 qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha) 6319 { 6320 struct qla_hw_data *ha = vha->hw; 6321 struct scsi_qla_host *vp; 6322 unsigned long flags; 6323 fc_port_t *fcport; 6324 u16 i; 6325 6326 /* For ISP82XX, driver waits for completion of the commands. 6327 * online flag should be set. 6328 */ 6329 if (!(IS_P3P_TYPE(ha))) 6330 vha->flags.online = 0; 6331 ha->flags.chip_reset_done = 0; 6332 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 6333 vha->qla_stats.total_isp_aborts++; 6334 6335 ql_log(ql_log_info, vha, 0x00af, 6336 "Performing ISP error recovery - ha=%p.\n", ha); 6337 6338 /* For ISP82XX, reset_chip is just disabling interrupts. 6339 * Driver waits for the completion of the commands. 6340 * the interrupts need to be enabled. 6341 */ 6342 if (!(IS_P3P_TYPE(ha))) 6343 ha->isp_ops->reset_chip(vha); 6344 6345 SAVE_TOPO(ha); 6346 ha->flags.rida_fmt2 = 0; 6347 ha->flags.n2n_ae = 0; 6348 ha->flags.lip_ae = 0; 6349 ha->current_topology = 0; 6350 ha->flags.fw_started = 0; 6351 ha->flags.fw_init_done = 0; 6352 ha->base_qpair->chip_reset++; 6353 for (i = 0; i < ha->max_qpairs; i++) { 6354 if (ha->queue_pair_map[i]) 6355 ha->queue_pair_map[i]->chip_reset = 6356 ha->base_qpair->chip_reset; 6357 } 6358 6359 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 6360 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 6361 atomic_set(&vha->loop_state, LOOP_DOWN); 6362 qla2x00_mark_all_devices_lost(vha, 0); 6363 6364 spin_lock_irqsave(&ha->vport_slock, flags); 6365 list_for_each_entry(vp, &ha->vp_list, list) { 6366 atomic_inc(&vp->vref_count); 6367 spin_unlock_irqrestore(&ha->vport_slock, flags); 6368 6369 qla2x00_mark_all_devices_lost(vp, 0); 6370 6371 spin_lock_irqsave(&ha->vport_slock, flags); 6372 atomic_dec(&vp->vref_count); 6373 } 6374 spin_unlock_irqrestore(&ha->vport_slock, flags); 6375 } else { 6376 if (!atomic_read(&vha->loop_down_timer)) 6377 atomic_set(&vha->loop_down_timer, 6378 LOOP_DOWN_TIME); 6379 } 6380 6381 /* Clear all async request states across all VPs. */ 6382 list_for_each_entry(fcport, &vha->vp_fcports, list) 6383 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 6384 spin_lock_irqsave(&ha->vport_slock, flags); 6385 list_for_each_entry(vp, &ha->vp_list, list) { 6386 atomic_inc(&vp->vref_count); 6387 spin_unlock_irqrestore(&ha->vport_slock, flags); 6388 6389 list_for_each_entry(fcport, &vp->vp_fcports, list) 6390 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 6391 6392 spin_lock_irqsave(&ha->vport_slock, flags); 6393 atomic_dec(&vp->vref_count); 6394 } 6395 spin_unlock_irqrestore(&ha->vport_slock, flags); 6396 6397 if (!ha->flags.eeh_busy) { 6398 /* Make sure for ISP 82XX IO DMA is complete */ 6399 if (IS_P3P_TYPE(ha)) { 6400 qla82xx_chip_reset_cleanup(vha); 6401 ql_log(ql_log_info, vha, 0x00b4, 6402 "Done chip reset cleanup.\n"); 6403 6404 /* Done waiting for pending commands. 6405 * Reset the online flag. 6406 */ 6407 vha->flags.online = 0; 6408 } 6409 6410 /* Requeue all commands in outstanding command list. */ 6411 qla2x00_abort_all_cmds(vha, DID_RESET << 16); 6412 } 6413 /* memory barrier */ 6414 wmb(); 6415 } 6416 6417 /* 6418 * qla2x00_abort_isp 6419 * Resets ISP and aborts all outstanding commands. 6420 * 6421 * Input: 6422 * ha = adapter block pointer. 6423 * 6424 * Returns: 6425 * 0 = success 6426 */ 6427 int 6428 qla2x00_abort_isp(scsi_qla_host_t *vha) 6429 { 6430 int rval; 6431 uint8_t status = 0; 6432 struct qla_hw_data *ha = vha->hw; 6433 struct scsi_qla_host *vp; 6434 struct req_que *req = ha->req_q_map[0]; 6435 unsigned long flags; 6436 6437 if (vha->flags.online) { 6438 qla2x00_abort_isp_cleanup(vha); 6439 6440 if (IS_QLA8031(ha)) { 6441 ql_dbg(ql_dbg_p3p, vha, 0xb05c, 6442 "Clearing fcoe driver presence.\n"); 6443 if (qla83xx_clear_drv_presence(vha) != QLA_SUCCESS) 6444 ql_dbg(ql_dbg_p3p, vha, 0xb073, 6445 "Error while clearing DRV-Presence.\n"); 6446 } 6447 6448 if (unlikely(pci_channel_offline(ha->pdev) && 6449 ha->flags.pci_channel_io_perm_failure)) { 6450 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6451 status = 0; 6452 return status; 6453 } 6454 6455 ha->isp_ops->get_flash_version(vha, req->ring); 6456 6457 ha->isp_ops->nvram_config(vha); 6458 6459 if (!qla2x00_restart_isp(vha)) { 6460 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 6461 6462 if (!atomic_read(&vha->loop_down_timer)) { 6463 /* 6464 * Issue marker command only when we are going 6465 * to start the I/O . 6466 */ 6467 vha->marker_needed = 1; 6468 } 6469 6470 vha->flags.online = 1; 6471 6472 ha->isp_ops->enable_intrs(ha); 6473 6474 ha->isp_abort_cnt = 0; 6475 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6476 6477 if (IS_QLA81XX(ha) || IS_QLA8031(ha)) 6478 qla2x00_get_fw_version(vha); 6479 if (ha->fce) { 6480 ha->flags.fce_enabled = 1; 6481 memset(ha->fce, 0, 6482 fce_calc_size(ha->fce_bufs)); 6483 rval = qla2x00_enable_fce_trace(vha, 6484 ha->fce_dma, ha->fce_bufs, ha->fce_mb, 6485 &ha->fce_bufs); 6486 if (rval) { 6487 ql_log(ql_log_warn, vha, 0x8033, 6488 "Unable to reinitialize FCE " 6489 "(%d).\n", rval); 6490 ha->flags.fce_enabled = 0; 6491 } 6492 } 6493 6494 if (ha->eft) { 6495 memset(ha->eft, 0, EFT_SIZE); 6496 rval = qla2x00_enable_eft_trace(vha, 6497 ha->eft_dma, EFT_NUM_BUFFERS); 6498 if (rval) { 6499 ql_log(ql_log_warn, vha, 0x8034, 6500 "Unable to reinitialize EFT " 6501 "(%d).\n", rval); 6502 } 6503 } 6504 } else { /* failed the ISP abort */ 6505 vha->flags.online = 1; 6506 if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) { 6507 if (ha->isp_abort_cnt == 0) { 6508 ql_log(ql_log_fatal, vha, 0x8035, 6509 "ISP error recover failed - " 6510 "board disabled.\n"); 6511 /* 6512 * The next call disables the board 6513 * completely. 6514 */ 6515 ha->isp_ops->reset_adapter(vha); 6516 vha->flags.online = 0; 6517 clear_bit(ISP_ABORT_RETRY, 6518 &vha->dpc_flags); 6519 status = 0; 6520 } else { /* schedule another ISP abort */ 6521 ha->isp_abort_cnt--; 6522 ql_dbg(ql_dbg_taskm, vha, 0x8020, 6523 "ISP abort - retry remaining %d.\n", 6524 ha->isp_abort_cnt); 6525 status = 1; 6526 } 6527 } else { 6528 ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT; 6529 ql_dbg(ql_dbg_taskm, vha, 0x8021, 6530 "ISP error recovery - retrying (%d) " 6531 "more times.\n", ha->isp_abort_cnt); 6532 set_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6533 status = 1; 6534 } 6535 } 6536 6537 } 6538 6539 if (!status) { 6540 ql_dbg(ql_dbg_taskm, vha, 0x8022, "%s succeeded.\n", __func__); 6541 qla2x00_configure_hba(vha); 6542 spin_lock_irqsave(&ha->vport_slock, flags); 6543 list_for_each_entry(vp, &ha->vp_list, list) { 6544 if (vp->vp_idx) { 6545 atomic_inc(&vp->vref_count); 6546 spin_unlock_irqrestore(&ha->vport_slock, flags); 6547 6548 qla2x00_vp_abort_isp(vp); 6549 6550 spin_lock_irqsave(&ha->vport_slock, flags); 6551 atomic_dec(&vp->vref_count); 6552 } 6553 } 6554 spin_unlock_irqrestore(&ha->vport_slock, flags); 6555 6556 if (IS_QLA8031(ha)) { 6557 ql_dbg(ql_dbg_p3p, vha, 0xb05d, 6558 "Setting back fcoe driver presence.\n"); 6559 if (qla83xx_set_drv_presence(vha) != QLA_SUCCESS) 6560 ql_dbg(ql_dbg_p3p, vha, 0xb074, 6561 "Error while setting DRV-Presence.\n"); 6562 } 6563 } else { 6564 ql_log(ql_log_warn, vha, 0x8023, "%s **** FAILED ****.\n", 6565 __func__); 6566 } 6567 6568 return(status); 6569 } 6570 6571 /* 6572 * qla2x00_restart_isp 6573 * restarts the ISP after a reset 6574 * 6575 * Input: 6576 * ha = adapter block pointer. 6577 * 6578 * Returns: 6579 * 0 = success 6580 */ 6581 static int 6582 qla2x00_restart_isp(scsi_qla_host_t *vha) 6583 { 6584 int status = 0; 6585 struct qla_hw_data *ha = vha->hw; 6586 struct req_que *req = ha->req_q_map[0]; 6587 struct rsp_que *rsp = ha->rsp_q_map[0]; 6588 6589 /* If firmware needs to be loaded */ 6590 if (qla2x00_isp_firmware(vha)) { 6591 vha->flags.online = 0; 6592 status = ha->isp_ops->chip_diag(vha); 6593 if (!status) 6594 status = qla2x00_setup_chip(vha); 6595 } 6596 6597 if (!status && !(status = qla2x00_init_rings(vha))) { 6598 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 6599 ha->flags.chip_reset_done = 1; 6600 6601 /* Initialize the queues in use */ 6602 qla25xx_init_queues(ha); 6603 6604 status = qla2x00_fw_ready(vha); 6605 if (!status) { 6606 /* Issue a marker after FW becomes ready. */ 6607 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); 6608 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 6609 } 6610 6611 /* if no cable then assume it's good */ 6612 if ((vha->device_flags & DFLG_NO_CABLE)) 6613 status = 0; 6614 } 6615 return (status); 6616 } 6617 6618 static int 6619 qla25xx_init_queues(struct qla_hw_data *ha) 6620 { 6621 struct rsp_que *rsp = NULL; 6622 struct req_que *req = NULL; 6623 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 6624 int ret = -1; 6625 int i; 6626 6627 for (i = 1; i < ha->max_rsp_queues; i++) { 6628 rsp = ha->rsp_q_map[i]; 6629 if (rsp && test_bit(i, ha->rsp_qid_map)) { 6630 rsp->options &= ~BIT_0; 6631 ret = qla25xx_init_rsp_que(base_vha, rsp); 6632 if (ret != QLA_SUCCESS) 6633 ql_dbg(ql_dbg_init, base_vha, 0x00ff, 6634 "%s Rsp que: %d init failed.\n", 6635 __func__, rsp->id); 6636 else 6637 ql_dbg(ql_dbg_init, base_vha, 0x0100, 6638 "%s Rsp que: %d inited.\n", 6639 __func__, rsp->id); 6640 } 6641 } 6642 for (i = 1; i < ha->max_req_queues; i++) { 6643 req = ha->req_q_map[i]; 6644 if (req && test_bit(i, ha->req_qid_map)) { 6645 /* Clear outstanding commands array. */ 6646 req->options &= ~BIT_0; 6647 ret = qla25xx_init_req_que(base_vha, req); 6648 if (ret != QLA_SUCCESS) 6649 ql_dbg(ql_dbg_init, base_vha, 0x0101, 6650 "%s Req que: %d init failed.\n", 6651 __func__, req->id); 6652 else 6653 ql_dbg(ql_dbg_init, base_vha, 0x0102, 6654 "%s Req que: %d inited.\n", 6655 __func__, req->id); 6656 } 6657 } 6658 return ret; 6659 } 6660 6661 /* 6662 * qla2x00_reset_adapter 6663 * Reset adapter. 6664 * 6665 * Input: 6666 * ha = adapter block pointer. 6667 */ 6668 void 6669 qla2x00_reset_adapter(scsi_qla_host_t *vha) 6670 { 6671 unsigned long flags = 0; 6672 struct qla_hw_data *ha = vha->hw; 6673 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 6674 6675 vha->flags.online = 0; 6676 ha->isp_ops->disable_intrs(ha); 6677 6678 spin_lock_irqsave(&ha->hardware_lock, flags); 6679 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 6680 RD_REG_WORD(®->hccr); /* PCI Posting. */ 6681 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 6682 RD_REG_WORD(®->hccr); /* PCI Posting. */ 6683 spin_unlock_irqrestore(&ha->hardware_lock, flags); 6684 } 6685 6686 void 6687 qla24xx_reset_adapter(scsi_qla_host_t *vha) 6688 { 6689 unsigned long flags = 0; 6690 struct qla_hw_data *ha = vha->hw; 6691 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 6692 6693 if (IS_P3P_TYPE(ha)) 6694 return; 6695 6696 vha->flags.online = 0; 6697 ha->isp_ops->disable_intrs(ha); 6698 6699 spin_lock_irqsave(&ha->hardware_lock, flags); 6700 WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET); 6701 RD_REG_DWORD(®->hccr); 6702 WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE); 6703 RD_REG_DWORD(®->hccr); 6704 spin_unlock_irqrestore(&ha->hardware_lock, flags); 6705 6706 if (IS_NOPOLLING_TYPE(ha)) 6707 ha->isp_ops->enable_intrs(ha); 6708 } 6709 6710 /* On sparc systems, obtain port and node WWN from firmware 6711 * properties. 6712 */ 6713 static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, 6714 struct nvram_24xx *nv) 6715 { 6716 #ifdef CONFIG_SPARC 6717 struct qla_hw_data *ha = vha->hw; 6718 struct pci_dev *pdev = ha->pdev; 6719 struct device_node *dp = pci_device_to_OF_node(pdev); 6720 const u8 *val; 6721 int len; 6722 6723 val = of_get_property(dp, "port-wwn", &len); 6724 if (val && len >= WWN_SIZE) 6725 memcpy(nv->port_name, val, WWN_SIZE); 6726 6727 val = of_get_property(dp, "node-wwn", &len); 6728 if (val && len >= WWN_SIZE) 6729 memcpy(nv->node_name, val, WWN_SIZE); 6730 #endif 6731 } 6732 6733 int 6734 qla24xx_nvram_config(scsi_qla_host_t *vha) 6735 { 6736 int rval; 6737 struct init_cb_24xx *icb; 6738 struct nvram_24xx *nv; 6739 uint32_t *dptr; 6740 uint8_t *dptr1, *dptr2; 6741 uint32_t chksum; 6742 uint16_t cnt; 6743 struct qla_hw_data *ha = vha->hw; 6744 6745 rval = QLA_SUCCESS; 6746 icb = (struct init_cb_24xx *)ha->init_cb; 6747 nv = ha->nvram; 6748 6749 /* Determine NVRAM starting address. */ 6750 if (ha->port_no == 0) { 6751 ha->nvram_base = FA_NVRAM_FUNC0_ADDR; 6752 ha->vpd_base = FA_NVRAM_VPD0_ADDR; 6753 } else { 6754 ha->nvram_base = FA_NVRAM_FUNC1_ADDR; 6755 ha->vpd_base = FA_NVRAM_VPD1_ADDR; 6756 } 6757 6758 ha->nvram_size = sizeof(struct nvram_24xx); 6759 ha->vpd_size = FA_NVRAM_VPD_SIZE; 6760 6761 /* Get VPD data into cache */ 6762 ha->vpd = ha->nvram + VPD_OFFSET; 6763 ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd, 6764 ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4); 6765 6766 /* Get NVRAM data into cache and calculate checksum. */ 6767 dptr = (uint32_t *)nv; 6768 ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base, 6769 ha->nvram_size); 6770 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++) 6771 chksum += le32_to_cpu(*dptr); 6772 6773 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a, 6774 "Contents of NVRAM\n"); 6775 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d, 6776 (uint8_t *)nv, ha->nvram_size); 6777 6778 /* Bad NVRAM data, set defaults parameters. */ 6779 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P' 6780 || nv->id[3] != ' ' || 6781 nv->nvram_version < cpu_to_le16(ICB_VERSION)) { 6782 /* Reset NVRAM data. */ 6783 ql_log(ql_log_warn, vha, 0x006b, 6784 "Inconsistent NVRAM detected: checksum=0x%x id=%c " 6785 "version=0x%x.\n", chksum, nv->id[0], nv->nvram_version); 6786 ql_log(ql_log_warn, vha, 0x006c, 6787 "Falling back to functioning (yet invalid -- WWPN) " 6788 "defaults.\n"); 6789 6790 /* 6791 * Set default initialization control block. 6792 */ 6793 memset(nv, 0, ha->nvram_size); 6794 nv->nvram_version = cpu_to_le16(ICB_VERSION); 6795 nv->version = cpu_to_le16(ICB_VERSION); 6796 nv->frame_payload_size = 2048; 6797 nv->execution_throttle = cpu_to_le16(0xFFFF); 6798 nv->exchange_count = cpu_to_le16(0); 6799 nv->hard_address = cpu_to_le16(124); 6800 nv->port_name[0] = 0x21; 6801 nv->port_name[1] = 0x00 + ha->port_no + 1; 6802 nv->port_name[2] = 0x00; 6803 nv->port_name[3] = 0xe0; 6804 nv->port_name[4] = 0x8b; 6805 nv->port_name[5] = 0x1c; 6806 nv->port_name[6] = 0x55; 6807 nv->port_name[7] = 0x86; 6808 nv->node_name[0] = 0x20; 6809 nv->node_name[1] = 0x00; 6810 nv->node_name[2] = 0x00; 6811 nv->node_name[3] = 0xe0; 6812 nv->node_name[4] = 0x8b; 6813 nv->node_name[5] = 0x1c; 6814 nv->node_name[6] = 0x55; 6815 nv->node_name[7] = 0x86; 6816 qla24xx_nvram_wwn_from_ofw(vha, nv); 6817 nv->login_retry_count = cpu_to_le16(8); 6818 nv->interrupt_delay_timer = cpu_to_le16(0); 6819 nv->login_timeout = cpu_to_le16(0); 6820 nv->firmware_options_1 = 6821 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); 6822 nv->firmware_options_2 = cpu_to_le32(2 << 4); 6823 nv->firmware_options_2 |= cpu_to_le32(BIT_12); 6824 nv->firmware_options_3 = cpu_to_le32(2 << 13); 6825 nv->host_p = cpu_to_le32(BIT_11|BIT_10); 6826 nv->efi_parameters = cpu_to_le32(0); 6827 nv->reset_delay = 5; 6828 nv->max_luns_per_target = cpu_to_le16(128); 6829 nv->port_down_retry_count = cpu_to_le16(30); 6830 nv->link_down_timeout = cpu_to_le16(30); 6831 6832 rval = 1; 6833 } 6834 6835 if (qla_tgt_mode_enabled(vha)) { 6836 /* Don't enable full login after initial LIP */ 6837 nv->firmware_options_1 &= cpu_to_le32(~BIT_13); 6838 /* Don't enable LIP full login for initiator */ 6839 nv->host_p &= cpu_to_le32(~BIT_10); 6840 } 6841 6842 qlt_24xx_config_nvram_stage1(vha, nv); 6843 6844 /* Reset Initialization control block */ 6845 memset(icb, 0, ha->init_cb_size); 6846 6847 /* Copy 1st segment. */ 6848 dptr1 = (uint8_t *)icb; 6849 dptr2 = (uint8_t *)&nv->version; 6850 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; 6851 while (cnt--) 6852 *dptr1++ = *dptr2++; 6853 6854 icb->login_retry_count = nv->login_retry_count; 6855 icb->link_down_on_nos = nv->link_down_on_nos; 6856 6857 /* Copy 2nd segment. */ 6858 dptr1 = (uint8_t *)&icb->interrupt_delay_timer; 6859 dptr2 = (uint8_t *)&nv->interrupt_delay_timer; 6860 cnt = (uint8_t *)&icb->reserved_3 - 6861 (uint8_t *)&icb->interrupt_delay_timer; 6862 while (cnt--) 6863 *dptr1++ = *dptr2++; 6864 6865 /* 6866 * Setup driver NVRAM options. 6867 */ 6868 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), 6869 "QLA2462"); 6870 6871 qlt_24xx_config_nvram_stage2(vha, icb); 6872 6873 if (nv->host_p & cpu_to_le32(BIT_15)) { 6874 /* Use alternate WWN? */ 6875 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 6876 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 6877 } 6878 6879 /* Prepare nodename */ 6880 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) { 6881 /* 6882 * Firmware will apply the following mask if the nodename was 6883 * not provided. 6884 */ 6885 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 6886 icb->node_name[0] &= 0xF0; 6887 } 6888 6889 /* Set host adapter parameters. */ 6890 ha->flags.disable_risc_code_load = 0; 6891 ha->flags.enable_lip_reset = 0; 6892 ha->flags.enable_lip_full_login = 6893 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0; 6894 ha->flags.enable_target_reset = 6895 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0; 6896 ha->flags.enable_led_scheme = 0; 6897 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0; 6898 6899 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & 6900 (BIT_6 | BIT_5 | BIT_4)) >> 4; 6901 6902 memcpy(ha->fw_seriallink_options24, nv->seriallink_options, 6903 sizeof(ha->fw_seriallink_options24)); 6904 6905 /* save HBA serial number */ 6906 ha->serial0 = icb->port_name[5]; 6907 ha->serial1 = icb->port_name[6]; 6908 ha->serial2 = icb->port_name[7]; 6909 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 6910 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 6911 6912 icb->execution_throttle = cpu_to_le16(0xFFFF); 6913 6914 ha->retry_count = le16_to_cpu(nv->login_retry_count); 6915 6916 /* Set minimum login_timeout to 4 seconds. */ 6917 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) 6918 nv->login_timeout = cpu_to_le16(ql2xlogintimeout); 6919 if (le16_to_cpu(nv->login_timeout) < 4) 6920 nv->login_timeout = cpu_to_le16(4); 6921 ha->login_timeout = le16_to_cpu(nv->login_timeout); 6922 6923 /* Set minimum RATOV to 100 tenths of a second. */ 6924 ha->r_a_tov = 100; 6925 6926 ha->loop_reset_delay = nv->reset_delay; 6927 6928 /* Link Down Timeout = 0: 6929 * 6930 * When Port Down timer expires we will start returning 6931 * I/O's to OS with "DID_NO_CONNECT". 6932 * 6933 * Link Down Timeout != 0: 6934 * 6935 * The driver waits for the link to come up after link down 6936 * before returning I/Os to OS with "DID_NO_CONNECT". 6937 */ 6938 if (le16_to_cpu(nv->link_down_timeout) == 0) { 6939 ha->loop_down_abort_time = 6940 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 6941 } else { 6942 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); 6943 ha->loop_down_abort_time = 6944 (LOOP_DOWN_TIME - ha->link_down_timeout); 6945 } 6946 6947 /* Need enough time to try and get the port back. */ 6948 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); 6949 if (qlport_down_retry) 6950 ha->port_down_retry_count = qlport_down_retry; 6951 6952 /* Set login_retry_count */ 6953 ha->login_retry_count = le16_to_cpu(nv->login_retry_count); 6954 if (ha->port_down_retry_count == 6955 le16_to_cpu(nv->port_down_retry_count) && 6956 ha->port_down_retry_count > 3) 6957 ha->login_retry_count = ha->port_down_retry_count; 6958 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 6959 ha->login_retry_count = ha->port_down_retry_count; 6960 if (ql2xloginretrycount) 6961 ha->login_retry_count = ql2xloginretrycount; 6962 6963 /* Enable ZIO. */ 6964 if (!vha->flags.init_done) { 6965 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & 6966 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 6967 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? 6968 le16_to_cpu(icb->interrupt_delay_timer): 2; 6969 } 6970 icb->firmware_options_2 &= cpu_to_le32( 6971 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); 6972 vha->flags.process_response_queue = 0; 6973 if (ha->zio_mode != QLA_ZIO_DISABLED) { 6974 ha->zio_mode = QLA_ZIO_MODE_6; 6975 6976 ql_log(ql_log_info, vha, 0x006f, 6977 "ZIO mode %d enabled; timer delay (%d us).\n", 6978 ha->zio_mode, ha->zio_timer * 100); 6979 6980 icb->firmware_options_2 |= cpu_to_le32( 6981 (uint32_t)ha->zio_mode); 6982 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); 6983 vha->flags.process_response_queue = 1; 6984 } 6985 6986 if (rval) { 6987 ql_log(ql_log_warn, vha, 0x0070, 6988 "NVRAM configuration failed.\n"); 6989 } 6990 return (rval); 6991 } 6992 6993 uint8_t qla27xx_find_valid_image(struct scsi_qla_host *vha) 6994 { 6995 struct qla27xx_image_status pri_image_status, sec_image_status; 6996 uint8_t valid_pri_image, valid_sec_image; 6997 uint32_t *wptr; 6998 uint32_t cnt, chksum, size; 6999 struct qla_hw_data *ha = vha->hw; 7000 7001 valid_pri_image = valid_sec_image = 1; 7002 ha->active_image = 0; 7003 size = sizeof(struct qla27xx_image_status) / sizeof(uint32_t); 7004 7005 if (!ha->flt_region_img_status_pri) { 7006 valid_pri_image = 0; 7007 goto check_sec_image; 7008 } 7009 7010 qla24xx_read_flash_data(vha, (uint32_t *)(&pri_image_status), 7011 ha->flt_region_img_status_pri, size); 7012 7013 if (pri_image_status.signature != QLA27XX_IMG_STATUS_SIGN) { 7014 ql_dbg(ql_dbg_init, vha, 0x018b, 7015 "Primary image signature (0x%x) not valid\n", 7016 pri_image_status.signature); 7017 valid_pri_image = 0; 7018 goto check_sec_image; 7019 } 7020 7021 wptr = (uint32_t *)(&pri_image_status); 7022 cnt = size; 7023 7024 for (chksum = 0; cnt--; wptr++) 7025 chksum += le32_to_cpu(*wptr); 7026 7027 if (chksum) { 7028 ql_dbg(ql_dbg_init, vha, 0x018c, 7029 "Checksum validation failed for primary image (0x%x)\n", 7030 chksum); 7031 valid_pri_image = 0; 7032 } 7033 7034 check_sec_image: 7035 if (!ha->flt_region_img_status_sec) { 7036 valid_sec_image = 0; 7037 goto check_valid_image; 7038 } 7039 7040 qla24xx_read_flash_data(vha, (uint32_t *)(&sec_image_status), 7041 ha->flt_region_img_status_sec, size); 7042 7043 if (sec_image_status.signature != QLA27XX_IMG_STATUS_SIGN) { 7044 ql_dbg(ql_dbg_init, vha, 0x018d, 7045 "Secondary image signature(0x%x) not valid\n", 7046 sec_image_status.signature); 7047 valid_sec_image = 0; 7048 goto check_valid_image; 7049 } 7050 7051 wptr = (uint32_t *)(&sec_image_status); 7052 cnt = size; 7053 for (chksum = 0; cnt--; wptr++) 7054 chksum += le32_to_cpu(*wptr); 7055 if (chksum) { 7056 ql_dbg(ql_dbg_init, vha, 0x018e, 7057 "Checksum validation failed for secondary image (0x%x)\n", 7058 chksum); 7059 valid_sec_image = 0; 7060 } 7061 7062 check_valid_image: 7063 if (valid_pri_image && (pri_image_status.image_status_mask & 0x1)) 7064 ha->active_image = QLA27XX_PRIMARY_IMAGE; 7065 if (valid_sec_image && (sec_image_status.image_status_mask & 0x1)) { 7066 if (!ha->active_image || 7067 pri_image_status.generation_number < 7068 sec_image_status.generation_number) 7069 ha->active_image = QLA27XX_SECONDARY_IMAGE; 7070 } 7071 7072 ql_dbg(ql_dbg_init, vha, 0x018f, "%s image\n", 7073 ha->active_image == 0 ? "default bootld and fw" : 7074 ha->active_image == 1 ? "primary" : 7075 ha->active_image == 2 ? "secondary" : 7076 "Invalid"); 7077 7078 return ha->active_image; 7079 } 7080 7081 static int 7082 qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr, 7083 uint32_t faddr) 7084 { 7085 int rval = QLA_SUCCESS; 7086 int segments, fragment; 7087 uint32_t *dcode, dlen; 7088 uint32_t risc_addr; 7089 uint32_t risc_size; 7090 uint32_t i; 7091 struct qla_hw_data *ha = vha->hw; 7092 struct req_que *req = ha->req_q_map[0]; 7093 7094 ql_dbg(ql_dbg_init, vha, 0x008b, 7095 "FW: Loading firmware from flash (%x).\n", faddr); 7096 7097 rval = QLA_SUCCESS; 7098 7099 segments = FA_RISC_CODE_SEGMENTS; 7100 dcode = (uint32_t *)req->ring; 7101 *srisc_addr = 0; 7102 7103 if (IS_QLA27XX(ha) && 7104 qla27xx_find_valid_image(vha) == QLA27XX_SECONDARY_IMAGE) 7105 faddr = ha->flt_region_fw_sec; 7106 7107 /* Validate firmware image by checking version. */ 7108 qla24xx_read_flash_data(vha, dcode, faddr + 4, 4); 7109 for (i = 0; i < 4; i++) 7110 dcode[i] = be32_to_cpu(dcode[i]); 7111 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff && 7112 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) || 7113 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 && 7114 dcode[3] == 0)) { 7115 ql_log(ql_log_fatal, vha, 0x008c, 7116 "Unable to verify the integrity of flash firmware " 7117 "image.\n"); 7118 ql_log(ql_log_fatal, vha, 0x008d, 7119 "Firmware data: %08x %08x %08x %08x.\n", 7120 dcode[0], dcode[1], dcode[2], dcode[3]); 7121 7122 return QLA_FUNCTION_FAILED; 7123 } 7124 7125 while (segments && rval == QLA_SUCCESS) { 7126 /* Read segment's load information. */ 7127 qla24xx_read_flash_data(vha, dcode, faddr, 4); 7128 7129 risc_addr = be32_to_cpu(dcode[2]); 7130 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr; 7131 risc_size = be32_to_cpu(dcode[3]); 7132 7133 fragment = 0; 7134 while (risc_size > 0 && rval == QLA_SUCCESS) { 7135 dlen = (uint32_t)(ha->fw_transfer_size >> 2); 7136 if (dlen > risc_size) 7137 dlen = risc_size; 7138 7139 ql_dbg(ql_dbg_init, vha, 0x008e, 7140 "Loading risc segment@ risc addr %x " 7141 "number of dwords 0x%x offset 0x%x.\n", 7142 risc_addr, dlen, faddr); 7143 7144 qla24xx_read_flash_data(vha, dcode, faddr, dlen); 7145 for (i = 0; i < dlen; i++) 7146 dcode[i] = swab32(dcode[i]); 7147 7148 rval = qla2x00_load_ram(vha, req->dma, risc_addr, 7149 dlen); 7150 if (rval) { 7151 ql_log(ql_log_fatal, vha, 0x008f, 7152 "Failed to load segment %d of firmware.\n", 7153 fragment); 7154 return QLA_FUNCTION_FAILED; 7155 } 7156 7157 faddr += dlen; 7158 risc_addr += dlen; 7159 risc_size -= dlen; 7160 fragment++; 7161 } 7162 7163 /* Next segment. */ 7164 segments--; 7165 } 7166 7167 if (!IS_QLA27XX(ha)) 7168 return rval; 7169 7170 if (ha->fw_dump_template) 7171 vfree(ha->fw_dump_template); 7172 ha->fw_dump_template = NULL; 7173 ha->fw_dump_template_len = 0; 7174 7175 ql_dbg(ql_dbg_init, vha, 0x0161, 7176 "Loading fwdump template from %x\n", faddr); 7177 qla24xx_read_flash_data(vha, dcode, faddr, 7); 7178 risc_size = be32_to_cpu(dcode[2]); 7179 ql_dbg(ql_dbg_init, vha, 0x0162, 7180 "-> array size %x dwords\n", risc_size); 7181 if (risc_size == 0 || risc_size == ~0) 7182 goto default_template; 7183 7184 dlen = (risc_size - 8) * sizeof(*dcode); 7185 ql_dbg(ql_dbg_init, vha, 0x0163, 7186 "-> template allocating %x bytes...\n", dlen); 7187 ha->fw_dump_template = vmalloc(dlen); 7188 if (!ha->fw_dump_template) { 7189 ql_log(ql_log_warn, vha, 0x0164, 7190 "Failed fwdump template allocate %x bytes.\n", risc_size); 7191 goto default_template; 7192 } 7193 7194 faddr += 7; 7195 risc_size -= 8; 7196 dcode = ha->fw_dump_template; 7197 qla24xx_read_flash_data(vha, dcode, faddr, risc_size); 7198 for (i = 0; i < risc_size; i++) 7199 dcode[i] = le32_to_cpu(dcode[i]); 7200 7201 if (!qla27xx_fwdt_template_valid(dcode)) { 7202 ql_log(ql_log_warn, vha, 0x0165, 7203 "Failed fwdump template validate\n"); 7204 goto default_template; 7205 } 7206 7207 dlen = qla27xx_fwdt_template_size(dcode); 7208 ql_dbg(ql_dbg_init, vha, 0x0166, 7209 "-> template size %x bytes\n", dlen); 7210 if (dlen > risc_size * sizeof(*dcode)) { 7211 ql_log(ql_log_warn, vha, 0x0167, 7212 "Failed fwdump template exceeds array by %zx bytes\n", 7213 (size_t)(dlen - risc_size * sizeof(*dcode))); 7214 goto default_template; 7215 } 7216 ha->fw_dump_template_len = dlen; 7217 return rval; 7218 7219 default_template: 7220 ql_log(ql_log_warn, vha, 0x0168, "Using default fwdump template\n"); 7221 if (ha->fw_dump_template) 7222 vfree(ha->fw_dump_template); 7223 ha->fw_dump_template = NULL; 7224 ha->fw_dump_template_len = 0; 7225 7226 dlen = qla27xx_fwdt_template_default_size(); 7227 ql_dbg(ql_dbg_init, vha, 0x0169, 7228 "-> template allocating %x bytes...\n", dlen); 7229 ha->fw_dump_template = vmalloc(dlen); 7230 if (!ha->fw_dump_template) { 7231 ql_log(ql_log_warn, vha, 0x016a, 7232 "Failed fwdump template allocate %x bytes.\n", risc_size); 7233 goto failed_template; 7234 } 7235 7236 dcode = ha->fw_dump_template; 7237 risc_size = dlen / sizeof(*dcode); 7238 memcpy(dcode, qla27xx_fwdt_template_default(), dlen); 7239 for (i = 0; i < risc_size; i++) 7240 dcode[i] = be32_to_cpu(dcode[i]); 7241 7242 if (!qla27xx_fwdt_template_valid(ha->fw_dump_template)) { 7243 ql_log(ql_log_warn, vha, 0x016b, 7244 "Failed fwdump template validate\n"); 7245 goto failed_template; 7246 } 7247 7248 dlen = qla27xx_fwdt_template_size(ha->fw_dump_template); 7249 ql_dbg(ql_dbg_init, vha, 0x016c, 7250 "-> template size %x bytes\n", dlen); 7251 ha->fw_dump_template_len = dlen; 7252 return rval; 7253 7254 failed_template: 7255 ql_log(ql_log_warn, vha, 0x016d, "Failed default fwdump template\n"); 7256 if (ha->fw_dump_template) 7257 vfree(ha->fw_dump_template); 7258 ha->fw_dump_template = NULL; 7259 ha->fw_dump_template_len = 0; 7260 return rval; 7261 } 7262 7263 #define QLA_FW_URL "http://ldriver.qlogic.com/firmware/" 7264 7265 int 7266 qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 7267 { 7268 int rval; 7269 int i, fragment; 7270 uint16_t *wcode, *fwcode; 7271 uint32_t risc_addr, risc_size, fwclen, wlen, *seg; 7272 struct fw_blob *blob; 7273 struct qla_hw_data *ha = vha->hw; 7274 struct req_que *req = ha->req_q_map[0]; 7275 7276 /* Load firmware blob. */ 7277 blob = qla2x00_request_firmware(vha); 7278 if (!blob) { 7279 ql_log(ql_log_info, vha, 0x0083, 7280 "Firmware image unavailable.\n"); 7281 ql_log(ql_log_info, vha, 0x0084, 7282 "Firmware images can be retrieved from: "QLA_FW_URL ".\n"); 7283 return QLA_FUNCTION_FAILED; 7284 } 7285 7286 rval = QLA_SUCCESS; 7287 7288 wcode = (uint16_t *)req->ring; 7289 *srisc_addr = 0; 7290 fwcode = (uint16_t *)blob->fw->data; 7291 fwclen = 0; 7292 7293 /* Validate firmware image by checking version. */ 7294 if (blob->fw->size < 8 * sizeof(uint16_t)) { 7295 ql_log(ql_log_fatal, vha, 0x0085, 7296 "Unable to verify integrity of firmware image (%zd).\n", 7297 blob->fw->size); 7298 goto fail_fw_integrity; 7299 } 7300 for (i = 0; i < 4; i++) 7301 wcode[i] = be16_to_cpu(fwcode[i + 4]); 7302 if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff && 7303 wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 && 7304 wcode[2] == 0 && wcode[3] == 0)) { 7305 ql_log(ql_log_fatal, vha, 0x0086, 7306 "Unable to verify integrity of firmware image.\n"); 7307 ql_log(ql_log_fatal, vha, 0x0087, 7308 "Firmware data: %04x %04x %04x %04x.\n", 7309 wcode[0], wcode[1], wcode[2], wcode[3]); 7310 goto fail_fw_integrity; 7311 } 7312 7313 seg = blob->segs; 7314 while (*seg && rval == QLA_SUCCESS) { 7315 risc_addr = *seg; 7316 *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr; 7317 risc_size = be16_to_cpu(fwcode[3]); 7318 7319 /* Validate firmware image size. */ 7320 fwclen += risc_size * sizeof(uint16_t); 7321 if (blob->fw->size < fwclen) { 7322 ql_log(ql_log_fatal, vha, 0x0088, 7323 "Unable to verify integrity of firmware image " 7324 "(%zd).\n", blob->fw->size); 7325 goto fail_fw_integrity; 7326 } 7327 7328 fragment = 0; 7329 while (risc_size > 0 && rval == QLA_SUCCESS) { 7330 wlen = (uint16_t)(ha->fw_transfer_size >> 1); 7331 if (wlen > risc_size) 7332 wlen = risc_size; 7333 ql_dbg(ql_dbg_init, vha, 0x0089, 7334 "Loading risc segment@ risc addr %x number of " 7335 "words 0x%x.\n", risc_addr, wlen); 7336 7337 for (i = 0; i < wlen; i++) 7338 wcode[i] = swab16(fwcode[i]); 7339 7340 rval = qla2x00_load_ram(vha, req->dma, risc_addr, 7341 wlen); 7342 if (rval) { 7343 ql_log(ql_log_fatal, vha, 0x008a, 7344 "Failed to load segment %d of firmware.\n", 7345 fragment); 7346 break; 7347 } 7348 7349 fwcode += wlen; 7350 risc_addr += wlen; 7351 risc_size -= wlen; 7352 fragment++; 7353 } 7354 7355 /* Next segment. */ 7356 seg++; 7357 } 7358 return rval; 7359 7360 fail_fw_integrity: 7361 return QLA_FUNCTION_FAILED; 7362 } 7363 7364 static int 7365 qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr) 7366 { 7367 int rval; 7368 int segments, fragment; 7369 uint32_t *dcode, dlen; 7370 uint32_t risc_addr; 7371 uint32_t risc_size; 7372 uint32_t i; 7373 struct fw_blob *blob; 7374 const uint32_t *fwcode; 7375 uint32_t fwclen; 7376 struct qla_hw_data *ha = vha->hw; 7377 struct req_que *req = ha->req_q_map[0]; 7378 7379 /* Load firmware blob. */ 7380 blob = qla2x00_request_firmware(vha); 7381 if (!blob) { 7382 ql_log(ql_log_warn, vha, 0x0090, 7383 "Firmware image unavailable.\n"); 7384 ql_log(ql_log_warn, vha, 0x0091, 7385 "Firmware images can be retrieved from: " 7386 QLA_FW_URL ".\n"); 7387 7388 return QLA_FUNCTION_FAILED; 7389 } 7390 7391 ql_dbg(ql_dbg_init, vha, 0x0092, 7392 "FW: Loading via request-firmware.\n"); 7393 7394 rval = QLA_SUCCESS; 7395 7396 segments = FA_RISC_CODE_SEGMENTS; 7397 dcode = (uint32_t *)req->ring; 7398 *srisc_addr = 0; 7399 fwcode = (uint32_t *)blob->fw->data; 7400 fwclen = 0; 7401 7402 /* Validate firmware image by checking version. */ 7403 if (blob->fw->size < 8 * sizeof(uint32_t)) { 7404 ql_log(ql_log_fatal, vha, 0x0093, 7405 "Unable to verify integrity of firmware image (%zd).\n", 7406 blob->fw->size); 7407 return QLA_FUNCTION_FAILED; 7408 } 7409 for (i = 0; i < 4; i++) 7410 dcode[i] = be32_to_cpu(fwcode[i + 4]); 7411 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff && 7412 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) || 7413 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 && 7414 dcode[3] == 0)) { 7415 ql_log(ql_log_fatal, vha, 0x0094, 7416 "Unable to verify integrity of firmware image (%zd).\n", 7417 blob->fw->size); 7418 ql_log(ql_log_fatal, vha, 0x0095, 7419 "Firmware data: %08x %08x %08x %08x.\n", 7420 dcode[0], dcode[1], dcode[2], dcode[3]); 7421 return QLA_FUNCTION_FAILED; 7422 } 7423 7424 while (segments && rval == QLA_SUCCESS) { 7425 risc_addr = be32_to_cpu(fwcode[2]); 7426 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr; 7427 risc_size = be32_to_cpu(fwcode[3]); 7428 7429 /* Validate firmware image size. */ 7430 fwclen += risc_size * sizeof(uint32_t); 7431 if (blob->fw->size < fwclen) { 7432 ql_log(ql_log_fatal, vha, 0x0096, 7433 "Unable to verify integrity of firmware image " 7434 "(%zd).\n", blob->fw->size); 7435 return QLA_FUNCTION_FAILED; 7436 } 7437 7438 fragment = 0; 7439 while (risc_size > 0 && rval == QLA_SUCCESS) { 7440 dlen = (uint32_t)(ha->fw_transfer_size >> 2); 7441 if (dlen > risc_size) 7442 dlen = risc_size; 7443 7444 ql_dbg(ql_dbg_init, vha, 0x0097, 7445 "Loading risc segment@ risc addr %x " 7446 "number of dwords 0x%x.\n", risc_addr, dlen); 7447 7448 for (i = 0; i < dlen; i++) 7449 dcode[i] = swab32(fwcode[i]); 7450 7451 rval = qla2x00_load_ram(vha, req->dma, risc_addr, 7452 dlen); 7453 if (rval) { 7454 ql_log(ql_log_fatal, vha, 0x0098, 7455 "Failed to load segment %d of firmware.\n", 7456 fragment); 7457 return QLA_FUNCTION_FAILED; 7458 } 7459 7460 fwcode += dlen; 7461 risc_addr += dlen; 7462 risc_size -= dlen; 7463 fragment++; 7464 } 7465 7466 /* Next segment. */ 7467 segments--; 7468 } 7469 7470 if (!IS_QLA27XX(ha)) 7471 return rval; 7472 7473 if (ha->fw_dump_template) 7474 vfree(ha->fw_dump_template); 7475 ha->fw_dump_template = NULL; 7476 ha->fw_dump_template_len = 0; 7477 7478 ql_dbg(ql_dbg_init, vha, 0x171, 7479 "Loading fwdump template from %x\n", 7480 (uint32_t)((void *)fwcode - (void *)blob->fw->data)); 7481 risc_size = be32_to_cpu(fwcode[2]); 7482 ql_dbg(ql_dbg_init, vha, 0x172, 7483 "-> array size %x dwords\n", risc_size); 7484 if (risc_size == 0 || risc_size == ~0) 7485 goto default_template; 7486 7487 dlen = (risc_size - 8) * sizeof(*fwcode); 7488 ql_dbg(ql_dbg_init, vha, 0x0173, 7489 "-> template allocating %x bytes...\n", dlen); 7490 ha->fw_dump_template = vmalloc(dlen); 7491 if (!ha->fw_dump_template) { 7492 ql_log(ql_log_warn, vha, 0x0174, 7493 "Failed fwdump template allocate %x bytes.\n", risc_size); 7494 goto default_template; 7495 } 7496 7497 fwcode += 7; 7498 risc_size -= 8; 7499 dcode = ha->fw_dump_template; 7500 for (i = 0; i < risc_size; i++) 7501 dcode[i] = le32_to_cpu(fwcode[i]); 7502 7503 if (!qla27xx_fwdt_template_valid(dcode)) { 7504 ql_log(ql_log_warn, vha, 0x0175, 7505 "Failed fwdump template validate\n"); 7506 goto default_template; 7507 } 7508 7509 dlen = qla27xx_fwdt_template_size(dcode); 7510 ql_dbg(ql_dbg_init, vha, 0x0176, 7511 "-> template size %x bytes\n", dlen); 7512 if (dlen > risc_size * sizeof(*fwcode)) { 7513 ql_log(ql_log_warn, vha, 0x0177, 7514 "Failed fwdump template exceeds array by %zx bytes\n", 7515 (size_t)(dlen - risc_size * sizeof(*fwcode))); 7516 goto default_template; 7517 } 7518 ha->fw_dump_template_len = dlen; 7519 return rval; 7520 7521 default_template: 7522 ql_log(ql_log_warn, vha, 0x0178, "Using default fwdump template\n"); 7523 if (ha->fw_dump_template) 7524 vfree(ha->fw_dump_template); 7525 ha->fw_dump_template = NULL; 7526 ha->fw_dump_template_len = 0; 7527 7528 dlen = qla27xx_fwdt_template_default_size(); 7529 ql_dbg(ql_dbg_init, vha, 0x0179, 7530 "-> template allocating %x bytes...\n", dlen); 7531 ha->fw_dump_template = vmalloc(dlen); 7532 if (!ha->fw_dump_template) { 7533 ql_log(ql_log_warn, vha, 0x017a, 7534 "Failed fwdump template allocate %x bytes.\n", risc_size); 7535 goto failed_template; 7536 } 7537 7538 dcode = ha->fw_dump_template; 7539 risc_size = dlen / sizeof(*fwcode); 7540 fwcode = qla27xx_fwdt_template_default(); 7541 for (i = 0; i < risc_size; i++) 7542 dcode[i] = be32_to_cpu(fwcode[i]); 7543 7544 if (!qla27xx_fwdt_template_valid(ha->fw_dump_template)) { 7545 ql_log(ql_log_warn, vha, 0x017b, 7546 "Failed fwdump template validate\n"); 7547 goto failed_template; 7548 } 7549 7550 dlen = qla27xx_fwdt_template_size(ha->fw_dump_template); 7551 ql_dbg(ql_dbg_init, vha, 0x017c, 7552 "-> template size %x bytes\n", dlen); 7553 ha->fw_dump_template_len = dlen; 7554 return rval; 7555 7556 failed_template: 7557 ql_log(ql_log_warn, vha, 0x017d, "Failed default fwdump template\n"); 7558 if (ha->fw_dump_template) 7559 vfree(ha->fw_dump_template); 7560 ha->fw_dump_template = NULL; 7561 ha->fw_dump_template_len = 0; 7562 return rval; 7563 } 7564 7565 int 7566 qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 7567 { 7568 int rval; 7569 7570 if (ql2xfwloadbin == 1) 7571 return qla81xx_load_risc(vha, srisc_addr); 7572 7573 /* 7574 * FW Load priority: 7575 * 1) Firmware via request-firmware interface (.bin file). 7576 * 2) Firmware residing in flash. 7577 */ 7578 rval = qla24xx_load_risc_blob(vha, srisc_addr); 7579 if (rval == QLA_SUCCESS) 7580 return rval; 7581 7582 return qla24xx_load_risc_flash(vha, srisc_addr, 7583 vha->hw->flt_region_fw); 7584 } 7585 7586 int 7587 qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 7588 { 7589 int rval; 7590 struct qla_hw_data *ha = vha->hw; 7591 7592 if (ql2xfwloadbin == 2) 7593 goto try_blob_fw; 7594 7595 /* 7596 * FW Load priority: 7597 * 1) Firmware residing in flash. 7598 * 2) Firmware via request-firmware interface (.bin file). 7599 * 3) Golden-Firmware residing in flash -- limited operation. 7600 */ 7601 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw); 7602 if (rval == QLA_SUCCESS) 7603 return rval; 7604 7605 try_blob_fw: 7606 rval = qla24xx_load_risc_blob(vha, srisc_addr); 7607 if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw) 7608 return rval; 7609 7610 ql_log(ql_log_info, vha, 0x0099, 7611 "Attempting to fallback to golden firmware.\n"); 7612 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw); 7613 if (rval != QLA_SUCCESS) 7614 return rval; 7615 7616 ql_log(ql_log_info, vha, 0x009a, "Update operational firmware.\n"); 7617 ha->flags.running_gold_fw = 1; 7618 return rval; 7619 } 7620 7621 void 7622 qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha) 7623 { 7624 int ret, retries; 7625 struct qla_hw_data *ha = vha->hw; 7626 7627 if (ha->flags.pci_channel_io_perm_failure) 7628 return; 7629 if (!IS_FWI2_CAPABLE(ha)) 7630 return; 7631 if (!ha->fw_major_version) 7632 return; 7633 if (!ha->flags.fw_started) 7634 return; 7635 7636 ret = qla2x00_stop_firmware(vha); 7637 for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT && 7638 ret != QLA_INVALID_COMMAND && retries ; retries--) { 7639 ha->isp_ops->reset_chip(vha); 7640 if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS) 7641 continue; 7642 if (qla2x00_setup_chip(vha) != QLA_SUCCESS) 7643 continue; 7644 ql_log(ql_log_info, vha, 0x8015, 7645 "Attempting retry of stop-firmware command.\n"); 7646 ret = qla2x00_stop_firmware(vha); 7647 } 7648 7649 QLA_FW_STOPPED(ha); 7650 ha->flags.fw_init_done = 0; 7651 } 7652 7653 int 7654 qla24xx_configure_vhba(scsi_qla_host_t *vha) 7655 { 7656 int rval = QLA_SUCCESS; 7657 int rval2; 7658 uint16_t mb[MAILBOX_REGISTER_COUNT]; 7659 struct qla_hw_data *ha = vha->hw; 7660 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 7661 struct req_que *req; 7662 struct rsp_que *rsp; 7663 7664 if (!vha->vp_idx) 7665 return -EINVAL; 7666 7667 rval = qla2x00_fw_ready(base_vha); 7668 if (vha->qpair) 7669 req = vha->qpair->req; 7670 else 7671 req = ha->req_q_map[0]; 7672 rsp = req->rsp; 7673 7674 if (rval == QLA_SUCCESS) { 7675 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 7676 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); 7677 } 7678 7679 vha->flags.management_server_logged_in = 0; 7680 7681 /* Login to SNS first */ 7682 rval2 = ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, 7683 BIT_1); 7684 if (rval2 != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) { 7685 if (rval2 == QLA_MEMORY_ALLOC_FAILED) 7686 ql_dbg(ql_dbg_init, vha, 0x0120, 7687 "Failed SNS login: loop_id=%x, rval2=%d\n", 7688 NPH_SNS, rval2); 7689 else 7690 ql_dbg(ql_dbg_init, vha, 0x0103, 7691 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x " 7692 "mb[2]=%x mb[6]=%x mb[7]=%x.\n", 7693 NPH_SNS, mb[0], mb[1], mb[2], mb[6], mb[7]); 7694 return (QLA_FUNCTION_FAILED); 7695 } 7696 7697 atomic_set(&vha->loop_down_timer, 0); 7698 atomic_set(&vha->loop_state, LOOP_UP); 7699 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 7700 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 7701 rval = qla2x00_loop_resync(base_vha); 7702 7703 return rval; 7704 } 7705 7706 /* 84XX Support **************************************************************/ 7707 7708 static LIST_HEAD(qla_cs84xx_list); 7709 static DEFINE_MUTEX(qla_cs84xx_mutex); 7710 7711 static struct qla_chip_state_84xx * 7712 qla84xx_get_chip(struct scsi_qla_host *vha) 7713 { 7714 struct qla_chip_state_84xx *cs84xx; 7715 struct qla_hw_data *ha = vha->hw; 7716 7717 mutex_lock(&qla_cs84xx_mutex); 7718 7719 /* Find any shared 84xx chip. */ 7720 list_for_each_entry(cs84xx, &qla_cs84xx_list, list) { 7721 if (cs84xx->bus == ha->pdev->bus) { 7722 kref_get(&cs84xx->kref); 7723 goto done; 7724 } 7725 } 7726 7727 cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL); 7728 if (!cs84xx) 7729 goto done; 7730 7731 kref_init(&cs84xx->kref); 7732 spin_lock_init(&cs84xx->access_lock); 7733 mutex_init(&cs84xx->fw_update_mutex); 7734 cs84xx->bus = ha->pdev->bus; 7735 7736 list_add_tail(&cs84xx->list, &qla_cs84xx_list); 7737 done: 7738 mutex_unlock(&qla_cs84xx_mutex); 7739 return cs84xx; 7740 } 7741 7742 static void 7743 __qla84xx_chip_release(struct kref *kref) 7744 { 7745 struct qla_chip_state_84xx *cs84xx = 7746 container_of(kref, struct qla_chip_state_84xx, kref); 7747 7748 mutex_lock(&qla_cs84xx_mutex); 7749 list_del(&cs84xx->list); 7750 mutex_unlock(&qla_cs84xx_mutex); 7751 kfree(cs84xx); 7752 } 7753 7754 void 7755 qla84xx_put_chip(struct scsi_qla_host *vha) 7756 { 7757 struct qla_hw_data *ha = vha->hw; 7758 if (ha->cs84xx) 7759 kref_put(&ha->cs84xx->kref, __qla84xx_chip_release); 7760 } 7761 7762 static int 7763 qla84xx_init_chip(scsi_qla_host_t *vha) 7764 { 7765 int rval; 7766 uint16_t status[2]; 7767 struct qla_hw_data *ha = vha->hw; 7768 7769 mutex_lock(&ha->cs84xx->fw_update_mutex); 7770 7771 rval = qla84xx_verify_chip(vha, status); 7772 7773 mutex_unlock(&ha->cs84xx->fw_update_mutex); 7774 7775 return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED: 7776 QLA_SUCCESS; 7777 } 7778 7779 /* 81XX Support **************************************************************/ 7780 7781 int 7782 qla81xx_nvram_config(scsi_qla_host_t *vha) 7783 { 7784 int rval; 7785 struct init_cb_81xx *icb; 7786 struct nvram_81xx *nv; 7787 uint32_t *dptr; 7788 uint8_t *dptr1, *dptr2; 7789 uint32_t chksum; 7790 uint16_t cnt; 7791 struct qla_hw_data *ha = vha->hw; 7792 7793 rval = QLA_SUCCESS; 7794 icb = (struct init_cb_81xx *)ha->init_cb; 7795 nv = ha->nvram; 7796 7797 /* Determine NVRAM starting address. */ 7798 ha->nvram_size = sizeof(struct nvram_81xx); 7799 ha->vpd_size = FA_NVRAM_VPD_SIZE; 7800 if (IS_P3P_TYPE(ha) || IS_QLA8031(ha)) 7801 ha->vpd_size = FA_VPD_SIZE_82XX; 7802 7803 /* Get VPD data into cache */ 7804 ha->vpd = ha->nvram + VPD_OFFSET; 7805 ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2, 7806 ha->vpd_size); 7807 7808 /* Get NVRAM data into cache and calculate checksum. */ 7809 ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2, 7810 ha->nvram_size); 7811 dptr = (uint32_t *)nv; 7812 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++) 7813 chksum += le32_to_cpu(*dptr); 7814 7815 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111, 7816 "Contents of NVRAM:\n"); 7817 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112, 7818 (uint8_t *)nv, ha->nvram_size); 7819 7820 /* Bad NVRAM data, set defaults parameters. */ 7821 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P' 7822 || nv->id[3] != ' ' || 7823 nv->nvram_version < cpu_to_le16(ICB_VERSION)) { 7824 /* Reset NVRAM data. */ 7825 ql_log(ql_log_info, vha, 0x0073, 7826 "Inconsistent NVRAM detected: checksum=0x%x id=%c " 7827 "version=0x%x.\n", chksum, nv->id[0], 7828 le16_to_cpu(nv->nvram_version)); 7829 ql_log(ql_log_info, vha, 0x0074, 7830 "Falling back to functioning (yet invalid -- WWPN) " 7831 "defaults.\n"); 7832 7833 /* 7834 * Set default initialization control block. 7835 */ 7836 memset(nv, 0, ha->nvram_size); 7837 nv->nvram_version = cpu_to_le16(ICB_VERSION); 7838 nv->version = cpu_to_le16(ICB_VERSION); 7839 nv->frame_payload_size = 2048; 7840 nv->execution_throttle = cpu_to_le16(0xFFFF); 7841 nv->exchange_count = cpu_to_le16(0); 7842 nv->port_name[0] = 0x21; 7843 nv->port_name[1] = 0x00 + ha->port_no + 1; 7844 nv->port_name[2] = 0x00; 7845 nv->port_name[3] = 0xe0; 7846 nv->port_name[4] = 0x8b; 7847 nv->port_name[5] = 0x1c; 7848 nv->port_name[6] = 0x55; 7849 nv->port_name[7] = 0x86; 7850 nv->node_name[0] = 0x20; 7851 nv->node_name[1] = 0x00; 7852 nv->node_name[2] = 0x00; 7853 nv->node_name[3] = 0xe0; 7854 nv->node_name[4] = 0x8b; 7855 nv->node_name[5] = 0x1c; 7856 nv->node_name[6] = 0x55; 7857 nv->node_name[7] = 0x86; 7858 nv->login_retry_count = cpu_to_le16(8); 7859 nv->interrupt_delay_timer = cpu_to_le16(0); 7860 nv->login_timeout = cpu_to_le16(0); 7861 nv->firmware_options_1 = 7862 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); 7863 nv->firmware_options_2 = cpu_to_le32(2 << 4); 7864 nv->firmware_options_2 |= cpu_to_le32(BIT_12); 7865 nv->firmware_options_3 = cpu_to_le32(2 << 13); 7866 nv->host_p = cpu_to_le32(BIT_11|BIT_10); 7867 nv->efi_parameters = cpu_to_le32(0); 7868 nv->reset_delay = 5; 7869 nv->max_luns_per_target = cpu_to_le16(128); 7870 nv->port_down_retry_count = cpu_to_le16(30); 7871 nv->link_down_timeout = cpu_to_le16(180); 7872 nv->enode_mac[0] = 0x00; 7873 nv->enode_mac[1] = 0xC0; 7874 nv->enode_mac[2] = 0xDD; 7875 nv->enode_mac[3] = 0x04; 7876 nv->enode_mac[4] = 0x05; 7877 nv->enode_mac[5] = 0x06 + ha->port_no + 1; 7878 7879 rval = 1; 7880 } 7881 7882 if (IS_T10_PI_CAPABLE(ha)) 7883 nv->frame_payload_size &= ~7; 7884 7885 qlt_81xx_config_nvram_stage1(vha, nv); 7886 7887 /* Reset Initialization control block */ 7888 memset(icb, 0, ha->init_cb_size); 7889 7890 /* Copy 1st segment. */ 7891 dptr1 = (uint8_t *)icb; 7892 dptr2 = (uint8_t *)&nv->version; 7893 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; 7894 while (cnt--) 7895 *dptr1++ = *dptr2++; 7896 7897 icb->login_retry_count = nv->login_retry_count; 7898 7899 /* Copy 2nd segment. */ 7900 dptr1 = (uint8_t *)&icb->interrupt_delay_timer; 7901 dptr2 = (uint8_t *)&nv->interrupt_delay_timer; 7902 cnt = (uint8_t *)&icb->reserved_5 - 7903 (uint8_t *)&icb->interrupt_delay_timer; 7904 while (cnt--) 7905 *dptr1++ = *dptr2++; 7906 7907 memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac)); 7908 /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */ 7909 if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) { 7910 icb->enode_mac[0] = 0x00; 7911 icb->enode_mac[1] = 0xC0; 7912 icb->enode_mac[2] = 0xDD; 7913 icb->enode_mac[3] = 0x04; 7914 icb->enode_mac[4] = 0x05; 7915 icb->enode_mac[5] = 0x06 + ha->port_no + 1; 7916 } 7917 7918 /* Use extended-initialization control block. */ 7919 memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb)); 7920 7921 /* 7922 * Setup driver NVRAM options. 7923 */ 7924 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), 7925 "QLE8XXX"); 7926 7927 qlt_81xx_config_nvram_stage2(vha, icb); 7928 7929 /* Use alternate WWN? */ 7930 if (nv->host_p & cpu_to_le32(BIT_15)) { 7931 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 7932 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 7933 } 7934 7935 /* Prepare nodename */ 7936 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) { 7937 /* 7938 * Firmware will apply the following mask if the nodename was 7939 * not provided. 7940 */ 7941 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 7942 icb->node_name[0] &= 0xF0; 7943 } 7944 7945 /* Set host adapter parameters. */ 7946 ha->flags.disable_risc_code_load = 0; 7947 ha->flags.enable_lip_reset = 0; 7948 ha->flags.enable_lip_full_login = 7949 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0; 7950 ha->flags.enable_target_reset = 7951 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0; 7952 ha->flags.enable_led_scheme = 0; 7953 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0; 7954 7955 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & 7956 (BIT_6 | BIT_5 | BIT_4)) >> 4; 7957 7958 /* save HBA serial number */ 7959 ha->serial0 = icb->port_name[5]; 7960 ha->serial1 = icb->port_name[6]; 7961 ha->serial2 = icb->port_name[7]; 7962 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 7963 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 7964 7965 icb->execution_throttle = cpu_to_le16(0xFFFF); 7966 7967 ha->retry_count = le16_to_cpu(nv->login_retry_count); 7968 7969 /* Set minimum login_timeout to 4 seconds. */ 7970 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) 7971 nv->login_timeout = cpu_to_le16(ql2xlogintimeout); 7972 if (le16_to_cpu(nv->login_timeout) < 4) 7973 nv->login_timeout = cpu_to_le16(4); 7974 ha->login_timeout = le16_to_cpu(nv->login_timeout); 7975 7976 /* Set minimum RATOV to 100 tenths of a second. */ 7977 ha->r_a_tov = 100; 7978 7979 ha->loop_reset_delay = nv->reset_delay; 7980 7981 /* Link Down Timeout = 0: 7982 * 7983 * When Port Down timer expires we will start returning 7984 * I/O's to OS with "DID_NO_CONNECT". 7985 * 7986 * Link Down Timeout != 0: 7987 * 7988 * The driver waits for the link to come up after link down 7989 * before returning I/Os to OS with "DID_NO_CONNECT". 7990 */ 7991 if (le16_to_cpu(nv->link_down_timeout) == 0) { 7992 ha->loop_down_abort_time = 7993 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 7994 } else { 7995 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); 7996 ha->loop_down_abort_time = 7997 (LOOP_DOWN_TIME - ha->link_down_timeout); 7998 } 7999 8000 /* Need enough time to try and get the port back. */ 8001 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); 8002 if (qlport_down_retry) 8003 ha->port_down_retry_count = qlport_down_retry; 8004 8005 /* Set login_retry_count */ 8006 ha->login_retry_count = le16_to_cpu(nv->login_retry_count); 8007 if (ha->port_down_retry_count == 8008 le16_to_cpu(nv->port_down_retry_count) && 8009 ha->port_down_retry_count > 3) 8010 ha->login_retry_count = ha->port_down_retry_count; 8011 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 8012 ha->login_retry_count = ha->port_down_retry_count; 8013 if (ql2xloginretrycount) 8014 ha->login_retry_count = ql2xloginretrycount; 8015 8016 /* if not running MSI-X we need handshaking on interrupts */ 8017 if (!vha->hw->flags.msix_enabled && (IS_QLA83XX(ha) || IS_QLA27XX(ha))) 8018 icb->firmware_options_2 |= cpu_to_le32(BIT_22); 8019 8020 /* Enable ZIO. */ 8021 if (!vha->flags.init_done) { 8022 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & 8023 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 8024 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? 8025 le16_to_cpu(icb->interrupt_delay_timer): 2; 8026 } 8027 icb->firmware_options_2 &= cpu_to_le32( 8028 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); 8029 vha->flags.process_response_queue = 0; 8030 if (ha->zio_mode != QLA_ZIO_DISABLED) { 8031 ha->zio_mode = QLA_ZIO_MODE_6; 8032 8033 ql_log(ql_log_info, vha, 0x0075, 8034 "ZIO mode %d enabled; timer delay (%d us).\n", 8035 ha->zio_mode, 8036 ha->zio_timer * 100); 8037 8038 icb->firmware_options_2 |= cpu_to_le32( 8039 (uint32_t)ha->zio_mode); 8040 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); 8041 vha->flags.process_response_queue = 1; 8042 } 8043 8044 /* enable RIDA Format2 */ 8045 if (qla_tgt_mode_enabled(vha) || qla_dual_mode_enabled(vha)) 8046 icb->firmware_options_3 |= BIT_0; 8047 8048 if (IS_QLA27XX(ha)) { 8049 icb->firmware_options_3 |= BIT_8; 8050 ql_dbg(ql_log_info, vha, 0x0075, 8051 "Enabling direct connection.\n"); 8052 } 8053 8054 if (rval) { 8055 ql_log(ql_log_warn, vha, 0x0076, 8056 "NVRAM configuration failed.\n"); 8057 } 8058 return (rval); 8059 } 8060 8061 int 8062 qla82xx_restart_isp(scsi_qla_host_t *vha) 8063 { 8064 int status, rval; 8065 struct qla_hw_data *ha = vha->hw; 8066 struct req_que *req = ha->req_q_map[0]; 8067 struct rsp_que *rsp = ha->rsp_q_map[0]; 8068 struct scsi_qla_host *vp; 8069 unsigned long flags; 8070 8071 status = qla2x00_init_rings(vha); 8072 if (!status) { 8073 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 8074 ha->flags.chip_reset_done = 1; 8075 8076 status = qla2x00_fw_ready(vha); 8077 if (!status) { 8078 /* Issue a marker after FW becomes ready. */ 8079 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); 8080 vha->flags.online = 1; 8081 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 8082 } 8083 8084 /* if no cable then assume it's good */ 8085 if ((vha->device_flags & DFLG_NO_CABLE)) 8086 status = 0; 8087 } 8088 8089 if (!status) { 8090 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 8091 8092 if (!atomic_read(&vha->loop_down_timer)) { 8093 /* 8094 * Issue marker command only when we are going 8095 * to start the I/O . 8096 */ 8097 vha->marker_needed = 1; 8098 } 8099 8100 ha->isp_ops->enable_intrs(ha); 8101 8102 ha->isp_abort_cnt = 0; 8103 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 8104 8105 /* Update the firmware version */ 8106 status = qla82xx_check_md_needed(vha); 8107 8108 if (ha->fce) { 8109 ha->flags.fce_enabled = 1; 8110 memset(ha->fce, 0, 8111 fce_calc_size(ha->fce_bufs)); 8112 rval = qla2x00_enable_fce_trace(vha, 8113 ha->fce_dma, ha->fce_bufs, ha->fce_mb, 8114 &ha->fce_bufs); 8115 if (rval) { 8116 ql_log(ql_log_warn, vha, 0x8001, 8117 "Unable to reinitialize FCE (%d).\n", 8118 rval); 8119 ha->flags.fce_enabled = 0; 8120 } 8121 } 8122 8123 if (ha->eft) { 8124 memset(ha->eft, 0, EFT_SIZE); 8125 rval = qla2x00_enable_eft_trace(vha, 8126 ha->eft_dma, EFT_NUM_BUFFERS); 8127 if (rval) { 8128 ql_log(ql_log_warn, vha, 0x8010, 8129 "Unable to reinitialize EFT (%d).\n", 8130 rval); 8131 } 8132 } 8133 } 8134 8135 if (!status) { 8136 ql_dbg(ql_dbg_taskm, vha, 0x8011, 8137 "qla82xx_restart_isp succeeded.\n"); 8138 8139 spin_lock_irqsave(&ha->vport_slock, flags); 8140 list_for_each_entry(vp, &ha->vp_list, list) { 8141 if (vp->vp_idx) { 8142 atomic_inc(&vp->vref_count); 8143 spin_unlock_irqrestore(&ha->vport_slock, flags); 8144 8145 qla2x00_vp_abort_isp(vp); 8146 8147 spin_lock_irqsave(&ha->vport_slock, flags); 8148 atomic_dec(&vp->vref_count); 8149 } 8150 } 8151 spin_unlock_irqrestore(&ha->vport_slock, flags); 8152 8153 } else { 8154 ql_log(ql_log_warn, vha, 0x8016, 8155 "qla82xx_restart_isp **** FAILED ****.\n"); 8156 } 8157 8158 return status; 8159 } 8160 8161 void 8162 qla81xx_update_fw_options(scsi_qla_host_t *vha) 8163 { 8164 struct qla_hw_data *ha = vha->hw; 8165 8166 /* Hold status IOCBs until ABTS response received. */ 8167 if (ql2xfwholdabts) 8168 ha->fw_options[3] |= BIT_12; 8169 8170 /* Set Retry FLOGI in case of P2P connection */ 8171 if (ha->operating_mode == P2P) { 8172 ha->fw_options[2] |= BIT_3; 8173 ql_dbg(ql_dbg_disc, vha, 0x2103, 8174 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n", 8175 __func__, ha->fw_options[2]); 8176 } 8177 8178 /* Move PUREX, ABTS RX & RIDA to ATIOQ */ 8179 if (ql2xmvasynctoatio) { 8180 if (qla_tgt_mode_enabled(vha) || 8181 qla_dual_mode_enabled(vha)) 8182 ha->fw_options[2] |= BIT_11; 8183 else 8184 ha->fw_options[2] &= ~BIT_11; 8185 } 8186 8187 if (qla_tgt_mode_enabled(vha) || 8188 qla_dual_mode_enabled(vha)) { 8189 /* FW auto send SCSI status during */ 8190 ha->fw_options[1] |= BIT_8; 8191 ha->fw_options[10] |= (u16)SAM_STAT_BUSY << 8; 8192 8193 /* FW perform Exchange validation */ 8194 ha->fw_options[2] |= BIT_4; 8195 } else { 8196 ha->fw_options[1] &= ~BIT_8; 8197 ha->fw_options[10] &= 0x00ff; 8198 8199 ha->fw_options[2] &= ~BIT_4; 8200 } 8201 8202 if (ql2xetsenable) { 8203 /* Enable ETS Burst. */ 8204 memset(ha->fw_options, 0, sizeof(ha->fw_options)); 8205 ha->fw_options[2] |= BIT_9; 8206 } 8207 8208 ql_dbg(ql_dbg_init, vha, 0x00e9, 8209 "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n", 8210 __func__, ha->fw_options[1], ha->fw_options[2], 8211 ha->fw_options[3], vha->host->active_mode); 8212 8213 qla2x00_set_fw_options(vha, ha->fw_options); 8214 } 8215 8216 /* 8217 * qla24xx_get_fcp_prio 8218 * Gets the fcp cmd priority value for the logged in port. 8219 * Looks for a match of the port descriptors within 8220 * each of the fcp prio config entries. If a match is found, 8221 * the tag (priority) value is returned. 8222 * 8223 * Input: 8224 * vha = scsi host structure pointer. 8225 * fcport = port structure pointer. 8226 * 8227 * Return: 8228 * non-zero (if found) 8229 * -1 (if not found) 8230 * 8231 * Context: 8232 * Kernel context 8233 */ 8234 static int 8235 qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) 8236 { 8237 int i, entries; 8238 uint8_t pid_match, wwn_match; 8239 int priority; 8240 uint32_t pid1, pid2; 8241 uint64_t wwn1, wwn2; 8242 struct qla_fcp_prio_entry *pri_entry; 8243 struct qla_hw_data *ha = vha->hw; 8244 8245 if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled) 8246 return -1; 8247 8248 priority = -1; 8249 entries = ha->fcp_prio_cfg->num_entries; 8250 pri_entry = &ha->fcp_prio_cfg->entry[0]; 8251 8252 for (i = 0; i < entries; i++) { 8253 pid_match = wwn_match = 0; 8254 8255 if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) { 8256 pri_entry++; 8257 continue; 8258 } 8259 8260 /* check source pid for a match */ 8261 if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) { 8262 pid1 = pri_entry->src_pid & INVALID_PORT_ID; 8263 pid2 = vha->d_id.b24 & INVALID_PORT_ID; 8264 if (pid1 == INVALID_PORT_ID) 8265 pid_match++; 8266 else if (pid1 == pid2) 8267 pid_match++; 8268 } 8269 8270 /* check destination pid for a match */ 8271 if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) { 8272 pid1 = pri_entry->dst_pid & INVALID_PORT_ID; 8273 pid2 = fcport->d_id.b24 & INVALID_PORT_ID; 8274 if (pid1 == INVALID_PORT_ID) 8275 pid_match++; 8276 else if (pid1 == pid2) 8277 pid_match++; 8278 } 8279 8280 /* check source WWN for a match */ 8281 if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) { 8282 wwn1 = wwn_to_u64(vha->port_name); 8283 wwn2 = wwn_to_u64(pri_entry->src_wwpn); 8284 if (wwn2 == (uint64_t)-1) 8285 wwn_match++; 8286 else if (wwn1 == wwn2) 8287 wwn_match++; 8288 } 8289 8290 /* check destination WWN for a match */ 8291 if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) { 8292 wwn1 = wwn_to_u64(fcport->port_name); 8293 wwn2 = wwn_to_u64(pri_entry->dst_wwpn); 8294 if (wwn2 == (uint64_t)-1) 8295 wwn_match++; 8296 else if (wwn1 == wwn2) 8297 wwn_match++; 8298 } 8299 8300 if (pid_match == 2 || wwn_match == 2) { 8301 /* Found a matching entry */ 8302 if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID) 8303 priority = pri_entry->tag; 8304 break; 8305 } 8306 8307 pri_entry++; 8308 } 8309 8310 return priority; 8311 } 8312 8313 /* 8314 * qla24xx_update_fcport_fcp_prio 8315 * Activates fcp priority for the logged in fc port 8316 * 8317 * Input: 8318 * vha = scsi host structure pointer. 8319 * fcp = port structure pointer. 8320 * 8321 * Return: 8322 * QLA_SUCCESS or QLA_FUNCTION_FAILED 8323 * 8324 * Context: 8325 * Kernel context. 8326 */ 8327 int 8328 qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) 8329 { 8330 int ret; 8331 int priority; 8332 uint16_t mb[5]; 8333 8334 if (fcport->port_type != FCT_TARGET || 8335 fcport->loop_id == FC_NO_LOOP_ID) 8336 return QLA_FUNCTION_FAILED; 8337 8338 priority = qla24xx_get_fcp_prio(vha, fcport); 8339 if (priority < 0) 8340 return QLA_FUNCTION_FAILED; 8341 8342 if (IS_P3P_TYPE(vha->hw)) { 8343 fcport->fcp_prio = priority & 0xf; 8344 return QLA_SUCCESS; 8345 } 8346 8347 ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb); 8348 if (ret == QLA_SUCCESS) { 8349 if (fcport->fcp_prio != priority) 8350 ql_dbg(ql_dbg_user, vha, 0x709e, 8351 "Updated FCP_CMND priority - value=%d loop_id=%d " 8352 "port_id=%02x%02x%02x.\n", priority, 8353 fcport->loop_id, fcport->d_id.b.domain, 8354 fcport->d_id.b.area, fcport->d_id.b.al_pa); 8355 fcport->fcp_prio = priority & 0xf; 8356 } else 8357 ql_dbg(ql_dbg_user, vha, 0x704f, 8358 "Unable to update FCP_CMND priority - ret=0x%x for " 8359 "loop_id=%d port_id=%02x%02x%02x.\n", ret, fcport->loop_id, 8360 fcport->d_id.b.domain, fcport->d_id.b.area, 8361 fcport->d_id.b.al_pa); 8362 return ret; 8363 } 8364 8365 /* 8366 * qla24xx_update_all_fcp_prio 8367 * Activates fcp priority for all the logged in ports 8368 * 8369 * Input: 8370 * ha = adapter block pointer. 8371 * 8372 * Return: 8373 * QLA_SUCCESS or QLA_FUNCTION_FAILED 8374 * 8375 * Context: 8376 * Kernel context. 8377 */ 8378 int 8379 qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha) 8380 { 8381 int ret; 8382 fc_port_t *fcport; 8383 8384 ret = QLA_FUNCTION_FAILED; 8385 /* We need to set priority for all logged in ports */ 8386 list_for_each_entry(fcport, &vha->vp_fcports, list) 8387 ret = qla24xx_update_fcport_fcp_prio(vha, fcport); 8388 8389 return ret; 8390 } 8391 8392 struct qla_qpair *qla2xxx_create_qpair(struct scsi_qla_host *vha, int qos, 8393 int vp_idx, bool startqp) 8394 { 8395 int rsp_id = 0; 8396 int req_id = 0; 8397 int i; 8398 struct qla_hw_data *ha = vha->hw; 8399 uint16_t qpair_id = 0; 8400 struct qla_qpair *qpair = NULL; 8401 struct qla_msix_entry *msix; 8402 8403 if (!(ha->fw_attributes & BIT_6) || !ha->flags.msix_enabled) { 8404 ql_log(ql_log_warn, vha, 0x00181, 8405 "FW/Driver is not multi-queue capable.\n"); 8406 return NULL; 8407 } 8408 8409 if (ql2xmqsupport || ql2xnvmeenable) { 8410 qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL); 8411 if (qpair == NULL) { 8412 ql_log(ql_log_warn, vha, 0x0182, 8413 "Failed to allocate memory for queue pair.\n"); 8414 return NULL; 8415 } 8416 memset(qpair, 0, sizeof(struct qla_qpair)); 8417 8418 qpair->hw = vha->hw; 8419 qpair->vha = vha; 8420 qpair->qp_lock_ptr = &qpair->qp_lock; 8421 spin_lock_init(&qpair->qp_lock); 8422 qpair->use_shadow_reg = IS_SHADOW_REG_CAPABLE(ha) ? 1 : 0; 8423 8424 /* Assign available que pair id */ 8425 mutex_lock(&ha->mq_lock); 8426 qpair_id = find_first_zero_bit(ha->qpair_qid_map, ha->max_qpairs); 8427 if (ha->num_qpairs >= ha->max_qpairs) { 8428 mutex_unlock(&ha->mq_lock); 8429 ql_log(ql_log_warn, vha, 0x0183, 8430 "No resources to create additional q pair.\n"); 8431 goto fail_qid_map; 8432 } 8433 ha->num_qpairs++; 8434 set_bit(qpair_id, ha->qpair_qid_map); 8435 ha->queue_pair_map[qpair_id] = qpair; 8436 qpair->id = qpair_id; 8437 qpair->vp_idx = vp_idx; 8438 qpair->fw_started = ha->flags.fw_started; 8439 INIT_LIST_HEAD(&qpair->hints_list); 8440 qpair->chip_reset = ha->base_qpair->chip_reset; 8441 qpair->enable_class_2 = ha->base_qpair->enable_class_2; 8442 qpair->enable_explicit_conf = 8443 ha->base_qpair->enable_explicit_conf; 8444 8445 for (i = 0; i < ha->msix_count; i++) { 8446 msix = &ha->msix_entries[i]; 8447 if (msix->in_use) 8448 continue; 8449 qpair->msix = msix; 8450 ql_dbg(ql_dbg_multiq, vha, 0xc00f, 8451 "Vector %x selected for qpair\n", msix->vector); 8452 break; 8453 } 8454 if (!qpair->msix) { 8455 ql_log(ql_log_warn, vha, 0x0184, 8456 "Out of MSI-X vectors!.\n"); 8457 goto fail_msix; 8458 } 8459 8460 qpair->msix->in_use = 1; 8461 list_add_tail(&qpair->qp_list_elem, &vha->qp_list); 8462 qpair->pdev = ha->pdev; 8463 if (IS_QLA27XX(ha) || IS_QLA83XX(ha)) 8464 qpair->reqq_start_iocbs = qla_83xx_start_iocbs; 8465 8466 mutex_unlock(&ha->mq_lock); 8467 8468 /* Create response queue first */ 8469 rsp_id = qla25xx_create_rsp_que(ha, 0, 0, 0, qpair, startqp); 8470 if (!rsp_id) { 8471 ql_log(ql_log_warn, vha, 0x0185, 8472 "Failed to create response queue.\n"); 8473 goto fail_rsp; 8474 } 8475 8476 qpair->rsp = ha->rsp_q_map[rsp_id]; 8477 8478 /* Create request queue */ 8479 req_id = qla25xx_create_req_que(ha, 0, vp_idx, 0, rsp_id, qos, 8480 startqp); 8481 if (!req_id) { 8482 ql_log(ql_log_warn, vha, 0x0186, 8483 "Failed to create request queue.\n"); 8484 goto fail_req; 8485 } 8486 8487 qpair->req = ha->req_q_map[req_id]; 8488 qpair->rsp->req = qpair->req; 8489 qpair->rsp->qpair = qpair; 8490 /* init qpair to this cpu. Will adjust at run time. */ 8491 qla_cpu_update(qpair, smp_processor_id()); 8492 8493 if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) { 8494 if (ha->fw_attributes & BIT_4) 8495 qpair->difdix_supported = 1; 8496 } 8497 8498 qpair->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep); 8499 if (!qpair->srb_mempool) { 8500 ql_log(ql_log_warn, vha, 0xd036, 8501 "Failed to create srb mempool for qpair %d\n", 8502 qpair->id); 8503 goto fail_mempool; 8504 } 8505 8506 /* Mark as online */ 8507 qpair->online = 1; 8508 8509 if (!vha->flags.qpairs_available) 8510 vha->flags.qpairs_available = 1; 8511 8512 ql_dbg(ql_dbg_multiq, vha, 0xc00d, 8513 "Request/Response queue pair created, id %d\n", 8514 qpair->id); 8515 ql_dbg(ql_dbg_init, vha, 0x0187, 8516 "Request/Response queue pair created, id %d\n", 8517 qpair->id); 8518 } 8519 return qpair; 8520 8521 fail_mempool: 8522 fail_req: 8523 qla25xx_delete_rsp_que(vha, qpair->rsp); 8524 fail_rsp: 8525 mutex_lock(&ha->mq_lock); 8526 qpair->msix->in_use = 0; 8527 list_del(&qpair->qp_list_elem); 8528 if (list_empty(&vha->qp_list)) 8529 vha->flags.qpairs_available = 0; 8530 fail_msix: 8531 ha->queue_pair_map[qpair_id] = NULL; 8532 clear_bit(qpair_id, ha->qpair_qid_map); 8533 ha->num_qpairs--; 8534 mutex_unlock(&ha->mq_lock); 8535 fail_qid_map: 8536 kfree(qpair); 8537 return NULL; 8538 } 8539 8540 int qla2xxx_delete_qpair(struct scsi_qla_host *vha, struct qla_qpair *qpair) 8541 { 8542 int ret = QLA_FUNCTION_FAILED; 8543 struct qla_hw_data *ha = qpair->hw; 8544 8545 qpair->delete_in_progress = 1; 8546 while (atomic_read(&qpair->ref_count)) 8547 msleep(500); 8548 8549 ret = qla25xx_delete_req_que(vha, qpair->req); 8550 if (ret != QLA_SUCCESS) 8551 goto fail; 8552 8553 ret = qla25xx_delete_rsp_que(vha, qpair->rsp); 8554 if (ret != QLA_SUCCESS) 8555 goto fail; 8556 8557 mutex_lock(&ha->mq_lock); 8558 ha->queue_pair_map[qpair->id] = NULL; 8559 clear_bit(qpair->id, ha->qpair_qid_map); 8560 ha->num_qpairs--; 8561 list_del(&qpair->qp_list_elem); 8562 if (list_empty(&vha->qp_list)) { 8563 vha->flags.qpairs_available = 0; 8564 vha->flags.qpairs_req_created = 0; 8565 vha->flags.qpairs_rsp_created = 0; 8566 } 8567 mempool_destroy(qpair->srb_mempool); 8568 kfree(qpair); 8569 mutex_unlock(&ha->mq_lock); 8570 8571 return QLA_SUCCESS; 8572 fail: 8573 return ret; 8574 } 8575