1 /* 2 * QLogic Fibre Channel HBA Driver 3 * Copyright (c) 2003-2011 QLogic Corporation 4 * 5 * See LICENSE.qla2xxx for copyright and licensing details. 6 */ 7 #include "qla_def.h" 8 #include "qla_gbl.h" 9 10 #include <linux/delay.h> 11 #include <linux/slab.h> 12 #include <linux/vmalloc.h> 13 14 #include "qla_devtbl.h" 15 16 #ifdef CONFIG_SPARC 17 #include <asm/prom.h> 18 #endif 19 20 /* 21 * QLogic ISP2x00 Hardware Support Function Prototypes. 22 */ 23 static int qla2x00_isp_firmware(scsi_qla_host_t *); 24 static int qla2x00_setup_chip(scsi_qla_host_t *); 25 static int qla2x00_init_rings(scsi_qla_host_t *); 26 static int qla2x00_fw_ready(scsi_qla_host_t *); 27 static int qla2x00_configure_hba(scsi_qla_host_t *); 28 static int qla2x00_configure_loop(scsi_qla_host_t *); 29 static int qla2x00_configure_local_loop(scsi_qla_host_t *); 30 static int qla2x00_configure_fabric(scsi_qla_host_t *); 31 static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *, struct list_head *); 32 static int qla2x00_device_resync(scsi_qla_host_t *); 33 static int qla2x00_fabric_dev_login(scsi_qla_host_t *, fc_port_t *, 34 uint16_t *); 35 36 static int qla2x00_restart_isp(scsi_qla_host_t *); 37 38 static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *); 39 static int qla84xx_init_chip(scsi_qla_host_t *); 40 static int qla25xx_init_queues(struct qla_hw_data *); 41 42 /* SRB Extensions ---------------------------------------------------------- */ 43 44 static void 45 qla2x00_ctx_sp_timeout(unsigned long __data) 46 { 47 srb_t *sp = (srb_t *)__data; 48 struct srb_ctx *ctx; 49 struct srb_iocb *iocb; 50 fc_port_t *fcport = sp->fcport; 51 struct qla_hw_data *ha = fcport->vha->hw; 52 struct req_que *req; 53 unsigned long flags; 54 55 spin_lock_irqsave(&ha->hardware_lock, flags); 56 req = ha->req_q_map[0]; 57 req->outstanding_cmds[sp->handle] = NULL; 58 ctx = sp->ctx; 59 iocb = ctx->u.iocb_cmd; 60 iocb->timeout(sp); 61 iocb->free(sp); 62 spin_unlock_irqrestore(&ha->hardware_lock, flags); 63 } 64 65 static void 66 qla2x00_ctx_sp_free(srb_t *sp) 67 { 68 struct srb_ctx *ctx = sp->ctx; 69 struct srb_iocb *iocb = ctx->u.iocb_cmd; 70 struct scsi_qla_host *vha = sp->fcport->vha; 71 72 del_timer(&iocb->timer); 73 kfree(iocb); 74 kfree(ctx); 75 mempool_free(sp, sp->fcport->vha->hw->srb_mempool); 76 77 QLA_VHA_MARK_NOT_BUSY(vha); 78 } 79 80 inline srb_t * 81 qla2x00_get_ctx_sp(scsi_qla_host_t *vha, fc_port_t *fcport, size_t size, 82 unsigned long tmo) 83 { 84 srb_t *sp = NULL; 85 struct qla_hw_data *ha = vha->hw; 86 struct srb_ctx *ctx; 87 struct srb_iocb *iocb; 88 uint8_t bail; 89 90 QLA_VHA_MARK_BUSY(vha, bail); 91 if (bail) 92 return NULL; 93 94 sp = mempool_alloc(ha->srb_mempool, GFP_KERNEL); 95 if (!sp) 96 goto done; 97 ctx = kzalloc(size, GFP_KERNEL); 98 if (!ctx) { 99 mempool_free(sp, ha->srb_mempool); 100 sp = NULL; 101 goto done; 102 } 103 iocb = kzalloc(sizeof(struct srb_iocb), GFP_KERNEL); 104 if (!iocb) { 105 mempool_free(sp, ha->srb_mempool); 106 sp = NULL; 107 kfree(ctx); 108 goto done; 109 } 110 111 memset(sp, 0, sizeof(*sp)); 112 sp->fcport = fcport; 113 sp->ctx = ctx; 114 ctx->iocbs = 1; 115 ctx->u.iocb_cmd = iocb; 116 iocb->free = qla2x00_ctx_sp_free; 117 118 init_timer(&iocb->timer); 119 if (!tmo) 120 goto done; 121 iocb->timer.expires = jiffies + tmo * HZ; 122 iocb->timer.data = (unsigned long)sp; 123 iocb->timer.function = qla2x00_ctx_sp_timeout; 124 add_timer(&iocb->timer); 125 done: 126 if (!sp) 127 QLA_VHA_MARK_NOT_BUSY(vha); 128 return sp; 129 } 130 131 /* Asynchronous Login/Logout Routines -------------------------------------- */ 132 133 static inline unsigned long 134 qla2x00_get_async_timeout(struct scsi_qla_host *vha) 135 { 136 unsigned long tmo; 137 struct qla_hw_data *ha = vha->hw; 138 139 /* Firmware should use switch negotiated r_a_tov for timeout. */ 140 tmo = ha->r_a_tov / 10 * 2; 141 if (!IS_FWI2_CAPABLE(ha)) { 142 /* 143 * Except for earlier ISPs where the timeout is seeded from the 144 * initialization control block. 145 */ 146 tmo = ha->login_timeout; 147 } 148 return tmo; 149 } 150 151 static void 152 qla2x00_async_iocb_timeout(srb_t *sp) 153 { 154 fc_port_t *fcport = sp->fcport; 155 struct srb_ctx *ctx = sp->ctx; 156 157 ql_dbg(ql_dbg_disc, fcport->vha, 0x2071, 158 "Async-%s timeout - hdl=%x portid=%02x%02x%02x.\n", 159 ctx->name, sp->handle, fcport->d_id.b.domain, fcport->d_id.b.area, 160 fcport->d_id.b.al_pa); 161 162 fcport->flags &= ~FCF_ASYNC_SENT; 163 if (ctx->type == SRB_LOGIN_CMD) { 164 struct srb_iocb *lio = ctx->u.iocb_cmd; 165 qla2x00_post_async_logout_work(fcport->vha, fcport, NULL); 166 /* Retry as needed. */ 167 lio->u.logio.data[0] = MBS_COMMAND_ERROR; 168 lio->u.logio.data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ? 169 QLA_LOGIO_LOGIN_RETRIED : 0; 170 qla2x00_post_async_login_done_work(fcport->vha, fcport, 171 lio->u.logio.data); 172 } 173 } 174 175 static void 176 qla2x00_async_login_ctx_done(srb_t *sp) 177 { 178 struct srb_ctx *ctx = sp->ctx; 179 struct srb_iocb *lio = ctx->u.iocb_cmd; 180 181 qla2x00_post_async_login_done_work(sp->fcport->vha, sp->fcport, 182 lio->u.logio.data); 183 lio->free(sp); 184 } 185 186 int 187 qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport, 188 uint16_t *data) 189 { 190 srb_t *sp; 191 struct srb_ctx *ctx; 192 struct srb_iocb *lio; 193 int rval; 194 195 rval = QLA_FUNCTION_FAILED; 196 sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx), 197 qla2x00_get_async_timeout(vha) + 2); 198 if (!sp) 199 goto done; 200 201 ctx = sp->ctx; 202 ctx->type = SRB_LOGIN_CMD; 203 ctx->name = "login"; 204 lio = ctx->u.iocb_cmd; 205 lio->timeout = qla2x00_async_iocb_timeout; 206 lio->done = qla2x00_async_login_ctx_done; 207 lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI; 208 if (data[1] & QLA_LOGIO_LOGIN_RETRIED) 209 lio->u.logio.flags |= SRB_LOGIN_RETRIED; 210 rval = qla2x00_start_sp(sp); 211 if (rval != QLA_SUCCESS) 212 goto done_free_sp; 213 214 ql_dbg(ql_dbg_disc, vha, 0x2072, 215 "Async-login - hdl=%x, loopid=%x portid=%02x%02x%02x " 216 "retries=%d.\n", sp->handle, fcport->loop_id, 217 fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa, 218 fcport->login_retry); 219 return rval; 220 221 done_free_sp: 222 lio->free(sp); 223 done: 224 return rval; 225 } 226 227 static void 228 qla2x00_async_logout_ctx_done(srb_t *sp) 229 { 230 struct srb_ctx *ctx = sp->ctx; 231 struct srb_iocb *lio = ctx->u.iocb_cmd; 232 233 qla2x00_post_async_logout_done_work(sp->fcport->vha, sp->fcport, 234 lio->u.logio.data); 235 lio->free(sp); 236 } 237 238 int 239 qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport) 240 { 241 srb_t *sp; 242 struct srb_ctx *ctx; 243 struct srb_iocb *lio; 244 int rval; 245 246 rval = QLA_FUNCTION_FAILED; 247 sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx), 248 qla2x00_get_async_timeout(vha) + 2); 249 if (!sp) 250 goto done; 251 252 ctx = sp->ctx; 253 ctx->type = SRB_LOGOUT_CMD; 254 ctx->name = "logout"; 255 lio = ctx->u.iocb_cmd; 256 lio->timeout = qla2x00_async_iocb_timeout; 257 lio->done = qla2x00_async_logout_ctx_done; 258 rval = qla2x00_start_sp(sp); 259 if (rval != QLA_SUCCESS) 260 goto done_free_sp; 261 262 ql_dbg(ql_dbg_disc, vha, 0x2070, 263 "Async-logout - hdl=%x loop-id=%x portid=%02x%02x%02x.\n", 264 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 265 fcport->d_id.b.area, fcport->d_id.b.al_pa); 266 return rval; 267 268 done_free_sp: 269 lio->free(sp); 270 done: 271 return rval; 272 } 273 274 static void 275 qla2x00_async_adisc_ctx_done(srb_t *sp) 276 { 277 struct srb_ctx *ctx = sp->ctx; 278 struct srb_iocb *lio = ctx->u.iocb_cmd; 279 280 qla2x00_post_async_adisc_done_work(sp->fcport->vha, sp->fcport, 281 lio->u.logio.data); 282 lio->free(sp); 283 } 284 285 int 286 qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport, 287 uint16_t *data) 288 { 289 srb_t *sp; 290 struct srb_ctx *ctx; 291 struct srb_iocb *lio; 292 int rval; 293 294 rval = QLA_FUNCTION_FAILED; 295 sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx), 296 qla2x00_get_async_timeout(vha) + 2); 297 if (!sp) 298 goto done; 299 300 ctx = sp->ctx; 301 ctx->type = SRB_ADISC_CMD; 302 ctx->name = "adisc"; 303 lio = ctx->u.iocb_cmd; 304 lio->timeout = qla2x00_async_iocb_timeout; 305 lio->done = qla2x00_async_adisc_ctx_done; 306 if (data[1] & QLA_LOGIO_LOGIN_RETRIED) 307 lio->u.logio.flags |= SRB_LOGIN_RETRIED; 308 rval = qla2x00_start_sp(sp); 309 if (rval != QLA_SUCCESS) 310 goto done_free_sp; 311 312 ql_dbg(ql_dbg_disc, vha, 0x206f, 313 "Async-adisc - hdl=%x loopid=%x portid=%02x%02x%02x.\n", 314 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 315 fcport->d_id.b.area, fcport->d_id.b.al_pa); 316 return rval; 317 318 done_free_sp: 319 lio->free(sp); 320 done: 321 return rval; 322 } 323 324 static void 325 qla2x00_async_tm_cmd_ctx_done(srb_t *sp) 326 { 327 struct srb_ctx *ctx = sp->ctx; 328 struct srb_iocb *iocb = (struct srb_iocb *)ctx->u.iocb_cmd; 329 330 qla2x00_async_tm_cmd_done(sp->fcport->vha, sp->fcport, iocb); 331 iocb->free(sp); 332 } 333 334 int 335 qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint32_t lun, 336 uint32_t tag) 337 { 338 struct scsi_qla_host *vha = fcport->vha; 339 srb_t *sp; 340 struct srb_ctx *ctx; 341 struct srb_iocb *tcf; 342 int rval; 343 344 rval = QLA_FUNCTION_FAILED; 345 sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx), 346 qla2x00_get_async_timeout(vha) + 2); 347 if (!sp) 348 goto done; 349 350 ctx = sp->ctx; 351 ctx->type = SRB_TM_CMD; 352 ctx->name = "tmf"; 353 tcf = ctx->u.iocb_cmd; 354 tcf->u.tmf.flags = flags; 355 tcf->u.tmf.lun = lun; 356 tcf->u.tmf.data = tag; 357 tcf->timeout = qla2x00_async_iocb_timeout; 358 tcf->done = qla2x00_async_tm_cmd_ctx_done; 359 360 rval = qla2x00_start_sp(sp); 361 if (rval != QLA_SUCCESS) 362 goto done_free_sp; 363 364 ql_dbg(ql_dbg_taskm, vha, 0x802f, 365 "Async-tmf hdl=%x loop-id=%x portid=%02x%02x%02x.\n", 366 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 367 fcport->d_id.b.area, fcport->d_id.b.al_pa); 368 return rval; 369 370 done_free_sp: 371 tcf->free(sp); 372 done: 373 return rval; 374 } 375 376 void 377 qla2x00_async_login_done(struct scsi_qla_host *vha, fc_port_t *fcport, 378 uint16_t *data) 379 { 380 int rval; 381 382 switch (data[0]) { 383 case MBS_COMMAND_COMPLETE: 384 /* 385 * Driver must validate login state - If PRLI not complete, 386 * force a relogin attempt via implicit LOGO, PLOGI, and PRLI 387 * requests. 388 */ 389 rval = qla2x00_get_port_database(vha, fcport, 0); 390 if (rval != QLA_SUCCESS) { 391 qla2x00_post_async_logout_work(vha, fcport, NULL); 392 qla2x00_post_async_login_work(vha, fcport, NULL); 393 break; 394 } 395 if (fcport->flags & FCF_FCP2_DEVICE) { 396 qla2x00_post_async_adisc_work(vha, fcport, data); 397 break; 398 } 399 qla2x00_update_fcport(vha, fcport); 400 break; 401 case MBS_COMMAND_ERROR: 402 fcport->flags &= ~FCF_ASYNC_SENT; 403 if (data[1] & QLA_LOGIO_LOGIN_RETRIED) 404 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 405 else 406 qla2x00_mark_device_lost(vha, fcport, 1, 0); 407 break; 408 case MBS_PORT_ID_USED: 409 fcport->loop_id = data[1]; 410 qla2x00_post_async_logout_work(vha, fcport, NULL); 411 qla2x00_post_async_login_work(vha, fcport, NULL); 412 break; 413 case MBS_LOOP_ID_USED: 414 fcport->loop_id++; 415 rval = qla2x00_find_new_loop_id(vha, fcport); 416 if (rval != QLA_SUCCESS) { 417 fcport->flags &= ~FCF_ASYNC_SENT; 418 qla2x00_mark_device_lost(vha, fcport, 1, 0); 419 break; 420 } 421 qla2x00_post_async_login_work(vha, fcport, NULL); 422 break; 423 } 424 return; 425 } 426 427 void 428 qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport, 429 uint16_t *data) 430 { 431 qla2x00_mark_device_lost(vha, fcport, 1, 0); 432 return; 433 } 434 435 void 436 qla2x00_async_adisc_done(struct scsi_qla_host *vha, fc_port_t *fcport, 437 uint16_t *data) 438 { 439 if (data[0] == MBS_COMMAND_COMPLETE) { 440 qla2x00_update_fcport(vha, fcport); 441 442 return; 443 } 444 445 /* Retry login. */ 446 fcport->flags &= ~FCF_ASYNC_SENT; 447 if (data[1] & QLA_LOGIO_LOGIN_RETRIED) 448 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 449 else 450 qla2x00_mark_device_lost(vha, fcport, 1, 0); 451 452 return; 453 } 454 455 void 456 qla2x00_async_tm_cmd_done(struct scsi_qla_host *vha, fc_port_t *fcport, 457 struct srb_iocb *iocb) 458 { 459 int rval; 460 uint32_t flags; 461 uint16_t lun; 462 463 flags = iocb->u.tmf.flags; 464 lun = (uint16_t)iocb->u.tmf.lun; 465 466 /* Issue Marker IOCB */ 467 rval = qla2x00_marker(vha, vha->hw->req_q_map[0], 468 vha->hw->rsp_q_map[0], fcport->loop_id, lun, 469 flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID); 470 471 if ((rval != QLA_SUCCESS) || iocb->u.tmf.data) { 472 ql_dbg(ql_dbg_taskm, vha, 0x8030, 473 "TM IOCB failed (%x).\n", rval); 474 } 475 476 return; 477 } 478 479 /****************************************************************************/ 480 /* QLogic ISP2x00 Hardware Support Functions. */ 481 /****************************************************************************/ 482 483 /* 484 * qla2x00_initialize_adapter 485 * Initialize board. 486 * 487 * Input: 488 * ha = adapter block pointer. 489 * 490 * Returns: 491 * 0 = success 492 */ 493 int 494 qla2x00_initialize_adapter(scsi_qla_host_t *vha) 495 { 496 int rval; 497 struct qla_hw_data *ha = vha->hw; 498 struct req_que *req = ha->req_q_map[0]; 499 500 /* Clear adapter flags. */ 501 vha->flags.online = 0; 502 ha->flags.chip_reset_done = 0; 503 vha->flags.reset_active = 0; 504 ha->flags.pci_channel_io_perm_failure = 0; 505 ha->flags.eeh_busy = 0; 506 ha->flags.thermal_supported = 1; 507 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 508 atomic_set(&vha->loop_state, LOOP_DOWN); 509 vha->device_flags = DFLG_NO_CABLE; 510 vha->dpc_flags = 0; 511 vha->flags.management_server_logged_in = 0; 512 vha->marker_needed = 0; 513 ha->isp_abort_cnt = 0; 514 ha->beacon_blink_led = 0; 515 516 set_bit(0, ha->req_qid_map); 517 set_bit(0, ha->rsp_qid_map); 518 519 ql_dbg(ql_dbg_init, vha, 0x0040, 520 "Configuring PCI space...\n"); 521 rval = ha->isp_ops->pci_config(vha); 522 if (rval) { 523 ql_log(ql_log_warn, vha, 0x0044, 524 "Unable to configure PCI space.\n"); 525 return (rval); 526 } 527 528 ha->isp_ops->reset_chip(vha); 529 530 rval = qla2xxx_get_flash_info(vha); 531 if (rval) { 532 ql_log(ql_log_fatal, vha, 0x004f, 533 "Unable to validate FLASH data.\n"); 534 return (rval); 535 } 536 537 ha->isp_ops->get_flash_version(vha, req->ring); 538 ql_dbg(ql_dbg_init, vha, 0x0061, 539 "Configure NVRAM parameters...\n"); 540 541 ha->isp_ops->nvram_config(vha); 542 543 if (ha->flags.disable_serdes) { 544 /* Mask HBA via NVRAM settings? */ 545 ql_log(ql_log_info, vha, 0x0077, 546 "Masking HBA WWPN " 547 "%02x%02x%02x%02x%02x%02x%02x%02x (via NVRAM).\n", 548 vha->port_name[0], vha->port_name[1], 549 vha->port_name[2], vha->port_name[3], 550 vha->port_name[4], vha->port_name[5], 551 vha->port_name[6], vha->port_name[7]); 552 return QLA_FUNCTION_FAILED; 553 } 554 555 ql_dbg(ql_dbg_init, vha, 0x0078, 556 "Verifying loaded RISC code...\n"); 557 558 if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) { 559 rval = ha->isp_ops->chip_diag(vha); 560 if (rval) 561 return (rval); 562 rval = qla2x00_setup_chip(vha); 563 if (rval) 564 return (rval); 565 } 566 567 if (IS_QLA84XX(ha)) { 568 ha->cs84xx = qla84xx_get_chip(vha); 569 if (!ha->cs84xx) { 570 ql_log(ql_log_warn, vha, 0x00d0, 571 "Unable to configure ISP84XX.\n"); 572 return QLA_FUNCTION_FAILED; 573 } 574 } 575 rval = qla2x00_init_rings(vha); 576 ha->flags.chip_reset_done = 1; 577 578 if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) { 579 /* Issue verify 84xx FW IOCB to complete 84xx initialization */ 580 rval = qla84xx_init_chip(vha); 581 if (rval != QLA_SUCCESS) { 582 ql_log(ql_log_warn, vha, 0x00d4, 583 "Unable to initialize ISP84XX.\n"); 584 qla84xx_put_chip(vha); 585 } 586 } 587 588 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha)) 589 qla24xx_read_fcp_prio_cfg(vha); 590 591 return (rval); 592 } 593 594 /** 595 * qla2100_pci_config() - Setup ISP21xx PCI configuration registers. 596 * @ha: HA context 597 * 598 * Returns 0 on success. 599 */ 600 int 601 qla2100_pci_config(scsi_qla_host_t *vha) 602 { 603 uint16_t w; 604 unsigned long flags; 605 struct qla_hw_data *ha = vha->hw; 606 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 607 608 pci_set_master(ha->pdev); 609 pci_try_set_mwi(ha->pdev); 610 611 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 612 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 613 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 614 615 pci_disable_rom(ha->pdev); 616 617 /* Get PCI bus information. */ 618 spin_lock_irqsave(&ha->hardware_lock, flags); 619 ha->pci_attr = RD_REG_WORD(®->ctrl_status); 620 spin_unlock_irqrestore(&ha->hardware_lock, flags); 621 622 return QLA_SUCCESS; 623 } 624 625 /** 626 * qla2300_pci_config() - Setup ISP23xx PCI configuration registers. 627 * @ha: HA context 628 * 629 * Returns 0 on success. 630 */ 631 int 632 qla2300_pci_config(scsi_qla_host_t *vha) 633 { 634 uint16_t w; 635 unsigned long flags = 0; 636 uint32_t cnt; 637 struct qla_hw_data *ha = vha->hw; 638 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 639 640 pci_set_master(ha->pdev); 641 pci_try_set_mwi(ha->pdev); 642 643 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 644 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 645 646 if (IS_QLA2322(ha) || IS_QLA6322(ha)) 647 w &= ~PCI_COMMAND_INTX_DISABLE; 648 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 649 650 /* 651 * If this is a 2300 card and not 2312, reset the 652 * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately, 653 * the 2310 also reports itself as a 2300 so we need to get the 654 * fb revision level -- a 6 indicates it really is a 2300 and 655 * not a 2310. 656 */ 657 if (IS_QLA2300(ha)) { 658 spin_lock_irqsave(&ha->hardware_lock, flags); 659 660 /* Pause RISC. */ 661 WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); 662 for (cnt = 0; cnt < 30000; cnt++) { 663 if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) != 0) 664 break; 665 666 udelay(10); 667 } 668 669 /* Select FPM registers. */ 670 WRT_REG_WORD(®->ctrl_status, 0x20); 671 RD_REG_WORD(®->ctrl_status); 672 673 /* Get the fb rev level */ 674 ha->fb_rev = RD_FB_CMD_REG(ha, reg); 675 676 if (ha->fb_rev == FPM_2300) 677 pci_clear_mwi(ha->pdev); 678 679 /* Deselect FPM registers. */ 680 WRT_REG_WORD(®->ctrl_status, 0x0); 681 RD_REG_WORD(®->ctrl_status); 682 683 /* Release RISC module. */ 684 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 685 for (cnt = 0; cnt < 30000; cnt++) { 686 if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) == 0) 687 break; 688 689 udelay(10); 690 } 691 692 spin_unlock_irqrestore(&ha->hardware_lock, flags); 693 } 694 695 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); 696 697 pci_disable_rom(ha->pdev); 698 699 /* Get PCI bus information. */ 700 spin_lock_irqsave(&ha->hardware_lock, flags); 701 ha->pci_attr = RD_REG_WORD(®->ctrl_status); 702 spin_unlock_irqrestore(&ha->hardware_lock, flags); 703 704 return QLA_SUCCESS; 705 } 706 707 /** 708 * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers. 709 * @ha: HA context 710 * 711 * Returns 0 on success. 712 */ 713 int 714 qla24xx_pci_config(scsi_qla_host_t *vha) 715 { 716 uint16_t w; 717 unsigned long flags = 0; 718 struct qla_hw_data *ha = vha->hw; 719 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 720 721 pci_set_master(ha->pdev); 722 pci_try_set_mwi(ha->pdev); 723 724 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 725 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 726 w &= ~PCI_COMMAND_INTX_DISABLE; 727 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 728 729 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); 730 731 /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */ 732 if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX)) 733 pcix_set_mmrbc(ha->pdev, 2048); 734 735 /* PCIe -- adjust Maximum Read Request Size (2048). */ 736 if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP)) 737 pcie_set_readrq(ha->pdev, 2048); 738 739 pci_disable_rom(ha->pdev); 740 741 ha->chip_revision = ha->pdev->revision; 742 743 /* Get PCI bus information. */ 744 spin_lock_irqsave(&ha->hardware_lock, flags); 745 ha->pci_attr = RD_REG_DWORD(®->ctrl_status); 746 spin_unlock_irqrestore(&ha->hardware_lock, flags); 747 748 return QLA_SUCCESS; 749 } 750 751 /** 752 * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers. 753 * @ha: HA context 754 * 755 * Returns 0 on success. 756 */ 757 int 758 qla25xx_pci_config(scsi_qla_host_t *vha) 759 { 760 uint16_t w; 761 struct qla_hw_data *ha = vha->hw; 762 763 pci_set_master(ha->pdev); 764 pci_try_set_mwi(ha->pdev); 765 766 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 767 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 768 w &= ~PCI_COMMAND_INTX_DISABLE; 769 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 770 771 /* PCIe -- adjust Maximum Read Request Size (2048). */ 772 if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP)) 773 pcie_set_readrq(ha->pdev, 2048); 774 775 pci_disable_rom(ha->pdev); 776 777 ha->chip_revision = ha->pdev->revision; 778 779 return QLA_SUCCESS; 780 } 781 782 /** 783 * qla2x00_isp_firmware() - Choose firmware image. 784 * @ha: HA context 785 * 786 * Returns 0 on success. 787 */ 788 static int 789 qla2x00_isp_firmware(scsi_qla_host_t *vha) 790 { 791 int rval; 792 uint16_t loop_id, topo, sw_cap; 793 uint8_t domain, area, al_pa; 794 struct qla_hw_data *ha = vha->hw; 795 796 /* Assume loading risc code */ 797 rval = QLA_FUNCTION_FAILED; 798 799 if (ha->flags.disable_risc_code_load) { 800 ql_log(ql_log_info, vha, 0x0079, "RISC CODE NOT loaded.\n"); 801 802 /* Verify checksum of loaded RISC code. */ 803 rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address); 804 if (rval == QLA_SUCCESS) { 805 /* And, verify we are not in ROM code. */ 806 rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa, 807 &area, &domain, &topo, &sw_cap); 808 } 809 } 810 811 if (rval) 812 ql_dbg(ql_dbg_init, vha, 0x007a, 813 "**** Load RISC code ****.\n"); 814 815 return (rval); 816 } 817 818 /** 819 * qla2x00_reset_chip() - Reset ISP chip. 820 * @ha: HA context 821 * 822 * Returns 0 on success. 823 */ 824 void 825 qla2x00_reset_chip(scsi_qla_host_t *vha) 826 { 827 unsigned long flags = 0; 828 struct qla_hw_data *ha = vha->hw; 829 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 830 uint32_t cnt; 831 uint16_t cmd; 832 833 if (unlikely(pci_channel_offline(ha->pdev))) 834 return; 835 836 ha->isp_ops->disable_intrs(ha); 837 838 spin_lock_irqsave(&ha->hardware_lock, flags); 839 840 /* Turn off master enable */ 841 cmd = 0; 842 pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd); 843 cmd &= ~PCI_COMMAND_MASTER; 844 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); 845 846 if (!IS_QLA2100(ha)) { 847 /* Pause RISC. */ 848 WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); 849 if (IS_QLA2200(ha) || IS_QLA2300(ha)) { 850 for (cnt = 0; cnt < 30000; cnt++) { 851 if ((RD_REG_WORD(®->hccr) & 852 HCCR_RISC_PAUSE) != 0) 853 break; 854 udelay(100); 855 } 856 } else { 857 RD_REG_WORD(®->hccr); /* PCI Posting. */ 858 udelay(10); 859 } 860 861 /* Select FPM registers. */ 862 WRT_REG_WORD(®->ctrl_status, 0x20); 863 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ 864 865 /* FPM Soft Reset. */ 866 WRT_REG_WORD(®->fpm_diag_config, 0x100); 867 RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */ 868 869 /* Toggle Fpm Reset. */ 870 if (!IS_QLA2200(ha)) { 871 WRT_REG_WORD(®->fpm_diag_config, 0x0); 872 RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */ 873 } 874 875 /* Select frame buffer registers. */ 876 WRT_REG_WORD(®->ctrl_status, 0x10); 877 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ 878 879 /* Reset frame buffer FIFOs. */ 880 if (IS_QLA2200(ha)) { 881 WRT_FB_CMD_REG(ha, reg, 0xa000); 882 RD_FB_CMD_REG(ha, reg); /* PCI Posting. */ 883 } else { 884 WRT_FB_CMD_REG(ha, reg, 0x00fc); 885 886 /* Read back fb_cmd until zero or 3 seconds max */ 887 for (cnt = 0; cnt < 3000; cnt++) { 888 if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0) 889 break; 890 udelay(100); 891 } 892 } 893 894 /* Select RISC module registers. */ 895 WRT_REG_WORD(®->ctrl_status, 0); 896 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ 897 898 /* Reset RISC processor. */ 899 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 900 RD_REG_WORD(®->hccr); /* PCI Posting. */ 901 902 /* Release RISC processor. */ 903 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 904 RD_REG_WORD(®->hccr); /* PCI Posting. */ 905 } 906 907 WRT_REG_WORD(®->hccr, HCCR_CLR_RISC_INT); 908 WRT_REG_WORD(®->hccr, HCCR_CLR_HOST_INT); 909 910 /* Reset ISP chip. */ 911 WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET); 912 913 /* Wait for RISC to recover from reset. */ 914 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 915 /* 916 * It is necessary to for a delay here since the card doesn't 917 * respond to PCI reads during a reset. On some architectures 918 * this will result in an MCA. 919 */ 920 udelay(20); 921 for (cnt = 30000; cnt; cnt--) { 922 if ((RD_REG_WORD(®->ctrl_status) & 923 CSR_ISP_SOFT_RESET) == 0) 924 break; 925 udelay(100); 926 } 927 } else 928 udelay(10); 929 930 /* Reset RISC processor. */ 931 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 932 933 WRT_REG_WORD(®->semaphore, 0); 934 935 /* Release RISC processor. */ 936 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 937 RD_REG_WORD(®->hccr); /* PCI Posting. */ 938 939 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 940 for (cnt = 0; cnt < 30000; cnt++) { 941 if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY) 942 break; 943 944 udelay(100); 945 } 946 } else 947 udelay(100); 948 949 /* Turn on master enable */ 950 cmd |= PCI_COMMAND_MASTER; 951 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); 952 953 /* Disable RISC pause on FPM parity error. */ 954 if (!IS_QLA2100(ha)) { 955 WRT_REG_WORD(®->hccr, HCCR_DISABLE_PARITY_PAUSE); 956 RD_REG_WORD(®->hccr); /* PCI Posting. */ 957 } 958 959 spin_unlock_irqrestore(&ha->hardware_lock, flags); 960 } 961 962 /** 963 * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC. 964 * 965 * Returns 0 on success. 966 */ 967 int 968 qla81xx_reset_mpi(scsi_qla_host_t *vha) 969 { 970 uint16_t mb[4] = {0x1010, 0, 1, 0}; 971 972 return qla81xx_write_mpi_register(vha, mb); 973 } 974 975 /** 976 * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC. 977 * @ha: HA context 978 * 979 * Returns 0 on success. 980 */ 981 static inline void 982 qla24xx_reset_risc(scsi_qla_host_t *vha) 983 { 984 unsigned long flags = 0; 985 struct qla_hw_data *ha = vha->hw; 986 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 987 uint32_t cnt, d2; 988 uint16_t wd; 989 static int abts_cnt; /* ISP abort retry counts */ 990 991 spin_lock_irqsave(&ha->hardware_lock, flags); 992 993 /* Reset RISC. */ 994 WRT_REG_DWORD(®->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); 995 for (cnt = 0; cnt < 30000; cnt++) { 996 if ((RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE) == 0) 997 break; 998 999 udelay(10); 1000 } 1001 1002 WRT_REG_DWORD(®->ctrl_status, 1003 CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); 1004 pci_read_config_word(ha->pdev, PCI_COMMAND, &wd); 1005 1006 udelay(100); 1007 /* Wait for firmware to complete NVRAM accesses. */ 1008 d2 = (uint32_t) RD_REG_WORD(®->mailbox0); 1009 for (cnt = 10000 ; cnt && d2; cnt--) { 1010 udelay(5); 1011 d2 = (uint32_t) RD_REG_WORD(®->mailbox0); 1012 barrier(); 1013 } 1014 1015 /* Wait for soft-reset to complete. */ 1016 d2 = RD_REG_DWORD(®->ctrl_status); 1017 for (cnt = 6000000 ; cnt && (d2 & CSRX_ISP_SOFT_RESET); cnt--) { 1018 udelay(5); 1019 d2 = RD_REG_DWORD(®->ctrl_status); 1020 barrier(); 1021 } 1022 1023 /* If required, do an MPI FW reset now */ 1024 if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) { 1025 if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) { 1026 if (++abts_cnt < 5) { 1027 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 1028 set_bit(MPI_RESET_NEEDED, &vha->dpc_flags); 1029 } else { 1030 /* 1031 * We exhausted the ISP abort retries. We have to 1032 * set the board offline. 1033 */ 1034 abts_cnt = 0; 1035 vha->flags.online = 0; 1036 } 1037 } 1038 } 1039 1040 WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET); 1041 RD_REG_DWORD(®->hccr); 1042 1043 WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE); 1044 RD_REG_DWORD(®->hccr); 1045 1046 WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_RESET); 1047 RD_REG_DWORD(®->hccr); 1048 1049 d2 = (uint32_t) RD_REG_WORD(®->mailbox0); 1050 for (cnt = 6000000 ; cnt && d2; cnt--) { 1051 udelay(5); 1052 d2 = (uint32_t) RD_REG_WORD(®->mailbox0); 1053 barrier(); 1054 } 1055 1056 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1057 1058 if (IS_NOPOLLING_TYPE(ha)) 1059 ha->isp_ops->enable_intrs(ha); 1060 } 1061 1062 /** 1063 * qla24xx_reset_chip() - Reset ISP24xx chip. 1064 * @ha: HA context 1065 * 1066 * Returns 0 on success. 1067 */ 1068 void 1069 qla24xx_reset_chip(scsi_qla_host_t *vha) 1070 { 1071 struct qla_hw_data *ha = vha->hw; 1072 1073 if (pci_channel_offline(ha->pdev) && 1074 ha->flags.pci_channel_io_perm_failure) { 1075 return; 1076 } 1077 1078 ha->isp_ops->disable_intrs(ha); 1079 1080 /* Perform RISC reset. */ 1081 qla24xx_reset_risc(vha); 1082 } 1083 1084 /** 1085 * qla2x00_chip_diag() - Test chip for proper operation. 1086 * @ha: HA context 1087 * 1088 * Returns 0 on success. 1089 */ 1090 int 1091 qla2x00_chip_diag(scsi_qla_host_t *vha) 1092 { 1093 int rval; 1094 struct qla_hw_data *ha = vha->hw; 1095 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 1096 unsigned long flags = 0; 1097 uint16_t data; 1098 uint32_t cnt; 1099 uint16_t mb[5]; 1100 struct req_que *req = ha->req_q_map[0]; 1101 1102 /* Assume a failed state */ 1103 rval = QLA_FUNCTION_FAILED; 1104 1105 ql_dbg(ql_dbg_init, vha, 0x007b, 1106 "Testing device at %lx.\n", (u_long)®->flash_address); 1107 1108 spin_lock_irqsave(&ha->hardware_lock, flags); 1109 1110 /* Reset ISP chip. */ 1111 WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET); 1112 1113 /* 1114 * We need to have a delay here since the card will not respond while 1115 * in reset causing an MCA on some architectures. 1116 */ 1117 udelay(20); 1118 data = qla2x00_debounce_register(®->ctrl_status); 1119 for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) { 1120 udelay(5); 1121 data = RD_REG_WORD(®->ctrl_status); 1122 barrier(); 1123 } 1124 1125 if (!cnt) 1126 goto chip_diag_failed; 1127 1128 ql_dbg(ql_dbg_init, vha, 0x007c, 1129 "Reset register cleared by chip reset.\n"); 1130 1131 /* Reset RISC processor. */ 1132 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 1133 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 1134 1135 /* Workaround for QLA2312 PCI parity error */ 1136 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 1137 data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0)); 1138 for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) { 1139 udelay(5); 1140 data = RD_MAILBOX_REG(ha, reg, 0); 1141 barrier(); 1142 } 1143 } else 1144 udelay(10); 1145 1146 if (!cnt) 1147 goto chip_diag_failed; 1148 1149 /* Check product ID of chip */ 1150 ql_dbg(ql_dbg_init, vha, 0x007d, "Checking product Id of chip.\n"); 1151 1152 mb[1] = RD_MAILBOX_REG(ha, reg, 1); 1153 mb[2] = RD_MAILBOX_REG(ha, reg, 2); 1154 mb[3] = RD_MAILBOX_REG(ha, reg, 3); 1155 mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4)); 1156 if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) || 1157 mb[3] != PROD_ID_3) { 1158 ql_log(ql_log_warn, vha, 0x0062, 1159 "Wrong product ID = 0x%x,0x%x,0x%x.\n", 1160 mb[1], mb[2], mb[3]); 1161 1162 goto chip_diag_failed; 1163 } 1164 ha->product_id[0] = mb[1]; 1165 ha->product_id[1] = mb[2]; 1166 ha->product_id[2] = mb[3]; 1167 ha->product_id[3] = mb[4]; 1168 1169 /* Adjust fw RISC transfer size */ 1170 if (req->length > 1024) 1171 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024; 1172 else 1173 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1174 req->length; 1175 1176 if (IS_QLA2200(ha) && 1177 RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) { 1178 /* Limit firmware transfer size with a 2200A */ 1179 ql_dbg(ql_dbg_init, vha, 0x007e, "Found QLA2200A Chip.\n"); 1180 1181 ha->device_type |= DT_ISP2200A; 1182 ha->fw_transfer_size = 128; 1183 } 1184 1185 /* Wrap Incoming Mailboxes Test. */ 1186 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1187 1188 ql_dbg(ql_dbg_init, vha, 0x007f, "Checking mailboxes.\n"); 1189 rval = qla2x00_mbx_reg_test(vha); 1190 if (rval) 1191 ql_log(ql_log_warn, vha, 0x0080, 1192 "Failed mailbox send register test.\n"); 1193 else 1194 /* Flag a successful rval */ 1195 rval = QLA_SUCCESS; 1196 spin_lock_irqsave(&ha->hardware_lock, flags); 1197 1198 chip_diag_failed: 1199 if (rval) 1200 ql_log(ql_log_info, vha, 0x0081, 1201 "Chip diagnostics **** FAILED ****.\n"); 1202 1203 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1204 1205 return (rval); 1206 } 1207 1208 /** 1209 * qla24xx_chip_diag() - Test ISP24xx for proper operation. 1210 * @ha: HA context 1211 * 1212 * Returns 0 on success. 1213 */ 1214 int 1215 qla24xx_chip_diag(scsi_qla_host_t *vha) 1216 { 1217 int rval; 1218 struct qla_hw_data *ha = vha->hw; 1219 struct req_que *req = ha->req_q_map[0]; 1220 1221 if (IS_QLA82XX(ha)) 1222 return QLA_SUCCESS; 1223 1224 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length; 1225 1226 rval = qla2x00_mbx_reg_test(vha); 1227 if (rval) { 1228 ql_log(ql_log_warn, vha, 0x0082, 1229 "Failed mailbox send register test.\n"); 1230 } else { 1231 /* Flag a successful rval */ 1232 rval = QLA_SUCCESS; 1233 } 1234 1235 return rval; 1236 } 1237 1238 void 1239 qla2x00_alloc_fw_dump(scsi_qla_host_t *vha) 1240 { 1241 int rval; 1242 uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size, 1243 eft_size, fce_size, mq_size; 1244 dma_addr_t tc_dma; 1245 void *tc; 1246 struct qla_hw_data *ha = vha->hw; 1247 struct req_que *req = ha->req_q_map[0]; 1248 struct rsp_que *rsp = ha->rsp_q_map[0]; 1249 1250 if (ha->fw_dump) { 1251 ql_dbg(ql_dbg_init, vha, 0x00bd, 1252 "Firmware dump already allocated.\n"); 1253 return; 1254 } 1255 1256 ha->fw_dumped = 0; 1257 fixed_size = mem_size = eft_size = fce_size = mq_size = 0; 1258 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { 1259 fixed_size = sizeof(struct qla2100_fw_dump); 1260 } else if (IS_QLA23XX(ha)) { 1261 fixed_size = offsetof(struct qla2300_fw_dump, data_ram); 1262 mem_size = (ha->fw_memory_size - 0x11000 + 1) * 1263 sizeof(uint16_t); 1264 } else if (IS_FWI2_CAPABLE(ha)) { 1265 if (IS_QLA81XX(ha)) 1266 fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem); 1267 else if (IS_QLA25XX(ha)) 1268 fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem); 1269 else 1270 fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem); 1271 mem_size = (ha->fw_memory_size - 0x100000 + 1) * 1272 sizeof(uint32_t); 1273 if (ha->mqenable) 1274 mq_size = sizeof(struct qla2xxx_mq_chain); 1275 /* Allocate memory for Fibre Channel Event Buffer. */ 1276 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)) 1277 goto try_eft; 1278 1279 tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma, 1280 GFP_KERNEL); 1281 if (!tc) { 1282 ql_log(ql_log_warn, vha, 0x00be, 1283 "Unable to allocate (%d KB) for FCE.\n", 1284 FCE_SIZE / 1024); 1285 goto try_eft; 1286 } 1287 1288 memset(tc, 0, FCE_SIZE); 1289 rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS, 1290 ha->fce_mb, &ha->fce_bufs); 1291 if (rval) { 1292 ql_log(ql_log_warn, vha, 0x00bf, 1293 "Unable to initialize FCE (%d).\n", rval); 1294 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc, 1295 tc_dma); 1296 ha->flags.fce_enabled = 0; 1297 goto try_eft; 1298 } 1299 ql_dbg(ql_dbg_init, vha, 0x00c0, 1300 "Allocate (%d KB) for FCE...\n", FCE_SIZE / 1024); 1301 1302 fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE; 1303 ha->flags.fce_enabled = 1; 1304 ha->fce_dma = tc_dma; 1305 ha->fce = tc; 1306 try_eft: 1307 /* Allocate memory for Extended Trace Buffer. */ 1308 tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma, 1309 GFP_KERNEL); 1310 if (!tc) { 1311 ql_log(ql_log_warn, vha, 0x00c1, 1312 "Unable to allocate (%d KB) for EFT.\n", 1313 EFT_SIZE / 1024); 1314 goto cont_alloc; 1315 } 1316 1317 memset(tc, 0, EFT_SIZE); 1318 rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS); 1319 if (rval) { 1320 ql_log(ql_log_warn, vha, 0x00c2, 1321 "Unable to initialize EFT (%d).\n", rval); 1322 dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc, 1323 tc_dma); 1324 goto cont_alloc; 1325 } 1326 ql_dbg(ql_dbg_init, vha, 0x00c3, 1327 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024); 1328 1329 eft_size = EFT_SIZE; 1330 ha->eft_dma = tc_dma; 1331 ha->eft = tc; 1332 } 1333 cont_alloc: 1334 req_q_size = req->length * sizeof(request_t); 1335 rsp_q_size = rsp->length * sizeof(response_t); 1336 1337 dump_size = offsetof(struct qla2xxx_fw_dump, isp); 1338 dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size; 1339 ha->chain_offset = dump_size; 1340 dump_size += mq_size + fce_size; 1341 1342 ha->fw_dump = vmalloc(dump_size); 1343 if (!ha->fw_dump) { 1344 ql_log(ql_log_warn, vha, 0x00c4, 1345 "Unable to allocate (%d KB) for firmware dump.\n", 1346 dump_size / 1024); 1347 1348 if (ha->fce) { 1349 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, ha->fce, 1350 ha->fce_dma); 1351 ha->fce = NULL; 1352 ha->fce_dma = 0; 1353 } 1354 1355 if (ha->eft) { 1356 dma_free_coherent(&ha->pdev->dev, eft_size, ha->eft, 1357 ha->eft_dma); 1358 ha->eft = NULL; 1359 ha->eft_dma = 0; 1360 } 1361 return; 1362 } 1363 ql_dbg(ql_dbg_init, vha, 0x00c5, 1364 "Allocated (%d KB) for firmware dump.\n", dump_size / 1024); 1365 1366 ha->fw_dump_len = dump_size; 1367 ha->fw_dump->signature[0] = 'Q'; 1368 ha->fw_dump->signature[1] = 'L'; 1369 ha->fw_dump->signature[2] = 'G'; 1370 ha->fw_dump->signature[3] = 'C'; 1371 ha->fw_dump->version = __constant_htonl(1); 1372 1373 ha->fw_dump->fixed_size = htonl(fixed_size); 1374 ha->fw_dump->mem_size = htonl(mem_size); 1375 ha->fw_dump->req_q_size = htonl(req_q_size); 1376 ha->fw_dump->rsp_q_size = htonl(rsp_q_size); 1377 1378 ha->fw_dump->eft_size = htonl(eft_size); 1379 ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma)); 1380 ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma)); 1381 1382 ha->fw_dump->header_size = 1383 htonl(offsetof(struct qla2xxx_fw_dump, isp)); 1384 } 1385 1386 static int 1387 qla81xx_mpi_sync(scsi_qla_host_t *vha) 1388 { 1389 #define MPS_MASK 0xe0 1390 int rval; 1391 uint16_t dc; 1392 uint32_t dw; 1393 1394 if (!IS_QLA81XX(vha->hw)) 1395 return QLA_SUCCESS; 1396 1397 rval = qla2x00_write_ram_word(vha, 0x7c00, 1); 1398 if (rval != QLA_SUCCESS) { 1399 ql_log(ql_log_warn, vha, 0x0105, 1400 "Unable to acquire semaphore.\n"); 1401 goto done; 1402 } 1403 1404 pci_read_config_word(vha->hw->pdev, 0x54, &dc); 1405 rval = qla2x00_read_ram_word(vha, 0x7a15, &dw); 1406 if (rval != QLA_SUCCESS) { 1407 ql_log(ql_log_warn, vha, 0x0067, "Unable to read sync.\n"); 1408 goto done_release; 1409 } 1410 1411 dc &= MPS_MASK; 1412 if (dc == (dw & MPS_MASK)) 1413 goto done_release; 1414 1415 dw &= ~MPS_MASK; 1416 dw |= dc; 1417 rval = qla2x00_write_ram_word(vha, 0x7a15, dw); 1418 if (rval != QLA_SUCCESS) { 1419 ql_log(ql_log_warn, vha, 0x0114, "Unable to gain sync.\n"); 1420 } 1421 1422 done_release: 1423 rval = qla2x00_write_ram_word(vha, 0x7c00, 0); 1424 if (rval != QLA_SUCCESS) { 1425 ql_log(ql_log_warn, vha, 0x006d, 1426 "Unable to release semaphore.\n"); 1427 } 1428 1429 done: 1430 return rval; 1431 } 1432 1433 /** 1434 * qla2x00_setup_chip() - Load and start RISC firmware. 1435 * @ha: HA context 1436 * 1437 * Returns 0 on success. 1438 */ 1439 static int 1440 qla2x00_setup_chip(scsi_qla_host_t *vha) 1441 { 1442 int rval; 1443 uint32_t srisc_address = 0; 1444 struct qla_hw_data *ha = vha->hw; 1445 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 1446 unsigned long flags; 1447 uint16_t fw_major_version; 1448 1449 if (IS_QLA82XX(ha)) { 1450 rval = ha->isp_ops->load_risc(vha, &srisc_address); 1451 if (rval == QLA_SUCCESS) { 1452 qla2x00_stop_firmware(vha); 1453 goto enable_82xx_npiv; 1454 } else 1455 goto failed; 1456 } 1457 1458 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { 1459 /* Disable SRAM, Instruction RAM and GP RAM parity. */ 1460 spin_lock_irqsave(&ha->hardware_lock, flags); 1461 WRT_REG_WORD(®->hccr, (HCCR_ENABLE_PARITY + 0x0)); 1462 RD_REG_WORD(®->hccr); 1463 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1464 } 1465 1466 qla81xx_mpi_sync(vha); 1467 1468 /* Load firmware sequences */ 1469 rval = ha->isp_ops->load_risc(vha, &srisc_address); 1470 if (rval == QLA_SUCCESS) { 1471 ql_dbg(ql_dbg_init, vha, 0x00c9, 1472 "Verifying Checksum of loaded RISC code.\n"); 1473 1474 rval = qla2x00_verify_checksum(vha, srisc_address); 1475 if (rval == QLA_SUCCESS) { 1476 /* Start firmware execution. */ 1477 ql_dbg(ql_dbg_init, vha, 0x00ca, 1478 "Starting firmware.\n"); 1479 1480 rval = qla2x00_execute_fw(vha, srisc_address); 1481 /* Retrieve firmware information. */ 1482 if (rval == QLA_SUCCESS) { 1483 enable_82xx_npiv: 1484 fw_major_version = ha->fw_major_version; 1485 if (IS_QLA82XX(ha)) 1486 qla82xx_check_md_needed(vha); 1487 else { 1488 rval = qla2x00_get_fw_version(vha, 1489 &ha->fw_major_version, 1490 &ha->fw_minor_version, 1491 &ha->fw_subminor_version, 1492 &ha->fw_attributes, 1493 &ha->fw_memory_size, 1494 ha->mpi_version, 1495 &ha->mpi_capabilities, 1496 ha->phy_version); 1497 } 1498 if (rval != QLA_SUCCESS) 1499 goto failed; 1500 ha->flags.npiv_supported = 0; 1501 if (IS_QLA2XXX_MIDTYPE(ha) && 1502 (ha->fw_attributes & BIT_2)) { 1503 ha->flags.npiv_supported = 1; 1504 if ((!ha->max_npiv_vports) || 1505 ((ha->max_npiv_vports + 1) % 1506 MIN_MULTI_ID_FABRIC)) 1507 ha->max_npiv_vports = 1508 MIN_MULTI_ID_FABRIC - 1; 1509 } 1510 qla2x00_get_resource_cnts(vha, NULL, 1511 &ha->fw_xcb_count, NULL, NULL, 1512 &ha->max_npiv_vports, NULL); 1513 1514 if (!fw_major_version && ql2xallocfwdump 1515 && !IS_QLA82XX(ha)) 1516 qla2x00_alloc_fw_dump(vha); 1517 } 1518 } else { 1519 ql_log(ql_log_fatal, vha, 0x00cd, 1520 "ISP Firmware failed checksum.\n"); 1521 goto failed; 1522 } 1523 } 1524 1525 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { 1526 /* Enable proper parity. */ 1527 spin_lock_irqsave(&ha->hardware_lock, flags); 1528 if (IS_QLA2300(ha)) 1529 /* SRAM parity */ 1530 WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x1); 1531 else 1532 /* SRAM, Instruction RAM and GP RAM parity */ 1533 WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x7); 1534 RD_REG_WORD(®->hccr); 1535 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1536 } 1537 1538 if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) { 1539 uint32_t size; 1540 1541 rval = qla81xx_fac_get_sector_size(vha, &size); 1542 if (rval == QLA_SUCCESS) { 1543 ha->flags.fac_supported = 1; 1544 ha->fdt_block_size = size << 2; 1545 } else { 1546 ql_log(ql_log_warn, vha, 0x00ce, 1547 "Unsupported FAC firmware (%d.%02d.%02d).\n", 1548 ha->fw_major_version, ha->fw_minor_version, 1549 ha->fw_subminor_version); 1550 } 1551 } 1552 failed: 1553 if (rval) { 1554 ql_log(ql_log_fatal, vha, 0x00cf, 1555 "Setup chip ****FAILED****.\n"); 1556 } 1557 1558 return (rval); 1559 } 1560 1561 /** 1562 * qla2x00_init_response_q_entries() - Initializes response queue entries. 1563 * @ha: HA context 1564 * 1565 * Beginning of request ring has initialization control block already built 1566 * by nvram config routine. 1567 * 1568 * Returns 0 on success. 1569 */ 1570 void 1571 qla2x00_init_response_q_entries(struct rsp_que *rsp) 1572 { 1573 uint16_t cnt; 1574 response_t *pkt; 1575 1576 rsp->ring_ptr = rsp->ring; 1577 rsp->ring_index = 0; 1578 rsp->status_srb = NULL; 1579 pkt = rsp->ring_ptr; 1580 for (cnt = 0; cnt < rsp->length; cnt++) { 1581 pkt->signature = RESPONSE_PROCESSED; 1582 pkt++; 1583 } 1584 } 1585 1586 /** 1587 * qla2x00_update_fw_options() - Read and process firmware options. 1588 * @ha: HA context 1589 * 1590 * Returns 0 on success. 1591 */ 1592 void 1593 qla2x00_update_fw_options(scsi_qla_host_t *vha) 1594 { 1595 uint16_t swing, emphasis, tx_sens, rx_sens; 1596 struct qla_hw_data *ha = vha->hw; 1597 1598 memset(ha->fw_options, 0, sizeof(ha->fw_options)); 1599 qla2x00_get_fw_options(vha, ha->fw_options); 1600 1601 if (IS_QLA2100(ha) || IS_QLA2200(ha)) 1602 return; 1603 1604 /* Serial Link options. */ 1605 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115, 1606 "Serial link options.\n"); 1607 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109, 1608 (uint8_t *)&ha->fw_seriallink_options, 1609 sizeof(ha->fw_seriallink_options)); 1610 1611 ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING; 1612 if (ha->fw_seriallink_options[3] & BIT_2) { 1613 ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING; 1614 1615 /* 1G settings */ 1616 swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0); 1617 emphasis = (ha->fw_seriallink_options[2] & 1618 (BIT_4 | BIT_3)) >> 3; 1619 tx_sens = ha->fw_seriallink_options[0] & 1620 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 1621 rx_sens = (ha->fw_seriallink_options[0] & 1622 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; 1623 ha->fw_options[10] = (emphasis << 14) | (swing << 8); 1624 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { 1625 if (rx_sens == 0x0) 1626 rx_sens = 0x3; 1627 ha->fw_options[10] |= (tx_sens << 4) | rx_sens; 1628 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) 1629 ha->fw_options[10] |= BIT_5 | 1630 ((rx_sens & (BIT_1 | BIT_0)) << 2) | 1631 (tx_sens & (BIT_1 | BIT_0)); 1632 1633 /* 2G settings */ 1634 swing = (ha->fw_seriallink_options[2] & 1635 (BIT_7 | BIT_6 | BIT_5)) >> 5; 1636 emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0); 1637 tx_sens = ha->fw_seriallink_options[1] & 1638 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 1639 rx_sens = (ha->fw_seriallink_options[1] & 1640 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; 1641 ha->fw_options[11] = (emphasis << 14) | (swing << 8); 1642 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { 1643 if (rx_sens == 0x0) 1644 rx_sens = 0x3; 1645 ha->fw_options[11] |= (tx_sens << 4) | rx_sens; 1646 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) 1647 ha->fw_options[11] |= BIT_5 | 1648 ((rx_sens & (BIT_1 | BIT_0)) << 2) | 1649 (tx_sens & (BIT_1 | BIT_0)); 1650 } 1651 1652 /* FCP2 options. */ 1653 /* Return command IOCBs without waiting for an ABTS to complete. */ 1654 ha->fw_options[3] |= BIT_13; 1655 1656 /* LED scheme. */ 1657 if (ha->flags.enable_led_scheme) 1658 ha->fw_options[2] |= BIT_12; 1659 1660 /* Detect ISP6312. */ 1661 if (IS_QLA6312(ha)) 1662 ha->fw_options[2] |= BIT_13; 1663 1664 /* Update firmware options. */ 1665 qla2x00_set_fw_options(vha, ha->fw_options); 1666 } 1667 1668 void 1669 qla24xx_update_fw_options(scsi_qla_host_t *vha) 1670 { 1671 int rval; 1672 struct qla_hw_data *ha = vha->hw; 1673 1674 if (IS_QLA82XX(ha)) 1675 return; 1676 1677 /* Update Serial Link options. */ 1678 if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0) 1679 return; 1680 1681 rval = qla2x00_set_serdes_params(vha, 1682 le16_to_cpu(ha->fw_seriallink_options24[1]), 1683 le16_to_cpu(ha->fw_seriallink_options24[2]), 1684 le16_to_cpu(ha->fw_seriallink_options24[3])); 1685 if (rval != QLA_SUCCESS) { 1686 ql_log(ql_log_warn, vha, 0x0104, 1687 "Unable to update Serial Link options (%x).\n", rval); 1688 } 1689 } 1690 1691 void 1692 qla2x00_config_rings(struct scsi_qla_host *vha) 1693 { 1694 struct qla_hw_data *ha = vha->hw; 1695 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 1696 struct req_que *req = ha->req_q_map[0]; 1697 struct rsp_que *rsp = ha->rsp_q_map[0]; 1698 1699 /* Setup ring parameters in initialization control block. */ 1700 ha->init_cb->request_q_outpointer = __constant_cpu_to_le16(0); 1701 ha->init_cb->response_q_inpointer = __constant_cpu_to_le16(0); 1702 ha->init_cb->request_q_length = cpu_to_le16(req->length); 1703 ha->init_cb->response_q_length = cpu_to_le16(rsp->length); 1704 ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma)); 1705 ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma)); 1706 ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma)); 1707 ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma)); 1708 1709 WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0); 1710 WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0); 1711 WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0); 1712 WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0); 1713 RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */ 1714 } 1715 1716 void 1717 qla24xx_config_rings(struct scsi_qla_host *vha) 1718 { 1719 struct qla_hw_data *ha = vha->hw; 1720 device_reg_t __iomem *reg = ISP_QUE_REG(ha, 0); 1721 struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp; 1722 struct qla_msix_entry *msix; 1723 struct init_cb_24xx *icb; 1724 uint16_t rid = 0; 1725 struct req_que *req = ha->req_q_map[0]; 1726 struct rsp_que *rsp = ha->rsp_q_map[0]; 1727 1728 /* Setup ring parameters in initialization control block. */ 1729 icb = (struct init_cb_24xx *)ha->init_cb; 1730 icb->request_q_outpointer = __constant_cpu_to_le16(0); 1731 icb->response_q_inpointer = __constant_cpu_to_le16(0); 1732 icb->request_q_length = cpu_to_le16(req->length); 1733 icb->response_q_length = cpu_to_le16(rsp->length); 1734 icb->request_q_address[0] = cpu_to_le32(LSD(req->dma)); 1735 icb->request_q_address[1] = cpu_to_le32(MSD(req->dma)); 1736 icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma)); 1737 icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma)); 1738 1739 if (ha->mqenable) { 1740 icb->qos = __constant_cpu_to_le16(QLA_DEFAULT_QUE_QOS); 1741 icb->rid = __constant_cpu_to_le16(rid); 1742 if (ha->flags.msix_enabled) { 1743 msix = &ha->msix_entries[1]; 1744 ql_dbg(ql_dbg_init, vha, 0x00fd, 1745 "Registering vector 0x%x for base que.\n", 1746 msix->entry); 1747 icb->msix = cpu_to_le16(msix->entry); 1748 } 1749 /* Use alternate PCI bus number */ 1750 if (MSB(rid)) 1751 icb->firmware_options_2 |= 1752 __constant_cpu_to_le32(BIT_19); 1753 /* Use alternate PCI devfn */ 1754 if (LSB(rid)) 1755 icb->firmware_options_2 |= 1756 __constant_cpu_to_le32(BIT_18); 1757 1758 /* Use Disable MSIX Handshake mode for capable adapters */ 1759 if (IS_MSIX_NACK_CAPABLE(ha)) { 1760 icb->firmware_options_2 &= 1761 __constant_cpu_to_le32(~BIT_22); 1762 ha->flags.disable_msix_handshake = 1; 1763 ql_dbg(ql_dbg_init, vha, 0x00fe, 1764 "MSIX Handshake Disable Mode turned on.\n"); 1765 } else { 1766 icb->firmware_options_2 |= 1767 __constant_cpu_to_le32(BIT_22); 1768 } 1769 icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_23); 1770 1771 WRT_REG_DWORD(®->isp25mq.req_q_in, 0); 1772 WRT_REG_DWORD(®->isp25mq.req_q_out, 0); 1773 WRT_REG_DWORD(®->isp25mq.rsp_q_in, 0); 1774 WRT_REG_DWORD(®->isp25mq.rsp_q_out, 0); 1775 } else { 1776 WRT_REG_DWORD(®->isp24.req_q_in, 0); 1777 WRT_REG_DWORD(®->isp24.req_q_out, 0); 1778 WRT_REG_DWORD(®->isp24.rsp_q_in, 0); 1779 WRT_REG_DWORD(®->isp24.rsp_q_out, 0); 1780 } 1781 /* PCI posting */ 1782 RD_REG_DWORD(&ioreg->hccr); 1783 } 1784 1785 /** 1786 * qla2x00_init_rings() - Initializes firmware. 1787 * @ha: HA context 1788 * 1789 * Beginning of request ring has initialization control block already built 1790 * by nvram config routine. 1791 * 1792 * Returns 0 on success. 1793 */ 1794 static int 1795 qla2x00_init_rings(scsi_qla_host_t *vha) 1796 { 1797 int rval; 1798 unsigned long flags = 0; 1799 int cnt, que; 1800 struct qla_hw_data *ha = vha->hw; 1801 struct req_que *req; 1802 struct rsp_que *rsp; 1803 struct scsi_qla_host *vp; 1804 struct mid_init_cb_24xx *mid_init_cb = 1805 (struct mid_init_cb_24xx *) ha->init_cb; 1806 1807 spin_lock_irqsave(&ha->hardware_lock, flags); 1808 1809 /* Clear outstanding commands array. */ 1810 for (que = 0; que < ha->max_req_queues; que++) { 1811 req = ha->req_q_map[que]; 1812 if (!req) 1813 continue; 1814 for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++) 1815 req->outstanding_cmds[cnt] = NULL; 1816 1817 req->current_outstanding_cmd = 1; 1818 1819 /* Initialize firmware. */ 1820 req->ring_ptr = req->ring; 1821 req->ring_index = 0; 1822 req->cnt = req->length; 1823 } 1824 1825 for (que = 0; que < ha->max_rsp_queues; que++) { 1826 rsp = ha->rsp_q_map[que]; 1827 if (!rsp) 1828 continue; 1829 /* Initialize response queue entries */ 1830 qla2x00_init_response_q_entries(rsp); 1831 } 1832 1833 spin_lock(&ha->vport_slock); 1834 /* Clear RSCN queue. */ 1835 list_for_each_entry(vp, &ha->vp_list, list) { 1836 vp->rscn_in_ptr = 0; 1837 vp->rscn_out_ptr = 0; 1838 } 1839 1840 spin_unlock(&ha->vport_slock); 1841 1842 ha->isp_ops->config_rings(vha); 1843 1844 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1845 1846 /* Update any ISP specific firmware options before initialization. */ 1847 ha->isp_ops->update_fw_options(vha); 1848 1849 ql_dbg(ql_dbg_init, vha, 0x00d1, "Issue init firmware.\n"); 1850 1851 if (ha->flags.npiv_supported) { 1852 if (ha->operating_mode == LOOP) 1853 ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1; 1854 mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports); 1855 } 1856 1857 if (IS_FWI2_CAPABLE(ha)) { 1858 mid_init_cb->options = __constant_cpu_to_le16(BIT_1); 1859 mid_init_cb->init_cb.execution_throttle = 1860 cpu_to_le16(ha->fw_xcb_count); 1861 } 1862 1863 rval = qla2x00_init_firmware(vha, ha->init_cb_size); 1864 if (rval) { 1865 ql_log(ql_log_fatal, vha, 0x00d2, 1866 "Init Firmware **** FAILED ****.\n"); 1867 } else { 1868 ql_dbg(ql_dbg_init, vha, 0x00d3, 1869 "Init Firmware -- success.\n"); 1870 } 1871 1872 return (rval); 1873 } 1874 1875 /** 1876 * qla2x00_fw_ready() - Waits for firmware ready. 1877 * @ha: HA context 1878 * 1879 * Returns 0 on success. 1880 */ 1881 static int 1882 qla2x00_fw_ready(scsi_qla_host_t *vha) 1883 { 1884 int rval; 1885 unsigned long wtime, mtime, cs84xx_time; 1886 uint16_t min_wait; /* Minimum wait time if loop is down */ 1887 uint16_t wait_time; /* Wait time if loop is coming ready */ 1888 uint16_t state[5]; 1889 struct qla_hw_data *ha = vha->hw; 1890 1891 rval = QLA_SUCCESS; 1892 1893 /* 20 seconds for loop down. */ 1894 min_wait = 20; 1895 1896 /* 1897 * Firmware should take at most one RATOV to login, plus 5 seconds for 1898 * our own processing. 1899 */ 1900 if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) { 1901 wait_time = min_wait; 1902 } 1903 1904 /* Min wait time if loop down */ 1905 mtime = jiffies + (min_wait * HZ); 1906 1907 /* wait time before firmware ready */ 1908 wtime = jiffies + (wait_time * HZ); 1909 1910 /* Wait for ISP to finish LIP */ 1911 if (!vha->flags.init_done) 1912 ql_log(ql_log_info, vha, 0x801e, 1913 "Waiting for LIP to complete.\n"); 1914 1915 do { 1916 rval = qla2x00_get_firmware_state(vha, state); 1917 if (rval == QLA_SUCCESS) { 1918 if (state[0] < FSTATE_LOSS_OF_SYNC) { 1919 vha->device_flags &= ~DFLG_NO_CABLE; 1920 } 1921 if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) { 1922 ql_dbg(ql_dbg_taskm, vha, 0x801f, 1923 "fw_state=%x 84xx=%x.\n", state[0], 1924 state[2]); 1925 if ((state[2] & FSTATE_LOGGED_IN) && 1926 (state[2] & FSTATE_WAITING_FOR_VERIFY)) { 1927 ql_dbg(ql_dbg_taskm, vha, 0x8028, 1928 "Sending verify iocb.\n"); 1929 1930 cs84xx_time = jiffies; 1931 rval = qla84xx_init_chip(vha); 1932 if (rval != QLA_SUCCESS) { 1933 ql_log(ql_log_warn, 1934 vha, 0x8007, 1935 "Init chip failed.\n"); 1936 break; 1937 } 1938 1939 /* Add time taken to initialize. */ 1940 cs84xx_time = jiffies - cs84xx_time; 1941 wtime += cs84xx_time; 1942 mtime += cs84xx_time; 1943 ql_dbg(ql_dbg_taskm, vha, 0x8008, 1944 "Increasing wait time by %ld. " 1945 "New time %ld.\n", cs84xx_time, 1946 wtime); 1947 } 1948 } else if (state[0] == FSTATE_READY) { 1949 ql_dbg(ql_dbg_taskm, vha, 0x8037, 1950 "F/W Ready - OK.\n"); 1951 1952 qla2x00_get_retry_cnt(vha, &ha->retry_count, 1953 &ha->login_timeout, &ha->r_a_tov); 1954 1955 rval = QLA_SUCCESS; 1956 break; 1957 } 1958 1959 rval = QLA_FUNCTION_FAILED; 1960 1961 if (atomic_read(&vha->loop_down_timer) && 1962 state[0] != FSTATE_READY) { 1963 /* Loop down. Timeout on min_wait for states 1964 * other than Wait for Login. 1965 */ 1966 if (time_after_eq(jiffies, mtime)) { 1967 ql_log(ql_log_info, vha, 0x8038, 1968 "Cable is unplugged...\n"); 1969 1970 vha->device_flags |= DFLG_NO_CABLE; 1971 break; 1972 } 1973 } 1974 } else { 1975 /* Mailbox cmd failed. Timeout on min_wait. */ 1976 if (time_after_eq(jiffies, mtime) || 1977 ha->flags.isp82xx_fw_hung) 1978 break; 1979 } 1980 1981 if (time_after_eq(jiffies, wtime)) 1982 break; 1983 1984 /* Delay for a while */ 1985 msleep(500); 1986 } while (1); 1987 1988 ql_dbg(ql_dbg_taskm, vha, 0x803a, 1989 "fw_state=%x (%x, %x, %x, %x) " "curr time=%lx.\n", state[0], 1990 state[1], state[2], state[3], state[4], jiffies); 1991 1992 if (rval && !(vha->device_flags & DFLG_NO_CABLE)) { 1993 ql_log(ql_log_warn, vha, 0x803b, 1994 "Firmware ready **** FAILED ****.\n"); 1995 } 1996 1997 return (rval); 1998 } 1999 2000 /* 2001 * qla2x00_configure_hba 2002 * Setup adapter context. 2003 * 2004 * Input: 2005 * ha = adapter state pointer. 2006 * 2007 * Returns: 2008 * 0 = success 2009 * 2010 * Context: 2011 * Kernel context. 2012 */ 2013 static int 2014 qla2x00_configure_hba(scsi_qla_host_t *vha) 2015 { 2016 int rval; 2017 uint16_t loop_id; 2018 uint16_t topo; 2019 uint16_t sw_cap; 2020 uint8_t al_pa; 2021 uint8_t area; 2022 uint8_t domain; 2023 char connect_type[22]; 2024 struct qla_hw_data *ha = vha->hw; 2025 2026 /* Get host addresses. */ 2027 rval = qla2x00_get_adapter_id(vha, 2028 &loop_id, &al_pa, &area, &domain, &topo, &sw_cap); 2029 if (rval != QLA_SUCCESS) { 2030 if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) || 2031 IS_QLA8XXX_TYPE(ha) || 2032 (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) { 2033 ql_dbg(ql_dbg_disc, vha, 0x2008, 2034 "Loop is in a transition state.\n"); 2035 } else { 2036 ql_log(ql_log_warn, vha, 0x2009, 2037 "Unable to get host loop ID.\n"); 2038 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 2039 } 2040 return (rval); 2041 } 2042 2043 if (topo == 4) { 2044 ql_log(ql_log_info, vha, 0x200a, 2045 "Cannot get topology - retrying.\n"); 2046 return (QLA_FUNCTION_FAILED); 2047 } 2048 2049 vha->loop_id = loop_id; 2050 2051 /* initialize */ 2052 ha->min_external_loopid = SNS_FIRST_LOOP_ID; 2053 ha->operating_mode = LOOP; 2054 ha->switch_cap = 0; 2055 2056 switch (topo) { 2057 case 0: 2058 ql_dbg(ql_dbg_disc, vha, 0x200b, "HBA in NL topology.\n"); 2059 ha->current_topology = ISP_CFG_NL; 2060 strcpy(connect_type, "(Loop)"); 2061 break; 2062 2063 case 1: 2064 ql_dbg(ql_dbg_disc, vha, 0x200c, "HBA in FL topology.\n"); 2065 ha->switch_cap = sw_cap; 2066 ha->current_topology = ISP_CFG_FL; 2067 strcpy(connect_type, "(FL_Port)"); 2068 break; 2069 2070 case 2: 2071 ql_dbg(ql_dbg_disc, vha, 0x200d, "HBA in N P2P topology.\n"); 2072 ha->operating_mode = P2P; 2073 ha->current_topology = ISP_CFG_N; 2074 strcpy(connect_type, "(N_Port-to-N_Port)"); 2075 break; 2076 2077 case 3: 2078 ql_dbg(ql_dbg_disc, vha, 0x200e, "HBA in F P2P topology.\n"); 2079 ha->switch_cap = sw_cap; 2080 ha->operating_mode = P2P; 2081 ha->current_topology = ISP_CFG_F; 2082 strcpy(connect_type, "(F_Port)"); 2083 break; 2084 2085 default: 2086 ql_dbg(ql_dbg_disc, vha, 0x200f, 2087 "HBA in unknown topology %x, using NL.\n", topo); 2088 ha->current_topology = ISP_CFG_NL; 2089 strcpy(connect_type, "(Loop)"); 2090 break; 2091 } 2092 2093 /* Save Host port and loop ID. */ 2094 /* byte order - Big Endian */ 2095 vha->d_id.b.domain = domain; 2096 vha->d_id.b.area = area; 2097 vha->d_id.b.al_pa = al_pa; 2098 2099 if (!vha->flags.init_done) 2100 ql_log(ql_log_info, vha, 0x2010, 2101 "Topology - %s, Host Loop address 0x%x.\n", 2102 connect_type, vha->loop_id); 2103 2104 if (rval) { 2105 ql_log(ql_log_warn, vha, 0x2011, 2106 "%s FAILED\n", __func__); 2107 } else { 2108 ql_dbg(ql_dbg_disc, vha, 0x2012, 2109 "%s success\n", __func__); 2110 } 2111 2112 return(rval); 2113 } 2114 2115 inline void 2116 qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len, 2117 char *def) 2118 { 2119 char *st, *en; 2120 uint16_t index; 2121 struct qla_hw_data *ha = vha->hw; 2122 int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) && 2123 !IS_QLA8XXX_TYPE(ha); 2124 2125 if (memcmp(model, BINZERO, len) != 0) { 2126 strncpy(ha->model_number, model, len); 2127 st = en = ha->model_number; 2128 en += len - 1; 2129 while (en > st) { 2130 if (*en != 0x20 && *en != 0x00) 2131 break; 2132 *en-- = '\0'; 2133 } 2134 2135 index = (ha->pdev->subsystem_device & 0xff); 2136 if (use_tbl && 2137 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && 2138 index < QLA_MODEL_NAMES) 2139 strncpy(ha->model_desc, 2140 qla2x00_model_name[index * 2 + 1], 2141 sizeof(ha->model_desc) - 1); 2142 } else { 2143 index = (ha->pdev->subsystem_device & 0xff); 2144 if (use_tbl && 2145 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && 2146 index < QLA_MODEL_NAMES) { 2147 strcpy(ha->model_number, 2148 qla2x00_model_name[index * 2]); 2149 strncpy(ha->model_desc, 2150 qla2x00_model_name[index * 2 + 1], 2151 sizeof(ha->model_desc) - 1); 2152 } else { 2153 strcpy(ha->model_number, def); 2154 } 2155 } 2156 if (IS_FWI2_CAPABLE(ha)) 2157 qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc, 2158 sizeof(ha->model_desc)); 2159 } 2160 2161 /* On sparc systems, obtain port and node WWN from firmware 2162 * properties. 2163 */ 2164 static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv) 2165 { 2166 #ifdef CONFIG_SPARC 2167 struct qla_hw_data *ha = vha->hw; 2168 struct pci_dev *pdev = ha->pdev; 2169 struct device_node *dp = pci_device_to_OF_node(pdev); 2170 const u8 *val; 2171 int len; 2172 2173 val = of_get_property(dp, "port-wwn", &len); 2174 if (val && len >= WWN_SIZE) 2175 memcpy(nv->port_name, val, WWN_SIZE); 2176 2177 val = of_get_property(dp, "node-wwn", &len); 2178 if (val && len >= WWN_SIZE) 2179 memcpy(nv->node_name, val, WWN_SIZE); 2180 #endif 2181 } 2182 2183 /* 2184 * NVRAM configuration for ISP 2xxx 2185 * 2186 * Input: 2187 * ha = adapter block pointer. 2188 * 2189 * Output: 2190 * initialization control block in response_ring 2191 * host adapters parameters in host adapter block 2192 * 2193 * Returns: 2194 * 0 = success. 2195 */ 2196 int 2197 qla2x00_nvram_config(scsi_qla_host_t *vha) 2198 { 2199 int rval; 2200 uint8_t chksum = 0; 2201 uint16_t cnt; 2202 uint8_t *dptr1, *dptr2; 2203 struct qla_hw_data *ha = vha->hw; 2204 init_cb_t *icb = ha->init_cb; 2205 nvram_t *nv = ha->nvram; 2206 uint8_t *ptr = ha->nvram; 2207 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2208 2209 rval = QLA_SUCCESS; 2210 2211 /* Determine NVRAM starting address. */ 2212 ha->nvram_size = sizeof(nvram_t); 2213 ha->nvram_base = 0; 2214 if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha)) 2215 if ((RD_REG_WORD(®->ctrl_status) >> 14) == 1) 2216 ha->nvram_base = 0x80; 2217 2218 /* Get NVRAM data and calculate checksum. */ 2219 ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size); 2220 for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++) 2221 chksum += *ptr++; 2222 2223 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f, 2224 "Contents of NVRAM.\n"); 2225 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110, 2226 (uint8_t *)nv, ha->nvram_size); 2227 2228 /* Bad NVRAM data, set defaults parameters. */ 2229 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || 2230 nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) { 2231 /* Reset NVRAM data. */ 2232 ql_log(ql_log_warn, vha, 0x0064, 2233 "Inconisistent NVRAM " 2234 "detected: checksum=0x%x id=%c version=0x%x.\n", 2235 chksum, nv->id[0], nv->nvram_version); 2236 ql_log(ql_log_warn, vha, 0x0065, 2237 "Falling back to " 2238 "functioning (yet invalid -- WWPN) defaults.\n"); 2239 2240 /* 2241 * Set default initialization control block. 2242 */ 2243 memset(nv, 0, ha->nvram_size); 2244 nv->parameter_block_version = ICB_VERSION; 2245 2246 if (IS_QLA23XX(ha)) { 2247 nv->firmware_options[0] = BIT_2 | BIT_1; 2248 nv->firmware_options[1] = BIT_7 | BIT_5; 2249 nv->add_firmware_options[0] = BIT_5; 2250 nv->add_firmware_options[1] = BIT_5 | BIT_4; 2251 nv->frame_payload_size = __constant_cpu_to_le16(2048); 2252 nv->special_options[1] = BIT_7; 2253 } else if (IS_QLA2200(ha)) { 2254 nv->firmware_options[0] = BIT_2 | BIT_1; 2255 nv->firmware_options[1] = BIT_7 | BIT_5; 2256 nv->add_firmware_options[0] = BIT_5; 2257 nv->add_firmware_options[1] = BIT_5 | BIT_4; 2258 nv->frame_payload_size = __constant_cpu_to_le16(1024); 2259 } else if (IS_QLA2100(ha)) { 2260 nv->firmware_options[0] = BIT_3 | BIT_1; 2261 nv->firmware_options[1] = BIT_5; 2262 nv->frame_payload_size = __constant_cpu_to_le16(1024); 2263 } 2264 2265 nv->max_iocb_allocation = __constant_cpu_to_le16(256); 2266 nv->execution_throttle = __constant_cpu_to_le16(16); 2267 nv->retry_count = 8; 2268 nv->retry_delay = 1; 2269 2270 nv->port_name[0] = 33; 2271 nv->port_name[3] = 224; 2272 nv->port_name[4] = 139; 2273 2274 qla2xxx_nvram_wwn_from_ofw(vha, nv); 2275 2276 nv->login_timeout = 4; 2277 2278 /* 2279 * Set default host adapter parameters 2280 */ 2281 nv->host_p[1] = BIT_2; 2282 nv->reset_delay = 5; 2283 nv->port_down_retry_count = 8; 2284 nv->max_luns_per_target = __constant_cpu_to_le16(8); 2285 nv->link_down_timeout = 60; 2286 2287 rval = 1; 2288 } 2289 2290 #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2) 2291 /* 2292 * The SN2 does not provide BIOS emulation which means you can't change 2293 * potentially bogus BIOS settings. Force the use of default settings 2294 * for link rate and frame size. Hope that the rest of the settings 2295 * are valid. 2296 */ 2297 if (ia64_platform_is("sn2")) { 2298 nv->frame_payload_size = __constant_cpu_to_le16(2048); 2299 if (IS_QLA23XX(ha)) 2300 nv->special_options[1] = BIT_7; 2301 } 2302 #endif 2303 2304 /* Reset Initialization control block */ 2305 memset(icb, 0, ha->init_cb_size); 2306 2307 /* 2308 * Setup driver NVRAM options. 2309 */ 2310 nv->firmware_options[0] |= (BIT_6 | BIT_1); 2311 nv->firmware_options[0] &= ~(BIT_5 | BIT_4); 2312 nv->firmware_options[1] |= (BIT_5 | BIT_0); 2313 nv->firmware_options[1] &= ~BIT_4; 2314 2315 if (IS_QLA23XX(ha)) { 2316 nv->firmware_options[0] |= BIT_2; 2317 nv->firmware_options[0] &= ~BIT_3; 2318 nv->firmware_options[0] &= ~BIT_6; 2319 nv->add_firmware_options[1] |= BIT_5 | BIT_4; 2320 2321 if (IS_QLA2300(ha)) { 2322 if (ha->fb_rev == FPM_2310) { 2323 strcpy(ha->model_number, "QLA2310"); 2324 } else { 2325 strcpy(ha->model_number, "QLA2300"); 2326 } 2327 } else { 2328 qla2x00_set_model_info(vha, nv->model_number, 2329 sizeof(nv->model_number), "QLA23xx"); 2330 } 2331 } else if (IS_QLA2200(ha)) { 2332 nv->firmware_options[0] |= BIT_2; 2333 /* 2334 * 'Point-to-point preferred, else loop' is not a safe 2335 * connection mode setting. 2336 */ 2337 if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) == 2338 (BIT_5 | BIT_4)) { 2339 /* Force 'loop preferred, else point-to-point'. */ 2340 nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4); 2341 nv->add_firmware_options[0] |= BIT_5; 2342 } 2343 strcpy(ha->model_number, "QLA22xx"); 2344 } else /*if (IS_QLA2100(ha))*/ { 2345 strcpy(ha->model_number, "QLA2100"); 2346 } 2347 2348 /* 2349 * Copy over NVRAM RISC parameter block to initialization control block. 2350 */ 2351 dptr1 = (uint8_t *)icb; 2352 dptr2 = (uint8_t *)&nv->parameter_block_version; 2353 cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version; 2354 while (cnt--) 2355 *dptr1++ = *dptr2++; 2356 2357 /* Copy 2nd half. */ 2358 dptr1 = (uint8_t *)icb->add_firmware_options; 2359 cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options; 2360 while (cnt--) 2361 *dptr1++ = *dptr2++; 2362 2363 /* Use alternate WWN? */ 2364 if (nv->host_p[1] & BIT_7) { 2365 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 2366 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 2367 } 2368 2369 /* Prepare nodename */ 2370 if ((icb->firmware_options[1] & BIT_6) == 0) { 2371 /* 2372 * Firmware will apply the following mask if the nodename was 2373 * not provided. 2374 */ 2375 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 2376 icb->node_name[0] &= 0xF0; 2377 } 2378 2379 /* 2380 * Set host adapter parameters. 2381 */ 2382 2383 /* 2384 * BIT_7 in the host-parameters section allows for modification to 2385 * internal driver logging. 2386 */ 2387 if (nv->host_p[0] & BIT_7) 2388 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK; 2389 ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0); 2390 /* Always load RISC code on non ISP2[12]00 chips. */ 2391 if (!IS_QLA2100(ha) && !IS_QLA2200(ha)) 2392 ha->flags.disable_risc_code_load = 0; 2393 ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0); 2394 ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0); 2395 ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0); 2396 ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0; 2397 ha->flags.disable_serdes = 0; 2398 2399 ha->operating_mode = 2400 (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4; 2401 2402 memcpy(ha->fw_seriallink_options, nv->seriallink_options, 2403 sizeof(ha->fw_seriallink_options)); 2404 2405 /* save HBA serial number */ 2406 ha->serial0 = icb->port_name[5]; 2407 ha->serial1 = icb->port_name[6]; 2408 ha->serial2 = icb->port_name[7]; 2409 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 2410 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 2411 2412 icb->execution_throttle = __constant_cpu_to_le16(0xFFFF); 2413 2414 ha->retry_count = nv->retry_count; 2415 2416 /* Set minimum login_timeout to 4 seconds. */ 2417 if (nv->login_timeout != ql2xlogintimeout) 2418 nv->login_timeout = ql2xlogintimeout; 2419 if (nv->login_timeout < 4) 2420 nv->login_timeout = 4; 2421 ha->login_timeout = nv->login_timeout; 2422 icb->login_timeout = nv->login_timeout; 2423 2424 /* Set minimum RATOV to 100 tenths of a second. */ 2425 ha->r_a_tov = 100; 2426 2427 ha->loop_reset_delay = nv->reset_delay; 2428 2429 /* Link Down Timeout = 0: 2430 * 2431 * When Port Down timer expires we will start returning 2432 * I/O's to OS with "DID_NO_CONNECT". 2433 * 2434 * Link Down Timeout != 0: 2435 * 2436 * The driver waits for the link to come up after link down 2437 * before returning I/Os to OS with "DID_NO_CONNECT". 2438 */ 2439 if (nv->link_down_timeout == 0) { 2440 ha->loop_down_abort_time = 2441 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 2442 } else { 2443 ha->link_down_timeout = nv->link_down_timeout; 2444 ha->loop_down_abort_time = 2445 (LOOP_DOWN_TIME - ha->link_down_timeout); 2446 } 2447 2448 /* 2449 * Need enough time to try and get the port back. 2450 */ 2451 ha->port_down_retry_count = nv->port_down_retry_count; 2452 if (qlport_down_retry) 2453 ha->port_down_retry_count = qlport_down_retry; 2454 /* Set login_retry_count */ 2455 ha->login_retry_count = nv->retry_count; 2456 if (ha->port_down_retry_count == nv->port_down_retry_count && 2457 ha->port_down_retry_count > 3) 2458 ha->login_retry_count = ha->port_down_retry_count; 2459 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 2460 ha->login_retry_count = ha->port_down_retry_count; 2461 if (ql2xloginretrycount) 2462 ha->login_retry_count = ql2xloginretrycount; 2463 2464 icb->lun_enables = __constant_cpu_to_le16(0); 2465 icb->command_resource_count = 0; 2466 icb->immediate_notify_resource_count = 0; 2467 icb->timeout = __constant_cpu_to_le16(0); 2468 2469 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { 2470 /* Enable RIO */ 2471 icb->firmware_options[0] &= ~BIT_3; 2472 icb->add_firmware_options[0] &= 2473 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); 2474 icb->add_firmware_options[0] |= BIT_2; 2475 icb->response_accumulation_timer = 3; 2476 icb->interrupt_delay_timer = 5; 2477 2478 vha->flags.process_response_queue = 1; 2479 } else { 2480 /* Enable ZIO. */ 2481 if (!vha->flags.init_done) { 2482 ha->zio_mode = icb->add_firmware_options[0] & 2483 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 2484 ha->zio_timer = icb->interrupt_delay_timer ? 2485 icb->interrupt_delay_timer: 2; 2486 } 2487 icb->add_firmware_options[0] &= 2488 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); 2489 vha->flags.process_response_queue = 0; 2490 if (ha->zio_mode != QLA_ZIO_DISABLED) { 2491 ha->zio_mode = QLA_ZIO_MODE_6; 2492 2493 ql_log(ql_log_info, vha, 0x0068, 2494 "ZIO mode %d enabled; timer delay (%d us).\n", 2495 ha->zio_mode, ha->zio_timer * 100); 2496 2497 icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode; 2498 icb->interrupt_delay_timer = (uint8_t)ha->zio_timer; 2499 vha->flags.process_response_queue = 1; 2500 } 2501 } 2502 2503 if (rval) { 2504 ql_log(ql_log_warn, vha, 0x0069, 2505 "NVRAM configuration failed.\n"); 2506 } 2507 return (rval); 2508 } 2509 2510 static void 2511 qla2x00_rport_del(void *data) 2512 { 2513 fc_port_t *fcport = data; 2514 struct fc_rport *rport; 2515 unsigned long flags; 2516 2517 spin_lock_irqsave(fcport->vha->host->host_lock, flags); 2518 rport = fcport->drport ? fcport->drport: fcport->rport; 2519 fcport->drport = NULL; 2520 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags); 2521 if (rport) 2522 fc_remote_port_delete(rport); 2523 } 2524 2525 /** 2526 * qla2x00_alloc_fcport() - Allocate a generic fcport. 2527 * @ha: HA context 2528 * @flags: allocation flags 2529 * 2530 * Returns a pointer to the allocated fcport, or NULL, if none available. 2531 */ 2532 fc_port_t * 2533 qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags) 2534 { 2535 fc_port_t *fcport; 2536 2537 fcport = kzalloc(sizeof(fc_port_t), flags); 2538 if (!fcport) 2539 return NULL; 2540 2541 /* Setup fcport template structure. */ 2542 fcport->vha = vha; 2543 fcport->vp_idx = vha->vp_idx; 2544 fcport->port_type = FCT_UNKNOWN; 2545 fcport->loop_id = FC_NO_LOOP_ID; 2546 qla2x00_set_fcport_state(fcport, FCS_UNCONFIGURED); 2547 fcport->supported_classes = FC_COS_UNSPECIFIED; 2548 2549 return fcport; 2550 } 2551 2552 /* 2553 * qla2x00_configure_loop 2554 * Updates Fibre Channel Device Database with what is actually on loop. 2555 * 2556 * Input: 2557 * ha = adapter block pointer. 2558 * 2559 * Returns: 2560 * 0 = success. 2561 * 1 = error. 2562 * 2 = database was full and device was not configured. 2563 */ 2564 static int 2565 qla2x00_configure_loop(scsi_qla_host_t *vha) 2566 { 2567 int rval; 2568 unsigned long flags, save_flags; 2569 struct qla_hw_data *ha = vha->hw; 2570 rval = QLA_SUCCESS; 2571 2572 /* Get Initiator ID */ 2573 if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) { 2574 rval = qla2x00_configure_hba(vha); 2575 if (rval != QLA_SUCCESS) { 2576 ql_dbg(ql_dbg_disc, vha, 0x2013, 2577 "Unable to configure HBA.\n"); 2578 return (rval); 2579 } 2580 } 2581 2582 save_flags = flags = vha->dpc_flags; 2583 ql_dbg(ql_dbg_disc, vha, 0x2014, 2584 "Configure loop -- dpc flags = 0x%lx.\n", flags); 2585 2586 /* 2587 * If we have both an RSCN and PORT UPDATE pending then handle them 2588 * both at the same time. 2589 */ 2590 clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 2591 clear_bit(RSCN_UPDATE, &vha->dpc_flags); 2592 2593 qla2x00_get_data_rate(vha); 2594 2595 /* Determine what we need to do */ 2596 if (ha->current_topology == ISP_CFG_FL && 2597 (test_bit(LOCAL_LOOP_UPDATE, &flags))) { 2598 2599 vha->flags.rscn_queue_overflow = 1; 2600 set_bit(RSCN_UPDATE, &flags); 2601 2602 } else if (ha->current_topology == ISP_CFG_F && 2603 (test_bit(LOCAL_LOOP_UPDATE, &flags))) { 2604 2605 vha->flags.rscn_queue_overflow = 1; 2606 set_bit(RSCN_UPDATE, &flags); 2607 clear_bit(LOCAL_LOOP_UPDATE, &flags); 2608 2609 } else if (ha->current_topology == ISP_CFG_N) { 2610 clear_bit(RSCN_UPDATE, &flags); 2611 2612 } else if (!vha->flags.online || 2613 (test_bit(ABORT_ISP_ACTIVE, &flags))) { 2614 2615 vha->flags.rscn_queue_overflow = 1; 2616 set_bit(RSCN_UPDATE, &flags); 2617 set_bit(LOCAL_LOOP_UPDATE, &flags); 2618 } 2619 2620 if (test_bit(LOCAL_LOOP_UPDATE, &flags)) { 2621 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 2622 ql_dbg(ql_dbg_disc, vha, 0x2015, 2623 "Loop resync needed, failing.\n"); 2624 rval = QLA_FUNCTION_FAILED; 2625 } 2626 else 2627 rval = qla2x00_configure_local_loop(vha); 2628 } 2629 2630 if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) { 2631 if (LOOP_TRANSITION(vha)) { 2632 ql_dbg(ql_dbg_disc, vha, 0x201e, 2633 "Needs RSCN update and loop transition.\n"); 2634 rval = QLA_FUNCTION_FAILED; 2635 } 2636 else 2637 rval = qla2x00_configure_fabric(vha); 2638 } 2639 2640 if (rval == QLA_SUCCESS) { 2641 if (atomic_read(&vha->loop_down_timer) || 2642 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 2643 rval = QLA_FUNCTION_FAILED; 2644 } else { 2645 atomic_set(&vha->loop_state, LOOP_READY); 2646 ql_dbg(ql_dbg_disc, vha, 0x2069, 2647 "LOOP READY.\n"); 2648 } 2649 } 2650 2651 if (rval) { 2652 ql_dbg(ql_dbg_disc, vha, 0x206a, 2653 "%s *** FAILED ***.\n", __func__); 2654 } else { 2655 ql_dbg(ql_dbg_disc, vha, 0x206b, 2656 "%s: exiting normally.\n", __func__); 2657 } 2658 2659 /* Restore state if a resync event occurred during processing */ 2660 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 2661 if (test_bit(LOCAL_LOOP_UPDATE, &save_flags)) 2662 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 2663 if (test_bit(RSCN_UPDATE, &save_flags)) { 2664 set_bit(RSCN_UPDATE, &vha->dpc_flags); 2665 if (!IS_ALOGIO_CAPABLE(ha)) 2666 vha->flags.rscn_queue_overflow = 1; 2667 } 2668 } 2669 2670 return (rval); 2671 } 2672 2673 2674 2675 /* 2676 * qla2x00_configure_local_loop 2677 * Updates Fibre Channel Device Database with local loop devices. 2678 * 2679 * Input: 2680 * ha = adapter block pointer. 2681 * 2682 * Returns: 2683 * 0 = success. 2684 */ 2685 static int 2686 qla2x00_configure_local_loop(scsi_qla_host_t *vha) 2687 { 2688 int rval, rval2; 2689 int found_devs; 2690 int found; 2691 fc_port_t *fcport, *new_fcport; 2692 2693 uint16_t index; 2694 uint16_t entries; 2695 char *id_iter; 2696 uint16_t loop_id; 2697 uint8_t domain, area, al_pa; 2698 struct qla_hw_data *ha = vha->hw; 2699 2700 found_devs = 0; 2701 new_fcport = NULL; 2702 entries = MAX_FIBRE_DEVICES; 2703 2704 ql_dbg(ql_dbg_disc, vha, 0x2016, 2705 "Getting FCAL position map.\n"); 2706 if (ql2xextended_error_logging & ql_dbg_disc) 2707 qla2x00_get_fcal_position_map(vha, NULL); 2708 2709 /* Get list of logged in devices. */ 2710 memset(ha->gid_list, 0, GID_LIST_SIZE); 2711 rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma, 2712 &entries); 2713 if (rval != QLA_SUCCESS) 2714 goto cleanup_allocation; 2715 2716 ql_dbg(ql_dbg_disc, vha, 0x2017, 2717 "Entries in ID list (%d).\n", entries); 2718 ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075, 2719 (uint8_t *)ha->gid_list, 2720 entries * sizeof(struct gid_list_info)); 2721 2722 /* Allocate temporary fcport for any new fcports discovered. */ 2723 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 2724 if (new_fcport == NULL) { 2725 ql_log(ql_log_warn, vha, 0x2018, 2726 "Memory allocation failed for fcport.\n"); 2727 rval = QLA_MEMORY_ALLOC_FAILED; 2728 goto cleanup_allocation; 2729 } 2730 new_fcport->flags &= ~FCF_FABRIC_DEVICE; 2731 2732 /* 2733 * Mark local devices that were present with FCF_DEVICE_LOST for now. 2734 */ 2735 list_for_each_entry(fcport, &vha->vp_fcports, list) { 2736 if (atomic_read(&fcport->state) == FCS_ONLINE && 2737 fcport->port_type != FCT_BROADCAST && 2738 (fcport->flags & FCF_FABRIC_DEVICE) == 0) { 2739 2740 ql_dbg(ql_dbg_disc, vha, 0x2019, 2741 "Marking port lost loop_id=0x%04x.\n", 2742 fcport->loop_id); 2743 2744 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST); 2745 } 2746 } 2747 2748 /* Add devices to port list. */ 2749 id_iter = (char *)ha->gid_list; 2750 for (index = 0; index < entries; index++) { 2751 domain = ((struct gid_list_info *)id_iter)->domain; 2752 area = ((struct gid_list_info *)id_iter)->area; 2753 al_pa = ((struct gid_list_info *)id_iter)->al_pa; 2754 if (IS_QLA2100(ha) || IS_QLA2200(ha)) 2755 loop_id = (uint16_t) 2756 ((struct gid_list_info *)id_iter)->loop_id_2100; 2757 else 2758 loop_id = le16_to_cpu( 2759 ((struct gid_list_info *)id_iter)->loop_id); 2760 id_iter += ha->gid_list_info_size; 2761 2762 /* Bypass reserved domain fields. */ 2763 if ((domain & 0xf0) == 0xf0) 2764 continue; 2765 2766 /* Bypass if not same domain and area of adapter. */ 2767 if (area && domain && 2768 (area != vha->d_id.b.area || domain != vha->d_id.b.domain)) 2769 continue; 2770 2771 /* Bypass invalid local loop ID. */ 2772 if (loop_id > LAST_LOCAL_LOOP_ID) 2773 continue; 2774 2775 /* Fill in member data. */ 2776 new_fcport->d_id.b.domain = domain; 2777 new_fcport->d_id.b.area = area; 2778 new_fcport->d_id.b.al_pa = al_pa; 2779 new_fcport->loop_id = loop_id; 2780 new_fcport->vp_idx = vha->vp_idx; 2781 rval2 = qla2x00_get_port_database(vha, new_fcport, 0); 2782 if (rval2 != QLA_SUCCESS) { 2783 ql_dbg(ql_dbg_disc, vha, 0x201a, 2784 "Failed to retrieve fcport information " 2785 "-- get_port_database=%x, loop_id=0x%04x.\n", 2786 rval2, new_fcport->loop_id); 2787 ql_dbg(ql_dbg_disc, vha, 0x201b, 2788 "Scheduling resync.\n"); 2789 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 2790 continue; 2791 } 2792 2793 /* Check for matching device in port list. */ 2794 found = 0; 2795 fcport = NULL; 2796 list_for_each_entry(fcport, &vha->vp_fcports, list) { 2797 if (memcmp(new_fcport->port_name, fcport->port_name, 2798 WWN_SIZE)) 2799 continue; 2800 2801 fcport->flags &= ~FCF_FABRIC_DEVICE; 2802 fcport->loop_id = new_fcport->loop_id; 2803 fcport->port_type = new_fcport->port_type; 2804 fcport->d_id.b24 = new_fcport->d_id.b24; 2805 memcpy(fcport->node_name, new_fcport->node_name, 2806 WWN_SIZE); 2807 2808 found++; 2809 break; 2810 } 2811 2812 if (!found) { 2813 /* New device, add to fcports list. */ 2814 if (vha->vp_idx) { 2815 new_fcport->vha = vha; 2816 new_fcport->vp_idx = vha->vp_idx; 2817 } 2818 list_add_tail(&new_fcport->list, &vha->vp_fcports); 2819 2820 /* Allocate a new replacement fcport. */ 2821 fcport = new_fcport; 2822 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 2823 if (new_fcport == NULL) { 2824 ql_log(ql_log_warn, vha, 0x201c, 2825 "Failed to allocate memory for fcport.\n"); 2826 rval = QLA_MEMORY_ALLOC_FAILED; 2827 goto cleanup_allocation; 2828 } 2829 new_fcport->flags &= ~FCF_FABRIC_DEVICE; 2830 } 2831 2832 /* Base iIDMA settings on HBA port speed. */ 2833 fcport->fp_speed = ha->link_data_rate; 2834 2835 qla2x00_update_fcport(vha, fcport); 2836 2837 found_devs++; 2838 } 2839 2840 cleanup_allocation: 2841 kfree(new_fcport); 2842 2843 if (rval != QLA_SUCCESS) { 2844 ql_dbg(ql_dbg_disc, vha, 0x201d, 2845 "Configure local loop error exit: rval=%x.\n", rval); 2846 } 2847 2848 return (rval); 2849 } 2850 2851 static void 2852 qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) 2853 { 2854 #define LS_UNKNOWN 2 2855 static char *link_speeds[] = { "1", "2", "?", "4", "8", "10" }; 2856 char *link_speed; 2857 int rval; 2858 uint16_t mb[4]; 2859 struct qla_hw_data *ha = vha->hw; 2860 2861 if (!IS_IIDMA_CAPABLE(ha)) 2862 return; 2863 2864 if (atomic_read(&fcport->state) != FCS_ONLINE) 2865 return; 2866 2867 if (fcport->fp_speed == PORT_SPEED_UNKNOWN || 2868 fcport->fp_speed > ha->link_data_rate) 2869 return; 2870 2871 rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed, 2872 mb); 2873 if (rval != QLA_SUCCESS) { 2874 ql_dbg(ql_dbg_disc, vha, 0x2004, 2875 "Unable to adjust iIDMA " 2876 "%02x%02x%02x%02x%02x%02x%02x%02x -- %04x %x %04x " 2877 "%04x.\n", fcport->port_name[0], fcport->port_name[1], 2878 fcport->port_name[2], fcport->port_name[3], 2879 fcport->port_name[4], fcport->port_name[5], 2880 fcport->port_name[6], fcport->port_name[7], rval, 2881 fcport->fp_speed, mb[0], mb[1]); 2882 } else { 2883 link_speed = link_speeds[LS_UNKNOWN]; 2884 if (fcport->fp_speed < 5) 2885 link_speed = link_speeds[fcport->fp_speed]; 2886 else if (fcport->fp_speed == 0x13) 2887 link_speed = link_speeds[5]; 2888 ql_dbg(ql_dbg_disc, vha, 0x2005, 2889 "iIDMA adjusted to %s GB/s " 2890 "on %02x%02x%02x%02x%02x%02x%02x%02x.\n", link_speed, 2891 fcport->port_name[0], fcport->port_name[1], 2892 fcport->port_name[2], fcport->port_name[3], 2893 fcport->port_name[4], fcport->port_name[5], 2894 fcport->port_name[6], fcport->port_name[7]); 2895 } 2896 } 2897 2898 static void 2899 qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport) 2900 { 2901 struct fc_rport_identifiers rport_ids; 2902 struct fc_rport *rport; 2903 unsigned long flags; 2904 2905 qla2x00_rport_del(fcport); 2906 2907 rport_ids.node_name = wwn_to_u64(fcport->node_name); 2908 rport_ids.port_name = wwn_to_u64(fcport->port_name); 2909 rport_ids.port_id = fcport->d_id.b.domain << 16 | 2910 fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa; 2911 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; 2912 fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids); 2913 if (!rport) { 2914 ql_log(ql_log_warn, vha, 0x2006, 2915 "Unable to allocate fc remote port.\n"); 2916 return; 2917 } 2918 spin_lock_irqsave(fcport->vha->host->host_lock, flags); 2919 *((fc_port_t **)rport->dd_data) = fcport; 2920 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags); 2921 2922 rport->supported_classes = fcport->supported_classes; 2923 2924 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; 2925 if (fcport->port_type == FCT_INITIATOR) 2926 rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR; 2927 if (fcport->port_type == FCT_TARGET) 2928 rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET; 2929 fc_remote_port_rolechg(rport, rport_ids.roles); 2930 } 2931 2932 /* 2933 * qla2x00_update_fcport 2934 * Updates device on list. 2935 * 2936 * Input: 2937 * ha = adapter block pointer. 2938 * fcport = port structure pointer. 2939 * 2940 * Return: 2941 * 0 - Success 2942 * BIT_0 - error 2943 * 2944 * Context: 2945 * Kernel context. 2946 */ 2947 void 2948 qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) 2949 { 2950 fcport->vha = vha; 2951 fcport->login_retry = 0; 2952 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 2953 2954 qla2x00_iidma_fcport(vha, fcport); 2955 qla24xx_update_fcport_fcp_prio(vha, fcport); 2956 qla2x00_reg_remote_port(vha, fcport); 2957 qla2x00_set_fcport_state(fcport, FCS_ONLINE); 2958 } 2959 2960 /* 2961 * qla2x00_configure_fabric 2962 * Setup SNS devices with loop ID's. 2963 * 2964 * Input: 2965 * ha = adapter block pointer. 2966 * 2967 * Returns: 2968 * 0 = success. 2969 * BIT_0 = error 2970 */ 2971 static int 2972 qla2x00_configure_fabric(scsi_qla_host_t *vha) 2973 { 2974 int rval, rval2; 2975 fc_port_t *fcport, *fcptemp; 2976 uint16_t next_loopid; 2977 uint16_t mb[MAILBOX_REGISTER_COUNT]; 2978 uint16_t loop_id; 2979 LIST_HEAD(new_fcports); 2980 struct qla_hw_data *ha = vha->hw; 2981 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 2982 2983 /* If FL port exists, then SNS is present */ 2984 if (IS_FWI2_CAPABLE(ha)) 2985 loop_id = NPH_F_PORT; 2986 else 2987 loop_id = SNS_FL_PORT; 2988 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1); 2989 if (rval != QLA_SUCCESS) { 2990 ql_dbg(ql_dbg_disc, vha, 0x201f, 2991 "MBX_GET_PORT_NAME failed, No FL Port.\n"); 2992 2993 vha->device_flags &= ~SWITCH_FOUND; 2994 return (QLA_SUCCESS); 2995 } 2996 vha->device_flags |= SWITCH_FOUND; 2997 2998 /* Mark devices that need re-synchronization. */ 2999 rval2 = qla2x00_device_resync(vha); 3000 if (rval2 == QLA_RSCNS_HANDLED) { 3001 /* No point doing the scan, just continue. */ 3002 return (QLA_SUCCESS); 3003 } 3004 do { 3005 /* FDMI support. */ 3006 if (ql2xfdmienable && 3007 test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags)) 3008 qla2x00_fdmi_register(vha); 3009 3010 /* Ensure we are logged into the SNS. */ 3011 if (IS_FWI2_CAPABLE(ha)) 3012 loop_id = NPH_SNS; 3013 else 3014 loop_id = SIMPLE_NAME_SERVER; 3015 ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff, 3016 0xfc, mb, BIT_1 | BIT_0); 3017 if (mb[0] != MBS_COMMAND_COMPLETE) { 3018 ql_dbg(ql_dbg_disc, vha, 0x2042, 3019 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x " 3020 "mb[6]=%x mb[7]=%x.\n", loop_id, mb[0], mb[1], 3021 mb[2], mb[6], mb[7]); 3022 return (QLA_SUCCESS); 3023 } 3024 3025 if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) { 3026 if (qla2x00_rft_id(vha)) { 3027 /* EMPTY */ 3028 ql_dbg(ql_dbg_disc, vha, 0x2045, 3029 "Register FC-4 TYPE failed.\n"); 3030 } 3031 if (qla2x00_rff_id(vha)) { 3032 /* EMPTY */ 3033 ql_dbg(ql_dbg_disc, vha, 0x2049, 3034 "Register FC-4 Features failed.\n"); 3035 } 3036 if (qla2x00_rnn_id(vha)) { 3037 /* EMPTY */ 3038 ql_dbg(ql_dbg_disc, vha, 0x204f, 3039 "Register Node Name failed.\n"); 3040 } else if (qla2x00_rsnn_nn(vha)) { 3041 /* EMPTY */ 3042 ql_dbg(ql_dbg_disc, vha, 0x2053, 3043 "Register Symobilic Node Name failed.\n"); 3044 } 3045 } 3046 3047 rval = qla2x00_find_all_fabric_devs(vha, &new_fcports); 3048 if (rval != QLA_SUCCESS) 3049 break; 3050 3051 /* 3052 * Logout all previous fabric devices marked lost, except 3053 * FCP2 devices. 3054 */ 3055 list_for_each_entry(fcport, &vha->vp_fcports, list) { 3056 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 3057 break; 3058 3059 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) 3060 continue; 3061 3062 if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) { 3063 qla2x00_mark_device_lost(vha, fcport, 3064 ql2xplogiabsentdevice, 0); 3065 if (fcport->loop_id != FC_NO_LOOP_ID && 3066 (fcport->flags & FCF_FCP2_DEVICE) == 0 && 3067 fcport->port_type != FCT_INITIATOR && 3068 fcport->port_type != FCT_BROADCAST) { 3069 ha->isp_ops->fabric_logout(vha, 3070 fcport->loop_id, 3071 fcport->d_id.b.domain, 3072 fcport->d_id.b.area, 3073 fcport->d_id.b.al_pa); 3074 fcport->loop_id = FC_NO_LOOP_ID; 3075 } 3076 } 3077 } 3078 3079 /* Starting free loop ID. */ 3080 next_loopid = ha->min_external_loopid; 3081 3082 /* 3083 * Scan through our port list and login entries that need to be 3084 * logged in. 3085 */ 3086 list_for_each_entry(fcport, &vha->vp_fcports, list) { 3087 if (atomic_read(&vha->loop_down_timer) || 3088 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 3089 break; 3090 3091 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 || 3092 (fcport->flags & FCF_LOGIN_NEEDED) == 0) 3093 continue; 3094 3095 if (fcport->loop_id == FC_NO_LOOP_ID) { 3096 fcport->loop_id = next_loopid; 3097 rval = qla2x00_find_new_loop_id( 3098 base_vha, fcport); 3099 if (rval != QLA_SUCCESS) { 3100 /* Ran out of IDs to use */ 3101 break; 3102 } 3103 } 3104 /* Login and update database */ 3105 qla2x00_fabric_dev_login(vha, fcport, &next_loopid); 3106 } 3107 3108 /* Exit if out of loop IDs. */ 3109 if (rval != QLA_SUCCESS) { 3110 break; 3111 } 3112 3113 /* 3114 * Login and add the new devices to our port list. 3115 */ 3116 list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) { 3117 if (atomic_read(&vha->loop_down_timer) || 3118 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 3119 break; 3120 3121 /* Find a new loop ID to use. */ 3122 fcport->loop_id = next_loopid; 3123 rval = qla2x00_find_new_loop_id(base_vha, fcport); 3124 if (rval != QLA_SUCCESS) { 3125 /* Ran out of IDs to use */ 3126 break; 3127 } 3128 3129 /* Login and update database */ 3130 qla2x00_fabric_dev_login(vha, fcport, &next_loopid); 3131 3132 if (vha->vp_idx) { 3133 fcport->vha = vha; 3134 fcport->vp_idx = vha->vp_idx; 3135 } 3136 list_move_tail(&fcport->list, &vha->vp_fcports); 3137 } 3138 } while (0); 3139 3140 /* Free all new device structures not processed. */ 3141 list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) { 3142 list_del(&fcport->list); 3143 kfree(fcport); 3144 } 3145 3146 if (rval) { 3147 ql_dbg(ql_dbg_disc, vha, 0x2068, 3148 "Configure fabric error exit rval=%d.\n", rval); 3149 } 3150 3151 return (rval); 3152 } 3153 3154 /* 3155 * qla2x00_find_all_fabric_devs 3156 * 3157 * Input: 3158 * ha = adapter block pointer. 3159 * dev = database device entry pointer. 3160 * 3161 * Returns: 3162 * 0 = success. 3163 * 3164 * Context: 3165 * Kernel context. 3166 */ 3167 static int 3168 qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha, 3169 struct list_head *new_fcports) 3170 { 3171 int rval; 3172 uint16_t loop_id; 3173 fc_port_t *fcport, *new_fcport, *fcptemp; 3174 int found; 3175 3176 sw_info_t *swl; 3177 int swl_idx; 3178 int first_dev, last_dev; 3179 port_id_t wrap = {}, nxt_d_id; 3180 struct qla_hw_data *ha = vha->hw; 3181 struct scsi_qla_host *vp, *base_vha = pci_get_drvdata(ha->pdev); 3182 struct scsi_qla_host *tvp; 3183 3184 rval = QLA_SUCCESS; 3185 3186 /* Try GID_PT to get device list, else GAN. */ 3187 swl = kcalloc(MAX_FIBRE_DEVICES, sizeof(sw_info_t), GFP_KERNEL); 3188 if (!swl) { 3189 /*EMPTY*/ 3190 ql_dbg(ql_dbg_disc, vha, 0x2054, 3191 "GID_PT allocations failed, fallback on GA_NXT.\n"); 3192 } else { 3193 if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) { 3194 kfree(swl); 3195 swl = NULL; 3196 } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) { 3197 kfree(swl); 3198 swl = NULL; 3199 } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) { 3200 kfree(swl); 3201 swl = NULL; 3202 } else if (ql2xiidmaenable && 3203 qla2x00_gfpn_id(vha, swl) == QLA_SUCCESS) { 3204 qla2x00_gpsc(vha, swl); 3205 } 3206 3207 /* If other queries succeeded probe for FC-4 type */ 3208 if (swl) 3209 qla2x00_gff_id(vha, swl); 3210 } 3211 swl_idx = 0; 3212 3213 /* Allocate temporary fcport for any new fcports discovered. */ 3214 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 3215 if (new_fcport == NULL) { 3216 ql_log(ql_log_warn, vha, 0x205e, 3217 "Failed to allocate memory for fcport.\n"); 3218 kfree(swl); 3219 return (QLA_MEMORY_ALLOC_FAILED); 3220 } 3221 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); 3222 /* Set start port ID scan at adapter ID. */ 3223 first_dev = 1; 3224 last_dev = 0; 3225 3226 /* Starting free loop ID. */ 3227 loop_id = ha->min_external_loopid; 3228 for (; loop_id <= ha->max_loop_id; loop_id++) { 3229 if (qla2x00_is_reserved_id(vha, loop_id)) 3230 continue; 3231 3232 if (ha->current_topology == ISP_CFG_FL && 3233 (atomic_read(&vha->loop_down_timer) || 3234 LOOP_TRANSITION(vha))) { 3235 atomic_set(&vha->loop_down_timer, 0); 3236 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 3237 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 3238 break; 3239 } 3240 3241 if (swl != NULL) { 3242 if (last_dev) { 3243 wrap.b24 = new_fcport->d_id.b24; 3244 } else { 3245 new_fcport->d_id.b24 = swl[swl_idx].d_id.b24; 3246 memcpy(new_fcport->node_name, 3247 swl[swl_idx].node_name, WWN_SIZE); 3248 memcpy(new_fcport->port_name, 3249 swl[swl_idx].port_name, WWN_SIZE); 3250 memcpy(new_fcport->fabric_port_name, 3251 swl[swl_idx].fabric_port_name, WWN_SIZE); 3252 new_fcport->fp_speed = swl[swl_idx].fp_speed; 3253 new_fcport->fc4_type = swl[swl_idx].fc4_type; 3254 3255 if (swl[swl_idx].d_id.b.rsvd_1 != 0) { 3256 last_dev = 1; 3257 } 3258 swl_idx++; 3259 } 3260 } else { 3261 /* Send GA_NXT to the switch */ 3262 rval = qla2x00_ga_nxt(vha, new_fcport); 3263 if (rval != QLA_SUCCESS) { 3264 ql_log(ql_log_warn, vha, 0x2064, 3265 "SNS scan failed -- assuming " 3266 "zero-entry result.\n"); 3267 list_for_each_entry_safe(fcport, fcptemp, 3268 new_fcports, list) { 3269 list_del(&fcport->list); 3270 kfree(fcport); 3271 } 3272 rval = QLA_SUCCESS; 3273 break; 3274 } 3275 } 3276 3277 /* If wrap on switch device list, exit. */ 3278 if (first_dev) { 3279 wrap.b24 = new_fcport->d_id.b24; 3280 first_dev = 0; 3281 } else if (new_fcport->d_id.b24 == wrap.b24) { 3282 ql_dbg(ql_dbg_disc, vha, 0x2065, 3283 "Device wrap (%02x%02x%02x).\n", 3284 new_fcport->d_id.b.domain, 3285 new_fcport->d_id.b.area, 3286 new_fcport->d_id.b.al_pa); 3287 break; 3288 } 3289 3290 /* Bypass if same physical adapter. */ 3291 if (new_fcport->d_id.b24 == base_vha->d_id.b24) 3292 continue; 3293 3294 /* Bypass virtual ports of the same host. */ 3295 found = 0; 3296 if (ha->num_vhosts) { 3297 unsigned long flags; 3298 3299 spin_lock_irqsave(&ha->vport_slock, flags); 3300 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) { 3301 if (new_fcport->d_id.b24 == vp->d_id.b24) { 3302 found = 1; 3303 break; 3304 } 3305 } 3306 spin_unlock_irqrestore(&ha->vport_slock, flags); 3307 3308 if (found) 3309 continue; 3310 } 3311 3312 /* Bypass if same domain and area of adapter. */ 3313 if (((new_fcport->d_id.b24 & 0xffff00) == 3314 (vha->d_id.b24 & 0xffff00)) && ha->current_topology == 3315 ISP_CFG_FL) 3316 continue; 3317 3318 /* Bypass reserved domain fields. */ 3319 if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0) 3320 continue; 3321 3322 /* Bypass ports whose FCP-4 type is not FCP_SCSI */ 3323 if (ql2xgffidenable && 3324 (new_fcport->fc4_type != FC4_TYPE_FCP_SCSI && 3325 new_fcport->fc4_type != FC4_TYPE_UNKNOWN)) 3326 continue; 3327 3328 /* Locate matching device in database. */ 3329 found = 0; 3330 list_for_each_entry(fcport, &vha->vp_fcports, list) { 3331 if (memcmp(new_fcport->port_name, fcport->port_name, 3332 WWN_SIZE)) 3333 continue; 3334 3335 found++; 3336 3337 /* Update port state. */ 3338 memcpy(fcport->fabric_port_name, 3339 new_fcport->fabric_port_name, WWN_SIZE); 3340 fcport->fp_speed = new_fcport->fp_speed; 3341 3342 /* 3343 * If address the same and state FCS_ONLINE, nothing 3344 * changed. 3345 */ 3346 if (fcport->d_id.b24 == new_fcport->d_id.b24 && 3347 atomic_read(&fcport->state) == FCS_ONLINE) { 3348 break; 3349 } 3350 3351 /* 3352 * If device was not a fabric device before. 3353 */ 3354 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) { 3355 fcport->d_id.b24 = new_fcport->d_id.b24; 3356 fcport->loop_id = FC_NO_LOOP_ID; 3357 fcport->flags |= (FCF_FABRIC_DEVICE | 3358 FCF_LOGIN_NEEDED); 3359 break; 3360 } 3361 3362 /* 3363 * Port ID changed or device was marked to be updated; 3364 * Log it out if still logged in and mark it for 3365 * relogin later. 3366 */ 3367 fcport->d_id.b24 = new_fcport->d_id.b24; 3368 fcport->flags |= FCF_LOGIN_NEEDED; 3369 if (fcport->loop_id != FC_NO_LOOP_ID && 3370 (fcport->flags & FCF_FCP2_DEVICE) == 0 && 3371 fcport->port_type != FCT_INITIATOR && 3372 fcport->port_type != FCT_BROADCAST) { 3373 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 3374 fcport->d_id.b.domain, fcport->d_id.b.area, 3375 fcport->d_id.b.al_pa); 3376 fcport->loop_id = FC_NO_LOOP_ID; 3377 } 3378 3379 break; 3380 } 3381 3382 if (found) 3383 continue; 3384 /* If device was not in our fcports list, then add it. */ 3385 list_add_tail(&new_fcport->list, new_fcports); 3386 3387 /* Allocate a new replacement fcport. */ 3388 nxt_d_id.b24 = new_fcport->d_id.b24; 3389 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 3390 if (new_fcport == NULL) { 3391 ql_log(ql_log_warn, vha, 0x2066, 3392 "Memory allocation failed for fcport.\n"); 3393 kfree(swl); 3394 return (QLA_MEMORY_ALLOC_FAILED); 3395 } 3396 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); 3397 new_fcport->d_id.b24 = nxt_d_id.b24; 3398 } 3399 3400 kfree(swl); 3401 kfree(new_fcport); 3402 3403 return (rval); 3404 } 3405 3406 /* 3407 * qla2x00_find_new_loop_id 3408 * Scan through our port list and find a new usable loop ID. 3409 * 3410 * Input: 3411 * ha: adapter state pointer. 3412 * dev: port structure pointer. 3413 * 3414 * Returns: 3415 * qla2x00 local function return status code. 3416 * 3417 * Context: 3418 * Kernel context. 3419 */ 3420 int 3421 qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev) 3422 { 3423 int rval; 3424 int found; 3425 fc_port_t *fcport; 3426 uint16_t first_loop_id; 3427 struct qla_hw_data *ha = vha->hw; 3428 struct scsi_qla_host *vp; 3429 struct scsi_qla_host *tvp; 3430 unsigned long flags = 0; 3431 3432 rval = QLA_SUCCESS; 3433 3434 /* Save starting loop ID. */ 3435 first_loop_id = dev->loop_id; 3436 3437 for (;;) { 3438 /* Skip loop ID if already used by adapter. */ 3439 if (dev->loop_id == vha->loop_id) 3440 dev->loop_id++; 3441 3442 /* Skip reserved loop IDs. */ 3443 while (qla2x00_is_reserved_id(vha, dev->loop_id)) 3444 dev->loop_id++; 3445 3446 /* Reset loop ID if passed the end. */ 3447 if (dev->loop_id > ha->max_loop_id) { 3448 /* first loop ID. */ 3449 dev->loop_id = ha->min_external_loopid; 3450 } 3451 3452 /* Check for loop ID being already in use. */ 3453 found = 0; 3454 fcport = NULL; 3455 3456 spin_lock_irqsave(&ha->vport_slock, flags); 3457 list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) { 3458 list_for_each_entry(fcport, &vp->vp_fcports, list) { 3459 if (fcport->loop_id == dev->loop_id && 3460 fcport != dev) { 3461 /* ID possibly in use */ 3462 found++; 3463 break; 3464 } 3465 } 3466 if (found) 3467 break; 3468 } 3469 spin_unlock_irqrestore(&ha->vport_slock, flags); 3470 3471 /* If not in use then it is free to use. */ 3472 if (!found) { 3473 break; 3474 } 3475 3476 /* ID in use. Try next value. */ 3477 dev->loop_id++; 3478 3479 /* If wrap around. No free ID to use. */ 3480 if (dev->loop_id == first_loop_id) { 3481 dev->loop_id = FC_NO_LOOP_ID; 3482 rval = QLA_FUNCTION_FAILED; 3483 break; 3484 } 3485 } 3486 3487 return (rval); 3488 } 3489 3490 /* 3491 * qla2x00_device_resync 3492 * Marks devices in the database that needs resynchronization. 3493 * 3494 * Input: 3495 * ha = adapter block pointer. 3496 * 3497 * Context: 3498 * Kernel context. 3499 */ 3500 static int 3501 qla2x00_device_resync(scsi_qla_host_t *vha) 3502 { 3503 int rval; 3504 uint32_t mask; 3505 fc_port_t *fcport; 3506 uint32_t rscn_entry; 3507 uint8_t rscn_out_iter; 3508 uint8_t format; 3509 port_id_t d_id = {}; 3510 3511 rval = QLA_RSCNS_HANDLED; 3512 3513 while (vha->rscn_out_ptr != vha->rscn_in_ptr || 3514 vha->flags.rscn_queue_overflow) { 3515 3516 rscn_entry = vha->rscn_queue[vha->rscn_out_ptr]; 3517 format = MSB(MSW(rscn_entry)); 3518 d_id.b.domain = LSB(MSW(rscn_entry)); 3519 d_id.b.area = MSB(LSW(rscn_entry)); 3520 d_id.b.al_pa = LSB(LSW(rscn_entry)); 3521 3522 ql_dbg(ql_dbg_disc, vha, 0x2020, 3523 "RSCN queue entry[%d] = [%02x/%02x%02x%02x].\n", 3524 vha->rscn_out_ptr, format, d_id.b.domain, d_id.b.area, 3525 d_id.b.al_pa); 3526 3527 vha->rscn_out_ptr++; 3528 if (vha->rscn_out_ptr == MAX_RSCN_COUNT) 3529 vha->rscn_out_ptr = 0; 3530 3531 /* Skip duplicate entries. */ 3532 for (rscn_out_iter = vha->rscn_out_ptr; 3533 !vha->flags.rscn_queue_overflow && 3534 rscn_out_iter != vha->rscn_in_ptr; 3535 rscn_out_iter = (rscn_out_iter == 3536 (MAX_RSCN_COUNT - 1)) ? 0: rscn_out_iter + 1) { 3537 3538 if (rscn_entry != vha->rscn_queue[rscn_out_iter]) 3539 break; 3540 3541 ql_dbg(ql_dbg_disc, vha, 0x2021, 3542 "Skipping duplicate RSCN queue entry found at " 3543 "[%d].\n", rscn_out_iter); 3544 3545 vha->rscn_out_ptr = rscn_out_iter; 3546 } 3547 3548 /* Queue overflow, set switch default case. */ 3549 if (vha->flags.rscn_queue_overflow) { 3550 ql_dbg(ql_dbg_disc, vha, 0x2022, 3551 "device_resync: rscn overflow.\n"); 3552 3553 format = 3; 3554 vha->flags.rscn_queue_overflow = 0; 3555 } 3556 3557 switch (format) { 3558 case 0: 3559 mask = 0xffffff; 3560 break; 3561 case 1: 3562 mask = 0xffff00; 3563 break; 3564 case 2: 3565 mask = 0xff0000; 3566 break; 3567 default: 3568 mask = 0x0; 3569 d_id.b24 = 0; 3570 vha->rscn_out_ptr = vha->rscn_in_ptr; 3571 break; 3572 } 3573 3574 rval = QLA_SUCCESS; 3575 3576 list_for_each_entry(fcport, &vha->vp_fcports, list) { 3577 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 || 3578 (fcport->d_id.b24 & mask) != d_id.b24 || 3579 fcport->port_type == FCT_BROADCAST) 3580 continue; 3581 3582 if (atomic_read(&fcport->state) == FCS_ONLINE) { 3583 if (format != 3 || 3584 fcport->port_type != FCT_INITIATOR) { 3585 qla2x00_mark_device_lost(vha, fcport, 3586 0, 0); 3587 } 3588 } 3589 } 3590 } 3591 return (rval); 3592 } 3593 3594 /* 3595 * qla2x00_fabric_dev_login 3596 * Login fabric target device and update FC port database. 3597 * 3598 * Input: 3599 * ha: adapter state pointer. 3600 * fcport: port structure list pointer. 3601 * next_loopid: contains value of a new loop ID that can be used 3602 * by the next login attempt. 3603 * 3604 * Returns: 3605 * qla2x00 local function return status code. 3606 * 3607 * Context: 3608 * Kernel context. 3609 */ 3610 static int 3611 qla2x00_fabric_dev_login(scsi_qla_host_t *vha, fc_port_t *fcport, 3612 uint16_t *next_loopid) 3613 { 3614 int rval; 3615 int retry; 3616 uint8_t opts; 3617 struct qla_hw_data *ha = vha->hw; 3618 3619 rval = QLA_SUCCESS; 3620 retry = 0; 3621 3622 if (IS_ALOGIO_CAPABLE(ha)) { 3623 if (fcport->flags & FCF_ASYNC_SENT) 3624 return rval; 3625 fcport->flags |= FCF_ASYNC_SENT; 3626 rval = qla2x00_post_async_login_work(vha, fcport, NULL); 3627 if (!rval) 3628 return rval; 3629 } 3630 3631 fcport->flags &= ~FCF_ASYNC_SENT; 3632 rval = qla2x00_fabric_login(vha, fcport, next_loopid); 3633 if (rval == QLA_SUCCESS) { 3634 /* Send an ADISC to FCP2 devices.*/ 3635 opts = 0; 3636 if (fcport->flags & FCF_FCP2_DEVICE) 3637 opts |= BIT_1; 3638 rval = qla2x00_get_port_database(vha, fcport, opts); 3639 if (rval != QLA_SUCCESS) { 3640 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 3641 fcport->d_id.b.domain, fcport->d_id.b.area, 3642 fcport->d_id.b.al_pa); 3643 qla2x00_mark_device_lost(vha, fcport, 1, 0); 3644 } else { 3645 qla2x00_update_fcport(vha, fcport); 3646 } 3647 } 3648 3649 return (rval); 3650 } 3651 3652 /* 3653 * qla2x00_fabric_login 3654 * Issue fabric login command. 3655 * 3656 * Input: 3657 * ha = adapter block pointer. 3658 * device = pointer to FC device type structure. 3659 * 3660 * Returns: 3661 * 0 - Login successfully 3662 * 1 - Login failed 3663 * 2 - Initiator device 3664 * 3 - Fatal error 3665 */ 3666 int 3667 qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport, 3668 uint16_t *next_loopid) 3669 { 3670 int rval; 3671 int retry; 3672 uint16_t tmp_loopid; 3673 uint16_t mb[MAILBOX_REGISTER_COUNT]; 3674 struct qla_hw_data *ha = vha->hw; 3675 3676 retry = 0; 3677 tmp_loopid = 0; 3678 3679 for (;;) { 3680 ql_dbg(ql_dbg_disc, vha, 0x2000, 3681 "Trying Fabric Login w/loop id 0x%04x for port " 3682 "%02x%02x%02x.\n", 3683 fcport->loop_id, fcport->d_id.b.domain, 3684 fcport->d_id.b.area, fcport->d_id.b.al_pa); 3685 3686 /* Login fcport on switch. */ 3687 ha->isp_ops->fabric_login(vha, fcport->loop_id, 3688 fcport->d_id.b.domain, fcport->d_id.b.area, 3689 fcport->d_id.b.al_pa, mb, BIT_0); 3690 if (mb[0] == MBS_PORT_ID_USED) { 3691 /* 3692 * Device has another loop ID. The firmware team 3693 * recommends the driver perform an implicit login with 3694 * the specified ID again. The ID we just used is save 3695 * here so we return with an ID that can be tried by 3696 * the next login. 3697 */ 3698 retry++; 3699 tmp_loopid = fcport->loop_id; 3700 fcport->loop_id = mb[1]; 3701 3702 ql_dbg(ql_dbg_disc, vha, 0x2001, 3703 "Fabric Login: port in use - next loop " 3704 "id=0x%04x, port id= %02x%02x%02x.\n", 3705 fcport->loop_id, fcport->d_id.b.domain, 3706 fcport->d_id.b.area, fcport->d_id.b.al_pa); 3707 3708 } else if (mb[0] == MBS_COMMAND_COMPLETE) { 3709 /* 3710 * Login succeeded. 3711 */ 3712 if (retry) { 3713 /* A retry occurred before. */ 3714 *next_loopid = tmp_loopid; 3715 } else { 3716 /* 3717 * No retry occurred before. Just increment the 3718 * ID value for next login. 3719 */ 3720 *next_loopid = (fcport->loop_id + 1); 3721 } 3722 3723 if (mb[1] & BIT_0) { 3724 fcport->port_type = FCT_INITIATOR; 3725 } else { 3726 fcport->port_type = FCT_TARGET; 3727 if (mb[1] & BIT_1) { 3728 fcport->flags |= FCF_FCP2_DEVICE; 3729 } 3730 } 3731 3732 if (mb[10] & BIT_0) 3733 fcport->supported_classes |= FC_COS_CLASS2; 3734 if (mb[10] & BIT_1) 3735 fcport->supported_classes |= FC_COS_CLASS3; 3736 3737 rval = QLA_SUCCESS; 3738 break; 3739 } else if (mb[0] == MBS_LOOP_ID_USED) { 3740 /* 3741 * Loop ID already used, try next loop ID. 3742 */ 3743 fcport->loop_id++; 3744 rval = qla2x00_find_new_loop_id(vha, fcport); 3745 if (rval != QLA_SUCCESS) { 3746 /* Ran out of loop IDs to use */ 3747 break; 3748 } 3749 } else if (mb[0] == MBS_COMMAND_ERROR) { 3750 /* 3751 * Firmware possibly timed out during login. If NO 3752 * retries are left to do then the device is declared 3753 * dead. 3754 */ 3755 *next_loopid = fcport->loop_id; 3756 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 3757 fcport->d_id.b.domain, fcport->d_id.b.area, 3758 fcport->d_id.b.al_pa); 3759 qla2x00_mark_device_lost(vha, fcport, 1, 0); 3760 3761 rval = 1; 3762 break; 3763 } else { 3764 /* 3765 * unrecoverable / not handled error 3766 */ 3767 ql_dbg(ql_dbg_disc, vha, 0x2002, 3768 "Failed=%x port_id=%02x%02x%02x loop_id=%x " 3769 "jiffies=%lx.\n", mb[0], fcport->d_id.b.domain, 3770 fcport->d_id.b.area, fcport->d_id.b.al_pa, 3771 fcport->loop_id, jiffies); 3772 3773 *next_loopid = fcport->loop_id; 3774 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 3775 fcport->d_id.b.domain, fcport->d_id.b.area, 3776 fcport->d_id.b.al_pa); 3777 fcport->loop_id = FC_NO_LOOP_ID; 3778 fcport->login_retry = 0; 3779 3780 rval = 3; 3781 break; 3782 } 3783 } 3784 3785 return (rval); 3786 } 3787 3788 /* 3789 * qla2x00_local_device_login 3790 * Issue local device login command. 3791 * 3792 * Input: 3793 * ha = adapter block pointer. 3794 * loop_id = loop id of device to login to. 3795 * 3796 * Returns (Where's the #define!!!!): 3797 * 0 - Login successfully 3798 * 1 - Login failed 3799 * 3 - Fatal error 3800 */ 3801 int 3802 qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport) 3803 { 3804 int rval; 3805 uint16_t mb[MAILBOX_REGISTER_COUNT]; 3806 3807 memset(mb, 0, sizeof(mb)); 3808 rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0); 3809 if (rval == QLA_SUCCESS) { 3810 /* Interrogate mailbox registers for any errors */ 3811 if (mb[0] == MBS_COMMAND_ERROR) 3812 rval = 1; 3813 else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR) 3814 /* device not in PCB table */ 3815 rval = 3; 3816 } 3817 3818 return (rval); 3819 } 3820 3821 /* 3822 * qla2x00_loop_resync 3823 * Resync with fibre channel devices. 3824 * 3825 * Input: 3826 * ha = adapter block pointer. 3827 * 3828 * Returns: 3829 * 0 = success 3830 */ 3831 int 3832 qla2x00_loop_resync(scsi_qla_host_t *vha) 3833 { 3834 int rval = QLA_SUCCESS; 3835 uint32_t wait_time; 3836 struct req_que *req; 3837 struct rsp_que *rsp; 3838 3839 if (vha->hw->flags.cpu_affinity_enabled) 3840 req = vha->hw->req_q_map[0]; 3841 else 3842 req = vha->req; 3843 rsp = req->rsp; 3844 3845 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 3846 if (vha->flags.online) { 3847 if (!(rval = qla2x00_fw_ready(vha))) { 3848 /* Wait at most MAX_TARGET RSCNs for a stable link. */ 3849 wait_time = 256; 3850 do { 3851 /* Issue a marker after FW becomes ready. */ 3852 qla2x00_marker(vha, req, rsp, 0, 0, 3853 MK_SYNC_ALL); 3854 vha->marker_needed = 0; 3855 3856 /* Remap devices on Loop. */ 3857 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 3858 3859 qla2x00_configure_loop(vha); 3860 wait_time--; 3861 } while (!atomic_read(&vha->loop_down_timer) && 3862 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) 3863 && wait_time && (test_bit(LOOP_RESYNC_NEEDED, 3864 &vha->dpc_flags))); 3865 } 3866 } 3867 3868 if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) 3869 return (QLA_FUNCTION_FAILED); 3870 3871 if (rval) 3872 ql_dbg(ql_dbg_disc, vha, 0x206c, 3873 "%s *** FAILED ***.\n", __func__); 3874 3875 return (rval); 3876 } 3877 3878 /* 3879 * qla2x00_perform_loop_resync 3880 * Description: This function will set the appropriate flags and call 3881 * qla2x00_loop_resync. If successful loop will be resynced 3882 * Arguments : scsi_qla_host_t pointer 3883 * returm : Success or Failure 3884 */ 3885 3886 int qla2x00_perform_loop_resync(scsi_qla_host_t *ha) 3887 { 3888 int32_t rval = 0; 3889 3890 if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) { 3891 /*Configure the flags so that resync happens properly*/ 3892 atomic_set(&ha->loop_down_timer, 0); 3893 if (!(ha->device_flags & DFLG_NO_CABLE)) { 3894 atomic_set(&ha->loop_state, LOOP_UP); 3895 set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags); 3896 set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags); 3897 set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags); 3898 3899 rval = qla2x00_loop_resync(ha); 3900 } else 3901 atomic_set(&ha->loop_state, LOOP_DEAD); 3902 3903 clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags); 3904 } 3905 3906 return rval; 3907 } 3908 3909 void 3910 qla2x00_update_fcports(scsi_qla_host_t *base_vha) 3911 { 3912 fc_port_t *fcport; 3913 struct scsi_qla_host *vha; 3914 struct qla_hw_data *ha = base_vha->hw; 3915 unsigned long flags; 3916 3917 spin_lock_irqsave(&ha->vport_slock, flags); 3918 /* Go with deferred removal of rport references. */ 3919 list_for_each_entry(vha, &base_vha->hw->vp_list, list) { 3920 atomic_inc(&vha->vref_count); 3921 list_for_each_entry(fcport, &vha->vp_fcports, list) { 3922 if (fcport->drport && 3923 atomic_read(&fcport->state) != FCS_UNCONFIGURED) { 3924 spin_unlock_irqrestore(&ha->vport_slock, flags); 3925 3926 qla2x00_rport_del(fcport); 3927 3928 spin_lock_irqsave(&ha->vport_slock, flags); 3929 } 3930 } 3931 atomic_dec(&vha->vref_count); 3932 } 3933 spin_unlock_irqrestore(&ha->vport_slock, flags); 3934 } 3935 3936 /* 3937 * qla82xx_quiescent_state_cleanup 3938 * Description: This function will block the new I/Os 3939 * Its not aborting any I/Os as context 3940 * is not destroyed during quiescence 3941 * Arguments: scsi_qla_host_t 3942 * return : void 3943 */ 3944 void 3945 qla82xx_quiescent_state_cleanup(scsi_qla_host_t *vha) 3946 { 3947 struct qla_hw_data *ha = vha->hw; 3948 struct scsi_qla_host *vp; 3949 3950 ql_dbg(ql_dbg_p3p, vha, 0xb002, 3951 "Performing ISP error recovery - ha=%p.\n", ha); 3952 3953 atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME); 3954 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 3955 atomic_set(&vha->loop_state, LOOP_DOWN); 3956 qla2x00_mark_all_devices_lost(vha, 0); 3957 list_for_each_entry(vp, &ha->vp_list, list) 3958 qla2x00_mark_all_devices_lost(vha, 0); 3959 } else { 3960 if (!atomic_read(&vha->loop_down_timer)) 3961 atomic_set(&vha->loop_down_timer, 3962 LOOP_DOWN_TIME); 3963 } 3964 /* Wait for pending cmds to complete */ 3965 qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST); 3966 } 3967 3968 void 3969 qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha) 3970 { 3971 struct qla_hw_data *ha = vha->hw; 3972 struct scsi_qla_host *vp; 3973 unsigned long flags; 3974 fc_port_t *fcport; 3975 3976 /* For ISP82XX, driver waits for completion of the commands. 3977 * online flag should be set. 3978 */ 3979 if (!IS_QLA82XX(ha)) 3980 vha->flags.online = 0; 3981 ha->flags.chip_reset_done = 0; 3982 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 3983 ha->qla_stats.total_isp_aborts++; 3984 3985 ql_log(ql_log_info, vha, 0x00af, 3986 "Performing ISP error recovery - ha=%p.\n", ha); 3987 3988 /* For ISP82XX, reset_chip is just disabling interrupts. 3989 * Driver waits for the completion of the commands. 3990 * the interrupts need to be enabled. 3991 */ 3992 if (!IS_QLA82XX(ha)) 3993 ha->isp_ops->reset_chip(vha); 3994 3995 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 3996 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 3997 atomic_set(&vha->loop_state, LOOP_DOWN); 3998 qla2x00_mark_all_devices_lost(vha, 0); 3999 4000 spin_lock_irqsave(&ha->vport_slock, flags); 4001 list_for_each_entry(vp, &ha->vp_list, list) { 4002 atomic_inc(&vp->vref_count); 4003 spin_unlock_irqrestore(&ha->vport_slock, flags); 4004 4005 qla2x00_mark_all_devices_lost(vp, 0); 4006 4007 spin_lock_irqsave(&ha->vport_slock, flags); 4008 atomic_dec(&vp->vref_count); 4009 } 4010 spin_unlock_irqrestore(&ha->vport_slock, flags); 4011 } else { 4012 if (!atomic_read(&vha->loop_down_timer)) 4013 atomic_set(&vha->loop_down_timer, 4014 LOOP_DOWN_TIME); 4015 } 4016 4017 /* Clear all async request states across all VPs. */ 4018 list_for_each_entry(fcport, &vha->vp_fcports, list) 4019 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 4020 spin_lock_irqsave(&ha->vport_slock, flags); 4021 list_for_each_entry(vp, &ha->vp_list, list) { 4022 atomic_inc(&vp->vref_count); 4023 spin_unlock_irqrestore(&ha->vport_slock, flags); 4024 4025 list_for_each_entry(fcport, &vp->vp_fcports, list) 4026 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 4027 4028 spin_lock_irqsave(&ha->vport_slock, flags); 4029 atomic_dec(&vp->vref_count); 4030 } 4031 spin_unlock_irqrestore(&ha->vport_slock, flags); 4032 4033 if (!ha->flags.eeh_busy) { 4034 /* Make sure for ISP 82XX IO DMA is complete */ 4035 if (IS_QLA82XX(ha)) { 4036 qla82xx_chip_reset_cleanup(vha); 4037 ql_log(ql_log_info, vha, 0x00b4, 4038 "Done chip reset cleanup.\n"); 4039 4040 /* Done waiting for pending commands. 4041 * Reset the online flag. 4042 */ 4043 vha->flags.online = 0; 4044 } 4045 4046 /* Requeue all commands in outstanding command list. */ 4047 qla2x00_abort_all_cmds(vha, DID_RESET << 16); 4048 } 4049 } 4050 4051 /* 4052 * qla2x00_abort_isp 4053 * Resets ISP and aborts all outstanding commands. 4054 * 4055 * Input: 4056 * ha = adapter block pointer. 4057 * 4058 * Returns: 4059 * 0 = success 4060 */ 4061 int 4062 qla2x00_abort_isp(scsi_qla_host_t *vha) 4063 { 4064 int rval; 4065 uint8_t status = 0; 4066 struct qla_hw_data *ha = vha->hw; 4067 struct scsi_qla_host *vp; 4068 struct req_que *req = ha->req_q_map[0]; 4069 unsigned long flags; 4070 4071 if (vha->flags.online) { 4072 qla2x00_abort_isp_cleanup(vha); 4073 4074 if (unlikely(pci_channel_offline(ha->pdev) && 4075 ha->flags.pci_channel_io_perm_failure)) { 4076 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 4077 status = 0; 4078 return status; 4079 } 4080 4081 ha->isp_ops->get_flash_version(vha, req->ring); 4082 4083 ha->isp_ops->nvram_config(vha); 4084 4085 if (!qla2x00_restart_isp(vha)) { 4086 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 4087 4088 if (!atomic_read(&vha->loop_down_timer)) { 4089 /* 4090 * Issue marker command only when we are going 4091 * to start the I/O . 4092 */ 4093 vha->marker_needed = 1; 4094 } 4095 4096 vha->flags.online = 1; 4097 4098 ha->isp_ops->enable_intrs(ha); 4099 4100 ha->isp_abort_cnt = 0; 4101 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 4102 4103 if (IS_QLA81XX(ha)) 4104 qla2x00_get_fw_version(vha, 4105 &ha->fw_major_version, 4106 &ha->fw_minor_version, 4107 &ha->fw_subminor_version, 4108 &ha->fw_attributes, &ha->fw_memory_size, 4109 ha->mpi_version, &ha->mpi_capabilities, 4110 ha->phy_version); 4111 4112 if (ha->fce) { 4113 ha->flags.fce_enabled = 1; 4114 memset(ha->fce, 0, 4115 fce_calc_size(ha->fce_bufs)); 4116 rval = qla2x00_enable_fce_trace(vha, 4117 ha->fce_dma, ha->fce_bufs, ha->fce_mb, 4118 &ha->fce_bufs); 4119 if (rval) { 4120 ql_log(ql_log_warn, vha, 0x8033, 4121 "Unable to reinitialize FCE " 4122 "(%d).\n", rval); 4123 ha->flags.fce_enabled = 0; 4124 } 4125 } 4126 4127 if (ha->eft) { 4128 memset(ha->eft, 0, EFT_SIZE); 4129 rval = qla2x00_enable_eft_trace(vha, 4130 ha->eft_dma, EFT_NUM_BUFFERS); 4131 if (rval) { 4132 ql_log(ql_log_warn, vha, 0x8034, 4133 "Unable to reinitialize EFT " 4134 "(%d).\n", rval); 4135 } 4136 } 4137 } else { /* failed the ISP abort */ 4138 vha->flags.online = 1; 4139 if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) { 4140 if (ha->isp_abort_cnt == 0) { 4141 ql_log(ql_log_fatal, vha, 0x8035, 4142 "ISP error recover failed - " 4143 "board disabled.\n"); 4144 /* 4145 * The next call disables the board 4146 * completely. 4147 */ 4148 ha->isp_ops->reset_adapter(vha); 4149 vha->flags.online = 0; 4150 clear_bit(ISP_ABORT_RETRY, 4151 &vha->dpc_flags); 4152 status = 0; 4153 } else { /* schedule another ISP abort */ 4154 ha->isp_abort_cnt--; 4155 ql_dbg(ql_dbg_taskm, vha, 0x8020, 4156 "ISP abort - retry remaining %d.\n", 4157 ha->isp_abort_cnt); 4158 status = 1; 4159 } 4160 } else { 4161 ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT; 4162 ql_dbg(ql_dbg_taskm, vha, 0x8021, 4163 "ISP error recovery - retrying (%d) " 4164 "more times.\n", ha->isp_abort_cnt); 4165 set_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 4166 status = 1; 4167 } 4168 } 4169 4170 } 4171 4172 if (!status) { 4173 ql_dbg(ql_dbg_taskm, vha, 0x8022, "%s succeeded.\n", __func__); 4174 4175 spin_lock_irqsave(&ha->vport_slock, flags); 4176 list_for_each_entry(vp, &ha->vp_list, list) { 4177 if (vp->vp_idx) { 4178 atomic_inc(&vp->vref_count); 4179 spin_unlock_irqrestore(&ha->vport_slock, flags); 4180 4181 qla2x00_vp_abort_isp(vp); 4182 4183 spin_lock_irqsave(&ha->vport_slock, flags); 4184 atomic_dec(&vp->vref_count); 4185 } 4186 } 4187 spin_unlock_irqrestore(&ha->vport_slock, flags); 4188 4189 } else { 4190 ql_log(ql_log_warn, vha, 0x8023, "%s **** FAILED ****.\n", 4191 __func__); 4192 } 4193 4194 return(status); 4195 } 4196 4197 /* 4198 * qla2x00_restart_isp 4199 * restarts the ISP after a reset 4200 * 4201 * Input: 4202 * ha = adapter block pointer. 4203 * 4204 * Returns: 4205 * 0 = success 4206 */ 4207 static int 4208 qla2x00_restart_isp(scsi_qla_host_t *vha) 4209 { 4210 int status = 0; 4211 uint32_t wait_time; 4212 struct qla_hw_data *ha = vha->hw; 4213 struct req_que *req = ha->req_q_map[0]; 4214 struct rsp_que *rsp = ha->rsp_q_map[0]; 4215 4216 /* If firmware needs to be loaded */ 4217 if (qla2x00_isp_firmware(vha)) { 4218 vha->flags.online = 0; 4219 status = ha->isp_ops->chip_diag(vha); 4220 if (!status) 4221 status = qla2x00_setup_chip(vha); 4222 } 4223 4224 if (!status && !(status = qla2x00_init_rings(vha))) { 4225 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 4226 ha->flags.chip_reset_done = 1; 4227 /* Initialize the queues in use */ 4228 qla25xx_init_queues(ha); 4229 4230 status = qla2x00_fw_ready(vha); 4231 if (!status) { 4232 ql_dbg(ql_dbg_taskm, vha, 0x8031, 4233 "Start configure loop status = %d.\n", status); 4234 4235 /* Issue a marker after FW becomes ready. */ 4236 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); 4237 4238 vha->flags.online = 1; 4239 /* Wait at most MAX_TARGET RSCNs for a stable link. */ 4240 wait_time = 256; 4241 do { 4242 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 4243 qla2x00_configure_loop(vha); 4244 wait_time--; 4245 } while (!atomic_read(&vha->loop_down_timer) && 4246 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) 4247 && wait_time && (test_bit(LOOP_RESYNC_NEEDED, 4248 &vha->dpc_flags))); 4249 } 4250 4251 /* if no cable then assume it's good */ 4252 if ((vha->device_flags & DFLG_NO_CABLE)) 4253 status = 0; 4254 4255 ql_dbg(ql_dbg_taskm, vha, 0x8032, 4256 "Configure loop done, status = 0x%x.\n", status); 4257 } 4258 return (status); 4259 } 4260 4261 static int 4262 qla25xx_init_queues(struct qla_hw_data *ha) 4263 { 4264 struct rsp_que *rsp = NULL; 4265 struct req_que *req = NULL; 4266 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 4267 int ret = -1; 4268 int i; 4269 4270 for (i = 1; i < ha->max_rsp_queues; i++) { 4271 rsp = ha->rsp_q_map[i]; 4272 if (rsp) { 4273 rsp->options &= ~BIT_0; 4274 ret = qla25xx_init_rsp_que(base_vha, rsp); 4275 if (ret != QLA_SUCCESS) 4276 ql_dbg(ql_dbg_init, base_vha, 0x00ff, 4277 "%s Rsp que: %d init failed.\n", 4278 __func__, rsp->id); 4279 else 4280 ql_dbg(ql_dbg_init, base_vha, 0x0100, 4281 "%s Rsp que: %d inited.\n", 4282 __func__, rsp->id); 4283 } 4284 } 4285 for (i = 1; i < ha->max_req_queues; i++) { 4286 req = ha->req_q_map[i]; 4287 if (req) { 4288 /* Clear outstanding commands array. */ 4289 req->options &= ~BIT_0; 4290 ret = qla25xx_init_req_que(base_vha, req); 4291 if (ret != QLA_SUCCESS) 4292 ql_dbg(ql_dbg_init, base_vha, 0x0101, 4293 "%s Req que: %d init failed.\n", 4294 __func__, req->id); 4295 else 4296 ql_dbg(ql_dbg_init, base_vha, 0x0102, 4297 "%s Req que: %d inited.\n", 4298 __func__, req->id); 4299 } 4300 } 4301 return ret; 4302 } 4303 4304 /* 4305 * qla2x00_reset_adapter 4306 * Reset adapter. 4307 * 4308 * Input: 4309 * ha = adapter block pointer. 4310 */ 4311 void 4312 qla2x00_reset_adapter(scsi_qla_host_t *vha) 4313 { 4314 unsigned long flags = 0; 4315 struct qla_hw_data *ha = vha->hw; 4316 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 4317 4318 vha->flags.online = 0; 4319 ha->isp_ops->disable_intrs(ha); 4320 4321 spin_lock_irqsave(&ha->hardware_lock, flags); 4322 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 4323 RD_REG_WORD(®->hccr); /* PCI Posting. */ 4324 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 4325 RD_REG_WORD(®->hccr); /* PCI Posting. */ 4326 spin_unlock_irqrestore(&ha->hardware_lock, flags); 4327 } 4328 4329 void 4330 qla24xx_reset_adapter(scsi_qla_host_t *vha) 4331 { 4332 unsigned long flags = 0; 4333 struct qla_hw_data *ha = vha->hw; 4334 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 4335 4336 if (IS_QLA82XX(ha)) 4337 return; 4338 4339 vha->flags.online = 0; 4340 ha->isp_ops->disable_intrs(ha); 4341 4342 spin_lock_irqsave(&ha->hardware_lock, flags); 4343 WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET); 4344 RD_REG_DWORD(®->hccr); 4345 WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE); 4346 RD_REG_DWORD(®->hccr); 4347 spin_unlock_irqrestore(&ha->hardware_lock, flags); 4348 4349 if (IS_NOPOLLING_TYPE(ha)) 4350 ha->isp_ops->enable_intrs(ha); 4351 } 4352 4353 /* On sparc systems, obtain port and node WWN from firmware 4354 * properties. 4355 */ 4356 static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, 4357 struct nvram_24xx *nv) 4358 { 4359 #ifdef CONFIG_SPARC 4360 struct qla_hw_data *ha = vha->hw; 4361 struct pci_dev *pdev = ha->pdev; 4362 struct device_node *dp = pci_device_to_OF_node(pdev); 4363 const u8 *val; 4364 int len; 4365 4366 val = of_get_property(dp, "port-wwn", &len); 4367 if (val && len >= WWN_SIZE) 4368 memcpy(nv->port_name, val, WWN_SIZE); 4369 4370 val = of_get_property(dp, "node-wwn", &len); 4371 if (val && len >= WWN_SIZE) 4372 memcpy(nv->node_name, val, WWN_SIZE); 4373 #endif 4374 } 4375 4376 int 4377 qla24xx_nvram_config(scsi_qla_host_t *vha) 4378 { 4379 int rval; 4380 struct init_cb_24xx *icb; 4381 struct nvram_24xx *nv; 4382 uint32_t *dptr; 4383 uint8_t *dptr1, *dptr2; 4384 uint32_t chksum; 4385 uint16_t cnt; 4386 struct qla_hw_data *ha = vha->hw; 4387 4388 rval = QLA_SUCCESS; 4389 icb = (struct init_cb_24xx *)ha->init_cb; 4390 nv = ha->nvram; 4391 4392 /* Determine NVRAM starting address. */ 4393 if (ha->flags.port0) { 4394 ha->nvram_base = FA_NVRAM_FUNC0_ADDR; 4395 ha->vpd_base = FA_NVRAM_VPD0_ADDR; 4396 } else { 4397 ha->nvram_base = FA_NVRAM_FUNC1_ADDR; 4398 ha->vpd_base = FA_NVRAM_VPD1_ADDR; 4399 } 4400 ha->nvram_size = sizeof(struct nvram_24xx); 4401 ha->vpd_size = FA_NVRAM_VPD_SIZE; 4402 if (IS_QLA82XX(ha)) 4403 ha->vpd_size = FA_VPD_SIZE_82XX; 4404 4405 /* Get VPD data into cache */ 4406 ha->vpd = ha->nvram + VPD_OFFSET; 4407 ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd, 4408 ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4); 4409 4410 /* Get NVRAM data into cache and calculate checksum. */ 4411 dptr = (uint32_t *)nv; 4412 ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base, 4413 ha->nvram_size); 4414 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++) 4415 chksum += le32_to_cpu(*dptr++); 4416 4417 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a, 4418 "Contents of NVRAM\n"); 4419 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d, 4420 (uint8_t *)nv, ha->nvram_size); 4421 4422 /* Bad NVRAM data, set defaults parameters. */ 4423 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P' 4424 || nv->id[3] != ' ' || 4425 nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) { 4426 /* Reset NVRAM data. */ 4427 ql_log(ql_log_warn, vha, 0x006b, 4428 "Inconisistent NVRAM detected: checksum=0x%x id=%c " 4429 "version=0x%x.\n", chksum, nv->id[0], nv->nvram_version); 4430 ql_log(ql_log_warn, vha, 0x006c, 4431 "Falling back to functioning (yet invalid -- WWPN) " 4432 "defaults.\n"); 4433 4434 /* 4435 * Set default initialization control block. 4436 */ 4437 memset(nv, 0, ha->nvram_size); 4438 nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION); 4439 nv->version = __constant_cpu_to_le16(ICB_VERSION); 4440 nv->frame_payload_size = __constant_cpu_to_le16(2048); 4441 nv->execution_throttle = __constant_cpu_to_le16(0xFFFF); 4442 nv->exchange_count = __constant_cpu_to_le16(0); 4443 nv->hard_address = __constant_cpu_to_le16(124); 4444 nv->port_name[0] = 0x21; 4445 nv->port_name[1] = 0x00 + ha->port_no; 4446 nv->port_name[2] = 0x00; 4447 nv->port_name[3] = 0xe0; 4448 nv->port_name[4] = 0x8b; 4449 nv->port_name[5] = 0x1c; 4450 nv->port_name[6] = 0x55; 4451 nv->port_name[7] = 0x86; 4452 nv->node_name[0] = 0x20; 4453 nv->node_name[1] = 0x00; 4454 nv->node_name[2] = 0x00; 4455 nv->node_name[3] = 0xe0; 4456 nv->node_name[4] = 0x8b; 4457 nv->node_name[5] = 0x1c; 4458 nv->node_name[6] = 0x55; 4459 nv->node_name[7] = 0x86; 4460 qla24xx_nvram_wwn_from_ofw(vha, nv); 4461 nv->login_retry_count = __constant_cpu_to_le16(8); 4462 nv->interrupt_delay_timer = __constant_cpu_to_le16(0); 4463 nv->login_timeout = __constant_cpu_to_le16(0); 4464 nv->firmware_options_1 = 4465 __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); 4466 nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4); 4467 nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12); 4468 nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13); 4469 nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10); 4470 nv->efi_parameters = __constant_cpu_to_le32(0); 4471 nv->reset_delay = 5; 4472 nv->max_luns_per_target = __constant_cpu_to_le16(128); 4473 nv->port_down_retry_count = __constant_cpu_to_le16(30); 4474 nv->link_down_timeout = __constant_cpu_to_le16(30); 4475 4476 rval = 1; 4477 } 4478 4479 /* Reset Initialization control block */ 4480 memset(icb, 0, ha->init_cb_size); 4481 4482 /* Copy 1st segment. */ 4483 dptr1 = (uint8_t *)icb; 4484 dptr2 = (uint8_t *)&nv->version; 4485 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; 4486 while (cnt--) 4487 *dptr1++ = *dptr2++; 4488 4489 icb->login_retry_count = nv->login_retry_count; 4490 icb->link_down_on_nos = nv->link_down_on_nos; 4491 4492 /* Copy 2nd segment. */ 4493 dptr1 = (uint8_t *)&icb->interrupt_delay_timer; 4494 dptr2 = (uint8_t *)&nv->interrupt_delay_timer; 4495 cnt = (uint8_t *)&icb->reserved_3 - 4496 (uint8_t *)&icb->interrupt_delay_timer; 4497 while (cnt--) 4498 *dptr1++ = *dptr2++; 4499 4500 /* 4501 * Setup driver NVRAM options. 4502 */ 4503 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), 4504 "QLA2462"); 4505 4506 /* Use alternate WWN? */ 4507 if (nv->host_p & __constant_cpu_to_le32(BIT_15)) { 4508 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 4509 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 4510 } 4511 4512 /* Prepare nodename */ 4513 if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) { 4514 /* 4515 * Firmware will apply the following mask if the nodename was 4516 * not provided. 4517 */ 4518 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 4519 icb->node_name[0] &= 0xF0; 4520 } 4521 4522 /* Set host adapter parameters. */ 4523 ha->flags.disable_risc_code_load = 0; 4524 ha->flags.enable_lip_reset = 0; 4525 ha->flags.enable_lip_full_login = 4526 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0; 4527 ha->flags.enable_target_reset = 4528 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0; 4529 ha->flags.enable_led_scheme = 0; 4530 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0; 4531 4532 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & 4533 (BIT_6 | BIT_5 | BIT_4)) >> 4; 4534 4535 memcpy(ha->fw_seriallink_options24, nv->seriallink_options, 4536 sizeof(ha->fw_seriallink_options24)); 4537 4538 /* save HBA serial number */ 4539 ha->serial0 = icb->port_name[5]; 4540 ha->serial1 = icb->port_name[6]; 4541 ha->serial2 = icb->port_name[7]; 4542 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 4543 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 4544 4545 icb->execution_throttle = __constant_cpu_to_le16(0xFFFF); 4546 4547 ha->retry_count = le16_to_cpu(nv->login_retry_count); 4548 4549 /* Set minimum login_timeout to 4 seconds. */ 4550 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) 4551 nv->login_timeout = cpu_to_le16(ql2xlogintimeout); 4552 if (le16_to_cpu(nv->login_timeout) < 4) 4553 nv->login_timeout = __constant_cpu_to_le16(4); 4554 ha->login_timeout = le16_to_cpu(nv->login_timeout); 4555 icb->login_timeout = nv->login_timeout; 4556 4557 /* Set minimum RATOV to 100 tenths of a second. */ 4558 ha->r_a_tov = 100; 4559 4560 ha->loop_reset_delay = nv->reset_delay; 4561 4562 /* Link Down Timeout = 0: 4563 * 4564 * When Port Down timer expires we will start returning 4565 * I/O's to OS with "DID_NO_CONNECT". 4566 * 4567 * Link Down Timeout != 0: 4568 * 4569 * The driver waits for the link to come up after link down 4570 * before returning I/Os to OS with "DID_NO_CONNECT". 4571 */ 4572 if (le16_to_cpu(nv->link_down_timeout) == 0) { 4573 ha->loop_down_abort_time = 4574 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 4575 } else { 4576 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); 4577 ha->loop_down_abort_time = 4578 (LOOP_DOWN_TIME - ha->link_down_timeout); 4579 } 4580 4581 /* Need enough time to try and get the port back. */ 4582 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); 4583 if (qlport_down_retry) 4584 ha->port_down_retry_count = qlport_down_retry; 4585 4586 /* Set login_retry_count */ 4587 ha->login_retry_count = le16_to_cpu(nv->login_retry_count); 4588 if (ha->port_down_retry_count == 4589 le16_to_cpu(nv->port_down_retry_count) && 4590 ha->port_down_retry_count > 3) 4591 ha->login_retry_count = ha->port_down_retry_count; 4592 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 4593 ha->login_retry_count = ha->port_down_retry_count; 4594 if (ql2xloginretrycount) 4595 ha->login_retry_count = ql2xloginretrycount; 4596 4597 /* Enable ZIO. */ 4598 if (!vha->flags.init_done) { 4599 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & 4600 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 4601 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? 4602 le16_to_cpu(icb->interrupt_delay_timer): 2; 4603 } 4604 icb->firmware_options_2 &= __constant_cpu_to_le32( 4605 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); 4606 vha->flags.process_response_queue = 0; 4607 if (ha->zio_mode != QLA_ZIO_DISABLED) { 4608 ha->zio_mode = QLA_ZIO_MODE_6; 4609 4610 ql_log(ql_log_info, vha, 0x006f, 4611 "ZIO mode %d enabled; timer delay (%d us).\n", 4612 ha->zio_mode, ha->zio_timer * 100); 4613 4614 icb->firmware_options_2 |= cpu_to_le32( 4615 (uint32_t)ha->zio_mode); 4616 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); 4617 vha->flags.process_response_queue = 1; 4618 } 4619 4620 if (rval) { 4621 ql_log(ql_log_warn, vha, 0x0070, 4622 "NVRAM configuration failed.\n"); 4623 } 4624 return (rval); 4625 } 4626 4627 static int 4628 qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr, 4629 uint32_t faddr) 4630 { 4631 int rval = QLA_SUCCESS; 4632 int segments, fragment; 4633 uint32_t *dcode, dlen; 4634 uint32_t risc_addr; 4635 uint32_t risc_size; 4636 uint32_t i; 4637 struct qla_hw_data *ha = vha->hw; 4638 struct req_que *req = ha->req_q_map[0]; 4639 4640 ql_dbg(ql_dbg_init, vha, 0x008b, 4641 "FW: Loading firmware from flash (%x).\n", faddr); 4642 4643 rval = QLA_SUCCESS; 4644 4645 segments = FA_RISC_CODE_SEGMENTS; 4646 dcode = (uint32_t *)req->ring; 4647 *srisc_addr = 0; 4648 4649 /* Validate firmware image by checking version. */ 4650 qla24xx_read_flash_data(vha, dcode, faddr + 4, 4); 4651 for (i = 0; i < 4; i++) 4652 dcode[i] = be32_to_cpu(dcode[i]); 4653 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff && 4654 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) || 4655 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 && 4656 dcode[3] == 0)) { 4657 ql_log(ql_log_fatal, vha, 0x008c, 4658 "Unable to verify the integrity of flash firmware " 4659 "image.\n"); 4660 ql_log(ql_log_fatal, vha, 0x008d, 4661 "Firmware data: %08x %08x %08x %08x.\n", 4662 dcode[0], dcode[1], dcode[2], dcode[3]); 4663 4664 return QLA_FUNCTION_FAILED; 4665 } 4666 4667 while (segments && rval == QLA_SUCCESS) { 4668 /* Read segment's load information. */ 4669 qla24xx_read_flash_data(vha, dcode, faddr, 4); 4670 4671 risc_addr = be32_to_cpu(dcode[2]); 4672 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr; 4673 risc_size = be32_to_cpu(dcode[3]); 4674 4675 fragment = 0; 4676 while (risc_size > 0 && rval == QLA_SUCCESS) { 4677 dlen = (uint32_t)(ha->fw_transfer_size >> 2); 4678 if (dlen > risc_size) 4679 dlen = risc_size; 4680 4681 ql_dbg(ql_dbg_init, vha, 0x008e, 4682 "Loading risc segment@ risc addr %x " 4683 "number of dwords 0x%x offset 0x%x.\n", 4684 risc_addr, dlen, faddr); 4685 4686 qla24xx_read_flash_data(vha, dcode, faddr, dlen); 4687 for (i = 0; i < dlen; i++) 4688 dcode[i] = swab32(dcode[i]); 4689 4690 rval = qla2x00_load_ram(vha, req->dma, risc_addr, 4691 dlen); 4692 if (rval) { 4693 ql_log(ql_log_fatal, vha, 0x008f, 4694 "Failed to load segment %d of firmware.\n", 4695 fragment); 4696 break; 4697 } 4698 4699 faddr += dlen; 4700 risc_addr += dlen; 4701 risc_size -= dlen; 4702 fragment++; 4703 } 4704 4705 /* Next segment. */ 4706 segments--; 4707 } 4708 4709 return rval; 4710 } 4711 4712 #define QLA_FW_URL "ftp://ftp.qlogic.com/outgoing/linux/firmware/" 4713 4714 int 4715 qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 4716 { 4717 int rval; 4718 int i, fragment; 4719 uint16_t *wcode, *fwcode; 4720 uint32_t risc_addr, risc_size, fwclen, wlen, *seg; 4721 struct fw_blob *blob; 4722 struct qla_hw_data *ha = vha->hw; 4723 struct req_que *req = ha->req_q_map[0]; 4724 4725 /* Load firmware blob. */ 4726 blob = qla2x00_request_firmware(vha); 4727 if (!blob) { 4728 ql_log(ql_log_info, vha, 0x0083, 4729 "Fimware image unavailable.\n"); 4730 ql_log(ql_log_info, vha, 0x0084, 4731 "Firmware images can be retrieved from: "QLA_FW_URL ".\n"); 4732 return QLA_FUNCTION_FAILED; 4733 } 4734 4735 rval = QLA_SUCCESS; 4736 4737 wcode = (uint16_t *)req->ring; 4738 *srisc_addr = 0; 4739 fwcode = (uint16_t *)blob->fw->data; 4740 fwclen = 0; 4741 4742 /* Validate firmware image by checking version. */ 4743 if (blob->fw->size < 8 * sizeof(uint16_t)) { 4744 ql_log(ql_log_fatal, vha, 0x0085, 4745 "Unable to verify integrity of firmware image (%Zd).\n", 4746 blob->fw->size); 4747 goto fail_fw_integrity; 4748 } 4749 for (i = 0; i < 4; i++) 4750 wcode[i] = be16_to_cpu(fwcode[i + 4]); 4751 if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff && 4752 wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 && 4753 wcode[2] == 0 && wcode[3] == 0)) { 4754 ql_log(ql_log_fatal, vha, 0x0086, 4755 "Unable to verify integrity of firmware image.\n"); 4756 ql_log(ql_log_fatal, vha, 0x0087, 4757 "Firmware data: %04x %04x %04x %04x.\n", 4758 wcode[0], wcode[1], wcode[2], wcode[3]); 4759 goto fail_fw_integrity; 4760 } 4761 4762 seg = blob->segs; 4763 while (*seg && rval == QLA_SUCCESS) { 4764 risc_addr = *seg; 4765 *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr; 4766 risc_size = be16_to_cpu(fwcode[3]); 4767 4768 /* Validate firmware image size. */ 4769 fwclen += risc_size * sizeof(uint16_t); 4770 if (blob->fw->size < fwclen) { 4771 ql_log(ql_log_fatal, vha, 0x0088, 4772 "Unable to verify integrity of firmware image " 4773 "(%Zd).\n", blob->fw->size); 4774 goto fail_fw_integrity; 4775 } 4776 4777 fragment = 0; 4778 while (risc_size > 0 && rval == QLA_SUCCESS) { 4779 wlen = (uint16_t)(ha->fw_transfer_size >> 1); 4780 if (wlen > risc_size) 4781 wlen = risc_size; 4782 ql_dbg(ql_dbg_init, vha, 0x0089, 4783 "Loading risc segment@ risc addr %x number of " 4784 "words 0x%x.\n", risc_addr, wlen); 4785 4786 for (i = 0; i < wlen; i++) 4787 wcode[i] = swab16(fwcode[i]); 4788 4789 rval = qla2x00_load_ram(vha, req->dma, risc_addr, 4790 wlen); 4791 if (rval) { 4792 ql_log(ql_log_fatal, vha, 0x008a, 4793 "Failed to load segment %d of firmware.\n", 4794 fragment); 4795 break; 4796 } 4797 4798 fwcode += wlen; 4799 risc_addr += wlen; 4800 risc_size -= wlen; 4801 fragment++; 4802 } 4803 4804 /* Next segment. */ 4805 seg++; 4806 } 4807 return rval; 4808 4809 fail_fw_integrity: 4810 return QLA_FUNCTION_FAILED; 4811 } 4812 4813 static int 4814 qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr) 4815 { 4816 int rval; 4817 int segments, fragment; 4818 uint32_t *dcode, dlen; 4819 uint32_t risc_addr; 4820 uint32_t risc_size; 4821 uint32_t i; 4822 struct fw_blob *blob; 4823 uint32_t *fwcode, fwclen; 4824 struct qla_hw_data *ha = vha->hw; 4825 struct req_que *req = ha->req_q_map[0]; 4826 4827 /* Load firmware blob. */ 4828 blob = qla2x00_request_firmware(vha); 4829 if (!blob) { 4830 ql_log(ql_log_warn, vha, 0x0090, 4831 "Fimware image unavailable.\n"); 4832 ql_log(ql_log_warn, vha, 0x0091, 4833 "Firmware images can be retrieved from: " 4834 QLA_FW_URL ".\n"); 4835 4836 return QLA_FUNCTION_FAILED; 4837 } 4838 4839 ql_dbg(ql_dbg_init, vha, 0x0092, 4840 "FW: Loading via request-firmware.\n"); 4841 4842 rval = QLA_SUCCESS; 4843 4844 segments = FA_RISC_CODE_SEGMENTS; 4845 dcode = (uint32_t *)req->ring; 4846 *srisc_addr = 0; 4847 fwcode = (uint32_t *)blob->fw->data; 4848 fwclen = 0; 4849 4850 /* Validate firmware image by checking version. */ 4851 if (blob->fw->size < 8 * sizeof(uint32_t)) { 4852 ql_log(ql_log_fatal, vha, 0x0093, 4853 "Unable to verify integrity of firmware image (%Zd).\n", 4854 blob->fw->size); 4855 goto fail_fw_integrity; 4856 } 4857 for (i = 0; i < 4; i++) 4858 dcode[i] = be32_to_cpu(fwcode[i + 4]); 4859 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff && 4860 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) || 4861 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 && 4862 dcode[3] == 0)) { 4863 ql_log(ql_log_fatal, vha, 0x0094, 4864 "Unable to verify integrity of firmware image (%Zd).\n", 4865 blob->fw->size); 4866 ql_log(ql_log_fatal, vha, 0x0095, 4867 "Firmware data: %08x %08x %08x %08x.\n", 4868 dcode[0], dcode[1], dcode[2], dcode[3]); 4869 goto fail_fw_integrity; 4870 } 4871 4872 while (segments && rval == QLA_SUCCESS) { 4873 risc_addr = be32_to_cpu(fwcode[2]); 4874 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr; 4875 risc_size = be32_to_cpu(fwcode[3]); 4876 4877 /* Validate firmware image size. */ 4878 fwclen += risc_size * sizeof(uint32_t); 4879 if (blob->fw->size < fwclen) { 4880 ql_log(ql_log_fatal, vha, 0x0096, 4881 "Unable to verify integrity of firmware image " 4882 "(%Zd).\n", blob->fw->size); 4883 4884 goto fail_fw_integrity; 4885 } 4886 4887 fragment = 0; 4888 while (risc_size > 0 && rval == QLA_SUCCESS) { 4889 dlen = (uint32_t)(ha->fw_transfer_size >> 2); 4890 if (dlen > risc_size) 4891 dlen = risc_size; 4892 4893 ql_dbg(ql_dbg_init, vha, 0x0097, 4894 "Loading risc segment@ risc addr %x " 4895 "number of dwords 0x%x.\n", risc_addr, dlen); 4896 4897 for (i = 0; i < dlen; i++) 4898 dcode[i] = swab32(fwcode[i]); 4899 4900 rval = qla2x00_load_ram(vha, req->dma, risc_addr, 4901 dlen); 4902 if (rval) { 4903 ql_log(ql_log_fatal, vha, 0x0098, 4904 "Failed to load segment %d of firmware.\n", 4905 fragment); 4906 break; 4907 } 4908 4909 fwcode += dlen; 4910 risc_addr += dlen; 4911 risc_size -= dlen; 4912 fragment++; 4913 } 4914 4915 /* Next segment. */ 4916 segments--; 4917 } 4918 return rval; 4919 4920 fail_fw_integrity: 4921 return QLA_FUNCTION_FAILED; 4922 } 4923 4924 int 4925 qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 4926 { 4927 int rval; 4928 4929 if (ql2xfwloadbin == 1) 4930 return qla81xx_load_risc(vha, srisc_addr); 4931 4932 /* 4933 * FW Load priority: 4934 * 1) Firmware via request-firmware interface (.bin file). 4935 * 2) Firmware residing in flash. 4936 */ 4937 rval = qla24xx_load_risc_blob(vha, srisc_addr); 4938 if (rval == QLA_SUCCESS) 4939 return rval; 4940 4941 return qla24xx_load_risc_flash(vha, srisc_addr, 4942 vha->hw->flt_region_fw); 4943 } 4944 4945 int 4946 qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 4947 { 4948 int rval; 4949 struct qla_hw_data *ha = vha->hw; 4950 4951 if (ql2xfwloadbin == 2) 4952 goto try_blob_fw; 4953 4954 /* 4955 * FW Load priority: 4956 * 1) Firmware residing in flash. 4957 * 2) Firmware via request-firmware interface (.bin file). 4958 * 3) Golden-Firmware residing in flash -- limited operation. 4959 */ 4960 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw); 4961 if (rval == QLA_SUCCESS) 4962 return rval; 4963 4964 try_blob_fw: 4965 rval = qla24xx_load_risc_blob(vha, srisc_addr); 4966 if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw) 4967 return rval; 4968 4969 ql_log(ql_log_info, vha, 0x0099, 4970 "Attempting to fallback to golden firmware.\n"); 4971 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw); 4972 if (rval != QLA_SUCCESS) 4973 return rval; 4974 4975 ql_log(ql_log_info, vha, 0x009a, "Update operational firmware.\n"); 4976 ha->flags.running_gold_fw = 1; 4977 4978 return rval; 4979 } 4980 4981 void 4982 qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha) 4983 { 4984 int ret, retries; 4985 struct qla_hw_data *ha = vha->hw; 4986 4987 if (ha->flags.pci_channel_io_perm_failure) 4988 return; 4989 if (!IS_FWI2_CAPABLE(ha)) 4990 return; 4991 if (!ha->fw_major_version) 4992 return; 4993 4994 ret = qla2x00_stop_firmware(vha); 4995 for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT && 4996 ret != QLA_INVALID_COMMAND && retries ; retries--) { 4997 ha->isp_ops->reset_chip(vha); 4998 if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS) 4999 continue; 5000 if (qla2x00_setup_chip(vha) != QLA_SUCCESS) 5001 continue; 5002 ql_log(ql_log_info, vha, 0x8015, 5003 "Attempting retry of stop-firmware command.\n"); 5004 ret = qla2x00_stop_firmware(vha); 5005 } 5006 } 5007 5008 int 5009 qla24xx_configure_vhba(scsi_qla_host_t *vha) 5010 { 5011 int rval = QLA_SUCCESS; 5012 uint16_t mb[MAILBOX_REGISTER_COUNT]; 5013 struct qla_hw_data *ha = vha->hw; 5014 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 5015 struct req_que *req; 5016 struct rsp_que *rsp; 5017 5018 if (!vha->vp_idx) 5019 return -EINVAL; 5020 5021 rval = qla2x00_fw_ready(base_vha); 5022 if (ha->flags.cpu_affinity_enabled) 5023 req = ha->req_q_map[0]; 5024 else 5025 req = vha->req; 5026 rsp = req->rsp; 5027 5028 if (rval == QLA_SUCCESS) { 5029 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 5030 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); 5031 } 5032 5033 vha->flags.management_server_logged_in = 0; 5034 5035 /* Login to SNS first */ 5036 ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, BIT_1); 5037 if (mb[0] != MBS_COMMAND_COMPLETE) { 5038 ql_dbg(ql_dbg_init, vha, 0x0103, 5039 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x " 5040 "mb[6]=%x mb[7]=%x.\n", 5041 NPH_SNS, mb[0], mb[1], mb[2], mb[6], mb[7]); 5042 return (QLA_FUNCTION_FAILED); 5043 } 5044 5045 atomic_set(&vha->loop_down_timer, 0); 5046 atomic_set(&vha->loop_state, LOOP_UP); 5047 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5048 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 5049 rval = qla2x00_loop_resync(base_vha); 5050 5051 return rval; 5052 } 5053 5054 /* 84XX Support **************************************************************/ 5055 5056 static LIST_HEAD(qla_cs84xx_list); 5057 static DEFINE_MUTEX(qla_cs84xx_mutex); 5058 5059 static struct qla_chip_state_84xx * 5060 qla84xx_get_chip(struct scsi_qla_host *vha) 5061 { 5062 struct qla_chip_state_84xx *cs84xx; 5063 struct qla_hw_data *ha = vha->hw; 5064 5065 mutex_lock(&qla_cs84xx_mutex); 5066 5067 /* Find any shared 84xx chip. */ 5068 list_for_each_entry(cs84xx, &qla_cs84xx_list, list) { 5069 if (cs84xx->bus == ha->pdev->bus) { 5070 kref_get(&cs84xx->kref); 5071 goto done; 5072 } 5073 } 5074 5075 cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL); 5076 if (!cs84xx) 5077 goto done; 5078 5079 kref_init(&cs84xx->kref); 5080 spin_lock_init(&cs84xx->access_lock); 5081 mutex_init(&cs84xx->fw_update_mutex); 5082 cs84xx->bus = ha->pdev->bus; 5083 5084 list_add_tail(&cs84xx->list, &qla_cs84xx_list); 5085 done: 5086 mutex_unlock(&qla_cs84xx_mutex); 5087 return cs84xx; 5088 } 5089 5090 static void 5091 __qla84xx_chip_release(struct kref *kref) 5092 { 5093 struct qla_chip_state_84xx *cs84xx = 5094 container_of(kref, struct qla_chip_state_84xx, kref); 5095 5096 mutex_lock(&qla_cs84xx_mutex); 5097 list_del(&cs84xx->list); 5098 mutex_unlock(&qla_cs84xx_mutex); 5099 kfree(cs84xx); 5100 } 5101 5102 void 5103 qla84xx_put_chip(struct scsi_qla_host *vha) 5104 { 5105 struct qla_hw_data *ha = vha->hw; 5106 if (ha->cs84xx) 5107 kref_put(&ha->cs84xx->kref, __qla84xx_chip_release); 5108 } 5109 5110 static int 5111 qla84xx_init_chip(scsi_qla_host_t *vha) 5112 { 5113 int rval; 5114 uint16_t status[2]; 5115 struct qla_hw_data *ha = vha->hw; 5116 5117 mutex_lock(&ha->cs84xx->fw_update_mutex); 5118 5119 rval = qla84xx_verify_chip(vha, status); 5120 5121 mutex_unlock(&ha->cs84xx->fw_update_mutex); 5122 5123 return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED: 5124 QLA_SUCCESS; 5125 } 5126 5127 /* 81XX Support **************************************************************/ 5128 5129 int 5130 qla81xx_nvram_config(scsi_qla_host_t *vha) 5131 { 5132 int rval; 5133 struct init_cb_81xx *icb; 5134 struct nvram_81xx *nv; 5135 uint32_t *dptr; 5136 uint8_t *dptr1, *dptr2; 5137 uint32_t chksum; 5138 uint16_t cnt; 5139 struct qla_hw_data *ha = vha->hw; 5140 5141 rval = QLA_SUCCESS; 5142 icb = (struct init_cb_81xx *)ha->init_cb; 5143 nv = ha->nvram; 5144 5145 /* Determine NVRAM starting address. */ 5146 ha->nvram_size = sizeof(struct nvram_81xx); 5147 ha->vpd_size = FA_NVRAM_VPD_SIZE; 5148 5149 /* Get VPD data into cache */ 5150 ha->vpd = ha->nvram + VPD_OFFSET; 5151 ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2, 5152 ha->vpd_size); 5153 5154 /* Get NVRAM data into cache and calculate checksum. */ 5155 ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2, 5156 ha->nvram_size); 5157 dptr = (uint32_t *)nv; 5158 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++) 5159 chksum += le32_to_cpu(*dptr++); 5160 5161 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111, 5162 "Contents of NVRAM:\n"); 5163 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112, 5164 (uint8_t *)nv, ha->nvram_size); 5165 5166 /* Bad NVRAM data, set defaults parameters. */ 5167 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P' 5168 || nv->id[3] != ' ' || 5169 nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) { 5170 /* Reset NVRAM data. */ 5171 ql_log(ql_log_info, vha, 0x0073, 5172 "Inconisistent NVRAM detected: checksum=0x%x id=%c " 5173 "version=0x%x.\n", chksum, nv->id[0], 5174 le16_to_cpu(nv->nvram_version)); 5175 ql_log(ql_log_info, vha, 0x0074, 5176 "Falling back to functioning (yet invalid -- WWPN) " 5177 "defaults.\n"); 5178 5179 /* 5180 * Set default initialization control block. 5181 */ 5182 memset(nv, 0, ha->nvram_size); 5183 nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION); 5184 nv->version = __constant_cpu_to_le16(ICB_VERSION); 5185 nv->frame_payload_size = __constant_cpu_to_le16(2048); 5186 nv->execution_throttle = __constant_cpu_to_le16(0xFFFF); 5187 nv->exchange_count = __constant_cpu_to_le16(0); 5188 nv->port_name[0] = 0x21; 5189 nv->port_name[1] = 0x00 + ha->port_no; 5190 nv->port_name[2] = 0x00; 5191 nv->port_name[3] = 0xe0; 5192 nv->port_name[4] = 0x8b; 5193 nv->port_name[5] = 0x1c; 5194 nv->port_name[6] = 0x55; 5195 nv->port_name[7] = 0x86; 5196 nv->node_name[0] = 0x20; 5197 nv->node_name[1] = 0x00; 5198 nv->node_name[2] = 0x00; 5199 nv->node_name[3] = 0xe0; 5200 nv->node_name[4] = 0x8b; 5201 nv->node_name[5] = 0x1c; 5202 nv->node_name[6] = 0x55; 5203 nv->node_name[7] = 0x86; 5204 nv->login_retry_count = __constant_cpu_to_le16(8); 5205 nv->interrupt_delay_timer = __constant_cpu_to_le16(0); 5206 nv->login_timeout = __constant_cpu_to_le16(0); 5207 nv->firmware_options_1 = 5208 __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); 5209 nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4); 5210 nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12); 5211 nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13); 5212 nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10); 5213 nv->efi_parameters = __constant_cpu_to_le32(0); 5214 nv->reset_delay = 5; 5215 nv->max_luns_per_target = __constant_cpu_to_le16(128); 5216 nv->port_down_retry_count = __constant_cpu_to_le16(30); 5217 nv->link_down_timeout = __constant_cpu_to_le16(30); 5218 nv->enode_mac[0] = 0x00; 5219 nv->enode_mac[1] = 0x02; 5220 nv->enode_mac[2] = 0x03; 5221 nv->enode_mac[3] = 0x04; 5222 nv->enode_mac[4] = 0x05; 5223 nv->enode_mac[5] = 0x06 + ha->port_no; 5224 5225 rval = 1; 5226 } 5227 5228 /* Reset Initialization control block */ 5229 memset(icb, 0, ha->init_cb_size); 5230 5231 /* Copy 1st segment. */ 5232 dptr1 = (uint8_t *)icb; 5233 dptr2 = (uint8_t *)&nv->version; 5234 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; 5235 while (cnt--) 5236 *dptr1++ = *dptr2++; 5237 5238 icb->login_retry_count = nv->login_retry_count; 5239 5240 /* Copy 2nd segment. */ 5241 dptr1 = (uint8_t *)&icb->interrupt_delay_timer; 5242 dptr2 = (uint8_t *)&nv->interrupt_delay_timer; 5243 cnt = (uint8_t *)&icb->reserved_5 - 5244 (uint8_t *)&icb->interrupt_delay_timer; 5245 while (cnt--) 5246 *dptr1++ = *dptr2++; 5247 5248 memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac)); 5249 /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */ 5250 if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) { 5251 icb->enode_mac[0] = 0x01; 5252 icb->enode_mac[1] = 0x02; 5253 icb->enode_mac[2] = 0x03; 5254 icb->enode_mac[3] = 0x04; 5255 icb->enode_mac[4] = 0x05; 5256 icb->enode_mac[5] = 0x06 + ha->port_no; 5257 } 5258 5259 /* Use extended-initialization control block. */ 5260 memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb)); 5261 5262 /* 5263 * Setup driver NVRAM options. 5264 */ 5265 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), 5266 "QLE8XXX"); 5267 5268 /* Use alternate WWN? */ 5269 if (nv->host_p & __constant_cpu_to_le32(BIT_15)) { 5270 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 5271 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 5272 } 5273 5274 /* Prepare nodename */ 5275 if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) { 5276 /* 5277 * Firmware will apply the following mask if the nodename was 5278 * not provided. 5279 */ 5280 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 5281 icb->node_name[0] &= 0xF0; 5282 } 5283 5284 /* Set host adapter parameters. */ 5285 ha->flags.disable_risc_code_load = 0; 5286 ha->flags.enable_lip_reset = 0; 5287 ha->flags.enable_lip_full_login = 5288 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0; 5289 ha->flags.enable_target_reset = 5290 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0; 5291 ha->flags.enable_led_scheme = 0; 5292 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0; 5293 5294 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & 5295 (BIT_6 | BIT_5 | BIT_4)) >> 4; 5296 5297 /* save HBA serial number */ 5298 ha->serial0 = icb->port_name[5]; 5299 ha->serial1 = icb->port_name[6]; 5300 ha->serial2 = icb->port_name[7]; 5301 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 5302 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 5303 5304 icb->execution_throttle = __constant_cpu_to_le16(0xFFFF); 5305 5306 ha->retry_count = le16_to_cpu(nv->login_retry_count); 5307 5308 /* Set minimum login_timeout to 4 seconds. */ 5309 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) 5310 nv->login_timeout = cpu_to_le16(ql2xlogintimeout); 5311 if (le16_to_cpu(nv->login_timeout) < 4) 5312 nv->login_timeout = __constant_cpu_to_le16(4); 5313 ha->login_timeout = le16_to_cpu(nv->login_timeout); 5314 icb->login_timeout = nv->login_timeout; 5315 5316 /* Set minimum RATOV to 100 tenths of a second. */ 5317 ha->r_a_tov = 100; 5318 5319 ha->loop_reset_delay = nv->reset_delay; 5320 5321 /* Link Down Timeout = 0: 5322 * 5323 * When Port Down timer expires we will start returning 5324 * I/O's to OS with "DID_NO_CONNECT". 5325 * 5326 * Link Down Timeout != 0: 5327 * 5328 * The driver waits for the link to come up after link down 5329 * before returning I/Os to OS with "DID_NO_CONNECT". 5330 */ 5331 if (le16_to_cpu(nv->link_down_timeout) == 0) { 5332 ha->loop_down_abort_time = 5333 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 5334 } else { 5335 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); 5336 ha->loop_down_abort_time = 5337 (LOOP_DOWN_TIME - ha->link_down_timeout); 5338 } 5339 5340 /* Need enough time to try and get the port back. */ 5341 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); 5342 if (qlport_down_retry) 5343 ha->port_down_retry_count = qlport_down_retry; 5344 5345 /* Set login_retry_count */ 5346 ha->login_retry_count = le16_to_cpu(nv->login_retry_count); 5347 if (ha->port_down_retry_count == 5348 le16_to_cpu(nv->port_down_retry_count) && 5349 ha->port_down_retry_count > 3) 5350 ha->login_retry_count = ha->port_down_retry_count; 5351 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 5352 ha->login_retry_count = ha->port_down_retry_count; 5353 if (ql2xloginretrycount) 5354 ha->login_retry_count = ql2xloginretrycount; 5355 5356 /* Enable ZIO. */ 5357 if (!vha->flags.init_done) { 5358 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & 5359 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 5360 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? 5361 le16_to_cpu(icb->interrupt_delay_timer): 2; 5362 } 5363 icb->firmware_options_2 &= __constant_cpu_to_le32( 5364 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); 5365 vha->flags.process_response_queue = 0; 5366 if (ha->zio_mode != QLA_ZIO_DISABLED) { 5367 ha->zio_mode = QLA_ZIO_MODE_6; 5368 5369 ql_log(ql_log_info, vha, 0x0075, 5370 "ZIO mode %d enabled; timer delay (%d us).\n", 5371 ha->zio_mode, 5372 ha->zio_timer * 100); 5373 5374 icb->firmware_options_2 |= cpu_to_le32( 5375 (uint32_t)ha->zio_mode); 5376 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); 5377 vha->flags.process_response_queue = 1; 5378 } 5379 5380 if (rval) { 5381 ql_log(ql_log_warn, vha, 0x0076, 5382 "NVRAM configuration failed.\n"); 5383 } 5384 return (rval); 5385 } 5386 5387 int 5388 qla82xx_restart_isp(scsi_qla_host_t *vha) 5389 { 5390 int status, rval; 5391 uint32_t wait_time; 5392 struct qla_hw_data *ha = vha->hw; 5393 struct req_que *req = ha->req_q_map[0]; 5394 struct rsp_que *rsp = ha->rsp_q_map[0]; 5395 struct scsi_qla_host *vp; 5396 unsigned long flags; 5397 5398 status = qla2x00_init_rings(vha); 5399 if (!status) { 5400 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 5401 ha->flags.chip_reset_done = 1; 5402 5403 status = qla2x00_fw_ready(vha); 5404 if (!status) { 5405 ql_log(ql_log_info, vha, 0x803c, 5406 "Start configure loop, status =%d.\n", status); 5407 5408 /* Issue a marker after FW becomes ready. */ 5409 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); 5410 5411 vha->flags.online = 1; 5412 /* Wait at most MAX_TARGET RSCNs for a stable link. */ 5413 wait_time = 256; 5414 do { 5415 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5416 qla2x00_configure_loop(vha); 5417 wait_time--; 5418 } while (!atomic_read(&vha->loop_down_timer) && 5419 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) && 5420 wait_time && 5421 (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))); 5422 } 5423 5424 /* if no cable then assume it's good */ 5425 if ((vha->device_flags & DFLG_NO_CABLE)) 5426 status = 0; 5427 5428 ql_log(ql_log_info, vha, 0x8000, 5429 "Configure loop done, status = 0x%x.\n", status); 5430 } 5431 5432 if (!status) { 5433 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 5434 5435 if (!atomic_read(&vha->loop_down_timer)) { 5436 /* 5437 * Issue marker command only when we are going 5438 * to start the I/O . 5439 */ 5440 vha->marker_needed = 1; 5441 } 5442 5443 vha->flags.online = 1; 5444 5445 ha->isp_ops->enable_intrs(ha); 5446 5447 ha->isp_abort_cnt = 0; 5448 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 5449 5450 /* Update the firmware version */ 5451 status = qla82xx_check_md_needed(vha); 5452 5453 if (ha->fce) { 5454 ha->flags.fce_enabled = 1; 5455 memset(ha->fce, 0, 5456 fce_calc_size(ha->fce_bufs)); 5457 rval = qla2x00_enable_fce_trace(vha, 5458 ha->fce_dma, ha->fce_bufs, ha->fce_mb, 5459 &ha->fce_bufs); 5460 if (rval) { 5461 ql_log(ql_log_warn, vha, 0x8001, 5462 "Unable to reinitialize FCE (%d).\n", 5463 rval); 5464 ha->flags.fce_enabled = 0; 5465 } 5466 } 5467 5468 if (ha->eft) { 5469 memset(ha->eft, 0, EFT_SIZE); 5470 rval = qla2x00_enable_eft_trace(vha, 5471 ha->eft_dma, EFT_NUM_BUFFERS); 5472 if (rval) { 5473 ql_log(ql_log_warn, vha, 0x8010, 5474 "Unable to reinitialize EFT (%d).\n", 5475 rval); 5476 } 5477 } 5478 } 5479 5480 if (!status) { 5481 ql_dbg(ql_dbg_taskm, vha, 0x8011, 5482 "qla82xx_restart_isp succeeded.\n"); 5483 5484 spin_lock_irqsave(&ha->vport_slock, flags); 5485 list_for_each_entry(vp, &ha->vp_list, list) { 5486 if (vp->vp_idx) { 5487 atomic_inc(&vp->vref_count); 5488 spin_unlock_irqrestore(&ha->vport_slock, flags); 5489 5490 qla2x00_vp_abort_isp(vp); 5491 5492 spin_lock_irqsave(&ha->vport_slock, flags); 5493 atomic_dec(&vp->vref_count); 5494 } 5495 } 5496 spin_unlock_irqrestore(&ha->vport_slock, flags); 5497 5498 } else { 5499 ql_log(ql_log_warn, vha, 0x8016, 5500 "qla82xx_restart_isp **** FAILED ****.\n"); 5501 } 5502 5503 return status; 5504 } 5505 5506 void 5507 qla81xx_update_fw_options(scsi_qla_host_t *vha) 5508 { 5509 struct qla_hw_data *ha = vha->hw; 5510 5511 if (!ql2xetsenable) 5512 return; 5513 5514 /* Enable ETS Burst. */ 5515 memset(ha->fw_options, 0, sizeof(ha->fw_options)); 5516 ha->fw_options[2] |= BIT_9; 5517 qla2x00_set_fw_options(vha, ha->fw_options); 5518 } 5519 5520 /* 5521 * qla24xx_get_fcp_prio 5522 * Gets the fcp cmd priority value for the logged in port. 5523 * Looks for a match of the port descriptors within 5524 * each of the fcp prio config entries. If a match is found, 5525 * the tag (priority) value is returned. 5526 * 5527 * Input: 5528 * vha = scsi host structure pointer. 5529 * fcport = port structure pointer. 5530 * 5531 * Return: 5532 * non-zero (if found) 5533 * -1 (if not found) 5534 * 5535 * Context: 5536 * Kernel context 5537 */ 5538 static int 5539 qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) 5540 { 5541 int i, entries; 5542 uint8_t pid_match, wwn_match; 5543 int priority; 5544 uint32_t pid1, pid2; 5545 uint64_t wwn1, wwn2; 5546 struct qla_fcp_prio_entry *pri_entry; 5547 struct qla_hw_data *ha = vha->hw; 5548 5549 if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled) 5550 return -1; 5551 5552 priority = -1; 5553 entries = ha->fcp_prio_cfg->num_entries; 5554 pri_entry = &ha->fcp_prio_cfg->entry[0]; 5555 5556 for (i = 0; i < entries; i++) { 5557 pid_match = wwn_match = 0; 5558 5559 if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) { 5560 pri_entry++; 5561 continue; 5562 } 5563 5564 /* check source pid for a match */ 5565 if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) { 5566 pid1 = pri_entry->src_pid & INVALID_PORT_ID; 5567 pid2 = vha->d_id.b24 & INVALID_PORT_ID; 5568 if (pid1 == INVALID_PORT_ID) 5569 pid_match++; 5570 else if (pid1 == pid2) 5571 pid_match++; 5572 } 5573 5574 /* check destination pid for a match */ 5575 if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) { 5576 pid1 = pri_entry->dst_pid & INVALID_PORT_ID; 5577 pid2 = fcport->d_id.b24 & INVALID_PORT_ID; 5578 if (pid1 == INVALID_PORT_ID) 5579 pid_match++; 5580 else if (pid1 == pid2) 5581 pid_match++; 5582 } 5583 5584 /* check source WWN for a match */ 5585 if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) { 5586 wwn1 = wwn_to_u64(vha->port_name); 5587 wwn2 = wwn_to_u64(pri_entry->src_wwpn); 5588 if (wwn2 == (uint64_t)-1) 5589 wwn_match++; 5590 else if (wwn1 == wwn2) 5591 wwn_match++; 5592 } 5593 5594 /* check destination WWN for a match */ 5595 if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) { 5596 wwn1 = wwn_to_u64(fcport->port_name); 5597 wwn2 = wwn_to_u64(pri_entry->dst_wwpn); 5598 if (wwn2 == (uint64_t)-1) 5599 wwn_match++; 5600 else if (wwn1 == wwn2) 5601 wwn_match++; 5602 } 5603 5604 if (pid_match == 2 || wwn_match == 2) { 5605 /* Found a matching entry */ 5606 if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID) 5607 priority = pri_entry->tag; 5608 break; 5609 } 5610 5611 pri_entry++; 5612 } 5613 5614 return priority; 5615 } 5616 5617 /* 5618 * qla24xx_update_fcport_fcp_prio 5619 * Activates fcp priority for the logged in fc port 5620 * 5621 * Input: 5622 * vha = scsi host structure pointer. 5623 * fcp = port structure pointer. 5624 * 5625 * Return: 5626 * QLA_SUCCESS or QLA_FUNCTION_FAILED 5627 * 5628 * Context: 5629 * Kernel context. 5630 */ 5631 int 5632 qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) 5633 { 5634 int ret; 5635 int priority; 5636 uint16_t mb[5]; 5637 5638 if (fcport->port_type != FCT_TARGET || 5639 fcport->loop_id == FC_NO_LOOP_ID) 5640 return QLA_FUNCTION_FAILED; 5641 5642 priority = qla24xx_get_fcp_prio(vha, fcport); 5643 if (priority < 0) 5644 return QLA_FUNCTION_FAILED; 5645 5646 if (IS_QLA82XX(vha->hw)) { 5647 fcport->fcp_prio = priority & 0xf; 5648 return QLA_SUCCESS; 5649 } 5650 5651 ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb); 5652 if (ret == QLA_SUCCESS) { 5653 if (fcport->fcp_prio != priority) 5654 ql_dbg(ql_dbg_user, vha, 0x709e, 5655 "Updated FCP_CMND priority - value=%d loop_id=%d " 5656 "port_id=%02x%02x%02x.\n", priority, 5657 fcport->loop_id, fcport->d_id.b.domain, 5658 fcport->d_id.b.area, fcport->d_id.b.al_pa); 5659 fcport->fcp_prio = priority & 0xf; 5660 } else 5661 ql_dbg(ql_dbg_user, vha, 0x704f, 5662 "Unable to update FCP_CMND priority - ret=0x%x for " 5663 "loop_id=%d port_id=%02x%02x%02x.\n", ret, fcport->loop_id, 5664 fcport->d_id.b.domain, fcport->d_id.b.area, 5665 fcport->d_id.b.al_pa); 5666 return ret; 5667 } 5668 5669 /* 5670 * qla24xx_update_all_fcp_prio 5671 * Activates fcp priority for all the logged in ports 5672 * 5673 * Input: 5674 * ha = adapter block pointer. 5675 * 5676 * Return: 5677 * QLA_SUCCESS or QLA_FUNCTION_FAILED 5678 * 5679 * Context: 5680 * Kernel context. 5681 */ 5682 int 5683 qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha) 5684 { 5685 int ret; 5686 fc_port_t *fcport; 5687 5688 ret = QLA_FUNCTION_FAILED; 5689 /* We need to set priority for all logged in ports */ 5690 list_for_each_entry(fcport, &vha->vp_fcports, list) 5691 ret = qla24xx_update_fcport_fcp_prio(vha, fcport); 5692 5693 return ret; 5694 } 5695