1 /* 2 * QLogic Fibre Channel HBA Driver 3 * Copyright (c) 2003-2014 QLogic Corporation 4 * 5 * See LICENSE.qla2xxx for copyright and licensing details. 6 */ 7 #include "qla_def.h" 8 #include "qla_gbl.h" 9 10 #include <linux/delay.h> 11 #include <linux/slab.h> 12 #include <linux/vmalloc.h> 13 14 #include "qla_devtbl.h" 15 16 #ifdef CONFIG_SPARC 17 #include <asm/prom.h> 18 #endif 19 20 #include "qla_target.h" 21 22 /* 23 * QLogic ISP2x00 Hardware Support Function Prototypes. 24 */ 25 static int qla2x00_isp_firmware(scsi_qla_host_t *); 26 static int qla2x00_setup_chip(scsi_qla_host_t *); 27 static int qla2x00_fw_ready(scsi_qla_host_t *); 28 static int qla2x00_configure_hba(scsi_qla_host_t *); 29 static int qla2x00_configure_loop(scsi_qla_host_t *); 30 static int qla2x00_configure_local_loop(scsi_qla_host_t *); 31 static int qla2x00_configure_fabric(scsi_qla_host_t *); 32 static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *); 33 static int qla2x00_restart_isp(scsi_qla_host_t *); 34 35 static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *); 36 static int qla84xx_init_chip(scsi_qla_host_t *); 37 static int qla25xx_init_queues(struct qla_hw_data *); 38 static int qla24xx_post_prli_work(struct scsi_qla_host*, fc_port_t *); 39 static void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, 40 struct event_arg *ea); 41 static void qla24xx_handle_prli_done_event(struct scsi_qla_host *, 42 struct event_arg *); 43 static void __qla24xx_handle_gpdb_event(scsi_qla_host_t *, struct event_arg *); 44 45 /* SRB Extensions ---------------------------------------------------------- */ 46 47 void 48 qla2x00_sp_timeout(struct timer_list *t) 49 { 50 srb_t *sp = from_timer(sp, t, u.iocb_cmd.timer); 51 struct srb_iocb *iocb; 52 struct req_que *req; 53 unsigned long flags; 54 struct qla_hw_data *ha = sp->vha->hw; 55 56 WARN_ON_ONCE(irqs_disabled()); 57 spin_lock_irqsave(&ha->hardware_lock, flags); 58 req = sp->qpair->req; 59 req->outstanding_cmds[sp->handle] = NULL; 60 iocb = &sp->u.iocb_cmd; 61 spin_unlock_irqrestore(&ha->hardware_lock, flags); 62 iocb->timeout(sp); 63 } 64 65 void qla2x00_sp_free(srb_t *sp) 66 { 67 struct srb_iocb *iocb = &sp->u.iocb_cmd; 68 69 del_timer(&iocb->timer); 70 qla2x00_rel_sp(sp); 71 } 72 73 /* Asynchronous Login/Logout Routines -------------------------------------- */ 74 75 unsigned long 76 qla2x00_get_async_timeout(struct scsi_qla_host *vha) 77 { 78 unsigned long tmo; 79 struct qla_hw_data *ha = vha->hw; 80 81 /* Firmware should use switch negotiated r_a_tov for timeout. */ 82 tmo = ha->r_a_tov / 10 * 2; 83 if (IS_QLAFX00(ha)) { 84 tmo = FX00_DEF_RATOV * 2; 85 } else if (!IS_FWI2_CAPABLE(ha)) { 86 /* 87 * Except for earlier ISPs where the timeout is seeded from the 88 * initialization control block. 89 */ 90 tmo = ha->login_timeout; 91 } 92 return tmo; 93 } 94 95 static void qla24xx_abort_iocb_timeout(void *data) 96 { 97 srb_t *sp = data; 98 struct srb_iocb *abt = &sp->u.iocb_cmd; 99 struct qla_qpair *qpair = sp->qpair; 100 u32 handle; 101 unsigned long flags; 102 103 if (sp->cmd_sp) 104 ql_dbg(ql_dbg_async, sp->vha, 0x507c, 105 "Abort timeout - cmd hdl=%x, cmd type=%x hdl=%x, type=%x\n", 106 sp->cmd_sp->handle, sp->cmd_sp->type, 107 sp->handle, sp->type); 108 else 109 ql_dbg(ql_dbg_async, sp->vha, 0x507c, 110 "Abort timeout 2 - hdl=%x, type=%x\n", 111 sp->handle, sp->type); 112 113 spin_lock_irqsave(qpair->qp_lock_ptr, flags); 114 for (handle = 1; handle < qpair->req->num_outstanding_cmds; handle++) { 115 if (sp->cmd_sp && (qpair->req->outstanding_cmds[handle] == 116 sp->cmd_sp)) 117 qpair->req->outstanding_cmds[handle] = NULL; 118 119 /* removing the abort */ 120 if (qpair->req->outstanding_cmds[handle] == sp) { 121 qpair->req->outstanding_cmds[handle] = NULL; 122 break; 123 } 124 } 125 spin_unlock_irqrestore(qpair->qp_lock_ptr, flags); 126 127 if (sp->cmd_sp) 128 sp->cmd_sp->done(sp->cmd_sp, QLA_OS_TIMER_EXPIRED); 129 130 abt->u.abt.comp_status = CS_TIMEOUT; 131 sp->done(sp, QLA_OS_TIMER_EXPIRED); 132 } 133 134 static void qla24xx_abort_sp_done(srb_t *sp, int res) 135 { 136 struct srb_iocb *abt = &sp->u.iocb_cmd; 137 138 del_timer(&sp->u.iocb_cmd.timer); 139 if (sp->flags & SRB_WAKEUP_ON_COMP) 140 complete(&abt->u.abt.comp); 141 else 142 sp->free(sp); 143 } 144 145 static int qla24xx_async_abort_cmd(srb_t *cmd_sp, bool wait) 146 { 147 scsi_qla_host_t *vha = cmd_sp->vha; 148 struct srb_iocb *abt_iocb; 149 srb_t *sp; 150 int rval = QLA_FUNCTION_FAILED; 151 152 sp = qla2xxx_get_qpair_sp(cmd_sp->vha, cmd_sp->qpair, cmd_sp->fcport, 153 GFP_ATOMIC); 154 if (!sp) 155 return rval; 156 157 abt_iocb = &sp->u.iocb_cmd; 158 sp->type = SRB_ABT_CMD; 159 sp->name = "abort"; 160 sp->qpair = cmd_sp->qpair; 161 sp->cmd_sp = cmd_sp; 162 if (wait) 163 sp->flags = SRB_WAKEUP_ON_COMP; 164 165 abt_iocb->timeout = qla24xx_abort_iocb_timeout; 166 init_completion(&abt_iocb->u.abt.comp); 167 /* FW can send 2 x ABTS's timeout/20s */ 168 qla2x00_init_timer(sp, 42); 169 170 abt_iocb->u.abt.cmd_hndl = cmd_sp->handle; 171 abt_iocb->u.abt.req_que_no = cpu_to_le16(cmd_sp->qpair->req->id); 172 173 sp->done = qla24xx_abort_sp_done; 174 175 ql_dbg(ql_dbg_async, vha, 0x507c, 176 "Abort command issued - hdl=%x, type=%x\n", cmd_sp->handle, 177 cmd_sp->type); 178 179 rval = qla2x00_start_sp(sp); 180 if (rval != QLA_SUCCESS) { 181 sp->free(sp); 182 return rval; 183 } 184 185 if (wait) { 186 wait_for_completion(&abt_iocb->u.abt.comp); 187 rval = abt_iocb->u.abt.comp_status == CS_COMPLETE ? 188 QLA_SUCCESS : QLA_FUNCTION_FAILED; 189 sp->free(sp); 190 } 191 192 return rval; 193 } 194 195 void 196 qla2x00_async_iocb_timeout(void *data) 197 { 198 srb_t *sp = data; 199 fc_port_t *fcport = sp->fcport; 200 struct srb_iocb *lio = &sp->u.iocb_cmd; 201 int rc, h; 202 unsigned long flags; 203 204 if (fcport) { 205 ql_dbg(ql_dbg_disc, fcport->vha, 0x2071, 206 "Async-%s timeout - hdl=%x portid=%06x %8phC.\n", 207 sp->name, sp->handle, fcport->d_id.b24, fcport->port_name); 208 209 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 210 } else { 211 pr_info("Async-%s timeout - hdl=%x.\n", 212 sp->name, sp->handle); 213 } 214 215 switch (sp->type) { 216 case SRB_LOGIN_CMD: 217 rc = qla24xx_async_abort_cmd(sp, false); 218 if (rc) { 219 /* Retry as needed. */ 220 lio->u.logio.data[0] = MBS_COMMAND_ERROR; 221 lio->u.logio.data[1] = 222 lio->u.logio.flags & SRB_LOGIN_RETRIED ? 223 QLA_LOGIO_LOGIN_RETRIED : 0; 224 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags); 225 for (h = 1; h < sp->qpair->req->num_outstanding_cmds; 226 h++) { 227 if (sp->qpair->req->outstanding_cmds[h] == 228 sp) { 229 sp->qpair->req->outstanding_cmds[h] = 230 NULL; 231 break; 232 } 233 } 234 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags); 235 sp->done(sp, QLA_FUNCTION_TIMEOUT); 236 } 237 break; 238 case SRB_LOGOUT_CMD: 239 case SRB_CT_PTHRU_CMD: 240 case SRB_MB_IOCB: 241 case SRB_NACK_PLOGI: 242 case SRB_NACK_PRLI: 243 case SRB_NACK_LOGO: 244 case SRB_CTRL_VP: 245 rc = qla24xx_async_abort_cmd(sp, false); 246 if (rc) { 247 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags); 248 for (h = 1; h < sp->qpair->req->num_outstanding_cmds; 249 h++) { 250 if (sp->qpair->req->outstanding_cmds[h] == 251 sp) { 252 sp->qpair->req->outstanding_cmds[h] = 253 NULL; 254 break; 255 } 256 } 257 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags); 258 sp->done(sp, QLA_FUNCTION_TIMEOUT); 259 } 260 break; 261 default: 262 WARN_ON_ONCE(true); 263 sp->done(sp, QLA_FUNCTION_TIMEOUT); 264 break; 265 } 266 } 267 268 static void qla2x00_async_login_sp_done(srb_t *sp, int res) 269 { 270 struct scsi_qla_host *vha = sp->vha; 271 struct srb_iocb *lio = &sp->u.iocb_cmd; 272 struct event_arg ea; 273 274 ql_dbg(ql_dbg_disc, vha, 0x20dd, 275 "%s %8phC res %d \n", __func__, sp->fcport->port_name, res); 276 277 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 278 279 if (!test_bit(UNLOADING, &vha->dpc_flags)) { 280 memset(&ea, 0, sizeof(ea)); 281 ea.fcport = sp->fcport; 282 ea.data[0] = lio->u.logio.data[0]; 283 ea.data[1] = lio->u.logio.data[1]; 284 ea.iop[0] = lio->u.logio.iop[0]; 285 ea.iop[1] = lio->u.logio.iop[1]; 286 ea.sp = sp; 287 qla24xx_handle_plogi_done_event(vha, &ea); 288 } 289 290 sp->free(sp); 291 } 292 293 static inline bool 294 fcport_is_smaller(fc_port_t *fcport) 295 { 296 if (wwn_to_u64(fcport->port_name) < 297 wwn_to_u64(fcport->vha->port_name)) 298 return true; 299 else 300 return false; 301 } 302 303 static inline bool 304 fcport_is_bigger(fc_port_t *fcport) 305 { 306 return !fcport_is_smaller(fcport); 307 } 308 309 int 310 qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport, 311 uint16_t *data) 312 { 313 srb_t *sp; 314 struct srb_iocb *lio; 315 int rval = QLA_FUNCTION_FAILED; 316 317 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT) || 318 fcport->loop_id == FC_NO_LOOP_ID) { 319 ql_log(ql_log_warn, vha, 0xffff, 320 "%s: %8phC - not sending command.\n", 321 __func__, fcport->port_name); 322 return rval; 323 } 324 325 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 326 if (!sp) 327 goto done; 328 329 fcport->flags |= FCF_ASYNC_SENT; 330 fcport->logout_completed = 0; 331 332 fcport->disc_state = DSC_LOGIN_PEND; 333 sp->type = SRB_LOGIN_CMD; 334 sp->name = "login"; 335 sp->gen1 = fcport->rscn_gen; 336 sp->gen2 = fcport->login_gen; 337 338 lio = &sp->u.iocb_cmd; 339 lio->timeout = qla2x00_async_iocb_timeout; 340 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 341 342 sp->done = qla2x00_async_login_sp_done; 343 if (N2N_TOPO(fcport->vha->hw) && fcport_is_bigger(fcport)) 344 lio->u.logio.flags |= SRB_LOGIN_PRLI_ONLY; 345 else 346 lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI; 347 348 if (NVME_TARGET(vha->hw, fcport)) 349 lio->u.logio.flags |= SRB_LOGIN_SKIP_PRLI; 350 351 ql_dbg(ql_dbg_disc, vha, 0x2072, 352 "Async-login - %8phC hdl=%x, loopid=%x portid=%02x%02x%02x " 353 "retries=%d.\n", fcport->port_name, sp->handle, fcport->loop_id, 354 fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa, 355 fcport->login_retry); 356 357 rval = qla2x00_start_sp(sp); 358 if (rval != QLA_SUCCESS) { 359 fcport->flags |= FCF_LOGIN_NEEDED; 360 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 361 goto done_free_sp; 362 } 363 364 return rval; 365 366 done_free_sp: 367 sp->free(sp); 368 fcport->flags &= ~FCF_ASYNC_SENT; 369 done: 370 fcport->flags &= ~FCF_ASYNC_ACTIVE; 371 return rval; 372 } 373 374 static void qla2x00_async_logout_sp_done(srb_t *sp, int res) 375 { 376 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 377 sp->fcport->login_gen++; 378 qlt_logo_completion_handler(sp->fcport, res); 379 sp->free(sp); 380 } 381 382 int 383 qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport) 384 { 385 srb_t *sp; 386 struct srb_iocb *lio; 387 int rval = QLA_FUNCTION_FAILED; 388 389 fcport->flags |= FCF_ASYNC_SENT; 390 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 391 if (!sp) 392 goto done; 393 394 sp->type = SRB_LOGOUT_CMD; 395 sp->name = "logout"; 396 397 lio = &sp->u.iocb_cmd; 398 lio->timeout = qla2x00_async_iocb_timeout; 399 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 400 401 sp->done = qla2x00_async_logout_sp_done; 402 403 ql_dbg(ql_dbg_disc, vha, 0x2070, 404 "Async-logout - hdl=%x loop-id=%x portid=%02x%02x%02x %8phC.\n", 405 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 406 fcport->d_id.b.area, fcport->d_id.b.al_pa, 407 fcport->port_name); 408 409 rval = qla2x00_start_sp(sp); 410 if (rval != QLA_SUCCESS) 411 goto done_free_sp; 412 return rval; 413 414 done_free_sp: 415 sp->free(sp); 416 done: 417 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 418 return rval; 419 } 420 421 void 422 qla2x00_async_prlo_done(struct scsi_qla_host *vha, fc_port_t *fcport, 423 uint16_t *data) 424 { 425 fcport->flags &= ~FCF_ASYNC_ACTIVE; 426 /* Don't re-login in target mode */ 427 if (!fcport->tgt_session) 428 qla2x00_mark_device_lost(vha, fcport, 1, 0); 429 qlt_logo_completion_handler(fcport, data[0]); 430 } 431 432 static void qla2x00_async_prlo_sp_done(srb_t *sp, int res) 433 { 434 struct srb_iocb *lio = &sp->u.iocb_cmd; 435 struct scsi_qla_host *vha = sp->vha; 436 437 sp->fcport->flags &= ~FCF_ASYNC_ACTIVE; 438 if (!test_bit(UNLOADING, &vha->dpc_flags)) 439 qla2x00_post_async_prlo_done_work(sp->fcport->vha, sp->fcport, 440 lio->u.logio.data); 441 sp->free(sp); 442 } 443 444 int 445 qla2x00_async_prlo(struct scsi_qla_host *vha, fc_port_t *fcport) 446 { 447 srb_t *sp; 448 struct srb_iocb *lio; 449 int rval; 450 451 rval = QLA_FUNCTION_FAILED; 452 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 453 if (!sp) 454 goto done; 455 456 sp->type = SRB_PRLO_CMD; 457 sp->name = "prlo"; 458 459 lio = &sp->u.iocb_cmd; 460 lio->timeout = qla2x00_async_iocb_timeout; 461 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 462 463 sp->done = qla2x00_async_prlo_sp_done; 464 465 ql_dbg(ql_dbg_disc, vha, 0x2070, 466 "Async-prlo - hdl=%x loop-id=%x portid=%02x%02x%02x.\n", 467 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 468 fcport->d_id.b.area, fcport->d_id.b.al_pa); 469 470 rval = qla2x00_start_sp(sp); 471 if (rval != QLA_SUCCESS) 472 goto done_free_sp; 473 474 return rval; 475 476 done_free_sp: 477 sp->free(sp); 478 done: 479 fcport->flags &= ~FCF_ASYNC_ACTIVE; 480 return rval; 481 } 482 483 static 484 void qla24xx_handle_adisc_event(scsi_qla_host_t *vha, struct event_arg *ea) 485 { 486 struct fc_port *fcport = ea->fcport; 487 488 ql_dbg(ql_dbg_disc, vha, 0x20d2, 489 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d lid %d\n", 490 __func__, fcport->port_name, fcport->disc_state, 491 fcport->fw_login_state, ea->rc, fcport->login_gen, ea->sp->gen2, 492 fcport->rscn_gen, ea->sp->gen1, fcport->loop_id); 493 494 WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n", 495 ea->data[0]); 496 497 if (ea->data[0] != MBS_COMMAND_COMPLETE) { 498 ql_dbg(ql_dbg_disc, vha, 0x2066, 499 "%s %8phC: adisc fail: post delete\n", 500 __func__, ea->fcport->port_name); 501 /* deleted = 0 & logout_on_delete = force fw cleanup */ 502 fcport->deleted = 0; 503 fcport->logout_on_delete = 1; 504 qlt_schedule_sess_for_deletion(ea->fcport); 505 return; 506 } 507 508 if (ea->fcport->disc_state == DSC_DELETE_PEND) 509 return; 510 511 if (ea->sp->gen2 != ea->fcport->login_gen) { 512 /* target side must have changed it. */ 513 ql_dbg(ql_dbg_disc, vha, 0x20d3, 514 "%s %8phC generation changed\n", 515 __func__, ea->fcport->port_name); 516 return; 517 } else if (ea->sp->gen1 != ea->fcport->rscn_gen) { 518 qla_rscn_replay(fcport); 519 qlt_schedule_sess_for_deletion(fcport); 520 return; 521 } 522 523 __qla24xx_handle_gpdb_event(vha, ea); 524 } 525 526 static int qla_post_els_plogi_work(struct scsi_qla_host *vha, fc_port_t *fcport) 527 { 528 struct qla_work_evt *e; 529 530 e = qla2x00_alloc_work(vha, QLA_EVT_ELS_PLOGI); 531 if (!e) 532 return QLA_FUNCTION_FAILED; 533 534 e->u.fcport.fcport = fcport; 535 fcport->flags |= FCF_ASYNC_ACTIVE; 536 fcport->disc_state = DSC_LOGIN_PEND; 537 return qla2x00_post_work(vha, e); 538 } 539 540 static void qla2x00_async_adisc_sp_done(srb_t *sp, int res) 541 { 542 struct scsi_qla_host *vha = sp->vha; 543 struct event_arg ea; 544 struct srb_iocb *lio = &sp->u.iocb_cmd; 545 546 ql_dbg(ql_dbg_disc, vha, 0x2066, 547 "Async done-%s res %x %8phC\n", 548 sp->name, res, sp->fcport->port_name); 549 550 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 551 552 memset(&ea, 0, sizeof(ea)); 553 ea.rc = res; 554 ea.data[0] = lio->u.logio.data[0]; 555 ea.data[1] = lio->u.logio.data[1]; 556 ea.iop[0] = lio->u.logio.iop[0]; 557 ea.iop[1] = lio->u.logio.iop[1]; 558 ea.fcport = sp->fcport; 559 ea.sp = sp; 560 561 qla24xx_handle_adisc_event(vha, &ea); 562 563 sp->free(sp); 564 } 565 566 int 567 qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport, 568 uint16_t *data) 569 { 570 srb_t *sp; 571 struct srb_iocb *lio; 572 int rval = QLA_FUNCTION_FAILED; 573 574 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT)) 575 return rval; 576 577 fcport->flags |= FCF_ASYNC_SENT; 578 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 579 if (!sp) 580 goto done; 581 582 sp->type = SRB_ADISC_CMD; 583 sp->name = "adisc"; 584 585 lio = &sp->u.iocb_cmd; 586 lio->timeout = qla2x00_async_iocb_timeout; 587 sp->gen1 = fcport->rscn_gen; 588 sp->gen2 = fcport->login_gen; 589 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 590 591 sp->done = qla2x00_async_adisc_sp_done; 592 if (data[1] & QLA_LOGIO_LOGIN_RETRIED) 593 lio->u.logio.flags |= SRB_LOGIN_RETRIED; 594 595 ql_dbg(ql_dbg_disc, vha, 0x206f, 596 "Async-adisc - hdl=%x loopid=%x portid=%06x %8phC.\n", 597 sp->handle, fcport->loop_id, fcport->d_id.b24, fcport->port_name); 598 599 rval = qla2x00_start_sp(sp); 600 if (rval != QLA_SUCCESS) 601 goto done_free_sp; 602 603 return rval; 604 605 done_free_sp: 606 sp->free(sp); 607 done: 608 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 609 qla2x00_post_async_adisc_work(vha, fcport, data); 610 return rval; 611 } 612 613 static bool qla2x00_is_reserved_id(scsi_qla_host_t *vha, uint16_t loop_id) 614 { 615 struct qla_hw_data *ha = vha->hw; 616 617 if (IS_FWI2_CAPABLE(ha)) 618 return loop_id > NPH_LAST_HANDLE; 619 620 return (loop_id > ha->max_loop_id && loop_id < SNS_FIRST_LOOP_ID) || 621 loop_id == MANAGEMENT_SERVER || loop_id == BROADCAST; 622 } 623 624 /** 625 * qla2x00_find_new_loop_id - scan through our port list and find a new usable loop ID 626 * @vha: adapter state pointer. 627 * @dev: port structure pointer. 628 * 629 * Returns: 630 * qla2x00 local function return status code. 631 * 632 * Context: 633 * Kernel context. 634 */ 635 static int qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev) 636 { 637 int rval; 638 struct qla_hw_data *ha = vha->hw; 639 unsigned long flags = 0; 640 641 rval = QLA_SUCCESS; 642 643 spin_lock_irqsave(&ha->vport_slock, flags); 644 645 dev->loop_id = find_first_zero_bit(ha->loop_id_map, LOOPID_MAP_SIZE); 646 if (dev->loop_id >= LOOPID_MAP_SIZE || 647 qla2x00_is_reserved_id(vha, dev->loop_id)) { 648 dev->loop_id = FC_NO_LOOP_ID; 649 rval = QLA_FUNCTION_FAILED; 650 } else { 651 set_bit(dev->loop_id, ha->loop_id_map); 652 } 653 spin_unlock_irqrestore(&ha->vport_slock, flags); 654 655 if (rval == QLA_SUCCESS) 656 ql_dbg(ql_dbg_disc, dev->vha, 0x2086, 657 "Assigning new loopid=%x, portid=%x.\n", 658 dev->loop_id, dev->d_id.b24); 659 else 660 ql_log(ql_log_warn, dev->vha, 0x2087, 661 "No loop_id's available, portid=%x.\n", 662 dev->d_id.b24); 663 664 return rval; 665 } 666 667 void qla2x00_clear_loop_id(fc_port_t *fcport) 668 { 669 struct qla_hw_data *ha = fcport->vha->hw; 670 671 if (fcport->loop_id == FC_NO_LOOP_ID || 672 qla2x00_is_reserved_id(fcport->vha, fcport->loop_id)) 673 return; 674 675 clear_bit(fcport->loop_id, ha->loop_id_map); 676 fcport->loop_id = FC_NO_LOOP_ID; 677 } 678 679 static void qla24xx_handle_gnl_done_event(scsi_qla_host_t *vha, 680 struct event_arg *ea) 681 { 682 fc_port_t *fcport, *conflict_fcport; 683 struct get_name_list_extended *e; 684 u16 i, n, found = 0, loop_id; 685 port_id_t id; 686 u64 wwn; 687 u16 data[2]; 688 u8 current_login_state; 689 690 fcport = ea->fcport; 691 ql_dbg(ql_dbg_disc, vha, 0xffff, 692 "%s %8phC DS %d LS rc %d %d login %d|%d rscn %d|%d lid %d\n", 693 __func__, fcport->port_name, fcport->disc_state, 694 fcport->fw_login_state, ea->rc, 695 fcport->login_gen, fcport->last_login_gen, 696 fcport->rscn_gen, fcport->last_rscn_gen, vha->loop_id); 697 698 if (fcport->disc_state == DSC_DELETE_PEND) 699 return; 700 701 if (ea->rc) { /* rval */ 702 if (fcport->login_retry == 0) { 703 ql_dbg(ql_dbg_disc, vha, 0x20de, 704 "GNL failed Port login retry %8phN, retry cnt=%d.\n", 705 fcport->port_name, fcport->login_retry); 706 } 707 return; 708 } 709 710 if (fcport->last_rscn_gen != fcport->rscn_gen) { 711 qla_rscn_replay(fcport); 712 qlt_schedule_sess_for_deletion(fcport); 713 return; 714 } else if (fcport->last_login_gen != fcport->login_gen) { 715 ql_dbg(ql_dbg_disc, vha, 0x20e0, 716 "%s %8phC login gen changed\n", 717 __func__, fcport->port_name); 718 return; 719 } 720 721 n = ea->data[0] / sizeof(struct get_name_list_extended); 722 723 ql_dbg(ql_dbg_disc, vha, 0x20e1, 724 "%s %d %8phC n %d %02x%02x%02x lid %d \n", 725 __func__, __LINE__, fcport->port_name, n, 726 fcport->d_id.b.domain, fcport->d_id.b.area, 727 fcport->d_id.b.al_pa, fcport->loop_id); 728 729 for (i = 0; i < n; i++) { 730 e = &vha->gnl.l[i]; 731 wwn = wwn_to_u64(e->port_name); 732 id.b.domain = e->port_id[2]; 733 id.b.area = e->port_id[1]; 734 id.b.al_pa = e->port_id[0]; 735 id.b.rsvd_1 = 0; 736 737 if (memcmp((u8 *)&wwn, fcport->port_name, WWN_SIZE)) 738 continue; 739 740 if (IS_SW_RESV_ADDR(id)) 741 continue; 742 743 found = 1; 744 745 loop_id = le16_to_cpu(e->nport_handle); 746 loop_id = (loop_id & 0x7fff); 747 if (NVME_TARGET(vha->hw, fcport)) 748 current_login_state = e->current_login_state >> 4; 749 else 750 current_login_state = e->current_login_state & 0xf; 751 752 ql_dbg(ql_dbg_disc, vha, 0x20e2, 753 "%s found %8phC CLS [%x|%x] fc4_type %d ID[%06x|%06x] lid[%d|%d]\n", 754 __func__, fcport->port_name, 755 e->current_login_state, fcport->fw_login_state, 756 fcport->fc4_type, id.b24, fcport->d_id.b24, 757 loop_id, fcport->loop_id); 758 759 switch (fcport->disc_state) { 760 case DSC_DELETE_PEND: 761 case DSC_DELETED: 762 break; 763 default: 764 if ((id.b24 != fcport->d_id.b24 && 765 fcport->d_id.b24 && 766 fcport->loop_id != FC_NO_LOOP_ID) || 767 (fcport->loop_id != FC_NO_LOOP_ID && 768 fcport->loop_id != loop_id)) { 769 ql_dbg(ql_dbg_disc, vha, 0x20e3, 770 "%s %d %8phC post del sess\n", 771 __func__, __LINE__, fcport->port_name); 772 if (fcport->n2n_flag) 773 fcport->d_id.b24 = 0; 774 qlt_schedule_sess_for_deletion(fcport); 775 return; 776 } 777 break; 778 } 779 780 fcport->loop_id = loop_id; 781 if (fcport->n2n_flag) 782 fcport->d_id.b24 = id.b24; 783 784 wwn = wwn_to_u64(fcport->port_name); 785 qlt_find_sess_invalidate_other(vha, wwn, 786 id, loop_id, &conflict_fcport); 787 788 if (conflict_fcport) { 789 /* 790 * Another share fcport share the same loop_id & 791 * nport id. Conflict fcport needs to finish 792 * cleanup before this fcport can proceed to login. 793 */ 794 conflict_fcport->conflict = fcport; 795 fcport->login_pause = 1; 796 } 797 798 switch (vha->hw->current_topology) { 799 default: 800 switch (current_login_state) { 801 case DSC_LS_PRLI_COMP: 802 ql_dbg(ql_dbg_disc + ql_dbg_verbose, 803 vha, 0x20e4, "%s %d %8phC post gpdb\n", 804 __func__, __LINE__, fcport->port_name); 805 806 if ((e->prli_svc_param_word_3[0] & BIT_4) == 0) 807 fcport->port_type = FCT_INITIATOR; 808 else 809 fcport->port_type = FCT_TARGET; 810 data[0] = data[1] = 0; 811 qla2x00_post_async_adisc_work(vha, fcport, 812 data); 813 break; 814 case DSC_LS_PORT_UNAVAIL: 815 default: 816 if (fcport->loop_id == FC_NO_LOOP_ID) { 817 qla2x00_find_new_loop_id(vha, fcport); 818 fcport->fw_login_state = 819 DSC_LS_PORT_UNAVAIL; 820 } 821 ql_dbg(ql_dbg_disc, vha, 0x20e5, 822 "%s %d %8phC\n", __func__, __LINE__, 823 fcport->port_name); 824 qla24xx_fcport_handle_login(vha, fcport); 825 break; 826 } 827 break; 828 case ISP_CFG_N: 829 fcport->fw_login_state = current_login_state; 830 fcport->d_id = id; 831 switch (current_login_state) { 832 case DSC_LS_PRLI_PEND: 833 /* 834 * In the middle of PRLI. Let it finish. 835 * Allow relogin code to recheck state again 836 * with GNL. Push disc_state back to DELETED 837 * so GNL can go out again 838 */ 839 fcport->disc_state = DSC_DELETED; 840 break; 841 case DSC_LS_PRLI_COMP: 842 if ((e->prli_svc_param_word_3[0] & BIT_4) == 0) 843 fcport->port_type = FCT_INITIATOR; 844 else 845 fcport->port_type = FCT_TARGET; 846 847 data[0] = data[1] = 0; 848 qla2x00_post_async_adisc_work(vha, fcport, 849 data); 850 break; 851 case DSC_LS_PLOGI_COMP: 852 if (fcport_is_bigger(fcport)) { 853 /* local adapter is smaller */ 854 if (fcport->loop_id != FC_NO_LOOP_ID) 855 qla2x00_clear_loop_id(fcport); 856 857 fcport->loop_id = loop_id; 858 qla24xx_fcport_handle_login(vha, 859 fcport); 860 break; 861 } 862 /* fall through */ 863 default: 864 if (fcport_is_smaller(fcport)) { 865 /* local adapter is bigger */ 866 if (fcport->loop_id != FC_NO_LOOP_ID) 867 qla2x00_clear_loop_id(fcport); 868 869 fcport->loop_id = loop_id; 870 qla24xx_fcport_handle_login(vha, 871 fcport); 872 } 873 break; 874 } 875 break; 876 } /* switch (ha->current_topology) */ 877 } 878 879 if (!found) { 880 switch (vha->hw->current_topology) { 881 case ISP_CFG_F: 882 case ISP_CFG_FL: 883 for (i = 0; i < n; i++) { 884 e = &vha->gnl.l[i]; 885 id.b.domain = e->port_id[0]; 886 id.b.area = e->port_id[1]; 887 id.b.al_pa = e->port_id[2]; 888 id.b.rsvd_1 = 0; 889 loop_id = le16_to_cpu(e->nport_handle); 890 891 if (fcport->d_id.b24 == id.b24) { 892 conflict_fcport = 893 qla2x00_find_fcport_by_wwpn(vha, 894 e->port_name, 0); 895 if (conflict_fcport) { 896 ql_dbg(ql_dbg_disc + ql_dbg_verbose, 897 vha, 0x20e5, 898 "%s %d %8phC post del sess\n", 899 __func__, __LINE__, 900 conflict_fcport->port_name); 901 qlt_schedule_sess_for_deletion 902 (conflict_fcport); 903 } 904 } 905 /* 906 * FW already picked this loop id for 907 * another fcport 908 */ 909 if (fcport->loop_id == loop_id) 910 fcport->loop_id = FC_NO_LOOP_ID; 911 } 912 qla24xx_fcport_handle_login(vha, fcport); 913 break; 914 case ISP_CFG_N: 915 fcport->disc_state = DSC_DELETED; 916 if (time_after_eq(jiffies, fcport->dm_login_expire)) { 917 if (fcport->n2n_link_reset_cnt < 2) { 918 fcport->n2n_link_reset_cnt++; 919 /* 920 * remote port is not sending PLOGI. 921 * Reset link to kick start his state 922 * machine 923 */ 924 set_bit(N2N_LINK_RESET, 925 &vha->dpc_flags); 926 } else { 927 if (fcport->n2n_chip_reset < 1) { 928 ql_log(ql_log_info, vha, 0x705d, 929 "Chip reset to bring laser down"); 930 set_bit(ISP_ABORT_NEEDED, 931 &vha->dpc_flags); 932 fcport->n2n_chip_reset++; 933 } else { 934 ql_log(ql_log_info, vha, 0x705d, 935 "Remote port %8ph is not coming back\n", 936 fcport->port_name); 937 fcport->scan_state = 0; 938 } 939 } 940 qla2xxx_wake_dpc(vha); 941 } else { 942 /* 943 * report port suppose to do PLOGI. Give him 944 * more time. FW will catch it. 945 */ 946 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 947 } 948 break; 949 default: 950 break; 951 } 952 } 953 } /* gnl_event */ 954 955 static void qla24xx_async_gnl_sp_done(srb_t *sp, int res) 956 { 957 struct scsi_qla_host *vha = sp->vha; 958 unsigned long flags; 959 struct fc_port *fcport = NULL, *tf; 960 u16 i, n = 0, loop_id; 961 struct event_arg ea; 962 struct get_name_list_extended *e; 963 u64 wwn; 964 struct list_head h; 965 bool found = false; 966 967 ql_dbg(ql_dbg_disc, vha, 0x20e7, 968 "Async done-%s res %x mb[1]=%x mb[2]=%x \n", 969 sp->name, res, sp->u.iocb_cmd.u.mbx.in_mb[1], 970 sp->u.iocb_cmd.u.mbx.in_mb[2]); 971 972 if (res == QLA_FUNCTION_TIMEOUT) 973 return; 974 975 sp->fcport->flags &= ~(FCF_ASYNC_SENT|FCF_ASYNC_ACTIVE); 976 memset(&ea, 0, sizeof(ea)); 977 ea.sp = sp; 978 ea.rc = res; 979 980 if (sp->u.iocb_cmd.u.mbx.in_mb[1] >= 981 sizeof(struct get_name_list_extended)) { 982 n = sp->u.iocb_cmd.u.mbx.in_mb[1] / 983 sizeof(struct get_name_list_extended); 984 ea.data[0] = sp->u.iocb_cmd.u.mbx.in_mb[1]; /* amnt xfered */ 985 } 986 987 for (i = 0; i < n; i++) { 988 e = &vha->gnl.l[i]; 989 loop_id = le16_to_cpu(e->nport_handle); 990 /* mask out reserve bit */ 991 loop_id = (loop_id & 0x7fff); 992 set_bit(loop_id, vha->hw->loop_id_map); 993 wwn = wwn_to_u64(e->port_name); 994 995 ql_dbg(ql_dbg_disc + ql_dbg_verbose, vha, 0x20e8, 996 "%s %8phC %02x:%02x:%02x CLS %x/%x lid %x \n", 997 __func__, (void *)&wwn, e->port_id[2], e->port_id[1], 998 e->port_id[0], e->current_login_state, e->last_login_state, 999 (loop_id & 0x7fff)); 1000 } 1001 1002 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1003 1004 INIT_LIST_HEAD(&h); 1005 fcport = tf = NULL; 1006 if (!list_empty(&vha->gnl.fcports)) 1007 list_splice_init(&vha->gnl.fcports, &h); 1008 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1009 1010 list_for_each_entry_safe(fcport, tf, &h, gnl_entry) { 1011 list_del_init(&fcport->gnl_entry); 1012 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1013 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 1014 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1015 ea.fcport = fcport; 1016 1017 qla24xx_handle_gnl_done_event(vha, &ea); 1018 } 1019 1020 /* create new fcport if fw has knowledge of new sessions */ 1021 for (i = 0; i < n; i++) { 1022 port_id_t id; 1023 u64 wwnn; 1024 1025 e = &vha->gnl.l[i]; 1026 wwn = wwn_to_u64(e->port_name); 1027 1028 found = false; 1029 list_for_each_entry_safe(fcport, tf, &vha->vp_fcports, list) { 1030 if (!memcmp((u8 *)&wwn, fcport->port_name, 1031 WWN_SIZE)) { 1032 found = true; 1033 break; 1034 } 1035 } 1036 1037 id.b.domain = e->port_id[2]; 1038 id.b.area = e->port_id[1]; 1039 id.b.al_pa = e->port_id[0]; 1040 id.b.rsvd_1 = 0; 1041 1042 if (!found && wwn && !IS_SW_RESV_ADDR(id)) { 1043 ql_dbg(ql_dbg_disc, vha, 0x2065, 1044 "%s %d %8phC %06x post new sess\n", 1045 __func__, __LINE__, (u8 *)&wwn, id.b24); 1046 wwnn = wwn_to_u64(e->node_name); 1047 qla24xx_post_newsess_work(vha, &id, (u8 *)&wwn, 1048 (u8 *)&wwnn, NULL, FC4_TYPE_UNKNOWN); 1049 } 1050 } 1051 1052 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1053 vha->gnl.sent = 0; 1054 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1055 1056 sp->free(sp); 1057 } 1058 1059 int qla24xx_async_gnl(struct scsi_qla_host *vha, fc_port_t *fcport) 1060 { 1061 srb_t *sp; 1062 struct srb_iocb *mbx; 1063 int rval = QLA_FUNCTION_FAILED; 1064 unsigned long flags; 1065 u16 *mb; 1066 1067 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT)) 1068 return rval; 1069 1070 ql_dbg(ql_dbg_disc, vha, 0x20d9, 1071 "Async-gnlist WWPN %8phC \n", fcport->port_name); 1072 1073 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1074 fcport->flags |= FCF_ASYNC_SENT; 1075 fcport->disc_state = DSC_GNL; 1076 fcport->last_rscn_gen = fcport->rscn_gen; 1077 fcport->last_login_gen = fcport->login_gen; 1078 1079 list_add_tail(&fcport->gnl_entry, &vha->gnl.fcports); 1080 if (vha->gnl.sent) { 1081 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1082 return QLA_SUCCESS; 1083 } 1084 vha->gnl.sent = 1; 1085 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1086 1087 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1088 if (!sp) 1089 goto done; 1090 1091 sp->type = SRB_MB_IOCB; 1092 sp->name = "gnlist"; 1093 sp->gen1 = fcport->rscn_gen; 1094 sp->gen2 = fcport->login_gen; 1095 1096 mbx = &sp->u.iocb_cmd; 1097 mbx->timeout = qla2x00_async_iocb_timeout; 1098 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)+2); 1099 1100 mb = sp->u.iocb_cmd.u.mbx.out_mb; 1101 mb[0] = MBC_PORT_NODE_NAME_LIST; 1102 mb[1] = BIT_2 | BIT_3; 1103 mb[2] = MSW(vha->gnl.ldma); 1104 mb[3] = LSW(vha->gnl.ldma); 1105 mb[6] = MSW(MSD(vha->gnl.ldma)); 1106 mb[7] = LSW(MSD(vha->gnl.ldma)); 1107 mb[8] = vha->gnl.size; 1108 mb[9] = vha->vp_idx; 1109 1110 sp->done = qla24xx_async_gnl_sp_done; 1111 1112 ql_dbg(ql_dbg_disc, vha, 0x20da, 1113 "Async-%s - OUT WWPN %8phC hndl %x\n", 1114 sp->name, fcport->port_name, sp->handle); 1115 1116 rval = qla2x00_start_sp(sp); 1117 if (rval != QLA_SUCCESS) 1118 goto done_free_sp; 1119 1120 return rval; 1121 1122 done_free_sp: 1123 sp->free(sp); 1124 fcport->flags &= ~FCF_ASYNC_SENT; 1125 done: 1126 return rval; 1127 } 1128 1129 int qla24xx_post_gnl_work(struct scsi_qla_host *vha, fc_port_t *fcport) 1130 { 1131 struct qla_work_evt *e; 1132 1133 e = qla2x00_alloc_work(vha, QLA_EVT_GNL); 1134 if (!e) 1135 return QLA_FUNCTION_FAILED; 1136 1137 e->u.fcport.fcport = fcport; 1138 fcport->flags |= FCF_ASYNC_ACTIVE; 1139 return qla2x00_post_work(vha, e); 1140 } 1141 1142 static void qla24xx_async_gpdb_sp_done(srb_t *sp, int res) 1143 { 1144 struct scsi_qla_host *vha = sp->vha; 1145 struct qla_hw_data *ha = vha->hw; 1146 fc_port_t *fcport = sp->fcport; 1147 u16 *mb = sp->u.iocb_cmd.u.mbx.in_mb; 1148 struct event_arg ea; 1149 1150 ql_dbg(ql_dbg_disc, vha, 0x20db, 1151 "Async done-%s res %x, WWPN %8phC mb[1]=%x mb[2]=%x \n", 1152 sp->name, res, fcport->port_name, mb[1], mb[2]); 1153 1154 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 1155 1156 if (res == QLA_FUNCTION_TIMEOUT) 1157 goto done; 1158 1159 memset(&ea, 0, sizeof(ea)); 1160 ea.fcport = fcport; 1161 ea.sp = sp; 1162 1163 qla24xx_handle_gpdb_event(vha, &ea); 1164 1165 done: 1166 dma_pool_free(ha->s_dma_pool, sp->u.iocb_cmd.u.mbx.in, 1167 sp->u.iocb_cmd.u.mbx.in_dma); 1168 1169 sp->free(sp); 1170 } 1171 1172 static int qla24xx_post_prli_work(struct scsi_qla_host *vha, fc_port_t *fcport) 1173 { 1174 struct qla_work_evt *e; 1175 1176 e = qla2x00_alloc_work(vha, QLA_EVT_PRLI); 1177 if (!e) 1178 return QLA_FUNCTION_FAILED; 1179 1180 e->u.fcport.fcport = fcport; 1181 1182 return qla2x00_post_work(vha, e); 1183 } 1184 1185 static void qla2x00_async_prli_sp_done(srb_t *sp, int res) 1186 { 1187 struct scsi_qla_host *vha = sp->vha; 1188 struct srb_iocb *lio = &sp->u.iocb_cmd; 1189 struct event_arg ea; 1190 1191 ql_dbg(ql_dbg_disc, vha, 0x2129, 1192 "%s %8phC res %d \n", __func__, 1193 sp->fcport->port_name, res); 1194 1195 sp->fcport->flags &= ~FCF_ASYNC_SENT; 1196 1197 if (!test_bit(UNLOADING, &vha->dpc_flags)) { 1198 memset(&ea, 0, sizeof(ea)); 1199 ea.fcport = sp->fcport; 1200 ea.data[0] = lio->u.logio.data[0]; 1201 ea.data[1] = lio->u.logio.data[1]; 1202 ea.iop[0] = lio->u.logio.iop[0]; 1203 ea.iop[1] = lio->u.logio.iop[1]; 1204 ea.sp = sp; 1205 1206 qla24xx_handle_prli_done_event(vha, &ea); 1207 } 1208 1209 sp->free(sp); 1210 } 1211 1212 int 1213 qla24xx_async_prli(struct scsi_qla_host *vha, fc_port_t *fcport) 1214 { 1215 srb_t *sp; 1216 struct srb_iocb *lio; 1217 int rval = QLA_FUNCTION_FAILED; 1218 1219 if (!vha->flags.online) 1220 return rval; 1221 1222 if (fcport->fw_login_state == DSC_LS_PLOGI_PEND || 1223 fcport->fw_login_state == DSC_LS_PRLI_PEND) 1224 return rval; 1225 1226 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1227 if (!sp) 1228 return rval; 1229 1230 fcport->flags |= FCF_ASYNC_SENT; 1231 fcport->logout_completed = 0; 1232 1233 sp->type = SRB_PRLI_CMD; 1234 sp->name = "prli"; 1235 1236 lio = &sp->u.iocb_cmd; 1237 lio->timeout = qla2x00_async_iocb_timeout; 1238 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 1239 1240 sp->done = qla2x00_async_prli_sp_done; 1241 lio->u.logio.flags = 0; 1242 1243 if (NVME_TARGET(vha->hw, fcport)) 1244 lio->u.logio.flags |= SRB_LOGIN_NVME_PRLI; 1245 1246 ql_dbg(ql_dbg_disc, vha, 0x211b, 1247 "Async-prli - %8phC hdl=%x, loopid=%x portid=%06x retries=%d %s.\n", 1248 fcport->port_name, sp->handle, fcport->loop_id, fcport->d_id.b24, 1249 fcport->login_retry, NVME_TARGET(vha->hw, fcport) ? "nvme" : "fc"); 1250 1251 rval = qla2x00_start_sp(sp); 1252 if (rval != QLA_SUCCESS) { 1253 fcport->flags |= FCF_LOGIN_NEEDED; 1254 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1255 goto done_free_sp; 1256 } 1257 1258 return rval; 1259 1260 done_free_sp: 1261 sp->free(sp); 1262 fcport->flags &= ~FCF_ASYNC_SENT; 1263 return rval; 1264 } 1265 1266 int qla24xx_post_gpdb_work(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt) 1267 { 1268 struct qla_work_evt *e; 1269 1270 e = qla2x00_alloc_work(vha, QLA_EVT_GPDB); 1271 if (!e) 1272 return QLA_FUNCTION_FAILED; 1273 1274 e->u.fcport.fcport = fcport; 1275 e->u.fcport.opt = opt; 1276 fcport->flags |= FCF_ASYNC_ACTIVE; 1277 return qla2x00_post_work(vha, e); 1278 } 1279 1280 int qla24xx_async_gpdb(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt) 1281 { 1282 srb_t *sp; 1283 struct srb_iocb *mbx; 1284 int rval = QLA_FUNCTION_FAILED; 1285 u16 *mb; 1286 dma_addr_t pd_dma; 1287 struct port_database_24xx *pd; 1288 struct qla_hw_data *ha = vha->hw; 1289 1290 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT) || 1291 fcport->loop_id == FC_NO_LOOP_ID) { 1292 ql_log(ql_log_warn, vha, 0xffff, 1293 "%s: %8phC - not sending command.\n", 1294 __func__, fcport->port_name); 1295 return rval; 1296 } 1297 1298 fcport->disc_state = DSC_GPDB; 1299 1300 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1301 if (!sp) 1302 goto done; 1303 1304 fcport->flags |= FCF_ASYNC_SENT; 1305 sp->type = SRB_MB_IOCB; 1306 sp->name = "gpdb"; 1307 sp->gen1 = fcport->rscn_gen; 1308 sp->gen2 = fcport->login_gen; 1309 1310 mbx = &sp->u.iocb_cmd; 1311 mbx->timeout = qla2x00_async_iocb_timeout; 1312 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 1313 1314 pd = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma); 1315 if (pd == NULL) { 1316 ql_log(ql_log_warn, vha, 0xd043, 1317 "Failed to allocate port database structure.\n"); 1318 goto done_free_sp; 1319 } 1320 1321 mb = sp->u.iocb_cmd.u.mbx.out_mb; 1322 mb[0] = MBC_GET_PORT_DATABASE; 1323 mb[1] = fcport->loop_id; 1324 mb[2] = MSW(pd_dma); 1325 mb[3] = LSW(pd_dma); 1326 mb[6] = MSW(MSD(pd_dma)); 1327 mb[7] = LSW(MSD(pd_dma)); 1328 mb[9] = vha->vp_idx; 1329 mb[10] = opt; 1330 1331 mbx->u.mbx.in = (void *)pd; 1332 mbx->u.mbx.in_dma = pd_dma; 1333 1334 sp->done = qla24xx_async_gpdb_sp_done; 1335 1336 ql_dbg(ql_dbg_disc, vha, 0x20dc, 1337 "Async-%s %8phC hndl %x opt %x\n", 1338 sp->name, fcport->port_name, sp->handle, opt); 1339 1340 rval = qla2x00_start_sp(sp); 1341 if (rval != QLA_SUCCESS) 1342 goto done_free_sp; 1343 return rval; 1344 1345 done_free_sp: 1346 if (pd) 1347 dma_pool_free(ha->s_dma_pool, pd, pd_dma); 1348 1349 sp->free(sp); 1350 fcport->flags &= ~FCF_ASYNC_SENT; 1351 done: 1352 qla24xx_post_gpdb_work(vha, fcport, opt); 1353 return rval; 1354 } 1355 1356 static 1357 void __qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea) 1358 { 1359 unsigned long flags; 1360 1361 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1362 ea->fcport->login_gen++; 1363 ea->fcport->deleted = 0; 1364 ea->fcport->logout_on_delete = 1; 1365 1366 if (!ea->fcport->login_succ && !IS_SW_RESV_ADDR(ea->fcport->d_id)) { 1367 vha->fcport_count++; 1368 ea->fcport->login_succ = 1; 1369 1370 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1371 qla24xx_sched_upd_fcport(ea->fcport); 1372 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1373 } else if (ea->fcport->login_succ) { 1374 /* 1375 * We have an existing session. A late RSCN delivery 1376 * must have triggered the session to be re-validate. 1377 * Session is still valid. 1378 */ 1379 ql_dbg(ql_dbg_disc, vha, 0x20d6, 1380 "%s %d %8phC session revalidate success\n", 1381 __func__, __LINE__, ea->fcport->port_name); 1382 ea->fcport->disc_state = DSC_LOGIN_COMPLETE; 1383 } 1384 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1385 } 1386 1387 static 1388 void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea) 1389 { 1390 fc_port_t *fcport = ea->fcport; 1391 struct port_database_24xx *pd; 1392 struct srb *sp = ea->sp; 1393 uint8_t ls; 1394 1395 pd = (struct port_database_24xx *)sp->u.iocb_cmd.u.mbx.in; 1396 1397 fcport->flags &= ~FCF_ASYNC_SENT; 1398 1399 ql_dbg(ql_dbg_disc, vha, 0x20d2, 1400 "%s %8phC DS %d LS %d fc4_type %x rc %d\n", __func__, 1401 fcport->port_name, fcport->disc_state, pd->current_login_state, 1402 fcport->fc4_type, ea->rc); 1403 1404 if (fcport->disc_state == DSC_DELETE_PEND) 1405 return; 1406 1407 if (NVME_TARGET(vha->hw, fcport)) 1408 ls = pd->current_login_state >> 4; 1409 else 1410 ls = pd->current_login_state & 0xf; 1411 1412 if (ea->sp->gen2 != fcport->login_gen) { 1413 /* target side must have changed it. */ 1414 1415 ql_dbg(ql_dbg_disc, vha, 0x20d3, 1416 "%s %8phC generation changed\n", 1417 __func__, fcport->port_name); 1418 return; 1419 } else if (ea->sp->gen1 != fcport->rscn_gen) { 1420 qla_rscn_replay(fcport); 1421 qlt_schedule_sess_for_deletion(fcport); 1422 return; 1423 } 1424 1425 switch (ls) { 1426 case PDS_PRLI_COMPLETE: 1427 __qla24xx_parse_gpdb(vha, fcport, pd); 1428 break; 1429 case PDS_PLOGI_PENDING: 1430 case PDS_PLOGI_COMPLETE: 1431 case PDS_PRLI_PENDING: 1432 case PDS_PRLI2_PENDING: 1433 /* Set discovery state back to GNL to Relogin attempt */ 1434 if (qla_dual_mode_enabled(vha) || 1435 qla_ini_mode_enabled(vha)) { 1436 fcport->disc_state = DSC_GNL; 1437 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1438 } 1439 return; 1440 case PDS_LOGO_PENDING: 1441 case PDS_PORT_UNAVAILABLE: 1442 default: 1443 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC post del sess\n", 1444 __func__, __LINE__, fcport->port_name); 1445 qlt_schedule_sess_for_deletion(fcport); 1446 return; 1447 } 1448 __qla24xx_handle_gpdb_event(vha, ea); 1449 } /* gpdb event */ 1450 1451 static void qla_chk_n2n_b4_login(struct scsi_qla_host *vha, fc_port_t *fcport) 1452 { 1453 u8 login = 0; 1454 int rc; 1455 1456 if (qla_tgt_mode_enabled(vha)) 1457 return; 1458 1459 if (qla_dual_mode_enabled(vha)) { 1460 if (N2N_TOPO(vha->hw)) { 1461 u64 mywwn, wwn; 1462 1463 mywwn = wwn_to_u64(vha->port_name); 1464 wwn = wwn_to_u64(fcport->port_name); 1465 if (mywwn > wwn) 1466 login = 1; 1467 else if ((fcport->fw_login_state == DSC_LS_PLOGI_COMP) 1468 && time_after_eq(jiffies, 1469 fcport->plogi_nack_done_deadline)) 1470 login = 1; 1471 } else { 1472 login = 1; 1473 } 1474 } else { 1475 /* initiator mode */ 1476 login = 1; 1477 } 1478 1479 if (login && fcport->login_retry) { 1480 fcport->login_retry--; 1481 if (fcport->loop_id == FC_NO_LOOP_ID) { 1482 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL; 1483 rc = qla2x00_find_new_loop_id(vha, fcport); 1484 if (rc) { 1485 ql_dbg(ql_dbg_disc, vha, 0x20e6, 1486 "%s %d %8phC post del sess - out of loopid\n", 1487 __func__, __LINE__, fcport->port_name); 1488 fcport->scan_state = 0; 1489 qlt_schedule_sess_for_deletion(fcport); 1490 return; 1491 } 1492 } 1493 ql_dbg(ql_dbg_disc, vha, 0x20bf, 1494 "%s %d %8phC post login\n", 1495 __func__, __LINE__, fcport->port_name); 1496 qla2x00_post_async_login_work(vha, fcport, NULL); 1497 } 1498 } 1499 1500 int qla24xx_fcport_handle_login(struct scsi_qla_host *vha, fc_port_t *fcport) 1501 { 1502 u16 data[2]; 1503 u64 wwn; 1504 u16 sec; 1505 1506 ql_dbg(ql_dbg_disc, vha, 0x20d8, 1507 "%s %8phC DS %d LS %d P %d fl %x confl %p rscn %d|%d login %d lid %d scan %d\n", 1508 __func__, fcport->port_name, fcport->disc_state, 1509 fcport->fw_login_state, fcport->login_pause, fcport->flags, 1510 fcport->conflict, fcport->last_rscn_gen, fcport->rscn_gen, 1511 fcport->login_gen, fcport->loop_id, fcport->scan_state); 1512 1513 if (fcport->scan_state != QLA_FCPORT_FOUND) 1514 return 0; 1515 1516 if ((fcport->loop_id != FC_NO_LOOP_ID) && 1517 qla_dual_mode_enabled(vha) && 1518 ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) || 1519 (fcport->fw_login_state == DSC_LS_PRLI_PEND))) 1520 return 0; 1521 1522 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP && 1523 !N2N_TOPO(vha->hw)) { 1524 if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) { 1525 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1526 return 0; 1527 } 1528 } 1529 1530 /* Target won't initiate port login if fabric is present */ 1531 if (vha->host->active_mode == MODE_TARGET && !N2N_TOPO(vha->hw)) 1532 return 0; 1533 1534 if (fcport->flags & FCF_ASYNC_SENT) { 1535 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1536 return 0; 1537 } 1538 1539 switch (fcport->disc_state) { 1540 case DSC_DELETED: 1541 wwn = wwn_to_u64(fcport->node_name); 1542 switch (vha->hw->current_topology) { 1543 case ISP_CFG_N: 1544 if (fcport_is_smaller(fcport)) { 1545 /* this adapter is bigger */ 1546 if (fcport->login_retry) { 1547 if (fcport->loop_id == FC_NO_LOOP_ID) { 1548 qla2x00_find_new_loop_id(vha, 1549 fcport); 1550 fcport->fw_login_state = 1551 DSC_LS_PORT_UNAVAIL; 1552 } 1553 fcport->login_retry--; 1554 qla_post_els_plogi_work(vha, fcport); 1555 } else { 1556 ql_log(ql_log_info, vha, 0x705d, 1557 "Unable to reach remote port %8phC", 1558 fcport->port_name); 1559 } 1560 } else { 1561 qla24xx_post_gnl_work(vha, fcport); 1562 } 1563 break; 1564 default: 1565 if (wwn == 0) { 1566 ql_dbg(ql_dbg_disc, vha, 0xffff, 1567 "%s %d %8phC post GNNID\n", 1568 __func__, __LINE__, fcport->port_name); 1569 qla24xx_post_gnnid_work(vha, fcport); 1570 } else if (fcport->loop_id == FC_NO_LOOP_ID) { 1571 ql_dbg(ql_dbg_disc, vha, 0x20bd, 1572 "%s %d %8phC post gnl\n", 1573 __func__, __LINE__, fcport->port_name); 1574 qla24xx_post_gnl_work(vha, fcport); 1575 } else { 1576 qla_chk_n2n_b4_login(vha, fcport); 1577 } 1578 break; 1579 } 1580 break; 1581 1582 case DSC_GNL: 1583 switch (vha->hw->current_topology) { 1584 case ISP_CFG_N: 1585 if ((fcport->current_login_state & 0xf) == 0x6) { 1586 ql_dbg(ql_dbg_disc, vha, 0x2118, 1587 "%s %d %8phC post GPDB work\n", 1588 __func__, __LINE__, fcport->port_name); 1589 fcport->chip_reset = 1590 vha->hw->base_qpair->chip_reset; 1591 qla24xx_post_gpdb_work(vha, fcport, 0); 1592 } else { 1593 ql_dbg(ql_dbg_disc, vha, 0x2118, 1594 "%s %d %8phC post %s PRLI\n", 1595 __func__, __LINE__, fcport->port_name, 1596 NVME_TARGET(vha->hw, fcport) ? "NVME" : 1597 "FC"); 1598 qla24xx_post_prli_work(vha, fcport); 1599 } 1600 break; 1601 default: 1602 if (fcport->login_pause) { 1603 fcport->last_rscn_gen = fcport->rscn_gen; 1604 fcport->last_login_gen = fcport->login_gen; 1605 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1606 break; 1607 } 1608 qla_chk_n2n_b4_login(vha, fcport); 1609 break; 1610 } 1611 break; 1612 1613 case DSC_LOGIN_FAILED: 1614 if (N2N_TOPO(vha->hw)) 1615 qla_chk_n2n_b4_login(vha, fcport); 1616 else 1617 qlt_schedule_sess_for_deletion(fcport); 1618 break; 1619 1620 case DSC_LOGIN_COMPLETE: 1621 /* recheck login state */ 1622 data[0] = data[1] = 0; 1623 qla2x00_post_async_adisc_work(vha, fcport, data); 1624 break; 1625 1626 case DSC_LOGIN_PEND: 1627 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) 1628 qla24xx_post_prli_work(vha, fcport); 1629 break; 1630 1631 case DSC_UPD_FCPORT: 1632 sec = jiffies_to_msecs(jiffies - 1633 fcport->jiffies_at_registration)/1000; 1634 if (fcport->sec_since_registration < sec && sec && 1635 !(sec % 60)) { 1636 fcport->sec_since_registration = sec; 1637 ql_dbg(ql_dbg_disc, fcport->vha, 0xffff, 1638 "%s %8phC - Slow Rport registration(%d Sec)\n", 1639 __func__, fcport->port_name, sec); 1640 } 1641 1642 if (fcport->next_disc_state != DSC_DELETE_PEND) 1643 fcport->next_disc_state = DSC_ADISC; 1644 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1645 break; 1646 1647 default: 1648 break; 1649 } 1650 1651 return 0; 1652 } 1653 1654 int qla24xx_post_newsess_work(struct scsi_qla_host *vha, port_id_t *id, 1655 u8 *port_name, u8 *node_name, void *pla, u8 fc4_type) 1656 { 1657 struct qla_work_evt *e; 1658 1659 e = qla2x00_alloc_work(vha, QLA_EVT_NEW_SESS); 1660 if (!e) 1661 return QLA_FUNCTION_FAILED; 1662 1663 e->u.new_sess.id = *id; 1664 e->u.new_sess.pla = pla; 1665 e->u.new_sess.fc4_type = fc4_type; 1666 memcpy(e->u.new_sess.port_name, port_name, WWN_SIZE); 1667 if (node_name) 1668 memcpy(e->u.new_sess.node_name, node_name, WWN_SIZE); 1669 1670 return qla2x00_post_work(vha, e); 1671 } 1672 1673 void qla2x00_handle_rscn(scsi_qla_host_t *vha, struct event_arg *ea) 1674 { 1675 fc_port_t *fcport; 1676 unsigned long flags; 1677 1678 fcport = qla2x00_find_fcport_by_nportid(vha, &ea->id, 1); 1679 if (fcport) { 1680 fcport->scan_needed = 1; 1681 fcport->rscn_gen++; 1682 } 1683 1684 spin_lock_irqsave(&vha->work_lock, flags); 1685 if (vha->scan.scan_flags == 0) { 1686 ql_dbg(ql_dbg_disc, vha, 0xffff, "%s: schedule\n", __func__); 1687 vha->scan.scan_flags |= SF_QUEUED; 1688 schedule_delayed_work(&vha->scan.scan_work, 5); 1689 } 1690 spin_unlock_irqrestore(&vha->work_lock, flags); 1691 } 1692 1693 void qla24xx_handle_relogin_event(scsi_qla_host_t *vha, 1694 struct event_arg *ea) 1695 { 1696 fc_port_t *fcport = ea->fcport; 1697 1698 if (test_bit(UNLOADING, &vha->dpc_flags)) 1699 return; 1700 1701 ql_dbg(ql_dbg_disc, vha, 0x2102, 1702 "%s %8phC DS %d LS %d P %d del %d cnfl %p rscn %d|%d login %d|%d fl %x\n", 1703 __func__, fcport->port_name, fcport->disc_state, 1704 fcport->fw_login_state, fcport->login_pause, 1705 fcport->deleted, fcport->conflict, 1706 fcport->last_rscn_gen, fcport->rscn_gen, 1707 fcport->last_login_gen, fcport->login_gen, 1708 fcport->flags); 1709 1710 if (fcport->last_rscn_gen != fcport->rscn_gen) { 1711 ql_dbg(ql_dbg_disc, vha, 0x20e9, "%s %d %8phC post gnl\n", 1712 __func__, __LINE__, fcport->port_name); 1713 qla24xx_post_gnl_work(vha, fcport); 1714 return; 1715 } 1716 1717 qla24xx_fcport_handle_login(vha, fcport); 1718 } 1719 1720 void qla_handle_els_plogi_done(scsi_qla_host_t *vha, 1721 struct event_arg *ea) 1722 { 1723 /* for pure Target Mode, PRLI will not be initiated */ 1724 if (vha->host->active_mode == MODE_TARGET) 1725 return; 1726 1727 ql_dbg(ql_dbg_disc, vha, 0x2118, 1728 "%s %d %8phC post PRLI\n", 1729 __func__, __LINE__, ea->fcport->port_name); 1730 qla24xx_post_prli_work(vha, ea->fcport); 1731 } 1732 1733 /* 1734 * RSCN(s) came in for this fcport, but the RSCN(s) was not able 1735 * to be consumed by the fcport 1736 */ 1737 void qla_rscn_replay(fc_port_t *fcport) 1738 { 1739 struct event_arg ea; 1740 1741 switch (fcport->disc_state) { 1742 case DSC_DELETE_PEND: 1743 return; 1744 default: 1745 break; 1746 } 1747 1748 if (fcport->scan_needed) { 1749 memset(&ea, 0, sizeof(ea)); 1750 ea.id = fcport->d_id; 1751 ea.id.b.rsvd_1 = RSCN_PORT_ADDR; 1752 qla2x00_handle_rscn(fcport->vha, &ea); 1753 } 1754 } 1755 1756 static void 1757 qla2x00_tmf_iocb_timeout(void *data) 1758 { 1759 srb_t *sp = data; 1760 struct srb_iocb *tmf = &sp->u.iocb_cmd; 1761 1762 tmf->u.tmf.comp_status = CS_TIMEOUT; 1763 complete(&tmf->u.tmf.comp); 1764 } 1765 1766 static void qla2x00_tmf_sp_done(srb_t *sp, int res) 1767 { 1768 struct srb_iocb *tmf = &sp->u.iocb_cmd; 1769 1770 complete(&tmf->u.tmf.comp); 1771 } 1772 1773 int 1774 qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint32_t lun, 1775 uint32_t tag) 1776 { 1777 struct scsi_qla_host *vha = fcport->vha; 1778 struct srb_iocb *tm_iocb; 1779 srb_t *sp; 1780 int rval = QLA_FUNCTION_FAILED; 1781 1782 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1783 if (!sp) 1784 goto done; 1785 1786 tm_iocb = &sp->u.iocb_cmd; 1787 sp->type = SRB_TM_CMD; 1788 sp->name = "tmf"; 1789 1790 tm_iocb->timeout = qla2x00_tmf_iocb_timeout; 1791 init_completion(&tm_iocb->u.tmf.comp); 1792 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)); 1793 1794 tm_iocb->u.tmf.flags = flags; 1795 tm_iocb->u.tmf.lun = lun; 1796 tm_iocb->u.tmf.data = tag; 1797 sp->done = qla2x00_tmf_sp_done; 1798 1799 ql_dbg(ql_dbg_taskm, vha, 0x802f, 1800 "Async-tmf hdl=%x loop-id=%x portid=%02x%02x%02x.\n", 1801 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 1802 fcport->d_id.b.area, fcport->d_id.b.al_pa); 1803 1804 rval = qla2x00_start_sp(sp); 1805 if (rval != QLA_SUCCESS) 1806 goto done_free_sp; 1807 wait_for_completion(&tm_iocb->u.tmf.comp); 1808 1809 rval = tm_iocb->u.tmf.data; 1810 1811 if (rval != QLA_SUCCESS) { 1812 ql_log(ql_log_warn, vha, 0x8030, 1813 "TM IOCB failed (%x).\n", rval); 1814 } 1815 1816 if (!test_bit(UNLOADING, &vha->dpc_flags) && !IS_QLAFX00(vha->hw)) { 1817 flags = tm_iocb->u.tmf.flags; 1818 lun = (uint16_t)tm_iocb->u.tmf.lun; 1819 1820 /* Issue Marker IOCB */ 1821 qla2x00_marker(vha, vha->hw->base_qpair, 1822 fcport->loop_id, lun, 1823 flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID); 1824 } 1825 1826 done_free_sp: 1827 sp->free(sp); 1828 fcport->flags &= ~FCF_ASYNC_SENT; 1829 done: 1830 return rval; 1831 } 1832 1833 int 1834 qla24xx_async_abort_command(srb_t *sp) 1835 { 1836 unsigned long flags = 0; 1837 1838 uint32_t handle; 1839 fc_port_t *fcport = sp->fcport; 1840 struct qla_qpair *qpair = sp->qpair; 1841 struct scsi_qla_host *vha = fcport->vha; 1842 struct req_que *req = qpair->req; 1843 1844 spin_lock_irqsave(qpair->qp_lock_ptr, flags); 1845 for (handle = 1; handle < req->num_outstanding_cmds; handle++) { 1846 if (req->outstanding_cmds[handle] == sp) 1847 break; 1848 } 1849 spin_unlock_irqrestore(qpair->qp_lock_ptr, flags); 1850 1851 if (handle == req->num_outstanding_cmds) { 1852 /* Command not found. */ 1853 return QLA_FUNCTION_FAILED; 1854 } 1855 if (sp->type == SRB_FXIOCB_DCMD) 1856 return qlafx00_fx_disc(vha, &vha->hw->mr.fcport, 1857 FXDISC_ABORT_IOCTL); 1858 1859 return qla24xx_async_abort_cmd(sp, true); 1860 } 1861 1862 static void 1863 qla24xx_handle_prli_done_event(struct scsi_qla_host *vha, struct event_arg *ea) 1864 { 1865 WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n", 1866 ea->data[0]); 1867 1868 switch (ea->data[0]) { 1869 case MBS_COMMAND_COMPLETE: 1870 ql_dbg(ql_dbg_disc, vha, 0x2118, 1871 "%s %d %8phC post gpdb\n", 1872 __func__, __LINE__, ea->fcport->port_name); 1873 1874 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset; 1875 ea->fcport->logout_on_delete = 1; 1876 ea->fcport->nvme_prli_service_param = ea->iop[0]; 1877 if (ea->iop[0] & NVME_PRLI_SP_FIRST_BURST) 1878 ea->fcport->nvme_first_burst_size = 1879 (ea->iop[1] & 0xffff) * 512; 1880 else 1881 ea->fcport->nvme_first_burst_size = 0; 1882 qla24xx_post_gpdb_work(vha, ea->fcport, 0); 1883 break; 1884 default: 1885 if ((ea->iop[0] == LSC_SCODE_ELS_REJECT) && 1886 (ea->iop[1] == 0x50000)) { /* reson 5=busy expl:0x0 */ 1887 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1888 ea->fcport->fw_login_state = DSC_LS_PLOGI_COMP; 1889 break; 1890 } 1891 1892 /* 1893 * Retry PRLI with other FC-4 type if failure occurred on dual 1894 * FCP/NVMe port 1895 */ 1896 if (NVME_FCP_TARGET(ea->fcport)) { 1897 ql_dbg(ql_dbg_disc, vha, 0x2118, 1898 "%s %d %8phC post %s prli\n", 1899 __func__, __LINE__, ea->fcport->port_name, 1900 (ea->fcport->fc4_type & FS_FC4TYPE_NVME) ? 1901 "NVMe" : "FCP"); 1902 if (vha->hw->fc4_type_priority == FC4_PRIORITY_NVME) 1903 ea->fcport->fc4_type &= ~FS_FC4TYPE_NVME; 1904 else 1905 ea->fcport->fc4_type &= ~FS_FC4TYPE_FCP; 1906 } 1907 1908 ea->fcport->flags &= ~FCF_ASYNC_SENT; 1909 ea->fcport->keep_nport_handle = 0; 1910 ea->fcport->logout_on_delete = 1; 1911 qlt_schedule_sess_for_deletion(ea->fcport); 1912 break; 1913 } 1914 } 1915 1916 void 1917 qla24xx_handle_plogi_done_event(struct scsi_qla_host *vha, struct event_arg *ea) 1918 { 1919 port_id_t cid; /* conflict Nport id */ 1920 u16 lid; 1921 struct fc_port *conflict_fcport; 1922 unsigned long flags; 1923 struct fc_port *fcport = ea->fcport; 1924 1925 ql_dbg(ql_dbg_disc, vha, 0xffff, 1926 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d data %x|%x iop %x|%x\n", 1927 __func__, fcport->port_name, fcport->disc_state, 1928 fcport->fw_login_state, ea->rc, ea->sp->gen2, fcport->login_gen, 1929 ea->sp->gen1, fcport->rscn_gen, 1930 ea->data[0], ea->data[1], ea->iop[0], ea->iop[1]); 1931 1932 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) || 1933 (fcport->fw_login_state == DSC_LS_PRLI_PEND)) { 1934 ql_dbg(ql_dbg_disc, vha, 0x20ea, 1935 "%s %d %8phC Remote is trying to login\n", 1936 __func__, __LINE__, fcport->port_name); 1937 return; 1938 } 1939 1940 if ((fcport->disc_state == DSC_DELETE_PEND) || 1941 (fcport->disc_state == DSC_DELETED)) { 1942 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1943 return; 1944 } 1945 1946 if (ea->sp->gen2 != fcport->login_gen) { 1947 /* target side must have changed it. */ 1948 ql_dbg(ql_dbg_disc, vha, 0x20d3, 1949 "%s %8phC generation changed\n", 1950 __func__, fcport->port_name); 1951 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1952 return; 1953 } else if (ea->sp->gen1 != fcport->rscn_gen) { 1954 ql_dbg(ql_dbg_disc, vha, 0x20d3, 1955 "%s %8phC RSCN generation changed\n", 1956 __func__, fcport->port_name); 1957 qla_rscn_replay(fcport); 1958 qlt_schedule_sess_for_deletion(fcport); 1959 return; 1960 } 1961 1962 WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n", 1963 ea->data[0]); 1964 1965 switch (ea->data[0]) { 1966 case MBS_COMMAND_COMPLETE: 1967 /* 1968 * Driver must validate login state - If PRLI not complete, 1969 * force a relogin attempt via implicit LOGO, PLOGI, and PRLI 1970 * requests. 1971 */ 1972 if (NVME_TARGET(vha->hw, ea->fcport)) { 1973 ql_dbg(ql_dbg_disc, vha, 0x2117, 1974 "%s %d %8phC post prli\n", 1975 __func__, __LINE__, ea->fcport->port_name); 1976 qla24xx_post_prli_work(vha, ea->fcport); 1977 } else { 1978 ql_dbg(ql_dbg_disc, vha, 0x20ea, 1979 "%s %d %8phC LoopID 0x%x in use with %06x. post gnl\n", 1980 __func__, __LINE__, ea->fcport->port_name, 1981 ea->fcport->loop_id, ea->fcport->d_id.b24); 1982 1983 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map); 1984 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1985 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset; 1986 ea->fcport->logout_on_delete = 1; 1987 ea->fcport->send_els_logo = 0; 1988 ea->fcport->fw_login_state = DSC_LS_PRLI_COMP; 1989 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1990 1991 qla24xx_post_gpdb_work(vha, ea->fcport, 0); 1992 } 1993 break; 1994 case MBS_COMMAND_ERROR: 1995 ql_dbg(ql_dbg_disc, vha, 0x20eb, "%s %d %8phC cmd error %x\n", 1996 __func__, __LINE__, ea->fcport->port_name, ea->data[1]); 1997 1998 ea->fcport->flags &= ~FCF_ASYNC_SENT; 1999 ea->fcport->disc_state = DSC_LOGIN_FAILED; 2000 if (ea->data[1] & QLA_LOGIO_LOGIN_RETRIED) 2001 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 2002 else 2003 qla2x00_mark_device_lost(vha, ea->fcport, 1, 0); 2004 break; 2005 case MBS_LOOP_ID_USED: 2006 /* data[1] = IO PARAM 1 = nport ID */ 2007 cid.b.domain = (ea->iop[1] >> 16) & 0xff; 2008 cid.b.area = (ea->iop[1] >> 8) & 0xff; 2009 cid.b.al_pa = ea->iop[1] & 0xff; 2010 cid.b.rsvd_1 = 0; 2011 2012 ql_dbg(ql_dbg_disc, vha, 0x20ec, 2013 "%s %d %8phC lid %#x in use with pid %06x post gnl\n", 2014 __func__, __LINE__, ea->fcport->port_name, 2015 ea->fcport->loop_id, cid.b24); 2016 2017 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map); 2018 ea->fcport->loop_id = FC_NO_LOOP_ID; 2019 qla24xx_post_gnl_work(vha, ea->fcport); 2020 break; 2021 case MBS_PORT_ID_USED: 2022 lid = ea->iop[1] & 0xffff; 2023 qlt_find_sess_invalidate_other(vha, 2024 wwn_to_u64(ea->fcport->port_name), 2025 ea->fcport->d_id, lid, &conflict_fcport); 2026 2027 if (conflict_fcport) { 2028 /* 2029 * Another fcport share the same loop_id/nport id. 2030 * Conflict fcport needs to finish cleanup before this 2031 * fcport can proceed to login. 2032 */ 2033 conflict_fcport->conflict = ea->fcport; 2034 ea->fcport->login_pause = 1; 2035 2036 ql_dbg(ql_dbg_disc, vha, 0x20ed, 2037 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. post gidpn\n", 2038 __func__, __LINE__, ea->fcport->port_name, 2039 ea->fcport->d_id.b24, lid); 2040 } else { 2041 ql_dbg(ql_dbg_disc, vha, 0x20ed, 2042 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. sched delete\n", 2043 __func__, __LINE__, ea->fcport->port_name, 2044 ea->fcport->d_id.b24, lid); 2045 2046 qla2x00_clear_loop_id(ea->fcport); 2047 set_bit(lid, vha->hw->loop_id_map); 2048 ea->fcport->loop_id = lid; 2049 ea->fcport->keep_nport_handle = 0; 2050 qlt_schedule_sess_for_deletion(ea->fcport); 2051 } 2052 break; 2053 } 2054 return; 2055 } 2056 2057 void 2058 qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport, 2059 uint16_t *data) 2060 { 2061 qlt_logo_completion_handler(fcport, data[0]); 2062 fcport->login_gen++; 2063 fcport->flags &= ~FCF_ASYNC_ACTIVE; 2064 return; 2065 } 2066 2067 /****************************************************************************/ 2068 /* QLogic ISP2x00 Hardware Support Functions. */ 2069 /****************************************************************************/ 2070 2071 static int 2072 qla83xx_nic_core_fw_load(scsi_qla_host_t *vha) 2073 { 2074 int rval = QLA_SUCCESS; 2075 struct qla_hw_data *ha = vha->hw; 2076 uint32_t idc_major_ver, idc_minor_ver; 2077 uint16_t config[4]; 2078 2079 qla83xx_idc_lock(vha, 0); 2080 2081 /* SV: TODO: Assign initialization timeout from 2082 * flash-info / other param 2083 */ 2084 ha->fcoe_dev_init_timeout = QLA83XX_IDC_INITIALIZATION_TIMEOUT; 2085 ha->fcoe_reset_timeout = QLA83XX_IDC_RESET_ACK_TIMEOUT; 2086 2087 /* Set our fcoe function presence */ 2088 if (__qla83xx_set_drv_presence(vha) != QLA_SUCCESS) { 2089 ql_dbg(ql_dbg_p3p, vha, 0xb077, 2090 "Error while setting DRV-Presence.\n"); 2091 rval = QLA_FUNCTION_FAILED; 2092 goto exit; 2093 } 2094 2095 /* Decide the reset ownership */ 2096 qla83xx_reset_ownership(vha); 2097 2098 /* 2099 * On first protocol driver load: 2100 * Init-Owner: Set IDC-Major-Version and Clear IDC-Lock-Recovery 2101 * register. 2102 * Others: Check compatibility with current IDC Major version. 2103 */ 2104 qla83xx_rd_reg(vha, QLA83XX_IDC_MAJOR_VERSION, &idc_major_ver); 2105 if (ha->flags.nic_core_reset_owner) { 2106 /* Set IDC Major version */ 2107 idc_major_ver = QLA83XX_SUPP_IDC_MAJOR_VERSION; 2108 qla83xx_wr_reg(vha, QLA83XX_IDC_MAJOR_VERSION, idc_major_ver); 2109 2110 /* Clearing IDC-Lock-Recovery register */ 2111 qla83xx_wr_reg(vha, QLA83XX_IDC_LOCK_RECOVERY, 0); 2112 } else if (idc_major_ver != QLA83XX_SUPP_IDC_MAJOR_VERSION) { 2113 /* 2114 * Clear further IDC participation if we are not compatible with 2115 * the current IDC Major Version. 2116 */ 2117 ql_log(ql_log_warn, vha, 0xb07d, 2118 "Failing load, idc_major_ver=%d, expected_major_ver=%d.\n", 2119 idc_major_ver, QLA83XX_SUPP_IDC_MAJOR_VERSION); 2120 __qla83xx_clear_drv_presence(vha); 2121 rval = QLA_FUNCTION_FAILED; 2122 goto exit; 2123 } 2124 /* Each function sets its supported Minor version. */ 2125 qla83xx_rd_reg(vha, QLA83XX_IDC_MINOR_VERSION, &idc_minor_ver); 2126 idc_minor_ver |= (QLA83XX_SUPP_IDC_MINOR_VERSION << (ha->portnum * 2)); 2127 qla83xx_wr_reg(vha, QLA83XX_IDC_MINOR_VERSION, idc_minor_ver); 2128 2129 if (ha->flags.nic_core_reset_owner) { 2130 memset(config, 0, sizeof(config)); 2131 if (!qla81xx_get_port_config(vha, config)) 2132 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, 2133 QLA8XXX_DEV_READY); 2134 } 2135 2136 rval = qla83xx_idc_state_handler(vha); 2137 2138 exit: 2139 qla83xx_idc_unlock(vha, 0); 2140 2141 return rval; 2142 } 2143 2144 /* 2145 * qla2x00_initialize_adapter 2146 * Initialize board. 2147 * 2148 * Input: 2149 * ha = adapter block pointer. 2150 * 2151 * Returns: 2152 * 0 = success 2153 */ 2154 int 2155 qla2x00_initialize_adapter(scsi_qla_host_t *vha) 2156 { 2157 int rval; 2158 struct qla_hw_data *ha = vha->hw; 2159 struct req_que *req = ha->req_q_map[0]; 2160 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 2161 2162 memset(&vha->qla_stats, 0, sizeof(vha->qla_stats)); 2163 memset(&vha->fc_host_stat, 0, sizeof(vha->fc_host_stat)); 2164 2165 /* Clear adapter flags. */ 2166 vha->flags.online = 0; 2167 ha->flags.chip_reset_done = 0; 2168 vha->flags.reset_active = 0; 2169 ha->flags.pci_channel_io_perm_failure = 0; 2170 ha->flags.eeh_busy = 0; 2171 vha->qla_stats.jiffies_at_last_reset = get_jiffies_64(); 2172 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 2173 atomic_set(&vha->loop_state, LOOP_DOWN); 2174 vha->device_flags = DFLG_NO_CABLE; 2175 vha->dpc_flags = 0; 2176 vha->flags.management_server_logged_in = 0; 2177 vha->marker_needed = 0; 2178 ha->isp_abort_cnt = 0; 2179 ha->beacon_blink_led = 0; 2180 2181 set_bit(0, ha->req_qid_map); 2182 set_bit(0, ha->rsp_qid_map); 2183 2184 ql_dbg(ql_dbg_init, vha, 0x0040, 2185 "Configuring PCI space...\n"); 2186 rval = ha->isp_ops->pci_config(vha); 2187 if (rval) { 2188 ql_log(ql_log_warn, vha, 0x0044, 2189 "Unable to configure PCI space.\n"); 2190 return (rval); 2191 } 2192 2193 ha->isp_ops->reset_chip(vha); 2194 2195 /* Check for secure flash support */ 2196 if (IS_QLA28XX(ha)) { 2197 if (RD_REG_DWORD(®->mailbox12) & BIT_0) { 2198 ql_log(ql_log_info, vha, 0xffff, "Adapter is Secure\n"); 2199 ha->flags.secure_adapter = 1; 2200 } 2201 } 2202 2203 2204 rval = qla2xxx_get_flash_info(vha); 2205 if (rval) { 2206 ql_log(ql_log_fatal, vha, 0x004f, 2207 "Unable to validate FLASH data.\n"); 2208 return rval; 2209 } 2210 2211 if (IS_QLA8044(ha)) { 2212 qla8044_read_reset_template(vha); 2213 2214 /* NOTE: If ql2xdontresethba==1, set IDC_CTRL DONTRESET_BIT0. 2215 * If DONRESET_BIT0 is set, drivers should not set dev_state 2216 * to NEED_RESET. But if NEED_RESET is set, drivers should 2217 * should honor the reset. */ 2218 if (ql2xdontresethba == 1) 2219 qla8044_set_idc_dontreset(vha); 2220 } 2221 2222 ha->isp_ops->get_flash_version(vha, req->ring); 2223 ql_dbg(ql_dbg_init, vha, 0x0061, 2224 "Configure NVRAM parameters...\n"); 2225 2226 /* Let priority default to FCP, can be overridden by nvram_config */ 2227 ha->fc4_type_priority = FC4_PRIORITY_FCP; 2228 2229 ha->isp_ops->nvram_config(vha); 2230 2231 if (ha->fc4_type_priority != FC4_PRIORITY_FCP && 2232 ha->fc4_type_priority != FC4_PRIORITY_NVME) 2233 ha->fc4_type_priority = FC4_PRIORITY_FCP; 2234 2235 ql_log(ql_log_info, vha, 0xffff, "FC4 priority set to %s\n", 2236 ha->fc4_type_priority == FC4_PRIORITY_FCP ? "FCP" : "NVMe"); 2237 2238 if (ha->flags.disable_serdes) { 2239 /* Mask HBA via NVRAM settings? */ 2240 ql_log(ql_log_info, vha, 0x0077, 2241 "Masking HBA WWPN %8phN (via NVRAM).\n", vha->port_name); 2242 return QLA_FUNCTION_FAILED; 2243 } 2244 2245 ql_dbg(ql_dbg_init, vha, 0x0078, 2246 "Verifying loaded RISC code...\n"); 2247 2248 if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) { 2249 rval = ha->isp_ops->chip_diag(vha); 2250 if (rval) 2251 return (rval); 2252 rval = qla2x00_setup_chip(vha); 2253 if (rval) 2254 return (rval); 2255 } 2256 2257 if (IS_QLA84XX(ha)) { 2258 ha->cs84xx = qla84xx_get_chip(vha); 2259 if (!ha->cs84xx) { 2260 ql_log(ql_log_warn, vha, 0x00d0, 2261 "Unable to configure ISP84XX.\n"); 2262 return QLA_FUNCTION_FAILED; 2263 } 2264 } 2265 2266 if (qla_ini_mode_enabled(vha) || qla_dual_mode_enabled(vha)) 2267 rval = qla2x00_init_rings(vha); 2268 2269 /* No point in continuing if firmware initialization failed. */ 2270 if (rval != QLA_SUCCESS) 2271 return rval; 2272 2273 ha->flags.chip_reset_done = 1; 2274 2275 if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) { 2276 /* Issue verify 84xx FW IOCB to complete 84xx initialization */ 2277 rval = qla84xx_init_chip(vha); 2278 if (rval != QLA_SUCCESS) { 2279 ql_log(ql_log_warn, vha, 0x00d4, 2280 "Unable to initialize ISP84XX.\n"); 2281 qla84xx_put_chip(vha); 2282 } 2283 } 2284 2285 /* Load the NIC Core f/w if we are the first protocol driver. */ 2286 if (IS_QLA8031(ha)) { 2287 rval = qla83xx_nic_core_fw_load(vha); 2288 if (rval) 2289 ql_log(ql_log_warn, vha, 0x0124, 2290 "Error in initializing NIC Core f/w.\n"); 2291 } 2292 2293 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha)) 2294 qla24xx_read_fcp_prio_cfg(vha); 2295 2296 if (IS_P3P_TYPE(ha)) 2297 qla82xx_set_driver_version(vha, QLA2XXX_VERSION); 2298 else 2299 qla25xx_set_driver_version(vha, QLA2XXX_VERSION); 2300 2301 return (rval); 2302 } 2303 2304 /** 2305 * qla2100_pci_config() - Setup ISP21xx PCI configuration registers. 2306 * @vha: HA context 2307 * 2308 * Returns 0 on success. 2309 */ 2310 int 2311 qla2100_pci_config(scsi_qla_host_t *vha) 2312 { 2313 uint16_t w; 2314 unsigned long flags; 2315 struct qla_hw_data *ha = vha->hw; 2316 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2317 2318 pci_set_master(ha->pdev); 2319 pci_try_set_mwi(ha->pdev); 2320 2321 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2322 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2323 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2324 2325 pci_disable_rom(ha->pdev); 2326 2327 /* Get PCI bus information. */ 2328 spin_lock_irqsave(&ha->hardware_lock, flags); 2329 ha->pci_attr = RD_REG_WORD(®->ctrl_status); 2330 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2331 2332 return QLA_SUCCESS; 2333 } 2334 2335 /** 2336 * qla2300_pci_config() - Setup ISP23xx PCI configuration registers. 2337 * @vha: HA context 2338 * 2339 * Returns 0 on success. 2340 */ 2341 int 2342 qla2300_pci_config(scsi_qla_host_t *vha) 2343 { 2344 uint16_t w; 2345 unsigned long flags = 0; 2346 uint32_t cnt; 2347 struct qla_hw_data *ha = vha->hw; 2348 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2349 2350 pci_set_master(ha->pdev); 2351 pci_try_set_mwi(ha->pdev); 2352 2353 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2354 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2355 2356 if (IS_QLA2322(ha) || IS_QLA6322(ha)) 2357 w &= ~PCI_COMMAND_INTX_DISABLE; 2358 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2359 2360 /* 2361 * If this is a 2300 card and not 2312, reset the 2362 * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately, 2363 * the 2310 also reports itself as a 2300 so we need to get the 2364 * fb revision level -- a 6 indicates it really is a 2300 and 2365 * not a 2310. 2366 */ 2367 if (IS_QLA2300(ha)) { 2368 spin_lock_irqsave(&ha->hardware_lock, flags); 2369 2370 /* Pause RISC. */ 2371 WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); 2372 for (cnt = 0; cnt < 30000; cnt++) { 2373 if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) != 0) 2374 break; 2375 2376 udelay(10); 2377 } 2378 2379 /* Select FPM registers. */ 2380 WRT_REG_WORD(®->ctrl_status, 0x20); 2381 RD_REG_WORD(®->ctrl_status); 2382 2383 /* Get the fb rev level */ 2384 ha->fb_rev = RD_FB_CMD_REG(ha, reg); 2385 2386 if (ha->fb_rev == FPM_2300) 2387 pci_clear_mwi(ha->pdev); 2388 2389 /* Deselect FPM registers. */ 2390 WRT_REG_WORD(®->ctrl_status, 0x0); 2391 RD_REG_WORD(®->ctrl_status); 2392 2393 /* Release RISC module. */ 2394 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 2395 for (cnt = 0; cnt < 30000; cnt++) { 2396 if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) == 0) 2397 break; 2398 2399 udelay(10); 2400 } 2401 2402 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2403 } 2404 2405 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); 2406 2407 pci_disable_rom(ha->pdev); 2408 2409 /* Get PCI bus information. */ 2410 spin_lock_irqsave(&ha->hardware_lock, flags); 2411 ha->pci_attr = RD_REG_WORD(®->ctrl_status); 2412 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2413 2414 return QLA_SUCCESS; 2415 } 2416 2417 /** 2418 * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers. 2419 * @vha: HA context 2420 * 2421 * Returns 0 on success. 2422 */ 2423 int 2424 qla24xx_pci_config(scsi_qla_host_t *vha) 2425 { 2426 uint16_t w; 2427 unsigned long flags = 0; 2428 struct qla_hw_data *ha = vha->hw; 2429 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 2430 2431 pci_set_master(ha->pdev); 2432 pci_try_set_mwi(ha->pdev); 2433 2434 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2435 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2436 w &= ~PCI_COMMAND_INTX_DISABLE; 2437 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2438 2439 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); 2440 2441 /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */ 2442 if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX)) 2443 pcix_set_mmrbc(ha->pdev, 2048); 2444 2445 /* PCIe -- adjust Maximum Read Request Size (2048). */ 2446 if (pci_is_pcie(ha->pdev)) 2447 pcie_set_readrq(ha->pdev, 4096); 2448 2449 pci_disable_rom(ha->pdev); 2450 2451 ha->chip_revision = ha->pdev->revision; 2452 2453 /* Get PCI bus information. */ 2454 spin_lock_irqsave(&ha->hardware_lock, flags); 2455 ha->pci_attr = RD_REG_DWORD(®->ctrl_status); 2456 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2457 2458 return QLA_SUCCESS; 2459 } 2460 2461 /** 2462 * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers. 2463 * @vha: HA context 2464 * 2465 * Returns 0 on success. 2466 */ 2467 int 2468 qla25xx_pci_config(scsi_qla_host_t *vha) 2469 { 2470 uint16_t w; 2471 struct qla_hw_data *ha = vha->hw; 2472 2473 pci_set_master(ha->pdev); 2474 pci_try_set_mwi(ha->pdev); 2475 2476 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2477 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2478 w &= ~PCI_COMMAND_INTX_DISABLE; 2479 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2480 2481 /* PCIe -- adjust Maximum Read Request Size (2048). */ 2482 if (pci_is_pcie(ha->pdev)) 2483 pcie_set_readrq(ha->pdev, 4096); 2484 2485 pci_disable_rom(ha->pdev); 2486 2487 ha->chip_revision = ha->pdev->revision; 2488 2489 return QLA_SUCCESS; 2490 } 2491 2492 /** 2493 * qla2x00_isp_firmware() - Choose firmware image. 2494 * @vha: HA context 2495 * 2496 * Returns 0 on success. 2497 */ 2498 static int 2499 qla2x00_isp_firmware(scsi_qla_host_t *vha) 2500 { 2501 int rval; 2502 uint16_t loop_id, topo, sw_cap; 2503 uint8_t domain, area, al_pa; 2504 struct qla_hw_data *ha = vha->hw; 2505 2506 /* Assume loading risc code */ 2507 rval = QLA_FUNCTION_FAILED; 2508 2509 if (ha->flags.disable_risc_code_load) { 2510 ql_log(ql_log_info, vha, 0x0079, "RISC CODE NOT loaded.\n"); 2511 2512 /* Verify checksum of loaded RISC code. */ 2513 rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address); 2514 if (rval == QLA_SUCCESS) { 2515 /* And, verify we are not in ROM code. */ 2516 rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa, 2517 &area, &domain, &topo, &sw_cap); 2518 } 2519 } 2520 2521 if (rval) 2522 ql_dbg(ql_dbg_init, vha, 0x007a, 2523 "**** Load RISC code ****.\n"); 2524 2525 return (rval); 2526 } 2527 2528 /** 2529 * qla2x00_reset_chip() - Reset ISP chip. 2530 * @vha: HA context 2531 * 2532 * Returns 0 on success. 2533 */ 2534 int 2535 qla2x00_reset_chip(scsi_qla_host_t *vha) 2536 { 2537 unsigned long flags = 0; 2538 struct qla_hw_data *ha = vha->hw; 2539 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2540 uint32_t cnt; 2541 uint16_t cmd; 2542 int rval = QLA_FUNCTION_FAILED; 2543 2544 if (unlikely(pci_channel_offline(ha->pdev))) 2545 return rval; 2546 2547 ha->isp_ops->disable_intrs(ha); 2548 2549 spin_lock_irqsave(&ha->hardware_lock, flags); 2550 2551 /* Turn off master enable */ 2552 cmd = 0; 2553 pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd); 2554 cmd &= ~PCI_COMMAND_MASTER; 2555 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); 2556 2557 if (!IS_QLA2100(ha)) { 2558 /* Pause RISC. */ 2559 WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); 2560 if (IS_QLA2200(ha) || IS_QLA2300(ha)) { 2561 for (cnt = 0; cnt < 30000; cnt++) { 2562 if ((RD_REG_WORD(®->hccr) & 2563 HCCR_RISC_PAUSE) != 0) 2564 break; 2565 udelay(100); 2566 } 2567 } else { 2568 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2569 udelay(10); 2570 } 2571 2572 /* Select FPM registers. */ 2573 WRT_REG_WORD(®->ctrl_status, 0x20); 2574 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ 2575 2576 /* FPM Soft Reset. */ 2577 WRT_REG_WORD(®->fpm_diag_config, 0x100); 2578 RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */ 2579 2580 /* Toggle Fpm Reset. */ 2581 if (!IS_QLA2200(ha)) { 2582 WRT_REG_WORD(®->fpm_diag_config, 0x0); 2583 RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */ 2584 } 2585 2586 /* Select frame buffer registers. */ 2587 WRT_REG_WORD(®->ctrl_status, 0x10); 2588 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ 2589 2590 /* Reset frame buffer FIFOs. */ 2591 if (IS_QLA2200(ha)) { 2592 WRT_FB_CMD_REG(ha, reg, 0xa000); 2593 RD_FB_CMD_REG(ha, reg); /* PCI Posting. */ 2594 } else { 2595 WRT_FB_CMD_REG(ha, reg, 0x00fc); 2596 2597 /* Read back fb_cmd until zero or 3 seconds max */ 2598 for (cnt = 0; cnt < 3000; cnt++) { 2599 if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0) 2600 break; 2601 udelay(100); 2602 } 2603 } 2604 2605 /* Select RISC module registers. */ 2606 WRT_REG_WORD(®->ctrl_status, 0); 2607 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ 2608 2609 /* Reset RISC processor. */ 2610 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 2611 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2612 2613 /* Release RISC processor. */ 2614 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 2615 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2616 } 2617 2618 WRT_REG_WORD(®->hccr, HCCR_CLR_RISC_INT); 2619 WRT_REG_WORD(®->hccr, HCCR_CLR_HOST_INT); 2620 2621 /* Reset ISP chip. */ 2622 WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET); 2623 2624 /* Wait for RISC to recover from reset. */ 2625 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 2626 /* 2627 * It is necessary to for a delay here since the card doesn't 2628 * respond to PCI reads during a reset. On some architectures 2629 * this will result in an MCA. 2630 */ 2631 udelay(20); 2632 for (cnt = 30000; cnt; cnt--) { 2633 if ((RD_REG_WORD(®->ctrl_status) & 2634 CSR_ISP_SOFT_RESET) == 0) 2635 break; 2636 udelay(100); 2637 } 2638 } else 2639 udelay(10); 2640 2641 /* Reset RISC processor. */ 2642 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 2643 2644 WRT_REG_WORD(®->semaphore, 0); 2645 2646 /* Release RISC processor. */ 2647 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 2648 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2649 2650 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 2651 for (cnt = 0; cnt < 30000; cnt++) { 2652 if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY) 2653 break; 2654 2655 udelay(100); 2656 } 2657 } else 2658 udelay(100); 2659 2660 /* Turn on master enable */ 2661 cmd |= PCI_COMMAND_MASTER; 2662 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); 2663 2664 /* Disable RISC pause on FPM parity error. */ 2665 if (!IS_QLA2100(ha)) { 2666 WRT_REG_WORD(®->hccr, HCCR_DISABLE_PARITY_PAUSE); 2667 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2668 } 2669 2670 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2671 2672 return QLA_SUCCESS; 2673 } 2674 2675 /** 2676 * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC. 2677 * @vha: HA context 2678 * 2679 * Returns 0 on success. 2680 */ 2681 static int 2682 qla81xx_reset_mpi(scsi_qla_host_t *vha) 2683 { 2684 uint16_t mb[4] = {0x1010, 0, 1, 0}; 2685 2686 if (!IS_QLA81XX(vha->hw)) 2687 return QLA_SUCCESS; 2688 2689 return qla81xx_write_mpi_register(vha, mb); 2690 } 2691 2692 /** 2693 * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC. 2694 * @vha: HA context 2695 * 2696 * Returns 0 on success. 2697 */ 2698 static inline int 2699 qla24xx_reset_risc(scsi_qla_host_t *vha) 2700 { 2701 unsigned long flags = 0; 2702 struct qla_hw_data *ha = vha->hw; 2703 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 2704 uint32_t cnt; 2705 uint16_t wd; 2706 static int abts_cnt; /* ISP abort retry counts */ 2707 int rval = QLA_SUCCESS; 2708 2709 spin_lock_irqsave(&ha->hardware_lock, flags); 2710 2711 /* Reset RISC. */ 2712 WRT_REG_DWORD(®->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); 2713 for (cnt = 0; cnt < 30000; cnt++) { 2714 if ((RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE) == 0) 2715 break; 2716 2717 udelay(10); 2718 } 2719 2720 if (!(RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE)) 2721 set_bit(DMA_SHUTDOWN_CMPL, &ha->fw_dump_cap_flags); 2722 2723 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017e, 2724 "HCCR: 0x%x, Control Status %x, DMA active status:0x%x\n", 2725 RD_REG_DWORD(®->hccr), 2726 RD_REG_DWORD(®->ctrl_status), 2727 (RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE)); 2728 2729 WRT_REG_DWORD(®->ctrl_status, 2730 CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); 2731 pci_read_config_word(ha->pdev, PCI_COMMAND, &wd); 2732 2733 udelay(100); 2734 2735 /* Wait for firmware to complete NVRAM accesses. */ 2736 RD_REG_WORD(®->mailbox0); 2737 for (cnt = 10000; RD_REG_WORD(®->mailbox0) != 0 && 2738 rval == QLA_SUCCESS; cnt--) { 2739 barrier(); 2740 if (cnt) 2741 udelay(5); 2742 else 2743 rval = QLA_FUNCTION_TIMEOUT; 2744 } 2745 2746 if (rval == QLA_SUCCESS) 2747 set_bit(ISP_MBX_RDY, &ha->fw_dump_cap_flags); 2748 2749 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017f, 2750 "HCCR: 0x%x, MailBox0 Status 0x%x\n", 2751 RD_REG_DWORD(®->hccr), 2752 RD_REG_DWORD(®->mailbox0)); 2753 2754 /* Wait for soft-reset to complete. */ 2755 RD_REG_DWORD(®->ctrl_status); 2756 for (cnt = 0; cnt < 60; cnt++) { 2757 barrier(); 2758 if ((RD_REG_DWORD(®->ctrl_status) & 2759 CSRX_ISP_SOFT_RESET) == 0) 2760 break; 2761 2762 udelay(5); 2763 } 2764 if (!(RD_REG_DWORD(®->ctrl_status) & CSRX_ISP_SOFT_RESET)) 2765 set_bit(ISP_SOFT_RESET_CMPL, &ha->fw_dump_cap_flags); 2766 2767 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015d, 2768 "HCCR: 0x%x, Soft Reset status: 0x%x\n", 2769 RD_REG_DWORD(®->hccr), 2770 RD_REG_DWORD(®->ctrl_status)); 2771 2772 /* If required, do an MPI FW reset now */ 2773 if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) { 2774 if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) { 2775 if (++abts_cnt < 5) { 2776 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 2777 set_bit(MPI_RESET_NEEDED, &vha->dpc_flags); 2778 } else { 2779 /* 2780 * We exhausted the ISP abort retries. We have to 2781 * set the board offline. 2782 */ 2783 abts_cnt = 0; 2784 vha->flags.online = 0; 2785 } 2786 } 2787 } 2788 2789 WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET); 2790 RD_REG_DWORD(®->hccr); 2791 2792 WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE); 2793 RD_REG_DWORD(®->hccr); 2794 2795 WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_RESET); 2796 RD_REG_DWORD(®->hccr); 2797 2798 RD_REG_WORD(®->mailbox0); 2799 for (cnt = 60; RD_REG_WORD(®->mailbox0) != 0 && 2800 rval == QLA_SUCCESS; cnt--) { 2801 barrier(); 2802 if (cnt) 2803 udelay(5); 2804 else 2805 rval = QLA_FUNCTION_TIMEOUT; 2806 } 2807 if (rval == QLA_SUCCESS) 2808 set_bit(RISC_RDY_AFT_RESET, &ha->fw_dump_cap_flags); 2809 2810 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015e, 2811 "Host Risc 0x%x, mailbox0 0x%x\n", 2812 RD_REG_DWORD(®->hccr), 2813 RD_REG_WORD(®->mailbox0)); 2814 2815 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2816 2817 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015f, 2818 "Driver in %s mode\n", 2819 IS_NOPOLLING_TYPE(ha) ? "Interrupt" : "Polling"); 2820 2821 if (IS_NOPOLLING_TYPE(ha)) 2822 ha->isp_ops->enable_intrs(ha); 2823 2824 return rval; 2825 } 2826 2827 static void 2828 qla25xx_read_risc_sema_reg(scsi_qla_host_t *vha, uint32_t *data) 2829 { 2830 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24; 2831 2832 WRT_REG_DWORD(®->iobase_addr, RISC_REGISTER_BASE_OFFSET); 2833 *data = RD_REG_DWORD(®->iobase_window + RISC_REGISTER_WINDOW_OFFET); 2834 2835 } 2836 2837 static void 2838 qla25xx_write_risc_sema_reg(scsi_qla_host_t *vha, uint32_t data) 2839 { 2840 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24; 2841 2842 WRT_REG_DWORD(®->iobase_addr, RISC_REGISTER_BASE_OFFSET); 2843 WRT_REG_DWORD(®->iobase_window + RISC_REGISTER_WINDOW_OFFET, data); 2844 } 2845 2846 static void 2847 qla25xx_manipulate_risc_semaphore(scsi_qla_host_t *vha) 2848 { 2849 uint32_t wd32 = 0; 2850 uint delta_msec = 100; 2851 uint elapsed_msec = 0; 2852 uint timeout_msec; 2853 ulong n; 2854 2855 if (vha->hw->pdev->subsystem_device != 0x0175 && 2856 vha->hw->pdev->subsystem_device != 0x0240) 2857 return; 2858 2859 WRT_REG_DWORD(&vha->hw->iobase->isp24.hccr, HCCRX_SET_RISC_PAUSE); 2860 udelay(100); 2861 2862 attempt: 2863 timeout_msec = TIMEOUT_SEMAPHORE; 2864 n = timeout_msec / delta_msec; 2865 while (n--) { 2866 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_SET); 2867 qla25xx_read_risc_sema_reg(vha, &wd32); 2868 if (wd32 & RISC_SEMAPHORE) 2869 break; 2870 msleep(delta_msec); 2871 elapsed_msec += delta_msec; 2872 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED) 2873 goto force; 2874 } 2875 2876 if (!(wd32 & RISC_SEMAPHORE)) 2877 goto force; 2878 2879 if (!(wd32 & RISC_SEMAPHORE_FORCE)) 2880 goto acquired; 2881 2882 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_CLR); 2883 timeout_msec = TIMEOUT_SEMAPHORE_FORCE; 2884 n = timeout_msec / delta_msec; 2885 while (n--) { 2886 qla25xx_read_risc_sema_reg(vha, &wd32); 2887 if (!(wd32 & RISC_SEMAPHORE_FORCE)) 2888 break; 2889 msleep(delta_msec); 2890 elapsed_msec += delta_msec; 2891 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED) 2892 goto force; 2893 } 2894 2895 if (wd32 & RISC_SEMAPHORE_FORCE) 2896 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_CLR); 2897 2898 goto attempt; 2899 2900 force: 2901 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_SET); 2902 2903 acquired: 2904 return; 2905 } 2906 2907 /** 2908 * qla24xx_reset_chip() - Reset ISP24xx chip. 2909 * @vha: HA context 2910 * 2911 * Returns 0 on success. 2912 */ 2913 int 2914 qla24xx_reset_chip(scsi_qla_host_t *vha) 2915 { 2916 struct qla_hw_data *ha = vha->hw; 2917 int rval = QLA_FUNCTION_FAILED; 2918 2919 if (pci_channel_offline(ha->pdev) && 2920 ha->flags.pci_channel_io_perm_failure) { 2921 return rval; 2922 } 2923 2924 ha->isp_ops->disable_intrs(ha); 2925 2926 qla25xx_manipulate_risc_semaphore(vha); 2927 2928 /* Perform RISC reset. */ 2929 rval = qla24xx_reset_risc(vha); 2930 2931 return rval; 2932 } 2933 2934 /** 2935 * qla2x00_chip_diag() - Test chip for proper operation. 2936 * @vha: HA context 2937 * 2938 * Returns 0 on success. 2939 */ 2940 int 2941 qla2x00_chip_diag(scsi_qla_host_t *vha) 2942 { 2943 int rval; 2944 struct qla_hw_data *ha = vha->hw; 2945 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2946 unsigned long flags = 0; 2947 uint16_t data; 2948 uint32_t cnt; 2949 uint16_t mb[5]; 2950 struct req_que *req = ha->req_q_map[0]; 2951 2952 /* Assume a failed state */ 2953 rval = QLA_FUNCTION_FAILED; 2954 2955 ql_dbg(ql_dbg_init, vha, 0x007b, "Testing device at %p.\n", 2956 ®->flash_address); 2957 2958 spin_lock_irqsave(&ha->hardware_lock, flags); 2959 2960 /* Reset ISP chip. */ 2961 WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET); 2962 2963 /* 2964 * We need to have a delay here since the card will not respond while 2965 * in reset causing an MCA on some architectures. 2966 */ 2967 udelay(20); 2968 data = qla2x00_debounce_register(®->ctrl_status); 2969 for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) { 2970 udelay(5); 2971 data = RD_REG_WORD(®->ctrl_status); 2972 barrier(); 2973 } 2974 2975 if (!cnt) 2976 goto chip_diag_failed; 2977 2978 ql_dbg(ql_dbg_init, vha, 0x007c, 2979 "Reset register cleared by chip reset.\n"); 2980 2981 /* Reset RISC processor. */ 2982 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 2983 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 2984 2985 /* Workaround for QLA2312 PCI parity error */ 2986 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 2987 data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0)); 2988 for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) { 2989 udelay(5); 2990 data = RD_MAILBOX_REG(ha, reg, 0); 2991 barrier(); 2992 } 2993 } else 2994 udelay(10); 2995 2996 if (!cnt) 2997 goto chip_diag_failed; 2998 2999 /* Check product ID of chip */ 3000 ql_dbg(ql_dbg_init, vha, 0x007d, "Checking product ID of chip.\n"); 3001 3002 mb[1] = RD_MAILBOX_REG(ha, reg, 1); 3003 mb[2] = RD_MAILBOX_REG(ha, reg, 2); 3004 mb[3] = RD_MAILBOX_REG(ha, reg, 3); 3005 mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4)); 3006 if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) || 3007 mb[3] != PROD_ID_3) { 3008 ql_log(ql_log_warn, vha, 0x0062, 3009 "Wrong product ID = 0x%x,0x%x,0x%x.\n", 3010 mb[1], mb[2], mb[3]); 3011 3012 goto chip_diag_failed; 3013 } 3014 ha->product_id[0] = mb[1]; 3015 ha->product_id[1] = mb[2]; 3016 ha->product_id[2] = mb[3]; 3017 ha->product_id[3] = mb[4]; 3018 3019 /* Adjust fw RISC transfer size */ 3020 if (req->length > 1024) 3021 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024; 3022 else 3023 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 3024 req->length; 3025 3026 if (IS_QLA2200(ha) && 3027 RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) { 3028 /* Limit firmware transfer size with a 2200A */ 3029 ql_dbg(ql_dbg_init, vha, 0x007e, "Found QLA2200A Chip.\n"); 3030 3031 ha->device_type |= DT_ISP2200A; 3032 ha->fw_transfer_size = 128; 3033 } 3034 3035 /* Wrap Incoming Mailboxes Test. */ 3036 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3037 3038 ql_dbg(ql_dbg_init, vha, 0x007f, "Checking mailboxes.\n"); 3039 rval = qla2x00_mbx_reg_test(vha); 3040 if (rval) 3041 ql_log(ql_log_warn, vha, 0x0080, 3042 "Failed mailbox send register test.\n"); 3043 else 3044 /* Flag a successful rval */ 3045 rval = QLA_SUCCESS; 3046 spin_lock_irqsave(&ha->hardware_lock, flags); 3047 3048 chip_diag_failed: 3049 if (rval) 3050 ql_log(ql_log_info, vha, 0x0081, 3051 "Chip diagnostics **** FAILED ****.\n"); 3052 3053 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3054 3055 return (rval); 3056 } 3057 3058 /** 3059 * qla24xx_chip_diag() - Test ISP24xx for proper operation. 3060 * @vha: HA context 3061 * 3062 * Returns 0 on success. 3063 */ 3064 int 3065 qla24xx_chip_diag(scsi_qla_host_t *vha) 3066 { 3067 int rval; 3068 struct qla_hw_data *ha = vha->hw; 3069 struct req_que *req = ha->req_q_map[0]; 3070 3071 if (IS_P3P_TYPE(ha)) 3072 return QLA_SUCCESS; 3073 3074 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length; 3075 3076 rval = qla2x00_mbx_reg_test(vha); 3077 if (rval) { 3078 ql_log(ql_log_warn, vha, 0x0082, 3079 "Failed mailbox send register test.\n"); 3080 } else { 3081 /* Flag a successful rval */ 3082 rval = QLA_SUCCESS; 3083 } 3084 3085 return rval; 3086 } 3087 3088 static void 3089 qla2x00_init_fce_trace(scsi_qla_host_t *vha) 3090 { 3091 int rval; 3092 dma_addr_t tc_dma; 3093 void *tc; 3094 struct qla_hw_data *ha = vha->hw; 3095 3096 if (!IS_FWI2_CAPABLE(ha)) 3097 return; 3098 3099 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) && 3100 !IS_QLA27XX(ha) && !IS_QLA28XX(ha)) 3101 return; 3102 3103 if (ha->fce) { 3104 ql_dbg(ql_dbg_init, vha, 0x00bd, 3105 "%s: FCE Mem is already allocated.\n", 3106 __func__); 3107 return; 3108 } 3109 3110 /* Allocate memory for Fibre Channel Event Buffer. */ 3111 tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma, 3112 GFP_KERNEL); 3113 if (!tc) { 3114 ql_log(ql_log_warn, vha, 0x00be, 3115 "Unable to allocate (%d KB) for FCE.\n", 3116 FCE_SIZE / 1024); 3117 return; 3118 } 3119 3120 rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS, 3121 ha->fce_mb, &ha->fce_bufs); 3122 if (rval) { 3123 ql_log(ql_log_warn, vha, 0x00bf, 3124 "Unable to initialize FCE (%d).\n", rval); 3125 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc, tc_dma); 3126 return; 3127 } 3128 3129 ql_dbg(ql_dbg_init, vha, 0x00c0, 3130 "Allocated (%d KB) for FCE...\n", FCE_SIZE / 1024); 3131 3132 ha->flags.fce_enabled = 1; 3133 ha->fce_dma = tc_dma; 3134 ha->fce = tc; 3135 } 3136 3137 static void 3138 qla2x00_init_eft_trace(scsi_qla_host_t *vha) 3139 { 3140 int rval; 3141 dma_addr_t tc_dma; 3142 void *tc; 3143 struct qla_hw_data *ha = vha->hw; 3144 3145 if (!IS_FWI2_CAPABLE(ha)) 3146 return; 3147 3148 if (ha->eft) { 3149 ql_dbg(ql_dbg_init, vha, 0x00bd, 3150 "%s: EFT Mem is already allocated.\n", 3151 __func__); 3152 return; 3153 } 3154 3155 /* Allocate memory for Extended Trace Buffer. */ 3156 tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma, 3157 GFP_KERNEL); 3158 if (!tc) { 3159 ql_log(ql_log_warn, vha, 0x00c1, 3160 "Unable to allocate (%d KB) for EFT.\n", 3161 EFT_SIZE / 1024); 3162 return; 3163 } 3164 3165 rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS); 3166 if (rval) { 3167 ql_log(ql_log_warn, vha, 0x00c2, 3168 "Unable to initialize EFT (%d).\n", rval); 3169 dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc, tc_dma); 3170 return; 3171 } 3172 3173 ql_dbg(ql_dbg_init, vha, 0x00c3, 3174 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024); 3175 3176 ha->eft_dma = tc_dma; 3177 ha->eft = tc; 3178 } 3179 3180 static void 3181 qla2x00_alloc_offload_mem(scsi_qla_host_t *vha) 3182 { 3183 qla2x00_init_fce_trace(vha); 3184 qla2x00_init_eft_trace(vha); 3185 } 3186 3187 void 3188 qla2x00_alloc_fw_dump(scsi_qla_host_t *vha) 3189 { 3190 uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size, 3191 eft_size, fce_size, mq_size; 3192 struct qla_hw_data *ha = vha->hw; 3193 struct req_que *req = ha->req_q_map[0]; 3194 struct rsp_que *rsp = ha->rsp_q_map[0]; 3195 struct qla2xxx_fw_dump *fw_dump; 3196 3197 dump_size = fixed_size = mem_size = eft_size = fce_size = mq_size = 0; 3198 req_q_size = rsp_q_size = 0; 3199 3200 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { 3201 fixed_size = sizeof(struct qla2100_fw_dump); 3202 } else if (IS_QLA23XX(ha)) { 3203 fixed_size = offsetof(struct qla2300_fw_dump, data_ram); 3204 mem_size = (ha->fw_memory_size - 0x11000 + 1) * 3205 sizeof(uint16_t); 3206 } else if (IS_FWI2_CAPABLE(ha)) { 3207 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)) 3208 fixed_size = offsetof(struct qla83xx_fw_dump, ext_mem); 3209 else if (IS_QLA81XX(ha)) 3210 fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem); 3211 else if (IS_QLA25XX(ha)) 3212 fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem); 3213 else 3214 fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem); 3215 3216 mem_size = (ha->fw_memory_size - 0x100000 + 1) * 3217 sizeof(uint32_t); 3218 if (ha->mqenable) { 3219 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha) && 3220 !IS_QLA28XX(ha)) 3221 mq_size = sizeof(struct qla2xxx_mq_chain); 3222 /* 3223 * Allocate maximum buffer size for all queues - Q0. 3224 * Resizing must be done at end-of-dump processing. 3225 */ 3226 mq_size += (ha->max_req_queues - 1) * 3227 (req->length * sizeof(request_t)); 3228 mq_size += (ha->max_rsp_queues - 1) * 3229 (rsp->length * sizeof(response_t)); 3230 } 3231 if (ha->tgt.atio_ring) 3232 mq_size += ha->tgt.atio_q_length * sizeof(request_t); 3233 3234 qla2x00_init_fce_trace(vha); 3235 if (ha->fce) 3236 fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE; 3237 qla2x00_init_eft_trace(vha); 3238 if (ha->eft) 3239 eft_size = EFT_SIZE; 3240 } 3241 3242 if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) { 3243 struct fwdt *fwdt = ha->fwdt; 3244 uint j; 3245 3246 for (j = 0; j < 2; j++, fwdt++) { 3247 if (!fwdt->template) { 3248 ql_dbg(ql_dbg_init, vha, 0x00ba, 3249 "-> fwdt%u no template\n", j); 3250 continue; 3251 } 3252 ql_dbg(ql_dbg_init, vha, 0x00fa, 3253 "-> fwdt%u calculating fwdump size...\n", j); 3254 fwdt->dump_size = qla27xx_fwdt_calculate_dump_size( 3255 vha, fwdt->template); 3256 ql_dbg(ql_dbg_init, vha, 0x00fa, 3257 "-> fwdt%u calculated fwdump size = %#lx bytes\n", 3258 j, fwdt->dump_size); 3259 dump_size += fwdt->dump_size; 3260 } 3261 } else { 3262 req_q_size = req->length * sizeof(request_t); 3263 rsp_q_size = rsp->length * sizeof(response_t); 3264 dump_size = offsetof(struct qla2xxx_fw_dump, isp); 3265 dump_size += fixed_size + mem_size + req_q_size + rsp_q_size 3266 + eft_size; 3267 ha->chain_offset = dump_size; 3268 dump_size += mq_size + fce_size; 3269 if (ha->exchoffld_buf) 3270 dump_size += sizeof(struct qla2xxx_offld_chain) + 3271 ha->exchoffld_size; 3272 if (ha->exlogin_buf) 3273 dump_size += sizeof(struct qla2xxx_offld_chain) + 3274 ha->exlogin_size; 3275 } 3276 3277 if (!ha->fw_dump_len || dump_size > ha->fw_dump_alloc_len) { 3278 3279 ql_dbg(ql_dbg_init, vha, 0x00c5, 3280 "%s dump_size %d fw_dump_len %d fw_dump_alloc_len %d\n", 3281 __func__, dump_size, ha->fw_dump_len, 3282 ha->fw_dump_alloc_len); 3283 3284 fw_dump = vmalloc(dump_size); 3285 if (!fw_dump) { 3286 ql_log(ql_log_warn, vha, 0x00c4, 3287 "Unable to allocate (%d KB) for firmware dump.\n", 3288 dump_size / 1024); 3289 } else { 3290 mutex_lock(&ha->optrom_mutex); 3291 if (ha->fw_dumped) { 3292 memcpy(fw_dump, ha->fw_dump, ha->fw_dump_len); 3293 vfree(ha->fw_dump); 3294 ha->fw_dump = fw_dump; 3295 ha->fw_dump_alloc_len = dump_size; 3296 ql_dbg(ql_dbg_init, vha, 0x00c5, 3297 "Re-Allocated (%d KB) and save firmware dump.\n", 3298 dump_size / 1024); 3299 } else { 3300 if (ha->fw_dump) 3301 vfree(ha->fw_dump); 3302 ha->fw_dump = fw_dump; 3303 3304 ha->fw_dump_len = ha->fw_dump_alloc_len = 3305 dump_size; 3306 ql_dbg(ql_dbg_init, vha, 0x00c5, 3307 "Allocated (%d KB) for firmware dump.\n", 3308 dump_size / 1024); 3309 3310 if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) { 3311 mutex_unlock(&ha->optrom_mutex); 3312 return; 3313 } 3314 3315 ha->fw_dump->signature[0] = 'Q'; 3316 ha->fw_dump->signature[1] = 'L'; 3317 ha->fw_dump->signature[2] = 'G'; 3318 ha->fw_dump->signature[3] = 'C'; 3319 ha->fw_dump->version = htonl(1); 3320 3321 ha->fw_dump->fixed_size = htonl(fixed_size); 3322 ha->fw_dump->mem_size = htonl(mem_size); 3323 ha->fw_dump->req_q_size = htonl(req_q_size); 3324 ha->fw_dump->rsp_q_size = htonl(rsp_q_size); 3325 3326 ha->fw_dump->eft_size = htonl(eft_size); 3327 ha->fw_dump->eft_addr_l = 3328 htonl(LSD(ha->eft_dma)); 3329 ha->fw_dump->eft_addr_h = 3330 htonl(MSD(ha->eft_dma)); 3331 3332 ha->fw_dump->header_size = 3333 htonl(offsetof 3334 (struct qla2xxx_fw_dump, isp)); 3335 } 3336 mutex_unlock(&ha->optrom_mutex); 3337 } 3338 } 3339 } 3340 3341 static int 3342 qla81xx_mpi_sync(scsi_qla_host_t *vha) 3343 { 3344 #define MPS_MASK 0xe0 3345 int rval; 3346 uint16_t dc; 3347 uint32_t dw; 3348 3349 if (!IS_QLA81XX(vha->hw)) 3350 return QLA_SUCCESS; 3351 3352 rval = qla2x00_write_ram_word(vha, 0x7c00, 1); 3353 if (rval != QLA_SUCCESS) { 3354 ql_log(ql_log_warn, vha, 0x0105, 3355 "Unable to acquire semaphore.\n"); 3356 goto done; 3357 } 3358 3359 pci_read_config_word(vha->hw->pdev, 0x54, &dc); 3360 rval = qla2x00_read_ram_word(vha, 0x7a15, &dw); 3361 if (rval != QLA_SUCCESS) { 3362 ql_log(ql_log_warn, vha, 0x0067, "Unable to read sync.\n"); 3363 goto done_release; 3364 } 3365 3366 dc &= MPS_MASK; 3367 if (dc == (dw & MPS_MASK)) 3368 goto done_release; 3369 3370 dw &= ~MPS_MASK; 3371 dw |= dc; 3372 rval = qla2x00_write_ram_word(vha, 0x7a15, dw); 3373 if (rval != QLA_SUCCESS) { 3374 ql_log(ql_log_warn, vha, 0x0114, "Unable to gain sync.\n"); 3375 } 3376 3377 done_release: 3378 rval = qla2x00_write_ram_word(vha, 0x7c00, 0); 3379 if (rval != QLA_SUCCESS) { 3380 ql_log(ql_log_warn, vha, 0x006d, 3381 "Unable to release semaphore.\n"); 3382 } 3383 3384 done: 3385 return rval; 3386 } 3387 3388 int 3389 qla2x00_alloc_outstanding_cmds(struct qla_hw_data *ha, struct req_que *req) 3390 { 3391 /* Don't try to reallocate the array */ 3392 if (req->outstanding_cmds) 3393 return QLA_SUCCESS; 3394 3395 if (!IS_FWI2_CAPABLE(ha)) 3396 req->num_outstanding_cmds = DEFAULT_OUTSTANDING_COMMANDS; 3397 else { 3398 if (ha->cur_fw_xcb_count <= ha->cur_fw_iocb_count) 3399 req->num_outstanding_cmds = ha->cur_fw_xcb_count; 3400 else 3401 req->num_outstanding_cmds = ha->cur_fw_iocb_count; 3402 } 3403 3404 req->outstanding_cmds = kcalloc(req->num_outstanding_cmds, 3405 sizeof(srb_t *), 3406 GFP_KERNEL); 3407 3408 if (!req->outstanding_cmds) { 3409 /* 3410 * Try to allocate a minimal size just so we can get through 3411 * initialization. 3412 */ 3413 req->num_outstanding_cmds = MIN_OUTSTANDING_COMMANDS; 3414 req->outstanding_cmds = kcalloc(req->num_outstanding_cmds, 3415 sizeof(srb_t *), 3416 GFP_KERNEL); 3417 3418 if (!req->outstanding_cmds) { 3419 ql_log(ql_log_fatal, NULL, 0x0126, 3420 "Failed to allocate memory for " 3421 "outstanding_cmds for req_que %p.\n", req); 3422 req->num_outstanding_cmds = 0; 3423 return QLA_FUNCTION_FAILED; 3424 } 3425 } 3426 3427 return QLA_SUCCESS; 3428 } 3429 3430 #define PRINT_FIELD(_field, _flag, _str) { \ 3431 if (a0->_field & _flag) {\ 3432 if (p) {\ 3433 strcat(ptr, "|");\ 3434 ptr++;\ 3435 leftover--;\ 3436 } \ 3437 len = snprintf(ptr, leftover, "%s", _str); \ 3438 p = 1;\ 3439 leftover -= len;\ 3440 ptr += len; \ 3441 } \ 3442 } 3443 3444 static void qla2xxx_print_sfp_info(struct scsi_qla_host *vha) 3445 { 3446 #define STR_LEN 64 3447 struct sff_8247_a0 *a0 = (struct sff_8247_a0 *)vha->hw->sfp_data; 3448 u8 str[STR_LEN], *ptr, p; 3449 int leftover, len; 3450 3451 memset(str, 0, STR_LEN); 3452 snprintf(str, SFF_VEN_NAME_LEN+1, a0->vendor_name); 3453 ql_dbg(ql_dbg_init, vha, 0x015a, 3454 "SFP MFG Name: %s\n", str); 3455 3456 memset(str, 0, STR_LEN); 3457 snprintf(str, SFF_PART_NAME_LEN+1, a0->vendor_pn); 3458 ql_dbg(ql_dbg_init, vha, 0x015c, 3459 "SFP Part Name: %s\n", str); 3460 3461 /* media */ 3462 memset(str, 0, STR_LEN); 3463 ptr = str; 3464 leftover = STR_LEN; 3465 p = len = 0; 3466 PRINT_FIELD(fc_med_cc9, FC_MED_TW, "Twin AX"); 3467 PRINT_FIELD(fc_med_cc9, FC_MED_TP, "Twisted Pair"); 3468 PRINT_FIELD(fc_med_cc9, FC_MED_MI, "Min Coax"); 3469 PRINT_FIELD(fc_med_cc9, FC_MED_TV, "Video Coax"); 3470 PRINT_FIELD(fc_med_cc9, FC_MED_M6, "MultiMode 62.5um"); 3471 PRINT_FIELD(fc_med_cc9, FC_MED_M5, "MultiMode 50um"); 3472 PRINT_FIELD(fc_med_cc9, FC_MED_SM, "SingleMode"); 3473 ql_dbg(ql_dbg_init, vha, 0x0160, 3474 "SFP Media: %s\n", str); 3475 3476 /* link length */ 3477 memset(str, 0, STR_LEN); 3478 ptr = str; 3479 leftover = STR_LEN; 3480 p = len = 0; 3481 PRINT_FIELD(fc_ll_cc7, FC_LL_VL, "Very Long"); 3482 PRINT_FIELD(fc_ll_cc7, FC_LL_S, "Short"); 3483 PRINT_FIELD(fc_ll_cc7, FC_LL_I, "Intermediate"); 3484 PRINT_FIELD(fc_ll_cc7, FC_LL_L, "Long"); 3485 PRINT_FIELD(fc_ll_cc7, FC_LL_M, "Medium"); 3486 ql_dbg(ql_dbg_init, vha, 0x0196, 3487 "SFP Link Length: %s\n", str); 3488 3489 memset(str, 0, STR_LEN); 3490 ptr = str; 3491 leftover = STR_LEN; 3492 p = len = 0; 3493 PRINT_FIELD(fc_ll_cc7, FC_LL_SA, "Short Wave (SA)"); 3494 PRINT_FIELD(fc_ll_cc7, FC_LL_LC, "Long Wave(LC)"); 3495 PRINT_FIELD(fc_tec_cc8, FC_TEC_SN, "Short Wave (SN)"); 3496 PRINT_FIELD(fc_tec_cc8, FC_TEC_SL, "Short Wave (SL)"); 3497 PRINT_FIELD(fc_tec_cc8, FC_TEC_LL, "Long Wave (LL)"); 3498 ql_dbg(ql_dbg_init, vha, 0x016e, 3499 "SFP FC Link Tech: %s\n", str); 3500 3501 if (a0->length_km) 3502 ql_dbg(ql_dbg_init, vha, 0x016f, 3503 "SFP Distant: %d km\n", a0->length_km); 3504 if (a0->length_100m) 3505 ql_dbg(ql_dbg_init, vha, 0x0170, 3506 "SFP Distant: %d m\n", a0->length_100m*100); 3507 if (a0->length_50um_10m) 3508 ql_dbg(ql_dbg_init, vha, 0x0189, 3509 "SFP Distant (WL=50um): %d m\n", a0->length_50um_10m * 10); 3510 if (a0->length_62um_10m) 3511 ql_dbg(ql_dbg_init, vha, 0x018a, 3512 "SFP Distant (WL=62.5um): %d m\n", a0->length_62um_10m * 10); 3513 if (a0->length_om4_10m) 3514 ql_dbg(ql_dbg_init, vha, 0x0194, 3515 "SFP Distant (OM4): %d m\n", a0->length_om4_10m * 10); 3516 if (a0->length_om3_10m) 3517 ql_dbg(ql_dbg_init, vha, 0x0195, 3518 "SFP Distant (OM3): %d m\n", a0->length_om3_10m * 10); 3519 } 3520 3521 3522 /* 3523 * Return Code: 3524 * QLA_SUCCESS: no action 3525 * QLA_INTERFACE_ERROR: SFP is not there. 3526 * QLA_FUNCTION_FAILED: detected New SFP 3527 */ 3528 int 3529 qla24xx_detect_sfp(scsi_qla_host_t *vha) 3530 { 3531 int rc = QLA_SUCCESS; 3532 struct sff_8247_a0 *a; 3533 struct qla_hw_data *ha = vha->hw; 3534 3535 if (!AUTO_DETECT_SFP_SUPPORT(vha)) 3536 goto out; 3537 3538 rc = qla2x00_read_sfp_dev(vha, NULL, 0); 3539 if (rc) 3540 goto out; 3541 3542 a = (struct sff_8247_a0 *)vha->hw->sfp_data; 3543 qla2xxx_print_sfp_info(vha); 3544 3545 if (a->fc_ll_cc7 & FC_LL_VL || a->fc_ll_cc7 & FC_LL_L) { 3546 /* long range */ 3547 ha->flags.detected_lr_sfp = 1; 3548 3549 if (a->length_km > 5 || a->length_100m > 50) 3550 ha->long_range_distance = LR_DISTANCE_10K; 3551 else 3552 ha->long_range_distance = LR_DISTANCE_5K; 3553 3554 if (ha->flags.detected_lr_sfp != ha->flags.using_lr_setting) 3555 ql_dbg(ql_dbg_async, vha, 0x507b, 3556 "Detected Long Range SFP.\n"); 3557 } else { 3558 /* short range */ 3559 ha->flags.detected_lr_sfp = 0; 3560 if (ha->flags.using_lr_setting) 3561 ql_dbg(ql_dbg_async, vha, 0x5084, 3562 "Detected Short Range SFP.\n"); 3563 } 3564 3565 if (!vha->flags.init_done) 3566 rc = QLA_SUCCESS; 3567 out: 3568 return rc; 3569 } 3570 3571 /** 3572 * qla2x00_setup_chip() - Load and start RISC firmware. 3573 * @vha: HA context 3574 * 3575 * Returns 0 on success. 3576 */ 3577 static int 3578 qla2x00_setup_chip(scsi_qla_host_t *vha) 3579 { 3580 int rval; 3581 uint32_t srisc_address = 0; 3582 struct qla_hw_data *ha = vha->hw; 3583 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 3584 unsigned long flags; 3585 uint16_t fw_major_version; 3586 3587 if (IS_P3P_TYPE(ha)) { 3588 rval = ha->isp_ops->load_risc(vha, &srisc_address); 3589 if (rval == QLA_SUCCESS) { 3590 qla2x00_stop_firmware(vha); 3591 goto enable_82xx_npiv; 3592 } else 3593 goto failed; 3594 } 3595 3596 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { 3597 /* Disable SRAM, Instruction RAM and GP RAM parity. */ 3598 spin_lock_irqsave(&ha->hardware_lock, flags); 3599 WRT_REG_WORD(®->hccr, (HCCR_ENABLE_PARITY + 0x0)); 3600 RD_REG_WORD(®->hccr); 3601 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3602 } 3603 3604 qla81xx_mpi_sync(vha); 3605 3606 /* Load firmware sequences */ 3607 rval = ha->isp_ops->load_risc(vha, &srisc_address); 3608 if (rval == QLA_SUCCESS) { 3609 ql_dbg(ql_dbg_init, vha, 0x00c9, 3610 "Verifying Checksum of loaded RISC code.\n"); 3611 3612 rval = qla2x00_verify_checksum(vha, srisc_address); 3613 if (rval == QLA_SUCCESS) { 3614 /* Start firmware execution. */ 3615 ql_dbg(ql_dbg_init, vha, 0x00ca, 3616 "Starting firmware.\n"); 3617 3618 if (ql2xexlogins) 3619 ha->flags.exlogins_enabled = 1; 3620 3621 if (qla_is_exch_offld_enabled(vha)) 3622 ha->flags.exchoffld_enabled = 1; 3623 3624 rval = qla2x00_execute_fw(vha, srisc_address); 3625 /* Retrieve firmware information. */ 3626 if (rval == QLA_SUCCESS) { 3627 qla24xx_detect_sfp(vha); 3628 3629 if ((IS_QLA83XX(ha) || IS_QLA27XX(ha) || 3630 IS_QLA28XX(ha)) && 3631 (ha->zio_mode == QLA_ZIO_MODE_6)) 3632 qla27xx_set_zio_threshold(vha, 3633 ha->last_zio_threshold); 3634 3635 rval = qla2x00_set_exlogins_buffer(vha); 3636 if (rval != QLA_SUCCESS) 3637 goto failed; 3638 3639 rval = qla2x00_set_exchoffld_buffer(vha); 3640 if (rval != QLA_SUCCESS) 3641 goto failed; 3642 3643 enable_82xx_npiv: 3644 fw_major_version = ha->fw_major_version; 3645 if (IS_P3P_TYPE(ha)) 3646 qla82xx_check_md_needed(vha); 3647 else 3648 rval = qla2x00_get_fw_version(vha); 3649 if (rval != QLA_SUCCESS) 3650 goto failed; 3651 ha->flags.npiv_supported = 0; 3652 if (IS_QLA2XXX_MIDTYPE(ha) && 3653 (ha->fw_attributes & BIT_2)) { 3654 ha->flags.npiv_supported = 1; 3655 if ((!ha->max_npiv_vports) || 3656 ((ha->max_npiv_vports + 1) % 3657 MIN_MULTI_ID_FABRIC)) 3658 ha->max_npiv_vports = 3659 MIN_MULTI_ID_FABRIC - 1; 3660 } 3661 qla2x00_get_resource_cnts(vha); 3662 3663 /* 3664 * Allocate the array of outstanding commands 3665 * now that we know the firmware resources. 3666 */ 3667 rval = qla2x00_alloc_outstanding_cmds(ha, 3668 vha->req); 3669 if (rval != QLA_SUCCESS) 3670 goto failed; 3671 3672 if (!fw_major_version && !(IS_P3P_TYPE(ha))) 3673 qla2x00_alloc_offload_mem(vha); 3674 3675 if (ql2xallocfwdump && !(IS_P3P_TYPE(ha))) 3676 qla2x00_alloc_fw_dump(vha); 3677 3678 } else { 3679 goto failed; 3680 } 3681 } else { 3682 ql_log(ql_log_fatal, vha, 0x00cd, 3683 "ISP Firmware failed checksum.\n"); 3684 goto failed; 3685 } 3686 } else 3687 goto failed; 3688 3689 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { 3690 /* Enable proper parity. */ 3691 spin_lock_irqsave(&ha->hardware_lock, flags); 3692 if (IS_QLA2300(ha)) 3693 /* SRAM parity */ 3694 WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x1); 3695 else 3696 /* SRAM, Instruction RAM and GP RAM parity */ 3697 WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x7); 3698 RD_REG_WORD(®->hccr); 3699 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3700 } 3701 3702 if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) 3703 ha->flags.fac_supported = 1; 3704 else if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) { 3705 uint32_t size; 3706 3707 rval = qla81xx_fac_get_sector_size(vha, &size); 3708 if (rval == QLA_SUCCESS) { 3709 ha->flags.fac_supported = 1; 3710 ha->fdt_block_size = size << 2; 3711 } else { 3712 ql_log(ql_log_warn, vha, 0x00ce, 3713 "Unsupported FAC firmware (%d.%02d.%02d).\n", 3714 ha->fw_major_version, ha->fw_minor_version, 3715 ha->fw_subminor_version); 3716 3717 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || 3718 IS_QLA28XX(ha)) { 3719 ha->flags.fac_supported = 0; 3720 rval = QLA_SUCCESS; 3721 } 3722 } 3723 } 3724 failed: 3725 if (rval) { 3726 ql_log(ql_log_fatal, vha, 0x00cf, 3727 "Setup chip ****FAILED****.\n"); 3728 } 3729 3730 return (rval); 3731 } 3732 3733 /** 3734 * qla2x00_init_response_q_entries() - Initializes response queue entries. 3735 * @rsp: response queue 3736 * 3737 * Beginning of request ring has initialization control block already built 3738 * by nvram config routine. 3739 * 3740 * Returns 0 on success. 3741 */ 3742 void 3743 qla2x00_init_response_q_entries(struct rsp_que *rsp) 3744 { 3745 uint16_t cnt; 3746 response_t *pkt; 3747 3748 rsp->ring_ptr = rsp->ring; 3749 rsp->ring_index = 0; 3750 rsp->status_srb = NULL; 3751 pkt = rsp->ring_ptr; 3752 for (cnt = 0; cnt < rsp->length; cnt++) { 3753 pkt->signature = RESPONSE_PROCESSED; 3754 pkt++; 3755 } 3756 } 3757 3758 /** 3759 * qla2x00_update_fw_options() - Read and process firmware options. 3760 * @vha: HA context 3761 * 3762 * Returns 0 on success. 3763 */ 3764 void 3765 qla2x00_update_fw_options(scsi_qla_host_t *vha) 3766 { 3767 uint16_t swing, emphasis, tx_sens, rx_sens; 3768 struct qla_hw_data *ha = vha->hw; 3769 3770 memset(ha->fw_options, 0, sizeof(ha->fw_options)); 3771 qla2x00_get_fw_options(vha, ha->fw_options); 3772 3773 if (IS_QLA2100(ha) || IS_QLA2200(ha)) 3774 return; 3775 3776 /* Serial Link options. */ 3777 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115, 3778 "Serial link options.\n"); 3779 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109, 3780 ha->fw_seriallink_options, sizeof(ha->fw_seriallink_options)); 3781 3782 ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING; 3783 if (ha->fw_seriallink_options[3] & BIT_2) { 3784 ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING; 3785 3786 /* 1G settings */ 3787 swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0); 3788 emphasis = (ha->fw_seriallink_options[2] & 3789 (BIT_4 | BIT_3)) >> 3; 3790 tx_sens = ha->fw_seriallink_options[0] & 3791 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 3792 rx_sens = (ha->fw_seriallink_options[0] & 3793 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; 3794 ha->fw_options[10] = (emphasis << 14) | (swing << 8); 3795 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { 3796 if (rx_sens == 0x0) 3797 rx_sens = 0x3; 3798 ha->fw_options[10] |= (tx_sens << 4) | rx_sens; 3799 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) 3800 ha->fw_options[10] |= BIT_5 | 3801 ((rx_sens & (BIT_1 | BIT_0)) << 2) | 3802 (tx_sens & (BIT_1 | BIT_0)); 3803 3804 /* 2G settings */ 3805 swing = (ha->fw_seriallink_options[2] & 3806 (BIT_7 | BIT_6 | BIT_5)) >> 5; 3807 emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0); 3808 tx_sens = ha->fw_seriallink_options[1] & 3809 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 3810 rx_sens = (ha->fw_seriallink_options[1] & 3811 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; 3812 ha->fw_options[11] = (emphasis << 14) | (swing << 8); 3813 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { 3814 if (rx_sens == 0x0) 3815 rx_sens = 0x3; 3816 ha->fw_options[11] |= (tx_sens << 4) | rx_sens; 3817 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) 3818 ha->fw_options[11] |= BIT_5 | 3819 ((rx_sens & (BIT_1 | BIT_0)) << 2) | 3820 (tx_sens & (BIT_1 | BIT_0)); 3821 } 3822 3823 /* FCP2 options. */ 3824 /* Return command IOCBs without waiting for an ABTS to complete. */ 3825 ha->fw_options[3] |= BIT_13; 3826 3827 /* LED scheme. */ 3828 if (ha->flags.enable_led_scheme) 3829 ha->fw_options[2] |= BIT_12; 3830 3831 /* Detect ISP6312. */ 3832 if (IS_QLA6312(ha)) 3833 ha->fw_options[2] |= BIT_13; 3834 3835 /* Set Retry FLOGI in case of P2P connection */ 3836 if (ha->operating_mode == P2P) { 3837 ha->fw_options[2] |= BIT_3; 3838 ql_dbg(ql_dbg_disc, vha, 0x2100, 3839 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n", 3840 __func__, ha->fw_options[2]); 3841 } 3842 3843 /* Update firmware options. */ 3844 qla2x00_set_fw_options(vha, ha->fw_options); 3845 } 3846 3847 void 3848 qla24xx_update_fw_options(scsi_qla_host_t *vha) 3849 { 3850 int rval; 3851 struct qla_hw_data *ha = vha->hw; 3852 3853 if (IS_P3P_TYPE(ha)) 3854 return; 3855 3856 /* Hold status IOCBs until ABTS response received. */ 3857 if (ql2xfwholdabts) 3858 ha->fw_options[3] |= BIT_12; 3859 3860 /* Set Retry FLOGI in case of P2P connection */ 3861 if (ha->operating_mode == P2P) { 3862 ha->fw_options[2] |= BIT_3; 3863 ql_dbg(ql_dbg_disc, vha, 0x2101, 3864 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n", 3865 __func__, ha->fw_options[2]); 3866 } 3867 3868 /* Move PUREX, ABTS RX & RIDA to ATIOQ */ 3869 if (ql2xmvasynctoatio && 3870 (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))) { 3871 if (qla_tgt_mode_enabled(vha) || 3872 qla_dual_mode_enabled(vha)) 3873 ha->fw_options[2] |= BIT_11; 3874 else 3875 ha->fw_options[2] &= ~BIT_11; 3876 } 3877 3878 if (IS_QLA25XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha) || 3879 IS_QLA28XX(ha)) { 3880 /* 3881 * Tell FW to track each exchange to prevent 3882 * driver from using stale exchange. 3883 */ 3884 if (qla_tgt_mode_enabled(vha) || 3885 qla_dual_mode_enabled(vha)) 3886 ha->fw_options[2] |= BIT_4; 3887 else 3888 ha->fw_options[2] &= ~BIT_4; 3889 3890 /* Reserve 1/2 of emergency exchanges for ELS.*/ 3891 if (qla2xuseresexchforels) 3892 ha->fw_options[2] |= BIT_8; 3893 else 3894 ha->fw_options[2] &= ~BIT_8; 3895 } 3896 3897 ql_dbg(ql_dbg_init, vha, 0x00e8, 3898 "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n", 3899 __func__, ha->fw_options[1], ha->fw_options[2], 3900 ha->fw_options[3], vha->host->active_mode); 3901 3902 if (ha->fw_options[1] || ha->fw_options[2] || ha->fw_options[3]) 3903 qla2x00_set_fw_options(vha, ha->fw_options); 3904 3905 /* Update Serial Link options. */ 3906 if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0) 3907 return; 3908 3909 rval = qla2x00_set_serdes_params(vha, 3910 le16_to_cpu(ha->fw_seriallink_options24[1]), 3911 le16_to_cpu(ha->fw_seriallink_options24[2]), 3912 le16_to_cpu(ha->fw_seriallink_options24[3])); 3913 if (rval != QLA_SUCCESS) { 3914 ql_log(ql_log_warn, vha, 0x0104, 3915 "Unable to update Serial Link options (%x).\n", rval); 3916 } 3917 } 3918 3919 void 3920 qla2x00_config_rings(struct scsi_qla_host *vha) 3921 { 3922 struct qla_hw_data *ha = vha->hw; 3923 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 3924 struct req_que *req = ha->req_q_map[0]; 3925 struct rsp_que *rsp = ha->rsp_q_map[0]; 3926 3927 /* Setup ring parameters in initialization control block. */ 3928 ha->init_cb->request_q_outpointer = cpu_to_le16(0); 3929 ha->init_cb->response_q_inpointer = cpu_to_le16(0); 3930 ha->init_cb->request_q_length = cpu_to_le16(req->length); 3931 ha->init_cb->response_q_length = cpu_to_le16(rsp->length); 3932 put_unaligned_le64(req->dma, &ha->init_cb->request_q_address); 3933 put_unaligned_le64(rsp->dma, &ha->init_cb->response_q_address); 3934 3935 WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0); 3936 WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0); 3937 WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0); 3938 WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0); 3939 RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */ 3940 } 3941 3942 void 3943 qla24xx_config_rings(struct scsi_qla_host *vha) 3944 { 3945 struct qla_hw_data *ha = vha->hw; 3946 device_reg_t *reg = ISP_QUE_REG(ha, 0); 3947 struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp; 3948 struct qla_msix_entry *msix; 3949 struct init_cb_24xx *icb; 3950 uint16_t rid = 0; 3951 struct req_que *req = ha->req_q_map[0]; 3952 struct rsp_que *rsp = ha->rsp_q_map[0]; 3953 3954 /* Setup ring parameters in initialization control block. */ 3955 icb = (struct init_cb_24xx *)ha->init_cb; 3956 icb->request_q_outpointer = cpu_to_le16(0); 3957 icb->response_q_inpointer = cpu_to_le16(0); 3958 icb->request_q_length = cpu_to_le16(req->length); 3959 icb->response_q_length = cpu_to_le16(rsp->length); 3960 put_unaligned_le64(req->dma, &icb->request_q_address); 3961 put_unaligned_le64(rsp->dma, &icb->response_q_address); 3962 3963 /* Setup ATIO queue dma pointers for target mode */ 3964 icb->atio_q_inpointer = cpu_to_le16(0); 3965 icb->atio_q_length = cpu_to_le16(ha->tgt.atio_q_length); 3966 put_unaligned_le64(ha->tgt.atio_dma, &icb->atio_q_address); 3967 3968 if (IS_SHADOW_REG_CAPABLE(ha)) 3969 icb->firmware_options_2 |= cpu_to_le32(BIT_30|BIT_29); 3970 3971 if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha) || 3972 IS_QLA28XX(ha)) { 3973 icb->qos = cpu_to_le16(QLA_DEFAULT_QUE_QOS); 3974 icb->rid = cpu_to_le16(rid); 3975 if (ha->flags.msix_enabled) { 3976 msix = &ha->msix_entries[1]; 3977 ql_dbg(ql_dbg_init, vha, 0x0019, 3978 "Registering vector 0x%x for base que.\n", 3979 msix->entry); 3980 icb->msix = cpu_to_le16(msix->entry); 3981 } 3982 /* Use alternate PCI bus number */ 3983 if (MSB(rid)) 3984 icb->firmware_options_2 |= cpu_to_le32(BIT_19); 3985 /* Use alternate PCI devfn */ 3986 if (LSB(rid)) 3987 icb->firmware_options_2 |= cpu_to_le32(BIT_18); 3988 3989 /* Use Disable MSIX Handshake mode for capable adapters */ 3990 if ((ha->fw_attributes & BIT_6) && (IS_MSIX_NACK_CAPABLE(ha)) && 3991 (ha->flags.msix_enabled)) { 3992 icb->firmware_options_2 &= cpu_to_le32(~BIT_22); 3993 ha->flags.disable_msix_handshake = 1; 3994 ql_dbg(ql_dbg_init, vha, 0x00fe, 3995 "MSIX Handshake Disable Mode turned on.\n"); 3996 } else { 3997 icb->firmware_options_2 |= cpu_to_le32(BIT_22); 3998 } 3999 icb->firmware_options_2 |= cpu_to_le32(BIT_23); 4000 4001 WRT_REG_DWORD(®->isp25mq.req_q_in, 0); 4002 WRT_REG_DWORD(®->isp25mq.req_q_out, 0); 4003 WRT_REG_DWORD(®->isp25mq.rsp_q_in, 0); 4004 WRT_REG_DWORD(®->isp25mq.rsp_q_out, 0); 4005 } else { 4006 WRT_REG_DWORD(®->isp24.req_q_in, 0); 4007 WRT_REG_DWORD(®->isp24.req_q_out, 0); 4008 WRT_REG_DWORD(®->isp24.rsp_q_in, 0); 4009 WRT_REG_DWORD(®->isp24.rsp_q_out, 0); 4010 } 4011 4012 qlt_24xx_config_rings(vha); 4013 4014 /* If the user has configured the speed, set it here */ 4015 if (ha->set_data_rate) { 4016 ql_dbg(ql_dbg_init, vha, 0x00fd, 4017 "Speed set by user : %s Gbps \n", 4018 qla2x00_get_link_speed_str(ha, ha->set_data_rate)); 4019 icb->firmware_options_3 = (ha->set_data_rate << 13); 4020 } 4021 4022 /* PCI posting */ 4023 RD_REG_DWORD(&ioreg->hccr); 4024 } 4025 4026 /** 4027 * qla2x00_init_rings() - Initializes firmware. 4028 * @vha: HA context 4029 * 4030 * Beginning of request ring has initialization control block already built 4031 * by nvram config routine. 4032 * 4033 * Returns 0 on success. 4034 */ 4035 int 4036 qla2x00_init_rings(scsi_qla_host_t *vha) 4037 { 4038 int rval; 4039 unsigned long flags = 0; 4040 int cnt, que; 4041 struct qla_hw_data *ha = vha->hw; 4042 struct req_que *req; 4043 struct rsp_que *rsp; 4044 struct mid_init_cb_24xx *mid_init_cb = 4045 (struct mid_init_cb_24xx *) ha->init_cb; 4046 4047 spin_lock_irqsave(&ha->hardware_lock, flags); 4048 4049 /* Clear outstanding commands array. */ 4050 for (que = 0; que < ha->max_req_queues; que++) { 4051 req = ha->req_q_map[que]; 4052 if (!req || !test_bit(que, ha->req_qid_map)) 4053 continue; 4054 req->out_ptr = (void *)(req->ring + req->length); 4055 *req->out_ptr = 0; 4056 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) 4057 req->outstanding_cmds[cnt] = NULL; 4058 4059 req->current_outstanding_cmd = 1; 4060 4061 /* Initialize firmware. */ 4062 req->ring_ptr = req->ring; 4063 req->ring_index = 0; 4064 req->cnt = req->length; 4065 } 4066 4067 for (que = 0; que < ha->max_rsp_queues; que++) { 4068 rsp = ha->rsp_q_map[que]; 4069 if (!rsp || !test_bit(que, ha->rsp_qid_map)) 4070 continue; 4071 rsp->in_ptr = (void *)(rsp->ring + rsp->length); 4072 *rsp->in_ptr = 0; 4073 /* Initialize response queue entries */ 4074 if (IS_QLAFX00(ha)) 4075 qlafx00_init_response_q_entries(rsp); 4076 else 4077 qla2x00_init_response_q_entries(rsp); 4078 } 4079 4080 ha->tgt.atio_ring_ptr = ha->tgt.atio_ring; 4081 ha->tgt.atio_ring_index = 0; 4082 /* Initialize ATIO queue entries */ 4083 qlt_init_atio_q_entries(vha); 4084 4085 ha->isp_ops->config_rings(vha); 4086 4087 spin_unlock_irqrestore(&ha->hardware_lock, flags); 4088 4089 ql_dbg(ql_dbg_init, vha, 0x00d1, "Issue init firmware.\n"); 4090 4091 if (IS_QLAFX00(ha)) { 4092 rval = qlafx00_init_firmware(vha, ha->init_cb_size); 4093 goto next_check; 4094 } 4095 4096 /* Update any ISP specific firmware options before initialization. */ 4097 ha->isp_ops->update_fw_options(vha); 4098 4099 if (ha->flags.npiv_supported) { 4100 if (ha->operating_mode == LOOP && !IS_CNA_CAPABLE(ha)) 4101 ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1; 4102 mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports); 4103 } 4104 4105 if (IS_FWI2_CAPABLE(ha)) { 4106 mid_init_cb->options = cpu_to_le16(BIT_1); 4107 mid_init_cb->init_cb.execution_throttle = 4108 cpu_to_le16(ha->cur_fw_xcb_count); 4109 ha->flags.dport_enabled = 4110 (mid_init_cb->init_cb.firmware_options_1 & BIT_7) != 0; 4111 ql_dbg(ql_dbg_init, vha, 0x0191, "DPORT Support: %s.\n", 4112 (ha->flags.dport_enabled) ? "enabled" : "disabled"); 4113 /* FA-WWPN Status */ 4114 ha->flags.fawwpn_enabled = 4115 (mid_init_cb->init_cb.firmware_options_1 & BIT_6) != 0; 4116 ql_dbg(ql_dbg_init, vha, 0x00bc, "FA-WWPN Support: %s.\n", 4117 (ha->flags.fawwpn_enabled) ? "enabled" : "disabled"); 4118 } 4119 4120 rval = qla2x00_init_firmware(vha, ha->init_cb_size); 4121 next_check: 4122 if (rval) { 4123 ql_log(ql_log_fatal, vha, 0x00d2, 4124 "Init Firmware **** FAILED ****.\n"); 4125 } else { 4126 ql_dbg(ql_dbg_init, vha, 0x00d3, 4127 "Init Firmware -- success.\n"); 4128 QLA_FW_STARTED(ha); 4129 vha->u_ql2xexchoffld = vha->u_ql2xiniexchg = 0; 4130 } 4131 4132 return (rval); 4133 } 4134 4135 /** 4136 * qla2x00_fw_ready() - Waits for firmware ready. 4137 * @vha: HA context 4138 * 4139 * Returns 0 on success. 4140 */ 4141 static int 4142 qla2x00_fw_ready(scsi_qla_host_t *vha) 4143 { 4144 int rval; 4145 unsigned long wtime, mtime, cs84xx_time; 4146 uint16_t min_wait; /* Minimum wait time if loop is down */ 4147 uint16_t wait_time; /* Wait time if loop is coming ready */ 4148 uint16_t state[6]; 4149 struct qla_hw_data *ha = vha->hw; 4150 4151 if (IS_QLAFX00(vha->hw)) 4152 return qlafx00_fw_ready(vha); 4153 4154 rval = QLA_SUCCESS; 4155 4156 /* Time to wait for loop down */ 4157 if (IS_P3P_TYPE(ha)) 4158 min_wait = 30; 4159 else 4160 min_wait = 20; 4161 4162 /* 4163 * Firmware should take at most one RATOV to login, plus 5 seconds for 4164 * our own processing. 4165 */ 4166 if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) { 4167 wait_time = min_wait; 4168 } 4169 4170 /* Min wait time if loop down */ 4171 mtime = jiffies + (min_wait * HZ); 4172 4173 /* wait time before firmware ready */ 4174 wtime = jiffies + (wait_time * HZ); 4175 4176 /* Wait for ISP to finish LIP */ 4177 if (!vha->flags.init_done) 4178 ql_log(ql_log_info, vha, 0x801e, 4179 "Waiting for LIP to complete.\n"); 4180 4181 do { 4182 memset(state, -1, sizeof(state)); 4183 rval = qla2x00_get_firmware_state(vha, state); 4184 if (rval == QLA_SUCCESS) { 4185 if (state[0] < FSTATE_LOSS_OF_SYNC) { 4186 vha->device_flags &= ~DFLG_NO_CABLE; 4187 } 4188 if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) { 4189 ql_dbg(ql_dbg_taskm, vha, 0x801f, 4190 "fw_state=%x 84xx=%x.\n", state[0], 4191 state[2]); 4192 if ((state[2] & FSTATE_LOGGED_IN) && 4193 (state[2] & FSTATE_WAITING_FOR_VERIFY)) { 4194 ql_dbg(ql_dbg_taskm, vha, 0x8028, 4195 "Sending verify iocb.\n"); 4196 4197 cs84xx_time = jiffies; 4198 rval = qla84xx_init_chip(vha); 4199 if (rval != QLA_SUCCESS) { 4200 ql_log(ql_log_warn, 4201 vha, 0x8007, 4202 "Init chip failed.\n"); 4203 break; 4204 } 4205 4206 /* Add time taken to initialize. */ 4207 cs84xx_time = jiffies - cs84xx_time; 4208 wtime += cs84xx_time; 4209 mtime += cs84xx_time; 4210 ql_dbg(ql_dbg_taskm, vha, 0x8008, 4211 "Increasing wait time by %ld. " 4212 "New time %ld.\n", cs84xx_time, 4213 wtime); 4214 } 4215 } else if (state[0] == FSTATE_READY) { 4216 ql_dbg(ql_dbg_taskm, vha, 0x8037, 4217 "F/W Ready - OK.\n"); 4218 4219 qla2x00_get_retry_cnt(vha, &ha->retry_count, 4220 &ha->login_timeout, &ha->r_a_tov); 4221 4222 rval = QLA_SUCCESS; 4223 break; 4224 } 4225 4226 rval = QLA_FUNCTION_FAILED; 4227 4228 if (atomic_read(&vha->loop_down_timer) && 4229 state[0] != FSTATE_READY) { 4230 /* Loop down. Timeout on min_wait for states 4231 * other than Wait for Login. 4232 */ 4233 if (time_after_eq(jiffies, mtime)) { 4234 ql_log(ql_log_info, vha, 0x8038, 4235 "Cable is unplugged...\n"); 4236 4237 vha->device_flags |= DFLG_NO_CABLE; 4238 break; 4239 } 4240 } 4241 } else { 4242 /* Mailbox cmd failed. Timeout on min_wait. */ 4243 if (time_after_eq(jiffies, mtime) || 4244 ha->flags.isp82xx_fw_hung) 4245 break; 4246 } 4247 4248 if (time_after_eq(jiffies, wtime)) 4249 break; 4250 4251 /* Delay for a while */ 4252 msleep(500); 4253 } while (1); 4254 4255 ql_dbg(ql_dbg_taskm, vha, 0x803a, 4256 "fw_state=%x (%x, %x, %x, %x %x) curr time=%lx.\n", state[0], 4257 state[1], state[2], state[3], state[4], state[5], jiffies); 4258 4259 if (rval && !(vha->device_flags & DFLG_NO_CABLE)) { 4260 ql_log(ql_log_warn, vha, 0x803b, 4261 "Firmware ready **** FAILED ****.\n"); 4262 } 4263 4264 return (rval); 4265 } 4266 4267 /* 4268 * qla2x00_configure_hba 4269 * Setup adapter context. 4270 * 4271 * Input: 4272 * ha = adapter state pointer. 4273 * 4274 * Returns: 4275 * 0 = success 4276 * 4277 * Context: 4278 * Kernel context. 4279 */ 4280 static int 4281 qla2x00_configure_hba(scsi_qla_host_t *vha) 4282 { 4283 int rval; 4284 uint16_t loop_id; 4285 uint16_t topo; 4286 uint16_t sw_cap; 4287 uint8_t al_pa; 4288 uint8_t area; 4289 uint8_t domain; 4290 char connect_type[22]; 4291 struct qla_hw_data *ha = vha->hw; 4292 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); 4293 port_id_t id; 4294 unsigned long flags; 4295 4296 /* Get host addresses. */ 4297 rval = qla2x00_get_adapter_id(vha, 4298 &loop_id, &al_pa, &area, &domain, &topo, &sw_cap); 4299 if (rval != QLA_SUCCESS) { 4300 if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) || 4301 IS_CNA_CAPABLE(ha) || 4302 (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) { 4303 ql_dbg(ql_dbg_disc, vha, 0x2008, 4304 "Loop is in a transition state.\n"); 4305 } else { 4306 ql_log(ql_log_warn, vha, 0x2009, 4307 "Unable to get host loop ID.\n"); 4308 if (IS_FWI2_CAPABLE(ha) && (vha == base_vha) && 4309 (rval == QLA_COMMAND_ERROR && loop_id == 0x1b)) { 4310 ql_log(ql_log_warn, vha, 0x1151, 4311 "Doing link init.\n"); 4312 if (qla24xx_link_initialize(vha) == QLA_SUCCESS) 4313 return rval; 4314 } 4315 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 4316 } 4317 return (rval); 4318 } 4319 4320 if (topo == 4) { 4321 ql_log(ql_log_info, vha, 0x200a, 4322 "Cannot get topology - retrying.\n"); 4323 return (QLA_FUNCTION_FAILED); 4324 } 4325 4326 vha->loop_id = loop_id; 4327 4328 /* initialize */ 4329 ha->min_external_loopid = SNS_FIRST_LOOP_ID; 4330 ha->operating_mode = LOOP; 4331 ha->switch_cap = 0; 4332 4333 switch (topo) { 4334 case 0: 4335 ql_dbg(ql_dbg_disc, vha, 0x200b, "HBA in NL topology.\n"); 4336 ha->current_topology = ISP_CFG_NL; 4337 strcpy(connect_type, "(Loop)"); 4338 break; 4339 4340 case 1: 4341 ql_dbg(ql_dbg_disc, vha, 0x200c, "HBA in FL topology.\n"); 4342 ha->switch_cap = sw_cap; 4343 ha->current_topology = ISP_CFG_FL; 4344 strcpy(connect_type, "(FL_Port)"); 4345 break; 4346 4347 case 2: 4348 ql_dbg(ql_dbg_disc, vha, 0x200d, "HBA in N P2P topology.\n"); 4349 ha->operating_mode = P2P; 4350 ha->current_topology = ISP_CFG_N; 4351 strcpy(connect_type, "(N_Port-to-N_Port)"); 4352 break; 4353 4354 case 3: 4355 ql_dbg(ql_dbg_disc, vha, 0x200e, "HBA in F P2P topology.\n"); 4356 ha->switch_cap = sw_cap; 4357 ha->operating_mode = P2P; 4358 ha->current_topology = ISP_CFG_F; 4359 strcpy(connect_type, "(F_Port)"); 4360 break; 4361 4362 default: 4363 ql_dbg(ql_dbg_disc, vha, 0x200f, 4364 "HBA in unknown topology %x, using NL.\n", topo); 4365 ha->current_topology = ISP_CFG_NL; 4366 strcpy(connect_type, "(Loop)"); 4367 break; 4368 } 4369 4370 /* Save Host port and loop ID. */ 4371 /* byte order - Big Endian */ 4372 id.b.domain = domain; 4373 id.b.area = area; 4374 id.b.al_pa = al_pa; 4375 id.b.rsvd_1 = 0; 4376 spin_lock_irqsave(&ha->hardware_lock, flags); 4377 if (!(topo == 2 && ha->flags.n2n_bigger)) 4378 qlt_update_host_map(vha, id); 4379 spin_unlock_irqrestore(&ha->hardware_lock, flags); 4380 4381 if (!vha->flags.init_done) 4382 ql_log(ql_log_info, vha, 0x2010, 4383 "Topology - %s, Host Loop address 0x%x.\n", 4384 connect_type, vha->loop_id); 4385 4386 return(rval); 4387 } 4388 4389 inline void 4390 qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len, 4391 const char *def) 4392 { 4393 char *st, *en; 4394 uint16_t index; 4395 uint64_t zero[2] = { 0 }; 4396 struct qla_hw_data *ha = vha->hw; 4397 int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) && 4398 !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha); 4399 4400 if (len > sizeof(zero)) 4401 len = sizeof(zero); 4402 if (memcmp(model, &zero, len) != 0) { 4403 memcpy(ha->model_number, model, len); 4404 st = en = ha->model_number; 4405 en += len - 1; 4406 while (en > st) { 4407 if (*en != 0x20 && *en != 0x00) 4408 break; 4409 *en-- = '\0'; 4410 } 4411 4412 index = (ha->pdev->subsystem_device & 0xff); 4413 if (use_tbl && 4414 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && 4415 index < QLA_MODEL_NAMES) 4416 strlcpy(ha->model_desc, 4417 qla2x00_model_name[index * 2 + 1], 4418 sizeof(ha->model_desc)); 4419 } else { 4420 index = (ha->pdev->subsystem_device & 0xff); 4421 if (use_tbl && 4422 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && 4423 index < QLA_MODEL_NAMES) { 4424 strlcpy(ha->model_number, 4425 qla2x00_model_name[index * 2], 4426 sizeof(ha->model_number)); 4427 strlcpy(ha->model_desc, 4428 qla2x00_model_name[index * 2 + 1], 4429 sizeof(ha->model_desc)); 4430 } else { 4431 strlcpy(ha->model_number, def, 4432 sizeof(ha->model_number)); 4433 } 4434 } 4435 if (IS_FWI2_CAPABLE(ha)) 4436 qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc, 4437 sizeof(ha->model_desc)); 4438 } 4439 4440 /* On sparc systems, obtain port and node WWN from firmware 4441 * properties. 4442 */ 4443 static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv) 4444 { 4445 #ifdef CONFIG_SPARC 4446 struct qla_hw_data *ha = vha->hw; 4447 struct pci_dev *pdev = ha->pdev; 4448 struct device_node *dp = pci_device_to_OF_node(pdev); 4449 const u8 *val; 4450 int len; 4451 4452 val = of_get_property(dp, "port-wwn", &len); 4453 if (val && len >= WWN_SIZE) 4454 memcpy(nv->port_name, val, WWN_SIZE); 4455 4456 val = of_get_property(dp, "node-wwn", &len); 4457 if (val && len >= WWN_SIZE) 4458 memcpy(nv->node_name, val, WWN_SIZE); 4459 #endif 4460 } 4461 4462 /* 4463 * NVRAM configuration for ISP 2xxx 4464 * 4465 * Input: 4466 * ha = adapter block pointer. 4467 * 4468 * Output: 4469 * initialization control block in response_ring 4470 * host adapters parameters in host adapter block 4471 * 4472 * Returns: 4473 * 0 = success. 4474 */ 4475 int 4476 qla2x00_nvram_config(scsi_qla_host_t *vha) 4477 { 4478 int rval; 4479 uint8_t chksum = 0; 4480 uint16_t cnt; 4481 uint8_t *dptr1, *dptr2; 4482 struct qla_hw_data *ha = vha->hw; 4483 init_cb_t *icb = ha->init_cb; 4484 nvram_t *nv = ha->nvram; 4485 uint8_t *ptr = ha->nvram; 4486 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 4487 4488 rval = QLA_SUCCESS; 4489 4490 /* Determine NVRAM starting address. */ 4491 ha->nvram_size = sizeof(*nv); 4492 ha->nvram_base = 0; 4493 if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha)) 4494 if ((RD_REG_WORD(®->ctrl_status) >> 14) == 1) 4495 ha->nvram_base = 0x80; 4496 4497 /* Get NVRAM data and calculate checksum. */ 4498 ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size); 4499 for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++) 4500 chksum += *ptr++; 4501 4502 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f, 4503 "Contents of NVRAM.\n"); 4504 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110, 4505 nv, ha->nvram_size); 4506 4507 /* Bad NVRAM data, set defaults parameters. */ 4508 if (chksum || memcmp("ISP ", nv->id, sizeof(nv->id)) || 4509 nv->nvram_version < 1) { 4510 /* Reset NVRAM data. */ 4511 ql_log(ql_log_warn, vha, 0x0064, 4512 "Inconsistent NVRAM detected: checksum=%#x id=%.4s version=%#x.\n", 4513 chksum, nv->id, nv->nvram_version); 4514 ql_log(ql_log_warn, vha, 0x0065, 4515 "Falling back to " 4516 "functioning (yet invalid -- WWPN) defaults.\n"); 4517 4518 /* 4519 * Set default initialization control block. 4520 */ 4521 memset(nv, 0, ha->nvram_size); 4522 nv->parameter_block_version = ICB_VERSION; 4523 4524 if (IS_QLA23XX(ha)) { 4525 nv->firmware_options[0] = BIT_2 | BIT_1; 4526 nv->firmware_options[1] = BIT_7 | BIT_5; 4527 nv->add_firmware_options[0] = BIT_5; 4528 nv->add_firmware_options[1] = BIT_5 | BIT_4; 4529 nv->frame_payload_size = 2048; 4530 nv->special_options[1] = BIT_7; 4531 } else if (IS_QLA2200(ha)) { 4532 nv->firmware_options[0] = BIT_2 | BIT_1; 4533 nv->firmware_options[1] = BIT_7 | BIT_5; 4534 nv->add_firmware_options[0] = BIT_5; 4535 nv->add_firmware_options[1] = BIT_5 | BIT_4; 4536 nv->frame_payload_size = 1024; 4537 } else if (IS_QLA2100(ha)) { 4538 nv->firmware_options[0] = BIT_3 | BIT_1; 4539 nv->firmware_options[1] = BIT_5; 4540 nv->frame_payload_size = 1024; 4541 } 4542 4543 nv->max_iocb_allocation = cpu_to_le16(256); 4544 nv->execution_throttle = cpu_to_le16(16); 4545 nv->retry_count = 8; 4546 nv->retry_delay = 1; 4547 4548 nv->port_name[0] = 33; 4549 nv->port_name[3] = 224; 4550 nv->port_name[4] = 139; 4551 4552 qla2xxx_nvram_wwn_from_ofw(vha, nv); 4553 4554 nv->login_timeout = 4; 4555 4556 /* 4557 * Set default host adapter parameters 4558 */ 4559 nv->host_p[1] = BIT_2; 4560 nv->reset_delay = 5; 4561 nv->port_down_retry_count = 8; 4562 nv->max_luns_per_target = cpu_to_le16(8); 4563 nv->link_down_timeout = 60; 4564 4565 rval = 1; 4566 } 4567 4568 /* Reset Initialization control block */ 4569 memset(icb, 0, ha->init_cb_size); 4570 4571 /* 4572 * Setup driver NVRAM options. 4573 */ 4574 nv->firmware_options[0] |= (BIT_6 | BIT_1); 4575 nv->firmware_options[0] &= ~(BIT_5 | BIT_4); 4576 nv->firmware_options[1] |= (BIT_5 | BIT_0); 4577 nv->firmware_options[1] &= ~BIT_4; 4578 4579 if (IS_QLA23XX(ha)) { 4580 nv->firmware_options[0] |= BIT_2; 4581 nv->firmware_options[0] &= ~BIT_3; 4582 nv->special_options[0] &= ~BIT_6; 4583 nv->add_firmware_options[1] |= BIT_5 | BIT_4; 4584 4585 if (IS_QLA2300(ha)) { 4586 if (ha->fb_rev == FPM_2310) { 4587 strcpy(ha->model_number, "QLA2310"); 4588 } else { 4589 strcpy(ha->model_number, "QLA2300"); 4590 } 4591 } else { 4592 qla2x00_set_model_info(vha, nv->model_number, 4593 sizeof(nv->model_number), "QLA23xx"); 4594 } 4595 } else if (IS_QLA2200(ha)) { 4596 nv->firmware_options[0] |= BIT_2; 4597 /* 4598 * 'Point-to-point preferred, else loop' is not a safe 4599 * connection mode setting. 4600 */ 4601 if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) == 4602 (BIT_5 | BIT_4)) { 4603 /* Force 'loop preferred, else point-to-point'. */ 4604 nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4); 4605 nv->add_firmware_options[0] |= BIT_5; 4606 } 4607 strcpy(ha->model_number, "QLA22xx"); 4608 } else /*if (IS_QLA2100(ha))*/ { 4609 strcpy(ha->model_number, "QLA2100"); 4610 } 4611 4612 /* 4613 * Copy over NVRAM RISC parameter block to initialization control block. 4614 */ 4615 dptr1 = (uint8_t *)icb; 4616 dptr2 = (uint8_t *)&nv->parameter_block_version; 4617 cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version; 4618 while (cnt--) 4619 *dptr1++ = *dptr2++; 4620 4621 /* Copy 2nd half. */ 4622 dptr1 = (uint8_t *)icb->add_firmware_options; 4623 cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options; 4624 while (cnt--) 4625 *dptr1++ = *dptr2++; 4626 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size); 4627 /* Use alternate WWN? */ 4628 if (nv->host_p[1] & BIT_7) { 4629 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 4630 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 4631 } 4632 4633 /* Prepare nodename */ 4634 if ((icb->firmware_options[1] & BIT_6) == 0) { 4635 /* 4636 * Firmware will apply the following mask if the nodename was 4637 * not provided. 4638 */ 4639 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 4640 icb->node_name[0] &= 0xF0; 4641 } 4642 4643 /* 4644 * Set host adapter parameters. 4645 */ 4646 4647 /* 4648 * BIT_7 in the host-parameters section allows for modification to 4649 * internal driver logging. 4650 */ 4651 if (nv->host_p[0] & BIT_7) 4652 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK; 4653 ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0); 4654 /* Always load RISC code on non ISP2[12]00 chips. */ 4655 if (!IS_QLA2100(ha) && !IS_QLA2200(ha)) 4656 ha->flags.disable_risc_code_load = 0; 4657 ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0); 4658 ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0); 4659 ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0); 4660 ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0; 4661 ha->flags.disable_serdes = 0; 4662 4663 ha->operating_mode = 4664 (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4; 4665 4666 memcpy(ha->fw_seriallink_options, nv->seriallink_options, 4667 sizeof(ha->fw_seriallink_options)); 4668 4669 /* save HBA serial number */ 4670 ha->serial0 = icb->port_name[5]; 4671 ha->serial1 = icb->port_name[6]; 4672 ha->serial2 = icb->port_name[7]; 4673 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 4674 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 4675 4676 icb->execution_throttle = cpu_to_le16(0xFFFF); 4677 4678 ha->retry_count = nv->retry_count; 4679 4680 /* Set minimum login_timeout to 4 seconds. */ 4681 if (nv->login_timeout != ql2xlogintimeout) 4682 nv->login_timeout = ql2xlogintimeout; 4683 if (nv->login_timeout < 4) 4684 nv->login_timeout = 4; 4685 ha->login_timeout = nv->login_timeout; 4686 4687 /* Set minimum RATOV to 100 tenths of a second. */ 4688 ha->r_a_tov = 100; 4689 4690 ha->loop_reset_delay = nv->reset_delay; 4691 4692 /* Link Down Timeout = 0: 4693 * 4694 * When Port Down timer expires we will start returning 4695 * I/O's to OS with "DID_NO_CONNECT". 4696 * 4697 * Link Down Timeout != 0: 4698 * 4699 * The driver waits for the link to come up after link down 4700 * before returning I/Os to OS with "DID_NO_CONNECT". 4701 */ 4702 if (nv->link_down_timeout == 0) { 4703 ha->loop_down_abort_time = 4704 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 4705 } else { 4706 ha->link_down_timeout = nv->link_down_timeout; 4707 ha->loop_down_abort_time = 4708 (LOOP_DOWN_TIME - ha->link_down_timeout); 4709 } 4710 4711 /* 4712 * Need enough time to try and get the port back. 4713 */ 4714 ha->port_down_retry_count = nv->port_down_retry_count; 4715 if (qlport_down_retry) 4716 ha->port_down_retry_count = qlport_down_retry; 4717 /* Set login_retry_count */ 4718 ha->login_retry_count = nv->retry_count; 4719 if (ha->port_down_retry_count == nv->port_down_retry_count && 4720 ha->port_down_retry_count > 3) 4721 ha->login_retry_count = ha->port_down_retry_count; 4722 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 4723 ha->login_retry_count = ha->port_down_retry_count; 4724 if (ql2xloginretrycount) 4725 ha->login_retry_count = ql2xloginretrycount; 4726 4727 icb->lun_enables = cpu_to_le16(0); 4728 icb->command_resource_count = 0; 4729 icb->immediate_notify_resource_count = 0; 4730 icb->timeout = cpu_to_le16(0); 4731 4732 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { 4733 /* Enable RIO */ 4734 icb->firmware_options[0] &= ~BIT_3; 4735 icb->add_firmware_options[0] &= 4736 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); 4737 icb->add_firmware_options[0] |= BIT_2; 4738 icb->response_accumulation_timer = 3; 4739 icb->interrupt_delay_timer = 5; 4740 4741 vha->flags.process_response_queue = 1; 4742 } else { 4743 /* Enable ZIO. */ 4744 if (!vha->flags.init_done) { 4745 ha->zio_mode = icb->add_firmware_options[0] & 4746 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 4747 ha->zio_timer = icb->interrupt_delay_timer ? 4748 icb->interrupt_delay_timer : 2; 4749 } 4750 icb->add_firmware_options[0] &= 4751 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); 4752 vha->flags.process_response_queue = 0; 4753 if (ha->zio_mode != QLA_ZIO_DISABLED) { 4754 ha->zio_mode = QLA_ZIO_MODE_6; 4755 4756 ql_log(ql_log_info, vha, 0x0068, 4757 "ZIO mode %d enabled; timer delay (%d us).\n", 4758 ha->zio_mode, ha->zio_timer * 100); 4759 4760 icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode; 4761 icb->interrupt_delay_timer = (uint8_t)ha->zio_timer; 4762 vha->flags.process_response_queue = 1; 4763 } 4764 } 4765 4766 if (rval) { 4767 ql_log(ql_log_warn, vha, 0x0069, 4768 "NVRAM configuration failed.\n"); 4769 } 4770 return (rval); 4771 } 4772 4773 static void 4774 qla2x00_rport_del(void *data) 4775 { 4776 fc_port_t *fcport = data; 4777 struct fc_rport *rport; 4778 unsigned long flags; 4779 4780 spin_lock_irqsave(fcport->vha->host->host_lock, flags); 4781 rport = fcport->drport ? fcport->drport : fcport->rport; 4782 fcport->drport = NULL; 4783 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags); 4784 if (rport) { 4785 ql_dbg(ql_dbg_disc, fcport->vha, 0x210b, 4786 "%s %8phN. rport %p roles %x\n", 4787 __func__, fcport->port_name, rport, 4788 rport->roles); 4789 4790 fc_remote_port_delete(rport); 4791 } 4792 } 4793 4794 void qla2x00_set_fcport_state(fc_port_t *fcport, int state) 4795 { 4796 int old_state; 4797 4798 old_state = atomic_read(&fcport->state); 4799 atomic_set(&fcport->state, state); 4800 4801 /* Don't print state transitions during initial allocation of fcport */ 4802 if (old_state && old_state != state) { 4803 ql_dbg(ql_dbg_disc, fcport->vha, 0x207d, 4804 "FCPort %8phC state transitioned from %s to %s - portid=%02x%02x%02x.\n", 4805 fcport->port_name, port_state_str[old_state], 4806 port_state_str[state], fcport->d_id.b.domain, 4807 fcport->d_id.b.area, fcport->d_id.b.al_pa); 4808 } 4809 } 4810 4811 /** 4812 * qla2x00_alloc_fcport() - Allocate a generic fcport. 4813 * @vha: HA context 4814 * @flags: allocation flags 4815 * 4816 * Returns a pointer to the allocated fcport, or NULL, if none available. 4817 */ 4818 fc_port_t * 4819 qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags) 4820 { 4821 fc_port_t *fcport; 4822 4823 fcport = kzalloc(sizeof(fc_port_t), flags); 4824 if (!fcport) 4825 return NULL; 4826 4827 fcport->ct_desc.ct_sns = dma_alloc_coherent(&vha->hw->pdev->dev, 4828 sizeof(struct ct_sns_pkt), &fcport->ct_desc.ct_sns_dma, 4829 flags); 4830 if (!fcport->ct_desc.ct_sns) { 4831 ql_log(ql_log_warn, vha, 0xd049, 4832 "Failed to allocate ct_sns request.\n"); 4833 kfree(fcport); 4834 return NULL; 4835 } 4836 4837 /* Setup fcport template structure. */ 4838 fcport->vha = vha; 4839 fcport->port_type = FCT_UNKNOWN; 4840 fcport->loop_id = FC_NO_LOOP_ID; 4841 qla2x00_set_fcport_state(fcport, FCS_UNCONFIGURED); 4842 fcport->supported_classes = FC_COS_UNSPECIFIED; 4843 fcport->fp_speed = PORT_SPEED_UNKNOWN; 4844 4845 fcport->disc_state = DSC_DELETED; 4846 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL; 4847 fcport->deleted = QLA_SESS_DELETED; 4848 fcport->login_retry = vha->hw->login_retry_count; 4849 fcport->chip_reset = vha->hw->base_qpair->chip_reset; 4850 fcport->logout_on_delete = 1; 4851 4852 if (!fcport->ct_desc.ct_sns) { 4853 ql_log(ql_log_warn, vha, 0xd049, 4854 "Failed to allocate ct_sns request.\n"); 4855 kfree(fcport); 4856 return NULL; 4857 } 4858 4859 INIT_WORK(&fcport->del_work, qla24xx_delete_sess_fn); 4860 INIT_WORK(&fcport->free_work, qlt_free_session_done); 4861 INIT_WORK(&fcport->reg_work, qla_register_fcport_fn); 4862 INIT_LIST_HEAD(&fcport->gnl_entry); 4863 INIT_LIST_HEAD(&fcport->list); 4864 4865 return fcport; 4866 } 4867 4868 void 4869 qla2x00_free_fcport(fc_port_t *fcport) 4870 { 4871 if (fcport->ct_desc.ct_sns) { 4872 dma_free_coherent(&fcport->vha->hw->pdev->dev, 4873 sizeof(struct ct_sns_pkt), fcport->ct_desc.ct_sns, 4874 fcport->ct_desc.ct_sns_dma); 4875 4876 fcport->ct_desc.ct_sns = NULL; 4877 } 4878 list_del(&fcport->list); 4879 qla2x00_clear_loop_id(fcport); 4880 kfree(fcport); 4881 } 4882 4883 /* 4884 * qla2x00_configure_loop 4885 * Updates Fibre Channel Device Database with what is actually on loop. 4886 * 4887 * Input: 4888 * ha = adapter block pointer. 4889 * 4890 * Returns: 4891 * 0 = success. 4892 * 1 = error. 4893 * 2 = database was full and device was not configured. 4894 */ 4895 static int 4896 qla2x00_configure_loop(scsi_qla_host_t *vha) 4897 { 4898 int rval; 4899 unsigned long flags, save_flags; 4900 struct qla_hw_data *ha = vha->hw; 4901 4902 rval = QLA_SUCCESS; 4903 4904 /* Get Initiator ID */ 4905 if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) { 4906 rval = qla2x00_configure_hba(vha); 4907 if (rval != QLA_SUCCESS) { 4908 ql_dbg(ql_dbg_disc, vha, 0x2013, 4909 "Unable to configure HBA.\n"); 4910 return (rval); 4911 } 4912 } 4913 4914 save_flags = flags = vha->dpc_flags; 4915 ql_dbg(ql_dbg_disc, vha, 0x2014, 4916 "Configure loop -- dpc flags = 0x%lx.\n", flags); 4917 4918 /* 4919 * If we have both an RSCN and PORT UPDATE pending then handle them 4920 * both at the same time. 4921 */ 4922 clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 4923 clear_bit(RSCN_UPDATE, &vha->dpc_flags); 4924 4925 qla2x00_get_data_rate(vha); 4926 4927 /* Determine what we need to do */ 4928 if (ha->current_topology == ISP_CFG_FL && 4929 (test_bit(LOCAL_LOOP_UPDATE, &flags))) { 4930 4931 set_bit(RSCN_UPDATE, &flags); 4932 4933 } else if (ha->current_topology == ISP_CFG_F && 4934 (test_bit(LOCAL_LOOP_UPDATE, &flags))) { 4935 4936 set_bit(RSCN_UPDATE, &flags); 4937 clear_bit(LOCAL_LOOP_UPDATE, &flags); 4938 4939 } else if (ha->current_topology == ISP_CFG_NL || 4940 ha->current_topology == ISP_CFG_N) { 4941 clear_bit(RSCN_UPDATE, &flags); 4942 set_bit(LOCAL_LOOP_UPDATE, &flags); 4943 } else if (!vha->flags.online || 4944 (test_bit(ABORT_ISP_ACTIVE, &flags))) { 4945 set_bit(RSCN_UPDATE, &flags); 4946 set_bit(LOCAL_LOOP_UPDATE, &flags); 4947 } 4948 4949 if (test_bit(LOCAL_LOOP_UPDATE, &flags)) { 4950 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 4951 ql_dbg(ql_dbg_disc, vha, 0x2015, 4952 "Loop resync needed, failing.\n"); 4953 rval = QLA_FUNCTION_FAILED; 4954 } else 4955 rval = qla2x00_configure_local_loop(vha); 4956 } 4957 4958 if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) { 4959 if (LOOP_TRANSITION(vha)) { 4960 ql_dbg(ql_dbg_disc, vha, 0x2099, 4961 "Needs RSCN update and loop transition.\n"); 4962 rval = QLA_FUNCTION_FAILED; 4963 } 4964 else 4965 rval = qla2x00_configure_fabric(vha); 4966 } 4967 4968 if (rval == QLA_SUCCESS) { 4969 if (atomic_read(&vha->loop_down_timer) || 4970 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 4971 rval = QLA_FUNCTION_FAILED; 4972 } else { 4973 atomic_set(&vha->loop_state, LOOP_READY); 4974 ql_dbg(ql_dbg_disc, vha, 0x2069, 4975 "LOOP READY.\n"); 4976 ha->flags.fw_init_done = 1; 4977 4978 /* 4979 * Process any ATIO queue entries that came in 4980 * while we weren't online. 4981 */ 4982 if (qla_tgt_mode_enabled(vha) || 4983 qla_dual_mode_enabled(vha)) { 4984 spin_lock_irqsave(&ha->tgt.atio_lock, flags); 4985 qlt_24xx_process_atio_queue(vha, 0); 4986 spin_unlock_irqrestore(&ha->tgt.atio_lock, 4987 flags); 4988 } 4989 } 4990 } 4991 4992 if (rval) { 4993 ql_dbg(ql_dbg_disc, vha, 0x206a, 4994 "%s *** FAILED ***.\n", __func__); 4995 } else { 4996 ql_dbg(ql_dbg_disc, vha, 0x206b, 4997 "%s: exiting normally.\n", __func__); 4998 } 4999 5000 /* Restore state if a resync event occurred during processing */ 5001 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 5002 if (test_bit(LOCAL_LOOP_UPDATE, &save_flags)) 5003 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 5004 if (test_bit(RSCN_UPDATE, &save_flags)) { 5005 set_bit(RSCN_UPDATE, &vha->dpc_flags); 5006 } 5007 } 5008 5009 return (rval); 5010 } 5011 5012 /* 5013 * qla2x00_configure_local_loop 5014 * Updates Fibre Channel Device Database with local loop devices. 5015 * 5016 * Input: 5017 * ha = adapter block pointer. 5018 * 5019 * Returns: 5020 * 0 = success. 5021 */ 5022 static int 5023 qla2x00_configure_local_loop(scsi_qla_host_t *vha) 5024 { 5025 int rval, rval2; 5026 int found_devs; 5027 int found; 5028 fc_port_t *fcport, *new_fcport; 5029 5030 uint16_t index; 5031 uint16_t entries; 5032 struct gid_list_info *gid; 5033 uint16_t loop_id; 5034 uint8_t domain, area, al_pa; 5035 struct qla_hw_data *ha = vha->hw; 5036 unsigned long flags; 5037 5038 /* Inititae N2N login. */ 5039 if (N2N_TOPO(ha)) { 5040 if (test_and_clear_bit(N2N_LOGIN_NEEDED, &vha->dpc_flags)) { 5041 /* borrowing */ 5042 u32 *bp, i, sz; 5043 5044 memset(ha->init_cb, 0, ha->init_cb_size); 5045 sz = min_t(int, sizeof(struct els_plogi_payload), 5046 ha->init_cb_size); 5047 rval = qla24xx_get_port_login_templ(vha, 5048 ha->init_cb_dma, (void *)ha->init_cb, sz); 5049 if (rval == QLA_SUCCESS) { 5050 bp = (uint32_t *)ha->init_cb; 5051 for (i = 0; i < sz/4 ; i++, bp++) 5052 *bp = cpu_to_be32(*bp); 5053 5054 memcpy(&ha->plogi_els_payld.data, 5055 (void *)ha->init_cb, 5056 sizeof(ha->plogi_els_payld.data)); 5057 } else { 5058 ql_dbg(ql_dbg_init, vha, 0x00d1, 5059 "PLOGI ELS param read fail.\n"); 5060 goto skip_login; 5061 } 5062 } 5063 5064 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5065 if (fcport->n2n_flag) { 5066 qla24xx_fcport_handle_login(vha, fcport); 5067 return QLA_SUCCESS; 5068 } 5069 } 5070 skip_login: 5071 spin_lock_irqsave(&vha->work_lock, flags); 5072 vha->scan.scan_retry++; 5073 spin_unlock_irqrestore(&vha->work_lock, flags); 5074 5075 if (vha->scan.scan_retry < MAX_SCAN_RETRIES) { 5076 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 5077 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5078 } 5079 } 5080 5081 found_devs = 0; 5082 new_fcport = NULL; 5083 entries = MAX_FIBRE_DEVICES_LOOP; 5084 5085 /* Get list of logged in devices. */ 5086 memset(ha->gid_list, 0, qla2x00_gid_list_size(ha)); 5087 rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma, 5088 &entries); 5089 if (rval != QLA_SUCCESS) 5090 goto cleanup_allocation; 5091 5092 ql_dbg(ql_dbg_disc, vha, 0x2011, 5093 "Entries in ID list (%d).\n", entries); 5094 ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075, 5095 ha->gid_list, entries * sizeof(*ha->gid_list)); 5096 5097 if (entries == 0) { 5098 spin_lock_irqsave(&vha->work_lock, flags); 5099 vha->scan.scan_retry++; 5100 spin_unlock_irqrestore(&vha->work_lock, flags); 5101 5102 if (vha->scan.scan_retry < MAX_SCAN_RETRIES) { 5103 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 5104 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5105 } 5106 } else { 5107 vha->scan.scan_retry = 0; 5108 } 5109 5110 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5111 fcport->scan_state = QLA_FCPORT_SCAN; 5112 } 5113 5114 /* Allocate temporary fcport for any new fcports discovered. */ 5115 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 5116 if (new_fcport == NULL) { 5117 ql_log(ql_log_warn, vha, 0x2012, 5118 "Memory allocation failed for fcport.\n"); 5119 rval = QLA_MEMORY_ALLOC_FAILED; 5120 goto cleanup_allocation; 5121 } 5122 new_fcport->flags &= ~FCF_FABRIC_DEVICE; 5123 5124 /* Add devices to port list. */ 5125 gid = ha->gid_list; 5126 for (index = 0; index < entries; index++) { 5127 domain = gid->domain; 5128 area = gid->area; 5129 al_pa = gid->al_pa; 5130 if (IS_QLA2100(ha) || IS_QLA2200(ha)) 5131 loop_id = gid->loop_id_2100; 5132 else 5133 loop_id = le16_to_cpu(gid->loop_id); 5134 gid = (void *)gid + ha->gid_list_info_size; 5135 5136 /* Bypass reserved domain fields. */ 5137 if ((domain & 0xf0) == 0xf0) 5138 continue; 5139 5140 /* Bypass if not same domain and area of adapter. */ 5141 if (area && domain && ((area != vha->d_id.b.area) || 5142 (domain != vha->d_id.b.domain)) && 5143 (ha->current_topology == ISP_CFG_NL)) 5144 continue; 5145 5146 5147 /* Bypass invalid local loop ID. */ 5148 if (loop_id > LAST_LOCAL_LOOP_ID) 5149 continue; 5150 5151 memset(new_fcport->port_name, 0, WWN_SIZE); 5152 5153 /* Fill in member data. */ 5154 new_fcport->d_id.b.domain = domain; 5155 new_fcport->d_id.b.area = area; 5156 new_fcport->d_id.b.al_pa = al_pa; 5157 new_fcport->loop_id = loop_id; 5158 new_fcport->scan_state = QLA_FCPORT_FOUND; 5159 5160 rval2 = qla2x00_get_port_database(vha, new_fcport, 0); 5161 if (rval2 != QLA_SUCCESS) { 5162 ql_dbg(ql_dbg_disc, vha, 0x2097, 5163 "Failed to retrieve fcport information " 5164 "-- get_port_database=%x, loop_id=0x%04x.\n", 5165 rval2, new_fcport->loop_id); 5166 /* Skip retry if N2N */ 5167 if (ha->current_topology != ISP_CFG_N) { 5168 ql_dbg(ql_dbg_disc, vha, 0x2105, 5169 "Scheduling resync.\n"); 5170 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5171 continue; 5172 } 5173 } 5174 5175 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 5176 /* Check for matching device in port list. */ 5177 found = 0; 5178 fcport = NULL; 5179 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5180 if (memcmp(new_fcport->port_name, fcport->port_name, 5181 WWN_SIZE)) 5182 continue; 5183 5184 fcport->flags &= ~FCF_FABRIC_DEVICE; 5185 fcport->loop_id = new_fcport->loop_id; 5186 fcport->port_type = new_fcport->port_type; 5187 fcport->d_id.b24 = new_fcport->d_id.b24; 5188 memcpy(fcport->node_name, new_fcport->node_name, 5189 WWN_SIZE); 5190 fcport->scan_state = QLA_FCPORT_FOUND; 5191 found++; 5192 break; 5193 } 5194 5195 if (!found) { 5196 /* New device, add to fcports list. */ 5197 list_add_tail(&new_fcport->list, &vha->vp_fcports); 5198 5199 /* Allocate a new replacement fcport. */ 5200 fcport = new_fcport; 5201 5202 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 5203 5204 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 5205 5206 if (new_fcport == NULL) { 5207 ql_log(ql_log_warn, vha, 0xd031, 5208 "Failed to allocate memory for fcport.\n"); 5209 rval = QLA_MEMORY_ALLOC_FAILED; 5210 goto cleanup_allocation; 5211 } 5212 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 5213 new_fcport->flags &= ~FCF_FABRIC_DEVICE; 5214 } 5215 5216 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 5217 5218 /* Base iIDMA settings on HBA port speed. */ 5219 fcport->fp_speed = ha->link_data_rate; 5220 5221 found_devs++; 5222 } 5223 5224 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5225 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5226 break; 5227 5228 if (fcport->scan_state == QLA_FCPORT_SCAN) { 5229 if ((qla_dual_mode_enabled(vha) || 5230 qla_ini_mode_enabled(vha)) && 5231 atomic_read(&fcport->state) == FCS_ONLINE) { 5232 qla2x00_mark_device_lost(vha, fcport, 5233 ql2xplogiabsentdevice, 0); 5234 if (fcport->loop_id != FC_NO_LOOP_ID && 5235 (fcport->flags & FCF_FCP2_DEVICE) == 0 && 5236 fcport->port_type != FCT_INITIATOR && 5237 fcport->port_type != FCT_BROADCAST) { 5238 ql_dbg(ql_dbg_disc, vha, 0x20f0, 5239 "%s %d %8phC post del sess\n", 5240 __func__, __LINE__, 5241 fcport->port_name); 5242 5243 qlt_schedule_sess_for_deletion(fcport); 5244 continue; 5245 } 5246 } 5247 } 5248 5249 if (fcport->scan_state == QLA_FCPORT_FOUND) 5250 qla24xx_fcport_handle_login(vha, fcport); 5251 } 5252 5253 cleanup_allocation: 5254 kfree(new_fcport); 5255 5256 if (rval != QLA_SUCCESS) { 5257 ql_dbg(ql_dbg_disc, vha, 0x2098, 5258 "Configure local loop error exit: rval=%x.\n", rval); 5259 } 5260 5261 return (rval); 5262 } 5263 5264 static void 5265 qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) 5266 { 5267 int rval; 5268 uint16_t mb[MAILBOX_REGISTER_COUNT]; 5269 struct qla_hw_data *ha = vha->hw; 5270 5271 if (!IS_IIDMA_CAPABLE(ha)) 5272 return; 5273 5274 if (atomic_read(&fcport->state) != FCS_ONLINE) 5275 return; 5276 5277 if (fcport->fp_speed == PORT_SPEED_UNKNOWN || 5278 fcport->fp_speed > ha->link_data_rate || 5279 !ha->flags.gpsc_supported) 5280 return; 5281 5282 rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed, 5283 mb); 5284 if (rval != QLA_SUCCESS) { 5285 ql_dbg(ql_dbg_disc, vha, 0x2004, 5286 "Unable to adjust iIDMA %8phN -- %04x %x %04x %04x.\n", 5287 fcport->port_name, rval, fcport->fp_speed, mb[0], mb[1]); 5288 } else { 5289 ql_dbg(ql_dbg_disc, vha, 0x2005, 5290 "iIDMA adjusted to %s GB/s (%X) on %8phN.\n", 5291 qla2x00_get_link_speed_str(ha, fcport->fp_speed), 5292 fcport->fp_speed, fcport->port_name); 5293 } 5294 } 5295 5296 void qla_do_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport) 5297 { 5298 qla2x00_iidma_fcport(vha, fcport); 5299 qla24xx_update_fcport_fcp_prio(vha, fcport); 5300 } 5301 5302 int qla_post_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport) 5303 { 5304 struct qla_work_evt *e; 5305 5306 e = qla2x00_alloc_work(vha, QLA_EVT_IIDMA); 5307 if (!e) 5308 return QLA_FUNCTION_FAILED; 5309 5310 e->u.fcport.fcport = fcport; 5311 return qla2x00_post_work(vha, e); 5312 } 5313 5314 /* qla2x00_reg_remote_port is reserved for Initiator Mode only.*/ 5315 static void 5316 qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport) 5317 { 5318 struct fc_rport_identifiers rport_ids; 5319 struct fc_rport *rport; 5320 unsigned long flags; 5321 5322 if (atomic_read(&fcport->state) == FCS_ONLINE) 5323 return; 5324 5325 rport_ids.node_name = wwn_to_u64(fcport->node_name); 5326 rport_ids.port_name = wwn_to_u64(fcport->port_name); 5327 rport_ids.port_id = fcport->d_id.b.domain << 16 | 5328 fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa; 5329 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; 5330 fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids); 5331 if (!rport) { 5332 ql_log(ql_log_warn, vha, 0x2006, 5333 "Unable to allocate fc remote port.\n"); 5334 return; 5335 } 5336 5337 spin_lock_irqsave(fcport->vha->host->host_lock, flags); 5338 *((fc_port_t **)rport->dd_data) = fcport; 5339 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags); 5340 5341 rport->supported_classes = fcport->supported_classes; 5342 5343 rport_ids.roles = FC_PORT_ROLE_UNKNOWN; 5344 if (fcport->port_type == FCT_INITIATOR) 5345 rport_ids.roles |= FC_PORT_ROLE_FCP_INITIATOR; 5346 if (fcport->port_type == FCT_TARGET) 5347 rport_ids.roles |= FC_PORT_ROLE_FCP_TARGET; 5348 if (fcport->port_type & FCT_NVME_INITIATOR) 5349 rport_ids.roles |= FC_PORT_ROLE_NVME_INITIATOR; 5350 if (fcport->port_type & FCT_NVME_TARGET) 5351 rport_ids.roles |= FC_PORT_ROLE_NVME_TARGET; 5352 if (fcport->port_type & FCT_NVME_DISCOVERY) 5353 rport_ids.roles |= FC_PORT_ROLE_NVME_DISCOVERY; 5354 5355 ql_dbg(ql_dbg_disc, vha, 0x20ee, 5356 "%s %8phN. rport %p is %s mode\n", 5357 __func__, fcport->port_name, rport, 5358 (fcport->port_type == FCT_TARGET) ? "tgt" : 5359 ((fcport->port_type & FCT_NVME) ? "nvme" : "ini")); 5360 5361 fc_remote_port_rolechg(rport, rport_ids.roles); 5362 } 5363 5364 /* 5365 * qla2x00_update_fcport 5366 * Updates device on list. 5367 * 5368 * Input: 5369 * ha = adapter block pointer. 5370 * fcport = port structure pointer. 5371 * 5372 * Return: 5373 * 0 - Success 5374 * BIT_0 - error 5375 * 5376 * Context: 5377 * Kernel context. 5378 */ 5379 void 5380 qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) 5381 { 5382 if (IS_SW_RESV_ADDR(fcport->d_id)) 5383 return; 5384 5385 ql_dbg(ql_dbg_disc, vha, 0x20ef, "%s %8phC\n", 5386 __func__, fcport->port_name); 5387 5388 fcport->disc_state = DSC_UPD_FCPORT; 5389 fcport->login_retry = vha->hw->login_retry_count; 5390 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 5391 fcport->deleted = 0; 5392 fcport->logout_on_delete = 1; 5393 fcport->n2n_chip_reset = fcport->n2n_link_reset_cnt = 0; 5394 5395 switch (vha->hw->current_topology) { 5396 case ISP_CFG_N: 5397 case ISP_CFG_NL: 5398 fcport->keep_nport_handle = 1; 5399 break; 5400 default: 5401 break; 5402 } 5403 5404 qla2x00_iidma_fcport(vha, fcport); 5405 5406 if (NVME_TARGET(vha->hw, fcport)) { 5407 qla_nvme_register_remote(vha, fcport); 5408 fcport->disc_state = DSC_LOGIN_COMPLETE; 5409 qla2x00_set_fcport_state(fcport, FCS_ONLINE); 5410 return; 5411 } 5412 5413 qla24xx_update_fcport_fcp_prio(vha, fcport); 5414 5415 switch (vha->host->active_mode) { 5416 case MODE_INITIATOR: 5417 qla2x00_reg_remote_port(vha, fcport); 5418 break; 5419 case MODE_TARGET: 5420 if (!vha->vha_tgt.qla_tgt->tgt_stop && 5421 !vha->vha_tgt.qla_tgt->tgt_stopped) 5422 qlt_fc_port_added(vha, fcport); 5423 break; 5424 case MODE_DUAL: 5425 qla2x00_reg_remote_port(vha, fcport); 5426 if (!vha->vha_tgt.qla_tgt->tgt_stop && 5427 !vha->vha_tgt.qla_tgt->tgt_stopped) 5428 qlt_fc_port_added(vha, fcport); 5429 break; 5430 default: 5431 break; 5432 } 5433 5434 qla2x00_set_fcport_state(fcport, FCS_ONLINE); 5435 5436 if (IS_IIDMA_CAPABLE(vha->hw) && vha->hw->flags.gpsc_supported) { 5437 if (fcport->id_changed) { 5438 fcport->id_changed = 0; 5439 ql_dbg(ql_dbg_disc, vha, 0x20d7, 5440 "%s %d %8phC post gfpnid fcp_cnt %d\n", 5441 __func__, __LINE__, fcport->port_name, 5442 vha->fcport_count); 5443 qla24xx_post_gfpnid_work(vha, fcport); 5444 } else { 5445 ql_dbg(ql_dbg_disc, vha, 0x20d7, 5446 "%s %d %8phC post gpsc fcp_cnt %d\n", 5447 __func__, __LINE__, fcport->port_name, 5448 vha->fcport_count); 5449 qla24xx_post_gpsc_work(vha, fcport); 5450 } 5451 } 5452 5453 fcport->disc_state = DSC_LOGIN_COMPLETE; 5454 } 5455 5456 void qla_register_fcport_fn(struct work_struct *work) 5457 { 5458 fc_port_t *fcport = container_of(work, struct fc_port, reg_work); 5459 u32 rscn_gen = fcport->rscn_gen; 5460 u16 data[2]; 5461 5462 if (IS_SW_RESV_ADDR(fcport->d_id)) 5463 return; 5464 5465 qla2x00_update_fcport(fcport->vha, fcport); 5466 5467 if (rscn_gen != fcport->rscn_gen) { 5468 /* RSCN(s) came in while registration */ 5469 switch (fcport->next_disc_state) { 5470 case DSC_DELETE_PEND: 5471 qlt_schedule_sess_for_deletion(fcport); 5472 break; 5473 case DSC_ADISC: 5474 data[0] = data[1] = 0; 5475 qla2x00_post_async_adisc_work(fcport->vha, fcport, 5476 data); 5477 break; 5478 default: 5479 break; 5480 } 5481 } 5482 } 5483 5484 /* 5485 * qla2x00_configure_fabric 5486 * Setup SNS devices with loop ID's. 5487 * 5488 * Input: 5489 * ha = adapter block pointer. 5490 * 5491 * Returns: 5492 * 0 = success. 5493 * BIT_0 = error 5494 */ 5495 static int 5496 qla2x00_configure_fabric(scsi_qla_host_t *vha) 5497 { 5498 int rval; 5499 fc_port_t *fcport; 5500 uint16_t mb[MAILBOX_REGISTER_COUNT]; 5501 uint16_t loop_id; 5502 LIST_HEAD(new_fcports); 5503 struct qla_hw_data *ha = vha->hw; 5504 int discovery_gen; 5505 5506 /* If FL port exists, then SNS is present */ 5507 if (IS_FWI2_CAPABLE(ha)) 5508 loop_id = NPH_F_PORT; 5509 else 5510 loop_id = SNS_FL_PORT; 5511 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1); 5512 if (rval != QLA_SUCCESS) { 5513 ql_dbg(ql_dbg_disc, vha, 0x20a0, 5514 "MBX_GET_PORT_NAME failed, No FL Port.\n"); 5515 5516 vha->device_flags &= ~SWITCH_FOUND; 5517 return (QLA_SUCCESS); 5518 } 5519 vha->device_flags |= SWITCH_FOUND; 5520 5521 5522 if (qla_tgt_mode_enabled(vha) || qla_dual_mode_enabled(vha)) { 5523 rval = qla2x00_send_change_request(vha, 0x3, 0); 5524 if (rval != QLA_SUCCESS) 5525 ql_log(ql_log_warn, vha, 0x121, 5526 "Failed to enable receiving of RSCN requests: 0x%x.\n", 5527 rval); 5528 } 5529 5530 5531 do { 5532 qla2x00_mgmt_svr_login(vha); 5533 5534 /* FDMI support. */ 5535 if (ql2xfdmienable && 5536 test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags)) 5537 qla2x00_fdmi_register(vha); 5538 5539 /* Ensure we are logged into the SNS. */ 5540 loop_id = NPH_SNS_LID(ha); 5541 rval = ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff, 5542 0xfc, mb, BIT_1|BIT_0); 5543 if (rval != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) { 5544 ql_dbg(ql_dbg_disc, vha, 0x20a1, 5545 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[6]=%x mb[7]=%x (%x).\n", 5546 loop_id, mb[0], mb[1], mb[2], mb[6], mb[7], rval); 5547 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5548 return rval; 5549 } 5550 if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) { 5551 if (qla2x00_rft_id(vha)) { 5552 /* EMPTY */ 5553 ql_dbg(ql_dbg_disc, vha, 0x20a2, 5554 "Register FC-4 TYPE failed.\n"); 5555 if (test_bit(LOOP_RESYNC_NEEDED, 5556 &vha->dpc_flags)) 5557 break; 5558 } 5559 if (qla2x00_rff_id(vha, FC4_TYPE_FCP_SCSI)) { 5560 /* EMPTY */ 5561 ql_dbg(ql_dbg_disc, vha, 0x209a, 5562 "Register FC-4 Features failed.\n"); 5563 if (test_bit(LOOP_RESYNC_NEEDED, 5564 &vha->dpc_flags)) 5565 break; 5566 } 5567 if (vha->flags.nvme_enabled) { 5568 if (qla2x00_rff_id(vha, FC_TYPE_NVME)) { 5569 ql_dbg(ql_dbg_disc, vha, 0x2049, 5570 "Register NVME FC Type Features failed.\n"); 5571 } 5572 } 5573 if (qla2x00_rnn_id(vha)) { 5574 /* EMPTY */ 5575 ql_dbg(ql_dbg_disc, vha, 0x2104, 5576 "Register Node Name failed.\n"); 5577 if (test_bit(LOOP_RESYNC_NEEDED, 5578 &vha->dpc_flags)) 5579 break; 5580 } else if (qla2x00_rsnn_nn(vha)) { 5581 /* EMPTY */ 5582 ql_dbg(ql_dbg_disc, vha, 0x209b, 5583 "Register Symbolic Node Name failed.\n"); 5584 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5585 break; 5586 } 5587 } 5588 5589 5590 /* Mark the time right before querying FW for connected ports. 5591 * This process is long, asynchronous and by the time it's done, 5592 * collected information might not be accurate anymore. E.g. 5593 * disconnected port might have re-connected and a brand new 5594 * session has been created. In this case session's generation 5595 * will be newer than discovery_gen. */ 5596 qlt_do_generation_tick(vha, &discovery_gen); 5597 5598 if (USE_ASYNC_SCAN(ha)) { 5599 rval = qla24xx_async_gpnft(vha, FC4_TYPE_FCP_SCSI, 5600 NULL); 5601 if (rval) 5602 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5603 } else { 5604 list_for_each_entry(fcport, &vha->vp_fcports, list) 5605 fcport->scan_state = QLA_FCPORT_SCAN; 5606 5607 rval = qla2x00_find_all_fabric_devs(vha); 5608 } 5609 if (rval != QLA_SUCCESS) 5610 break; 5611 } while (0); 5612 5613 if (!vha->nvme_local_port && vha->flags.nvme_enabled) 5614 qla_nvme_register_hba(vha); 5615 5616 if (rval) 5617 ql_dbg(ql_dbg_disc, vha, 0x2068, 5618 "Configure fabric error exit rval=%d.\n", rval); 5619 5620 return (rval); 5621 } 5622 5623 /* 5624 * qla2x00_find_all_fabric_devs 5625 * 5626 * Input: 5627 * ha = adapter block pointer. 5628 * dev = database device entry pointer. 5629 * 5630 * Returns: 5631 * 0 = success. 5632 * 5633 * Context: 5634 * Kernel context. 5635 */ 5636 static int 5637 qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha) 5638 { 5639 int rval; 5640 uint16_t loop_id; 5641 fc_port_t *fcport, *new_fcport; 5642 int found; 5643 5644 sw_info_t *swl; 5645 int swl_idx; 5646 int first_dev, last_dev; 5647 port_id_t wrap = {}, nxt_d_id; 5648 struct qla_hw_data *ha = vha->hw; 5649 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 5650 unsigned long flags; 5651 5652 rval = QLA_SUCCESS; 5653 5654 /* Try GID_PT to get device list, else GAN. */ 5655 if (!ha->swl) 5656 ha->swl = kcalloc(ha->max_fibre_devices, sizeof(sw_info_t), 5657 GFP_KERNEL); 5658 swl = ha->swl; 5659 if (!swl) { 5660 /*EMPTY*/ 5661 ql_dbg(ql_dbg_disc, vha, 0x209c, 5662 "GID_PT allocations failed, fallback on GA_NXT.\n"); 5663 } else { 5664 memset(swl, 0, ha->max_fibre_devices * sizeof(sw_info_t)); 5665 if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) { 5666 swl = NULL; 5667 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5668 return rval; 5669 } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) { 5670 swl = NULL; 5671 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5672 return rval; 5673 } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) { 5674 swl = NULL; 5675 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5676 return rval; 5677 } else if (qla2x00_gfpn_id(vha, swl) != QLA_SUCCESS) { 5678 swl = NULL; 5679 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5680 return rval; 5681 } 5682 5683 /* If other queries succeeded probe for FC-4 type */ 5684 if (swl) { 5685 qla2x00_gff_id(vha, swl); 5686 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5687 return rval; 5688 } 5689 } 5690 swl_idx = 0; 5691 5692 /* Allocate temporary fcport for any new fcports discovered. */ 5693 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 5694 if (new_fcport == NULL) { 5695 ql_log(ql_log_warn, vha, 0x209d, 5696 "Failed to allocate memory for fcport.\n"); 5697 return (QLA_MEMORY_ALLOC_FAILED); 5698 } 5699 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); 5700 /* Set start port ID scan at adapter ID. */ 5701 first_dev = 1; 5702 last_dev = 0; 5703 5704 /* Starting free loop ID. */ 5705 loop_id = ha->min_external_loopid; 5706 for (; loop_id <= ha->max_loop_id; loop_id++) { 5707 if (qla2x00_is_reserved_id(vha, loop_id)) 5708 continue; 5709 5710 if (ha->current_topology == ISP_CFG_FL && 5711 (atomic_read(&vha->loop_down_timer) || 5712 LOOP_TRANSITION(vha))) { 5713 atomic_set(&vha->loop_down_timer, 0); 5714 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5715 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 5716 break; 5717 } 5718 5719 if (swl != NULL) { 5720 if (last_dev) { 5721 wrap.b24 = new_fcport->d_id.b24; 5722 } else { 5723 new_fcport->d_id.b24 = swl[swl_idx].d_id.b24; 5724 memcpy(new_fcport->node_name, 5725 swl[swl_idx].node_name, WWN_SIZE); 5726 memcpy(new_fcport->port_name, 5727 swl[swl_idx].port_name, WWN_SIZE); 5728 memcpy(new_fcport->fabric_port_name, 5729 swl[swl_idx].fabric_port_name, WWN_SIZE); 5730 new_fcport->fp_speed = swl[swl_idx].fp_speed; 5731 new_fcport->fc4_type = swl[swl_idx].fc4_type; 5732 5733 new_fcport->nvme_flag = 0; 5734 if (vha->flags.nvme_enabled && 5735 swl[swl_idx].fc4_type & FS_FC4TYPE_NVME) { 5736 ql_log(ql_log_info, vha, 0x2131, 5737 "FOUND: NVME port %8phC as FC Type 28h\n", 5738 new_fcport->port_name); 5739 } 5740 5741 if (swl[swl_idx].d_id.b.rsvd_1 != 0) { 5742 last_dev = 1; 5743 } 5744 swl_idx++; 5745 } 5746 } else { 5747 /* Send GA_NXT to the switch */ 5748 rval = qla2x00_ga_nxt(vha, new_fcport); 5749 if (rval != QLA_SUCCESS) { 5750 ql_log(ql_log_warn, vha, 0x209e, 5751 "SNS scan failed -- assuming " 5752 "zero-entry result.\n"); 5753 rval = QLA_SUCCESS; 5754 break; 5755 } 5756 } 5757 5758 /* If wrap on switch device list, exit. */ 5759 if (first_dev) { 5760 wrap.b24 = new_fcport->d_id.b24; 5761 first_dev = 0; 5762 } else if (new_fcport->d_id.b24 == wrap.b24) { 5763 ql_dbg(ql_dbg_disc, vha, 0x209f, 5764 "Device wrap (%02x%02x%02x).\n", 5765 new_fcport->d_id.b.domain, 5766 new_fcport->d_id.b.area, 5767 new_fcport->d_id.b.al_pa); 5768 break; 5769 } 5770 5771 /* Bypass if same physical adapter. */ 5772 if (new_fcport->d_id.b24 == base_vha->d_id.b24) 5773 continue; 5774 5775 /* Bypass virtual ports of the same host. */ 5776 if (qla2x00_is_a_vp_did(vha, new_fcport->d_id.b24)) 5777 continue; 5778 5779 /* Bypass if same domain and area of adapter. */ 5780 if (((new_fcport->d_id.b24 & 0xffff00) == 5781 (vha->d_id.b24 & 0xffff00)) && ha->current_topology == 5782 ISP_CFG_FL) 5783 continue; 5784 5785 /* Bypass reserved domain fields. */ 5786 if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0) 5787 continue; 5788 5789 /* Bypass ports whose FCP-4 type is not FCP_SCSI */ 5790 if (ql2xgffidenable && 5791 (!(new_fcport->fc4_type & FS_FC4TYPE_FCP) && 5792 new_fcport->fc4_type != FC4_TYPE_UNKNOWN)) 5793 continue; 5794 5795 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 5796 5797 /* Locate matching device in database. */ 5798 found = 0; 5799 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5800 if (memcmp(new_fcport->port_name, fcport->port_name, 5801 WWN_SIZE)) 5802 continue; 5803 5804 fcport->scan_state = QLA_FCPORT_FOUND; 5805 5806 found++; 5807 5808 /* Update port state. */ 5809 memcpy(fcport->fabric_port_name, 5810 new_fcport->fabric_port_name, WWN_SIZE); 5811 fcport->fp_speed = new_fcport->fp_speed; 5812 5813 /* 5814 * If address the same and state FCS_ONLINE 5815 * (or in target mode), nothing changed. 5816 */ 5817 if (fcport->d_id.b24 == new_fcport->d_id.b24 && 5818 (atomic_read(&fcport->state) == FCS_ONLINE || 5819 (vha->host->active_mode == MODE_TARGET))) { 5820 break; 5821 } 5822 5823 /* 5824 * If device was not a fabric device before. 5825 */ 5826 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) { 5827 fcport->d_id.b24 = new_fcport->d_id.b24; 5828 qla2x00_clear_loop_id(fcport); 5829 fcport->flags |= (FCF_FABRIC_DEVICE | 5830 FCF_LOGIN_NEEDED); 5831 break; 5832 } 5833 5834 /* 5835 * Port ID changed or device was marked to be updated; 5836 * Log it out if still logged in and mark it for 5837 * relogin later. 5838 */ 5839 if (qla_tgt_mode_enabled(base_vha)) { 5840 ql_dbg(ql_dbg_tgt_mgt, vha, 0xf080, 5841 "port changed FC ID, %8phC" 5842 " old %x:%x:%x (loop_id 0x%04x)-> new %x:%x:%x\n", 5843 fcport->port_name, 5844 fcport->d_id.b.domain, 5845 fcport->d_id.b.area, 5846 fcport->d_id.b.al_pa, 5847 fcport->loop_id, 5848 new_fcport->d_id.b.domain, 5849 new_fcport->d_id.b.area, 5850 new_fcport->d_id.b.al_pa); 5851 fcport->d_id.b24 = new_fcport->d_id.b24; 5852 break; 5853 } 5854 5855 fcport->d_id.b24 = new_fcport->d_id.b24; 5856 fcport->flags |= FCF_LOGIN_NEEDED; 5857 break; 5858 } 5859 5860 if (NVME_TARGET(vha->hw, fcport)) { 5861 if (fcport->disc_state == DSC_DELETE_PEND) { 5862 fcport->disc_state = DSC_GNL; 5863 vha->fcport_count--; 5864 fcport->login_succ = 0; 5865 } 5866 } 5867 5868 if (found) { 5869 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 5870 continue; 5871 } 5872 /* If device was not in our fcports list, then add it. */ 5873 new_fcport->scan_state = QLA_FCPORT_FOUND; 5874 list_add_tail(&new_fcport->list, &vha->vp_fcports); 5875 5876 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 5877 5878 5879 /* Allocate a new replacement fcport. */ 5880 nxt_d_id.b24 = new_fcport->d_id.b24; 5881 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 5882 if (new_fcport == NULL) { 5883 ql_log(ql_log_warn, vha, 0xd032, 5884 "Memory allocation failed for fcport.\n"); 5885 return (QLA_MEMORY_ALLOC_FAILED); 5886 } 5887 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); 5888 new_fcport->d_id.b24 = nxt_d_id.b24; 5889 } 5890 5891 qla2x00_free_fcport(new_fcport); 5892 5893 /* 5894 * Logout all previous fabric dev marked lost, except FCP2 devices. 5895 */ 5896 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5897 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5898 break; 5899 5900 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) 5901 continue; 5902 5903 if (fcport->scan_state == QLA_FCPORT_SCAN) { 5904 if ((qla_dual_mode_enabled(vha) || 5905 qla_ini_mode_enabled(vha)) && 5906 atomic_read(&fcport->state) == FCS_ONLINE) { 5907 qla2x00_mark_device_lost(vha, fcport, 5908 ql2xplogiabsentdevice, 0); 5909 if (fcport->loop_id != FC_NO_LOOP_ID && 5910 (fcport->flags & FCF_FCP2_DEVICE) == 0 && 5911 fcport->port_type != FCT_INITIATOR && 5912 fcport->port_type != FCT_BROADCAST) { 5913 ql_dbg(ql_dbg_disc, vha, 0x20f0, 5914 "%s %d %8phC post del sess\n", 5915 __func__, __LINE__, 5916 fcport->port_name); 5917 qlt_schedule_sess_for_deletion(fcport); 5918 continue; 5919 } 5920 } 5921 } 5922 5923 if (fcport->scan_state == QLA_FCPORT_FOUND && 5924 (fcport->flags & FCF_LOGIN_NEEDED) != 0) 5925 qla24xx_fcport_handle_login(vha, fcport); 5926 } 5927 return (rval); 5928 } 5929 5930 /* FW does not set aside Loop id for MGMT Server/FFFFFAh */ 5931 int 5932 qla2x00_reserve_mgmt_server_loop_id(scsi_qla_host_t *vha) 5933 { 5934 int loop_id = FC_NO_LOOP_ID; 5935 int lid = NPH_MGMT_SERVER - vha->vp_idx; 5936 unsigned long flags; 5937 struct qla_hw_data *ha = vha->hw; 5938 5939 if (vha->vp_idx == 0) { 5940 set_bit(NPH_MGMT_SERVER, ha->loop_id_map); 5941 return NPH_MGMT_SERVER; 5942 } 5943 5944 /* pick id from high and work down to low */ 5945 spin_lock_irqsave(&ha->vport_slock, flags); 5946 for (; lid > 0; lid--) { 5947 if (!test_bit(lid, vha->hw->loop_id_map)) { 5948 set_bit(lid, vha->hw->loop_id_map); 5949 loop_id = lid; 5950 break; 5951 } 5952 } 5953 spin_unlock_irqrestore(&ha->vport_slock, flags); 5954 5955 return loop_id; 5956 } 5957 5958 /* 5959 * qla2x00_fabric_login 5960 * Issue fabric login command. 5961 * 5962 * Input: 5963 * ha = adapter block pointer. 5964 * device = pointer to FC device type structure. 5965 * 5966 * Returns: 5967 * 0 - Login successfully 5968 * 1 - Login failed 5969 * 2 - Initiator device 5970 * 3 - Fatal error 5971 */ 5972 int 5973 qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport, 5974 uint16_t *next_loopid) 5975 { 5976 int rval; 5977 int retry; 5978 uint16_t tmp_loopid; 5979 uint16_t mb[MAILBOX_REGISTER_COUNT]; 5980 struct qla_hw_data *ha = vha->hw; 5981 5982 retry = 0; 5983 tmp_loopid = 0; 5984 5985 for (;;) { 5986 ql_dbg(ql_dbg_disc, vha, 0x2000, 5987 "Trying Fabric Login w/loop id 0x%04x for port " 5988 "%02x%02x%02x.\n", 5989 fcport->loop_id, fcport->d_id.b.domain, 5990 fcport->d_id.b.area, fcport->d_id.b.al_pa); 5991 5992 /* Login fcport on switch. */ 5993 rval = ha->isp_ops->fabric_login(vha, fcport->loop_id, 5994 fcport->d_id.b.domain, fcport->d_id.b.area, 5995 fcport->d_id.b.al_pa, mb, BIT_0); 5996 if (rval != QLA_SUCCESS) { 5997 return rval; 5998 } 5999 if (mb[0] == MBS_PORT_ID_USED) { 6000 /* 6001 * Device has another loop ID. The firmware team 6002 * recommends the driver perform an implicit login with 6003 * the specified ID again. The ID we just used is save 6004 * here so we return with an ID that can be tried by 6005 * the next login. 6006 */ 6007 retry++; 6008 tmp_loopid = fcport->loop_id; 6009 fcport->loop_id = mb[1]; 6010 6011 ql_dbg(ql_dbg_disc, vha, 0x2001, 6012 "Fabric Login: port in use - next loop " 6013 "id=0x%04x, port id= %02x%02x%02x.\n", 6014 fcport->loop_id, fcport->d_id.b.domain, 6015 fcport->d_id.b.area, fcport->d_id.b.al_pa); 6016 6017 } else if (mb[0] == MBS_COMMAND_COMPLETE) { 6018 /* 6019 * Login succeeded. 6020 */ 6021 if (retry) { 6022 /* A retry occurred before. */ 6023 *next_loopid = tmp_loopid; 6024 } else { 6025 /* 6026 * No retry occurred before. Just increment the 6027 * ID value for next login. 6028 */ 6029 *next_loopid = (fcport->loop_id + 1); 6030 } 6031 6032 if (mb[1] & BIT_0) { 6033 fcport->port_type = FCT_INITIATOR; 6034 } else { 6035 fcport->port_type = FCT_TARGET; 6036 if (mb[1] & BIT_1) { 6037 fcport->flags |= FCF_FCP2_DEVICE; 6038 } 6039 } 6040 6041 if (mb[10] & BIT_0) 6042 fcport->supported_classes |= FC_COS_CLASS2; 6043 if (mb[10] & BIT_1) 6044 fcport->supported_classes |= FC_COS_CLASS3; 6045 6046 if (IS_FWI2_CAPABLE(ha)) { 6047 if (mb[10] & BIT_7) 6048 fcport->flags |= 6049 FCF_CONF_COMP_SUPPORTED; 6050 } 6051 6052 rval = QLA_SUCCESS; 6053 break; 6054 } else if (mb[0] == MBS_LOOP_ID_USED) { 6055 /* 6056 * Loop ID already used, try next loop ID. 6057 */ 6058 fcport->loop_id++; 6059 rval = qla2x00_find_new_loop_id(vha, fcport); 6060 if (rval != QLA_SUCCESS) { 6061 /* Ran out of loop IDs to use */ 6062 break; 6063 } 6064 } else if (mb[0] == MBS_COMMAND_ERROR) { 6065 /* 6066 * Firmware possibly timed out during login. If NO 6067 * retries are left to do then the device is declared 6068 * dead. 6069 */ 6070 *next_loopid = fcport->loop_id; 6071 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 6072 fcport->d_id.b.domain, fcport->d_id.b.area, 6073 fcport->d_id.b.al_pa); 6074 qla2x00_mark_device_lost(vha, fcport, 1, 0); 6075 6076 rval = 1; 6077 break; 6078 } else { 6079 /* 6080 * unrecoverable / not handled error 6081 */ 6082 ql_dbg(ql_dbg_disc, vha, 0x2002, 6083 "Failed=%x port_id=%02x%02x%02x loop_id=%x " 6084 "jiffies=%lx.\n", mb[0], fcport->d_id.b.domain, 6085 fcport->d_id.b.area, fcport->d_id.b.al_pa, 6086 fcport->loop_id, jiffies); 6087 6088 *next_loopid = fcport->loop_id; 6089 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 6090 fcport->d_id.b.domain, fcport->d_id.b.area, 6091 fcport->d_id.b.al_pa); 6092 qla2x00_clear_loop_id(fcport); 6093 fcport->login_retry = 0; 6094 6095 rval = 3; 6096 break; 6097 } 6098 } 6099 6100 return (rval); 6101 } 6102 6103 /* 6104 * qla2x00_local_device_login 6105 * Issue local device login command. 6106 * 6107 * Input: 6108 * ha = adapter block pointer. 6109 * loop_id = loop id of device to login to. 6110 * 6111 * Returns (Where's the #define!!!!): 6112 * 0 - Login successfully 6113 * 1 - Login failed 6114 * 3 - Fatal error 6115 */ 6116 int 6117 qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport) 6118 { 6119 int rval; 6120 uint16_t mb[MAILBOX_REGISTER_COUNT]; 6121 6122 memset(mb, 0, sizeof(mb)); 6123 rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0); 6124 if (rval == QLA_SUCCESS) { 6125 /* Interrogate mailbox registers for any errors */ 6126 if (mb[0] == MBS_COMMAND_ERROR) 6127 rval = 1; 6128 else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR) 6129 /* device not in PCB table */ 6130 rval = 3; 6131 } 6132 6133 return (rval); 6134 } 6135 6136 /* 6137 * qla2x00_loop_resync 6138 * Resync with fibre channel devices. 6139 * 6140 * Input: 6141 * ha = adapter block pointer. 6142 * 6143 * Returns: 6144 * 0 = success 6145 */ 6146 int 6147 qla2x00_loop_resync(scsi_qla_host_t *vha) 6148 { 6149 int rval = QLA_SUCCESS; 6150 uint32_t wait_time; 6151 6152 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6153 if (vha->flags.online) { 6154 if (!(rval = qla2x00_fw_ready(vha))) { 6155 /* Wait at most MAX_TARGET RSCNs for a stable link. */ 6156 wait_time = 256; 6157 do { 6158 if (!IS_QLAFX00(vha->hw)) { 6159 /* 6160 * Issue a marker after FW becomes 6161 * ready. 6162 */ 6163 qla2x00_marker(vha, vha->hw->base_qpair, 6164 0, 0, MK_SYNC_ALL); 6165 vha->marker_needed = 0; 6166 } 6167 6168 /* Remap devices on Loop. */ 6169 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 6170 6171 if (IS_QLAFX00(vha->hw)) 6172 qlafx00_configure_devices(vha); 6173 else 6174 qla2x00_configure_loop(vha); 6175 6176 wait_time--; 6177 } while (!atomic_read(&vha->loop_down_timer) && 6178 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) 6179 && wait_time && (test_bit(LOOP_RESYNC_NEEDED, 6180 &vha->dpc_flags))); 6181 } 6182 } 6183 6184 if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) 6185 return (QLA_FUNCTION_FAILED); 6186 6187 if (rval) 6188 ql_dbg(ql_dbg_disc, vha, 0x206c, 6189 "%s *** FAILED ***.\n", __func__); 6190 6191 return (rval); 6192 } 6193 6194 /* 6195 * qla2x00_perform_loop_resync 6196 * Description: This function will set the appropriate flags and call 6197 * qla2x00_loop_resync. If successful loop will be resynced 6198 * Arguments : scsi_qla_host_t pointer 6199 * returm : Success or Failure 6200 */ 6201 6202 int qla2x00_perform_loop_resync(scsi_qla_host_t *ha) 6203 { 6204 int32_t rval = 0; 6205 6206 if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) { 6207 /*Configure the flags so that resync happens properly*/ 6208 atomic_set(&ha->loop_down_timer, 0); 6209 if (!(ha->device_flags & DFLG_NO_CABLE)) { 6210 atomic_set(&ha->loop_state, LOOP_UP); 6211 set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags); 6212 set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags); 6213 set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags); 6214 6215 rval = qla2x00_loop_resync(ha); 6216 } else 6217 atomic_set(&ha->loop_state, LOOP_DEAD); 6218 6219 clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags); 6220 } 6221 6222 return rval; 6223 } 6224 6225 void 6226 qla2x00_update_fcports(scsi_qla_host_t *base_vha) 6227 { 6228 fc_port_t *fcport; 6229 struct scsi_qla_host *vha; 6230 struct qla_hw_data *ha = base_vha->hw; 6231 unsigned long flags; 6232 6233 spin_lock_irqsave(&ha->vport_slock, flags); 6234 /* Go with deferred removal of rport references. */ 6235 list_for_each_entry(vha, &base_vha->hw->vp_list, list) { 6236 atomic_inc(&vha->vref_count); 6237 list_for_each_entry(fcport, &vha->vp_fcports, list) { 6238 if (fcport->drport && 6239 atomic_read(&fcport->state) != FCS_UNCONFIGURED) { 6240 spin_unlock_irqrestore(&ha->vport_slock, flags); 6241 qla2x00_rport_del(fcport); 6242 6243 spin_lock_irqsave(&ha->vport_slock, flags); 6244 } 6245 } 6246 atomic_dec(&vha->vref_count); 6247 wake_up(&vha->vref_waitq); 6248 } 6249 spin_unlock_irqrestore(&ha->vport_slock, flags); 6250 } 6251 6252 /* Assumes idc_lock always held on entry */ 6253 void 6254 qla83xx_reset_ownership(scsi_qla_host_t *vha) 6255 { 6256 struct qla_hw_data *ha = vha->hw; 6257 uint32_t drv_presence, drv_presence_mask; 6258 uint32_t dev_part_info1, dev_part_info2, class_type; 6259 uint32_t class_type_mask = 0x3; 6260 uint16_t fcoe_other_function = 0xffff, i; 6261 6262 if (IS_QLA8044(ha)) { 6263 drv_presence = qla8044_rd_direct(vha, 6264 QLA8044_CRB_DRV_ACTIVE_INDEX); 6265 dev_part_info1 = qla8044_rd_direct(vha, 6266 QLA8044_CRB_DEV_PART_INFO_INDEX); 6267 dev_part_info2 = qla8044_rd_direct(vha, 6268 QLA8044_CRB_DEV_PART_INFO2); 6269 } else { 6270 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence); 6271 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO1, &dev_part_info1); 6272 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO2, &dev_part_info2); 6273 } 6274 for (i = 0; i < 8; i++) { 6275 class_type = ((dev_part_info1 >> (i * 4)) & class_type_mask); 6276 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) && 6277 (i != ha->portnum)) { 6278 fcoe_other_function = i; 6279 break; 6280 } 6281 } 6282 if (fcoe_other_function == 0xffff) { 6283 for (i = 0; i < 8; i++) { 6284 class_type = ((dev_part_info2 >> (i * 4)) & 6285 class_type_mask); 6286 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) && 6287 ((i + 8) != ha->portnum)) { 6288 fcoe_other_function = i + 8; 6289 break; 6290 } 6291 } 6292 } 6293 /* 6294 * Prepare drv-presence mask based on fcoe functions present. 6295 * However consider only valid physical fcoe function numbers (0-15). 6296 */ 6297 drv_presence_mask = ~((1 << (ha->portnum)) | 6298 ((fcoe_other_function == 0xffff) ? 6299 0 : (1 << (fcoe_other_function)))); 6300 6301 /* We are the reset owner iff: 6302 * - No other protocol drivers present. 6303 * - This is the lowest among fcoe functions. */ 6304 if (!(drv_presence & drv_presence_mask) && 6305 (ha->portnum < fcoe_other_function)) { 6306 ql_dbg(ql_dbg_p3p, vha, 0xb07f, 6307 "This host is Reset owner.\n"); 6308 ha->flags.nic_core_reset_owner = 1; 6309 } 6310 } 6311 6312 static int 6313 __qla83xx_set_drv_ack(scsi_qla_host_t *vha) 6314 { 6315 int rval = QLA_SUCCESS; 6316 struct qla_hw_data *ha = vha->hw; 6317 uint32_t drv_ack; 6318 6319 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack); 6320 if (rval == QLA_SUCCESS) { 6321 drv_ack |= (1 << ha->portnum); 6322 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack); 6323 } 6324 6325 return rval; 6326 } 6327 6328 static int 6329 __qla83xx_clear_drv_ack(scsi_qla_host_t *vha) 6330 { 6331 int rval = QLA_SUCCESS; 6332 struct qla_hw_data *ha = vha->hw; 6333 uint32_t drv_ack; 6334 6335 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack); 6336 if (rval == QLA_SUCCESS) { 6337 drv_ack &= ~(1 << ha->portnum); 6338 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack); 6339 } 6340 6341 return rval; 6342 } 6343 6344 static const char * 6345 qla83xx_dev_state_to_string(uint32_t dev_state) 6346 { 6347 switch (dev_state) { 6348 case QLA8XXX_DEV_COLD: 6349 return "COLD/RE-INIT"; 6350 case QLA8XXX_DEV_INITIALIZING: 6351 return "INITIALIZING"; 6352 case QLA8XXX_DEV_READY: 6353 return "READY"; 6354 case QLA8XXX_DEV_NEED_RESET: 6355 return "NEED RESET"; 6356 case QLA8XXX_DEV_NEED_QUIESCENT: 6357 return "NEED QUIESCENT"; 6358 case QLA8XXX_DEV_FAILED: 6359 return "FAILED"; 6360 case QLA8XXX_DEV_QUIESCENT: 6361 return "QUIESCENT"; 6362 default: 6363 return "Unknown"; 6364 } 6365 } 6366 6367 /* Assumes idc-lock always held on entry */ 6368 void 6369 qla83xx_idc_audit(scsi_qla_host_t *vha, int audit_type) 6370 { 6371 struct qla_hw_data *ha = vha->hw; 6372 uint32_t idc_audit_reg = 0, duration_secs = 0; 6373 6374 switch (audit_type) { 6375 case IDC_AUDIT_TIMESTAMP: 6376 ha->idc_audit_ts = (jiffies_to_msecs(jiffies) / 1000); 6377 idc_audit_reg = (ha->portnum) | 6378 (IDC_AUDIT_TIMESTAMP << 7) | (ha->idc_audit_ts << 8); 6379 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg); 6380 break; 6381 6382 case IDC_AUDIT_COMPLETION: 6383 duration_secs = ((jiffies_to_msecs(jiffies) - 6384 jiffies_to_msecs(ha->idc_audit_ts)) / 1000); 6385 idc_audit_reg = (ha->portnum) | 6386 (IDC_AUDIT_COMPLETION << 7) | (duration_secs << 8); 6387 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg); 6388 break; 6389 6390 default: 6391 ql_log(ql_log_warn, vha, 0xb078, 6392 "Invalid audit type specified.\n"); 6393 break; 6394 } 6395 } 6396 6397 /* Assumes idc_lock always held on entry */ 6398 static int 6399 qla83xx_initiating_reset(scsi_qla_host_t *vha) 6400 { 6401 struct qla_hw_data *ha = vha->hw; 6402 uint32_t idc_control, dev_state; 6403 6404 __qla83xx_get_idc_control(vha, &idc_control); 6405 if ((idc_control & QLA83XX_IDC_RESET_DISABLED)) { 6406 ql_log(ql_log_info, vha, 0xb080, 6407 "NIC Core reset has been disabled. idc-control=0x%x\n", 6408 idc_control); 6409 return QLA_FUNCTION_FAILED; 6410 } 6411 6412 /* Set NEED-RESET iff in READY state and we are the reset-owner */ 6413 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state); 6414 if (ha->flags.nic_core_reset_owner && dev_state == QLA8XXX_DEV_READY) { 6415 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, 6416 QLA8XXX_DEV_NEED_RESET); 6417 ql_log(ql_log_info, vha, 0xb056, "HW State: NEED RESET.\n"); 6418 qla83xx_idc_audit(vha, IDC_AUDIT_TIMESTAMP); 6419 } else { 6420 const char *state = qla83xx_dev_state_to_string(dev_state); 6421 6422 ql_log(ql_log_info, vha, 0xb057, "HW State: %s.\n", state); 6423 6424 /* SV: XXX: Is timeout required here? */ 6425 /* Wait for IDC state change READY -> NEED_RESET */ 6426 while (dev_state == QLA8XXX_DEV_READY) { 6427 qla83xx_idc_unlock(vha, 0); 6428 msleep(200); 6429 qla83xx_idc_lock(vha, 0); 6430 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state); 6431 } 6432 } 6433 6434 /* Send IDC ack by writing to drv-ack register */ 6435 __qla83xx_set_drv_ack(vha); 6436 6437 return QLA_SUCCESS; 6438 } 6439 6440 int 6441 __qla83xx_set_idc_control(scsi_qla_host_t *vha, uint32_t idc_control) 6442 { 6443 return qla83xx_wr_reg(vha, QLA83XX_IDC_CONTROL, idc_control); 6444 } 6445 6446 int 6447 __qla83xx_get_idc_control(scsi_qla_host_t *vha, uint32_t *idc_control) 6448 { 6449 return qla83xx_rd_reg(vha, QLA83XX_IDC_CONTROL, idc_control); 6450 } 6451 6452 static int 6453 qla83xx_check_driver_presence(scsi_qla_host_t *vha) 6454 { 6455 uint32_t drv_presence = 0; 6456 struct qla_hw_data *ha = vha->hw; 6457 6458 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence); 6459 if (drv_presence & (1 << ha->portnum)) 6460 return QLA_SUCCESS; 6461 else 6462 return QLA_TEST_FAILED; 6463 } 6464 6465 int 6466 qla83xx_nic_core_reset(scsi_qla_host_t *vha) 6467 { 6468 int rval = QLA_SUCCESS; 6469 struct qla_hw_data *ha = vha->hw; 6470 6471 ql_dbg(ql_dbg_p3p, vha, 0xb058, 6472 "Entered %s().\n", __func__); 6473 6474 if (vha->device_flags & DFLG_DEV_FAILED) { 6475 ql_log(ql_log_warn, vha, 0xb059, 6476 "Device in unrecoverable FAILED state.\n"); 6477 return QLA_FUNCTION_FAILED; 6478 } 6479 6480 qla83xx_idc_lock(vha, 0); 6481 6482 if (qla83xx_check_driver_presence(vha) != QLA_SUCCESS) { 6483 ql_log(ql_log_warn, vha, 0xb05a, 6484 "Function=0x%x has been removed from IDC participation.\n", 6485 ha->portnum); 6486 rval = QLA_FUNCTION_FAILED; 6487 goto exit; 6488 } 6489 6490 qla83xx_reset_ownership(vha); 6491 6492 rval = qla83xx_initiating_reset(vha); 6493 6494 /* 6495 * Perform reset if we are the reset-owner, 6496 * else wait till IDC state changes to READY/FAILED. 6497 */ 6498 if (rval == QLA_SUCCESS) { 6499 rval = qla83xx_idc_state_handler(vha); 6500 6501 if (rval == QLA_SUCCESS) 6502 ha->flags.nic_core_hung = 0; 6503 __qla83xx_clear_drv_ack(vha); 6504 } 6505 6506 exit: 6507 qla83xx_idc_unlock(vha, 0); 6508 6509 ql_dbg(ql_dbg_p3p, vha, 0xb05b, "Exiting %s.\n", __func__); 6510 6511 return rval; 6512 } 6513 6514 int 6515 qla2xxx_mctp_dump(scsi_qla_host_t *vha) 6516 { 6517 struct qla_hw_data *ha = vha->hw; 6518 int rval = QLA_FUNCTION_FAILED; 6519 6520 if (!IS_MCTP_CAPABLE(ha)) { 6521 /* This message can be removed from the final version */ 6522 ql_log(ql_log_info, vha, 0x506d, 6523 "This board is not MCTP capable\n"); 6524 return rval; 6525 } 6526 6527 if (!ha->mctp_dump) { 6528 ha->mctp_dump = dma_alloc_coherent(&ha->pdev->dev, 6529 MCTP_DUMP_SIZE, &ha->mctp_dump_dma, GFP_KERNEL); 6530 6531 if (!ha->mctp_dump) { 6532 ql_log(ql_log_warn, vha, 0x506e, 6533 "Failed to allocate memory for mctp dump\n"); 6534 return rval; 6535 } 6536 } 6537 6538 #define MCTP_DUMP_STR_ADDR 0x00000000 6539 rval = qla2x00_dump_mctp_data(vha, ha->mctp_dump_dma, 6540 MCTP_DUMP_STR_ADDR, MCTP_DUMP_SIZE/4); 6541 if (rval != QLA_SUCCESS) { 6542 ql_log(ql_log_warn, vha, 0x506f, 6543 "Failed to capture mctp dump\n"); 6544 } else { 6545 ql_log(ql_log_info, vha, 0x5070, 6546 "Mctp dump capture for host (%ld/%p).\n", 6547 vha->host_no, ha->mctp_dump); 6548 ha->mctp_dumped = 1; 6549 } 6550 6551 if (!ha->flags.nic_core_reset_hdlr_active && !ha->portnum) { 6552 ha->flags.nic_core_reset_hdlr_active = 1; 6553 rval = qla83xx_restart_nic_firmware(vha); 6554 if (rval) 6555 /* NIC Core reset failed. */ 6556 ql_log(ql_log_warn, vha, 0x5071, 6557 "Failed to restart nic firmware\n"); 6558 else 6559 ql_dbg(ql_dbg_p3p, vha, 0xb084, 6560 "Restarted NIC firmware successfully.\n"); 6561 ha->flags.nic_core_reset_hdlr_active = 0; 6562 } 6563 6564 return rval; 6565 6566 } 6567 6568 /* 6569 * qla2x00_quiesce_io 6570 * Description: This function will block the new I/Os 6571 * Its not aborting any I/Os as context 6572 * is not destroyed during quiescence 6573 * Arguments: scsi_qla_host_t 6574 * return : void 6575 */ 6576 void 6577 qla2x00_quiesce_io(scsi_qla_host_t *vha) 6578 { 6579 struct qla_hw_data *ha = vha->hw; 6580 struct scsi_qla_host *vp; 6581 6582 ql_dbg(ql_dbg_dpc, vha, 0x401d, 6583 "Quiescing I/O - ha=%p.\n", ha); 6584 6585 atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME); 6586 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 6587 atomic_set(&vha->loop_state, LOOP_DOWN); 6588 qla2x00_mark_all_devices_lost(vha, 0); 6589 list_for_each_entry(vp, &ha->vp_list, list) 6590 qla2x00_mark_all_devices_lost(vp, 0); 6591 } else { 6592 if (!atomic_read(&vha->loop_down_timer)) 6593 atomic_set(&vha->loop_down_timer, 6594 LOOP_DOWN_TIME); 6595 } 6596 /* Wait for pending cmds to complete */ 6597 WARN_ON_ONCE(qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) 6598 != QLA_SUCCESS); 6599 } 6600 6601 void 6602 qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha) 6603 { 6604 struct qla_hw_data *ha = vha->hw; 6605 struct scsi_qla_host *vp; 6606 unsigned long flags; 6607 fc_port_t *fcport; 6608 u16 i; 6609 6610 /* For ISP82XX, driver waits for completion of the commands. 6611 * online flag should be set. 6612 */ 6613 if (!(IS_P3P_TYPE(ha))) 6614 vha->flags.online = 0; 6615 ha->flags.chip_reset_done = 0; 6616 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 6617 vha->qla_stats.total_isp_aborts++; 6618 6619 ql_log(ql_log_info, vha, 0x00af, 6620 "Performing ISP error recovery - ha=%p.\n", ha); 6621 6622 ha->flags.purge_mbox = 1; 6623 /* For ISP82XX, reset_chip is just disabling interrupts. 6624 * Driver waits for the completion of the commands. 6625 * the interrupts need to be enabled. 6626 */ 6627 if (!(IS_P3P_TYPE(ha))) 6628 ha->isp_ops->reset_chip(vha); 6629 6630 ha->link_data_rate = PORT_SPEED_UNKNOWN; 6631 SAVE_TOPO(ha); 6632 ha->flags.rida_fmt2 = 0; 6633 ha->flags.n2n_ae = 0; 6634 ha->flags.lip_ae = 0; 6635 ha->current_topology = 0; 6636 ha->flags.fw_started = 0; 6637 ha->flags.fw_init_done = 0; 6638 ha->chip_reset++; 6639 ha->base_qpair->chip_reset = ha->chip_reset; 6640 for (i = 0; i < ha->max_qpairs; i++) { 6641 if (ha->queue_pair_map[i]) 6642 ha->queue_pair_map[i]->chip_reset = 6643 ha->base_qpair->chip_reset; 6644 } 6645 6646 /* purge MBox commands */ 6647 if (atomic_read(&ha->num_pend_mbx_stage3)) { 6648 clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags); 6649 complete(&ha->mbx_intr_comp); 6650 } 6651 6652 i = 0; 6653 while (atomic_read(&ha->num_pend_mbx_stage3) || 6654 atomic_read(&ha->num_pend_mbx_stage2) || 6655 atomic_read(&ha->num_pend_mbx_stage1)) { 6656 msleep(20); 6657 i++; 6658 if (i > 50) 6659 break; 6660 } 6661 ha->flags.purge_mbox = 0; 6662 6663 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 6664 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 6665 atomic_set(&vha->loop_state, LOOP_DOWN); 6666 qla2x00_mark_all_devices_lost(vha, 0); 6667 6668 spin_lock_irqsave(&ha->vport_slock, flags); 6669 list_for_each_entry(vp, &ha->vp_list, list) { 6670 atomic_inc(&vp->vref_count); 6671 spin_unlock_irqrestore(&ha->vport_slock, flags); 6672 6673 qla2x00_mark_all_devices_lost(vp, 0); 6674 6675 spin_lock_irqsave(&ha->vport_slock, flags); 6676 atomic_dec(&vp->vref_count); 6677 } 6678 spin_unlock_irqrestore(&ha->vport_slock, flags); 6679 } else { 6680 if (!atomic_read(&vha->loop_down_timer)) 6681 atomic_set(&vha->loop_down_timer, 6682 LOOP_DOWN_TIME); 6683 } 6684 6685 /* Clear all async request states across all VPs. */ 6686 list_for_each_entry(fcport, &vha->vp_fcports, list) { 6687 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 6688 fcport->scan_state = 0; 6689 } 6690 spin_lock_irqsave(&ha->vport_slock, flags); 6691 list_for_each_entry(vp, &ha->vp_list, list) { 6692 atomic_inc(&vp->vref_count); 6693 spin_unlock_irqrestore(&ha->vport_slock, flags); 6694 6695 list_for_each_entry(fcport, &vp->vp_fcports, list) 6696 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 6697 6698 spin_lock_irqsave(&ha->vport_slock, flags); 6699 atomic_dec(&vp->vref_count); 6700 } 6701 spin_unlock_irqrestore(&ha->vport_slock, flags); 6702 6703 if (!ha->flags.eeh_busy) { 6704 /* Make sure for ISP 82XX IO DMA is complete */ 6705 if (IS_P3P_TYPE(ha)) { 6706 qla82xx_chip_reset_cleanup(vha); 6707 ql_log(ql_log_info, vha, 0x00b4, 6708 "Done chip reset cleanup.\n"); 6709 6710 /* Done waiting for pending commands. 6711 * Reset the online flag. 6712 */ 6713 vha->flags.online = 0; 6714 } 6715 6716 /* Requeue all commands in outstanding command list. */ 6717 qla2x00_abort_all_cmds(vha, DID_RESET << 16); 6718 } 6719 /* memory barrier */ 6720 wmb(); 6721 } 6722 6723 /* 6724 * qla2x00_abort_isp 6725 * Resets ISP and aborts all outstanding commands. 6726 * 6727 * Input: 6728 * ha = adapter block pointer. 6729 * 6730 * Returns: 6731 * 0 = success 6732 */ 6733 int 6734 qla2x00_abort_isp(scsi_qla_host_t *vha) 6735 { 6736 int rval; 6737 uint8_t status = 0; 6738 struct qla_hw_data *ha = vha->hw; 6739 struct scsi_qla_host *vp; 6740 struct req_que *req = ha->req_q_map[0]; 6741 unsigned long flags; 6742 6743 if (vha->flags.online) { 6744 qla2x00_abort_isp_cleanup(vha); 6745 6746 if (test_and_clear_bit(ISP_ABORT_TO_ROM, &vha->dpc_flags)) { 6747 ha->flags.chip_reset_done = 1; 6748 vha->flags.online = 1; 6749 status = 0; 6750 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6751 return status; 6752 } 6753 6754 if (IS_QLA8031(ha)) { 6755 ql_dbg(ql_dbg_p3p, vha, 0xb05c, 6756 "Clearing fcoe driver presence.\n"); 6757 if (qla83xx_clear_drv_presence(vha) != QLA_SUCCESS) 6758 ql_dbg(ql_dbg_p3p, vha, 0xb073, 6759 "Error while clearing DRV-Presence.\n"); 6760 } 6761 6762 if (unlikely(pci_channel_offline(ha->pdev) && 6763 ha->flags.pci_channel_io_perm_failure)) { 6764 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6765 status = 0; 6766 return status; 6767 } 6768 6769 switch (vha->qlini_mode) { 6770 case QLA2XXX_INI_MODE_DISABLED: 6771 if (!qla_tgt_mode_enabled(vha)) 6772 return 0; 6773 break; 6774 case QLA2XXX_INI_MODE_DUAL: 6775 if (!qla_dual_mode_enabled(vha)) 6776 return 0; 6777 break; 6778 case QLA2XXX_INI_MODE_ENABLED: 6779 default: 6780 break; 6781 } 6782 6783 ha->isp_ops->get_flash_version(vha, req->ring); 6784 6785 ha->isp_ops->nvram_config(vha); 6786 6787 if (!qla2x00_restart_isp(vha)) { 6788 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 6789 6790 if (!atomic_read(&vha->loop_down_timer)) { 6791 /* 6792 * Issue marker command only when we are going 6793 * to start the I/O . 6794 */ 6795 vha->marker_needed = 1; 6796 } 6797 6798 vha->flags.online = 1; 6799 6800 ha->isp_ops->enable_intrs(ha); 6801 6802 ha->isp_abort_cnt = 0; 6803 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6804 6805 if (IS_QLA81XX(ha) || IS_QLA8031(ha)) 6806 qla2x00_get_fw_version(vha); 6807 if (ha->fce) { 6808 ha->flags.fce_enabled = 1; 6809 memset(ha->fce, 0, 6810 fce_calc_size(ha->fce_bufs)); 6811 rval = qla2x00_enable_fce_trace(vha, 6812 ha->fce_dma, ha->fce_bufs, ha->fce_mb, 6813 &ha->fce_bufs); 6814 if (rval) { 6815 ql_log(ql_log_warn, vha, 0x8033, 6816 "Unable to reinitialize FCE " 6817 "(%d).\n", rval); 6818 ha->flags.fce_enabled = 0; 6819 } 6820 } 6821 6822 if (ha->eft) { 6823 memset(ha->eft, 0, EFT_SIZE); 6824 rval = qla2x00_enable_eft_trace(vha, 6825 ha->eft_dma, EFT_NUM_BUFFERS); 6826 if (rval) { 6827 ql_log(ql_log_warn, vha, 0x8034, 6828 "Unable to reinitialize EFT " 6829 "(%d).\n", rval); 6830 } 6831 } 6832 } else { /* failed the ISP abort */ 6833 vha->flags.online = 1; 6834 if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) { 6835 if (ha->isp_abort_cnt == 0) { 6836 ql_log(ql_log_fatal, vha, 0x8035, 6837 "ISP error recover failed - " 6838 "board disabled.\n"); 6839 /* 6840 * The next call disables the board 6841 * completely. 6842 */ 6843 qla2x00_abort_isp_cleanup(vha); 6844 vha->flags.online = 0; 6845 clear_bit(ISP_ABORT_RETRY, 6846 &vha->dpc_flags); 6847 status = 0; 6848 } else { /* schedule another ISP abort */ 6849 ha->isp_abort_cnt--; 6850 ql_dbg(ql_dbg_taskm, vha, 0x8020, 6851 "ISP abort - retry remaining %d.\n", 6852 ha->isp_abort_cnt); 6853 status = 1; 6854 } 6855 } else { 6856 ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT; 6857 ql_dbg(ql_dbg_taskm, vha, 0x8021, 6858 "ISP error recovery - retrying (%d) " 6859 "more times.\n", ha->isp_abort_cnt); 6860 set_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6861 status = 1; 6862 } 6863 } 6864 6865 } 6866 6867 if (!status) { 6868 ql_dbg(ql_dbg_taskm, vha, 0x8022, "%s succeeded.\n", __func__); 6869 qla2x00_configure_hba(vha); 6870 spin_lock_irqsave(&ha->vport_slock, flags); 6871 list_for_each_entry(vp, &ha->vp_list, list) { 6872 if (vp->vp_idx) { 6873 atomic_inc(&vp->vref_count); 6874 spin_unlock_irqrestore(&ha->vport_slock, flags); 6875 6876 qla2x00_vp_abort_isp(vp); 6877 6878 spin_lock_irqsave(&ha->vport_slock, flags); 6879 atomic_dec(&vp->vref_count); 6880 } 6881 } 6882 spin_unlock_irqrestore(&ha->vport_slock, flags); 6883 6884 if (IS_QLA8031(ha)) { 6885 ql_dbg(ql_dbg_p3p, vha, 0xb05d, 6886 "Setting back fcoe driver presence.\n"); 6887 if (qla83xx_set_drv_presence(vha) != QLA_SUCCESS) 6888 ql_dbg(ql_dbg_p3p, vha, 0xb074, 6889 "Error while setting DRV-Presence.\n"); 6890 } 6891 } else { 6892 ql_log(ql_log_warn, vha, 0x8023, "%s **** FAILED ****.\n", 6893 __func__); 6894 } 6895 6896 return(status); 6897 } 6898 6899 /* 6900 * qla2x00_restart_isp 6901 * restarts the ISP after a reset 6902 * 6903 * Input: 6904 * ha = adapter block pointer. 6905 * 6906 * Returns: 6907 * 0 = success 6908 */ 6909 static int 6910 qla2x00_restart_isp(scsi_qla_host_t *vha) 6911 { 6912 int status = 0; 6913 struct qla_hw_data *ha = vha->hw; 6914 6915 /* If firmware needs to be loaded */ 6916 if (qla2x00_isp_firmware(vha)) { 6917 vha->flags.online = 0; 6918 status = ha->isp_ops->chip_diag(vha); 6919 if (!status) 6920 status = qla2x00_setup_chip(vha); 6921 } 6922 6923 if (!status && !(status = qla2x00_init_rings(vha))) { 6924 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 6925 ha->flags.chip_reset_done = 1; 6926 6927 /* Initialize the queues in use */ 6928 qla25xx_init_queues(ha); 6929 6930 status = qla2x00_fw_ready(vha); 6931 if (!status) { 6932 /* Issue a marker after FW becomes ready. */ 6933 qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL); 6934 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 6935 } 6936 6937 /* if no cable then assume it's good */ 6938 if ((vha->device_flags & DFLG_NO_CABLE)) 6939 status = 0; 6940 } 6941 return (status); 6942 } 6943 6944 static int 6945 qla25xx_init_queues(struct qla_hw_data *ha) 6946 { 6947 struct rsp_que *rsp = NULL; 6948 struct req_que *req = NULL; 6949 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 6950 int ret = -1; 6951 int i; 6952 6953 for (i = 1; i < ha->max_rsp_queues; i++) { 6954 rsp = ha->rsp_q_map[i]; 6955 if (rsp && test_bit(i, ha->rsp_qid_map)) { 6956 rsp->options &= ~BIT_0; 6957 ret = qla25xx_init_rsp_que(base_vha, rsp); 6958 if (ret != QLA_SUCCESS) 6959 ql_dbg(ql_dbg_init, base_vha, 0x00ff, 6960 "%s Rsp que: %d init failed.\n", 6961 __func__, rsp->id); 6962 else 6963 ql_dbg(ql_dbg_init, base_vha, 0x0100, 6964 "%s Rsp que: %d inited.\n", 6965 __func__, rsp->id); 6966 } 6967 } 6968 for (i = 1; i < ha->max_req_queues; i++) { 6969 req = ha->req_q_map[i]; 6970 if (req && test_bit(i, ha->req_qid_map)) { 6971 /* Clear outstanding commands array. */ 6972 req->options &= ~BIT_0; 6973 ret = qla25xx_init_req_que(base_vha, req); 6974 if (ret != QLA_SUCCESS) 6975 ql_dbg(ql_dbg_init, base_vha, 0x0101, 6976 "%s Req que: %d init failed.\n", 6977 __func__, req->id); 6978 else 6979 ql_dbg(ql_dbg_init, base_vha, 0x0102, 6980 "%s Req que: %d inited.\n", 6981 __func__, req->id); 6982 } 6983 } 6984 return ret; 6985 } 6986 6987 /* 6988 * qla2x00_reset_adapter 6989 * Reset adapter. 6990 * 6991 * Input: 6992 * ha = adapter block pointer. 6993 */ 6994 int 6995 qla2x00_reset_adapter(scsi_qla_host_t *vha) 6996 { 6997 unsigned long flags = 0; 6998 struct qla_hw_data *ha = vha->hw; 6999 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 7000 7001 vha->flags.online = 0; 7002 ha->isp_ops->disable_intrs(ha); 7003 7004 spin_lock_irqsave(&ha->hardware_lock, flags); 7005 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 7006 RD_REG_WORD(®->hccr); /* PCI Posting. */ 7007 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 7008 RD_REG_WORD(®->hccr); /* PCI Posting. */ 7009 spin_unlock_irqrestore(&ha->hardware_lock, flags); 7010 7011 return QLA_SUCCESS; 7012 } 7013 7014 int 7015 qla24xx_reset_adapter(scsi_qla_host_t *vha) 7016 { 7017 unsigned long flags = 0; 7018 struct qla_hw_data *ha = vha->hw; 7019 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 7020 int rval = QLA_SUCCESS; 7021 7022 if (IS_P3P_TYPE(ha)) 7023 return rval; 7024 7025 vha->flags.online = 0; 7026 ha->isp_ops->disable_intrs(ha); 7027 7028 spin_lock_irqsave(&ha->hardware_lock, flags); 7029 WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET); 7030 RD_REG_DWORD(®->hccr); 7031 WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE); 7032 RD_REG_DWORD(®->hccr); 7033 spin_unlock_irqrestore(&ha->hardware_lock, flags); 7034 7035 if (IS_NOPOLLING_TYPE(ha)) 7036 ha->isp_ops->enable_intrs(ha); 7037 7038 return rval; 7039 } 7040 7041 /* On sparc systems, obtain port and node WWN from firmware 7042 * properties. 7043 */ 7044 static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, 7045 struct nvram_24xx *nv) 7046 { 7047 #ifdef CONFIG_SPARC 7048 struct qla_hw_data *ha = vha->hw; 7049 struct pci_dev *pdev = ha->pdev; 7050 struct device_node *dp = pci_device_to_OF_node(pdev); 7051 const u8 *val; 7052 int len; 7053 7054 val = of_get_property(dp, "port-wwn", &len); 7055 if (val && len >= WWN_SIZE) 7056 memcpy(nv->port_name, val, WWN_SIZE); 7057 7058 val = of_get_property(dp, "node-wwn", &len); 7059 if (val && len >= WWN_SIZE) 7060 memcpy(nv->node_name, val, WWN_SIZE); 7061 #endif 7062 } 7063 7064 int 7065 qla24xx_nvram_config(scsi_qla_host_t *vha) 7066 { 7067 int rval; 7068 struct init_cb_24xx *icb; 7069 struct nvram_24xx *nv; 7070 uint32_t *dptr; 7071 uint8_t *dptr1, *dptr2; 7072 uint32_t chksum; 7073 uint16_t cnt; 7074 struct qla_hw_data *ha = vha->hw; 7075 7076 rval = QLA_SUCCESS; 7077 icb = (struct init_cb_24xx *)ha->init_cb; 7078 nv = ha->nvram; 7079 7080 /* Determine NVRAM starting address. */ 7081 if (ha->port_no == 0) { 7082 ha->nvram_base = FA_NVRAM_FUNC0_ADDR; 7083 ha->vpd_base = FA_NVRAM_VPD0_ADDR; 7084 } else { 7085 ha->nvram_base = FA_NVRAM_FUNC1_ADDR; 7086 ha->vpd_base = FA_NVRAM_VPD1_ADDR; 7087 } 7088 7089 ha->nvram_size = sizeof(*nv); 7090 ha->vpd_size = FA_NVRAM_VPD_SIZE; 7091 7092 /* Get VPD data into cache */ 7093 ha->vpd = ha->nvram + VPD_OFFSET; 7094 ha->isp_ops->read_nvram(vha, ha->vpd, 7095 ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4); 7096 7097 /* Get NVRAM data into cache and calculate checksum. */ 7098 dptr = (uint32_t *)nv; 7099 ha->isp_ops->read_nvram(vha, dptr, ha->nvram_base, ha->nvram_size); 7100 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++) 7101 chksum += le32_to_cpu(*dptr); 7102 7103 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a, 7104 "Contents of NVRAM\n"); 7105 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d, 7106 nv, ha->nvram_size); 7107 7108 /* Bad NVRAM data, set defaults parameters. */ 7109 if (chksum || memcmp("ISP ", nv->id, sizeof(nv->id)) || 7110 le16_to_cpu(nv->nvram_version) < ICB_VERSION) { 7111 /* Reset NVRAM data. */ 7112 ql_log(ql_log_warn, vha, 0x006b, 7113 "Inconsistent NVRAM checksum=%#x id=%.4s version=%#x.\n", 7114 chksum, nv->id, nv->nvram_version); 7115 ql_dump_buffer(ql_dbg_init, vha, 0x006b, nv, sizeof(*nv)); 7116 ql_log(ql_log_warn, vha, 0x006c, 7117 "Falling back to functioning (yet invalid -- WWPN) " 7118 "defaults.\n"); 7119 7120 /* 7121 * Set default initialization control block. 7122 */ 7123 memset(nv, 0, ha->nvram_size); 7124 nv->nvram_version = cpu_to_le16(ICB_VERSION); 7125 nv->version = cpu_to_le16(ICB_VERSION); 7126 nv->frame_payload_size = 2048; 7127 nv->execution_throttle = cpu_to_le16(0xFFFF); 7128 nv->exchange_count = cpu_to_le16(0); 7129 nv->hard_address = cpu_to_le16(124); 7130 nv->port_name[0] = 0x21; 7131 nv->port_name[1] = 0x00 + ha->port_no + 1; 7132 nv->port_name[2] = 0x00; 7133 nv->port_name[3] = 0xe0; 7134 nv->port_name[4] = 0x8b; 7135 nv->port_name[5] = 0x1c; 7136 nv->port_name[6] = 0x55; 7137 nv->port_name[7] = 0x86; 7138 nv->node_name[0] = 0x20; 7139 nv->node_name[1] = 0x00; 7140 nv->node_name[2] = 0x00; 7141 nv->node_name[3] = 0xe0; 7142 nv->node_name[4] = 0x8b; 7143 nv->node_name[5] = 0x1c; 7144 nv->node_name[6] = 0x55; 7145 nv->node_name[7] = 0x86; 7146 qla24xx_nvram_wwn_from_ofw(vha, nv); 7147 nv->login_retry_count = cpu_to_le16(8); 7148 nv->interrupt_delay_timer = cpu_to_le16(0); 7149 nv->login_timeout = cpu_to_le16(0); 7150 nv->firmware_options_1 = 7151 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); 7152 nv->firmware_options_2 = cpu_to_le32(2 << 4); 7153 nv->firmware_options_2 |= cpu_to_le32(BIT_12); 7154 nv->firmware_options_3 = cpu_to_le32(2 << 13); 7155 nv->host_p = cpu_to_le32(BIT_11|BIT_10); 7156 nv->efi_parameters = cpu_to_le32(0); 7157 nv->reset_delay = 5; 7158 nv->max_luns_per_target = cpu_to_le16(128); 7159 nv->port_down_retry_count = cpu_to_le16(30); 7160 nv->link_down_timeout = cpu_to_le16(30); 7161 7162 rval = 1; 7163 } 7164 7165 if (qla_tgt_mode_enabled(vha)) { 7166 /* Don't enable full login after initial LIP */ 7167 nv->firmware_options_1 &= cpu_to_le32(~BIT_13); 7168 /* Don't enable LIP full login for initiator */ 7169 nv->host_p &= cpu_to_le32(~BIT_10); 7170 } 7171 7172 qlt_24xx_config_nvram_stage1(vha, nv); 7173 7174 /* Reset Initialization control block */ 7175 memset(icb, 0, ha->init_cb_size); 7176 7177 /* Copy 1st segment. */ 7178 dptr1 = (uint8_t *)icb; 7179 dptr2 = (uint8_t *)&nv->version; 7180 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; 7181 while (cnt--) 7182 *dptr1++ = *dptr2++; 7183 7184 icb->login_retry_count = nv->login_retry_count; 7185 icb->link_down_on_nos = nv->link_down_on_nos; 7186 7187 /* Copy 2nd segment. */ 7188 dptr1 = (uint8_t *)&icb->interrupt_delay_timer; 7189 dptr2 = (uint8_t *)&nv->interrupt_delay_timer; 7190 cnt = (uint8_t *)&icb->reserved_3 - 7191 (uint8_t *)&icb->interrupt_delay_timer; 7192 while (cnt--) 7193 *dptr1++ = *dptr2++; 7194 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size); 7195 /* 7196 * Setup driver NVRAM options. 7197 */ 7198 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), 7199 "QLA2462"); 7200 7201 qlt_24xx_config_nvram_stage2(vha, icb); 7202 7203 if (nv->host_p & cpu_to_le32(BIT_15)) { 7204 /* Use alternate WWN? */ 7205 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 7206 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 7207 } 7208 7209 /* Prepare nodename */ 7210 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) { 7211 /* 7212 * Firmware will apply the following mask if the nodename was 7213 * not provided. 7214 */ 7215 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 7216 icb->node_name[0] &= 0xF0; 7217 } 7218 7219 /* Set host adapter parameters. */ 7220 ha->flags.disable_risc_code_load = 0; 7221 ha->flags.enable_lip_reset = 0; 7222 ha->flags.enable_lip_full_login = 7223 le32_to_cpu(nv->host_p) & BIT_10 ? 1 : 0; 7224 ha->flags.enable_target_reset = 7225 le32_to_cpu(nv->host_p) & BIT_11 ? 1 : 0; 7226 ha->flags.enable_led_scheme = 0; 7227 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1 : 0; 7228 7229 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & 7230 (BIT_6 | BIT_5 | BIT_4)) >> 4; 7231 7232 memcpy(ha->fw_seriallink_options24, nv->seriallink_options, 7233 sizeof(ha->fw_seriallink_options24)); 7234 7235 /* save HBA serial number */ 7236 ha->serial0 = icb->port_name[5]; 7237 ha->serial1 = icb->port_name[6]; 7238 ha->serial2 = icb->port_name[7]; 7239 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 7240 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 7241 7242 icb->execution_throttle = cpu_to_le16(0xFFFF); 7243 7244 ha->retry_count = le16_to_cpu(nv->login_retry_count); 7245 7246 /* Set minimum login_timeout to 4 seconds. */ 7247 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) 7248 nv->login_timeout = cpu_to_le16(ql2xlogintimeout); 7249 if (le16_to_cpu(nv->login_timeout) < 4) 7250 nv->login_timeout = cpu_to_le16(4); 7251 ha->login_timeout = le16_to_cpu(nv->login_timeout); 7252 7253 /* Set minimum RATOV to 100 tenths of a second. */ 7254 ha->r_a_tov = 100; 7255 7256 ha->loop_reset_delay = nv->reset_delay; 7257 7258 /* Link Down Timeout = 0: 7259 * 7260 * When Port Down timer expires we will start returning 7261 * I/O's to OS with "DID_NO_CONNECT". 7262 * 7263 * Link Down Timeout != 0: 7264 * 7265 * The driver waits for the link to come up after link down 7266 * before returning I/Os to OS with "DID_NO_CONNECT". 7267 */ 7268 if (le16_to_cpu(nv->link_down_timeout) == 0) { 7269 ha->loop_down_abort_time = 7270 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 7271 } else { 7272 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); 7273 ha->loop_down_abort_time = 7274 (LOOP_DOWN_TIME - ha->link_down_timeout); 7275 } 7276 7277 /* Need enough time to try and get the port back. */ 7278 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); 7279 if (qlport_down_retry) 7280 ha->port_down_retry_count = qlport_down_retry; 7281 7282 /* Set login_retry_count */ 7283 ha->login_retry_count = le16_to_cpu(nv->login_retry_count); 7284 if (ha->port_down_retry_count == 7285 le16_to_cpu(nv->port_down_retry_count) && 7286 ha->port_down_retry_count > 3) 7287 ha->login_retry_count = ha->port_down_retry_count; 7288 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 7289 ha->login_retry_count = ha->port_down_retry_count; 7290 if (ql2xloginretrycount) 7291 ha->login_retry_count = ql2xloginretrycount; 7292 7293 /* N2N: driver will initiate Login instead of FW */ 7294 icb->firmware_options_3 |= BIT_8; 7295 7296 /* Enable ZIO. */ 7297 if (!vha->flags.init_done) { 7298 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & 7299 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 7300 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? 7301 le16_to_cpu(icb->interrupt_delay_timer) : 2; 7302 } 7303 icb->firmware_options_2 &= cpu_to_le32( 7304 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); 7305 if (ha->zio_mode != QLA_ZIO_DISABLED) { 7306 ha->zio_mode = QLA_ZIO_MODE_6; 7307 7308 ql_log(ql_log_info, vha, 0x006f, 7309 "ZIO mode %d enabled; timer delay (%d us).\n", 7310 ha->zio_mode, ha->zio_timer * 100); 7311 7312 icb->firmware_options_2 |= cpu_to_le32( 7313 (uint32_t)ha->zio_mode); 7314 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); 7315 } 7316 7317 if (rval) { 7318 ql_log(ql_log_warn, vha, 0x0070, 7319 "NVRAM configuration failed.\n"); 7320 } 7321 return (rval); 7322 } 7323 7324 static void 7325 qla27xx_print_image(struct scsi_qla_host *vha, char *name, 7326 struct qla27xx_image_status *image_status) 7327 { 7328 ql_dbg(ql_dbg_init, vha, 0x018b, 7329 "%s %s: mask=%#02x gen=%#04x ver=%u.%u map=%#01x sum=%#08x sig=%#08x\n", 7330 name, "status", 7331 image_status->image_status_mask, 7332 le16_to_cpu(image_status->generation), 7333 image_status->ver_major, 7334 image_status->ver_minor, 7335 image_status->bitmap, 7336 le32_to_cpu(image_status->checksum), 7337 le32_to_cpu(image_status->signature)); 7338 } 7339 7340 static bool 7341 qla28xx_check_aux_image_status_signature( 7342 struct qla27xx_image_status *image_status) 7343 { 7344 ulong signature = le32_to_cpu(image_status->signature); 7345 7346 return signature != QLA28XX_AUX_IMG_STATUS_SIGN; 7347 } 7348 7349 static bool 7350 qla27xx_check_image_status_signature(struct qla27xx_image_status *image_status) 7351 { 7352 ulong signature = le32_to_cpu(image_status->signature); 7353 7354 return 7355 signature != QLA27XX_IMG_STATUS_SIGN && 7356 signature != QLA28XX_IMG_STATUS_SIGN; 7357 } 7358 7359 static ulong 7360 qla27xx_image_status_checksum(struct qla27xx_image_status *image_status) 7361 { 7362 uint32_t *p = (void *)image_status; 7363 uint n = sizeof(*image_status) / sizeof(*p); 7364 uint32_t sum = 0; 7365 7366 for ( ; n--; p++) 7367 sum += le32_to_cpup(p); 7368 7369 return sum; 7370 } 7371 7372 static inline uint 7373 qla28xx_component_bitmask(struct qla27xx_image_status *aux, uint bitmask) 7374 { 7375 return aux->bitmap & bitmask ? 7376 QLA27XX_SECONDARY_IMAGE : QLA27XX_PRIMARY_IMAGE; 7377 } 7378 7379 static void 7380 qla28xx_component_status( 7381 struct active_regions *active_regions, struct qla27xx_image_status *aux) 7382 { 7383 active_regions->aux.board_config = 7384 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_BOARD_CONFIG); 7385 7386 active_regions->aux.vpd_nvram = 7387 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_VPD_NVRAM); 7388 7389 active_regions->aux.npiv_config_0_1 = 7390 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_NPIV_CONFIG_0_1); 7391 7392 active_regions->aux.npiv_config_2_3 = 7393 qla28xx_component_bitmask(aux, QLA28XX_AUX_IMG_NPIV_CONFIG_2_3); 7394 } 7395 7396 static int 7397 qla27xx_compare_image_generation( 7398 struct qla27xx_image_status *pri_image_status, 7399 struct qla27xx_image_status *sec_image_status) 7400 { 7401 /* calculate generation delta as uint16 (this accounts for wrap) */ 7402 int16_t delta = 7403 le16_to_cpu(pri_image_status->generation) - 7404 le16_to_cpu(sec_image_status->generation); 7405 7406 ql_dbg(ql_dbg_init, NULL, 0x0180, "generation delta = %d\n", delta); 7407 7408 return delta; 7409 } 7410 7411 void 7412 qla28xx_get_aux_images( 7413 struct scsi_qla_host *vha, struct active_regions *active_regions) 7414 { 7415 struct qla_hw_data *ha = vha->hw; 7416 struct qla27xx_image_status pri_aux_image_status, sec_aux_image_status; 7417 bool valid_pri_image = false, valid_sec_image = false; 7418 bool active_pri_image = false, active_sec_image = false; 7419 7420 if (!ha->flt_region_aux_img_status_pri) { 7421 ql_dbg(ql_dbg_init, vha, 0x018a, "Primary aux image not addressed\n"); 7422 goto check_sec_image; 7423 } 7424 7425 qla24xx_read_flash_data(vha, (void *)&pri_aux_image_status, 7426 ha->flt_region_aux_img_status_pri, 7427 sizeof(pri_aux_image_status) >> 2); 7428 qla27xx_print_image(vha, "Primary aux image", &pri_aux_image_status); 7429 7430 if (qla28xx_check_aux_image_status_signature(&pri_aux_image_status)) { 7431 ql_dbg(ql_dbg_init, vha, 0x018b, 7432 "Primary aux image signature (%#x) not valid\n", 7433 le32_to_cpu(pri_aux_image_status.signature)); 7434 goto check_sec_image; 7435 } 7436 7437 if (qla27xx_image_status_checksum(&pri_aux_image_status)) { 7438 ql_dbg(ql_dbg_init, vha, 0x018c, 7439 "Primary aux image checksum failed\n"); 7440 goto check_sec_image; 7441 } 7442 7443 valid_pri_image = true; 7444 7445 if (pri_aux_image_status.image_status_mask & 1) { 7446 ql_dbg(ql_dbg_init, vha, 0x018d, 7447 "Primary aux image is active\n"); 7448 active_pri_image = true; 7449 } 7450 7451 check_sec_image: 7452 if (!ha->flt_region_aux_img_status_sec) { 7453 ql_dbg(ql_dbg_init, vha, 0x018a, 7454 "Secondary aux image not addressed\n"); 7455 goto check_valid_image; 7456 } 7457 7458 qla24xx_read_flash_data(vha, (void *)&sec_aux_image_status, 7459 ha->flt_region_aux_img_status_sec, 7460 sizeof(sec_aux_image_status) >> 2); 7461 qla27xx_print_image(vha, "Secondary aux image", &sec_aux_image_status); 7462 7463 if (qla28xx_check_aux_image_status_signature(&sec_aux_image_status)) { 7464 ql_dbg(ql_dbg_init, vha, 0x018b, 7465 "Secondary aux image signature (%#x) not valid\n", 7466 le32_to_cpu(sec_aux_image_status.signature)); 7467 goto check_valid_image; 7468 } 7469 7470 if (qla27xx_image_status_checksum(&sec_aux_image_status)) { 7471 ql_dbg(ql_dbg_init, vha, 0x018c, 7472 "Secondary aux image checksum failed\n"); 7473 goto check_valid_image; 7474 } 7475 7476 valid_sec_image = true; 7477 7478 if (sec_aux_image_status.image_status_mask & 1) { 7479 ql_dbg(ql_dbg_init, vha, 0x018d, 7480 "Secondary aux image is active\n"); 7481 active_sec_image = true; 7482 } 7483 7484 check_valid_image: 7485 if (valid_pri_image && active_pri_image && 7486 valid_sec_image && active_sec_image) { 7487 if (qla27xx_compare_image_generation(&pri_aux_image_status, 7488 &sec_aux_image_status) >= 0) { 7489 qla28xx_component_status(active_regions, 7490 &pri_aux_image_status); 7491 } else { 7492 qla28xx_component_status(active_regions, 7493 &sec_aux_image_status); 7494 } 7495 } else if (valid_pri_image && active_pri_image) { 7496 qla28xx_component_status(active_regions, &pri_aux_image_status); 7497 } else if (valid_sec_image && active_sec_image) { 7498 qla28xx_component_status(active_regions, &sec_aux_image_status); 7499 } 7500 7501 ql_dbg(ql_dbg_init, vha, 0x018f, 7502 "aux images active: BCFG=%u VPD/NVR=%u NPIV0/1=%u NPIV2/3=%u\n", 7503 active_regions->aux.board_config, 7504 active_regions->aux.vpd_nvram, 7505 active_regions->aux.npiv_config_0_1, 7506 active_regions->aux.npiv_config_2_3); 7507 } 7508 7509 void 7510 qla27xx_get_active_image(struct scsi_qla_host *vha, 7511 struct active_regions *active_regions) 7512 { 7513 struct qla_hw_data *ha = vha->hw; 7514 struct qla27xx_image_status pri_image_status, sec_image_status; 7515 bool valid_pri_image = false, valid_sec_image = false; 7516 bool active_pri_image = false, active_sec_image = false; 7517 7518 if (!ha->flt_region_img_status_pri) { 7519 ql_dbg(ql_dbg_init, vha, 0x018a, "Primary image not addressed\n"); 7520 goto check_sec_image; 7521 } 7522 7523 if (qla24xx_read_flash_data(vha, (void *)(&pri_image_status), 7524 ha->flt_region_img_status_pri, sizeof(pri_image_status) >> 2) != 7525 QLA_SUCCESS) { 7526 WARN_ON_ONCE(true); 7527 goto check_sec_image; 7528 } 7529 qla27xx_print_image(vha, "Primary image", &pri_image_status); 7530 7531 if (qla27xx_check_image_status_signature(&pri_image_status)) { 7532 ql_dbg(ql_dbg_init, vha, 0x018b, 7533 "Primary image signature (%#x) not valid\n", 7534 le32_to_cpu(pri_image_status.signature)); 7535 goto check_sec_image; 7536 } 7537 7538 if (qla27xx_image_status_checksum(&pri_image_status)) { 7539 ql_dbg(ql_dbg_init, vha, 0x018c, 7540 "Primary image checksum failed\n"); 7541 goto check_sec_image; 7542 } 7543 7544 valid_pri_image = true; 7545 7546 if (pri_image_status.image_status_mask & 1) { 7547 ql_dbg(ql_dbg_init, vha, 0x018d, 7548 "Primary image is active\n"); 7549 active_pri_image = true; 7550 } 7551 7552 check_sec_image: 7553 if (!ha->flt_region_img_status_sec) { 7554 ql_dbg(ql_dbg_init, vha, 0x018a, "Secondary image not addressed\n"); 7555 goto check_valid_image; 7556 } 7557 7558 qla24xx_read_flash_data(vha, (uint32_t *)(&sec_image_status), 7559 ha->flt_region_img_status_sec, sizeof(sec_image_status) >> 2); 7560 qla27xx_print_image(vha, "Secondary image", &sec_image_status); 7561 7562 if (qla27xx_check_image_status_signature(&sec_image_status)) { 7563 ql_dbg(ql_dbg_init, vha, 0x018b, 7564 "Secondary image signature (%#x) not valid\n", 7565 le32_to_cpu(sec_image_status.signature)); 7566 goto check_valid_image; 7567 } 7568 7569 if (qla27xx_image_status_checksum(&sec_image_status)) { 7570 ql_dbg(ql_dbg_init, vha, 0x018c, 7571 "Secondary image checksum failed\n"); 7572 goto check_valid_image; 7573 } 7574 7575 valid_sec_image = true; 7576 7577 if (sec_image_status.image_status_mask & 1) { 7578 ql_dbg(ql_dbg_init, vha, 0x018d, 7579 "Secondary image is active\n"); 7580 active_sec_image = true; 7581 } 7582 7583 check_valid_image: 7584 if (valid_pri_image && active_pri_image) 7585 active_regions->global = QLA27XX_PRIMARY_IMAGE; 7586 7587 if (valid_sec_image && active_sec_image) { 7588 if (!active_regions->global || 7589 qla27xx_compare_image_generation( 7590 &pri_image_status, &sec_image_status) < 0) { 7591 active_regions->global = QLA27XX_SECONDARY_IMAGE; 7592 } 7593 } 7594 7595 ql_dbg(ql_dbg_init, vha, 0x018f, "active image %s (%u)\n", 7596 active_regions->global == QLA27XX_DEFAULT_IMAGE ? 7597 "default (boot/fw)" : 7598 active_regions->global == QLA27XX_PRIMARY_IMAGE ? 7599 "primary" : 7600 active_regions->global == QLA27XX_SECONDARY_IMAGE ? 7601 "secondary" : "invalid", 7602 active_regions->global); 7603 } 7604 7605 bool qla24xx_risc_firmware_invalid(uint32_t *dword) 7606 { 7607 return 7608 !(dword[4] | dword[5] | dword[6] | dword[7]) || 7609 !(~dword[4] | ~dword[5] | ~dword[6] | ~dword[7]); 7610 } 7611 7612 static int 7613 qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr, 7614 uint32_t faddr) 7615 { 7616 int rval; 7617 uint templates, segments, fragment; 7618 ulong i; 7619 uint j; 7620 ulong dlen; 7621 uint32_t *dcode; 7622 uint32_t risc_addr, risc_size, risc_attr = 0; 7623 struct qla_hw_data *ha = vha->hw; 7624 struct req_que *req = ha->req_q_map[0]; 7625 struct fwdt *fwdt = ha->fwdt; 7626 7627 ql_dbg(ql_dbg_init, vha, 0x008b, 7628 "FW: Loading firmware from flash (%x).\n", faddr); 7629 7630 dcode = (void *)req->ring; 7631 qla24xx_read_flash_data(vha, dcode, faddr, 8); 7632 if (qla24xx_risc_firmware_invalid(dcode)) { 7633 ql_log(ql_log_fatal, vha, 0x008c, 7634 "Unable to verify the integrity of flash firmware " 7635 "image.\n"); 7636 ql_log(ql_log_fatal, vha, 0x008d, 7637 "Firmware data: %08x %08x %08x %08x.\n", 7638 dcode[0], dcode[1], dcode[2], dcode[3]); 7639 7640 return QLA_FUNCTION_FAILED; 7641 } 7642 7643 dcode = (void *)req->ring; 7644 *srisc_addr = 0; 7645 segments = FA_RISC_CODE_SEGMENTS; 7646 for (j = 0; j < segments; j++) { 7647 ql_dbg(ql_dbg_init, vha, 0x008d, 7648 "-> Loading segment %u...\n", j); 7649 qla24xx_read_flash_data(vha, dcode, faddr, 10); 7650 risc_addr = be32_to_cpu(dcode[2]); 7651 risc_size = be32_to_cpu(dcode[3]); 7652 if (!*srisc_addr) { 7653 *srisc_addr = risc_addr; 7654 risc_attr = be32_to_cpu(dcode[9]); 7655 } 7656 7657 dlen = ha->fw_transfer_size >> 2; 7658 for (fragment = 0; risc_size; fragment++) { 7659 if (dlen > risc_size) 7660 dlen = risc_size; 7661 7662 ql_dbg(ql_dbg_init, vha, 0x008e, 7663 "-> Loading fragment %u: %#x <- %#x (%#lx dwords)...\n", 7664 fragment, risc_addr, faddr, dlen); 7665 qla24xx_read_flash_data(vha, dcode, faddr, dlen); 7666 for (i = 0; i < dlen; i++) 7667 dcode[i] = swab32(dcode[i]); 7668 7669 rval = qla2x00_load_ram(vha, req->dma, risc_addr, dlen); 7670 if (rval) { 7671 ql_log(ql_log_fatal, vha, 0x008f, 7672 "-> Failed load firmware fragment %u.\n", 7673 fragment); 7674 return QLA_FUNCTION_FAILED; 7675 } 7676 7677 faddr += dlen; 7678 risc_addr += dlen; 7679 risc_size -= dlen; 7680 } 7681 } 7682 7683 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha)) 7684 return QLA_SUCCESS; 7685 7686 templates = (risc_attr & BIT_9) ? 2 : 1; 7687 ql_dbg(ql_dbg_init, vha, 0x0160, "-> templates = %u\n", templates); 7688 for (j = 0; j < templates; j++, fwdt++) { 7689 if (fwdt->template) 7690 vfree(fwdt->template); 7691 fwdt->template = NULL; 7692 fwdt->length = 0; 7693 7694 dcode = (void *)req->ring; 7695 qla24xx_read_flash_data(vha, dcode, faddr, 7); 7696 risc_size = be32_to_cpu(dcode[2]); 7697 ql_dbg(ql_dbg_init, vha, 0x0161, 7698 "-> fwdt%u template array at %#x (%#x dwords)\n", 7699 j, faddr, risc_size); 7700 if (!risc_size || !~risc_size) { 7701 ql_dbg(ql_dbg_init, vha, 0x0162, 7702 "-> fwdt%u failed to read array\n", j); 7703 goto failed; 7704 } 7705 7706 /* skip header and ignore checksum */ 7707 faddr += 7; 7708 risc_size -= 8; 7709 7710 ql_dbg(ql_dbg_init, vha, 0x0163, 7711 "-> fwdt%u template allocate template %#x words...\n", 7712 j, risc_size); 7713 fwdt->template = vmalloc(risc_size * sizeof(*dcode)); 7714 if (!fwdt->template) { 7715 ql_log(ql_log_warn, vha, 0x0164, 7716 "-> fwdt%u failed allocate template.\n", j); 7717 goto failed; 7718 } 7719 7720 dcode = fwdt->template; 7721 qla24xx_read_flash_data(vha, dcode, faddr, risc_size); 7722 7723 if (!qla27xx_fwdt_template_valid(dcode)) { 7724 ql_log(ql_log_warn, vha, 0x0165, 7725 "-> fwdt%u failed template validate\n", j); 7726 goto failed; 7727 } 7728 7729 dlen = qla27xx_fwdt_template_size(dcode); 7730 ql_dbg(ql_dbg_init, vha, 0x0166, 7731 "-> fwdt%u template size %#lx bytes (%#lx words)\n", 7732 j, dlen, dlen / sizeof(*dcode)); 7733 if (dlen > risc_size * sizeof(*dcode)) { 7734 ql_log(ql_log_warn, vha, 0x0167, 7735 "-> fwdt%u template exceeds array (%-lu bytes)\n", 7736 j, dlen - risc_size * sizeof(*dcode)); 7737 goto failed; 7738 } 7739 7740 fwdt->length = dlen; 7741 ql_dbg(ql_dbg_init, vha, 0x0168, 7742 "-> fwdt%u loaded template ok\n", j); 7743 7744 faddr += risc_size + 1; 7745 } 7746 7747 return QLA_SUCCESS; 7748 7749 failed: 7750 if (fwdt->template) 7751 vfree(fwdt->template); 7752 fwdt->template = NULL; 7753 fwdt->length = 0; 7754 7755 return QLA_SUCCESS; 7756 } 7757 7758 #define QLA_FW_URL "http://ldriver.qlogic.com/firmware/" 7759 7760 int 7761 qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 7762 { 7763 int rval; 7764 int i, fragment; 7765 uint16_t *wcode, *fwcode; 7766 uint32_t risc_addr, risc_size, fwclen, wlen, *seg; 7767 struct fw_blob *blob; 7768 struct qla_hw_data *ha = vha->hw; 7769 struct req_que *req = ha->req_q_map[0]; 7770 7771 /* Load firmware blob. */ 7772 blob = qla2x00_request_firmware(vha); 7773 if (!blob) { 7774 ql_log(ql_log_info, vha, 0x0083, 7775 "Firmware image unavailable.\n"); 7776 ql_log(ql_log_info, vha, 0x0084, 7777 "Firmware images can be retrieved from: "QLA_FW_URL ".\n"); 7778 return QLA_FUNCTION_FAILED; 7779 } 7780 7781 rval = QLA_SUCCESS; 7782 7783 wcode = (uint16_t *)req->ring; 7784 *srisc_addr = 0; 7785 fwcode = (uint16_t *)blob->fw->data; 7786 fwclen = 0; 7787 7788 /* Validate firmware image by checking version. */ 7789 if (blob->fw->size < 8 * sizeof(uint16_t)) { 7790 ql_log(ql_log_fatal, vha, 0x0085, 7791 "Unable to verify integrity of firmware image (%zd).\n", 7792 blob->fw->size); 7793 goto fail_fw_integrity; 7794 } 7795 for (i = 0; i < 4; i++) 7796 wcode[i] = be16_to_cpu(fwcode[i + 4]); 7797 if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff && 7798 wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 && 7799 wcode[2] == 0 && wcode[3] == 0)) { 7800 ql_log(ql_log_fatal, vha, 0x0086, 7801 "Unable to verify integrity of firmware image.\n"); 7802 ql_log(ql_log_fatal, vha, 0x0087, 7803 "Firmware data: %04x %04x %04x %04x.\n", 7804 wcode[0], wcode[1], wcode[2], wcode[3]); 7805 goto fail_fw_integrity; 7806 } 7807 7808 seg = blob->segs; 7809 while (*seg && rval == QLA_SUCCESS) { 7810 risc_addr = *seg; 7811 *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr; 7812 risc_size = be16_to_cpu(fwcode[3]); 7813 7814 /* Validate firmware image size. */ 7815 fwclen += risc_size * sizeof(uint16_t); 7816 if (blob->fw->size < fwclen) { 7817 ql_log(ql_log_fatal, vha, 0x0088, 7818 "Unable to verify integrity of firmware image " 7819 "(%zd).\n", blob->fw->size); 7820 goto fail_fw_integrity; 7821 } 7822 7823 fragment = 0; 7824 while (risc_size > 0 && rval == QLA_SUCCESS) { 7825 wlen = (uint16_t)(ha->fw_transfer_size >> 1); 7826 if (wlen > risc_size) 7827 wlen = risc_size; 7828 ql_dbg(ql_dbg_init, vha, 0x0089, 7829 "Loading risc segment@ risc addr %x number of " 7830 "words 0x%x.\n", risc_addr, wlen); 7831 7832 for (i = 0; i < wlen; i++) 7833 wcode[i] = swab16(fwcode[i]); 7834 7835 rval = qla2x00_load_ram(vha, req->dma, risc_addr, 7836 wlen); 7837 if (rval) { 7838 ql_log(ql_log_fatal, vha, 0x008a, 7839 "Failed to load segment %d of firmware.\n", 7840 fragment); 7841 break; 7842 } 7843 7844 fwcode += wlen; 7845 risc_addr += wlen; 7846 risc_size -= wlen; 7847 fragment++; 7848 } 7849 7850 /* Next segment. */ 7851 seg++; 7852 } 7853 return rval; 7854 7855 fail_fw_integrity: 7856 return QLA_FUNCTION_FAILED; 7857 } 7858 7859 static int 7860 qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr) 7861 { 7862 int rval; 7863 uint templates, segments, fragment; 7864 uint32_t *dcode; 7865 ulong dlen; 7866 uint32_t risc_addr, risc_size, risc_attr = 0; 7867 ulong i; 7868 uint j; 7869 struct fw_blob *blob; 7870 uint32_t *fwcode; 7871 struct qla_hw_data *ha = vha->hw; 7872 struct req_que *req = ha->req_q_map[0]; 7873 struct fwdt *fwdt = ha->fwdt; 7874 7875 ql_dbg(ql_dbg_init, vha, 0x0090, 7876 "-> FW: Loading via request-firmware.\n"); 7877 7878 blob = qla2x00_request_firmware(vha); 7879 if (!blob) { 7880 ql_log(ql_log_warn, vha, 0x0092, 7881 "-> Firmware file not found.\n"); 7882 7883 return QLA_FUNCTION_FAILED; 7884 } 7885 7886 fwcode = (void *)blob->fw->data; 7887 dcode = fwcode; 7888 if (qla24xx_risc_firmware_invalid(dcode)) { 7889 ql_log(ql_log_fatal, vha, 0x0093, 7890 "Unable to verify integrity of firmware image (%zd).\n", 7891 blob->fw->size); 7892 ql_log(ql_log_fatal, vha, 0x0095, 7893 "Firmware data: %08x %08x %08x %08x.\n", 7894 dcode[0], dcode[1], dcode[2], dcode[3]); 7895 return QLA_FUNCTION_FAILED; 7896 } 7897 7898 dcode = (void *)req->ring; 7899 *srisc_addr = 0; 7900 segments = FA_RISC_CODE_SEGMENTS; 7901 for (j = 0; j < segments; j++) { 7902 ql_dbg(ql_dbg_init, vha, 0x0096, 7903 "-> Loading segment %u...\n", j); 7904 risc_addr = be32_to_cpu(fwcode[2]); 7905 risc_size = be32_to_cpu(fwcode[3]); 7906 7907 if (!*srisc_addr) { 7908 *srisc_addr = risc_addr; 7909 risc_attr = be32_to_cpu(fwcode[9]); 7910 } 7911 7912 dlen = ha->fw_transfer_size >> 2; 7913 for (fragment = 0; risc_size; fragment++) { 7914 if (dlen > risc_size) 7915 dlen = risc_size; 7916 7917 ql_dbg(ql_dbg_init, vha, 0x0097, 7918 "-> Loading fragment %u: %#x <- %#x (%#lx words)...\n", 7919 fragment, risc_addr, 7920 (uint32_t)(fwcode - (typeof(fwcode))blob->fw->data), 7921 dlen); 7922 7923 for (i = 0; i < dlen; i++) 7924 dcode[i] = swab32(fwcode[i]); 7925 7926 rval = qla2x00_load_ram(vha, req->dma, risc_addr, dlen); 7927 if (rval) { 7928 ql_log(ql_log_fatal, vha, 0x0098, 7929 "-> Failed load firmware fragment %u.\n", 7930 fragment); 7931 return QLA_FUNCTION_FAILED; 7932 } 7933 7934 fwcode += dlen; 7935 risc_addr += dlen; 7936 risc_size -= dlen; 7937 } 7938 } 7939 7940 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha)) 7941 return QLA_SUCCESS; 7942 7943 templates = (risc_attr & BIT_9) ? 2 : 1; 7944 ql_dbg(ql_dbg_init, vha, 0x0170, "-> templates = %u\n", templates); 7945 for (j = 0; j < templates; j++, fwdt++) { 7946 if (fwdt->template) 7947 vfree(fwdt->template); 7948 fwdt->template = NULL; 7949 fwdt->length = 0; 7950 7951 risc_size = be32_to_cpu(fwcode[2]); 7952 ql_dbg(ql_dbg_init, vha, 0x0171, 7953 "-> fwdt%u template array at %#x (%#x dwords)\n", 7954 j, (uint32_t)((void *)fwcode - (void *)blob->fw->data), 7955 risc_size); 7956 if (!risc_size || !~risc_size) { 7957 ql_dbg(ql_dbg_init, vha, 0x0172, 7958 "-> fwdt%u failed to read array\n", j); 7959 goto failed; 7960 } 7961 7962 /* skip header and ignore checksum */ 7963 fwcode += 7; 7964 risc_size -= 8; 7965 7966 ql_dbg(ql_dbg_init, vha, 0x0173, 7967 "-> fwdt%u template allocate template %#x words...\n", 7968 j, risc_size); 7969 fwdt->template = vmalloc(risc_size * sizeof(*dcode)); 7970 if (!fwdt->template) { 7971 ql_log(ql_log_warn, vha, 0x0174, 7972 "-> fwdt%u failed allocate template.\n", j); 7973 goto failed; 7974 } 7975 7976 dcode = fwdt->template; 7977 for (i = 0; i < risc_size; i++) 7978 dcode[i] = fwcode[i]; 7979 7980 if (!qla27xx_fwdt_template_valid(dcode)) { 7981 ql_log(ql_log_warn, vha, 0x0175, 7982 "-> fwdt%u failed template validate\n", j); 7983 goto failed; 7984 } 7985 7986 dlen = qla27xx_fwdt_template_size(dcode); 7987 ql_dbg(ql_dbg_init, vha, 0x0176, 7988 "-> fwdt%u template size %#lx bytes (%#lx words)\n", 7989 j, dlen, dlen / sizeof(*dcode)); 7990 if (dlen > risc_size * sizeof(*dcode)) { 7991 ql_log(ql_log_warn, vha, 0x0177, 7992 "-> fwdt%u template exceeds array (%-lu bytes)\n", 7993 j, dlen - risc_size * sizeof(*dcode)); 7994 goto failed; 7995 } 7996 7997 fwdt->length = dlen; 7998 ql_dbg(ql_dbg_init, vha, 0x0178, 7999 "-> fwdt%u loaded template ok\n", j); 8000 8001 fwcode += risc_size + 1; 8002 } 8003 8004 return QLA_SUCCESS; 8005 8006 failed: 8007 if (fwdt->template) 8008 vfree(fwdt->template); 8009 fwdt->template = NULL; 8010 fwdt->length = 0; 8011 8012 return QLA_SUCCESS; 8013 } 8014 8015 int 8016 qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 8017 { 8018 int rval; 8019 8020 if (ql2xfwloadbin == 1) 8021 return qla81xx_load_risc(vha, srisc_addr); 8022 8023 /* 8024 * FW Load priority: 8025 * 1) Firmware via request-firmware interface (.bin file). 8026 * 2) Firmware residing in flash. 8027 */ 8028 rval = qla24xx_load_risc_blob(vha, srisc_addr); 8029 if (rval == QLA_SUCCESS) 8030 return rval; 8031 8032 return qla24xx_load_risc_flash(vha, srisc_addr, 8033 vha->hw->flt_region_fw); 8034 } 8035 8036 int 8037 qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 8038 { 8039 int rval; 8040 struct qla_hw_data *ha = vha->hw; 8041 struct active_regions active_regions = { }; 8042 8043 if (ql2xfwloadbin == 2) 8044 goto try_blob_fw; 8045 8046 /* FW Load priority: 8047 * 1) Firmware residing in flash. 8048 * 2) Firmware via request-firmware interface (.bin file). 8049 * 3) Golden-Firmware residing in flash -- (limited operation). 8050 */ 8051 8052 if (!IS_QLA27XX(ha) && !IS_QLA28XX(ha)) 8053 goto try_primary_fw; 8054 8055 qla27xx_get_active_image(vha, &active_regions); 8056 8057 if (active_regions.global != QLA27XX_SECONDARY_IMAGE) 8058 goto try_primary_fw; 8059 8060 ql_dbg(ql_dbg_init, vha, 0x008b, 8061 "Loading secondary firmware image.\n"); 8062 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw_sec); 8063 if (!rval) 8064 return rval; 8065 8066 try_primary_fw: 8067 ql_dbg(ql_dbg_init, vha, 0x008b, 8068 "Loading primary firmware image.\n"); 8069 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw); 8070 if (!rval) 8071 return rval; 8072 8073 try_blob_fw: 8074 rval = qla24xx_load_risc_blob(vha, srisc_addr); 8075 if (!rval || !ha->flt_region_gold_fw) 8076 return rval; 8077 8078 ql_log(ql_log_info, vha, 0x0099, 8079 "Attempting to fallback to golden firmware.\n"); 8080 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw); 8081 if (rval) 8082 return rval; 8083 8084 ql_log(ql_log_info, vha, 0x009a, "Need firmware flash update.\n"); 8085 ha->flags.running_gold_fw = 1; 8086 return rval; 8087 } 8088 8089 void 8090 qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha) 8091 { 8092 int ret, retries; 8093 struct qla_hw_data *ha = vha->hw; 8094 8095 if (ha->flags.pci_channel_io_perm_failure) 8096 return; 8097 if (!IS_FWI2_CAPABLE(ha)) 8098 return; 8099 if (!ha->fw_major_version) 8100 return; 8101 if (!ha->flags.fw_started) 8102 return; 8103 8104 ret = qla2x00_stop_firmware(vha); 8105 for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT && 8106 ret != QLA_INVALID_COMMAND && retries ; retries--) { 8107 ha->isp_ops->reset_chip(vha); 8108 if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS) 8109 continue; 8110 if (qla2x00_setup_chip(vha) != QLA_SUCCESS) 8111 continue; 8112 ql_log(ql_log_info, vha, 0x8015, 8113 "Attempting retry of stop-firmware command.\n"); 8114 ret = qla2x00_stop_firmware(vha); 8115 } 8116 8117 QLA_FW_STOPPED(ha); 8118 ha->flags.fw_init_done = 0; 8119 } 8120 8121 int 8122 qla24xx_configure_vhba(scsi_qla_host_t *vha) 8123 { 8124 int rval = QLA_SUCCESS; 8125 int rval2; 8126 uint16_t mb[MAILBOX_REGISTER_COUNT]; 8127 struct qla_hw_data *ha = vha->hw; 8128 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 8129 8130 if (!vha->vp_idx) 8131 return -EINVAL; 8132 8133 rval = qla2x00_fw_ready(base_vha); 8134 8135 if (rval == QLA_SUCCESS) { 8136 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 8137 qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL); 8138 } 8139 8140 vha->flags.management_server_logged_in = 0; 8141 8142 /* Login to SNS first */ 8143 rval2 = ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, 8144 BIT_1); 8145 if (rval2 != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) { 8146 if (rval2 == QLA_MEMORY_ALLOC_FAILED) 8147 ql_dbg(ql_dbg_init, vha, 0x0120, 8148 "Failed SNS login: loop_id=%x, rval2=%d\n", 8149 NPH_SNS, rval2); 8150 else 8151 ql_dbg(ql_dbg_init, vha, 0x0103, 8152 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x " 8153 "mb[2]=%x mb[6]=%x mb[7]=%x.\n", 8154 NPH_SNS, mb[0], mb[1], mb[2], mb[6], mb[7]); 8155 return (QLA_FUNCTION_FAILED); 8156 } 8157 8158 atomic_set(&vha->loop_down_timer, 0); 8159 atomic_set(&vha->loop_state, LOOP_UP); 8160 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 8161 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 8162 rval = qla2x00_loop_resync(base_vha); 8163 8164 return rval; 8165 } 8166 8167 /* 84XX Support **************************************************************/ 8168 8169 static LIST_HEAD(qla_cs84xx_list); 8170 static DEFINE_MUTEX(qla_cs84xx_mutex); 8171 8172 static struct qla_chip_state_84xx * 8173 qla84xx_get_chip(struct scsi_qla_host *vha) 8174 { 8175 struct qla_chip_state_84xx *cs84xx; 8176 struct qla_hw_data *ha = vha->hw; 8177 8178 mutex_lock(&qla_cs84xx_mutex); 8179 8180 /* Find any shared 84xx chip. */ 8181 list_for_each_entry(cs84xx, &qla_cs84xx_list, list) { 8182 if (cs84xx->bus == ha->pdev->bus) { 8183 kref_get(&cs84xx->kref); 8184 goto done; 8185 } 8186 } 8187 8188 cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL); 8189 if (!cs84xx) 8190 goto done; 8191 8192 kref_init(&cs84xx->kref); 8193 spin_lock_init(&cs84xx->access_lock); 8194 mutex_init(&cs84xx->fw_update_mutex); 8195 cs84xx->bus = ha->pdev->bus; 8196 8197 list_add_tail(&cs84xx->list, &qla_cs84xx_list); 8198 done: 8199 mutex_unlock(&qla_cs84xx_mutex); 8200 return cs84xx; 8201 } 8202 8203 static void 8204 __qla84xx_chip_release(struct kref *kref) 8205 { 8206 struct qla_chip_state_84xx *cs84xx = 8207 container_of(kref, struct qla_chip_state_84xx, kref); 8208 8209 mutex_lock(&qla_cs84xx_mutex); 8210 list_del(&cs84xx->list); 8211 mutex_unlock(&qla_cs84xx_mutex); 8212 kfree(cs84xx); 8213 } 8214 8215 void 8216 qla84xx_put_chip(struct scsi_qla_host *vha) 8217 { 8218 struct qla_hw_data *ha = vha->hw; 8219 8220 if (ha->cs84xx) 8221 kref_put(&ha->cs84xx->kref, __qla84xx_chip_release); 8222 } 8223 8224 static int 8225 qla84xx_init_chip(scsi_qla_host_t *vha) 8226 { 8227 int rval; 8228 uint16_t status[2]; 8229 struct qla_hw_data *ha = vha->hw; 8230 8231 mutex_lock(&ha->cs84xx->fw_update_mutex); 8232 8233 rval = qla84xx_verify_chip(vha, status); 8234 8235 mutex_unlock(&ha->cs84xx->fw_update_mutex); 8236 8237 return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED : 8238 QLA_SUCCESS; 8239 } 8240 8241 /* 81XX Support **************************************************************/ 8242 8243 int 8244 qla81xx_nvram_config(scsi_qla_host_t *vha) 8245 { 8246 int rval; 8247 struct init_cb_81xx *icb; 8248 struct nvram_81xx *nv; 8249 uint32_t *dptr; 8250 uint8_t *dptr1, *dptr2; 8251 uint32_t chksum; 8252 uint16_t cnt; 8253 struct qla_hw_data *ha = vha->hw; 8254 uint32_t faddr; 8255 struct active_regions active_regions = { }; 8256 8257 rval = QLA_SUCCESS; 8258 icb = (struct init_cb_81xx *)ha->init_cb; 8259 nv = ha->nvram; 8260 8261 /* Determine NVRAM starting address. */ 8262 ha->nvram_size = sizeof(*nv); 8263 ha->vpd_size = FA_NVRAM_VPD_SIZE; 8264 if (IS_P3P_TYPE(ha) || IS_QLA8031(ha)) 8265 ha->vpd_size = FA_VPD_SIZE_82XX; 8266 8267 if (IS_QLA28XX(ha) || IS_QLA27XX(ha)) 8268 qla28xx_get_aux_images(vha, &active_regions); 8269 8270 /* Get VPD data into cache */ 8271 ha->vpd = ha->nvram + VPD_OFFSET; 8272 8273 faddr = ha->flt_region_vpd; 8274 if (IS_QLA28XX(ha)) { 8275 if (active_regions.aux.vpd_nvram == QLA27XX_SECONDARY_IMAGE) 8276 faddr = ha->flt_region_vpd_sec; 8277 ql_dbg(ql_dbg_init, vha, 0x0110, 8278 "Loading %s nvram image.\n", 8279 active_regions.aux.vpd_nvram == QLA27XX_PRIMARY_IMAGE ? 8280 "primary" : "secondary"); 8281 } 8282 ha->isp_ops->read_optrom(vha, ha->vpd, faddr << 2, ha->vpd_size); 8283 8284 /* Get NVRAM data into cache and calculate checksum. */ 8285 faddr = ha->flt_region_nvram; 8286 if (IS_QLA28XX(ha)) { 8287 if (active_regions.aux.vpd_nvram == QLA27XX_SECONDARY_IMAGE) 8288 faddr = ha->flt_region_nvram_sec; 8289 } 8290 ql_dbg(ql_dbg_init, vha, 0x0110, 8291 "Loading %s nvram image.\n", 8292 active_regions.aux.vpd_nvram == QLA27XX_PRIMARY_IMAGE ? 8293 "primary" : "secondary"); 8294 ha->isp_ops->read_optrom(vha, ha->nvram, faddr << 2, ha->nvram_size); 8295 8296 dptr = (uint32_t *)nv; 8297 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++) 8298 chksum += le32_to_cpu(*dptr); 8299 8300 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111, 8301 "Contents of NVRAM:\n"); 8302 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112, 8303 nv, ha->nvram_size); 8304 8305 /* Bad NVRAM data, set defaults parameters. */ 8306 if (chksum || memcmp("ISP ", nv->id, sizeof(nv->id)) || 8307 le16_to_cpu(nv->nvram_version) < ICB_VERSION) { 8308 /* Reset NVRAM data. */ 8309 ql_log(ql_log_info, vha, 0x0073, 8310 "Inconsistent NVRAM checksum=%#x id=%.4s version=%#x.\n", 8311 chksum, nv->id, le16_to_cpu(nv->nvram_version)); 8312 ql_dump_buffer(ql_dbg_init, vha, 0x0073, nv, sizeof(*nv)); 8313 ql_log(ql_log_info, vha, 0x0074, 8314 "Falling back to functioning (yet invalid -- WWPN) " 8315 "defaults.\n"); 8316 8317 /* 8318 * Set default initialization control block. 8319 */ 8320 memset(nv, 0, ha->nvram_size); 8321 nv->nvram_version = cpu_to_le16(ICB_VERSION); 8322 nv->version = cpu_to_le16(ICB_VERSION); 8323 nv->frame_payload_size = 2048; 8324 nv->execution_throttle = cpu_to_le16(0xFFFF); 8325 nv->exchange_count = cpu_to_le16(0); 8326 nv->port_name[0] = 0x21; 8327 nv->port_name[1] = 0x00 + ha->port_no + 1; 8328 nv->port_name[2] = 0x00; 8329 nv->port_name[3] = 0xe0; 8330 nv->port_name[4] = 0x8b; 8331 nv->port_name[5] = 0x1c; 8332 nv->port_name[6] = 0x55; 8333 nv->port_name[7] = 0x86; 8334 nv->node_name[0] = 0x20; 8335 nv->node_name[1] = 0x00; 8336 nv->node_name[2] = 0x00; 8337 nv->node_name[3] = 0xe0; 8338 nv->node_name[4] = 0x8b; 8339 nv->node_name[5] = 0x1c; 8340 nv->node_name[6] = 0x55; 8341 nv->node_name[7] = 0x86; 8342 nv->login_retry_count = cpu_to_le16(8); 8343 nv->interrupt_delay_timer = cpu_to_le16(0); 8344 nv->login_timeout = cpu_to_le16(0); 8345 nv->firmware_options_1 = 8346 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); 8347 nv->firmware_options_2 = cpu_to_le32(2 << 4); 8348 nv->firmware_options_2 |= cpu_to_le32(BIT_12); 8349 nv->firmware_options_3 = cpu_to_le32(2 << 13); 8350 nv->host_p = cpu_to_le32(BIT_11|BIT_10); 8351 nv->efi_parameters = cpu_to_le32(0); 8352 nv->reset_delay = 5; 8353 nv->max_luns_per_target = cpu_to_le16(128); 8354 nv->port_down_retry_count = cpu_to_le16(30); 8355 nv->link_down_timeout = cpu_to_le16(180); 8356 nv->enode_mac[0] = 0x00; 8357 nv->enode_mac[1] = 0xC0; 8358 nv->enode_mac[2] = 0xDD; 8359 nv->enode_mac[3] = 0x04; 8360 nv->enode_mac[4] = 0x05; 8361 nv->enode_mac[5] = 0x06 + ha->port_no + 1; 8362 8363 rval = 1; 8364 } 8365 8366 if (IS_T10_PI_CAPABLE(ha)) 8367 nv->frame_payload_size &= ~7; 8368 8369 qlt_81xx_config_nvram_stage1(vha, nv); 8370 8371 /* Reset Initialization control block */ 8372 memset(icb, 0, ha->init_cb_size); 8373 8374 /* Copy 1st segment. */ 8375 dptr1 = (uint8_t *)icb; 8376 dptr2 = (uint8_t *)&nv->version; 8377 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; 8378 while (cnt--) 8379 *dptr1++ = *dptr2++; 8380 8381 icb->login_retry_count = nv->login_retry_count; 8382 8383 /* Copy 2nd segment. */ 8384 dptr1 = (uint8_t *)&icb->interrupt_delay_timer; 8385 dptr2 = (uint8_t *)&nv->interrupt_delay_timer; 8386 cnt = (uint8_t *)&icb->reserved_5 - 8387 (uint8_t *)&icb->interrupt_delay_timer; 8388 while (cnt--) 8389 *dptr1++ = *dptr2++; 8390 8391 memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac)); 8392 /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */ 8393 if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) { 8394 icb->enode_mac[0] = 0x00; 8395 icb->enode_mac[1] = 0xC0; 8396 icb->enode_mac[2] = 0xDD; 8397 icb->enode_mac[3] = 0x04; 8398 icb->enode_mac[4] = 0x05; 8399 icb->enode_mac[5] = 0x06 + ha->port_no + 1; 8400 } 8401 8402 /* Use extended-initialization control block. */ 8403 memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb)); 8404 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size); 8405 /* 8406 * Setup driver NVRAM options. 8407 */ 8408 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), 8409 "QLE8XXX"); 8410 8411 qlt_81xx_config_nvram_stage2(vha, icb); 8412 8413 /* Use alternate WWN? */ 8414 if (nv->host_p & cpu_to_le32(BIT_15)) { 8415 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 8416 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 8417 } 8418 8419 /* Prepare nodename */ 8420 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) { 8421 /* 8422 * Firmware will apply the following mask if the nodename was 8423 * not provided. 8424 */ 8425 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 8426 icb->node_name[0] &= 0xF0; 8427 } 8428 8429 /* Set host adapter parameters. */ 8430 ha->flags.disable_risc_code_load = 0; 8431 ha->flags.enable_lip_reset = 0; 8432 ha->flags.enable_lip_full_login = 8433 le32_to_cpu(nv->host_p) & BIT_10 ? 1 : 0; 8434 ha->flags.enable_target_reset = 8435 le32_to_cpu(nv->host_p) & BIT_11 ? 1 : 0; 8436 ha->flags.enable_led_scheme = 0; 8437 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1 : 0; 8438 8439 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & 8440 (BIT_6 | BIT_5 | BIT_4)) >> 4; 8441 8442 /* save HBA serial number */ 8443 ha->serial0 = icb->port_name[5]; 8444 ha->serial1 = icb->port_name[6]; 8445 ha->serial2 = icb->port_name[7]; 8446 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 8447 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 8448 8449 icb->execution_throttle = cpu_to_le16(0xFFFF); 8450 8451 ha->retry_count = le16_to_cpu(nv->login_retry_count); 8452 8453 /* Set minimum login_timeout to 4 seconds. */ 8454 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) 8455 nv->login_timeout = cpu_to_le16(ql2xlogintimeout); 8456 if (le16_to_cpu(nv->login_timeout) < 4) 8457 nv->login_timeout = cpu_to_le16(4); 8458 ha->login_timeout = le16_to_cpu(nv->login_timeout); 8459 8460 /* Set minimum RATOV to 100 tenths of a second. */ 8461 ha->r_a_tov = 100; 8462 8463 ha->loop_reset_delay = nv->reset_delay; 8464 8465 /* Link Down Timeout = 0: 8466 * 8467 * When Port Down timer expires we will start returning 8468 * I/O's to OS with "DID_NO_CONNECT". 8469 * 8470 * Link Down Timeout != 0: 8471 * 8472 * The driver waits for the link to come up after link down 8473 * before returning I/Os to OS with "DID_NO_CONNECT". 8474 */ 8475 if (le16_to_cpu(nv->link_down_timeout) == 0) { 8476 ha->loop_down_abort_time = 8477 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 8478 } else { 8479 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); 8480 ha->loop_down_abort_time = 8481 (LOOP_DOWN_TIME - ha->link_down_timeout); 8482 } 8483 8484 /* Need enough time to try and get the port back. */ 8485 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); 8486 if (qlport_down_retry) 8487 ha->port_down_retry_count = qlport_down_retry; 8488 8489 /* Set login_retry_count */ 8490 ha->login_retry_count = le16_to_cpu(nv->login_retry_count); 8491 if (ha->port_down_retry_count == 8492 le16_to_cpu(nv->port_down_retry_count) && 8493 ha->port_down_retry_count > 3) 8494 ha->login_retry_count = ha->port_down_retry_count; 8495 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 8496 ha->login_retry_count = ha->port_down_retry_count; 8497 if (ql2xloginretrycount) 8498 ha->login_retry_count = ql2xloginretrycount; 8499 8500 /* if not running MSI-X we need handshaking on interrupts */ 8501 if (!vha->hw->flags.msix_enabled && 8502 (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))) 8503 icb->firmware_options_2 |= cpu_to_le32(BIT_22); 8504 8505 /* Enable ZIO. */ 8506 if (!vha->flags.init_done) { 8507 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & 8508 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 8509 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? 8510 le16_to_cpu(icb->interrupt_delay_timer) : 2; 8511 } 8512 icb->firmware_options_2 &= cpu_to_le32( 8513 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); 8514 vha->flags.process_response_queue = 0; 8515 if (ha->zio_mode != QLA_ZIO_DISABLED) { 8516 ha->zio_mode = QLA_ZIO_MODE_6; 8517 8518 ql_log(ql_log_info, vha, 0x0075, 8519 "ZIO mode %d enabled; timer delay (%d us).\n", 8520 ha->zio_mode, 8521 ha->zio_timer * 100); 8522 8523 icb->firmware_options_2 |= cpu_to_le32( 8524 (uint32_t)ha->zio_mode); 8525 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); 8526 vha->flags.process_response_queue = 1; 8527 } 8528 8529 /* enable RIDA Format2 */ 8530 icb->firmware_options_3 |= BIT_0; 8531 8532 /* N2N: driver will initiate Login instead of FW */ 8533 icb->firmware_options_3 |= BIT_8; 8534 8535 /* Determine NVMe/FCP priority for target ports */ 8536 ha->fc4_type_priority = qla2xxx_get_fc4_priority(vha); 8537 8538 if (rval) { 8539 ql_log(ql_log_warn, vha, 0x0076, 8540 "NVRAM configuration failed.\n"); 8541 } 8542 return (rval); 8543 } 8544 8545 int 8546 qla82xx_restart_isp(scsi_qla_host_t *vha) 8547 { 8548 int status, rval; 8549 struct qla_hw_data *ha = vha->hw; 8550 struct scsi_qla_host *vp; 8551 unsigned long flags; 8552 8553 status = qla2x00_init_rings(vha); 8554 if (!status) { 8555 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 8556 ha->flags.chip_reset_done = 1; 8557 8558 status = qla2x00_fw_ready(vha); 8559 if (!status) { 8560 /* Issue a marker after FW becomes ready. */ 8561 qla2x00_marker(vha, ha->base_qpair, 0, 0, MK_SYNC_ALL); 8562 vha->flags.online = 1; 8563 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 8564 } 8565 8566 /* if no cable then assume it's good */ 8567 if ((vha->device_flags & DFLG_NO_CABLE)) 8568 status = 0; 8569 } 8570 8571 if (!status) { 8572 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 8573 8574 if (!atomic_read(&vha->loop_down_timer)) { 8575 /* 8576 * Issue marker command only when we are going 8577 * to start the I/O . 8578 */ 8579 vha->marker_needed = 1; 8580 } 8581 8582 ha->isp_ops->enable_intrs(ha); 8583 8584 ha->isp_abort_cnt = 0; 8585 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 8586 8587 /* Update the firmware version */ 8588 status = qla82xx_check_md_needed(vha); 8589 8590 if (ha->fce) { 8591 ha->flags.fce_enabled = 1; 8592 memset(ha->fce, 0, 8593 fce_calc_size(ha->fce_bufs)); 8594 rval = qla2x00_enable_fce_trace(vha, 8595 ha->fce_dma, ha->fce_bufs, ha->fce_mb, 8596 &ha->fce_bufs); 8597 if (rval) { 8598 ql_log(ql_log_warn, vha, 0x8001, 8599 "Unable to reinitialize FCE (%d).\n", 8600 rval); 8601 ha->flags.fce_enabled = 0; 8602 } 8603 } 8604 8605 if (ha->eft) { 8606 memset(ha->eft, 0, EFT_SIZE); 8607 rval = qla2x00_enable_eft_trace(vha, 8608 ha->eft_dma, EFT_NUM_BUFFERS); 8609 if (rval) { 8610 ql_log(ql_log_warn, vha, 0x8010, 8611 "Unable to reinitialize EFT (%d).\n", 8612 rval); 8613 } 8614 } 8615 } 8616 8617 if (!status) { 8618 ql_dbg(ql_dbg_taskm, vha, 0x8011, 8619 "qla82xx_restart_isp succeeded.\n"); 8620 8621 spin_lock_irqsave(&ha->vport_slock, flags); 8622 list_for_each_entry(vp, &ha->vp_list, list) { 8623 if (vp->vp_idx) { 8624 atomic_inc(&vp->vref_count); 8625 spin_unlock_irqrestore(&ha->vport_slock, flags); 8626 8627 qla2x00_vp_abort_isp(vp); 8628 8629 spin_lock_irqsave(&ha->vport_slock, flags); 8630 atomic_dec(&vp->vref_count); 8631 } 8632 } 8633 spin_unlock_irqrestore(&ha->vport_slock, flags); 8634 8635 } else { 8636 ql_log(ql_log_warn, vha, 0x8016, 8637 "qla82xx_restart_isp **** FAILED ****.\n"); 8638 } 8639 8640 return status; 8641 } 8642 8643 void 8644 qla81xx_update_fw_options(scsi_qla_host_t *vha) 8645 { 8646 struct qla_hw_data *ha = vha->hw; 8647 8648 /* Hold status IOCBs until ABTS response received. */ 8649 if (ql2xfwholdabts) 8650 ha->fw_options[3] |= BIT_12; 8651 8652 /* Set Retry FLOGI in case of P2P connection */ 8653 if (ha->operating_mode == P2P) { 8654 ha->fw_options[2] |= BIT_3; 8655 ql_dbg(ql_dbg_disc, vha, 0x2103, 8656 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n", 8657 __func__, ha->fw_options[2]); 8658 } 8659 8660 /* Move PUREX, ABTS RX & RIDA to ATIOQ */ 8661 if (ql2xmvasynctoatio) { 8662 if (qla_tgt_mode_enabled(vha) || 8663 qla_dual_mode_enabled(vha)) 8664 ha->fw_options[2] |= BIT_11; 8665 else 8666 ha->fw_options[2] &= ~BIT_11; 8667 } 8668 8669 if (qla_tgt_mode_enabled(vha) || 8670 qla_dual_mode_enabled(vha)) { 8671 /* FW auto send SCSI status during */ 8672 ha->fw_options[1] |= BIT_8; 8673 ha->fw_options[10] |= (u16)SAM_STAT_BUSY << 8; 8674 8675 /* FW perform Exchange validation */ 8676 ha->fw_options[2] |= BIT_4; 8677 } else { 8678 ha->fw_options[1] &= ~BIT_8; 8679 ha->fw_options[10] &= 0x00ff; 8680 8681 ha->fw_options[2] &= ~BIT_4; 8682 } 8683 8684 if (ql2xetsenable) { 8685 /* Enable ETS Burst. */ 8686 memset(ha->fw_options, 0, sizeof(ha->fw_options)); 8687 ha->fw_options[2] |= BIT_9; 8688 } 8689 8690 ql_dbg(ql_dbg_init, vha, 0x00e9, 8691 "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n", 8692 __func__, ha->fw_options[1], ha->fw_options[2], 8693 ha->fw_options[3], vha->host->active_mode); 8694 8695 qla2x00_set_fw_options(vha, ha->fw_options); 8696 } 8697 8698 /* 8699 * qla24xx_get_fcp_prio 8700 * Gets the fcp cmd priority value for the logged in port. 8701 * Looks for a match of the port descriptors within 8702 * each of the fcp prio config entries. If a match is found, 8703 * the tag (priority) value is returned. 8704 * 8705 * Input: 8706 * vha = scsi host structure pointer. 8707 * fcport = port structure pointer. 8708 * 8709 * Return: 8710 * non-zero (if found) 8711 * -1 (if not found) 8712 * 8713 * Context: 8714 * Kernel context 8715 */ 8716 static int 8717 qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) 8718 { 8719 int i, entries; 8720 uint8_t pid_match, wwn_match; 8721 int priority; 8722 uint32_t pid1, pid2; 8723 uint64_t wwn1, wwn2; 8724 struct qla_fcp_prio_entry *pri_entry; 8725 struct qla_hw_data *ha = vha->hw; 8726 8727 if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled) 8728 return -1; 8729 8730 priority = -1; 8731 entries = ha->fcp_prio_cfg->num_entries; 8732 pri_entry = &ha->fcp_prio_cfg->entry[0]; 8733 8734 for (i = 0; i < entries; i++) { 8735 pid_match = wwn_match = 0; 8736 8737 if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) { 8738 pri_entry++; 8739 continue; 8740 } 8741 8742 /* check source pid for a match */ 8743 if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) { 8744 pid1 = pri_entry->src_pid & INVALID_PORT_ID; 8745 pid2 = vha->d_id.b24 & INVALID_PORT_ID; 8746 if (pid1 == INVALID_PORT_ID) 8747 pid_match++; 8748 else if (pid1 == pid2) 8749 pid_match++; 8750 } 8751 8752 /* check destination pid for a match */ 8753 if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) { 8754 pid1 = pri_entry->dst_pid & INVALID_PORT_ID; 8755 pid2 = fcport->d_id.b24 & INVALID_PORT_ID; 8756 if (pid1 == INVALID_PORT_ID) 8757 pid_match++; 8758 else if (pid1 == pid2) 8759 pid_match++; 8760 } 8761 8762 /* check source WWN for a match */ 8763 if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) { 8764 wwn1 = wwn_to_u64(vha->port_name); 8765 wwn2 = wwn_to_u64(pri_entry->src_wwpn); 8766 if (wwn2 == (uint64_t)-1) 8767 wwn_match++; 8768 else if (wwn1 == wwn2) 8769 wwn_match++; 8770 } 8771 8772 /* check destination WWN for a match */ 8773 if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) { 8774 wwn1 = wwn_to_u64(fcport->port_name); 8775 wwn2 = wwn_to_u64(pri_entry->dst_wwpn); 8776 if (wwn2 == (uint64_t)-1) 8777 wwn_match++; 8778 else if (wwn1 == wwn2) 8779 wwn_match++; 8780 } 8781 8782 if (pid_match == 2 || wwn_match == 2) { 8783 /* Found a matching entry */ 8784 if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID) 8785 priority = pri_entry->tag; 8786 break; 8787 } 8788 8789 pri_entry++; 8790 } 8791 8792 return priority; 8793 } 8794 8795 /* 8796 * qla24xx_update_fcport_fcp_prio 8797 * Activates fcp priority for the logged in fc port 8798 * 8799 * Input: 8800 * vha = scsi host structure pointer. 8801 * fcp = port structure pointer. 8802 * 8803 * Return: 8804 * QLA_SUCCESS or QLA_FUNCTION_FAILED 8805 * 8806 * Context: 8807 * Kernel context. 8808 */ 8809 int 8810 qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) 8811 { 8812 int ret; 8813 int priority; 8814 uint16_t mb[5]; 8815 8816 if (fcport->port_type != FCT_TARGET || 8817 fcport->loop_id == FC_NO_LOOP_ID) 8818 return QLA_FUNCTION_FAILED; 8819 8820 priority = qla24xx_get_fcp_prio(vha, fcport); 8821 if (priority < 0) 8822 return QLA_FUNCTION_FAILED; 8823 8824 if (IS_P3P_TYPE(vha->hw)) { 8825 fcport->fcp_prio = priority & 0xf; 8826 return QLA_SUCCESS; 8827 } 8828 8829 ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb); 8830 if (ret == QLA_SUCCESS) { 8831 if (fcport->fcp_prio != priority) 8832 ql_dbg(ql_dbg_user, vha, 0x709e, 8833 "Updated FCP_CMND priority - value=%d loop_id=%d " 8834 "port_id=%02x%02x%02x.\n", priority, 8835 fcport->loop_id, fcport->d_id.b.domain, 8836 fcport->d_id.b.area, fcport->d_id.b.al_pa); 8837 fcport->fcp_prio = priority & 0xf; 8838 } else 8839 ql_dbg(ql_dbg_user, vha, 0x704f, 8840 "Unable to update FCP_CMND priority - ret=0x%x for " 8841 "loop_id=%d port_id=%02x%02x%02x.\n", ret, fcport->loop_id, 8842 fcport->d_id.b.domain, fcport->d_id.b.area, 8843 fcport->d_id.b.al_pa); 8844 return ret; 8845 } 8846 8847 /* 8848 * qla24xx_update_all_fcp_prio 8849 * Activates fcp priority for all the logged in ports 8850 * 8851 * Input: 8852 * ha = adapter block pointer. 8853 * 8854 * Return: 8855 * QLA_SUCCESS or QLA_FUNCTION_FAILED 8856 * 8857 * Context: 8858 * Kernel context. 8859 */ 8860 int 8861 qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha) 8862 { 8863 int ret; 8864 fc_port_t *fcport; 8865 8866 ret = QLA_FUNCTION_FAILED; 8867 /* We need to set priority for all logged in ports */ 8868 list_for_each_entry(fcport, &vha->vp_fcports, list) 8869 ret = qla24xx_update_fcport_fcp_prio(vha, fcport); 8870 8871 return ret; 8872 } 8873 8874 struct qla_qpair *qla2xxx_create_qpair(struct scsi_qla_host *vha, int qos, 8875 int vp_idx, bool startqp) 8876 { 8877 int rsp_id = 0; 8878 int req_id = 0; 8879 int i; 8880 struct qla_hw_data *ha = vha->hw; 8881 uint16_t qpair_id = 0; 8882 struct qla_qpair *qpair = NULL; 8883 struct qla_msix_entry *msix; 8884 8885 if (!(ha->fw_attributes & BIT_6) || !ha->flags.msix_enabled) { 8886 ql_log(ql_log_warn, vha, 0x00181, 8887 "FW/Driver is not multi-queue capable.\n"); 8888 return NULL; 8889 } 8890 8891 if (ql2xmqsupport || ql2xnvmeenable) { 8892 qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL); 8893 if (qpair == NULL) { 8894 ql_log(ql_log_warn, vha, 0x0182, 8895 "Failed to allocate memory for queue pair.\n"); 8896 return NULL; 8897 } 8898 8899 qpair->hw = vha->hw; 8900 qpair->vha = vha; 8901 qpair->qp_lock_ptr = &qpair->qp_lock; 8902 spin_lock_init(&qpair->qp_lock); 8903 qpair->use_shadow_reg = IS_SHADOW_REG_CAPABLE(ha) ? 1 : 0; 8904 8905 /* Assign available que pair id */ 8906 mutex_lock(&ha->mq_lock); 8907 qpair_id = find_first_zero_bit(ha->qpair_qid_map, ha->max_qpairs); 8908 if (ha->num_qpairs >= ha->max_qpairs) { 8909 mutex_unlock(&ha->mq_lock); 8910 ql_log(ql_log_warn, vha, 0x0183, 8911 "No resources to create additional q pair.\n"); 8912 goto fail_qid_map; 8913 } 8914 ha->num_qpairs++; 8915 set_bit(qpair_id, ha->qpair_qid_map); 8916 ha->queue_pair_map[qpair_id] = qpair; 8917 qpair->id = qpair_id; 8918 qpair->vp_idx = vp_idx; 8919 qpair->fw_started = ha->flags.fw_started; 8920 INIT_LIST_HEAD(&qpair->hints_list); 8921 qpair->chip_reset = ha->base_qpair->chip_reset; 8922 qpair->enable_class_2 = ha->base_qpair->enable_class_2; 8923 qpair->enable_explicit_conf = 8924 ha->base_qpair->enable_explicit_conf; 8925 8926 for (i = 0; i < ha->msix_count; i++) { 8927 msix = &ha->msix_entries[i]; 8928 if (msix->in_use) 8929 continue; 8930 qpair->msix = msix; 8931 ql_dbg(ql_dbg_multiq, vha, 0xc00f, 8932 "Vector %x selected for qpair\n", msix->vector); 8933 break; 8934 } 8935 if (!qpair->msix) { 8936 ql_log(ql_log_warn, vha, 0x0184, 8937 "Out of MSI-X vectors!.\n"); 8938 goto fail_msix; 8939 } 8940 8941 qpair->msix->in_use = 1; 8942 list_add_tail(&qpair->qp_list_elem, &vha->qp_list); 8943 qpair->pdev = ha->pdev; 8944 if (IS_QLA27XX(ha) || IS_QLA83XX(ha) || IS_QLA28XX(ha)) 8945 qpair->reqq_start_iocbs = qla_83xx_start_iocbs; 8946 8947 mutex_unlock(&ha->mq_lock); 8948 8949 /* Create response queue first */ 8950 rsp_id = qla25xx_create_rsp_que(ha, 0, 0, 0, qpair, startqp); 8951 if (!rsp_id) { 8952 ql_log(ql_log_warn, vha, 0x0185, 8953 "Failed to create response queue.\n"); 8954 goto fail_rsp; 8955 } 8956 8957 qpair->rsp = ha->rsp_q_map[rsp_id]; 8958 8959 /* Create request queue */ 8960 req_id = qla25xx_create_req_que(ha, 0, vp_idx, 0, rsp_id, qos, 8961 startqp); 8962 if (!req_id) { 8963 ql_log(ql_log_warn, vha, 0x0186, 8964 "Failed to create request queue.\n"); 8965 goto fail_req; 8966 } 8967 8968 qpair->req = ha->req_q_map[req_id]; 8969 qpair->rsp->req = qpair->req; 8970 qpair->rsp->qpair = qpair; 8971 /* init qpair to this cpu. Will adjust at run time. */ 8972 qla_cpu_update(qpair, smp_processor_id()); 8973 8974 if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) { 8975 if (ha->fw_attributes & BIT_4) 8976 qpair->difdix_supported = 1; 8977 } 8978 8979 qpair->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep); 8980 if (!qpair->srb_mempool) { 8981 ql_log(ql_log_warn, vha, 0xd036, 8982 "Failed to create srb mempool for qpair %d\n", 8983 qpair->id); 8984 goto fail_mempool; 8985 } 8986 8987 /* Mark as online */ 8988 qpair->online = 1; 8989 8990 if (!vha->flags.qpairs_available) 8991 vha->flags.qpairs_available = 1; 8992 8993 ql_dbg(ql_dbg_multiq, vha, 0xc00d, 8994 "Request/Response queue pair created, id %d\n", 8995 qpair->id); 8996 ql_dbg(ql_dbg_init, vha, 0x0187, 8997 "Request/Response queue pair created, id %d\n", 8998 qpair->id); 8999 } 9000 return qpair; 9001 9002 fail_mempool: 9003 fail_req: 9004 qla25xx_delete_rsp_que(vha, qpair->rsp); 9005 fail_rsp: 9006 mutex_lock(&ha->mq_lock); 9007 qpair->msix->in_use = 0; 9008 list_del(&qpair->qp_list_elem); 9009 if (list_empty(&vha->qp_list)) 9010 vha->flags.qpairs_available = 0; 9011 fail_msix: 9012 ha->queue_pair_map[qpair_id] = NULL; 9013 clear_bit(qpair_id, ha->qpair_qid_map); 9014 ha->num_qpairs--; 9015 mutex_unlock(&ha->mq_lock); 9016 fail_qid_map: 9017 kfree(qpair); 9018 return NULL; 9019 } 9020 9021 int qla2xxx_delete_qpair(struct scsi_qla_host *vha, struct qla_qpair *qpair) 9022 { 9023 int ret = QLA_FUNCTION_FAILED; 9024 struct qla_hw_data *ha = qpair->hw; 9025 9026 qpair->delete_in_progress = 1; 9027 9028 ret = qla25xx_delete_req_que(vha, qpair->req); 9029 if (ret != QLA_SUCCESS) 9030 goto fail; 9031 9032 ret = qla25xx_delete_rsp_que(vha, qpair->rsp); 9033 if (ret != QLA_SUCCESS) 9034 goto fail; 9035 9036 mutex_lock(&ha->mq_lock); 9037 ha->queue_pair_map[qpair->id] = NULL; 9038 clear_bit(qpair->id, ha->qpair_qid_map); 9039 ha->num_qpairs--; 9040 list_del(&qpair->qp_list_elem); 9041 if (list_empty(&vha->qp_list)) { 9042 vha->flags.qpairs_available = 0; 9043 vha->flags.qpairs_req_created = 0; 9044 vha->flags.qpairs_rsp_created = 0; 9045 } 9046 mempool_destroy(qpair->srb_mempool); 9047 kfree(qpair); 9048 mutex_unlock(&ha->mq_lock); 9049 9050 return QLA_SUCCESS; 9051 fail: 9052 return ret; 9053 } 9054