1 /* 2 * QLogic Fibre Channel HBA Driver 3 * Copyright (c) 2003-2014 QLogic Corporation 4 * 5 * See LICENSE.qla2xxx for copyright and licensing details. 6 */ 7 #include "qla_def.h" 8 #include "qla_gbl.h" 9 10 #include <linux/delay.h> 11 #include <linux/slab.h> 12 #include <linux/vmalloc.h> 13 14 #include "qla_devtbl.h" 15 16 #ifdef CONFIG_SPARC 17 #include <asm/prom.h> 18 #endif 19 20 #include <target/target_core_base.h> 21 #include "qla_target.h" 22 23 /* 24 * QLogic ISP2x00 Hardware Support Function Prototypes. 25 */ 26 static int qla2x00_isp_firmware(scsi_qla_host_t *); 27 static int qla2x00_setup_chip(scsi_qla_host_t *); 28 static int qla2x00_fw_ready(scsi_qla_host_t *); 29 static int qla2x00_configure_hba(scsi_qla_host_t *); 30 static int qla2x00_configure_loop(scsi_qla_host_t *); 31 static int qla2x00_configure_local_loop(scsi_qla_host_t *); 32 static int qla2x00_configure_fabric(scsi_qla_host_t *); 33 static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *); 34 static int qla2x00_restart_isp(scsi_qla_host_t *); 35 36 static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *); 37 static int qla84xx_init_chip(scsi_qla_host_t *); 38 static int qla25xx_init_queues(struct qla_hw_data *); 39 static int qla24xx_post_prli_work(struct scsi_qla_host*, fc_port_t *); 40 static void qla24xx_handle_plogi_done_event(struct scsi_qla_host *, 41 struct event_arg *); 42 static void qla24xx_handle_prli_done_event(struct scsi_qla_host *, 43 struct event_arg *); 44 static void __qla24xx_handle_gpdb_event(scsi_qla_host_t *, struct event_arg *); 45 46 /* SRB Extensions ---------------------------------------------------------- */ 47 48 void 49 qla2x00_sp_timeout(struct timer_list *t) 50 { 51 srb_t *sp = from_timer(sp, t, u.iocb_cmd.timer); 52 struct srb_iocb *iocb; 53 struct req_que *req; 54 unsigned long flags; 55 struct qla_hw_data *ha = sp->vha->hw; 56 57 WARN_ON_ONCE(irqs_disabled()); 58 spin_lock_irqsave(&ha->hardware_lock, flags); 59 req = sp->qpair->req; 60 req->outstanding_cmds[sp->handle] = NULL; 61 iocb = &sp->u.iocb_cmd; 62 spin_unlock_irqrestore(&ha->hardware_lock, flags); 63 iocb->timeout(sp); 64 } 65 66 void 67 qla2x00_sp_free(void *ptr) 68 { 69 srb_t *sp = ptr; 70 struct srb_iocb *iocb = &sp->u.iocb_cmd; 71 72 del_timer(&iocb->timer); 73 qla2x00_rel_sp(sp); 74 } 75 76 /* Asynchronous Login/Logout Routines -------------------------------------- */ 77 78 unsigned long 79 qla2x00_get_async_timeout(struct scsi_qla_host *vha) 80 { 81 unsigned long tmo; 82 struct qla_hw_data *ha = vha->hw; 83 84 /* Firmware should use switch negotiated r_a_tov for timeout. */ 85 tmo = ha->r_a_tov / 10 * 2; 86 if (IS_QLAFX00(ha)) { 87 tmo = FX00_DEF_RATOV * 2; 88 } else if (!IS_FWI2_CAPABLE(ha)) { 89 /* 90 * Except for earlier ISPs where the timeout is seeded from the 91 * initialization control block. 92 */ 93 tmo = ha->login_timeout; 94 } 95 return tmo; 96 } 97 98 void 99 qla2x00_async_iocb_timeout(void *data) 100 { 101 srb_t *sp = data; 102 fc_port_t *fcport = sp->fcport; 103 struct srb_iocb *lio = &sp->u.iocb_cmd; 104 int rc, h; 105 unsigned long flags; 106 107 if (fcport) { 108 ql_dbg(ql_dbg_disc, fcport->vha, 0x2071, 109 "Async-%s timeout - hdl=%x portid=%06x %8phC.\n", 110 sp->name, sp->handle, fcport->d_id.b24, fcport->port_name); 111 112 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 113 } else { 114 pr_info("Async-%s timeout - hdl=%x.\n", 115 sp->name, sp->handle); 116 } 117 118 switch (sp->type) { 119 case SRB_LOGIN_CMD: 120 rc = qla24xx_async_abort_cmd(sp, false); 121 if (rc) { 122 /* Retry as needed. */ 123 lio->u.logio.data[0] = MBS_COMMAND_ERROR; 124 lio->u.logio.data[1] = 125 lio->u.logio.flags & SRB_LOGIN_RETRIED ? 126 QLA_LOGIO_LOGIN_RETRIED : 0; 127 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags); 128 for (h = 1; h < sp->qpair->req->num_outstanding_cmds; 129 h++) { 130 if (sp->qpair->req->outstanding_cmds[h] == 131 sp) { 132 sp->qpair->req->outstanding_cmds[h] = 133 NULL; 134 break; 135 } 136 } 137 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags); 138 sp->done(sp, QLA_FUNCTION_TIMEOUT); 139 } 140 break; 141 case SRB_LOGOUT_CMD: 142 case SRB_CT_PTHRU_CMD: 143 case SRB_MB_IOCB: 144 case SRB_NACK_PLOGI: 145 case SRB_NACK_PRLI: 146 case SRB_NACK_LOGO: 147 case SRB_CTRL_VP: 148 rc = qla24xx_async_abort_cmd(sp, false); 149 if (rc) { 150 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags); 151 for (h = 1; h < sp->qpair->req->num_outstanding_cmds; 152 h++) { 153 if (sp->qpair->req->outstanding_cmds[h] == 154 sp) { 155 sp->qpair->req->outstanding_cmds[h] = 156 NULL; 157 break; 158 } 159 } 160 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags); 161 sp->done(sp, QLA_FUNCTION_TIMEOUT); 162 } 163 break; 164 } 165 } 166 167 static void 168 qla2x00_async_login_sp_done(void *ptr, int res) 169 { 170 srb_t *sp = ptr; 171 struct scsi_qla_host *vha = sp->vha; 172 struct srb_iocb *lio = &sp->u.iocb_cmd; 173 struct event_arg ea; 174 175 ql_dbg(ql_dbg_disc, vha, 0x20dd, 176 "%s %8phC res %d \n", __func__, sp->fcport->port_name, res); 177 178 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 179 180 if (!test_bit(UNLOADING, &vha->dpc_flags)) { 181 memset(&ea, 0, sizeof(ea)); 182 ea.event = FCME_PLOGI_DONE; 183 ea.fcport = sp->fcport; 184 ea.data[0] = lio->u.logio.data[0]; 185 ea.data[1] = lio->u.logio.data[1]; 186 ea.iop[0] = lio->u.logio.iop[0]; 187 ea.iop[1] = lio->u.logio.iop[1]; 188 ea.sp = sp; 189 qla2x00_fcport_event_handler(vha, &ea); 190 } 191 192 sp->free(sp); 193 } 194 195 static inline bool 196 fcport_is_smaller(fc_port_t *fcport) 197 { 198 if (wwn_to_u64(fcport->port_name) < 199 wwn_to_u64(fcport->vha->port_name)) 200 return true; 201 else 202 return false; 203 } 204 205 static inline bool 206 fcport_is_bigger(fc_port_t *fcport) 207 { 208 return !fcport_is_smaller(fcport); 209 } 210 211 int 212 qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport, 213 uint16_t *data) 214 { 215 srb_t *sp; 216 struct srb_iocb *lio; 217 int rval = QLA_FUNCTION_FAILED; 218 219 if (!vha->flags.online) 220 goto done; 221 222 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 223 if (!sp) 224 goto done; 225 226 fcport->flags |= FCF_ASYNC_SENT; 227 fcport->logout_completed = 0; 228 229 fcport->disc_state = DSC_LOGIN_PEND; 230 sp->type = SRB_LOGIN_CMD; 231 sp->name = "login"; 232 sp->gen1 = fcport->rscn_gen; 233 sp->gen2 = fcport->login_gen; 234 235 lio = &sp->u.iocb_cmd; 236 lio->timeout = qla2x00_async_iocb_timeout; 237 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 238 239 sp->done = qla2x00_async_login_sp_done; 240 if (N2N_TOPO(fcport->vha->hw) && fcport_is_bigger(fcport)) { 241 lio->u.logio.flags |= SRB_LOGIN_PRLI_ONLY; 242 } else { 243 lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI; 244 245 if (fcport->fc4f_nvme) 246 lio->u.logio.flags |= SRB_LOGIN_SKIP_PRLI; 247 248 } 249 250 ql_dbg(ql_dbg_disc, vha, 0x2072, 251 "Async-login - %8phC hdl=%x, loopid=%x portid=%02x%02x%02x " 252 "retries=%d.\n", fcport->port_name, sp->handle, fcport->loop_id, 253 fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa, 254 fcport->login_retry); 255 256 rval = qla2x00_start_sp(sp); 257 if (rval != QLA_SUCCESS) { 258 fcport->flags |= FCF_LOGIN_NEEDED; 259 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 260 goto done_free_sp; 261 } 262 263 return rval; 264 265 done_free_sp: 266 sp->free(sp); 267 fcport->flags &= ~FCF_ASYNC_SENT; 268 done: 269 fcport->flags &= ~FCF_ASYNC_ACTIVE; 270 return rval; 271 } 272 273 static void 274 qla2x00_async_logout_sp_done(void *ptr, int res) 275 { 276 srb_t *sp = ptr; 277 278 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 279 sp->fcport->login_gen++; 280 qlt_logo_completion_handler(sp->fcport, res); 281 sp->free(sp); 282 } 283 284 int 285 qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport) 286 { 287 srb_t *sp; 288 struct srb_iocb *lio; 289 int rval = QLA_FUNCTION_FAILED; 290 291 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT)) 292 return rval; 293 294 fcport->flags |= FCF_ASYNC_SENT; 295 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 296 if (!sp) 297 goto done; 298 299 sp->type = SRB_LOGOUT_CMD; 300 sp->name = "logout"; 301 302 lio = &sp->u.iocb_cmd; 303 lio->timeout = qla2x00_async_iocb_timeout; 304 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 305 306 sp->done = qla2x00_async_logout_sp_done; 307 308 ql_dbg(ql_dbg_disc, vha, 0x2070, 309 "Async-logout - hdl=%x loop-id=%x portid=%02x%02x%02x %8phC.\n", 310 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 311 fcport->d_id.b.area, fcport->d_id.b.al_pa, 312 fcport->port_name); 313 314 rval = qla2x00_start_sp(sp); 315 if (rval != QLA_SUCCESS) 316 goto done_free_sp; 317 return rval; 318 319 done_free_sp: 320 sp->free(sp); 321 done: 322 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 323 return rval; 324 } 325 326 void 327 qla2x00_async_prlo_done(struct scsi_qla_host *vha, fc_port_t *fcport, 328 uint16_t *data) 329 { 330 fcport->flags &= ~FCF_ASYNC_ACTIVE; 331 /* Don't re-login in target mode */ 332 if (!fcport->tgt_session) 333 qla2x00_mark_device_lost(vha, fcport, 1, 0); 334 qlt_logo_completion_handler(fcport, data[0]); 335 } 336 337 static void 338 qla2x00_async_prlo_sp_done(void *s, int res) 339 { 340 srb_t *sp = (srb_t *)s; 341 struct srb_iocb *lio = &sp->u.iocb_cmd; 342 struct scsi_qla_host *vha = sp->vha; 343 344 sp->fcport->flags &= ~FCF_ASYNC_ACTIVE; 345 if (!test_bit(UNLOADING, &vha->dpc_flags)) 346 qla2x00_post_async_prlo_done_work(sp->fcport->vha, sp->fcport, 347 lio->u.logio.data); 348 sp->free(sp); 349 } 350 351 int 352 qla2x00_async_prlo(struct scsi_qla_host *vha, fc_port_t *fcport) 353 { 354 srb_t *sp; 355 struct srb_iocb *lio; 356 int rval; 357 358 rval = QLA_FUNCTION_FAILED; 359 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 360 if (!sp) 361 goto done; 362 363 sp->type = SRB_PRLO_CMD; 364 sp->name = "prlo"; 365 366 lio = &sp->u.iocb_cmd; 367 lio->timeout = qla2x00_async_iocb_timeout; 368 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 369 370 sp->done = qla2x00_async_prlo_sp_done; 371 rval = qla2x00_start_sp(sp); 372 if (rval != QLA_SUCCESS) 373 goto done_free_sp; 374 375 ql_dbg(ql_dbg_disc, vha, 0x2070, 376 "Async-prlo - hdl=%x loop-id=%x portid=%02x%02x%02x.\n", 377 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 378 fcport->d_id.b.area, fcport->d_id.b.al_pa); 379 return rval; 380 381 done_free_sp: 382 sp->free(sp); 383 done: 384 fcport->flags &= ~FCF_ASYNC_ACTIVE; 385 return rval; 386 } 387 388 static 389 void qla24xx_handle_adisc_event(scsi_qla_host_t *vha, struct event_arg *ea) 390 { 391 struct fc_port *fcport = ea->fcport; 392 393 ql_dbg(ql_dbg_disc, vha, 0x20d2, 394 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d lid %d\n", 395 __func__, fcport->port_name, fcport->disc_state, 396 fcport->fw_login_state, ea->rc, fcport->login_gen, ea->sp->gen2, 397 fcport->rscn_gen, ea->sp->gen1, fcport->loop_id); 398 399 if (ea->data[0] != MBS_COMMAND_COMPLETE) { 400 ql_dbg(ql_dbg_disc, vha, 0x2066, 401 "%s %8phC: adisc fail: post delete\n", 402 __func__, ea->fcport->port_name); 403 /* deleted = 0 & logout_on_delete = force fw cleanup */ 404 fcport->deleted = 0; 405 fcport->logout_on_delete = 1; 406 qlt_schedule_sess_for_deletion(ea->fcport); 407 return; 408 } 409 410 if (ea->fcport->disc_state == DSC_DELETE_PEND) 411 return; 412 413 if (ea->sp->gen2 != ea->fcport->login_gen) { 414 /* target side must have changed it. */ 415 ql_dbg(ql_dbg_disc, vha, 0x20d3, 416 "%s %8phC generation changed\n", 417 __func__, ea->fcport->port_name); 418 return; 419 } else if (ea->sp->gen1 != ea->fcport->rscn_gen) { 420 qla_rscn_replay(fcport); 421 qlt_schedule_sess_for_deletion(fcport); 422 return; 423 } 424 425 __qla24xx_handle_gpdb_event(vha, ea); 426 } 427 428 static int qla_post_els_plogi_work(struct scsi_qla_host *vha, fc_port_t *fcport) 429 { 430 struct qla_work_evt *e; 431 432 e = qla2x00_alloc_work(vha, QLA_EVT_ELS_PLOGI); 433 if (!e) 434 return QLA_FUNCTION_FAILED; 435 436 e->u.fcport.fcport = fcport; 437 fcport->flags |= FCF_ASYNC_ACTIVE; 438 return qla2x00_post_work(vha, e); 439 } 440 441 static void 442 qla2x00_async_adisc_sp_done(void *ptr, int res) 443 { 444 srb_t *sp = ptr; 445 struct scsi_qla_host *vha = sp->vha; 446 struct event_arg ea; 447 struct srb_iocb *lio = &sp->u.iocb_cmd; 448 449 ql_dbg(ql_dbg_disc, vha, 0x2066, 450 "Async done-%s res %x %8phC\n", 451 sp->name, res, sp->fcport->port_name); 452 453 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 454 455 memset(&ea, 0, sizeof(ea)); 456 ea.event = FCME_ADISC_DONE; 457 ea.rc = res; 458 ea.data[0] = lio->u.logio.data[0]; 459 ea.data[1] = lio->u.logio.data[1]; 460 ea.iop[0] = lio->u.logio.iop[0]; 461 ea.iop[1] = lio->u.logio.iop[1]; 462 ea.fcport = sp->fcport; 463 ea.sp = sp; 464 465 qla2x00_fcport_event_handler(vha, &ea); 466 467 sp->free(sp); 468 } 469 470 int 471 qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport, 472 uint16_t *data) 473 { 474 srb_t *sp; 475 struct srb_iocb *lio; 476 int rval; 477 478 rval = QLA_FUNCTION_FAILED; 479 fcport->flags |= FCF_ASYNC_SENT; 480 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 481 if (!sp) 482 goto done; 483 484 sp->type = SRB_ADISC_CMD; 485 sp->name = "adisc"; 486 487 lio = &sp->u.iocb_cmd; 488 lio->timeout = qla2x00_async_iocb_timeout; 489 sp->gen1 = fcport->rscn_gen; 490 sp->gen2 = fcport->login_gen; 491 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 492 493 sp->done = qla2x00_async_adisc_sp_done; 494 if (data[1] & QLA_LOGIO_LOGIN_RETRIED) 495 lio->u.logio.flags |= SRB_LOGIN_RETRIED; 496 497 ql_dbg(ql_dbg_disc, vha, 0x206f, 498 "Async-adisc - hdl=%x loopid=%x portid=%06x %8phC.\n", 499 sp->handle, fcport->loop_id, fcport->d_id.b24, fcport->port_name); 500 501 rval = qla2x00_start_sp(sp); 502 if (rval != QLA_SUCCESS) 503 goto done_free_sp; 504 505 return rval; 506 507 done_free_sp: 508 sp->free(sp); 509 done: 510 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 511 qla2x00_post_async_adisc_work(vha, fcport, data); 512 return rval; 513 } 514 515 static void qla24xx_handle_gnl_done_event(scsi_qla_host_t *vha, 516 struct event_arg *ea) 517 { 518 fc_port_t *fcport, *conflict_fcport; 519 struct get_name_list_extended *e; 520 u16 i, n, found = 0, loop_id; 521 port_id_t id; 522 u64 wwn; 523 u16 data[2]; 524 u8 current_login_state; 525 526 fcport = ea->fcport; 527 ql_dbg(ql_dbg_disc, vha, 0xffff, 528 "%s %8phC DS %d LS rc %d %d login %d|%d rscn %d|%d lid %d\n", 529 __func__, fcport->port_name, fcport->disc_state, 530 fcport->fw_login_state, ea->rc, 531 fcport->login_gen, fcport->last_login_gen, 532 fcport->rscn_gen, fcport->last_rscn_gen, vha->loop_id); 533 534 if (fcport->disc_state == DSC_DELETE_PEND) 535 return; 536 537 if (ea->rc) { /* rval */ 538 if (fcport->login_retry == 0) { 539 ql_dbg(ql_dbg_disc, vha, 0x20de, 540 "GNL failed Port login retry %8phN, retry cnt=%d.\n", 541 fcport->port_name, fcport->login_retry); 542 } 543 return; 544 } 545 546 if (fcport->last_rscn_gen != fcport->rscn_gen) { 547 qla_rscn_replay(fcport); 548 qlt_schedule_sess_for_deletion(fcport); 549 return; 550 } else if (fcport->last_login_gen != fcport->login_gen) { 551 ql_dbg(ql_dbg_disc, vha, 0x20e0, 552 "%s %8phC login gen changed\n", 553 __func__, fcport->port_name); 554 return; 555 } 556 557 n = ea->data[0] / sizeof(struct get_name_list_extended); 558 559 ql_dbg(ql_dbg_disc, vha, 0x20e1, 560 "%s %d %8phC n %d %02x%02x%02x lid %d \n", 561 __func__, __LINE__, fcport->port_name, n, 562 fcport->d_id.b.domain, fcport->d_id.b.area, 563 fcport->d_id.b.al_pa, fcport->loop_id); 564 565 for (i = 0; i < n; i++) { 566 e = &vha->gnl.l[i]; 567 wwn = wwn_to_u64(e->port_name); 568 id.b.domain = e->port_id[2]; 569 id.b.area = e->port_id[1]; 570 id.b.al_pa = e->port_id[0]; 571 id.b.rsvd_1 = 0; 572 573 if (memcmp((u8 *)&wwn, fcport->port_name, WWN_SIZE)) 574 continue; 575 576 if (IS_SW_RESV_ADDR(id)) 577 continue; 578 579 found = 1; 580 581 loop_id = le16_to_cpu(e->nport_handle); 582 loop_id = (loop_id & 0x7fff); 583 if (fcport->fc4f_nvme) 584 current_login_state = e->current_login_state >> 4; 585 else 586 current_login_state = e->current_login_state & 0xf; 587 588 589 ql_dbg(ql_dbg_disc, vha, 0x20e2, 590 "%s found %8phC CLS [%x|%x] nvme %d ID[%02x%02x%02x|%02x%02x%02x] lid[%d|%d]\n", 591 __func__, fcport->port_name, 592 e->current_login_state, fcport->fw_login_state, 593 fcport->fc4f_nvme, id.b.domain, id.b.area, id.b.al_pa, 594 fcport->d_id.b.domain, fcport->d_id.b.area, 595 fcport->d_id.b.al_pa, loop_id, fcport->loop_id); 596 597 switch (fcport->disc_state) { 598 case DSC_DELETE_PEND: 599 case DSC_DELETED: 600 break; 601 default: 602 if ((id.b24 != fcport->d_id.b24 && 603 fcport->d_id.b24) || 604 (fcport->loop_id != FC_NO_LOOP_ID && 605 fcport->loop_id != loop_id)) { 606 ql_dbg(ql_dbg_disc, vha, 0x20e3, 607 "%s %d %8phC post del sess\n", 608 __func__, __LINE__, fcport->port_name); 609 qlt_schedule_sess_for_deletion(fcport); 610 return; 611 } 612 break; 613 } 614 615 fcport->loop_id = loop_id; 616 617 wwn = wwn_to_u64(fcport->port_name); 618 qlt_find_sess_invalidate_other(vha, wwn, 619 id, loop_id, &conflict_fcport); 620 621 if (conflict_fcport) { 622 /* 623 * Another share fcport share the same loop_id & 624 * nport id. Conflict fcport needs to finish 625 * cleanup before this fcport can proceed to login. 626 */ 627 conflict_fcport->conflict = fcport; 628 fcport->login_pause = 1; 629 } 630 631 switch (vha->hw->current_topology) { 632 default: 633 switch (current_login_state) { 634 case DSC_LS_PRLI_COMP: 635 ql_dbg(ql_dbg_disc + ql_dbg_verbose, 636 vha, 0x20e4, "%s %d %8phC post gpdb\n", 637 __func__, __LINE__, fcport->port_name); 638 639 if ((e->prli_svc_param_word_3[0] & BIT_4) == 0) 640 fcport->port_type = FCT_INITIATOR; 641 else 642 fcport->port_type = FCT_TARGET; 643 data[0] = data[1] = 0; 644 qla2x00_post_async_adisc_work(vha, fcport, 645 data); 646 break; 647 case DSC_LS_PORT_UNAVAIL: 648 default: 649 if (fcport->loop_id != FC_NO_LOOP_ID) 650 qla2x00_clear_loop_id(fcport); 651 652 fcport->loop_id = loop_id; 653 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL; 654 qla24xx_fcport_handle_login(vha, fcport); 655 break; 656 } 657 break; 658 case ISP_CFG_N: 659 fcport->fw_login_state = current_login_state; 660 fcport->d_id = id; 661 switch (current_login_state) { 662 case DSC_LS_PRLI_COMP: 663 if ((e->prli_svc_param_word_3[0] & BIT_4) == 0) 664 fcport->port_type = FCT_INITIATOR; 665 else 666 fcport->port_type = FCT_TARGET; 667 668 data[0] = data[1] = 0; 669 qla2x00_post_async_adisc_work(vha, fcport, 670 data); 671 break; 672 case DSC_LS_PLOGI_COMP: 673 if (fcport_is_bigger(fcport)) { 674 /* local adapter is smaller */ 675 if (fcport->loop_id != FC_NO_LOOP_ID) 676 qla2x00_clear_loop_id(fcport); 677 678 fcport->loop_id = loop_id; 679 qla24xx_fcport_handle_login(vha, 680 fcport); 681 break; 682 } 683 /* fall through */ 684 default: 685 if (fcport_is_smaller(fcport)) { 686 /* local adapter is bigger */ 687 if (fcport->loop_id != FC_NO_LOOP_ID) 688 qla2x00_clear_loop_id(fcport); 689 690 fcport->loop_id = loop_id; 691 qla24xx_fcport_handle_login(vha, 692 fcport); 693 } 694 break; 695 } 696 break; 697 } /* switch (ha->current_topology) */ 698 } 699 700 if (!found) { 701 switch (vha->hw->current_topology) { 702 case ISP_CFG_F: 703 case ISP_CFG_FL: 704 for (i = 0; i < n; i++) { 705 e = &vha->gnl.l[i]; 706 id.b.domain = e->port_id[0]; 707 id.b.area = e->port_id[1]; 708 id.b.al_pa = e->port_id[2]; 709 id.b.rsvd_1 = 0; 710 loop_id = le16_to_cpu(e->nport_handle); 711 712 if (fcport->d_id.b24 == id.b24) { 713 conflict_fcport = 714 qla2x00_find_fcport_by_wwpn(vha, 715 e->port_name, 0); 716 if (conflict_fcport) { 717 ql_dbg(ql_dbg_disc + ql_dbg_verbose, 718 vha, 0x20e5, 719 "%s %d %8phC post del sess\n", 720 __func__, __LINE__, 721 conflict_fcport->port_name); 722 qlt_schedule_sess_for_deletion 723 (conflict_fcport); 724 } 725 } 726 /* 727 * FW already picked this loop id for 728 * another fcport 729 */ 730 if (fcport->loop_id == loop_id) 731 fcport->loop_id = FC_NO_LOOP_ID; 732 } 733 qla24xx_fcport_handle_login(vha, fcport); 734 break; 735 case ISP_CFG_N: 736 fcport->disc_state = DSC_DELETED; 737 if (time_after_eq(jiffies, fcport->dm_login_expire)) { 738 if (fcport->n2n_link_reset_cnt < 2) { 739 fcport->n2n_link_reset_cnt++; 740 /* 741 * remote port is not sending PLOGI. 742 * Reset link to kick start his state 743 * machine 744 */ 745 set_bit(N2N_LINK_RESET, 746 &vha->dpc_flags); 747 } else { 748 if (fcport->n2n_chip_reset < 1) { 749 ql_log(ql_log_info, vha, 0x705d, 750 "Chip reset to bring laser down"); 751 set_bit(ISP_ABORT_NEEDED, 752 &vha->dpc_flags); 753 fcport->n2n_chip_reset++; 754 } else { 755 ql_log(ql_log_info, vha, 0x705d, 756 "Remote port %8ph is not coming back\n", 757 fcport->port_name); 758 fcport->scan_state = 0; 759 } 760 } 761 qla2xxx_wake_dpc(vha); 762 } else { 763 /* 764 * report port suppose to do PLOGI. Give him 765 * more time. FW will catch it. 766 */ 767 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 768 } 769 break; 770 default: 771 break; 772 } 773 } 774 } /* gnl_event */ 775 776 static void 777 qla24xx_async_gnl_sp_done(void *s, int res) 778 { 779 struct srb *sp = s; 780 struct scsi_qla_host *vha = sp->vha; 781 unsigned long flags; 782 struct fc_port *fcport = NULL, *tf; 783 u16 i, n = 0, loop_id; 784 struct event_arg ea; 785 struct get_name_list_extended *e; 786 u64 wwn; 787 struct list_head h; 788 bool found = false; 789 790 ql_dbg(ql_dbg_disc, vha, 0x20e7, 791 "Async done-%s res %x mb[1]=%x mb[2]=%x \n", 792 sp->name, res, sp->u.iocb_cmd.u.mbx.in_mb[1], 793 sp->u.iocb_cmd.u.mbx.in_mb[2]); 794 795 if (res == QLA_FUNCTION_TIMEOUT) 796 return; 797 798 sp->fcport->flags &= ~(FCF_ASYNC_SENT|FCF_ASYNC_ACTIVE); 799 memset(&ea, 0, sizeof(ea)); 800 ea.sp = sp; 801 ea.rc = res; 802 ea.event = FCME_GNL_DONE; 803 804 if (sp->u.iocb_cmd.u.mbx.in_mb[1] >= 805 sizeof(struct get_name_list_extended)) { 806 n = sp->u.iocb_cmd.u.mbx.in_mb[1] / 807 sizeof(struct get_name_list_extended); 808 ea.data[0] = sp->u.iocb_cmd.u.mbx.in_mb[1]; /* amnt xfered */ 809 } 810 811 for (i = 0; i < n; i++) { 812 e = &vha->gnl.l[i]; 813 loop_id = le16_to_cpu(e->nport_handle); 814 /* mask out reserve bit */ 815 loop_id = (loop_id & 0x7fff); 816 set_bit(loop_id, vha->hw->loop_id_map); 817 wwn = wwn_to_u64(e->port_name); 818 819 ql_dbg(ql_dbg_disc + ql_dbg_verbose, vha, 0x20e8, 820 "%s %8phC %02x:%02x:%02x state %d/%d lid %x \n", 821 __func__, (void *)&wwn, e->port_id[2], e->port_id[1], 822 e->port_id[0], e->current_login_state, e->last_login_state, 823 (loop_id & 0x7fff)); 824 } 825 826 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 827 828 INIT_LIST_HEAD(&h); 829 fcport = tf = NULL; 830 if (!list_empty(&vha->gnl.fcports)) 831 list_splice_init(&vha->gnl.fcports, &h); 832 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 833 834 list_for_each_entry_safe(fcport, tf, &h, gnl_entry) { 835 list_del_init(&fcport->gnl_entry); 836 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 837 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 838 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 839 ea.fcport = fcport; 840 841 qla2x00_fcport_event_handler(vha, &ea); 842 } 843 844 /* create new fcport if fw has knowledge of new sessions */ 845 for (i = 0; i < n; i++) { 846 port_id_t id; 847 u64 wwnn; 848 849 e = &vha->gnl.l[i]; 850 wwn = wwn_to_u64(e->port_name); 851 852 found = false; 853 list_for_each_entry_safe(fcport, tf, &vha->vp_fcports, list) { 854 if (!memcmp((u8 *)&wwn, fcport->port_name, 855 WWN_SIZE)) { 856 found = true; 857 break; 858 } 859 } 860 861 id.b.domain = e->port_id[2]; 862 id.b.area = e->port_id[1]; 863 id.b.al_pa = e->port_id[0]; 864 id.b.rsvd_1 = 0; 865 866 if (!found && wwn && !IS_SW_RESV_ADDR(id)) { 867 ql_dbg(ql_dbg_disc, vha, 0x2065, 868 "%s %d %8phC %06x post new sess\n", 869 __func__, __LINE__, (u8 *)&wwn, id.b24); 870 wwnn = wwn_to_u64(e->node_name); 871 qla24xx_post_newsess_work(vha, &id, (u8 *)&wwn, 872 (u8 *)&wwnn, NULL, FC4_TYPE_UNKNOWN); 873 } 874 } 875 876 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 877 vha->gnl.sent = 0; 878 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 879 880 sp->free(sp); 881 } 882 883 int qla24xx_async_gnl(struct scsi_qla_host *vha, fc_port_t *fcport) 884 { 885 srb_t *sp; 886 struct srb_iocb *mbx; 887 int rval = QLA_FUNCTION_FAILED; 888 unsigned long flags; 889 u16 *mb; 890 891 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT)) 892 return rval; 893 894 ql_dbg(ql_dbg_disc, vha, 0x20d9, 895 "Async-gnlist WWPN %8phC \n", fcport->port_name); 896 897 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 898 fcport->flags |= FCF_ASYNC_SENT; 899 fcport->disc_state = DSC_GNL; 900 fcport->last_rscn_gen = fcport->rscn_gen; 901 fcport->last_login_gen = fcport->login_gen; 902 903 list_add_tail(&fcport->gnl_entry, &vha->gnl.fcports); 904 if (vha->gnl.sent) { 905 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 906 return QLA_SUCCESS; 907 } 908 vha->gnl.sent = 1; 909 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 910 911 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 912 if (!sp) 913 goto done; 914 915 sp->type = SRB_MB_IOCB; 916 sp->name = "gnlist"; 917 sp->gen1 = fcport->rscn_gen; 918 sp->gen2 = fcport->login_gen; 919 920 mbx = &sp->u.iocb_cmd; 921 mbx->timeout = qla2x00_async_iocb_timeout; 922 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)+2); 923 924 mb = sp->u.iocb_cmd.u.mbx.out_mb; 925 mb[0] = MBC_PORT_NODE_NAME_LIST; 926 mb[1] = BIT_2 | BIT_3; 927 mb[2] = MSW(vha->gnl.ldma); 928 mb[3] = LSW(vha->gnl.ldma); 929 mb[6] = MSW(MSD(vha->gnl.ldma)); 930 mb[7] = LSW(MSD(vha->gnl.ldma)); 931 mb[8] = vha->gnl.size; 932 mb[9] = vha->vp_idx; 933 934 sp->done = qla24xx_async_gnl_sp_done; 935 936 rval = qla2x00_start_sp(sp); 937 if (rval != QLA_SUCCESS) 938 goto done_free_sp; 939 940 ql_dbg(ql_dbg_disc, vha, 0x20da, 941 "Async-%s - OUT WWPN %8phC hndl %x\n", 942 sp->name, fcport->port_name, sp->handle); 943 944 return rval; 945 946 done_free_sp: 947 sp->free(sp); 948 fcport->flags &= ~FCF_ASYNC_SENT; 949 done: 950 return rval; 951 } 952 953 int qla24xx_post_gnl_work(struct scsi_qla_host *vha, fc_port_t *fcport) 954 { 955 struct qla_work_evt *e; 956 957 e = qla2x00_alloc_work(vha, QLA_EVT_GNL); 958 if (!e) 959 return QLA_FUNCTION_FAILED; 960 961 e->u.fcport.fcport = fcport; 962 fcport->flags |= FCF_ASYNC_ACTIVE; 963 return qla2x00_post_work(vha, e); 964 } 965 966 static 967 void qla24xx_async_gpdb_sp_done(void *s, int res) 968 { 969 struct srb *sp = s; 970 struct scsi_qla_host *vha = sp->vha; 971 struct qla_hw_data *ha = vha->hw; 972 fc_port_t *fcport = sp->fcport; 973 u16 *mb = sp->u.iocb_cmd.u.mbx.in_mb; 974 struct event_arg ea; 975 976 ql_dbg(ql_dbg_disc, vha, 0x20db, 977 "Async done-%s res %x, WWPN %8phC mb[1]=%x mb[2]=%x \n", 978 sp->name, res, fcport->port_name, mb[1], mb[2]); 979 980 if (res == QLA_FUNCTION_TIMEOUT) { 981 dma_pool_free(sp->vha->hw->s_dma_pool, sp->u.iocb_cmd.u.mbx.in, 982 sp->u.iocb_cmd.u.mbx.in_dma); 983 return; 984 } 985 986 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 987 memset(&ea, 0, sizeof(ea)); 988 ea.event = FCME_GPDB_DONE; 989 ea.fcport = fcport; 990 ea.sp = sp; 991 992 qla2x00_fcport_event_handler(vha, &ea); 993 994 dma_pool_free(ha->s_dma_pool, sp->u.iocb_cmd.u.mbx.in, 995 sp->u.iocb_cmd.u.mbx.in_dma); 996 997 sp->free(sp); 998 } 999 1000 static int qla24xx_post_prli_work(struct scsi_qla_host *vha, fc_port_t *fcport) 1001 { 1002 struct qla_work_evt *e; 1003 1004 e = qla2x00_alloc_work(vha, QLA_EVT_PRLI); 1005 if (!e) 1006 return QLA_FUNCTION_FAILED; 1007 1008 e->u.fcport.fcport = fcport; 1009 1010 return qla2x00_post_work(vha, e); 1011 } 1012 1013 static void 1014 qla2x00_async_prli_sp_done(void *ptr, int res) 1015 { 1016 srb_t *sp = ptr; 1017 struct scsi_qla_host *vha = sp->vha; 1018 struct srb_iocb *lio = &sp->u.iocb_cmd; 1019 struct event_arg ea; 1020 1021 ql_dbg(ql_dbg_disc, vha, 0x2129, 1022 "%s %8phC res %d \n", __func__, 1023 sp->fcport->port_name, res); 1024 1025 sp->fcport->flags &= ~FCF_ASYNC_SENT; 1026 1027 if (!test_bit(UNLOADING, &vha->dpc_flags)) { 1028 memset(&ea, 0, sizeof(ea)); 1029 ea.event = FCME_PRLI_DONE; 1030 ea.fcport = sp->fcport; 1031 ea.data[0] = lio->u.logio.data[0]; 1032 ea.data[1] = lio->u.logio.data[1]; 1033 ea.iop[0] = lio->u.logio.iop[0]; 1034 ea.iop[1] = lio->u.logio.iop[1]; 1035 ea.sp = sp; 1036 1037 qla2x00_fcport_event_handler(vha, &ea); 1038 } 1039 1040 sp->free(sp); 1041 } 1042 1043 int 1044 qla24xx_async_prli(struct scsi_qla_host *vha, fc_port_t *fcport) 1045 { 1046 srb_t *sp; 1047 struct srb_iocb *lio; 1048 int rval = QLA_FUNCTION_FAILED; 1049 1050 if (!vha->flags.online) 1051 return rval; 1052 1053 if (fcport->fw_login_state == DSC_LS_PLOGI_PEND || 1054 fcport->fw_login_state == DSC_LS_PRLI_PEND) 1055 return rval; 1056 1057 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1058 if (!sp) 1059 return rval; 1060 1061 fcport->flags |= FCF_ASYNC_SENT; 1062 fcport->logout_completed = 0; 1063 1064 sp->type = SRB_PRLI_CMD; 1065 sp->name = "prli"; 1066 1067 lio = &sp->u.iocb_cmd; 1068 lio->timeout = qla2x00_async_iocb_timeout; 1069 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 1070 1071 sp->done = qla2x00_async_prli_sp_done; 1072 lio->u.logio.flags = 0; 1073 1074 if (fcport->fc4f_nvme) 1075 lio->u.logio.flags |= SRB_LOGIN_NVME_PRLI; 1076 1077 rval = qla2x00_start_sp(sp); 1078 if (rval != QLA_SUCCESS) { 1079 fcport->flags |= FCF_LOGIN_NEEDED; 1080 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1081 goto done_free_sp; 1082 } 1083 1084 ql_dbg(ql_dbg_disc, vha, 0x211b, 1085 "Async-prli - %8phC hdl=%x, loopid=%x portid=%06x retries=%d %s.\n", 1086 fcport->port_name, sp->handle, fcport->loop_id, fcport->d_id.b24, 1087 fcport->login_retry, fcport->fc4f_nvme ? "nvme" : "fc"); 1088 1089 return rval; 1090 1091 done_free_sp: 1092 sp->free(sp); 1093 fcport->flags &= ~FCF_ASYNC_SENT; 1094 return rval; 1095 } 1096 1097 int qla24xx_post_gpdb_work(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt) 1098 { 1099 struct qla_work_evt *e; 1100 1101 e = qla2x00_alloc_work(vha, QLA_EVT_GPDB); 1102 if (!e) 1103 return QLA_FUNCTION_FAILED; 1104 1105 e->u.fcport.fcport = fcport; 1106 e->u.fcport.opt = opt; 1107 fcport->flags |= FCF_ASYNC_ACTIVE; 1108 return qla2x00_post_work(vha, e); 1109 } 1110 1111 int qla24xx_async_gpdb(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt) 1112 { 1113 srb_t *sp; 1114 struct srb_iocb *mbx; 1115 int rval = QLA_FUNCTION_FAILED; 1116 u16 *mb; 1117 dma_addr_t pd_dma; 1118 struct port_database_24xx *pd; 1119 struct qla_hw_data *ha = vha->hw; 1120 1121 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT)) 1122 return rval; 1123 1124 fcport->disc_state = DSC_GPDB; 1125 1126 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1127 if (!sp) 1128 goto done; 1129 1130 fcport->flags |= FCF_ASYNC_SENT; 1131 sp->type = SRB_MB_IOCB; 1132 sp->name = "gpdb"; 1133 sp->gen1 = fcport->rscn_gen; 1134 sp->gen2 = fcport->login_gen; 1135 1136 mbx = &sp->u.iocb_cmd; 1137 mbx->timeout = qla2x00_async_iocb_timeout; 1138 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2); 1139 1140 pd = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma); 1141 if (pd == NULL) { 1142 ql_log(ql_log_warn, vha, 0xd043, 1143 "Failed to allocate port database structure.\n"); 1144 goto done_free_sp; 1145 } 1146 1147 mb = sp->u.iocb_cmd.u.mbx.out_mb; 1148 mb[0] = MBC_GET_PORT_DATABASE; 1149 mb[1] = fcport->loop_id; 1150 mb[2] = MSW(pd_dma); 1151 mb[3] = LSW(pd_dma); 1152 mb[6] = MSW(MSD(pd_dma)); 1153 mb[7] = LSW(MSD(pd_dma)); 1154 mb[9] = vha->vp_idx; 1155 mb[10] = opt; 1156 1157 mbx->u.mbx.in = (void *)pd; 1158 mbx->u.mbx.in_dma = pd_dma; 1159 1160 sp->done = qla24xx_async_gpdb_sp_done; 1161 1162 ql_dbg(ql_dbg_disc, vha, 0x20dc, 1163 "Async-%s %8phC hndl %x opt %x\n", 1164 sp->name, fcport->port_name, sp->handle, opt); 1165 1166 rval = qla2x00_start_sp(sp); 1167 if (rval != QLA_SUCCESS) 1168 goto done_free_sp; 1169 return rval; 1170 1171 done_free_sp: 1172 if (pd) 1173 dma_pool_free(ha->s_dma_pool, pd, pd_dma); 1174 1175 sp->free(sp); 1176 fcport->flags &= ~FCF_ASYNC_SENT; 1177 done: 1178 qla24xx_post_gpdb_work(vha, fcport, opt); 1179 return rval; 1180 } 1181 1182 static 1183 void __qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea) 1184 { 1185 unsigned long flags; 1186 1187 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1188 ea->fcport->login_gen++; 1189 ea->fcport->deleted = 0; 1190 ea->fcport->logout_on_delete = 1; 1191 1192 if (!ea->fcport->login_succ && !IS_SW_RESV_ADDR(ea->fcport->d_id)) { 1193 vha->fcport_count++; 1194 ea->fcport->login_succ = 1; 1195 1196 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1197 qla24xx_sched_upd_fcport(ea->fcport); 1198 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 1199 } else if (ea->fcport->login_succ) { 1200 /* 1201 * We have an existing session. A late RSCN delivery 1202 * must have triggered the session to be re-validate. 1203 * Session is still valid. 1204 */ 1205 ql_dbg(ql_dbg_disc, vha, 0x20d6, 1206 "%s %d %8phC session revalidate success\n", 1207 __func__, __LINE__, ea->fcport->port_name); 1208 ea->fcport->disc_state = DSC_LOGIN_COMPLETE; 1209 } 1210 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 1211 } 1212 1213 static 1214 void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea) 1215 { 1216 fc_port_t *fcport = ea->fcport; 1217 struct port_database_24xx *pd; 1218 struct srb *sp = ea->sp; 1219 uint8_t ls; 1220 1221 pd = (struct port_database_24xx *)sp->u.iocb_cmd.u.mbx.in; 1222 1223 fcport->flags &= ~FCF_ASYNC_SENT; 1224 1225 ql_dbg(ql_dbg_disc, vha, 0x20d2, 1226 "%s %8phC DS %d LS %d nvme %x rc %d\n", __func__, fcport->port_name, 1227 fcport->disc_state, pd->current_login_state, fcport->fc4f_nvme, 1228 ea->rc); 1229 1230 if (fcport->disc_state == DSC_DELETE_PEND) 1231 return; 1232 1233 if (fcport->fc4f_nvme) 1234 ls = pd->current_login_state >> 4; 1235 else 1236 ls = pd->current_login_state & 0xf; 1237 1238 if (ea->sp->gen2 != fcport->login_gen) { 1239 /* target side must have changed it. */ 1240 1241 ql_dbg(ql_dbg_disc, vha, 0x20d3, 1242 "%s %8phC generation changed\n", 1243 __func__, fcport->port_name); 1244 return; 1245 } else if (ea->sp->gen1 != fcport->rscn_gen) { 1246 qla_rscn_replay(fcport); 1247 qlt_schedule_sess_for_deletion(fcport); 1248 return; 1249 } 1250 1251 switch (ls) { 1252 case PDS_PRLI_COMPLETE: 1253 __qla24xx_parse_gpdb(vha, fcport, pd); 1254 break; 1255 case PDS_PLOGI_PENDING: 1256 case PDS_PLOGI_COMPLETE: 1257 case PDS_PRLI_PENDING: 1258 case PDS_PRLI2_PENDING: 1259 /* Set discovery state back to GNL to Relogin attempt */ 1260 if (qla_dual_mode_enabled(vha) || 1261 qla_ini_mode_enabled(vha)) { 1262 fcport->disc_state = DSC_GNL; 1263 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1264 } 1265 return; 1266 case PDS_LOGO_PENDING: 1267 case PDS_PORT_UNAVAILABLE: 1268 default: 1269 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC post del sess\n", 1270 __func__, __LINE__, fcport->port_name); 1271 qlt_schedule_sess_for_deletion(fcport); 1272 return; 1273 } 1274 __qla24xx_handle_gpdb_event(vha, ea); 1275 } /* gpdb event */ 1276 1277 static void qla_chk_n2n_b4_login(struct scsi_qla_host *vha, fc_port_t *fcport) 1278 { 1279 u8 login = 0; 1280 int rc; 1281 1282 if (qla_tgt_mode_enabled(vha)) 1283 return; 1284 1285 if (qla_dual_mode_enabled(vha)) { 1286 if (N2N_TOPO(vha->hw)) { 1287 u64 mywwn, wwn; 1288 1289 mywwn = wwn_to_u64(vha->port_name); 1290 wwn = wwn_to_u64(fcport->port_name); 1291 if (mywwn > wwn) 1292 login = 1; 1293 else if ((fcport->fw_login_state == DSC_LS_PLOGI_COMP) 1294 && time_after_eq(jiffies, 1295 fcport->plogi_nack_done_deadline)) 1296 login = 1; 1297 } else { 1298 login = 1; 1299 } 1300 } else { 1301 /* initiator mode */ 1302 login = 1; 1303 } 1304 1305 if (login && fcport->login_retry) { 1306 fcport->login_retry--; 1307 if (fcport->loop_id == FC_NO_LOOP_ID) { 1308 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL; 1309 rc = qla2x00_find_new_loop_id(vha, fcport); 1310 if (rc) { 1311 ql_dbg(ql_dbg_disc, vha, 0x20e6, 1312 "%s %d %8phC post del sess - out of loopid\n", 1313 __func__, __LINE__, fcport->port_name); 1314 fcport->scan_state = 0; 1315 qlt_schedule_sess_for_deletion(fcport); 1316 return; 1317 } 1318 } 1319 ql_dbg(ql_dbg_disc, vha, 0x20bf, 1320 "%s %d %8phC post login\n", 1321 __func__, __LINE__, fcport->port_name); 1322 qla2x00_post_async_login_work(vha, fcport, NULL); 1323 } 1324 } 1325 1326 int qla24xx_fcport_handle_login(struct scsi_qla_host *vha, fc_port_t *fcport) 1327 { 1328 u16 data[2]; 1329 u64 wwn; 1330 u16 sec; 1331 1332 ql_dbg(ql_dbg_disc + ql_dbg_verbose, vha, 0x20d8, 1333 "%s %8phC DS %d LS %d P %d fl %x confl %p rscn %d|%d login %d lid %d scan %d\n", 1334 __func__, fcport->port_name, fcport->disc_state, 1335 fcport->fw_login_state, fcport->login_pause, fcport->flags, 1336 fcport->conflict, fcport->last_rscn_gen, fcport->rscn_gen, 1337 fcport->login_gen, fcport->loop_id, fcport->scan_state); 1338 1339 if (fcport->scan_state != QLA_FCPORT_FOUND) 1340 return 0; 1341 1342 if ((fcport->loop_id != FC_NO_LOOP_ID) && 1343 ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) || 1344 (fcport->fw_login_state == DSC_LS_PRLI_PEND))) 1345 return 0; 1346 1347 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) { 1348 if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) { 1349 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1350 return 0; 1351 } 1352 } 1353 1354 /* for pure Target Mode. Login will not be initiated */ 1355 if (vha->host->active_mode == MODE_TARGET) 1356 return 0; 1357 1358 if (fcport->flags & FCF_ASYNC_SENT) { 1359 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1360 return 0; 1361 } 1362 1363 switch (fcport->disc_state) { 1364 case DSC_DELETED: 1365 wwn = wwn_to_u64(fcport->node_name); 1366 switch (vha->hw->current_topology) { 1367 case ISP_CFG_N: 1368 if (fcport_is_smaller(fcport)) { 1369 /* this adapter is bigger */ 1370 if (fcport->login_retry) { 1371 if (fcport->loop_id == FC_NO_LOOP_ID) { 1372 qla2x00_find_new_loop_id(vha, 1373 fcport); 1374 fcport->fw_login_state = 1375 DSC_LS_PORT_UNAVAIL; 1376 } 1377 fcport->login_retry--; 1378 qla_post_els_plogi_work(vha, fcport); 1379 } else { 1380 ql_log(ql_log_info, vha, 0x705d, 1381 "Unable to reach remote port %8phC", 1382 fcport->port_name); 1383 } 1384 } else { 1385 qla24xx_post_gnl_work(vha, fcport); 1386 } 1387 break; 1388 default: 1389 if (wwn == 0) { 1390 ql_dbg(ql_dbg_disc, vha, 0xffff, 1391 "%s %d %8phC post GNNID\n", 1392 __func__, __LINE__, fcport->port_name); 1393 qla24xx_post_gnnid_work(vha, fcport); 1394 } else if (fcport->loop_id == FC_NO_LOOP_ID) { 1395 ql_dbg(ql_dbg_disc, vha, 0x20bd, 1396 "%s %d %8phC post gnl\n", 1397 __func__, __LINE__, fcport->port_name); 1398 qla24xx_post_gnl_work(vha, fcport); 1399 } else { 1400 qla_chk_n2n_b4_login(vha, fcport); 1401 } 1402 break; 1403 } 1404 break; 1405 1406 case DSC_GNL: 1407 switch (vha->hw->current_topology) { 1408 case ISP_CFG_N: 1409 if ((fcport->current_login_state & 0xf) == 0x6) { 1410 ql_dbg(ql_dbg_disc, vha, 0x2118, 1411 "%s %d %8phC post GPDB work\n", 1412 __func__, __LINE__, fcport->port_name); 1413 fcport->chip_reset = 1414 vha->hw->base_qpair->chip_reset; 1415 qla24xx_post_gpdb_work(vha, fcport, 0); 1416 } else { 1417 ql_dbg(ql_dbg_disc, vha, 0x2118, 1418 "%s %d %8phC post NVMe PRLI\n", 1419 __func__, __LINE__, fcport->port_name); 1420 qla24xx_post_prli_work(vha, fcport); 1421 } 1422 break; 1423 default: 1424 if (fcport->login_pause) { 1425 fcport->last_rscn_gen = fcport->rscn_gen; 1426 fcport->last_login_gen = fcport->login_gen; 1427 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1428 break; 1429 } 1430 qla_chk_n2n_b4_login(vha, fcport); 1431 break; 1432 } 1433 break; 1434 1435 case DSC_LOGIN_FAILED: 1436 if (N2N_TOPO(vha->hw)) 1437 qla_chk_n2n_b4_login(vha, fcport); 1438 else 1439 qlt_schedule_sess_for_deletion(fcport); 1440 break; 1441 1442 case DSC_LOGIN_COMPLETE: 1443 /* recheck login state */ 1444 data[0] = data[1] = 0; 1445 qla2x00_post_async_adisc_work(vha, fcport, data); 1446 break; 1447 1448 case DSC_LOGIN_PEND: 1449 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) 1450 qla24xx_post_prli_work(vha, fcport); 1451 break; 1452 1453 case DSC_UPD_FCPORT: 1454 sec = jiffies_to_msecs(jiffies - 1455 fcport->jiffies_at_registration)/1000; 1456 if (fcport->sec_since_registration < sec && sec && 1457 !(sec % 60)) { 1458 fcport->sec_since_registration = sec; 1459 ql_dbg(ql_dbg_disc, fcport->vha, 0xffff, 1460 "%s %8phC - Slow Rport registration(%d Sec)\n", 1461 __func__, fcport->port_name, sec); 1462 } 1463 1464 if (fcport->next_disc_state != DSC_DELETE_PEND) 1465 fcport->next_disc_state = DSC_ADISC; 1466 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1467 break; 1468 1469 default: 1470 break; 1471 } 1472 1473 return 0; 1474 } 1475 1476 static 1477 void qla24xx_handle_rscn_event(fc_port_t *fcport, struct event_arg *ea) 1478 { 1479 fcport->rscn_gen++; 1480 1481 ql_dbg(ql_dbg_disc, fcport->vha, 0x210c, 1482 "%s %8phC DS %d LS %d\n", 1483 __func__, fcport->port_name, fcport->disc_state, 1484 fcport->fw_login_state); 1485 1486 if (fcport->flags & FCF_ASYNC_SENT) 1487 return; 1488 1489 switch (fcport->disc_state) { 1490 case DSC_DELETED: 1491 case DSC_LOGIN_COMPLETE: 1492 qla24xx_post_gpnid_work(fcport->vha, &ea->id); 1493 break; 1494 default: 1495 break; 1496 } 1497 } 1498 1499 int qla24xx_post_newsess_work(struct scsi_qla_host *vha, port_id_t *id, 1500 u8 *port_name, u8 *node_name, void *pla, u8 fc4_type) 1501 { 1502 struct qla_work_evt *e; 1503 e = qla2x00_alloc_work(vha, QLA_EVT_NEW_SESS); 1504 if (!e) 1505 return QLA_FUNCTION_FAILED; 1506 1507 e->u.new_sess.id = *id; 1508 e->u.new_sess.pla = pla; 1509 e->u.new_sess.fc4_type = fc4_type; 1510 memcpy(e->u.new_sess.port_name, port_name, WWN_SIZE); 1511 if (node_name) 1512 memcpy(e->u.new_sess.node_name, node_name, WWN_SIZE); 1513 1514 return qla2x00_post_work(vha, e); 1515 } 1516 1517 static 1518 void qla24xx_handle_relogin_event(scsi_qla_host_t *vha, 1519 struct event_arg *ea) 1520 { 1521 fc_port_t *fcport = ea->fcport; 1522 1523 ql_dbg(ql_dbg_disc, vha, 0x2102, 1524 "%s %8phC DS %d LS %d P %d del %d cnfl %p rscn %d|%d login %d|%d fl %x\n", 1525 __func__, fcport->port_name, fcport->disc_state, 1526 fcport->fw_login_state, fcport->login_pause, 1527 fcport->deleted, fcport->conflict, 1528 fcport->last_rscn_gen, fcport->rscn_gen, 1529 fcport->last_login_gen, fcport->login_gen, 1530 fcport->flags); 1531 1532 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) || 1533 (fcport->fw_login_state == DSC_LS_PRLI_PEND)) 1534 return; 1535 1536 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) { 1537 if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) { 1538 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1539 return; 1540 } 1541 } 1542 1543 if (fcport->last_rscn_gen != fcport->rscn_gen) { 1544 ql_dbg(ql_dbg_disc, vha, 0x20e9, "%s %d %8phC post gidpn\n", 1545 __func__, __LINE__, fcport->port_name); 1546 1547 return; 1548 } 1549 1550 qla24xx_fcport_handle_login(vha, fcport); 1551 } 1552 1553 1554 static void qla_handle_els_plogi_done(scsi_qla_host_t *vha, 1555 struct event_arg *ea) 1556 { 1557 ql_dbg(ql_dbg_disc, vha, 0x2118, 1558 "%s %d %8phC post PRLI\n", 1559 __func__, __LINE__, ea->fcport->port_name); 1560 qla24xx_post_prli_work(vha, ea->fcport); 1561 } 1562 1563 void qla2x00_fcport_event_handler(scsi_qla_host_t *vha, struct event_arg *ea) 1564 { 1565 fc_port_t *f, *tf; 1566 uint32_t id = 0, mask, rid; 1567 fc_port_t *fcport; 1568 1569 switch (ea->event) { 1570 case FCME_RELOGIN: 1571 if (test_bit(UNLOADING, &vha->dpc_flags)) 1572 return; 1573 1574 qla24xx_handle_relogin_event(vha, ea); 1575 break; 1576 case FCME_RSCN: 1577 if (test_bit(UNLOADING, &vha->dpc_flags)) 1578 return; 1579 switch (ea->id.b.rsvd_1) { 1580 case RSCN_PORT_ADDR: 1581 #define BIGSCAN 1 1582 #if defined BIGSCAN & BIGSCAN > 0 1583 { 1584 unsigned long flags; 1585 fcport = qla2x00_find_fcport_by_nportid 1586 (vha, &ea->id, 1); 1587 if (fcport) { 1588 fcport->scan_needed = 1; 1589 fcport->rscn_gen++; 1590 } 1591 1592 spin_lock_irqsave(&vha->work_lock, flags); 1593 if (vha->scan.scan_flags == 0) { 1594 ql_dbg(ql_dbg_disc, vha, 0xffff, 1595 "%s: schedule\n", __func__); 1596 vha->scan.scan_flags |= SF_QUEUED; 1597 schedule_delayed_work(&vha->scan.scan_work, 5); 1598 } 1599 spin_unlock_irqrestore(&vha->work_lock, flags); 1600 } 1601 #else 1602 { 1603 int rc; 1604 fcport = qla2x00_find_fcport_by_nportid(vha, &ea->id, 1); 1605 if (!fcport) { 1606 /* cable moved */ 1607 rc = qla24xx_post_gpnid_work(vha, &ea->id); 1608 if (rc) { 1609 ql_log(ql_log_warn, vha, 0xd044, 1610 "RSCN GPNID work failed %06x\n", 1611 ea->id.b24); 1612 } 1613 } else { 1614 ea->fcport = fcport; 1615 fcport->scan_needed = 1; 1616 qla24xx_handle_rscn_event(fcport, ea); 1617 } 1618 } 1619 #endif 1620 break; 1621 case RSCN_AREA_ADDR: 1622 case RSCN_DOM_ADDR: 1623 if (ea->id.b.rsvd_1 == RSCN_AREA_ADDR) { 1624 mask = 0xffff00; 1625 ql_dbg(ql_dbg_async, vha, 0x5044, 1626 "RSCN: Area 0x%06x was affected\n", 1627 ea->id.b24); 1628 } else { 1629 mask = 0xff0000; 1630 ql_dbg(ql_dbg_async, vha, 0x507a, 1631 "RSCN: Domain 0x%06x was affected\n", 1632 ea->id.b24); 1633 } 1634 1635 rid = ea->id.b24 & mask; 1636 list_for_each_entry_safe(f, tf, &vha->vp_fcports, 1637 list) { 1638 id = f->d_id.b24 & mask; 1639 if (rid == id) { 1640 ea->fcport = f; 1641 qla24xx_handle_rscn_event(f, ea); 1642 } 1643 } 1644 break; 1645 case RSCN_FAB_ADDR: 1646 default: 1647 ql_log(ql_log_warn, vha, 0xd045, 1648 "RSCN: Fabric was affected. Addr format %d\n", 1649 ea->id.b.rsvd_1); 1650 qla2x00_mark_all_devices_lost(vha, 1); 1651 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 1652 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 1653 } 1654 break; 1655 case FCME_GNL_DONE: 1656 qla24xx_handle_gnl_done_event(vha, ea); 1657 break; 1658 case FCME_GPSC_DONE: 1659 qla24xx_handle_gpsc_event(vha, ea); 1660 break; 1661 case FCME_PLOGI_DONE: /* Initiator side sent LLIOCB */ 1662 qla24xx_handle_plogi_done_event(vha, ea); 1663 break; 1664 case FCME_PRLI_DONE: 1665 qla24xx_handle_prli_done_event(vha, ea); 1666 break; 1667 case FCME_GPDB_DONE: 1668 qla24xx_handle_gpdb_event(vha, ea); 1669 break; 1670 case FCME_GPNID_DONE: 1671 qla24xx_handle_gpnid_event(vha, ea); 1672 break; 1673 case FCME_GFFID_DONE: 1674 qla24xx_handle_gffid_event(vha, ea); 1675 break; 1676 case FCME_ADISC_DONE: 1677 qla24xx_handle_adisc_event(vha, ea); 1678 break; 1679 case FCME_GNNID_DONE: 1680 qla24xx_handle_gnnid_event(vha, ea); 1681 break; 1682 case FCME_GFPNID_DONE: 1683 qla24xx_handle_gfpnid_event(vha, ea); 1684 break; 1685 case FCME_ELS_PLOGI_DONE: 1686 qla_handle_els_plogi_done(vha, ea); 1687 break; 1688 default: 1689 BUG_ON(1); 1690 break; 1691 } 1692 } 1693 1694 /* 1695 * RSCN(s) came in for this fcport, but the RSCN(s) was not able 1696 * to be consumed by the fcport 1697 */ 1698 void qla_rscn_replay(fc_port_t *fcport) 1699 { 1700 struct event_arg ea; 1701 1702 switch (fcport->disc_state) { 1703 case DSC_DELETE_PEND: 1704 return; 1705 default: 1706 break; 1707 } 1708 1709 if (fcport->scan_needed) { 1710 memset(&ea, 0, sizeof(ea)); 1711 ea.event = FCME_RSCN; 1712 ea.id = fcport->d_id; 1713 ea.id.b.rsvd_1 = RSCN_PORT_ADDR; 1714 #if defined BIGSCAN & BIGSCAN > 0 1715 qla2x00_fcport_event_handler(fcport->vha, &ea); 1716 #else 1717 qla24xx_post_gpnid_work(fcport->vha, &ea.id); 1718 #endif 1719 } 1720 } 1721 1722 static void 1723 qla2x00_tmf_iocb_timeout(void *data) 1724 { 1725 srb_t *sp = data; 1726 struct srb_iocb *tmf = &sp->u.iocb_cmd; 1727 1728 tmf->u.tmf.comp_status = CS_TIMEOUT; 1729 complete(&tmf->u.tmf.comp); 1730 } 1731 1732 static void 1733 qla2x00_tmf_sp_done(void *ptr, int res) 1734 { 1735 srb_t *sp = ptr; 1736 struct srb_iocb *tmf = &sp->u.iocb_cmd; 1737 1738 complete(&tmf->u.tmf.comp); 1739 } 1740 1741 int 1742 qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint32_t lun, 1743 uint32_t tag) 1744 { 1745 struct scsi_qla_host *vha = fcport->vha; 1746 struct srb_iocb *tm_iocb; 1747 srb_t *sp; 1748 int rval = QLA_FUNCTION_FAILED; 1749 1750 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 1751 if (!sp) 1752 goto done; 1753 1754 tm_iocb = &sp->u.iocb_cmd; 1755 sp->type = SRB_TM_CMD; 1756 sp->name = "tmf"; 1757 1758 tm_iocb->timeout = qla2x00_tmf_iocb_timeout; 1759 init_completion(&tm_iocb->u.tmf.comp); 1760 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)); 1761 1762 tm_iocb->u.tmf.flags = flags; 1763 tm_iocb->u.tmf.lun = lun; 1764 tm_iocb->u.tmf.data = tag; 1765 sp->done = qla2x00_tmf_sp_done; 1766 1767 ql_dbg(ql_dbg_taskm, vha, 0x802f, 1768 "Async-tmf hdl=%x loop-id=%x portid=%02x%02x%02x.\n", 1769 sp->handle, fcport->loop_id, fcport->d_id.b.domain, 1770 fcport->d_id.b.area, fcport->d_id.b.al_pa); 1771 1772 rval = qla2x00_start_sp(sp); 1773 if (rval != QLA_SUCCESS) 1774 goto done_free_sp; 1775 wait_for_completion(&tm_iocb->u.tmf.comp); 1776 1777 rval = tm_iocb->u.tmf.data; 1778 1779 if (rval != QLA_SUCCESS) { 1780 ql_log(ql_log_warn, vha, 0x8030, 1781 "TM IOCB failed (%x).\n", rval); 1782 } 1783 1784 if (!test_bit(UNLOADING, &vha->dpc_flags) && !IS_QLAFX00(vha->hw)) { 1785 flags = tm_iocb->u.tmf.flags; 1786 lun = (uint16_t)tm_iocb->u.tmf.lun; 1787 1788 /* Issue Marker IOCB */ 1789 qla2x00_marker(vha, vha->hw->req_q_map[0], 1790 vha->hw->rsp_q_map[0], sp->fcport->loop_id, lun, 1791 flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID); 1792 } 1793 1794 done_free_sp: 1795 sp->free(sp); 1796 sp->fcport->flags &= ~FCF_ASYNC_SENT; 1797 done: 1798 return rval; 1799 } 1800 1801 static void 1802 qla24xx_abort_iocb_timeout(void *data) 1803 { 1804 srb_t *sp = data; 1805 struct srb_iocb *abt = &sp->u.iocb_cmd; 1806 1807 abt->u.abt.comp_status = CS_TIMEOUT; 1808 sp->done(sp, QLA_FUNCTION_TIMEOUT); 1809 } 1810 1811 static void 1812 qla24xx_abort_sp_done(void *ptr, int res) 1813 { 1814 srb_t *sp = ptr; 1815 struct srb_iocb *abt = &sp->u.iocb_cmd; 1816 1817 if (del_timer(&sp->u.iocb_cmd.timer)) { 1818 if (sp->flags & SRB_WAKEUP_ON_COMP) 1819 complete(&abt->u.abt.comp); 1820 else 1821 sp->free(sp); 1822 } 1823 } 1824 1825 int 1826 qla24xx_async_abort_cmd(srb_t *cmd_sp, bool wait) 1827 { 1828 scsi_qla_host_t *vha = cmd_sp->vha; 1829 struct srb_iocb *abt_iocb; 1830 srb_t *sp; 1831 int rval = QLA_FUNCTION_FAILED; 1832 1833 sp = qla2xxx_get_qpair_sp(cmd_sp->vha, cmd_sp->qpair, cmd_sp->fcport, 1834 GFP_KERNEL); 1835 if (!sp) 1836 goto done; 1837 1838 abt_iocb = &sp->u.iocb_cmd; 1839 sp->type = SRB_ABT_CMD; 1840 sp->name = "abort"; 1841 sp->qpair = cmd_sp->qpair; 1842 if (wait) 1843 sp->flags = SRB_WAKEUP_ON_COMP; 1844 1845 abt_iocb->timeout = qla24xx_abort_iocb_timeout; 1846 init_completion(&abt_iocb->u.abt.comp); 1847 /* FW can send 2 x ABTS's timeout/20s */ 1848 qla2x00_init_timer(sp, 42); 1849 1850 abt_iocb->u.abt.cmd_hndl = cmd_sp->handle; 1851 abt_iocb->u.abt.req_que_no = cpu_to_le16(cmd_sp->qpair->req->id); 1852 1853 sp->done = qla24xx_abort_sp_done; 1854 1855 ql_dbg(ql_dbg_async, vha, 0x507c, 1856 "Abort command issued - hdl=%x, type=%x\n", 1857 cmd_sp->handle, cmd_sp->type); 1858 1859 rval = qla2x00_start_sp(sp); 1860 if (rval != QLA_SUCCESS) 1861 goto done_free_sp; 1862 1863 if (wait) { 1864 wait_for_completion(&abt_iocb->u.abt.comp); 1865 rval = abt_iocb->u.abt.comp_status == CS_COMPLETE ? 1866 QLA_SUCCESS : QLA_FUNCTION_FAILED; 1867 } else { 1868 goto done; 1869 } 1870 1871 done_free_sp: 1872 sp->free(sp); 1873 done: 1874 return rval; 1875 } 1876 1877 int 1878 qla24xx_async_abort_command(srb_t *sp) 1879 { 1880 unsigned long flags = 0; 1881 1882 uint32_t handle; 1883 fc_port_t *fcport = sp->fcport; 1884 struct qla_qpair *qpair = sp->qpair; 1885 struct scsi_qla_host *vha = fcport->vha; 1886 struct req_que *req = qpair->req; 1887 1888 spin_lock_irqsave(qpair->qp_lock_ptr, flags); 1889 for (handle = 1; handle < req->num_outstanding_cmds; handle++) { 1890 if (req->outstanding_cmds[handle] == sp) 1891 break; 1892 } 1893 spin_unlock_irqrestore(qpair->qp_lock_ptr, flags); 1894 1895 if (handle == req->num_outstanding_cmds) { 1896 /* Command not found. */ 1897 return QLA_FUNCTION_FAILED; 1898 } 1899 if (sp->type == SRB_FXIOCB_DCMD) 1900 return qlafx00_fx_disc(vha, &vha->hw->mr.fcport, 1901 FXDISC_ABORT_IOCTL); 1902 1903 return qla24xx_async_abort_cmd(sp, true); 1904 } 1905 1906 static void 1907 qla24xx_handle_prli_done_event(struct scsi_qla_host *vha, struct event_arg *ea) 1908 { 1909 switch (ea->data[0]) { 1910 case MBS_COMMAND_COMPLETE: 1911 ql_dbg(ql_dbg_disc, vha, 0x2118, 1912 "%s %d %8phC post gpdb\n", 1913 __func__, __LINE__, ea->fcport->port_name); 1914 1915 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset; 1916 ea->fcport->logout_on_delete = 1; 1917 qla24xx_post_gpdb_work(vha, ea->fcport, 0); 1918 break; 1919 default: 1920 if ((ea->iop[0] == LSC_SCODE_ELS_REJECT) && 1921 (ea->iop[1] == 0x50000)) { /* reson 5=busy expl:0x0 */ 1922 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1923 ea->fcport->fw_login_state = DSC_LS_PLOGI_COMP; 1924 break; 1925 } 1926 1927 if (ea->fcport->n2n_flag) { 1928 ql_dbg(ql_dbg_disc, vha, 0x2118, 1929 "%s %d %8phC post fc4 prli\n", 1930 __func__, __LINE__, ea->fcport->port_name); 1931 ea->fcport->fc4f_nvme = 0; 1932 ea->fcport->n2n_flag = 0; 1933 qla24xx_post_prli_work(vha, ea->fcport); 1934 } 1935 ql_dbg(ql_dbg_disc, vha, 0x2119, 1936 "%s %d %8phC unhandle event of %x\n", 1937 __func__, __LINE__, ea->fcport->port_name, ea->data[0]); 1938 break; 1939 } 1940 } 1941 1942 static void 1943 qla24xx_handle_plogi_done_event(struct scsi_qla_host *vha, struct event_arg *ea) 1944 { 1945 port_id_t cid; /* conflict Nport id */ 1946 u16 lid; 1947 struct fc_port *conflict_fcport; 1948 unsigned long flags; 1949 struct fc_port *fcport = ea->fcport; 1950 1951 ql_dbg(ql_dbg_disc, vha, 0xffff, 1952 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d data %x|%x iop %x|%x\n", 1953 __func__, fcport->port_name, fcport->disc_state, 1954 fcport->fw_login_state, ea->rc, ea->sp->gen2, fcport->login_gen, 1955 ea->sp->gen1, fcport->rscn_gen, 1956 ea->data[0], ea->data[1], ea->iop[0], ea->iop[1]); 1957 1958 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) || 1959 (fcport->fw_login_state == DSC_LS_PRLI_PEND)) { 1960 ql_dbg(ql_dbg_disc, vha, 0x20ea, 1961 "%s %d %8phC Remote is trying to login\n", 1962 __func__, __LINE__, fcport->port_name); 1963 return; 1964 } 1965 1966 if (fcport->disc_state == DSC_DELETE_PEND) 1967 return; 1968 1969 if (ea->sp->gen2 != fcport->login_gen) { 1970 /* target side must have changed it. */ 1971 ql_dbg(ql_dbg_disc, vha, 0x20d3, 1972 "%s %8phC generation changed\n", 1973 __func__, fcport->port_name); 1974 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1975 return; 1976 } else if (ea->sp->gen1 != fcport->rscn_gen) { 1977 ql_dbg(ql_dbg_disc, vha, 0x20d3, 1978 "%s %8phC RSCN generation changed\n", 1979 __func__, fcport->port_name); 1980 qla_rscn_replay(fcport); 1981 qlt_schedule_sess_for_deletion(fcport); 1982 return; 1983 } 1984 1985 switch (ea->data[0]) { 1986 case MBS_COMMAND_COMPLETE: 1987 /* 1988 * Driver must validate login state - If PRLI not complete, 1989 * force a relogin attempt via implicit LOGO, PLOGI, and PRLI 1990 * requests. 1991 */ 1992 if (ea->fcport->fc4f_nvme) { 1993 ql_dbg(ql_dbg_disc, vha, 0x2117, 1994 "%s %d %8phC post prli\n", 1995 __func__, __LINE__, ea->fcport->port_name); 1996 qla24xx_post_prli_work(vha, ea->fcport); 1997 } else { 1998 ql_dbg(ql_dbg_disc, vha, 0x20ea, 1999 "%s %d %8phC LoopID 0x%x in use with %06x. post gnl\n", 2000 __func__, __LINE__, ea->fcport->port_name, 2001 ea->fcport->loop_id, ea->fcport->d_id.b24); 2002 2003 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map); 2004 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 2005 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset; 2006 ea->fcport->logout_on_delete = 1; 2007 ea->fcport->send_els_logo = 0; 2008 ea->fcport->fw_login_state = DSC_LS_PRLI_COMP; 2009 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 2010 2011 qla24xx_post_gpdb_work(vha, ea->fcport, 0); 2012 } 2013 break; 2014 case MBS_COMMAND_ERROR: 2015 ql_dbg(ql_dbg_disc, vha, 0x20eb, "%s %d %8phC cmd error %x\n", 2016 __func__, __LINE__, ea->fcport->port_name, ea->data[1]); 2017 2018 ea->fcport->flags &= ~FCF_ASYNC_SENT; 2019 ea->fcport->disc_state = DSC_LOGIN_FAILED; 2020 if (ea->data[1] & QLA_LOGIO_LOGIN_RETRIED) 2021 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 2022 else 2023 qla2x00_mark_device_lost(vha, ea->fcport, 1, 0); 2024 break; 2025 case MBS_LOOP_ID_USED: 2026 /* data[1] = IO PARAM 1 = nport ID */ 2027 cid.b.domain = (ea->iop[1] >> 16) & 0xff; 2028 cid.b.area = (ea->iop[1] >> 8) & 0xff; 2029 cid.b.al_pa = ea->iop[1] & 0xff; 2030 cid.b.rsvd_1 = 0; 2031 2032 ql_dbg(ql_dbg_disc, vha, 0x20ec, 2033 "%s %d %8phC lid %#x in use with pid %06x post gnl\n", 2034 __func__, __LINE__, ea->fcport->port_name, 2035 ea->fcport->loop_id, cid.b24); 2036 2037 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map); 2038 ea->fcport->loop_id = FC_NO_LOOP_ID; 2039 qla24xx_post_gnl_work(vha, ea->fcport); 2040 break; 2041 case MBS_PORT_ID_USED: 2042 lid = ea->iop[1] & 0xffff; 2043 qlt_find_sess_invalidate_other(vha, 2044 wwn_to_u64(ea->fcport->port_name), 2045 ea->fcport->d_id, lid, &conflict_fcport); 2046 2047 if (conflict_fcport) { 2048 /* 2049 * Another fcport share the same loop_id/nport id. 2050 * Conflict fcport needs to finish cleanup before this 2051 * fcport can proceed to login. 2052 */ 2053 conflict_fcport->conflict = ea->fcport; 2054 ea->fcport->login_pause = 1; 2055 2056 ql_dbg(ql_dbg_disc, vha, 0x20ed, 2057 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. post gidpn\n", 2058 __func__, __LINE__, ea->fcport->port_name, 2059 ea->fcport->d_id.b24, lid); 2060 } else { 2061 ql_dbg(ql_dbg_disc, vha, 0x20ed, 2062 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. sched delete\n", 2063 __func__, __LINE__, ea->fcport->port_name, 2064 ea->fcport->d_id.b24, lid); 2065 2066 qla2x00_clear_loop_id(ea->fcport); 2067 set_bit(lid, vha->hw->loop_id_map); 2068 ea->fcport->loop_id = lid; 2069 ea->fcport->keep_nport_handle = 0; 2070 qlt_schedule_sess_for_deletion(ea->fcport); 2071 } 2072 break; 2073 } 2074 return; 2075 } 2076 2077 void 2078 qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport, 2079 uint16_t *data) 2080 { 2081 qlt_logo_completion_handler(fcport, data[0]); 2082 fcport->login_gen++; 2083 fcport->flags &= ~FCF_ASYNC_ACTIVE; 2084 return; 2085 } 2086 2087 /****************************************************************************/ 2088 /* QLogic ISP2x00 Hardware Support Functions. */ 2089 /****************************************************************************/ 2090 2091 static int 2092 qla83xx_nic_core_fw_load(scsi_qla_host_t *vha) 2093 { 2094 int rval = QLA_SUCCESS; 2095 struct qla_hw_data *ha = vha->hw; 2096 uint32_t idc_major_ver, idc_minor_ver; 2097 uint16_t config[4]; 2098 2099 qla83xx_idc_lock(vha, 0); 2100 2101 /* SV: TODO: Assign initialization timeout from 2102 * flash-info / other param 2103 */ 2104 ha->fcoe_dev_init_timeout = QLA83XX_IDC_INITIALIZATION_TIMEOUT; 2105 ha->fcoe_reset_timeout = QLA83XX_IDC_RESET_ACK_TIMEOUT; 2106 2107 /* Set our fcoe function presence */ 2108 if (__qla83xx_set_drv_presence(vha) != QLA_SUCCESS) { 2109 ql_dbg(ql_dbg_p3p, vha, 0xb077, 2110 "Error while setting DRV-Presence.\n"); 2111 rval = QLA_FUNCTION_FAILED; 2112 goto exit; 2113 } 2114 2115 /* Decide the reset ownership */ 2116 qla83xx_reset_ownership(vha); 2117 2118 /* 2119 * On first protocol driver load: 2120 * Init-Owner: Set IDC-Major-Version and Clear IDC-Lock-Recovery 2121 * register. 2122 * Others: Check compatibility with current IDC Major version. 2123 */ 2124 qla83xx_rd_reg(vha, QLA83XX_IDC_MAJOR_VERSION, &idc_major_ver); 2125 if (ha->flags.nic_core_reset_owner) { 2126 /* Set IDC Major version */ 2127 idc_major_ver = QLA83XX_SUPP_IDC_MAJOR_VERSION; 2128 qla83xx_wr_reg(vha, QLA83XX_IDC_MAJOR_VERSION, idc_major_ver); 2129 2130 /* Clearing IDC-Lock-Recovery register */ 2131 qla83xx_wr_reg(vha, QLA83XX_IDC_LOCK_RECOVERY, 0); 2132 } else if (idc_major_ver != QLA83XX_SUPP_IDC_MAJOR_VERSION) { 2133 /* 2134 * Clear further IDC participation if we are not compatible with 2135 * the current IDC Major Version. 2136 */ 2137 ql_log(ql_log_warn, vha, 0xb07d, 2138 "Failing load, idc_major_ver=%d, expected_major_ver=%d.\n", 2139 idc_major_ver, QLA83XX_SUPP_IDC_MAJOR_VERSION); 2140 __qla83xx_clear_drv_presence(vha); 2141 rval = QLA_FUNCTION_FAILED; 2142 goto exit; 2143 } 2144 /* Each function sets its supported Minor version. */ 2145 qla83xx_rd_reg(vha, QLA83XX_IDC_MINOR_VERSION, &idc_minor_ver); 2146 idc_minor_ver |= (QLA83XX_SUPP_IDC_MINOR_VERSION << (ha->portnum * 2)); 2147 qla83xx_wr_reg(vha, QLA83XX_IDC_MINOR_VERSION, idc_minor_ver); 2148 2149 if (ha->flags.nic_core_reset_owner) { 2150 memset(config, 0, sizeof(config)); 2151 if (!qla81xx_get_port_config(vha, config)) 2152 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, 2153 QLA8XXX_DEV_READY); 2154 } 2155 2156 rval = qla83xx_idc_state_handler(vha); 2157 2158 exit: 2159 qla83xx_idc_unlock(vha, 0); 2160 2161 return rval; 2162 } 2163 2164 /* 2165 * qla2x00_initialize_adapter 2166 * Initialize board. 2167 * 2168 * Input: 2169 * ha = adapter block pointer. 2170 * 2171 * Returns: 2172 * 0 = success 2173 */ 2174 int 2175 qla2x00_initialize_adapter(scsi_qla_host_t *vha) 2176 { 2177 int rval; 2178 struct qla_hw_data *ha = vha->hw; 2179 struct req_que *req = ha->req_q_map[0]; 2180 2181 memset(&vha->qla_stats, 0, sizeof(vha->qla_stats)); 2182 memset(&vha->fc_host_stat, 0, sizeof(vha->fc_host_stat)); 2183 2184 /* Clear adapter flags. */ 2185 vha->flags.online = 0; 2186 ha->flags.chip_reset_done = 0; 2187 vha->flags.reset_active = 0; 2188 ha->flags.pci_channel_io_perm_failure = 0; 2189 ha->flags.eeh_busy = 0; 2190 vha->qla_stats.jiffies_at_last_reset = get_jiffies_64(); 2191 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 2192 atomic_set(&vha->loop_state, LOOP_DOWN); 2193 vha->device_flags = DFLG_NO_CABLE; 2194 vha->dpc_flags = 0; 2195 vha->flags.management_server_logged_in = 0; 2196 vha->marker_needed = 0; 2197 ha->isp_abort_cnt = 0; 2198 ha->beacon_blink_led = 0; 2199 2200 set_bit(0, ha->req_qid_map); 2201 set_bit(0, ha->rsp_qid_map); 2202 2203 ql_dbg(ql_dbg_init, vha, 0x0040, 2204 "Configuring PCI space...\n"); 2205 rval = ha->isp_ops->pci_config(vha); 2206 if (rval) { 2207 ql_log(ql_log_warn, vha, 0x0044, 2208 "Unable to configure PCI space.\n"); 2209 return (rval); 2210 } 2211 2212 ha->isp_ops->reset_chip(vha); 2213 2214 rval = qla2xxx_get_flash_info(vha); 2215 if (rval) { 2216 ql_log(ql_log_fatal, vha, 0x004f, 2217 "Unable to validate FLASH data.\n"); 2218 return rval; 2219 } 2220 2221 if (IS_QLA8044(ha)) { 2222 qla8044_read_reset_template(vha); 2223 2224 /* NOTE: If ql2xdontresethba==1, set IDC_CTRL DONTRESET_BIT0. 2225 * If DONRESET_BIT0 is set, drivers should not set dev_state 2226 * to NEED_RESET. But if NEED_RESET is set, drivers should 2227 * should honor the reset. */ 2228 if (ql2xdontresethba == 1) 2229 qla8044_set_idc_dontreset(vha); 2230 } 2231 2232 ha->isp_ops->get_flash_version(vha, req->ring); 2233 ql_dbg(ql_dbg_init, vha, 0x0061, 2234 "Configure NVRAM parameters...\n"); 2235 2236 ha->isp_ops->nvram_config(vha); 2237 2238 if (ha->flags.disable_serdes) { 2239 /* Mask HBA via NVRAM settings? */ 2240 ql_log(ql_log_info, vha, 0x0077, 2241 "Masking HBA WWPN %8phN (via NVRAM).\n", vha->port_name); 2242 return QLA_FUNCTION_FAILED; 2243 } 2244 2245 ql_dbg(ql_dbg_init, vha, 0x0078, 2246 "Verifying loaded RISC code...\n"); 2247 2248 if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) { 2249 rval = ha->isp_ops->chip_diag(vha); 2250 if (rval) 2251 return (rval); 2252 rval = qla2x00_setup_chip(vha); 2253 if (rval) 2254 return (rval); 2255 } 2256 2257 if (IS_QLA84XX(ha)) { 2258 ha->cs84xx = qla84xx_get_chip(vha); 2259 if (!ha->cs84xx) { 2260 ql_log(ql_log_warn, vha, 0x00d0, 2261 "Unable to configure ISP84XX.\n"); 2262 return QLA_FUNCTION_FAILED; 2263 } 2264 } 2265 2266 if (qla_ini_mode_enabled(vha) || qla_dual_mode_enabled(vha)) 2267 rval = qla2x00_init_rings(vha); 2268 2269 ha->flags.chip_reset_done = 1; 2270 2271 if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) { 2272 /* Issue verify 84xx FW IOCB to complete 84xx initialization */ 2273 rval = qla84xx_init_chip(vha); 2274 if (rval != QLA_SUCCESS) { 2275 ql_log(ql_log_warn, vha, 0x00d4, 2276 "Unable to initialize ISP84XX.\n"); 2277 qla84xx_put_chip(vha); 2278 } 2279 } 2280 2281 /* Load the NIC Core f/w if we are the first protocol driver. */ 2282 if (IS_QLA8031(ha)) { 2283 rval = qla83xx_nic_core_fw_load(vha); 2284 if (rval) 2285 ql_log(ql_log_warn, vha, 0x0124, 2286 "Error in initializing NIC Core f/w.\n"); 2287 } 2288 2289 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha)) 2290 qla24xx_read_fcp_prio_cfg(vha); 2291 2292 if (IS_P3P_TYPE(ha)) 2293 qla82xx_set_driver_version(vha, QLA2XXX_VERSION); 2294 else 2295 qla25xx_set_driver_version(vha, QLA2XXX_VERSION); 2296 2297 return (rval); 2298 } 2299 2300 /** 2301 * qla2100_pci_config() - Setup ISP21xx PCI configuration registers. 2302 * @vha: HA context 2303 * 2304 * Returns 0 on success. 2305 */ 2306 int 2307 qla2100_pci_config(scsi_qla_host_t *vha) 2308 { 2309 uint16_t w; 2310 unsigned long flags; 2311 struct qla_hw_data *ha = vha->hw; 2312 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2313 2314 pci_set_master(ha->pdev); 2315 pci_try_set_mwi(ha->pdev); 2316 2317 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2318 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2319 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2320 2321 pci_disable_rom(ha->pdev); 2322 2323 /* Get PCI bus information. */ 2324 spin_lock_irqsave(&ha->hardware_lock, flags); 2325 ha->pci_attr = RD_REG_WORD(®->ctrl_status); 2326 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2327 2328 return QLA_SUCCESS; 2329 } 2330 2331 /** 2332 * qla2300_pci_config() - Setup ISP23xx PCI configuration registers. 2333 * @vha: HA context 2334 * 2335 * Returns 0 on success. 2336 */ 2337 int 2338 qla2300_pci_config(scsi_qla_host_t *vha) 2339 { 2340 uint16_t w; 2341 unsigned long flags = 0; 2342 uint32_t cnt; 2343 struct qla_hw_data *ha = vha->hw; 2344 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2345 2346 pci_set_master(ha->pdev); 2347 pci_try_set_mwi(ha->pdev); 2348 2349 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2350 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2351 2352 if (IS_QLA2322(ha) || IS_QLA6322(ha)) 2353 w &= ~PCI_COMMAND_INTX_DISABLE; 2354 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2355 2356 /* 2357 * If this is a 2300 card and not 2312, reset the 2358 * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately, 2359 * the 2310 also reports itself as a 2300 so we need to get the 2360 * fb revision level -- a 6 indicates it really is a 2300 and 2361 * not a 2310. 2362 */ 2363 if (IS_QLA2300(ha)) { 2364 spin_lock_irqsave(&ha->hardware_lock, flags); 2365 2366 /* Pause RISC. */ 2367 WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); 2368 for (cnt = 0; cnt < 30000; cnt++) { 2369 if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) != 0) 2370 break; 2371 2372 udelay(10); 2373 } 2374 2375 /* Select FPM registers. */ 2376 WRT_REG_WORD(®->ctrl_status, 0x20); 2377 RD_REG_WORD(®->ctrl_status); 2378 2379 /* Get the fb rev level */ 2380 ha->fb_rev = RD_FB_CMD_REG(ha, reg); 2381 2382 if (ha->fb_rev == FPM_2300) 2383 pci_clear_mwi(ha->pdev); 2384 2385 /* Deselect FPM registers. */ 2386 WRT_REG_WORD(®->ctrl_status, 0x0); 2387 RD_REG_WORD(®->ctrl_status); 2388 2389 /* Release RISC module. */ 2390 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 2391 for (cnt = 0; cnt < 30000; cnt++) { 2392 if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) == 0) 2393 break; 2394 2395 udelay(10); 2396 } 2397 2398 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2399 } 2400 2401 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); 2402 2403 pci_disable_rom(ha->pdev); 2404 2405 /* Get PCI bus information. */ 2406 spin_lock_irqsave(&ha->hardware_lock, flags); 2407 ha->pci_attr = RD_REG_WORD(®->ctrl_status); 2408 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2409 2410 return QLA_SUCCESS; 2411 } 2412 2413 /** 2414 * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers. 2415 * @vha: HA context 2416 * 2417 * Returns 0 on success. 2418 */ 2419 int 2420 qla24xx_pci_config(scsi_qla_host_t *vha) 2421 { 2422 uint16_t w; 2423 unsigned long flags = 0; 2424 struct qla_hw_data *ha = vha->hw; 2425 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 2426 2427 pci_set_master(ha->pdev); 2428 pci_try_set_mwi(ha->pdev); 2429 2430 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2431 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2432 w &= ~PCI_COMMAND_INTX_DISABLE; 2433 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2434 2435 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); 2436 2437 /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */ 2438 if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX)) 2439 pcix_set_mmrbc(ha->pdev, 2048); 2440 2441 /* PCIe -- adjust Maximum Read Request Size (2048). */ 2442 if (pci_is_pcie(ha->pdev)) 2443 pcie_set_readrq(ha->pdev, 4096); 2444 2445 pci_disable_rom(ha->pdev); 2446 2447 ha->chip_revision = ha->pdev->revision; 2448 2449 /* Get PCI bus information. */ 2450 spin_lock_irqsave(&ha->hardware_lock, flags); 2451 ha->pci_attr = RD_REG_DWORD(®->ctrl_status); 2452 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2453 2454 return QLA_SUCCESS; 2455 } 2456 2457 /** 2458 * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers. 2459 * @vha: HA context 2460 * 2461 * Returns 0 on success. 2462 */ 2463 int 2464 qla25xx_pci_config(scsi_qla_host_t *vha) 2465 { 2466 uint16_t w; 2467 struct qla_hw_data *ha = vha->hw; 2468 2469 pci_set_master(ha->pdev); 2470 pci_try_set_mwi(ha->pdev); 2471 2472 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); 2473 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); 2474 w &= ~PCI_COMMAND_INTX_DISABLE; 2475 pci_write_config_word(ha->pdev, PCI_COMMAND, w); 2476 2477 /* PCIe -- adjust Maximum Read Request Size (2048). */ 2478 if (pci_is_pcie(ha->pdev)) 2479 pcie_set_readrq(ha->pdev, 4096); 2480 2481 pci_disable_rom(ha->pdev); 2482 2483 ha->chip_revision = ha->pdev->revision; 2484 2485 return QLA_SUCCESS; 2486 } 2487 2488 /** 2489 * qla2x00_isp_firmware() - Choose firmware image. 2490 * @vha: HA context 2491 * 2492 * Returns 0 on success. 2493 */ 2494 static int 2495 qla2x00_isp_firmware(scsi_qla_host_t *vha) 2496 { 2497 int rval; 2498 uint16_t loop_id, topo, sw_cap; 2499 uint8_t domain, area, al_pa; 2500 struct qla_hw_data *ha = vha->hw; 2501 2502 /* Assume loading risc code */ 2503 rval = QLA_FUNCTION_FAILED; 2504 2505 if (ha->flags.disable_risc_code_load) { 2506 ql_log(ql_log_info, vha, 0x0079, "RISC CODE NOT loaded.\n"); 2507 2508 /* Verify checksum of loaded RISC code. */ 2509 rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address); 2510 if (rval == QLA_SUCCESS) { 2511 /* And, verify we are not in ROM code. */ 2512 rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa, 2513 &area, &domain, &topo, &sw_cap); 2514 } 2515 } 2516 2517 if (rval) 2518 ql_dbg(ql_dbg_init, vha, 0x007a, 2519 "**** Load RISC code ****.\n"); 2520 2521 return (rval); 2522 } 2523 2524 /** 2525 * qla2x00_reset_chip() - Reset ISP chip. 2526 * @vha: HA context 2527 * 2528 * Returns 0 on success. 2529 */ 2530 void 2531 qla2x00_reset_chip(scsi_qla_host_t *vha) 2532 { 2533 unsigned long flags = 0; 2534 struct qla_hw_data *ha = vha->hw; 2535 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2536 uint32_t cnt; 2537 uint16_t cmd; 2538 2539 if (unlikely(pci_channel_offline(ha->pdev))) 2540 return; 2541 2542 ha->isp_ops->disable_intrs(ha); 2543 2544 spin_lock_irqsave(&ha->hardware_lock, flags); 2545 2546 /* Turn off master enable */ 2547 cmd = 0; 2548 pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd); 2549 cmd &= ~PCI_COMMAND_MASTER; 2550 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); 2551 2552 if (!IS_QLA2100(ha)) { 2553 /* Pause RISC. */ 2554 WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); 2555 if (IS_QLA2200(ha) || IS_QLA2300(ha)) { 2556 for (cnt = 0; cnt < 30000; cnt++) { 2557 if ((RD_REG_WORD(®->hccr) & 2558 HCCR_RISC_PAUSE) != 0) 2559 break; 2560 udelay(100); 2561 } 2562 } else { 2563 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2564 udelay(10); 2565 } 2566 2567 /* Select FPM registers. */ 2568 WRT_REG_WORD(®->ctrl_status, 0x20); 2569 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ 2570 2571 /* FPM Soft Reset. */ 2572 WRT_REG_WORD(®->fpm_diag_config, 0x100); 2573 RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */ 2574 2575 /* Toggle Fpm Reset. */ 2576 if (!IS_QLA2200(ha)) { 2577 WRT_REG_WORD(®->fpm_diag_config, 0x0); 2578 RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */ 2579 } 2580 2581 /* Select frame buffer registers. */ 2582 WRT_REG_WORD(®->ctrl_status, 0x10); 2583 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ 2584 2585 /* Reset frame buffer FIFOs. */ 2586 if (IS_QLA2200(ha)) { 2587 WRT_FB_CMD_REG(ha, reg, 0xa000); 2588 RD_FB_CMD_REG(ha, reg); /* PCI Posting. */ 2589 } else { 2590 WRT_FB_CMD_REG(ha, reg, 0x00fc); 2591 2592 /* Read back fb_cmd until zero or 3 seconds max */ 2593 for (cnt = 0; cnt < 3000; cnt++) { 2594 if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0) 2595 break; 2596 udelay(100); 2597 } 2598 } 2599 2600 /* Select RISC module registers. */ 2601 WRT_REG_WORD(®->ctrl_status, 0); 2602 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ 2603 2604 /* Reset RISC processor. */ 2605 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 2606 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2607 2608 /* Release RISC processor. */ 2609 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 2610 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2611 } 2612 2613 WRT_REG_WORD(®->hccr, HCCR_CLR_RISC_INT); 2614 WRT_REG_WORD(®->hccr, HCCR_CLR_HOST_INT); 2615 2616 /* Reset ISP chip. */ 2617 WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET); 2618 2619 /* Wait for RISC to recover from reset. */ 2620 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 2621 /* 2622 * It is necessary to for a delay here since the card doesn't 2623 * respond to PCI reads during a reset. On some architectures 2624 * this will result in an MCA. 2625 */ 2626 udelay(20); 2627 for (cnt = 30000; cnt; cnt--) { 2628 if ((RD_REG_WORD(®->ctrl_status) & 2629 CSR_ISP_SOFT_RESET) == 0) 2630 break; 2631 udelay(100); 2632 } 2633 } else 2634 udelay(10); 2635 2636 /* Reset RISC processor. */ 2637 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 2638 2639 WRT_REG_WORD(®->semaphore, 0); 2640 2641 /* Release RISC processor. */ 2642 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 2643 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2644 2645 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 2646 for (cnt = 0; cnt < 30000; cnt++) { 2647 if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY) 2648 break; 2649 2650 udelay(100); 2651 } 2652 } else 2653 udelay(100); 2654 2655 /* Turn on master enable */ 2656 cmd |= PCI_COMMAND_MASTER; 2657 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); 2658 2659 /* Disable RISC pause on FPM parity error. */ 2660 if (!IS_QLA2100(ha)) { 2661 WRT_REG_WORD(®->hccr, HCCR_DISABLE_PARITY_PAUSE); 2662 RD_REG_WORD(®->hccr); /* PCI Posting. */ 2663 } 2664 2665 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2666 } 2667 2668 /** 2669 * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC. 2670 * @vha: HA context 2671 * 2672 * Returns 0 on success. 2673 */ 2674 static int 2675 qla81xx_reset_mpi(scsi_qla_host_t *vha) 2676 { 2677 uint16_t mb[4] = {0x1010, 0, 1, 0}; 2678 2679 if (!IS_QLA81XX(vha->hw)) 2680 return QLA_SUCCESS; 2681 2682 return qla81xx_write_mpi_register(vha, mb); 2683 } 2684 2685 /** 2686 * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC. 2687 * @vha: HA context 2688 * 2689 * Returns 0 on success. 2690 */ 2691 static inline int 2692 qla24xx_reset_risc(scsi_qla_host_t *vha) 2693 { 2694 unsigned long flags = 0; 2695 struct qla_hw_data *ha = vha->hw; 2696 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 2697 uint32_t cnt; 2698 uint16_t wd; 2699 static int abts_cnt; /* ISP abort retry counts */ 2700 int rval = QLA_SUCCESS; 2701 2702 spin_lock_irqsave(&ha->hardware_lock, flags); 2703 2704 /* Reset RISC. */ 2705 WRT_REG_DWORD(®->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); 2706 for (cnt = 0; cnt < 30000; cnt++) { 2707 if ((RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE) == 0) 2708 break; 2709 2710 udelay(10); 2711 } 2712 2713 if (!(RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE)) 2714 set_bit(DMA_SHUTDOWN_CMPL, &ha->fw_dump_cap_flags); 2715 2716 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017e, 2717 "HCCR: 0x%x, Control Status %x, DMA active status:0x%x\n", 2718 RD_REG_DWORD(®->hccr), 2719 RD_REG_DWORD(®->ctrl_status), 2720 (RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE)); 2721 2722 WRT_REG_DWORD(®->ctrl_status, 2723 CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); 2724 pci_read_config_word(ha->pdev, PCI_COMMAND, &wd); 2725 2726 udelay(100); 2727 2728 /* Wait for firmware to complete NVRAM accesses. */ 2729 RD_REG_WORD(®->mailbox0); 2730 for (cnt = 10000; RD_REG_WORD(®->mailbox0) != 0 && 2731 rval == QLA_SUCCESS; cnt--) { 2732 barrier(); 2733 if (cnt) 2734 udelay(5); 2735 else 2736 rval = QLA_FUNCTION_TIMEOUT; 2737 } 2738 2739 if (rval == QLA_SUCCESS) 2740 set_bit(ISP_MBX_RDY, &ha->fw_dump_cap_flags); 2741 2742 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017f, 2743 "HCCR: 0x%x, MailBox0 Status 0x%x\n", 2744 RD_REG_DWORD(®->hccr), 2745 RD_REG_DWORD(®->mailbox0)); 2746 2747 /* Wait for soft-reset to complete. */ 2748 RD_REG_DWORD(®->ctrl_status); 2749 for (cnt = 0; cnt < 60; cnt++) { 2750 barrier(); 2751 if ((RD_REG_DWORD(®->ctrl_status) & 2752 CSRX_ISP_SOFT_RESET) == 0) 2753 break; 2754 2755 udelay(5); 2756 } 2757 if (!(RD_REG_DWORD(®->ctrl_status) & CSRX_ISP_SOFT_RESET)) 2758 set_bit(ISP_SOFT_RESET_CMPL, &ha->fw_dump_cap_flags); 2759 2760 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015d, 2761 "HCCR: 0x%x, Soft Reset status: 0x%x\n", 2762 RD_REG_DWORD(®->hccr), 2763 RD_REG_DWORD(®->ctrl_status)); 2764 2765 /* If required, do an MPI FW reset now */ 2766 if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) { 2767 if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) { 2768 if (++abts_cnt < 5) { 2769 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 2770 set_bit(MPI_RESET_NEEDED, &vha->dpc_flags); 2771 } else { 2772 /* 2773 * We exhausted the ISP abort retries. We have to 2774 * set the board offline. 2775 */ 2776 abts_cnt = 0; 2777 vha->flags.online = 0; 2778 } 2779 } 2780 } 2781 2782 WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET); 2783 RD_REG_DWORD(®->hccr); 2784 2785 WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE); 2786 RD_REG_DWORD(®->hccr); 2787 2788 WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_RESET); 2789 RD_REG_DWORD(®->hccr); 2790 2791 RD_REG_WORD(®->mailbox0); 2792 for (cnt = 60; RD_REG_WORD(®->mailbox0) != 0 && 2793 rval == QLA_SUCCESS; cnt--) { 2794 barrier(); 2795 if (cnt) 2796 udelay(5); 2797 else 2798 rval = QLA_FUNCTION_TIMEOUT; 2799 } 2800 if (rval == QLA_SUCCESS) 2801 set_bit(RISC_RDY_AFT_RESET, &ha->fw_dump_cap_flags); 2802 2803 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015e, 2804 "Host Risc 0x%x, mailbox0 0x%x\n", 2805 RD_REG_DWORD(®->hccr), 2806 RD_REG_WORD(®->mailbox0)); 2807 2808 spin_unlock_irqrestore(&ha->hardware_lock, flags); 2809 2810 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015f, 2811 "Driver in %s mode\n", 2812 IS_NOPOLLING_TYPE(ha) ? "Interrupt" : "Polling"); 2813 2814 if (IS_NOPOLLING_TYPE(ha)) 2815 ha->isp_ops->enable_intrs(ha); 2816 2817 return rval; 2818 } 2819 2820 static void 2821 qla25xx_read_risc_sema_reg(scsi_qla_host_t *vha, uint32_t *data) 2822 { 2823 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24; 2824 2825 WRT_REG_DWORD(®->iobase_addr, RISC_REGISTER_BASE_OFFSET); 2826 *data = RD_REG_DWORD(®->iobase_window + RISC_REGISTER_WINDOW_OFFET); 2827 2828 } 2829 2830 static void 2831 qla25xx_write_risc_sema_reg(scsi_qla_host_t *vha, uint32_t data) 2832 { 2833 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24; 2834 2835 WRT_REG_DWORD(®->iobase_addr, RISC_REGISTER_BASE_OFFSET); 2836 WRT_REG_DWORD(®->iobase_window + RISC_REGISTER_WINDOW_OFFET, data); 2837 } 2838 2839 static void 2840 qla25xx_manipulate_risc_semaphore(scsi_qla_host_t *vha) 2841 { 2842 uint32_t wd32 = 0; 2843 uint delta_msec = 100; 2844 uint elapsed_msec = 0; 2845 uint timeout_msec; 2846 ulong n; 2847 2848 if (vha->hw->pdev->subsystem_device != 0x0175 && 2849 vha->hw->pdev->subsystem_device != 0x0240) 2850 return; 2851 2852 WRT_REG_DWORD(&vha->hw->iobase->isp24.hccr, HCCRX_SET_RISC_PAUSE); 2853 udelay(100); 2854 2855 attempt: 2856 timeout_msec = TIMEOUT_SEMAPHORE; 2857 n = timeout_msec / delta_msec; 2858 while (n--) { 2859 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_SET); 2860 qla25xx_read_risc_sema_reg(vha, &wd32); 2861 if (wd32 & RISC_SEMAPHORE) 2862 break; 2863 msleep(delta_msec); 2864 elapsed_msec += delta_msec; 2865 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED) 2866 goto force; 2867 } 2868 2869 if (!(wd32 & RISC_SEMAPHORE)) 2870 goto force; 2871 2872 if (!(wd32 & RISC_SEMAPHORE_FORCE)) 2873 goto acquired; 2874 2875 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_CLR); 2876 timeout_msec = TIMEOUT_SEMAPHORE_FORCE; 2877 n = timeout_msec / delta_msec; 2878 while (n--) { 2879 qla25xx_read_risc_sema_reg(vha, &wd32); 2880 if (!(wd32 & RISC_SEMAPHORE_FORCE)) 2881 break; 2882 msleep(delta_msec); 2883 elapsed_msec += delta_msec; 2884 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED) 2885 goto force; 2886 } 2887 2888 if (wd32 & RISC_SEMAPHORE_FORCE) 2889 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_CLR); 2890 2891 goto attempt; 2892 2893 force: 2894 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_SET); 2895 2896 acquired: 2897 return; 2898 } 2899 2900 /** 2901 * qla24xx_reset_chip() - Reset ISP24xx chip. 2902 * @vha: HA context 2903 * 2904 * Returns 0 on success. 2905 */ 2906 void 2907 qla24xx_reset_chip(scsi_qla_host_t *vha) 2908 { 2909 struct qla_hw_data *ha = vha->hw; 2910 2911 if (pci_channel_offline(ha->pdev) && 2912 ha->flags.pci_channel_io_perm_failure) { 2913 return; 2914 } 2915 2916 ha->isp_ops->disable_intrs(ha); 2917 2918 qla25xx_manipulate_risc_semaphore(vha); 2919 2920 /* Perform RISC reset. */ 2921 qla24xx_reset_risc(vha); 2922 } 2923 2924 /** 2925 * qla2x00_chip_diag() - Test chip for proper operation. 2926 * @vha: HA context 2927 * 2928 * Returns 0 on success. 2929 */ 2930 int 2931 qla2x00_chip_diag(scsi_qla_host_t *vha) 2932 { 2933 int rval; 2934 struct qla_hw_data *ha = vha->hw; 2935 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 2936 unsigned long flags = 0; 2937 uint16_t data; 2938 uint32_t cnt; 2939 uint16_t mb[5]; 2940 struct req_que *req = ha->req_q_map[0]; 2941 2942 /* Assume a failed state */ 2943 rval = QLA_FUNCTION_FAILED; 2944 2945 ql_dbg(ql_dbg_init, vha, 0x007b, "Testing device at %p.\n", 2946 ®->flash_address); 2947 2948 spin_lock_irqsave(&ha->hardware_lock, flags); 2949 2950 /* Reset ISP chip. */ 2951 WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET); 2952 2953 /* 2954 * We need to have a delay here since the card will not respond while 2955 * in reset causing an MCA on some architectures. 2956 */ 2957 udelay(20); 2958 data = qla2x00_debounce_register(®->ctrl_status); 2959 for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) { 2960 udelay(5); 2961 data = RD_REG_WORD(®->ctrl_status); 2962 barrier(); 2963 } 2964 2965 if (!cnt) 2966 goto chip_diag_failed; 2967 2968 ql_dbg(ql_dbg_init, vha, 0x007c, 2969 "Reset register cleared by chip reset.\n"); 2970 2971 /* Reset RISC processor. */ 2972 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 2973 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 2974 2975 /* Workaround for QLA2312 PCI parity error */ 2976 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { 2977 data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0)); 2978 for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) { 2979 udelay(5); 2980 data = RD_MAILBOX_REG(ha, reg, 0); 2981 barrier(); 2982 } 2983 } else 2984 udelay(10); 2985 2986 if (!cnt) 2987 goto chip_diag_failed; 2988 2989 /* Check product ID of chip */ 2990 ql_dbg(ql_dbg_init, vha, 0x007d, "Checking product ID of chip.\n"); 2991 2992 mb[1] = RD_MAILBOX_REG(ha, reg, 1); 2993 mb[2] = RD_MAILBOX_REG(ha, reg, 2); 2994 mb[3] = RD_MAILBOX_REG(ha, reg, 3); 2995 mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4)); 2996 if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) || 2997 mb[3] != PROD_ID_3) { 2998 ql_log(ql_log_warn, vha, 0x0062, 2999 "Wrong product ID = 0x%x,0x%x,0x%x.\n", 3000 mb[1], mb[2], mb[3]); 3001 3002 goto chip_diag_failed; 3003 } 3004 ha->product_id[0] = mb[1]; 3005 ha->product_id[1] = mb[2]; 3006 ha->product_id[2] = mb[3]; 3007 ha->product_id[3] = mb[4]; 3008 3009 /* Adjust fw RISC transfer size */ 3010 if (req->length > 1024) 3011 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024; 3012 else 3013 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 3014 req->length; 3015 3016 if (IS_QLA2200(ha) && 3017 RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) { 3018 /* Limit firmware transfer size with a 2200A */ 3019 ql_dbg(ql_dbg_init, vha, 0x007e, "Found QLA2200A Chip.\n"); 3020 3021 ha->device_type |= DT_ISP2200A; 3022 ha->fw_transfer_size = 128; 3023 } 3024 3025 /* Wrap Incoming Mailboxes Test. */ 3026 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3027 3028 ql_dbg(ql_dbg_init, vha, 0x007f, "Checking mailboxes.\n"); 3029 rval = qla2x00_mbx_reg_test(vha); 3030 if (rval) 3031 ql_log(ql_log_warn, vha, 0x0080, 3032 "Failed mailbox send register test.\n"); 3033 else 3034 /* Flag a successful rval */ 3035 rval = QLA_SUCCESS; 3036 spin_lock_irqsave(&ha->hardware_lock, flags); 3037 3038 chip_diag_failed: 3039 if (rval) 3040 ql_log(ql_log_info, vha, 0x0081, 3041 "Chip diagnostics **** FAILED ****.\n"); 3042 3043 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3044 3045 return (rval); 3046 } 3047 3048 /** 3049 * qla24xx_chip_diag() - Test ISP24xx for proper operation. 3050 * @vha: HA context 3051 * 3052 * Returns 0 on success. 3053 */ 3054 int 3055 qla24xx_chip_diag(scsi_qla_host_t *vha) 3056 { 3057 int rval; 3058 struct qla_hw_data *ha = vha->hw; 3059 struct req_que *req = ha->req_q_map[0]; 3060 3061 if (IS_P3P_TYPE(ha)) 3062 return QLA_SUCCESS; 3063 3064 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length; 3065 3066 rval = qla2x00_mbx_reg_test(vha); 3067 if (rval) { 3068 ql_log(ql_log_warn, vha, 0x0082, 3069 "Failed mailbox send register test.\n"); 3070 } else { 3071 /* Flag a successful rval */ 3072 rval = QLA_SUCCESS; 3073 } 3074 3075 return rval; 3076 } 3077 3078 static void 3079 qla2x00_alloc_offload_mem(scsi_qla_host_t *vha) 3080 { 3081 int rval; 3082 dma_addr_t tc_dma; 3083 void *tc; 3084 struct qla_hw_data *ha = vha->hw; 3085 3086 if (ha->eft) { 3087 ql_dbg(ql_dbg_init, vha, 0x00bd, 3088 "%s: Offload Mem is already allocated.\n", 3089 __func__); 3090 return; 3091 } 3092 3093 if (IS_FWI2_CAPABLE(ha)) { 3094 /* Allocate memory for Fibre Channel Event Buffer. */ 3095 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) && 3096 !IS_QLA27XX(ha)) 3097 goto try_eft; 3098 3099 if (ha->fce) 3100 dma_free_coherent(&ha->pdev->dev, 3101 FCE_SIZE, ha->fce, ha->fce_dma); 3102 3103 /* Allocate memory for Fibre Channel Event Buffer. */ 3104 tc = dma_zalloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma, 3105 GFP_KERNEL); 3106 if (!tc) { 3107 ql_log(ql_log_warn, vha, 0x00be, 3108 "Unable to allocate (%d KB) for FCE.\n", 3109 FCE_SIZE / 1024); 3110 goto try_eft; 3111 } 3112 3113 rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS, 3114 ha->fce_mb, &ha->fce_bufs); 3115 if (rval) { 3116 ql_log(ql_log_warn, vha, 0x00bf, 3117 "Unable to initialize FCE (%d).\n", rval); 3118 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc, 3119 tc_dma); 3120 ha->flags.fce_enabled = 0; 3121 goto try_eft; 3122 } 3123 ql_dbg(ql_dbg_init, vha, 0x00c0, 3124 "Allocate (%d KB) for FCE...\n", FCE_SIZE / 1024); 3125 3126 ha->flags.fce_enabled = 1; 3127 ha->fce_dma = tc_dma; 3128 ha->fce = tc; 3129 3130 try_eft: 3131 if (ha->eft) 3132 dma_free_coherent(&ha->pdev->dev, 3133 EFT_SIZE, ha->eft, ha->eft_dma); 3134 3135 /* Allocate memory for Extended Trace Buffer. */ 3136 tc = dma_zalloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma, 3137 GFP_KERNEL); 3138 if (!tc) { 3139 ql_log(ql_log_warn, vha, 0x00c1, 3140 "Unable to allocate (%d KB) for EFT.\n", 3141 EFT_SIZE / 1024); 3142 goto eft_err; 3143 } 3144 3145 rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS); 3146 if (rval) { 3147 ql_log(ql_log_warn, vha, 0x00c2, 3148 "Unable to initialize EFT (%d).\n", rval); 3149 dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc, 3150 tc_dma); 3151 goto eft_err; 3152 } 3153 ql_dbg(ql_dbg_init, vha, 0x00c3, 3154 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024); 3155 3156 ha->eft_dma = tc_dma; 3157 ha->eft = tc; 3158 } 3159 3160 eft_err: 3161 return; 3162 } 3163 3164 void 3165 qla2x00_alloc_fw_dump(scsi_qla_host_t *vha) 3166 { 3167 uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size, 3168 eft_size, fce_size, mq_size; 3169 struct qla_hw_data *ha = vha->hw; 3170 struct req_que *req = ha->req_q_map[0]; 3171 struct rsp_que *rsp = ha->rsp_q_map[0]; 3172 struct qla2xxx_fw_dump *fw_dump; 3173 3174 dump_size = fixed_size = mem_size = eft_size = fce_size = mq_size = 0; 3175 req_q_size = rsp_q_size = 0; 3176 3177 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { 3178 fixed_size = sizeof(struct qla2100_fw_dump); 3179 } else if (IS_QLA23XX(ha)) { 3180 fixed_size = offsetof(struct qla2300_fw_dump, data_ram); 3181 mem_size = (ha->fw_memory_size - 0x11000 + 1) * 3182 sizeof(uint16_t); 3183 } else if (IS_FWI2_CAPABLE(ha)) { 3184 if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) 3185 fixed_size = offsetof(struct qla83xx_fw_dump, ext_mem); 3186 else if (IS_QLA81XX(ha)) 3187 fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem); 3188 else if (IS_QLA25XX(ha)) 3189 fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem); 3190 else 3191 fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem); 3192 3193 mem_size = (ha->fw_memory_size - 0x100000 + 1) * 3194 sizeof(uint32_t); 3195 if (ha->mqenable) { 3196 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha)) 3197 mq_size = sizeof(struct qla2xxx_mq_chain); 3198 /* 3199 * Allocate maximum buffer size for all queues. 3200 * Resizing must be done at end-of-dump processing. 3201 */ 3202 mq_size += ha->max_req_queues * 3203 (req->length * sizeof(request_t)); 3204 mq_size += ha->max_rsp_queues * 3205 (rsp->length * sizeof(response_t)); 3206 } 3207 if (ha->tgt.atio_ring) 3208 mq_size += ha->tgt.atio_q_length * sizeof(request_t); 3209 /* Allocate memory for Fibre Channel Event Buffer. */ 3210 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) && 3211 !IS_QLA27XX(ha)) 3212 goto try_eft; 3213 3214 fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE; 3215 try_eft: 3216 ql_dbg(ql_dbg_init, vha, 0x00c3, 3217 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024); 3218 eft_size = EFT_SIZE; 3219 } 3220 3221 if (IS_QLA27XX(ha)) { 3222 if (!ha->fw_dump_template) { 3223 ql_log(ql_log_warn, vha, 0x00ba, 3224 "Failed missing fwdump template\n"); 3225 return; 3226 } 3227 dump_size = qla27xx_fwdt_calculate_dump_size(vha); 3228 ql_dbg(ql_dbg_init, vha, 0x00fa, 3229 "-> allocating fwdump (%x bytes)...\n", dump_size); 3230 goto allocate; 3231 } 3232 3233 req_q_size = req->length * sizeof(request_t); 3234 rsp_q_size = rsp->length * sizeof(response_t); 3235 dump_size = offsetof(struct qla2xxx_fw_dump, isp); 3236 dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size; 3237 ha->chain_offset = dump_size; 3238 dump_size += mq_size + fce_size; 3239 3240 if (ha->exchoffld_buf) 3241 dump_size += sizeof(struct qla2xxx_offld_chain) + 3242 ha->exchoffld_size; 3243 if (ha->exlogin_buf) 3244 dump_size += sizeof(struct qla2xxx_offld_chain) + 3245 ha->exlogin_size; 3246 3247 allocate: 3248 if (!ha->fw_dump_len || dump_size != ha->fw_dump_len) { 3249 fw_dump = vmalloc(dump_size); 3250 if (!fw_dump) { 3251 ql_log(ql_log_warn, vha, 0x00c4, 3252 "Unable to allocate (%d KB) for firmware dump.\n", 3253 dump_size / 1024); 3254 } else { 3255 if (ha->fw_dump) 3256 vfree(ha->fw_dump); 3257 ha->fw_dump = fw_dump; 3258 3259 ha->fw_dump_len = dump_size; 3260 ql_dbg(ql_dbg_init, vha, 0x00c5, 3261 "Allocated (%d KB) for firmware dump.\n", 3262 dump_size / 1024); 3263 3264 if (IS_QLA27XX(ha)) 3265 return; 3266 3267 ha->fw_dump->signature[0] = 'Q'; 3268 ha->fw_dump->signature[1] = 'L'; 3269 ha->fw_dump->signature[2] = 'G'; 3270 ha->fw_dump->signature[3] = 'C'; 3271 ha->fw_dump->version = htonl(1); 3272 3273 ha->fw_dump->fixed_size = htonl(fixed_size); 3274 ha->fw_dump->mem_size = htonl(mem_size); 3275 ha->fw_dump->req_q_size = htonl(req_q_size); 3276 ha->fw_dump->rsp_q_size = htonl(rsp_q_size); 3277 3278 ha->fw_dump->eft_size = htonl(eft_size); 3279 ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma)); 3280 ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma)); 3281 3282 ha->fw_dump->header_size = 3283 htonl(offsetof(struct qla2xxx_fw_dump, isp)); 3284 } 3285 } 3286 } 3287 3288 static int 3289 qla81xx_mpi_sync(scsi_qla_host_t *vha) 3290 { 3291 #define MPS_MASK 0xe0 3292 int rval; 3293 uint16_t dc; 3294 uint32_t dw; 3295 3296 if (!IS_QLA81XX(vha->hw)) 3297 return QLA_SUCCESS; 3298 3299 rval = qla2x00_write_ram_word(vha, 0x7c00, 1); 3300 if (rval != QLA_SUCCESS) { 3301 ql_log(ql_log_warn, vha, 0x0105, 3302 "Unable to acquire semaphore.\n"); 3303 goto done; 3304 } 3305 3306 pci_read_config_word(vha->hw->pdev, 0x54, &dc); 3307 rval = qla2x00_read_ram_word(vha, 0x7a15, &dw); 3308 if (rval != QLA_SUCCESS) { 3309 ql_log(ql_log_warn, vha, 0x0067, "Unable to read sync.\n"); 3310 goto done_release; 3311 } 3312 3313 dc &= MPS_MASK; 3314 if (dc == (dw & MPS_MASK)) 3315 goto done_release; 3316 3317 dw &= ~MPS_MASK; 3318 dw |= dc; 3319 rval = qla2x00_write_ram_word(vha, 0x7a15, dw); 3320 if (rval != QLA_SUCCESS) { 3321 ql_log(ql_log_warn, vha, 0x0114, "Unable to gain sync.\n"); 3322 } 3323 3324 done_release: 3325 rval = qla2x00_write_ram_word(vha, 0x7c00, 0); 3326 if (rval != QLA_SUCCESS) { 3327 ql_log(ql_log_warn, vha, 0x006d, 3328 "Unable to release semaphore.\n"); 3329 } 3330 3331 done: 3332 return rval; 3333 } 3334 3335 int 3336 qla2x00_alloc_outstanding_cmds(struct qla_hw_data *ha, struct req_que *req) 3337 { 3338 /* Don't try to reallocate the array */ 3339 if (req->outstanding_cmds) 3340 return QLA_SUCCESS; 3341 3342 if (!IS_FWI2_CAPABLE(ha)) 3343 req->num_outstanding_cmds = DEFAULT_OUTSTANDING_COMMANDS; 3344 else { 3345 if (ha->cur_fw_xcb_count <= ha->cur_fw_iocb_count) 3346 req->num_outstanding_cmds = ha->cur_fw_xcb_count; 3347 else 3348 req->num_outstanding_cmds = ha->cur_fw_iocb_count; 3349 } 3350 3351 req->outstanding_cmds = kcalloc(req->num_outstanding_cmds, 3352 sizeof(srb_t *), 3353 GFP_KERNEL); 3354 3355 if (!req->outstanding_cmds) { 3356 /* 3357 * Try to allocate a minimal size just so we can get through 3358 * initialization. 3359 */ 3360 req->num_outstanding_cmds = MIN_OUTSTANDING_COMMANDS; 3361 req->outstanding_cmds = kcalloc(req->num_outstanding_cmds, 3362 sizeof(srb_t *), 3363 GFP_KERNEL); 3364 3365 if (!req->outstanding_cmds) { 3366 ql_log(ql_log_fatal, NULL, 0x0126, 3367 "Failed to allocate memory for " 3368 "outstanding_cmds for req_que %p.\n", req); 3369 req->num_outstanding_cmds = 0; 3370 return QLA_FUNCTION_FAILED; 3371 } 3372 } 3373 3374 return QLA_SUCCESS; 3375 } 3376 3377 #define PRINT_FIELD(_field, _flag, _str) { \ 3378 if (a0->_field & _flag) {\ 3379 if (p) {\ 3380 strcat(ptr, "|");\ 3381 ptr++;\ 3382 leftover--;\ 3383 } \ 3384 len = snprintf(ptr, leftover, "%s", _str); \ 3385 p = 1;\ 3386 leftover -= len;\ 3387 ptr += len; \ 3388 } \ 3389 } 3390 3391 static void qla2xxx_print_sfp_info(struct scsi_qla_host *vha) 3392 { 3393 #define STR_LEN 64 3394 struct sff_8247_a0 *a0 = (struct sff_8247_a0 *)vha->hw->sfp_data; 3395 u8 str[STR_LEN], *ptr, p; 3396 int leftover, len; 3397 3398 memset(str, 0, STR_LEN); 3399 snprintf(str, SFF_VEN_NAME_LEN+1, a0->vendor_name); 3400 ql_dbg(ql_dbg_init, vha, 0x015a, 3401 "SFP MFG Name: %s\n", str); 3402 3403 memset(str, 0, STR_LEN); 3404 snprintf(str, SFF_PART_NAME_LEN+1, a0->vendor_pn); 3405 ql_dbg(ql_dbg_init, vha, 0x015c, 3406 "SFP Part Name: %s\n", str); 3407 3408 /* media */ 3409 memset(str, 0, STR_LEN); 3410 ptr = str; 3411 leftover = STR_LEN; 3412 p = len = 0; 3413 PRINT_FIELD(fc_med_cc9, FC_MED_TW, "Twin AX"); 3414 PRINT_FIELD(fc_med_cc9, FC_MED_TP, "Twisted Pair"); 3415 PRINT_FIELD(fc_med_cc9, FC_MED_MI, "Min Coax"); 3416 PRINT_FIELD(fc_med_cc9, FC_MED_TV, "Video Coax"); 3417 PRINT_FIELD(fc_med_cc9, FC_MED_M6, "MultiMode 62.5um"); 3418 PRINT_FIELD(fc_med_cc9, FC_MED_M5, "MultiMode 50um"); 3419 PRINT_FIELD(fc_med_cc9, FC_MED_SM, "SingleMode"); 3420 ql_dbg(ql_dbg_init, vha, 0x0160, 3421 "SFP Media: %s\n", str); 3422 3423 /* link length */ 3424 memset(str, 0, STR_LEN); 3425 ptr = str; 3426 leftover = STR_LEN; 3427 p = len = 0; 3428 PRINT_FIELD(fc_ll_cc7, FC_LL_VL, "Very Long"); 3429 PRINT_FIELD(fc_ll_cc7, FC_LL_S, "Short"); 3430 PRINT_FIELD(fc_ll_cc7, FC_LL_I, "Intermediate"); 3431 PRINT_FIELD(fc_ll_cc7, FC_LL_L, "Long"); 3432 PRINT_FIELD(fc_ll_cc7, FC_LL_M, "Medium"); 3433 ql_dbg(ql_dbg_init, vha, 0x0196, 3434 "SFP Link Length: %s\n", str); 3435 3436 memset(str, 0, STR_LEN); 3437 ptr = str; 3438 leftover = STR_LEN; 3439 p = len = 0; 3440 PRINT_FIELD(fc_ll_cc7, FC_LL_SA, "Short Wave (SA)"); 3441 PRINT_FIELD(fc_ll_cc7, FC_LL_LC, "Long Wave(LC)"); 3442 PRINT_FIELD(fc_tec_cc8, FC_TEC_SN, "Short Wave (SN)"); 3443 PRINT_FIELD(fc_tec_cc8, FC_TEC_SL, "Short Wave (SL)"); 3444 PRINT_FIELD(fc_tec_cc8, FC_TEC_LL, "Long Wave (LL)"); 3445 ql_dbg(ql_dbg_init, vha, 0x016e, 3446 "SFP FC Link Tech: %s\n", str); 3447 3448 if (a0->length_km) 3449 ql_dbg(ql_dbg_init, vha, 0x016f, 3450 "SFP Distant: %d km\n", a0->length_km); 3451 if (a0->length_100m) 3452 ql_dbg(ql_dbg_init, vha, 0x0170, 3453 "SFP Distant: %d m\n", a0->length_100m*100); 3454 if (a0->length_50um_10m) 3455 ql_dbg(ql_dbg_init, vha, 0x0189, 3456 "SFP Distant (WL=50um): %d m\n", a0->length_50um_10m * 10); 3457 if (a0->length_62um_10m) 3458 ql_dbg(ql_dbg_init, vha, 0x018a, 3459 "SFP Distant (WL=62.5um): %d m\n", a0->length_62um_10m * 10); 3460 if (a0->length_om4_10m) 3461 ql_dbg(ql_dbg_init, vha, 0x0194, 3462 "SFP Distant (OM4): %d m\n", a0->length_om4_10m * 10); 3463 if (a0->length_om3_10m) 3464 ql_dbg(ql_dbg_init, vha, 0x0195, 3465 "SFP Distant (OM3): %d m\n", a0->length_om3_10m * 10); 3466 } 3467 3468 3469 /* 3470 * Return Code: 3471 * QLA_SUCCESS: no action 3472 * QLA_INTERFACE_ERROR: SFP is not there. 3473 * QLA_FUNCTION_FAILED: detected New SFP 3474 */ 3475 int 3476 qla24xx_detect_sfp(scsi_qla_host_t *vha) 3477 { 3478 int rc = QLA_SUCCESS; 3479 struct sff_8247_a0 *a; 3480 struct qla_hw_data *ha = vha->hw; 3481 3482 if (!AUTO_DETECT_SFP_SUPPORT(vha)) 3483 goto out; 3484 3485 rc = qla2x00_read_sfp_dev(vha, NULL, 0); 3486 if (rc) 3487 goto out; 3488 3489 a = (struct sff_8247_a0 *)vha->hw->sfp_data; 3490 qla2xxx_print_sfp_info(vha); 3491 3492 if (a->fc_ll_cc7 & FC_LL_VL || a->fc_ll_cc7 & FC_LL_L) { 3493 /* long range */ 3494 ha->flags.detected_lr_sfp = 1; 3495 3496 if (a->length_km > 5 || a->length_100m > 50) 3497 ha->long_range_distance = LR_DISTANCE_10K; 3498 else 3499 ha->long_range_distance = LR_DISTANCE_5K; 3500 3501 if (ha->flags.detected_lr_sfp != ha->flags.using_lr_setting) 3502 ql_dbg(ql_dbg_async, vha, 0x507b, 3503 "Detected Long Range SFP.\n"); 3504 } else { 3505 /* short range */ 3506 ha->flags.detected_lr_sfp = 0; 3507 if (ha->flags.using_lr_setting) 3508 ql_dbg(ql_dbg_async, vha, 0x5084, 3509 "Detected Short Range SFP.\n"); 3510 } 3511 3512 if (!vha->flags.init_done) 3513 rc = QLA_SUCCESS; 3514 out: 3515 return rc; 3516 } 3517 3518 /** 3519 * qla2x00_setup_chip() - Load and start RISC firmware. 3520 * @vha: HA context 3521 * 3522 * Returns 0 on success. 3523 */ 3524 static int 3525 qla2x00_setup_chip(scsi_qla_host_t *vha) 3526 { 3527 int rval; 3528 uint32_t srisc_address = 0; 3529 struct qla_hw_data *ha = vha->hw; 3530 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 3531 unsigned long flags; 3532 uint16_t fw_major_version; 3533 3534 if (IS_P3P_TYPE(ha)) { 3535 rval = ha->isp_ops->load_risc(vha, &srisc_address); 3536 if (rval == QLA_SUCCESS) { 3537 qla2x00_stop_firmware(vha); 3538 goto enable_82xx_npiv; 3539 } else 3540 goto failed; 3541 } 3542 3543 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { 3544 /* Disable SRAM, Instruction RAM and GP RAM parity. */ 3545 spin_lock_irqsave(&ha->hardware_lock, flags); 3546 WRT_REG_WORD(®->hccr, (HCCR_ENABLE_PARITY + 0x0)); 3547 RD_REG_WORD(®->hccr); 3548 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3549 } 3550 3551 qla81xx_mpi_sync(vha); 3552 3553 /* Load firmware sequences */ 3554 rval = ha->isp_ops->load_risc(vha, &srisc_address); 3555 if (rval == QLA_SUCCESS) { 3556 ql_dbg(ql_dbg_init, vha, 0x00c9, 3557 "Verifying Checksum of loaded RISC code.\n"); 3558 3559 rval = qla2x00_verify_checksum(vha, srisc_address); 3560 if (rval == QLA_SUCCESS) { 3561 /* Start firmware execution. */ 3562 ql_dbg(ql_dbg_init, vha, 0x00ca, 3563 "Starting firmware.\n"); 3564 3565 if (ql2xexlogins) 3566 ha->flags.exlogins_enabled = 1; 3567 3568 if (qla_is_exch_offld_enabled(vha)) 3569 ha->flags.exchoffld_enabled = 1; 3570 3571 rval = qla2x00_execute_fw(vha, srisc_address); 3572 /* Retrieve firmware information. */ 3573 if (rval == QLA_SUCCESS) { 3574 qla24xx_detect_sfp(vha); 3575 3576 if ((IS_QLA83XX(ha) || IS_QLA27XX(ha)) && 3577 (ha->zio_mode == QLA_ZIO_MODE_6)) 3578 qla27xx_set_zio_threshold(vha, 3579 ha->last_zio_threshold); 3580 3581 rval = qla2x00_set_exlogins_buffer(vha); 3582 if (rval != QLA_SUCCESS) 3583 goto failed; 3584 3585 rval = qla2x00_set_exchoffld_buffer(vha); 3586 if (rval != QLA_SUCCESS) 3587 goto failed; 3588 3589 enable_82xx_npiv: 3590 fw_major_version = ha->fw_major_version; 3591 if (IS_P3P_TYPE(ha)) 3592 qla82xx_check_md_needed(vha); 3593 else 3594 rval = qla2x00_get_fw_version(vha); 3595 if (rval != QLA_SUCCESS) 3596 goto failed; 3597 ha->flags.npiv_supported = 0; 3598 if (IS_QLA2XXX_MIDTYPE(ha) && 3599 (ha->fw_attributes & BIT_2)) { 3600 ha->flags.npiv_supported = 1; 3601 if ((!ha->max_npiv_vports) || 3602 ((ha->max_npiv_vports + 1) % 3603 MIN_MULTI_ID_FABRIC)) 3604 ha->max_npiv_vports = 3605 MIN_MULTI_ID_FABRIC - 1; 3606 } 3607 qla2x00_get_resource_cnts(vha); 3608 3609 /* 3610 * Allocate the array of outstanding commands 3611 * now that we know the firmware resources. 3612 */ 3613 rval = qla2x00_alloc_outstanding_cmds(ha, 3614 vha->req); 3615 if (rval != QLA_SUCCESS) 3616 goto failed; 3617 3618 if (!fw_major_version && !(IS_P3P_TYPE(ha))) 3619 qla2x00_alloc_offload_mem(vha); 3620 3621 if (ql2xallocfwdump && !(IS_P3P_TYPE(ha))) 3622 qla2x00_alloc_fw_dump(vha); 3623 3624 } else { 3625 goto failed; 3626 } 3627 } else { 3628 ql_log(ql_log_fatal, vha, 0x00cd, 3629 "ISP Firmware failed checksum.\n"); 3630 goto failed; 3631 } 3632 } else 3633 goto failed; 3634 3635 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { 3636 /* Enable proper parity. */ 3637 spin_lock_irqsave(&ha->hardware_lock, flags); 3638 if (IS_QLA2300(ha)) 3639 /* SRAM parity */ 3640 WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x1); 3641 else 3642 /* SRAM, Instruction RAM and GP RAM parity */ 3643 WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x7); 3644 RD_REG_WORD(®->hccr); 3645 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3646 } 3647 3648 if (IS_QLA27XX(ha)) 3649 ha->flags.fac_supported = 1; 3650 else if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) { 3651 uint32_t size; 3652 3653 rval = qla81xx_fac_get_sector_size(vha, &size); 3654 if (rval == QLA_SUCCESS) { 3655 ha->flags.fac_supported = 1; 3656 ha->fdt_block_size = size << 2; 3657 } else { 3658 ql_log(ql_log_warn, vha, 0x00ce, 3659 "Unsupported FAC firmware (%d.%02d.%02d).\n", 3660 ha->fw_major_version, ha->fw_minor_version, 3661 ha->fw_subminor_version); 3662 3663 if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) { 3664 ha->flags.fac_supported = 0; 3665 rval = QLA_SUCCESS; 3666 } 3667 } 3668 } 3669 failed: 3670 if (rval) { 3671 ql_log(ql_log_fatal, vha, 0x00cf, 3672 "Setup chip ****FAILED****.\n"); 3673 } 3674 3675 return (rval); 3676 } 3677 3678 /** 3679 * qla2x00_init_response_q_entries() - Initializes response queue entries. 3680 * @rsp: response queue 3681 * 3682 * Beginning of request ring has initialization control block already built 3683 * by nvram config routine. 3684 * 3685 * Returns 0 on success. 3686 */ 3687 void 3688 qla2x00_init_response_q_entries(struct rsp_que *rsp) 3689 { 3690 uint16_t cnt; 3691 response_t *pkt; 3692 3693 rsp->ring_ptr = rsp->ring; 3694 rsp->ring_index = 0; 3695 rsp->status_srb = NULL; 3696 pkt = rsp->ring_ptr; 3697 for (cnt = 0; cnt < rsp->length; cnt++) { 3698 pkt->signature = RESPONSE_PROCESSED; 3699 pkt++; 3700 } 3701 } 3702 3703 /** 3704 * qla2x00_update_fw_options() - Read and process firmware options. 3705 * @vha: HA context 3706 * 3707 * Returns 0 on success. 3708 */ 3709 void 3710 qla2x00_update_fw_options(scsi_qla_host_t *vha) 3711 { 3712 uint16_t swing, emphasis, tx_sens, rx_sens; 3713 struct qla_hw_data *ha = vha->hw; 3714 3715 memset(ha->fw_options, 0, sizeof(ha->fw_options)); 3716 qla2x00_get_fw_options(vha, ha->fw_options); 3717 3718 if (IS_QLA2100(ha) || IS_QLA2200(ha)) 3719 return; 3720 3721 /* Serial Link options. */ 3722 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115, 3723 "Serial link options.\n"); 3724 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109, 3725 (uint8_t *)&ha->fw_seriallink_options, 3726 sizeof(ha->fw_seriallink_options)); 3727 3728 ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING; 3729 if (ha->fw_seriallink_options[3] & BIT_2) { 3730 ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING; 3731 3732 /* 1G settings */ 3733 swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0); 3734 emphasis = (ha->fw_seriallink_options[2] & 3735 (BIT_4 | BIT_3)) >> 3; 3736 tx_sens = ha->fw_seriallink_options[0] & 3737 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 3738 rx_sens = (ha->fw_seriallink_options[0] & 3739 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; 3740 ha->fw_options[10] = (emphasis << 14) | (swing << 8); 3741 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { 3742 if (rx_sens == 0x0) 3743 rx_sens = 0x3; 3744 ha->fw_options[10] |= (tx_sens << 4) | rx_sens; 3745 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) 3746 ha->fw_options[10] |= BIT_5 | 3747 ((rx_sens & (BIT_1 | BIT_0)) << 2) | 3748 (tx_sens & (BIT_1 | BIT_0)); 3749 3750 /* 2G settings */ 3751 swing = (ha->fw_seriallink_options[2] & 3752 (BIT_7 | BIT_6 | BIT_5)) >> 5; 3753 emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0); 3754 tx_sens = ha->fw_seriallink_options[1] & 3755 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 3756 rx_sens = (ha->fw_seriallink_options[1] & 3757 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; 3758 ha->fw_options[11] = (emphasis << 14) | (swing << 8); 3759 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { 3760 if (rx_sens == 0x0) 3761 rx_sens = 0x3; 3762 ha->fw_options[11] |= (tx_sens << 4) | rx_sens; 3763 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) 3764 ha->fw_options[11] |= BIT_5 | 3765 ((rx_sens & (BIT_1 | BIT_0)) << 2) | 3766 (tx_sens & (BIT_1 | BIT_0)); 3767 } 3768 3769 /* FCP2 options. */ 3770 /* Return command IOCBs without waiting for an ABTS to complete. */ 3771 ha->fw_options[3] |= BIT_13; 3772 3773 /* LED scheme. */ 3774 if (ha->flags.enable_led_scheme) 3775 ha->fw_options[2] |= BIT_12; 3776 3777 /* Detect ISP6312. */ 3778 if (IS_QLA6312(ha)) 3779 ha->fw_options[2] |= BIT_13; 3780 3781 /* Set Retry FLOGI in case of P2P connection */ 3782 if (ha->operating_mode == P2P) { 3783 ha->fw_options[2] |= BIT_3; 3784 ql_dbg(ql_dbg_disc, vha, 0x2100, 3785 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n", 3786 __func__, ha->fw_options[2]); 3787 } 3788 3789 /* Update firmware options. */ 3790 qla2x00_set_fw_options(vha, ha->fw_options); 3791 } 3792 3793 void 3794 qla24xx_update_fw_options(scsi_qla_host_t *vha) 3795 { 3796 int rval; 3797 struct qla_hw_data *ha = vha->hw; 3798 3799 if (IS_P3P_TYPE(ha)) 3800 return; 3801 3802 /* Hold status IOCBs until ABTS response received. */ 3803 if (ql2xfwholdabts) 3804 ha->fw_options[3] |= BIT_12; 3805 3806 /* Set Retry FLOGI in case of P2P connection */ 3807 if (ha->operating_mode == P2P) { 3808 ha->fw_options[2] |= BIT_3; 3809 ql_dbg(ql_dbg_disc, vha, 0x2101, 3810 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n", 3811 __func__, ha->fw_options[2]); 3812 } 3813 3814 /* Move PUREX, ABTS RX & RIDA to ATIOQ */ 3815 if (ql2xmvasynctoatio && 3816 (IS_QLA83XX(ha) || IS_QLA27XX(ha))) { 3817 if (qla_tgt_mode_enabled(vha) || 3818 qla_dual_mode_enabled(vha)) 3819 ha->fw_options[2] |= BIT_11; 3820 else 3821 ha->fw_options[2] &= ~BIT_11; 3822 } 3823 3824 if (IS_QLA25XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha)) { 3825 /* 3826 * Tell FW to track each exchange to prevent 3827 * driver from using stale exchange. 3828 */ 3829 if (qla_tgt_mode_enabled(vha) || 3830 qla_dual_mode_enabled(vha)) 3831 ha->fw_options[2] |= BIT_4; 3832 else 3833 ha->fw_options[2] &= ~BIT_4; 3834 3835 /* Reserve 1/2 of emergency exchanges for ELS.*/ 3836 if (qla2xuseresexchforels) 3837 ha->fw_options[2] |= BIT_8; 3838 else 3839 ha->fw_options[2] &= ~BIT_8; 3840 } 3841 3842 ql_dbg(ql_dbg_init, vha, 0x00e8, 3843 "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n", 3844 __func__, ha->fw_options[1], ha->fw_options[2], 3845 ha->fw_options[3], vha->host->active_mode); 3846 3847 if (ha->fw_options[1] || ha->fw_options[2] || ha->fw_options[3]) 3848 qla2x00_set_fw_options(vha, ha->fw_options); 3849 3850 /* Update Serial Link options. */ 3851 if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0) 3852 return; 3853 3854 rval = qla2x00_set_serdes_params(vha, 3855 le16_to_cpu(ha->fw_seriallink_options24[1]), 3856 le16_to_cpu(ha->fw_seriallink_options24[2]), 3857 le16_to_cpu(ha->fw_seriallink_options24[3])); 3858 if (rval != QLA_SUCCESS) { 3859 ql_log(ql_log_warn, vha, 0x0104, 3860 "Unable to update Serial Link options (%x).\n", rval); 3861 } 3862 } 3863 3864 void 3865 qla2x00_config_rings(struct scsi_qla_host *vha) 3866 { 3867 struct qla_hw_data *ha = vha->hw; 3868 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 3869 struct req_que *req = ha->req_q_map[0]; 3870 struct rsp_que *rsp = ha->rsp_q_map[0]; 3871 3872 /* Setup ring parameters in initialization control block. */ 3873 ha->init_cb->request_q_outpointer = cpu_to_le16(0); 3874 ha->init_cb->response_q_inpointer = cpu_to_le16(0); 3875 ha->init_cb->request_q_length = cpu_to_le16(req->length); 3876 ha->init_cb->response_q_length = cpu_to_le16(rsp->length); 3877 ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma)); 3878 ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma)); 3879 ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma)); 3880 ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma)); 3881 3882 WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0); 3883 WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0); 3884 WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0); 3885 WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0); 3886 RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */ 3887 } 3888 3889 void 3890 qla24xx_config_rings(struct scsi_qla_host *vha) 3891 { 3892 struct qla_hw_data *ha = vha->hw; 3893 device_reg_t *reg = ISP_QUE_REG(ha, 0); 3894 struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp; 3895 struct qla_msix_entry *msix; 3896 struct init_cb_24xx *icb; 3897 uint16_t rid = 0; 3898 struct req_que *req = ha->req_q_map[0]; 3899 struct rsp_que *rsp = ha->rsp_q_map[0]; 3900 3901 /* Setup ring parameters in initialization control block. */ 3902 icb = (struct init_cb_24xx *)ha->init_cb; 3903 icb->request_q_outpointer = cpu_to_le16(0); 3904 icb->response_q_inpointer = cpu_to_le16(0); 3905 icb->request_q_length = cpu_to_le16(req->length); 3906 icb->response_q_length = cpu_to_le16(rsp->length); 3907 icb->request_q_address[0] = cpu_to_le32(LSD(req->dma)); 3908 icb->request_q_address[1] = cpu_to_le32(MSD(req->dma)); 3909 icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma)); 3910 icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma)); 3911 3912 /* Setup ATIO queue dma pointers for target mode */ 3913 icb->atio_q_inpointer = cpu_to_le16(0); 3914 icb->atio_q_length = cpu_to_le16(ha->tgt.atio_q_length); 3915 icb->atio_q_address[0] = cpu_to_le32(LSD(ha->tgt.atio_dma)); 3916 icb->atio_q_address[1] = cpu_to_le32(MSD(ha->tgt.atio_dma)); 3917 3918 if (IS_SHADOW_REG_CAPABLE(ha)) 3919 icb->firmware_options_2 |= cpu_to_le32(BIT_30|BIT_29); 3920 3921 if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha)) { 3922 icb->qos = cpu_to_le16(QLA_DEFAULT_QUE_QOS); 3923 icb->rid = cpu_to_le16(rid); 3924 if (ha->flags.msix_enabled) { 3925 msix = &ha->msix_entries[1]; 3926 ql_dbg(ql_dbg_init, vha, 0x0019, 3927 "Registering vector 0x%x for base que.\n", 3928 msix->entry); 3929 icb->msix = cpu_to_le16(msix->entry); 3930 } 3931 /* Use alternate PCI bus number */ 3932 if (MSB(rid)) 3933 icb->firmware_options_2 |= cpu_to_le32(BIT_19); 3934 /* Use alternate PCI devfn */ 3935 if (LSB(rid)) 3936 icb->firmware_options_2 |= cpu_to_le32(BIT_18); 3937 3938 /* Use Disable MSIX Handshake mode for capable adapters */ 3939 if ((ha->fw_attributes & BIT_6) && (IS_MSIX_NACK_CAPABLE(ha)) && 3940 (ha->flags.msix_enabled)) { 3941 icb->firmware_options_2 &= cpu_to_le32(~BIT_22); 3942 ha->flags.disable_msix_handshake = 1; 3943 ql_dbg(ql_dbg_init, vha, 0x00fe, 3944 "MSIX Handshake Disable Mode turned on.\n"); 3945 } else { 3946 icb->firmware_options_2 |= cpu_to_le32(BIT_22); 3947 } 3948 icb->firmware_options_2 |= cpu_to_le32(BIT_23); 3949 3950 WRT_REG_DWORD(®->isp25mq.req_q_in, 0); 3951 WRT_REG_DWORD(®->isp25mq.req_q_out, 0); 3952 WRT_REG_DWORD(®->isp25mq.rsp_q_in, 0); 3953 WRT_REG_DWORD(®->isp25mq.rsp_q_out, 0); 3954 } else { 3955 WRT_REG_DWORD(®->isp24.req_q_in, 0); 3956 WRT_REG_DWORD(®->isp24.req_q_out, 0); 3957 WRT_REG_DWORD(®->isp24.rsp_q_in, 0); 3958 WRT_REG_DWORD(®->isp24.rsp_q_out, 0); 3959 } 3960 qlt_24xx_config_rings(vha); 3961 3962 /* PCI posting */ 3963 RD_REG_DWORD(&ioreg->hccr); 3964 } 3965 3966 /** 3967 * qla2x00_init_rings() - Initializes firmware. 3968 * @vha: HA context 3969 * 3970 * Beginning of request ring has initialization control block already built 3971 * by nvram config routine. 3972 * 3973 * Returns 0 on success. 3974 */ 3975 int 3976 qla2x00_init_rings(scsi_qla_host_t *vha) 3977 { 3978 int rval; 3979 unsigned long flags = 0; 3980 int cnt, que; 3981 struct qla_hw_data *ha = vha->hw; 3982 struct req_que *req; 3983 struct rsp_que *rsp; 3984 struct mid_init_cb_24xx *mid_init_cb = 3985 (struct mid_init_cb_24xx *) ha->init_cb; 3986 3987 spin_lock_irqsave(&ha->hardware_lock, flags); 3988 3989 /* Clear outstanding commands array. */ 3990 for (que = 0; que < ha->max_req_queues; que++) { 3991 req = ha->req_q_map[que]; 3992 if (!req || !test_bit(que, ha->req_qid_map)) 3993 continue; 3994 req->out_ptr = (void *)(req->ring + req->length); 3995 *req->out_ptr = 0; 3996 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) 3997 req->outstanding_cmds[cnt] = NULL; 3998 3999 req->current_outstanding_cmd = 1; 4000 4001 /* Initialize firmware. */ 4002 req->ring_ptr = req->ring; 4003 req->ring_index = 0; 4004 req->cnt = req->length; 4005 } 4006 4007 for (que = 0; que < ha->max_rsp_queues; que++) { 4008 rsp = ha->rsp_q_map[que]; 4009 if (!rsp || !test_bit(que, ha->rsp_qid_map)) 4010 continue; 4011 rsp->in_ptr = (void *)(rsp->ring + rsp->length); 4012 *rsp->in_ptr = 0; 4013 /* Initialize response queue entries */ 4014 if (IS_QLAFX00(ha)) 4015 qlafx00_init_response_q_entries(rsp); 4016 else 4017 qla2x00_init_response_q_entries(rsp); 4018 } 4019 4020 ha->tgt.atio_ring_ptr = ha->tgt.atio_ring; 4021 ha->tgt.atio_ring_index = 0; 4022 /* Initialize ATIO queue entries */ 4023 qlt_init_atio_q_entries(vha); 4024 4025 ha->isp_ops->config_rings(vha); 4026 4027 spin_unlock_irqrestore(&ha->hardware_lock, flags); 4028 4029 ql_dbg(ql_dbg_init, vha, 0x00d1, "Issue init firmware.\n"); 4030 4031 if (IS_QLAFX00(ha)) { 4032 rval = qlafx00_init_firmware(vha, ha->init_cb_size); 4033 goto next_check; 4034 } 4035 4036 /* Update any ISP specific firmware options before initialization. */ 4037 ha->isp_ops->update_fw_options(vha); 4038 4039 if (ha->flags.npiv_supported) { 4040 if (ha->operating_mode == LOOP && !IS_CNA_CAPABLE(ha)) 4041 ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1; 4042 mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports); 4043 } 4044 4045 if (IS_FWI2_CAPABLE(ha)) { 4046 mid_init_cb->options = cpu_to_le16(BIT_1); 4047 mid_init_cb->init_cb.execution_throttle = 4048 cpu_to_le16(ha->cur_fw_xcb_count); 4049 ha->flags.dport_enabled = 4050 (mid_init_cb->init_cb.firmware_options_1 & BIT_7) != 0; 4051 ql_dbg(ql_dbg_init, vha, 0x0191, "DPORT Support: %s.\n", 4052 (ha->flags.dport_enabled) ? "enabled" : "disabled"); 4053 /* FA-WWPN Status */ 4054 ha->flags.fawwpn_enabled = 4055 (mid_init_cb->init_cb.firmware_options_1 & BIT_6) != 0; 4056 ql_dbg(ql_dbg_init, vha, 0x00bc, "FA-WWPN Support: %s.\n", 4057 (ha->flags.fawwpn_enabled) ? "enabled" : "disabled"); 4058 } 4059 4060 rval = qla2x00_init_firmware(vha, ha->init_cb_size); 4061 next_check: 4062 if (rval) { 4063 ql_log(ql_log_fatal, vha, 0x00d2, 4064 "Init Firmware **** FAILED ****.\n"); 4065 } else { 4066 ql_dbg(ql_dbg_init, vha, 0x00d3, 4067 "Init Firmware -- success.\n"); 4068 QLA_FW_STARTED(ha); 4069 vha->u_ql2xexchoffld = vha->u_ql2xiniexchg = 0; 4070 } 4071 4072 return (rval); 4073 } 4074 4075 /** 4076 * qla2x00_fw_ready() - Waits for firmware ready. 4077 * @vha: HA context 4078 * 4079 * Returns 0 on success. 4080 */ 4081 static int 4082 qla2x00_fw_ready(scsi_qla_host_t *vha) 4083 { 4084 int rval; 4085 unsigned long wtime, mtime, cs84xx_time; 4086 uint16_t min_wait; /* Minimum wait time if loop is down */ 4087 uint16_t wait_time; /* Wait time if loop is coming ready */ 4088 uint16_t state[6]; 4089 struct qla_hw_data *ha = vha->hw; 4090 4091 if (IS_QLAFX00(vha->hw)) 4092 return qlafx00_fw_ready(vha); 4093 4094 rval = QLA_SUCCESS; 4095 4096 /* Time to wait for loop down */ 4097 if (IS_P3P_TYPE(ha)) 4098 min_wait = 30; 4099 else 4100 min_wait = 20; 4101 4102 /* 4103 * Firmware should take at most one RATOV to login, plus 5 seconds for 4104 * our own processing. 4105 */ 4106 if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) { 4107 wait_time = min_wait; 4108 } 4109 4110 /* Min wait time if loop down */ 4111 mtime = jiffies + (min_wait * HZ); 4112 4113 /* wait time before firmware ready */ 4114 wtime = jiffies + (wait_time * HZ); 4115 4116 /* Wait for ISP to finish LIP */ 4117 if (!vha->flags.init_done) 4118 ql_log(ql_log_info, vha, 0x801e, 4119 "Waiting for LIP to complete.\n"); 4120 4121 do { 4122 memset(state, -1, sizeof(state)); 4123 rval = qla2x00_get_firmware_state(vha, state); 4124 if (rval == QLA_SUCCESS) { 4125 if (state[0] < FSTATE_LOSS_OF_SYNC) { 4126 vha->device_flags &= ~DFLG_NO_CABLE; 4127 } 4128 if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) { 4129 ql_dbg(ql_dbg_taskm, vha, 0x801f, 4130 "fw_state=%x 84xx=%x.\n", state[0], 4131 state[2]); 4132 if ((state[2] & FSTATE_LOGGED_IN) && 4133 (state[2] & FSTATE_WAITING_FOR_VERIFY)) { 4134 ql_dbg(ql_dbg_taskm, vha, 0x8028, 4135 "Sending verify iocb.\n"); 4136 4137 cs84xx_time = jiffies; 4138 rval = qla84xx_init_chip(vha); 4139 if (rval != QLA_SUCCESS) { 4140 ql_log(ql_log_warn, 4141 vha, 0x8007, 4142 "Init chip failed.\n"); 4143 break; 4144 } 4145 4146 /* Add time taken to initialize. */ 4147 cs84xx_time = jiffies - cs84xx_time; 4148 wtime += cs84xx_time; 4149 mtime += cs84xx_time; 4150 ql_dbg(ql_dbg_taskm, vha, 0x8008, 4151 "Increasing wait time by %ld. " 4152 "New time %ld.\n", cs84xx_time, 4153 wtime); 4154 } 4155 } else if (state[0] == FSTATE_READY) { 4156 ql_dbg(ql_dbg_taskm, vha, 0x8037, 4157 "F/W Ready - OK.\n"); 4158 4159 qla2x00_get_retry_cnt(vha, &ha->retry_count, 4160 &ha->login_timeout, &ha->r_a_tov); 4161 4162 rval = QLA_SUCCESS; 4163 break; 4164 } 4165 4166 rval = QLA_FUNCTION_FAILED; 4167 4168 if (atomic_read(&vha->loop_down_timer) && 4169 state[0] != FSTATE_READY) { 4170 /* Loop down. Timeout on min_wait for states 4171 * other than Wait for Login. 4172 */ 4173 if (time_after_eq(jiffies, mtime)) { 4174 ql_log(ql_log_info, vha, 0x8038, 4175 "Cable is unplugged...\n"); 4176 4177 vha->device_flags |= DFLG_NO_CABLE; 4178 break; 4179 } 4180 } 4181 } else { 4182 /* Mailbox cmd failed. Timeout on min_wait. */ 4183 if (time_after_eq(jiffies, mtime) || 4184 ha->flags.isp82xx_fw_hung) 4185 break; 4186 } 4187 4188 if (time_after_eq(jiffies, wtime)) 4189 break; 4190 4191 /* Delay for a while */ 4192 msleep(500); 4193 } while (1); 4194 4195 ql_dbg(ql_dbg_taskm, vha, 0x803a, 4196 "fw_state=%x (%x, %x, %x, %x %x) curr time=%lx.\n", state[0], 4197 state[1], state[2], state[3], state[4], state[5], jiffies); 4198 4199 if (rval && !(vha->device_flags & DFLG_NO_CABLE)) { 4200 ql_log(ql_log_warn, vha, 0x803b, 4201 "Firmware ready **** FAILED ****.\n"); 4202 } 4203 4204 return (rval); 4205 } 4206 4207 /* 4208 * qla2x00_configure_hba 4209 * Setup adapter context. 4210 * 4211 * Input: 4212 * ha = adapter state pointer. 4213 * 4214 * Returns: 4215 * 0 = success 4216 * 4217 * Context: 4218 * Kernel context. 4219 */ 4220 static int 4221 qla2x00_configure_hba(scsi_qla_host_t *vha) 4222 { 4223 int rval; 4224 uint16_t loop_id; 4225 uint16_t topo; 4226 uint16_t sw_cap; 4227 uint8_t al_pa; 4228 uint8_t area; 4229 uint8_t domain; 4230 char connect_type[22]; 4231 struct qla_hw_data *ha = vha->hw; 4232 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); 4233 port_id_t id; 4234 unsigned long flags; 4235 4236 /* Get host addresses. */ 4237 rval = qla2x00_get_adapter_id(vha, 4238 &loop_id, &al_pa, &area, &domain, &topo, &sw_cap); 4239 if (rval != QLA_SUCCESS) { 4240 if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) || 4241 IS_CNA_CAPABLE(ha) || 4242 (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) { 4243 ql_dbg(ql_dbg_disc, vha, 0x2008, 4244 "Loop is in a transition state.\n"); 4245 } else { 4246 ql_log(ql_log_warn, vha, 0x2009, 4247 "Unable to get host loop ID.\n"); 4248 if (IS_FWI2_CAPABLE(ha) && (vha == base_vha) && 4249 (rval == QLA_COMMAND_ERROR && loop_id == 0x1b)) { 4250 ql_log(ql_log_warn, vha, 0x1151, 4251 "Doing link init.\n"); 4252 if (qla24xx_link_initialize(vha) == QLA_SUCCESS) 4253 return rval; 4254 } 4255 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 4256 } 4257 return (rval); 4258 } 4259 4260 if (topo == 4) { 4261 ql_log(ql_log_info, vha, 0x200a, 4262 "Cannot get topology - retrying.\n"); 4263 return (QLA_FUNCTION_FAILED); 4264 } 4265 4266 vha->loop_id = loop_id; 4267 4268 /* initialize */ 4269 ha->min_external_loopid = SNS_FIRST_LOOP_ID; 4270 ha->operating_mode = LOOP; 4271 ha->switch_cap = 0; 4272 4273 switch (topo) { 4274 case 0: 4275 ql_dbg(ql_dbg_disc, vha, 0x200b, "HBA in NL topology.\n"); 4276 ha->current_topology = ISP_CFG_NL; 4277 strcpy(connect_type, "(Loop)"); 4278 break; 4279 4280 case 1: 4281 ql_dbg(ql_dbg_disc, vha, 0x200c, "HBA in FL topology.\n"); 4282 ha->switch_cap = sw_cap; 4283 ha->current_topology = ISP_CFG_FL; 4284 strcpy(connect_type, "(FL_Port)"); 4285 break; 4286 4287 case 2: 4288 ql_dbg(ql_dbg_disc, vha, 0x200d, "HBA in N P2P topology.\n"); 4289 ha->operating_mode = P2P; 4290 ha->current_topology = ISP_CFG_N; 4291 strcpy(connect_type, "(N_Port-to-N_Port)"); 4292 break; 4293 4294 case 3: 4295 ql_dbg(ql_dbg_disc, vha, 0x200e, "HBA in F P2P topology.\n"); 4296 ha->switch_cap = sw_cap; 4297 ha->operating_mode = P2P; 4298 ha->current_topology = ISP_CFG_F; 4299 strcpy(connect_type, "(F_Port)"); 4300 break; 4301 4302 default: 4303 ql_dbg(ql_dbg_disc, vha, 0x200f, 4304 "HBA in unknown topology %x, using NL.\n", topo); 4305 ha->current_topology = ISP_CFG_NL; 4306 strcpy(connect_type, "(Loop)"); 4307 break; 4308 } 4309 4310 /* Save Host port and loop ID. */ 4311 /* byte order - Big Endian */ 4312 id.b.domain = domain; 4313 id.b.area = area; 4314 id.b.al_pa = al_pa; 4315 id.b.rsvd_1 = 0; 4316 spin_lock_irqsave(&ha->hardware_lock, flags); 4317 if (!(topo == 2 && ha->flags.n2n_bigger)) 4318 qlt_update_host_map(vha, id); 4319 spin_unlock_irqrestore(&ha->hardware_lock, flags); 4320 4321 if (!vha->flags.init_done) 4322 ql_log(ql_log_info, vha, 0x2010, 4323 "Topology - %s, Host Loop address 0x%x.\n", 4324 connect_type, vha->loop_id); 4325 4326 return(rval); 4327 } 4328 4329 inline void 4330 qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len, 4331 char *def) 4332 { 4333 char *st, *en; 4334 uint16_t index; 4335 struct qla_hw_data *ha = vha->hw; 4336 int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) && 4337 !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha); 4338 4339 if (memcmp(model, BINZERO, len) != 0) { 4340 strncpy(ha->model_number, model, len); 4341 st = en = ha->model_number; 4342 en += len - 1; 4343 while (en > st) { 4344 if (*en != 0x20 && *en != 0x00) 4345 break; 4346 *en-- = '\0'; 4347 } 4348 4349 index = (ha->pdev->subsystem_device & 0xff); 4350 if (use_tbl && 4351 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && 4352 index < QLA_MODEL_NAMES) 4353 strncpy(ha->model_desc, 4354 qla2x00_model_name[index * 2 + 1], 4355 sizeof(ha->model_desc) - 1); 4356 } else { 4357 index = (ha->pdev->subsystem_device & 0xff); 4358 if (use_tbl && 4359 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && 4360 index < QLA_MODEL_NAMES) { 4361 strcpy(ha->model_number, 4362 qla2x00_model_name[index * 2]); 4363 strncpy(ha->model_desc, 4364 qla2x00_model_name[index * 2 + 1], 4365 sizeof(ha->model_desc) - 1); 4366 } else { 4367 strcpy(ha->model_number, def); 4368 } 4369 } 4370 if (IS_FWI2_CAPABLE(ha)) 4371 qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc, 4372 sizeof(ha->model_desc)); 4373 } 4374 4375 /* On sparc systems, obtain port and node WWN from firmware 4376 * properties. 4377 */ 4378 static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv) 4379 { 4380 #ifdef CONFIG_SPARC 4381 struct qla_hw_data *ha = vha->hw; 4382 struct pci_dev *pdev = ha->pdev; 4383 struct device_node *dp = pci_device_to_OF_node(pdev); 4384 const u8 *val; 4385 int len; 4386 4387 val = of_get_property(dp, "port-wwn", &len); 4388 if (val && len >= WWN_SIZE) 4389 memcpy(nv->port_name, val, WWN_SIZE); 4390 4391 val = of_get_property(dp, "node-wwn", &len); 4392 if (val && len >= WWN_SIZE) 4393 memcpy(nv->node_name, val, WWN_SIZE); 4394 #endif 4395 } 4396 4397 /* 4398 * NVRAM configuration for ISP 2xxx 4399 * 4400 * Input: 4401 * ha = adapter block pointer. 4402 * 4403 * Output: 4404 * initialization control block in response_ring 4405 * host adapters parameters in host adapter block 4406 * 4407 * Returns: 4408 * 0 = success. 4409 */ 4410 int 4411 qla2x00_nvram_config(scsi_qla_host_t *vha) 4412 { 4413 int rval; 4414 uint8_t chksum = 0; 4415 uint16_t cnt; 4416 uint8_t *dptr1, *dptr2; 4417 struct qla_hw_data *ha = vha->hw; 4418 init_cb_t *icb = ha->init_cb; 4419 nvram_t *nv = ha->nvram; 4420 uint8_t *ptr = ha->nvram; 4421 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 4422 4423 rval = QLA_SUCCESS; 4424 4425 /* Determine NVRAM starting address. */ 4426 ha->nvram_size = sizeof(nvram_t); 4427 ha->nvram_base = 0; 4428 if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha)) 4429 if ((RD_REG_WORD(®->ctrl_status) >> 14) == 1) 4430 ha->nvram_base = 0x80; 4431 4432 /* Get NVRAM data and calculate checksum. */ 4433 ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size); 4434 for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++) 4435 chksum += *ptr++; 4436 4437 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f, 4438 "Contents of NVRAM.\n"); 4439 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110, 4440 (uint8_t *)nv, ha->nvram_size); 4441 4442 /* Bad NVRAM data, set defaults parameters. */ 4443 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || 4444 nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) { 4445 /* Reset NVRAM data. */ 4446 ql_log(ql_log_warn, vha, 0x0064, 4447 "Inconsistent NVRAM " 4448 "detected: checksum=0x%x id=%c version=0x%x.\n", 4449 chksum, nv->id[0], nv->nvram_version); 4450 ql_log(ql_log_warn, vha, 0x0065, 4451 "Falling back to " 4452 "functioning (yet invalid -- WWPN) defaults.\n"); 4453 4454 /* 4455 * Set default initialization control block. 4456 */ 4457 memset(nv, 0, ha->nvram_size); 4458 nv->parameter_block_version = ICB_VERSION; 4459 4460 if (IS_QLA23XX(ha)) { 4461 nv->firmware_options[0] = BIT_2 | BIT_1; 4462 nv->firmware_options[1] = BIT_7 | BIT_5; 4463 nv->add_firmware_options[0] = BIT_5; 4464 nv->add_firmware_options[1] = BIT_5 | BIT_4; 4465 nv->frame_payload_size = 2048; 4466 nv->special_options[1] = BIT_7; 4467 } else if (IS_QLA2200(ha)) { 4468 nv->firmware_options[0] = BIT_2 | BIT_1; 4469 nv->firmware_options[1] = BIT_7 | BIT_5; 4470 nv->add_firmware_options[0] = BIT_5; 4471 nv->add_firmware_options[1] = BIT_5 | BIT_4; 4472 nv->frame_payload_size = 1024; 4473 } else if (IS_QLA2100(ha)) { 4474 nv->firmware_options[0] = BIT_3 | BIT_1; 4475 nv->firmware_options[1] = BIT_5; 4476 nv->frame_payload_size = 1024; 4477 } 4478 4479 nv->max_iocb_allocation = cpu_to_le16(256); 4480 nv->execution_throttle = cpu_to_le16(16); 4481 nv->retry_count = 8; 4482 nv->retry_delay = 1; 4483 4484 nv->port_name[0] = 33; 4485 nv->port_name[3] = 224; 4486 nv->port_name[4] = 139; 4487 4488 qla2xxx_nvram_wwn_from_ofw(vha, nv); 4489 4490 nv->login_timeout = 4; 4491 4492 /* 4493 * Set default host adapter parameters 4494 */ 4495 nv->host_p[1] = BIT_2; 4496 nv->reset_delay = 5; 4497 nv->port_down_retry_count = 8; 4498 nv->max_luns_per_target = cpu_to_le16(8); 4499 nv->link_down_timeout = 60; 4500 4501 rval = 1; 4502 } 4503 4504 #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2) 4505 /* 4506 * The SN2 does not provide BIOS emulation which means you can't change 4507 * potentially bogus BIOS settings. Force the use of default settings 4508 * for link rate and frame size. Hope that the rest of the settings 4509 * are valid. 4510 */ 4511 if (ia64_platform_is("sn2")) { 4512 nv->frame_payload_size = 2048; 4513 if (IS_QLA23XX(ha)) 4514 nv->special_options[1] = BIT_7; 4515 } 4516 #endif 4517 4518 /* Reset Initialization control block */ 4519 memset(icb, 0, ha->init_cb_size); 4520 4521 /* 4522 * Setup driver NVRAM options. 4523 */ 4524 nv->firmware_options[0] |= (BIT_6 | BIT_1); 4525 nv->firmware_options[0] &= ~(BIT_5 | BIT_4); 4526 nv->firmware_options[1] |= (BIT_5 | BIT_0); 4527 nv->firmware_options[1] &= ~BIT_4; 4528 4529 if (IS_QLA23XX(ha)) { 4530 nv->firmware_options[0] |= BIT_2; 4531 nv->firmware_options[0] &= ~BIT_3; 4532 nv->special_options[0] &= ~BIT_6; 4533 nv->add_firmware_options[1] |= BIT_5 | BIT_4; 4534 4535 if (IS_QLA2300(ha)) { 4536 if (ha->fb_rev == FPM_2310) { 4537 strcpy(ha->model_number, "QLA2310"); 4538 } else { 4539 strcpy(ha->model_number, "QLA2300"); 4540 } 4541 } else { 4542 qla2x00_set_model_info(vha, nv->model_number, 4543 sizeof(nv->model_number), "QLA23xx"); 4544 } 4545 } else if (IS_QLA2200(ha)) { 4546 nv->firmware_options[0] |= BIT_2; 4547 /* 4548 * 'Point-to-point preferred, else loop' is not a safe 4549 * connection mode setting. 4550 */ 4551 if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) == 4552 (BIT_5 | BIT_4)) { 4553 /* Force 'loop preferred, else point-to-point'. */ 4554 nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4); 4555 nv->add_firmware_options[0] |= BIT_5; 4556 } 4557 strcpy(ha->model_number, "QLA22xx"); 4558 } else /*if (IS_QLA2100(ha))*/ { 4559 strcpy(ha->model_number, "QLA2100"); 4560 } 4561 4562 /* 4563 * Copy over NVRAM RISC parameter block to initialization control block. 4564 */ 4565 dptr1 = (uint8_t *)icb; 4566 dptr2 = (uint8_t *)&nv->parameter_block_version; 4567 cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version; 4568 while (cnt--) 4569 *dptr1++ = *dptr2++; 4570 4571 /* Copy 2nd half. */ 4572 dptr1 = (uint8_t *)icb->add_firmware_options; 4573 cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options; 4574 while (cnt--) 4575 *dptr1++ = *dptr2++; 4576 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size); 4577 /* Use alternate WWN? */ 4578 if (nv->host_p[1] & BIT_7) { 4579 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 4580 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 4581 } 4582 4583 /* Prepare nodename */ 4584 if ((icb->firmware_options[1] & BIT_6) == 0) { 4585 /* 4586 * Firmware will apply the following mask if the nodename was 4587 * not provided. 4588 */ 4589 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 4590 icb->node_name[0] &= 0xF0; 4591 } 4592 4593 /* 4594 * Set host adapter parameters. 4595 */ 4596 4597 /* 4598 * BIT_7 in the host-parameters section allows for modification to 4599 * internal driver logging. 4600 */ 4601 if (nv->host_p[0] & BIT_7) 4602 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK; 4603 ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0); 4604 /* Always load RISC code on non ISP2[12]00 chips. */ 4605 if (!IS_QLA2100(ha) && !IS_QLA2200(ha)) 4606 ha->flags.disable_risc_code_load = 0; 4607 ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0); 4608 ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0); 4609 ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0); 4610 ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0; 4611 ha->flags.disable_serdes = 0; 4612 4613 ha->operating_mode = 4614 (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4; 4615 4616 memcpy(ha->fw_seriallink_options, nv->seriallink_options, 4617 sizeof(ha->fw_seriallink_options)); 4618 4619 /* save HBA serial number */ 4620 ha->serial0 = icb->port_name[5]; 4621 ha->serial1 = icb->port_name[6]; 4622 ha->serial2 = icb->port_name[7]; 4623 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 4624 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 4625 4626 icb->execution_throttle = cpu_to_le16(0xFFFF); 4627 4628 ha->retry_count = nv->retry_count; 4629 4630 /* Set minimum login_timeout to 4 seconds. */ 4631 if (nv->login_timeout != ql2xlogintimeout) 4632 nv->login_timeout = ql2xlogintimeout; 4633 if (nv->login_timeout < 4) 4634 nv->login_timeout = 4; 4635 ha->login_timeout = nv->login_timeout; 4636 4637 /* Set minimum RATOV to 100 tenths of a second. */ 4638 ha->r_a_tov = 100; 4639 4640 ha->loop_reset_delay = nv->reset_delay; 4641 4642 /* Link Down Timeout = 0: 4643 * 4644 * When Port Down timer expires we will start returning 4645 * I/O's to OS with "DID_NO_CONNECT". 4646 * 4647 * Link Down Timeout != 0: 4648 * 4649 * The driver waits for the link to come up after link down 4650 * before returning I/Os to OS with "DID_NO_CONNECT". 4651 */ 4652 if (nv->link_down_timeout == 0) { 4653 ha->loop_down_abort_time = 4654 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 4655 } else { 4656 ha->link_down_timeout = nv->link_down_timeout; 4657 ha->loop_down_abort_time = 4658 (LOOP_DOWN_TIME - ha->link_down_timeout); 4659 } 4660 4661 /* 4662 * Need enough time to try and get the port back. 4663 */ 4664 ha->port_down_retry_count = nv->port_down_retry_count; 4665 if (qlport_down_retry) 4666 ha->port_down_retry_count = qlport_down_retry; 4667 /* Set login_retry_count */ 4668 ha->login_retry_count = nv->retry_count; 4669 if (ha->port_down_retry_count == nv->port_down_retry_count && 4670 ha->port_down_retry_count > 3) 4671 ha->login_retry_count = ha->port_down_retry_count; 4672 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 4673 ha->login_retry_count = ha->port_down_retry_count; 4674 if (ql2xloginretrycount) 4675 ha->login_retry_count = ql2xloginretrycount; 4676 4677 icb->lun_enables = cpu_to_le16(0); 4678 icb->command_resource_count = 0; 4679 icb->immediate_notify_resource_count = 0; 4680 icb->timeout = cpu_to_le16(0); 4681 4682 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { 4683 /* Enable RIO */ 4684 icb->firmware_options[0] &= ~BIT_3; 4685 icb->add_firmware_options[0] &= 4686 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); 4687 icb->add_firmware_options[0] |= BIT_2; 4688 icb->response_accumulation_timer = 3; 4689 icb->interrupt_delay_timer = 5; 4690 4691 vha->flags.process_response_queue = 1; 4692 } else { 4693 /* Enable ZIO. */ 4694 if (!vha->flags.init_done) { 4695 ha->zio_mode = icb->add_firmware_options[0] & 4696 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 4697 ha->zio_timer = icb->interrupt_delay_timer ? 4698 icb->interrupt_delay_timer: 2; 4699 } 4700 icb->add_firmware_options[0] &= 4701 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); 4702 vha->flags.process_response_queue = 0; 4703 if (ha->zio_mode != QLA_ZIO_DISABLED) { 4704 ha->zio_mode = QLA_ZIO_MODE_6; 4705 4706 ql_log(ql_log_info, vha, 0x0068, 4707 "ZIO mode %d enabled; timer delay (%d us).\n", 4708 ha->zio_mode, ha->zio_timer * 100); 4709 4710 icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode; 4711 icb->interrupt_delay_timer = (uint8_t)ha->zio_timer; 4712 vha->flags.process_response_queue = 1; 4713 } 4714 } 4715 4716 if (rval) { 4717 ql_log(ql_log_warn, vha, 0x0069, 4718 "NVRAM configuration failed.\n"); 4719 } 4720 return (rval); 4721 } 4722 4723 static void 4724 qla2x00_rport_del(void *data) 4725 { 4726 fc_port_t *fcport = data; 4727 struct fc_rport *rport; 4728 unsigned long flags; 4729 4730 spin_lock_irqsave(fcport->vha->host->host_lock, flags); 4731 rport = fcport->drport ? fcport->drport: fcport->rport; 4732 fcport->drport = NULL; 4733 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags); 4734 if (rport) { 4735 ql_dbg(ql_dbg_disc, fcport->vha, 0x210b, 4736 "%s %8phN. rport %p roles %x\n", 4737 __func__, fcport->port_name, rport, 4738 rport->roles); 4739 4740 fc_remote_port_delete(rport); 4741 } 4742 } 4743 4744 /** 4745 * qla2x00_alloc_fcport() - Allocate a generic fcport. 4746 * @vha: HA context 4747 * @flags: allocation flags 4748 * 4749 * Returns a pointer to the allocated fcport, or NULL, if none available. 4750 */ 4751 fc_port_t * 4752 qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags) 4753 { 4754 fc_port_t *fcport; 4755 4756 fcport = kzalloc(sizeof(fc_port_t), flags); 4757 if (!fcport) 4758 return NULL; 4759 4760 /* Setup fcport template structure. */ 4761 fcport->vha = vha; 4762 fcport->port_type = FCT_UNKNOWN; 4763 fcport->loop_id = FC_NO_LOOP_ID; 4764 qla2x00_set_fcport_state(fcport, FCS_UNCONFIGURED); 4765 fcport->supported_classes = FC_COS_UNSPECIFIED; 4766 4767 fcport->ct_desc.ct_sns = dma_alloc_coherent(&vha->hw->pdev->dev, 4768 sizeof(struct ct_sns_pkt), &fcport->ct_desc.ct_sns_dma, 4769 flags); 4770 fcport->disc_state = DSC_DELETED; 4771 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL; 4772 fcport->deleted = QLA_SESS_DELETED; 4773 fcport->login_retry = vha->hw->login_retry_count; 4774 fcport->logout_on_delete = 1; 4775 4776 if (!fcport->ct_desc.ct_sns) { 4777 ql_log(ql_log_warn, vha, 0xd049, 4778 "Failed to allocate ct_sns request.\n"); 4779 kfree(fcport); 4780 fcport = NULL; 4781 } 4782 INIT_WORK(&fcport->del_work, qla24xx_delete_sess_fn); 4783 INIT_WORK(&fcport->reg_work, qla_register_fcport_fn); 4784 INIT_LIST_HEAD(&fcport->gnl_entry); 4785 INIT_LIST_HEAD(&fcport->list); 4786 4787 return fcport; 4788 } 4789 4790 void 4791 qla2x00_free_fcport(fc_port_t *fcport) 4792 { 4793 if (fcport->ct_desc.ct_sns) { 4794 dma_free_coherent(&fcport->vha->hw->pdev->dev, 4795 sizeof(struct ct_sns_pkt), fcport->ct_desc.ct_sns, 4796 fcport->ct_desc.ct_sns_dma); 4797 4798 fcport->ct_desc.ct_sns = NULL; 4799 } 4800 kfree(fcport); 4801 } 4802 4803 /* 4804 * qla2x00_configure_loop 4805 * Updates Fibre Channel Device Database with what is actually on loop. 4806 * 4807 * Input: 4808 * ha = adapter block pointer. 4809 * 4810 * Returns: 4811 * 0 = success. 4812 * 1 = error. 4813 * 2 = database was full and device was not configured. 4814 */ 4815 static int 4816 qla2x00_configure_loop(scsi_qla_host_t *vha) 4817 { 4818 int rval; 4819 unsigned long flags, save_flags; 4820 struct qla_hw_data *ha = vha->hw; 4821 rval = QLA_SUCCESS; 4822 4823 /* Get Initiator ID */ 4824 if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) { 4825 rval = qla2x00_configure_hba(vha); 4826 if (rval != QLA_SUCCESS) { 4827 ql_dbg(ql_dbg_disc, vha, 0x2013, 4828 "Unable to configure HBA.\n"); 4829 return (rval); 4830 } 4831 } 4832 4833 save_flags = flags = vha->dpc_flags; 4834 ql_dbg(ql_dbg_disc, vha, 0x2014, 4835 "Configure loop -- dpc flags = 0x%lx.\n", flags); 4836 4837 /* 4838 * If we have both an RSCN and PORT UPDATE pending then handle them 4839 * both at the same time. 4840 */ 4841 clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 4842 clear_bit(RSCN_UPDATE, &vha->dpc_flags); 4843 4844 qla2x00_get_data_rate(vha); 4845 4846 /* Determine what we need to do */ 4847 if (ha->current_topology == ISP_CFG_FL && 4848 (test_bit(LOCAL_LOOP_UPDATE, &flags))) { 4849 4850 set_bit(RSCN_UPDATE, &flags); 4851 4852 } else if (ha->current_topology == ISP_CFG_F && 4853 (test_bit(LOCAL_LOOP_UPDATE, &flags))) { 4854 4855 set_bit(RSCN_UPDATE, &flags); 4856 clear_bit(LOCAL_LOOP_UPDATE, &flags); 4857 4858 } else if (ha->current_topology == ISP_CFG_N) { 4859 clear_bit(RSCN_UPDATE, &flags); 4860 if (qla_tgt_mode_enabled(vha)) { 4861 /* allow the other side to start the login */ 4862 clear_bit(LOCAL_LOOP_UPDATE, &flags); 4863 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 4864 } 4865 } else if (ha->current_topology == ISP_CFG_NL) { 4866 clear_bit(RSCN_UPDATE, &flags); 4867 set_bit(LOCAL_LOOP_UPDATE, &flags); 4868 } else if (!vha->flags.online || 4869 (test_bit(ABORT_ISP_ACTIVE, &flags))) { 4870 set_bit(RSCN_UPDATE, &flags); 4871 set_bit(LOCAL_LOOP_UPDATE, &flags); 4872 } 4873 4874 if (test_bit(LOCAL_LOOP_UPDATE, &flags)) { 4875 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 4876 ql_dbg(ql_dbg_disc, vha, 0x2015, 4877 "Loop resync needed, failing.\n"); 4878 rval = QLA_FUNCTION_FAILED; 4879 } else 4880 rval = qla2x00_configure_local_loop(vha); 4881 } 4882 4883 if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) { 4884 if (LOOP_TRANSITION(vha)) { 4885 ql_dbg(ql_dbg_disc, vha, 0x2099, 4886 "Needs RSCN update and loop transition.\n"); 4887 rval = QLA_FUNCTION_FAILED; 4888 } 4889 else 4890 rval = qla2x00_configure_fabric(vha); 4891 } 4892 4893 if (rval == QLA_SUCCESS) { 4894 if (atomic_read(&vha->loop_down_timer) || 4895 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 4896 rval = QLA_FUNCTION_FAILED; 4897 } else { 4898 atomic_set(&vha->loop_state, LOOP_READY); 4899 ql_dbg(ql_dbg_disc, vha, 0x2069, 4900 "LOOP READY.\n"); 4901 ha->flags.fw_init_done = 1; 4902 4903 /* 4904 * Process any ATIO queue entries that came in 4905 * while we weren't online. 4906 */ 4907 if (qla_tgt_mode_enabled(vha) || 4908 qla_dual_mode_enabled(vha)) { 4909 spin_lock_irqsave(&ha->tgt.atio_lock, flags); 4910 qlt_24xx_process_atio_queue(vha, 0); 4911 spin_unlock_irqrestore(&ha->tgt.atio_lock, 4912 flags); 4913 } 4914 } 4915 } 4916 4917 if (rval) { 4918 ql_dbg(ql_dbg_disc, vha, 0x206a, 4919 "%s *** FAILED ***.\n", __func__); 4920 } else { 4921 ql_dbg(ql_dbg_disc, vha, 0x206b, 4922 "%s: exiting normally.\n", __func__); 4923 } 4924 4925 /* Restore state if a resync event occurred during processing */ 4926 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { 4927 if (test_bit(LOCAL_LOOP_UPDATE, &save_flags)) 4928 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 4929 if (test_bit(RSCN_UPDATE, &save_flags)) { 4930 set_bit(RSCN_UPDATE, &vha->dpc_flags); 4931 } 4932 } 4933 4934 return (rval); 4935 } 4936 4937 /* 4938 * qla2x00_configure_local_loop 4939 * Updates Fibre Channel Device Database with local loop devices. 4940 * 4941 * Input: 4942 * ha = adapter block pointer. 4943 * 4944 * Returns: 4945 * 0 = success. 4946 */ 4947 static int 4948 qla2x00_configure_local_loop(scsi_qla_host_t *vha) 4949 { 4950 int rval, rval2; 4951 int found_devs; 4952 int found; 4953 fc_port_t *fcport, *new_fcport; 4954 4955 uint16_t index; 4956 uint16_t entries; 4957 char *id_iter; 4958 uint16_t loop_id; 4959 uint8_t domain, area, al_pa; 4960 struct qla_hw_data *ha = vha->hw; 4961 unsigned long flags; 4962 4963 /* Inititae N2N login. */ 4964 if (test_and_clear_bit(N2N_LOGIN_NEEDED, &vha->dpc_flags)) { 4965 /* borrowing */ 4966 u32 *bp, i, sz; 4967 4968 memset(ha->init_cb, 0, ha->init_cb_size); 4969 sz = min_t(int, sizeof(struct els_plogi_payload), 4970 ha->init_cb_size); 4971 rval = qla24xx_get_port_login_templ(vha, ha->init_cb_dma, 4972 (void *)ha->init_cb, sz); 4973 if (rval == QLA_SUCCESS) { 4974 bp = (uint32_t *)ha->init_cb; 4975 for (i = 0; i < sz/4 ; i++, bp++) 4976 *bp = cpu_to_be32(*bp); 4977 4978 memcpy(&ha->plogi_els_payld.data, (void *)ha->init_cb, 4979 sizeof(ha->plogi_els_payld.data)); 4980 set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 4981 } else { 4982 ql_dbg(ql_dbg_init, vha, 0x00d1, 4983 "PLOGI ELS param read fail.\n"); 4984 } 4985 return QLA_SUCCESS; 4986 } 4987 4988 found_devs = 0; 4989 new_fcport = NULL; 4990 entries = MAX_FIBRE_DEVICES_LOOP; 4991 4992 /* Get list of logged in devices. */ 4993 memset(ha->gid_list, 0, qla2x00_gid_list_size(ha)); 4994 rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma, 4995 &entries); 4996 if (rval != QLA_SUCCESS) 4997 goto cleanup_allocation; 4998 4999 ql_dbg(ql_dbg_disc, vha, 0x2011, 5000 "Entries in ID list (%d).\n", entries); 5001 ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075, 5002 (uint8_t *)ha->gid_list, 5003 entries * sizeof(struct gid_list_info)); 5004 5005 if (entries == 0) { 5006 spin_lock_irqsave(&vha->work_lock, flags); 5007 vha->scan.scan_retry++; 5008 spin_unlock_irqrestore(&vha->work_lock, flags); 5009 5010 if (vha->scan.scan_retry < MAX_SCAN_RETRIES) { 5011 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 5012 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5013 } 5014 } else { 5015 vha->scan.scan_retry = 0; 5016 } 5017 5018 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5019 fcport->scan_state = QLA_FCPORT_SCAN; 5020 } 5021 5022 /* Allocate temporary fcport for any new fcports discovered. */ 5023 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 5024 if (new_fcport == NULL) { 5025 ql_log(ql_log_warn, vha, 0x2012, 5026 "Memory allocation failed for fcport.\n"); 5027 rval = QLA_MEMORY_ALLOC_FAILED; 5028 goto cleanup_allocation; 5029 } 5030 new_fcport->flags &= ~FCF_FABRIC_DEVICE; 5031 5032 /* Add devices to port list. */ 5033 id_iter = (char *)ha->gid_list; 5034 for (index = 0; index < entries; index++) { 5035 domain = ((struct gid_list_info *)id_iter)->domain; 5036 area = ((struct gid_list_info *)id_iter)->area; 5037 al_pa = ((struct gid_list_info *)id_iter)->al_pa; 5038 if (IS_QLA2100(ha) || IS_QLA2200(ha)) 5039 loop_id = (uint16_t) 5040 ((struct gid_list_info *)id_iter)->loop_id_2100; 5041 else 5042 loop_id = le16_to_cpu( 5043 ((struct gid_list_info *)id_iter)->loop_id); 5044 id_iter += ha->gid_list_info_size; 5045 5046 /* Bypass reserved domain fields. */ 5047 if ((domain & 0xf0) == 0xf0) 5048 continue; 5049 5050 /* Bypass if not same domain and area of adapter. */ 5051 if (area && domain && 5052 (area != vha->d_id.b.area || domain != vha->d_id.b.domain)) 5053 continue; 5054 5055 /* Bypass invalid local loop ID. */ 5056 if (loop_id > LAST_LOCAL_LOOP_ID) 5057 continue; 5058 5059 memset(new_fcport->port_name, 0, WWN_SIZE); 5060 5061 /* Fill in member data. */ 5062 new_fcport->d_id.b.domain = domain; 5063 new_fcport->d_id.b.area = area; 5064 new_fcport->d_id.b.al_pa = al_pa; 5065 new_fcport->loop_id = loop_id; 5066 new_fcport->scan_state = QLA_FCPORT_FOUND; 5067 5068 rval2 = qla2x00_get_port_database(vha, new_fcport, 0); 5069 if (rval2 != QLA_SUCCESS) { 5070 ql_dbg(ql_dbg_disc, vha, 0x2097, 5071 "Failed to retrieve fcport information " 5072 "-- get_port_database=%x, loop_id=0x%04x.\n", 5073 rval2, new_fcport->loop_id); 5074 /* Skip retry if N2N */ 5075 if (ha->current_topology != ISP_CFG_N) { 5076 ql_dbg(ql_dbg_disc, vha, 0x2105, 5077 "Scheduling resync.\n"); 5078 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5079 continue; 5080 } 5081 } 5082 5083 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 5084 /* Check for matching device in port list. */ 5085 found = 0; 5086 fcport = NULL; 5087 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5088 if (memcmp(new_fcport->port_name, fcport->port_name, 5089 WWN_SIZE)) 5090 continue; 5091 5092 fcport->flags &= ~FCF_FABRIC_DEVICE; 5093 fcport->loop_id = new_fcport->loop_id; 5094 fcport->port_type = new_fcport->port_type; 5095 fcport->d_id.b24 = new_fcport->d_id.b24; 5096 memcpy(fcport->node_name, new_fcport->node_name, 5097 WWN_SIZE); 5098 fcport->scan_state = QLA_FCPORT_FOUND; 5099 found++; 5100 break; 5101 } 5102 5103 if (!found) { 5104 /* New device, add to fcports list. */ 5105 list_add_tail(&new_fcport->list, &vha->vp_fcports); 5106 5107 /* Allocate a new replacement fcport. */ 5108 fcport = new_fcport; 5109 5110 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 5111 5112 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 5113 5114 if (new_fcport == NULL) { 5115 ql_log(ql_log_warn, vha, 0xd031, 5116 "Failed to allocate memory for fcport.\n"); 5117 rval = QLA_MEMORY_ALLOC_FAILED; 5118 goto cleanup_allocation; 5119 } 5120 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 5121 new_fcport->flags &= ~FCF_FABRIC_DEVICE; 5122 } 5123 5124 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 5125 5126 /* Base iIDMA settings on HBA port speed. */ 5127 fcport->fp_speed = ha->link_data_rate; 5128 5129 found_devs++; 5130 } 5131 5132 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5133 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5134 break; 5135 5136 if (fcport->scan_state == QLA_FCPORT_SCAN) { 5137 if ((qla_dual_mode_enabled(vha) || 5138 qla_ini_mode_enabled(vha)) && 5139 atomic_read(&fcport->state) == FCS_ONLINE) { 5140 qla2x00_mark_device_lost(vha, fcport, 5141 ql2xplogiabsentdevice, 0); 5142 if (fcport->loop_id != FC_NO_LOOP_ID && 5143 (fcport->flags & FCF_FCP2_DEVICE) == 0 && 5144 fcport->port_type != FCT_INITIATOR && 5145 fcport->port_type != FCT_BROADCAST) { 5146 ql_dbg(ql_dbg_disc, vha, 0x20f0, 5147 "%s %d %8phC post del sess\n", 5148 __func__, __LINE__, 5149 fcport->port_name); 5150 5151 qlt_schedule_sess_for_deletion(fcport); 5152 continue; 5153 } 5154 } 5155 } 5156 5157 if (fcport->scan_state == QLA_FCPORT_FOUND) 5158 qla24xx_fcport_handle_login(vha, fcport); 5159 } 5160 5161 cleanup_allocation: 5162 kfree(new_fcport); 5163 5164 if (rval != QLA_SUCCESS) { 5165 ql_dbg(ql_dbg_disc, vha, 0x2098, 5166 "Configure local loop error exit: rval=%x.\n", rval); 5167 } 5168 5169 return (rval); 5170 } 5171 5172 static void 5173 qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) 5174 { 5175 int rval; 5176 uint16_t mb[MAILBOX_REGISTER_COUNT]; 5177 struct qla_hw_data *ha = vha->hw; 5178 5179 if (!IS_IIDMA_CAPABLE(ha)) 5180 return; 5181 5182 if (atomic_read(&fcport->state) != FCS_ONLINE) 5183 return; 5184 5185 if (fcport->fp_speed == PORT_SPEED_UNKNOWN || 5186 fcport->fp_speed > ha->link_data_rate || 5187 !ha->flags.gpsc_supported) 5188 return; 5189 5190 rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed, 5191 mb); 5192 if (rval != QLA_SUCCESS) { 5193 ql_dbg(ql_dbg_disc, vha, 0x2004, 5194 "Unable to adjust iIDMA %8phN -- %04x %x %04x %04x.\n", 5195 fcport->port_name, rval, fcport->fp_speed, mb[0], mb[1]); 5196 } else { 5197 ql_dbg(ql_dbg_disc, vha, 0x2005, 5198 "iIDMA adjusted to %s GB/s (%X) on %8phN.\n", 5199 qla2x00_get_link_speed_str(ha, fcport->fp_speed), 5200 fcport->fp_speed, fcport->port_name); 5201 } 5202 } 5203 5204 void qla_do_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport) 5205 { 5206 qla2x00_iidma_fcport(vha, fcport); 5207 qla24xx_update_fcport_fcp_prio(vha, fcport); 5208 } 5209 5210 int qla_post_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport) 5211 { 5212 struct qla_work_evt *e; 5213 5214 e = qla2x00_alloc_work(vha, QLA_EVT_IIDMA); 5215 if (!e) 5216 return QLA_FUNCTION_FAILED; 5217 5218 e->u.fcport.fcport = fcport; 5219 return qla2x00_post_work(vha, e); 5220 } 5221 5222 /* qla2x00_reg_remote_port is reserved for Initiator Mode only.*/ 5223 static void 5224 qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport) 5225 { 5226 struct fc_rport_identifiers rport_ids; 5227 struct fc_rport *rport; 5228 unsigned long flags; 5229 5230 if (atomic_read(&fcport->state) == FCS_ONLINE) 5231 return; 5232 5233 rport_ids.node_name = wwn_to_u64(fcport->node_name); 5234 rport_ids.port_name = wwn_to_u64(fcport->port_name); 5235 rport_ids.port_id = fcport->d_id.b.domain << 16 | 5236 fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa; 5237 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; 5238 fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids); 5239 if (!rport) { 5240 ql_log(ql_log_warn, vha, 0x2006, 5241 "Unable to allocate fc remote port.\n"); 5242 return; 5243 } 5244 5245 spin_lock_irqsave(fcport->vha->host->host_lock, flags); 5246 *((fc_port_t **)rport->dd_data) = fcport; 5247 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags); 5248 5249 rport->supported_classes = fcport->supported_classes; 5250 5251 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; 5252 if (fcport->port_type == FCT_INITIATOR) 5253 rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR; 5254 if (fcport->port_type == FCT_TARGET) 5255 rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET; 5256 5257 ql_dbg(ql_dbg_disc, vha, 0x20ee, 5258 "%s %8phN. rport %p is %s mode\n", 5259 __func__, fcport->port_name, rport, 5260 (fcport->port_type == FCT_TARGET) ? "tgt" : "ini"); 5261 5262 fc_remote_port_rolechg(rport, rport_ids.roles); 5263 } 5264 5265 /* 5266 * qla2x00_update_fcport 5267 * Updates device on list. 5268 * 5269 * Input: 5270 * ha = adapter block pointer. 5271 * fcport = port structure pointer. 5272 * 5273 * Return: 5274 * 0 - Success 5275 * BIT_0 - error 5276 * 5277 * Context: 5278 * Kernel context. 5279 */ 5280 void 5281 qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) 5282 { 5283 if (IS_SW_RESV_ADDR(fcport->d_id)) 5284 return; 5285 5286 ql_dbg(ql_dbg_disc, vha, 0x20ef, "%s %8phC\n", 5287 __func__, fcport->port_name); 5288 5289 fcport->disc_state = DSC_UPD_FCPORT; 5290 fcport->login_retry = vha->hw->login_retry_count; 5291 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 5292 fcport->deleted = 0; 5293 fcport->logout_on_delete = 1; 5294 fcport->login_retry = vha->hw->login_retry_count; 5295 fcport->n2n_chip_reset = fcport->n2n_link_reset_cnt = 0; 5296 5297 switch (vha->hw->current_topology) { 5298 case ISP_CFG_N: 5299 case ISP_CFG_NL: 5300 fcport->keep_nport_handle = 1; 5301 break; 5302 default: 5303 break; 5304 } 5305 5306 qla2x00_iidma_fcport(vha, fcport); 5307 5308 if (fcport->fc4f_nvme) { 5309 qla_nvme_register_remote(vha, fcport); 5310 fcport->disc_state = DSC_LOGIN_COMPLETE; 5311 qla2x00_set_fcport_state(fcport, FCS_ONLINE); 5312 return; 5313 } 5314 5315 qla24xx_update_fcport_fcp_prio(vha, fcport); 5316 5317 switch (vha->host->active_mode) { 5318 case MODE_INITIATOR: 5319 qla2x00_reg_remote_port(vha, fcport); 5320 break; 5321 case MODE_TARGET: 5322 if (!vha->vha_tgt.qla_tgt->tgt_stop && 5323 !vha->vha_tgt.qla_tgt->tgt_stopped) 5324 qlt_fc_port_added(vha, fcport); 5325 break; 5326 case MODE_DUAL: 5327 qla2x00_reg_remote_port(vha, fcport); 5328 if (!vha->vha_tgt.qla_tgt->tgt_stop && 5329 !vha->vha_tgt.qla_tgt->tgt_stopped) 5330 qlt_fc_port_added(vha, fcport); 5331 break; 5332 default: 5333 break; 5334 } 5335 5336 qla2x00_set_fcport_state(fcport, FCS_ONLINE); 5337 5338 if (IS_IIDMA_CAPABLE(vha->hw) && vha->hw->flags.gpsc_supported) { 5339 if (fcport->id_changed) { 5340 fcport->id_changed = 0; 5341 ql_dbg(ql_dbg_disc, vha, 0x20d7, 5342 "%s %d %8phC post gfpnid fcp_cnt %d\n", 5343 __func__, __LINE__, fcport->port_name, 5344 vha->fcport_count); 5345 qla24xx_post_gfpnid_work(vha, fcport); 5346 } else { 5347 ql_dbg(ql_dbg_disc, vha, 0x20d7, 5348 "%s %d %8phC post gpsc fcp_cnt %d\n", 5349 __func__, __LINE__, fcport->port_name, 5350 vha->fcport_count); 5351 qla24xx_post_gpsc_work(vha, fcport); 5352 } 5353 } 5354 5355 fcport->disc_state = DSC_LOGIN_COMPLETE; 5356 } 5357 5358 void qla_register_fcport_fn(struct work_struct *work) 5359 { 5360 fc_port_t *fcport = container_of(work, struct fc_port, reg_work); 5361 u32 rscn_gen = fcport->rscn_gen; 5362 u16 data[2]; 5363 5364 if (IS_SW_RESV_ADDR(fcport->d_id)) 5365 return; 5366 5367 qla2x00_update_fcport(fcport->vha, fcport); 5368 5369 if (rscn_gen != fcport->rscn_gen) { 5370 /* RSCN(s) came in while registration */ 5371 switch (fcport->next_disc_state) { 5372 case DSC_DELETE_PEND: 5373 qlt_schedule_sess_for_deletion(fcport); 5374 break; 5375 case DSC_ADISC: 5376 data[0] = data[1] = 0; 5377 qla2x00_post_async_adisc_work(fcport->vha, fcport, 5378 data); 5379 break; 5380 default: 5381 break; 5382 } 5383 } 5384 } 5385 5386 /* 5387 * qla2x00_configure_fabric 5388 * Setup SNS devices with loop ID's. 5389 * 5390 * Input: 5391 * ha = adapter block pointer. 5392 * 5393 * Returns: 5394 * 0 = success. 5395 * BIT_0 = error 5396 */ 5397 static int 5398 qla2x00_configure_fabric(scsi_qla_host_t *vha) 5399 { 5400 int rval; 5401 fc_port_t *fcport; 5402 uint16_t mb[MAILBOX_REGISTER_COUNT]; 5403 uint16_t loop_id; 5404 LIST_HEAD(new_fcports); 5405 struct qla_hw_data *ha = vha->hw; 5406 int discovery_gen; 5407 5408 /* If FL port exists, then SNS is present */ 5409 if (IS_FWI2_CAPABLE(ha)) 5410 loop_id = NPH_F_PORT; 5411 else 5412 loop_id = SNS_FL_PORT; 5413 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1); 5414 if (rval != QLA_SUCCESS) { 5415 ql_dbg(ql_dbg_disc, vha, 0x20a0, 5416 "MBX_GET_PORT_NAME failed, No FL Port.\n"); 5417 5418 vha->device_flags &= ~SWITCH_FOUND; 5419 return (QLA_SUCCESS); 5420 } 5421 vha->device_flags |= SWITCH_FOUND; 5422 5423 5424 if (qla_tgt_mode_enabled(vha) || qla_dual_mode_enabled(vha)) { 5425 rval = qla2x00_send_change_request(vha, 0x3, 0); 5426 if (rval != QLA_SUCCESS) 5427 ql_log(ql_log_warn, vha, 0x121, 5428 "Failed to enable receiving of RSCN requests: 0x%x.\n", 5429 rval); 5430 } 5431 5432 5433 do { 5434 qla2x00_mgmt_svr_login(vha); 5435 5436 /* FDMI support. */ 5437 if (ql2xfdmienable && 5438 test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags)) 5439 qla2x00_fdmi_register(vha); 5440 5441 /* Ensure we are logged into the SNS. */ 5442 loop_id = NPH_SNS_LID(ha); 5443 rval = ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff, 5444 0xfc, mb, BIT_1|BIT_0); 5445 if (rval != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) { 5446 ql_dbg(ql_dbg_disc, vha, 0x20a1, 5447 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[6]=%x mb[7]=%x (%x).\n", 5448 loop_id, mb[0], mb[1], mb[2], mb[6], mb[7], rval); 5449 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5450 return rval; 5451 } 5452 if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) { 5453 if (qla2x00_rft_id(vha)) { 5454 /* EMPTY */ 5455 ql_dbg(ql_dbg_disc, vha, 0x20a2, 5456 "Register FC-4 TYPE failed.\n"); 5457 if (test_bit(LOOP_RESYNC_NEEDED, 5458 &vha->dpc_flags)) 5459 break; 5460 } 5461 if (qla2x00_rff_id(vha, FC4_TYPE_FCP_SCSI)) { 5462 /* EMPTY */ 5463 ql_dbg(ql_dbg_disc, vha, 0x209a, 5464 "Register FC-4 Features failed.\n"); 5465 if (test_bit(LOOP_RESYNC_NEEDED, 5466 &vha->dpc_flags)) 5467 break; 5468 } 5469 if (vha->flags.nvme_enabled) { 5470 if (qla2x00_rff_id(vha, FC_TYPE_NVME)) { 5471 ql_dbg(ql_dbg_disc, vha, 0x2049, 5472 "Register NVME FC Type Features failed.\n"); 5473 } 5474 } 5475 if (qla2x00_rnn_id(vha)) { 5476 /* EMPTY */ 5477 ql_dbg(ql_dbg_disc, vha, 0x2104, 5478 "Register Node Name failed.\n"); 5479 if (test_bit(LOOP_RESYNC_NEEDED, 5480 &vha->dpc_flags)) 5481 break; 5482 } else if (qla2x00_rsnn_nn(vha)) { 5483 /* EMPTY */ 5484 ql_dbg(ql_dbg_disc, vha, 0x209b, 5485 "Register Symbolic Node Name failed.\n"); 5486 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5487 break; 5488 } 5489 } 5490 5491 5492 /* Mark the time right before querying FW for connected ports. 5493 * This process is long, asynchronous and by the time it's done, 5494 * collected information might not be accurate anymore. E.g. 5495 * disconnected port might have re-connected and a brand new 5496 * session has been created. In this case session's generation 5497 * will be newer than discovery_gen. */ 5498 qlt_do_generation_tick(vha, &discovery_gen); 5499 5500 if (USE_ASYNC_SCAN(ha)) { 5501 rval = qla24xx_async_gpnft(vha, FC4_TYPE_FCP_SCSI, 5502 NULL); 5503 if (rval) 5504 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5505 } else { 5506 list_for_each_entry(fcport, &vha->vp_fcports, list) 5507 fcport->scan_state = QLA_FCPORT_SCAN; 5508 5509 rval = qla2x00_find_all_fabric_devs(vha); 5510 } 5511 if (rval != QLA_SUCCESS) 5512 break; 5513 } while (0); 5514 5515 if (!vha->nvme_local_port && vha->flags.nvme_enabled) 5516 qla_nvme_register_hba(vha); 5517 5518 if (rval) 5519 ql_dbg(ql_dbg_disc, vha, 0x2068, 5520 "Configure fabric error exit rval=%d.\n", rval); 5521 5522 return (rval); 5523 } 5524 5525 /* 5526 * qla2x00_find_all_fabric_devs 5527 * 5528 * Input: 5529 * ha = adapter block pointer. 5530 * dev = database device entry pointer. 5531 * 5532 * Returns: 5533 * 0 = success. 5534 * 5535 * Context: 5536 * Kernel context. 5537 */ 5538 static int 5539 qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha) 5540 { 5541 int rval; 5542 uint16_t loop_id; 5543 fc_port_t *fcport, *new_fcport; 5544 int found; 5545 5546 sw_info_t *swl; 5547 int swl_idx; 5548 int first_dev, last_dev; 5549 port_id_t wrap = {}, nxt_d_id; 5550 struct qla_hw_data *ha = vha->hw; 5551 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 5552 unsigned long flags; 5553 5554 rval = QLA_SUCCESS; 5555 5556 /* Try GID_PT to get device list, else GAN. */ 5557 if (!ha->swl) 5558 ha->swl = kcalloc(ha->max_fibre_devices, sizeof(sw_info_t), 5559 GFP_KERNEL); 5560 swl = ha->swl; 5561 if (!swl) { 5562 /*EMPTY*/ 5563 ql_dbg(ql_dbg_disc, vha, 0x209c, 5564 "GID_PT allocations failed, fallback on GA_NXT.\n"); 5565 } else { 5566 memset(swl, 0, ha->max_fibre_devices * sizeof(sw_info_t)); 5567 if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) { 5568 swl = NULL; 5569 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5570 return rval; 5571 } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) { 5572 swl = NULL; 5573 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5574 return rval; 5575 } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) { 5576 swl = NULL; 5577 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5578 return rval; 5579 } else if (qla2x00_gfpn_id(vha, swl) != QLA_SUCCESS) { 5580 swl = NULL; 5581 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5582 return rval; 5583 } 5584 5585 /* If other queries succeeded probe for FC-4 type */ 5586 if (swl) { 5587 qla2x00_gff_id(vha, swl); 5588 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5589 return rval; 5590 } 5591 } 5592 swl_idx = 0; 5593 5594 /* Allocate temporary fcport for any new fcports discovered. */ 5595 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 5596 if (new_fcport == NULL) { 5597 ql_log(ql_log_warn, vha, 0x209d, 5598 "Failed to allocate memory for fcport.\n"); 5599 return (QLA_MEMORY_ALLOC_FAILED); 5600 } 5601 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); 5602 /* Set start port ID scan at adapter ID. */ 5603 first_dev = 1; 5604 last_dev = 0; 5605 5606 /* Starting free loop ID. */ 5607 loop_id = ha->min_external_loopid; 5608 for (; loop_id <= ha->max_loop_id; loop_id++) { 5609 if (qla2x00_is_reserved_id(vha, loop_id)) 5610 continue; 5611 5612 if (ha->current_topology == ISP_CFG_FL && 5613 (atomic_read(&vha->loop_down_timer) || 5614 LOOP_TRANSITION(vha))) { 5615 atomic_set(&vha->loop_down_timer, 0); 5616 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 5617 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 5618 break; 5619 } 5620 5621 if (swl != NULL) { 5622 if (last_dev) { 5623 wrap.b24 = new_fcport->d_id.b24; 5624 } else { 5625 new_fcport->d_id.b24 = swl[swl_idx].d_id.b24; 5626 memcpy(new_fcport->node_name, 5627 swl[swl_idx].node_name, WWN_SIZE); 5628 memcpy(new_fcport->port_name, 5629 swl[swl_idx].port_name, WWN_SIZE); 5630 memcpy(new_fcport->fabric_port_name, 5631 swl[swl_idx].fabric_port_name, WWN_SIZE); 5632 new_fcport->fp_speed = swl[swl_idx].fp_speed; 5633 new_fcport->fc4_type = swl[swl_idx].fc4_type; 5634 5635 new_fcport->nvme_flag = 0; 5636 new_fcport->fc4f_nvme = 0; 5637 if (vha->flags.nvme_enabled && 5638 swl[swl_idx].fc4f_nvme) { 5639 new_fcport->fc4f_nvme = 5640 swl[swl_idx].fc4f_nvme; 5641 ql_log(ql_log_info, vha, 0x2131, 5642 "FOUND: NVME port %8phC as FC Type 28h\n", 5643 new_fcport->port_name); 5644 } 5645 5646 if (swl[swl_idx].d_id.b.rsvd_1 != 0) { 5647 last_dev = 1; 5648 } 5649 swl_idx++; 5650 } 5651 } else { 5652 /* Send GA_NXT to the switch */ 5653 rval = qla2x00_ga_nxt(vha, new_fcport); 5654 if (rval != QLA_SUCCESS) { 5655 ql_log(ql_log_warn, vha, 0x209e, 5656 "SNS scan failed -- assuming " 5657 "zero-entry result.\n"); 5658 rval = QLA_SUCCESS; 5659 break; 5660 } 5661 } 5662 5663 /* If wrap on switch device list, exit. */ 5664 if (first_dev) { 5665 wrap.b24 = new_fcport->d_id.b24; 5666 first_dev = 0; 5667 } else if (new_fcport->d_id.b24 == wrap.b24) { 5668 ql_dbg(ql_dbg_disc, vha, 0x209f, 5669 "Device wrap (%02x%02x%02x).\n", 5670 new_fcport->d_id.b.domain, 5671 new_fcport->d_id.b.area, 5672 new_fcport->d_id.b.al_pa); 5673 break; 5674 } 5675 5676 /* Bypass if same physical adapter. */ 5677 if (new_fcport->d_id.b24 == base_vha->d_id.b24) 5678 continue; 5679 5680 /* Bypass virtual ports of the same host. */ 5681 if (qla2x00_is_a_vp_did(vha, new_fcport->d_id.b24)) 5682 continue; 5683 5684 /* Bypass if same domain and area of adapter. */ 5685 if (((new_fcport->d_id.b24 & 0xffff00) == 5686 (vha->d_id.b24 & 0xffff00)) && ha->current_topology == 5687 ISP_CFG_FL) 5688 continue; 5689 5690 /* Bypass reserved domain fields. */ 5691 if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0) 5692 continue; 5693 5694 /* Bypass ports whose FCP-4 type is not FCP_SCSI */ 5695 if (ql2xgffidenable && 5696 (new_fcport->fc4_type != FC4_TYPE_FCP_SCSI && 5697 new_fcport->fc4_type != FC4_TYPE_UNKNOWN)) 5698 continue; 5699 5700 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 5701 5702 /* Locate matching device in database. */ 5703 found = 0; 5704 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5705 if (memcmp(new_fcport->port_name, fcport->port_name, 5706 WWN_SIZE)) 5707 continue; 5708 5709 fcport->scan_state = QLA_FCPORT_FOUND; 5710 5711 found++; 5712 5713 /* Update port state. */ 5714 memcpy(fcport->fabric_port_name, 5715 new_fcport->fabric_port_name, WWN_SIZE); 5716 fcport->fp_speed = new_fcport->fp_speed; 5717 5718 /* 5719 * If address the same and state FCS_ONLINE 5720 * (or in target mode), nothing changed. 5721 */ 5722 if (fcport->d_id.b24 == new_fcport->d_id.b24 && 5723 (atomic_read(&fcport->state) == FCS_ONLINE || 5724 (vha->host->active_mode == MODE_TARGET))) { 5725 break; 5726 } 5727 5728 /* 5729 * If device was not a fabric device before. 5730 */ 5731 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) { 5732 fcport->d_id.b24 = new_fcport->d_id.b24; 5733 qla2x00_clear_loop_id(fcport); 5734 fcport->flags |= (FCF_FABRIC_DEVICE | 5735 FCF_LOGIN_NEEDED); 5736 break; 5737 } 5738 5739 /* 5740 * Port ID changed or device was marked to be updated; 5741 * Log it out if still logged in and mark it for 5742 * relogin later. 5743 */ 5744 if (qla_tgt_mode_enabled(base_vha)) { 5745 ql_dbg(ql_dbg_tgt_mgt, vha, 0xf080, 5746 "port changed FC ID, %8phC" 5747 " old %x:%x:%x (loop_id 0x%04x)-> new %x:%x:%x\n", 5748 fcport->port_name, 5749 fcport->d_id.b.domain, 5750 fcport->d_id.b.area, 5751 fcport->d_id.b.al_pa, 5752 fcport->loop_id, 5753 new_fcport->d_id.b.domain, 5754 new_fcport->d_id.b.area, 5755 new_fcport->d_id.b.al_pa); 5756 fcport->d_id.b24 = new_fcport->d_id.b24; 5757 break; 5758 } 5759 5760 fcport->d_id.b24 = new_fcport->d_id.b24; 5761 fcport->flags |= FCF_LOGIN_NEEDED; 5762 break; 5763 } 5764 5765 if (fcport->fc4f_nvme) { 5766 if (fcport->disc_state == DSC_DELETE_PEND) { 5767 fcport->disc_state = DSC_GNL; 5768 vha->fcport_count--; 5769 fcport->login_succ = 0; 5770 } 5771 } 5772 5773 if (found) { 5774 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 5775 continue; 5776 } 5777 /* If device was not in our fcports list, then add it. */ 5778 new_fcport->scan_state = QLA_FCPORT_FOUND; 5779 list_add_tail(&new_fcport->list, &vha->vp_fcports); 5780 5781 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 5782 5783 5784 /* Allocate a new replacement fcport. */ 5785 nxt_d_id.b24 = new_fcport->d_id.b24; 5786 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); 5787 if (new_fcport == NULL) { 5788 ql_log(ql_log_warn, vha, 0xd032, 5789 "Memory allocation failed for fcport.\n"); 5790 return (QLA_MEMORY_ALLOC_FAILED); 5791 } 5792 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); 5793 new_fcport->d_id.b24 = nxt_d_id.b24; 5794 } 5795 5796 qla2x00_free_fcport(new_fcport); 5797 5798 /* 5799 * Logout all previous fabric dev marked lost, except FCP2 devices. 5800 */ 5801 list_for_each_entry(fcport, &vha->vp_fcports, list) { 5802 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) 5803 break; 5804 5805 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 || 5806 (fcport->flags & FCF_LOGIN_NEEDED) == 0) 5807 continue; 5808 5809 if (fcport->scan_state == QLA_FCPORT_SCAN) { 5810 if ((qla_dual_mode_enabled(vha) || 5811 qla_ini_mode_enabled(vha)) && 5812 atomic_read(&fcport->state) == FCS_ONLINE) { 5813 qla2x00_mark_device_lost(vha, fcport, 5814 ql2xplogiabsentdevice, 0); 5815 if (fcport->loop_id != FC_NO_LOOP_ID && 5816 (fcport->flags & FCF_FCP2_DEVICE) == 0 && 5817 fcport->port_type != FCT_INITIATOR && 5818 fcport->port_type != FCT_BROADCAST) { 5819 ql_dbg(ql_dbg_disc, vha, 0x20f0, 5820 "%s %d %8phC post del sess\n", 5821 __func__, __LINE__, 5822 fcport->port_name); 5823 qlt_schedule_sess_for_deletion(fcport); 5824 continue; 5825 } 5826 } 5827 } 5828 5829 if (fcport->scan_state == QLA_FCPORT_FOUND) 5830 qla24xx_fcport_handle_login(vha, fcport); 5831 } 5832 return (rval); 5833 } 5834 5835 /* 5836 * qla2x00_find_new_loop_id 5837 * Scan through our port list and find a new usable loop ID. 5838 * 5839 * Input: 5840 * ha: adapter state pointer. 5841 * dev: port structure pointer. 5842 * 5843 * Returns: 5844 * qla2x00 local function return status code. 5845 * 5846 * Context: 5847 * Kernel context. 5848 */ 5849 int 5850 qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev) 5851 { 5852 int rval; 5853 struct qla_hw_data *ha = vha->hw; 5854 unsigned long flags = 0; 5855 5856 rval = QLA_SUCCESS; 5857 5858 spin_lock_irqsave(&ha->vport_slock, flags); 5859 5860 dev->loop_id = find_first_zero_bit(ha->loop_id_map, 5861 LOOPID_MAP_SIZE); 5862 if (dev->loop_id >= LOOPID_MAP_SIZE || 5863 qla2x00_is_reserved_id(vha, dev->loop_id)) { 5864 dev->loop_id = FC_NO_LOOP_ID; 5865 rval = QLA_FUNCTION_FAILED; 5866 } else 5867 set_bit(dev->loop_id, ha->loop_id_map); 5868 5869 spin_unlock_irqrestore(&ha->vport_slock, flags); 5870 5871 if (rval == QLA_SUCCESS) 5872 ql_dbg(ql_dbg_disc, dev->vha, 0x2086, 5873 "Assigning new loopid=%x, portid=%x.\n", 5874 dev->loop_id, dev->d_id.b24); 5875 else 5876 ql_log(ql_log_warn, dev->vha, 0x2087, 5877 "No loop_id's available, portid=%x.\n", 5878 dev->d_id.b24); 5879 5880 return (rval); 5881 } 5882 5883 5884 /* FW does not set aside Loop id for MGMT Server/FFFFFAh */ 5885 int 5886 qla2x00_reserve_mgmt_server_loop_id(scsi_qla_host_t *vha) 5887 { 5888 int loop_id = FC_NO_LOOP_ID; 5889 int lid = NPH_MGMT_SERVER - vha->vp_idx; 5890 unsigned long flags; 5891 struct qla_hw_data *ha = vha->hw; 5892 5893 if (vha->vp_idx == 0) { 5894 set_bit(NPH_MGMT_SERVER, ha->loop_id_map); 5895 return NPH_MGMT_SERVER; 5896 } 5897 5898 /* pick id from high and work down to low */ 5899 spin_lock_irqsave(&ha->vport_slock, flags); 5900 for (; lid > 0; lid--) { 5901 if (!test_bit(lid, vha->hw->loop_id_map)) { 5902 set_bit(lid, vha->hw->loop_id_map); 5903 loop_id = lid; 5904 break; 5905 } 5906 } 5907 spin_unlock_irqrestore(&ha->vport_slock, flags); 5908 5909 return loop_id; 5910 } 5911 5912 /* 5913 * qla2x00_fabric_login 5914 * Issue fabric login command. 5915 * 5916 * Input: 5917 * ha = adapter block pointer. 5918 * device = pointer to FC device type structure. 5919 * 5920 * Returns: 5921 * 0 - Login successfully 5922 * 1 - Login failed 5923 * 2 - Initiator device 5924 * 3 - Fatal error 5925 */ 5926 int 5927 qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport, 5928 uint16_t *next_loopid) 5929 { 5930 int rval; 5931 int retry; 5932 uint16_t tmp_loopid; 5933 uint16_t mb[MAILBOX_REGISTER_COUNT]; 5934 struct qla_hw_data *ha = vha->hw; 5935 5936 retry = 0; 5937 tmp_loopid = 0; 5938 5939 for (;;) { 5940 ql_dbg(ql_dbg_disc, vha, 0x2000, 5941 "Trying Fabric Login w/loop id 0x%04x for port " 5942 "%02x%02x%02x.\n", 5943 fcport->loop_id, fcport->d_id.b.domain, 5944 fcport->d_id.b.area, fcport->d_id.b.al_pa); 5945 5946 /* Login fcport on switch. */ 5947 rval = ha->isp_ops->fabric_login(vha, fcport->loop_id, 5948 fcport->d_id.b.domain, fcport->d_id.b.area, 5949 fcport->d_id.b.al_pa, mb, BIT_0); 5950 if (rval != QLA_SUCCESS) { 5951 return rval; 5952 } 5953 if (mb[0] == MBS_PORT_ID_USED) { 5954 /* 5955 * Device has another loop ID. The firmware team 5956 * recommends the driver perform an implicit login with 5957 * the specified ID again. The ID we just used is save 5958 * here so we return with an ID that can be tried by 5959 * the next login. 5960 */ 5961 retry++; 5962 tmp_loopid = fcport->loop_id; 5963 fcport->loop_id = mb[1]; 5964 5965 ql_dbg(ql_dbg_disc, vha, 0x2001, 5966 "Fabric Login: port in use - next loop " 5967 "id=0x%04x, port id= %02x%02x%02x.\n", 5968 fcport->loop_id, fcport->d_id.b.domain, 5969 fcport->d_id.b.area, fcport->d_id.b.al_pa); 5970 5971 } else if (mb[0] == MBS_COMMAND_COMPLETE) { 5972 /* 5973 * Login succeeded. 5974 */ 5975 if (retry) { 5976 /* A retry occurred before. */ 5977 *next_loopid = tmp_loopid; 5978 } else { 5979 /* 5980 * No retry occurred before. Just increment the 5981 * ID value for next login. 5982 */ 5983 *next_loopid = (fcport->loop_id + 1); 5984 } 5985 5986 if (mb[1] & BIT_0) { 5987 fcport->port_type = FCT_INITIATOR; 5988 } else { 5989 fcport->port_type = FCT_TARGET; 5990 if (mb[1] & BIT_1) { 5991 fcport->flags |= FCF_FCP2_DEVICE; 5992 } 5993 } 5994 5995 if (mb[10] & BIT_0) 5996 fcport->supported_classes |= FC_COS_CLASS2; 5997 if (mb[10] & BIT_1) 5998 fcport->supported_classes |= FC_COS_CLASS3; 5999 6000 if (IS_FWI2_CAPABLE(ha)) { 6001 if (mb[10] & BIT_7) 6002 fcport->flags |= 6003 FCF_CONF_COMP_SUPPORTED; 6004 } 6005 6006 rval = QLA_SUCCESS; 6007 break; 6008 } else if (mb[0] == MBS_LOOP_ID_USED) { 6009 /* 6010 * Loop ID already used, try next loop ID. 6011 */ 6012 fcport->loop_id++; 6013 rval = qla2x00_find_new_loop_id(vha, fcport); 6014 if (rval != QLA_SUCCESS) { 6015 /* Ran out of loop IDs to use */ 6016 break; 6017 } 6018 } else if (mb[0] == MBS_COMMAND_ERROR) { 6019 /* 6020 * Firmware possibly timed out during login. If NO 6021 * retries are left to do then the device is declared 6022 * dead. 6023 */ 6024 *next_loopid = fcport->loop_id; 6025 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 6026 fcport->d_id.b.domain, fcport->d_id.b.area, 6027 fcport->d_id.b.al_pa); 6028 qla2x00_mark_device_lost(vha, fcport, 1, 0); 6029 6030 rval = 1; 6031 break; 6032 } else { 6033 /* 6034 * unrecoverable / not handled error 6035 */ 6036 ql_dbg(ql_dbg_disc, vha, 0x2002, 6037 "Failed=%x port_id=%02x%02x%02x loop_id=%x " 6038 "jiffies=%lx.\n", mb[0], fcport->d_id.b.domain, 6039 fcport->d_id.b.area, fcport->d_id.b.al_pa, 6040 fcport->loop_id, jiffies); 6041 6042 *next_loopid = fcport->loop_id; 6043 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 6044 fcport->d_id.b.domain, fcport->d_id.b.area, 6045 fcport->d_id.b.al_pa); 6046 qla2x00_clear_loop_id(fcport); 6047 fcport->login_retry = 0; 6048 6049 rval = 3; 6050 break; 6051 } 6052 } 6053 6054 return (rval); 6055 } 6056 6057 /* 6058 * qla2x00_local_device_login 6059 * Issue local device login command. 6060 * 6061 * Input: 6062 * ha = adapter block pointer. 6063 * loop_id = loop id of device to login to. 6064 * 6065 * Returns (Where's the #define!!!!): 6066 * 0 - Login successfully 6067 * 1 - Login failed 6068 * 3 - Fatal error 6069 */ 6070 int 6071 qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport) 6072 { 6073 int rval; 6074 uint16_t mb[MAILBOX_REGISTER_COUNT]; 6075 6076 memset(mb, 0, sizeof(mb)); 6077 rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0); 6078 if (rval == QLA_SUCCESS) { 6079 /* Interrogate mailbox registers for any errors */ 6080 if (mb[0] == MBS_COMMAND_ERROR) 6081 rval = 1; 6082 else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR) 6083 /* device not in PCB table */ 6084 rval = 3; 6085 } 6086 6087 return (rval); 6088 } 6089 6090 /* 6091 * qla2x00_loop_resync 6092 * Resync with fibre channel devices. 6093 * 6094 * Input: 6095 * ha = adapter block pointer. 6096 * 6097 * Returns: 6098 * 0 = success 6099 */ 6100 int 6101 qla2x00_loop_resync(scsi_qla_host_t *vha) 6102 { 6103 int rval = QLA_SUCCESS; 6104 uint32_t wait_time; 6105 struct req_que *req; 6106 struct rsp_que *rsp; 6107 6108 req = vha->req; 6109 rsp = req->rsp; 6110 6111 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6112 if (vha->flags.online) { 6113 if (!(rval = qla2x00_fw_ready(vha))) { 6114 /* Wait at most MAX_TARGET RSCNs for a stable link. */ 6115 wait_time = 256; 6116 do { 6117 if (!IS_QLAFX00(vha->hw)) { 6118 /* 6119 * Issue a marker after FW becomes 6120 * ready. 6121 */ 6122 qla2x00_marker(vha, req, rsp, 0, 0, 6123 MK_SYNC_ALL); 6124 vha->marker_needed = 0; 6125 } 6126 6127 /* Remap devices on Loop. */ 6128 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 6129 6130 if (IS_QLAFX00(vha->hw)) 6131 qlafx00_configure_devices(vha); 6132 else 6133 qla2x00_configure_loop(vha); 6134 6135 wait_time--; 6136 } while (!atomic_read(&vha->loop_down_timer) && 6137 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) 6138 && wait_time && (test_bit(LOOP_RESYNC_NEEDED, 6139 &vha->dpc_flags))); 6140 } 6141 } 6142 6143 if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) 6144 return (QLA_FUNCTION_FAILED); 6145 6146 if (rval) 6147 ql_dbg(ql_dbg_disc, vha, 0x206c, 6148 "%s *** FAILED ***.\n", __func__); 6149 6150 return (rval); 6151 } 6152 6153 /* 6154 * qla2x00_perform_loop_resync 6155 * Description: This function will set the appropriate flags and call 6156 * qla2x00_loop_resync. If successful loop will be resynced 6157 * Arguments : scsi_qla_host_t pointer 6158 * returm : Success or Failure 6159 */ 6160 6161 int qla2x00_perform_loop_resync(scsi_qla_host_t *ha) 6162 { 6163 int32_t rval = 0; 6164 6165 if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) { 6166 /*Configure the flags so that resync happens properly*/ 6167 atomic_set(&ha->loop_down_timer, 0); 6168 if (!(ha->device_flags & DFLG_NO_CABLE)) { 6169 atomic_set(&ha->loop_state, LOOP_UP); 6170 set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags); 6171 set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags); 6172 set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags); 6173 6174 rval = qla2x00_loop_resync(ha); 6175 } else 6176 atomic_set(&ha->loop_state, LOOP_DEAD); 6177 6178 clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags); 6179 } 6180 6181 return rval; 6182 } 6183 6184 void 6185 qla2x00_update_fcports(scsi_qla_host_t *base_vha) 6186 { 6187 fc_port_t *fcport; 6188 struct scsi_qla_host *vha; 6189 struct qla_hw_data *ha = base_vha->hw; 6190 unsigned long flags; 6191 6192 spin_lock_irqsave(&ha->vport_slock, flags); 6193 /* Go with deferred removal of rport references. */ 6194 list_for_each_entry(vha, &base_vha->hw->vp_list, list) { 6195 atomic_inc(&vha->vref_count); 6196 list_for_each_entry(fcport, &vha->vp_fcports, list) { 6197 if (fcport->drport && 6198 atomic_read(&fcport->state) != FCS_UNCONFIGURED) { 6199 spin_unlock_irqrestore(&ha->vport_slock, flags); 6200 qla2x00_rport_del(fcport); 6201 6202 spin_lock_irqsave(&ha->vport_slock, flags); 6203 } 6204 } 6205 atomic_dec(&vha->vref_count); 6206 wake_up(&vha->vref_waitq); 6207 } 6208 spin_unlock_irqrestore(&ha->vport_slock, flags); 6209 } 6210 6211 /* Assumes idc_lock always held on entry */ 6212 void 6213 qla83xx_reset_ownership(scsi_qla_host_t *vha) 6214 { 6215 struct qla_hw_data *ha = vha->hw; 6216 uint32_t drv_presence, drv_presence_mask; 6217 uint32_t dev_part_info1, dev_part_info2, class_type; 6218 uint32_t class_type_mask = 0x3; 6219 uint16_t fcoe_other_function = 0xffff, i; 6220 6221 if (IS_QLA8044(ha)) { 6222 drv_presence = qla8044_rd_direct(vha, 6223 QLA8044_CRB_DRV_ACTIVE_INDEX); 6224 dev_part_info1 = qla8044_rd_direct(vha, 6225 QLA8044_CRB_DEV_PART_INFO_INDEX); 6226 dev_part_info2 = qla8044_rd_direct(vha, 6227 QLA8044_CRB_DEV_PART_INFO2); 6228 } else { 6229 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence); 6230 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO1, &dev_part_info1); 6231 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO2, &dev_part_info2); 6232 } 6233 for (i = 0; i < 8; i++) { 6234 class_type = ((dev_part_info1 >> (i * 4)) & class_type_mask); 6235 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) && 6236 (i != ha->portnum)) { 6237 fcoe_other_function = i; 6238 break; 6239 } 6240 } 6241 if (fcoe_other_function == 0xffff) { 6242 for (i = 0; i < 8; i++) { 6243 class_type = ((dev_part_info2 >> (i * 4)) & 6244 class_type_mask); 6245 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) && 6246 ((i + 8) != ha->portnum)) { 6247 fcoe_other_function = i + 8; 6248 break; 6249 } 6250 } 6251 } 6252 /* 6253 * Prepare drv-presence mask based on fcoe functions present. 6254 * However consider only valid physical fcoe function numbers (0-15). 6255 */ 6256 drv_presence_mask = ~((1 << (ha->portnum)) | 6257 ((fcoe_other_function == 0xffff) ? 6258 0 : (1 << (fcoe_other_function)))); 6259 6260 /* We are the reset owner iff: 6261 * - No other protocol drivers present. 6262 * - This is the lowest among fcoe functions. */ 6263 if (!(drv_presence & drv_presence_mask) && 6264 (ha->portnum < fcoe_other_function)) { 6265 ql_dbg(ql_dbg_p3p, vha, 0xb07f, 6266 "This host is Reset owner.\n"); 6267 ha->flags.nic_core_reset_owner = 1; 6268 } 6269 } 6270 6271 static int 6272 __qla83xx_set_drv_ack(scsi_qla_host_t *vha) 6273 { 6274 int rval = QLA_SUCCESS; 6275 struct qla_hw_data *ha = vha->hw; 6276 uint32_t drv_ack; 6277 6278 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack); 6279 if (rval == QLA_SUCCESS) { 6280 drv_ack |= (1 << ha->portnum); 6281 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack); 6282 } 6283 6284 return rval; 6285 } 6286 6287 static int 6288 __qla83xx_clear_drv_ack(scsi_qla_host_t *vha) 6289 { 6290 int rval = QLA_SUCCESS; 6291 struct qla_hw_data *ha = vha->hw; 6292 uint32_t drv_ack; 6293 6294 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack); 6295 if (rval == QLA_SUCCESS) { 6296 drv_ack &= ~(1 << ha->portnum); 6297 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack); 6298 } 6299 6300 return rval; 6301 } 6302 6303 static const char * 6304 qla83xx_dev_state_to_string(uint32_t dev_state) 6305 { 6306 switch (dev_state) { 6307 case QLA8XXX_DEV_COLD: 6308 return "COLD/RE-INIT"; 6309 case QLA8XXX_DEV_INITIALIZING: 6310 return "INITIALIZING"; 6311 case QLA8XXX_DEV_READY: 6312 return "READY"; 6313 case QLA8XXX_DEV_NEED_RESET: 6314 return "NEED RESET"; 6315 case QLA8XXX_DEV_NEED_QUIESCENT: 6316 return "NEED QUIESCENT"; 6317 case QLA8XXX_DEV_FAILED: 6318 return "FAILED"; 6319 case QLA8XXX_DEV_QUIESCENT: 6320 return "QUIESCENT"; 6321 default: 6322 return "Unknown"; 6323 } 6324 } 6325 6326 /* Assumes idc-lock always held on entry */ 6327 void 6328 qla83xx_idc_audit(scsi_qla_host_t *vha, int audit_type) 6329 { 6330 struct qla_hw_data *ha = vha->hw; 6331 uint32_t idc_audit_reg = 0, duration_secs = 0; 6332 6333 switch (audit_type) { 6334 case IDC_AUDIT_TIMESTAMP: 6335 ha->idc_audit_ts = (jiffies_to_msecs(jiffies) / 1000); 6336 idc_audit_reg = (ha->portnum) | 6337 (IDC_AUDIT_TIMESTAMP << 7) | (ha->idc_audit_ts << 8); 6338 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg); 6339 break; 6340 6341 case IDC_AUDIT_COMPLETION: 6342 duration_secs = ((jiffies_to_msecs(jiffies) - 6343 jiffies_to_msecs(ha->idc_audit_ts)) / 1000); 6344 idc_audit_reg = (ha->portnum) | 6345 (IDC_AUDIT_COMPLETION << 7) | (duration_secs << 8); 6346 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg); 6347 break; 6348 6349 default: 6350 ql_log(ql_log_warn, vha, 0xb078, 6351 "Invalid audit type specified.\n"); 6352 break; 6353 } 6354 } 6355 6356 /* Assumes idc_lock always held on entry */ 6357 static int 6358 qla83xx_initiating_reset(scsi_qla_host_t *vha) 6359 { 6360 struct qla_hw_data *ha = vha->hw; 6361 uint32_t idc_control, dev_state; 6362 6363 __qla83xx_get_idc_control(vha, &idc_control); 6364 if ((idc_control & QLA83XX_IDC_RESET_DISABLED)) { 6365 ql_log(ql_log_info, vha, 0xb080, 6366 "NIC Core reset has been disabled. idc-control=0x%x\n", 6367 idc_control); 6368 return QLA_FUNCTION_FAILED; 6369 } 6370 6371 /* Set NEED-RESET iff in READY state and we are the reset-owner */ 6372 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state); 6373 if (ha->flags.nic_core_reset_owner && dev_state == QLA8XXX_DEV_READY) { 6374 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, 6375 QLA8XXX_DEV_NEED_RESET); 6376 ql_log(ql_log_info, vha, 0xb056, "HW State: NEED RESET.\n"); 6377 qla83xx_idc_audit(vha, IDC_AUDIT_TIMESTAMP); 6378 } else { 6379 const char *state = qla83xx_dev_state_to_string(dev_state); 6380 ql_log(ql_log_info, vha, 0xb057, "HW State: %s.\n", state); 6381 6382 /* SV: XXX: Is timeout required here? */ 6383 /* Wait for IDC state change READY -> NEED_RESET */ 6384 while (dev_state == QLA8XXX_DEV_READY) { 6385 qla83xx_idc_unlock(vha, 0); 6386 msleep(200); 6387 qla83xx_idc_lock(vha, 0); 6388 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state); 6389 } 6390 } 6391 6392 /* Send IDC ack by writing to drv-ack register */ 6393 __qla83xx_set_drv_ack(vha); 6394 6395 return QLA_SUCCESS; 6396 } 6397 6398 int 6399 __qla83xx_set_idc_control(scsi_qla_host_t *vha, uint32_t idc_control) 6400 { 6401 return qla83xx_wr_reg(vha, QLA83XX_IDC_CONTROL, idc_control); 6402 } 6403 6404 int 6405 __qla83xx_get_idc_control(scsi_qla_host_t *vha, uint32_t *idc_control) 6406 { 6407 return qla83xx_rd_reg(vha, QLA83XX_IDC_CONTROL, idc_control); 6408 } 6409 6410 static int 6411 qla83xx_check_driver_presence(scsi_qla_host_t *vha) 6412 { 6413 uint32_t drv_presence = 0; 6414 struct qla_hw_data *ha = vha->hw; 6415 6416 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence); 6417 if (drv_presence & (1 << ha->portnum)) 6418 return QLA_SUCCESS; 6419 else 6420 return QLA_TEST_FAILED; 6421 } 6422 6423 int 6424 qla83xx_nic_core_reset(scsi_qla_host_t *vha) 6425 { 6426 int rval = QLA_SUCCESS; 6427 struct qla_hw_data *ha = vha->hw; 6428 6429 ql_dbg(ql_dbg_p3p, vha, 0xb058, 6430 "Entered %s().\n", __func__); 6431 6432 if (vha->device_flags & DFLG_DEV_FAILED) { 6433 ql_log(ql_log_warn, vha, 0xb059, 6434 "Device in unrecoverable FAILED state.\n"); 6435 return QLA_FUNCTION_FAILED; 6436 } 6437 6438 qla83xx_idc_lock(vha, 0); 6439 6440 if (qla83xx_check_driver_presence(vha) != QLA_SUCCESS) { 6441 ql_log(ql_log_warn, vha, 0xb05a, 6442 "Function=0x%x has been removed from IDC participation.\n", 6443 ha->portnum); 6444 rval = QLA_FUNCTION_FAILED; 6445 goto exit; 6446 } 6447 6448 qla83xx_reset_ownership(vha); 6449 6450 rval = qla83xx_initiating_reset(vha); 6451 6452 /* 6453 * Perform reset if we are the reset-owner, 6454 * else wait till IDC state changes to READY/FAILED. 6455 */ 6456 if (rval == QLA_SUCCESS) { 6457 rval = qla83xx_idc_state_handler(vha); 6458 6459 if (rval == QLA_SUCCESS) 6460 ha->flags.nic_core_hung = 0; 6461 __qla83xx_clear_drv_ack(vha); 6462 } 6463 6464 exit: 6465 qla83xx_idc_unlock(vha, 0); 6466 6467 ql_dbg(ql_dbg_p3p, vha, 0xb05b, "Exiting %s.\n", __func__); 6468 6469 return rval; 6470 } 6471 6472 int 6473 qla2xxx_mctp_dump(scsi_qla_host_t *vha) 6474 { 6475 struct qla_hw_data *ha = vha->hw; 6476 int rval = QLA_FUNCTION_FAILED; 6477 6478 if (!IS_MCTP_CAPABLE(ha)) { 6479 /* This message can be removed from the final version */ 6480 ql_log(ql_log_info, vha, 0x506d, 6481 "This board is not MCTP capable\n"); 6482 return rval; 6483 } 6484 6485 if (!ha->mctp_dump) { 6486 ha->mctp_dump = dma_alloc_coherent(&ha->pdev->dev, 6487 MCTP_DUMP_SIZE, &ha->mctp_dump_dma, GFP_KERNEL); 6488 6489 if (!ha->mctp_dump) { 6490 ql_log(ql_log_warn, vha, 0x506e, 6491 "Failed to allocate memory for mctp dump\n"); 6492 return rval; 6493 } 6494 } 6495 6496 #define MCTP_DUMP_STR_ADDR 0x00000000 6497 rval = qla2x00_dump_mctp_data(vha, ha->mctp_dump_dma, 6498 MCTP_DUMP_STR_ADDR, MCTP_DUMP_SIZE/4); 6499 if (rval != QLA_SUCCESS) { 6500 ql_log(ql_log_warn, vha, 0x506f, 6501 "Failed to capture mctp dump\n"); 6502 } else { 6503 ql_log(ql_log_info, vha, 0x5070, 6504 "Mctp dump capture for host (%ld/%p).\n", 6505 vha->host_no, ha->mctp_dump); 6506 ha->mctp_dumped = 1; 6507 } 6508 6509 if (!ha->flags.nic_core_reset_hdlr_active && !ha->portnum) { 6510 ha->flags.nic_core_reset_hdlr_active = 1; 6511 rval = qla83xx_restart_nic_firmware(vha); 6512 if (rval) 6513 /* NIC Core reset failed. */ 6514 ql_log(ql_log_warn, vha, 0x5071, 6515 "Failed to restart nic firmware\n"); 6516 else 6517 ql_dbg(ql_dbg_p3p, vha, 0xb084, 6518 "Restarted NIC firmware successfully.\n"); 6519 ha->flags.nic_core_reset_hdlr_active = 0; 6520 } 6521 6522 return rval; 6523 6524 } 6525 6526 /* 6527 * qla2x00_quiesce_io 6528 * Description: This function will block the new I/Os 6529 * Its not aborting any I/Os as context 6530 * is not destroyed during quiescence 6531 * Arguments: scsi_qla_host_t 6532 * return : void 6533 */ 6534 void 6535 qla2x00_quiesce_io(scsi_qla_host_t *vha) 6536 { 6537 struct qla_hw_data *ha = vha->hw; 6538 struct scsi_qla_host *vp; 6539 6540 ql_dbg(ql_dbg_dpc, vha, 0x401d, 6541 "Quiescing I/O - ha=%p.\n", ha); 6542 6543 atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME); 6544 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 6545 atomic_set(&vha->loop_state, LOOP_DOWN); 6546 qla2x00_mark_all_devices_lost(vha, 0); 6547 list_for_each_entry(vp, &ha->vp_list, list) 6548 qla2x00_mark_all_devices_lost(vp, 0); 6549 } else { 6550 if (!atomic_read(&vha->loop_down_timer)) 6551 atomic_set(&vha->loop_down_timer, 6552 LOOP_DOWN_TIME); 6553 } 6554 /* Wait for pending cmds to complete */ 6555 qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST); 6556 } 6557 6558 void 6559 qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha) 6560 { 6561 struct qla_hw_data *ha = vha->hw; 6562 struct scsi_qla_host *vp; 6563 unsigned long flags; 6564 fc_port_t *fcport; 6565 u16 i; 6566 6567 /* For ISP82XX, driver waits for completion of the commands. 6568 * online flag should be set. 6569 */ 6570 if (!(IS_P3P_TYPE(ha))) 6571 vha->flags.online = 0; 6572 ha->flags.chip_reset_done = 0; 6573 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 6574 vha->qla_stats.total_isp_aborts++; 6575 6576 ql_log(ql_log_info, vha, 0x00af, 6577 "Performing ISP error recovery - ha=%p.\n", ha); 6578 6579 ha->flags.purge_mbox = 1; 6580 /* For ISP82XX, reset_chip is just disabling interrupts. 6581 * Driver waits for the completion of the commands. 6582 * the interrupts need to be enabled. 6583 */ 6584 if (!(IS_P3P_TYPE(ha))) 6585 ha->isp_ops->reset_chip(vha); 6586 6587 ha->link_data_rate = PORT_SPEED_UNKNOWN; 6588 SAVE_TOPO(ha); 6589 ha->flags.rida_fmt2 = 0; 6590 ha->flags.n2n_ae = 0; 6591 ha->flags.lip_ae = 0; 6592 ha->current_topology = 0; 6593 ha->flags.fw_started = 0; 6594 ha->flags.fw_init_done = 0; 6595 ha->chip_reset++; 6596 ha->base_qpair->chip_reset = ha->chip_reset; 6597 for (i = 0; i < ha->max_qpairs; i++) { 6598 if (ha->queue_pair_map[i]) 6599 ha->queue_pair_map[i]->chip_reset = 6600 ha->base_qpair->chip_reset; 6601 } 6602 6603 /* purge MBox commands */ 6604 if (atomic_read(&ha->num_pend_mbx_stage3)) { 6605 clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags); 6606 complete(&ha->mbx_intr_comp); 6607 } 6608 6609 i = 0; 6610 while (atomic_read(&ha->num_pend_mbx_stage3) || 6611 atomic_read(&ha->num_pend_mbx_stage2) || 6612 atomic_read(&ha->num_pend_mbx_stage1)) { 6613 msleep(20); 6614 i++; 6615 if (i > 50) 6616 break; 6617 } 6618 ha->flags.purge_mbox = 0; 6619 6620 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); 6621 if (atomic_read(&vha->loop_state) != LOOP_DOWN) { 6622 atomic_set(&vha->loop_state, LOOP_DOWN); 6623 qla2x00_mark_all_devices_lost(vha, 0); 6624 6625 spin_lock_irqsave(&ha->vport_slock, flags); 6626 list_for_each_entry(vp, &ha->vp_list, list) { 6627 atomic_inc(&vp->vref_count); 6628 spin_unlock_irqrestore(&ha->vport_slock, flags); 6629 6630 qla2x00_mark_all_devices_lost(vp, 0); 6631 6632 spin_lock_irqsave(&ha->vport_slock, flags); 6633 atomic_dec(&vp->vref_count); 6634 } 6635 spin_unlock_irqrestore(&ha->vport_slock, flags); 6636 } else { 6637 if (!atomic_read(&vha->loop_down_timer)) 6638 atomic_set(&vha->loop_down_timer, 6639 LOOP_DOWN_TIME); 6640 } 6641 6642 /* Clear all async request states across all VPs. */ 6643 list_for_each_entry(fcport, &vha->vp_fcports, list) 6644 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 6645 spin_lock_irqsave(&ha->vport_slock, flags); 6646 list_for_each_entry(vp, &ha->vp_list, list) { 6647 atomic_inc(&vp->vref_count); 6648 spin_unlock_irqrestore(&ha->vport_slock, flags); 6649 6650 list_for_each_entry(fcport, &vp->vp_fcports, list) 6651 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 6652 6653 spin_lock_irqsave(&ha->vport_slock, flags); 6654 atomic_dec(&vp->vref_count); 6655 } 6656 spin_unlock_irqrestore(&ha->vport_slock, flags); 6657 6658 if (!ha->flags.eeh_busy) { 6659 /* Make sure for ISP 82XX IO DMA is complete */ 6660 if (IS_P3P_TYPE(ha)) { 6661 qla82xx_chip_reset_cleanup(vha); 6662 ql_log(ql_log_info, vha, 0x00b4, 6663 "Done chip reset cleanup.\n"); 6664 6665 /* Done waiting for pending commands. 6666 * Reset the online flag. 6667 */ 6668 vha->flags.online = 0; 6669 } 6670 6671 /* Requeue all commands in outstanding command list. */ 6672 qla2x00_abort_all_cmds(vha, DID_RESET << 16); 6673 } 6674 /* memory barrier */ 6675 wmb(); 6676 } 6677 6678 /* 6679 * qla2x00_abort_isp 6680 * Resets ISP and aborts all outstanding commands. 6681 * 6682 * Input: 6683 * ha = adapter block pointer. 6684 * 6685 * Returns: 6686 * 0 = success 6687 */ 6688 int 6689 qla2x00_abort_isp(scsi_qla_host_t *vha) 6690 { 6691 int rval; 6692 uint8_t status = 0; 6693 struct qla_hw_data *ha = vha->hw; 6694 struct scsi_qla_host *vp; 6695 struct req_que *req = ha->req_q_map[0]; 6696 unsigned long flags; 6697 6698 if (vha->flags.online) { 6699 qla2x00_abort_isp_cleanup(vha); 6700 6701 if (IS_QLA8031(ha)) { 6702 ql_dbg(ql_dbg_p3p, vha, 0xb05c, 6703 "Clearing fcoe driver presence.\n"); 6704 if (qla83xx_clear_drv_presence(vha) != QLA_SUCCESS) 6705 ql_dbg(ql_dbg_p3p, vha, 0xb073, 6706 "Error while clearing DRV-Presence.\n"); 6707 } 6708 6709 if (unlikely(pci_channel_offline(ha->pdev) && 6710 ha->flags.pci_channel_io_perm_failure)) { 6711 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6712 status = 0; 6713 return status; 6714 } 6715 6716 switch (vha->qlini_mode) { 6717 case QLA2XXX_INI_MODE_DISABLED: 6718 if (!qla_tgt_mode_enabled(vha)) 6719 return 0; 6720 break; 6721 case QLA2XXX_INI_MODE_DUAL: 6722 if (!qla_dual_mode_enabled(vha)) 6723 return 0; 6724 break; 6725 case QLA2XXX_INI_MODE_ENABLED: 6726 default: 6727 break; 6728 } 6729 6730 ha->isp_ops->get_flash_version(vha, req->ring); 6731 6732 ha->isp_ops->nvram_config(vha); 6733 6734 if (!qla2x00_restart_isp(vha)) { 6735 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 6736 6737 if (!atomic_read(&vha->loop_down_timer)) { 6738 /* 6739 * Issue marker command only when we are going 6740 * to start the I/O . 6741 */ 6742 vha->marker_needed = 1; 6743 } 6744 6745 vha->flags.online = 1; 6746 6747 ha->isp_ops->enable_intrs(ha); 6748 6749 ha->isp_abort_cnt = 0; 6750 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6751 6752 if (IS_QLA81XX(ha) || IS_QLA8031(ha)) 6753 qla2x00_get_fw_version(vha); 6754 if (ha->fce) { 6755 ha->flags.fce_enabled = 1; 6756 memset(ha->fce, 0, 6757 fce_calc_size(ha->fce_bufs)); 6758 rval = qla2x00_enable_fce_trace(vha, 6759 ha->fce_dma, ha->fce_bufs, ha->fce_mb, 6760 &ha->fce_bufs); 6761 if (rval) { 6762 ql_log(ql_log_warn, vha, 0x8033, 6763 "Unable to reinitialize FCE " 6764 "(%d).\n", rval); 6765 ha->flags.fce_enabled = 0; 6766 } 6767 } 6768 6769 if (ha->eft) { 6770 memset(ha->eft, 0, EFT_SIZE); 6771 rval = qla2x00_enable_eft_trace(vha, 6772 ha->eft_dma, EFT_NUM_BUFFERS); 6773 if (rval) { 6774 ql_log(ql_log_warn, vha, 0x8034, 6775 "Unable to reinitialize EFT " 6776 "(%d).\n", rval); 6777 } 6778 } 6779 } else { /* failed the ISP abort */ 6780 vha->flags.online = 1; 6781 if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) { 6782 if (ha->isp_abort_cnt == 0) { 6783 ql_log(ql_log_fatal, vha, 0x8035, 6784 "ISP error recover failed - " 6785 "board disabled.\n"); 6786 /* 6787 * The next call disables the board 6788 * completely. 6789 */ 6790 qla2x00_abort_isp_cleanup(vha); 6791 vha->flags.online = 0; 6792 clear_bit(ISP_ABORT_RETRY, 6793 &vha->dpc_flags); 6794 status = 0; 6795 } else { /* schedule another ISP abort */ 6796 ha->isp_abort_cnt--; 6797 ql_dbg(ql_dbg_taskm, vha, 0x8020, 6798 "ISP abort - retry remaining %d.\n", 6799 ha->isp_abort_cnt); 6800 status = 1; 6801 } 6802 } else { 6803 ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT; 6804 ql_dbg(ql_dbg_taskm, vha, 0x8021, 6805 "ISP error recovery - retrying (%d) " 6806 "more times.\n", ha->isp_abort_cnt); 6807 set_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 6808 status = 1; 6809 } 6810 } 6811 6812 } 6813 6814 if (!status) { 6815 ql_dbg(ql_dbg_taskm, vha, 0x8022, "%s succeeded.\n", __func__); 6816 qla2x00_configure_hba(vha); 6817 spin_lock_irqsave(&ha->vport_slock, flags); 6818 list_for_each_entry(vp, &ha->vp_list, list) { 6819 if (vp->vp_idx) { 6820 atomic_inc(&vp->vref_count); 6821 spin_unlock_irqrestore(&ha->vport_slock, flags); 6822 6823 qla2x00_vp_abort_isp(vp); 6824 6825 spin_lock_irqsave(&ha->vport_slock, flags); 6826 atomic_dec(&vp->vref_count); 6827 } 6828 } 6829 spin_unlock_irqrestore(&ha->vport_slock, flags); 6830 6831 if (IS_QLA8031(ha)) { 6832 ql_dbg(ql_dbg_p3p, vha, 0xb05d, 6833 "Setting back fcoe driver presence.\n"); 6834 if (qla83xx_set_drv_presence(vha) != QLA_SUCCESS) 6835 ql_dbg(ql_dbg_p3p, vha, 0xb074, 6836 "Error while setting DRV-Presence.\n"); 6837 } 6838 } else { 6839 ql_log(ql_log_warn, vha, 0x8023, "%s **** FAILED ****.\n", 6840 __func__); 6841 } 6842 6843 return(status); 6844 } 6845 6846 /* 6847 * qla2x00_restart_isp 6848 * restarts the ISP after a reset 6849 * 6850 * Input: 6851 * ha = adapter block pointer. 6852 * 6853 * Returns: 6854 * 0 = success 6855 */ 6856 static int 6857 qla2x00_restart_isp(scsi_qla_host_t *vha) 6858 { 6859 int status = 0; 6860 struct qla_hw_data *ha = vha->hw; 6861 struct req_que *req = ha->req_q_map[0]; 6862 struct rsp_que *rsp = ha->rsp_q_map[0]; 6863 6864 /* If firmware needs to be loaded */ 6865 if (qla2x00_isp_firmware(vha)) { 6866 vha->flags.online = 0; 6867 status = ha->isp_ops->chip_diag(vha); 6868 if (!status) 6869 status = qla2x00_setup_chip(vha); 6870 } 6871 6872 if (!status && !(status = qla2x00_init_rings(vha))) { 6873 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 6874 ha->flags.chip_reset_done = 1; 6875 6876 /* Initialize the queues in use */ 6877 qla25xx_init_queues(ha); 6878 6879 status = qla2x00_fw_ready(vha); 6880 if (!status) { 6881 /* Issue a marker after FW becomes ready. */ 6882 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); 6883 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 6884 } 6885 6886 /* if no cable then assume it's good */ 6887 if ((vha->device_flags & DFLG_NO_CABLE)) 6888 status = 0; 6889 } 6890 return (status); 6891 } 6892 6893 static int 6894 qla25xx_init_queues(struct qla_hw_data *ha) 6895 { 6896 struct rsp_que *rsp = NULL; 6897 struct req_que *req = NULL; 6898 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 6899 int ret = -1; 6900 int i; 6901 6902 for (i = 1; i < ha->max_rsp_queues; i++) { 6903 rsp = ha->rsp_q_map[i]; 6904 if (rsp && test_bit(i, ha->rsp_qid_map)) { 6905 rsp->options &= ~BIT_0; 6906 ret = qla25xx_init_rsp_que(base_vha, rsp); 6907 if (ret != QLA_SUCCESS) 6908 ql_dbg(ql_dbg_init, base_vha, 0x00ff, 6909 "%s Rsp que: %d init failed.\n", 6910 __func__, rsp->id); 6911 else 6912 ql_dbg(ql_dbg_init, base_vha, 0x0100, 6913 "%s Rsp que: %d inited.\n", 6914 __func__, rsp->id); 6915 } 6916 } 6917 for (i = 1; i < ha->max_req_queues; i++) { 6918 req = ha->req_q_map[i]; 6919 if (req && test_bit(i, ha->req_qid_map)) { 6920 /* Clear outstanding commands array. */ 6921 req->options &= ~BIT_0; 6922 ret = qla25xx_init_req_que(base_vha, req); 6923 if (ret != QLA_SUCCESS) 6924 ql_dbg(ql_dbg_init, base_vha, 0x0101, 6925 "%s Req que: %d init failed.\n", 6926 __func__, req->id); 6927 else 6928 ql_dbg(ql_dbg_init, base_vha, 0x0102, 6929 "%s Req que: %d inited.\n", 6930 __func__, req->id); 6931 } 6932 } 6933 return ret; 6934 } 6935 6936 /* 6937 * qla2x00_reset_adapter 6938 * Reset adapter. 6939 * 6940 * Input: 6941 * ha = adapter block pointer. 6942 */ 6943 void 6944 qla2x00_reset_adapter(scsi_qla_host_t *vha) 6945 { 6946 unsigned long flags = 0; 6947 struct qla_hw_data *ha = vha->hw; 6948 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; 6949 6950 vha->flags.online = 0; 6951 ha->isp_ops->disable_intrs(ha); 6952 6953 spin_lock_irqsave(&ha->hardware_lock, flags); 6954 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); 6955 RD_REG_WORD(®->hccr); /* PCI Posting. */ 6956 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); 6957 RD_REG_WORD(®->hccr); /* PCI Posting. */ 6958 spin_unlock_irqrestore(&ha->hardware_lock, flags); 6959 } 6960 6961 void 6962 qla24xx_reset_adapter(scsi_qla_host_t *vha) 6963 { 6964 unsigned long flags = 0; 6965 struct qla_hw_data *ha = vha->hw; 6966 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; 6967 6968 if (IS_P3P_TYPE(ha)) 6969 return; 6970 6971 vha->flags.online = 0; 6972 ha->isp_ops->disable_intrs(ha); 6973 6974 spin_lock_irqsave(&ha->hardware_lock, flags); 6975 WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET); 6976 RD_REG_DWORD(®->hccr); 6977 WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE); 6978 RD_REG_DWORD(®->hccr); 6979 spin_unlock_irqrestore(&ha->hardware_lock, flags); 6980 6981 if (IS_NOPOLLING_TYPE(ha)) 6982 ha->isp_ops->enable_intrs(ha); 6983 } 6984 6985 /* On sparc systems, obtain port and node WWN from firmware 6986 * properties. 6987 */ 6988 static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, 6989 struct nvram_24xx *nv) 6990 { 6991 #ifdef CONFIG_SPARC 6992 struct qla_hw_data *ha = vha->hw; 6993 struct pci_dev *pdev = ha->pdev; 6994 struct device_node *dp = pci_device_to_OF_node(pdev); 6995 const u8 *val; 6996 int len; 6997 6998 val = of_get_property(dp, "port-wwn", &len); 6999 if (val && len >= WWN_SIZE) 7000 memcpy(nv->port_name, val, WWN_SIZE); 7001 7002 val = of_get_property(dp, "node-wwn", &len); 7003 if (val && len >= WWN_SIZE) 7004 memcpy(nv->node_name, val, WWN_SIZE); 7005 #endif 7006 } 7007 7008 int 7009 qla24xx_nvram_config(scsi_qla_host_t *vha) 7010 { 7011 int rval; 7012 struct init_cb_24xx *icb; 7013 struct nvram_24xx *nv; 7014 uint32_t *dptr; 7015 uint8_t *dptr1, *dptr2; 7016 uint32_t chksum; 7017 uint16_t cnt; 7018 struct qla_hw_data *ha = vha->hw; 7019 7020 rval = QLA_SUCCESS; 7021 icb = (struct init_cb_24xx *)ha->init_cb; 7022 nv = ha->nvram; 7023 7024 /* Determine NVRAM starting address. */ 7025 if (ha->port_no == 0) { 7026 ha->nvram_base = FA_NVRAM_FUNC0_ADDR; 7027 ha->vpd_base = FA_NVRAM_VPD0_ADDR; 7028 } else { 7029 ha->nvram_base = FA_NVRAM_FUNC1_ADDR; 7030 ha->vpd_base = FA_NVRAM_VPD1_ADDR; 7031 } 7032 7033 ha->nvram_size = sizeof(struct nvram_24xx); 7034 ha->vpd_size = FA_NVRAM_VPD_SIZE; 7035 7036 /* Get VPD data into cache */ 7037 ha->vpd = ha->nvram + VPD_OFFSET; 7038 ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd, 7039 ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4); 7040 7041 /* Get NVRAM data into cache and calculate checksum. */ 7042 dptr = (uint32_t *)nv; 7043 ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base, 7044 ha->nvram_size); 7045 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++) 7046 chksum += le32_to_cpu(*dptr); 7047 7048 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a, 7049 "Contents of NVRAM\n"); 7050 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d, 7051 (uint8_t *)nv, ha->nvram_size); 7052 7053 /* Bad NVRAM data, set defaults parameters. */ 7054 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P' 7055 || nv->id[3] != ' ' || 7056 nv->nvram_version < cpu_to_le16(ICB_VERSION)) { 7057 /* Reset NVRAM data. */ 7058 ql_log(ql_log_warn, vha, 0x006b, 7059 "Inconsistent NVRAM detected: checksum=0x%x id=%c " 7060 "version=0x%x.\n", chksum, nv->id[0], nv->nvram_version); 7061 ql_log(ql_log_warn, vha, 0x006c, 7062 "Falling back to functioning (yet invalid -- WWPN) " 7063 "defaults.\n"); 7064 7065 /* 7066 * Set default initialization control block. 7067 */ 7068 memset(nv, 0, ha->nvram_size); 7069 nv->nvram_version = cpu_to_le16(ICB_VERSION); 7070 nv->version = cpu_to_le16(ICB_VERSION); 7071 nv->frame_payload_size = 2048; 7072 nv->execution_throttle = cpu_to_le16(0xFFFF); 7073 nv->exchange_count = cpu_to_le16(0); 7074 nv->hard_address = cpu_to_le16(124); 7075 nv->port_name[0] = 0x21; 7076 nv->port_name[1] = 0x00 + ha->port_no + 1; 7077 nv->port_name[2] = 0x00; 7078 nv->port_name[3] = 0xe0; 7079 nv->port_name[4] = 0x8b; 7080 nv->port_name[5] = 0x1c; 7081 nv->port_name[6] = 0x55; 7082 nv->port_name[7] = 0x86; 7083 nv->node_name[0] = 0x20; 7084 nv->node_name[1] = 0x00; 7085 nv->node_name[2] = 0x00; 7086 nv->node_name[3] = 0xe0; 7087 nv->node_name[4] = 0x8b; 7088 nv->node_name[5] = 0x1c; 7089 nv->node_name[6] = 0x55; 7090 nv->node_name[7] = 0x86; 7091 qla24xx_nvram_wwn_from_ofw(vha, nv); 7092 nv->login_retry_count = cpu_to_le16(8); 7093 nv->interrupt_delay_timer = cpu_to_le16(0); 7094 nv->login_timeout = cpu_to_le16(0); 7095 nv->firmware_options_1 = 7096 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); 7097 nv->firmware_options_2 = cpu_to_le32(2 << 4); 7098 nv->firmware_options_2 |= cpu_to_le32(BIT_12); 7099 nv->firmware_options_3 = cpu_to_le32(2 << 13); 7100 nv->host_p = cpu_to_le32(BIT_11|BIT_10); 7101 nv->efi_parameters = cpu_to_le32(0); 7102 nv->reset_delay = 5; 7103 nv->max_luns_per_target = cpu_to_le16(128); 7104 nv->port_down_retry_count = cpu_to_le16(30); 7105 nv->link_down_timeout = cpu_to_le16(30); 7106 7107 rval = 1; 7108 } 7109 7110 if (qla_tgt_mode_enabled(vha)) { 7111 /* Don't enable full login after initial LIP */ 7112 nv->firmware_options_1 &= cpu_to_le32(~BIT_13); 7113 /* Don't enable LIP full login for initiator */ 7114 nv->host_p &= cpu_to_le32(~BIT_10); 7115 } 7116 7117 qlt_24xx_config_nvram_stage1(vha, nv); 7118 7119 /* Reset Initialization control block */ 7120 memset(icb, 0, ha->init_cb_size); 7121 7122 /* Copy 1st segment. */ 7123 dptr1 = (uint8_t *)icb; 7124 dptr2 = (uint8_t *)&nv->version; 7125 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; 7126 while (cnt--) 7127 *dptr1++ = *dptr2++; 7128 7129 icb->login_retry_count = nv->login_retry_count; 7130 icb->link_down_on_nos = nv->link_down_on_nos; 7131 7132 /* Copy 2nd segment. */ 7133 dptr1 = (uint8_t *)&icb->interrupt_delay_timer; 7134 dptr2 = (uint8_t *)&nv->interrupt_delay_timer; 7135 cnt = (uint8_t *)&icb->reserved_3 - 7136 (uint8_t *)&icb->interrupt_delay_timer; 7137 while (cnt--) 7138 *dptr1++ = *dptr2++; 7139 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size); 7140 /* 7141 * Setup driver NVRAM options. 7142 */ 7143 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), 7144 "QLA2462"); 7145 7146 qlt_24xx_config_nvram_stage2(vha, icb); 7147 7148 if (nv->host_p & cpu_to_le32(BIT_15)) { 7149 /* Use alternate WWN? */ 7150 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 7151 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 7152 } 7153 7154 /* Prepare nodename */ 7155 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) { 7156 /* 7157 * Firmware will apply the following mask if the nodename was 7158 * not provided. 7159 */ 7160 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 7161 icb->node_name[0] &= 0xF0; 7162 } 7163 7164 /* Set host adapter parameters. */ 7165 ha->flags.disable_risc_code_load = 0; 7166 ha->flags.enable_lip_reset = 0; 7167 ha->flags.enable_lip_full_login = 7168 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0; 7169 ha->flags.enable_target_reset = 7170 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0; 7171 ha->flags.enable_led_scheme = 0; 7172 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0; 7173 7174 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & 7175 (BIT_6 | BIT_5 | BIT_4)) >> 4; 7176 7177 memcpy(ha->fw_seriallink_options24, nv->seriallink_options, 7178 sizeof(ha->fw_seriallink_options24)); 7179 7180 /* save HBA serial number */ 7181 ha->serial0 = icb->port_name[5]; 7182 ha->serial1 = icb->port_name[6]; 7183 ha->serial2 = icb->port_name[7]; 7184 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 7185 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 7186 7187 icb->execution_throttle = cpu_to_le16(0xFFFF); 7188 7189 ha->retry_count = le16_to_cpu(nv->login_retry_count); 7190 7191 /* Set minimum login_timeout to 4 seconds. */ 7192 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) 7193 nv->login_timeout = cpu_to_le16(ql2xlogintimeout); 7194 if (le16_to_cpu(nv->login_timeout) < 4) 7195 nv->login_timeout = cpu_to_le16(4); 7196 ha->login_timeout = le16_to_cpu(nv->login_timeout); 7197 7198 /* Set minimum RATOV to 100 tenths of a second. */ 7199 ha->r_a_tov = 100; 7200 7201 ha->loop_reset_delay = nv->reset_delay; 7202 7203 /* Link Down Timeout = 0: 7204 * 7205 * When Port Down timer expires we will start returning 7206 * I/O's to OS with "DID_NO_CONNECT". 7207 * 7208 * Link Down Timeout != 0: 7209 * 7210 * The driver waits for the link to come up after link down 7211 * before returning I/Os to OS with "DID_NO_CONNECT". 7212 */ 7213 if (le16_to_cpu(nv->link_down_timeout) == 0) { 7214 ha->loop_down_abort_time = 7215 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 7216 } else { 7217 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); 7218 ha->loop_down_abort_time = 7219 (LOOP_DOWN_TIME - ha->link_down_timeout); 7220 } 7221 7222 /* Need enough time to try and get the port back. */ 7223 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); 7224 if (qlport_down_retry) 7225 ha->port_down_retry_count = qlport_down_retry; 7226 7227 /* Set login_retry_count */ 7228 ha->login_retry_count = le16_to_cpu(nv->login_retry_count); 7229 if (ha->port_down_retry_count == 7230 le16_to_cpu(nv->port_down_retry_count) && 7231 ha->port_down_retry_count > 3) 7232 ha->login_retry_count = ha->port_down_retry_count; 7233 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 7234 ha->login_retry_count = ha->port_down_retry_count; 7235 if (ql2xloginretrycount) 7236 ha->login_retry_count = ql2xloginretrycount; 7237 7238 /* N2N: driver will initiate Login instead of FW */ 7239 icb->firmware_options_3 |= BIT_8; 7240 7241 /* Enable ZIO. */ 7242 if (!vha->flags.init_done) { 7243 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & 7244 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 7245 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? 7246 le16_to_cpu(icb->interrupt_delay_timer): 2; 7247 } 7248 icb->firmware_options_2 &= cpu_to_le32( 7249 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); 7250 if (ha->zio_mode != QLA_ZIO_DISABLED) { 7251 ha->zio_mode = QLA_ZIO_MODE_6; 7252 7253 ql_log(ql_log_info, vha, 0x006f, 7254 "ZIO mode %d enabled; timer delay (%d us).\n", 7255 ha->zio_mode, ha->zio_timer * 100); 7256 7257 icb->firmware_options_2 |= cpu_to_le32( 7258 (uint32_t)ha->zio_mode); 7259 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); 7260 } 7261 7262 if (rval) { 7263 ql_log(ql_log_warn, vha, 0x0070, 7264 "NVRAM configuration failed.\n"); 7265 } 7266 return (rval); 7267 } 7268 7269 uint8_t qla27xx_find_valid_image(struct scsi_qla_host *vha) 7270 { 7271 struct qla27xx_image_status pri_image_status, sec_image_status; 7272 uint8_t valid_pri_image, valid_sec_image; 7273 uint32_t *wptr; 7274 uint32_t cnt, chksum, size; 7275 struct qla_hw_data *ha = vha->hw; 7276 7277 valid_pri_image = valid_sec_image = 1; 7278 ha->active_image = 0; 7279 size = sizeof(struct qla27xx_image_status) / sizeof(uint32_t); 7280 7281 if (!ha->flt_region_img_status_pri) { 7282 valid_pri_image = 0; 7283 goto check_sec_image; 7284 } 7285 7286 qla24xx_read_flash_data(vha, (uint32_t *)(&pri_image_status), 7287 ha->flt_region_img_status_pri, size); 7288 7289 if (pri_image_status.signature != QLA27XX_IMG_STATUS_SIGN) { 7290 ql_dbg(ql_dbg_init, vha, 0x018b, 7291 "Primary image signature (0x%x) not valid\n", 7292 pri_image_status.signature); 7293 valid_pri_image = 0; 7294 goto check_sec_image; 7295 } 7296 7297 wptr = (uint32_t *)(&pri_image_status); 7298 cnt = size; 7299 7300 for (chksum = 0; cnt--; wptr++) 7301 chksum += le32_to_cpu(*wptr); 7302 7303 if (chksum) { 7304 ql_dbg(ql_dbg_init, vha, 0x018c, 7305 "Checksum validation failed for primary image (0x%x)\n", 7306 chksum); 7307 valid_pri_image = 0; 7308 } 7309 7310 check_sec_image: 7311 if (!ha->flt_region_img_status_sec) { 7312 valid_sec_image = 0; 7313 goto check_valid_image; 7314 } 7315 7316 qla24xx_read_flash_data(vha, (uint32_t *)(&sec_image_status), 7317 ha->flt_region_img_status_sec, size); 7318 7319 if (sec_image_status.signature != QLA27XX_IMG_STATUS_SIGN) { 7320 ql_dbg(ql_dbg_init, vha, 0x018d, 7321 "Secondary image signature(0x%x) not valid\n", 7322 sec_image_status.signature); 7323 valid_sec_image = 0; 7324 goto check_valid_image; 7325 } 7326 7327 wptr = (uint32_t *)(&sec_image_status); 7328 cnt = size; 7329 for (chksum = 0; cnt--; wptr++) 7330 chksum += le32_to_cpu(*wptr); 7331 if (chksum) { 7332 ql_dbg(ql_dbg_init, vha, 0x018e, 7333 "Checksum validation failed for secondary image (0x%x)\n", 7334 chksum); 7335 valid_sec_image = 0; 7336 } 7337 7338 check_valid_image: 7339 if (valid_pri_image && (pri_image_status.image_status_mask & 0x1)) 7340 ha->active_image = QLA27XX_PRIMARY_IMAGE; 7341 if (valid_sec_image && (sec_image_status.image_status_mask & 0x1)) { 7342 if (!ha->active_image || 7343 pri_image_status.generation_number < 7344 sec_image_status.generation_number) 7345 ha->active_image = QLA27XX_SECONDARY_IMAGE; 7346 } 7347 7348 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x018f, "%s image\n", 7349 ha->active_image == 0 ? "default bootld and fw" : 7350 ha->active_image == 1 ? "primary" : 7351 ha->active_image == 2 ? "secondary" : 7352 "Invalid"); 7353 7354 return ha->active_image; 7355 } 7356 7357 static int 7358 qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr, 7359 uint32_t faddr) 7360 { 7361 int rval = QLA_SUCCESS; 7362 int segments, fragment; 7363 uint32_t *dcode, dlen; 7364 uint32_t risc_addr; 7365 uint32_t risc_size; 7366 uint32_t i; 7367 struct qla_hw_data *ha = vha->hw; 7368 struct req_que *req = ha->req_q_map[0]; 7369 7370 ql_dbg(ql_dbg_init, vha, 0x008b, 7371 "FW: Loading firmware from flash (%x).\n", faddr); 7372 7373 rval = QLA_SUCCESS; 7374 7375 segments = FA_RISC_CODE_SEGMENTS; 7376 dcode = (uint32_t *)req->ring; 7377 *srisc_addr = 0; 7378 7379 if (IS_QLA27XX(ha) && 7380 qla27xx_find_valid_image(vha) == QLA27XX_SECONDARY_IMAGE) 7381 faddr = ha->flt_region_fw_sec; 7382 7383 /* Validate firmware image by checking version. */ 7384 qla24xx_read_flash_data(vha, dcode, faddr + 4, 4); 7385 for (i = 0; i < 4; i++) 7386 dcode[i] = be32_to_cpu(dcode[i]); 7387 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff && 7388 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) || 7389 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 && 7390 dcode[3] == 0)) { 7391 ql_log(ql_log_fatal, vha, 0x008c, 7392 "Unable to verify the integrity of flash firmware " 7393 "image.\n"); 7394 ql_log(ql_log_fatal, vha, 0x008d, 7395 "Firmware data: %08x %08x %08x %08x.\n", 7396 dcode[0], dcode[1], dcode[2], dcode[3]); 7397 7398 return QLA_FUNCTION_FAILED; 7399 } 7400 7401 while (segments && rval == QLA_SUCCESS) { 7402 /* Read segment's load information. */ 7403 qla24xx_read_flash_data(vha, dcode, faddr, 4); 7404 7405 risc_addr = be32_to_cpu(dcode[2]); 7406 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr; 7407 risc_size = be32_to_cpu(dcode[3]); 7408 7409 fragment = 0; 7410 while (risc_size > 0 && rval == QLA_SUCCESS) { 7411 dlen = (uint32_t)(ha->fw_transfer_size >> 2); 7412 if (dlen > risc_size) 7413 dlen = risc_size; 7414 7415 ql_dbg(ql_dbg_init, vha, 0x008e, 7416 "Loading risc segment@ risc addr %x " 7417 "number of dwords 0x%x offset 0x%x.\n", 7418 risc_addr, dlen, faddr); 7419 7420 qla24xx_read_flash_data(vha, dcode, faddr, dlen); 7421 for (i = 0; i < dlen; i++) 7422 dcode[i] = swab32(dcode[i]); 7423 7424 rval = qla2x00_load_ram(vha, req->dma, risc_addr, 7425 dlen); 7426 if (rval) { 7427 ql_log(ql_log_fatal, vha, 0x008f, 7428 "Failed to load segment %d of firmware.\n", 7429 fragment); 7430 return QLA_FUNCTION_FAILED; 7431 } 7432 7433 faddr += dlen; 7434 risc_addr += dlen; 7435 risc_size -= dlen; 7436 fragment++; 7437 } 7438 7439 /* Next segment. */ 7440 segments--; 7441 } 7442 7443 if (!IS_QLA27XX(ha)) 7444 return rval; 7445 7446 if (ha->fw_dump_template) 7447 vfree(ha->fw_dump_template); 7448 ha->fw_dump_template = NULL; 7449 ha->fw_dump_template_len = 0; 7450 7451 ql_dbg(ql_dbg_init, vha, 0x0161, 7452 "Loading fwdump template from %x\n", faddr); 7453 qla24xx_read_flash_data(vha, dcode, faddr, 7); 7454 risc_size = be32_to_cpu(dcode[2]); 7455 ql_dbg(ql_dbg_init, vha, 0x0162, 7456 "-> array size %x dwords\n", risc_size); 7457 if (risc_size == 0 || risc_size == ~0) 7458 goto default_template; 7459 7460 dlen = (risc_size - 8) * sizeof(*dcode); 7461 ql_dbg(ql_dbg_init, vha, 0x0163, 7462 "-> template allocating %x bytes...\n", dlen); 7463 ha->fw_dump_template = vmalloc(dlen); 7464 if (!ha->fw_dump_template) { 7465 ql_log(ql_log_warn, vha, 0x0164, 7466 "Failed fwdump template allocate %x bytes.\n", risc_size); 7467 goto default_template; 7468 } 7469 7470 faddr += 7; 7471 risc_size -= 8; 7472 dcode = ha->fw_dump_template; 7473 qla24xx_read_flash_data(vha, dcode, faddr, risc_size); 7474 for (i = 0; i < risc_size; i++) 7475 dcode[i] = le32_to_cpu(dcode[i]); 7476 7477 if (!qla27xx_fwdt_template_valid(dcode)) { 7478 ql_log(ql_log_warn, vha, 0x0165, 7479 "Failed fwdump template validate\n"); 7480 goto default_template; 7481 } 7482 7483 dlen = qla27xx_fwdt_template_size(dcode); 7484 ql_dbg(ql_dbg_init, vha, 0x0166, 7485 "-> template size %x bytes\n", dlen); 7486 if (dlen > risc_size * sizeof(*dcode)) { 7487 ql_log(ql_log_warn, vha, 0x0167, 7488 "Failed fwdump template exceeds array by %zx bytes\n", 7489 (size_t)(dlen - risc_size * sizeof(*dcode))); 7490 goto default_template; 7491 } 7492 ha->fw_dump_template_len = dlen; 7493 return rval; 7494 7495 default_template: 7496 ql_log(ql_log_warn, vha, 0x0168, "Using default fwdump template\n"); 7497 if (ha->fw_dump_template) 7498 vfree(ha->fw_dump_template); 7499 ha->fw_dump_template = NULL; 7500 ha->fw_dump_template_len = 0; 7501 7502 dlen = qla27xx_fwdt_template_default_size(); 7503 ql_dbg(ql_dbg_init, vha, 0x0169, 7504 "-> template allocating %x bytes...\n", dlen); 7505 ha->fw_dump_template = vmalloc(dlen); 7506 if (!ha->fw_dump_template) { 7507 ql_log(ql_log_warn, vha, 0x016a, 7508 "Failed fwdump template allocate %x bytes.\n", risc_size); 7509 goto failed_template; 7510 } 7511 7512 dcode = ha->fw_dump_template; 7513 risc_size = dlen / sizeof(*dcode); 7514 memcpy(dcode, qla27xx_fwdt_template_default(), dlen); 7515 for (i = 0; i < risc_size; i++) 7516 dcode[i] = be32_to_cpu(dcode[i]); 7517 7518 if (!qla27xx_fwdt_template_valid(ha->fw_dump_template)) { 7519 ql_log(ql_log_warn, vha, 0x016b, 7520 "Failed fwdump template validate\n"); 7521 goto failed_template; 7522 } 7523 7524 dlen = qla27xx_fwdt_template_size(ha->fw_dump_template); 7525 ql_dbg(ql_dbg_init, vha, 0x016c, 7526 "-> template size %x bytes\n", dlen); 7527 ha->fw_dump_template_len = dlen; 7528 return rval; 7529 7530 failed_template: 7531 ql_log(ql_log_warn, vha, 0x016d, "Failed default fwdump template\n"); 7532 if (ha->fw_dump_template) 7533 vfree(ha->fw_dump_template); 7534 ha->fw_dump_template = NULL; 7535 ha->fw_dump_template_len = 0; 7536 return rval; 7537 } 7538 7539 #define QLA_FW_URL "http://ldriver.qlogic.com/firmware/" 7540 7541 int 7542 qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 7543 { 7544 int rval; 7545 int i, fragment; 7546 uint16_t *wcode, *fwcode; 7547 uint32_t risc_addr, risc_size, fwclen, wlen, *seg; 7548 struct fw_blob *blob; 7549 struct qla_hw_data *ha = vha->hw; 7550 struct req_que *req = ha->req_q_map[0]; 7551 7552 /* Load firmware blob. */ 7553 blob = qla2x00_request_firmware(vha); 7554 if (!blob) { 7555 ql_log(ql_log_info, vha, 0x0083, 7556 "Firmware image unavailable.\n"); 7557 ql_log(ql_log_info, vha, 0x0084, 7558 "Firmware images can be retrieved from: "QLA_FW_URL ".\n"); 7559 return QLA_FUNCTION_FAILED; 7560 } 7561 7562 rval = QLA_SUCCESS; 7563 7564 wcode = (uint16_t *)req->ring; 7565 *srisc_addr = 0; 7566 fwcode = (uint16_t *)blob->fw->data; 7567 fwclen = 0; 7568 7569 /* Validate firmware image by checking version. */ 7570 if (blob->fw->size < 8 * sizeof(uint16_t)) { 7571 ql_log(ql_log_fatal, vha, 0x0085, 7572 "Unable to verify integrity of firmware image (%zd).\n", 7573 blob->fw->size); 7574 goto fail_fw_integrity; 7575 } 7576 for (i = 0; i < 4; i++) 7577 wcode[i] = be16_to_cpu(fwcode[i + 4]); 7578 if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff && 7579 wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 && 7580 wcode[2] == 0 && wcode[3] == 0)) { 7581 ql_log(ql_log_fatal, vha, 0x0086, 7582 "Unable to verify integrity of firmware image.\n"); 7583 ql_log(ql_log_fatal, vha, 0x0087, 7584 "Firmware data: %04x %04x %04x %04x.\n", 7585 wcode[0], wcode[1], wcode[2], wcode[3]); 7586 goto fail_fw_integrity; 7587 } 7588 7589 seg = blob->segs; 7590 while (*seg && rval == QLA_SUCCESS) { 7591 risc_addr = *seg; 7592 *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr; 7593 risc_size = be16_to_cpu(fwcode[3]); 7594 7595 /* Validate firmware image size. */ 7596 fwclen += risc_size * sizeof(uint16_t); 7597 if (blob->fw->size < fwclen) { 7598 ql_log(ql_log_fatal, vha, 0x0088, 7599 "Unable to verify integrity of firmware image " 7600 "(%zd).\n", blob->fw->size); 7601 goto fail_fw_integrity; 7602 } 7603 7604 fragment = 0; 7605 while (risc_size > 0 && rval == QLA_SUCCESS) { 7606 wlen = (uint16_t)(ha->fw_transfer_size >> 1); 7607 if (wlen > risc_size) 7608 wlen = risc_size; 7609 ql_dbg(ql_dbg_init, vha, 0x0089, 7610 "Loading risc segment@ risc addr %x number of " 7611 "words 0x%x.\n", risc_addr, wlen); 7612 7613 for (i = 0; i < wlen; i++) 7614 wcode[i] = swab16(fwcode[i]); 7615 7616 rval = qla2x00_load_ram(vha, req->dma, risc_addr, 7617 wlen); 7618 if (rval) { 7619 ql_log(ql_log_fatal, vha, 0x008a, 7620 "Failed to load segment %d of firmware.\n", 7621 fragment); 7622 break; 7623 } 7624 7625 fwcode += wlen; 7626 risc_addr += wlen; 7627 risc_size -= wlen; 7628 fragment++; 7629 } 7630 7631 /* Next segment. */ 7632 seg++; 7633 } 7634 return rval; 7635 7636 fail_fw_integrity: 7637 return QLA_FUNCTION_FAILED; 7638 } 7639 7640 static int 7641 qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr) 7642 { 7643 int rval; 7644 int segments, fragment; 7645 uint32_t *dcode, dlen; 7646 uint32_t risc_addr; 7647 uint32_t risc_size; 7648 uint32_t i; 7649 struct fw_blob *blob; 7650 const uint32_t *fwcode; 7651 uint32_t fwclen; 7652 struct qla_hw_data *ha = vha->hw; 7653 struct req_que *req = ha->req_q_map[0]; 7654 7655 /* Load firmware blob. */ 7656 blob = qla2x00_request_firmware(vha); 7657 if (!blob) { 7658 ql_log(ql_log_warn, vha, 0x0090, 7659 "Firmware image unavailable.\n"); 7660 ql_log(ql_log_warn, vha, 0x0091, 7661 "Firmware images can be retrieved from: " 7662 QLA_FW_URL ".\n"); 7663 7664 return QLA_FUNCTION_FAILED; 7665 } 7666 7667 ql_dbg(ql_dbg_init, vha, 0x0092, 7668 "FW: Loading via request-firmware.\n"); 7669 7670 rval = QLA_SUCCESS; 7671 7672 segments = FA_RISC_CODE_SEGMENTS; 7673 dcode = (uint32_t *)req->ring; 7674 *srisc_addr = 0; 7675 fwcode = (uint32_t *)blob->fw->data; 7676 fwclen = 0; 7677 7678 /* Validate firmware image by checking version. */ 7679 if (blob->fw->size < 8 * sizeof(uint32_t)) { 7680 ql_log(ql_log_fatal, vha, 0x0093, 7681 "Unable to verify integrity of firmware image (%zd).\n", 7682 blob->fw->size); 7683 return QLA_FUNCTION_FAILED; 7684 } 7685 for (i = 0; i < 4; i++) 7686 dcode[i] = be32_to_cpu(fwcode[i + 4]); 7687 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff && 7688 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) || 7689 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 && 7690 dcode[3] == 0)) { 7691 ql_log(ql_log_fatal, vha, 0x0094, 7692 "Unable to verify integrity of firmware image (%zd).\n", 7693 blob->fw->size); 7694 ql_log(ql_log_fatal, vha, 0x0095, 7695 "Firmware data: %08x %08x %08x %08x.\n", 7696 dcode[0], dcode[1], dcode[2], dcode[3]); 7697 return QLA_FUNCTION_FAILED; 7698 } 7699 7700 while (segments && rval == QLA_SUCCESS) { 7701 risc_addr = be32_to_cpu(fwcode[2]); 7702 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr; 7703 risc_size = be32_to_cpu(fwcode[3]); 7704 7705 /* Validate firmware image size. */ 7706 fwclen += risc_size * sizeof(uint32_t); 7707 if (blob->fw->size < fwclen) { 7708 ql_log(ql_log_fatal, vha, 0x0096, 7709 "Unable to verify integrity of firmware image " 7710 "(%zd).\n", blob->fw->size); 7711 return QLA_FUNCTION_FAILED; 7712 } 7713 7714 fragment = 0; 7715 while (risc_size > 0 && rval == QLA_SUCCESS) { 7716 dlen = (uint32_t)(ha->fw_transfer_size >> 2); 7717 if (dlen > risc_size) 7718 dlen = risc_size; 7719 7720 ql_dbg(ql_dbg_init, vha, 0x0097, 7721 "Loading risc segment@ risc addr %x " 7722 "number of dwords 0x%x.\n", risc_addr, dlen); 7723 7724 for (i = 0; i < dlen; i++) 7725 dcode[i] = swab32(fwcode[i]); 7726 7727 rval = qla2x00_load_ram(vha, req->dma, risc_addr, 7728 dlen); 7729 if (rval) { 7730 ql_log(ql_log_fatal, vha, 0x0098, 7731 "Failed to load segment %d of firmware.\n", 7732 fragment); 7733 return QLA_FUNCTION_FAILED; 7734 } 7735 7736 fwcode += dlen; 7737 risc_addr += dlen; 7738 risc_size -= dlen; 7739 fragment++; 7740 } 7741 7742 /* Next segment. */ 7743 segments--; 7744 } 7745 7746 if (!IS_QLA27XX(ha)) 7747 return rval; 7748 7749 if (ha->fw_dump_template) 7750 vfree(ha->fw_dump_template); 7751 ha->fw_dump_template = NULL; 7752 ha->fw_dump_template_len = 0; 7753 7754 ql_dbg(ql_dbg_init, vha, 0x171, 7755 "Loading fwdump template from %x\n", 7756 (uint32_t)((void *)fwcode - (void *)blob->fw->data)); 7757 risc_size = be32_to_cpu(fwcode[2]); 7758 ql_dbg(ql_dbg_init, vha, 0x172, 7759 "-> array size %x dwords\n", risc_size); 7760 if (risc_size == 0 || risc_size == ~0) 7761 goto default_template; 7762 7763 dlen = (risc_size - 8) * sizeof(*fwcode); 7764 ql_dbg(ql_dbg_init, vha, 0x0173, 7765 "-> template allocating %x bytes...\n", dlen); 7766 ha->fw_dump_template = vmalloc(dlen); 7767 if (!ha->fw_dump_template) { 7768 ql_log(ql_log_warn, vha, 0x0174, 7769 "Failed fwdump template allocate %x bytes.\n", risc_size); 7770 goto default_template; 7771 } 7772 7773 fwcode += 7; 7774 risc_size -= 8; 7775 dcode = ha->fw_dump_template; 7776 for (i = 0; i < risc_size; i++) 7777 dcode[i] = le32_to_cpu(fwcode[i]); 7778 7779 if (!qla27xx_fwdt_template_valid(dcode)) { 7780 ql_log(ql_log_warn, vha, 0x0175, 7781 "Failed fwdump template validate\n"); 7782 goto default_template; 7783 } 7784 7785 dlen = qla27xx_fwdt_template_size(dcode); 7786 ql_dbg(ql_dbg_init, vha, 0x0176, 7787 "-> template size %x bytes\n", dlen); 7788 if (dlen > risc_size * sizeof(*fwcode)) { 7789 ql_log(ql_log_warn, vha, 0x0177, 7790 "Failed fwdump template exceeds array by %zx bytes\n", 7791 (size_t)(dlen - risc_size * sizeof(*fwcode))); 7792 goto default_template; 7793 } 7794 ha->fw_dump_template_len = dlen; 7795 return rval; 7796 7797 default_template: 7798 ql_log(ql_log_warn, vha, 0x0178, "Using default fwdump template\n"); 7799 if (ha->fw_dump_template) 7800 vfree(ha->fw_dump_template); 7801 ha->fw_dump_template = NULL; 7802 ha->fw_dump_template_len = 0; 7803 7804 dlen = qla27xx_fwdt_template_default_size(); 7805 ql_dbg(ql_dbg_init, vha, 0x0179, 7806 "-> template allocating %x bytes...\n", dlen); 7807 ha->fw_dump_template = vmalloc(dlen); 7808 if (!ha->fw_dump_template) { 7809 ql_log(ql_log_warn, vha, 0x017a, 7810 "Failed fwdump template allocate %x bytes.\n", risc_size); 7811 goto failed_template; 7812 } 7813 7814 dcode = ha->fw_dump_template; 7815 risc_size = dlen / sizeof(*fwcode); 7816 fwcode = qla27xx_fwdt_template_default(); 7817 for (i = 0; i < risc_size; i++) 7818 dcode[i] = be32_to_cpu(fwcode[i]); 7819 7820 if (!qla27xx_fwdt_template_valid(ha->fw_dump_template)) { 7821 ql_log(ql_log_warn, vha, 0x017b, 7822 "Failed fwdump template validate\n"); 7823 goto failed_template; 7824 } 7825 7826 dlen = qla27xx_fwdt_template_size(ha->fw_dump_template); 7827 ql_dbg(ql_dbg_init, vha, 0x017c, 7828 "-> template size %x bytes\n", dlen); 7829 ha->fw_dump_template_len = dlen; 7830 return rval; 7831 7832 failed_template: 7833 ql_log(ql_log_warn, vha, 0x017d, "Failed default fwdump template\n"); 7834 if (ha->fw_dump_template) 7835 vfree(ha->fw_dump_template); 7836 ha->fw_dump_template = NULL; 7837 ha->fw_dump_template_len = 0; 7838 return rval; 7839 } 7840 7841 int 7842 qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 7843 { 7844 int rval; 7845 7846 if (ql2xfwloadbin == 1) 7847 return qla81xx_load_risc(vha, srisc_addr); 7848 7849 /* 7850 * FW Load priority: 7851 * 1) Firmware via request-firmware interface (.bin file). 7852 * 2) Firmware residing in flash. 7853 */ 7854 rval = qla24xx_load_risc_blob(vha, srisc_addr); 7855 if (rval == QLA_SUCCESS) 7856 return rval; 7857 7858 return qla24xx_load_risc_flash(vha, srisc_addr, 7859 vha->hw->flt_region_fw); 7860 } 7861 7862 int 7863 qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) 7864 { 7865 int rval; 7866 struct qla_hw_data *ha = vha->hw; 7867 7868 if (ql2xfwloadbin == 2) 7869 goto try_blob_fw; 7870 7871 /* 7872 * FW Load priority: 7873 * 1) Firmware residing in flash. 7874 * 2) Firmware via request-firmware interface (.bin file). 7875 * 3) Golden-Firmware residing in flash -- limited operation. 7876 */ 7877 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw); 7878 if (rval == QLA_SUCCESS) 7879 return rval; 7880 7881 try_blob_fw: 7882 rval = qla24xx_load_risc_blob(vha, srisc_addr); 7883 if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw) 7884 return rval; 7885 7886 ql_log(ql_log_info, vha, 0x0099, 7887 "Attempting to fallback to golden firmware.\n"); 7888 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw); 7889 if (rval != QLA_SUCCESS) 7890 return rval; 7891 7892 ql_log(ql_log_info, vha, 0x009a, "Update operational firmware.\n"); 7893 ha->flags.running_gold_fw = 1; 7894 return rval; 7895 } 7896 7897 void 7898 qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha) 7899 { 7900 int ret, retries; 7901 struct qla_hw_data *ha = vha->hw; 7902 7903 if (ha->flags.pci_channel_io_perm_failure) 7904 return; 7905 if (!IS_FWI2_CAPABLE(ha)) 7906 return; 7907 if (!ha->fw_major_version) 7908 return; 7909 if (!ha->flags.fw_started) 7910 return; 7911 7912 ret = qla2x00_stop_firmware(vha); 7913 for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT && 7914 ret != QLA_INVALID_COMMAND && retries ; retries--) { 7915 ha->isp_ops->reset_chip(vha); 7916 if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS) 7917 continue; 7918 if (qla2x00_setup_chip(vha) != QLA_SUCCESS) 7919 continue; 7920 ql_log(ql_log_info, vha, 0x8015, 7921 "Attempting retry of stop-firmware command.\n"); 7922 ret = qla2x00_stop_firmware(vha); 7923 } 7924 7925 QLA_FW_STOPPED(ha); 7926 ha->flags.fw_init_done = 0; 7927 } 7928 7929 int 7930 qla24xx_configure_vhba(scsi_qla_host_t *vha) 7931 { 7932 int rval = QLA_SUCCESS; 7933 int rval2; 7934 uint16_t mb[MAILBOX_REGISTER_COUNT]; 7935 struct qla_hw_data *ha = vha->hw; 7936 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 7937 struct req_que *req; 7938 struct rsp_que *rsp; 7939 7940 if (!vha->vp_idx) 7941 return -EINVAL; 7942 7943 rval = qla2x00_fw_ready(base_vha); 7944 if (vha->qpair) 7945 req = vha->qpair->req; 7946 else 7947 req = ha->req_q_map[0]; 7948 rsp = req->rsp; 7949 7950 if (rval == QLA_SUCCESS) { 7951 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 7952 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); 7953 } 7954 7955 vha->flags.management_server_logged_in = 0; 7956 7957 /* Login to SNS first */ 7958 rval2 = ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, 7959 BIT_1); 7960 if (rval2 != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) { 7961 if (rval2 == QLA_MEMORY_ALLOC_FAILED) 7962 ql_dbg(ql_dbg_init, vha, 0x0120, 7963 "Failed SNS login: loop_id=%x, rval2=%d\n", 7964 NPH_SNS, rval2); 7965 else 7966 ql_dbg(ql_dbg_init, vha, 0x0103, 7967 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x " 7968 "mb[2]=%x mb[6]=%x mb[7]=%x.\n", 7969 NPH_SNS, mb[0], mb[1], mb[2], mb[6], mb[7]); 7970 return (QLA_FUNCTION_FAILED); 7971 } 7972 7973 atomic_set(&vha->loop_down_timer, 0); 7974 atomic_set(&vha->loop_state, LOOP_UP); 7975 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 7976 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); 7977 rval = qla2x00_loop_resync(base_vha); 7978 7979 return rval; 7980 } 7981 7982 /* 84XX Support **************************************************************/ 7983 7984 static LIST_HEAD(qla_cs84xx_list); 7985 static DEFINE_MUTEX(qla_cs84xx_mutex); 7986 7987 static struct qla_chip_state_84xx * 7988 qla84xx_get_chip(struct scsi_qla_host *vha) 7989 { 7990 struct qla_chip_state_84xx *cs84xx; 7991 struct qla_hw_data *ha = vha->hw; 7992 7993 mutex_lock(&qla_cs84xx_mutex); 7994 7995 /* Find any shared 84xx chip. */ 7996 list_for_each_entry(cs84xx, &qla_cs84xx_list, list) { 7997 if (cs84xx->bus == ha->pdev->bus) { 7998 kref_get(&cs84xx->kref); 7999 goto done; 8000 } 8001 } 8002 8003 cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL); 8004 if (!cs84xx) 8005 goto done; 8006 8007 kref_init(&cs84xx->kref); 8008 spin_lock_init(&cs84xx->access_lock); 8009 mutex_init(&cs84xx->fw_update_mutex); 8010 cs84xx->bus = ha->pdev->bus; 8011 8012 list_add_tail(&cs84xx->list, &qla_cs84xx_list); 8013 done: 8014 mutex_unlock(&qla_cs84xx_mutex); 8015 return cs84xx; 8016 } 8017 8018 static void 8019 __qla84xx_chip_release(struct kref *kref) 8020 { 8021 struct qla_chip_state_84xx *cs84xx = 8022 container_of(kref, struct qla_chip_state_84xx, kref); 8023 8024 mutex_lock(&qla_cs84xx_mutex); 8025 list_del(&cs84xx->list); 8026 mutex_unlock(&qla_cs84xx_mutex); 8027 kfree(cs84xx); 8028 } 8029 8030 void 8031 qla84xx_put_chip(struct scsi_qla_host *vha) 8032 { 8033 struct qla_hw_data *ha = vha->hw; 8034 if (ha->cs84xx) 8035 kref_put(&ha->cs84xx->kref, __qla84xx_chip_release); 8036 } 8037 8038 static int 8039 qla84xx_init_chip(scsi_qla_host_t *vha) 8040 { 8041 int rval; 8042 uint16_t status[2]; 8043 struct qla_hw_data *ha = vha->hw; 8044 8045 mutex_lock(&ha->cs84xx->fw_update_mutex); 8046 8047 rval = qla84xx_verify_chip(vha, status); 8048 8049 mutex_unlock(&ha->cs84xx->fw_update_mutex); 8050 8051 return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED: 8052 QLA_SUCCESS; 8053 } 8054 8055 /* 81XX Support **************************************************************/ 8056 8057 int 8058 qla81xx_nvram_config(scsi_qla_host_t *vha) 8059 { 8060 int rval; 8061 struct init_cb_81xx *icb; 8062 struct nvram_81xx *nv; 8063 uint32_t *dptr; 8064 uint8_t *dptr1, *dptr2; 8065 uint32_t chksum; 8066 uint16_t cnt; 8067 struct qla_hw_data *ha = vha->hw; 8068 8069 rval = QLA_SUCCESS; 8070 icb = (struct init_cb_81xx *)ha->init_cb; 8071 nv = ha->nvram; 8072 8073 /* Determine NVRAM starting address. */ 8074 ha->nvram_size = sizeof(struct nvram_81xx); 8075 ha->vpd_size = FA_NVRAM_VPD_SIZE; 8076 if (IS_P3P_TYPE(ha) || IS_QLA8031(ha)) 8077 ha->vpd_size = FA_VPD_SIZE_82XX; 8078 8079 /* Get VPD data into cache */ 8080 ha->vpd = ha->nvram + VPD_OFFSET; 8081 ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2, 8082 ha->vpd_size); 8083 8084 /* Get NVRAM data into cache and calculate checksum. */ 8085 ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2, 8086 ha->nvram_size); 8087 dptr = (uint32_t *)nv; 8088 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++) 8089 chksum += le32_to_cpu(*dptr); 8090 8091 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111, 8092 "Contents of NVRAM:\n"); 8093 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112, 8094 (uint8_t *)nv, ha->nvram_size); 8095 8096 /* Bad NVRAM data, set defaults parameters. */ 8097 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P' 8098 || nv->id[3] != ' ' || 8099 nv->nvram_version < cpu_to_le16(ICB_VERSION)) { 8100 /* Reset NVRAM data. */ 8101 ql_log(ql_log_info, vha, 0x0073, 8102 "Inconsistent NVRAM detected: checksum=0x%x id=%c " 8103 "version=0x%x.\n", chksum, nv->id[0], 8104 le16_to_cpu(nv->nvram_version)); 8105 ql_log(ql_log_info, vha, 0x0074, 8106 "Falling back to functioning (yet invalid -- WWPN) " 8107 "defaults.\n"); 8108 8109 /* 8110 * Set default initialization control block. 8111 */ 8112 memset(nv, 0, ha->nvram_size); 8113 nv->nvram_version = cpu_to_le16(ICB_VERSION); 8114 nv->version = cpu_to_le16(ICB_VERSION); 8115 nv->frame_payload_size = 2048; 8116 nv->execution_throttle = cpu_to_le16(0xFFFF); 8117 nv->exchange_count = cpu_to_le16(0); 8118 nv->port_name[0] = 0x21; 8119 nv->port_name[1] = 0x00 + ha->port_no + 1; 8120 nv->port_name[2] = 0x00; 8121 nv->port_name[3] = 0xe0; 8122 nv->port_name[4] = 0x8b; 8123 nv->port_name[5] = 0x1c; 8124 nv->port_name[6] = 0x55; 8125 nv->port_name[7] = 0x86; 8126 nv->node_name[0] = 0x20; 8127 nv->node_name[1] = 0x00; 8128 nv->node_name[2] = 0x00; 8129 nv->node_name[3] = 0xe0; 8130 nv->node_name[4] = 0x8b; 8131 nv->node_name[5] = 0x1c; 8132 nv->node_name[6] = 0x55; 8133 nv->node_name[7] = 0x86; 8134 nv->login_retry_count = cpu_to_le16(8); 8135 nv->interrupt_delay_timer = cpu_to_le16(0); 8136 nv->login_timeout = cpu_to_le16(0); 8137 nv->firmware_options_1 = 8138 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); 8139 nv->firmware_options_2 = cpu_to_le32(2 << 4); 8140 nv->firmware_options_2 |= cpu_to_le32(BIT_12); 8141 nv->firmware_options_3 = cpu_to_le32(2 << 13); 8142 nv->host_p = cpu_to_le32(BIT_11|BIT_10); 8143 nv->efi_parameters = cpu_to_le32(0); 8144 nv->reset_delay = 5; 8145 nv->max_luns_per_target = cpu_to_le16(128); 8146 nv->port_down_retry_count = cpu_to_le16(30); 8147 nv->link_down_timeout = cpu_to_le16(180); 8148 nv->enode_mac[0] = 0x00; 8149 nv->enode_mac[1] = 0xC0; 8150 nv->enode_mac[2] = 0xDD; 8151 nv->enode_mac[3] = 0x04; 8152 nv->enode_mac[4] = 0x05; 8153 nv->enode_mac[5] = 0x06 + ha->port_no + 1; 8154 8155 rval = 1; 8156 } 8157 8158 if (IS_T10_PI_CAPABLE(ha)) 8159 nv->frame_payload_size &= ~7; 8160 8161 qlt_81xx_config_nvram_stage1(vha, nv); 8162 8163 /* Reset Initialization control block */ 8164 memset(icb, 0, ha->init_cb_size); 8165 8166 /* Copy 1st segment. */ 8167 dptr1 = (uint8_t *)icb; 8168 dptr2 = (uint8_t *)&nv->version; 8169 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; 8170 while (cnt--) 8171 *dptr1++ = *dptr2++; 8172 8173 icb->login_retry_count = nv->login_retry_count; 8174 8175 /* Copy 2nd segment. */ 8176 dptr1 = (uint8_t *)&icb->interrupt_delay_timer; 8177 dptr2 = (uint8_t *)&nv->interrupt_delay_timer; 8178 cnt = (uint8_t *)&icb->reserved_5 - 8179 (uint8_t *)&icb->interrupt_delay_timer; 8180 while (cnt--) 8181 *dptr1++ = *dptr2++; 8182 8183 memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac)); 8184 /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */ 8185 if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) { 8186 icb->enode_mac[0] = 0x00; 8187 icb->enode_mac[1] = 0xC0; 8188 icb->enode_mac[2] = 0xDD; 8189 icb->enode_mac[3] = 0x04; 8190 icb->enode_mac[4] = 0x05; 8191 icb->enode_mac[5] = 0x06 + ha->port_no + 1; 8192 } 8193 8194 /* Use extended-initialization control block. */ 8195 memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb)); 8196 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size); 8197 /* 8198 * Setup driver NVRAM options. 8199 */ 8200 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), 8201 "QLE8XXX"); 8202 8203 qlt_81xx_config_nvram_stage2(vha, icb); 8204 8205 /* Use alternate WWN? */ 8206 if (nv->host_p & cpu_to_le32(BIT_15)) { 8207 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); 8208 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); 8209 } 8210 8211 /* Prepare nodename */ 8212 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) { 8213 /* 8214 * Firmware will apply the following mask if the nodename was 8215 * not provided. 8216 */ 8217 memcpy(icb->node_name, icb->port_name, WWN_SIZE); 8218 icb->node_name[0] &= 0xF0; 8219 } 8220 8221 /* Set host adapter parameters. */ 8222 ha->flags.disable_risc_code_load = 0; 8223 ha->flags.enable_lip_reset = 0; 8224 ha->flags.enable_lip_full_login = 8225 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0; 8226 ha->flags.enable_target_reset = 8227 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0; 8228 ha->flags.enable_led_scheme = 0; 8229 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0; 8230 8231 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & 8232 (BIT_6 | BIT_5 | BIT_4)) >> 4; 8233 8234 /* save HBA serial number */ 8235 ha->serial0 = icb->port_name[5]; 8236 ha->serial1 = icb->port_name[6]; 8237 ha->serial2 = icb->port_name[7]; 8238 memcpy(vha->node_name, icb->node_name, WWN_SIZE); 8239 memcpy(vha->port_name, icb->port_name, WWN_SIZE); 8240 8241 icb->execution_throttle = cpu_to_le16(0xFFFF); 8242 8243 ha->retry_count = le16_to_cpu(nv->login_retry_count); 8244 8245 /* Set minimum login_timeout to 4 seconds. */ 8246 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) 8247 nv->login_timeout = cpu_to_le16(ql2xlogintimeout); 8248 if (le16_to_cpu(nv->login_timeout) < 4) 8249 nv->login_timeout = cpu_to_le16(4); 8250 ha->login_timeout = le16_to_cpu(nv->login_timeout); 8251 8252 /* Set minimum RATOV to 100 tenths of a second. */ 8253 ha->r_a_tov = 100; 8254 8255 ha->loop_reset_delay = nv->reset_delay; 8256 8257 /* Link Down Timeout = 0: 8258 * 8259 * When Port Down timer expires we will start returning 8260 * I/O's to OS with "DID_NO_CONNECT". 8261 * 8262 * Link Down Timeout != 0: 8263 * 8264 * The driver waits for the link to come up after link down 8265 * before returning I/Os to OS with "DID_NO_CONNECT". 8266 */ 8267 if (le16_to_cpu(nv->link_down_timeout) == 0) { 8268 ha->loop_down_abort_time = 8269 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); 8270 } else { 8271 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); 8272 ha->loop_down_abort_time = 8273 (LOOP_DOWN_TIME - ha->link_down_timeout); 8274 } 8275 8276 /* Need enough time to try and get the port back. */ 8277 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); 8278 if (qlport_down_retry) 8279 ha->port_down_retry_count = qlport_down_retry; 8280 8281 /* Set login_retry_count */ 8282 ha->login_retry_count = le16_to_cpu(nv->login_retry_count); 8283 if (ha->port_down_retry_count == 8284 le16_to_cpu(nv->port_down_retry_count) && 8285 ha->port_down_retry_count > 3) 8286 ha->login_retry_count = ha->port_down_retry_count; 8287 else if (ha->port_down_retry_count > (int)ha->login_retry_count) 8288 ha->login_retry_count = ha->port_down_retry_count; 8289 if (ql2xloginretrycount) 8290 ha->login_retry_count = ql2xloginretrycount; 8291 8292 /* if not running MSI-X we need handshaking on interrupts */ 8293 if (!vha->hw->flags.msix_enabled && (IS_QLA83XX(ha) || IS_QLA27XX(ha))) 8294 icb->firmware_options_2 |= cpu_to_le32(BIT_22); 8295 8296 /* Enable ZIO. */ 8297 if (!vha->flags.init_done) { 8298 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & 8299 (BIT_3 | BIT_2 | BIT_1 | BIT_0); 8300 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? 8301 le16_to_cpu(icb->interrupt_delay_timer): 2; 8302 } 8303 icb->firmware_options_2 &= cpu_to_le32( 8304 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); 8305 vha->flags.process_response_queue = 0; 8306 if (ha->zio_mode != QLA_ZIO_DISABLED) { 8307 ha->zio_mode = QLA_ZIO_MODE_6; 8308 8309 ql_log(ql_log_info, vha, 0x0075, 8310 "ZIO mode %d enabled; timer delay (%d us).\n", 8311 ha->zio_mode, 8312 ha->zio_timer * 100); 8313 8314 icb->firmware_options_2 |= cpu_to_le32( 8315 (uint32_t)ha->zio_mode); 8316 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); 8317 vha->flags.process_response_queue = 1; 8318 } 8319 8320 /* enable RIDA Format2 */ 8321 icb->firmware_options_3 |= BIT_0; 8322 8323 /* N2N: driver will initiate Login instead of FW */ 8324 icb->firmware_options_3 |= BIT_8; 8325 8326 if (IS_QLA27XX(ha)) { 8327 icb->firmware_options_3 |= BIT_8; 8328 ql_dbg(ql_log_info, vha, 0x0075, 8329 "Enabling direct connection.\n"); 8330 } 8331 8332 if (rval) { 8333 ql_log(ql_log_warn, vha, 0x0076, 8334 "NVRAM configuration failed.\n"); 8335 } 8336 return (rval); 8337 } 8338 8339 int 8340 qla82xx_restart_isp(scsi_qla_host_t *vha) 8341 { 8342 int status, rval; 8343 struct qla_hw_data *ha = vha->hw; 8344 struct req_que *req = ha->req_q_map[0]; 8345 struct rsp_que *rsp = ha->rsp_q_map[0]; 8346 struct scsi_qla_host *vp; 8347 unsigned long flags; 8348 8349 status = qla2x00_init_rings(vha); 8350 if (!status) { 8351 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 8352 ha->flags.chip_reset_done = 1; 8353 8354 status = qla2x00_fw_ready(vha); 8355 if (!status) { 8356 /* Issue a marker after FW becomes ready. */ 8357 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); 8358 vha->flags.online = 1; 8359 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); 8360 } 8361 8362 /* if no cable then assume it's good */ 8363 if ((vha->device_flags & DFLG_NO_CABLE)) 8364 status = 0; 8365 } 8366 8367 if (!status) { 8368 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); 8369 8370 if (!atomic_read(&vha->loop_down_timer)) { 8371 /* 8372 * Issue marker command only when we are going 8373 * to start the I/O . 8374 */ 8375 vha->marker_needed = 1; 8376 } 8377 8378 ha->isp_ops->enable_intrs(ha); 8379 8380 ha->isp_abort_cnt = 0; 8381 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); 8382 8383 /* Update the firmware version */ 8384 status = qla82xx_check_md_needed(vha); 8385 8386 if (ha->fce) { 8387 ha->flags.fce_enabled = 1; 8388 memset(ha->fce, 0, 8389 fce_calc_size(ha->fce_bufs)); 8390 rval = qla2x00_enable_fce_trace(vha, 8391 ha->fce_dma, ha->fce_bufs, ha->fce_mb, 8392 &ha->fce_bufs); 8393 if (rval) { 8394 ql_log(ql_log_warn, vha, 0x8001, 8395 "Unable to reinitialize FCE (%d).\n", 8396 rval); 8397 ha->flags.fce_enabled = 0; 8398 } 8399 } 8400 8401 if (ha->eft) { 8402 memset(ha->eft, 0, EFT_SIZE); 8403 rval = qla2x00_enable_eft_trace(vha, 8404 ha->eft_dma, EFT_NUM_BUFFERS); 8405 if (rval) { 8406 ql_log(ql_log_warn, vha, 0x8010, 8407 "Unable to reinitialize EFT (%d).\n", 8408 rval); 8409 } 8410 } 8411 } 8412 8413 if (!status) { 8414 ql_dbg(ql_dbg_taskm, vha, 0x8011, 8415 "qla82xx_restart_isp succeeded.\n"); 8416 8417 spin_lock_irqsave(&ha->vport_slock, flags); 8418 list_for_each_entry(vp, &ha->vp_list, list) { 8419 if (vp->vp_idx) { 8420 atomic_inc(&vp->vref_count); 8421 spin_unlock_irqrestore(&ha->vport_slock, flags); 8422 8423 qla2x00_vp_abort_isp(vp); 8424 8425 spin_lock_irqsave(&ha->vport_slock, flags); 8426 atomic_dec(&vp->vref_count); 8427 } 8428 } 8429 spin_unlock_irqrestore(&ha->vport_slock, flags); 8430 8431 } else { 8432 ql_log(ql_log_warn, vha, 0x8016, 8433 "qla82xx_restart_isp **** FAILED ****.\n"); 8434 } 8435 8436 return status; 8437 } 8438 8439 void 8440 qla81xx_update_fw_options(scsi_qla_host_t *vha) 8441 { 8442 struct qla_hw_data *ha = vha->hw; 8443 8444 /* Hold status IOCBs until ABTS response received. */ 8445 if (ql2xfwholdabts) 8446 ha->fw_options[3] |= BIT_12; 8447 8448 /* Set Retry FLOGI in case of P2P connection */ 8449 if (ha->operating_mode == P2P) { 8450 ha->fw_options[2] |= BIT_3; 8451 ql_dbg(ql_dbg_disc, vha, 0x2103, 8452 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n", 8453 __func__, ha->fw_options[2]); 8454 } 8455 8456 /* Move PUREX, ABTS RX & RIDA to ATIOQ */ 8457 if (ql2xmvasynctoatio) { 8458 if (qla_tgt_mode_enabled(vha) || 8459 qla_dual_mode_enabled(vha)) 8460 ha->fw_options[2] |= BIT_11; 8461 else 8462 ha->fw_options[2] &= ~BIT_11; 8463 } 8464 8465 if (qla_tgt_mode_enabled(vha) || 8466 qla_dual_mode_enabled(vha)) { 8467 /* FW auto send SCSI status during */ 8468 ha->fw_options[1] |= BIT_8; 8469 ha->fw_options[10] |= (u16)SAM_STAT_BUSY << 8; 8470 8471 /* FW perform Exchange validation */ 8472 ha->fw_options[2] |= BIT_4; 8473 } else { 8474 ha->fw_options[1] &= ~BIT_8; 8475 ha->fw_options[10] &= 0x00ff; 8476 8477 ha->fw_options[2] &= ~BIT_4; 8478 } 8479 8480 if (ql2xetsenable) { 8481 /* Enable ETS Burst. */ 8482 memset(ha->fw_options, 0, sizeof(ha->fw_options)); 8483 ha->fw_options[2] |= BIT_9; 8484 } 8485 8486 ql_dbg(ql_dbg_init, vha, 0x00e9, 8487 "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n", 8488 __func__, ha->fw_options[1], ha->fw_options[2], 8489 ha->fw_options[3], vha->host->active_mode); 8490 8491 qla2x00_set_fw_options(vha, ha->fw_options); 8492 } 8493 8494 /* 8495 * qla24xx_get_fcp_prio 8496 * Gets the fcp cmd priority value for the logged in port. 8497 * Looks for a match of the port descriptors within 8498 * each of the fcp prio config entries. If a match is found, 8499 * the tag (priority) value is returned. 8500 * 8501 * Input: 8502 * vha = scsi host structure pointer. 8503 * fcport = port structure pointer. 8504 * 8505 * Return: 8506 * non-zero (if found) 8507 * -1 (if not found) 8508 * 8509 * Context: 8510 * Kernel context 8511 */ 8512 static int 8513 qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) 8514 { 8515 int i, entries; 8516 uint8_t pid_match, wwn_match; 8517 int priority; 8518 uint32_t pid1, pid2; 8519 uint64_t wwn1, wwn2; 8520 struct qla_fcp_prio_entry *pri_entry; 8521 struct qla_hw_data *ha = vha->hw; 8522 8523 if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled) 8524 return -1; 8525 8526 priority = -1; 8527 entries = ha->fcp_prio_cfg->num_entries; 8528 pri_entry = &ha->fcp_prio_cfg->entry[0]; 8529 8530 for (i = 0; i < entries; i++) { 8531 pid_match = wwn_match = 0; 8532 8533 if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) { 8534 pri_entry++; 8535 continue; 8536 } 8537 8538 /* check source pid for a match */ 8539 if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) { 8540 pid1 = pri_entry->src_pid & INVALID_PORT_ID; 8541 pid2 = vha->d_id.b24 & INVALID_PORT_ID; 8542 if (pid1 == INVALID_PORT_ID) 8543 pid_match++; 8544 else if (pid1 == pid2) 8545 pid_match++; 8546 } 8547 8548 /* check destination pid for a match */ 8549 if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) { 8550 pid1 = pri_entry->dst_pid & INVALID_PORT_ID; 8551 pid2 = fcport->d_id.b24 & INVALID_PORT_ID; 8552 if (pid1 == INVALID_PORT_ID) 8553 pid_match++; 8554 else if (pid1 == pid2) 8555 pid_match++; 8556 } 8557 8558 /* check source WWN for a match */ 8559 if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) { 8560 wwn1 = wwn_to_u64(vha->port_name); 8561 wwn2 = wwn_to_u64(pri_entry->src_wwpn); 8562 if (wwn2 == (uint64_t)-1) 8563 wwn_match++; 8564 else if (wwn1 == wwn2) 8565 wwn_match++; 8566 } 8567 8568 /* check destination WWN for a match */ 8569 if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) { 8570 wwn1 = wwn_to_u64(fcport->port_name); 8571 wwn2 = wwn_to_u64(pri_entry->dst_wwpn); 8572 if (wwn2 == (uint64_t)-1) 8573 wwn_match++; 8574 else if (wwn1 == wwn2) 8575 wwn_match++; 8576 } 8577 8578 if (pid_match == 2 || wwn_match == 2) { 8579 /* Found a matching entry */ 8580 if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID) 8581 priority = pri_entry->tag; 8582 break; 8583 } 8584 8585 pri_entry++; 8586 } 8587 8588 return priority; 8589 } 8590 8591 /* 8592 * qla24xx_update_fcport_fcp_prio 8593 * Activates fcp priority for the logged in fc port 8594 * 8595 * Input: 8596 * vha = scsi host structure pointer. 8597 * fcp = port structure pointer. 8598 * 8599 * Return: 8600 * QLA_SUCCESS or QLA_FUNCTION_FAILED 8601 * 8602 * Context: 8603 * Kernel context. 8604 */ 8605 int 8606 qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport) 8607 { 8608 int ret; 8609 int priority; 8610 uint16_t mb[5]; 8611 8612 if (fcport->port_type != FCT_TARGET || 8613 fcport->loop_id == FC_NO_LOOP_ID) 8614 return QLA_FUNCTION_FAILED; 8615 8616 priority = qla24xx_get_fcp_prio(vha, fcport); 8617 if (priority < 0) 8618 return QLA_FUNCTION_FAILED; 8619 8620 if (IS_P3P_TYPE(vha->hw)) { 8621 fcport->fcp_prio = priority & 0xf; 8622 return QLA_SUCCESS; 8623 } 8624 8625 ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb); 8626 if (ret == QLA_SUCCESS) { 8627 if (fcport->fcp_prio != priority) 8628 ql_dbg(ql_dbg_user, vha, 0x709e, 8629 "Updated FCP_CMND priority - value=%d loop_id=%d " 8630 "port_id=%02x%02x%02x.\n", priority, 8631 fcport->loop_id, fcport->d_id.b.domain, 8632 fcport->d_id.b.area, fcport->d_id.b.al_pa); 8633 fcport->fcp_prio = priority & 0xf; 8634 } else 8635 ql_dbg(ql_dbg_user, vha, 0x704f, 8636 "Unable to update FCP_CMND priority - ret=0x%x for " 8637 "loop_id=%d port_id=%02x%02x%02x.\n", ret, fcport->loop_id, 8638 fcport->d_id.b.domain, fcport->d_id.b.area, 8639 fcport->d_id.b.al_pa); 8640 return ret; 8641 } 8642 8643 /* 8644 * qla24xx_update_all_fcp_prio 8645 * Activates fcp priority for all the logged in ports 8646 * 8647 * Input: 8648 * ha = adapter block pointer. 8649 * 8650 * Return: 8651 * QLA_SUCCESS or QLA_FUNCTION_FAILED 8652 * 8653 * Context: 8654 * Kernel context. 8655 */ 8656 int 8657 qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha) 8658 { 8659 int ret; 8660 fc_port_t *fcport; 8661 8662 ret = QLA_FUNCTION_FAILED; 8663 /* We need to set priority for all logged in ports */ 8664 list_for_each_entry(fcport, &vha->vp_fcports, list) 8665 ret = qla24xx_update_fcport_fcp_prio(vha, fcport); 8666 8667 return ret; 8668 } 8669 8670 struct qla_qpair *qla2xxx_create_qpair(struct scsi_qla_host *vha, int qos, 8671 int vp_idx, bool startqp) 8672 { 8673 int rsp_id = 0; 8674 int req_id = 0; 8675 int i; 8676 struct qla_hw_data *ha = vha->hw; 8677 uint16_t qpair_id = 0; 8678 struct qla_qpair *qpair = NULL; 8679 struct qla_msix_entry *msix; 8680 8681 if (!(ha->fw_attributes & BIT_6) || !ha->flags.msix_enabled) { 8682 ql_log(ql_log_warn, vha, 0x00181, 8683 "FW/Driver is not multi-queue capable.\n"); 8684 return NULL; 8685 } 8686 8687 if (ql2xmqsupport || ql2xnvmeenable) { 8688 qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL); 8689 if (qpair == NULL) { 8690 ql_log(ql_log_warn, vha, 0x0182, 8691 "Failed to allocate memory for queue pair.\n"); 8692 return NULL; 8693 } 8694 memset(qpair, 0, sizeof(struct qla_qpair)); 8695 8696 qpair->hw = vha->hw; 8697 qpair->vha = vha; 8698 qpair->qp_lock_ptr = &qpair->qp_lock; 8699 spin_lock_init(&qpair->qp_lock); 8700 qpair->use_shadow_reg = IS_SHADOW_REG_CAPABLE(ha) ? 1 : 0; 8701 8702 /* Assign available que pair id */ 8703 mutex_lock(&ha->mq_lock); 8704 qpair_id = find_first_zero_bit(ha->qpair_qid_map, ha->max_qpairs); 8705 if (ha->num_qpairs >= ha->max_qpairs) { 8706 mutex_unlock(&ha->mq_lock); 8707 ql_log(ql_log_warn, vha, 0x0183, 8708 "No resources to create additional q pair.\n"); 8709 goto fail_qid_map; 8710 } 8711 ha->num_qpairs++; 8712 set_bit(qpair_id, ha->qpair_qid_map); 8713 ha->queue_pair_map[qpair_id] = qpair; 8714 qpair->id = qpair_id; 8715 qpair->vp_idx = vp_idx; 8716 qpair->fw_started = ha->flags.fw_started; 8717 INIT_LIST_HEAD(&qpair->hints_list); 8718 qpair->chip_reset = ha->base_qpair->chip_reset; 8719 qpair->enable_class_2 = ha->base_qpair->enable_class_2; 8720 qpair->enable_explicit_conf = 8721 ha->base_qpair->enable_explicit_conf; 8722 8723 for (i = 0; i < ha->msix_count; i++) { 8724 msix = &ha->msix_entries[i]; 8725 if (msix->in_use) 8726 continue; 8727 qpair->msix = msix; 8728 ql_dbg(ql_dbg_multiq, vha, 0xc00f, 8729 "Vector %x selected for qpair\n", msix->vector); 8730 break; 8731 } 8732 if (!qpair->msix) { 8733 ql_log(ql_log_warn, vha, 0x0184, 8734 "Out of MSI-X vectors!.\n"); 8735 goto fail_msix; 8736 } 8737 8738 qpair->msix->in_use = 1; 8739 list_add_tail(&qpair->qp_list_elem, &vha->qp_list); 8740 qpair->pdev = ha->pdev; 8741 if (IS_QLA27XX(ha) || IS_QLA83XX(ha)) 8742 qpair->reqq_start_iocbs = qla_83xx_start_iocbs; 8743 8744 mutex_unlock(&ha->mq_lock); 8745 8746 /* Create response queue first */ 8747 rsp_id = qla25xx_create_rsp_que(ha, 0, 0, 0, qpair, startqp); 8748 if (!rsp_id) { 8749 ql_log(ql_log_warn, vha, 0x0185, 8750 "Failed to create response queue.\n"); 8751 goto fail_rsp; 8752 } 8753 8754 qpair->rsp = ha->rsp_q_map[rsp_id]; 8755 8756 /* Create request queue */ 8757 req_id = qla25xx_create_req_que(ha, 0, vp_idx, 0, rsp_id, qos, 8758 startqp); 8759 if (!req_id) { 8760 ql_log(ql_log_warn, vha, 0x0186, 8761 "Failed to create request queue.\n"); 8762 goto fail_req; 8763 } 8764 8765 qpair->req = ha->req_q_map[req_id]; 8766 qpair->rsp->req = qpair->req; 8767 qpair->rsp->qpair = qpair; 8768 /* init qpair to this cpu. Will adjust at run time. */ 8769 qla_cpu_update(qpair, smp_processor_id()); 8770 8771 if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) { 8772 if (ha->fw_attributes & BIT_4) 8773 qpair->difdix_supported = 1; 8774 } 8775 8776 qpair->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep); 8777 if (!qpair->srb_mempool) { 8778 ql_log(ql_log_warn, vha, 0xd036, 8779 "Failed to create srb mempool for qpair %d\n", 8780 qpair->id); 8781 goto fail_mempool; 8782 } 8783 8784 /* Mark as online */ 8785 qpair->online = 1; 8786 8787 if (!vha->flags.qpairs_available) 8788 vha->flags.qpairs_available = 1; 8789 8790 ql_dbg(ql_dbg_multiq, vha, 0xc00d, 8791 "Request/Response queue pair created, id %d\n", 8792 qpair->id); 8793 ql_dbg(ql_dbg_init, vha, 0x0187, 8794 "Request/Response queue pair created, id %d\n", 8795 qpair->id); 8796 } 8797 return qpair; 8798 8799 fail_mempool: 8800 fail_req: 8801 qla25xx_delete_rsp_que(vha, qpair->rsp); 8802 fail_rsp: 8803 mutex_lock(&ha->mq_lock); 8804 qpair->msix->in_use = 0; 8805 list_del(&qpair->qp_list_elem); 8806 if (list_empty(&vha->qp_list)) 8807 vha->flags.qpairs_available = 0; 8808 fail_msix: 8809 ha->queue_pair_map[qpair_id] = NULL; 8810 clear_bit(qpair_id, ha->qpair_qid_map); 8811 ha->num_qpairs--; 8812 mutex_unlock(&ha->mq_lock); 8813 fail_qid_map: 8814 kfree(qpair); 8815 return NULL; 8816 } 8817 8818 int qla2xxx_delete_qpair(struct scsi_qla_host *vha, struct qla_qpair *qpair) 8819 { 8820 int ret = QLA_FUNCTION_FAILED; 8821 struct qla_hw_data *ha = qpair->hw; 8822 8823 qpair->delete_in_progress = 1; 8824 while (atomic_read(&qpair->ref_count)) 8825 msleep(500); 8826 8827 ret = qla25xx_delete_req_que(vha, qpair->req); 8828 if (ret != QLA_SUCCESS) 8829 goto fail; 8830 8831 ret = qla25xx_delete_rsp_que(vha, qpair->rsp); 8832 if (ret != QLA_SUCCESS) 8833 goto fail; 8834 8835 mutex_lock(&ha->mq_lock); 8836 ha->queue_pair_map[qpair->id] = NULL; 8837 clear_bit(qpair->id, ha->qpair_qid_map); 8838 ha->num_qpairs--; 8839 list_del(&qpair->qp_list_elem); 8840 if (list_empty(&vha->qp_list)) { 8841 vha->flags.qpairs_available = 0; 8842 vha->flags.qpairs_req_created = 0; 8843 vha->flags.qpairs_rsp_created = 0; 8844 } 8845 mempool_destroy(qpair->srb_mempool); 8846 kfree(qpair); 8847 mutex_unlock(&ha->mq_lock); 8848 8849 return QLA_SUCCESS; 8850 fail: 8851 return ret; 8852 } 8853