1 /* 2 * pmcraid.h -- PMC Sierra MaxRAID controller driver header file 3 * 4 * Written By: Anil Ravindranath<anil_ravindranath@pmc-sierra.com> 5 * PMC-Sierra Inc 6 * 7 * Copyright (C) 2008, 2009 PMC Sierra Inc. 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation; either version 2 of the License, or 12 * (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 22 */ 23 24 #ifndef _PMCRAID_H 25 #define _PMCRAID_H 26 27 #include <linux/version.h> 28 #include <linux/types.h> 29 #include <linux/completion.h> 30 #include <linux/list.h> 31 #include <scsi/scsi.h> 32 #include <scsi/scsi_cmnd.h> 33 #include <linux/cdev.h> 34 #include <net/netlink.h> 35 #include <net/genetlink.h> 36 #include <linux/connector.h> 37 /* 38 * Driver name : string representing the driver name 39 * Device file : /dev file to be used for management interfaces 40 * Driver version: version string in major_version.minor_version.patch format 41 * Driver date : date information in "Mon dd yyyy" format 42 */ 43 #define PMCRAID_DRIVER_NAME "PMC MaxRAID" 44 #define PMCRAID_DEVFILE "pmcsas" 45 #define PMCRAID_DRIVER_VERSION "2.0.2" 46 #define PMCRAID_DRIVER_DATE __DATE__ 47 48 #define PMCRAID_FW_VERSION_1 0x002 49 50 /* Maximum number of adapters supported by current version of the driver */ 51 #define PMCRAID_MAX_ADAPTERS 1024 52 53 /* Bit definitions as per firmware, bit position [0][1][2].....[31] */ 54 #define PMC_BIT8(n) (1 << (7-n)) 55 #define PMC_BIT16(n) (1 << (15-n)) 56 #define PMC_BIT32(n) (1 << (31-n)) 57 58 /* PMC PCI vendor ID and device ID values */ 59 #define PCI_VENDOR_ID_PMC 0x11F8 60 #define PCI_DEVICE_ID_PMC_MAXRAID 0x5220 61 62 /* 63 * MAX_CMD : maximum commands that can be outstanding with IOA 64 * MAX_IO_CMD : command blocks available for IO commands 65 * MAX_HCAM_CMD : command blocks avaibale for HCAMS 66 * MAX_INTERNAL_CMD : command blocks avaible for internal commands like reset 67 */ 68 #define PMCRAID_MAX_CMD 1024 69 #define PMCRAID_MAX_IO_CMD 1020 70 #define PMCRAID_MAX_HCAM_CMD 2 71 #define PMCRAID_MAX_INTERNAL_CMD 2 72 73 /* MAX_IOADLS : max number of scatter-gather lists supported by IOA 74 * IOADLS_INTERNAL : number of ioadls included as part of IOARCB. 75 * IOADLS_EXTERNAL : number of ioadls allocated external to IOARCB 76 */ 77 #define PMCRAID_IOADLS_INTERNAL 27 78 #define PMCRAID_IOADLS_EXTERNAL 37 79 #define PMCRAID_MAX_IOADLS PMCRAID_IOADLS_INTERNAL 80 81 /* HRRQ_ENTRY_SIZE : size of hrrq buffer 82 * IOARCB_ALIGNMENT : alignment required for IOARCB 83 * IOADL_ALIGNMENT : alignment requirement for IOADLs 84 * MSIX_VECTORS : number of MSIX vectors supported 85 */ 86 #define HRRQ_ENTRY_SIZE sizeof(__le32) 87 #define PMCRAID_IOARCB_ALIGNMENT 32 88 #define PMCRAID_IOADL_ALIGNMENT 16 89 #define PMCRAID_IOASA_ALIGNMENT 4 90 #define PMCRAID_NUM_MSIX_VECTORS 16 91 92 /* various other limits */ 93 #define PMCRAID_VENDOR_ID_LEN 8 94 #define PMCRAID_PRODUCT_ID_LEN 16 95 #define PMCRAID_SERIAL_NUM_LEN 8 96 #define PMCRAID_LUN_LEN 8 97 #define PMCRAID_MAX_CDB_LEN 16 98 #define PMCRAID_DEVICE_ID_LEN 8 99 #define PMCRAID_SENSE_DATA_LEN 256 100 #define PMCRAID_ADD_CMD_PARAM_LEN 48 101 102 #define PMCRAID_MAX_BUS_TO_SCAN 1 103 #define PMCRAID_MAX_NUM_TARGETS_PER_BUS 256 104 #define PMCRAID_MAX_NUM_LUNS_PER_TARGET 8 105 106 /* IOA bus/target/lun number of IOA resources */ 107 #define PMCRAID_IOA_BUS_ID 0xfe 108 #define PMCRAID_IOA_TARGET_ID 0xff 109 #define PMCRAID_IOA_LUN_ID 0xff 110 #define PMCRAID_VSET_BUS_ID 0x1 111 #define PMCRAID_VSET_LUN_ID 0x0 112 #define PMCRAID_PHYS_BUS_ID 0x0 113 #define PMCRAID_VIRTUAL_ENCL_BUS_ID 0x8 114 #define PMCRAID_MAX_VSET_TARGETS 0x7F 115 #define PMCRAID_MAX_VSET_LUNS_PER_TARGET 8 116 117 #define PMCRAID_IOA_MAX_SECTORS 32767 118 #define PMCRAID_VSET_MAX_SECTORS 512 119 #define PMCRAID_MAX_CMD_PER_LUN 254 120 121 /* Number of configuration table entries (resources), includes 1 FP, 122 * 1 Enclosure device 123 */ 124 #define PMCRAID_MAX_RESOURCES 256 125 126 /* Adapter Commands used by driver */ 127 #define PMCRAID_QUERY_RESOURCE_STATE 0xC2 128 #define PMCRAID_RESET_DEVICE 0xC3 129 /* options to select reset target */ 130 #define ENABLE_RESET_MODIFIER 0x80 131 #define RESET_DEVICE_LUN 0x40 132 #define RESET_DEVICE_TARGET 0x20 133 #define RESET_DEVICE_BUS 0x10 134 135 #define PMCRAID_IDENTIFY_HRRQ 0xC4 136 #define PMCRAID_QUERY_IOA_CONFIG 0xC5 137 #define PMCRAID_QUERY_CMD_STATUS 0xCB 138 #define PMCRAID_ABORT_CMD 0xC7 139 140 /* CANCEL ALL command, provides option for setting SYNC_COMPLETE 141 * on the target resources for which commands got cancelled 142 */ 143 #define PMCRAID_CANCEL_ALL_REQUESTS 0xCE 144 #define PMCRAID_SYNC_COMPLETE_AFTER_CANCEL PMC_BIT8(0) 145 146 /* HCAM command and types of HCAM supported by IOA */ 147 #define PMCRAID_HOST_CONTROLLED_ASYNC 0xCF 148 #define PMCRAID_HCAM_CODE_CONFIG_CHANGE 0x01 149 #define PMCRAID_HCAM_CODE_LOG_DATA 0x02 150 151 /* IOA shutdown command and various shutdown types */ 152 #define PMCRAID_IOA_SHUTDOWN 0xF7 153 #define PMCRAID_SHUTDOWN_NORMAL 0x00 154 #define PMCRAID_SHUTDOWN_PREPARE_FOR_NORMAL 0x40 155 #define PMCRAID_SHUTDOWN_NONE 0x100 156 #define PMCRAID_SHUTDOWN_ABBREV 0x80 157 158 /* SET SUPPORTED DEVICES command and the option to select all the 159 * devices to be supported 160 */ 161 #define PMCRAID_SET_SUPPORTED_DEVICES 0xFB 162 #define ALL_DEVICES_SUPPORTED PMC_BIT8(0) 163 164 /* This option is used with SCSI WRITE_BUFFER command */ 165 #define PMCRAID_WR_BUF_DOWNLOAD_AND_SAVE 0x05 166 167 /* IOASC Codes used by driver */ 168 #define PMCRAID_IOASC_SENSE_MASK 0xFFFFFF00 169 #define PMCRAID_IOASC_SENSE_KEY(ioasc) ((ioasc) >> 24) 170 #define PMCRAID_IOASC_SENSE_CODE(ioasc) (((ioasc) & 0x00ff0000) >> 16) 171 #define PMCRAID_IOASC_SENSE_QUAL(ioasc) (((ioasc) & 0x0000ff00) >> 8) 172 #define PMCRAID_IOASC_SENSE_STATUS(ioasc) ((ioasc) & 0x000000ff) 173 174 #define PMCRAID_IOASC_GOOD_COMPLETION 0x00000000 175 #define PMCRAID_IOASC_GC_IOARCB_NOTFOUND 0x005A0000 176 #define PMCRAID_IOASC_NR_INIT_CMD_REQUIRED 0x02040200 177 #define PMCRAID_IOASC_NR_IOA_RESET_REQUIRED 0x02048000 178 #define PMCRAID_IOASC_NR_SYNC_REQUIRED 0x023F0000 179 #define PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC 0x03110C00 180 #define PMCRAID_IOASC_HW_CANNOT_COMMUNICATE 0x04050000 181 #define PMCRAID_IOASC_HW_DEVICE_TIMEOUT 0x04080100 182 #define PMCRAID_IOASC_HW_DEVICE_BUS_STATUS_ERROR 0x04448500 183 #define PMCRAID_IOASC_HW_IOA_RESET_REQUIRED 0x04448600 184 #define PMCRAID_IOASC_IR_INVALID_RESOURCE_HANDLE 0x05250000 185 #define PMCRAID_IOASC_AC_TERMINATED_BY_HOST 0x0B5A0000 186 #define PMCRAID_IOASC_UA_BUS_WAS_RESET 0x06290000 187 #define PMCRAID_IOASC_UA_BUS_WAS_RESET_BY_OTHER 0x06298000 188 189 /* Driver defined IOASCs */ 190 #define PMCRAID_IOASC_IOA_WAS_RESET 0x10000001 191 #define PMCRAID_IOASC_PCI_ACCESS_ERROR 0x10000002 192 193 /* Various timeout values (in milliseconds) used. If any of these are chip 194 * specific, move them to pmcraid_chip_details structure. 195 */ 196 #define PMCRAID_PCI_DEASSERT_TIMEOUT 2000 197 #define PMCRAID_BIST_TIMEOUT 2000 198 #define PMCRAID_AENWAIT_TIMEOUT 5000 199 #define PMCRAID_TRANSOP_TIMEOUT 60000 200 201 #define PMCRAID_RESET_TIMEOUT (2 * HZ) 202 #define PMCRAID_CHECK_FOR_RESET_TIMEOUT ((HZ / 10)) 203 #define PMCRAID_VSET_IO_TIMEOUT (60 * HZ) 204 #define PMCRAID_INTERNAL_TIMEOUT (60 * HZ) 205 #define PMCRAID_SHUTDOWN_TIMEOUT (150 * HZ) 206 #define PMCRAID_RESET_BUS_TIMEOUT (60 * HZ) 207 #define PMCRAID_RESET_HOST_TIMEOUT (150 * HZ) 208 #define PMCRAID_REQUEST_SENSE_TIMEOUT (30 * HZ) 209 #define PMCRAID_SET_SUP_DEV_TIMEOUT (2 * 60 * HZ) 210 211 /* structure to represent a scatter-gather element (IOADL descriptor) */ 212 struct pmcraid_ioadl_desc { 213 __le64 address; 214 __le32 data_len; 215 __u8 reserved[3]; 216 __u8 flags; 217 } __attribute__((packed, aligned(PMCRAID_IOADL_ALIGNMENT))); 218 219 /* pmcraid_ioadl_desc.flags values */ 220 #define IOADL_FLAGS_CHAINED PMC_BIT8(0) 221 #define IOADL_FLAGS_LAST_DESC PMC_BIT8(1) 222 #define IOADL_FLAGS_READ_LAST PMC_BIT8(1) 223 #define IOADL_FLAGS_WRITE_LAST PMC_BIT8(1) 224 225 226 /* additional IOARCB data which can be CDB or additional request parameters 227 * or list of IOADLs. Firmware supports max of 512 bytes for IOARCB, hence then 228 * number of IOADLs are limted to 27. In case they are more than 27, they will 229 * be used in chained form 230 */ 231 struct pmcraid_ioarcb_add_data { 232 union { 233 struct pmcraid_ioadl_desc ioadl[PMCRAID_IOADLS_INTERNAL]; 234 __u8 add_cmd_params[PMCRAID_ADD_CMD_PARAM_LEN]; 235 } u; 236 }; 237 238 /* 239 * IOA Request Control Block 240 */ 241 struct pmcraid_ioarcb { 242 __le64 ioarcb_bus_addr; 243 __le32 resource_handle; 244 __le32 response_handle; 245 __le64 ioadl_bus_addr; 246 __le32 ioadl_length; 247 __le32 data_transfer_length; 248 __le64 ioasa_bus_addr; 249 __le16 ioasa_len; 250 __le16 cmd_timeout; 251 __le16 add_cmd_param_offset; 252 __le16 add_cmd_param_length; 253 __le32 reserved1[2]; 254 __le32 reserved2; 255 __u8 request_type; 256 __u8 request_flags0; 257 __u8 request_flags1; 258 __u8 hrrq_id; 259 __u8 cdb[PMCRAID_MAX_CDB_LEN]; 260 struct pmcraid_ioarcb_add_data add_data; 261 } __attribute__((packed, aligned(PMCRAID_IOARCB_ALIGNMENT))); 262 263 /* well known resource handle values */ 264 #define PMCRAID_IOA_RES_HANDLE 0xffffffff 265 #define PMCRAID_INVALID_RES_HANDLE 0 266 267 /* pmcraid_ioarcb.request_type values */ 268 #define REQ_TYPE_SCSI 0x00 269 #define REQ_TYPE_IOACMD 0x01 270 #define REQ_TYPE_HCAM 0x02 271 272 /* pmcraid_ioarcb.flags0 values */ 273 #define TRANSFER_DIR_WRITE PMC_BIT8(0) 274 #define INHIBIT_UL_CHECK PMC_BIT8(2) 275 #define SYNC_OVERRIDE PMC_BIT8(3) 276 #define SYNC_COMPLETE PMC_BIT8(4) 277 #define NO_LINK_DESCS PMC_BIT8(5) 278 279 /* pmcraid_ioarcb.flags1 values */ 280 #define DELAY_AFTER_RESET PMC_BIT8(0) 281 #define TASK_TAG_SIMPLE 0x10 282 #define TASK_TAG_ORDERED 0x20 283 #define TASK_TAG_QUEUE_HEAD 0x30 284 285 /* toggle bit offset in response handle */ 286 #define HRRQ_TOGGLE_BIT 0x01 287 #define HRRQ_RESPONSE_BIT 0x02 288 289 /* IOA Status Area */ 290 struct pmcraid_ioasa_vset { 291 __le32 failing_lba_hi; 292 __le32 failing_lba_lo; 293 __le32 reserved; 294 } __attribute__((packed, aligned(4))); 295 296 struct pmcraid_ioasa { 297 __le32 ioasc; 298 __le16 returned_status_length; 299 __le16 available_status_length; 300 __le32 residual_data_length; 301 __le32 ilid; 302 __le32 fd_ioasc; 303 __le32 fd_res_address; 304 __le32 fd_res_handle; 305 __le32 reserved; 306 307 /* resource specific sense information */ 308 union { 309 struct pmcraid_ioasa_vset vset; 310 } u; 311 312 /* IOA autosense data */ 313 __le16 auto_sense_length; 314 __le16 error_data_length; 315 __u8 sense_data[PMCRAID_SENSE_DATA_LEN]; 316 } __attribute__((packed, aligned(4))); 317 318 #define PMCRAID_DRIVER_ILID 0xffffffff 319 320 /* Config Table Entry per Resource */ 321 struct pmcraid_config_table_entry { 322 __u8 resource_type; 323 __u8 bus_protocol; 324 __le16 array_id; 325 __u8 common_flags0; 326 __u8 common_flags1; 327 __u8 unique_flags0; 328 __u8 unique_flags1; /*also used as vset target_id */ 329 __le32 resource_handle; 330 __le32 resource_address; 331 __u8 device_id[PMCRAID_DEVICE_ID_LEN]; 332 __u8 lun[PMCRAID_LUN_LEN]; 333 } __attribute__((packed, aligned(4))); 334 335 /* extended configuration table sizes are of 64 bytes in size */ 336 #define PMCRAID_CFGTE_EXT_SIZE 32 337 struct pmcraid_config_table_entry_ext { 338 struct pmcraid_config_table_entry cfgte; 339 __u8 cfgte_ext[PMCRAID_CFGTE_EXT_SIZE]; 340 }; 341 342 /* resource types (config_table_entry.resource_type values) */ 343 #define RES_TYPE_AF_DASD 0x00 344 #define RES_TYPE_GSCSI 0x01 345 #define RES_TYPE_VSET 0x02 346 #define RES_TYPE_IOA_FP 0xFF 347 348 #define RES_IS_IOA(res) ((res).resource_type == RES_TYPE_IOA_FP) 349 #define RES_IS_GSCSI(res) ((res).resource_type == RES_TYPE_GSCSI) 350 #define RES_IS_VSET(res) ((res).resource_type == RES_TYPE_VSET) 351 #define RES_IS_AFDASD(res) ((res).resource_type == RES_TYPE_AF_DASD) 352 353 /* bus_protocol values used by driver */ 354 #define RES_TYPE_VENCLOSURE 0x8 355 356 /* config_table_entry.common_flags0 */ 357 #define MULTIPATH_RESOURCE PMC_BIT32(0) 358 359 /* unique_flags1 */ 360 #define IMPORT_MODE_MANUAL PMC_BIT8(0) 361 362 /* well known resource handle values */ 363 #define RES_HANDLE_IOA 0xFFFFFFFF 364 #define RES_HANDLE_NONE 0x00000000 365 366 /* well known resource address values */ 367 #define RES_ADDRESS_IOAFP 0xFEFFFFFF 368 #define RES_ADDRESS_INVALID 0xFFFFFFFF 369 370 /* BUS/TARGET/LUN values from resource_addrr */ 371 #define RES_BUS(res_addr) (le32_to_cpu(res_addr) & 0xFF) 372 #define RES_TARGET(res_addr) ((le32_to_cpu(res_addr) >> 16) & 0xFF) 373 #define RES_LUN(res_addr) 0x0 374 375 /* configuration table structure */ 376 struct pmcraid_config_table { 377 __le16 num_entries; 378 __u8 table_format; 379 __u8 reserved1; 380 __u8 flags; 381 __u8 reserved2[11]; 382 union { 383 struct pmcraid_config_table_entry 384 entries[PMCRAID_MAX_RESOURCES]; 385 struct pmcraid_config_table_entry_ext 386 entries_ext[PMCRAID_MAX_RESOURCES]; 387 }; 388 } __attribute__((packed, aligned(4))); 389 390 /* config_table.flags value */ 391 #define MICROCODE_UPDATE_REQUIRED PMC_BIT32(0) 392 393 /* 394 * HCAM format 395 */ 396 #define PMCRAID_HOSTRCB_LDNSIZE 4056 397 398 /* Error log notification format */ 399 struct pmcraid_hostrcb_error { 400 __le32 fd_ioasc; 401 __le32 fd_ra; 402 __le32 fd_rh; 403 __le32 prc; 404 union { 405 __u8 data[PMCRAID_HOSTRCB_LDNSIZE]; 406 } u; 407 } __attribute__ ((packed, aligned(4))); 408 409 struct pmcraid_hcam_hdr { 410 __u8 op_code; 411 __u8 notification_type; 412 __u8 notification_lost; 413 __u8 flags; 414 __u8 overlay_id; 415 __u8 reserved1[3]; 416 __le32 ilid; 417 __le32 timestamp1; 418 __le32 timestamp2; 419 __le32 data_len; 420 } __attribute__((packed, aligned(4))); 421 422 #define PMCRAID_AEN_GROUP 0x3 423 424 struct pmcraid_hcam_ccn { 425 struct pmcraid_hcam_hdr header; 426 struct pmcraid_config_table_entry cfg_entry; 427 struct pmcraid_config_table_entry cfg_entry_old; 428 } __attribute__((packed, aligned(4))); 429 430 #define PMCRAID_CCN_EXT_SIZE 3944 431 struct pmcraid_hcam_ccn_ext { 432 struct pmcraid_hcam_hdr header; 433 struct pmcraid_config_table_entry_ext cfg_entry; 434 struct pmcraid_config_table_entry_ext cfg_entry_old; 435 __u8 reserved[PMCRAID_CCN_EXT_SIZE]; 436 } __attribute__((packed, aligned(4))); 437 438 struct pmcraid_hcam_ldn { 439 struct pmcraid_hcam_hdr header; 440 struct pmcraid_hostrcb_error error_log; 441 } __attribute__((packed, aligned(4))); 442 443 /* pmcraid_hcam.op_code values */ 444 #define HOSTRCB_TYPE_CCN 0xE1 445 #define HOSTRCB_TYPE_LDN 0xE2 446 447 /* pmcraid_hcam.notification_type values */ 448 #define NOTIFICATION_TYPE_ENTRY_CHANGED 0x0 449 #define NOTIFICATION_TYPE_ENTRY_NEW 0x1 450 #define NOTIFICATION_TYPE_ENTRY_DELETED 0x2 451 #define NOTIFICATION_TYPE_STATE_CHANGE 0x3 452 #define NOTIFICATION_TYPE_ENTRY_STATECHANGED 0x4 453 #define NOTIFICATION_TYPE_ERROR_LOG 0x10 454 #define NOTIFICATION_TYPE_INFORMATION_LOG 0x11 455 456 #define HOSTRCB_NOTIFICATIONS_LOST PMC_BIT8(0) 457 458 /* pmcraid_hcam.flags values */ 459 #define HOSTRCB_INTERNAL_OP_ERROR PMC_BIT8(0) 460 #define HOSTRCB_ERROR_RESPONSE_SENT PMC_BIT8(1) 461 462 /* pmcraid_hcam.overlay_id values */ 463 #define HOSTRCB_OVERLAY_ID_08 0x08 464 #define HOSTRCB_OVERLAY_ID_09 0x09 465 #define HOSTRCB_OVERLAY_ID_11 0x11 466 #define HOSTRCB_OVERLAY_ID_12 0x12 467 #define HOSTRCB_OVERLAY_ID_13 0x13 468 #define HOSTRCB_OVERLAY_ID_14 0x14 469 #define HOSTRCB_OVERLAY_ID_16 0x16 470 #define HOSTRCB_OVERLAY_ID_17 0x17 471 #define HOSTRCB_OVERLAY_ID_20 0x20 472 #define HOSTRCB_OVERLAY_ID_FF 0xFF 473 474 /* Implementation specific card details */ 475 struct pmcraid_chip_details { 476 /* hardware register offsets */ 477 unsigned long ioastatus; 478 unsigned long ioarrin; 479 unsigned long mailbox; 480 unsigned long global_intr_mask; 481 unsigned long ioa_host_intr; 482 unsigned long ioa_host_msix_intr; 483 unsigned long ioa_host_intr_clr; 484 unsigned long ioa_host_mask; 485 unsigned long ioa_host_mask_clr; 486 unsigned long host_ioa_intr; 487 unsigned long host_ioa_intr_clr; 488 489 /* timeout used during transitional to operational state */ 490 unsigned long transop_timeout; 491 }; 492 493 /* IOA to HOST doorbells (interrupts) */ 494 #define INTRS_TRANSITION_TO_OPERATIONAL PMC_BIT32(0) 495 #define INTRS_IOARCB_TRANSFER_FAILED PMC_BIT32(3) 496 #define INTRS_IOA_UNIT_CHECK PMC_BIT32(4) 497 #define INTRS_NO_HRRQ_FOR_CMD_RESPONSE PMC_BIT32(5) 498 #define INTRS_CRITICAL_OP_IN_PROGRESS PMC_BIT32(6) 499 #define INTRS_IO_DEBUG_ACK PMC_BIT32(7) 500 #define INTRS_IOARRIN_LOST PMC_BIT32(27) 501 #define INTRS_SYSTEM_BUS_MMIO_ERROR PMC_BIT32(28) 502 #define INTRS_IOA_PROCESSOR_ERROR PMC_BIT32(29) 503 #define INTRS_HRRQ_VALID PMC_BIT32(30) 504 #define INTRS_OPERATIONAL_STATUS PMC_BIT32(0) 505 #define INTRS_ALLOW_MSIX_VECTOR0 PMC_BIT32(31) 506 507 /* Host to IOA Doorbells */ 508 #define DOORBELL_RUNTIME_RESET PMC_BIT32(1) 509 #define DOORBELL_IOA_RESET_ALERT PMC_BIT32(7) 510 #define DOORBELL_IOA_DEBUG_ALERT PMC_BIT32(9) 511 #define DOORBELL_ENABLE_DESTRUCTIVE_DIAGS PMC_BIT32(8) 512 #define DOORBELL_IOA_START_BIST PMC_BIT32(23) 513 #define DOORBELL_INTR_MODE_MSIX PMC_BIT32(25) 514 #define DOORBELL_INTR_MSIX_CLR PMC_BIT32(26) 515 #define DOORBELL_RESET_IOA PMC_BIT32(31) 516 517 /* Global interrupt mask register value */ 518 #define GLOBAL_INTERRUPT_MASK 0x5ULL 519 520 #define PMCRAID_ERROR_INTERRUPTS (INTRS_IOARCB_TRANSFER_FAILED | \ 521 INTRS_IOA_UNIT_CHECK | \ 522 INTRS_NO_HRRQ_FOR_CMD_RESPONSE | \ 523 INTRS_IOARRIN_LOST | \ 524 INTRS_SYSTEM_BUS_MMIO_ERROR | \ 525 INTRS_IOA_PROCESSOR_ERROR) 526 527 #define PMCRAID_PCI_INTERRUPTS (PMCRAID_ERROR_INTERRUPTS | \ 528 INTRS_HRRQ_VALID | \ 529 INTRS_TRANSITION_TO_OPERATIONAL |\ 530 INTRS_ALLOW_MSIX_VECTOR0) 531 532 /* control_block, associated with each of the commands contains IOARCB, IOADLs 533 * memory for IOASA. Additional 3 * 16 bytes are allocated in order to support 534 * additional request parameters (of max size 48) any command. 535 */ 536 struct pmcraid_control_block { 537 struct pmcraid_ioarcb ioarcb; 538 struct pmcraid_ioadl_desc ioadl[PMCRAID_IOADLS_EXTERNAL + 3]; 539 struct pmcraid_ioasa ioasa; 540 } __attribute__ ((packed, aligned(PMCRAID_IOARCB_ALIGNMENT))); 541 542 /* pmcraid_sglist - Scatter-gather list allocated for passthrough ioctls 543 */ 544 struct pmcraid_sglist { 545 u32 order; 546 u32 num_sg; 547 u32 num_dma_sg; 548 u32 buffer_len; 549 struct scatterlist scatterlist[1]; 550 }; 551 552 /* page D0 inquiry data of focal point resource */ 553 struct pmcraid_inquiry_data { 554 __u8 ph_dev_type; 555 __u8 page_code; 556 __u8 reserved1; 557 __u8 add_page_len; 558 __u8 length; 559 __u8 reserved2; 560 __le16 fw_version; 561 __u8 reserved3[16]; 562 }; 563 564 /* pmcraid_cmd - LLD representation of SCSI command */ 565 struct pmcraid_cmd { 566 567 /* Ptr and bus address of DMA.able control block for this command */ 568 struct pmcraid_control_block *ioa_cb; 569 dma_addr_t ioa_cb_bus_addr; 570 dma_addr_t dma_handle; 571 u8 *sense_buffer; 572 573 /* pointer to mid layer structure of SCSI commands */ 574 struct scsi_cmnd *scsi_cmd; 575 576 struct list_head free_list; 577 struct completion wait_for_completion; 578 struct timer_list timer; /* needed for internal commands */ 579 u32 timeout; /* current timeout value */ 580 u32 index; /* index into the command list */ 581 u8 completion_req; /* for handling internal commands */ 582 u8 release; /* for handling completions */ 583 584 void (*cmd_done) (struct pmcraid_cmd *); 585 struct pmcraid_instance *drv_inst; 586 587 struct pmcraid_sglist *sglist; /* used for passthrough IOCTLs */ 588 589 /* scratch used */ 590 union { 591 /* during reset sequence */ 592 unsigned long time_left; 593 struct pmcraid_resource_entry *res; 594 int hrrq_index; 595 596 /* used during IO command error handling. Sense buffer 597 * for REQUEST SENSE command if firmware is not sending 598 * auto sense data 599 */ 600 struct { 601 u8 *sense_buffer; 602 dma_addr_t sense_buffer_dma; 603 }; 604 }; 605 }; 606 607 /* 608 * Interrupt registers of IOA 609 */ 610 struct pmcraid_interrupts { 611 void __iomem *ioa_host_interrupt_reg; 612 void __iomem *ioa_host_msix_interrupt_reg; 613 void __iomem *ioa_host_interrupt_clr_reg; 614 void __iomem *ioa_host_interrupt_mask_reg; 615 void __iomem *ioa_host_interrupt_mask_clr_reg; 616 void __iomem *global_interrupt_mask_reg; 617 void __iomem *host_ioa_interrupt_reg; 618 void __iomem *host_ioa_interrupt_clr_reg; 619 }; 620 621 /* ISR parameters LLD allocates (one for each MSI-X if enabled) vectors */ 622 struct pmcraid_isr_param { 623 struct pmcraid_instance *drv_inst; 624 u16 vector; /* allocated msi-x vector */ 625 u8 hrrq_id; /* hrrq entry index */ 626 }; 627 628 629 /* AEN message header sent as part of event data to applications */ 630 struct pmcraid_aen_msg { 631 u32 hostno; 632 u32 length; 633 u8 reserved[8]; 634 u8 data[0]; 635 }; 636 637 /* Controller state event message type */ 638 struct pmcraid_state_msg { 639 struct pmcraid_aen_msg msg; 640 u32 ioa_state; 641 }; 642 643 #define PMC_DEVICE_EVENT_RESET_START 0x11000000 644 #define PMC_DEVICE_EVENT_RESET_SUCCESS 0x11000001 645 #define PMC_DEVICE_EVENT_RESET_FAILED 0x11000002 646 #define PMC_DEVICE_EVENT_SHUTDOWN_START 0x11000003 647 #define PMC_DEVICE_EVENT_SHUTDOWN_SUCCESS 0x11000004 648 #define PMC_DEVICE_EVENT_SHUTDOWN_FAILED 0x11000005 649 650 struct pmcraid_hostrcb { 651 struct pmcraid_instance *drv_inst; 652 struct pmcraid_aen_msg *msg; 653 struct pmcraid_hcam_hdr *hcam; /* pointer to hcam buffer */ 654 struct pmcraid_cmd *cmd; /* pointer to command block used */ 655 dma_addr_t baddr; /* system address of hcam buffer */ 656 atomic_t ignore; /* process HCAM response ? */ 657 }; 658 659 #define PMCRAID_AEN_HDR_SIZE sizeof(struct pmcraid_aen_msg) 660 661 662 663 /* 664 * Per adapter structure maintained by LLD 665 */ 666 struct pmcraid_instance { 667 /* Array of allowed-to-be-exposed resources, initialized from 668 * Configutation Table, later updated with CCNs 669 */ 670 struct pmcraid_resource_entry *res_entries; 671 672 struct list_head free_res_q; /* res_entries lists for easy lookup */ 673 struct list_head used_res_q; /* List of to be exposed resources */ 674 spinlock_t resource_lock; /* spinlock to protect resource list */ 675 676 void __iomem *mapped_dma_addr; 677 void __iomem *ioa_status; /* Iomapped IOA status register */ 678 void __iomem *mailbox; /* Iomapped mailbox register */ 679 void __iomem *ioarrin; /* IOmapped IOARR IN register */ 680 681 struct pmcraid_interrupts int_regs; 682 struct pmcraid_chip_details *chip_cfg; 683 684 /* HostRCBs needed for HCAM */ 685 struct pmcraid_hostrcb ldn; 686 struct pmcraid_hostrcb ccn; 687 struct pmcraid_state_msg scn; /* controller state change msg */ 688 689 690 /* Bus address of start of HRRQ */ 691 dma_addr_t hrrq_start_bus_addr[PMCRAID_NUM_MSIX_VECTORS]; 692 693 /* Pointer to 1st entry of HRRQ */ 694 __be32 *hrrq_start[PMCRAID_NUM_MSIX_VECTORS]; 695 696 /* Pointer to last entry of HRRQ */ 697 __be32 *hrrq_end[PMCRAID_NUM_MSIX_VECTORS]; 698 699 /* Pointer to current pointer of hrrq */ 700 __be32 *hrrq_curr[PMCRAID_NUM_MSIX_VECTORS]; 701 702 /* Lock for HRRQ access */ 703 spinlock_t hrrq_lock[PMCRAID_NUM_MSIX_VECTORS]; 704 705 struct pmcraid_inquiry_data *inq_data; 706 dma_addr_t inq_data_baddr; 707 708 /* size of configuration table entry, varies based on the firmware */ 709 u32 config_table_entry_size; 710 711 /* Expected toggle bit at host */ 712 u8 host_toggle_bit[PMCRAID_NUM_MSIX_VECTORS]; 713 714 715 /* Wait Q for threads to wait for Reset IOA completion */ 716 wait_queue_head_t reset_wait_q; 717 struct pmcraid_cmd *reset_cmd; 718 719 /* structures for supporting SIGIO based AEN. */ 720 struct fasync_struct *aen_queue; 721 struct mutex aen_queue_lock; /* lock for aen subscribers list */ 722 struct cdev cdev; 723 724 struct Scsi_Host *host; /* mid layer interface structure handle */ 725 struct pci_dev *pdev; /* PCI device structure handle */ 726 727 /* No of Reset IOA retries . IOA marked dead if threshold exceeds */ 728 u8 ioa_reset_attempts; 729 #define PMCRAID_RESET_ATTEMPTS 3 730 731 u8 current_log_level; /* default level for logging IOASC errors */ 732 733 u8 num_hrrq; /* Number of interrupt vectors allocated */ 734 u8 interrupt_mode; /* current interrupt mode legacy or msix */ 735 dev_t dev; /* Major-Minor numbers for Char device */ 736 737 /* Used as ISR handler argument */ 738 struct pmcraid_isr_param hrrq_vector[PMCRAID_NUM_MSIX_VECTORS]; 739 740 /* Message id as filled in last fired IOARCB, used to identify HRRQ */ 741 atomic_t last_message_id; 742 743 /* configuration table */ 744 struct pmcraid_config_table *cfg_table; 745 dma_addr_t cfg_table_bus_addr; 746 747 /* structures related to command blocks */ 748 struct kmem_cache *cmd_cachep; /* cache for cmd blocks */ 749 struct pci_pool *control_pool; /* pool for control blocks */ 750 char cmd_pool_name[64]; /* name of cmd cache */ 751 char ctl_pool_name[64]; /* name of control cache */ 752 753 struct pmcraid_cmd *cmd_list[PMCRAID_MAX_CMD]; 754 755 struct list_head free_cmd_pool; 756 struct list_head pending_cmd_pool; 757 spinlock_t free_pool_lock; /* free pool lock */ 758 spinlock_t pending_pool_lock; /* pending pool lock */ 759 760 /* Tasklet to handle deferred processing */ 761 struct tasklet_struct isr_tasklet[PMCRAID_NUM_MSIX_VECTORS]; 762 763 /* Work-queue (Shared) for deferred reset processing */ 764 struct work_struct worker_q; 765 766 /* No of IO commands pending with FW */ 767 atomic_t outstanding_cmds; 768 769 /* should add/delete resources to mid-layer now ?*/ 770 atomic_t expose_resources; 771 772 773 774 u32 ioa_state:4; /* For IOA Reset sequence FSM */ 775 #define IOA_STATE_OPERATIONAL 0x0 776 #define IOA_STATE_UNKNOWN 0x1 777 #define IOA_STATE_DEAD 0x2 778 #define IOA_STATE_IN_SOFT_RESET 0x3 779 #define IOA_STATE_IN_HARD_RESET 0x4 780 #define IOA_STATE_IN_RESET_ALERT 0x5 781 #define IOA_STATE_IN_BRINGDOWN 0x6 782 #define IOA_STATE_IN_BRINGUP 0x7 783 784 u32 ioa_reset_in_progress:1; /* true if IOA reset is in progress */ 785 u32 ioa_hard_reset:1; /* TRUE if Hard Reset is needed */ 786 u32 ioa_unit_check:1; /* Indicates Unit Check condition */ 787 u32 ioa_bringdown:1; /* whether IOA needs to be brought down */ 788 u32 force_ioa_reset:1; /* force adapter reset ? */ 789 u32 reinit_cfg_table:1; /* reinit config table due to lost CCN */ 790 u32 ioa_shutdown_type:2;/* shutdown type used during reset */ 791 #define SHUTDOWN_NONE 0x0 792 #define SHUTDOWN_NORMAL 0x1 793 #define SHUTDOWN_ABBREV 0x2 794 795 }; 796 797 /* LLD maintained resource entry structure */ 798 struct pmcraid_resource_entry { 799 struct list_head queue; /* link to "to be exposed" resources */ 800 union { 801 struct pmcraid_config_table_entry cfg_entry; 802 struct pmcraid_config_table_entry_ext cfg_entry_ext; 803 }; 804 struct scsi_device *scsi_dev; /* Link scsi_device structure */ 805 atomic_t read_failures; /* count of failed READ commands */ 806 atomic_t write_failures; /* count of failed WRITE commands */ 807 808 /* To indicate add/delete/modify during CCN */ 809 u8 change_detected; 810 #define RES_CHANGE_ADD 0x1 /* add this to mid-layer */ 811 #define RES_CHANGE_DEL 0x2 /* remove this from mid-layer */ 812 813 u8 reset_progress; /* Device is resetting */ 814 815 /* 816 * When IOA asks for sync (i.e. IOASC = Not Ready, Sync Required), this 817 * flag will be set, mid layer will be asked to retry. In the next 818 * attempt, this flag will be checked in queuecommand() to set 819 * SYNC_COMPLETE flag in IOARCB (flag_0). 820 */ 821 u8 sync_reqd; 822 823 /* target indicates the mapped target_id assigned to this resource if 824 * this is VSET resource. For non-VSET resources this will be un-used 825 * or zero 826 */ 827 u8 target; 828 }; 829 830 /* Data structures used in IOASC error code logging */ 831 struct pmcraid_ioasc_error { 832 u32 ioasc_code; /* IOASC code */ 833 u8 log_level; /* default log level assignment. */ 834 char *error_string; 835 }; 836 837 /* Initial log_level assignments for various IOASCs */ 838 #define IOASC_LOG_LEVEL_NONE 0x0 /* no logging */ 839 #define IOASC_LOG_LEVEL_MUST 0x1 /* must log: all high-severity errors */ 840 #define IOASC_LOG_LEVEL_HARD 0x2 /* optional – low severity errors */ 841 842 /* Error information maintained by LLD. LLD initializes the pmcraid_error_table 843 * statically. 844 */ 845 static struct pmcraid_ioasc_error pmcraid_ioasc_error_table[] = { 846 {0x01180600, IOASC_LOG_LEVEL_HARD, 847 "Recovered Error, soft media error, sector reassignment suggested"}, 848 {0x015D0000, IOASC_LOG_LEVEL_HARD, 849 "Recovered Error, failure prediction thresold exceeded"}, 850 {0x015D9200, IOASC_LOG_LEVEL_HARD, 851 "Recovered Error, soft Cache Card Battery error thresold"}, 852 {0x015D9200, IOASC_LOG_LEVEL_HARD, 853 "Recovered Error, soft Cache Card Battery error thresold"}, 854 {0x02048000, IOASC_LOG_LEVEL_HARD, 855 "Not Ready, IOA Reset Required"}, 856 {0x02408500, IOASC_LOG_LEVEL_HARD, 857 "Not Ready, IOA microcode download required"}, 858 {0x03110B00, IOASC_LOG_LEVEL_HARD, 859 "Medium Error, data unreadable, reassignment suggested"}, 860 {0x03110C00, IOASC_LOG_LEVEL_MUST, 861 "Medium Error, data unreadable do not reassign"}, 862 {0x03310000, IOASC_LOG_LEVEL_HARD, 863 "Medium Error, media corrupted"}, 864 {0x04050000, IOASC_LOG_LEVEL_HARD, 865 "Hardware Error, IOA can't communicate with device"}, 866 {0x04080000, IOASC_LOG_LEVEL_MUST, 867 "Hardware Error, device bus error"}, 868 {0x04088000, IOASC_LOG_LEVEL_MUST, 869 "Hardware Error, device bus is not functioning"}, 870 {0x04118000, IOASC_LOG_LEVEL_HARD, 871 "Hardware Error, IOA reserved area data check"}, 872 {0x04118100, IOASC_LOG_LEVEL_HARD, 873 "Hardware Error, IOA reserved area invalid data pattern"}, 874 {0x04118200, IOASC_LOG_LEVEL_HARD, 875 "Hardware Error, IOA reserved area LRC error"}, 876 {0x04320000, IOASC_LOG_LEVEL_HARD, 877 "Hardware Error, reassignment space exhausted"}, 878 {0x04330000, IOASC_LOG_LEVEL_HARD, 879 "Hardware Error, data transfer underlength error"}, 880 {0x04330000, IOASC_LOG_LEVEL_HARD, 881 "Hardware Error, data transfer overlength error"}, 882 {0x04418000, IOASC_LOG_LEVEL_MUST, 883 "Hardware Error, PCI bus error"}, 884 {0x04440000, IOASC_LOG_LEVEL_HARD, 885 "Hardware Error, device error"}, 886 {0x04448200, IOASC_LOG_LEVEL_MUST, 887 "Hardware Error, IOA error"}, 888 {0x04448300, IOASC_LOG_LEVEL_HARD, 889 "Hardware Error, undefined device response"}, 890 {0x04448400, IOASC_LOG_LEVEL_HARD, 891 "Hardware Error, IOA microcode error"}, 892 {0x04448600, IOASC_LOG_LEVEL_HARD, 893 "Hardware Error, IOA reset required"}, 894 {0x04449200, IOASC_LOG_LEVEL_HARD, 895 "Hardware Error, hard Cache Fearuee Card Battery error"}, 896 {0x0444A000, IOASC_LOG_LEVEL_HARD, 897 "Hardware Error, failed device altered"}, 898 {0x0444A200, IOASC_LOG_LEVEL_HARD, 899 "Hardware Error, data check after reassignment"}, 900 {0x0444A300, IOASC_LOG_LEVEL_HARD, 901 "Hardware Error, LRC error after reassignment"}, 902 {0x044A0000, IOASC_LOG_LEVEL_HARD, 903 "Hardware Error, device bus error (msg/cmd phase)"}, 904 {0x04670400, IOASC_LOG_LEVEL_HARD, 905 "Hardware Error, new device can't be used"}, 906 {0x04678000, IOASC_LOG_LEVEL_HARD, 907 "Hardware Error, invalid multiadapter configuration"}, 908 {0x04678100, IOASC_LOG_LEVEL_HARD, 909 "Hardware Error, incorrect connection between enclosures"}, 910 {0x04678200, IOASC_LOG_LEVEL_HARD, 911 "Hardware Error, connections exceed IOA design limits"}, 912 {0x04678300, IOASC_LOG_LEVEL_HARD, 913 "Hardware Error, incorrect multipath connection"}, 914 {0x04679000, IOASC_LOG_LEVEL_HARD, 915 "Hardware Error, command to LUN failed"}, 916 {0x064C8000, IOASC_LOG_LEVEL_HARD, 917 "Unit Attention, cache exists for missing/failed device"}, 918 {0x06670100, IOASC_LOG_LEVEL_HARD, 919 "Unit Attention, incompatible exposed mode device"}, 920 {0x06670600, IOASC_LOG_LEVEL_HARD, 921 "Unit Attention, attachment of logical unit failed"}, 922 {0x06678000, IOASC_LOG_LEVEL_HARD, 923 "Unit Attention, cables exceed connective design limit"}, 924 {0x06678300, IOASC_LOG_LEVEL_HARD, 925 "Unit Attention, incomplete multipath connection between" \ 926 "IOA and enclosure"}, 927 {0x06678400, IOASC_LOG_LEVEL_HARD, 928 "Unit Attention, incomplete multipath connection between" \ 929 "device and enclosure"}, 930 {0x06678500, IOASC_LOG_LEVEL_HARD, 931 "Unit Attention, incomplete multipath connection between" \ 932 "IOA and remote IOA"}, 933 {0x06678600, IOASC_LOG_LEVEL_HARD, 934 "Unit Attention, missing remote IOA"}, 935 {0x06679100, IOASC_LOG_LEVEL_HARD, 936 "Unit Attention, enclosure doesn't support required multipath" \ 937 "function"}, 938 {0x06698200, IOASC_LOG_LEVEL_HARD, 939 "Unit Attention, corrupt array parity detected on device"}, 940 {0x066B0200, IOASC_LOG_LEVEL_HARD, 941 "Unit Attention, array exposed"}, 942 {0x066B8200, IOASC_LOG_LEVEL_HARD, 943 "Unit Attention, exposed array is still protected"}, 944 {0x066B9200, IOASC_LOG_LEVEL_HARD, 945 "Unit Attention, Multipath redundancy level got worse"}, 946 {0x07270000, IOASC_LOG_LEVEL_HARD, 947 "Data Protect, device is read/write protected by IOA"}, 948 {0x07278000, IOASC_LOG_LEVEL_HARD, 949 "Data Protect, IOA doesn't support device attribute"}, 950 {0x07278100, IOASC_LOG_LEVEL_HARD, 951 "Data Protect, NVRAM mirroring prohibited"}, 952 {0x07278400, IOASC_LOG_LEVEL_HARD, 953 "Data Protect, array is short 2 or more devices"}, 954 {0x07278600, IOASC_LOG_LEVEL_HARD, 955 "Data Protect, exposed array is short a required device"}, 956 {0x07278700, IOASC_LOG_LEVEL_HARD, 957 "Data Protect, array members not at required addresses"}, 958 {0x07278800, IOASC_LOG_LEVEL_HARD, 959 "Data Protect, exposed mode device resource address conflict"}, 960 {0x07278900, IOASC_LOG_LEVEL_HARD, 961 "Data Protect, incorrect resource address of exposed mode device"}, 962 {0x07278A00, IOASC_LOG_LEVEL_HARD, 963 "Data Protect, Array is missing a device and parity is out of sync"}, 964 {0x07278B00, IOASC_LOG_LEVEL_HARD, 965 "Data Protect, maximum number of arrays already exist"}, 966 {0x07278C00, IOASC_LOG_LEVEL_HARD, 967 "Data Protect, cannot locate cache data for device"}, 968 {0x07278D00, IOASC_LOG_LEVEL_HARD, 969 "Data Protect, cache data exits for a changed device"}, 970 {0x07279100, IOASC_LOG_LEVEL_HARD, 971 "Data Protect, detection of a device requiring format"}, 972 {0x07279200, IOASC_LOG_LEVEL_HARD, 973 "Data Protect, IOA exceeds maximum number of devices"}, 974 {0x07279600, IOASC_LOG_LEVEL_HARD, 975 "Data Protect, missing array, volume set is not functional"}, 976 {0x07279700, IOASC_LOG_LEVEL_HARD, 977 "Data Protect, single device for a volume set"}, 978 {0x07279800, IOASC_LOG_LEVEL_HARD, 979 "Data Protect, missing multiple devices for a volume set"}, 980 {0x07279900, IOASC_LOG_LEVEL_HARD, 981 "Data Protect, maximum number of volument sets already exists"}, 982 {0x07279A00, IOASC_LOG_LEVEL_HARD, 983 "Data Protect, other volume set problem"}, 984 }; 985 986 /* macros to help in debugging */ 987 #define pmcraid_err(...) \ 988 printk(KERN_ERR "MaxRAID: "__VA_ARGS__) 989 990 #define pmcraid_info(...) \ 991 if (pmcraid_debug_log) \ 992 printk(KERN_INFO "MaxRAID: "__VA_ARGS__) 993 994 /* check if given command is a SCSI READ or SCSI WRITE command */ 995 #define SCSI_READ_CMD 0x1 /* any of SCSI READ commands */ 996 #define SCSI_WRITE_CMD 0x2 /* any of SCSI WRITE commands */ 997 #define SCSI_CMD_TYPE(opcode) \ 998 ({ u8 op = opcode; u8 __type = 0;\ 999 if (op == READ_6 || op == READ_10 || op == READ_12 || op == READ_16)\ 1000 __type = SCSI_READ_CMD;\ 1001 else if (op == WRITE_6 || op == WRITE_10 || op == WRITE_12 || \ 1002 op == WRITE_16)\ 1003 __type = SCSI_WRITE_CMD;\ 1004 __type;\ 1005 }) 1006 1007 #define IS_SCSI_READ_WRITE(opcode) \ 1008 ({ u8 __type = SCSI_CMD_TYPE(opcode); \ 1009 (__type == SCSI_READ_CMD || __type == SCSI_WRITE_CMD) ? 1 : 0;\ 1010 }) 1011 1012 1013 /* 1014 * pmcraid_ioctl_header - definition of header structure that preceeds all the 1015 * buffers given as ioctl arguments. 1016 * 1017 * .signature : always ASCII string, "PMCRAID" 1018 * .reserved : not used 1019 * .buffer_length : length of the buffer following the header 1020 */ 1021 struct pmcraid_ioctl_header { 1022 u8 signature[8]; 1023 u32 reserved; 1024 u32 buffer_length; 1025 }; 1026 1027 #define PMCRAID_IOCTL_SIGNATURE "PMCRAID" 1028 1029 /* 1030 * pmcraid_passthrough_ioctl_buffer - structure given as argument to 1031 * passthrough(or firmware handled) IOCTL commands. Note that ioarcb requires 1032 * 32-byte alignment so, it is necessary to pack this structure to avoid any 1033 * holes between ioctl_header and passthrough buffer 1034 * 1035 * .ioactl_header : ioctl header 1036 * .ioarcb : filled-up ioarcb buffer, driver always reads this buffer 1037 * .ioasa : buffer for ioasa, driver fills this with IOASA from firmware 1038 * .request_buffer: The I/O buffer (flat), driver reads/writes to this based on 1039 * the transfer directions passed in ioarcb.flags0. Contents 1040 * of this buffer are valid only when ioarcb.data_transfer_len 1041 * is not zero. 1042 */ 1043 struct pmcraid_passthrough_ioctl_buffer { 1044 struct pmcraid_ioctl_header ioctl_header; 1045 struct pmcraid_ioarcb ioarcb; 1046 struct pmcraid_ioasa ioasa; 1047 u8 request_buffer[1]; 1048 } __attribute__ ((packed)); 1049 1050 /* 1051 * keys to differentiate between driver handled IOCTLs and passthrough 1052 * IOCTLs passed to IOA. driver determines the ioctl type using macro 1053 * _IOC_TYPE 1054 */ 1055 #define PMCRAID_DRIVER_IOCTL 'D' 1056 #define PMCRAID_PASSTHROUGH_IOCTL 'F' 1057 1058 #define DRV_IOCTL(n, size) \ 1059 _IOC(_IOC_READ|_IOC_WRITE, PMCRAID_DRIVER_IOCTL, (n), (size)) 1060 1061 #define FMW_IOCTL(n, size) \ 1062 _IOC(_IOC_READ|_IOC_WRITE, PMCRAID_PASSTHROUGH_IOCTL, (n), (size)) 1063 1064 /* 1065 * _ARGSIZE: macro that gives size of the argument type passed to an IOCTL cmd. 1066 * This is to facilitate applications avoiding un-necessary memory allocations. 1067 * For example, most of driver handled ioctls do not require ioarcb, ioasa. 1068 */ 1069 #define _ARGSIZE(arg) (sizeof(struct pmcraid_ioctl_header) + sizeof(arg)) 1070 1071 /* Driver handled IOCTL command definitions */ 1072 1073 #define PMCRAID_IOCTL_RESET_ADAPTER \ 1074 DRV_IOCTL(5, sizeof(struct pmcraid_ioctl_header)) 1075 1076 /* passthrough/firmware handled commands */ 1077 #define PMCRAID_IOCTL_PASSTHROUGH_COMMAND \ 1078 FMW_IOCTL(1, sizeof(struct pmcraid_passthrough_ioctl_buffer)) 1079 1080 #define PMCRAID_IOCTL_DOWNLOAD_MICROCODE \ 1081 FMW_IOCTL(2, sizeof(struct pmcraid_passthrough_ioctl_buffer)) 1082 1083 1084 #endif /* _PMCRAID_H */ 1085