1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * pmcraid.c -- driver for PMC Sierra MaxRAID controller adapters 4 * 5 * Written By: Anil Ravindranath<anil_ravindranath@pmc-sierra.com> 6 * PMC-Sierra Inc 7 * 8 * Copyright (C) 2008, 2009 PMC Sierra Inc 9 */ 10 #include <linux/fs.h> 11 #include <linux/init.h> 12 #include <linux/types.h> 13 #include <linux/errno.h> 14 #include <linux/kernel.h> 15 #include <linux/ioport.h> 16 #include <linux/delay.h> 17 #include <linux/pci.h> 18 #include <linux/wait.h> 19 #include <linux/spinlock.h> 20 #include <linux/sched.h> 21 #include <linux/interrupt.h> 22 #include <linux/blkdev.h> 23 #include <linux/firmware.h> 24 #include <linux/module.h> 25 #include <linux/moduleparam.h> 26 #include <linux/hdreg.h> 27 #include <linux/io.h> 28 #include <linux/slab.h> 29 #include <asm/irq.h> 30 #include <asm/processor.h> 31 #include <linux/libata.h> 32 #include <linux/mutex.h> 33 #include <linux/ktime.h> 34 #include <scsi/scsi.h> 35 #include <scsi/scsi_host.h> 36 #include <scsi/scsi_device.h> 37 #include <scsi/scsi_tcq.h> 38 #include <scsi/scsi_eh.h> 39 #include <scsi/scsi_cmnd.h> 40 #include <scsi/scsicam.h> 41 42 #include "pmcraid.h" 43 44 /* 45 * Module configuration parameters 46 */ 47 static unsigned int pmcraid_debug_log; 48 static unsigned int pmcraid_disable_aen; 49 static unsigned int pmcraid_log_level = IOASC_LOG_LEVEL_MUST; 50 static unsigned int pmcraid_enable_msix; 51 52 /* 53 * Data structures to support multiple adapters by the LLD. 54 * pmcraid_adapter_count - count of configured adapters 55 */ 56 static atomic_t pmcraid_adapter_count = ATOMIC_INIT(0); 57 58 /* 59 * Supporting user-level control interface through IOCTL commands. 60 * pmcraid_major - major number to use 61 * pmcraid_minor - minor number(s) to use 62 */ 63 static unsigned int pmcraid_major; 64 static struct class *pmcraid_class; 65 static DECLARE_BITMAP(pmcraid_minor, PMCRAID_MAX_ADAPTERS); 66 67 /* 68 * Module parameters 69 */ 70 MODULE_AUTHOR("Anil Ravindranath<anil_ravindranath@pmc-sierra.com>"); 71 MODULE_DESCRIPTION("PMC Sierra MaxRAID Controller Driver"); 72 MODULE_LICENSE("GPL"); 73 MODULE_VERSION(PMCRAID_DRIVER_VERSION); 74 75 module_param_named(log_level, pmcraid_log_level, uint, (S_IRUGO | S_IWUSR)); 76 MODULE_PARM_DESC(log_level, 77 "Enables firmware error code logging, default :1 high-severity" 78 " errors, 2: all errors including high-severity errors," 79 " 0: disables logging"); 80 81 module_param_named(debug, pmcraid_debug_log, uint, (S_IRUGO | S_IWUSR)); 82 MODULE_PARM_DESC(debug, 83 "Enable driver verbose message logging. Set 1 to enable." 84 "(default: 0)"); 85 86 module_param_named(disable_aen, pmcraid_disable_aen, uint, (S_IRUGO | S_IWUSR)); 87 MODULE_PARM_DESC(disable_aen, 88 "Disable driver aen notifications to apps. Set 1 to disable." 89 "(default: 0)"); 90 91 /* chip specific constants for PMC MaxRAID controllers (same for 92 * 0x5220 and 0x8010 93 */ 94 static struct pmcraid_chip_details pmcraid_chip_cfg[] = { 95 { 96 .ioastatus = 0x0, 97 .ioarrin = 0x00040, 98 .mailbox = 0x7FC30, 99 .global_intr_mask = 0x00034, 100 .ioa_host_intr = 0x0009C, 101 .ioa_host_intr_clr = 0x000A0, 102 .ioa_host_msix_intr = 0x7FC40, 103 .ioa_host_mask = 0x7FC28, 104 .ioa_host_mask_clr = 0x7FC28, 105 .host_ioa_intr = 0x00020, 106 .host_ioa_intr_clr = 0x00020, 107 .transop_timeout = 300 108 } 109 }; 110 111 /* 112 * PCI device ids supported by pmcraid driver 113 */ 114 static struct pci_device_id pmcraid_pci_table[] = { 115 { PCI_DEVICE(PCI_VENDOR_ID_PMC, PCI_DEVICE_ID_PMC_MAXRAID), 116 0, 0, (kernel_ulong_t)&pmcraid_chip_cfg[0] 117 }, 118 {} 119 }; 120 121 MODULE_DEVICE_TABLE(pci, pmcraid_pci_table); 122 123 124 125 /** 126 * pmcraid_slave_alloc - Prepare for commands to a device 127 * @scsi_dev: scsi device struct 128 * 129 * This function is called by mid-layer prior to sending any command to the new 130 * device. Stores resource entry details of the device in scsi_device struct. 131 * Queuecommand uses the resource handle and other details to fill up IOARCB 132 * while sending commands to the device. 133 * 134 * Return value: 135 * 0 on success / -ENXIO if device does not exist 136 */ 137 static int pmcraid_slave_alloc(struct scsi_device *scsi_dev) 138 { 139 struct pmcraid_resource_entry *temp, *res = NULL; 140 struct pmcraid_instance *pinstance; 141 u8 target, bus, lun; 142 unsigned long lock_flags; 143 int rc = -ENXIO; 144 u16 fw_version; 145 146 pinstance = shost_priv(scsi_dev->host); 147 148 fw_version = be16_to_cpu(pinstance->inq_data->fw_version); 149 150 /* Driver exposes VSET and GSCSI resources only; all other device types 151 * are not exposed. Resource list is synchronized using resource lock 152 * so any traversal or modifications to the list should be done inside 153 * this lock 154 */ 155 spin_lock_irqsave(&pinstance->resource_lock, lock_flags); 156 list_for_each_entry(temp, &pinstance->used_res_q, queue) { 157 158 /* do not expose VSETs with order-ids > MAX_VSET_TARGETS */ 159 if (RES_IS_VSET(temp->cfg_entry)) { 160 if (fw_version <= PMCRAID_FW_VERSION_1) 161 target = temp->cfg_entry.unique_flags1; 162 else 163 target = le16_to_cpu(temp->cfg_entry.array_id) & 0xFF; 164 165 if (target > PMCRAID_MAX_VSET_TARGETS) 166 continue; 167 bus = PMCRAID_VSET_BUS_ID; 168 lun = 0; 169 } else if (RES_IS_GSCSI(temp->cfg_entry)) { 170 target = RES_TARGET(temp->cfg_entry.resource_address); 171 bus = PMCRAID_PHYS_BUS_ID; 172 lun = RES_LUN(temp->cfg_entry.resource_address); 173 } else { 174 continue; 175 } 176 177 if (bus == scsi_dev->channel && 178 target == scsi_dev->id && 179 lun == scsi_dev->lun) { 180 res = temp; 181 break; 182 } 183 } 184 185 if (res) { 186 res->scsi_dev = scsi_dev; 187 scsi_dev->hostdata = res; 188 res->change_detected = 0; 189 atomic_set(&res->read_failures, 0); 190 atomic_set(&res->write_failures, 0); 191 rc = 0; 192 } 193 spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags); 194 return rc; 195 } 196 197 /** 198 * pmcraid_slave_configure - Configures a SCSI device 199 * @scsi_dev: scsi device struct 200 * 201 * This function is executed by SCSI mid layer just after a device is first 202 * scanned (i.e. it has responded to an INQUIRY). For VSET resources, the 203 * timeout value (default 30s) will be over-written to a higher value (60s) 204 * and max_sectors value will be over-written to 512. It also sets queue depth 205 * to host->cmd_per_lun value 206 * 207 * Return value: 208 * 0 on success 209 */ 210 static int pmcraid_slave_configure(struct scsi_device *scsi_dev) 211 { 212 struct pmcraid_resource_entry *res = scsi_dev->hostdata; 213 214 if (!res) 215 return 0; 216 217 /* LLD exposes VSETs and Enclosure devices only */ 218 if (RES_IS_GSCSI(res->cfg_entry) && 219 scsi_dev->type != TYPE_ENCLOSURE) 220 return -ENXIO; 221 222 pmcraid_info("configuring %x:%x:%x:%x\n", 223 scsi_dev->host->unique_id, 224 scsi_dev->channel, 225 scsi_dev->id, 226 (u8)scsi_dev->lun); 227 228 if (RES_IS_GSCSI(res->cfg_entry)) { 229 scsi_dev->allow_restart = 1; 230 } else if (RES_IS_VSET(res->cfg_entry)) { 231 scsi_dev->allow_restart = 1; 232 blk_queue_rq_timeout(scsi_dev->request_queue, 233 PMCRAID_VSET_IO_TIMEOUT); 234 blk_queue_max_hw_sectors(scsi_dev->request_queue, 235 PMCRAID_VSET_MAX_SECTORS); 236 } 237 238 /* 239 * We never want to report TCQ support for these types of devices. 240 */ 241 if (!RES_IS_GSCSI(res->cfg_entry) && !RES_IS_VSET(res->cfg_entry)) 242 scsi_dev->tagged_supported = 0; 243 244 return 0; 245 } 246 247 /** 248 * pmcraid_slave_destroy - Unconfigure a SCSI device before removing it 249 * 250 * @scsi_dev: scsi device struct 251 * 252 * This is called by mid-layer before removing a device. Pointer assignments 253 * done in pmcraid_slave_alloc will be reset to NULL here. 254 * 255 * Return value 256 * none 257 */ 258 static void pmcraid_slave_destroy(struct scsi_device *scsi_dev) 259 { 260 struct pmcraid_resource_entry *res; 261 262 res = (struct pmcraid_resource_entry *)scsi_dev->hostdata; 263 264 if (res) 265 res->scsi_dev = NULL; 266 267 scsi_dev->hostdata = NULL; 268 } 269 270 /** 271 * pmcraid_change_queue_depth - Change the device's queue depth 272 * @scsi_dev: scsi device struct 273 * @depth: depth to set 274 * 275 * Return value 276 * actual depth set 277 */ 278 static int pmcraid_change_queue_depth(struct scsi_device *scsi_dev, int depth) 279 { 280 if (depth > PMCRAID_MAX_CMD_PER_LUN) 281 depth = PMCRAID_MAX_CMD_PER_LUN; 282 return scsi_change_queue_depth(scsi_dev, depth); 283 } 284 285 /** 286 * pmcraid_init_cmdblk - initializes a command block 287 * 288 * @cmd: pointer to struct pmcraid_cmd to be initialized 289 * @index: if >=0 first time initialization; otherwise reinitialization 290 * 291 * Return Value 292 * None 293 */ 294 static void pmcraid_init_cmdblk(struct pmcraid_cmd *cmd, int index) 295 { 296 struct pmcraid_ioarcb *ioarcb = &(cmd->ioa_cb->ioarcb); 297 dma_addr_t dma_addr = cmd->ioa_cb_bus_addr; 298 299 if (index >= 0) { 300 /* first time initialization (called from probe) */ 301 u32 ioasa_offset = 302 offsetof(struct pmcraid_control_block, ioasa); 303 304 cmd->index = index; 305 ioarcb->response_handle = cpu_to_le32(index << 2); 306 ioarcb->ioarcb_bus_addr = cpu_to_le64(dma_addr); 307 ioarcb->ioasa_bus_addr = cpu_to_le64(dma_addr + ioasa_offset); 308 ioarcb->ioasa_len = cpu_to_le16(sizeof(struct pmcraid_ioasa)); 309 } else { 310 /* re-initialization of various lengths, called once command is 311 * processed by IOA 312 */ 313 memset(&cmd->ioa_cb->ioarcb.cdb, 0, PMCRAID_MAX_CDB_LEN); 314 ioarcb->hrrq_id = 0; 315 ioarcb->request_flags0 = 0; 316 ioarcb->request_flags1 = 0; 317 ioarcb->cmd_timeout = 0; 318 ioarcb->ioarcb_bus_addr &= cpu_to_le64(~0x1FULL); 319 ioarcb->ioadl_bus_addr = 0; 320 ioarcb->ioadl_length = 0; 321 ioarcb->data_transfer_length = 0; 322 ioarcb->add_cmd_param_length = 0; 323 ioarcb->add_cmd_param_offset = 0; 324 cmd->ioa_cb->ioasa.ioasc = 0; 325 cmd->ioa_cb->ioasa.residual_data_length = 0; 326 cmd->time_left = 0; 327 } 328 329 cmd->cmd_done = NULL; 330 cmd->scsi_cmd = NULL; 331 cmd->release = 0; 332 cmd->completion_req = 0; 333 cmd->sense_buffer = NULL; 334 cmd->sense_buffer_dma = 0; 335 cmd->dma_handle = 0; 336 timer_setup(&cmd->timer, NULL, 0); 337 } 338 339 /** 340 * pmcraid_reinit_cmdblk - reinitialize a command block 341 * 342 * @cmd: pointer to struct pmcraid_cmd to be reinitialized 343 * 344 * Return Value 345 * None 346 */ 347 static void pmcraid_reinit_cmdblk(struct pmcraid_cmd *cmd) 348 { 349 pmcraid_init_cmdblk(cmd, -1); 350 } 351 352 /** 353 * pmcraid_get_free_cmd - get a free cmd block from command block pool 354 * @pinstance: adapter instance structure 355 * 356 * Return Value: 357 * returns pointer to cmd block or NULL if no blocks are available 358 */ 359 static struct pmcraid_cmd *pmcraid_get_free_cmd( 360 struct pmcraid_instance *pinstance 361 ) 362 { 363 struct pmcraid_cmd *cmd = NULL; 364 unsigned long lock_flags; 365 366 /* free cmd block list is protected by free_pool_lock */ 367 spin_lock_irqsave(&pinstance->free_pool_lock, lock_flags); 368 369 if (!list_empty(&pinstance->free_cmd_pool)) { 370 cmd = list_entry(pinstance->free_cmd_pool.next, 371 struct pmcraid_cmd, free_list); 372 list_del(&cmd->free_list); 373 } 374 spin_unlock_irqrestore(&pinstance->free_pool_lock, lock_flags); 375 376 /* Initialize the command block before giving it the caller */ 377 if (cmd != NULL) 378 pmcraid_reinit_cmdblk(cmd); 379 return cmd; 380 } 381 382 /** 383 * pmcraid_return_cmd - return a completed command block back into free pool 384 * @cmd: pointer to the command block 385 * 386 * Return Value: 387 * nothing 388 */ 389 static void pmcraid_return_cmd(struct pmcraid_cmd *cmd) 390 { 391 struct pmcraid_instance *pinstance = cmd->drv_inst; 392 unsigned long lock_flags; 393 394 spin_lock_irqsave(&pinstance->free_pool_lock, lock_flags); 395 list_add_tail(&cmd->free_list, &pinstance->free_cmd_pool); 396 spin_unlock_irqrestore(&pinstance->free_pool_lock, lock_flags); 397 } 398 399 /** 400 * pmcraid_read_interrupts - reads IOA interrupts 401 * 402 * @pinstance: pointer to adapter instance structure 403 * 404 * Return value 405 * interrupts read from IOA 406 */ 407 static u32 pmcraid_read_interrupts(struct pmcraid_instance *pinstance) 408 { 409 return (pinstance->interrupt_mode) ? 410 ioread32(pinstance->int_regs.ioa_host_msix_interrupt_reg) : 411 ioread32(pinstance->int_regs.ioa_host_interrupt_reg); 412 } 413 414 /** 415 * pmcraid_disable_interrupts - Masks and clears all specified interrupts 416 * 417 * @pinstance: pointer to per adapter instance structure 418 * @intrs: interrupts to disable 419 * 420 * Return Value 421 * None 422 */ 423 static void pmcraid_disable_interrupts( 424 struct pmcraid_instance *pinstance, 425 u32 intrs 426 ) 427 { 428 u32 gmask = ioread32(pinstance->int_regs.global_interrupt_mask_reg); 429 u32 nmask = gmask | GLOBAL_INTERRUPT_MASK; 430 431 iowrite32(intrs, pinstance->int_regs.ioa_host_interrupt_clr_reg); 432 iowrite32(nmask, pinstance->int_regs.global_interrupt_mask_reg); 433 ioread32(pinstance->int_regs.global_interrupt_mask_reg); 434 435 if (!pinstance->interrupt_mode) { 436 iowrite32(intrs, 437 pinstance->int_regs.ioa_host_interrupt_mask_reg); 438 ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg); 439 } 440 } 441 442 /** 443 * pmcraid_enable_interrupts - Enables specified interrupts 444 * 445 * @pinstance: pointer to per adapter instance structure 446 * @intr: interrupts to enable 447 * 448 * Return Value 449 * None 450 */ 451 static void pmcraid_enable_interrupts( 452 struct pmcraid_instance *pinstance, 453 u32 intrs 454 ) 455 { 456 u32 gmask = ioread32(pinstance->int_regs.global_interrupt_mask_reg); 457 u32 nmask = gmask & (~GLOBAL_INTERRUPT_MASK); 458 459 iowrite32(nmask, pinstance->int_regs.global_interrupt_mask_reg); 460 461 if (!pinstance->interrupt_mode) { 462 iowrite32(~intrs, 463 pinstance->int_regs.ioa_host_interrupt_mask_reg); 464 ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg); 465 } 466 467 pmcraid_info("enabled interrupts global mask = %x intr_mask = %x\n", 468 ioread32(pinstance->int_regs.global_interrupt_mask_reg), 469 ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg)); 470 } 471 472 /** 473 * pmcraid_clr_trans_op - clear trans to op interrupt 474 * 475 * @pinstance: pointer to per adapter instance structure 476 * 477 * Return Value 478 * None 479 */ 480 static void pmcraid_clr_trans_op( 481 struct pmcraid_instance *pinstance 482 ) 483 { 484 unsigned long lock_flags; 485 486 if (!pinstance->interrupt_mode) { 487 iowrite32(INTRS_TRANSITION_TO_OPERATIONAL, 488 pinstance->int_regs.ioa_host_interrupt_mask_reg); 489 ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg); 490 iowrite32(INTRS_TRANSITION_TO_OPERATIONAL, 491 pinstance->int_regs.ioa_host_interrupt_clr_reg); 492 ioread32(pinstance->int_regs.ioa_host_interrupt_clr_reg); 493 } 494 495 if (pinstance->reset_cmd != NULL) { 496 del_timer(&pinstance->reset_cmd->timer); 497 spin_lock_irqsave( 498 pinstance->host->host_lock, lock_flags); 499 pinstance->reset_cmd->cmd_done(pinstance->reset_cmd); 500 spin_unlock_irqrestore( 501 pinstance->host->host_lock, lock_flags); 502 } 503 } 504 505 /** 506 * pmcraid_reset_type - Determine the required reset type 507 * @pinstance: pointer to adapter instance structure 508 * 509 * IOA requires hard reset if any of the following conditions is true. 510 * 1. If HRRQ valid interrupt is not masked 511 * 2. IOA reset alert doorbell is set 512 * 3. If there are any error interrupts 513 */ 514 static void pmcraid_reset_type(struct pmcraid_instance *pinstance) 515 { 516 u32 mask; 517 u32 intrs; 518 u32 alerts; 519 520 mask = ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg); 521 intrs = ioread32(pinstance->int_regs.ioa_host_interrupt_reg); 522 alerts = ioread32(pinstance->int_regs.host_ioa_interrupt_reg); 523 524 if ((mask & INTRS_HRRQ_VALID) == 0 || 525 (alerts & DOORBELL_IOA_RESET_ALERT) || 526 (intrs & PMCRAID_ERROR_INTERRUPTS)) { 527 pmcraid_info("IOA requires hard reset\n"); 528 pinstance->ioa_hard_reset = 1; 529 } 530 531 /* If unit check is active, trigger the dump */ 532 if (intrs & INTRS_IOA_UNIT_CHECK) 533 pinstance->ioa_unit_check = 1; 534 } 535 536 /** 537 * pmcraid_bist_done - completion function for PCI BIST 538 * @cmd: pointer to reset command 539 * Return Value 540 * none 541 */ 542 543 static void pmcraid_ioa_reset(struct pmcraid_cmd *); 544 545 static void pmcraid_bist_done(struct timer_list *t) 546 { 547 struct pmcraid_cmd *cmd = from_timer(cmd, t, timer); 548 struct pmcraid_instance *pinstance = cmd->drv_inst; 549 unsigned long lock_flags; 550 int rc; 551 u16 pci_reg; 552 553 rc = pci_read_config_word(pinstance->pdev, PCI_COMMAND, &pci_reg); 554 555 /* If PCI config space can't be accessed wait for another two secs */ 556 if ((rc != PCIBIOS_SUCCESSFUL || (!(pci_reg & PCI_COMMAND_MEMORY))) && 557 cmd->time_left > 0) { 558 pmcraid_info("BIST not complete, waiting another 2 secs\n"); 559 cmd->timer.expires = jiffies + cmd->time_left; 560 cmd->time_left = 0; 561 add_timer(&cmd->timer); 562 } else { 563 cmd->time_left = 0; 564 pmcraid_info("BIST is complete, proceeding with reset\n"); 565 spin_lock_irqsave(pinstance->host->host_lock, lock_flags); 566 pmcraid_ioa_reset(cmd); 567 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); 568 } 569 } 570 571 /** 572 * pmcraid_start_bist - starts BIST 573 * @cmd: pointer to reset cmd 574 * Return Value 575 * none 576 */ 577 static void pmcraid_start_bist(struct pmcraid_cmd *cmd) 578 { 579 struct pmcraid_instance *pinstance = cmd->drv_inst; 580 u32 doorbells, intrs; 581 582 /* proceed with bist and wait for 2 seconds */ 583 iowrite32(DOORBELL_IOA_START_BIST, 584 pinstance->int_regs.host_ioa_interrupt_reg); 585 doorbells = ioread32(pinstance->int_regs.host_ioa_interrupt_reg); 586 intrs = ioread32(pinstance->int_regs.ioa_host_interrupt_reg); 587 pmcraid_info("doorbells after start bist: %x intrs: %x\n", 588 doorbells, intrs); 589 590 cmd->time_left = msecs_to_jiffies(PMCRAID_BIST_TIMEOUT); 591 cmd->timer.expires = jiffies + msecs_to_jiffies(PMCRAID_BIST_TIMEOUT); 592 cmd->timer.function = pmcraid_bist_done; 593 add_timer(&cmd->timer); 594 } 595 596 /** 597 * pmcraid_reset_alert_done - completion routine for reset_alert 598 * @cmd: pointer to command block used in reset sequence 599 * Return value 600 * None 601 */ 602 static void pmcraid_reset_alert_done(struct timer_list *t) 603 { 604 struct pmcraid_cmd *cmd = from_timer(cmd, t, timer); 605 struct pmcraid_instance *pinstance = cmd->drv_inst; 606 u32 status = ioread32(pinstance->ioa_status); 607 unsigned long lock_flags; 608 609 /* if the critical operation in progress bit is set or the wait times 610 * out, invoke reset engine to proceed with hard reset. If there is 611 * some more time to wait, restart the timer 612 */ 613 if (((status & INTRS_CRITICAL_OP_IN_PROGRESS) == 0) || 614 cmd->time_left <= 0) { 615 pmcraid_info("critical op is reset proceeding with reset\n"); 616 spin_lock_irqsave(pinstance->host->host_lock, lock_flags); 617 pmcraid_ioa_reset(cmd); 618 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); 619 } else { 620 pmcraid_info("critical op is not yet reset waiting again\n"); 621 /* restart timer if some more time is available to wait */ 622 cmd->time_left -= PMCRAID_CHECK_FOR_RESET_TIMEOUT; 623 cmd->timer.expires = jiffies + PMCRAID_CHECK_FOR_RESET_TIMEOUT; 624 cmd->timer.function = pmcraid_reset_alert_done; 625 add_timer(&cmd->timer); 626 } 627 } 628 629 /** 630 * pmcraid_reset_alert - alerts IOA for a possible reset 631 * @cmd : command block to be used for reset sequence. 632 * 633 * Return Value 634 * returns 0 if pci config-space is accessible and RESET_DOORBELL is 635 * successfully written to IOA. Returns non-zero in case pci_config_space 636 * is not accessible 637 */ 638 static void pmcraid_notify_ioastate(struct pmcraid_instance *, u32); 639 static void pmcraid_reset_alert(struct pmcraid_cmd *cmd) 640 { 641 struct pmcraid_instance *pinstance = cmd->drv_inst; 642 u32 doorbells; 643 int rc; 644 u16 pci_reg; 645 646 /* If we are able to access IOA PCI config space, alert IOA that we are 647 * going to reset it soon. This enables IOA to preserv persistent error 648 * data if any. In case memory space is not accessible, proceed with 649 * BIST or slot_reset 650 */ 651 rc = pci_read_config_word(pinstance->pdev, PCI_COMMAND, &pci_reg); 652 if ((rc == PCIBIOS_SUCCESSFUL) && (pci_reg & PCI_COMMAND_MEMORY)) { 653 654 /* wait for IOA permission i.e until CRITICAL_OPERATION bit is 655 * reset IOA doesn't generate any interrupts when CRITICAL 656 * OPERATION bit is reset. A timer is started to wait for this 657 * bit to be reset. 658 */ 659 cmd->time_left = PMCRAID_RESET_TIMEOUT; 660 cmd->timer.expires = jiffies + PMCRAID_CHECK_FOR_RESET_TIMEOUT; 661 cmd->timer.function = pmcraid_reset_alert_done; 662 add_timer(&cmd->timer); 663 664 iowrite32(DOORBELL_IOA_RESET_ALERT, 665 pinstance->int_regs.host_ioa_interrupt_reg); 666 doorbells = 667 ioread32(pinstance->int_regs.host_ioa_interrupt_reg); 668 pmcraid_info("doorbells after reset alert: %x\n", doorbells); 669 } else { 670 pmcraid_info("PCI config is not accessible starting BIST\n"); 671 pinstance->ioa_state = IOA_STATE_IN_HARD_RESET; 672 pmcraid_start_bist(cmd); 673 } 674 } 675 676 /** 677 * pmcraid_timeout_handler - Timeout handler for internally generated ops 678 * 679 * @cmd : pointer to command structure, that got timedout 680 * 681 * This function blocks host requests and initiates an adapter reset. 682 * 683 * Return value: 684 * None 685 */ 686 static void pmcraid_timeout_handler(struct timer_list *t) 687 { 688 struct pmcraid_cmd *cmd = from_timer(cmd, t, timer); 689 struct pmcraid_instance *pinstance = cmd->drv_inst; 690 unsigned long lock_flags; 691 692 dev_info(&pinstance->pdev->dev, 693 "Adapter being reset due to cmd(CDB[0] = %x) timeout\n", 694 cmd->ioa_cb->ioarcb.cdb[0]); 695 696 /* Command timeouts result in hard reset sequence. The command that got 697 * timed out may be the one used as part of reset sequence. In this 698 * case restart reset sequence using the same command block even if 699 * reset is in progress. Otherwise fail this command and get a free 700 * command block to restart the reset sequence. 701 */ 702 spin_lock_irqsave(pinstance->host->host_lock, lock_flags); 703 if (!pinstance->ioa_reset_in_progress) { 704 pinstance->ioa_reset_attempts = 0; 705 cmd = pmcraid_get_free_cmd(pinstance); 706 707 /* If we are out of command blocks, just return here itself. 708 * Some other command's timeout handler can do the reset job 709 */ 710 if (cmd == NULL) { 711 spin_unlock_irqrestore(pinstance->host->host_lock, 712 lock_flags); 713 pmcraid_err("no free cmnd block for timeout handler\n"); 714 return; 715 } 716 717 pinstance->reset_cmd = cmd; 718 pinstance->ioa_reset_in_progress = 1; 719 } else { 720 pmcraid_info("reset is already in progress\n"); 721 722 if (pinstance->reset_cmd != cmd) { 723 /* This command should have been given to IOA, this 724 * command will be completed by fail_outstanding_cmds 725 * anyway 726 */ 727 pmcraid_err("cmd is pending but reset in progress\n"); 728 } 729 730 /* If this command was being used as part of the reset 731 * sequence, set cmd_done pointer to pmcraid_ioa_reset. This 732 * causes fail_outstanding_commands not to return the command 733 * block back to free pool 734 */ 735 if (cmd == pinstance->reset_cmd) 736 cmd->cmd_done = pmcraid_ioa_reset; 737 } 738 739 /* Notify apps of important IOA bringup/bringdown sequences */ 740 if (pinstance->scn.ioa_state != PMC_DEVICE_EVENT_RESET_START && 741 pinstance->scn.ioa_state != PMC_DEVICE_EVENT_SHUTDOWN_START) 742 pmcraid_notify_ioastate(pinstance, 743 PMC_DEVICE_EVENT_RESET_START); 744 745 pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT; 746 scsi_block_requests(pinstance->host); 747 pmcraid_reset_alert(cmd); 748 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); 749 } 750 751 /** 752 * pmcraid_internal_done - completion routine for internally generated cmds 753 * 754 * @cmd: command that got response from IOA 755 * 756 * Return Value: 757 * none 758 */ 759 static void pmcraid_internal_done(struct pmcraid_cmd *cmd) 760 { 761 pmcraid_info("response internal cmd CDB[0] = %x ioasc = %x\n", 762 cmd->ioa_cb->ioarcb.cdb[0], 763 le32_to_cpu(cmd->ioa_cb->ioasa.ioasc)); 764 765 /* Some of the internal commands are sent with callers blocking for the 766 * response. Same will be indicated as part of cmd->completion_req 767 * field. Response path needs to wake up any waiters waiting for cmd 768 * completion if this flag is set. 769 */ 770 if (cmd->completion_req) { 771 cmd->completion_req = 0; 772 complete(&cmd->wait_for_completion); 773 } 774 775 /* most of the internal commands are completed by caller itself, so 776 * no need to return the command block back to free pool until we are 777 * required to do so (e.g once done with initialization). 778 */ 779 if (cmd->release) { 780 cmd->release = 0; 781 pmcraid_return_cmd(cmd); 782 } 783 } 784 785 /** 786 * pmcraid_reinit_cfgtable_done - done function for cfg table reinitialization 787 * 788 * @cmd: command that got response from IOA 789 * 790 * This routine is called after driver re-reads configuration table due to a 791 * lost CCN. It returns the command block back to free pool and schedules 792 * worker thread to add/delete devices into the system. 793 * 794 * Return Value: 795 * none 796 */ 797 static void pmcraid_reinit_cfgtable_done(struct pmcraid_cmd *cmd) 798 { 799 pmcraid_info("response internal cmd CDB[0] = %x ioasc = %x\n", 800 cmd->ioa_cb->ioarcb.cdb[0], 801 le32_to_cpu(cmd->ioa_cb->ioasa.ioasc)); 802 803 if (cmd->release) { 804 cmd->release = 0; 805 pmcraid_return_cmd(cmd); 806 } 807 pmcraid_info("scheduling worker for config table reinitialization\n"); 808 schedule_work(&cmd->drv_inst->worker_q); 809 } 810 811 /** 812 * pmcraid_erp_done - Process completion of SCSI error response from device 813 * @cmd: pmcraid_command 814 * 815 * This function copies the sense buffer into the scsi_cmd struct and completes 816 * scsi_cmd by calling scsi_done function. 817 * 818 * Return value: 819 * none 820 */ 821 static void pmcraid_erp_done(struct pmcraid_cmd *cmd) 822 { 823 struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd; 824 struct pmcraid_instance *pinstance = cmd->drv_inst; 825 u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc); 826 827 if (PMCRAID_IOASC_SENSE_KEY(ioasc) > 0) { 828 scsi_cmd->result |= (DID_ERROR << 16); 829 scmd_printk(KERN_INFO, scsi_cmd, 830 "command CDB[0] = %x failed with IOASC: 0x%08X\n", 831 cmd->ioa_cb->ioarcb.cdb[0], ioasc); 832 } 833 834 if (cmd->sense_buffer) { 835 dma_unmap_single(&pinstance->pdev->dev, cmd->sense_buffer_dma, 836 SCSI_SENSE_BUFFERSIZE, DMA_FROM_DEVICE); 837 cmd->sense_buffer = NULL; 838 cmd->sense_buffer_dma = 0; 839 } 840 841 scsi_dma_unmap(scsi_cmd); 842 pmcraid_return_cmd(cmd); 843 scsi_cmd->scsi_done(scsi_cmd); 844 } 845 846 /** 847 * pmcraid_fire_command - sends an IOA command to adapter 848 * 849 * This function adds the given block into pending command list 850 * and returns without waiting 851 * 852 * @cmd : command to be sent to the device 853 * 854 * Return Value 855 * None 856 */ 857 static void _pmcraid_fire_command(struct pmcraid_cmd *cmd) 858 { 859 struct pmcraid_instance *pinstance = cmd->drv_inst; 860 unsigned long lock_flags; 861 862 /* Add this command block to pending cmd pool. We do this prior to 863 * writting IOARCB to ioarrin because IOA might complete the command 864 * by the time we are about to add it to the list. Response handler 865 * (isr/tasklet) looks for cmd block in the pending pending list. 866 */ 867 spin_lock_irqsave(&pinstance->pending_pool_lock, lock_flags); 868 list_add_tail(&cmd->free_list, &pinstance->pending_cmd_pool); 869 spin_unlock_irqrestore(&pinstance->pending_pool_lock, lock_flags); 870 atomic_inc(&pinstance->outstanding_cmds); 871 872 /* driver writes lower 32-bit value of IOARCB address only */ 873 mb(); 874 iowrite32(le64_to_cpu(cmd->ioa_cb->ioarcb.ioarcb_bus_addr), pinstance->ioarrin); 875 } 876 877 /** 878 * pmcraid_send_cmd - fires a command to IOA 879 * 880 * This function also sets up timeout function, and command completion 881 * function 882 * 883 * @cmd: pointer to the command block to be fired to IOA 884 * @cmd_done: command completion function, called once IOA responds 885 * @timeout: timeout to wait for this command completion 886 * @timeout_func: timeout handler 887 * 888 * Return value 889 * none 890 */ 891 static void pmcraid_send_cmd( 892 struct pmcraid_cmd *cmd, 893 void (*cmd_done) (struct pmcraid_cmd *), 894 unsigned long timeout, 895 void (*timeout_func) (struct timer_list *) 896 ) 897 { 898 /* initialize done function */ 899 cmd->cmd_done = cmd_done; 900 901 if (timeout_func) { 902 /* setup timeout handler */ 903 cmd->timer.expires = jiffies + timeout; 904 cmd->timer.function = timeout_func; 905 add_timer(&cmd->timer); 906 } 907 908 /* fire the command to IOA */ 909 _pmcraid_fire_command(cmd); 910 } 911 912 /** 913 * pmcraid_ioa_shutdown_done - completion function for IOA shutdown command 914 * @cmd: pointer to the command block used for sending IOA shutdown command 915 * 916 * Return value 917 * None 918 */ 919 static void pmcraid_ioa_shutdown_done(struct pmcraid_cmd *cmd) 920 { 921 struct pmcraid_instance *pinstance = cmd->drv_inst; 922 unsigned long lock_flags; 923 924 spin_lock_irqsave(pinstance->host->host_lock, lock_flags); 925 pmcraid_ioa_reset(cmd); 926 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); 927 } 928 929 /** 930 * pmcraid_ioa_shutdown - sends SHUTDOWN command to ioa 931 * 932 * @cmd: pointer to the command block used as part of reset sequence 933 * 934 * Return Value 935 * None 936 */ 937 static void pmcraid_ioa_shutdown(struct pmcraid_cmd *cmd) 938 { 939 pmcraid_info("response for Cancel CCN CDB[0] = %x ioasc = %x\n", 940 cmd->ioa_cb->ioarcb.cdb[0], 941 le32_to_cpu(cmd->ioa_cb->ioasa.ioasc)); 942 943 /* Note that commands sent during reset require next command to be sent 944 * to IOA. Hence reinit the done function as well as timeout function 945 */ 946 pmcraid_reinit_cmdblk(cmd); 947 cmd->ioa_cb->ioarcb.request_type = REQ_TYPE_IOACMD; 948 cmd->ioa_cb->ioarcb.resource_handle = 949 cpu_to_le32(PMCRAID_IOA_RES_HANDLE); 950 cmd->ioa_cb->ioarcb.cdb[0] = PMCRAID_IOA_SHUTDOWN; 951 cmd->ioa_cb->ioarcb.cdb[1] = PMCRAID_SHUTDOWN_NORMAL; 952 953 /* fire shutdown command to hardware. */ 954 pmcraid_info("firing normal shutdown command (%d) to IOA\n", 955 le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle)); 956 957 pmcraid_notify_ioastate(cmd->drv_inst, PMC_DEVICE_EVENT_SHUTDOWN_START); 958 959 pmcraid_send_cmd(cmd, pmcraid_ioa_shutdown_done, 960 PMCRAID_SHUTDOWN_TIMEOUT, 961 pmcraid_timeout_handler); 962 } 963 964 /** 965 * pmcraid_get_fwversion_done - completion function for get_fwversion 966 * 967 * @cmd: pointer to command block used to send INQUIRY command 968 * 969 * Return Value 970 * none 971 */ 972 static void pmcraid_querycfg(struct pmcraid_cmd *); 973 974 static void pmcraid_get_fwversion_done(struct pmcraid_cmd *cmd) 975 { 976 struct pmcraid_instance *pinstance = cmd->drv_inst; 977 u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc); 978 unsigned long lock_flags; 979 980 /* configuration table entry size depends on firmware version. If fw 981 * version is not known, it is not possible to interpret IOA config 982 * table 983 */ 984 if (ioasc) { 985 pmcraid_err("IOA Inquiry failed with %x\n", ioasc); 986 spin_lock_irqsave(pinstance->host->host_lock, lock_flags); 987 pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT; 988 pmcraid_reset_alert(cmd); 989 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); 990 } else { 991 pmcraid_querycfg(cmd); 992 } 993 } 994 995 /** 996 * pmcraid_get_fwversion - reads firmware version information 997 * 998 * @cmd: pointer to command block used to send INQUIRY command 999 * 1000 * Return Value 1001 * none 1002 */ 1003 static void pmcraid_get_fwversion(struct pmcraid_cmd *cmd) 1004 { 1005 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb; 1006 struct pmcraid_ioadl_desc *ioadl; 1007 struct pmcraid_instance *pinstance = cmd->drv_inst; 1008 u16 data_size = sizeof(struct pmcraid_inquiry_data); 1009 1010 pmcraid_reinit_cmdblk(cmd); 1011 ioarcb->request_type = REQ_TYPE_SCSI; 1012 ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE); 1013 ioarcb->cdb[0] = INQUIRY; 1014 ioarcb->cdb[1] = 1; 1015 ioarcb->cdb[2] = 0xD0; 1016 ioarcb->cdb[3] = (data_size >> 8) & 0xFF; 1017 ioarcb->cdb[4] = data_size & 0xFF; 1018 1019 /* Since entire inquiry data it can be part of IOARCB itself 1020 */ 1021 ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) + 1022 offsetof(struct pmcraid_ioarcb, 1023 add_data.u.ioadl[0])); 1024 ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc)); 1025 ioarcb->ioarcb_bus_addr &= cpu_to_le64(~(0x1FULL)); 1026 1027 ioarcb->request_flags0 |= NO_LINK_DESCS; 1028 ioarcb->data_transfer_length = cpu_to_le32(data_size); 1029 ioadl = &(ioarcb->add_data.u.ioadl[0]); 1030 ioadl->flags = IOADL_FLAGS_LAST_DESC; 1031 ioadl->address = cpu_to_le64(pinstance->inq_data_baddr); 1032 ioadl->data_len = cpu_to_le32(data_size); 1033 1034 pmcraid_send_cmd(cmd, pmcraid_get_fwversion_done, 1035 PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler); 1036 } 1037 1038 /** 1039 * pmcraid_identify_hrrq - registers host rrq buffers with IOA 1040 * @cmd: pointer to command block to be used for identify hrrq 1041 * 1042 * Return Value 1043 * none 1044 */ 1045 static void pmcraid_identify_hrrq(struct pmcraid_cmd *cmd) 1046 { 1047 struct pmcraid_instance *pinstance = cmd->drv_inst; 1048 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb; 1049 int index = cmd->hrrq_index; 1050 __be64 hrrq_addr = cpu_to_be64(pinstance->hrrq_start_bus_addr[index]); 1051 __be32 hrrq_size = cpu_to_be32(sizeof(u32) * PMCRAID_MAX_CMD); 1052 void (*done_function)(struct pmcraid_cmd *); 1053 1054 pmcraid_reinit_cmdblk(cmd); 1055 cmd->hrrq_index = index + 1; 1056 1057 if (cmd->hrrq_index < pinstance->num_hrrq) { 1058 done_function = pmcraid_identify_hrrq; 1059 } else { 1060 cmd->hrrq_index = 0; 1061 done_function = pmcraid_get_fwversion; 1062 } 1063 1064 /* Initialize ioarcb */ 1065 ioarcb->request_type = REQ_TYPE_IOACMD; 1066 ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE); 1067 1068 /* initialize the hrrq number where IOA will respond to this command */ 1069 ioarcb->hrrq_id = index; 1070 ioarcb->cdb[0] = PMCRAID_IDENTIFY_HRRQ; 1071 ioarcb->cdb[1] = index; 1072 1073 /* IOA expects 64-bit pci address to be written in B.E format 1074 * (i.e cdb[2]=MSByte..cdb[9]=LSB. 1075 */ 1076 pmcraid_info("HRRQ_IDENTIFY with hrrq:ioarcb:index => %llx:%llx:%x\n", 1077 hrrq_addr, ioarcb->ioarcb_bus_addr, index); 1078 1079 memcpy(&(ioarcb->cdb[2]), &hrrq_addr, sizeof(hrrq_addr)); 1080 memcpy(&(ioarcb->cdb[10]), &hrrq_size, sizeof(hrrq_size)); 1081 1082 /* Subsequent commands require HRRQ identification to be successful. 1083 * Note that this gets called even during reset from SCSI mid-layer 1084 * or tasklet 1085 */ 1086 pmcraid_send_cmd(cmd, done_function, 1087 PMCRAID_INTERNAL_TIMEOUT, 1088 pmcraid_timeout_handler); 1089 } 1090 1091 static void pmcraid_process_ccn(struct pmcraid_cmd *cmd); 1092 static void pmcraid_process_ldn(struct pmcraid_cmd *cmd); 1093 1094 /** 1095 * pmcraid_send_hcam_cmd - send an initialized command block(HCAM) to IOA 1096 * 1097 * @cmd: initialized command block pointer 1098 * 1099 * Return Value 1100 * none 1101 */ 1102 static void pmcraid_send_hcam_cmd(struct pmcraid_cmd *cmd) 1103 { 1104 if (cmd->ioa_cb->ioarcb.cdb[1] == PMCRAID_HCAM_CODE_CONFIG_CHANGE) 1105 atomic_set(&(cmd->drv_inst->ccn.ignore), 0); 1106 else 1107 atomic_set(&(cmd->drv_inst->ldn.ignore), 0); 1108 1109 pmcraid_send_cmd(cmd, cmd->cmd_done, 0, NULL); 1110 } 1111 1112 /** 1113 * pmcraid_init_hcam - send an initialized command block(HCAM) to IOA 1114 * 1115 * @pinstance: pointer to adapter instance structure 1116 * @type: HCAM type 1117 * 1118 * Return Value 1119 * pointer to initialized pmcraid_cmd structure or NULL 1120 */ 1121 static struct pmcraid_cmd *pmcraid_init_hcam 1122 ( 1123 struct pmcraid_instance *pinstance, 1124 u8 type 1125 ) 1126 { 1127 struct pmcraid_cmd *cmd; 1128 struct pmcraid_ioarcb *ioarcb; 1129 struct pmcraid_ioadl_desc *ioadl; 1130 struct pmcraid_hostrcb *hcam; 1131 void (*cmd_done) (struct pmcraid_cmd *); 1132 dma_addr_t dma; 1133 int rcb_size; 1134 1135 cmd = pmcraid_get_free_cmd(pinstance); 1136 1137 if (!cmd) { 1138 pmcraid_err("no free command blocks for hcam\n"); 1139 return cmd; 1140 } 1141 1142 if (type == PMCRAID_HCAM_CODE_CONFIG_CHANGE) { 1143 rcb_size = sizeof(struct pmcraid_hcam_ccn_ext); 1144 cmd_done = pmcraid_process_ccn; 1145 dma = pinstance->ccn.baddr + PMCRAID_AEN_HDR_SIZE; 1146 hcam = &pinstance->ccn; 1147 } else { 1148 rcb_size = sizeof(struct pmcraid_hcam_ldn); 1149 cmd_done = pmcraid_process_ldn; 1150 dma = pinstance->ldn.baddr + PMCRAID_AEN_HDR_SIZE; 1151 hcam = &pinstance->ldn; 1152 } 1153 1154 /* initialize command pointer used for HCAM registration */ 1155 hcam->cmd = cmd; 1156 1157 ioarcb = &cmd->ioa_cb->ioarcb; 1158 ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) + 1159 offsetof(struct pmcraid_ioarcb, 1160 add_data.u.ioadl[0])); 1161 ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc)); 1162 ioadl = ioarcb->add_data.u.ioadl; 1163 1164 /* Initialize ioarcb */ 1165 ioarcb->request_type = REQ_TYPE_HCAM; 1166 ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE); 1167 ioarcb->cdb[0] = PMCRAID_HOST_CONTROLLED_ASYNC; 1168 ioarcb->cdb[1] = type; 1169 ioarcb->cdb[7] = (rcb_size >> 8) & 0xFF; 1170 ioarcb->cdb[8] = (rcb_size) & 0xFF; 1171 1172 ioarcb->data_transfer_length = cpu_to_le32(rcb_size); 1173 1174 ioadl[0].flags |= IOADL_FLAGS_READ_LAST; 1175 ioadl[0].data_len = cpu_to_le32(rcb_size); 1176 ioadl[0].address = cpu_to_le64(dma); 1177 1178 cmd->cmd_done = cmd_done; 1179 return cmd; 1180 } 1181 1182 /** 1183 * pmcraid_send_hcam - Send an HCAM to IOA 1184 * @pinstance: ioa config struct 1185 * @type: HCAM type 1186 * 1187 * This function will send a Host Controlled Async command to IOA. 1188 * 1189 * Return value: 1190 * none 1191 */ 1192 static void pmcraid_send_hcam(struct pmcraid_instance *pinstance, u8 type) 1193 { 1194 struct pmcraid_cmd *cmd = pmcraid_init_hcam(pinstance, type); 1195 pmcraid_send_hcam_cmd(cmd); 1196 } 1197 1198 1199 /** 1200 * pmcraid_prepare_cancel_cmd - prepares a command block to abort another 1201 * 1202 * @cmd: pointer to cmd that is used as cancelling command 1203 * @cmd_to_cancel: pointer to the command that needs to be cancelled 1204 */ 1205 static void pmcraid_prepare_cancel_cmd( 1206 struct pmcraid_cmd *cmd, 1207 struct pmcraid_cmd *cmd_to_cancel 1208 ) 1209 { 1210 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb; 1211 __be64 ioarcb_addr; 1212 1213 /* IOARCB address of the command to be cancelled is given in 1214 * cdb[2]..cdb[9] is Big-Endian format. Note that length bits in 1215 * IOARCB address are not masked. 1216 */ 1217 ioarcb_addr = cpu_to_be64(le64_to_cpu(cmd_to_cancel->ioa_cb->ioarcb.ioarcb_bus_addr)); 1218 1219 /* Get the resource handle to where the command to be aborted has been 1220 * sent. 1221 */ 1222 ioarcb->resource_handle = cmd_to_cancel->ioa_cb->ioarcb.resource_handle; 1223 ioarcb->request_type = REQ_TYPE_IOACMD; 1224 memset(ioarcb->cdb, 0, PMCRAID_MAX_CDB_LEN); 1225 ioarcb->cdb[0] = PMCRAID_ABORT_CMD; 1226 1227 memcpy(&(ioarcb->cdb[2]), &ioarcb_addr, sizeof(ioarcb_addr)); 1228 } 1229 1230 /** 1231 * pmcraid_cancel_hcam - sends ABORT task to abort a given HCAM 1232 * 1233 * @cmd: command to be used as cancelling command 1234 * @type: HCAM type 1235 * @cmd_done: op done function for the cancelling command 1236 */ 1237 static void pmcraid_cancel_hcam( 1238 struct pmcraid_cmd *cmd, 1239 u8 type, 1240 void (*cmd_done) (struct pmcraid_cmd *) 1241 ) 1242 { 1243 struct pmcraid_instance *pinstance; 1244 struct pmcraid_hostrcb *hcam; 1245 1246 pinstance = cmd->drv_inst; 1247 hcam = (type == PMCRAID_HCAM_CODE_LOG_DATA) ? 1248 &pinstance->ldn : &pinstance->ccn; 1249 1250 /* prepare for cancelling previous hcam command. If the HCAM is 1251 * currently not pending with IOA, we would have hcam->cmd as non-null 1252 */ 1253 if (hcam->cmd == NULL) 1254 return; 1255 1256 pmcraid_prepare_cancel_cmd(cmd, hcam->cmd); 1257 1258 /* writing to IOARRIN must be protected by host_lock, as mid-layer 1259 * schedule queuecommand while we are doing this 1260 */ 1261 pmcraid_send_cmd(cmd, cmd_done, 1262 PMCRAID_INTERNAL_TIMEOUT, 1263 pmcraid_timeout_handler); 1264 } 1265 1266 /** 1267 * pmcraid_cancel_ccn - cancel CCN HCAM already registered with IOA 1268 * 1269 * @cmd: command block to be used for cancelling the HCAM 1270 */ 1271 static void pmcraid_cancel_ccn(struct pmcraid_cmd *cmd) 1272 { 1273 pmcraid_info("response for Cancel LDN CDB[0] = %x ioasc = %x\n", 1274 cmd->ioa_cb->ioarcb.cdb[0], 1275 le32_to_cpu(cmd->ioa_cb->ioasa.ioasc)); 1276 1277 pmcraid_reinit_cmdblk(cmd); 1278 1279 pmcraid_cancel_hcam(cmd, 1280 PMCRAID_HCAM_CODE_CONFIG_CHANGE, 1281 pmcraid_ioa_shutdown); 1282 } 1283 1284 /** 1285 * pmcraid_cancel_ldn - cancel LDN HCAM already registered with IOA 1286 * 1287 * @cmd: command block to be used for cancelling the HCAM 1288 */ 1289 static void pmcraid_cancel_ldn(struct pmcraid_cmd *cmd) 1290 { 1291 pmcraid_cancel_hcam(cmd, 1292 PMCRAID_HCAM_CODE_LOG_DATA, 1293 pmcraid_cancel_ccn); 1294 } 1295 1296 /** 1297 * pmcraid_expose_resource - check if the resource can be exposed to OS 1298 * 1299 * @fw_version: firmware version code 1300 * @cfgte: pointer to configuration table entry of the resource 1301 * 1302 * Return value: 1303 * true if resource can be added to midlayer, false(0) otherwise 1304 */ 1305 static int pmcraid_expose_resource(u16 fw_version, 1306 struct pmcraid_config_table_entry *cfgte) 1307 { 1308 int retval = 0; 1309 1310 if (cfgte->resource_type == RES_TYPE_VSET) { 1311 if (fw_version <= PMCRAID_FW_VERSION_1) 1312 retval = ((cfgte->unique_flags1 & 0x80) == 0); 1313 else 1314 retval = ((cfgte->unique_flags0 & 0x80) == 0 && 1315 (cfgte->unique_flags1 & 0x80) == 0); 1316 1317 } else if (cfgte->resource_type == RES_TYPE_GSCSI) 1318 retval = (RES_BUS(cfgte->resource_address) != 1319 PMCRAID_VIRTUAL_ENCL_BUS_ID); 1320 return retval; 1321 } 1322 1323 /* attributes supported by pmcraid_event_family */ 1324 enum { 1325 PMCRAID_AEN_ATTR_UNSPEC, 1326 PMCRAID_AEN_ATTR_EVENT, 1327 __PMCRAID_AEN_ATTR_MAX, 1328 }; 1329 #define PMCRAID_AEN_ATTR_MAX (__PMCRAID_AEN_ATTR_MAX - 1) 1330 1331 /* commands supported by pmcraid_event_family */ 1332 enum { 1333 PMCRAID_AEN_CMD_UNSPEC, 1334 PMCRAID_AEN_CMD_EVENT, 1335 __PMCRAID_AEN_CMD_MAX, 1336 }; 1337 #define PMCRAID_AEN_CMD_MAX (__PMCRAID_AEN_CMD_MAX - 1) 1338 1339 static struct genl_multicast_group pmcraid_mcgrps[] = { 1340 { .name = "events", /* not really used - see ID discussion below */ }, 1341 }; 1342 1343 static struct genl_family pmcraid_event_family __ro_after_init = { 1344 .module = THIS_MODULE, 1345 .name = "pmcraid", 1346 .version = 1, 1347 .maxattr = PMCRAID_AEN_ATTR_MAX, 1348 .mcgrps = pmcraid_mcgrps, 1349 .n_mcgrps = ARRAY_SIZE(pmcraid_mcgrps), 1350 }; 1351 1352 /** 1353 * pmcraid_netlink_init - registers pmcraid_event_family 1354 * 1355 * Return value: 1356 * 0 if the pmcraid_event_family is successfully registered 1357 * with netlink generic, non-zero otherwise 1358 */ 1359 static int __init pmcraid_netlink_init(void) 1360 { 1361 int result; 1362 1363 result = genl_register_family(&pmcraid_event_family); 1364 1365 if (result) 1366 return result; 1367 1368 pmcraid_info("registered NETLINK GENERIC group: %d\n", 1369 pmcraid_event_family.id); 1370 1371 return result; 1372 } 1373 1374 /** 1375 * pmcraid_netlink_release - unregisters pmcraid_event_family 1376 * 1377 * Return value: 1378 * none 1379 */ 1380 static void pmcraid_netlink_release(void) 1381 { 1382 genl_unregister_family(&pmcraid_event_family); 1383 } 1384 1385 /** 1386 * pmcraid_notify_aen - sends event msg to user space application 1387 * @pinstance: pointer to adapter instance structure 1388 * @type: HCAM type 1389 * 1390 * Return value: 1391 * 0 if success, error value in case of any failure. 1392 */ 1393 static int pmcraid_notify_aen( 1394 struct pmcraid_instance *pinstance, 1395 struct pmcraid_aen_msg *aen_msg, 1396 u32 data_size 1397 ) 1398 { 1399 struct sk_buff *skb; 1400 void *msg_header; 1401 u32 total_size, nla_genl_hdr_total_size; 1402 int result; 1403 1404 aen_msg->hostno = (pinstance->host->unique_id << 16 | 1405 MINOR(pinstance->cdev.dev)); 1406 aen_msg->length = data_size; 1407 1408 data_size += sizeof(*aen_msg); 1409 1410 total_size = nla_total_size(data_size); 1411 /* Add GENL_HDR to total_size */ 1412 nla_genl_hdr_total_size = 1413 (total_size + (GENL_HDRLEN + 1414 ((struct genl_family *)&pmcraid_event_family)->hdrsize) 1415 + NLMSG_HDRLEN); 1416 skb = genlmsg_new(nla_genl_hdr_total_size, GFP_ATOMIC); 1417 1418 1419 if (!skb) { 1420 pmcraid_err("Failed to allocate aen data SKB of size: %x\n", 1421 total_size); 1422 return -ENOMEM; 1423 } 1424 1425 /* add the genetlink message header */ 1426 msg_header = genlmsg_put(skb, 0, 0, 1427 &pmcraid_event_family, 0, 1428 PMCRAID_AEN_CMD_EVENT); 1429 if (!msg_header) { 1430 pmcraid_err("failed to copy command details\n"); 1431 nlmsg_free(skb); 1432 return -ENOMEM; 1433 } 1434 1435 result = nla_put(skb, PMCRAID_AEN_ATTR_EVENT, data_size, aen_msg); 1436 1437 if (result) { 1438 pmcraid_err("failed to copy AEN attribute data\n"); 1439 nlmsg_free(skb); 1440 return -EINVAL; 1441 } 1442 1443 /* send genetlink multicast message to notify appplications */ 1444 genlmsg_end(skb, msg_header); 1445 1446 result = genlmsg_multicast(&pmcraid_event_family, skb, 1447 0, 0, GFP_ATOMIC); 1448 1449 /* If there are no listeners, genlmsg_multicast may return non-zero 1450 * value. 1451 */ 1452 if (result) 1453 pmcraid_info("error (%x) sending aen event message\n", result); 1454 return result; 1455 } 1456 1457 /** 1458 * pmcraid_notify_ccn - notifies about CCN event msg to user space 1459 * @pinstance: pointer adapter instance structure 1460 * 1461 * Return value: 1462 * 0 if success, error value in case of any failure 1463 */ 1464 static int pmcraid_notify_ccn(struct pmcraid_instance *pinstance) 1465 { 1466 return pmcraid_notify_aen(pinstance, 1467 pinstance->ccn.msg, 1468 le32_to_cpu(pinstance->ccn.hcam->data_len) + 1469 sizeof(struct pmcraid_hcam_hdr)); 1470 } 1471 1472 /** 1473 * pmcraid_notify_ldn - notifies about CCN event msg to user space 1474 * @pinstance: pointer adapter instance structure 1475 * 1476 * Return value: 1477 * 0 if success, error value in case of any failure 1478 */ 1479 static int pmcraid_notify_ldn(struct pmcraid_instance *pinstance) 1480 { 1481 return pmcraid_notify_aen(pinstance, 1482 pinstance->ldn.msg, 1483 le32_to_cpu(pinstance->ldn.hcam->data_len) + 1484 sizeof(struct pmcraid_hcam_hdr)); 1485 } 1486 1487 /** 1488 * pmcraid_notify_ioastate - sends IOA state event msg to user space 1489 * @pinstance: pointer adapter instance structure 1490 * @evt: controller state event to be sent 1491 * 1492 * Return value: 1493 * 0 if success, error value in case of any failure 1494 */ 1495 static void pmcraid_notify_ioastate(struct pmcraid_instance *pinstance, u32 evt) 1496 { 1497 pinstance->scn.ioa_state = evt; 1498 pmcraid_notify_aen(pinstance, 1499 &pinstance->scn.msg, 1500 sizeof(u32)); 1501 } 1502 1503 /** 1504 * pmcraid_handle_config_change - Handle a config change from the adapter 1505 * @pinstance: pointer to per adapter instance structure 1506 * 1507 * Return value: 1508 * none 1509 */ 1510 1511 static void pmcraid_handle_config_change(struct pmcraid_instance *pinstance) 1512 { 1513 struct pmcraid_config_table_entry *cfg_entry; 1514 struct pmcraid_hcam_ccn *ccn_hcam; 1515 struct pmcraid_cmd *cmd; 1516 struct pmcraid_cmd *cfgcmd; 1517 struct pmcraid_resource_entry *res = NULL; 1518 unsigned long lock_flags; 1519 unsigned long host_lock_flags; 1520 u32 new_entry = 1; 1521 u32 hidden_entry = 0; 1522 u16 fw_version; 1523 int rc; 1524 1525 ccn_hcam = (struct pmcraid_hcam_ccn *)pinstance->ccn.hcam; 1526 cfg_entry = &ccn_hcam->cfg_entry; 1527 fw_version = be16_to_cpu(pinstance->inq_data->fw_version); 1528 1529 pmcraid_info("CCN(%x): %x timestamp: %llx type: %x lost: %x flags: %x \ 1530 res: %x:%x:%x:%x\n", 1531 le32_to_cpu(pinstance->ccn.hcam->ilid), 1532 pinstance->ccn.hcam->op_code, 1533 (le32_to_cpu(pinstance->ccn.hcam->timestamp1) | 1534 ((le32_to_cpu(pinstance->ccn.hcam->timestamp2) & 0xffffffffLL) << 32)), 1535 pinstance->ccn.hcam->notification_type, 1536 pinstance->ccn.hcam->notification_lost, 1537 pinstance->ccn.hcam->flags, 1538 pinstance->host->unique_id, 1539 RES_IS_VSET(*cfg_entry) ? PMCRAID_VSET_BUS_ID : 1540 (RES_IS_GSCSI(*cfg_entry) ? PMCRAID_PHYS_BUS_ID : 1541 RES_BUS(cfg_entry->resource_address)), 1542 RES_IS_VSET(*cfg_entry) ? 1543 (fw_version <= PMCRAID_FW_VERSION_1 ? 1544 cfg_entry->unique_flags1 : 1545 le16_to_cpu(cfg_entry->array_id) & 0xFF) : 1546 RES_TARGET(cfg_entry->resource_address), 1547 RES_LUN(cfg_entry->resource_address)); 1548 1549 1550 /* If this HCAM indicates a lost notification, read the config table */ 1551 if (pinstance->ccn.hcam->notification_lost) { 1552 cfgcmd = pmcraid_get_free_cmd(pinstance); 1553 if (cfgcmd) { 1554 pmcraid_info("lost CCN, reading config table\b"); 1555 pinstance->reinit_cfg_table = 1; 1556 pmcraid_querycfg(cfgcmd); 1557 } else { 1558 pmcraid_err("lost CCN, no free cmd for querycfg\n"); 1559 } 1560 goto out_notify_apps; 1561 } 1562 1563 /* If this resource is not going to be added to mid-layer, just notify 1564 * applications and return. If this notification is about hiding a VSET 1565 * resource, check if it was exposed already. 1566 */ 1567 if (pinstance->ccn.hcam->notification_type == 1568 NOTIFICATION_TYPE_ENTRY_CHANGED && 1569 cfg_entry->resource_type == RES_TYPE_VSET) { 1570 hidden_entry = (cfg_entry->unique_flags1 & 0x80) != 0; 1571 } else if (!pmcraid_expose_resource(fw_version, cfg_entry)) { 1572 goto out_notify_apps; 1573 } 1574 1575 spin_lock_irqsave(&pinstance->resource_lock, lock_flags); 1576 list_for_each_entry(res, &pinstance->used_res_q, queue) { 1577 rc = memcmp(&res->cfg_entry.resource_address, 1578 &cfg_entry->resource_address, 1579 sizeof(cfg_entry->resource_address)); 1580 if (!rc) { 1581 new_entry = 0; 1582 break; 1583 } 1584 } 1585 1586 if (new_entry) { 1587 1588 if (hidden_entry) { 1589 spin_unlock_irqrestore(&pinstance->resource_lock, 1590 lock_flags); 1591 goto out_notify_apps; 1592 } 1593 1594 /* If there are more number of resources than what driver can 1595 * manage, do not notify the applications about the CCN. Just 1596 * ignore this notifications and re-register the same HCAM 1597 */ 1598 if (list_empty(&pinstance->free_res_q)) { 1599 spin_unlock_irqrestore(&pinstance->resource_lock, 1600 lock_flags); 1601 pmcraid_err("too many resources attached\n"); 1602 spin_lock_irqsave(pinstance->host->host_lock, 1603 host_lock_flags); 1604 pmcraid_send_hcam(pinstance, 1605 PMCRAID_HCAM_CODE_CONFIG_CHANGE); 1606 spin_unlock_irqrestore(pinstance->host->host_lock, 1607 host_lock_flags); 1608 return; 1609 } 1610 1611 res = list_entry(pinstance->free_res_q.next, 1612 struct pmcraid_resource_entry, queue); 1613 1614 list_del(&res->queue); 1615 res->scsi_dev = NULL; 1616 res->reset_progress = 0; 1617 list_add_tail(&res->queue, &pinstance->used_res_q); 1618 } 1619 1620 memcpy(&res->cfg_entry, cfg_entry, pinstance->config_table_entry_size); 1621 1622 if (pinstance->ccn.hcam->notification_type == 1623 NOTIFICATION_TYPE_ENTRY_DELETED || hidden_entry) { 1624 if (res->scsi_dev) { 1625 if (fw_version <= PMCRAID_FW_VERSION_1) 1626 res->cfg_entry.unique_flags1 &= 0x7F; 1627 else 1628 res->cfg_entry.array_id &= cpu_to_le16(0xFF); 1629 res->change_detected = RES_CHANGE_DEL; 1630 res->cfg_entry.resource_handle = 1631 PMCRAID_INVALID_RES_HANDLE; 1632 schedule_work(&pinstance->worker_q); 1633 } else { 1634 /* This may be one of the non-exposed resources */ 1635 list_move_tail(&res->queue, &pinstance->free_res_q); 1636 } 1637 } else if (!res->scsi_dev) { 1638 res->change_detected = RES_CHANGE_ADD; 1639 schedule_work(&pinstance->worker_q); 1640 } 1641 spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags); 1642 1643 out_notify_apps: 1644 1645 /* Notify configuration changes to registered applications.*/ 1646 if (!pmcraid_disable_aen) 1647 pmcraid_notify_ccn(pinstance); 1648 1649 cmd = pmcraid_init_hcam(pinstance, PMCRAID_HCAM_CODE_CONFIG_CHANGE); 1650 if (cmd) 1651 pmcraid_send_hcam_cmd(cmd); 1652 } 1653 1654 /** 1655 * pmcraid_get_error_info - return error string for an ioasc 1656 * @ioasc: ioasc code 1657 * Return Value 1658 * none 1659 */ 1660 static struct pmcraid_ioasc_error *pmcraid_get_error_info(u32 ioasc) 1661 { 1662 int i; 1663 for (i = 0; i < ARRAY_SIZE(pmcraid_ioasc_error_table); i++) { 1664 if (pmcraid_ioasc_error_table[i].ioasc_code == ioasc) 1665 return &pmcraid_ioasc_error_table[i]; 1666 } 1667 return NULL; 1668 } 1669 1670 /** 1671 * pmcraid_ioasc_logger - log IOASC information based user-settings 1672 * @ioasc: ioasc code 1673 * @cmd: pointer to command that resulted in 'ioasc' 1674 */ 1675 static void pmcraid_ioasc_logger(u32 ioasc, struct pmcraid_cmd *cmd) 1676 { 1677 struct pmcraid_ioasc_error *error_info = pmcraid_get_error_info(ioasc); 1678 1679 if (error_info == NULL || 1680 cmd->drv_inst->current_log_level < error_info->log_level) 1681 return; 1682 1683 /* log the error string */ 1684 pmcraid_err("cmd [%x] for resource %x failed with %x(%s)\n", 1685 cmd->ioa_cb->ioarcb.cdb[0], 1686 le32_to_cpu(cmd->ioa_cb->ioarcb.resource_handle), 1687 ioasc, error_info->error_string); 1688 } 1689 1690 /** 1691 * pmcraid_handle_error_log - Handle a config change (error log) from the IOA 1692 * 1693 * @pinstance: pointer to per adapter instance structure 1694 * 1695 * Return value: 1696 * none 1697 */ 1698 static void pmcraid_handle_error_log(struct pmcraid_instance *pinstance) 1699 { 1700 struct pmcraid_hcam_ldn *hcam_ldn; 1701 u32 ioasc; 1702 1703 hcam_ldn = (struct pmcraid_hcam_ldn *)pinstance->ldn.hcam; 1704 1705 pmcraid_info 1706 ("LDN(%x): %x type: %x lost: %x flags: %x overlay id: %x\n", 1707 pinstance->ldn.hcam->ilid, 1708 pinstance->ldn.hcam->op_code, 1709 pinstance->ldn.hcam->notification_type, 1710 pinstance->ldn.hcam->notification_lost, 1711 pinstance->ldn.hcam->flags, 1712 pinstance->ldn.hcam->overlay_id); 1713 1714 /* log only the errors, no need to log informational log entries */ 1715 if (pinstance->ldn.hcam->notification_type != 1716 NOTIFICATION_TYPE_ERROR_LOG) 1717 return; 1718 1719 if (pinstance->ldn.hcam->notification_lost == 1720 HOSTRCB_NOTIFICATIONS_LOST) 1721 dev_info(&pinstance->pdev->dev, "Error notifications lost\n"); 1722 1723 ioasc = le32_to_cpu(hcam_ldn->error_log.fd_ioasc); 1724 1725 if (ioasc == PMCRAID_IOASC_UA_BUS_WAS_RESET || 1726 ioasc == PMCRAID_IOASC_UA_BUS_WAS_RESET_BY_OTHER) { 1727 dev_info(&pinstance->pdev->dev, 1728 "UnitAttention due to IOA Bus Reset\n"); 1729 scsi_report_bus_reset( 1730 pinstance->host, 1731 RES_BUS(hcam_ldn->error_log.fd_ra)); 1732 } 1733 1734 return; 1735 } 1736 1737 /** 1738 * pmcraid_process_ccn - Op done function for a CCN. 1739 * @cmd: pointer to command struct 1740 * 1741 * This function is the op done function for a configuration 1742 * change notification 1743 * 1744 * Return value: 1745 * none 1746 */ 1747 static void pmcraid_process_ccn(struct pmcraid_cmd *cmd) 1748 { 1749 struct pmcraid_instance *pinstance = cmd->drv_inst; 1750 u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc); 1751 unsigned long lock_flags; 1752 1753 pinstance->ccn.cmd = NULL; 1754 pmcraid_return_cmd(cmd); 1755 1756 /* If driver initiated IOA reset happened while this hcam was pending 1757 * with IOA, or IOA bringdown sequence is in progress, no need to 1758 * re-register the hcam 1759 */ 1760 if (ioasc == PMCRAID_IOASC_IOA_WAS_RESET || 1761 atomic_read(&pinstance->ccn.ignore) == 1) { 1762 return; 1763 } else if (ioasc) { 1764 dev_info(&pinstance->pdev->dev, 1765 "Host RCB (CCN) failed with IOASC: 0x%08X\n", ioasc); 1766 spin_lock_irqsave(pinstance->host->host_lock, lock_flags); 1767 pmcraid_send_hcam(pinstance, PMCRAID_HCAM_CODE_CONFIG_CHANGE); 1768 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); 1769 } else { 1770 pmcraid_handle_config_change(pinstance); 1771 } 1772 } 1773 1774 /** 1775 * pmcraid_process_ldn - op done function for an LDN 1776 * @cmd: pointer to command block 1777 * 1778 * Return value 1779 * none 1780 */ 1781 static void pmcraid_initiate_reset(struct pmcraid_instance *); 1782 static void pmcraid_set_timestamp(struct pmcraid_cmd *cmd); 1783 1784 static void pmcraid_process_ldn(struct pmcraid_cmd *cmd) 1785 { 1786 struct pmcraid_instance *pinstance = cmd->drv_inst; 1787 struct pmcraid_hcam_ldn *ldn_hcam = 1788 (struct pmcraid_hcam_ldn *)pinstance->ldn.hcam; 1789 u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc); 1790 u32 fd_ioasc = le32_to_cpu(ldn_hcam->error_log.fd_ioasc); 1791 unsigned long lock_flags; 1792 1793 /* return the command block back to freepool */ 1794 pinstance->ldn.cmd = NULL; 1795 pmcraid_return_cmd(cmd); 1796 1797 /* If driver initiated IOA reset happened while this hcam was pending 1798 * with IOA, no need to re-register the hcam as reset engine will do it 1799 * once reset sequence is complete 1800 */ 1801 if (ioasc == PMCRAID_IOASC_IOA_WAS_RESET || 1802 atomic_read(&pinstance->ccn.ignore) == 1) { 1803 return; 1804 } else if (!ioasc) { 1805 pmcraid_handle_error_log(pinstance); 1806 if (fd_ioasc == PMCRAID_IOASC_NR_IOA_RESET_REQUIRED) { 1807 spin_lock_irqsave(pinstance->host->host_lock, 1808 lock_flags); 1809 pmcraid_initiate_reset(pinstance); 1810 spin_unlock_irqrestore(pinstance->host->host_lock, 1811 lock_flags); 1812 return; 1813 } 1814 if (fd_ioasc == PMCRAID_IOASC_TIME_STAMP_OUT_OF_SYNC) { 1815 pinstance->timestamp_error = 1; 1816 pmcraid_set_timestamp(cmd); 1817 } 1818 } else { 1819 dev_info(&pinstance->pdev->dev, 1820 "Host RCB(LDN) failed with IOASC: 0x%08X\n", ioasc); 1821 } 1822 /* send netlink message for HCAM notification if enabled */ 1823 if (!pmcraid_disable_aen) 1824 pmcraid_notify_ldn(pinstance); 1825 1826 cmd = pmcraid_init_hcam(pinstance, PMCRAID_HCAM_CODE_LOG_DATA); 1827 if (cmd) 1828 pmcraid_send_hcam_cmd(cmd); 1829 } 1830 1831 /** 1832 * pmcraid_register_hcams - register HCAMs for CCN and LDN 1833 * 1834 * @pinstance: pointer per adapter instance structure 1835 * 1836 * Return Value 1837 * none 1838 */ 1839 static void pmcraid_register_hcams(struct pmcraid_instance *pinstance) 1840 { 1841 pmcraid_send_hcam(pinstance, PMCRAID_HCAM_CODE_CONFIG_CHANGE); 1842 pmcraid_send_hcam(pinstance, PMCRAID_HCAM_CODE_LOG_DATA); 1843 } 1844 1845 /** 1846 * pmcraid_unregister_hcams - cancel HCAMs registered already 1847 * @cmd: pointer to command used as part of reset sequence 1848 */ 1849 static void pmcraid_unregister_hcams(struct pmcraid_cmd *cmd) 1850 { 1851 struct pmcraid_instance *pinstance = cmd->drv_inst; 1852 1853 /* During IOA bringdown, HCAM gets fired and tasklet proceeds with 1854 * handling hcam response though it is not necessary. In order to 1855 * prevent this, set 'ignore', so that bring-down sequence doesn't 1856 * re-send any more hcams 1857 */ 1858 atomic_set(&pinstance->ccn.ignore, 1); 1859 atomic_set(&pinstance->ldn.ignore, 1); 1860 1861 /* If adapter reset was forced as part of runtime reset sequence, 1862 * start the reset sequence. Reset will be triggered even in case 1863 * IOA unit_check. 1864 */ 1865 if ((pinstance->force_ioa_reset && !pinstance->ioa_bringdown) || 1866 pinstance->ioa_unit_check) { 1867 pinstance->force_ioa_reset = 0; 1868 pinstance->ioa_unit_check = 0; 1869 pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT; 1870 pmcraid_reset_alert(cmd); 1871 return; 1872 } 1873 1874 /* Driver tries to cancel HCAMs by sending ABORT TASK for each HCAM 1875 * one after the other. So CCN cancellation will be triggered by 1876 * pmcraid_cancel_ldn itself. 1877 */ 1878 pmcraid_cancel_ldn(cmd); 1879 } 1880 1881 /** 1882 * pmcraid_reset_enable_ioa - re-enable IOA after a hard reset 1883 * @pinstance: pointer to adapter instance structure 1884 * Return Value 1885 * 1 if TRANSITION_TO_OPERATIONAL is active, otherwise 0 1886 */ 1887 static void pmcraid_reinit_buffers(struct pmcraid_instance *); 1888 1889 static int pmcraid_reset_enable_ioa(struct pmcraid_instance *pinstance) 1890 { 1891 u32 intrs; 1892 1893 pmcraid_reinit_buffers(pinstance); 1894 intrs = pmcraid_read_interrupts(pinstance); 1895 1896 pmcraid_enable_interrupts(pinstance, PMCRAID_PCI_INTERRUPTS); 1897 1898 if (intrs & INTRS_TRANSITION_TO_OPERATIONAL) { 1899 if (!pinstance->interrupt_mode) { 1900 iowrite32(INTRS_TRANSITION_TO_OPERATIONAL, 1901 pinstance->int_regs. 1902 ioa_host_interrupt_mask_reg); 1903 iowrite32(INTRS_TRANSITION_TO_OPERATIONAL, 1904 pinstance->int_regs.ioa_host_interrupt_clr_reg); 1905 } 1906 return 1; 1907 } else { 1908 return 0; 1909 } 1910 } 1911 1912 /** 1913 * pmcraid_soft_reset - performs a soft reset and makes IOA become ready 1914 * @cmd : pointer to reset command block 1915 * 1916 * Return Value 1917 * none 1918 */ 1919 static void pmcraid_soft_reset(struct pmcraid_cmd *cmd) 1920 { 1921 struct pmcraid_instance *pinstance = cmd->drv_inst; 1922 u32 int_reg; 1923 u32 doorbell; 1924 1925 /* There will be an interrupt when Transition to Operational bit is 1926 * set so tasklet would execute next reset task. The timeout handler 1927 * would re-initiate a reset 1928 */ 1929 cmd->cmd_done = pmcraid_ioa_reset; 1930 cmd->timer.expires = jiffies + 1931 msecs_to_jiffies(PMCRAID_TRANSOP_TIMEOUT); 1932 cmd->timer.function = pmcraid_timeout_handler; 1933 1934 if (!timer_pending(&cmd->timer)) 1935 add_timer(&cmd->timer); 1936 1937 /* Enable destructive diagnostics on IOA if it is not yet in 1938 * operational state 1939 */ 1940 doorbell = DOORBELL_RUNTIME_RESET | 1941 DOORBELL_ENABLE_DESTRUCTIVE_DIAGS; 1942 1943 /* Since we do RESET_ALERT and Start BIST we have to again write 1944 * MSIX Doorbell to indicate the interrupt mode 1945 */ 1946 if (pinstance->interrupt_mode) { 1947 iowrite32(DOORBELL_INTR_MODE_MSIX, 1948 pinstance->int_regs.host_ioa_interrupt_reg); 1949 ioread32(pinstance->int_regs.host_ioa_interrupt_reg); 1950 } 1951 1952 iowrite32(doorbell, pinstance->int_regs.host_ioa_interrupt_reg); 1953 ioread32(pinstance->int_regs.host_ioa_interrupt_reg), 1954 int_reg = ioread32(pinstance->int_regs.ioa_host_interrupt_reg); 1955 1956 pmcraid_info("Waiting for IOA to become operational %x:%x\n", 1957 ioread32(pinstance->int_regs.host_ioa_interrupt_reg), 1958 int_reg); 1959 } 1960 1961 /** 1962 * pmcraid_get_dump - retrieves IOA dump in case of Unit Check interrupt 1963 * 1964 * @pinstance: pointer to adapter instance structure 1965 * 1966 * Return Value 1967 * none 1968 */ 1969 static void pmcraid_get_dump(struct pmcraid_instance *pinstance) 1970 { 1971 pmcraid_info("%s is not yet implemented\n", __func__); 1972 } 1973 1974 /** 1975 * pmcraid_fail_outstanding_cmds - Fails all outstanding ops. 1976 * @pinstance: pointer to adapter instance structure 1977 * 1978 * This function fails all outstanding ops. If they are submitted to IOA 1979 * already, it sends cancel all messages if IOA is still accepting IOARCBs, 1980 * otherwise just completes the commands and returns the cmd blocks to free 1981 * pool. 1982 * 1983 * Return value: 1984 * none 1985 */ 1986 static void pmcraid_fail_outstanding_cmds(struct pmcraid_instance *pinstance) 1987 { 1988 struct pmcraid_cmd *cmd, *temp; 1989 unsigned long lock_flags; 1990 1991 /* pending command list is protected by pending_pool_lock. Its 1992 * traversal must be done as within this lock 1993 */ 1994 spin_lock_irqsave(&pinstance->pending_pool_lock, lock_flags); 1995 list_for_each_entry_safe(cmd, temp, &pinstance->pending_cmd_pool, 1996 free_list) { 1997 list_del(&cmd->free_list); 1998 spin_unlock_irqrestore(&pinstance->pending_pool_lock, 1999 lock_flags); 2000 cmd->ioa_cb->ioasa.ioasc = 2001 cpu_to_le32(PMCRAID_IOASC_IOA_WAS_RESET); 2002 cmd->ioa_cb->ioasa.ilid = 2003 cpu_to_le32(PMCRAID_DRIVER_ILID); 2004 2005 /* In case the command timer is still running */ 2006 del_timer(&cmd->timer); 2007 2008 /* If this is an IO command, complete it by invoking scsi_done 2009 * function. If this is one of the internal commands other 2010 * than pmcraid_ioa_reset and HCAM commands invoke cmd_done to 2011 * complete it 2012 */ 2013 if (cmd->scsi_cmd) { 2014 2015 struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd; 2016 __le32 resp = cmd->ioa_cb->ioarcb.response_handle; 2017 2018 scsi_cmd->result |= DID_ERROR << 16; 2019 2020 scsi_dma_unmap(scsi_cmd); 2021 pmcraid_return_cmd(cmd); 2022 2023 pmcraid_info("failing(%d) CDB[0] = %x result: %x\n", 2024 le32_to_cpu(resp) >> 2, 2025 cmd->ioa_cb->ioarcb.cdb[0], 2026 scsi_cmd->result); 2027 scsi_cmd->scsi_done(scsi_cmd); 2028 } else if (cmd->cmd_done == pmcraid_internal_done || 2029 cmd->cmd_done == pmcraid_erp_done) { 2030 cmd->cmd_done(cmd); 2031 } else if (cmd->cmd_done != pmcraid_ioa_reset && 2032 cmd->cmd_done != pmcraid_ioa_shutdown_done) { 2033 pmcraid_return_cmd(cmd); 2034 } 2035 2036 atomic_dec(&pinstance->outstanding_cmds); 2037 spin_lock_irqsave(&pinstance->pending_pool_lock, lock_flags); 2038 } 2039 2040 spin_unlock_irqrestore(&pinstance->pending_pool_lock, lock_flags); 2041 } 2042 2043 /** 2044 * pmcraid_ioa_reset - Implementation of IOA reset logic 2045 * 2046 * @cmd: pointer to the cmd block to be used for entire reset process 2047 * 2048 * This function executes most of the steps required for IOA reset. This gets 2049 * called by user threads (modprobe/insmod/rmmod) timer, tasklet and midlayer's 2050 * 'eh_' thread. Access to variables used for controlling the reset sequence is 2051 * synchronized using host lock. Various functions called during reset process 2052 * would make use of a single command block, pointer to which is also stored in 2053 * adapter instance structure. 2054 * 2055 * Return Value 2056 * None 2057 */ 2058 static void pmcraid_ioa_reset(struct pmcraid_cmd *cmd) 2059 { 2060 struct pmcraid_instance *pinstance = cmd->drv_inst; 2061 u8 reset_complete = 0; 2062 2063 pinstance->ioa_reset_in_progress = 1; 2064 2065 if (pinstance->reset_cmd != cmd) { 2066 pmcraid_err("reset is called with different command block\n"); 2067 pinstance->reset_cmd = cmd; 2068 } 2069 2070 pmcraid_info("reset_engine: state = %d, command = %p\n", 2071 pinstance->ioa_state, cmd); 2072 2073 switch (pinstance->ioa_state) { 2074 2075 case IOA_STATE_DEAD: 2076 /* If IOA is offline, whatever may be the reset reason, just 2077 * return. callers might be waiting on the reset wait_q, wake 2078 * up them 2079 */ 2080 pmcraid_err("IOA is offline no reset is possible\n"); 2081 reset_complete = 1; 2082 break; 2083 2084 case IOA_STATE_IN_BRINGDOWN: 2085 /* we enter here, once ioa shutdown command is processed by IOA 2086 * Alert IOA for a possible reset. If reset alert fails, IOA 2087 * goes through hard-reset 2088 */ 2089 pmcraid_disable_interrupts(pinstance, ~0); 2090 pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT; 2091 pmcraid_reset_alert(cmd); 2092 break; 2093 2094 case IOA_STATE_UNKNOWN: 2095 /* We may be called during probe or resume. Some pre-processing 2096 * is required for prior to reset 2097 */ 2098 scsi_block_requests(pinstance->host); 2099 2100 /* If asked to reset while IOA was processing responses or 2101 * there are any error responses then IOA may require 2102 * hard-reset. 2103 */ 2104 if (pinstance->ioa_hard_reset == 0) { 2105 if (ioread32(pinstance->ioa_status) & 2106 INTRS_TRANSITION_TO_OPERATIONAL) { 2107 pmcraid_info("sticky bit set, bring-up\n"); 2108 pinstance->ioa_state = IOA_STATE_IN_BRINGUP; 2109 pmcraid_reinit_cmdblk(cmd); 2110 pmcraid_identify_hrrq(cmd); 2111 } else { 2112 pinstance->ioa_state = IOA_STATE_IN_SOFT_RESET; 2113 pmcraid_soft_reset(cmd); 2114 } 2115 } else { 2116 /* Alert IOA of a possible reset and wait for critical 2117 * operation in progress bit to reset 2118 */ 2119 pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT; 2120 pmcraid_reset_alert(cmd); 2121 } 2122 break; 2123 2124 case IOA_STATE_IN_RESET_ALERT: 2125 /* If critical operation in progress bit is reset or wait gets 2126 * timed out, reset proceeds with starting BIST on the IOA. 2127 * pmcraid_ioa_hard_reset keeps a count of reset attempts. If 2128 * they are 3 or more, reset engine marks IOA dead and returns 2129 */ 2130 pinstance->ioa_state = IOA_STATE_IN_HARD_RESET; 2131 pmcraid_start_bist(cmd); 2132 break; 2133 2134 case IOA_STATE_IN_HARD_RESET: 2135 pinstance->ioa_reset_attempts++; 2136 2137 /* retry reset if we haven't reached maximum allowed limit */ 2138 if (pinstance->ioa_reset_attempts > PMCRAID_RESET_ATTEMPTS) { 2139 pinstance->ioa_reset_attempts = 0; 2140 pmcraid_err("IOA didn't respond marking it as dead\n"); 2141 pinstance->ioa_state = IOA_STATE_DEAD; 2142 2143 if (pinstance->ioa_bringdown) 2144 pmcraid_notify_ioastate(pinstance, 2145 PMC_DEVICE_EVENT_SHUTDOWN_FAILED); 2146 else 2147 pmcraid_notify_ioastate(pinstance, 2148 PMC_DEVICE_EVENT_RESET_FAILED); 2149 reset_complete = 1; 2150 break; 2151 } 2152 2153 /* Once either bist or pci reset is done, restore PCI config 2154 * space. If this fails, proceed with hard reset again 2155 */ 2156 pci_restore_state(pinstance->pdev); 2157 2158 /* fail all pending commands */ 2159 pmcraid_fail_outstanding_cmds(pinstance); 2160 2161 /* check if unit check is active, if so extract dump */ 2162 if (pinstance->ioa_unit_check) { 2163 pmcraid_info("unit check is active\n"); 2164 pinstance->ioa_unit_check = 0; 2165 pmcraid_get_dump(pinstance); 2166 pinstance->ioa_reset_attempts--; 2167 pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT; 2168 pmcraid_reset_alert(cmd); 2169 break; 2170 } 2171 2172 /* if the reset reason is to bring-down the ioa, we might be 2173 * done with the reset restore pci_config_space and complete 2174 * the reset 2175 */ 2176 if (pinstance->ioa_bringdown) { 2177 pmcraid_info("bringing down the adapter\n"); 2178 pinstance->ioa_shutdown_type = SHUTDOWN_NONE; 2179 pinstance->ioa_bringdown = 0; 2180 pinstance->ioa_state = IOA_STATE_UNKNOWN; 2181 pmcraid_notify_ioastate(pinstance, 2182 PMC_DEVICE_EVENT_SHUTDOWN_SUCCESS); 2183 reset_complete = 1; 2184 } else { 2185 /* bring-up IOA, so proceed with soft reset 2186 * Reinitialize hrrq_buffers and their indices also 2187 * enable interrupts after a pci_restore_state 2188 */ 2189 if (pmcraid_reset_enable_ioa(pinstance)) { 2190 pinstance->ioa_state = IOA_STATE_IN_BRINGUP; 2191 pmcraid_info("bringing up the adapter\n"); 2192 pmcraid_reinit_cmdblk(cmd); 2193 pmcraid_identify_hrrq(cmd); 2194 } else { 2195 pinstance->ioa_state = IOA_STATE_IN_SOFT_RESET; 2196 pmcraid_soft_reset(cmd); 2197 } 2198 } 2199 break; 2200 2201 case IOA_STATE_IN_SOFT_RESET: 2202 /* TRANSITION TO OPERATIONAL is on so start initialization 2203 * sequence 2204 */ 2205 pmcraid_info("In softreset proceeding with bring-up\n"); 2206 pinstance->ioa_state = IOA_STATE_IN_BRINGUP; 2207 2208 /* Initialization commands start with HRRQ identification. From 2209 * now on tasklet completes most of the commands as IOA is up 2210 * and intrs are enabled 2211 */ 2212 pmcraid_identify_hrrq(cmd); 2213 break; 2214 2215 case IOA_STATE_IN_BRINGUP: 2216 /* we are done with bringing up of IOA, change the ioa_state to 2217 * operational and wake up any waiters 2218 */ 2219 pinstance->ioa_state = IOA_STATE_OPERATIONAL; 2220 reset_complete = 1; 2221 break; 2222 2223 case IOA_STATE_OPERATIONAL: 2224 default: 2225 /* When IOA is operational and a reset is requested, check for 2226 * the reset reason. If reset is to bring down IOA, unregister 2227 * HCAMs and initiate shutdown; if adapter reset is forced then 2228 * restart reset sequence again 2229 */ 2230 if (pinstance->ioa_shutdown_type == SHUTDOWN_NONE && 2231 pinstance->force_ioa_reset == 0) { 2232 pmcraid_notify_ioastate(pinstance, 2233 PMC_DEVICE_EVENT_RESET_SUCCESS); 2234 reset_complete = 1; 2235 } else { 2236 if (pinstance->ioa_shutdown_type != SHUTDOWN_NONE) 2237 pinstance->ioa_state = IOA_STATE_IN_BRINGDOWN; 2238 pmcraid_reinit_cmdblk(cmd); 2239 pmcraid_unregister_hcams(cmd); 2240 } 2241 break; 2242 } 2243 2244 /* reset will be completed if ioa_state is either DEAD or UNKNOWN or 2245 * OPERATIONAL. Reset all control variables used during reset, wake up 2246 * any waiting threads and let the SCSI mid-layer send commands. Note 2247 * that host_lock must be held before invoking scsi_report_bus_reset. 2248 */ 2249 if (reset_complete) { 2250 pinstance->ioa_reset_in_progress = 0; 2251 pinstance->ioa_reset_attempts = 0; 2252 pinstance->reset_cmd = NULL; 2253 pinstance->ioa_shutdown_type = SHUTDOWN_NONE; 2254 pinstance->ioa_bringdown = 0; 2255 pmcraid_return_cmd(cmd); 2256 2257 /* If target state is to bring up the adapter, proceed with 2258 * hcam registration and resource exposure to mid-layer. 2259 */ 2260 if (pinstance->ioa_state == IOA_STATE_OPERATIONAL) 2261 pmcraid_register_hcams(pinstance); 2262 2263 wake_up_all(&pinstance->reset_wait_q); 2264 } 2265 2266 return; 2267 } 2268 2269 /** 2270 * pmcraid_initiate_reset - initiates reset sequence. This is called from 2271 * ISR/tasklet during error interrupts including IOA unit check. If reset 2272 * is already in progress, it just returns, otherwise initiates IOA reset 2273 * to bring IOA up to operational state. 2274 * 2275 * @pinstance: pointer to adapter instance structure 2276 * 2277 * Return value 2278 * none 2279 */ 2280 static void pmcraid_initiate_reset(struct pmcraid_instance *pinstance) 2281 { 2282 struct pmcraid_cmd *cmd; 2283 2284 /* If the reset is already in progress, just return, otherwise start 2285 * reset sequence and return 2286 */ 2287 if (!pinstance->ioa_reset_in_progress) { 2288 scsi_block_requests(pinstance->host); 2289 cmd = pmcraid_get_free_cmd(pinstance); 2290 2291 if (cmd == NULL) { 2292 pmcraid_err("no cmnd blocks for initiate_reset\n"); 2293 return; 2294 } 2295 2296 pinstance->ioa_shutdown_type = SHUTDOWN_NONE; 2297 pinstance->reset_cmd = cmd; 2298 pinstance->force_ioa_reset = 1; 2299 pmcraid_notify_ioastate(pinstance, 2300 PMC_DEVICE_EVENT_RESET_START); 2301 pmcraid_ioa_reset(cmd); 2302 } 2303 } 2304 2305 /** 2306 * pmcraid_reset_reload - utility routine for doing IOA reset either to bringup 2307 * or bringdown IOA 2308 * @pinstance: pointer adapter instance structure 2309 * @shutdown_type: shutdown type to be used NONE, NORMAL or ABRREV 2310 * @target_state: expected target state after reset 2311 * 2312 * Note: This command initiates reset and waits for its completion. Hence this 2313 * should not be called from isr/timer/tasklet functions (timeout handlers, 2314 * error response handlers and interrupt handlers). 2315 * 2316 * Return Value 2317 * 1 in case ioa_state is not target_state, 0 otherwise. 2318 */ 2319 static int pmcraid_reset_reload( 2320 struct pmcraid_instance *pinstance, 2321 u8 shutdown_type, 2322 u8 target_state 2323 ) 2324 { 2325 struct pmcraid_cmd *reset_cmd = NULL; 2326 unsigned long lock_flags; 2327 int reset = 1; 2328 2329 spin_lock_irqsave(pinstance->host->host_lock, lock_flags); 2330 2331 if (pinstance->ioa_reset_in_progress) { 2332 pmcraid_info("reset_reload: reset is already in progress\n"); 2333 2334 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); 2335 2336 wait_event(pinstance->reset_wait_q, 2337 !pinstance->ioa_reset_in_progress); 2338 2339 spin_lock_irqsave(pinstance->host->host_lock, lock_flags); 2340 2341 if (pinstance->ioa_state == IOA_STATE_DEAD) { 2342 pmcraid_info("reset_reload: IOA is dead\n"); 2343 goto out_unlock; 2344 } 2345 2346 if (pinstance->ioa_state == target_state) { 2347 reset = 0; 2348 goto out_unlock; 2349 } 2350 } 2351 2352 pmcraid_info("reset_reload: proceeding with reset\n"); 2353 scsi_block_requests(pinstance->host); 2354 reset_cmd = pmcraid_get_free_cmd(pinstance); 2355 if (reset_cmd == NULL) { 2356 pmcraid_err("no free cmnd for reset_reload\n"); 2357 goto out_unlock; 2358 } 2359 2360 if (shutdown_type == SHUTDOWN_NORMAL) 2361 pinstance->ioa_bringdown = 1; 2362 2363 pinstance->ioa_shutdown_type = shutdown_type; 2364 pinstance->reset_cmd = reset_cmd; 2365 pinstance->force_ioa_reset = reset; 2366 pmcraid_info("reset_reload: initiating reset\n"); 2367 pmcraid_ioa_reset(reset_cmd); 2368 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); 2369 pmcraid_info("reset_reload: waiting for reset to complete\n"); 2370 wait_event(pinstance->reset_wait_q, 2371 !pinstance->ioa_reset_in_progress); 2372 2373 pmcraid_info("reset_reload: reset is complete !!\n"); 2374 scsi_unblock_requests(pinstance->host); 2375 return pinstance->ioa_state != target_state; 2376 2377 out_unlock: 2378 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); 2379 return reset; 2380 } 2381 2382 /** 2383 * pmcraid_reset_bringdown - wrapper over pmcraid_reset_reload to bringdown IOA 2384 * 2385 * @pinstance: pointer to adapter instance structure 2386 * 2387 * Return Value 2388 * whatever is returned from pmcraid_reset_reload 2389 */ 2390 static int pmcraid_reset_bringdown(struct pmcraid_instance *pinstance) 2391 { 2392 return pmcraid_reset_reload(pinstance, 2393 SHUTDOWN_NORMAL, 2394 IOA_STATE_UNKNOWN); 2395 } 2396 2397 /** 2398 * pmcraid_reset_bringup - wrapper over pmcraid_reset_reload to bring up IOA 2399 * 2400 * @pinstance: pointer to adapter instance structure 2401 * 2402 * Return Value 2403 * whatever is returned from pmcraid_reset_reload 2404 */ 2405 static int pmcraid_reset_bringup(struct pmcraid_instance *pinstance) 2406 { 2407 pmcraid_notify_ioastate(pinstance, PMC_DEVICE_EVENT_RESET_START); 2408 2409 return pmcraid_reset_reload(pinstance, 2410 SHUTDOWN_NONE, 2411 IOA_STATE_OPERATIONAL); 2412 } 2413 2414 /** 2415 * pmcraid_request_sense - Send request sense to a device 2416 * @cmd: pmcraid command struct 2417 * 2418 * This function sends a request sense to a device as a result of a check 2419 * condition. This method re-uses the same command block that failed earlier. 2420 */ 2421 static void pmcraid_request_sense(struct pmcraid_cmd *cmd) 2422 { 2423 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb; 2424 struct pmcraid_ioadl_desc *ioadl = ioarcb->add_data.u.ioadl; 2425 struct device *dev = &cmd->drv_inst->pdev->dev; 2426 2427 cmd->sense_buffer = cmd->scsi_cmd->sense_buffer; 2428 cmd->sense_buffer_dma = dma_map_single(dev, cmd->sense_buffer, 2429 SCSI_SENSE_BUFFERSIZE, DMA_FROM_DEVICE); 2430 if (dma_mapping_error(dev, cmd->sense_buffer_dma)) { 2431 pmcraid_err 2432 ("couldn't allocate sense buffer for request sense\n"); 2433 pmcraid_erp_done(cmd); 2434 return; 2435 } 2436 2437 /* re-use the command block */ 2438 memset(&cmd->ioa_cb->ioasa, 0, sizeof(struct pmcraid_ioasa)); 2439 memset(ioarcb->cdb, 0, PMCRAID_MAX_CDB_LEN); 2440 ioarcb->request_flags0 = (SYNC_COMPLETE | 2441 NO_LINK_DESCS | 2442 INHIBIT_UL_CHECK); 2443 ioarcb->request_type = REQ_TYPE_SCSI; 2444 ioarcb->cdb[0] = REQUEST_SENSE; 2445 ioarcb->cdb[4] = SCSI_SENSE_BUFFERSIZE; 2446 2447 ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) + 2448 offsetof(struct pmcraid_ioarcb, 2449 add_data.u.ioadl[0])); 2450 ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc)); 2451 2452 ioarcb->data_transfer_length = cpu_to_le32(SCSI_SENSE_BUFFERSIZE); 2453 2454 ioadl->address = cpu_to_le64(cmd->sense_buffer_dma); 2455 ioadl->data_len = cpu_to_le32(SCSI_SENSE_BUFFERSIZE); 2456 ioadl->flags = IOADL_FLAGS_LAST_DESC; 2457 2458 /* request sense might be called as part of error response processing 2459 * which runs in tasklets context. It is possible that mid-layer might 2460 * schedule queuecommand during this time, hence, writting to IOARRIN 2461 * must be protect by host_lock 2462 */ 2463 pmcraid_send_cmd(cmd, pmcraid_erp_done, 2464 PMCRAID_REQUEST_SENSE_TIMEOUT, 2465 pmcraid_timeout_handler); 2466 } 2467 2468 /** 2469 * pmcraid_cancel_all - cancel all outstanding IOARCBs as part of error recovery 2470 * @cmd: command that failed 2471 * @need_sense: true if request_sense is required after cancel all 2472 * 2473 * This function sends a cancel all to a device to clear the queue. 2474 */ 2475 static void pmcraid_cancel_all(struct pmcraid_cmd *cmd, bool need_sense) 2476 { 2477 struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd; 2478 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb; 2479 struct pmcraid_resource_entry *res = scsi_cmd->device->hostdata; 2480 2481 memset(ioarcb->cdb, 0, PMCRAID_MAX_CDB_LEN); 2482 ioarcb->request_flags0 = SYNC_OVERRIDE; 2483 ioarcb->request_type = REQ_TYPE_IOACMD; 2484 ioarcb->cdb[0] = PMCRAID_CANCEL_ALL_REQUESTS; 2485 2486 if (RES_IS_GSCSI(res->cfg_entry)) 2487 ioarcb->cdb[1] = PMCRAID_SYNC_COMPLETE_AFTER_CANCEL; 2488 2489 ioarcb->ioadl_bus_addr = 0; 2490 ioarcb->ioadl_length = 0; 2491 ioarcb->data_transfer_length = 0; 2492 ioarcb->ioarcb_bus_addr &= cpu_to_le64((~0x1FULL)); 2493 2494 /* writing to IOARRIN must be protected by host_lock, as mid-layer 2495 * schedule queuecommand while we are doing this 2496 */ 2497 pmcraid_send_cmd(cmd, need_sense ? 2498 pmcraid_erp_done : pmcraid_request_sense, 2499 PMCRAID_REQUEST_SENSE_TIMEOUT, 2500 pmcraid_timeout_handler); 2501 } 2502 2503 /** 2504 * pmcraid_frame_auto_sense: frame fixed format sense information 2505 * 2506 * @cmd: pointer to failing command block 2507 * 2508 * Return value 2509 * none 2510 */ 2511 static void pmcraid_frame_auto_sense(struct pmcraid_cmd *cmd) 2512 { 2513 u8 *sense_buf = cmd->scsi_cmd->sense_buffer; 2514 struct pmcraid_resource_entry *res = cmd->scsi_cmd->device->hostdata; 2515 struct pmcraid_ioasa *ioasa = &cmd->ioa_cb->ioasa; 2516 u32 ioasc = le32_to_cpu(ioasa->ioasc); 2517 u32 failing_lba = 0; 2518 2519 memset(sense_buf, 0, SCSI_SENSE_BUFFERSIZE); 2520 cmd->scsi_cmd->result = SAM_STAT_CHECK_CONDITION; 2521 2522 if (RES_IS_VSET(res->cfg_entry) && 2523 ioasc == PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC && 2524 ioasa->u.vset.failing_lba_hi != 0) { 2525 2526 sense_buf[0] = 0x72; 2527 sense_buf[1] = PMCRAID_IOASC_SENSE_KEY(ioasc); 2528 sense_buf[2] = PMCRAID_IOASC_SENSE_CODE(ioasc); 2529 sense_buf[3] = PMCRAID_IOASC_SENSE_QUAL(ioasc); 2530 2531 sense_buf[7] = 12; 2532 sense_buf[8] = 0; 2533 sense_buf[9] = 0x0A; 2534 sense_buf[10] = 0x80; 2535 2536 failing_lba = le32_to_cpu(ioasa->u.vset.failing_lba_hi); 2537 2538 sense_buf[12] = (failing_lba & 0xff000000) >> 24; 2539 sense_buf[13] = (failing_lba & 0x00ff0000) >> 16; 2540 sense_buf[14] = (failing_lba & 0x0000ff00) >> 8; 2541 sense_buf[15] = failing_lba & 0x000000ff; 2542 2543 failing_lba = le32_to_cpu(ioasa->u.vset.failing_lba_lo); 2544 2545 sense_buf[16] = (failing_lba & 0xff000000) >> 24; 2546 sense_buf[17] = (failing_lba & 0x00ff0000) >> 16; 2547 sense_buf[18] = (failing_lba & 0x0000ff00) >> 8; 2548 sense_buf[19] = failing_lba & 0x000000ff; 2549 } else { 2550 sense_buf[0] = 0x70; 2551 sense_buf[2] = PMCRAID_IOASC_SENSE_KEY(ioasc); 2552 sense_buf[12] = PMCRAID_IOASC_SENSE_CODE(ioasc); 2553 sense_buf[13] = PMCRAID_IOASC_SENSE_QUAL(ioasc); 2554 2555 if (ioasc == PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC) { 2556 if (RES_IS_VSET(res->cfg_entry)) 2557 failing_lba = 2558 le32_to_cpu(ioasa->u. 2559 vset.failing_lba_lo); 2560 sense_buf[0] |= 0x80; 2561 sense_buf[3] = (failing_lba >> 24) & 0xff; 2562 sense_buf[4] = (failing_lba >> 16) & 0xff; 2563 sense_buf[5] = (failing_lba >> 8) & 0xff; 2564 sense_buf[6] = failing_lba & 0xff; 2565 } 2566 2567 sense_buf[7] = 6; /* additional length */ 2568 } 2569 } 2570 2571 /** 2572 * pmcraid_error_handler - Error response handlers for a SCSI op 2573 * @cmd: pointer to pmcraid_cmd that has failed 2574 * 2575 * This function determines whether or not to initiate ERP on the affected 2576 * device. This is called from a tasklet, which doesn't hold any locks. 2577 * 2578 * Return value: 2579 * 0 it caller can complete the request, otherwise 1 where in error 2580 * handler itself completes the request and returns the command block 2581 * back to free-pool 2582 */ 2583 static int pmcraid_error_handler(struct pmcraid_cmd *cmd) 2584 { 2585 struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd; 2586 struct pmcraid_resource_entry *res = scsi_cmd->device->hostdata; 2587 struct pmcraid_instance *pinstance = cmd->drv_inst; 2588 struct pmcraid_ioasa *ioasa = &cmd->ioa_cb->ioasa; 2589 u32 ioasc = le32_to_cpu(ioasa->ioasc); 2590 u32 masked_ioasc = ioasc & PMCRAID_IOASC_SENSE_MASK; 2591 bool sense_copied = false; 2592 2593 if (!res) { 2594 pmcraid_info("resource pointer is NULL\n"); 2595 return 0; 2596 } 2597 2598 /* If this was a SCSI read/write command keep count of errors */ 2599 if (SCSI_CMD_TYPE(scsi_cmd->cmnd[0]) == SCSI_READ_CMD) 2600 atomic_inc(&res->read_failures); 2601 else if (SCSI_CMD_TYPE(scsi_cmd->cmnd[0]) == SCSI_WRITE_CMD) 2602 atomic_inc(&res->write_failures); 2603 2604 if (!RES_IS_GSCSI(res->cfg_entry) && 2605 masked_ioasc != PMCRAID_IOASC_HW_DEVICE_BUS_STATUS_ERROR) { 2606 pmcraid_frame_auto_sense(cmd); 2607 } 2608 2609 /* Log IOASC/IOASA information based on user settings */ 2610 pmcraid_ioasc_logger(ioasc, cmd); 2611 2612 switch (masked_ioasc) { 2613 2614 case PMCRAID_IOASC_AC_TERMINATED_BY_HOST: 2615 scsi_cmd->result |= (DID_ABORT << 16); 2616 break; 2617 2618 case PMCRAID_IOASC_IR_INVALID_RESOURCE_HANDLE: 2619 case PMCRAID_IOASC_HW_CANNOT_COMMUNICATE: 2620 scsi_cmd->result |= (DID_NO_CONNECT << 16); 2621 break; 2622 2623 case PMCRAID_IOASC_NR_SYNC_REQUIRED: 2624 res->sync_reqd = 1; 2625 scsi_cmd->result |= (DID_IMM_RETRY << 16); 2626 break; 2627 2628 case PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC: 2629 scsi_cmd->result |= (DID_PASSTHROUGH << 16); 2630 break; 2631 2632 case PMCRAID_IOASC_UA_BUS_WAS_RESET: 2633 case PMCRAID_IOASC_UA_BUS_WAS_RESET_BY_OTHER: 2634 if (!res->reset_progress) 2635 scsi_report_bus_reset(pinstance->host, 2636 scsi_cmd->device->channel); 2637 scsi_cmd->result |= (DID_ERROR << 16); 2638 break; 2639 2640 case PMCRAID_IOASC_HW_DEVICE_BUS_STATUS_ERROR: 2641 scsi_cmd->result |= PMCRAID_IOASC_SENSE_STATUS(ioasc); 2642 res->sync_reqd = 1; 2643 2644 /* if check_condition is not active return with error otherwise 2645 * get/frame the sense buffer 2646 */ 2647 if (PMCRAID_IOASC_SENSE_STATUS(ioasc) != 2648 SAM_STAT_CHECK_CONDITION && 2649 PMCRAID_IOASC_SENSE_STATUS(ioasc) != SAM_STAT_ACA_ACTIVE) 2650 return 0; 2651 2652 /* If we have auto sense data as part of IOASA pass it to 2653 * mid-layer 2654 */ 2655 if (ioasa->auto_sense_length != 0) { 2656 short sense_len = le16_to_cpu(ioasa->auto_sense_length); 2657 int data_size = min_t(u16, sense_len, 2658 SCSI_SENSE_BUFFERSIZE); 2659 2660 memcpy(scsi_cmd->sense_buffer, 2661 ioasa->sense_data, 2662 data_size); 2663 sense_copied = true; 2664 } 2665 2666 if (RES_IS_GSCSI(res->cfg_entry)) 2667 pmcraid_cancel_all(cmd, sense_copied); 2668 else if (sense_copied) 2669 pmcraid_erp_done(cmd); 2670 else 2671 pmcraid_request_sense(cmd); 2672 2673 return 1; 2674 2675 case PMCRAID_IOASC_NR_INIT_CMD_REQUIRED: 2676 break; 2677 2678 default: 2679 if (PMCRAID_IOASC_SENSE_KEY(ioasc) > RECOVERED_ERROR) 2680 scsi_cmd->result |= (DID_ERROR << 16); 2681 break; 2682 } 2683 return 0; 2684 } 2685 2686 /** 2687 * pmcraid_reset_device - device reset handler functions 2688 * 2689 * @scsi_cmd: scsi command struct 2690 * @modifier: reset modifier indicating the reset sequence to be performed 2691 * 2692 * This function issues a device reset to the affected device. 2693 * A LUN reset will be sent to the device first. If that does 2694 * not work, a target reset will be sent. 2695 * 2696 * Return value: 2697 * SUCCESS / FAILED 2698 */ 2699 static int pmcraid_reset_device( 2700 struct scsi_cmnd *scsi_cmd, 2701 unsigned long timeout, 2702 u8 modifier 2703 ) 2704 { 2705 struct pmcraid_cmd *cmd; 2706 struct pmcraid_instance *pinstance; 2707 struct pmcraid_resource_entry *res; 2708 struct pmcraid_ioarcb *ioarcb; 2709 unsigned long lock_flags; 2710 u32 ioasc; 2711 2712 pinstance = 2713 (struct pmcraid_instance *)scsi_cmd->device->host->hostdata; 2714 res = scsi_cmd->device->hostdata; 2715 2716 if (!res) { 2717 sdev_printk(KERN_ERR, scsi_cmd->device, 2718 "reset_device: NULL resource pointer\n"); 2719 return FAILED; 2720 } 2721 2722 /* If adapter is currently going through reset/reload, return failed. 2723 * This will force the mid-layer to call _eh_bus/host reset, which 2724 * will then go to sleep and wait for the reset to complete 2725 */ 2726 spin_lock_irqsave(pinstance->host->host_lock, lock_flags); 2727 if (pinstance->ioa_reset_in_progress || 2728 pinstance->ioa_state == IOA_STATE_DEAD) { 2729 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); 2730 return FAILED; 2731 } 2732 2733 res->reset_progress = 1; 2734 pmcraid_info("Resetting %s resource with addr %x\n", 2735 ((modifier & RESET_DEVICE_LUN) ? "LUN" : 2736 ((modifier & RESET_DEVICE_TARGET) ? "TARGET" : "BUS")), 2737 le32_to_cpu(res->cfg_entry.resource_address)); 2738 2739 /* get a free cmd block */ 2740 cmd = pmcraid_get_free_cmd(pinstance); 2741 2742 if (cmd == NULL) { 2743 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); 2744 pmcraid_err("%s: no cmd blocks are available\n", __func__); 2745 return FAILED; 2746 } 2747 2748 ioarcb = &cmd->ioa_cb->ioarcb; 2749 ioarcb->resource_handle = res->cfg_entry.resource_handle; 2750 ioarcb->request_type = REQ_TYPE_IOACMD; 2751 ioarcb->cdb[0] = PMCRAID_RESET_DEVICE; 2752 2753 /* Initialize reset modifier bits */ 2754 if (modifier) 2755 modifier = ENABLE_RESET_MODIFIER | modifier; 2756 2757 ioarcb->cdb[1] = modifier; 2758 2759 init_completion(&cmd->wait_for_completion); 2760 cmd->completion_req = 1; 2761 2762 pmcraid_info("cmd(CDB[0] = %x) for %x with index = %d\n", 2763 cmd->ioa_cb->ioarcb.cdb[0], 2764 le32_to_cpu(cmd->ioa_cb->ioarcb.resource_handle), 2765 le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2); 2766 2767 pmcraid_send_cmd(cmd, 2768 pmcraid_internal_done, 2769 timeout, 2770 pmcraid_timeout_handler); 2771 2772 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); 2773 2774 /* RESET_DEVICE command completes after all pending IOARCBs are 2775 * completed. Once this command is completed, pmcraind_internal_done 2776 * will wake up the 'completion' queue. 2777 */ 2778 wait_for_completion(&cmd->wait_for_completion); 2779 2780 /* complete the command here itself and return the command block 2781 * to free list 2782 */ 2783 pmcraid_return_cmd(cmd); 2784 res->reset_progress = 0; 2785 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc); 2786 2787 /* set the return value based on the returned ioasc */ 2788 return PMCRAID_IOASC_SENSE_KEY(ioasc) ? FAILED : SUCCESS; 2789 } 2790 2791 /** 2792 * _pmcraid_io_done - helper for pmcraid_io_done function 2793 * 2794 * @cmd: pointer to pmcraid command struct 2795 * @reslen: residual data length to be set in the ioasa 2796 * @ioasc: ioasc either returned by IOA or set by driver itself. 2797 * 2798 * This function is invoked by pmcraid_io_done to complete mid-layer 2799 * scsi ops. 2800 * 2801 * Return value: 2802 * 0 if caller is required to return it to free_pool. Returns 1 if 2803 * caller need not worry about freeing command block as error handler 2804 * will take care of that. 2805 */ 2806 2807 static int _pmcraid_io_done(struct pmcraid_cmd *cmd, int reslen, int ioasc) 2808 { 2809 struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd; 2810 int rc = 0; 2811 2812 scsi_set_resid(scsi_cmd, reslen); 2813 2814 pmcraid_info("response(%d) CDB[0] = %x ioasc:result: %x:%x\n", 2815 le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2, 2816 cmd->ioa_cb->ioarcb.cdb[0], 2817 ioasc, scsi_cmd->result); 2818 2819 if (PMCRAID_IOASC_SENSE_KEY(ioasc) != 0) 2820 rc = pmcraid_error_handler(cmd); 2821 2822 if (rc == 0) { 2823 scsi_dma_unmap(scsi_cmd); 2824 scsi_cmd->scsi_done(scsi_cmd); 2825 } 2826 2827 return rc; 2828 } 2829 2830 /** 2831 * pmcraid_io_done - SCSI completion function 2832 * 2833 * @cmd: pointer to pmcraid command struct 2834 * 2835 * This function is invoked by tasklet/mid-layer error handler to completing 2836 * the SCSI ops sent from mid-layer. 2837 * 2838 * Return value 2839 * none 2840 */ 2841 2842 static void pmcraid_io_done(struct pmcraid_cmd *cmd) 2843 { 2844 u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc); 2845 u32 reslen = le32_to_cpu(cmd->ioa_cb->ioasa.residual_data_length); 2846 2847 if (_pmcraid_io_done(cmd, reslen, ioasc) == 0) 2848 pmcraid_return_cmd(cmd); 2849 } 2850 2851 /** 2852 * pmcraid_abort_cmd - Aborts a single IOARCB already submitted to IOA 2853 * 2854 * @cmd: command block of the command to be aborted 2855 * 2856 * Return Value: 2857 * returns pointer to command structure used as cancelling cmd 2858 */ 2859 static struct pmcraid_cmd *pmcraid_abort_cmd(struct pmcraid_cmd *cmd) 2860 { 2861 struct pmcraid_cmd *cancel_cmd; 2862 struct pmcraid_instance *pinstance; 2863 struct pmcraid_resource_entry *res; 2864 2865 pinstance = (struct pmcraid_instance *)cmd->drv_inst; 2866 res = cmd->scsi_cmd->device->hostdata; 2867 2868 cancel_cmd = pmcraid_get_free_cmd(pinstance); 2869 2870 if (cancel_cmd == NULL) { 2871 pmcraid_err("%s: no cmd blocks are available\n", __func__); 2872 return NULL; 2873 } 2874 2875 pmcraid_prepare_cancel_cmd(cancel_cmd, cmd); 2876 2877 pmcraid_info("aborting command CDB[0]= %x with index = %d\n", 2878 cmd->ioa_cb->ioarcb.cdb[0], 2879 le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2); 2880 2881 init_completion(&cancel_cmd->wait_for_completion); 2882 cancel_cmd->completion_req = 1; 2883 2884 pmcraid_info("command (%d) CDB[0] = %x for %x\n", 2885 le32_to_cpu(cancel_cmd->ioa_cb->ioarcb.response_handle) >> 2, 2886 cancel_cmd->ioa_cb->ioarcb.cdb[0], 2887 le32_to_cpu(cancel_cmd->ioa_cb->ioarcb.resource_handle)); 2888 2889 pmcraid_send_cmd(cancel_cmd, 2890 pmcraid_internal_done, 2891 PMCRAID_INTERNAL_TIMEOUT, 2892 pmcraid_timeout_handler); 2893 return cancel_cmd; 2894 } 2895 2896 /** 2897 * pmcraid_abort_complete - Waits for ABORT TASK completion 2898 * 2899 * @cancel_cmd: command block use as cancelling command 2900 * 2901 * Return Value: 2902 * returns SUCCESS if ABORT TASK has good completion 2903 * otherwise FAILED 2904 */ 2905 static int pmcraid_abort_complete(struct pmcraid_cmd *cancel_cmd) 2906 { 2907 struct pmcraid_resource_entry *res; 2908 u32 ioasc; 2909 2910 wait_for_completion(&cancel_cmd->wait_for_completion); 2911 res = cancel_cmd->res; 2912 cancel_cmd->res = NULL; 2913 ioasc = le32_to_cpu(cancel_cmd->ioa_cb->ioasa.ioasc); 2914 2915 /* If the abort task is not timed out we will get a Good completion 2916 * as sense_key, otherwise we may get one the following responses 2917 * due to subsequent bus reset or device reset. In case IOASC is 2918 * NR_SYNC_REQUIRED, set sync_reqd flag for the corresponding resource 2919 */ 2920 if (ioasc == PMCRAID_IOASC_UA_BUS_WAS_RESET || 2921 ioasc == PMCRAID_IOASC_NR_SYNC_REQUIRED) { 2922 if (ioasc == PMCRAID_IOASC_NR_SYNC_REQUIRED) 2923 res->sync_reqd = 1; 2924 ioasc = 0; 2925 } 2926 2927 /* complete the command here itself */ 2928 pmcraid_return_cmd(cancel_cmd); 2929 return PMCRAID_IOASC_SENSE_KEY(ioasc) ? FAILED : SUCCESS; 2930 } 2931 2932 /** 2933 * pmcraid_eh_abort_handler - entry point for aborting a single task on errors 2934 * 2935 * @scsi_cmd: scsi command struct given by mid-layer. When this is called 2936 * mid-layer ensures that no other commands are queued. This 2937 * never gets called under interrupt, but a separate eh thread. 2938 * 2939 * Return value: 2940 * SUCCESS / FAILED 2941 */ 2942 static int pmcraid_eh_abort_handler(struct scsi_cmnd *scsi_cmd) 2943 { 2944 struct pmcraid_instance *pinstance; 2945 struct pmcraid_cmd *cmd; 2946 struct pmcraid_resource_entry *res; 2947 unsigned long host_lock_flags; 2948 unsigned long pending_lock_flags; 2949 struct pmcraid_cmd *cancel_cmd = NULL; 2950 int cmd_found = 0; 2951 int rc = FAILED; 2952 2953 pinstance = 2954 (struct pmcraid_instance *)scsi_cmd->device->host->hostdata; 2955 2956 scmd_printk(KERN_INFO, scsi_cmd, 2957 "I/O command timed out, aborting it.\n"); 2958 2959 res = scsi_cmd->device->hostdata; 2960 2961 if (res == NULL) 2962 return rc; 2963 2964 /* If we are currently going through reset/reload, return failed. 2965 * This will force the mid-layer to eventually call 2966 * pmcraid_eh_host_reset which will then go to sleep and wait for the 2967 * reset to complete 2968 */ 2969 spin_lock_irqsave(pinstance->host->host_lock, host_lock_flags); 2970 2971 if (pinstance->ioa_reset_in_progress || 2972 pinstance->ioa_state == IOA_STATE_DEAD) { 2973 spin_unlock_irqrestore(pinstance->host->host_lock, 2974 host_lock_flags); 2975 return rc; 2976 } 2977 2978 /* loop over pending cmd list to find cmd corresponding to this 2979 * scsi_cmd. Note that this command might not have been completed 2980 * already. locking: all pending commands are protected with 2981 * pending_pool_lock. 2982 */ 2983 spin_lock_irqsave(&pinstance->pending_pool_lock, pending_lock_flags); 2984 list_for_each_entry(cmd, &pinstance->pending_cmd_pool, free_list) { 2985 2986 if (cmd->scsi_cmd == scsi_cmd) { 2987 cmd_found = 1; 2988 break; 2989 } 2990 } 2991 2992 spin_unlock_irqrestore(&pinstance->pending_pool_lock, 2993 pending_lock_flags); 2994 2995 /* If the command to be aborted was given to IOA and still pending with 2996 * it, send ABORT_TASK to abort this and wait for its completion 2997 */ 2998 if (cmd_found) 2999 cancel_cmd = pmcraid_abort_cmd(cmd); 3000 3001 spin_unlock_irqrestore(pinstance->host->host_lock, 3002 host_lock_flags); 3003 3004 if (cancel_cmd) { 3005 cancel_cmd->res = cmd->scsi_cmd->device->hostdata; 3006 rc = pmcraid_abort_complete(cancel_cmd); 3007 } 3008 3009 return cmd_found ? rc : SUCCESS; 3010 } 3011 3012 /** 3013 * pmcraid_eh_xxxx_reset_handler - bus/target/device reset handler callbacks 3014 * 3015 * @scmd: pointer to scsi_cmd that was sent to the resource to be reset. 3016 * 3017 * All these routines invokve pmcraid_reset_device with appropriate parameters. 3018 * Since these are called from mid-layer EH thread, no other IO will be queued 3019 * to the resource being reset. However, control path (IOCTL) may be active so 3020 * it is necessary to synchronize IOARRIN writes which pmcraid_reset_device 3021 * takes care by locking/unlocking host_lock. 3022 * 3023 * Return value 3024 * SUCCESS or FAILED 3025 */ 3026 static int pmcraid_eh_device_reset_handler(struct scsi_cmnd *scmd) 3027 { 3028 scmd_printk(KERN_INFO, scmd, 3029 "resetting device due to an I/O command timeout.\n"); 3030 return pmcraid_reset_device(scmd, 3031 PMCRAID_INTERNAL_TIMEOUT, 3032 RESET_DEVICE_LUN); 3033 } 3034 3035 static int pmcraid_eh_bus_reset_handler(struct scsi_cmnd *scmd) 3036 { 3037 scmd_printk(KERN_INFO, scmd, 3038 "Doing bus reset due to an I/O command timeout.\n"); 3039 return pmcraid_reset_device(scmd, 3040 PMCRAID_RESET_BUS_TIMEOUT, 3041 RESET_DEVICE_BUS); 3042 } 3043 3044 static int pmcraid_eh_target_reset_handler(struct scsi_cmnd *scmd) 3045 { 3046 scmd_printk(KERN_INFO, scmd, 3047 "Doing target reset due to an I/O command timeout.\n"); 3048 return pmcraid_reset_device(scmd, 3049 PMCRAID_INTERNAL_TIMEOUT, 3050 RESET_DEVICE_TARGET); 3051 } 3052 3053 /** 3054 * pmcraid_eh_host_reset_handler - adapter reset handler callback 3055 * 3056 * @scmd: pointer to scsi_cmd that was sent to a resource of adapter 3057 * 3058 * Initiates adapter reset to bring it up to operational state 3059 * 3060 * Return value 3061 * SUCCESS or FAILED 3062 */ 3063 static int pmcraid_eh_host_reset_handler(struct scsi_cmnd *scmd) 3064 { 3065 unsigned long interval = 10000; /* 10 seconds interval */ 3066 int waits = jiffies_to_msecs(PMCRAID_RESET_HOST_TIMEOUT) / interval; 3067 struct pmcraid_instance *pinstance = 3068 (struct pmcraid_instance *)(scmd->device->host->hostdata); 3069 3070 3071 /* wait for an additional 150 seconds just in case firmware could come 3072 * up and if it could complete all the pending commands excluding the 3073 * two HCAM (CCN and LDN). 3074 */ 3075 while (waits--) { 3076 if (atomic_read(&pinstance->outstanding_cmds) <= 3077 PMCRAID_MAX_HCAM_CMD) 3078 return SUCCESS; 3079 msleep(interval); 3080 } 3081 3082 dev_err(&pinstance->pdev->dev, 3083 "Adapter being reset due to an I/O command timeout.\n"); 3084 return pmcraid_reset_bringup(pinstance) == 0 ? SUCCESS : FAILED; 3085 } 3086 3087 /** 3088 * pmcraid_init_ioadls - initializes IOADL related fields in IOARCB 3089 * @cmd: pmcraid command struct 3090 * @sgcount: count of scatter-gather elements 3091 * 3092 * Return value 3093 * returns pointer pmcraid_ioadl_desc, initialized to point to internal 3094 * or external IOADLs 3095 */ 3096 static struct pmcraid_ioadl_desc * 3097 pmcraid_init_ioadls(struct pmcraid_cmd *cmd, int sgcount) 3098 { 3099 struct pmcraid_ioadl_desc *ioadl; 3100 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb; 3101 int ioadl_count = 0; 3102 3103 if (ioarcb->add_cmd_param_length) 3104 ioadl_count = DIV_ROUND_UP(le16_to_cpu(ioarcb->add_cmd_param_length), 16); 3105 ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc) * sgcount); 3106 3107 if ((sgcount + ioadl_count) > (ARRAY_SIZE(ioarcb->add_data.u.ioadl))) { 3108 /* external ioadls start at offset 0x80 from control_block 3109 * structure, re-using 24 out of 27 ioadls part of IOARCB. 3110 * It is necessary to indicate to firmware that driver is 3111 * using ioadls to be treated as external to IOARCB. 3112 */ 3113 ioarcb->ioarcb_bus_addr &= cpu_to_le64(~(0x1FULL)); 3114 ioarcb->ioadl_bus_addr = 3115 cpu_to_le64((cmd->ioa_cb_bus_addr) + 3116 offsetof(struct pmcraid_ioarcb, 3117 add_data.u.ioadl[3])); 3118 ioadl = &ioarcb->add_data.u.ioadl[3]; 3119 } else { 3120 ioarcb->ioadl_bus_addr = 3121 cpu_to_le64((cmd->ioa_cb_bus_addr) + 3122 offsetof(struct pmcraid_ioarcb, 3123 add_data.u.ioadl[ioadl_count])); 3124 3125 ioadl = &ioarcb->add_data.u.ioadl[ioadl_count]; 3126 ioarcb->ioarcb_bus_addr |= 3127 cpu_to_le64(DIV_ROUND_CLOSEST(sgcount + ioadl_count, 8)); 3128 } 3129 3130 return ioadl; 3131 } 3132 3133 /** 3134 * pmcraid_build_ioadl - Build a scatter/gather list and map the buffer 3135 * @pinstance: pointer to adapter instance structure 3136 * @cmd: pmcraid command struct 3137 * 3138 * This function is invoked by queuecommand entry point while sending a command 3139 * to firmware. This builds ioadl descriptors and sets up ioarcb fields. 3140 * 3141 * Return value: 3142 * 0 on success or -1 on failure 3143 */ 3144 static int pmcraid_build_ioadl( 3145 struct pmcraid_instance *pinstance, 3146 struct pmcraid_cmd *cmd 3147 ) 3148 { 3149 int i, nseg; 3150 struct scatterlist *sglist; 3151 3152 struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd; 3153 struct pmcraid_ioarcb *ioarcb = &(cmd->ioa_cb->ioarcb); 3154 struct pmcraid_ioadl_desc *ioadl; 3155 3156 u32 length = scsi_bufflen(scsi_cmd); 3157 3158 if (!length) 3159 return 0; 3160 3161 nseg = scsi_dma_map(scsi_cmd); 3162 3163 if (nseg < 0) { 3164 scmd_printk(KERN_ERR, scsi_cmd, "scsi_map_dma failed!\n"); 3165 return -1; 3166 } else if (nseg > PMCRAID_MAX_IOADLS) { 3167 scsi_dma_unmap(scsi_cmd); 3168 scmd_printk(KERN_ERR, scsi_cmd, 3169 "sg count is (%d) more than allowed!\n", nseg); 3170 return -1; 3171 } 3172 3173 /* Initialize IOARCB data transfer length fields */ 3174 if (scsi_cmd->sc_data_direction == DMA_TO_DEVICE) 3175 ioarcb->request_flags0 |= TRANSFER_DIR_WRITE; 3176 3177 ioarcb->request_flags0 |= NO_LINK_DESCS; 3178 ioarcb->data_transfer_length = cpu_to_le32(length); 3179 ioadl = pmcraid_init_ioadls(cmd, nseg); 3180 3181 /* Initialize IOADL descriptor addresses */ 3182 scsi_for_each_sg(scsi_cmd, sglist, nseg, i) { 3183 ioadl[i].data_len = cpu_to_le32(sg_dma_len(sglist)); 3184 ioadl[i].address = cpu_to_le64(sg_dma_address(sglist)); 3185 ioadl[i].flags = 0; 3186 } 3187 /* setup last descriptor */ 3188 ioadl[i - 1].flags = IOADL_FLAGS_LAST_DESC; 3189 3190 return 0; 3191 } 3192 3193 /** 3194 * pmcraid_free_sglist - Frees an allocated SG buffer list 3195 * @sglist: scatter/gather list pointer 3196 * 3197 * Free a DMA'able memory previously allocated with pmcraid_alloc_sglist 3198 * 3199 * Return value: 3200 * none 3201 */ 3202 static void pmcraid_free_sglist(struct pmcraid_sglist *sglist) 3203 { 3204 sgl_free_order(sglist->scatterlist, sglist->order); 3205 kfree(sglist); 3206 } 3207 3208 /** 3209 * pmcraid_alloc_sglist - Allocates memory for a SG list 3210 * @buflen: buffer length 3211 * 3212 * Allocates a DMA'able buffer in chunks and assembles a scatter/gather 3213 * list. 3214 * 3215 * Return value 3216 * pointer to sglist / NULL on failure 3217 */ 3218 static struct pmcraid_sglist *pmcraid_alloc_sglist(int buflen) 3219 { 3220 struct pmcraid_sglist *sglist; 3221 int sg_size; 3222 int order; 3223 3224 sg_size = buflen / (PMCRAID_MAX_IOADLS - 1); 3225 order = (sg_size > 0) ? get_order(sg_size) : 0; 3226 3227 /* Allocate a scatter/gather list for the DMA */ 3228 sglist = kzalloc(sizeof(struct pmcraid_sglist), GFP_KERNEL); 3229 if (sglist == NULL) 3230 return NULL; 3231 3232 sglist->order = order; 3233 sgl_alloc_order(buflen, order, false, 3234 GFP_KERNEL | GFP_DMA | __GFP_ZERO, &sglist->num_sg); 3235 3236 return sglist; 3237 } 3238 3239 /** 3240 * pmcraid_copy_sglist - Copy user buffer to kernel buffer's SG list 3241 * @sglist: scatter/gather list pointer 3242 * @buffer: buffer pointer 3243 * @len: buffer length 3244 * @direction: data transfer direction 3245 * 3246 * Copy a user buffer into a buffer allocated by pmcraid_alloc_sglist 3247 * 3248 * Return value: 3249 * 0 on success / other on failure 3250 */ 3251 static int pmcraid_copy_sglist( 3252 struct pmcraid_sglist *sglist, 3253 void __user *buffer, 3254 u32 len, 3255 int direction 3256 ) 3257 { 3258 struct scatterlist *scatterlist; 3259 void *kaddr; 3260 int bsize_elem; 3261 int i; 3262 int rc = 0; 3263 3264 /* Determine the actual number of bytes per element */ 3265 bsize_elem = PAGE_SIZE * (1 << sglist->order); 3266 3267 scatterlist = sglist->scatterlist; 3268 3269 for (i = 0; i < (len / bsize_elem); i++, buffer += bsize_elem) { 3270 struct page *page = sg_page(&scatterlist[i]); 3271 3272 kaddr = kmap(page); 3273 if (direction == DMA_TO_DEVICE) 3274 rc = copy_from_user(kaddr, buffer, bsize_elem); 3275 else 3276 rc = copy_to_user(buffer, kaddr, bsize_elem); 3277 3278 kunmap(page); 3279 3280 if (rc) { 3281 pmcraid_err("failed to copy user data into sg list\n"); 3282 return -EFAULT; 3283 } 3284 3285 scatterlist[i].length = bsize_elem; 3286 } 3287 3288 if (len % bsize_elem) { 3289 struct page *page = sg_page(&scatterlist[i]); 3290 3291 kaddr = kmap(page); 3292 3293 if (direction == DMA_TO_DEVICE) 3294 rc = copy_from_user(kaddr, buffer, len % bsize_elem); 3295 else 3296 rc = copy_to_user(buffer, kaddr, len % bsize_elem); 3297 3298 kunmap(page); 3299 3300 scatterlist[i].length = len % bsize_elem; 3301 } 3302 3303 if (rc) { 3304 pmcraid_err("failed to copy user data into sg list\n"); 3305 rc = -EFAULT; 3306 } 3307 3308 return rc; 3309 } 3310 3311 /** 3312 * pmcraid_queuecommand - Queue a mid-layer request 3313 * @scsi_cmd: scsi command struct 3314 * @done: done function 3315 * 3316 * This function queues a request generated by the mid-layer. Midlayer calls 3317 * this routine within host->lock. Some of the functions called by queuecommand 3318 * would use cmd block queue locks (free_pool_lock and pending_pool_lock) 3319 * 3320 * Return value: 3321 * 0 on success 3322 * SCSI_MLQUEUE_DEVICE_BUSY if device is busy 3323 * SCSI_MLQUEUE_HOST_BUSY if host is busy 3324 */ 3325 static int pmcraid_queuecommand_lck( 3326 struct scsi_cmnd *scsi_cmd, 3327 void (*done) (struct scsi_cmnd *) 3328 ) 3329 { 3330 struct pmcraid_instance *pinstance; 3331 struct pmcraid_resource_entry *res; 3332 struct pmcraid_ioarcb *ioarcb; 3333 struct pmcraid_cmd *cmd; 3334 u32 fw_version; 3335 int rc = 0; 3336 3337 pinstance = 3338 (struct pmcraid_instance *)scsi_cmd->device->host->hostdata; 3339 fw_version = be16_to_cpu(pinstance->inq_data->fw_version); 3340 scsi_cmd->scsi_done = done; 3341 res = scsi_cmd->device->hostdata; 3342 scsi_cmd->result = (DID_OK << 16); 3343 3344 /* if adapter is marked as dead, set result to DID_NO_CONNECT complete 3345 * the command 3346 */ 3347 if (pinstance->ioa_state == IOA_STATE_DEAD) { 3348 pmcraid_info("IOA is dead, but queuecommand is scheduled\n"); 3349 scsi_cmd->result = (DID_NO_CONNECT << 16); 3350 scsi_cmd->scsi_done(scsi_cmd); 3351 return 0; 3352 } 3353 3354 /* If IOA reset is in progress, can't queue the commands */ 3355 if (pinstance->ioa_reset_in_progress) 3356 return SCSI_MLQUEUE_HOST_BUSY; 3357 3358 /* Firmware doesn't support SYNCHRONIZE_CACHE command (0x35), complete 3359 * the command here itself with success return 3360 */ 3361 if (scsi_cmd->cmnd[0] == SYNCHRONIZE_CACHE) { 3362 pmcraid_info("SYNC_CACHE(0x35), completing in driver itself\n"); 3363 scsi_cmd->scsi_done(scsi_cmd); 3364 return 0; 3365 } 3366 3367 /* initialize the command and IOARCB to be sent to IOA */ 3368 cmd = pmcraid_get_free_cmd(pinstance); 3369 3370 if (cmd == NULL) { 3371 pmcraid_err("free command block is not available\n"); 3372 return SCSI_MLQUEUE_HOST_BUSY; 3373 } 3374 3375 cmd->scsi_cmd = scsi_cmd; 3376 ioarcb = &(cmd->ioa_cb->ioarcb); 3377 memcpy(ioarcb->cdb, scsi_cmd->cmnd, scsi_cmd->cmd_len); 3378 ioarcb->resource_handle = res->cfg_entry.resource_handle; 3379 ioarcb->request_type = REQ_TYPE_SCSI; 3380 3381 /* set hrrq number where the IOA should respond to. Note that all cmds 3382 * generated internally uses hrrq_id 0, exception to this is the cmd 3383 * block of scsi_cmd which is re-used (e.g. cancel/abort), which uses 3384 * hrrq_id assigned here in queuecommand 3385 */ 3386 ioarcb->hrrq_id = atomic_add_return(1, &(pinstance->last_message_id)) % 3387 pinstance->num_hrrq; 3388 cmd->cmd_done = pmcraid_io_done; 3389 3390 if (RES_IS_GSCSI(res->cfg_entry) || RES_IS_VSET(res->cfg_entry)) { 3391 if (scsi_cmd->underflow == 0) 3392 ioarcb->request_flags0 |= INHIBIT_UL_CHECK; 3393 3394 if (res->sync_reqd) { 3395 ioarcb->request_flags0 |= SYNC_COMPLETE; 3396 res->sync_reqd = 0; 3397 } 3398 3399 ioarcb->request_flags0 |= NO_LINK_DESCS; 3400 3401 if (scsi_cmd->flags & SCMD_TAGGED) 3402 ioarcb->request_flags1 |= TASK_TAG_SIMPLE; 3403 3404 if (RES_IS_GSCSI(res->cfg_entry)) 3405 ioarcb->request_flags1 |= DELAY_AFTER_RESET; 3406 } 3407 3408 rc = pmcraid_build_ioadl(pinstance, cmd); 3409 3410 pmcraid_info("command (%d) CDB[0] = %x for %x:%x:%x:%x\n", 3411 le32_to_cpu(ioarcb->response_handle) >> 2, 3412 scsi_cmd->cmnd[0], pinstance->host->unique_id, 3413 RES_IS_VSET(res->cfg_entry) ? PMCRAID_VSET_BUS_ID : 3414 PMCRAID_PHYS_BUS_ID, 3415 RES_IS_VSET(res->cfg_entry) ? 3416 (fw_version <= PMCRAID_FW_VERSION_1 ? 3417 res->cfg_entry.unique_flags1 : 3418 le16_to_cpu(res->cfg_entry.array_id) & 0xFF) : 3419 RES_TARGET(res->cfg_entry.resource_address), 3420 RES_LUN(res->cfg_entry.resource_address)); 3421 3422 if (likely(rc == 0)) { 3423 _pmcraid_fire_command(cmd); 3424 } else { 3425 pmcraid_err("queuecommand could not build ioadl\n"); 3426 pmcraid_return_cmd(cmd); 3427 rc = SCSI_MLQUEUE_HOST_BUSY; 3428 } 3429 3430 return rc; 3431 } 3432 3433 static DEF_SCSI_QCMD(pmcraid_queuecommand) 3434 3435 /** 3436 * pmcraid_open -char node "open" entry, allowed only users with admin access 3437 */ 3438 static int pmcraid_chr_open(struct inode *inode, struct file *filep) 3439 { 3440 struct pmcraid_instance *pinstance; 3441 3442 if (!capable(CAP_SYS_ADMIN)) 3443 return -EACCES; 3444 3445 /* Populate adapter instance * pointer for use by ioctl */ 3446 pinstance = container_of(inode->i_cdev, struct pmcraid_instance, cdev); 3447 filep->private_data = pinstance; 3448 3449 return 0; 3450 } 3451 3452 /** 3453 * pmcraid_fasync - Async notifier registration from applications 3454 * 3455 * This function adds the calling process to a driver global queue. When an 3456 * event occurs, SIGIO will be sent to all processes in this queue. 3457 */ 3458 static int pmcraid_chr_fasync(int fd, struct file *filep, int mode) 3459 { 3460 struct pmcraid_instance *pinstance; 3461 int rc; 3462 3463 pinstance = filep->private_data; 3464 mutex_lock(&pinstance->aen_queue_lock); 3465 rc = fasync_helper(fd, filep, mode, &pinstance->aen_queue); 3466 mutex_unlock(&pinstance->aen_queue_lock); 3467 3468 return rc; 3469 } 3470 3471 3472 /** 3473 * pmcraid_build_passthrough_ioadls - builds SG elements for passthrough 3474 * commands sent over IOCTL interface 3475 * 3476 * @cmd : pointer to struct pmcraid_cmd 3477 * @buflen : length of the request buffer 3478 * @direction : data transfer direction 3479 * 3480 * Return value 3481 * 0 on success, non-zero error code on failure 3482 */ 3483 static int pmcraid_build_passthrough_ioadls( 3484 struct pmcraid_cmd *cmd, 3485 int buflen, 3486 int direction 3487 ) 3488 { 3489 struct pmcraid_sglist *sglist = NULL; 3490 struct scatterlist *sg = NULL; 3491 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb; 3492 struct pmcraid_ioadl_desc *ioadl; 3493 int i; 3494 3495 sglist = pmcraid_alloc_sglist(buflen); 3496 3497 if (!sglist) { 3498 pmcraid_err("can't allocate memory for passthrough SGls\n"); 3499 return -ENOMEM; 3500 } 3501 3502 sglist->num_dma_sg = dma_map_sg(&cmd->drv_inst->pdev->dev, 3503 sglist->scatterlist, 3504 sglist->num_sg, direction); 3505 3506 if (!sglist->num_dma_sg || sglist->num_dma_sg > PMCRAID_MAX_IOADLS) { 3507 dev_err(&cmd->drv_inst->pdev->dev, 3508 "Failed to map passthrough buffer!\n"); 3509 pmcraid_free_sglist(sglist); 3510 return -EIO; 3511 } 3512 3513 cmd->sglist = sglist; 3514 ioarcb->request_flags0 |= NO_LINK_DESCS; 3515 3516 ioadl = pmcraid_init_ioadls(cmd, sglist->num_dma_sg); 3517 3518 /* Initialize IOADL descriptor addresses */ 3519 for_each_sg(sglist->scatterlist, sg, sglist->num_dma_sg, i) { 3520 ioadl[i].data_len = cpu_to_le32(sg_dma_len(sg)); 3521 ioadl[i].address = cpu_to_le64(sg_dma_address(sg)); 3522 ioadl[i].flags = 0; 3523 } 3524 3525 /* setup the last descriptor */ 3526 ioadl[i - 1].flags = IOADL_FLAGS_LAST_DESC; 3527 3528 return 0; 3529 } 3530 3531 3532 /** 3533 * pmcraid_release_passthrough_ioadls - release passthrough ioadls 3534 * 3535 * @cmd: pointer to struct pmcraid_cmd for which ioadls were allocated 3536 * @buflen: size of the request buffer 3537 * @direction: data transfer direction 3538 * 3539 * Return value 3540 * 0 on success, non-zero error code on failure 3541 */ 3542 static void pmcraid_release_passthrough_ioadls( 3543 struct pmcraid_cmd *cmd, 3544 int buflen, 3545 int direction 3546 ) 3547 { 3548 struct pmcraid_sglist *sglist = cmd->sglist; 3549 3550 if (buflen > 0) { 3551 dma_unmap_sg(&cmd->drv_inst->pdev->dev, 3552 sglist->scatterlist, 3553 sglist->num_sg, 3554 direction); 3555 pmcraid_free_sglist(sglist); 3556 cmd->sglist = NULL; 3557 } 3558 } 3559 3560 /** 3561 * pmcraid_ioctl_passthrough - handling passthrough IOCTL commands 3562 * 3563 * @pinstance: pointer to adapter instance structure 3564 * @cmd: ioctl code 3565 * @arg: pointer to pmcraid_passthrough_buffer user buffer 3566 * 3567 * Return value 3568 * 0 on success, non-zero error code on failure 3569 */ 3570 static long pmcraid_ioctl_passthrough( 3571 struct pmcraid_instance *pinstance, 3572 unsigned int ioctl_cmd, 3573 unsigned int buflen, 3574 void __user *arg 3575 ) 3576 { 3577 struct pmcraid_passthrough_ioctl_buffer *buffer; 3578 struct pmcraid_ioarcb *ioarcb; 3579 struct pmcraid_cmd *cmd; 3580 struct pmcraid_cmd *cancel_cmd; 3581 void __user *request_buffer; 3582 unsigned long request_offset; 3583 unsigned long lock_flags; 3584 void __user *ioasa; 3585 u32 ioasc; 3586 int request_size; 3587 int buffer_size; 3588 u8 direction; 3589 int rc = 0; 3590 3591 /* If IOA reset is in progress, wait 10 secs for reset to complete */ 3592 if (pinstance->ioa_reset_in_progress) { 3593 rc = wait_event_interruptible_timeout( 3594 pinstance->reset_wait_q, 3595 !pinstance->ioa_reset_in_progress, 3596 msecs_to_jiffies(10000)); 3597 3598 if (!rc) 3599 return -ETIMEDOUT; 3600 else if (rc < 0) 3601 return -ERESTARTSYS; 3602 } 3603 3604 /* If adapter is not in operational state, return error */ 3605 if (pinstance->ioa_state != IOA_STATE_OPERATIONAL) { 3606 pmcraid_err("IOA is not operational\n"); 3607 return -ENOTTY; 3608 } 3609 3610 buffer_size = sizeof(struct pmcraid_passthrough_ioctl_buffer); 3611 buffer = kmalloc(buffer_size, GFP_KERNEL); 3612 3613 if (!buffer) { 3614 pmcraid_err("no memory for passthrough buffer\n"); 3615 return -ENOMEM; 3616 } 3617 3618 request_offset = 3619 offsetof(struct pmcraid_passthrough_ioctl_buffer, request_buffer); 3620 3621 request_buffer = arg + request_offset; 3622 3623 rc = copy_from_user(buffer, arg, 3624 sizeof(struct pmcraid_passthrough_ioctl_buffer)); 3625 3626 ioasa = arg + offsetof(struct pmcraid_passthrough_ioctl_buffer, ioasa); 3627 3628 if (rc) { 3629 pmcraid_err("ioctl: can't copy passthrough buffer\n"); 3630 rc = -EFAULT; 3631 goto out_free_buffer; 3632 } 3633 3634 request_size = le32_to_cpu(buffer->ioarcb.data_transfer_length); 3635 3636 if (buffer->ioarcb.request_flags0 & TRANSFER_DIR_WRITE) { 3637 direction = DMA_TO_DEVICE; 3638 } else { 3639 direction = DMA_FROM_DEVICE; 3640 } 3641 3642 if (request_size < 0) { 3643 rc = -EINVAL; 3644 goto out_free_buffer; 3645 } 3646 3647 /* check if we have any additional command parameters */ 3648 if (le16_to_cpu(buffer->ioarcb.add_cmd_param_length) 3649 > PMCRAID_ADD_CMD_PARAM_LEN) { 3650 rc = -EINVAL; 3651 goto out_free_buffer; 3652 } 3653 3654 cmd = pmcraid_get_free_cmd(pinstance); 3655 3656 if (!cmd) { 3657 pmcraid_err("free command block is not available\n"); 3658 rc = -ENOMEM; 3659 goto out_free_buffer; 3660 } 3661 3662 cmd->scsi_cmd = NULL; 3663 ioarcb = &(cmd->ioa_cb->ioarcb); 3664 3665 /* Copy the user-provided IOARCB stuff field by field */ 3666 ioarcb->resource_handle = buffer->ioarcb.resource_handle; 3667 ioarcb->data_transfer_length = buffer->ioarcb.data_transfer_length; 3668 ioarcb->cmd_timeout = buffer->ioarcb.cmd_timeout; 3669 ioarcb->request_type = buffer->ioarcb.request_type; 3670 ioarcb->request_flags0 = buffer->ioarcb.request_flags0; 3671 ioarcb->request_flags1 = buffer->ioarcb.request_flags1; 3672 memcpy(ioarcb->cdb, buffer->ioarcb.cdb, PMCRAID_MAX_CDB_LEN); 3673 3674 if (buffer->ioarcb.add_cmd_param_length) { 3675 ioarcb->add_cmd_param_length = 3676 buffer->ioarcb.add_cmd_param_length; 3677 ioarcb->add_cmd_param_offset = 3678 buffer->ioarcb.add_cmd_param_offset; 3679 memcpy(ioarcb->add_data.u.add_cmd_params, 3680 buffer->ioarcb.add_data.u.add_cmd_params, 3681 le16_to_cpu(buffer->ioarcb.add_cmd_param_length)); 3682 } 3683 3684 /* set hrrq number where the IOA should respond to. Note that all cmds 3685 * generated internally uses hrrq_id 0, exception to this is the cmd 3686 * block of scsi_cmd which is re-used (e.g. cancel/abort), which uses 3687 * hrrq_id assigned here in queuecommand 3688 */ 3689 ioarcb->hrrq_id = atomic_add_return(1, &(pinstance->last_message_id)) % 3690 pinstance->num_hrrq; 3691 3692 if (request_size) { 3693 rc = pmcraid_build_passthrough_ioadls(cmd, 3694 request_size, 3695 direction); 3696 if (rc) { 3697 pmcraid_err("couldn't build passthrough ioadls\n"); 3698 goto out_free_cmd; 3699 } 3700 } 3701 3702 /* If data is being written into the device, copy the data from user 3703 * buffers 3704 */ 3705 if (direction == DMA_TO_DEVICE && request_size > 0) { 3706 rc = pmcraid_copy_sglist(cmd->sglist, 3707 request_buffer, 3708 request_size, 3709 direction); 3710 if (rc) { 3711 pmcraid_err("failed to copy user buffer\n"); 3712 goto out_free_sglist; 3713 } 3714 } 3715 3716 /* passthrough ioctl is a blocking command so, put the user to sleep 3717 * until timeout. Note that a timeout value of 0 means, do timeout. 3718 */ 3719 cmd->cmd_done = pmcraid_internal_done; 3720 init_completion(&cmd->wait_for_completion); 3721 cmd->completion_req = 1; 3722 3723 pmcraid_info("command(%d) (CDB[0] = %x) for %x\n", 3724 le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2, 3725 cmd->ioa_cb->ioarcb.cdb[0], 3726 le32_to_cpu(cmd->ioa_cb->ioarcb.resource_handle)); 3727 3728 spin_lock_irqsave(pinstance->host->host_lock, lock_flags); 3729 _pmcraid_fire_command(cmd); 3730 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); 3731 3732 /* NOTE ! Remove the below line once abort_task is implemented 3733 * in firmware. This line disables ioctl command timeout handling logic 3734 * similar to IO command timeout handling, making ioctl commands to wait 3735 * until the command completion regardless of timeout value specified in 3736 * ioarcb 3737 */ 3738 buffer->ioarcb.cmd_timeout = 0; 3739 3740 /* If command timeout is specified put caller to wait till that time, 3741 * otherwise it would be blocking wait. If command gets timed out, it 3742 * will be aborted. 3743 */ 3744 if (buffer->ioarcb.cmd_timeout == 0) { 3745 wait_for_completion(&cmd->wait_for_completion); 3746 } else if (!wait_for_completion_timeout( 3747 &cmd->wait_for_completion, 3748 msecs_to_jiffies(le16_to_cpu(buffer->ioarcb.cmd_timeout) * 1000))) { 3749 3750 pmcraid_info("aborting cmd %d (CDB[0] = %x) due to timeout\n", 3751 le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2, 3752 cmd->ioa_cb->ioarcb.cdb[0]); 3753 3754 spin_lock_irqsave(pinstance->host->host_lock, lock_flags); 3755 cancel_cmd = pmcraid_abort_cmd(cmd); 3756 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); 3757 3758 if (cancel_cmd) { 3759 wait_for_completion(&cancel_cmd->wait_for_completion); 3760 ioasc = le32_to_cpu(cancel_cmd->ioa_cb->ioasa.ioasc); 3761 pmcraid_return_cmd(cancel_cmd); 3762 3763 /* if abort task couldn't find the command i.e it got 3764 * completed prior to aborting, return good completion. 3765 * if command got aborted successfully or there was IOA 3766 * reset due to abort task itself getting timedout then 3767 * return -ETIMEDOUT 3768 */ 3769 if (ioasc == PMCRAID_IOASC_IOA_WAS_RESET || 3770 PMCRAID_IOASC_SENSE_KEY(ioasc) == 0x00) { 3771 if (ioasc != PMCRAID_IOASC_GC_IOARCB_NOTFOUND) 3772 rc = -ETIMEDOUT; 3773 goto out_handle_response; 3774 } 3775 } 3776 3777 /* no command block for abort task or abort task failed to abort 3778 * the IOARCB, then wait for 150 more seconds and initiate reset 3779 * sequence after timeout 3780 */ 3781 if (!wait_for_completion_timeout( 3782 &cmd->wait_for_completion, 3783 msecs_to_jiffies(150 * 1000))) { 3784 pmcraid_reset_bringup(cmd->drv_inst); 3785 rc = -ETIMEDOUT; 3786 } 3787 } 3788 3789 out_handle_response: 3790 /* copy entire IOASA buffer and return IOCTL success. 3791 * If copying IOASA to user-buffer fails, return 3792 * EFAULT 3793 */ 3794 if (copy_to_user(ioasa, &cmd->ioa_cb->ioasa, 3795 sizeof(struct pmcraid_ioasa))) { 3796 pmcraid_err("failed to copy ioasa buffer to user\n"); 3797 rc = -EFAULT; 3798 } 3799 3800 /* If the data transfer was from device, copy the data onto user 3801 * buffers 3802 */ 3803 else if (direction == DMA_FROM_DEVICE && request_size > 0) { 3804 rc = pmcraid_copy_sglist(cmd->sglist, 3805 request_buffer, 3806 request_size, 3807 direction); 3808 if (rc) { 3809 pmcraid_err("failed to copy user buffer\n"); 3810 rc = -EFAULT; 3811 } 3812 } 3813 3814 out_free_sglist: 3815 pmcraid_release_passthrough_ioadls(cmd, request_size, direction); 3816 3817 out_free_cmd: 3818 pmcraid_return_cmd(cmd); 3819 3820 out_free_buffer: 3821 kfree(buffer); 3822 3823 return rc; 3824 } 3825 3826 3827 3828 3829 /** 3830 * pmcraid_ioctl_driver - ioctl handler for commands handled by driver itself 3831 * 3832 * @pinstance: pointer to adapter instance structure 3833 * @cmd: ioctl command passed in 3834 * @buflen: length of user_buffer 3835 * @user_buffer: user buffer pointer 3836 * 3837 * Return Value 3838 * 0 in case of success, otherwise appropriate error code 3839 */ 3840 static long pmcraid_ioctl_driver( 3841 struct pmcraid_instance *pinstance, 3842 unsigned int cmd, 3843 unsigned int buflen, 3844 void __user *user_buffer 3845 ) 3846 { 3847 int rc = -ENOSYS; 3848 3849 switch (cmd) { 3850 case PMCRAID_IOCTL_RESET_ADAPTER: 3851 pmcraid_reset_bringup(pinstance); 3852 rc = 0; 3853 break; 3854 3855 default: 3856 break; 3857 } 3858 3859 return rc; 3860 } 3861 3862 /** 3863 * pmcraid_check_ioctl_buffer - check for proper access to user buffer 3864 * 3865 * @cmd: ioctl command 3866 * @arg: user buffer 3867 * @hdr: pointer to kernel memory for pmcraid_ioctl_header 3868 * 3869 * Return Value 3870 * negetive error code if there are access issues, otherwise zero. 3871 * Upon success, returns ioctl header copied out of user buffer. 3872 */ 3873 3874 static int pmcraid_check_ioctl_buffer( 3875 int cmd, 3876 void __user *arg, 3877 struct pmcraid_ioctl_header *hdr 3878 ) 3879 { 3880 int rc; 3881 3882 if (copy_from_user(hdr, arg, sizeof(struct pmcraid_ioctl_header))) { 3883 pmcraid_err("couldn't copy ioctl header from user buffer\n"); 3884 return -EFAULT; 3885 } 3886 3887 /* check for valid driver signature */ 3888 rc = memcmp(hdr->signature, 3889 PMCRAID_IOCTL_SIGNATURE, 3890 sizeof(hdr->signature)); 3891 if (rc) { 3892 pmcraid_err("signature verification failed\n"); 3893 return -EINVAL; 3894 } 3895 3896 return 0; 3897 } 3898 3899 /** 3900 * pmcraid_ioctl - char node ioctl entry point 3901 */ 3902 static long pmcraid_chr_ioctl( 3903 struct file *filep, 3904 unsigned int cmd, 3905 unsigned long arg 3906 ) 3907 { 3908 struct pmcraid_instance *pinstance = NULL; 3909 struct pmcraid_ioctl_header *hdr = NULL; 3910 void __user *argp = (void __user *)arg; 3911 int retval = -ENOTTY; 3912 3913 hdr = kmalloc(sizeof(struct pmcraid_ioctl_header), GFP_KERNEL); 3914 3915 if (!hdr) { 3916 pmcraid_err("failed to allocate memory for ioctl header\n"); 3917 return -ENOMEM; 3918 } 3919 3920 retval = pmcraid_check_ioctl_buffer(cmd, argp, hdr); 3921 3922 if (retval) { 3923 pmcraid_info("chr_ioctl: header check failed\n"); 3924 kfree(hdr); 3925 return retval; 3926 } 3927 3928 pinstance = filep->private_data; 3929 3930 if (!pinstance) { 3931 pmcraid_info("adapter instance is not found\n"); 3932 kfree(hdr); 3933 return -ENOTTY; 3934 } 3935 3936 switch (_IOC_TYPE(cmd)) { 3937 3938 case PMCRAID_PASSTHROUGH_IOCTL: 3939 /* If ioctl code is to download microcode, we need to block 3940 * mid-layer requests. 3941 */ 3942 if (cmd == PMCRAID_IOCTL_DOWNLOAD_MICROCODE) 3943 scsi_block_requests(pinstance->host); 3944 3945 retval = pmcraid_ioctl_passthrough(pinstance, cmd, 3946 hdr->buffer_length, argp); 3947 3948 if (cmd == PMCRAID_IOCTL_DOWNLOAD_MICROCODE) 3949 scsi_unblock_requests(pinstance->host); 3950 break; 3951 3952 case PMCRAID_DRIVER_IOCTL: 3953 arg += sizeof(struct pmcraid_ioctl_header); 3954 retval = pmcraid_ioctl_driver(pinstance, cmd, 3955 hdr->buffer_length, argp); 3956 break; 3957 3958 default: 3959 retval = -ENOTTY; 3960 break; 3961 } 3962 3963 kfree(hdr); 3964 3965 return retval; 3966 } 3967 3968 /** 3969 * File operations structure for management interface 3970 */ 3971 static const struct file_operations pmcraid_fops = { 3972 .owner = THIS_MODULE, 3973 .open = pmcraid_chr_open, 3974 .fasync = pmcraid_chr_fasync, 3975 .unlocked_ioctl = pmcraid_chr_ioctl, 3976 #ifdef CONFIG_COMPAT 3977 .compat_ioctl = pmcraid_chr_ioctl, 3978 #endif 3979 .llseek = noop_llseek, 3980 }; 3981 3982 3983 3984 3985 /** 3986 * pmcraid_show_log_level - Display adapter's error logging level 3987 * @dev: class device struct 3988 * @buf: buffer 3989 * 3990 * Return value: 3991 * number of bytes printed to buffer 3992 */ 3993 static ssize_t pmcraid_show_log_level( 3994 struct device *dev, 3995 struct device_attribute *attr, 3996 char *buf) 3997 { 3998 struct Scsi_Host *shost = class_to_shost(dev); 3999 struct pmcraid_instance *pinstance = 4000 (struct pmcraid_instance *)shost->hostdata; 4001 return snprintf(buf, PAGE_SIZE, "%d\n", pinstance->current_log_level); 4002 } 4003 4004 /** 4005 * pmcraid_store_log_level - Change the adapter's error logging level 4006 * @dev: class device struct 4007 * @buf: buffer 4008 * @count: not used 4009 * 4010 * Return value: 4011 * number of bytes printed to buffer 4012 */ 4013 static ssize_t pmcraid_store_log_level( 4014 struct device *dev, 4015 struct device_attribute *attr, 4016 const char *buf, 4017 size_t count 4018 ) 4019 { 4020 struct Scsi_Host *shost; 4021 struct pmcraid_instance *pinstance; 4022 u8 val; 4023 4024 if (kstrtou8(buf, 10, &val)) 4025 return -EINVAL; 4026 /* log-level should be from 0 to 2 */ 4027 if (val > 2) 4028 return -EINVAL; 4029 4030 shost = class_to_shost(dev); 4031 pinstance = (struct pmcraid_instance *)shost->hostdata; 4032 pinstance->current_log_level = val; 4033 4034 return strlen(buf); 4035 } 4036 4037 static struct device_attribute pmcraid_log_level_attr = { 4038 .attr = { 4039 .name = "log_level", 4040 .mode = S_IRUGO | S_IWUSR, 4041 }, 4042 .show = pmcraid_show_log_level, 4043 .store = pmcraid_store_log_level, 4044 }; 4045 4046 /** 4047 * pmcraid_show_drv_version - Display driver version 4048 * @dev: class device struct 4049 * @buf: buffer 4050 * 4051 * Return value: 4052 * number of bytes printed to buffer 4053 */ 4054 static ssize_t pmcraid_show_drv_version( 4055 struct device *dev, 4056 struct device_attribute *attr, 4057 char *buf 4058 ) 4059 { 4060 return snprintf(buf, PAGE_SIZE, "version: %s\n", 4061 PMCRAID_DRIVER_VERSION); 4062 } 4063 4064 static struct device_attribute pmcraid_driver_version_attr = { 4065 .attr = { 4066 .name = "drv_version", 4067 .mode = S_IRUGO, 4068 }, 4069 .show = pmcraid_show_drv_version, 4070 }; 4071 4072 /** 4073 * pmcraid_show_io_adapter_id - Display driver assigned adapter id 4074 * @dev: class device struct 4075 * @buf: buffer 4076 * 4077 * Return value: 4078 * number of bytes printed to buffer 4079 */ 4080 static ssize_t pmcraid_show_adapter_id( 4081 struct device *dev, 4082 struct device_attribute *attr, 4083 char *buf 4084 ) 4085 { 4086 struct Scsi_Host *shost = class_to_shost(dev); 4087 struct pmcraid_instance *pinstance = 4088 (struct pmcraid_instance *)shost->hostdata; 4089 u32 adapter_id = (pinstance->pdev->bus->number << 8) | 4090 pinstance->pdev->devfn; 4091 u32 aen_group = pmcraid_event_family.id; 4092 4093 return snprintf(buf, PAGE_SIZE, 4094 "adapter id: %d\nminor: %d\naen group: %d\n", 4095 adapter_id, MINOR(pinstance->cdev.dev), aen_group); 4096 } 4097 4098 static struct device_attribute pmcraid_adapter_id_attr = { 4099 .attr = { 4100 .name = "adapter_id", 4101 .mode = S_IRUGO, 4102 }, 4103 .show = pmcraid_show_adapter_id, 4104 }; 4105 4106 static struct device_attribute *pmcraid_host_attrs[] = { 4107 &pmcraid_log_level_attr, 4108 &pmcraid_driver_version_attr, 4109 &pmcraid_adapter_id_attr, 4110 NULL, 4111 }; 4112 4113 4114 /* host template structure for pmcraid driver */ 4115 static struct scsi_host_template pmcraid_host_template = { 4116 .module = THIS_MODULE, 4117 .name = PMCRAID_DRIVER_NAME, 4118 .queuecommand = pmcraid_queuecommand, 4119 .eh_abort_handler = pmcraid_eh_abort_handler, 4120 .eh_bus_reset_handler = pmcraid_eh_bus_reset_handler, 4121 .eh_target_reset_handler = pmcraid_eh_target_reset_handler, 4122 .eh_device_reset_handler = pmcraid_eh_device_reset_handler, 4123 .eh_host_reset_handler = pmcraid_eh_host_reset_handler, 4124 4125 .slave_alloc = pmcraid_slave_alloc, 4126 .slave_configure = pmcraid_slave_configure, 4127 .slave_destroy = pmcraid_slave_destroy, 4128 .change_queue_depth = pmcraid_change_queue_depth, 4129 .can_queue = PMCRAID_MAX_IO_CMD, 4130 .this_id = -1, 4131 .sg_tablesize = PMCRAID_MAX_IOADLS, 4132 .max_sectors = PMCRAID_IOA_MAX_SECTORS, 4133 .no_write_same = 1, 4134 .cmd_per_lun = PMCRAID_MAX_CMD_PER_LUN, 4135 .shost_attrs = pmcraid_host_attrs, 4136 .proc_name = PMCRAID_DRIVER_NAME, 4137 }; 4138 4139 /* 4140 * pmcraid_isr_msix - implements MSI-X interrupt handling routine 4141 * @irq: interrupt vector number 4142 * @dev_id: pointer hrrq_vector 4143 * 4144 * Return Value 4145 * IRQ_HANDLED if interrupt is handled or IRQ_NONE if ignored 4146 */ 4147 4148 static irqreturn_t pmcraid_isr_msix(int irq, void *dev_id) 4149 { 4150 struct pmcraid_isr_param *hrrq_vector; 4151 struct pmcraid_instance *pinstance; 4152 unsigned long lock_flags; 4153 u32 intrs_val; 4154 int hrrq_id; 4155 4156 hrrq_vector = (struct pmcraid_isr_param *)dev_id; 4157 hrrq_id = hrrq_vector->hrrq_id; 4158 pinstance = hrrq_vector->drv_inst; 4159 4160 if (!hrrq_id) { 4161 /* Read the interrupt */ 4162 intrs_val = pmcraid_read_interrupts(pinstance); 4163 if (intrs_val && 4164 ((ioread32(pinstance->int_regs.host_ioa_interrupt_reg) 4165 & DOORBELL_INTR_MSIX_CLR) == 0)) { 4166 /* Any error interrupts including unit_check, 4167 * initiate IOA reset.In case of unit check indicate 4168 * to reset_sequence that IOA unit checked and prepare 4169 * for a dump during reset sequence 4170 */ 4171 if (intrs_val & PMCRAID_ERROR_INTERRUPTS) { 4172 if (intrs_val & INTRS_IOA_UNIT_CHECK) 4173 pinstance->ioa_unit_check = 1; 4174 4175 pmcraid_err("ISR: error interrupts: %x \ 4176 initiating reset\n", intrs_val); 4177 spin_lock_irqsave(pinstance->host->host_lock, 4178 lock_flags); 4179 pmcraid_initiate_reset(pinstance); 4180 spin_unlock_irqrestore( 4181 pinstance->host->host_lock, 4182 lock_flags); 4183 } 4184 /* If interrupt was as part of the ioa initialization, 4185 * clear it. Delete the timer and wakeup the 4186 * reset engine to proceed with reset sequence 4187 */ 4188 if (intrs_val & INTRS_TRANSITION_TO_OPERATIONAL) 4189 pmcraid_clr_trans_op(pinstance); 4190 4191 /* Clear the interrupt register by writing 4192 * to host to ioa doorbell. Once done 4193 * FW will clear the interrupt. 4194 */ 4195 iowrite32(DOORBELL_INTR_MSIX_CLR, 4196 pinstance->int_regs.host_ioa_interrupt_reg); 4197 ioread32(pinstance->int_regs.host_ioa_interrupt_reg); 4198 4199 4200 } 4201 } 4202 4203 tasklet_schedule(&(pinstance->isr_tasklet[hrrq_id])); 4204 4205 return IRQ_HANDLED; 4206 } 4207 4208 /** 4209 * pmcraid_isr - implements legacy interrupt handling routine 4210 * 4211 * @irq: interrupt vector number 4212 * @dev_id: pointer hrrq_vector 4213 * 4214 * Return Value 4215 * IRQ_HANDLED if interrupt is handled or IRQ_NONE if ignored 4216 */ 4217 static irqreturn_t pmcraid_isr(int irq, void *dev_id) 4218 { 4219 struct pmcraid_isr_param *hrrq_vector; 4220 struct pmcraid_instance *pinstance; 4221 u32 intrs; 4222 unsigned long lock_flags; 4223 int hrrq_id = 0; 4224 4225 /* In case of legacy interrupt mode where interrupts are shared across 4226 * isrs, it may be possible that the current interrupt is not from IOA 4227 */ 4228 if (!dev_id) { 4229 printk(KERN_INFO "%s(): NULL host pointer\n", __func__); 4230 return IRQ_NONE; 4231 } 4232 hrrq_vector = (struct pmcraid_isr_param *)dev_id; 4233 pinstance = hrrq_vector->drv_inst; 4234 4235 intrs = pmcraid_read_interrupts(pinstance); 4236 4237 if (unlikely((intrs & PMCRAID_PCI_INTERRUPTS) == 0)) 4238 return IRQ_NONE; 4239 4240 /* Any error interrupts including unit_check, initiate IOA reset. 4241 * In case of unit check indicate to reset_sequence that IOA unit 4242 * checked and prepare for a dump during reset sequence 4243 */ 4244 if (intrs & PMCRAID_ERROR_INTERRUPTS) { 4245 4246 if (intrs & INTRS_IOA_UNIT_CHECK) 4247 pinstance->ioa_unit_check = 1; 4248 4249 iowrite32(intrs, 4250 pinstance->int_regs.ioa_host_interrupt_clr_reg); 4251 pmcraid_err("ISR: error interrupts: %x initiating reset\n", 4252 intrs); 4253 intrs = ioread32( 4254 pinstance->int_regs.ioa_host_interrupt_clr_reg); 4255 spin_lock_irqsave(pinstance->host->host_lock, lock_flags); 4256 pmcraid_initiate_reset(pinstance); 4257 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags); 4258 } else { 4259 /* If interrupt was as part of the ioa initialization, 4260 * clear. Delete the timer and wakeup the 4261 * reset engine to proceed with reset sequence 4262 */ 4263 if (intrs & INTRS_TRANSITION_TO_OPERATIONAL) { 4264 pmcraid_clr_trans_op(pinstance); 4265 } else { 4266 iowrite32(intrs, 4267 pinstance->int_regs.ioa_host_interrupt_clr_reg); 4268 ioread32( 4269 pinstance->int_regs.ioa_host_interrupt_clr_reg); 4270 4271 tasklet_schedule( 4272 &(pinstance->isr_tasklet[hrrq_id])); 4273 } 4274 } 4275 4276 return IRQ_HANDLED; 4277 } 4278 4279 4280 /** 4281 * pmcraid_worker_function - worker thread function 4282 * 4283 * @workp: pointer to struct work queue 4284 * 4285 * Return Value 4286 * None 4287 */ 4288 4289 static void pmcraid_worker_function(struct work_struct *workp) 4290 { 4291 struct pmcraid_instance *pinstance; 4292 struct pmcraid_resource_entry *res; 4293 struct pmcraid_resource_entry *temp; 4294 struct scsi_device *sdev; 4295 unsigned long lock_flags; 4296 unsigned long host_lock_flags; 4297 u16 fw_version; 4298 u8 bus, target, lun; 4299 4300 pinstance = container_of(workp, struct pmcraid_instance, worker_q); 4301 /* add resources only after host is added into system */ 4302 if (!atomic_read(&pinstance->expose_resources)) 4303 return; 4304 4305 fw_version = be16_to_cpu(pinstance->inq_data->fw_version); 4306 4307 spin_lock_irqsave(&pinstance->resource_lock, lock_flags); 4308 list_for_each_entry_safe(res, temp, &pinstance->used_res_q, queue) { 4309 4310 if (res->change_detected == RES_CHANGE_DEL && res->scsi_dev) { 4311 sdev = res->scsi_dev; 4312 4313 /* host_lock must be held before calling 4314 * scsi_device_get 4315 */ 4316 spin_lock_irqsave(pinstance->host->host_lock, 4317 host_lock_flags); 4318 if (!scsi_device_get(sdev)) { 4319 spin_unlock_irqrestore( 4320 pinstance->host->host_lock, 4321 host_lock_flags); 4322 pmcraid_info("deleting %x from midlayer\n", 4323 res->cfg_entry.resource_address); 4324 list_move_tail(&res->queue, 4325 &pinstance->free_res_q); 4326 spin_unlock_irqrestore( 4327 &pinstance->resource_lock, 4328 lock_flags); 4329 scsi_remove_device(sdev); 4330 scsi_device_put(sdev); 4331 spin_lock_irqsave(&pinstance->resource_lock, 4332 lock_flags); 4333 res->change_detected = 0; 4334 } else { 4335 spin_unlock_irqrestore( 4336 pinstance->host->host_lock, 4337 host_lock_flags); 4338 } 4339 } 4340 } 4341 4342 list_for_each_entry(res, &pinstance->used_res_q, queue) { 4343 4344 if (res->change_detected == RES_CHANGE_ADD) { 4345 4346 if (!pmcraid_expose_resource(fw_version, 4347 &res->cfg_entry)) 4348 continue; 4349 4350 if (RES_IS_VSET(res->cfg_entry)) { 4351 bus = PMCRAID_VSET_BUS_ID; 4352 if (fw_version <= PMCRAID_FW_VERSION_1) 4353 target = res->cfg_entry.unique_flags1; 4354 else 4355 target = le16_to_cpu(res->cfg_entry.array_id) & 0xFF; 4356 lun = PMCRAID_VSET_LUN_ID; 4357 } else { 4358 bus = PMCRAID_PHYS_BUS_ID; 4359 target = 4360 RES_TARGET( 4361 res->cfg_entry.resource_address); 4362 lun = RES_LUN(res->cfg_entry.resource_address); 4363 } 4364 4365 res->change_detected = 0; 4366 spin_unlock_irqrestore(&pinstance->resource_lock, 4367 lock_flags); 4368 scsi_add_device(pinstance->host, bus, target, lun); 4369 spin_lock_irqsave(&pinstance->resource_lock, 4370 lock_flags); 4371 } 4372 } 4373 4374 spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags); 4375 } 4376 4377 /** 4378 * pmcraid_tasklet_function - Tasklet function 4379 * 4380 * @instance: pointer to msix param structure 4381 * 4382 * Return Value 4383 * None 4384 */ 4385 static void pmcraid_tasklet_function(unsigned long instance) 4386 { 4387 struct pmcraid_isr_param *hrrq_vector; 4388 struct pmcraid_instance *pinstance; 4389 unsigned long hrrq_lock_flags; 4390 unsigned long pending_lock_flags; 4391 unsigned long host_lock_flags; 4392 spinlock_t *lockp; /* hrrq buffer lock */ 4393 int id; 4394 u32 resp; 4395 4396 hrrq_vector = (struct pmcraid_isr_param *)instance; 4397 pinstance = hrrq_vector->drv_inst; 4398 id = hrrq_vector->hrrq_id; 4399 lockp = &(pinstance->hrrq_lock[id]); 4400 4401 /* loop through each of the commands responded by IOA. Each HRRQ buf is 4402 * protected by its own lock. Traversals must be done within this lock 4403 * as there may be multiple tasklets running on multiple CPUs. Note 4404 * that the lock is held just for picking up the response handle and 4405 * manipulating hrrq_curr/toggle_bit values. 4406 */ 4407 spin_lock_irqsave(lockp, hrrq_lock_flags); 4408 4409 resp = le32_to_cpu(*(pinstance->hrrq_curr[id])); 4410 4411 while ((resp & HRRQ_TOGGLE_BIT) == 4412 pinstance->host_toggle_bit[id]) { 4413 4414 int cmd_index = resp >> 2; 4415 struct pmcraid_cmd *cmd = NULL; 4416 4417 if (pinstance->hrrq_curr[id] < pinstance->hrrq_end[id]) { 4418 pinstance->hrrq_curr[id]++; 4419 } else { 4420 pinstance->hrrq_curr[id] = pinstance->hrrq_start[id]; 4421 pinstance->host_toggle_bit[id] ^= 1u; 4422 } 4423 4424 if (cmd_index >= PMCRAID_MAX_CMD) { 4425 /* In case of invalid response handle, log message */ 4426 pmcraid_err("Invalid response handle %d\n", cmd_index); 4427 resp = le32_to_cpu(*(pinstance->hrrq_curr[id])); 4428 continue; 4429 } 4430 4431 cmd = pinstance->cmd_list[cmd_index]; 4432 spin_unlock_irqrestore(lockp, hrrq_lock_flags); 4433 4434 spin_lock_irqsave(&pinstance->pending_pool_lock, 4435 pending_lock_flags); 4436 list_del(&cmd->free_list); 4437 spin_unlock_irqrestore(&pinstance->pending_pool_lock, 4438 pending_lock_flags); 4439 del_timer(&cmd->timer); 4440 atomic_dec(&pinstance->outstanding_cmds); 4441 4442 if (cmd->cmd_done == pmcraid_ioa_reset) { 4443 spin_lock_irqsave(pinstance->host->host_lock, 4444 host_lock_flags); 4445 cmd->cmd_done(cmd); 4446 spin_unlock_irqrestore(pinstance->host->host_lock, 4447 host_lock_flags); 4448 } else if (cmd->cmd_done != NULL) { 4449 cmd->cmd_done(cmd); 4450 } 4451 /* loop over until we are done with all responses */ 4452 spin_lock_irqsave(lockp, hrrq_lock_flags); 4453 resp = le32_to_cpu(*(pinstance->hrrq_curr[id])); 4454 } 4455 4456 spin_unlock_irqrestore(lockp, hrrq_lock_flags); 4457 } 4458 4459 /** 4460 * pmcraid_unregister_interrupt_handler - de-register interrupts handlers 4461 * @pinstance: pointer to adapter instance structure 4462 * 4463 * This routine un-registers registered interrupt handler and 4464 * also frees irqs/vectors. 4465 * 4466 * Retun Value 4467 * None 4468 */ 4469 static 4470 void pmcraid_unregister_interrupt_handler(struct pmcraid_instance *pinstance) 4471 { 4472 struct pci_dev *pdev = pinstance->pdev; 4473 int i; 4474 4475 for (i = 0; i < pinstance->num_hrrq; i++) 4476 free_irq(pci_irq_vector(pdev, i), &pinstance->hrrq_vector[i]); 4477 4478 pinstance->interrupt_mode = 0; 4479 pci_free_irq_vectors(pdev); 4480 } 4481 4482 /** 4483 * pmcraid_register_interrupt_handler - registers interrupt handler 4484 * @pinstance: pointer to per-adapter instance structure 4485 * 4486 * Return Value 4487 * 0 on success, non-zero error code otherwise. 4488 */ 4489 static int 4490 pmcraid_register_interrupt_handler(struct pmcraid_instance *pinstance) 4491 { 4492 struct pci_dev *pdev = pinstance->pdev; 4493 unsigned int irq_flag = PCI_IRQ_LEGACY, flag; 4494 int num_hrrq, rc, i; 4495 irq_handler_t isr; 4496 4497 if (pmcraid_enable_msix) 4498 irq_flag |= PCI_IRQ_MSIX; 4499 4500 num_hrrq = pci_alloc_irq_vectors(pdev, 1, PMCRAID_NUM_MSIX_VECTORS, 4501 irq_flag); 4502 if (num_hrrq < 0) 4503 return num_hrrq; 4504 4505 if (pdev->msix_enabled) { 4506 flag = 0; 4507 isr = pmcraid_isr_msix; 4508 } else { 4509 flag = IRQF_SHARED; 4510 isr = pmcraid_isr; 4511 } 4512 4513 for (i = 0; i < num_hrrq; i++) { 4514 struct pmcraid_isr_param *vec = &pinstance->hrrq_vector[i]; 4515 4516 vec->hrrq_id = i; 4517 vec->drv_inst = pinstance; 4518 rc = request_irq(pci_irq_vector(pdev, i), isr, flag, 4519 PMCRAID_DRIVER_NAME, vec); 4520 if (rc) 4521 goto out_unwind; 4522 } 4523 4524 pinstance->num_hrrq = num_hrrq; 4525 if (pdev->msix_enabled) { 4526 pinstance->interrupt_mode = 1; 4527 iowrite32(DOORBELL_INTR_MODE_MSIX, 4528 pinstance->int_regs.host_ioa_interrupt_reg); 4529 ioread32(pinstance->int_regs.host_ioa_interrupt_reg); 4530 } 4531 4532 return 0; 4533 4534 out_unwind: 4535 while (--i > 0) 4536 free_irq(pci_irq_vector(pdev, i), &pinstance->hrrq_vector[i]); 4537 pci_free_irq_vectors(pdev); 4538 return rc; 4539 } 4540 4541 /** 4542 * pmcraid_release_cmd_blocks - release buufers allocated for command blocks 4543 * @pinstance: per adapter instance structure pointer 4544 * @max_index: number of buffer blocks to release 4545 * 4546 * Return Value 4547 * None 4548 */ 4549 static void 4550 pmcraid_release_cmd_blocks(struct pmcraid_instance *pinstance, int max_index) 4551 { 4552 int i; 4553 for (i = 0; i < max_index; i++) { 4554 kmem_cache_free(pinstance->cmd_cachep, pinstance->cmd_list[i]); 4555 pinstance->cmd_list[i] = NULL; 4556 } 4557 kmem_cache_destroy(pinstance->cmd_cachep); 4558 pinstance->cmd_cachep = NULL; 4559 } 4560 4561 /** 4562 * pmcraid_release_control_blocks - releases buffers alloced for control blocks 4563 * @pinstance: pointer to per adapter instance structure 4564 * @max_index: number of buffers (from 0 onwards) to release 4565 * 4566 * This function assumes that the command blocks for which control blocks are 4567 * linked are not released. 4568 * 4569 * Return Value 4570 * None 4571 */ 4572 static void 4573 pmcraid_release_control_blocks( 4574 struct pmcraid_instance *pinstance, 4575 int max_index 4576 ) 4577 { 4578 int i; 4579 4580 if (pinstance->control_pool == NULL) 4581 return; 4582 4583 for (i = 0; i < max_index; i++) { 4584 dma_pool_free(pinstance->control_pool, 4585 pinstance->cmd_list[i]->ioa_cb, 4586 pinstance->cmd_list[i]->ioa_cb_bus_addr); 4587 pinstance->cmd_list[i]->ioa_cb = NULL; 4588 pinstance->cmd_list[i]->ioa_cb_bus_addr = 0; 4589 } 4590 dma_pool_destroy(pinstance->control_pool); 4591 pinstance->control_pool = NULL; 4592 } 4593 4594 /** 4595 * pmcraid_allocate_cmd_blocks - allocate memory for cmd block structures 4596 * @pinstance - pointer to per adapter instance structure 4597 * 4598 * Allocates memory for command blocks using kernel slab allocator. 4599 * 4600 * Return Value 4601 * 0 in case of success; -ENOMEM in case of failure 4602 */ 4603 static int pmcraid_allocate_cmd_blocks(struct pmcraid_instance *pinstance) 4604 { 4605 int i; 4606 4607 sprintf(pinstance->cmd_pool_name, "pmcraid_cmd_pool_%d", 4608 pinstance->host->unique_id); 4609 4610 4611 pinstance->cmd_cachep = kmem_cache_create( 4612 pinstance->cmd_pool_name, 4613 sizeof(struct pmcraid_cmd), 0, 4614 SLAB_HWCACHE_ALIGN, NULL); 4615 if (!pinstance->cmd_cachep) 4616 return -ENOMEM; 4617 4618 for (i = 0; i < PMCRAID_MAX_CMD; i++) { 4619 pinstance->cmd_list[i] = 4620 kmem_cache_alloc(pinstance->cmd_cachep, GFP_KERNEL); 4621 if (!pinstance->cmd_list[i]) { 4622 pmcraid_release_cmd_blocks(pinstance, i); 4623 return -ENOMEM; 4624 } 4625 } 4626 return 0; 4627 } 4628 4629 /** 4630 * pmcraid_allocate_control_blocks - allocates memory control blocks 4631 * @pinstance : pointer to per adapter instance structure 4632 * 4633 * This function allocates PCI memory for DMAable buffers like IOARCB, IOADLs 4634 * and IOASAs. This is called after command blocks are already allocated. 4635 * 4636 * Return Value 4637 * 0 in case it can allocate all control blocks, otherwise -ENOMEM 4638 */ 4639 static int pmcraid_allocate_control_blocks(struct pmcraid_instance *pinstance) 4640 { 4641 int i; 4642 4643 sprintf(pinstance->ctl_pool_name, "pmcraid_control_pool_%d", 4644 pinstance->host->unique_id); 4645 4646 pinstance->control_pool = 4647 dma_pool_create(pinstance->ctl_pool_name, 4648 &pinstance->pdev->dev, 4649 sizeof(struct pmcraid_control_block), 4650 PMCRAID_IOARCB_ALIGNMENT, 0); 4651 4652 if (!pinstance->control_pool) 4653 return -ENOMEM; 4654 4655 for (i = 0; i < PMCRAID_MAX_CMD; i++) { 4656 pinstance->cmd_list[i]->ioa_cb = 4657 dma_pool_alloc( 4658 pinstance->control_pool, 4659 GFP_KERNEL, 4660 &(pinstance->cmd_list[i]->ioa_cb_bus_addr)); 4661 4662 if (!pinstance->cmd_list[i]->ioa_cb) { 4663 pmcraid_release_control_blocks(pinstance, i); 4664 return -ENOMEM; 4665 } 4666 memset(pinstance->cmd_list[i]->ioa_cb, 0, 4667 sizeof(struct pmcraid_control_block)); 4668 } 4669 return 0; 4670 } 4671 4672 /** 4673 * pmcraid_release_host_rrqs - release memory allocated for hrrq buffer(s) 4674 * @pinstance: pointer to per adapter instance structure 4675 * @maxindex: size of hrrq buffer pointer array 4676 * 4677 * Return Value 4678 * None 4679 */ 4680 static void 4681 pmcraid_release_host_rrqs(struct pmcraid_instance *pinstance, int maxindex) 4682 { 4683 int i; 4684 4685 for (i = 0; i < maxindex; i++) { 4686 dma_free_coherent(&pinstance->pdev->dev, 4687 HRRQ_ENTRY_SIZE * PMCRAID_MAX_CMD, 4688 pinstance->hrrq_start[i], 4689 pinstance->hrrq_start_bus_addr[i]); 4690 4691 /* reset pointers and toggle bit to zeros */ 4692 pinstance->hrrq_start[i] = NULL; 4693 pinstance->hrrq_start_bus_addr[i] = 0; 4694 pinstance->host_toggle_bit[i] = 0; 4695 } 4696 } 4697 4698 /** 4699 * pmcraid_allocate_host_rrqs - Allocate and initialize host RRQ buffers 4700 * @pinstance: pointer to per adapter instance structure 4701 * 4702 * Return value 4703 * 0 hrrq buffers are allocated, -ENOMEM otherwise. 4704 */ 4705 static int pmcraid_allocate_host_rrqs(struct pmcraid_instance *pinstance) 4706 { 4707 int i, buffer_size; 4708 4709 buffer_size = HRRQ_ENTRY_SIZE * PMCRAID_MAX_CMD; 4710 4711 for (i = 0; i < pinstance->num_hrrq; i++) { 4712 pinstance->hrrq_start[i] = 4713 dma_alloc_coherent(&pinstance->pdev->dev, buffer_size, 4714 &pinstance->hrrq_start_bus_addr[i], 4715 GFP_KERNEL); 4716 if (!pinstance->hrrq_start[i]) { 4717 pmcraid_err("pci_alloc failed for hrrq vector : %d\n", 4718 i); 4719 pmcraid_release_host_rrqs(pinstance, i); 4720 return -ENOMEM; 4721 } 4722 4723 memset(pinstance->hrrq_start[i], 0, buffer_size); 4724 pinstance->hrrq_curr[i] = pinstance->hrrq_start[i]; 4725 pinstance->hrrq_end[i] = 4726 pinstance->hrrq_start[i] + PMCRAID_MAX_CMD - 1; 4727 pinstance->host_toggle_bit[i] = 1; 4728 spin_lock_init(&pinstance->hrrq_lock[i]); 4729 } 4730 return 0; 4731 } 4732 4733 /** 4734 * pmcraid_release_hcams - release HCAM buffers 4735 * 4736 * @pinstance: pointer to per adapter instance structure 4737 * 4738 * Return value 4739 * none 4740 */ 4741 static void pmcraid_release_hcams(struct pmcraid_instance *pinstance) 4742 { 4743 if (pinstance->ccn.msg != NULL) { 4744 dma_free_coherent(&pinstance->pdev->dev, 4745 PMCRAID_AEN_HDR_SIZE + 4746 sizeof(struct pmcraid_hcam_ccn_ext), 4747 pinstance->ccn.msg, 4748 pinstance->ccn.baddr); 4749 4750 pinstance->ccn.msg = NULL; 4751 pinstance->ccn.hcam = NULL; 4752 pinstance->ccn.baddr = 0; 4753 } 4754 4755 if (pinstance->ldn.msg != NULL) { 4756 dma_free_coherent(&pinstance->pdev->dev, 4757 PMCRAID_AEN_HDR_SIZE + 4758 sizeof(struct pmcraid_hcam_ldn), 4759 pinstance->ldn.msg, 4760 pinstance->ldn.baddr); 4761 4762 pinstance->ldn.msg = NULL; 4763 pinstance->ldn.hcam = NULL; 4764 pinstance->ldn.baddr = 0; 4765 } 4766 } 4767 4768 /** 4769 * pmcraid_allocate_hcams - allocates HCAM buffers 4770 * @pinstance : pointer to per adapter instance structure 4771 * 4772 * Return Value: 4773 * 0 in case of successful allocation, non-zero otherwise 4774 */ 4775 static int pmcraid_allocate_hcams(struct pmcraid_instance *pinstance) 4776 { 4777 pinstance->ccn.msg = dma_alloc_coherent(&pinstance->pdev->dev, 4778 PMCRAID_AEN_HDR_SIZE + 4779 sizeof(struct pmcraid_hcam_ccn_ext), 4780 &pinstance->ccn.baddr, GFP_KERNEL); 4781 4782 pinstance->ldn.msg = dma_alloc_coherent(&pinstance->pdev->dev, 4783 PMCRAID_AEN_HDR_SIZE + 4784 sizeof(struct pmcraid_hcam_ldn), 4785 &pinstance->ldn.baddr, GFP_KERNEL); 4786 4787 if (pinstance->ldn.msg == NULL || pinstance->ccn.msg == NULL) { 4788 pmcraid_release_hcams(pinstance); 4789 } else { 4790 pinstance->ccn.hcam = 4791 (void *)pinstance->ccn.msg + PMCRAID_AEN_HDR_SIZE; 4792 pinstance->ldn.hcam = 4793 (void *)pinstance->ldn.msg + PMCRAID_AEN_HDR_SIZE; 4794 4795 atomic_set(&pinstance->ccn.ignore, 0); 4796 atomic_set(&pinstance->ldn.ignore, 0); 4797 } 4798 4799 return (pinstance->ldn.msg == NULL) ? -ENOMEM : 0; 4800 } 4801 4802 /** 4803 * pmcraid_release_config_buffers - release config.table buffers 4804 * @pinstance: pointer to per adapter instance structure 4805 * 4806 * Return Value 4807 * none 4808 */ 4809 static void pmcraid_release_config_buffers(struct pmcraid_instance *pinstance) 4810 { 4811 if (pinstance->cfg_table != NULL && 4812 pinstance->cfg_table_bus_addr != 0) { 4813 dma_free_coherent(&pinstance->pdev->dev, 4814 sizeof(struct pmcraid_config_table), 4815 pinstance->cfg_table, 4816 pinstance->cfg_table_bus_addr); 4817 pinstance->cfg_table = NULL; 4818 pinstance->cfg_table_bus_addr = 0; 4819 } 4820 4821 if (pinstance->res_entries != NULL) { 4822 int i; 4823 4824 for (i = 0; i < PMCRAID_MAX_RESOURCES; i++) 4825 list_del(&pinstance->res_entries[i].queue); 4826 kfree(pinstance->res_entries); 4827 pinstance->res_entries = NULL; 4828 } 4829 4830 pmcraid_release_hcams(pinstance); 4831 } 4832 4833 /** 4834 * pmcraid_allocate_config_buffers - allocates DMAable memory for config table 4835 * @pinstance : pointer to per adapter instance structure 4836 * 4837 * Return Value 4838 * 0 for successful allocation, -ENOMEM for any failure 4839 */ 4840 static int pmcraid_allocate_config_buffers(struct pmcraid_instance *pinstance) 4841 { 4842 int i; 4843 4844 pinstance->res_entries = 4845 kcalloc(PMCRAID_MAX_RESOURCES, 4846 sizeof(struct pmcraid_resource_entry), 4847 GFP_KERNEL); 4848 4849 if (NULL == pinstance->res_entries) { 4850 pmcraid_err("failed to allocate memory for resource table\n"); 4851 return -ENOMEM; 4852 } 4853 4854 for (i = 0; i < PMCRAID_MAX_RESOURCES; i++) 4855 list_add_tail(&pinstance->res_entries[i].queue, 4856 &pinstance->free_res_q); 4857 4858 pinstance->cfg_table = dma_alloc_coherent(&pinstance->pdev->dev, 4859 sizeof(struct pmcraid_config_table), 4860 &pinstance->cfg_table_bus_addr, 4861 GFP_KERNEL); 4862 4863 if (NULL == pinstance->cfg_table) { 4864 pmcraid_err("couldn't alloc DMA memory for config table\n"); 4865 pmcraid_release_config_buffers(pinstance); 4866 return -ENOMEM; 4867 } 4868 4869 if (pmcraid_allocate_hcams(pinstance)) { 4870 pmcraid_err("could not alloc DMA memory for HCAMS\n"); 4871 pmcraid_release_config_buffers(pinstance); 4872 return -ENOMEM; 4873 } 4874 4875 return 0; 4876 } 4877 4878 /** 4879 * pmcraid_init_tasklets - registers tasklets for response handling 4880 * 4881 * @pinstance: pointer adapter instance structure 4882 * 4883 * Return value 4884 * none 4885 */ 4886 static void pmcraid_init_tasklets(struct pmcraid_instance *pinstance) 4887 { 4888 int i; 4889 for (i = 0; i < pinstance->num_hrrq; i++) 4890 tasklet_init(&pinstance->isr_tasklet[i], 4891 pmcraid_tasklet_function, 4892 (unsigned long)&pinstance->hrrq_vector[i]); 4893 } 4894 4895 /** 4896 * pmcraid_kill_tasklets - destroys tasklets registered for response handling 4897 * 4898 * @pinstance: pointer to adapter instance structure 4899 * 4900 * Return value 4901 * none 4902 */ 4903 static void pmcraid_kill_tasklets(struct pmcraid_instance *pinstance) 4904 { 4905 int i; 4906 for (i = 0; i < pinstance->num_hrrq; i++) 4907 tasklet_kill(&pinstance->isr_tasklet[i]); 4908 } 4909 4910 /** 4911 * pmcraid_release_buffers - release per-adapter buffers allocated 4912 * 4913 * @pinstance: pointer to adapter soft state 4914 * 4915 * Return Value 4916 * none 4917 */ 4918 static void pmcraid_release_buffers(struct pmcraid_instance *pinstance) 4919 { 4920 pmcraid_release_config_buffers(pinstance); 4921 pmcraid_release_control_blocks(pinstance, PMCRAID_MAX_CMD); 4922 pmcraid_release_cmd_blocks(pinstance, PMCRAID_MAX_CMD); 4923 pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq); 4924 4925 if (pinstance->inq_data != NULL) { 4926 dma_free_coherent(&pinstance->pdev->dev, 4927 sizeof(struct pmcraid_inquiry_data), 4928 pinstance->inq_data, 4929 pinstance->inq_data_baddr); 4930 4931 pinstance->inq_data = NULL; 4932 pinstance->inq_data_baddr = 0; 4933 } 4934 4935 if (pinstance->timestamp_data != NULL) { 4936 dma_free_coherent(&pinstance->pdev->dev, 4937 sizeof(struct pmcraid_timestamp_data), 4938 pinstance->timestamp_data, 4939 pinstance->timestamp_data_baddr); 4940 4941 pinstance->timestamp_data = NULL; 4942 pinstance->timestamp_data_baddr = 0; 4943 } 4944 } 4945 4946 /** 4947 * pmcraid_init_buffers - allocates memory and initializes various structures 4948 * @pinstance: pointer to per adapter instance structure 4949 * 4950 * This routine pre-allocates memory based on the type of block as below: 4951 * cmdblocks(PMCRAID_MAX_CMD): kernel memory using kernel's slab_allocator, 4952 * IOARCBs(PMCRAID_MAX_CMD) : DMAable memory, using pci pool allocator 4953 * config-table entries : DMAable memory using dma_alloc_coherent 4954 * HostRRQs : DMAable memory, using dma_alloc_coherent 4955 * 4956 * Return Value 4957 * 0 in case all of the blocks are allocated, -ENOMEM otherwise. 4958 */ 4959 static int pmcraid_init_buffers(struct pmcraid_instance *pinstance) 4960 { 4961 int i; 4962 4963 if (pmcraid_allocate_host_rrqs(pinstance)) { 4964 pmcraid_err("couldn't allocate memory for %d host rrqs\n", 4965 pinstance->num_hrrq); 4966 return -ENOMEM; 4967 } 4968 4969 if (pmcraid_allocate_config_buffers(pinstance)) { 4970 pmcraid_err("couldn't allocate memory for config buffers\n"); 4971 pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq); 4972 return -ENOMEM; 4973 } 4974 4975 if (pmcraid_allocate_cmd_blocks(pinstance)) { 4976 pmcraid_err("couldn't allocate memory for cmd blocks\n"); 4977 pmcraid_release_config_buffers(pinstance); 4978 pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq); 4979 return -ENOMEM; 4980 } 4981 4982 if (pmcraid_allocate_control_blocks(pinstance)) { 4983 pmcraid_err("couldn't allocate memory control blocks\n"); 4984 pmcraid_release_config_buffers(pinstance); 4985 pmcraid_release_cmd_blocks(pinstance, PMCRAID_MAX_CMD); 4986 pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq); 4987 return -ENOMEM; 4988 } 4989 4990 /* allocate DMAable memory for page D0 INQUIRY buffer */ 4991 pinstance->inq_data = dma_alloc_coherent(&pinstance->pdev->dev, 4992 sizeof(struct pmcraid_inquiry_data), 4993 &pinstance->inq_data_baddr, GFP_KERNEL); 4994 if (pinstance->inq_data == NULL) { 4995 pmcraid_err("couldn't allocate DMA memory for INQUIRY\n"); 4996 pmcraid_release_buffers(pinstance); 4997 return -ENOMEM; 4998 } 4999 5000 /* allocate DMAable memory for set timestamp data buffer */ 5001 pinstance->timestamp_data = dma_alloc_coherent(&pinstance->pdev->dev, 5002 sizeof(struct pmcraid_timestamp_data), 5003 &pinstance->timestamp_data_baddr, 5004 GFP_KERNEL); 5005 if (pinstance->timestamp_data == NULL) { 5006 pmcraid_err("couldn't allocate DMA memory for \ 5007 set time_stamp \n"); 5008 pmcraid_release_buffers(pinstance); 5009 return -ENOMEM; 5010 } 5011 5012 5013 /* Initialize all the command blocks and add them to free pool. No 5014 * need to lock (free_pool_lock) as this is done in initialization 5015 * itself 5016 */ 5017 for (i = 0; i < PMCRAID_MAX_CMD; i++) { 5018 struct pmcraid_cmd *cmdp = pinstance->cmd_list[i]; 5019 pmcraid_init_cmdblk(cmdp, i); 5020 cmdp->drv_inst = pinstance; 5021 list_add_tail(&cmdp->free_list, &pinstance->free_cmd_pool); 5022 } 5023 5024 return 0; 5025 } 5026 5027 /** 5028 * pmcraid_reinit_buffers - resets various buffer pointers 5029 * @pinstance: pointer to adapter instance 5030 * Return value 5031 * none 5032 */ 5033 static void pmcraid_reinit_buffers(struct pmcraid_instance *pinstance) 5034 { 5035 int i; 5036 int buffer_size = HRRQ_ENTRY_SIZE * PMCRAID_MAX_CMD; 5037 5038 for (i = 0; i < pinstance->num_hrrq; i++) { 5039 memset(pinstance->hrrq_start[i], 0, buffer_size); 5040 pinstance->hrrq_curr[i] = pinstance->hrrq_start[i]; 5041 pinstance->hrrq_end[i] = 5042 pinstance->hrrq_start[i] + PMCRAID_MAX_CMD - 1; 5043 pinstance->host_toggle_bit[i] = 1; 5044 } 5045 } 5046 5047 /** 5048 * pmcraid_init_instance - initialize per instance data structure 5049 * @pdev: pointer to pci device structure 5050 * @host: pointer to Scsi_Host structure 5051 * @mapped_pci_addr: memory mapped IOA configuration registers 5052 * 5053 * Return Value 5054 * 0 on success, non-zero in case of any failure 5055 */ 5056 static int pmcraid_init_instance(struct pci_dev *pdev, struct Scsi_Host *host, 5057 void __iomem *mapped_pci_addr) 5058 { 5059 struct pmcraid_instance *pinstance = 5060 (struct pmcraid_instance *)host->hostdata; 5061 5062 pinstance->host = host; 5063 pinstance->pdev = pdev; 5064 5065 /* Initialize register addresses */ 5066 pinstance->mapped_dma_addr = mapped_pci_addr; 5067 5068 /* Initialize chip-specific details */ 5069 { 5070 struct pmcraid_chip_details *chip_cfg = pinstance->chip_cfg; 5071 struct pmcraid_interrupts *pint_regs = &pinstance->int_regs; 5072 5073 pinstance->ioarrin = mapped_pci_addr + chip_cfg->ioarrin; 5074 5075 pint_regs->ioa_host_interrupt_reg = 5076 mapped_pci_addr + chip_cfg->ioa_host_intr; 5077 pint_regs->ioa_host_interrupt_clr_reg = 5078 mapped_pci_addr + chip_cfg->ioa_host_intr_clr; 5079 pint_regs->ioa_host_msix_interrupt_reg = 5080 mapped_pci_addr + chip_cfg->ioa_host_msix_intr; 5081 pint_regs->host_ioa_interrupt_reg = 5082 mapped_pci_addr + chip_cfg->host_ioa_intr; 5083 pint_regs->host_ioa_interrupt_clr_reg = 5084 mapped_pci_addr + chip_cfg->host_ioa_intr_clr; 5085 5086 /* Current version of firmware exposes interrupt mask set 5087 * and mask clr registers through memory mapped bar0. 5088 */ 5089 pinstance->mailbox = mapped_pci_addr + chip_cfg->mailbox; 5090 pinstance->ioa_status = mapped_pci_addr + chip_cfg->ioastatus; 5091 pint_regs->ioa_host_interrupt_mask_reg = 5092 mapped_pci_addr + chip_cfg->ioa_host_mask; 5093 pint_regs->ioa_host_interrupt_mask_clr_reg = 5094 mapped_pci_addr + chip_cfg->ioa_host_mask_clr; 5095 pint_regs->global_interrupt_mask_reg = 5096 mapped_pci_addr + chip_cfg->global_intr_mask; 5097 }; 5098 5099 pinstance->ioa_reset_attempts = 0; 5100 init_waitqueue_head(&pinstance->reset_wait_q); 5101 5102 atomic_set(&pinstance->outstanding_cmds, 0); 5103 atomic_set(&pinstance->last_message_id, 0); 5104 atomic_set(&pinstance->expose_resources, 0); 5105 5106 INIT_LIST_HEAD(&pinstance->free_res_q); 5107 INIT_LIST_HEAD(&pinstance->used_res_q); 5108 INIT_LIST_HEAD(&pinstance->free_cmd_pool); 5109 INIT_LIST_HEAD(&pinstance->pending_cmd_pool); 5110 5111 spin_lock_init(&pinstance->free_pool_lock); 5112 spin_lock_init(&pinstance->pending_pool_lock); 5113 spin_lock_init(&pinstance->resource_lock); 5114 mutex_init(&pinstance->aen_queue_lock); 5115 5116 /* Work-queue (Shared) for deferred processing error handling */ 5117 INIT_WORK(&pinstance->worker_q, pmcraid_worker_function); 5118 5119 /* Initialize the default log_level */ 5120 pinstance->current_log_level = pmcraid_log_level; 5121 5122 /* Setup variables required for reset engine */ 5123 pinstance->ioa_state = IOA_STATE_UNKNOWN; 5124 pinstance->reset_cmd = NULL; 5125 return 0; 5126 } 5127 5128 /** 5129 * pmcraid_shutdown - shutdown adapter controller. 5130 * @pdev: pci device struct 5131 * 5132 * Issues an adapter shutdown to the card waits for its completion 5133 * 5134 * Return value 5135 * none 5136 */ 5137 static void pmcraid_shutdown(struct pci_dev *pdev) 5138 { 5139 struct pmcraid_instance *pinstance = pci_get_drvdata(pdev); 5140 pmcraid_reset_bringdown(pinstance); 5141 } 5142 5143 5144 /** 5145 * pmcraid_get_minor - returns unused minor number from minor number bitmap 5146 */ 5147 static unsigned short pmcraid_get_minor(void) 5148 { 5149 int minor; 5150 5151 minor = find_first_zero_bit(pmcraid_minor, PMCRAID_MAX_ADAPTERS); 5152 __set_bit(minor, pmcraid_minor); 5153 return minor; 5154 } 5155 5156 /** 5157 * pmcraid_release_minor - releases given minor back to minor number bitmap 5158 */ 5159 static void pmcraid_release_minor(unsigned short minor) 5160 { 5161 __clear_bit(minor, pmcraid_minor); 5162 } 5163 5164 /** 5165 * pmcraid_setup_chrdev - allocates a minor number and registers a char device 5166 * 5167 * @pinstance: pointer to adapter instance for which to register device 5168 * 5169 * Return value 5170 * 0 in case of success, otherwise non-zero 5171 */ 5172 static int pmcraid_setup_chrdev(struct pmcraid_instance *pinstance) 5173 { 5174 int minor; 5175 int error; 5176 5177 minor = pmcraid_get_minor(); 5178 cdev_init(&pinstance->cdev, &pmcraid_fops); 5179 pinstance->cdev.owner = THIS_MODULE; 5180 5181 error = cdev_add(&pinstance->cdev, MKDEV(pmcraid_major, minor), 1); 5182 5183 if (error) 5184 pmcraid_release_minor(minor); 5185 else 5186 device_create(pmcraid_class, NULL, MKDEV(pmcraid_major, minor), 5187 NULL, "%s%u", PMCRAID_DEVFILE, minor); 5188 return error; 5189 } 5190 5191 /** 5192 * pmcraid_release_chrdev - unregisters per-adapter management interface 5193 * 5194 * @pinstance: pointer to adapter instance structure 5195 * 5196 * Return value 5197 * none 5198 */ 5199 static void pmcraid_release_chrdev(struct pmcraid_instance *pinstance) 5200 { 5201 pmcraid_release_minor(MINOR(pinstance->cdev.dev)); 5202 device_destroy(pmcraid_class, 5203 MKDEV(pmcraid_major, MINOR(pinstance->cdev.dev))); 5204 cdev_del(&pinstance->cdev); 5205 } 5206 5207 /** 5208 * pmcraid_remove - IOA hot plug remove entry point 5209 * @pdev: pci device struct 5210 * 5211 * Return value 5212 * none 5213 */ 5214 static void pmcraid_remove(struct pci_dev *pdev) 5215 { 5216 struct pmcraid_instance *pinstance = pci_get_drvdata(pdev); 5217 5218 /* remove the management interface (/dev file) for this device */ 5219 pmcraid_release_chrdev(pinstance); 5220 5221 /* remove host template from scsi midlayer */ 5222 scsi_remove_host(pinstance->host); 5223 5224 /* block requests from mid-layer */ 5225 scsi_block_requests(pinstance->host); 5226 5227 /* initiate shutdown adapter */ 5228 pmcraid_shutdown(pdev); 5229 5230 pmcraid_disable_interrupts(pinstance, ~0); 5231 flush_work(&pinstance->worker_q); 5232 5233 pmcraid_kill_tasklets(pinstance); 5234 pmcraid_unregister_interrupt_handler(pinstance); 5235 pmcraid_release_buffers(pinstance); 5236 iounmap(pinstance->mapped_dma_addr); 5237 pci_release_regions(pdev); 5238 scsi_host_put(pinstance->host); 5239 pci_disable_device(pdev); 5240 5241 return; 5242 } 5243 5244 #ifdef CONFIG_PM 5245 /** 5246 * pmcraid_suspend - driver suspend entry point for power management 5247 * @pdev: PCI device structure 5248 * @state: PCI power state to suspend routine 5249 * 5250 * Return Value - 0 always 5251 */ 5252 static int pmcraid_suspend(struct pci_dev *pdev, pm_message_t state) 5253 { 5254 struct pmcraid_instance *pinstance = pci_get_drvdata(pdev); 5255 5256 pmcraid_shutdown(pdev); 5257 pmcraid_disable_interrupts(pinstance, ~0); 5258 pmcraid_kill_tasklets(pinstance); 5259 pci_set_drvdata(pinstance->pdev, pinstance); 5260 pmcraid_unregister_interrupt_handler(pinstance); 5261 pci_save_state(pdev); 5262 pci_disable_device(pdev); 5263 pci_set_power_state(pdev, pci_choose_state(pdev, state)); 5264 5265 return 0; 5266 } 5267 5268 /** 5269 * pmcraid_resume - driver resume entry point PCI power management 5270 * @pdev: PCI device structure 5271 * 5272 * Return Value - 0 in case of success. Error code in case of any failure 5273 */ 5274 static int pmcraid_resume(struct pci_dev *pdev) 5275 { 5276 struct pmcraid_instance *pinstance = pci_get_drvdata(pdev); 5277 struct Scsi_Host *host = pinstance->host; 5278 int rc; 5279 5280 pci_set_power_state(pdev, PCI_D0); 5281 pci_enable_wake(pdev, PCI_D0, 0); 5282 pci_restore_state(pdev); 5283 5284 rc = pci_enable_device(pdev); 5285 5286 if (rc) { 5287 dev_err(&pdev->dev, "resume: Enable device failed\n"); 5288 return rc; 5289 } 5290 5291 pci_set_master(pdev); 5292 5293 if (sizeof(dma_addr_t) == 4 || 5294 dma_set_mask(&pdev->dev, DMA_BIT_MASK(64))) 5295 rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)); 5296 5297 if (rc == 0) 5298 rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32)); 5299 5300 if (rc != 0) { 5301 dev_err(&pdev->dev, "resume: Failed to set PCI DMA mask\n"); 5302 goto disable_device; 5303 } 5304 5305 pmcraid_disable_interrupts(pinstance, ~0); 5306 atomic_set(&pinstance->outstanding_cmds, 0); 5307 rc = pmcraid_register_interrupt_handler(pinstance); 5308 5309 if (rc) { 5310 dev_err(&pdev->dev, 5311 "resume: couldn't register interrupt handlers\n"); 5312 rc = -ENODEV; 5313 goto release_host; 5314 } 5315 5316 pmcraid_init_tasklets(pinstance); 5317 pmcraid_enable_interrupts(pinstance, PMCRAID_PCI_INTERRUPTS); 5318 5319 /* Start with hard reset sequence which brings up IOA to operational 5320 * state as well as completes the reset sequence. 5321 */ 5322 pinstance->ioa_hard_reset = 1; 5323 5324 /* Start IOA firmware initialization and bring card to Operational 5325 * state. 5326 */ 5327 if (pmcraid_reset_bringup(pinstance)) { 5328 dev_err(&pdev->dev, "couldn't initialize IOA\n"); 5329 rc = -ENODEV; 5330 goto release_tasklets; 5331 } 5332 5333 return 0; 5334 5335 release_tasklets: 5336 pmcraid_disable_interrupts(pinstance, ~0); 5337 pmcraid_kill_tasklets(pinstance); 5338 pmcraid_unregister_interrupt_handler(pinstance); 5339 5340 release_host: 5341 scsi_host_put(host); 5342 5343 disable_device: 5344 pci_disable_device(pdev); 5345 5346 return rc; 5347 } 5348 5349 #else 5350 5351 #define pmcraid_suspend NULL 5352 #define pmcraid_resume NULL 5353 5354 #endif /* CONFIG_PM */ 5355 5356 /** 5357 * pmcraid_complete_ioa_reset - Called by either timer or tasklet during 5358 * completion of the ioa reset 5359 * @cmd: pointer to reset command block 5360 */ 5361 static void pmcraid_complete_ioa_reset(struct pmcraid_cmd *cmd) 5362 { 5363 struct pmcraid_instance *pinstance = cmd->drv_inst; 5364 unsigned long flags; 5365 5366 spin_lock_irqsave(pinstance->host->host_lock, flags); 5367 pmcraid_ioa_reset(cmd); 5368 spin_unlock_irqrestore(pinstance->host->host_lock, flags); 5369 scsi_unblock_requests(pinstance->host); 5370 schedule_work(&pinstance->worker_q); 5371 } 5372 5373 /** 5374 * pmcraid_set_supported_devs - sends SET SUPPORTED DEVICES to IOAFP 5375 * 5376 * @cmd: pointer to pmcraid_cmd structure 5377 * 5378 * Return Value 5379 * 0 for success or non-zero for failure cases 5380 */ 5381 static void pmcraid_set_supported_devs(struct pmcraid_cmd *cmd) 5382 { 5383 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb; 5384 void (*cmd_done) (struct pmcraid_cmd *) = pmcraid_complete_ioa_reset; 5385 5386 pmcraid_reinit_cmdblk(cmd); 5387 5388 ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE); 5389 ioarcb->request_type = REQ_TYPE_IOACMD; 5390 ioarcb->cdb[0] = PMCRAID_SET_SUPPORTED_DEVICES; 5391 ioarcb->cdb[1] = ALL_DEVICES_SUPPORTED; 5392 5393 /* If this was called as part of resource table reinitialization due to 5394 * lost CCN, it is enough to return the command block back to free pool 5395 * as part of set_supported_devs completion function. 5396 */ 5397 if (cmd->drv_inst->reinit_cfg_table) { 5398 cmd->drv_inst->reinit_cfg_table = 0; 5399 cmd->release = 1; 5400 cmd_done = pmcraid_reinit_cfgtable_done; 5401 } 5402 5403 /* we will be done with the reset sequence after set supported devices, 5404 * setup the done function to return the command block back to free 5405 * pool 5406 */ 5407 pmcraid_send_cmd(cmd, 5408 cmd_done, 5409 PMCRAID_SET_SUP_DEV_TIMEOUT, 5410 pmcraid_timeout_handler); 5411 return; 5412 } 5413 5414 /** 5415 * pmcraid_set_timestamp - set the timestamp to IOAFP 5416 * 5417 * @cmd: pointer to pmcraid_cmd structure 5418 * 5419 * Return Value 5420 * 0 for success or non-zero for failure cases 5421 */ 5422 static void pmcraid_set_timestamp(struct pmcraid_cmd *cmd) 5423 { 5424 struct pmcraid_instance *pinstance = cmd->drv_inst; 5425 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb; 5426 __be32 time_stamp_len = cpu_to_be32(PMCRAID_TIMESTAMP_LEN); 5427 struct pmcraid_ioadl_desc *ioadl; 5428 u64 timestamp; 5429 5430 timestamp = ktime_get_real_seconds() * 1000; 5431 5432 pinstance->timestamp_data->timestamp[0] = (__u8)(timestamp); 5433 pinstance->timestamp_data->timestamp[1] = (__u8)((timestamp) >> 8); 5434 pinstance->timestamp_data->timestamp[2] = (__u8)((timestamp) >> 16); 5435 pinstance->timestamp_data->timestamp[3] = (__u8)((timestamp) >> 24); 5436 pinstance->timestamp_data->timestamp[4] = (__u8)((timestamp) >> 32); 5437 pinstance->timestamp_data->timestamp[5] = (__u8)((timestamp) >> 40); 5438 5439 pmcraid_reinit_cmdblk(cmd); 5440 ioarcb->request_type = REQ_TYPE_SCSI; 5441 ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE); 5442 ioarcb->cdb[0] = PMCRAID_SCSI_SET_TIMESTAMP; 5443 ioarcb->cdb[1] = PMCRAID_SCSI_SERVICE_ACTION; 5444 memcpy(&(ioarcb->cdb[6]), &time_stamp_len, sizeof(time_stamp_len)); 5445 5446 ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) + 5447 offsetof(struct pmcraid_ioarcb, 5448 add_data.u.ioadl[0])); 5449 ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc)); 5450 ioarcb->ioarcb_bus_addr &= cpu_to_le64(~(0x1FULL)); 5451 5452 ioarcb->request_flags0 |= NO_LINK_DESCS; 5453 ioarcb->request_flags0 |= TRANSFER_DIR_WRITE; 5454 ioarcb->data_transfer_length = 5455 cpu_to_le32(sizeof(struct pmcraid_timestamp_data)); 5456 ioadl = &(ioarcb->add_data.u.ioadl[0]); 5457 ioadl->flags = IOADL_FLAGS_LAST_DESC; 5458 ioadl->address = cpu_to_le64(pinstance->timestamp_data_baddr); 5459 ioadl->data_len = cpu_to_le32(sizeof(struct pmcraid_timestamp_data)); 5460 5461 if (!pinstance->timestamp_error) { 5462 pinstance->timestamp_error = 0; 5463 pmcraid_send_cmd(cmd, pmcraid_set_supported_devs, 5464 PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler); 5465 } else { 5466 pmcraid_send_cmd(cmd, pmcraid_return_cmd, 5467 PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler); 5468 return; 5469 } 5470 } 5471 5472 5473 /** 5474 * pmcraid_init_res_table - Initialize the resource table 5475 * @cmd: pointer to pmcraid command struct 5476 * 5477 * This function looks through the existing resource table, comparing 5478 * it with the config table. This function will take care of old/new 5479 * devices and schedule adding/removing them from the mid-layer 5480 * as appropriate. 5481 * 5482 * Return value 5483 * None 5484 */ 5485 static void pmcraid_init_res_table(struct pmcraid_cmd *cmd) 5486 { 5487 struct pmcraid_instance *pinstance = cmd->drv_inst; 5488 struct pmcraid_resource_entry *res, *temp; 5489 struct pmcraid_config_table_entry *cfgte; 5490 unsigned long lock_flags; 5491 int found, rc, i; 5492 u16 fw_version; 5493 LIST_HEAD(old_res); 5494 5495 if (pinstance->cfg_table->flags & MICROCODE_UPDATE_REQUIRED) 5496 pmcraid_err("IOA requires microcode download\n"); 5497 5498 fw_version = be16_to_cpu(pinstance->inq_data->fw_version); 5499 5500 /* resource list is protected by pinstance->resource_lock. 5501 * init_res_table can be called from probe (user-thread) or runtime 5502 * reset (timer/tasklet) 5503 */ 5504 spin_lock_irqsave(&pinstance->resource_lock, lock_flags); 5505 5506 list_for_each_entry_safe(res, temp, &pinstance->used_res_q, queue) 5507 list_move_tail(&res->queue, &old_res); 5508 5509 for (i = 0; i < le16_to_cpu(pinstance->cfg_table->num_entries); i++) { 5510 if (be16_to_cpu(pinstance->inq_data->fw_version) <= 5511 PMCRAID_FW_VERSION_1) 5512 cfgte = &pinstance->cfg_table->entries[i]; 5513 else 5514 cfgte = (struct pmcraid_config_table_entry *) 5515 &pinstance->cfg_table->entries_ext[i]; 5516 5517 if (!pmcraid_expose_resource(fw_version, cfgte)) 5518 continue; 5519 5520 found = 0; 5521 5522 /* If this entry was already detected and initialized */ 5523 list_for_each_entry_safe(res, temp, &old_res, queue) { 5524 5525 rc = memcmp(&res->cfg_entry.resource_address, 5526 &cfgte->resource_address, 5527 sizeof(cfgte->resource_address)); 5528 if (!rc) { 5529 list_move_tail(&res->queue, 5530 &pinstance->used_res_q); 5531 found = 1; 5532 break; 5533 } 5534 } 5535 5536 /* If this is new entry, initialize it and add it the queue */ 5537 if (!found) { 5538 5539 if (list_empty(&pinstance->free_res_q)) { 5540 pmcraid_err("Too many devices attached\n"); 5541 break; 5542 } 5543 5544 found = 1; 5545 res = list_entry(pinstance->free_res_q.next, 5546 struct pmcraid_resource_entry, queue); 5547 5548 res->scsi_dev = NULL; 5549 res->change_detected = RES_CHANGE_ADD; 5550 res->reset_progress = 0; 5551 list_move_tail(&res->queue, &pinstance->used_res_q); 5552 } 5553 5554 /* copy new configuration table entry details into driver 5555 * maintained resource entry 5556 */ 5557 if (found) { 5558 memcpy(&res->cfg_entry, cfgte, 5559 pinstance->config_table_entry_size); 5560 pmcraid_info("New res type:%x, vset:%x, addr:%x:\n", 5561 res->cfg_entry.resource_type, 5562 (fw_version <= PMCRAID_FW_VERSION_1 ? 5563 res->cfg_entry.unique_flags1 : 5564 le16_to_cpu(res->cfg_entry.array_id) & 0xFF), 5565 le32_to_cpu(res->cfg_entry.resource_address)); 5566 } 5567 } 5568 5569 /* Detect any deleted entries, mark them for deletion from mid-layer */ 5570 list_for_each_entry_safe(res, temp, &old_res, queue) { 5571 5572 if (res->scsi_dev) { 5573 res->change_detected = RES_CHANGE_DEL; 5574 res->cfg_entry.resource_handle = 5575 PMCRAID_INVALID_RES_HANDLE; 5576 list_move_tail(&res->queue, &pinstance->used_res_q); 5577 } else { 5578 list_move_tail(&res->queue, &pinstance->free_res_q); 5579 } 5580 } 5581 5582 /* release the resource list lock */ 5583 spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags); 5584 pmcraid_set_timestamp(cmd); 5585 } 5586 5587 /** 5588 * pmcraid_querycfg - Send a Query IOA Config to the adapter. 5589 * @cmd: pointer pmcraid_cmd struct 5590 * 5591 * This function sends a Query IOA Configuration command to the adapter to 5592 * retrieve the IOA configuration table. 5593 * 5594 * Return value: 5595 * none 5596 */ 5597 static void pmcraid_querycfg(struct pmcraid_cmd *cmd) 5598 { 5599 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb; 5600 struct pmcraid_ioadl_desc *ioadl; 5601 struct pmcraid_instance *pinstance = cmd->drv_inst; 5602 __be32 cfg_table_size = cpu_to_be32(sizeof(struct pmcraid_config_table)); 5603 5604 if (be16_to_cpu(pinstance->inq_data->fw_version) <= 5605 PMCRAID_FW_VERSION_1) 5606 pinstance->config_table_entry_size = 5607 sizeof(struct pmcraid_config_table_entry); 5608 else 5609 pinstance->config_table_entry_size = 5610 sizeof(struct pmcraid_config_table_entry_ext); 5611 5612 ioarcb->request_type = REQ_TYPE_IOACMD; 5613 ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE); 5614 5615 ioarcb->cdb[0] = PMCRAID_QUERY_IOA_CONFIG; 5616 5617 /* firmware requires 4-byte length field, specified in B.E format */ 5618 memcpy(&(ioarcb->cdb[10]), &cfg_table_size, sizeof(cfg_table_size)); 5619 5620 /* Since entire config table can be described by single IOADL, it can 5621 * be part of IOARCB itself 5622 */ 5623 ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) + 5624 offsetof(struct pmcraid_ioarcb, 5625 add_data.u.ioadl[0])); 5626 ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc)); 5627 ioarcb->ioarcb_bus_addr &= cpu_to_le64(~0x1FULL); 5628 5629 ioarcb->request_flags0 |= NO_LINK_DESCS; 5630 ioarcb->data_transfer_length = 5631 cpu_to_le32(sizeof(struct pmcraid_config_table)); 5632 5633 ioadl = &(ioarcb->add_data.u.ioadl[0]); 5634 ioadl->flags = IOADL_FLAGS_LAST_DESC; 5635 ioadl->address = cpu_to_le64(pinstance->cfg_table_bus_addr); 5636 ioadl->data_len = cpu_to_le32(sizeof(struct pmcraid_config_table)); 5637 5638 pmcraid_send_cmd(cmd, pmcraid_init_res_table, 5639 PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler); 5640 } 5641 5642 5643 /** 5644 * pmcraid_probe - PCI probe entry pointer for PMC MaxRAID controller driver 5645 * @pdev: pointer to pci device structure 5646 * @dev_id: pointer to device ids structure 5647 * 5648 * Return Value 5649 * returns 0 if the device is claimed and successfully configured. 5650 * returns non-zero error code in case of any failure 5651 */ 5652 static int pmcraid_probe(struct pci_dev *pdev, 5653 const struct pci_device_id *dev_id) 5654 { 5655 struct pmcraid_instance *pinstance; 5656 struct Scsi_Host *host; 5657 void __iomem *mapped_pci_addr; 5658 int rc = PCIBIOS_SUCCESSFUL; 5659 5660 if (atomic_read(&pmcraid_adapter_count) >= PMCRAID_MAX_ADAPTERS) { 5661 pmcraid_err 5662 ("maximum number(%d) of supported adapters reached\n", 5663 atomic_read(&pmcraid_adapter_count)); 5664 return -ENOMEM; 5665 } 5666 5667 atomic_inc(&pmcraid_adapter_count); 5668 rc = pci_enable_device(pdev); 5669 5670 if (rc) { 5671 dev_err(&pdev->dev, "Cannot enable adapter\n"); 5672 atomic_dec(&pmcraid_adapter_count); 5673 return rc; 5674 } 5675 5676 dev_info(&pdev->dev, 5677 "Found new IOA(%x:%x), Total IOA count: %d\n", 5678 pdev->vendor, pdev->device, 5679 atomic_read(&pmcraid_adapter_count)); 5680 5681 rc = pci_request_regions(pdev, PMCRAID_DRIVER_NAME); 5682 5683 if (rc < 0) { 5684 dev_err(&pdev->dev, 5685 "Couldn't register memory range of registers\n"); 5686 goto out_disable_device; 5687 } 5688 5689 mapped_pci_addr = pci_iomap(pdev, 0, 0); 5690 5691 if (!mapped_pci_addr) { 5692 dev_err(&pdev->dev, "Couldn't map PCI registers memory\n"); 5693 rc = -ENOMEM; 5694 goto out_release_regions; 5695 } 5696 5697 pci_set_master(pdev); 5698 5699 /* Firmware requires the system bus address of IOARCB to be within 5700 * 32-bit addressable range though it has 64-bit IOARRIN register. 5701 * However, firmware supports 64-bit streaming DMA buffers, whereas 5702 * coherent buffers are to be 32-bit. Since dma_alloc_coherent always 5703 * returns memory within 4GB (if not, change this logic), coherent 5704 * buffers are within firmware acceptable address ranges. 5705 */ 5706 if (sizeof(dma_addr_t) == 4 || 5707 dma_set_mask(&pdev->dev, DMA_BIT_MASK(64))) 5708 rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)); 5709 5710 /* firmware expects 32-bit DMA addresses for IOARRIN register; set 32 5711 * bit mask for dma_alloc_coherent to return addresses within 4GB 5712 */ 5713 if (rc == 0) 5714 rc = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32)); 5715 5716 if (rc != 0) { 5717 dev_err(&pdev->dev, "Failed to set PCI DMA mask\n"); 5718 goto cleanup_nomem; 5719 } 5720 5721 host = scsi_host_alloc(&pmcraid_host_template, 5722 sizeof(struct pmcraid_instance)); 5723 5724 if (!host) { 5725 dev_err(&pdev->dev, "scsi_host_alloc failed!\n"); 5726 rc = -ENOMEM; 5727 goto cleanup_nomem; 5728 } 5729 5730 host->max_id = PMCRAID_MAX_NUM_TARGETS_PER_BUS; 5731 host->max_lun = PMCRAID_MAX_NUM_LUNS_PER_TARGET; 5732 host->unique_id = host->host_no; 5733 host->max_channel = PMCRAID_MAX_BUS_TO_SCAN; 5734 host->max_cmd_len = PMCRAID_MAX_CDB_LEN; 5735 5736 /* zero out entire instance structure */ 5737 pinstance = (struct pmcraid_instance *)host->hostdata; 5738 memset(pinstance, 0, sizeof(*pinstance)); 5739 5740 pinstance->chip_cfg = 5741 (struct pmcraid_chip_details *)(dev_id->driver_data); 5742 5743 rc = pmcraid_init_instance(pdev, host, mapped_pci_addr); 5744 5745 if (rc < 0) { 5746 dev_err(&pdev->dev, "failed to initialize adapter instance\n"); 5747 goto out_scsi_host_put; 5748 } 5749 5750 pci_set_drvdata(pdev, pinstance); 5751 5752 /* Save PCI config-space for use following the reset */ 5753 rc = pci_save_state(pinstance->pdev); 5754 5755 if (rc != 0) { 5756 dev_err(&pdev->dev, "Failed to save PCI config space\n"); 5757 goto out_scsi_host_put; 5758 } 5759 5760 pmcraid_disable_interrupts(pinstance, ~0); 5761 5762 rc = pmcraid_register_interrupt_handler(pinstance); 5763 5764 if (rc) { 5765 dev_err(&pdev->dev, "couldn't register interrupt handler\n"); 5766 goto out_scsi_host_put; 5767 } 5768 5769 pmcraid_init_tasklets(pinstance); 5770 5771 /* allocate verious buffers used by LLD.*/ 5772 rc = pmcraid_init_buffers(pinstance); 5773 5774 if (rc) { 5775 pmcraid_err("couldn't allocate memory blocks\n"); 5776 goto out_unregister_isr; 5777 } 5778 5779 /* check the reset type required */ 5780 pmcraid_reset_type(pinstance); 5781 5782 pmcraid_enable_interrupts(pinstance, PMCRAID_PCI_INTERRUPTS); 5783 5784 /* Start IOA firmware initialization and bring card to Operational 5785 * state. 5786 */ 5787 pmcraid_info("starting IOA initialization sequence\n"); 5788 if (pmcraid_reset_bringup(pinstance)) { 5789 dev_err(&pdev->dev, "couldn't initialize IOA\n"); 5790 rc = 1; 5791 goto out_release_bufs; 5792 } 5793 5794 /* Add adapter instance into mid-layer list */ 5795 rc = scsi_add_host(pinstance->host, &pdev->dev); 5796 if (rc != 0) { 5797 pmcraid_err("couldn't add host into mid-layer: %d\n", rc); 5798 goto out_release_bufs; 5799 } 5800 5801 scsi_scan_host(pinstance->host); 5802 5803 rc = pmcraid_setup_chrdev(pinstance); 5804 5805 if (rc != 0) { 5806 pmcraid_err("couldn't create mgmt interface, error: %x\n", 5807 rc); 5808 goto out_remove_host; 5809 } 5810 5811 /* Schedule worker thread to handle CCN and take care of adding and 5812 * removing devices to OS 5813 */ 5814 atomic_set(&pinstance->expose_resources, 1); 5815 schedule_work(&pinstance->worker_q); 5816 return rc; 5817 5818 out_remove_host: 5819 scsi_remove_host(host); 5820 5821 out_release_bufs: 5822 pmcraid_release_buffers(pinstance); 5823 5824 out_unregister_isr: 5825 pmcraid_kill_tasklets(pinstance); 5826 pmcraid_unregister_interrupt_handler(pinstance); 5827 5828 out_scsi_host_put: 5829 scsi_host_put(host); 5830 5831 cleanup_nomem: 5832 iounmap(mapped_pci_addr); 5833 5834 out_release_regions: 5835 pci_release_regions(pdev); 5836 5837 out_disable_device: 5838 atomic_dec(&pmcraid_adapter_count); 5839 pci_disable_device(pdev); 5840 return -ENODEV; 5841 } 5842 5843 /* 5844 * PCI driver structure of pcmraid driver 5845 */ 5846 static struct pci_driver pmcraid_driver = { 5847 .name = PMCRAID_DRIVER_NAME, 5848 .id_table = pmcraid_pci_table, 5849 .probe = pmcraid_probe, 5850 .remove = pmcraid_remove, 5851 .suspend = pmcraid_suspend, 5852 .resume = pmcraid_resume, 5853 .shutdown = pmcraid_shutdown 5854 }; 5855 5856 /** 5857 * pmcraid_init - module load entry point 5858 */ 5859 static int __init pmcraid_init(void) 5860 { 5861 dev_t dev; 5862 int error; 5863 5864 pmcraid_info("%s Device Driver version: %s\n", 5865 PMCRAID_DRIVER_NAME, PMCRAID_DRIVER_VERSION); 5866 5867 error = alloc_chrdev_region(&dev, 0, 5868 PMCRAID_MAX_ADAPTERS, 5869 PMCRAID_DEVFILE); 5870 5871 if (error) { 5872 pmcraid_err("failed to get a major number for adapters\n"); 5873 goto out_init; 5874 } 5875 5876 pmcraid_major = MAJOR(dev); 5877 pmcraid_class = class_create(THIS_MODULE, PMCRAID_DEVFILE); 5878 5879 if (IS_ERR(pmcraid_class)) { 5880 error = PTR_ERR(pmcraid_class); 5881 pmcraid_err("failed to register with sysfs, error = %x\n", 5882 error); 5883 goto out_unreg_chrdev; 5884 } 5885 5886 error = pmcraid_netlink_init(); 5887 5888 if (error) { 5889 class_destroy(pmcraid_class); 5890 goto out_unreg_chrdev; 5891 } 5892 5893 error = pci_register_driver(&pmcraid_driver); 5894 5895 if (error == 0) 5896 goto out_init; 5897 5898 pmcraid_err("failed to register pmcraid driver, error = %x\n", 5899 error); 5900 class_destroy(pmcraid_class); 5901 pmcraid_netlink_release(); 5902 5903 out_unreg_chrdev: 5904 unregister_chrdev_region(MKDEV(pmcraid_major, 0), PMCRAID_MAX_ADAPTERS); 5905 5906 out_init: 5907 return error; 5908 } 5909 5910 /** 5911 * pmcraid_exit - module unload entry point 5912 */ 5913 static void __exit pmcraid_exit(void) 5914 { 5915 pmcraid_netlink_release(); 5916 unregister_chrdev_region(MKDEV(pmcraid_major, 0), 5917 PMCRAID_MAX_ADAPTERS); 5918 pci_unregister_driver(&pmcraid_driver); 5919 class_destroy(pmcraid_class); 5920 } 5921 5922 module_init(pmcraid_init); 5923 module_exit(pmcraid_exit); 5924