1 /* 2 * NinjaSCSI-32Bi Cardbus, NinjaSCSI-32UDE PCI/CardBus SCSI driver 3 * Copyright (C) 2001, 2002, 2003 4 * YOKOTA Hiroshi <yokota@netlab.is.tsukuba.ac.jp> 5 * GOTO Masanori <gotom@debian.or.jp>, <gotom@debian.org> 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2, or (at your option) 10 * any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * 18 * Revision History: 19 * 1.0: Initial Release. 20 * 1.1: Add /proc SDTR status. 21 * Remove obsolete error handler nsp32_reset. 22 * Some clean up. 23 * 1.2: PowerPC (big endian) support. 24 */ 25 26 #include <linux/module.h> 27 #include <linux/init.h> 28 #include <linux/kernel.h> 29 #include <linux/string.h> 30 #include <linux/timer.h> 31 #include <linux/ioport.h> 32 #include <linux/major.h> 33 #include <linux/blkdev.h> 34 #include <linux/interrupt.h> 35 #include <linux/pci.h> 36 #include <linux/delay.h> 37 #include <linux/ctype.h> 38 #include <linux/dma-mapping.h> 39 40 #include <asm/dma.h> 41 #include <asm/system.h> 42 #include <asm/io.h> 43 44 #include <scsi/scsi.h> 45 #include <scsi/scsi_cmnd.h> 46 #include <scsi/scsi_device.h> 47 #include <scsi/scsi_host.h> 48 #include <scsi/scsi_ioctl.h> 49 50 #include "nsp32.h" 51 52 53 /*********************************************************************** 54 * Module parameters 55 */ 56 static int trans_mode = 0; /* default: BIOS */ 57 module_param (trans_mode, int, 0); 58 MODULE_PARM_DESC(trans_mode, "transfer mode (0: BIOS(default) 1: Async 2: Ultra20M"); 59 #define ASYNC_MODE 1 60 #define ULTRA20M_MODE 2 61 62 static int auto_param = 0; /* default: ON */ 63 module_param (auto_param, bool, 0); 64 MODULE_PARM_DESC(auto_param, "AutoParameter mode (0: ON(default) 1: OFF)"); 65 66 static int disc_priv = 1; /* default: OFF */ 67 module_param (disc_priv, bool, 0); 68 MODULE_PARM_DESC(disc_priv, "disconnection privilege mode (0: ON 1: OFF(default))"); 69 70 MODULE_AUTHOR("YOKOTA Hiroshi <yokota@netlab.is.tsukuba.ac.jp>, GOTO Masanori <gotom@debian.or.jp>"); 71 MODULE_DESCRIPTION("Workbit NinjaSCSI-32Bi/UDE CardBus/PCI SCSI host bus adapter module"); 72 MODULE_LICENSE("GPL"); 73 74 static const char *nsp32_release_version = "1.2"; 75 76 77 /**************************************************************************** 78 * Supported hardware 79 */ 80 static struct pci_device_id nsp32_pci_table[] __devinitdata = { 81 { 82 .vendor = PCI_VENDOR_ID_IODATA, 83 .device = PCI_DEVICE_ID_NINJASCSI_32BI_CBSC_II, 84 .subvendor = PCI_ANY_ID, 85 .subdevice = PCI_ANY_ID, 86 .driver_data = MODEL_IODATA, 87 }, 88 { 89 .vendor = PCI_VENDOR_ID_WORKBIT, 90 .device = PCI_DEVICE_ID_NINJASCSI_32BI_KME, 91 .subvendor = PCI_ANY_ID, 92 .subdevice = PCI_ANY_ID, 93 .driver_data = MODEL_KME, 94 }, 95 { 96 .vendor = PCI_VENDOR_ID_WORKBIT, 97 .device = PCI_DEVICE_ID_NINJASCSI_32BI_WBT, 98 .subvendor = PCI_ANY_ID, 99 .subdevice = PCI_ANY_ID, 100 .driver_data = MODEL_WORKBIT, 101 }, 102 { 103 .vendor = PCI_VENDOR_ID_WORKBIT, 104 .device = PCI_DEVICE_ID_WORKBIT_STANDARD, 105 .subvendor = PCI_ANY_ID, 106 .subdevice = PCI_ANY_ID, 107 .driver_data = MODEL_PCI_WORKBIT, 108 }, 109 { 110 .vendor = PCI_VENDOR_ID_WORKBIT, 111 .device = PCI_DEVICE_ID_NINJASCSI_32BI_LOGITEC, 112 .subvendor = PCI_ANY_ID, 113 .subdevice = PCI_ANY_ID, 114 .driver_data = MODEL_LOGITEC, 115 }, 116 { 117 .vendor = PCI_VENDOR_ID_WORKBIT, 118 .device = PCI_DEVICE_ID_NINJASCSI_32BIB_LOGITEC, 119 .subvendor = PCI_ANY_ID, 120 .subdevice = PCI_ANY_ID, 121 .driver_data = MODEL_PCI_LOGITEC, 122 }, 123 { 124 .vendor = PCI_VENDOR_ID_WORKBIT, 125 .device = PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO, 126 .subvendor = PCI_ANY_ID, 127 .subdevice = PCI_ANY_ID, 128 .driver_data = MODEL_PCI_MELCO, 129 }, 130 { 131 .vendor = PCI_VENDOR_ID_WORKBIT, 132 .device = PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO_II, 133 .subvendor = PCI_ANY_ID, 134 .subdevice = PCI_ANY_ID, 135 .driver_data = MODEL_PCI_MELCO, 136 }, 137 {0,0,}, 138 }; 139 MODULE_DEVICE_TABLE(pci, nsp32_pci_table); 140 141 static nsp32_hw_data nsp32_data_base; /* probe <-> detect glue */ 142 143 144 /* 145 * Period/AckWidth speed conversion table 146 * 147 * Note: This period/ackwidth speed table must be in descending order. 148 */ 149 static nsp32_sync_table nsp32_sync_table_40M[] = { 150 /* {PNo, AW, SP, EP, SREQ smpl} Speed(MB/s) Period AckWidth */ 151 {0x1, 0, 0x0c, 0x0c, SMPL_40M}, /* 20.0 : 50ns, 25ns */ 152 {0x2, 0, 0x0d, 0x18, SMPL_40M}, /* 13.3 : 75ns, 25ns */ 153 {0x3, 1, 0x19, 0x19, SMPL_40M}, /* 10.0 : 100ns, 50ns */ 154 {0x4, 1, 0x1a, 0x1f, SMPL_20M}, /* 8.0 : 125ns, 50ns */ 155 {0x5, 2, 0x20, 0x25, SMPL_20M}, /* 6.7 : 150ns, 75ns */ 156 {0x6, 2, 0x26, 0x31, SMPL_20M}, /* 5.7 : 175ns, 75ns */ 157 {0x7, 3, 0x32, 0x32, SMPL_20M}, /* 5.0 : 200ns, 100ns */ 158 {0x8, 3, 0x33, 0x38, SMPL_10M}, /* 4.4 : 225ns, 100ns */ 159 {0x9, 3, 0x39, 0x3e, SMPL_10M}, /* 4.0 : 250ns, 100ns */ 160 }; 161 162 static nsp32_sync_table nsp32_sync_table_20M[] = { 163 {0x1, 0, 0x19, 0x19, SMPL_40M}, /* 10.0 : 100ns, 50ns */ 164 {0x2, 0, 0x1a, 0x25, SMPL_20M}, /* 6.7 : 150ns, 50ns */ 165 {0x3, 1, 0x26, 0x32, SMPL_20M}, /* 5.0 : 200ns, 100ns */ 166 {0x4, 1, 0x33, 0x3e, SMPL_10M}, /* 4.0 : 250ns, 100ns */ 167 {0x5, 2, 0x3f, 0x4b, SMPL_10M}, /* 3.3 : 300ns, 150ns */ 168 {0x6, 2, 0x4c, 0x57, SMPL_10M}, /* 2.8 : 350ns, 150ns */ 169 {0x7, 3, 0x58, 0x64, SMPL_10M}, /* 2.5 : 400ns, 200ns */ 170 {0x8, 3, 0x65, 0x70, SMPL_10M}, /* 2.2 : 450ns, 200ns */ 171 {0x9, 3, 0x71, 0x7d, SMPL_10M}, /* 2.0 : 500ns, 200ns */ 172 }; 173 174 static nsp32_sync_table nsp32_sync_table_pci[] = { 175 {0x1, 0, 0x0c, 0x0f, SMPL_40M}, /* 16.6 : 60ns, 30ns */ 176 {0x2, 0, 0x10, 0x16, SMPL_40M}, /* 11.1 : 90ns, 30ns */ 177 {0x3, 1, 0x17, 0x1e, SMPL_20M}, /* 8.3 : 120ns, 60ns */ 178 {0x4, 1, 0x1f, 0x25, SMPL_20M}, /* 6.7 : 150ns, 60ns */ 179 {0x5, 2, 0x26, 0x2d, SMPL_20M}, /* 5.6 : 180ns, 90ns */ 180 {0x6, 2, 0x2e, 0x34, SMPL_10M}, /* 4.8 : 210ns, 90ns */ 181 {0x7, 3, 0x35, 0x3c, SMPL_10M}, /* 4.2 : 240ns, 120ns */ 182 {0x8, 3, 0x3d, 0x43, SMPL_10M}, /* 3.7 : 270ns, 120ns */ 183 {0x9, 3, 0x44, 0x4b, SMPL_10M}, /* 3.3 : 300ns, 120ns */ 184 }; 185 186 /* 187 * function declaration 188 */ 189 /* module entry point */ 190 static int __devinit nsp32_probe (struct pci_dev *, const struct pci_device_id *); 191 static void __devexit nsp32_remove(struct pci_dev *); 192 static int __init init_nsp32 (void); 193 static void __exit exit_nsp32 (void); 194 195 /* struct struct scsi_host_template */ 196 static int nsp32_proc_info (struct Scsi_Host *, char *, char **, off_t, int, int); 197 198 static int nsp32_detect (struct pci_dev *pdev); 199 static int nsp32_queuecommand(struct scsi_cmnd *, 200 void (*done)(struct scsi_cmnd *)); 201 static const char *nsp32_info (struct Scsi_Host *); 202 static int nsp32_release (struct Scsi_Host *); 203 204 /* SCSI error handler */ 205 static int nsp32_eh_abort (struct scsi_cmnd *); 206 static int nsp32_eh_bus_reset (struct scsi_cmnd *); 207 static int nsp32_eh_host_reset(struct scsi_cmnd *); 208 209 /* generate SCSI message */ 210 static void nsp32_build_identify(struct scsi_cmnd *); 211 static void nsp32_build_nop (struct scsi_cmnd *); 212 static void nsp32_build_reject (struct scsi_cmnd *); 213 static void nsp32_build_sdtr (struct scsi_cmnd *, unsigned char, unsigned char); 214 215 /* SCSI message handler */ 216 static int nsp32_busfree_occur(struct scsi_cmnd *, unsigned short); 217 static void nsp32_msgout_occur (struct scsi_cmnd *); 218 static void nsp32_msgin_occur (struct scsi_cmnd *, unsigned long, unsigned short); 219 220 static int nsp32_setup_sg_table (struct scsi_cmnd *); 221 static int nsp32_selection_autopara(struct scsi_cmnd *); 222 static int nsp32_selection_autoscsi(struct scsi_cmnd *); 223 static void nsp32_scsi_done (struct scsi_cmnd *); 224 static int nsp32_arbitration (struct scsi_cmnd *, unsigned int); 225 static int nsp32_reselection (struct scsi_cmnd *, unsigned char); 226 static void nsp32_adjust_busfree (struct scsi_cmnd *, unsigned int); 227 static void nsp32_restart_autoscsi (struct scsi_cmnd *, unsigned short); 228 229 /* SCSI SDTR */ 230 static void nsp32_analyze_sdtr (struct scsi_cmnd *); 231 static int nsp32_search_period_entry(nsp32_hw_data *, nsp32_target *, unsigned char); 232 static void nsp32_set_async (nsp32_hw_data *, nsp32_target *); 233 static void nsp32_set_max_sync (nsp32_hw_data *, nsp32_target *, unsigned char *, unsigned char *); 234 static void nsp32_set_sync_entry (nsp32_hw_data *, nsp32_target *, int, unsigned char); 235 236 /* SCSI bus status handler */ 237 static void nsp32_wait_req (nsp32_hw_data *, int); 238 static void nsp32_wait_sack (nsp32_hw_data *, int); 239 static void nsp32_sack_assert (nsp32_hw_data *); 240 static void nsp32_sack_negate (nsp32_hw_data *); 241 static void nsp32_do_bus_reset(nsp32_hw_data *); 242 243 /* hardware interrupt handler */ 244 static irqreturn_t do_nsp32_isr(int, void *); 245 246 /* initialize hardware */ 247 static int nsp32hw_init(nsp32_hw_data *); 248 249 /* EEPROM handler */ 250 static int nsp32_getprom_param (nsp32_hw_data *); 251 static int nsp32_getprom_at24 (nsp32_hw_data *); 252 static int nsp32_getprom_c16 (nsp32_hw_data *); 253 static void nsp32_prom_start (nsp32_hw_data *); 254 static void nsp32_prom_stop (nsp32_hw_data *); 255 static int nsp32_prom_read (nsp32_hw_data *, int); 256 static int nsp32_prom_read_bit (nsp32_hw_data *); 257 static void nsp32_prom_write_bit(nsp32_hw_data *, int); 258 static void nsp32_prom_set (nsp32_hw_data *, int, int); 259 static int nsp32_prom_get (nsp32_hw_data *, int); 260 261 /* debug/warning/info message */ 262 static void nsp32_message (const char *, int, char *, char *, ...); 263 #ifdef NSP32_DEBUG 264 static void nsp32_dmessage(const char *, int, int, char *, ...); 265 #endif 266 267 /* 268 * max_sectors is currently limited up to 128. 269 */ 270 static struct scsi_host_template nsp32_template = { 271 .proc_name = "nsp32", 272 .name = "Workbit NinjaSCSI-32Bi/UDE", 273 .proc_info = nsp32_proc_info, 274 .info = nsp32_info, 275 .queuecommand = nsp32_queuecommand, 276 .can_queue = 1, 277 .sg_tablesize = NSP32_SG_SIZE, 278 .max_sectors = 128, 279 .cmd_per_lun = 1, 280 .this_id = NSP32_HOST_SCSIID, 281 .use_clustering = DISABLE_CLUSTERING, 282 .eh_abort_handler = nsp32_eh_abort, 283 .eh_bus_reset_handler = nsp32_eh_bus_reset, 284 .eh_host_reset_handler = nsp32_eh_host_reset, 285 /* .highmem_io = 1, */ 286 }; 287 288 #include "nsp32_io.h" 289 290 /*********************************************************************** 291 * debug, error print 292 */ 293 #ifndef NSP32_DEBUG 294 # define NSP32_DEBUG_MASK 0x000000 295 # define nsp32_msg(type, args...) nsp32_message ("", 0, (type), args) 296 # define nsp32_dbg(mask, args...) /* */ 297 #else 298 # define NSP32_DEBUG_MASK 0xffffff 299 # define nsp32_msg(type, args...) \ 300 nsp32_message (__func__, __LINE__, (type), args) 301 # define nsp32_dbg(mask, args...) \ 302 nsp32_dmessage(__func__, __LINE__, (mask), args) 303 #endif 304 305 #define NSP32_DEBUG_QUEUECOMMAND BIT(0) 306 #define NSP32_DEBUG_REGISTER BIT(1) 307 #define NSP32_DEBUG_AUTOSCSI BIT(2) 308 #define NSP32_DEBUG_INTR BIT(3) 309 #define NSP32_DEBUG_SGLIST BIT(4) 310 #define NSP32_DEBUG_BUSFREE BIT(5) 311 #define NSP32_DEBUG_CDB_CONTENTS BIT(6) 312 #define NSP32_DEBUG_RESELECTION BIT(7) 313 #define NSP32_DEBUG_MSGINOCCUR BIT(8) 314 #define NSP32_DEBUG_EEPROM BIT(9) 315 #define NSP32_DEBUG_MSGOUTOCCUR BIT(10) 316 #define NSP32_DEBUG_BUSRESET BIT(11) 317 #define NSP32_DEBUG_RESTART BIT(12) 318 #define NSP32_DEBUG_SYNC BIT(13) 319 #define NSP32_DEBUG_WAIT BIT(14) 320 #define NSP32_DEBUG_TARGETFLAG BIT(15) 321 #define NSP32_DEBUG_PROC BIT(16) 322 #define NSP32_DEBUG_INIT BIT(17) 323 #define NSP32_SPECIAL_PRINT_REGISTER BIT(20) 324 325 #define NSP32_DEBUG_BUF_LEN 100 326 327 static void nsp32_message(const char *func, int line, char *type, char *fmt, ...) 328 { 329 va_list args; 330 char buf[NSP32_DEBUG_BUF_LEN]; 331 332 va_start(args, fmt); 333 vsnprintf(buf, sizeof(buf), fmt, args); 334 va_end(args); 335 336 #ifndef NSP32_DEBUG 337 printk("%snsp32: %s\n", type, buf); 338 #else 339 printk("%snsp32: %s (%d): %s\n", type, func, line, buf); 340 #endif 341 } 342 343 #ifdef NSP32_DEBUG 344 static void nsp32_dmessage(const char *func, int line, int mask, char *fmt, ...) 345 { 346 va_list args; 347 char buf[NSP32_DEBUG_BUF_LEN]; 348 349 va_start(args, fmt); 350 vsnprintf(buf, sizeof(buf), fmt, args); 351 va_end(args); 352 353 if (mask & NSP32_DEBUG_MASK) { 354 printk("nsp32-debug: 0x%x %s (%d): %s\n", mask, func, line, buf); 355 } 356 } 357 #endif 358 359 #ifdef NSP32_DEBUG 360 # include "nsp32_debug.c" 361 #else 362 # define show_command(arg) /* */ 363 # define show_busphase(arg) /* */ 364 # define show_autophase(arg) /* */ 365 #endif 366 367 /* 368 * IDENTIFY Message 369 */ 370 static void nsp32_build_identify(struct scsi_cmnd *SCpnt) 371 { 372 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; 373 int pos = data->msgout_len; 374 int mode = FALSE; 375 376 /* XXX: Auto DiscPriv detection is progressing... */ 377 if (disc_priv == 0) { 378 /* mode = TRUE; */ 379 } 380 381 data->msgoutbuf[pos] = IDENTIFY(mode, SCpnt->device->lun); pos++; 382 383 data->msgout_len = pos; 384 } 385 386 /* 387 * SDTR Message Routine 388 */ 389 static void nsp32_build_sdtr(struct scsi_cmnd *SCpnt, 390 unsigned char period, 391 unsigned char offset) 392 { 393 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; 394 int pos = data->msgout_len; 395 396 data->msgoutbuf[pos] = EXTENDED_MESSAGE; pos++; 397 data->msgoutbuf[pos] = EXTENDED_SDTR_LEN; pos++; 398 data->msgoutbuf[pos] = EXTENDED_SDTR; pos++; 399 data->msgoutbuf[pos] = period; pos++; 400 data->msgoutbuf[pos] = offset; pos++; 401 402 data->msgout_len = pos; 403 } 404 405 /* 406 * No Operation Message 407 */ 408 static void nsp32_build_nop(struct scsi_cmnd *SCpnt) 409 { 410 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; 411 int pos = data->msgout_len; 412 413 if (pos != 0) { 414 nsp32_msg(KERN_WARNING, 415 "Some messages are already contained!"); 416 return; 417 } 418 419 data->msgoutbuf[pos] = NOP; pos++; 420 data->msgout_len = pos; 421 } 422 423 /* 424 * Reject Message 425 */ 426 static void nsp32_build_reject(struct scsi_cmnd *SCpnt) 427 { 428 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; 429 int pos = data->msgout_len; 430 431 data->msgoutbuf[pos] = MESSAGE_REJECT; pos++; 432 data->msgout_len = pos; 433 } 434 435 /* 436 * timer 437 */ 438 #if 0 439 static void nsp32_start_timer(struct scsi_cmnd *SCpnt, int time) 440 { 441 unsigned int base = SCpnt->host->io_port; 442 443 nsp32_dbg(NSP32_DEBUG_INTR, "timer=%d", time); 444 445 if (time & (~TIMER_CNT_MASK)) { 446 nsp32_dbg(NSP32_DEBUG_INTR, "timer set overflow"); 447 } 448 449 nsp32_write2(base, TIMER_SET, time & TIMER_CNT_MASK); 450 } 451 #endif 452 453 454 /* 455 * set SCSI command and other parameter to asic, and start selection phase 456 */ 457 static int nsp32_selection_autopara(struct scsi_cmnd *SCpnt) 458 { 459 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; 460 unsigned int base = SCpnt->device->host->io_port; 461 unsigned int host_id = SCpnt->device->host->this_id; 462 unsigned char target = scmd_id(SCpnt); 463 nsp32_autoparam *param = data->autoparam; 464 unsigned char phase; 465 int i, ret; 466 unsigned int msgout; 467 u16_le s; 468 469 nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "in"); 470 471 /* 472 * check bus free 473 */ 474 phase = nsp32_read1(base, SCSI_BUS_MONITOR); 475 if (phase != BUSMON_BUS_FREE) { 476 nsp32_msg(KERN_WARNING, "bus busy"); 477 show_busphase(phase & BUSMON_PHASE_MASK); 478 SCpnt->result = DID_BUS_BUSY << 16; 479 return FALSE; 480 } 481 482 /* 483 * message out 484 * 485 * Note: If the range of msgout_len is 1 - 3, fill scsi_msgout. 486 * over 3 messages needs another routine. 487 */ 488 if (data->msgout_len == 0) { 489 nsp32_msg(KERN_ERR, "SCSI MsgOut without any message!"); 490 SCpnt->result = DID_ERROR << 16; 491 return FALSE; 492 } else if (data->msgout_len > 0 && data->msgout_len <= 3) { 493 msgout = 0; 494 for (i = 0; i < data->msgout_len; i++) { 495 /* 496 * the sending order of the message is: 497 * MCNT 3: MSG#0 -> MSG#1 -> MSG#2 498 * MCNT 2: MSG#1 -> MSG#2 499 * MCNT 1: MSG#2 500 */ 501 msgout >>= 8; 502 msgout |= ((unsigned int)(data->msgoutbuf[i]) << 24); 503 } 504 msgout |= MV_VALID; /* MV valid */ 505 msgout |= (unsigned int)data->msgout_len; /* len */ 506 } else { 507 /* data->msgout_len > 3 */ 508 msgout = 0; 509 } 510 511 // nsp_dbg(NSP32_DEBUG_AUTOSCSI, "sel time out=0x%x\n", nsp32_read2(base, SEL_TIME_OUT)); 512 // nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME); 513 514 /* 515 * setup asic parameter 516 */ 517 memset(param, 0, sizeof(nsp32_autoparam)); 518 519 /* cdb */ 520 for (i = 0; i < SCpnt->cmd_len; i++) { 521 param->cdb[4 * i] = SCpnt->cmnd[i]; 522 } 523 524 /* outgoing messages */ 525 param->msgout = cpu_to_le32(msgout); 526 527 /* syncreg, ackwidth, target id, SREQ sampling rate */ 528 param->syncreg = data->cur_target->syncreg; 529 param->ackwidth = data->cur_target->ackwidth; 530 param->target_id = BIT(host_id) | BIT(target); 531 param->sample_reg = data->cur_target->sample_reg; 532 533 // nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "sample rate=0x%x\n", data->cur_target->sample_reg); 534 535 /* command control */ 536 param->command_control = cpu_to_le16(CLEAR_CDB_FIFO_POINTER | 537 AUTOSCSI_START | 538 AUTO_MSGIN_00_OR_04 | 539 AUTO_MSGIN_02 | 540 AUTO_ATN ); 541 542 543 /* transfer control */ 544 s = 0; 545 switch (data->trans_method) { 546 case NSP32_TRANSFER_BUSMASTER: 547 s |= BM_START; 548 break; 549 case NSP32_TRANSFER_MMIO: 550 s |= CB_MMIO_MODE; 551 break; 552 case NSP32_TRANSFER_PIO: 553 s |= CB_IO_MODE; 554 break; 555 default: 556 nsp32_msg(KERN_ERR, "unknown trans_method"); 557 break; 558 } 559 /* 560 * OR-ed BLIEND_MODE, FIFO intr is decreased, instead of PCI bus waits. 561 * For bus master transfer, it's taken off. 562 */ 563 s |= (TRANSFER_GO | ALL_COUNTER_CLR); 564 param->transfer_control = cpu_to_le16(s); 565 566 /* sg table addr */ 567 param->sgt_pointer = cpu_to_le32(data->cur_lunt->sglun_paddr); 568 569 /* 570 * transfer parameter to ASIC 571 */ 572 nsp32_write4(base, SGT_ADR, data->auto_paddr); 573 nsp32_write2(base, COMMAND_CONTROL, CLEAR_CDB_FIFO_POINTER | 574 AUTO_PARAMETER ); 575 576 /* 577 * Check arbitration 578 */ 579 ret = nsp32_arbitration(SCpnt, base); 580 581 return ret; 582 } 583 584 585 /* 586 * Selection with AUTO SCSI (without AUTO PARAMETER) 587 */ 588 static int nsp32_selection_autoscsi(struct scsi_cmnd *SCpnt) 589 { 590 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; 591 unsigned int base = SCpnt->device->host->io_port; 592 unsigned int host_id = SCpnt->device->host->this_id; 593 unsigned char target = scmd_id(SCpnt); 594 unsigned char phase; 595 int status; 596 unsigned short command = 0; 597 unsigned int msgout = 0; 598 unsigned short execph; 599 int i; 600 601 nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "in"); 602 603 /* 604 * IRQ disable 605 */ 606 nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK); 607 608 /* 609 * check bus line 610 */ 611 phase = nsp32_read1(base, SCSI_BUS_MONITOR); 612 if(((phase & BUSMON_BSY) == 1) || (phase & BUSMON_SEL) == 1) { 613 nsp32_msg(KERN_WARNING, "bus busy"); 614 SCpnt->result = DID_BUS_BUSY << 16; 615 status = 1; 616 goto out; 617 } 618 619 /* 620 * clear execph 621 */ 622 execph = nsp32_read2(base, SCSI_EXECUTE_PHASE); 623 624 /* 625 * clear FIFO counter to set CDBs 626 */ 627 nsp32_write2(base, COMMAND_CONTROL, CLEAR_CDB_FIFO_POINTER); 628 629 /* 630 * set CDB0 - CDB15 631 */ 632 for (i = 0; i < SCpnt->cmd_len; i++) { 633 nsp32_write1(base, COMMAND_DATA, SCpnt->cmnd[i]); 634 } 635 nsp32_dbg(NSP32_DEBUG_CDB_CONTENTS, "CDB[0]=[0x%x]", SCpnt->cmnd[0]); 636 637 /* 638 * set SCSIOUT LATCH(initiator)/TARGET(target) (OR-ed) ID 639 */ 640 nsp32_write1(base, SCSI_OUT_LATCH_TARGET_ID, BIT(host_id) | BIT(target)); 641 642 /* 643 * set SCSI MSGOUT REG 644 * 645 * Note: If the range of msgout_len is 1 - 3, fill scsi_msgout. 646 * over 3 messages needs another routine. 647 */ 648 if (data->msgout_len == 0) { 649 nsp32_msg(KERN_ERR, "SCSI MsgOut without any message!"); 650 SCpnt->result = DID_ERROR << 16; 651 status = 1; 652 goto out; 653 } else if (data->msgout_len > 0 && data->msgout_len <= 3) { 654 msgout = 0; 655 for (i = 0; i < data->msgout_len; i++) { 656 /* 657 * the sending order of the message is: 658 * MCNT 3: MSG#0 -> MSG#1 -> MSG#2 659 * MCNT 2: MSG#1 -> MSG#2 660 * MCNT 1: MSG#2 661 */ 662 msgout >>= 8; 663 msgout |= ((unsigned int)(data->msgoutbuf[i]) << 24); 664 } 665 msgout |= MV_VALID; /* MV valid */ 666 msgout |= (unsigned int)data->msgout_len; /* len */ 667 nsp32_write4(base, SCSI_MSG_OUT, msgout); 668 } else { 669 /* data->msgout_len > 3 */ 670 nsp32_write4(base, SCSI_MSG_OUT, 0); 671 } 672 673 /* 674 * set selection timeout(= 250ms) 675 */ 676 nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME); 677 678 /* 679 * set SREQ hazard killer sampling rate 680 * 681 * TODO: sample_rate (BASE+0F) is 0 when internal clock = 40MHz. 682 * check other internal clock! 683 */ 684 nsp32_write1(base, SREQ_SMPL_RATE, data->cur_target->sample_reg); 685 686 /* 687 * clear Arbit 688 */ 689 nsp32_write1(base, SET_ARBIT, ARBIT_CLEAR); 690 691 /* 692 * set SYNCREG 693 * Don't set BM_START_ADR before setting this register. 694 */ 695 nsp32_write1(base, SYNC_REG, data->cur_target->syncreg); 696 697 /* 698 * set ACKWIDTH 699 */ 700 nsp32_write1(base, ACK_WIDTH, data->cur_target->ackwidth); 701 702 nsp32_dbg(NSP32_DEBUG_AUTOSCSI, 703 "syncreg=0x%x, ackwidth=0x%x, sgtpaddr=0x%x, id=0x%x", 704 nsp32_read1(base, SYNC_REG), nsp32_read1(base, ACK_WIDTH), 705 nsp32_read4(base, SGT_ADR), nsp32_read1(base, SCSI_OUT_LATCH_TARGET_ID)); 706 nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "msgout_len=%d, msgout=0x%x", 707 data->msgout_len, msgout); 708 709 /* 710 * set SGT ADDR (physical address) 711 */ 712 nsp32_write4(base, SGT_ADR, data->cur_lunt->sglun_paddr); 713 714 /* 715 * set TRANSFER CONTROL REG 716 */ 717 command = 0; 718 command |= (TRANSFER_GO | ALL_COUNTER_CLR); 719 if (data->trans_method & NSP32_TRANSFER_BUSMASTER) { 720 if (scsi_bufflen(SCpnt) > 0) { 721 command |= BM_START; 722 } 723 } else if (data->trans_method & NSP32_TRANSFER_MMIO) { 724 command |= CB_MMIO_MODE; 725 } else if (data->trans_method & NSP32_TRANSFER_PIO) { 726 command |= CB_IO_MODE; 727 } 728 nsp32_write2(base, TRANSFER_CONTROL, command); 729 730 /* 731 * start AUTO SCSI, kick off arbitration 732 */ 733 command = (CLEAR_CDB_FIFO_POINTER | 734 AUTOSCSI_START | 735 AUTO_MSGIN_00_OR_04 | 736 AUTO_MSGIN_02 | 737 AUTO_ATN ); 738 nsp32_write2(base, COMMAND_CONTROL, command); 739 740 /* 741 * Check arbitration 742 */ 743 status = nsp32_arbitration(SCpnt, base); 744 745 out: 746 /* 747 * IRQ enable 748 */ 749 nsp32_write2(base, IRQ_CONTROL, 0); 750 751 return status; 752 } 753 754 755 /* 756 * Arbitration Status Check 757 * 758 * Note: Arbitration counter is waited during ARBIT_GO is not lifting. 759 * Using udelay(1) consumes CPU time and system time, but 760 * arbitration delay time is defined minimal 2.4us in SCSI 761 * specification, thus udelay works as coarse grained wait timer. 762 */ 763 static int nsp32_arbitration(struct scsi_cmnd *SCpnt, unsigned int base) 764 { 765 unsigned char arbit; 766 int status = TRUE; 767 int time = 0; 768 769 do { 770 arbit = nsp32_read1(base, ARBIT_STATUS); 771 time++; 772 } while ((arbit & (ARBIT_WIN | ARBIT_FAIL)) == 0 && 773 (time <= ARBIT_TIMEOUT_TIME)); 774 775 nsp32_dbg(NSP32_DEBUG_AUTOSCSI, 776 "arbit: 0x%x, delay time: %d", arbit, time); 777 778 if (arbit & ARBIT_WIN) { 779 /* Arbitration succeeded */ 780 SCpnt->result = DID_OK << 16; 781 nsp32_index_write1(base, EXT_PORT, LED_ON); /* PCI LED on */ 782 } else if (arbit & ARBIT_FAIL) { 783 /* Arbitration failed */ 784 SCpnt->result = DID_BUS_BUSY << 16; 785 status = FALSE; 786 } else { 787 /* 788 * unknown error or ARBIT_GO timeout, 789 * something lock up! guess no connection. 790 */ 791 nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "arbit timeout"); 792 SCpnt->result = DID_NO_CONNECT << 16; 793 status = FALSE; 794 } 795 796 /* 797 * clear Arbit 798 */ 799 nsp32_write1(base, SET_ARBIT, ARBIT_CLEAR); 800 801 return status; 802 } 803 804 805 /* 806 * reselection 807 * 808 * Note: This reselection routine is called from msgin_occur, 809 * reselection target id&lun must be already set. 810 * SCSI-2 says IDENTIFY implies RESTORE_POINTER operation. 811 */ 812 static int nsp32_reselection(struct scsi_cmnd *SCpnt, unsigned char newlun) 813 { 814 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; 815 unsigned int host_id = SCpnt->device->host->this_id; 816 unsigned int base = SCpnt->device->host->io_port; 817 unsigned char tmpid, newid; 818 819 nsp32_dbg(NSP32_DEBUG_RESELECTION, "enter"); 820 821 /* 822 * calculate reselected SCSI ID 823 */ 824 tmpid = nsp32_read1(base, RESELECT_ID); 825 tmpid &= (~BIT(host_id)); 826 newid = 0; 827 while (tmpid) { 828 if (tmpid & 1) { 829 break; 830 } 831 tmpid >>= 1; 832 newid++; 833 } 834 835 /* 836 * If reselected New ID:LUN is not existed 837 * or current nexus is not existed, unexpected 838 * reselection is occurred. Send reject message. 839 */ 840 if (newid >= ARRAY_SIZE(data->lunt) || newlun >= ARRAY_SIZE(data->lunt[0])) { 841 nsp32_msg(KERN_WARNING, "unknown id/lun"); 842 return FALSE; 843 } else if(data->lunt[newid][newlun].SCpnt == NULL) { 844 nsp32_msg(KERN_WARNING, "no SCSI command is processing"); 845 return FALSE; 846 } 847 848 data->cur_id = newid; 849 data->cur_lun = newlun; 850 data->cur_target = &(data->target[newid]); 851 data->cur_lunt = &(data->lunt[newid][newlun]); 852 853 /* reset SACK/SavedACK counter (or ALL clear?) */ 854 nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK); 855 856 return TRUE; 857 } 858 859 860 /* 861 * nsp32_setup_sg_table - build scatter gather list for transfer data 862 * with bus master. 863 * 864 * Note: NinjaSCSI-32Bi/UDE bus master can not transfer over 64KB at a time. 865 */ 866 static int nsp32_setup_sg_table(struct scsi_cmnd *SCpnt) 867 { 868 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; 869 struct scatterlist *sg; 870 nsp32_sgtable *sgt = data->cur_lunt->sglun->sgt; 871 int num, i; 872 u32_le l; 873 874 if (sgt == NULL) { 875 nsp32_dbg(NSP32_DEBUG_SGLIST, "SGT == null"); 876 return FALSE; 877 } 878 879 num = scsi_dma_map(SCpnt); 880 if (!num) 881 return TRUE; 882 else if (num < 0) 883 return FALSE; 884 else { 885 scsi_for_each_sg(SCpnt, sg, num, i) { 886 /* 887 * Build nsp32_sglist, substitute sg dma addresses. 888 */ 889 sgt[i].addr = cpu_to_le32(sg_dma_address(sg)); 890 sgt[i].len = cpu_to_le32(sg_dma_len(sg)); 891 892 if (le32_to_cpu(sgt[i].len) > 0x10000) { 893 nsp32_msg(KERN_ERR, 894 "can't transfer over 64KB at a time, size=0x%lx", le32_to_cpu(sgt[i].len)); 895 return FALSE; 896 } 897 nsp32_dbg(NSP32_DEBUG_SGLIST, 898 "num 0x%x : addr 0x%lx len 0x%lx", 899 i, 900 le32_to_cpu(sgt[i].addr), 901 le32_to_cpu(sgt[i].len )); 902 } 903 904 /* set end mark */ 905 l = le32_to_cpu(sgt[num-1].len); 906 sgt[num-1].len = cpu_to_le32(l | SGTEND); 907 } 908 909 return TRUE; 910 } 911 912 static int nsp32_queuecommand(struct scsi_cmnd *SCpnt, void (*done)(struct scsi_cmnd *)) 913 { 914 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; 915 nsp32_target *target; 916 nsp32_lunt *cur_lunt; 917 int ret; 918 919 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, 920 "enter. target: 0x%x LUN: 0x%x cmnd: 0x%x cmndlen: 0x%x " 921 "use_sg: 0x%x reqbuf: 0x%lx reqlen: 0x%x", 922 SCpnt->device->id, SCpnt->device->lun, SCpnt->cmnd[0], SCpnt->cmd_len, 923 scsi_sg_count(SCpnt), scsi_sglist(SCpnt), scsi_bufflen(SCpnt)); 924 925 if (data->CurrentSC != NULL) { 926 nsp32_msg(KERN_ERR, "Currentsc != NULL. Cancel this command request"); 927 data->CurrentSC = NULL; 928 SCpnt->result = DID_NO_CONNECT << 16; 929 done(SCpnt); 930 return 0; 931 } 932 933 /* check target ID is not same as this initiator ID */ 934 if (scmd_id(SCpnt) == SCpnt->device->host->this_id) { 935 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "terget==host???"); 936 SCpnt->result = DID_BAD_TARGET << 16; 937 done(SCpnt); 938 return 0; 939 } 940 941 /* check target LUN is allowable value */ 942 if (SCpnt->device->lun >= MAX_LUN) { 943 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "no more lun"); 944 SCpnt->result = DID_BAD_TARGET << 16; 945 done(SCpnt); 946 return 0; 947 } 948 949 show_command(SCpnt); 950 951 SCpnt->scsi_done = done; 952 data->CurrentSC = SCpnt; 953 SCpnt->SCp.Status = CHECK_CONDITION; 954 SCpnt->SCp.Message = 0; 955 scsi_set_resid(SCpnt, scsi_bufflen(SCpnt)); 956 957 SCpnt->SCp.ptr = (char *)scsi_sglist(SCpnt); 958 SCpnt->SCp.this_residual = scsi_bufflen(SCpnt); 959 SCpnt->SCp.buffer = NULL; 960 SCpnt->SCp.buffers_residual = 0; 961 962 /* initialize data */ 963 data->msgout_len = 0; 964 data->msgin_len = 0; 965 cur_lunt = &(data->lunt[SCpnt->device->id][SCpnt->device->lun]); 966 cur_lunt->SCpnt = SCpnt; 967 cur_lunt->save_datp = 0; 968 cur_lunt->msgin03 = FALSE; 969 data->cur_lunt = cur_lunt; 970 data->cur_id = SCpnt->device->id; 971 data->cur_lun = SCpnt->device->lun; 972 973 ret = nsp32_setup_sg_table(SCpnt); 974 if (ret == FALSE) { 975 nsp32_msg(KERN_ERR, "SGT fail"); 976 SCpnt->result = DID_ERROR << 16; 977 nsp32_scsi_done(SCpnt); 978 return 0; 979 } 980 981 /* Build IDENTIFY */ 982 nsp32_build_identify(SCpnt); 983 984 /* 985 * If target is the first time to transfer after the reset 986 * (target don't have SDTR_DONE and SDTR_INITIATOR), sync 987 * message SDTR is needed to do synchronous transfer. 988 */ 989 target = &data->target[scmd_id(SCpnt)]; 990 data->cur_target = target; 991 992 if (!(target->sync_flag & (SDTR_DONE | SDTR_INITIATOR | SDTR_TARGET))) { 993 unsigned char period, offset; 994 995 if (trans_mode != ASYNC_MODE) { 996 nsp32_set_max_sync(data, target, &period, &offset); 997 nsp32_build_sdtr(SCpnt, period, offset); 998 target->sync_flag |= SDTR_INITIATOR; 999 } else { 1000 nsp32_set_async(data, target); 1001 target->sync_flag |= SDTR_DONE; 1002 } 1003 1004 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, 1005 "SDTR: entry: %d start_period: 0x%x offset: 0x%x\n", 1006 target->limit_entry, period, offset); 1007 } else if (target->sync_flag & SDTR_INITIATOR) { 1008 /* 1009 * It was negotiating SDTR with target, sending from the 1010 * initiator, but there are no chance to remove this flag. 1011 * Set async because we don't get proper negotiation. 1012 */ 1013 nsp32_set_async(data, target); 1014 target->sync_flag &= ~SDTR_INITIATOR; 1015 target->sync_flag |= SDTR_DONE; 1016 1017 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, 1018 "SDTR_INITIATOR: fall back to async"); 1019 } else if (target->sync_flag & SDTR_TARGET) { 1020 /* 1021 * It was negotiating SDTR with target, sending from target, 1022 * but there are no chance to remove this flag. Set async 1023 * because we don't get proper negotiation. 1024 */ 1025 nsp32_set_async(data, target); 1026 target->sync_flag &= ~SDTR_TARGET; 1027 target->sync_flag |= SDTR_DONE; 1028 1029 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, 1030 "Unknown SDTR from target is reached, fall back to async."); 1031 } 1032 1033 nsp32_dbg(NSP32_DEBUG_TARGETFLAG, 1034 "target: %d sync_flag: 0x%x syncreg: 0x%x ackwidth: 0x%x", 1035 SCpnt->device->id, target->sync_flag, target->syncreg, 1036 target->ackwidth); 1037 1038 /* Selection */ 1039 if (auto_param == 0) { 1040 ret = nsp32_selection_autopara(SCpnt); 1041 } else { 1042 ret = nsp32_selection_autoscsi(SCpnt); 1043 } 1044 1045 if (ret != TRUE) { 1046 nsp32_dbg(NSP32_DEBUG_QUEUECOMMAND, "selection fail"); 1047 nsp32_scsi_done(SCpnt); 1048 } 1049 1050 return 0; 1051 } 1052 1053 /* initialize asic */ 1054 static int nsp32hw_init(nsp32_hw_data *data) 1055 { 1056 unsigned int base = data->BaseAddress; 1057 unsigned short irq_stat; 1058 unsigned long lc_reg; 1059 unsigned char power; 1060 1061 lc_reg = nsp32_index_read4(base, CFG_LATE_CACHE); 1062 if ((lc_reg & 0xff00) == 0) { 1063 lc_reg |= (0x20 << 8); 1064 nsp32_index_write2(base, CFG_LATE_CACHE, lc_reg & 0xffff); 1065 } 1066 1067 nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK); 1068 nsp32_write2(base, TRANSFER_CONTROL, 0); 1069 nsp32_write4(base, BM_CNT, 0); 1070 nsp32_write2(base, SCSI_EXECUTE_PHASE, 0); 1071 1072 do { 1073 irq_stat = nsp32_read2(base, IRQ_STATUS); 1074 nsp32_dbg(NSP32_DEBUG_INIT, "irq_stat 0x%x", irq_stat); 1075 } while (irq_stat & IRQSTATUS_ANY_IRQ); 1076 1077 /* 1078 * Fill FIFO_FULL_SHLD, FIFO_EMPTY_SHLD. Below parameter is 1079 * designated by specification. 1080 */ 1081 if ((data->trans_method & NSP32_TRANSFER_PIO) || 1082 (data->trans_method & NSP32_TRANSFER_MMIO)) { 1083 nsp32_index_write1(base, FIFO_FULL_SHLD_COUNT, 0x40); 1084 nsp32_index_write1(base, FIFO_EMPTY_SHLD_COUNT, 0x40); 1085 } else if (data->trans_method & NSP32_TRANSFER_BUSMASTER) { 1086 nsp32_index_write1(base, FIFO_FULL_SHLD_COUNT, 0x10); 1087 nsp32_index_write1(base, FIFO_EMPTY_SHLD_COUNT, 0x60); 1088 } else { 1089 nsp32_dbg(NSP32_DEBUG_INIT, "unknown transfer mode"); 1090 } 1091 1092 nsp32_dbg(NSP32_DEBUG_INIT, "full 0x%x emp 0x%x", 1093 nsp32_index_read1(base, FIFO_FULL_SHLD_COUNT), 1094 nsp32_index_read1(base, FIFO_EMPTY_SHLD_COUNT)); 1095 1096 nsp32_index_write1(base, CLOCK_DIV, data->clock); 1097 nsp32_index_write1(base, BM_CYCLE, MEMRD_CMD1 | SGT_AUTO_PARA_MEMED_CMD); 1098 nsp32_write1(base, PARITY_CONTROL, 0); /* parity check is disable */ 1099 1100 /* 1101 * initialize MISC_WRRD register 1102 * 1103 * Note: Designated parameters is obeyed as following: 1104 * MISC_SCSI_DIRECTION_DETECTOR_SELECT: It must be set. 1105 * MISC_MASTER_TERMINATION_SELECT: It must be set. 1106 * MISC_BMREQ_NEGATE_TIMING_SEL: It should be set. 1107 * MISC_AUTOSEL_TIMING_SEL: It should be set. 1108 * MISC_BMSTOP_CHANGE2_NONDATA_PHASE: It should be set. 1109 * MISC_DELAYED_BMSTART: It's selected for safety. 1110 * 1111 * Note: If MISC_BMSTOP_CHANGE2_NONDATA_PHASE is set, then 1112 * we have to set TRANSFERCONTROL_BM_START as 0 and set 1113 * appropriate value before restarting bus master transfer. 1114 */ 1115 nsp32_index_write2(base, MISC_WR, 1116 (SCSI_DIRECTION_DETECTOR_SELECT | 1117 DELAYED_BMSTART | 1118 MASTER_TERMINATION_SELECT | 1119 BMREQ_NEGATE_TIMING_SEL | 1120 AUTOSEL_TIMING_SEL | 1121 BMSTOP_CHANGE2_NONDATA_PHASE)); 1122 1123 nsp32_index_write1(base, TERM_PWR_CONTROL, 0); 1124 power = nsp32_index_read1(base, TERM_PWR_CONTROL); 1125 if (!(power & SENSE)) { 1126 nsp32_msg(KERN_INFO, "term power on"); 1127 nsp32_index_write1(base, TERM_PWR_CONTROL, BPWR); 1128 } 1129 1130 nsp32_write2(base, TIMER_SET, TIMER_STOP); 1131 nsp32_write2(base, TIMER_SET, TIMER_STOP); /* Required 2 times */ 1132 1133 nsp32_write1(base, SYNC_REG, 0); 1134 nsp32_write1(base, ACK_WIDTH, 0); 1135 nsp32_write2(base, SEL_TIME_OUT, SEL_TIMEOUT_TIME); 1136 1137 /* 1138 * enable to select designated IRQ (except for 1139 * IRQSELECT_SERR, IRQSELECT_PERR, IRQSELECT_BMCNTERR) 1140 */ 1141 nsp32_index_write2(base, IRQ_SELECT, IRQSELECT_TIMER_IRQ | 1142 IRQSELECT_SCSIRESET_IRQ | 1143 IRQSELECT_FIFO_SHLD_IRQ | 1144 IRQSELECT_RESELECT_IRQ | 1145 IRQSELECT_PHASE_CHANGE_IRQ | 1146 IRQSELECT_AUTO_SCSI_SEQ_IRQ | 1147 // IRQSELECT_BMCNTERR_IRQ | 1148 IRQSELECT_TARGET_ABORT_IRQ | 1149 IRQSELECT_MASTER_ABORT_IRQ ); 1150 nsp32_write2(base, IRQ_CONTROL, 0); 1151 1152 /* PCI LED off */ 1153 nsp32_index_write1(base, EXT_PORT_DDR, LED_OFF); 1154 nsp32_index_write1(base, EXT_PORT, LED_OFF); 1155 1156 return TRUE; 1157 } 1158 1159 1160 /* interrupt routine */ 1161 static irqreturn_t do_nsp32_isr(int irq, void *dev_id) 1162 { 1163 nsp32_hw_data *data = dev_id; 1164 unsigned int base = data->BaseAddress; 1165 struct scsi_cmnd *SCpnt = data->CurrentSC; 1166 unsigned short auto_stat, irq_stat, trans_stat; 1167 unsigned char busmon, busphase; 1168 unsigned long flags; 1169 int ret; 1170 int handled = 0; 1171 struct Scsi_Host *host = data->Host; 1172 1173 spin_lock_irqsave(host->host_lock, flags); 1174 1175 /* 1176 * IRQ check, then enable IRQ mask 1177 */ 1178 irq_stat = nsp32_read2(base, IRQ_STATUS); 1179 nsp32_dbg(NSP32_DEBUG_INTR, 1180 "enter IRQ: %d, IRQstatus: 0x%x", irq, irq_stat); 1181 /* is this interrupt comes from Ninja asic? */ 1182 if ((irq_stat & IRQSTATUS_ANY_IRQ) == 0) { 1183 nsp32_dbg(NSP32_DEBUG_INTR, "shared interrupt: irq other 0x%x", irq_stat); 1184 goto out2; 1185 } 1186 handled = 1; 1187 nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK); 1188 1189 busmon = nsp32_read1(base, SCSI_BUS_MONITOR); 1190 busphase = busmon & BUSMON_PHASE_MASK; 1191 1192 trans_stat = nsp32_read2(base, TRANSFER_STATUS); 1193 if ((irq_stat == 0xffff) && (trans_stat == 0xffff)) { 1194 nsp32_msg(KERN_INFO, "card disconnect"); 1195 if (data->CurrentSC != NULL) { 1196 nsp32_msg(KERN_INFO, "clean up current SCSI command"); 1197 SCpnt->result = DID_BAD_TARGET << 16; 1198 nsp32_scsi_done(SCpnt); 1199 } 1200 goto out; 1201 } 1202 1203 /* Timer IRQ */ 1204 if (irq_stat & IRQSTATUS_TIMER_IRQ) { 1205 nsp32_dbg(NSP32_DEBUG_INTR, "timer stop"); 1206 nsp32_write2(base, TIMER_SET, TIMER_STOP); 1207 goto out; 1208 } 1209 1210 /* SCSI reset */ 1211 if (irq_stat & IRQSTATUS_SCSIRESET_IRQ) { 1212 nsp32_msg(KERN_INFO, "detected someone do bus reset"); 1213 nsp32_do_bus_reset(data); 1214 if (SCpnt != NULL) { 1215 SCpnt->result = DID_RESET << 16; 1216 nsp32_scsi_done(SCpnt); 1217 } 1218 goto out; 1219 } 1220 1221 if (SCpnt == NULL) { 1222 nsp32_msg(KERN_WARNING, "SCpnt==NULL this can't be happened"); 1223 nsp32_msg(KERN_WARNING, "irq_stat=0x%x trans_stat=0x%x", irq_stat, trans_stat); 1224 goto out; 1225 } 1226 1227 /* 1228 * AutoSCSI Interrupt. 1229 * Note: This interrupt is occurred when AutoSCSI is finished. Then 1230 * check SCSIEXECUTEPHASE, and do appropriate action. Each phases are 1231 * recorded when AutoSCSI sequencer has been processed. 1232 */ 1233 if(irq_stat & IRQSTATUS_AUTOSCSI_IRQ) { 1234 /* getting SCSI executed phase */ 1235 auto_stat = nsp32_read2(base, SCSI_EXECUTE_PHASE); 1236 nsp32_write2(base, SCSI_EXECUTE_PHASE, 0); 1237 1238 /* Selection Timeout, go busfree phase. */ 1239 if (auto_stat & SELECTION_TIMEOUT) { 1240 nsp32_dbg(NSP32_DEBUG_INTR, 1241 "selection timeout occurred"); 1242 1243 SCpnt->result = DID_TIME_OUT << 16; 1244 nsp32_scsi_done(SCpnt); 1245 goto out; 1246 } 1247 1248 if (auto_stat & MSGOUT_PHASE) { 1249 /* 1250 * MsgOut phase was processed. 1251 * If MSG_IN_OCCUER is not set, then MsgOut phase is 1252 * completed. Thus, msgout_len must reset. Otherwise, 1253 * nothing to do here. If MSG_OUT_OCCUER is occurred, 1254 * then we will encounter the condition and check. 1255 */ 1256 if (!(auto_stat & MSG_IN_OCCUER) && 1257 (data->msgout_len <= 3)) { 1258 /* 1259 * !MSG_IN_OCCUER && msgout_len <=3 1260 * ---> AutoSCSI with MSGOUTreg is processed. 1261 */ 1262 data->msgout_len = 0; 1263 }; 1264 1265 nsp32_dbg(NSP32_DEBUG_INTR, "MsgOut phase processed"); 1266 } 1267 1268 if ((auto_stat & DATA_IN_PHASE) && 1269 (scsi_get_resid(SCpnt) > 0) && 1270 ((nsp32_read2(base, FIFO_REST_CNT) & FIFO_REST_MASK) != 0)) { 1271 printk( "auto+fifo\n"); 1272 //nsp32_pio_read(SCpnt); 1273 } 1274 1275 if (auto_stat & (DATA_IN_PHASE | DATA_OUT_PHASE)) { 1276 /* DATA_IN_PHASE/DATA_OUT_PHASE was processed. */ 1277 nsp32_dbg(NSP32_DEBUG_INTR, 1278 "Data in/out phase processed"); 1279 1280 /* read BMCNT, SGT pointer addr */ 1281 nsp32_dbg(NSP32_DEBUG_INTR, "BMCNT=0x%lx", 1282 nsp32_read4(base, BM_CNT)); 1283 nsp32_dbg(NSP32_DEBUG_INTR, "addr=0x%lx", 1284 nsp32_read4(base, SGT_ADR)); 1285 nsp32_dbg(NSP32_DEBUG_INTR, "SACK=0x%lx", 1286 nsp32_read4(base, SACK_CNT)); 1287 nsp32_dbg(NSP32_DEBUG_INTR, "SSACK=0x%lx", 1288 nsp32_read4(base, SAVED_SACK_CNT)); 1289 1290 scsi_set_resid(SCpnt, 0); /* all data transfered! */ 1291 } 1292 1293 /* 1294 * MsgIn Occur 1295 */ 1296 if (auto_stat & MSG_IN_OCCUER) { 1297 nsp32_msgin_occur(SCpnt, irq_stat, auto_stat); 1298 } 1299 1300 /* 1301 * MsgOut Occur 1302 */ 1303 if (auto_stat & MSG_OUT_OCCUER) { 1304 nsp32_msgout_occur(SCpnt); 1305 } 1306 1307 /* 1308 * Bus Free Occur 1309 */ 1310 if (auto_stat & BUS_FREE_OCCUER) { 1311 ret = nsp32_busfree_occur(SCpnt, auto_stat); 1312 if (ret == TRUE) { 1313 goto out; 1314 } 1315 } 1316 1317 if (auto_stat & STATUS_PHASE) { 1318 /* 1319 * Read CSB and substitute CSB for SCpnt->result 1320 * to save status phase stutas byte. 1321 * scsi error handler checks host_byte (DID_*: 1322 * low level driver to indicate status), then checks 1323 * status_byte (SCSI status byte). 1324 */ 1325 SCpnt->result = (int)nsp32_read1(base, SCSI_CSB_IN); 1326 } 1327 1328 if (auto_stat & ILLEGAL_PHASE) { 1329 /* Illegal phase is detected. SACK is not back. */ 1330 nsp32_msg(KERN_WARNING, 1331 "AUTO SCSI ILLEGAL PHASE OCCUR!!!!"); 1332 1333 /* TODO: currently we don't have any action... bus reset? */ 1334 1335 /* 1336 * To send back SACK, assert, wait, and negate. 1337 */ 1338 nsp32_sack_assert(data); 1339 nsp32_wait_req(data, NEGATE); 1340 nsp32_sack_negate(data); 1341 1342 } 1343 1344 if (auto_stat & COMMAND_PHASE) { 1345 /* nothing to do */ 1346 nsp32_dbg(NSP32_DEBUG_INTR, "Command phase processed"); 1347 } 1348 1349 if (auto_stat & AUTOSCSI_BUSY) { 1350 /* AutoSCSI is running */ 1351 } 1352 1353 show_autophase(auto_stat); 1354 } 1355 1356 /* FIFO_SHLD_IRQ */ 1357 if (irq_stat & IRQSTATUS_FIFO_SHLD_IRQ) { 1358 nsp32_dbg(NSP32_DEBUG_INTR, "FIFO IRQ"); 1359 1360 switch(busphase) { 1361 case BUSPHASE_DATA_OUT: 1362 nsp32_dbg(NSP32_DEBUG_INTR, "fifo/write"); 1363 1364 //nsp32_pio_write(SCpnt); 1365 1366 break; 1367 1368 case BUSPHASE_DATA_IN: 1369 nsp32_dbg(NSP32_DEBUG_INTR, "fifo/read"); 1370 1371 //nsp32_pio_read(SCpnt); 1372 1373 break; 1374 1375 case BUSPHASE_STATUS: 1376 nsp32_dbg(NSP32_DEBUG_INTR, "fifo/status"); 1377 1378 SCpnt->SCp.Status = nsp32_read1(base, SCSI_CSB_IN); 1379 1380 break; 1381 default: 1382 nsp32_dbg(NSP32_DEBUG_INTR, "fifo/other phase"); 1383 nsp32_dbg(NSP32_DEBUG_INTR, "irq_stat=0x%x trans_stat=0x%x", irq_stat, trans_stat); 1384 show_busphase(busphase); 1385 break; 1386 } 1387 1388 goto out; 1389 } 1390 1391 /* Phase Change IRQ */ 1392 if (irq_stat & IRQSTATUS_PHASE_CHANGE_IRQ) { 1393 nsp32_dbg(NSP32_DEBUG_INTR, "phase change IRQ"); 1394 1395 switch(busphase) { 1396 case BUSPHASE_MESSAGE_IN: 1397 nsp32_dbg(NSP32_DEBUG_INTR, "phase chg/msg in"); 1398 nsp32_msgin_occur(SCpnt, irq_stat, 0); 1399 break; 1400 default: 1401 nsp32_msg(KERN_WARNING, "phase chg/other phase?"); 1402 nsp32_msg(KERN_WARNING, "irq_stat=0x%x trans_stat=0x%x\n", 1403 irq_stat, trans_stat); 1404 show_busphase(busphase); 1405 break; 1406 } 1407 goto out; 1408 } 1409 1410 /* PCI_IRQ */ 1411 if (irq_stat & IRQSTATUS_PCI_IRQ) { 1412 nsp32_dbg(NSP32_DEBUG_INTR, "PCI IRQ occurred"); 1413 /* Do nothing */ 1414 } 1415 1416 /* BMCNTERR_IRQ */ 1417 if (irq_stat & IRQSTATUS_BMCNTERR_IRQ) { 1418 nsp32_msg(KERN_ERR, "Received unexpected BMCNTERR IRQ! "); 1419 /* 1420 * TODO: To be implemented improving bus master 1421 * transfer reliability when BMCNTERR is occurred in 1422 * AutoSCSI phase described in specification. 1423 */ 1424 } 1425 1426 #if 0 1427 nsp32_dbg(NSP32_DEBUG_INTR, 1428 "irq_stat=0x%x trans_stat=0x%x", irq_stat, trans_stat); 1429 show_busphase(busphase); 1430 #endif 1431 1432 out: 1433 /* disable IRQ mask */ 1434 nsp32_write2(base, IRQ_CONTROL, 0); 1435 1436 out2: 1437 spin_unlock_irqrestore(host->host_lock, flags); 1438 1439 nsp32_dbg(NSP32_DEBUG_INTR, "exit"); 1440 1441 return IRQ_RETVAL(handled); 1442 } 1443 1444 #undef SPRINTF 1445 #define SPRINTF(args...) \ 1446 do { \ 1447 if(length > (pos - buffer)) { \ 1448 pos += snprintf(pos, length - (pos - buffer) + 1, ## args); \ 1449 nsp32_dbg(NSP32_DEBUG_PROC, "buffer=0x%p pos=0x%p length=%d %d\n", buffer, pos, length, length - (pos - buffer));\ 1450 } \ 1451 } while(0) 1452 1453 static int nsp32_proc_info(struct Scsi_Host *host, char *buffer, char **start, 1454 off_t offset, int length, int inout) 1455 { 1456 char *pos = buffer; 1457 int thislength; 1458 unsigned long flags; 1459 nsp32_hw_data *data; 1460 int hostno; 1461 unsigned int base; 1462 unsigned char mode_reg; 1463 int id, speed; 1464 long model; 1465 1466 /* Write is not supported, just return. */ 1467 if (inout == TRUE) { 1468 return -EINVAL; 1469 } 1470 1471 hostno = host->host_no; 1472 data = (nsp32_hw_data *)host->hostdata; 1473 base = host->io_port; 1474 1475 SPRINTF("NinjaSCSI-32 status\n\n"); 1476 SPRINTF("Driver version: %s, $Revision: 1.33 $\n", nsp32_release_version); 1477 SPRINTF("SCSI host No.: %d\n", hostno); 1478 SPRINTF("IRQ: %d\n", host->irq); 1479 SPRINTF("IO: 0x%lx-0x%lx\n", host->io_port, host->io_port + host->n_io_port - 1); 1480 SPRINTF("MMIO(virtual address): 0x%lx-0x%lx\n", host->base, host->base + data->MmioLength - 1); 1481 SPRINTF("sg_tablesize: %d\n", host->sg_tablesize); 1482 SPRINTF("Chip revision: 0x%x\n", (nsp32_read2(base, INDEX_REG) >> 8) & 0xff); 1483 1484 mode_reg = nsp32_index_read1(base, CHIP_MODE); 1485 model = data->pci_devid->driver_data; 1486 1487 #ifdef CONFIG_PM 1488 SPRINTF("Power Management: %s\n", (mode_reg & OPTF) ? "yes" : "no"); 1489 #endif 1490 SPRINTF("OEM: %ld, %s\n", (mode_reg & (OEM0|OEM1)), nsp32_model[model]); 1491 1492 spin_lock_irqsave(&(data->Lock), flags); 1493 SPRINTF("CurrentSC: 0x%p\n\n", data->CurrentSC); 1494 spin_unlock_irqrestore(&(data->Lock), flags); 1495 1496 1497 SPRINTF("SDTR status\n"); 1498 for (id = 0; id < ARRAY_SIZE(data->target); id++) { 1499 1500 SPRINTF("id %d: ", id); 1501 1502 if (id == host->this_id) { 1503 SPRINTF("----- NinjaSCSI-32 host adapter\n"); 1504 continue; 1505 } 1506 1507 if (data->target[id].sync_flag == SDTR_DONE) { 1508 if (data->target[id].period == 0 && 1509 data->target[id].offset == ASYNC_OFFSET ) { 1510 SPRINTF("async"); 1511 } else { 1512 SPRINTF(" sync"); 1513 } 1514 } else { 1515 SPRINTF(" none"); 1516 } 1517 1518 if (data->target[id].period != 0) { 1519 1520 speed = 1000000 / (data->target[id].period * 4); 1521 1522 SPRINTF(" transfer %d.%dMB/s, offset %d", 1523 speed / 1000, 1524 speed % 1000, 1525 data->target[id].offset 1526 ); 1527 } 1528 SPRINTF("\n"); 1529 } 1530 1531 1532 thislength = pos - (buffer + offset); 1533 1534 if(thislength < 0) { 1535 *start = NULL; 1536 return 0; 1537 } 1538 1539 1540 thislength = min(thislength, length); 1541 *start = buffer + offset; 1542 1543 return thislength; 1544 } 1545 #undef SPRINTF 1546 1547 1548 1549 /* 1550 * Reset parameters and call scsi_done for data->cur_lunt. 1551 * Be careful setting SCpnt->result = DID_* before calling this function. 1552 */ 1553 static void nsp32_scsi_done(struct scsi_cmnd *SCpnt) 1554 { 1555 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; 1556 unsigned int base = SCpnt->device->host->io_port; 1557 1558 scsi_dma_unmap(SCpnt); 1559 1560 /* 1561 * clear TRANSFERCONTROL_BM_START 1562 */ 1563 nsp32_write2(base, TRANSFER_CONTROL, 0); 1564 nsp32_write4(base, BM_CNT, 0); 1565 1566 /* 1567 * call scsi_done 1568 */ 1569 (*SCpnt->scsi_done)(SCpnt); 1570 1571 /* 1572 * reset parameters 1573 */ 1574 data->cur_lunt->SCpnt = NULL; 1575 data->cur_lunt = NULL; 1576 data->cur_target = NULL; 1577 data->CurrentSC = NULL; 1578 } 1579 1580 1581 /* 1582 * Bus Free Occur 1583 * 1584 * Current Phase is BUSFREE. AutoSCSI is automatically execute BUSFREE phase 1585 * with ACK reply when below condition is matched: 1586 * MsgIn 00: Command Complete. 1587 * MsgIn 02: Save Data Pointer. 1588 * MsgIn 04: Diconnect. 1589 * In other case, unexpected BUSFREE is detected. 1590 */ 1591 static int nsp32_busfree_occur(struct scsi_cmnd *SCpnt, unsigned short execph) 1592 { 1593 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; 1594 unsigned int base = SCpnt->device->host->io_port; 1595 1596 nsp32_dbg(NSP32_DEBUG_BUSFREE, "enter execph=0x%x", execph); 1597 show_autophase(execph); 1598 1599 nsp32_write4(base, BM_CNT, 0); 1600 nsp32_write2(base, TRANSFER_CONTROL, 0); 1601 1602 /* 1603 * MsgIn 02: Save Data Pointer 1604 * 1605 * VALID: 1606 * Save Data Pointer is received. Adjust pointer. 1607 * 1608 * NO-VALID: 1609 * SCSI-3 says if Save Data Pointer is not received, then we restart 1610 * processing and we can't adjust any SCSI data pointer in next data 1611 * phase. 1612 */ 1613 if (execph & MSGIN_02_VALID) { 1614 nsp32_dbg(NSP32_DEBUG_BUSFREE, "MsgIn02_Valid"); 1615 1616 /* 1617 * Check sack_cnt/saved_sack_cnt, then adjust sg table if 1618 * needed. 1619 */ 1620 if (!(execph & MSGIN_00_VALID) && 1621 ((execph & DATA_IN_PHASE) || (execph & DATA_OUT_PHASE))) { 1622 unsigned int sacklen, s_sacklen; 1623 1624 /* 1625 * Read SACK count and SAVEDSACK count, then compare. 1626 */ 1627 sacklen = nsp32_read4(base, SACK_CNT ); 1628 s_sacklen = nsp32_read4(base, SAVED_SACK_CNT); 1629 1630 /* 1631 * If SAVEDSACKCNT == 0, it means SavedDataPointer is 1632 * come after data transfering. 1633 */ 1634 if (s_sacklen > 0) { 1635 /* 1636 * Comparing between sack and savedsack to 1637 * check the condition of AutoMsgIn03. 1638 * 1639 * If they are same, set msgin03 == TRUE, 1640 * COMMANDCONTROL_AUTO_MSGIN_03 is enabled at 1641 * reselection. On the other hand, if they 1642 * aren't same, set msgin03 == FALSE, and 1643 * COMMANDCONTROL_AUTO_MSGIN_03 is disabled at 1644 * reselection. 1645 */ 1646 if (sacklen != s_sacklen) { 1647 data->cur_lunt->msgin03 = FALSE; 1648 } else { 1649 data->cur_lunt->msgin03 = TRUE; 1650 } 1651 1652 nsp32_adjust_busfree(SCpnt, s_sacklen); 1653 } 1654 } 1655 1656 /* This value has not substitude with valid value yet... */ 1657 //data->cur_lunt->save_datp = data->cur_datp; 1658 } else { 1659 /* 1660 * no processing. 1661 */ 1662 } 1663 1664 if (execph & MSGIN_03_VALID) { 1665 /* MsgIn03 was valid to be processed. No need processing. */ 1666 } 1667 1668 /* 1669 * target SDTR check 1670 */ 1671 if (data->cur_target->sync_flag & SDTR_INITIATOR) { 1672 /* 1673 * SDTR negotiation pulled by the initiator has not 1674 * finished yet. Fall back to ASYNC mode. 1675 */ 1676 nsp32_set_async(data, data->cur_target); 1677 data->cur_target->sync_flag &= ~SDTR_INITIATOR; 1678 data->cur_target->sync_flag |= SDTR_DONE; 1679 } else if (data->cur_target->sync_flag & SDTR_TARGET) { 1680 /* 1681 * SDTR negotiation pulled by the target has been 1682 * negotiating. 1683 */ 1684 if (execph & (MSGIN_00_VALID | MSGIN_04_VALID)) { 1685 /* 1686 * If valid message is received, then 1687 * negotiation is succeeded. 1688 */ 1689 } else { 1690 /* 1691 * On the contrary, if unexpected bus free is 1692 * occurred, then negotiation is failed. Fall 1693 * back to ASYNC mode. 1694 */ 1695 nsp32_set_async(data, data->cur_target); 1696 } 1697 data->cur_target->sync_flag &= ~SDTR_TARGET; 1698 data->cur_target->sync_flag |= SDTR_DONE; 1699 } 1700 1701 /* 1702 * It is always ensured by SCSI standard that initiator 1703 * switches into Bus Free Phase after 1704 * receiving message 00 (Command Complete), 04 (Disconnect). 1705 * It's the reason that processing here is valid. 1706 */ 1707 if (execph & MSGIN_00_VALID) { 1708 /* MsgIn 00: Command Complete */ 1709 nsp32_dbg(NSP32_DEBUG_BUSFREE, "command complete"); 1710 1711 SCpnt->SCp.Status = nsp32_read1(base, SCSI_CSB_IN); 1712 SCpnt->SCp.Message = 0; 1713 nsp32_dbg(NSP32_DEBUG_BUSFREE, 1714 "normal end stat=0x%x resid=0x%x\n", 1715 SCpnt->SCp.Status, scsi_get_resid(SCpnt)); 1716 SCpnt->result = (DID_OK << 16) | 1717 (SCpnt->SCp.Message << 8) | 1718 (SCpnt->SCp.Status << 0); 1719 nsp32_scsi_done(SCpnt); 1720 /* All operation is done */ 1721 return TRUE; 1722 } else if (execph & MSGIN_04_VALID) { 1723 /* MsgIn 04: Disconnect */ 1724 SCpnt->SCp.Status = nsp32_read1(base, SCSI_CSB_IN); 1725 SCpnt->SCp.Message = 4; 1726 1727 nsp32_dbg(NSP32_DEBUG_BUSFREE, "disconnect"); 1728 return TRUE; 1729 } else { 1730 /* Unexpected bus free */ 1731 nsp32_msg(KERN_WARNING, "unexpected bus free occurred"); 1732 1733 /* DID_ERROR? */ 1734 //SCpnt->result = (DID_OK << 16) | (SCpnt->SCp.Message << 8) | (SCpnt->SCp.Status << 0); 1735 SCpnt->result = DID_ERROR << 16; 1736 nsp32_scsi_done(SCpnt); 1737 return TRUE; 1738 } 1739 return FALSE; 1740 } 1741 1742 1743 /* 1744 * nsp32_adjust_busfree - adjusting SG table 1745 * 1746 * Note: This driver adjust the SG table using SCSI ACK 1747 * counter instead of BMCNT counter! 1748 */ 1749 static void nsp32_adjust_busfree(struct scsi_cmnd *SCpnt, unsigned int s_sacklen) 1750 { 1751 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; 1752 int old_entry = data->cur_entry; 1753 int new_entry; 1754 int sg_num = data->cur_lunt->sg_num; 1755 nsp32_sgtable *sgt = data->cur_lunt->sglun->sgt; 1756 unsigned int restlen, sentlen; 1757 u32_le len, addr; 1758 1759 nsp32_dbg(NSP32_DEBUG_SGLIST, "old resid=0x%x", scsi_get_resid(SCpnt)); 1760 1761 /* adjust saved SACK count with 4 byte start address boundary */ 1762 s_sacklen -= le32_to_cpu(sgt[old_entry].addr) & 3; 1763 1764 /* 1765 * calculate new_entry from sack count and each sgt[].len 1766 * calculate the byte which is intent to send 1767 */ 1768 sentlen = 0; 1769 for (new_entry = old_entry; new_entry < sg_num; new_entry++) { 1770 sentlen += (le32_to_cpu(sgt[new_entry].len) & ~SGTEND); 1771 if (sentlen > s_sacklen) { 1772 break; 1773 } 1774 } 1775 1776 /* all sgt is processed */ 1777 if (new_entry == sg_num) { 1778 goto last; 1779 } 1780 1781 if (sentlen == s_sacklen) { 1782 /* XXX: confirm it's ok or not */ 1783 /* In this case, it's ok because we are at 1784 the head element of the sg. restlen is correctly calculated. */ 1785 } 1786 1787 /* calculate the rest length for transfering */ 1788 restlen = sentlen - s_sacklen; 1789 1790 /* update adjusting current SG table entry */ 1791 len = le32_to_cpu(sgt[new_entry].len); 1792 addr = le32_to_cpu(sgt[new_entry].addr); 1793 addr += (len - restlen); 1794 sgt[new_entry].addr = cpu_to_le32(addr); 1795 sgt[new_entry].len = cpu_to_le32(restlen); 1796 1797 /* set cur_entry with new_entry */ 1798 data->cur_entry = new_entry; 1799 1800 return; 1801 1802 last: 1803 if (scsi_get_resid(SCpnt) < sentlen) { 1804 nsp32_msg(KERN_ERR, "resid underflow"); 1805 } 1806 1807 scsi_set_resid(SCpnt, scsi_get_resid(SCpnt) - sentlen); 1808 nsp32_dbg(NSP32_DEBUG_SGLIST, "new resid=0x%x", scsi_get_resid(SCpnt)); 1809 1810 /* update hostdata and lun */ 1811 1812 return; 1813 } 1814 1815 1816 /* 1817 * It's called MsgOut phase occur. 1818 * NinjaSCSI-32Bi/UDE automatically processes up to 3 messages in 1819 * message out phase. It, however, has more than 3 messages, 1820 * HBA creates the interrupt and we have to process by hand. 1821 */ 1822 static void nsp32_msgout_occur(struct scsi_cmnd *SCpnt) 1823 { 1824 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; 1825 unsigned int base = SCpnt->device->host->io_port; 1826 //unsigned short command; 1827 long new_sgtp; 1828 int i; 1829 1830 nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR, 1831 "enter: msgout_len: 0x%x", data->msgout_len); 1832 1833 /* 1834 * If MsgOut phase is occurred without having any 1835 * message, then No_Operation is sent (SCSI-2). 1836 */ 1837 if (data->msgout_len == 0) { 1838 nsp32_build_nop(SCpnt); 1839 } 1840 1841 /* 1842 * Set SGTP ADDR current entry for restarting AUTOSCSI, 1843 * because SGTP is incremented next point. 1844 * There is few statement in the specification... 1845 */ 1846 new_sgtp = data->cur_lunt->sglun_paddr + 1847 (data->cur_lunt->cur_entry * sizeof(nsp32_sgtable)); 1848 1849 /* 1850 * send messages 1851 */ 1852 for (i = 0; i < data->msgout_len; i++) { 1853 nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR, 1854 "%d : 0x%x", i, data->msgoutbuf[i]); 1855 1856 /* 1857 * Check REQ is asserted. 1858 */ 1859 nsp32_wait_req(data, ASSERT); 1860 1861 if (i == (data->msgout_len - 1)) { 1862 /* 1863 * If the last message, set the AutoSCSI restart 1864 * before send back the ack message. AutoSCSI 1865 * restart automatically negate ATN signal. 1866 */ 1867 //command = (AUTO_MSGIN_00_OR_04 | AUTO_MSGIN_02); 1868 //nsp32_restart_autoscsi(SCpnt, command); 1869 nsp32_write2(base, COMMAND_CONTROL, 1870 (CLEAR_CDB_FIFO_POINTER | 1871 AUTO_COMMAND_PHASE | 1872 AUTOSCSI_RESTART | 1873 AUTO_MSGIN_00_OR_04 | 1874 AUTO_MSGIN_02 )); 1875 } 1876 /* 1877 * Write data with SACK, then wait sack is 1878 * automatically negated. 1879 */ 1880 nsp32_write1(base, SCSI_DATA_WITH_ACK, data->msgoutbuf[i]); 1881 nsp32_wait_sack(data, NEGATE); 1882 1883 nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR, "bus: 0x%x\n", 1884 nsp32_read1(base, SCSI_BUS_MONITOR)); 1885 }; 1886 1887 data->msgout_len = 0; 1888 1889 nsp32_dbg(NSP32_DEBUG_MSGOUTOCCUR, "exit"); 1890 } 1891 1892 /* 1893 * Restart AutoSCSI 1894 * 1895 * Note: Restarting AutoSCSI needs set: 1896 * SYNC_REG, ACK_WIDTH, SGT_ADR, TRANSFER_CONTROL 1897 */ 1898 static void nsp32_restart_autoscsi(struct scsi_cmnd *SCpnt, unsigned short command) 1899 { 1900 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; 1901 unsigned int base = data->BaseAddress; 1902 unsigned short transfer = 0; 1903 1904 nsp32_dbg(NSP32_DEBUG_RESTART, "enter"); 1905 1906 if (data->cur_target == NULL || data->cur_lunt == NULL) { 1907 nsp32_msg(KERN_ERR, "Target or Lun is invalid"); 1908 } 1909 1910 /* 1911 * set SYNC_REG 1912 * Don't set BM_START_ADR before setting this register. 1913 */ 1914 nsp32_write1(base, SYNC_REG, data->cur_target->syncreg); 1915 1916 /* 1917 * set ACKWIDTH 1918 */ 1919 nsp32_write1(base, ACK_WIDTH, data->cur_target->ackwidth); 1920 1921 /* 1922 * set SREQ hazard killer sampling rate 1923 */ 1924 nsp32_write1(base, SREQ_SMPL_RATE, data->cur_target->sample_reg); 1925 1926 /* 1927 * set SGT ADDR (physical address) 1928 */ 1929 nsp32_write4(base, SGT_ADR, data->cur_lunt->sglun_paddr); 1930 1931 /* 1932 * set TRANSFER CONTROL REG 1933 */ 1934 transfer = 0; 1935 transfer |= (TRANSFER_GO | ALL_COUNTER_CLR); 1936 if (data->trans_method & NSP32_TRANSFER_BUSMASTER) { 1937 if (scsi_bufflen(SCpnt) > 0) { 1938 transfer |= BM_START; 1939 } 1940 } else if (data->trans_method & NSP32_TRANSFER_MMIO) { 1941 transfer |= CB_MMIO_MODE; 1942 } else if (data->trans_method & NSP32_TRANSFER_PIO) { 1943 transfer |= CB_IO_MODE; 1944 } 1945 nsp32_write2(base, TRANSFER_CONTROL, transfer); 1946 1947 /* 1948 * restart AutoSCSI 1949 * 1950 * TODO: COMMANDCONTROL_AUTO_COMMAND_PHASE is needed ? 1951 */ 1952 command |= (CLEAR_CDB_FIFO_POINTER | 1953 AUTO_COMMAND_PHASE | 1954 AUTOSCSI_RESTART ); 1955 nsp32_write2(base, COMMAND_CONTROL, command); 1956 1957 nsp32_dbg(NSP32_DEBUG_RESTART, "exit"); 1958 } 1959 1960 1961 /* 1962 * cannot run automatically message in occur 1963 */ 1964 static void nsp32_msgin_occur(struct scsi_cmnd *SCpnt, 1965 unsigned long irq_status, 1966 unsigned short execph) 1967 { 1968 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; 1969 unsigned int base = SCpnt->device->host->io_port; 1970 unsigned char msg; 1971 unsigned char msgtype; 1972 unsigned char newlun; 1973 unsigned short command = 0; 1974 int msgclear = TRUE; 1975 long new_sgtp; 1976 int ret; 1977 1978 /* 1979 * read first message 1980 * Use SCSIDATA_W_ACK instead of SCSIDATAIN, because the procedure 1981 * of Message-In have to be processed before sending back SCSI ACK. 1982 */ 1983 msg = nsp32_read1(base, SCSI_DATA_IN); 1984 data->msginbuf[(unsigned char)data->msgin_len] = msg; 1985 msgtype = data->msginbuf[0]; 1986 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, 1987 "enter: msglen: 0x%x msgin: 0x%x msgtype: 0x%x", 1988 data->msgin_len, msg, msgtype); 1989 1990 /* 1991 * TODO: We need checking whether bus phase is message in? 1992 */ 1993 1994 /* 1995 * assert SCSI ACK 1996 */ 1997 nsp32_sack_assert(data); 1998 1999 /* 2000 * processing IDENTIFY 2001 */ 2002 if (msgtype & 0x80) { 2003 if (!(irq_status & IRQSTATUS_RESELECT_OCCUER)) { 2004 /* Invalid (non reselect) phase */ 2005 goto reject; 2006 } 2007 2008 newlun = msgtype & 0x1f; /* TODO: SPI-3 compliant? */ 2009 ret = nsp32_reselection(SCpnt, newlun); 2010 if (ret == TRUE) { 2011 goto restart; 2012 } else { 2013 goto reject; 2014 } 2015 } 2016 2017 /* 2018 * processing messages except for IDENTIFY 2019 * 2020 * TODO: Messages are all SCSI-2 terminology. SCSI-3 compliance is TODO. 2021 */ 2022 switch (msgtype) { 2023 /* 2024 * 1-byte message 2025 */ 2026 case COMMAND_COMPLETE: 2027 case DISCONNECT: 2028 /* 2029 * These messages should not be occurred. 2030 * They should be processed on AutoSCSI sequencer. 2031 */ 2032 nsp32_msg(KERN_WARNING, 2033 "unexpected message of AutoSCSI MsgIn: 0x%x", msg); 2034 break; 2035 2036 case RESTORE_POINTERS: 2037 /* 2038 * AutoMsgIn03 is disabled, and HBA gets this message. 2039 */ 2040 2041 if ((execph & DATA_IN_PHASE) || (execph & DATA_OUT_PHASE)) { 2042 unsigned int s_sacklen; 2043 2044 s_sacklen = nsp32_read4(base, SAVED_SACK_CNT); 2045 if ((execph & MSGIN_02_VALID) && (s_sacklen > 0)) { 2046 nsp32_adjust_busfree(SCpnt, s_sacklen); 2047 } else { 2048 /* No need to rewrite SGT */ 2049 } 2050 } 2051 data->cur_lunt->msgin03 = FALSE; 2052 2053 /* Update with the new value */ 2054 2055 /* reset SACK/SavedACK counter (or ALL clear?) */ 2056 nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK); 2057 2058 /* 2059 * set new sg pointer 2060 */ 2061 new_sgtp = data->cur_lunt->sglun_paddr + 2062 (data->cur_lunt->cur_entry * sizeof(nsp32_sgtable)); 2063 nsp32_write4(base, SGT_ADR, new_sgtp); 2064 2065 break; 2066 2067 case SAVE_POINTERS: 2068 /* 2069 * These messages should not be occurred. 2070 * They should be processed on AutoSCSI sequencer. 2071 */ 2072 nsp32_msg (KERN_WARNING, 2073 "unexpected message of AutoSCSI MsgIn: SAVE_POINTERS"); 2074 2075 break; 2076 2077 case MESSAGE_REJECT: 2078 /* If previous message_out is sending SDTR, and get 2079 message_reject from target, SDTR negotiation is failed */ 2080 if (data->cur_target->sync_flag & 2081 (SDTR_INITIATOR | SDTR_TARGET)) { 2082 /* 2083 * Current target is negotiating SDTR, but it's 2084 * failed. Fall back to async transfer mode, and set 2085 * SDTR_DONE. 2086 */ 2087 nsp32_set_async(data, data->cur_target); 2088 data->cur_target->sync_flag &= ~SDTR_INITIATOR; 2089 data->cur_target->sync_flag |= SDTR_DONE; 2090 2091 } 2092 break; 2093 2094 case LINKED_CMD_COMPLETE: 2095 case LINKED_FLG_CMD_COMPLETE: 2096 /* queue tag is not supported currently */ 2097 nsp32_msg (KERN_WARNING, 2098 "unsupported message: 0x%x", msgtype); 2099 break; 2100 2101 case INITIATE_RECOVERY: 2102 /* staring ECA (Extended Contingent Allegiance) state. */ 2103 /* This message is declined in SPI2 or later. */ 2104 2105 goto reject; 2106 2107 /* 2108 * 2-byte message 2109 */ 2110 case SIMPLE_QUEUE_TAG: 2111 case 0x23: 2112 /* 2113 * 0x23: Ignore_Wide_Residue is not declared in scsi.h. 2114 * No support is needed. 2115 */ 2116 if (data->msgin_len >= 1) { 2117 goto reject; 2118 } 2119 2120 /* current position is 1-byte of 2 byte */ 2121 msgclear = FALSE; 2122 2123 break; 2124 2125 /* 2126 * extended message 2127 */ 2128 case EXTENDED_MESSAGE: 2129 if (data->msgin_len < 1) { 2130 /* 2131 * Current position does not reach 2-byte 2132 * (2-byte is extended message length). 2133 */ 2134 msgclear = FALSE; 2135 break; 2136 } 2137 2138 if ((data->msginbuf[1] + 1) > data->msgin_len) { 2139 /* 2140 * Current extended message has msginbuf[1] + 2 2141 * (msgin_len starts counting from 0, so buf[1] + 1). 2142 * If current message position is not finished, 2143 * continue receiving message. 2144 */ 2145 msgclear = FALSE; 2146 break; 2147 } 2148 2149 /* 2150 * Reach here means regular length of each type of 2151 * extended messages. 2152 */ 2153 switch (data->msginbuf[2]) { 2154 case EXTENDED_MODIFY_DATA_POINTER: 2155 /* TODO */ 2156 goto reject; /* not implemented yet */ 2157 break; 2158 2159 case EXTENDED_SDTR: 2160 /* 2161 * Exchange this message between initiator and target. 2162 */ 2163 if (data->msgin_len != EXTENDED_SDTR_LEN + 1) { 2164 /* 2165 * received inappropriate message. 2166 */ 2167 goto reject; 2168 break; 2169 } 2170 2171 nsp32_analyze_sdtr(SCpnt); 2172 2173 break; 2174 2175 case EXTENDED_EXTENDED_IDENTIFY: 2176 /* SCSI-I only, not supported. */ 2177 goto reject; /* not implemented yet */ 2178 2179 break; 2180 2181 case EXTENDED_WDTR: 2182 goto reject; /* not implemented yet */ 2183 2184 break; 2185 2186 default: 2187 goto reject; 2188 } 2189 break; 2190 2191 default: 2192 goto reject; 2193 } 2194 2195 restart: 2196 if (msgclear == TRUE) { 2197 data->msgin_len = 0; 2198 2199 /* 2200 * If restarting AutoSCSI, but there are some message to out 2201 * (msgout_len > 0), set AutoATN, and set SCSIMSGOUT as 0 2202 * (MV_VALID = 0). When commandcontrol is written with 2203 * AutoSCSI restart, at the same time MsgOutOccur should be 2204 * happened (however, such situation is really possible...?). 2205 */ 2206 if (data->msgout_len > 0) { 2207 nsp32_write4(base, SCSI_MSG_OUT, 0); 2208 command |= AUTO_ATN; 2209 } 2210 2211 /* 2212 * restart AutoSCSI 2213 * If it's failed, COMMANDCONTROL_AUTO_COMMAND_PHASE is needed. 2214 */ 2215 command |= (AUTO_MSGIN_00_OR_04 | AUTO_MSGIN_02); 2216 2217 /* 2218 * If current msgin03 is TRUE, then flag on. 2219 */ 2220 if (data->cur_lunt->msgin03 == TRUE) { 2221 command |= AUTO_MSGIN_03; 2222 } 2223 data->cur_lunt->msgin03 = FALSE; 2224 } else { 2225 data->msgin_len++; 2226 } 2227 2228 /* 2229 * restart AutoSCSI 2230 */ 2231 nsp32_restart_autoscsi(SCpnt, command); 2232 2233 /* 2234 * wait SCSI REQ negate for REQ-ACK handshake 2235 */ 2236 nsp32_wait_req(data, NEGATE); 2237 2238 /* 2239 * negate SCSI ACK 2240 */ 2241 nsp32_sack_negate(data); 2242 2243 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit"); 2244 2245 return; 2246 2247 reject: 2248 nsp32_msg(KERN_WARNING, 2249 "invalid or unsupported MessageIn, rejected. " 2250 "current msg: 0x%x (len: 0x%x), processing msg: 0x%x", 2251 msg, data->msgin_len, msgtype); 2252 nsp32_build_reject(SCpnt); 2253 data->msgin_len = 0; 2254 2255 goto restart; 2256 } 2257 2258 /* 2259 * 2260 */ 2261 static void nsp32_analyze_sdtr(struct scsi_cmnd *SCpnt) 2262 { 2263 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; 2264 nsp32_target *target = data->cur_target; 2265 nsp32_sync_table *synct; 2266 unsigned char get_period = data->msginbuf[3]; 2267 unsigned char get_offset = data->msginbuf[4]; 2268 int entry; 2269 int syncnum; 2270 2271 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "enter"); 2272 2273 synct = data->synct; 2274 syncnum = data->syncnum; 2275 2276 /* 2277 * If this inititor sent the SDTR message, then target responds SDTR, 2278 * initiator SYNCREG, ACKWIDTH from SDTR parameter. 2279 * Messages are not appropriate, then send back reject message. 2280 * If initiator did not send the SDTR, but target sends SDTR, 2281 * initiator calculator the appropriate parameter and send back SDTR. 2282 */ 2283 if (target->sync_flag & SDTR_INITIATOR) { 2284 /* 2285 * Initiator sent SDTR, the target responds and 2286 * send back negotiation SDTR. 2287 */ 2288 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "target responds SDTR"); 2289 2290 target->sync_flag &= ~SDTR_INITIATOR; 2291 target->sync_flag |= SDTR_DONE; 2292 2293 /* 2294 * offset: 2295 */ 2296 if (get_offset > SYNC_OFFSET) { 2297 /* 2298 * Negotiation is failed, the target send back 2299 * unexpected offset value. 2300 */ 2301 goto reject; 2302 } 2303 2304 if (get_offset == ASYNC_OFFSET) { 2305 /* 2306 * Negotiation is succeeded, the target want 2307 * to fall back into asynchronous transfer mode. 2308 */ 2309 goto async; 2310 } 2311 2312 /* 2313 * period: 2314 * Check whether sync period is too short. If too short, 2315 * fall back to async mode. If it's ok, then investigate 2316 * the received sync period. If sync period is acceptable 2317 * between sync table start_period and end_period, then 2318 * set this I_T nexus as sent offset and period. 2319 * If it's not acceptable, send back reject and fall back 2320 * to async mode. 2321 */ 2322 if (get_period < data->synct[0].period_num) { 2323 /* 2324 * Negotiation is failed, the target send back 2325 * unexpected period value. 2326 */ 2327 goto reject; 2328 } 2329 2330 entry = nsp32_search_period_entry(data, target, get_period); 2331 2332 if (entry < 0) { 2333 /* 2334 * Target want to use long period which is not 2335 * acceptable NinjaSCSI-32Bi/UDE. 2336 */ 2337 goto reject; 2338 } 2339 2340 /* 2341 * Set new sync table and offset in this I_T nexus. 2342 */ 2343 nsp32_set_sync_entry(data, target, entry, get_offset); 2344 } else { 2345 /* Target send SDTR to initiator. */ 2346 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "target send SDTR"); 2347 2348 target->sync_flag |= SDTR_INITIATOR; 2349 2350 /* offset: */ 2351 if (get_offset > SYNC_OFFSET) { 2352 /* send back as SYNC_OFFSET */ 2353 get_offset = SYNC_OFFSET; 2354 } 2355 2356 /* period: */ 2357 if (get_period < data->synct[0].period_num) { 2358 get_period = data->synct[0].period_num; 2359 } 2360 2361 entry = nsp32_search_period_entry(data, target, get_period); 2362 2363 if (get_offset == ASYNC_OFFSET || entry < 0) { 2364 nsp32_set_async(data, target); 2365 nsp32_build_sdtr(SCpnt, 0, ASYNC_OFFSET); 2366 } else { 2367 nsp32_set_sync_entry(data, target, entry, get_offset); 2368 nsp32_build_sdtr(SCpnt, get_period, get_offset); 2369 } 2370 } 2371 2372 target->period = get_period; 2373 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit"); 2374 return; 2375 2376 reject: 2377 /* 2378 * If the current message is unacceptable, send back to the target 2379 * with reject message. 2380 */ 2381 nsp32_build_reject(SCpnt); 2382 2383 async: 2384 nsp32_set_async(data, target); /* set as ASYNC transfer mode */ 2385 2386 target->period = 0; 2387 nsp32_dbg(NSP32_DEBUG_MSGINOCCUR, "exit: set async"); 2388 return; 2389 } 2390 2391 2392 /* 2393 * Search config entry number matched in sync_table from given 2394 * target and speed period value. If failed to search, return negative value. 2395 */ 2396 static int nsp32_search_period_entry(nsp32_hw_data *data, 2397 nsp32_target *target, 2398 unsigned char period) 2399 { 2400 int i; 2401 2402 if (target->limit_entry >= data->syncnum) { 2403 nsp32_msg(KERN_ERR, "limit_entry exceeds syncnum!"); 2404 target->limit_entry = 0; 2405 } 2406 2407 for (i = target->limit_entry; i < data->syncnum; i++) { 2408 if (period >= data->synct[i].start_period && 2409 period <= data->synct[i].end_period) { 2410 break; 2411 } 2412 } 2413 2414 /* 2415 * Check given period value is over the sync_table value. 2416 * If so, return max value. 2417 */ 2418 if (i == data->syncnum) { 2419 i = -1; 2420 } 2421 2422 return i; 2423 } 2424 2425 2426 /* 2427 * target <-> initiator use ASYNC transfer 2428 */ 2429 static void nsp32_set_async(nsp32_hw_data *data, nsp32_target *target) 2430 { 2431 unsigned char period = data->synct[target->limit_entry].period_num; 2432 2433 target->offset = ASYNC_OFFSET; 2434 target->period = 0; 2435 target->syncreg = TO_SYNCREG(period, ASYNC_OFFSET); 2436 target->ackwidth = 0; 2437 target->sample_reg = 0; 2438 2439 nsp32_dbg(NSP32_DEBUG_SYNC, "set async"); 2440 } 2441 2442 2443 /* 2444 * target <-> initiator use maximum SYNC transfer 2445 */ 2446 static void nsp32_set_max_sync(nsp32_hw_data *data, 2447 nsp32_target *target, 2448 unsigned char *period, 2449 unsigned char *offset) 2450 { 2451 unsigned char period_num, ackwidth; 2452 2453 period_num = data->synct[target->limit_entry].period_num; 2454 *period = data->synct[target->limit_entry].start_period; 2455 ackwidth = data->synct[target->limit_entry].ackwidth; 2456 *offset = SYNC_OFFSET; 2457 2458 target->syncreg = TO_SYNCREG(period_num, *offset); 2459 target->ackwidth = ackwidth; 2460 target->offset = *offset; 2461 target->sample_reg = 0; /* disable SREQ sampling */ 2462 } 2463 2464 2465 /* 2466 * target <-> initiator use entry number speed 2467 */ 2468 static void nsp32_set_sync_entry(nsp32_hw_data *data, 2469 nsp32_target *target, 2470 int entry, 2471 unsigned char offset) 2472 { 2473 unsigned char period, ackwidth, sample_rate; 2474 2475 period = data->synct[entry].period_num; 2476 ackwidth = data->synct[entry].ackwidth; 2477 offset = offset; 2478 sample_rate = data->synct[entry].sample_rate; 2479 2480 target->syncreg = TO_SYNCREG(period, offset); 2481 target->ackwidth = ackwidth; 2482 target->offset = offset; 2483 target->sample_reg = sample_rate | SAMPLING_ENABLE; 2484 2485 nsp32_dbg(NSP32_DEBUG_SYNC, "set sync"); 2486 } 2487 2488 2489 /* 2490 * It waits until SCSI REQ becomes assertion or negation state. 2491 * 2492 * Note: If nsp32_msgin_occur is called, we asserts SCSI ACK. Then 2493 * connected target responds SCSI REQ negation. We have to wait 2494 * SCSI REQ becomes negation in order to negate SCSI ACK signal for 2495 * REQ-ACK handshake. 2496 */ 2497 static void nsp32_wait_req(nsp32_hw_data *data, int state) 2498 { 2499 unsigned int base = data->BaseAddress; 2500 int wait_time = 0; 2501 unsigned char bus, req_bit; 2502 2503 if (!((state == ASSERT) || (state == NEGATE))) { 2504 nsp32_msg(KERN_ERR, "unknown state designation"); 2505 } 2506 /* REQ is BIT(5) */ 2507 req_bit = (state == ASSERT ? BUSMON_REQ : 0); 2508 2509 do { 2510 bus = nsp32_read1(base, SCSI_BUS_MONITOR); 2511 if ((bus & BUSMON_REQ) == req_bit) { 2512 nsp32_dbg(NSP32_DEBUG_WAIT, 2513 "wait_time: %d", wait_time); 2514 return; 2515 } 2516 udelay(1); 2517 wait_time++; 2518 } while (wait_time < REQSACK_TIMEOUT_TIME); 2519 2520 nsp32_msg(KERN_WARNING, "wait REQ timeout, req_bit: 0x%x", req_bit); 2521 } 2522 2523 /* 2524 * It waits until SCSI SACK becomes assertion or negation state. 2525 */ 2526 static void nsp32_wait_sack(nsp32_hw_data *data, int state) 2527 { 2528 unsigned int base = data->BaseAddress; 2529 int wait_time = 0; 2530 unsigned char bus, ack_bit; 2531 2532 if (!((state == ASSERT) || (state == NEGATE))) { 2533 nsp32_msg(KERN_ERR, "unknown state designation"); 2534 } 2535 /* ACK is BIT(4) */ 2536 ack_bit = (state == ASSERT ? BUSMON_ACK : 0); 2537 2538 do { 2539 bus = nsp32_read1(base, SCSI_BUS_MONITOR); 2540 if ((bus & BUSMON_ACK) == ack_bit) { 2541 nsp32_dbg(NSP32_DEBUG_WAIT, 2542 "wait_time: %d", wait_time); 2543 return; 2544 } 2545 udelay(1); 2546 wait_time++; 2547 } while (wait_time < REQSACK_TIMEOUT_TIME); 2548 2549 nsp32_msg(KERN_WARNING, "wait SACK timeout, ack_bit: 0x%x", ack_bit); 2550 } 2551 2552 /* 2553 * assert SCSI ACK 2554 * 2555 * Note: SCSI ACK assertion needs with ACKENB=1, AUTODIRECTION=1. 2556 */ 2557 static void nsp32_sack_assert(nsp32_hw_data *data) 2558 { 2559 unsigned int base = data->BaseAddress; 2560 unsigned char busctrl; 2561 2562 busctrl = nsp32_read1(base, SCSI_BUS_CONTROL); 2563 busctrl |= (BUSCTL_ACK | AUTODIRECTION | ACKENB); 2564 nsp32_write1(base, SCSI_BUS_CONTROL, busctrl); 2565 } 2566 2567 /* 2568 * negate SCSI ACK 2569 */ 2570 static void nsp32_sack_negate(nsp32_hw_data *data) 2571 { 2572 unsigned int base = data->BaseAddress; 2573 unsigned char busctrl; 2574 2575 busctrl = nsp32_read1(base, SCSI_BUS_CONTROL); 2576 busctrl &= ~BUSCTL_ACK; 2577 nsp32_write1(base, SCSI_BUS_CONTROL, busctrl); 2578 } 2579 2580 2581 2582 /* 2583 * Note: n_io_port is defined as 0x7f because I/O register port is 2584 * assigned as: 2585 * 0x800-0x8ff: memory mapped I/O port 2586 * 0x900-0xbff: (map same 0x800-0x8ff I/O port image repeatedly) 2587 * 0xc00-0xfff: CardBus status registers 2588 */ 2589 static int nsp32_detect(struct pci_dev *pdev) 2590 { 2591 struct Scsi_Host *host; /* registered host structure */ 2592 struct resource *res; 2593 nsp32_hw_data *data; 2594 int ret; 2595 int i, j; 2596 2597 nsp32_dbg(NSP32_DEBUG_REGISTER, "enter"); 2598 2599 /* 2600 * register this HBA as SCSI device 2601 */ 2602 host = scsi_host_alloc(&nsp32_template, sizeof(nsp32_hw_data)); 2603 if (host == NULL) { 2604 nsp32_msg (KERN_ERR, "failed to scsi register"); 2605 goto err; 2606 } 2607 2608 /* 2609 * set nsp32_hw_data 2610 */ 2611 data = (nsp32_hw_data *)host->hostdata; 2612 2613 memcpy(data, &nsp32_data_base, sizeof(nsp32_hw_data)); 2614 2615 host->irq = data->IrqNumber; 2616 host->io_port = data->BaseAddress; 2617 host->unique_id = data->BaseAddress; 2618 host->n_io_port = data->NumAddress; 2619 host->base = (unsigned long)data->MmioAddress; 2620 2621 data->Host = host; 2622 spin_lock_init(&(data->Lock)); 2623 2624 data->cur_lunt = NULL; 2625 data->cur_target = NULL; 2626 2627 /* 2628 * Bus master transfer mode is supported currently. 2629 */ 2630 data->trans_method = NSP32_TRANSFER_BUSMASTER; 2631 2632 /* 2633 * Set clock div, CLOCK_4 (HBA has own external clock, and 2634 * dividing * 100ns/4). 2635 * Currently CLOCK_4 has only tested, not for CLOCK_2/PCICLK yet. 2636 */ 2637 data->clock = CLOCK_4; 2638 2639 /* 2640 * Select appropriate nsp32_sync_table and set I_CLOCKDIV. 2641 */ 2642 switch (data->clock) { 2643 case CLOCK_4: 2644 /* If data->clock is CLOCK_4, then select 40M sync table. */ 2645 data->synct = nsp32_sync_table_40M; 2646 data->syncnum = ARRAY_SIZE(nsp32_sync_table_40M); 2647 break; 2648 case CLOCK_2: 2649 /* If data->clock is CLOCK_2, then select 20M sync table. */ 2650 data->synct = nsp32_sync_table_20M; 2651 data->syncnum = ARRAY_SIZE(nsp32_sync_table_20M); 2652 break; 2653 case PCICLK: 2654 /* If data->clock is PCICLK, then select pci sync table. */ 2655 data->synct = nsp32_sync_table_pci; 2656 data->syncnum = ARRAY_SIZE(nsp32_sync_table_pci); 2657 break; 2658 default: 2659 nsp32_msg(KERN_WARNING, 2660 "Invalid clock div is selected, set CLOCK_4."); 2661 /* Use default value CLOCK_4 */ 2662 data->clock = CLOCK_4; 2663 data->synct = nsp32_sync_table_40M; 2664 data->syncnum = ARRAY_SIZE(nsp32_sync_table_40M); 2665 } 2666 2667 /* 2668 * setup nsp32_lunt 2669 */ 2670 2671 /* 2672 * setup DMA 2673 */ 2674 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) { 2675 nsp32_msg (KERN_ERR, "failed to set PCI DMA mask"); 2676 goto scsi_unregister; 2677 } 2678 2679 /* 2680 * allocate autoparam DMA resource. 2681 */ 2682 data->autoparam = pci_alloc_consistent(pdev, sizeof(nsp32_autoparam), &(data->auto_paddr)); 2683 if (data->autoparam == NULL) { 2684 nsp32_msg(KERN_ERR, "failed to allocate DMA memory"); 2685 goto scsi_unregister; 2686 } 2687 2688 /* 2689 * allocate scatter-gather DMA resource. 2690 */ 2691 data->sg_list = pci_alloc_consistent(pdev, NSP32_SG_TABLE_SIZE, 2692 &(data->sg_paddr)); 2693 if (data->sg_list == NULL) { 2694 nsp32_msg(KERN_ERR, "failed to allocate DMA memory"); 2695 goto free_autoparam; 2696 } 2697 2698 for (i = 0; i < ARRAY_SIZE(data->lunt); i++) { 2699 for (j = 0; j < ARRAY_SIZE(data->lunt[0]); j++) { 2700 int offset = i * ARRAY_SIZE(data->lunt[0]) + j; 2701 nsp32_lunt tmp = { 2702 .SCpnt = NULL, 2703 .save_datp = 0, 2704 .msgin03 = FALSE, 2705 .sg_num = 0, 2706 .cur_entry = 0, 2707 .sglun = &(data->sg_list[offset]), 2708 .sglun_paddr = data->sg_paddr + (offset * sizeof(nsp32_sglun)), 2709 }; 2710 2711 data->lunt[i][j] = tmp; 2712 } 2713 } 2714 2715 /* 2716 * setup target 2717 */ 2718 for (i = 0; i < ARRAY_SIZE(data->target); i++) { 2719 nsp32_target *target = &(data->target[i]); 2720 2721 target->limit_entry = 0; 2722 target->sync_flag = 0; 2723 nsp32_set_async(data, target); 2724 } 2725 2726 /* 2727 * EEPROM check 2728 */ 2729 ret = nsp32_getprom_param(data); 2730 if (ret == FALSE) { 2731 data->resettime = 3; /* default 3 */ 2732 } 2733 2734 /* 2735 * setup HBA 2736 */ 2737 nsp32hw_init(data); 2738 2739 snprintf(data->info_str, sizeof(data->info_str), 2740 "NinjaSCSI-32Bi/UDE: irq %d, io 0x%lx+0x%x", 2741 host->irq, host->io_port, host->n_io_port); 2742 2743 /* 2744 * SCSI bus reset 2745 * 2746 * Note: It's important to reset SCSI bus in initialization phase. 2747 * NinjaSCSI-32Bi/UDE HBA EEPROM seems to exchange SDTR when 2748 * system is coming up, so SCSI devices connected to HBA is set as 2749 * un-asynchronous mode. It brings the merit that this HBA is 2750 * ready to start synchronous transfer without any preparation, 2751 * but we are difficult to control transfer speed. In addition, 2752 * it prevents device transfer speed from effecting EEPROM start-up 2753 * SDTR. NinjaSCSI-32Bi/UDE has the feature if EEPROM is set as 2754 * Auto Mode, then FAST-10M is selected when SCSI devices are 2755 * connected same or more than 4 devices. It should be avoided 2756 * depending on this specification. Thus, resetting the SCSI bus 2757 * restores all connected SCSI devices to asynchronous mode, then 2758 * this driver set SDTR safely later, and we can control all SCSI 2759 * device transfer mode. 2760 */ 2761 nsp32_do_bus_reset(data); 2762 2763 ret = request_irq(host->irq, do_nsp32_isr, IRQF_SHARED, "nsp32", data); 2764 if (ret < 0) { 2765 nsp32_msg(KERN_ERR, "Unable to allocate IRQ for NinjaSCSI32 " 2766 "SCSI PCI controller. Interrupt: %d", host->irq); 2767 goto free_sg_list; 2768 } 2769 2770 /* 2771 * PCI IO register 2772 */ 2773 res = request_region(host->io_port, host->n_io_port, "nsp32"); 2774 if (res == NULL) { 2775 nsp32_msg(KERN_ERR, 2776 "I/O region 0x%lx+0x%lx is already used", 2777 data->BaseAddress, data->NumAddress); 2778 goto free_irq; 2779 } 2780 2781 ret = scsi_add_host(host, &pdev->dev); 2782 if (ret) { 2783 nsp32_msg(KERN_ERR, "failed to add scsi host"); 2784 goto free_region; 2785 } 2786 scsi_scan_host(host); 2787 pci_set_drvdata(pdev, host); 2788 return 0; 2789 2790 free_region: 2791 release_region(host->io_port, host->n_io_port); 2792 2793 free_irq: 2794 free_irq(host->irq, data); 2795 2796 free_sg_list: 2797 pci_free_consistent(pdev, NSP32_SG_TABLE_SIZE, 2798 data->sg_list, data->sg_paddr); 2799 2800 free_autoparam: 2801 pci_free_consistent(pdev, sizeof(nsp32_autoparam), 2802 data->autoparam, data->auto_paddr); 2803 2804 scsi_unregister: 2805 scsi_host_put(host); 2806 2807 err: 2808 return 1; 2809 } 2810 2811 static int nsp32_release(struct Scsi_Host *host) 2812 { 2813 nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata; 2814 2815 if (data->autoparam) { 2816 pci_free_consistent(data->Pci, sizeof(nsp32_autoparam), 2817 data->autoparam, data->auto_paddr); 2818 } 2819 2820 if (data->sg_list) { 2821 pci_free_consistent(data->Pci, NSP32_SG_TABLE_SIZE, 2822 data->sg_list, data->sg_paddr); 2823 } 2824 2825 if (host->irq) { 2826 free_irq(host->irq, data); 2827 } 2828 2829 if (host->io_port && host->n_io_port) { 2830 release_region(host->io_port, host->n_io_port); 2831 } 2832 2833 if (data->MmioAddress) { 2834 iounmap(data->MmioAddress); 2835 } 2836 2837 return 0; 2838 } 2839 2840 static const char *nsp32_info(struct Scsi_Host *shpnt) 2841 { 2842 nsp32_hw_data *data = (nsp32_hw_data *)shpnt->hostdata; 2843 2844 return data->info_str; 2845 } 2846 2847 2848 /**************************************************************************** 2849 * error handler 2850 */ 2851 static int nsp32_eh_abort(struct scsi_cmnd *SCpnt) 2852 { 2853 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; 2854 unsigned int base = SCpnt->device->host->io_port; 2855 2856 nsp32_msg(KERN_WARNING, "abort"); 2857 2858 if (data->cur_lunt->SCpnt == NULL) { 2859 nsp32_dbg(NSP32_DEBUG_BUSRESET, "abort failed"); 2860 return FAILED; 2861 } 2862 2863 if (data->cur_target->sync_flag & (SDTR_INITIATOR | SDTR_TARGET)) { 2864 /* reset SDTR negotiation */ 2865 data->cur_target->sync_flag = 0; 2866 nsp32_set_async(data, data->cur_target); 2867 } 2868 2869 nsp32_write2(base, TRANSFER_CONTROL, 0); 2870 nsp32_write2(base, BM_CNT, 0); 2871 2872 SCpnt->result = DID_ABORT << 16; 2873 nsp32_scsi_done(SCpnt); 2874 2875 nsp32_dbg(NSP32_DEBUG_BUSRESET, "abort success"); 2876 return SUCCESS; 2877 } 2878 2879 static int nsp32_eh_bus_reset(struct scsi_cmnd *SCpnt) 2880 { 2881 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata; 2882 unsigned int base = SCpnt->device->host->io_port; 2883 2884 spin_lock_irq(SCpnt->device->host->host_lock); 2885 2886 nsp32_msg(KERN_INFO, "Bus Reset"); 2887 nsp32_dbg(NSP32_DEBUG_BUSRESET, "SCpnt=0x%x", SCpnt); 2888 2889 nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK); 2890 nsp32_do_bus_reset(data); 2891 nsp32_write2(base, IRQ_CONTROL, 0); 2892 2893 spin_unlock_irq(SCpnt->device->host->host_lock); 2894 return SUCCESS; /* SCSI bus reset is succeeded at any time. */ 2895 } 2896 2897 static void nsp32_do_bus_reset(nsp32_hw_data *data) 2898 { 2899 unsigned int base = data->BaseAddress; 2900 unsigned short intrdat; 2901 int i; 2902 2903 nsp32_dbg(NSP32_DEBUG_BUSRESET, "in"); 2904 2905 /* 2906 * stop all transfer 2907 * clear TRANSFERCONTROL_BM_START 2908 * clear counter 2909 */ 2910 nsp32_write2(base, TRANSFER_CONTROL, 0); 2911 nsp32_write4(base, BM_CNT, 0); 2912 nsp32_write4(base, CLR_COUNTER, CLRCOUNTER_ALLMASK); 2913 2914 /* 2915 * fall back to asynchronous transfer mode 2916 * initialize SDTR negotiation flag 2917 */ 2918 for (i = 0; i < ARRAY_SIZE(data->target); i++) { 2919 nsp32_target *target = &data->target[i]; 2920 2921 target->sync_flag = 0; 2922 nsp32_set_async(data, target); 2923 } 2924 2925 /* 2926 * reset SCSI bus 2927 */ 2928 nsp32_write1(base, SCSI_BUS_CONTROL, BUSCTL_RST); 2929 udelay(RESET_HOLD_TIME); 2930 nsp32_write1(base, SCSI_BUS_CONTROL, 0); 2931 for(i = 0; i < 5; i++) { 2932 intrdat = nsp32_read2(base, IRQ_STATUS); /* dummy read */ 2933 nsp32_dbg(NSP32_DEBUG_BUSRESET, "irq:1: 0x%x", intrdat); 2934 } 2935 2936 data->CurrentSC = NULL; 2937 } 2938 2939 static int nsp32_eh_host_reset(struct scsi_cmnd *SCpnt) 2940 { 2941 struct Scsi_Host *host = SCpnt->device->host; 2942 unsigned int base = SCpnt->device->host->io_port; 2943 nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata; 2944 2945 nsp32_msg(KERN_INFO, "Host Reset"); 2946 nsp32_dbg(NSP32_DEBUG_BUSRESET, "SCpnt=0x%x", SCpnt); 2947 2948 spin_lock_irq(SCpnt->device->host->host_lock); 2949 2950 nsp32hw_init(data); 2951 nsp32_write2(base, IRQ_CONTROL, IRQ_CONTROL_ALL_IRQ_MASK); 2952 nsp32_do_bus_reset(data); 2953 nsp32_write2(base, IRQ_CONTROL, 0); 2954 2955 spin_unlock_irq(SCpnt->device->host->host_lock); 2956 return SUCCESS; /* Host reset is succeeded at any time. */ 2957 } 2958 2959 2960 /************************************************************************** 2961 * EEPROM handler 2962 */ 2963 2964 /* 2965 * getting EEPROM parameter 2966 */ 2967 static int nsp32_getprom_param(nsp32_hw_data *data) 2968 { 2969 int vendor = data->pci_devid->vendor; 2970 int device = data->pci_devid->device; 2971 int ret, val, i; 2972 2973 /* 2974 * EEPROM checking. 2975 */ 2976 ret = nsp32_prom_read(data, 0x7e); 2977 if (ret != 0x55) { 2978 nsp32_msg(KERN_INFO, "No EEPROM detected: 0x%x", ret); 2979 return FALSE; 2980 } 2981 ret = nsp32_prom_read(data, 0x7f); 2982 if (ret != 0xaa) { 2983 nsp32_msg(KERN_INFO, "Invalid number: 0x%x", ret); 2984 return FALSE; 2985 } 2986 2987 /* 2988 * check EEPROM type 2989 */ 2990 if (vendor == PCI_VENDOR_ID_WORKBIT && 2991 device == PCI_DEVICE_ID_WORKBIT_STANDARD) { 2992 ret = nsp32_getprom_c16(data); 2993 } else if (vendor == PCI_VENDOR_ID_WORKBIT && 2994 device == PCI_DEVICE_ID_NINJASCSI_32BIB_LOGITEC) { 2995 ret = nsp32_getprom_at24(data); 2996 } else if (vendor == PCI_VENDOR_ID_WORKBIT && 2997 device == PCI_DEVICE_ID_NINJASCSI_32UDE_MELCO ) { 2998 ret = nsp32_getprom_at24(data); 2999 } else { 3000 nsp32_msg(KERN_WARNING, "Unknown EEPROM"); 3001 ret = FALSE; 3002 } 3003 3004 /* for debug : SPROM data full checking */ 3005 for (i = 0; i <= 0x1f; i++) { 3006 val = nsp32_prom_read(data, i); 3007 nsp32_dbg(NSP32_DEBUG_EEPROM, 3008 "rom address 0x%x : 0x%x", i, val); 3009 } 3010 3011 return ret; 3012 } 3013 3014 3015 /* 3016 * AT24C01A (Logitec: LHA-600S), AT24C02 (Melco Buffalo: IFC-USLP) data map: 3017 * 3018 * ROMADDR 3019 * 0x00 - 0x06 : Device Synchronous Transfer Period (SCSI ID 0 - 6) 3020 * Value 0x0: ASYNC, 0x0c: Ultra-20M, 0x19: Fast-10M 3021 * 0x07 : HBA Synchronous Transfer Period 3022 * Value 0: AutoSync, 1: Manual Setting 3023 * 0x08 - 0x0f : Not Used? (0x0) 3024 * 0x10 : Bus Termination 3025 * Value 0: Auto[ON], 1: ON, 2: OFF 3026 * 0x11 : Not Used? (0) 3027 * 0x12 : Bus Reset Delay Time (0x03) 3028 * 0x13 : Bootable CD Support 3029 * Value 0: Disable, 1: Enable 3030 * 0x14 : Device Scan 3031 * Bit 7 6 5 4 3 2 1 0 3032 * | <-----------------> 3033 * | SCSI ID: Value 0: Skip, 1: YES 3034 * |-> Value 0: ALL scan, Value 1: Manual 3035 * 0x15 - 0x1b : Not Used? (0) 3036 * 0x1c : Constant? (0x01) (clock div?) 3037 * 0x1d - 0x7c : Not Used (0xff) 3038 * 0x7d : Not Used? (0xff) 3039 * 0x7e : Constant (0x55), Validity signature 3040 * 0x7f : Constant (0xaa), Validity signature 3041 */ 3042 static int nsp32_getprom_at24(nsp32_hw_data *data) 3043 { 3044 int ret, i; 3045 int auto_sync; 3046 nsp32_target *target; 3047 int entry; 3048 3049 /* 3050 * Reset time which is designated by EEPROM. 3051 * 3052 * TODO: Not used yet. 3053 */ 3054 data->resettime = nsp32_prom_read(data, 0x12); 3055 3056 /* 3057 * HBA Synchronous Transfer Period 3058 * 3059 * Note: auto_sync = 0: auto, 1: manual. Ninja SCSI HBA spec says 3060 * that if auto_sync is 0 (auto), and connected SCSI devices are 3061 * same or lower than 3, then transfer speed is set as ULTRA-20M. 3062 * On the contrary if connected SCSI devices are same or higher 3063 * than 4, then transfer speed is set as FAST-10M. 3064 * 3065 * I break this rule. The number of connected SCSI devices are 3066 * only ignored. If auto_sync is 0 (auto), then transfer speed is 3067 * forced as ULTRA-20M. 3068 */ 3069 ret = nsp32_prom_read(data, 0x07); 3070 switch (ret) { 3071 case 0: 3072 auto_sync = TRUE; 3073 break; 3074 case 1: 3075 auto_sync = FALSE; 3076 break; 3077 default: 3078 nsp32_msg(KERN_WARNING, 3079 "Unsupported Auto Sync mode. Fall back to manual mode."); 3080 auto_sync = TRUE; 3081 } 3082 3083 if (trans_mode == ULTRA20M_MODE) { 3084 auto_sync = TRUE; 3085 } 3086 3087 /* 3088 * each device Synchronous Transfer Period 3089 */ 3090 for (i = 0; i < NSP32_HOST_SCSIID; i++) { 3091 target = &data->target[i]; 3092 if (auto_sync == TRUE) { 3093 target->limit_entry = 0; /* set as ULTRA20M */ 3094 } else { 3095 ret = nsp32_prom_read(data, i); 3096 entry = nsp32_search_period_entry(data, target, ret); 3097 if (entry < 0) { 3098 /* search failed... set maximum speed */ 3099 entry = 0; 3100 } 3101 target->limit_entry = entry; 3102 } 3103 } 3104 3105 return TRUE; 3106 } 3107 3108 3109 /* 3110 * C16 110 (I-O Data: SC-NBD) data map: 3111 * 3112 * ROMADDR 3113 * 0x00 - 0x06 : Device Synchronous Transfer Period (SCSI ID 0 - 6) 3114 * Value 0x0: 20MB/S, 0x1: 10MB/S, 0x2: 5MB/S, 0x3: ASYNC 3115 * 0x07 : 0 (HBA Synchronous Transfer Period: Auto Sync) 3116 * 0x08 - 0x0f : Not Used? (0x0) 3117 * 0x10 : Transfer Mode 3118 * Value 0: PIO, 1: Busmater 3119 * 0x11 : Bus Reset Delay Time (0x00-0x20) 3120 * 0x12 : Bus Termination 3121 * Value 0: Disable, 1: Enable 3122 * 0x13 - 0x19 : Disconnection 3123 * Value 0: Disable, 1: Enable 3124 * 0x1a - 0x7c : Not Used? (0) 3125 * 0x7d : Not Used? (0xf8) 3126 * 0x7e : Constant (0x55), Validity signature 3127 * 0x7f : Constant (0xaa), Validity signature 3128 */ 3129 static int nsp32_getprom_c16(nsp32_hw_data *data) 3130 { 3131 int ret, i; 3132 nsp32_target *target; 3133 int entry, val; 3134 3135 /* 3136 * Reset time which is designated by EEPROM. 3137 * 3138 * TODO: Not used yet. 3139 */ 3140 data->resettime = nsp32_prom_read(data, 0x11); 3141 3142 /* 3143 * each device Synchronous Transfer Period 3144 */ 3145 for (i = 0; i < NSP32_HOST_SCSIID; i++) { 3146 target = &data->target[i]; 3147 ret = nsp32_prom_read(data, i); 3148 switch (ret) { 3149 case 0: /* 20MB/s */ 3150 val = 0x0c; 3151 break; 3152 case 1: /* 10MB/s */ 3153 val = 0x19; 3154 break; 3155 case 2: /* 5MB/s */ 3156 val = 0x32; 3157 break; 3158 case 3: /* ASYNC */ 3159 val = 0x00; 3160 break; 3161 default: /* default 20MB/s */ 3162 val = 0x0c; 3163 break; 3164 } 3165 entry = nsp32_search_period_entry(data, target, val); 3166 if (entry < 0 || trans_mode == ULTRA20M_MODE) { 3167 /* search failed... set maximum speed */ 3168 entry = 0; 3169 } 3170 target->limit_entry = entry; 3171 } 3172 3173 return TRUE; 3174 } 3175 3176 3177 /* 3178 * Atmel AT24C01A (drived in 5V) serial EEPROM routines 3179 */ 3180 static int nsp32_prom_read(nsp32_hw_data *data, int romaddr) 3181 { 3182 int i, val; 3183 3184 /* start condition */ 3185 nsp32_prom_start(data); 3186 3187 /* device address */ 3188 nsp32_prom_write_bit(data, 1); /* 1 */ 3189 nsp32_prom_write_bit(data, 0); /* 0 */ 3190 nsp32_prom_write_bit(data, 1); /* 1 */ 3191 nsp32_prom_write_bit(data, 0); /* 0 */ 3192 nsp32_prom_write_bit(data, 0); /* A2: 0 (GND) */ 3193 nsp32_prom_write_bit(data, 0); /* A1: 0 (GND) */ 3194 nsp32_prom_write_bit(data, 0); /* A0: 0 (GND) */ 3195 3196 /* R/W: W for dummy write */ 3197 nsp32_prom_write_bit(data, 0); 3198 3199 /* ack */ 3200 nsp32_prom_write_bit(data, 0); 3201 3202 /* word address */ 3203 for (i = 7; i >= 0; i--) { 3204 nsp32_prom_write_bit(data, ((romaddr >> i) & 1)); 3205 } 3206 3207 /* ack */ 3208 nsp32_prom_write_bit(data, 0); 3209 3210 /* start condition */ 3211 nsp32_prom_start(data); 3212 3213 /* device address */ 3214 nsp32_prom_write_bit(data, 1); /* 1 */ 3215 nsp32_prom_write_bit(data, 0); /* 0 */ 3216 nsp32_prom_write_bit(data, 1); /* 1 */ 3217 nsp32_prom_write_bit(data, 0); /* 0 */ 3218 nsp32_prom_write_bit(data, 0); /* A2: 0 (GND) */ 3219 nsp32_prom_write_bit(data, 0); /* A1: 0 (GND) */ 3220 nsp32_prom_write_bit(data, 0); /* A0: 0 (GND) */ 3221 3222 /* R/W: R */ 3223 nsp32_prom_write_bit(data, 1); 3224 3225 /* ack */ 3226 nsp32_prom_write_bit(data, 0); 3227 3228 /* data... */ 3229 val = 0; 3230 for (i = 7; i >= 0; i--) { 3231 val += (nsp32_prom_read_bit(data) << i); 3232 } 3233 3234 /* no ack */ 3235 nsp32_prom_write_bit(data, 1); 3236 3237 /* stop condition */ 3238 nsp32_prom_stop(data); 3239 3240 return val; 3241 } 3242 3243 static void nsp32_prom_set(nsp32_hw_data *data, int bit, int val) 3244 { 3245 int base = data->BaseAddress; 3246 int tmp; 3247 3248 tmp = nsp32_index_read1(base, SERIAL_ROM_CTL); 3249 3250 if (val == 0) { 3251 tmp &= ~bit; 3252 } else { 3253 tmp |= bit; 3254 } 3255 3256 nsp32_index_write1(base, SERIAL_ROM_CTL, tmp); 3257 3258 udelay(10); 3259 } 3260 3261 static int nsp32_prom_get(nsp32_hw_data *data, int bit) 3262 { 3263 int base = data->BaseAddress; 3264 int tmp, ret; 3265 3266 if (bit != SDA) { 3267 nsp32_msg(KERN_ERR, "return value is not appropriate"); 3268 return 0; 3269 } 3270 3271 3272 tmp = nsp32_index_read1(base, SERIAL_ROM_CTL) & bit; 3273 3274 if (tmp == 0) { 3275 ret = 0; 3276 } else { 3277 ret = 1; 3278 } 3279 3280 udelay(10); 3281 3282 return ret; 3283 } 3284 3285 static void nsp32_prom_start (nsp32_hw_data *data) 3286 { 3287 /* start condition */ 3288 nsp32_prom_set(data, SCL, 1); 3289 nsp32_prom_set(data, SDA, 1); 3290 nsp32_prom_set(data, ENA, 1); /* output mode */ 3291 nsp32_prom_set(data, SDA, 0); /* keeping SCL=1 and transiting 3292 * SDA 1->0 is start condition */ 3293 nsp32_prom_set(data, SCL, 0); 3294 } 3295 3296 static void nsp32_prom_stop (nsp32_hw_data *data) 3297 { 3298 /* stop condition */ 3299 nsp32_prom_set(data, SCL, 1); 3300 nsp32_prom_set(data, SDA, 0); 3301 nsp32_prom_set(data, ENA, 1); /* output mode */ 3302 nsp32_prom_set(data, SDA, 1); 3303 nsp32_prom_set(data, SCL, 0); 3304 } 3305 3306 static void nsp32_prom_write_bit(nsp32_hw_data *data, int val) 3307 { 3308 /* write */ 3309 nsp32_prom_set(data, SDA, val); 3310 nsp32_prom_set(data, SCL, 1 ); 3311 nsp32_prom_set(data, SCL, 0 ); 3312 } 3313 3314 static int nsp32_prom_read_bit(nsp32_hw_data *data) 3315 { 3316 int val; 3317 3318 /* read */ 3319 nsp32_prom_set(data, ENA, 0); /* input mode */ 3320 nsp32_prom_set(data, SCL, 1); 3321 3322 val = nsp32_prom_get(data, SDA); 3323 3324 nsp32_prom_set(data, SCL, 0); 3325 nsp32_prom_set(data, ENA, 1); /* output mode */ 3326 3327 return val; 3328 } 3329 3330 3331 /************************************************************************** 3332 * Power Management 3333 */ 3334 #ifdef CONFIG_PM 3335 3336 /* Device suspended */ 3337 static int nsp32_suspend(struct pci_dev *pdev, pm_message_t state) 3338 { 3339 struct Scsi_Host *host = pci_get_drvdata(pdev); 3340 3341 nsp32_msg(KERN_INFO, "pci-suspend: pdev=0x%p, state=%ld, slot=%s, host=0x%p", pdev, state, pci_name(pdev), host); 3342 3343 pci_save_state (pdev); 3344 pci_disable_device (pdev); 3345 pci_set_power_state(pdev, pci_choose_state(pdev, state)); 3346 3347 return 0; 3348 } 3349 3350 /* Device woken up */ 3351 static int nsp32_resume(struct pci_dev *pdev) 3352 { 3353 struct Scsi_Host *host = pci_get_drvdata(pdev); 3354 nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata; 3355 unsigned short reg; 3356 3357 nsp32_msg(KERN_INFO, "pci-resume: pdev=0x%p, slot=%s, host=0x%p", pdev, pci_name(pdev), host); 3358 3359 pci_set_power_state(pdev, PCI_D0); 3360 pci_enable_wake (pdev, PCI_D0, 0); 3361 pci_restore_state (pdev); 3362 3363 reg = nsp32_read2(data->BaseAddress, INDEX_REG); 3364 3365 nsp32_msg(KERN_INFO, "io=0x%x reg=0x%x", data->BaseAddress, reg); 3366 3367 if (reg == 0xffff) { 3368 nsp32_msg(KERN_INFO, "missing device. abort resume."); 3369 return 0; 3370 } 3371 3372 nsp32hw_init (data); 3373 nsp32_do_bus_reset(data); 3374 3375 nsp32_msg(KERN_INFO, "resume success"); 3376 3377 return 0; 3378 } 3379 3380 #endif 3381 3382 /************************************************************************ 3383 * PCI/Cardbus probe/remove routine 3384 */ 3385 static int __devinit nsp32_probe(struct pci_dev *pdev, const struct pci_device_id *id) 3386 { 3387 int ret; 3388 nsp32_hw_data *data = &nsp32_data_base; 3389 3390 nsp32_dbg(NSP32_DEBUG_REGISTER, "enter"); 3391 3392 ret = pci_enable_device(pdev); 3393 if (ret) { 3394 nsp32_msg(KERN_ERR, "failed to enable pci device"); 3395 return ret; 3396 } 3397 3398 data->Pci = pdev; 3399 data->pci_devid = id; 3400 data->IrqNumber = pdev->irq; 3401 data->BaseAddress = pci_resource_start(pdev, 0); 3402 data->NumAddress = pci_resource_len (pdev, 0); 3403 data->MmioAddress = pci_ioremap_bar(pdev, 1); 3404 data->MmioLength = pci_resource_len (pdev, 1); 3405 3406 pci_set_master(pdev); 3407 3408 ret = nsp32_detect(pdev); 3409 3410 nsp32_msg(KERN_INFO, "irq: %i mmio: %p+0x%lx slot: %s model: %s", 3411 pdev->irq, 3412 data->MmioAddress, data->MmioLength, 3413 pci_name(pdev), 3414 nsp32_model[id->driver_data]); 3415 3416 nsp32_dbg(NSP32_DEBUG_REGISTER, "exit %d", ret); 3417 3418 return ret; 3419 } 3420 3421 static void __devexit nsp32_remove(struct pci_dev *pdev) 3422 { 3423 struct Scsi_Host *host = pci_get_drvdata(pdev); 3424 3425 nsp32_dbg(NSP32_DEBUG_REGISTER, "enter"); 3426 3427 scsi_remove_host(host); 3428 3429 nsp32_release(host); 3430 3431 scsi_host_put(host); 3432 } 3433 3434 static struct pci_driver nsp32_driver = { 3435 .name = "nsp32", 3436 .id_table = nsp32_pci_table, 3437 .probe = nsp32_probe, 3438 .remove = __devexit_p(nsp32_remove), 3439 #ifdef CONFIG_PM 3440 .suspend = nsp32_suspend, 3441 .resume = nsp32_resume, 3442 #endif 3443 }; 3444 3445 /********************************************************************* 3446 * Moule entry point 3447 */ 3448 static int __init init_nsp32(void) { 3449 nsp32_msg(KERN_INFO, "loading..."); 3450 return pci_register_driver(&nsp32_driver); 3451 } 3452 3453 static void __exit exit_nsp32(void) { 3454 nsp32_msg(KERN_INFO, "unloading..."); 3455 pci_unregister_driver(&nsp32_driver); 3456 } 3457 3458 module_init(init_nsp32); 3459 module_exit(exit_nsp32); 3460 3461 /* end */ 3462