1 /****************************************************************************** 2 ** Device driver for the PCI-SCSI NCR538XX controller family. 3 ** 4 ** Copyright (C) 1994 Wolfgang Stanglmeier 5 ** 6 ** This program is free software; you can redistribute it and/or modify 7 ** it under the terms of the GNU General Public License as published by 8 ** the Free Software Foundation; either version 2 of the License, or 9 ** (at your option) any later version. 10 ** 11 ** This program is distributed in the hope that it will be useful, 12 ** but WITHOUT ANY WARRANTY; without even the implied warranty of 13 ** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 ** GNU General Public License for more details. 15 ** 16 ** You should have received a copy of the GNU General Public License 17 ** along with this program; if not, write to the Free Software 18 ** Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 19 ** 20 **----------------------------------------------------------------------------- 21 ** 22 ** This driver has been ported to Linux from the FreeBSD NCR53C8XX driver 23 ** and is currently maintained by 24 ** 25 ** Gerard Roudier <groudier@free.fr> 26 ** 27 ** Being given that this driver originates from the FreeBSD version, and 28 ** in order to keep synergy on both, any suggested enhancements and corrections 29 ** received on Linux are automatically a potential candidate for the FreeBSD 30 ** version. 31 ** 32 ** The original driver has been written for 386bsd and FreeBSD by 33 ** Wolfgang Stanglmeier <wolf@cologne.de> 34 ** Stefan Esser <se@mi.Uni-Koeln.de> 35 ** 36 ** And has been ported to NetBSD by 37 ** Charles M. Hannum <mycroft@gnu.ai.mit.edu> 38 ** 39 **----------------------------------------------------------------------------- 40 ** 41 ** Brief history 42 ** 43 ** December 10 1995 by Gerard Roudier: 44 ** Initial port to Linux. 45 ** 46 ** June 23 1996 by Gerard Roudier: 47 ** Support for 64 bits architectures (Alpha). 48 ** 49 ** November 30 1996 by Gerard Roudier: 50 ** Support for Fast-20 scsi. 51 ** Support for large DMA fifo and 128 dwords bursting. 52 ** 53 ** February 27 1997 by Gerard Roudier: 54 ** Support for Fast-40 scsi. 55 ** Support for on-Board RAM. 56 ** 57 ** May 3 1997 by Gerard Roudier: 58 ** Full support for scsi scripts instructions pre-fetching. 59 ** 60 ** May 19 1997 by Richard Waltham <dormouse@farsrobt.demon.co.uk>: 61 ** Support for NvRAM detection and reading. 62 ** 63 ** August 18 1997 by Cort <cort@cs.nmt.edu>: 64 ** Support for Power/PC (Big Endian). 65 ** 66 ** June 20 1998 by Gerard Roudier 67 ** Support for up to 64 tags per lun. 68 ** O(1) everywhere (C and SCRIPTS) for normal cases. 69 ** Low PCI traffic for command handling when on-chip RAM is present. 70 ** Aggressive SCSI SCRIPTS optimizations. 71 ** 72 ** 2005 by Matthew Wilcox and James Bottomley 73 ** PCI-ectomy. This driver now supports only the 720 chip (see the 74 ** NCR_Q720 and zalon drivers for the bus probe logic). 75 ** 76 ******************************************************************************* 77 */ 78 79 /* 80 ** Supported SCSI-II features: 81 ** Synchronous negotiation 82 ** Wide negotiation (depends on the NCR Chip) 83 ** Enable disconnection 84 ** Tagged command queuing 85 ** Parity checking 86 ** Etc... 87 ** 88 ** Supported NCR/SYMBIOS chips: 89 ** 53C720 (Wide, Fast SCSI-2, intfly problems) 90 */ 91 92 /* Name and version of the driver */ 93 #define SCSI_NCR_DRIVER_NAME "ncr53c8xx-3.4.3g" 94 95 #define SCSI_NCR_DEBUG_FLAGS (0) 96 97 #include <linux/blkdev.h> 98 #include <linux/delay.h> 99 #include <linux/dma-mapping.h> 100 #include <linux/errno.h> 101 #include <linux/init.h> 102 #include <linux/interrupt.h> 103 #include <linux/ioport.h> 104 #include <linux/mm.h> 105 #include <linux/module.h> 106 #include <linux/sched.h> 107 #include <linux/signal.h> 108 #include <linux/spinlock.h> 109 #include <linux/stat.h> 110 #include <linux/string.h> 111 #include <linux/time.h> 112 #include <linux/timer.h> 113 #include <linux/types.h> 114 115 #include <asm/dma.h> 116 #include <asm/io.h> 117 #include <asm/system.h> 118 119 #include <scsi/scsi.h> 120 #include <scsi/scsi_cmnd.h> 121 #include <scsi/scsi_dbg.h> 122 #include <scsi/scsi_device.h> 123 #include <scsi/scsi_tcq.h> 124 #include <scsi/scsi_transport.h> 125 #include <scsi/scsi_transport_spi.h> 126 127 #include "ncr53c8xx.h" 128 129 #define NAME53C8XX "ncr53c8xx" 130 131 /*========================================================== 132 ** 133 ** Debugging tags 134 ** 135 **========================================================== 136 */ 137 138 #define DEBUG_ALLOC (0x0001) 139 #define DEBUG_PHASE (0x0002) 140 #define DEBUG_QUEUE (0x0008) 141 #define DEBUG_RESULT (0x0010) 142 #define DEBUG_POINTER (0x0020) 143 #define DEBUG_SCRIPT (0x0040) 144 #define DEBUG_TINY (0x0080) 145 #define DEBUG_TIMING (0x0100) 146 #define DEBUG_NEGO (0x0200) 147 #define DEBUG_TAGS (0x0400) 148 #define DEBUG_SCATTER (0x0800) 149 #define DEBUG_IC (0x1000) 150 151 /* 152 ** Enable/Disable debug messages. 153 ** Can be changed at runtime too. 154 */ 155 156 #ifdef SCSI_NCR_DEBUG_INFO_SUPPORT 157 static int ncr_debug = SCSI_NCR_DEBUG_FLAGS; 158 #define DEBUG_FLAGS ncr_debug 159 #else 160 #define DEBUG_FLAGS SCSI_NCR_DEBUG_FLAGS 161 #endif 162 163 static inline struct list_head *ncr_list_pop(struct list_head *head) 164 { 165 if (!list_empty(head)) { 166 struct list_head *elem = head->next; 167 168 list_del(elem); 169 return elem; 170 } 171 172 return NULL; 173 } 174 175 /*========================================================== 176 ** 177 ** Simple power of two buddy-like allocator. 178 ** 179 ** This simple code is not intended to be fast, but to 180 ** provide power of 2 aligned memory allocations. 181 ** Since the SCRIPTS processor only supplies 8 bit 182 ** arithmetic, this allocator allows simple and fast 183 ** address calculations from the SCRIPTS code. 184 ** In addition, cache line alignment is guaranteed for 185 ** power of 2 cache line size. 186 ** Enhanced in linux-2.3.44 to provide a memory pool 187 ** per pcidev to support dynamic dma mapping. (I would 188 ** have preferred a real bus astraction, btw). 189 ** 190 **========================================================== 191 */ 192 193 #define MEMO_SHIFT 4 /* 16 bytes minimum memory chunk */ 194 #if PAGE_SIZE >= 8192 195 #define MEMO_PAGE_ORDER 0 /* 1 PAGE maximum */ 196 #else 197 #define MEMO_PAGE_ORDER 1 /* 2 PAGES maximum */ 198 #endif 199 #define MEMO_FREE_UNUSED /* Free unused pages immediately */ 200 #define MEMO_WARN 1 201 #define MEMO_GFP_FLAGS GFP_ATOMIC 202 #define MEMO_CLUSTER_SHIFT (PAGE_SHIFT+MEMO_PAGE_ORDER) 203 #define MEMO_CLUSTER_SIZE (1UL << MEMO_CLUSTER_SHIFT) 204 #define MEMO_CLUSTER_MASK (MEMO_CLUSTER_SIZE-1) 205 206 typedef u_long m_addr_t; /* Enough bits to bit-hack addresses */ 207 typedef struct device *m_bush_t; /* Something that addresses DMAable */ 208 209 typedef struct m_link { /* Link between free memory chunks */ 210 struct m_link *next; 211 } m_link_s; 212 213 typedef struct m_vtob { /* Virtual to Bus address translation */ 214 struct m_vtob *next; 215 m_addr_t vaddr; 216 m_addr_t baddr; 217 } m_vtob_s; 218 #define VTOB_HASH_SHIFT 5 219 #define VTOB_HASH_SIZE (1UL << VTOB_HASH_SHIFT) 220 #define VTOB_HASH_MASK (VTOB_HASH_SIZE-1) 221 #define VTOB_HASH_CODE(m) \ 222 ((((m_addr_t) (m)) >> MEMO_CLUSTER_SHIFT) & VTOB_HASH_MASK) 223 224 typedef struct m_pool { /* Memory pool of a given kind */ 225 m_bush_t bush; 226 m_addr_t (*getp)(struct m_pool *); 227 void (*freep)(struct m_pool *, m_addr_t); 228 int nump; 229 m_vtob_s *(vtob[VTOB_HASH_SIZE]); 230 struct m_pool *next; 231 struct m_link h[PAGE_SHIFT-MEMO_SHIFT+MEMO_PAGE_ORDER+1]; 232 } m_pool_s; 233 234 static void *___m_alloc(m_pool_s *mp, int size) 235 { 236 int i = 0; 237 int s = (1 << MEMO_SHIFT); 238 int j; 239 m_addr_t a; 240 m_link_s *h = mp->h; 241 242 if (size > (PAGE_SIZE << MEMO_PAGE_ORDER)) 243 return NULL; 244 245 while (size > s) { 246 s <<= 1; 247 ++i; 248 } 249 250 j = i; 251 while (!h[j].next) { 252 if (s == (PAGE_SIZE << MEMO_PAGE_ORDER)) { 253 h[j].next = (m_link_s *)mp->getp(mp); 254 if (h[j].next) 255 h[j].next->next = NULL; 256 break; 257 } 258 ++j; 259 s <<= 1; 260 } 261 a = (m_addr_t) h[j].next; 262 if (a) { 263 h[j].next = h[j].next->next; 264 while (j > i) { 265 j -= 1; 266 s >>= 1; 267 h[j].next = (m_link_s *) (a+s); 268 h[j].next->next = NULL; 269 } 270 } 271 #ifdef DEBUG 272 printk("___m_alloc(%d) = %p\n", size, (void *) a); 273 #endif 274 return (void *) a; 275 } 276 277 static void ___m_free(m_pool_s *mp, void *ptr, int size) 278 { 279 int i = 0; 280 int s = (1 << MEMO_SHIFT); 281 m_link_s *q; 282 m_addr_t a, b; 283 m_link_s *h = mp->h; 284 285 #ifdef DEBUG 286 printk("___m_free(%p, %d)\n", ptr, size); 287 #endif 288 289 if (size > (PAGE_SIZE << MEMO_PAGE_ORDER)) 290 return; 291 292 while (size > s) { 293 s <<= 1; 294 ++i; 295 } 296 297 a = (m_addr_t) ptr; 298 299 while (1) { 300 #ifdef MEMO_FREE_UNUSED 301 if (s == (PAGE_SIZE << MEMO_PAGE_ORDER)) { 302 mp->freep(mp, a); 303 break; 304 } 305 #endif 306 b = a ^ s; 307 q = &h[i]; 308 while (q->next && q->next != (m_link_s *) b) { 309 q = q->next; 310 } 311 if (!q->next) { 312 ((m_link_s *) a)->next = h[i].next; 313 h[i].next = (m_link_s *) a; 314 break; 315 } 316 q->next = q->next->next; 317 a = a & b; 318 s <<= 1; 319 ++i; 320 } 321 } 322 323 static DEFINE_SPINLOCK(ncr53c8xx_lock); 324 325 static void *__m_calloc2(m_pool_s *mp, int size, char *name, int uflags) 326 { 327 void *p; 328 329 p = ___m_alloc(mp, size); 330 331 if (DEBUG_FLAGS & DEBUG_ALLOC) 332 printk ("new %-10s[%4d] @%p.\n", name, size, p); 333 334 if (p) 335 memset(p, 0, size); 336 else if (uflags & MEMO_WARN) 337 printk (NAME53C8XX ": failed to allocate %s[%d]\n", name, size); 338 339 return p; 340 } 341 342 #define __m_calloc(mp, s, n) __m_calloc2(mp, s, n, MEMO_WARN) 343 344 static void __m_free(m_pool_s *mp, void *ptr, int size, char *name) 345 { 346 if (DEBUG_FLAGS & DEBUG_ALLOC) 347 printk ("freeing %-10s[%4d] @%p.\n", name, size, ptr); 348 349 ___m_free(mp, ptr, size); 350 351 } 352 353 /* 354 * With pci bus iommu support, we use a default pool of unmapped memory 355 * for memory we donnot need to DMA from/to and one pool per pcidev for 356 * memory accessed by the PCI chip. `mp0' is the default not DMAable pool. 357 */ 358 359 static m_addr_t ___mp0_getp(m_pool_s *mp) 360 { 361 m_addr_t m = __get_free_pages(MEMO_GFP_FLAGS, MEMO_PAGE_ORDER); 362 if (m) 363 ++mp->nump; 364 return m; 365 } 366 367 static void ___mp0_freep(m_pool_s *mp, m_addr_t m) 368 { 369 free_pages(m, MEMO_PAGE_ORDER); 370 --mp->nump; 371 } 372 373 static m_pool_s mp0 = {NULL, ___mp0_getp, ___mp0_freep}; 374 375 /* 376 * DMAable pools. 377 */ 378 379 /* 380 * With pci bus iommu support, we maintain one pool per pcidev and a 381 * hashed reverse table for virtual to bus physical address translations. 382 */ 383 static m_addr_t ___dma_getp(m_pool_s *mp) 384 { 385 m_addr_t vp; 386 m_vtob_s *vbp; 387 388 vbp = __m_calloc(&mp0, sizeof(*vbp), "VTOB"); 389 if (vbp) { 390 dma_addr_t daddr; 391 vp = (m_addr_t) dma_alloc_coherent(mp->bush, 392 PAGE_SIZE<<MEMO_PAGE_ORDER, 393 &daddr, GFP_ATOMIC); 394 if (vp) { 395 int hc = VTOB_HASH_CODE(vp); 396 vbp->vaddr = vp; 397 vbp->baddr = daddr; 398 vbp->next = mp->vtob[hc]; 399 mp->vtob[hc] = vbp; 400 ++mp->nump; 401 return vp; 402 } 403 } 404 if (vbp) 405 __m_free(&mp0, vbp, sizeof(*vbp), "VTOB"); 406 return 0; 407 } 408 409 static void ___dma_freep(m_pool_s *mp, m_addr_t m) 410 { 411 m_vtob_s **vbpp, *vbp; 412 int hc = VTOB_HASH_CODE(m); 413 414 vbpp = &mp->vtob[hc]; 415 while (*vbpp && (*vbpp)->vaddr != m) 416 vbpp = &(*vbpp)->next; 417 if (*vbpp) { 418 vbp = *vbpp; 419 *vbpp = (*vbpp)->next; 420 dma_free_coherent(mp->bush, PAGE_SIZE<<MEMO_PAGE_ORDER, 421 (void *)vbp->vaddr, (dma_addr_t)vbp->baddr); 422 __m_free(&mp0, vbp, sizeof(*vbp), "VTOB"); 423 --mp->nump; 424 } 425 } 426 427 static inline m_pool_s *___get_dma_pool(m_bush_t bush) 428 { 429 m_pool_s *mp; 430 for (mp = mp0.next; mp && mp->bush != bush; mp = mp->next); 431 return mp; 432 } 433 434 static m_pool_s *___cre_dma_pool(m_bush_t bush) 435 { 436 m_pool_s *mp; 437 mp = __m_calloc(&mp0, sizeof(*mp), "MPOOL"); 438 if (mp) { 439 memset(mp, 0, sizeof(*mp)); 440 mp->bush = bush; 441 mp->getp = ___dma_getp; 442 mp->freep = ___dma_freep; 443 mp->next = mp0.next; 444 mp0.next = mp; 445 } 446 return mp; 447 } 448 449 static void ___del_dma_pool(m_pool_s *p) 450 { 451 struct m_pool **pp = &mp0.next; 452 453 while (*pp && *pp != p) 454 pp = &(*pp)->next; 455 if (*pp) { 456 *pp = (*pp)->next; 457 __m_free(&mp0, p, sizeof(*p), "MPOOL"); 458 } 459 } 460 461 static void *__m_calloc_dma(m_bush_t bush, int size, char *name) 462 { 463 u_long flags; 464 struct m_pool *mp; 465 void *m = NULL; 466 467 spin_lock_irqsave(&ncr53c8xx_lock, flags); 468 mp = ___get_dma_pool(bush); 469 if (!mp) 470 mp = ___cre_dma_pool(bush); 471 if (mp) 472 m = __m_calloc(mp, size, name); 473 if (mp && !mp->nump) 474 ___del_dma_pool(mp); 475 spin_unlock_irqrestore(&ncr53c8xx_lock, flags); 476 477 return m; 478 } 479 480 static void __m_free_dma(m_bush_t bush, void *m, int size, char *name) 481 { 482 u_long flags; 483 struct m_pool *mp; 484 485 spin_lock_irqsave(&ncr53c8xx_lock, flags); 486 mp = ___get_dma_pool(bush); 487 if (mp) 488 __m_free(mp, m, size, name); 489 if (mp && !mp->nump) 490 ___del_dma_pool(mp); 491 spin_unlock_irqrestore(&ncr53c8xx_lock, flags); 492 } 493 494 static m_addr_t __vtobus(m_bush_t bush, void *m) 495 { 496 u_long flags; 497 m_pool_s *mp; 498 int hc = VTOB_HASH_CODE(m); 499 m_vtob_s *vp = NULL; 500 m_addr_t a = ((m_addr_t) m) & ~MEMO_CLUSTER_MASK; 501 502 spin_lock_irqsave(&ncr53c8xx_lock, flags); 503 mp = ___get_dma_pool(bush); 504 if (mp) { 505 vp = mp->vtob[hc]; 506 while (vp && (m_addr_t) vp->vaddr != a) 507 vp = vp->next; 508 } 509 spin_unlock_irqrestore(&ncr53c8xx_lock, flags); 510 return vp ? vp->baddr + (((m_addr_t) m) - a) : 0; 511 } 512 513 #define _m_calloc_dma(np, s, n) __m_calloc_dma(np->dev, s, n) 514 #define _m_free_dma(np, p, s, n) __m_free_dma(np->dev, p, s, n) 515 #define m_calloc_dma(s, n) _m_calloc_dma(np, s, n) 516 #define m_free_dma(p, s, n) _m_free_dma(np, p, s, n) 517 #define _vtobus(np, p) __vtobus(np->dev, p) 518 #define vtobus(p) _vtobus(np, p) 519 520 /* 521 * Deal with DMA mapping/unmapping. 522 */ 523 524 /* To keep track of the dma mapping (sg/single) that has been set */ 525 #define __data_mapped SCp.phase 526 #define __data_mapping SCp.have_data_in 527 528 static void __unmap_scsi_data(struct device *dev, struct scsi_cmnd *cmd) 529 { 530 switch(cmd->__data_mapped) { 531 case 2: 532 dma_unmap_sg(dev, cmd->request_buffer, cmd->use_sg, 533 cmd->sc_data_direction); 534 break; 535 case 1: 536 dma_unmap_single(dev, cmd->__data_mapping, 537 cmd->request_bufflen, 538 cmd->sc_data_direction); 539 break; 540 } 541 cmd->__data_mapped = 0; 542 } 543 544 static u_long __map_scsi_single_data(struct device *dev, struct scsi_cmnd *cmd) 545 { 546 dma_addr_t mapping; 547 548 if (cmd->request_bufflen == 0) 549 return 0; 550 551 mapping = dma_map_single(dev, cmd->request_buffer, 552 cmd->request_bufflen, 553 cmd->sc_data_direction); 554 cmd->__data_mapped = 1; 555 cmd->__data_mapping = mapping; 556 557 return mapping; 558 } 559 560 static int __map_scsi_sg_data(struct device *dev, struct scsi_cmnd *cmd) 561 { 562 int use_sg; 563 564 if (cmd->use_sg == 0) 565 return 0; 566 567 use_sg = dma_map_sg(dev, cmd->request_buffer, cmd->use_sg, 568 cmd->sc_data_direction); 569 cmd->__data_mapped = 2; 570 cmd->__data_mapping = use_sg; 571 572 return use_sg; 573 } 574 575 #define unmap_scsi_data(np, cmd) __unmap_scsi_data(np->dev, cmd) 576 #define map_scsi_single_data(np, cmd) __map_scsi_single_data(np->dev, cmd) 577 #define map_scsi_sg_data(np, cmd) __map_scsi_sg_data(np->dev, cmd) 578 579 /*========================================================== 580 ** 581 ** Driver setup. 582 ** 583 ** This structure is initialized from linux config 584 ** options. It can be overridden at boot-up by the boot 585 ** command line. 586 ** 587 **========================================================== 588 */ 589 static struct ncr_driver_setup 590 driver_setup = SCSI_NCR_DRIVER_SETUP; 591 592 #ifdef SCSI_NCR_BOOT_COMMAND_LINE_SUPPORT 593 static struct ncr_driver_setup 594 driver_safe_setup __initdata = SCSI_NCR_DRIVER_SAFE_SETUP; 595 #endif 596 597 #define initverbose (driver_setup.verbose) 598 #define bootverbose (np->verbose) 599 600 601 /*=================================================================== 602 ** 603 ** Driver setup from the boot command line 604 ** 605 **=================================================================== 606 */ 607 608 #ifdef MODULE 609 #define ARG_SEP ' ' 610 #else 611 #define ARG_SEP ',' 612 #endif 613 614 #define OPT_TAGS 1 615 #define OPT_MASTER_PARITY 2 616 #define OPT_SCSI_PARITY 3 617 #define OPT_DISCONNECTION 4 618 #define OPT_SPECIAL_FEATURES 5 619 #define OPT_UNUSED_1 6 620 #define OPT_FORCE_SYNC_NEGO 7 621 #define OPT_REVERSE_PROBE 8 622 #define OPT_DEFAULT_SYNC 9 623 #define OPT_VERBOSE 10 624 #define OPT_DEBUG 11 625 #define OPT_BURST_MAX 12 626 #define OPT_LED_PIN 13 627 #define OPT_MAX_WIDE 14 628 #define OPT_SETTLE_DELAY 15 629 #define OPT_DIFF_SUPPORT 16 630 #define OPT_IRQM 17 631 #define OPT_PCI_FIX_UP 18 632 #define OPT_BUS_CHECK 19 633 #define OPT_OPTIMIZE 20 634 #define OPT_RECOVERY 21 635 #define OPT_SAFE_SETUP 22 636 #define OPT_USE_NVRAM 23 637 #define OPT_EXCLUDE 24 638 #define OPT_HOST_ID 25 639 640 #ifdef SCSI_NCR_IARB_SUPPORT 641 #define OPT_IARB 26 642 #endif 643 644 static char setup_token[] __initdata = 645 "tags:" "mpar:" 646 "spar:" "disc:" 647 "specf:" "ultra:" 648 "fsn:" "revprob:" 649 "sync:" "verb:" 650 "debug:" "burst:" 651 "led:" "wide:" 652 "settle:" "diff:" 653 "irqm:" "pcifix:" 654 "buschk:" "optim:" 655 "recovery:" 656 "safe:" "nvram:" 657 "excl:" "hostid:" 658 #ifdef SCSI_NCR_IARB_SUPPORT 659 "iarb:" 660 #endif 661 ; /* DONNOT REMOVE THIS ';' */ 662 663 #ifdef MODULE 664 #define ARG_SEP ' ' 665 #else 666 #define ARG_SEP ',' 667 #endif 668 669 static int __init get_setup_token(char *p) 670 { 671 char *cur = setup_token; 672 char *pc; 673 int i = 0; 674 675 while (cur != NULL && (pc = strchr(cur, ':')) != NULL) { 676 ++pc; 677 ++i; 678 if (!strncmp(p, cur, pc - cur)) 679 return i; 680 cur = pc; 681 } 682 return 0; 683 } 684 685 686 static int __init sym53c8xx__setup(char *str) 687 { 688 #ifdef SCSI_NCR_BOOT_COMMAND_LINE_SUPPORT 689 char *cur = str; 690 char *pc, *pv; 691 int i, val, c; 692 int xi = 0; 693 694 while (cur != NULL && (pc = strchr(cur, ':')) != NULL) { 695 char *pe; 696 697 val = 0; 698 pv = pc; 699 c = *++pv; 700 701 if (c == 'n') 702 val = 0; 703 else if (c == 'y') 704 val = 1; 705 else 706 val = (int) simple_strtoul(pv, &pe, 0); 707 708 switch (get_setup_token(cur)) { 709 case OPT_TAGS: 710 driver_setup.default_tags = val; 711 if (pe && *pe == '/') { 712 i = 0; 713 while (*pe && *pe != ARG_SEP && 714 i < sizeof(driver_setup.tag_ctrl)-1) { 715 driver_setup.tag_ctrl[i++] = *pe++; 716 } 717 driver_setup.tag_ctrl[i] = '\0'; 718 } 719 break; 720 case OPT_MASTER_PARITY: 721 driver_setup.master_parity = val; 722 break; 723 case OPT_SCSI_PARITY: 724 driver_setup.scsi_parity = val; 725 break; 726 case OPT_DISCONNECTION: 727 driver_setup.disconnection = val; 728 break; 729 case OPT_SPECIAL_FEATURES: 730 driver_setup.special_features = val; 731 break; 732 case OPT_FORCE_SYNC_NEGO: 733 driver_setup.force_sync_nego = val; 734 break; 735 case OPT_REVERSE_PROBE: 736 driver_setup.reverse_probe = val; 737 break; 738 case OPT_DEFAULT_SYNC: 739 driver_setup.default_sync = val; 740 break; 741 case OPT_VERBOSE: 742 driver_setup.verbose = val; 743 break; 744 case OPT_DEBUG: 745 driver_setup.debug = val; 746 break; 747 case OPT_BURST_MAX: 748 driver_setup.burst_max = val; 749 break; 750 case OPT_LED_PIN: 751 driver_setup.led_pin = val; 752 break; 753 case OPT_MAX_WIDE: 754 driver_setup.max_wide = val? 1:0; 755 break; 756 case OPT_SETTLE_DELAY: 757 driver_setup.settle_delay = val; 758 break; 759 case OPT_DIFF_SUPPORT: 760 driver_setup.diff_support = val; 761 break; 762 case OPT_IRQM: 763 driver_setup.irqm = val; 764 break; 765 case OPT_PCI_FIX_UP: 766 driver_setup.pci_fix_up = val; 767 break; 768 case OPT_BUS_CHECK: 769 driver_setup.bus_check = val; 770 break; 771 case OPT_OPTIMIZE: 772 driver_setup.optimize = val; 773 break; 774 case OPT_RECOVERY: 775 driver_setup.recovery = val; 776 break; 777 case OPT_USE_NVRAM: 778 driver_setup.use_nvram = val; 779 break; 780 case OPT_SAFE_SETUP: 781 memcpy(&driver_setup, &driver_safe_setup, 782 sizeof(driver_setup)); 783 break; 784 case OPT_EXCLUDE: 785 if (xi < SCSI_NCR_MAX_EXCLUDES) 786 driver_setup.excludes[xi++] = val; 787 break; 788 case OPT_HOST_ID: 789 driver_setup.host_id = val; 790 break; 791 #ifdef SCSI_NCR_IARB_SUPPORT 792 case OPT_IARB: 793 driver_setup.iarb = val; 794 break; 795 #endif 796 default: 797 printk("sym53c8xx_setup: unexpected boot option '%.*s' ignored\n", (int)(pc-cur+1), cur); 798 break; 799 } 800 801 if ((cur = strchr(cur, ARG_SEP)) != NULL) 802 ++cur; 803 } 804 #endif /* SCSI_NCR_BOOT_COMMAND_LINE_SUPPORT */ 805 return 1; 806 } 807 808 /*=================================================================== 809 ** 810 ** Get device queue depth from boot command line. 811 ** 812 **=================================================================== 813 */ 814 #define DEF_DEPTH (driver_setup.default_tags) 815 #define ALL_TARGETS -2 816 #define NO_TARGET -1 817 #define ALL_LUNS -2 818 #define NO_LUN -1 819 820 static int device_queue_depth(int unit, int target, int lun) 821 { 822 int c, h, t, u, v; 823 char *p = driver_setup.tag_ctrl; 824 char *ep; 825 826 h = -1; 827 t = NO_TARGET; 828 u = NO_LUN; 829 while ((c = *p++) != 0) { 830 v = simple_strtoul(p, &ep, 0); 831 switch(c) { 832 case '/': 833 ++h; 834 t = ALL_TARGETS; 835 u = ALL_LUNS; 836 break; 837 case 't': 838 if (t != target) 839 t = (target == v) ? v : NO_TARGET; 840 u = ALL_LUNS; 841 break; 842 case 'u': 843 if (u != lun) 844 u = (lun == v) ? v : NO_LUN; 845 break; 846 case 'q': 847 if (h == unit && 848 (t == ALL_TARGETS || t == target) && 849 (u == ALL_LUNS || u == lun)) 850 return v; 851 break; 852 case '-': 853 t = ALL_TARGETS; 854 u = ALL_LUNS; 855 break; 856 default: 857 break; 858 } 859 p = ep; 860 } 861 return DEF_DEPTH; 862 } 863 864 865 /*========================================================== 866 ** 867 ** The CCB done queue uses an array of CCB virtual 868 ** addresses. Empty entries are flagged using the bogus 869 ** virtual address 0xffffffff. 870 ** 871 ** Since PCI ensures that only aligned DWORDs are accessed 872 ** atomically, 64 bit little-endian architecture requires 873 ** to test the high order DWORD of the entry to determine 874 ** if it is empty or valid. 875 ** 876 ** BTW, I will make things differently as soon as I will 877 ** have a better idea, but this is simple and should work. 878 ** 879 **========================================================== 880 */ 881 882 #define SCSI_NCR_CCB_DONE_SUPPORT 883 #ifdef SCSI_NCR_CCB_DONE_SUPPORT 884 885 #define MAX_DONE 24 886 #define CCB_DONE_EMPTY 0xffffffffUL 887 888 /* All 32 bit architectures */ 889 #if BITS_PER_LONG == 32 890 #define CCB_DONE_VALID(cp) (((u_long) cp) != CCB_DONE_EMPTY) 891 892 /* All > 32 bit (64 bit) architectures regardless endian-ness */ 893 #else 894 #define CCB_DONE_VALID(cp) \ 895 ((((u_long) cp) & 0xffffffff00000000ul) && \ 896 (((u_long) cp) & 0xfffffffful) != CCB_DONE_EMPTY) 897 #endif 898 899 #endif /* SCSI_NCR_CCB_DONE_SUPPORT */ 900 901 /*========================================================== 902 ** 903 ** Configuration and Debugging 904 ** 905 **========================================================== 906 */ 907 908 /* 909 ** SCSI address of this device. 910 ** The boot routines should have set it. 911 ** If not, use this. 912 */ 913 914 #ifndef SCSI_NCR_MYADDR 915 #define SCSI_NCR_MYADDR (7) 916 #endif 917 918 /* 919 ** The maximum number of tags per logic unit. 920 ** Used only for disk devices that support tags. 921 */ 922 923 #ifndef SCSI_NCR_MAX_TAGS 924 #define SCSI_NCR_MAX_TAGS (8) 925 #endif 926 927 /* 928 ** TAGS are actually limited to 64 tags/lun. 929 ** We need to deal with power of 2, for alignment constraints. 930 */ 931 #if SCSI_NCR_MAX_TAGS > 64 932 #define MAX_TAGS (64) 933 #else 934 #define MAX_TAGS SCSI_NCR_MAX_TAGS 935 #endif 936 937 #define NO_TAG (255) 938 939 /* 940 ** Choose appropriate type for tag bitmap. 941 */ 942 #if MAX_TAGS > 32 943 typedef u64 tagmap_t; 944 #else 945 typedef u32 tagmap_t; 946 #endif 947 948 /* 949 ** Number of targets supported by the driver. 950 ** n permits target numbers 0..n-1. 951 ** Default is 16, meaning targets #0..#15. 952 ** #7 .. is myself. 953 */ 954 955 #ifdef SCSI_NCR_MAX_TARGET 956 #define MAX_TARGET (SCSI_NCR_MAX_TARGET) 957 #else 958 #define MAX_TARGET (16) 959 #endif 960 961 /* 962 ** Number of logic units supported by the driver. 963 ** n enables logic unit numbers 0..n-1. 964 ** The common SCSI devices require only 965 ** one lun, so take 1 as the default. 966 */ 967 968 #ifdef SCSI_NCR_MAX_LUN 969 #define MAX_LUN SCSI_NCR_MAX_LUN 970 #else 971 #define MAX_LUN (1) 972 #endif 973 974 /* 975 ** Asynchronous pre-scaler (ns). Shall be 40 976 */ 977 978 #ifndef SCSI_NCR_MIN_ASYNC 979 #define SCSI_NCR_MIN_ASYNC (40) 980 #endif 981 982 /* 983 ** The maximum number of jobs scheduled for starting. 984 ** There should be one slot per target, and one slot 985 ** for each tag of each target in use. 986 ** The calculation below is actually quite silly ... 987 */ 988 989 #ifdef SCSI_NCR_CAN_QUEUE 990 #define MAX_START (SCSI_NCR_CAN_QUEUE + 4) 991 #else 992 #define MAX_START (MAX_TARGET + 7 * MAX_TAGS) 993 #endif 994 995 /* 996 ** We limit the max number of pending IO to 250. 997 ** since we donnot want to allocate more than 1 998 ** PAGE for 'scripth'. 999 */ 1000 #if MAX_START > 250 1001 #undef MAX_START 1002 #define MAX_START 250 1003 #endif 1004 1005 /* 1006 ** The maximum number of segments a transfer is split into. 1007 ** We support up to 127 segments for both read and write. 1008 ** The data scripts are broken into 2 sub-scripts. 1009 ** 80 (MAX_SCATTERL) segments are moved from a sub-script 1010 ** in on-chip RAM. This makes data transfers shorter than 1011 ** 80k (assuming 1k fs) as fast as possible. 1012 */ 1013 1014 #define MAX_SCATTER (SCSI_NCR_MAX_SCATTER) 1015 1016 #if (MAX_SCATTER > 80) 1017 #define MAX_SCATTERL 80 1018 #define MAX_SCATTERH (MAX_SCATTER - MAX_SCATTERL) 1019 #else 1020 #define MAX_SCATTERL (MAX_SCATTER-1) 1021 #define MAX_SCATTERH 1 1022 #endif 1023 1024 /* 1025 ** other 1026 */ 1027 1028 #define NCR_SNOOP_TIMEOUT (1000000) 1029 1030 /* 1031 ** Other definitions 1032 */ 1033 1034 #define ScsiResult(host_code, scsi_code) (((host_code) << 16) + ((scsi_code) & 0x7f)) 1035 1036 #define initverbose (driver_setup.verbose) 1037 #define bootverbose (np->verbose) 1038 1039 /*========================================================== 1040 ** 1041 ** Command control block states. 1042 ** 1043 **========================================================== 1044 */ 1045 1046 #define HS_IDLE (0) 1047 #define HS_BUSY (1) 1048 #define HS_NEGOTIATE (2) /* sync/wide data transfer*/ 1049 #define HS_DISCONNECT (3) /* Disconnected by target */ 1050 1051 #define HS_DONEMASK (0x80) 1052 #define HS_COMPLETE (4|HS_DONEMASK) 1053 #define HS_SEL_TIMEOUT (5|HS_DONEMASK) /* Selection timeout */ 1054 #define HS_RESET (6|HS_DONEMASK) /* SCSI reset */ 1055 #define HS_ABORTED (7|HS_DONEMASK) /* Transfer aborted */ 1056 #define HS_TIMEOUT (8|HS_DONEMASK) /* Software timeout */ 1057 #define HS_FAIL (9|HS_DONEMASK) /* SCSI or PCI bus errors */ 1058 #define HS_UNEXPECTED (10|HS_DONEMASK)/* Unexpected disconnect */ 1059 1060 /* 1061 ** Invalid host status values used by the SCRIPTS processor 1062 ** when the nexus is not fully identified. 1063 ** Shall never appear in a CCB. 1064 */ 1065 1066 #define HS_INVALMASK (0x40) 1067 #define HS_SELECTING (0|HS_INVALMASK) 1068 #define HS_IN_RESELECT (1|HS_INVALMASK) 1069 #define HS_STARTING (2|HS_INVALMASK) 1070 1071 /* 1072 ** Flags set by the SCRIPT processor for commands 1073 ** that have been skipped. 1074 */ 1075 #define HS_SKIPMASK (0x20) 1076 1077 /*========================================================== 1078 ** 1079 ** Software Interrupt Codes 1080 ** 1081 **========================================================== 1082 */ 1083 1084 #define SIR_BAD_STATUS (1) 1085 #define SIR_XXXXXXXXXX (2) 1086 #define SIR_NEGO_SYNC (3) 1087 #define SIR_NEGO_WIDE (4) 1088 #define SIR_NEGO_FAILED (5) 1089 #define SIR_NEGO_PROTO (6) 1090 #define SIR_REJECT_RECEIVED (7) 1091 #define SIR_REJECT_SENT (8) 1092 #define SIR_IGN_RESIDUE (9) 1093 #define SIR_MISSING_SAVE (10) 1094 #define SIR_RESEL_NO_MSG_IN (11) 1095 #define SIR_RESEL_NO_IDENTIFY (12) 1096 #define SIR_RESEL_BAD_LUN (13) 1097 #define SIR_RESEL_BAD_TARGET (14) 1098 #define SIR_RESEL_BAD_I_T_L (15) 1099 #define SIR_RESEL_BAD_I_T_L_Q (16) 1100 #define SIR_DONE_OVERFLOW (17) 1101 #define SIR_INTFLY (18) 1102 #define SIR_MAX (18) 1103 1104 /*========================================================== 1105 ** 1106 ** Extended error codes. 1107 ** xerr_status field of struct ccb. 1108 ** 1109 **========================================================== 1110 */ 1111 1112 #define XE_OK (0) 1113 #define XE_EXTRA_DATA (1) /* unexpected data phase */ 1114 #define XE_BAD_PHASE (2) /* illegal phase (4/5) */ 1115 1116 /*========================================================== 1117 ** 1118 ** Negotiation status. 1119 ** nego_status field of struct ccb. 1120 ** 1121 **========================================================== 1122 */ 1123 1124 #define NS_NOCHANGE (0) 1125 #define NS_SYNC (1) 1126 #define NS_WIDE (2) 1127 #define NS_PPR (4) 1128 1129 /*========================================================== 1130 ** 1131 ** Misc. 1132 ** 1133 **========================================================== 1134 */ 1135 1136 #define CCB_MAGIC (0xf2691ad2) 1137 1138 /*========================================================== 1139 ** 1140 ** Declaration of structs. 1141 ** 1142 **========================================================== 1143 */ 1144 1145 static struct scsi_transport_template *ncr53c8xx_transport_template = NULL; 1146 1147 struct tcb; 1148 struct lcb; 1149 struct ccb; 1150 struct ncb; 1151 struct script; 1152 1153 struct link { 1154 ncrcmd l_cmd; 1155 ncrcmd l_paddr; 1156 }; 1157 1158 struct usrcmd { 1159 u_long target; 1160 u_long lun; 1161 u_long data; 1162 u_long cmd; 1163 }; 1164 1165 #define UC_SETSYNC 10 1166 #define UC_SETTAGS 11 1167 #define UC_SETDEBUG 12 1168 #define UC_SETORDER 13 1169 #define UC_SETWIDE 14 1170 #define UC_SETFLAG 15 1171 #define UC_SETVERBOSE 17 1172 1173 #define UF_TRACE (0x01) 1174 #define UF_NODISC (0x02) 1175 #define UF_NOSCAN (0x04) 1176 1177 /*======================================================================== 1178 ** 1179 ** Declaration of structs: target control block 1180 ** 1181 **======================================================================== 1182 */ 1183 struct tcb { 1184 /*---------------------------------------------------------------- 1185 ** During reselection the ncr jumps to this point with SFBR 1186 ** set to the encoded target number with bit 7 set. 1187 ** if it's not this target, jump to the next. 1188 ** 1189 ** JUMP IF (SFBR != #target#), @(next tcb) 1190 **---------------------------------------------------------------- 1191 */ 1192 struct link jump_tcb; 1193 1194 /*---------------------------------------------------------------- 1195 ** Load the actual values for the sxfer and the scntl3 1196 ** register (sync/wide mode). 1197 ** 1198 ** SCR_COPY (1), @(sval field of this tcb), @(sxfer register) 1199 ** SCR_COPY (1), @(wval field of this tcb), @(scntl3 register) 1200 **---------------------------------------------------------------- 1201 */ 1202 ncrcmd getscr[6]; 1203 1204 /*---------------------------------------------------------------- 1205 ** Get the IDENTIFY message and load the LUN to SFBR. 1206 ** 1207 ** CALL, <RESEL_LUN> 1208 **---------------------------------------------------------------- 1209 */ 1210 struct link call_lun; 1211 1212 /*---------------------------------------------------------------- 1213 ** Now look for the right lun. 1214 ** 1215 ** For i = 0 to 3 1216 ** SCR_JUMP ^ IFTRUE(MASK(i, 3)), @(first lcb mod. i) 1217 ** 1218 ** Recent chips will prefetch the 4 JUMPS using only 1 burst. 1219 ** It is kind of hashcoding. 1220 **---------------------------------------------------------------- 1221 */ 1222 struct link jump_lcb[4]; /* JUMPs for reselection */ 1223 struct lcb * lp[MAX_LUN]; /* The lcb's of this tcb */ 1224 1225 /*---------------------------------------------------------------- 1226 ** Pointer to the ccb used for negotiation. 1227 ** Prevent from starting a negotiation for all queued commands 1228 ** when tagged command queuing is enabled. 1229 **---------------------------------------------------------------- 1230 */ 1231 struct ccb * nego_cp; 1232 1233 /*---------------------------------------------------------------- 1234 ** statistical data 1235 **---------------------------------------------------------------- 1236 */ 1237 u_long transfers; 1238 u_long bytes; 1239 1240 /*---------------------------------------------------------------- 1241 ** negotiation of wide and synch transfer and device quirks. 1242 **---------------------------------------------------------------- 1243 */ 1244 #ifdef SCSI_NCR_BIG_ENDIAN 1245 /*0*/ u16 period; 1246 /*2*/ u_char sval; 1247 /*3*/ u_char minsync; 1248 /*0*/ u_char wval; 1249 /*1*/ u_char widedone; 1250 /*2*/ u_char quirks; 1251 /*3*/ u_char maxoffs; 1252 #else 1253 /*0*/ u_char minsync; 1254 /*1*/ u_char sval; 1255 /*2*/ u16 period; 1256 /*0*/ u_char maxoffs; 1257 /*1*/ u_char quirks; 1258 /*2*/ u_char widedone; 1259 /*3*/ u_char wval; 1260 #endif 1261 1262 /* User settable limits and options. */ 1263 u_char usrsync; 1264 u_char usrwide; 1265 u_char usrtags; 1266 u_char usrflag; 1267 struct scsi_target *starget; 1268 }; 1269 1270 /*======================================================================== 1271 ** 1272 ** Declaration of structs: lun control block 1273 ** 1274 **======================================================================== 1275 */ 1276 struct lcb { 1277 /*---------------------------------------------------------------- 1278 ** During reselection the ncr jumps to this point 1279 ** with SFBR set to the "Identify" message. 1280 ** if it's not this lun, jump to the next. 1281 ** 1282 ** JUMP IF (SFBR != #lun#), @(next lcb of this target) 1283 ** 1284 ** It is this lun. Load TEMP with the nexus jumps table 1285 ** address and jump to RESEL_TAG (or RESEL_NOTAG). 1286 ** 1287 ** SCR_COPY (4), p_jump_ccb, TEMP, 1288 ** SCR_JUMP, <RESEL_TAG> 1289 **---------------------------------------------------------------- 1290 */ 1291 struct link jump_lcb; 1292 ncrcmd load_jump_ccb[3]; 1293 struct link jump_tag; 1294 ncrcmd p_jump_ccb; /* Jump table bus address */ 1295 1296 /*---------------------------------------------------------------- 1297 ** Jump table used by the script processor to directly jump 1298 ** to the CCB corresponding to the reselected nexus. 1299 ** Address is allocated on 256 bytes boundary in order to 1300 ** allow 8 bit calculation of the tag jump entry for up to 1301 ** 64 possible tags. 1302 **---------------------------------------------------------------- 1303 */ 1304 u32 jump_ccb_0; /* Default table if no tags */ 1305 u32 *jump_ccb; /* Virtual address */ 1306 1307 /*---------------------------------------------------------------- 1308 ** CCB queue management. 1309 **---------------------------------------------------------------- 1310 */ 1311 struct list_head free_ccbq; /* Queue of available CCBs */ 1312 struct list_head busy_ccbq; /* Queue of busy CCBs */ 1313 struct list_head wait_ccbq; /* Queue of waiting for IO CCBs */ 1314 struct list_head skip_ccbq; /* Queue of skipped CCBs */ 1315 u_char actccbs; /* Number of allocated CCBs */ 1316 u_char busyccbs; /* CCBs busy for this lun */ 1317 u_char queuedccbs; /* CCBs queued to the controller*/ 1318 u_char queuedepth; /* Queue depth for this lun */ 1319 u_char scdev_depth; /* SCSI device queue depth */ 1320 u_char maxnxs; /* Max possible nexuses */ 1321 1322 /*---------------------------------------------------------------- 1323 ** Control of tagged command queuing. 1324 ** Tags allocation is performed using a circular buffer. 1325 ** This avoids using a loop for tag allocation. 1326 **---------------------------------------------------------------- 1327 */ 1328 u_char ia_tag; /* Allocation index */ 1329 u_char if_tag; /* Freeing index */ 1330 u_char cb_tags[MAX_TAGS]; /* Circular tags buffer */ 1331 u_char usetags; /* Command queuing is active */ 1332 u_char maxtags; /* Max nr of tags asked by user */ 1333 u_char numtags; /* Current number of tags */ 1334 1335 /*---------------------------------------------------------------- 1336 ** QUEUE FULL control and ORDERED tag control. 1337 **---------------------------------------------------------------- 1338 */ 1339 /*---------------------------------------------------------------- 1340 ** QUEUE FULL and ORDERED tag control. 1341 **---------------------------------------------------------------- 1342 */ 1343 u16 num_good; /* Nr of GOOD since QUEUE FULL */ 1344 tagmap_t tags_umap; /* Used tags bitmap */ 1345 tagmap_t tags_smap; /* Tags in use at 'tag_stime' */ 1346 u_long tags_stime; /* Last time we set smap=umap */ 1347 struct ccb * held_ccb; /* CCB held for QUEUE FULL */ 1348 }; 1349 1350 /*======================================================================== 1351 ** 1352 ** Declaration of structs: the launch script. 1353 ** 1354 **======================================================================== 1355 ** 1356 ** It is part of the CCB and is called by the scripts processor to 1357 ** start or restart the data structure (nexus). 1358 ** This 6 DWORDs mini script makes use of prefetching. 1359 ** 1360 **------------------------------------------------------------------------ 1361 */ 1362 struct launch { 1363 /*---------------------------------------------------------------- 1364 ** SCR_COPY(4), @(p_phys), @(dsa register) 1365 ** SCR_JUMP, @(scheduler_point) 1366 **---------------------------------------------------------------- 1367 */ 1368 ncrcmd setup_dsa[3]; /* Copy 'phys' address to dsa */ 1369 struct link schedule; /* Jump to scheduler point */ 1370 ncrcmd p_phys; /* 'phys' header bus address */ 1371 }; 1372 1373 /*======================================================================== 1374 ** 1375 ** Declaration of structs: global HEADER. 1376 ** 1377 **======================================================================== 1378 ** 1379 ** This substructure is copied from the ccb to a global address after 1380 ** selection (or reselection) and copied back before disconnect. 1381 ** 1382 ** These fields are accessible to the script processor. 1383 ** 1384 **------------------------------------------------------------------------ 1385 */ 1386 1387 struct head { 1388 /*---------------------------------------------------------------- 1389 ** Saved data pointer. 1390 ** Points to the position in the script responsible for the 1391 ** actual transfer transfer of data. 1392 ** It's written after reception of a SAVE_DATA_POINTER message. 1393 ** The goalpointer points after the last transfer command. 1394 **---------------------------------------------------------------- 1395 */ 1396 u32 savep; 1397 u32 lastp; 1398 u32 goalp; 1399 1400 /*---------------------------------------------------------------- 1401 ** Alternate data pointer. 1402 ** They are copied back to savep/lastp/goalp by the SCRIPTS 1403 ** when the direction is unknown and the device claims data out. 1404 **---------------------------------------------------------------- 1405 */ 1406 u32 wlastp; 1407 u32 wgoalp; 1408 1409 /*---------------------------------------------------------------- 1410 ** The virtual address of the ccb containing this header. 1411 **---------------------------------------------------------------- 1412 */ 1413 struct ccb * cp; 1414 1415 /*---------------------------------------------------------------- 1416 ** Status fields. 1417 **---------------------------------------------------------------- 1418 */ 1419 u_char scr_st[4]; /* script status */ 1420 u_char status[4]; /* host status. must be the */ 1421 /* last DWORD of the header. */ 1422 }; 1423 1424 /* 1425 ** The status bytes are used by the host and the script processor. 1426 ** 1427 ** The byte corresponding to the host_status must be stored in the 1428 ** last DWORD of the CCB header since it is used for command 1429 ** completion (ncr_wakeup()). Doing so, we are sure that the header 1430 ** has been entirely copied back to the CCB when the host_status is 1431 ** seen complete by the CPU. 1432 ** 1433 ** The last four bytes (status[4]) are copied to the scratchb register 1434 ** (declared as scr0..scr3 in ncr_reg.h) just after the select/reselect, 1435 ** and copied back just after disconnecting. 1436 ** Inside the script the XX_REG are used. 1437 ** 1438 ** The first four bytes (scr_st[4]) are used inside the script by 1439 ** "COPY" commands. 1440 ** Because source and destination must have the same alignment 1441 ** in a DWORD, the fields HAVE to be at the choosen offsets. 1442 ** xerr_st 0 (0x34) scratcha 1443 ** sync_st 1 (0x05) sxfer 1444 ** wide_st 3 (0x03) scntl3 1445 */ 1446 1447 /* 1448 ** Last four bytes (script) 1449 */ 1450 #define QU_REG scr0 1451 #define HS_REG scr1 1452 #define HS_PRT nc_scr1 1453 #define SS_REG scr2 1454 #define SS_PRT nc_scr2 1455 #define PS_REG scr3 1456 1457 /* 1458 ** Last four bytes (host) 1459 */ 1460 #ifdef SCSI_NCR_BIG_ENDIAN 1461 #define actualquirks phys.header.status[3] 1462 #define host_status phys.header.status[2] 1463 #define scsi_status phys.header.status[1] 1464 #define parity_status phys.header.status[0] 1465 #else 1466 #define actualquirks phys.header.status[0] 1467 #define host_status phys.header.status[1] 1468 #define scsi_status phys.header.status[2] 1469 #define parity_status phys.header.status[3] 1470 #endif 1471 1472 /* 1473 ** First four bytes (script) 1474 */ 1475 #define xerr_st header.scr_st[0] 1476 #define sync_st header.scr_st[1] 1477 #define nego_st header.scr_st[2] 1478 #define wide_st header.scr_st[3] 1479 1480 /* 1481 ** First four bytes (host) 1482 */ 1483 #define xerr_status phys.xerr_st 1484 #define nego_status phys.nego_st 1485 1486 #if 0 1487 #define sync_status phys.sync_st 1488 #define wide_status phys.wide_st 1489 #endif 1490 1491 /*========================================================== 1492 ** 1493 ** Declaration of structs: Data structure block 1494 ** 1495 **========================================================== 1496 ** 1497 ** During execution of a ccb by the script processor, 1498 ** the DSA (data structure address) register points 1499 ** to this substructure of the ccb. 1500 ** This substructure contains the header with 1501 ** the script-processor-changable data and 1502 ** data blocks for the indirect move commands. 1503 ** 1504 **---------------------------------------------------------- 1505 */ 1506 1507 struct dsb { 1508 1509 /* 1510 ** Header. 1511 */ 1512 1513 struct head header; 1514 1515 /* 1516 ** Table data for Script 1517 */ 1518 1519 struct scr_tblsel select; 1520 struct scr_tblmove smsg ; 1521 struct scr_tblmove cmd ; 1522 struct scr_tblmove sense ; 1523 struct scr_tblmove data[MAX_SCATTER]; 1524 }; 1525 1526 1527 /*======================================================================== 1528 ** 1529 ** Declaration of structs: Command control block. 1530 ** 1531 **======================================================================== 1532 */ 1533 struct ccb { 1534 /*---------------------------------------------------------------- 1535 ** This is the data structure which is pointed by the DSA 1536 ** register when it is executed by the script processor. 1537 ** It must be the first entry because it contains the header 1538 ** as first entry that must be cache line aligned. 1539 **---------------------------------------------------------------- 1540 */ 1541 struct dsb phys; 1542 1543 /*---------------------------------------------------------------- 1544 ** Mini-script used at CCB execution start-up. 1545 ** Load the DSA with the data structure address (phys) and 1546 ** jump to SELECT. Jump to CANCEL if CCB is to be canceled. 1547 **---------------------------------------------------------------- 1548 */ 1549 struct launch start; 1550 1551 /*---------------------------------------------------------------- 1552 ** Mini-script used at CCB relection to restart the nexus. 1553 ** Load the DSA with the data structure address (phys) and 1554 ** jump to RESEL_DSA. Jump to ABORT if CCB is to be aborted. 1555 **---------------------------------------------------------------- 1556 */ 1557 struct launch restart; 1558 1559 /*---------------------------------------------------------------- 1560 ** If a data transfer phase is terminated too early 1561 ** (after reception of a message (i.e. DISCONNECT)), 1562 ** we have to prepare a mini script to transfer 1563 ** the rest of the data. 1564 **---------------------------------------------------------------- 1565 */ 1566 ncrcmd patch[8]; 1567 1568 /*---------------------------------------------------------------- 1569 ** The general SCSI driver provides a 1570 ** pointer to a control block. 1571 **---------------------------------------------------------------- 1572 */ 1573 struct scsi_cmnd *cmd; /* SCSI command */ 1574 u_char cdb_buf[16]; /* Copy of CDB */ 1575 u_char sense_buf[64]; 1576 int data_len; /* Total data length */ 1577 1578 /*---------------------------------------------------------------- 1579 ** Message areas. 1580 ** We prepare a message to be sent after selection. 1581 ** We may use a second one if the command is rescheduled 1582 ** due to GETCC or QFULL. 1583 ** Contents are IDENTIFY and SIMPLE_TAG. 1584 ** While negotiating sync or wide transfer, 1585 ** a SDTR or WDTR message is appended. 1586 **---------------------------------------------------------------- 1587 */ 1588 u_char scsi_smsg [8]; 1589 u_char scsi_smsg2[8]; 1590 1591 /*---------------------------------------------------------------- 1592 ** Other fields. 1593 **---------------------------------------------------------------- 1594 */ 1595 u_long p_ccb; /* BUS address of this CCB */ 1596 u_char sensecmd[6]; /* Sense command */ 1597 u_char tag; /* Tag for this transfer */ 1598 /* 255 means no tag */ 1599 u_char target; 1600 u_char lun; 1601 u_char queued; 1602 u_char auto_sense; 1603 struct ccb * link_ccb; /* Host adapter CCB chain */ 1604 struct list_head link_ccbq; /* Link to unit CCB queue */ 1605 u32 startp; /* Initial data pointer */ 1606 u_long magic; /* Free / busy CCB flag */ 1607 }; 1608 1609 #define CCB_PHYS(cp,lbl) (cp->p_ccb + offsetof(struct ccb, lbl)) 1610 1611 1612 /*======================================================================== 1613 ** 1614 ** Declaration of structs: NCR device descriptor 1615 ** 1616 **======================================================================== 1617 */ 1618 struct ncb { 1619 /*---------------------------------------------------------------- 1620 ** The global header. 1621 ** It is accessible to both the host and the script processor. 1622 ** Must be cache line size aligned (32 for x86) in order to 1623 ** allow cache line bursting when it is copied to/from CCB. 1624 **---------------------------------------------------------------- 1625 */ 1626 struct head header; 1627 1628 /*---------------------------------------------------------------- 1629 ** CCBs management queues. 1630 **---------------------------------------------------------------- 1631 */ 1632 struct scsi_cmnd *waiting_list; /* Commands waiting for a CCB */ 1633 /* when lcb is not allocated. */ 1634 struct scsi_cmnd *done_list; /* Commands waiting for done() */ 1635 /* callback to be invoked. */ 1636 spinlock_t smp_lock; /* Lock for SMP threading */ 1637 1638 /*---------------------------------------------------------------- 1639 ** Chip and controller indentification. 1640 **---------------------------------------------------------------- 1641 */ 1642 int unit; /* Unit number */ 1643 char inst_name[16]; /* ncb instance name */ 1644 1645 /*---------------------------------------------------------------- 1646 ** Initial value of some IO register bits. 1647 ** These values are assumed to have been set by BIOS, and may 1648 ** be used for probing adapter implementation differences. 1649 **---------------------------------------------------------------- 1650 */ 1651 u_char sv_scntl0, sv_scntl3, sv_dmode, sv_dcntl, sv_ctest0, sv_ctest3, 1652 sv_ctest4, sv_ctest5, sv_gpcntl, sv_stest2, sv_stest4; 1653 1654 /*---------------------------------------------------------------- 1655 ** Actual initial value of IO register bits used by the 1656 ** driver. They are loaded at initialisation according to 1657 ** features that are to be enabled. 1658 **---------------------------------------------------------------- 1659 */ 1660 u_char rv_scntl0, rv_scntl3, rv_dmode, rv_dcntl, rv_ctest0, rv_ctest3, 1661 rv_ctest4, rv_ctest5, rv_stest2; 1662 1663 /*---------------------------------------------------------------- 1664 ** Targets management. 1665 ** During reselection the ncr jumps to jump_tcb. 1666 ** The SFBR register is loaded with the encoded target id. 1667 ** For i = 0 to 3 1668 ** SCR_JUMP ^ IFTRUE(MASK(i, 3)), @(next tcb mod. i) 1669 ** 1670 ** Recent chips will prefetch the 4 JUMPS using only 1 burst. 1671 ** It is kind of hashcoding. 1672 **---------------------------------------------------------------- 1673 */ 1674 struct link jump_tcb[4]; /* JUMPs for reselection */ 1675 struct tcb target[MAX_TARGET]; /* Target data */ 1676 1677 /*---------------------------------------------------------------- 1678 ** Virtual and physical bus addresses of the chip. 1679 **---------------------------------------------------------------- 1680 */ 1681 void __iomem *vaddr; /* Virtual and bus address of */ 1682 unsigned long paddr; /* chip's IO registers. */ 1683 unsigned long paddr2; /* On-chip RAM bus address. */ 1684 volatile /* Pointer to volatile for */ 1685 struct ncr_reg __iomem *reg; /* memory mapped IO. */ 1686 1687 /*---------------------------------------------------------------- 1688 ** SCRIPTS virtual and physical bus addresses. 1689 ** 'script' is loaded in the on-chip RAM if present. 1690 ** 'scripth' stays in main memory. 1691 **---------------------------------------------------------------- 1692 */ 1693 struct script *script0; /* Copies of script and scripth */ 1694 struct scripth *scripth0; /* relocated for this ncb. */ 1695 struct scripth *scripth; /* Actual scripth virt. address */ 1696 u_long p_script; /* Actual script and scripth */ 1697 u_long p_scripth; /* bus addresses. */ 1698 1699 /*---------------------------------------------------------------- 1700 ** General controller parameters and configuration. 1701 **---------------------------------------------------------------- 1702 */ 1703 struct device *dev; 1704 u_char revision_id; /* PCI device revision id */ 1705 u32 irq; /* IRQ level */ 1706 u32 features; /* Chip features map */ 1707 u_char myaddr; /* SCSI id of the adapter */ 1708 u_char maxburst; /* log base 2 of dwords burst */ 1709 u_char maxwide; /* Maximum transfer width */ 1710 u_char minsync; /* Minimum sync period factor */ 1711 u_char maxsync; /* Maximum sync period factor */ 1712 u_char maxoffs; /* Max scsi offset */ 1713 u_char multiplier; /* Clock multiplier (1,2,4) */ 1714 u_char clock_divn; /* Number of clock divisors */ 1715 u_long clock_khz; /* SCSI clock frequency in KHz */ 1716 1717 /*---------------------------------------------------------------- 1718 ** Start queue management. 1719 ** It is filled up by the host processor and accessed by the 1720 ** SCRIPTS processor in order to start SCSI commands. 1721 **---------------------------------------------------------------- 1722 */ 1723 u16 squeueput; /* Next free slot of the queue */ 1724 u16 actccbs; /* Number of allocated CCBs */ 1725 u16 queuedccbs; /* Number of CCBs in start queue*/ 1726 u16 queuedepth; /* Start queue depth */ 1727 1728 /*---------------------------------------------------------------- 1729 ** Timeout handler. 1730 **---------------------------------------------------------------- 1731 */ 1732 struct timer_list timer; /* Timer handler link header */ 1733 u_long lasttime; 1734 u_long settle_time; /* Resetting the SCSI BUS */ 1735 1736 /*---------------------------------------------------------------- 1737 ** Debugging and profiling. 1738 **---------------------------------------------------------------- 1739 */ 1740 struct ncr_reg regdump; /* Register dump */ 1741 u_long regtime; /* Time it has been done */ 1742 1743 /*---------------------------------------------------------------- 1744 ** Miscellaneous buffers accessed by the scripts-processor. 1745 ** They shall be DWORD aligned, because they may be read or 1746 ** written with a SCR_COPY script command. 1747 **---------------------------------------------------------------- 1748 */ 1749 u_char msgout[8]; /* Buffer for MESSAGE OUT */ 1750 u_char msgin [8]; /* Buffer for MESSAGE IN */ 1751 u32 lastmsg; /* Last SCSI message sent */ 1752 u_char scratch; /* Scratch for SCSI receive */ 1753 1754 /*---------------------------------------------------------------- 1755 ** Miscellaneous configuration and status parameters. 1756 **---------------------------------------------------------------- 1757 */ 1758 u_char disc; /* Diconnection allowed */ 1759 u_char scsi_mode; /* Current SCSI BUS mode */ 1760 u_char order; /* Tag order to use */ 1761 u_char verbose; /* Verbosity for this controller*/ 1762 int ncr_cache; /* Used for cache test at init. */ 1763 u_long p_ncb; /* BUS address of this NCB */ 1764 1765 /*---------------------------------------------------------------- 1766 ** Command completion handling. 1767 **---------------------------------------------------------------- 1768 */ 1769 #ifdef SCSI_NCR_CCB_DONE_SUPPORT 1770 struct ccb *(ccb_done[MAX_DONE]); 1771 int ccb_done_ic; 1772 #endif 1773 /*---------------------------------------------------------------- 1774 ** Fields that should be removed or changed. 1775 **---------------------------------------------------------------- 1776 */ 1777 struct ccb *ccb; /* Global CCB */ 1778 struct usrcmd user; /* Command from user */ 1779 volatile u_char release_stage; /* Synchronisation stage on release */ 1780 }; 1781 1782 #define NCB_SCRIPT_PHYS(np,lbl) (np->p_script + offsetof (struct script, lbl)) 1783 #define NCB_SCRIPTH_PHYS(np,lbl) (np->p_scripth + offsetof (struct scripth,lbl)) 1784 1785 /*========================================================== 1786 ** 1787 ** 1788 ** Script for NCR-Processor. 1789 ** 1790 ** Use ncr_script_fill() to create the variable parts. 1791 ** Use ncr_script_copy_and_bind() to make a copy and 1792 ** bind to physical addresses. 1793 ** 1794 ** 1795 **========================================================== 1796 ** 1797 ** We have to know the offsets of all labels before 1798 ** we reach them (for forward jumps). 1799 ** Therefore we declare a struct here. 1800 ** If you make changes inside the script, 1801 ** DONT FORGET TO CHANGE THE LENGTHS HERE! 1802 ** 1803 **---------------------------------------------------------- 1804 */ 1805 1806 /* 1807 ** For HP Zalon/53c720 systems, the Zalon interface 1808 ** between CPU and 53c720 does prefetches, which causes 1809 ** problems with self modifying scripts. The problem 1810 ** is overcome by calling a dummy subroutine after each 1811 ** modification, to force a refetch of the script on 1812 ** return from the subroutine. 1813 */ 1814 1815 #ifdef CONFIG_NCR53C8XX_PREFETCH 1816 #define PREFETCH_FLUSH_CNT 2 1817 #define PREFETCH_FLUSH SCR_CALL, PADDRH (wait_dma), 1818 #else 1819 #define PREFETCH_FLUSH_CNT 0 1820 #define PREFETCH_FLUSH 1821 #endif 1822 1823 /* 1824 ** Script fragments which are loaded into the on-chip RAM 1825 ** of 825A, 875 and 895 chips. 1826 */ 1827 struct script { 1828 ncrcmd start [ 5]; 1829 ncrcmd startpos [ 1]; 1830 ncrcmd select [ 6]; 1831 ncrcmd select2 [ 9 + PREFETCH_FLUSH_CNT]; 1832 ncrcmd loadpos [ 4]; 1833 ncrcmd send_ident [ 9]; 1834 ncrcmd prepare [ 6]; 1835 ncrcmd prepare2 [ 7]; 1836 ncrcmd command [ 6]; 1837 ncrcmd dispatch [ 32]; 1838 ncrcmd clrack [ 4]; 1839 ncrcmd no_data [ 17]; 1840 ncrcmd status [ 8]; 1841 ncrcmd msg_in [ 2]; 1842 ncrcmd msg_in2 [ 16]; 1843 ncrcmd msg_bad [ 4]; 1844 ncrcmd setmsg [ 7]; 1845 ncrcmd cleanup [ 6]; 1846 ncrcmd complete [ 9]; 1847 ncrcmd cleanup_ok [ 8 + PREFETCH_FLUSH_CNT]; 1848 ncrcmd cleanup0 [ 1]; 1849 #ifndef SCSI_NCR_CCB_DONE_SUPPORT 1850 ncrcmd signal [ 12]; 1851 #else 1852 ncrcmd signal [ 9]; 1853 ncrcmd done_pos [ 1]; 1854 ncrcmd done_plug [ 2]; 1855 ncrcmd done_end [ 7]; 1856 #endif 1857 ncrcmd save_dp [ 7]; 1858 ncrcmd restore_dp [ 5]; 1859 ncrcmd disconnect [ 10]; 1860 ncrcmd msg_out [ 9]; 1861 ncrcmd msg_out_done [ 7]; 1862 ncrcmd idle [ 2]; 1863 ncrcmd reselect [ 8]; 1864 ncrcmd reselected [ 8]; 1865 ncrcmd resel_dsa [ 6 + PREFETCH_FLUSH_CNT]; 1866 ncrcmd loadpos1 [ 4]; 1867 ncrcmd resel_lun [ 6]; 1868 ncrcmd resel_tag [ 6]; 1869 ncrcmd jump_to_nexus [ 4 + PREFETCH_FLUSH_CNT]; 1870 ncrcmd nexus_indirect [ 4]; 1871 ncrcmd resel_notag [ 4]; 1872 ncrcmd data_in [MAX_SCATTERL * 4]; 1873 ncrcmd data_in2 [ 4]; 1874 ncrcmd data_out [MAX_SCATTERL * 4]; 1875 ncrcmd data_out2 [ 4]; 1876 }; 1877 1878 /* 1879 ** Script fragments which stay in main memory for all chips. 1880 */ 1881 struct scripth { 1882 ncrcmd tryloop [MAX_START*2]; 1883 ncrcmd tryloop2 [ 2]; 1884 #ifdef SCSI_NCR_CCB_DONE_SUPPORT 1885 ncrcmd done_queue [MAX_DONE*5]; 1886 ncrcmd done_queue2 [ 2]; 1887 #endif 1888 ncrcmd select_no_atn [ 8]; 1889 ncrcmd cancel [ 4]; 1890 ncrcmd skip [ 9 + PREFETCH_FLUSH_CNT]; 1891 ncrcmd skip2 [ 19]; 1892 ncrcmd par_err_data_in [ 6]; 1893 ncrcmd par_err_other [ 4]; 1894 ncrcmd msg_reject [ 8]; 1895 ncrcmd msg_ign_residue [ 24]; 1896 ncrcmd msg_extended [ 10]; 1897 ncrcmd msg_ext_2 [ 10]; 1898 ncrcmd msg_wdtr [ 14]; 1899 ncrcmd send_wdtr [ 7]; 1900 ncrcmd msg_ext_3 [ 10]; 1901 ncrcmd msg_sdtr [ 14]; 1902 ncrcmd send_sdtr [ 7]; 1903 ncrcmd nego_bad_phase [ 4]; 1904 ncrcmd msg_out_abort [ 10]; 1905 ncrcmd hdata_in [MAX_SCATTERH * 4]; 1906 ncrcmd hdata_in2 [ 2]; 1907 ncrcmd hdata_out [MAX_SCATTERH * 4]; 1908 ncrcmd hdata_out2 [ 2]; 1909 ncrcmd reset [ 4]; 1910 ncrcmd aborttag [ 4]; 1911 ncrcmd abort [ 2]; 1912 ncrcmd abort_resel [ 20]; 1913 ncrcmd resend_ident [ 4]; 1914 ncrcmd clratn_go_on [ 3]; 1915 ncrcmd nxtdsp_go_on [ 1]; 1916 ncrcmd sdata_in [ 8]; 1917 ncrcmd data_io [ 18]; 1918 ncrcmd bad_identify [ 12]; 1919 ncrcmd bad_i_t_l [ 4]; 1920 ncrcmd bad_i_t_l_q [ 4]; 1921 ncrcmd bad_target [ 8]; 1922 ncrcmd bad_status [ 8]; 1923 ncrcmd start_ram [ 4 + PREFETCH_FLUSH_CNT]; 1924 ncrcmd start_ram0 [ 4]; 1925 ncrcmd sto_restart [ 5]; 1926 ncrcmd wait_dma [ 2]; 1927 ncrcmd snooptest [ 9]; 1928 ncrcmd snoopend [ 2]; 1929 }; 1930 1931 /*========================================================== 1932 ** 1933 ** 1934 ** Function headers. 1935 ** 1936 ** 1937 **========================================================== 1938 */ 1939 1940 static void ncr_alloc_ccb (struct ncb *np, u_char tn, u_char ln); 1941 static void ncr_complete (struct ncb *np, struct ccb *cp); 1942 static void ncr_exception (struct ncb *np); 1943 static void ncr_free_ccb (struct ncb *np, struct ccb *cp); 1944 static void ncr_init_ccb (struct ncb *np, struct ccb *cp); 1945 static void ncr_init_tcb (struct ncb *np, u_char tn); 1946 static struct lcb * ncr_alloc_lcb (struct ncb *np, u_char tn, u_char ln); 1947 static struct lcb * ncr_setup_lcb (struct ncb *np, struct scsi_device *sdev); 1948 static void ncr_getclock (struct ncb *np, int mult); 1949 static void ncr_selectclock (struct ncb *np, u_char scntl3); 1950 static struct ccb *ncr_get_ccb (struct ncb *np, struct scsi_cmnd *cmd); 1951 static void ncr_chip_reset (struct ncb *np, int delay); 1952 static void ncr_init (struct ncb *np, int reset, char * msg, u_long code); 1953 static int ncr_int_sbmc (struct ncb *np); 1954 static int ncr_int_par (struct ncb *np); 1955 static void ncr_int_ma (struct ncb *np); 1956 static void ncr_int_sir (struct ncb *np); 1957 static void ncr_int_sto (struct ncb *np); 1958 static void ncr_negotiate (struct ncb* np, struct tcb* tp); 1959 static int ncr_prepare_nego(struct ncb *np, struct ccb *cp, u_char *msgptr); 1960 1961 static void ncr_script_copy_and_bind 1962 (struct ncb *np, ncrcmd *src, ncrcmd *dst, int len); 1963 static void ncr_script_fill (struct script * scr, struct scripth * scripth); 1964 static int ncr_scatter (struct ncb *np, struct ccb *cp, struct scsi_cmnd *cmd); 1965 static void ncr_getsync (struct ncb *np, u_char sfac, u_char *fakp, u_char *scntl3p); 1966 static void ncr_setsync (struct ncb *np, struct ccb *cp, u_char scntl3, u_char sxfer); 1967 static void ncr_setup_tags (struct ncb *np, struct scsi_device *sdev); 1968 static void ncr_setwide (struct ncb *np, struct ccb *cp, u_char wide, u_char ack); 1969 static int ncr_snooptest (struct ncb *np); 1970 static void ncr_timeout (struct ncb *np); 1971 static void ncr_wakeup (struct ncb *np, u_long code); 1972 static void ncr_wakeup_done (struct ncb *np); 1973 static void ncr_start_next_ccb (struct ncb *np, struct lcb * lp, int maxn); 1974 static void ncr_put_start_queue(struct ncb *np, struct ccb *cp); 1975 1976 static void insert_into_waiting_list(struct ncb *np, struct scsi_cmnd *cmd); 1977 static struct scsi_cmnd *retrieve_from_waiting_list(int to_remove, struct ncb *np, struct scsi_cmnd *cmd); 1978 static void process_waiting_list(struct ncb *np, int sts); 1979 1980 #define remove_from_waiting_list(np, cmd) \ 1981 retrieve_from_waiting_list(1, (np), (cmd)) 1982 #define requeue_waiting_list(np) process_waiting_list((np), DID_OK) 1983 #define reset_waiting_list(np) process_waiting_list((np), DID_RESET) 1984 1985 static inline char *ncr_name (struct ncb *np) 1986 { 1987 return np->inst_name; 1988 } 1989 1990 1991 /*========================================================== 1992 ** 1993 ** 1994 ** Scripts for NCR-Processor. 1995 ** 1996 ** Use ncr_script_bind for binding to physical addresses. 1997 ** 1998 ** 1999 **========================================================== 2000 ** 2001 ** NADDR generates a reference to a field of the controller data. 2002 ** PADDR generates a reference to another part of the script. 2003 ** RADDR generates a reference to a script processor register. 2004 ** FADDR generates a reference to a script processor register 2005 ** with offset. 2006 ** 2007 **---------------------------------------------------------- 2008 */ 2009 2010 #define RELOC_SOFTC 0x40000000 2011 #define RELOC_LABEL 0x50000000 2012 #define RELOC_REGISTER 0x60000000 2013 #if 0 2014 #define RELOC_KVAR 0x70000000 2015 #endif 2016 #define RELOC_LABELH 0x80000000 2017 #define RELOC_MASK 0xf0000000 2018 2019 #define NADDR(label) (RELOC_SOFTC | offsetof(struct ncb, label)) 2020 #define PADDR(label) (RELOC_LABEL | offsetof(struct script, label)) 2021 #define PADDRH(label) (RELOC_LABELH | offsetof(struct scripth, label)) 2022 #define RADDR(label) (RELOC_REGISTER | REG(label)) 2023 #define FADDR(label,ofs)(RELOC_REGISTER | ((REG(label))+(ofs))) 2024 #if 0 2025 #define KVAR(which) (RELOC_KVAR | (which)) 2026 #endif 2027 2028 #if 0 2029 #define SCRIPT_KVAR_JIFFIES (0) 2030 #define SCRIPT_KVAR_FIRST SCRIPT_KVAR_JIFFIES 2031 #define SCRIPT_KVAR_LAST SCRIPT_KVAR_JIFFIES 2032 /* 2033 * Kernel variables referenced in the scripts. 2034 * THESE MUST ALL BE ALIGNED TO A 4-BYTE BOUNDARY. 2035 */ 2036 static void *script_kvars[] __initdata = 2037 { (void *)&jiffies }; 2038 #endif 2039 2040 static struct script script0 __initdata = { 2041 /*--------------------------< START >-----------------------*/ { 2042 /* 2043 ** This NOP will be patched with LED ON 2044 ** SCR_REG_REG (gpreg, SCR_AND, 0xfe) 2045 */ 2046 SCR_NO_OP, 2047 0, 2048 /* 2049 ** Clear SIGP. 2050 */ 2051 SCR_FROM_REG (ctest2), 2052 0, 2053 /* 2054 ** Then jump to a certain point in tryloop. 2055 ** Due to the lack of indirect addressing the code 2056 ** is self modifying here. 2057 */ 2058 SCR_JUMP, 2059 }/*-------------------------< STARTPOS >--------------------*/,{ 2060 PADDRH(tryloop), 2061 2062 }/*-------------------------< SELECT >----------------------*/,{ 2063 /* 2064 ** DSA contains the address of a scheduled 2065 ** data structure. 2066 ** 2067 ** SCRATCHA contains the address of the script, 2068 ** which starts the next entry. 2069 ** 2070 ** Set Initiator mode. 2071 ** 2072 ** (Target mode is left as an exercise for the reader) 2073 */ 2074 2075 SCR_CLR (SCR_TRG), 2076 0, 2077 SCR_LOAD_REG (HS_REG, HS_SELECTING), 2078 0, 2079 2080 /* 2081 ** And try to select this target. 2082 */ 2083 SCR_SEL_TBL_ATN ^ offsetof (struct dsb, select), 2084 PADDR (reselect), 2085 2086 }/*-------------------------< SELECT2 >----------------------*/,{ 2087 /* 2088 ** Now there are 4 possibilities: 2089 ** 2090 ** (1) The ncr loses arbitration. 2091 ** This is ok, because it will try again, 2092 ** when the bus becomes idle. 2093 ** (But beware of the timeout function!) 2094 ** 2095 ** (2) The ncr is reselected. 2096 ** Then the script processor takes the jump 2097 ** to the RESELECT label. 2098 ** 2099 ** (3) The ncr wins arbitration. 2100 ** Then it will execute SCRIPTS instruction until 2101 ** the next instruction that checks SCSI phase. 2102 ** Then will stop and wait for selection to be 2103 ** complete or selection time-out to occur. 2104 ** As a result the SCRIPTS instructions until 2105 ** LOADPOS + 2 should be executed in parallel with 2106 ** the SCSI core performing selection. 2107 */ 2108 2109 /* 2110 ** The MESSAGE_REJECT problem seems to be due to a selection 2111 ** timing problem. 2112 ** Wait immediately for the selection to complete. 2113 ** (2.5x behaves so) 2114 */ 2115 SCR_JUMPR ^ IFFALSE (WHEN (SCR_MSG_OUT)), 2116 0, 2117 2118 /* 2119 ** Next time use the next slot. 2120 */ 2121 SCR_COPY (4), 2122 RADDR (temp), 2123 PADDR (startpos), 2124 /* 2125 ** The ncr doesn't have an indirect load 2126 ** or store command. So we have to 2127 ** copy part of the control block to a 2128 ** fixed place, where we can access it. 2129 ** 2130 ** We patch the address part of a 2131 ** COPY command with the DSA-register. 2132 */ 2133 SCR_COPY_F (4), 2134 RADDR (dsa), 2135 PADDR (loadpos), 2136 /* 2137 ** Flush script prefetch if required 2138 */ 2139 PREFETCH_FLUSH 2140 /* 2141 ** then we do the actual copy. 2142 */ 2143 SCR_COPY (sizeof (struct head)), 2144 /* 2145 ** continued after the next label ... 2146 */ 2147 }/*-------------------------< LOADPOS >---------------------*/,{ 2148 0, 2149 NADDR (header), 2150 /* 2151 ** Wait for the next phase or the selection 2152 ** to complete or time-out. 2153 */ 2154 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_OUT)), 2155 PADDR (prepare), 2156 2157 }/*-------------------------< SEND_IDENT >----------------------*/,{ 2158 /* 2159 ** Selection complete. 2160 ** Send the IDENTIFY and SIMPLE_TAG messages 2161 ** (and the EXTENDED_SDTR message) 2162 */ 2163 SCR_MOVE_TBL ^ SCR_MSG_OUT, 2164 offsetof (struct dsb, smsg), 2165 SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_OUT)), 2166 PADDRH (resend_ident), 2167 SCR_LOAD_REG (scratcha, 0x80), 2168 0, 2169 SCR_COPY (1), 2170 RADDR (scratcha), 2171 NADDR (lastmsg), 2172 }/*-------------------------< PREPARE >----------------------*/,{ 2173 /* 2174 ** load the savep (saved pointer) into 2175 ** the TEMP register (actual pointer) 2176 */ 2177 SCR_COPY (4), 2178 NADDR (header.savep), 2179 RADDR (temp), 2180 /* 2181 ** Initialize the status registers 2182 */ 2183 SCR_COPY (4), 2184 NADDR (header.status), 2185 RADDR (scr0), 2186 }/*-------------------------< PREPARE2 >---------------------*/,{ 2187 /* 2188 ** Initialize the msgout buffer with a NOOP message. 2189 */ 2190 SCR_LOAD_REG (scratcha, NOP), 2191 0, 2192 SCR_COPY (1), 2193 RADDR (scratcha), 2194 NADDR (msgout), 2195 #if 0 2196 SCR_COPY (1), 2197 RADDR (scratcha), 2198 NADDR (msgin), 2199 #endif 2200 /* 2201 ** Anticipate the COMMAND phase. 2202 ** This is the normal case for initial selection. 2203 */ 2204 SCR_JUMP ^ IFFALSE (WHEN (SCR_COMMAND)), 2205 PADDR (dispatch), 2206 2207 }/*-------------------------< COMMAND >--------------------*/,{ 2208 /* 2209 ** ... and send the command 2210 */ 2211 SCR_MOVE_TBL ^ SCR_COMMAND, 2212 offsetof (struct dsb, cmd), 2213 /* 2214 ** If status is still HS_NEGOTIATE, negotiation failed. 2215 ** We check this here, since we want to do that 2216 ** only once. 2217 */ 2218 SCR_FROM_REG (HS_REG), 2219 0, 2220 SCR_INT ^ IFTRUE (DATA (HS_NEGOTIATE)), 2221 SIR_NEGO_FAILED, 2222 2223 }/*-----------------------< DISPATCH >----------------------*/,{ 2224 /* 2225 ** MSG_IN is the only phase that shall be 2226 ** entered at least once for each (re)selection. 2227 ** So we test it first. 2228 */ 2229 SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_IN)), 2230 PADDR (msg_in), 2231 2232 SCR_RETURN ^ IFTRUE (IF (SCR_DATA_OUT)), 2233 0, 2234 /* 2235 ** DEL 397 - 53C875 Rev 3 - Part Number 609-0392410 - ITEM 4. 2236 ** Possible data corruption during Memory Write and Invalidate. 2237 ** This work-around resets the addressing logic prior to the 2238 ** start of the first MOVE of a DATA IN phase. 2239 ** (See Documentation/scsi/ncr53c8xx.txt for more information) 2240 */ 2241 SCR_JUMPR ^ IFFALSE (IF (SCR_DATA_IN)), 2242 20, 2243 SCR_COPY (4), 2244 RADDR (scratcha), 2245 RADDR (scratcha), 2246 SCR_RETURN, 2247 0, 2248 SCR_JUMP ^ IFTRUE (IF (SCR_STATUS)), 2249 PADDR (status), 2250 SCR_JUMP ^ IFTRUE (IF (SCR_COMMAND)), 2251 PADDR (command), 2252 SCR_JUMP ^ IFTRUE (IF (SCR_MSG_OUT)), 2253 PADDR (msg_out), 2254 /* 2255 ** Discard one illegal phase byte, if required. 2256 */ 2257 SCR_LOAD_REG (scratcha, XE_BAD_PHASE), 2258 0, 2259 SCR_COPY (1), 2260 RADDR (scratcha), 2261 NADDR (xerr_st), 2262 SCR_JUMPR ^ IFFALSE (IF (SCR_ILG_OUT)), 2263 8, 2264 SCR_MOVE_ABS (1) ^ SCR_ILG_OUT, 2265 NADDR (scratch), 2266 SCR_JUMPR ^ IFFALSE (IF (SCR_ILG_IN)), 2267 8, 2268 SCR_MOVE_ABS (1) ^ SCR_ILG_IN, 2269 NADDR (scratch), 2270 SCR_JUMP, 2271 PADDR (dispatch), 2272 2273 }/*-------------------------< CLRACK >----------------------*/,{ 2274 /* 2275 ** Terminate possible pending message phase. 2276 */ 2277 SCR_CLR (SCR_ACK), 2278 0, 2279 SCR_JUMP, 2280 PADDR (dispatch), 2281 2282 }/*-------------------------< NO_DATA >--------------------*/,{ 2283 /* 2284 ** The target wants to tranfer too much data 2285 ** or in the wrong direction. 2286 ** Remember that in extended error. 2287 */ 2288 SCR_LOAD_REG (scratcha, XE_EXTRA_DATA), 2289 0, 2290 SCR_COPY (1), 2291 RADDR (scratcha), 2292 NADDR (xerr_st), 2293 /* 2294 ** Discard one data byte, if required. 2295 */ 2296 SCR_JUMPR ^ IFFALSE (WHEN (SCR_DATA_OUT)), 2297 8, 2298 SCR_MOVE_ABS (1) ^ SCR_DATA_OUT, 2299 NADDR (scratch), 2300 SCR_JUMPR ^ IFFALSE (IF (SCR_DATA_IN)), 2301 8, 2302 SCR_MOVE_ABS (1) ^ SCR_DATA_IN, 2303 NADDR (scratch), 2304 /* 2305 ** .. and repeat as required. 2306 */ 2307 SCR_CALL, 2308 PADDR (dispatch), 2309 SCR_JUMP, 2310 PADDR (no_data), 2311 2312 }/*-------------------------< STATUS >--------------------*/,{ 2313 /* 2314 ** get the status 2315 */ 2316 SCR_MOVE_ABS (1) ^ SCR_STATUS, 2317 NADDR (scratch), 2318 /* 2319 ** save status to scsi_status. 2320 ** mark as complete. 2321 */ 2322 SCR_TO_REG (SS_REG), 2323 0, 2324 SCR_LOAD_REG (HS_REG, HS_COMPLETE), 2325 0, 2326 SCR_JUMP, 2327 PADDR (dispatch), 2328 }/*-------------------------< MSG_IN >--------------------*/,{ 2329 /* 2330 ** Get the first byte of the message 2331 ** and save it to SCRATCHA. 2332 ** 2333 ** The script processor doesn't negate the 2334 ** ACK signal after this transfer. 2335 */ 2336 SCR_MOVE_ABS (1) ^ SCR_MSG_IN, 2337 NADDR (msgin[0]), 2338 }/*-------------------------< MSG_IN2 >--------------------*/,{ 2339 /* 2340 ** Handle this message. 2341 */ 2342 SCR_JUMP ^ IFTRUE (DATA (COMMAND_COMPLETE)), 2343 PADDR (complete), 2344 SCR_JUMP ^ IFTRUE (DATA (DISCONNECT)), 2345 PADDR (disconnect), 2346 SCR_JUMP ^ IFTRUE (DATA (SAVE_POINTERS)), 2347 PADDR (save_dp), 2348 SCR_JUMP ^ IFTRUE (DATA (RESTORE_POINTERS)), 2349 PADDR (restore_dp), 2350 SCR_JUMP ^ IFTRUE (DATA (EXTENDED_MESSAGE)), 2351 PADDRH (msg_extended), 2352 SCR_JUMP ^ IFTRUE (DATA (NOP)), 2353 PADDR (clrack), 2354 SCR_JUMP ^ IFTRUE (DATA (MESSAGE_REJECT)), 2355 PADDRH (msg_reject), 2356 SCR_JUMP ^ IFTRUE (DATA (IGNORE_WIDE_RESIDUE)), 2357 PADDRH (msg_ign_residue), 2358 /* 2359 ** Rest of the messages left as 2360 ** an exercise ... 2361 ** 2362 ** Unimplemented messages: 2363 ** fall through to MSG_BAD. 2364 */ 2365 }/*-------------------------< MSG_BAD >------------------*/,{ 2366 /* 2367 ** unimplemented message - reject it. 2368 */ 2369 SCR_INT, 2370 SIR_REJECT_SENT, 2371 SCR_LOAD_REG (scratcha, MESSAGE_REJECT), 2372 0, 2373 }/*-------------------------< SETMSG >----------------------*/,{ 2374 SCR_COPY (1), 2375 RADDR (scratcha), 2376 NADDR (msgout), 2377 SCR_SET (SCR_ATN), 2378 0, 2379 SCR_JUMP, 2380 PADDR (clrack), 2381 }/*-------------------------< CLEANUP >-------------------*/,{ 2382 /* 2383 ** dsa: Pointer to ccb 2384 ** or xxxxxxFF (no ccb) 2385 ** 2386 ** HS_REG: Host-Status (<>0!) 2387 */ 2388 SCR_FROM_REG (dsa), 2389 0, 2390 SCR_JUMP ^ IFTRUE (DATA (0xff)), 2391 PADDR (start), 2392 /* 2393 ** dsa is valid. 2394 ** complete the cleanup. 2395 */ 2396 SCR_JUMP, 2397 PADDR (cleanup_ok), 2398 2399 }/*-------------------------< COMPLETE >-----------------*/,{ 2400 /* 2401 ** Complete message. 2402 ** 2403 ** Copy TEMP register to LASTP in header. 2404 */ 2405 SCR_COPY (4), 2406 RADDR (temp), 2407 NADDR (header.lastp), 2408 /* 2409 ** When we terminate the cycle by clearing ACK, 2410 ** the target may disconnect immediately. 2411 ** 2412 ** We don't want to be told of an 2413 ** "unexpected disconnect", 2414 ** so we disable this feature. 2415 */ 2416 SCR_REG_REG (scntl2, SCR_AND, 0x7f), 2417 0, 2418 /* 2419 ** Terminate cycle ... 2420 */ 2421 SCR_CLR (SCR_ACK|SCR_ATN), 2422 0, 2423 /* 2424 ** ... and wait for the disconnect. 2425 */ 2426 SCR_WAIT_DISC, 2427 0, 2428 }/*-------------------------< CLEANUP_OK >----------------*/,{ 2429 /* 2430 ** Save host status to header. 2431 */ 2432 SCR_COPY (4), 2433 RADDR (scr0), 2434 NADDR (header.status), 2435 /* 2436 ** and copy back the header to the ccb. 2437 */ 2438 SCR_COPY_F (4), 2439 RADDR (dsa), 2440 PADDR (cleanup0), 2441 /* 2442 ** Flush script prefetch if required 2443 */ 2444 PREFETCH_FLUSH 2445 SCR_COPY (sizeof (struct head)), 2446 NADDR (header), 2447 }/*-------------------------< CLEANUP0 >--------------------*/,{ 2448 0, 2449 }/*-------------------------< SIGNAL >----------------------*/,{ 2450 /* 2451 ** if job not completed ... 2452 */ 2453 SCR_FROM_REG (HS_REG), 2454 0, 2455 /* 2456 ** ... start the next command. 2457 */ 2458 SCR_JUMP ^ IFTRUE (MASK (0, (HS_DONEMASK|HS_SKIPMASK))), 2459 PADDR(start), 2460 /* 2461 ** If command resulted in not GOOD status, 2462 ** call the C code if needed. 2463 */ 2464 SCR_FROM_REG (SS_REG), 2465 0, 2466 SCR_CALL ^ IFFALSE (DATA (S_GOOD)), 2467 PADDRH (bad_status), 2468 2469 #ifndef SCSI_NCR_CCB_DONE_SUPPORT 2470 2471 /* 2472 ** ... signal completion to the host 2473 */ 2474 SCR_INT, 2475 SIR_INTFLY, 2476 /* 2477 ** Auf zu neuen Schandtaten! 2478 */ 2479 SCR_JUMP, 2480 PADDR(start), 2481 2482 #else /* defined SCSI_NCR_CCB_DONE_SUPPORT */ 2483 2484 /* 2485 ** ... signal completion to the host 2486 */ 2487 SCR_JUMP, 2488 }/*------------------------< DONE_POS >---------------------*/,{ 2489 PADDRH (done_queue), 2490 }/*------------------------< DONE_PLUG >--------------------*/,{ 2491 SCR_INT, 2492 SIR_DONE_OVERFLOW, 2493 }/*------------------------< DONE_END >---------------------*/,{ 2494 SCR_INT, 2495 SIR_INTFLY, 2496 SCR_COPY (4), 2497 RADDR (temp), 2498 PADDR (done_pos), 2499 SCR_JUMP, 2500 PADDR (start), 2501 2502 #endif /* SCSI_NCR_CCB_DONE_SUPPORT */ 2503 2504 }/*-------------------------< SAVE_DP >------------------*/,{ 2505 /* 2506 ** SAVE_DP message: 2507 ** Copy TEMP register to SAVEP in header. 2508 */ 2509 SCR_COPY (4), 2510 RADDR (temp), 2511 NADDR (header.savep), 2512 SCR_CLR (SCR_ACK), 2513 0, 2514 SCR_JUMP, 2515 PADDR (dispatch), 2516 }/*-------------------------< RESTORE_DP >---------------*/,{ 2517 /* 2518 ** RESTORE_DP message: 2519 ** Copy SAVEP in header to TEMP register. 2520 */ 2521 SCR_COPY (4), 2522 NADDR (header.savep), 2523 RADDR (temp), 2524 SCR_JUMP, 2525 PADDR (clrack), 2526 2527 }/*-------------------------< DISCONNECT >---------------*/,{ 2528 /* 2529 ** DISCONNECTing ... 2530 ** 2531 ** disable the "unexpected disconnect" feature, 2532 ** and remove the ACK signal. 2533 */ 2534 SCR_REG_REG (scntl2, SCR_AND, 0x7f), 2535 0, 2536 SCR_CLR (SCR_ACK|SCR_ATN), 2537 0, 2538 /* 2539 ** Wait for the disconnect. 2540 */ 2541 SCR_WAIT_DISC, 2542 0, 2543 /* 2544 ** Status is: DISCONNECTED. 2545 */ 2546 SCR_LOAD_REG (HS_REG, HS_DISCONNECT), 2547 0, 2548 SCR_JUMP, 2549 PADDR (cleanup_ok), 2550 2551 }/*-------------------------< MSG_OUT >-------------------*/,{ 2552 /* 2553 ** The target requests a message. 2554 */ 2555 SCR_MOVE_ABS (1) ^ SCR_MSG_OUT, 2556 NADDR (msgout), 2557 SCR_COPY (1), 2558 NADDR (msgout), 2559 NADDR (lastmsg), 2560 /* 2561 ** If it was no ABORT message ... 2562 */ 2563 SCR_JUMP ^ IFTRUE (DATA (ABORT_TASK_SET)), 2564 PADDRH (msg_out_abort), 2565 /* 2566 ** ... wait for the next phase 2567 ** if it's a message out, send it again, ... 2568 */ 2569 SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_OUT)), 2570 PADDR (msg_out), 2571 }/*-------------------------< MSG_OUT_DONE >--------------*/,{ 2572 /* 2573 ** ... else clear the message ... 2574 */ 2575 SCR_LOAD_REG (scratcha, NOP), 2576 0, 2577 SCR_COPY (4), 2578 RADDR (scratcha), 2579 NADDR (msgout), 2580 /* 2581 ** ... and process the next phase 2582 */ 2583 SCR_JUMP, 2584 PADDR (dispatch), 2585 }/*-------------------------< IDLE >------------------------*/,{ 2586 /* 2587 ** Nothing to do? 2588 ** Wait for reselect. 2589 ** This NOP will be patched with LED OFF 2590 ** SCR_REG_REG (gpreg, SCR_OR, 0x01) 2591 */ 2592 SCR_NO_OP, 2593 0, 2594 }/*-------------------------< RESELECT >--------------------*/,{ 2595 /* 2596 ** make the DSA invalid. 2597 */ 2598 SCR_LOAD_REG (dsa, 0xff), 2599 0, 2600 SCR_CLR (SCR_TRG), 2601 0, 2602 SCR_LOAD_REG (HS_REG, HS_IN_RESELECT), 2603 0, 2604 /* 2605 ** Sleep waiting for a reselection. 2606 ** If SIGP is set, special treatment. 2607 ** 2608 ** Zu allem bereit .. 2609 */ 2610 SCR_WAIT_RESEL, 2611 PADDR(start), 2612 }/*-------------------------< RESELECTED >------------------*/,{ 2613 /* 2614 ** This NOP will be patched with LED ON 2615 ** SCR_REG_REG (gpreg, SCR_AND, 0xfe) 2616 */ 2617 SCR_NO_OP, 2618 0, 2619 /* 2620 ** ... zu nichts zu gebrauchen ? 2621 ** 2622 ** load the target id into the SFBR 2623 ** and jump to the control block. 2624 ** 2625 ** Look at the declarations of 2626 ** - struct ncb 2627 ** - struct tcb 2628 ** - struct lcb 2629 ** - struct ccb 2630 ** to understand what's going on. 2631 */ 2632 SCR_REG_SFBR (ssid, SCR_AND, 0x8F), 2633 0, 2634 SCR_TO_REG (sdid), 2635 0, 2636 SCR_JUMP, 2637 NADDR (jump_tcb), 2638 2639 }/*-------------------------< RESEL_DSA >-------------------*/,{ 2640 /* 2641 ** Ack the IDENTIFY or TAG previously received. 2642 */ 2643 SCR_CLR (SCR_ACK), 2644 0, 2645 /* 2646 ** The ncr doesn't have an indirect load 2647 ** or store command. So we have to 2648 ** copy part of the control block to a 2649 ** fixed place, where we can access it. 2650 ** 2651 ** We patch the address part of a 2652 ** COPY command with the DSA-register. 2653 */ 2654 SCR_COPY_F (4), 2655 RADDR (dsa), 2656 PADDR (loadpos1), 2657 /* 2658 ** Flush script prefetch if required 2659 */ 2660 PREFETCH_FLUSH 2661 /* 2662 ** then we do the actual copy. 2663 */ 2664 SCR_COPY (sizeof (struct head)), 2665 /* 2666 ** continued after the next label ... 2667 */ 2668 2669 }/*-------------------------< LOADPOS1 >-------------------*/,{ 2670 0, 2671 NADDR (header), 2672 /* 2673 ** The DSA contains the data structure address. 2674 */ 2675 SCR_JUMP, 2676 PADDR (prepare), 2677 2678 }/*-------------------------< RESEL_LUN >-------------------*/,{ 2679 /* 2680 ** come back to this point 2681 ** to get an IDENTIFY message 2682 ** Wait for a msg_in phase. 2683 */ 2684 SCR_INT ^ IFFALSE (WHEN (SCR_MSG_IN)), 2685 SIR_RESEL_NO_MSG_IN, 2686 /* 2687 ** message phase. 2688 ** Read the data directly from the BUS DATA lines. 2689 ** This helps to support very old SCSI devices that 2690 ** may reselect without sending an IDENTIFY. 2691 */ 2692 SCR_FROM_REG (sbdl), 2693 0, 2694 /* 2695 ** It should be an Identify message. 2696 */ 2697 SCR_RETURN, 2698 0, 2699 }/*-------------------------< RESEL_TAG >-------------------*/,{ 2700 /* 2701 ** Read IDENTIFY + SIMPLE + TAG using a single MOVE. 2702 ** Agressive optimization, is'nt it? 2703 ** No need to test the SIMPLE TAG message, since the 2704 ** driver only supports conformant devices for tags. ;-) 2705 */ 2706 SCR_MOVE_ABS (3) ^ SCR_MSG_IN, 2707 NADDR (msgin), 2708 /* 2709 ** Read the TAG from the SIDL. 2710 ** Still an aggressive optimization. ;-) 2711 ** Compute the CCB indirect jump address which 2712 ** is (#TAG*2 & 0xfc) due to tag numbering using 2713 ** 1,3,5..MAXTAGS*2+1 actual values. 2714 */ 2715 SCR_REG_SFBR (sidl, SCR_SHL, 0), 2716 0, 2717 SCR_SFBR_REG (temp, SCR_AND, 0xfc), 2718 0, 2719 }/*-------------------------< JUMP_TO_NEXUS >-------------------*/,{ 2720 SCR_COPY_F (4), 2721 RADDR (temp), 2722 PADDR (nexus_indirect), 2723 /* 2724 ** Flush script prefetch if required 2725 */ 2726 PREFETCH_FLUSH 2727 SCR_COPY (4), 2728 }/*-------------------------< NEXUS_INDIRECT >-------------------*/,{ 2729 0, 2730 RADDR (temp), 2731 SCR_RETURN, 2732 0, 2733 }/*-------------------------< RESEL_NOTAG >-------------------*/,{ 2734 /* 2735 ** No tag expected. 2736 ** Read an throw away the IDENTIFY. 2737 */ 2738 SCR_MOVE_ABS (1) ^ SCR_MSG_IN, 2739 NADDR (msgin), 2740 SCR_JUMP, 2741 PADDR (jump_to_nexus), 2742 }/*-------------------------< DATA_IN >--------------------*/,{ 2743 /* 2744 ** Because the size depends on the 2745 ** #define MAX_SCATTERL parameter, 2746 ** it is filled in at runtime. 2747 ** 2748 ** ##===========< i=0; i<MAX_SCATTERL >========= 2749 ** || SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN)), 2750 ** || PADDR (dispatch), 2751 ** || SCR_MOVE_TBL ^ SCR_DATA_IN, 2752 ** || offsetof (struct dsb, data[ i]), 2753 ** ##========================================== 2754 ** 2755 **--------------------------------------------------------- 2756 */ 2757 0 2758 }/*-------------------------< DATA_IN2 >-------------------*/,{ 2759 SCR_CALL, 2760 PADDR (dispatch), 2761 SCR_JUMP, 2762 PADDR (no_data), 2763 }/*-------------------------< DATA_OUT >--------------------*/,{ 2764 /* 2765 ** Because the size depends on the 2766 ** #define MAX_SCATTERL parameter, 2767 ** it is filled in at runtime. 2768 ** 2769 ** ##===========< i=0; i<MAX_SCATTERL >========= 2770 ** || SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_OUT)), 2771 ** || PADDR (dispatch), 2772 ** || SCR_MOVE_TBL ^ SCR_DATA_OUT, 2773 ** || offsetof (struct dsb, data[ i]), 2774 ** ##========================================== 2775 ** 2776 **--------------------------------------------------------- 2777 */ 2778 0 2779 }/*-------------------------< DATA_OUT2 >-------------------*/,{ 2780 SCR_CALL, 2781 PADDR (dispatch), 2782 SCR_JUMP, 2783 PADDR (no_data), 2784 }/*--------------------------------------------------------*/ 2785 }; 2786 2787 static struct scripth scripth0 __initdata = { 2788 /*-------------------------< TRYLOOP >---------------------*/{ 2789 /* 2790 ** Start the next entry. 2791 ** Called addresses point to the launch script in the CCB. 2792 ** They are patched by the main processor. 2793 ** 2794 ** Because the size depends on the 2795 ** #define MAX_START parameter, it is filled 2796 ** in at runtime. 2797 ** 2798 **----------------------------------------------------------- 2799 ** 2800 ** ##===========< I=0; i<MAX_START >=========== 2801 ** || SCR_CALL, 2802 ** || PADDR (idle), 2803 ** ##========================================== 2804 ** 2805 **----------------------------------------------------------- 2806 */ 2807 0 2808 }/*------------------------< TRYLOOP2 >---------------------*/,{ 2809 SCR_JUMP, 2810 PADDRH(tryloop), 2811 2812 #ifdef SCSI_NCR_CCB_DONE_SUPPORT 2813 2814 }/*------------------------< DONE_QUEUE >-------------------*/,{ 2815 /* 2816 ** Copy the CCB address to the next done entry. 2817 ** Because the size depends on the 2818 ** #define MAX_DONE parameter, it is filled 2819 ** in at runtime. 2820 ** 2821 **----------------------------------------------------------- 2822 ** 2823 ** ##===========< I=0; i<MAX_DONE >=========== 2824 ** || SCR_COPY (sizeof(struct ccb *), 2825 ** || NADDR (header.cp), 2826 ** || NADDR (ccb_done[i]), 2827 ** || SCR_CALL, 2828 ** || PADDR (done_end), 2829 ** ##========================================== 2830 ** 2831 **----------------------------------------------------------- 2832 */ 2833 0 2834 }/*------------------------< DONE_QUEUE2 >------------------*/,{ 2835 SCR_JUMP, 2836 PADDRH (done_queue), 2837 2838 #endif /* SCSI_NCR_CCB_DONE_SUPPORT */ 2839 }/*------------------------< SELECT_NO_ATN >-----------------*/,{ 2840 /* 2841 ** Set Initiator mode. 2842 ** And try to select this target without ATN. 2843 */ 2844 2845 SCR_CLR (SCR_TRG), 2846 0, 2847 SCR_LOAD_REG (HS_REG, HS_SELECTING), 2848 0, 2849 SCR_SEL_TBL ^ offsetof (struct dsb, select), 2850 PADDR (reselect), 2851 SCR_JUMP, 2852 PADDR (select2), 2853 2854 }/*-------------------------< CANCEL >------------------------*/,{ 2855 2856 SCR_LOAD_REG (scratcha, HS_ABORTED), 2857 0, 2858 SCR_JUMPR, 2859 8, 2860 }/*-------------------------< SKIP >------------------------*/,{ 2861 SCR_LOAD_REG (scratcha, 0), 2862 0, 2863 /* 2864 ** This entry has been canceled. 2865 ** Next time use the next slot. 2866 */ 2867 SCR_COPY (4), 2868 RADDR (temp), 2869 PADDR (startpos), 2870 /* 2871 ** The ncr doesn't have an indirect load 2872 ** or store command. So we have to 2873 ** copy part of the control block to a 2874 ** fixed place, where we can access it. 2875 ** 2876 ** We patch the address part of a 2877 ** COPY command with the DSA-register. 2878 */ 2879 SCR_COPY_F (4), 2880 RADDR (dsa), 2881 PADDRH (skip2), 2882 /* 2883 ** Flush script prefetch if required 2884 */ 2885 PREFETCH_FLUSH 2886 /* 2887 ** then we do the actual copy. 2888 */ 2889 SCR_COPY (sizeof (struct head)), 2890 /* 2891 ** continued after the next label ... 2892 */ 2893 }/*-------------------------< SKIP2 >---------------------*/,{ 2894 0, 2895 NADDR (header), 2896 /* 2897 ** Initialize the status registers 2898 */ 2899 SCR_COPY (4), 2900 NADDR (header.status), 2901 RADDR (scr0), 2902 /* 2903 ** Force host status. 2904 */ 2905 SCR_FROM_REG (scratcha), 2906 0, 2907 SCR_JUMPR ^ IFFALSE (MASK (0, HS_DONEMASK)), 2908 16, 2909 SCR_REG_REG (HS_REG, SCR_OR, HS_SKIPMASK), 2910 0, 2911 SCR_JUMPR, 2912 8, 2913 SCR_TO_REG (HS_REG), 2914 0, 2915 SCR_LOAD_REG (SS_REG, S_GOOD), 2916 0, 2917 SCR_JUMP, 2918 PADDR (cleanup_ok), 2919 2920 },/*-------------------------< PAR_ERR_DATA_IN >---------------*/{ 2921 /* 2922 ** Ignore all data in byte, until next phase 2923 */ 2924 SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_IN)), 2925 PADDRH (par_err_other), 2926 SCR_MOVE_ABS (1) ^ SCR_DATA_IN, 2927 NADDR (scratch), 2928 SCR_JUMPR, 2929 -24, 2930 },/*-------------------------< PAR_ERR_OTHER >------------------*/{ 2931 /* 2932 ** count it. 2933 */ 2934 SCR_REG_REG (PS_REG, SCR_ADD, 0x01), 2935 0, 2936 /* 2937 ** jump to dispatcher. 2938 */ 2939 SCR_JUMP, 2940 PADDR (dispatch), 2941 }/*-------------------------< MSG_REJECT >---------------*/,{ 2942 /* 2943 ** If a negotiation was in progress, 2944 ** negotiation failed. 2945 ** Otherwise, let the C code print 2946 ** some message. 2947 */ 2948 SCR_FROM_REG (HS_REG), 2949 0, 2950 SCR_INT ^ IFFALSE (DATA (HS_NEGOTIATE)), 2951 SIR_REJECT_RECEIVED, 2952 SCR_INT ^ IFTRUE (DATA (HS_NEGOTIATE)), 2953 SIR_NEGO_FAILED, 2954 SCR_JUMP, 2955 PADDR (clrack), 2956 2957 }/*-------------------------< MSG_IGN_RESIDUE >----------*/,{ 2958 /* 2959 ** Terminate cycle 2960 */ 2961 SCR_CLR (SCR_ACK), 2962 0, 2963 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)), 2964 PADDR (dispatch), 2965 /* 2966 ** get residue size. 2967 */ 2968 SCR_MOVE_ABS (1) ^ SCR_MSG_IN, 2969 NADDR (msgin[1]), 2970 /* 2971 ** Size is 0 .. ignore message. 2972 */ 2973 SCR_JUMP ^ IFTRUE (DATA (0)), 2974 PADDR (clrack), 2975 /* 2976 ** Size is not 1 .. have to interrupt. 2977 */ 2978 SCR_JUMPR ^ IFFALSE (DATA (1)), 2979 40, 2980 /* 2981 ** Check for residue byte in swide register 2982 */ 2983 SCR_FROM_REG (scntl2), 2984 0, 2985 SCR_JUMPR ^ IFFALSE (MASK (WSR, WSR)), 2986 16, 2987 /* 2988 ** There IS data in the swide register. 2989 ** Discard it. 2990 */ 2991 SCR_REG_REG (scntl2, SCR_OR, WSR), 2992 0, 2993 SCR_JUMP, 2994 PADDR (clrack), 2995 /* 2996 ** Load again the size to the sfbr register. 2997 */ 2998 SCR_FROM_REG (scratcha), 2999 0, 3000 SCR_INT, 3001 SIR_IGN_RESIDUE, 3002 SCR_JUMP, 3003 PADDR (clrack), 3004 3005 }/*-------------------------< MSG_EXTENDED >-------------*/,{ 3006 /* 3007 ** Terminate cycle 3008 */ 3009 SCR_CLR (SCR_ACK), 3010 0, 3011 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)), 3012 PADDR (dispatch), 3013 /* 3014 ** get length. 3015 */ 3016 SCR_MOVE_ABS (1) ^ SCR_MSG_IN, 3017 NADDR (msgin[1]), 3018 /* 3019 */ 3020 SCR_JUMP ^ IFTRUE (DATA (3)), 3021 PADDRH (msg_ext_3), 3022 SCR_JUMP ^ IFFALSE (DATA (2)), 3023 PADDR (msg_bad), 3024 }/*-------------------------< MSG_EXT_2 >----------------*/,{ 3025 SCR_CLR (SCR_ACK), 3026 0, 3027 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)), 3028 PADDR (dispatch), 3029 /* 3030 ** get extended message code. 3031 */ 3032 SCR_MOVE_ABS (1) ^ SCR_MSG_IN, 3033 NADDR (msgin[2]), 3034 SCR_JUMP ^ IFTRUE (DATA (EXTENDED_WDTR)), 3035 PADDRH (msg_wdtr), 3036 /* 3037 ** unknown extended message 3038 */ 3039 SCR_JUMP, 3040 PADDR (msg_bad) 3041 }/*-------------------------< MSG_WDTR >-----------------*/,{ 3042 SCR_CLR (SCR_ACK), 3043 0, 3044 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)), 3045 PADDR (dispatch), 3046 /* 3047 ** get data bus width 3048 */ 3049 SCR_MOVE_ABS (1) ^ SCR_MSG_IN, 3050 NADDR (msgin[3]), 3051 /* 3052 ** let the host do the real work. 3053 */ 3054 SCR_INT, 3055 SIR_NEGO_WIDE, 3056 /* 3057 ** let the target fetch our answer. 3058 */ 3059 SCR_SET (SCR_ATN), 3060 0, 3061 SCR_CLR (SCR_ACK), 3062 0, 3063 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_OUT)), 3064 PADDRH (nego_bad_phase), 3065 3066 }/*-------------------------< SEND_WDTR >----------------*/,{ 3067 /* 3068 ** Send the EXTENDED_WDTR 3069 */ 3070 SCR_MOVE_ABS (4) ^ SCR_MSG_OUT, 3071 NADDR (msgout), 3072 SCR_COPY (1), 3073 NADDR (msgout), 3074 NADDR (lastmsg), 3075 SCR_JUMP, 3076 PADDR (msg_out_done), 3077 3078 }/*-------------------------< MSG_EXT_3 >----------------*/,{ 3079 SCR_CLR (SCR_ACK), 3080 0, 3081 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)), 3082 PADDR (dispatch), 3083 /* 3084 ** get extended message code. 3085 */ 3086 SCR_MOVE_ABS (1) ^ SCR_MSG_IN, 3087 NADDR (msgin[2]), 3088 SCR_JUMP ^ IFTRUE (DATA (EXTENDED_SDTR)), 3089 PADDRH (msg_sdtr), 3090 /* 3091 ** unknown extended message 3092 */ 3093 SCR_JUMP, 3094 PADDR (msg_bad) 3095 3096 }/*-------------------------< MSG_SDTR >-----------------*/,{ 3097 SCR_CLR (SCR_ACK), 3098 0, 3099 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)), 3100 PADDR (dispatch), 3101 /* 3102 ** get period and offset 3103 */ 3104 SCR_MOVE_ABS (2) ^ SCR_MSG_IN, 3105 NADDR (msgin[3]), 3106 /* 3107 ** let the host do the real work. 3108 */ 3109 SCR_INT, 3110 SIR_NEGO_SYNC, 3111 /* 3112 ** let the target fetch our answer. 3113 */ 3114 SCR_SET (SCR_ATN), 3115 0, 3116 SCR_CLR (SCR_ACK), 3117 0, 3118 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_OUT)), 3119 PADDRH (nego_bad_phase), 3120 3121 }/*-------------------------< SEND_SDTR >-------------*/,{ 3122 /* 3123 ** Send the EXTENDED_SDTR 3124 */ 3125 SCR_MOVE_ABS (5) ^ SCR_MSG_OUT, 3126 NADDR (msgout), 3127 SCR_COPY (1), 3128 NADDR (msgout), 3129 NADDR (lastmsg), 3130 SCR_JUMP, 3131 PADDR (msg_out_done), 3132 3133 }/*-------------------------< NEGO_BAD_PHASE >------------*/,{ 3134 SCR_INT, 3135 SIR_NEGO_PROTO, 3136 SCR_JUMP, 3137 PADDR (dispatch), 3138 3139 }/*-------------------------< MSG_OUT_ABORT >-------------*/,{ 3140 /* 3141 ** After ABORT message, 3142 ** 3143 ** expect an immediate disconnect, ... 3144 */ 3145 SCR_REG_REG (scntl2, SCR_AND, 0x7f), 3146 0, 3147 SCR_CLR (SCR_ACK|SCR_ATN), 3148 0, 3149 SCR_WAIT_DISC, 3150 0, 3151 /* 3152 ** ... and set the status to "ABORTED" 3153 */ 3154 SCR_LOAD_REG (HS_REG, HS_ABORTED), 3155 0, 3156 SCR_JUMP, 3157 PADDR (cleanup), 3158 3159 }/*-------------------------< HDATA_IN >-------------------*/,{ 3160 /* 3161 ** Because the size depends on the 3162 ** #define MAX_SCATTERH parameter, 3163 ** it is filled in at runtime. 3164 ** 3165 ** ##==< i=MAX_SCATTERL; i<MAX_SCATTERL+MAX_SCATTERH >== 3166 ** || SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN)), 3167 ** || PADDR (dispatch), 3168 ** || SCR_MOVE_TBL ^ SCR_DATA_IN, 3169 ** || offsetof (struct dsb, data[ i]), 3170 ** ##=================================================== 3171 ** 3172 **--------------------------------------------------------- 3173 */ 3174 0 3175 }/*-------------------------< HDATA_IN2 >------------------*/,{ 3176 SCR_JUMP, 3177 PADDR (data_in), 3178 3179 }/*-------------------------< HDATA_OUT >-------------------*/,{ 3180 /* 3181 ** Because the size depends on the 3182 ** #define MAX_SCATTERH parameter, 3183 ** it is filled in at runtime. 3184 ** 3185 ** ##==< i=MAX_SCATTERL; i<MAX_SCATTERL+MAX_SCATTERH >== 3186 ** || SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_OUT)), 3187 ** || PADDR (dispatch), 3188 ** || SCR_MOVE_TBL ^ SCR_DATA_OUT, 3189 ** || offsetof (struct dsb, data[ i]), 3190 ** ##=================================================== 3191 ** 3192 **--------------------------------------------------------- 3193 */ 3194 0 3195 }/*-------------------------< HDATA_OUT2 >------------------*/,{ 3196 SCR_JUMP, 3197 PADDR (data_out), 3198 3199 }/*-------------------------< RESET >----------------------*/,{ 3200 /* 3201 ** Send a TARGET_RESET message if bad IDENTIFY 3202 ** received on reselection. 3203 */ 3204 SCR_LOAD_REG (scratcha, ABORT_TASK), 3205 0, 3206 SCR_JUMP, 3207 PADDRH (abort_resel), 3208 }/*-------------------------< ABORTTAG >-------------------*/,{ 3209 /* 3210 ** Abort a wrong tag received on reselection. 3211 */ 3212 SCR_LOAD_REG (scratcha, ABORT_TASK), 3213 0, 3214 SCR_JUMP, 3215 PADDRH (abort_resel), 3216 }/*-------------------------< ABORT >----------------------*/,{ 3217 /* 3218 ** Abort a reselection when no active CCB. 3219 */ 3220 SCR_LOAD_REG (scratcha, ABORT_TASK_SET), 3221 0, 3222 }/*-------------------------< ABORT_RESEL >----------------*/,{ 3223 SCR_COPY (1), 3224 RADDR (scratcha), 3225 NADDR (msgout), 3226 SCR_SET (SCR_ATN), 3227 0, 3228 SCR_CLR (SCR_ACK), 3229 0, 3230 /* 3231 ** and send it. 3232 ** we expect an immediate disconnect 3233 */ 3234 SCR_REG_REG (scntl2, SCR_AND, 0x7f), 3235 0, 3236 SCR_MOVE_ABS (1) ^ SCR_MSG_OUT, 3237 NADDR (msgout), 3238 SCR_COPY (1), 3239 NADDR (msgout), 3240 NADDR (lastmsg), 3241 SCR_CLR (SCR_ACK|SCR_ATN), 3242 0, 3243 SCR_WAIT_DISC, 3244 0, 3245 SCR_JUMP, 3246 PADDR (start), 3247 }/*-------------------------< RESEND_IDENT >-------------------*/,{ 3248 /* 3249 ** The target stays in MSG OUT phase after having acked 3250 ** Identify [+ Tag [+ Extended message ]]. Targets shall 3251 ** behave this way on parity error. 3252 ** We must send it again all the messages. 3253 */ 3254 SCR_SET (SCR_ATN), /* Shall be asserted 2 deskew delays before the */ 3255 0, /* 1rst ACK = 90 ns. Hope the NCR is'nt too fast */ 3256 SCR_JUMP, 3257 PADDR (send_ident), 3258 }/*-------------------------< CLRATN_GO_ON >-------------------*/,{ 3259 SCR_CLR (SCR_ATN), 3260 0, 3261 SCR_JUMP, 3262 }/*-------------------------< NXTDSP_GO_ON >-------------------*/,{ 3263 0, 3264 }/*-------------------------< SDATA_IN >-------------------*/,{ 3265 SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN)), 3266 PADDR (dispatch), 3267 SCR_MOVE_TBL ^ SCR_DATA_IN, 3268 offsetof (struct dsb, sense), 3269 SCR_CALL, 3270 PADDR (dispatch), 3271 SCR_JUMP, 3272 PADDR (no_data), 3273 }/*-------------------------< DATA_IO >--------------------*/,{ 3274 /* 3275 ** We jump here if the data direction was unknown at the 3276 ** time we had to queue the command to the scripts processor. 3277 ** Pointers had been set as follow in this situation: 3278 ** savep --> DATA_IO 3279 ** lastp --> start pointer when DATA_IN 3280 ** goalp --> goal pointer when DATA_IN 3281 ** wlastp --> start pointer when DATA_OUT 3282 ** wgoalp --> goal pointer when DATA_OUT 3283 ** This script sets savep/lastp/goalp according to the 3284 ** direction chosen by the target. 3285 */ 3286 SCR_JUMPR ^ IFTRUE (WHEN (SCR_DATA_OUT)), 3287 32, 3288 /* 3289 ** Direction is DATA IN. 3290 ** Warning: we jump here, even when phase is DATA OUT. 3291 */ 3292 SCR_COPY (4), 3293 NADDR (header.lastp), 3294 NADDR (header.savep), 3295 3296 /* 3297 ** Jump to the SCRIPTS according to actual direction. 3298 */ 3299 SCR_COPY (4), 3300 NADDR (header.savep), 3301 RADDR (temp), 3302 SCR_RETURN, 3303 0, 3304 /* 3305 ** Direction is DATA OUT. 3306 */ 3307 SCR_COPY (4), 3308 NADDR (header.wlastp), 3309 NADDR (header.lastp), 3310 SCR_COPY (4), 3311 NADDR (header.wgoalp), 3312 NADDR (header.goalp), 3313 SCR_JUMPR, 3314 -64, 3315 }/*-------------------------< BAD_IDENTIFY >---------------*/,{ 3316 /* 3317 ** If message phase but not an IDENTIFY, 3318 ** get some help from the C code. 3319 ** Old SCSI device may behave so. 3320 */ 3321 SCR_JUMPR ^ IFTRUE (MASK (0x80, 0x80)), 3322 16, 3323 SCR_INT, 3324 SIR_RESEL_NO_IDENTIFY, 3325 SCR_JUMP, 3326 PADDRH (reset), 3327 /* 3328 ** Message is an IDENTIFY, but lun is unknown. 3329 ** Read the message, since we got it directly 3330 ** from the SCSI BUS data lines. 3331 ** Signal problem to C code for logging the event. 3332 ** Send an ABORT_TASK_SET to clear all pending tasks. 3333 */ 3334 SCR_INT, 3335 SIR_RESEL_BAD_LUN, 3336 SCR_MOVE_ABS (1) ^ SCR_MSG_IN, 3337 NADDR (msgin), 3338 SCR_JUMP, 3339 PADDRH (abort), 3340 }/*-------------------------< BAD_I_T_L >------------------*/,{ 3341 /* 3342 ** We donnot have a task for that I_T_L. 3343 ** Signal problem to C code for logging the event. 3344 ** Send an ABORT_TASK_SET message. 3345 */ 3346 SCR_INT, 3347 SIR_RESEL_BAD_I_T_L, 3348 SCR_JUMP, 3349 PADDRH (abort), 3350 }/*-------------------------< BAD_I_T_L_Q >----------------*/,{ 3351 /* 3352 ** We donnot have a task that matches the tag. 3353 ** Signal problem to C code for logging the event. 3354 ** Send an ABORT_TASK message. 3355 */ 3356 SCR_INT, 3357 SIR_RESEL_BAD_I_T_L_Q, 3358 SCR_JUMP, 3359 PADDRH (aborttag), 3360 }/*-------------------------< BAD_TARGET >-----------------*/,{ 3361 /* 3362 ** We donnot know the target that reselected us. 3363 ** Grab the first message if any (IDENTIFY). 3364 ** Signal problem to C code for logging the event. 3365 ** TARGET_RESET message. 3366 */ 3367 SCR_INT, 3368 SIR_RESEL_BAD_TARGET, 3369 SCR_JUMPR ^ IFFALSE (WHEN (SCR_MSG_IN)), 3370 8, 3371 SCR_MOVE_ABS (1) ^ SCR_MSG_IN, 3372 NADDR (msgin), 3373 SCR_JUMP, 3374 PADDRH (reset), 3375 }/*-------------------------< BAD_STATUS >-----------------*/,{ 3376 /* 3377 ** If command resulted in either QUEUE FULL, 3378 ** CHECK CONDITION or COMMAND TERMINATED, 3379 ** call the C code. 3380 */ 3381 SCR_INT ^ IFTRUE (DATA (S_QUEUE_FULL)), 3382 SIR_BAD_STATUS, 3383 SCR_INT ^ IFTRUE (DATA (S_CHECK_COND)), 3384 SIR_BAD_STATUS, 3385 SCR_INT ^ IFTRUE (DATA (S_TERMINATED)), 3386 SIR_BAD_STATUS, 3387 SCR_RETURN, 3388 0, 3389 }/*-------------------------< START_RAM >-------------------*/,{ 3390 /* 3391 ** Load the script into on-chip RAM, 3392 ** and jump to start point. 3393 */ 3394 SCR_COPY_F (4), 3395 RADDR (scratcha), 3396 PADDRH (start_ram0), 3397 /* 3398 ** Flush script prefetch if required 3399 */ 3400 PREFETCH_FLUSH 3401 SCR_COPY (sizeof (struct script)), 3402 }/*-------------------------< START_RAM0 >--------------------*/,{ 3403 0, 3404 PADDR (start), 3405 SCR_JUMP, 3406 PADDR (start), 3407 }/*-------------------------< STO_RESTART >-------------------*/,{ 3408 /* 3409 ** 3410 ** Repair start queue (e.g. next time use the next slot) 3411 ** and jump to start point. 3412 */ 3413 SCR_COPY (4), 3414 RADDR (temp), 3415 PADDR (startpos), 3416 SCR_JUMP, 3417 PADDR (start), 3418 }/*-------------------------< WAIT_DMA >-------------------*/,{ 3419 /* 3420 ** For HP Zalon/53c720 systems, the Zalon interface 3421 ** between CPU and 53c720 does prefetches, which causes 3422 ** problems with self modifying scripts. The problem 3423 ** is overcome by calling a dummy subroutine after each 3424 ** modification, to force a refetch of the script on 3425 ** return from the subroutine. 3426 */ 3427 SCR_RETURN, 3428 0, 3429 }/*-------------------------< SNOOPTEST >-------------------*/,{ 3430 /* 3431 ** Read the variable. 3432 */ 3433 SCR_COPY (4), 3434 NADDR(ncr_cache), 3435 RADDR (scratcha), 3436 /* 3437 ** Write the variable. 3438 */ 3439 SCR_COPY (4), 3440 RADDR (temp), 3441 NADDR(ncr_cache), 3442 /* 3443 ** Read back the variable. 3444 */ 3445 SCR_COPY (4), 3446 NADDR(ncr_cache), 3447 RADDR (temp), 3448 }/*-------------------------< SNOOPEND >-------------------*/,{ 3449 /* 3450 ** And stop. 3451 */ 3452 SCR_INT, 3453 99, 3454 }/*--------------------------------------------------------*/ 3455 }; 3456 3457 /*========================================================== 3458 ** 3459 ** 3460 ** Fill in #define dependent parts of the script 3461 ** 3462 ** 3463 **========================================================== 3464 */ 3465 3466 void __init ncr_script_fill (struct script * scr, struct scripth * scrh) 3467 { 3468 int i; 3469 ncrcmd *p; 3470 3471 p = scrh->tryloop; 3472 for (i=0; i<MAX_START; i++) { 3473 *p++ =SCR_CALL; 3474 *p++ =PADDR (idle); 3475 } 3476 3477 BUG_ON((u_long)p != (u_long)&scrh->tryloop + sizeof (scrh->tryloop)); 3478 3479 #ifdef SCSI_NCR_CCB_DONE_SUPPORT 3480 3481 p = scrh->done_queue; 3482 for (i = 0; i<MAX_DONE; i++) { 3483 *p++ =SCR_COPY (sizeof(struct ccb *)); 3484 *p++ =NADDR (header.cp); 3485 *p++ =NADDR (ccb_done[i]); 3486 *p++ =SCR_CALL; 3487 *p++ =PADDR (done_end); 3488 } 3489 3490 BUG_ON((u_long)p != (u_long)&scrh->done_queue+sizeof(scrh->done_queue)); 3491 3492 #endif /* SCSI_NCR_CCB_DONE_SUPPORT */ 3493 3494 p = scrh->hdata_in; 3495 for (i=0; i<MAX_SCATTERH; i++) { 3496 *p++ =SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN)); 3497 *p++ =PADDR (dispatch); 3498 *p++ =SCR_MOVE_TBL ^ SCR_DATA_IN; 3499 *p++ =offsetof (struct dsb, data[i]); 3500 } 3501 3502 BUG_ON((u_long)p != (u_long)&scrh->hdata_in + sizeof (scrh->hdata_in)); 3503 3504 p = scr->data_in; 3505 for (i=MAX_SCATTERH; i<MAX_SCATTERH+MAX_SCATTERL; i++) { 3506 *p++ =SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN)); 3507 *p++ =PADDR (dispatch); 3508 *p++ =SCR_MOVE_TBL ^ SCR_DATA_IN; 3509 *p++ =offsetof (struct dsb, data[i]); 3510 } 3511 3512 BUG_ON((u_long)p != (u_long)&scr->data_in + sizeof (scr->data_in)); 3513 3514 p = scrh->hdata_out; 3515 for (i=0; i<MAX_SCATTERH; i++) { 3516 *p++ =SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_OUT)); 3517 *p++ =PADDR (dispatch); 3518 *p++ =SCR_MOVE_TBL ^ SCR_DATA_OUT; 3519 *p++ =offsetof (struct dsb, data[i]); 3520 } 3521 3522 BUG_ON((u_long)p != (u_long)&scrh->hdata_out + sizeof (scrh->hdata_out)); 3523 3524 p = scr->data_out; 3525 for (i=MAX_SCATTERH; i<MAX_SCATTERH+MAX_SCATTERL; i++) { 3526 *p++ =SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_OUT)); 3527 *p++ =PADDR (dispatch); 3528 *p++ =SCR_MOVE_TBL ^ SCR_DATA_OUT; 3529 *p++ =offsetof (struct dsb, data[i]); 3530 } 3531 3532 BUG_ON((u_long) p != (u_long)&scr->data_out + sizeof (scr->data_out)); 3533 } 3534 3535 /*========================================================== 3536 ** 3537 ** 3538 ** Copy and rebind a script. 3539 ** 3540 ** 3541 **========================================================== 3542 */ 3543 3544 static void __init 3545 ncr_script_copy_and_bind (struct ncb *np, ncrcmd *src, ncrcmd *dst, int len) 3546 { 3547 ncrcmd opcode, new, old, tmp1, tmp2; 3548 ncrcmd *start, *end; 3549 int relocs; 3550 int opchanged = 0; 3551 3552 start = src; 3553 end = src + len/4; 3554 3555 while (src < end) { 3556 3557 opcode = *src++; 3558 *dst++ = cpu_to_scr(opcode); 3559 3560 /* 3561 ** If we forget to change the length 3562 ** in struct script, a field will be 3563 ** padded with 0. This is an illegal 3564 ** command. 3565 */ 3566 3567 if (opcode == 0) { 3568 printk (KERN_ERR "%s: ERROR0 IN SCRIPT at %d.\n", 3569 ncr_name(np), (int) (src-start-1)); 3570 mdelay(1000); 3571 } 3572 3573 if (DEBUG_FLAGS & DEBUG_SCRIPT) 3574 printk (KERN_DEBUG "%p: <%x>\n", 3575 (src-1), (unsigned)opcode); 3576 3577 /* 3578 ** We don't have to decode ALL commands 3579 */ 3580 switch (opcode >> 28) { 3581 3582 case 0xc: 3583 /* 3584 ** COPY has TWO arguments. 3585 */ 3586 relocs = 2; 3587 tmp1 = src[0]; 3588 #ifdef RELOC_KVAR 3589 if ((tmp1 & RELOC_MASK) == RELOC_KVAR) 3590 tmp1 = 0; 3591 #endif 3592 tmp2 = src[1]; 3593 #ifdef RELOC_KVAR 3594 if ((tmp2 & RELOC_MASK) == RELOC_KVAR) 3595 tmp2 = 0; 3596 #endif 3597 if ((tmp1 ^ tmp2) & 3) { 3598 printk (KERN_ERR"%s: ERROR1 IN SCRIPT at %d.\n", 3599 ncr_name(np), (int) (src-start-1)); 3600 mdelay(1000); 3601 } 3602 /* 3603 ** If PREFETCH feature not enabled, remove 3604 ** the NO FLUSH bit if present. 3605 */ 3606 if ((opcode & SCR_NO_FLUSH) && !(np->features & FE_PFEN)) { 3607 dst[-1] = cpu_to_scr(opcode & ~SCR_NO_FLUSH); 3608 ++opchanged; 3609 } 3610 break; 3611 3612 case 0x0: 3613 /* 3614 ** MOVE (absolute address) 3615 */ 3616 relocs = 1; 3617 break; 3618 3619 case 0x8: 3620 /* 3621 ** JUMP / CALL 3622 ** don't relocate if relative :-) 3623 */ 3624 if (opcode & 0x00800000) 3625 relocs = 0; 3626 else 3627 relocs = 1; 3628 break; 3629 3630 case 0x4: 3631 case 0x5: 3632 case 0x6: 3633 case 0x7: 3634 relocs = 1; 3635 break; 3636 3637 default: 3638 relocs = 0; 3639 break; 3640 } 3641 3642 if (relocs) { 3643 while (relocs--) { 3644 old = *src++; 3645 3646 switch (old & RELOC_MASK) { 3647 case RELOC_REGISTER: 3648 new = (old & ~RELOC_MASK) + np->paddr; 3649 break; 3650 case RELOC_LABEL: 3651 new = (old & ~RELOC_MASK) + np->p_script; 3652 break; 3653 case RELOC_LABELH: 3654 new = (old & ~RELOC_MASK) + np->p_scripth; 3655 break; 3656 case RELOC_SOFTC: 3657 new = (old & ~RELOC_MASK) + np->p_ncb; 3658 break; 3659 #ifdef RELOC_KVAR 3660 case RELOC_KVAR: 3661 if (((old & ~RELOC_MASK) < 3662 SCRIPT_KVAR_FIRST) || 3663 ((old & ~RELOC_MASK) > 3664 SCRIPT_KVAR_LAST)) 3665 panic("ncr KVAR out of range"); 3666 new = vtophys(script_kvars[old & 3667 ~RELOC_MASK]); 3668 break; 3669 #endif 3670 case 0: 3671 /* Don't relocate a 0 address. */ 3672 if (old == 0) { 3673 new = old; 3674 break; 3675 } 3676 /* fall through */ 3677 default: 3678 panic("ncr_script_copy_and_bind: weird relocation %x\n", old); 3679 break; 3680 } 3681 3682 *dst++ = cpu_to_scr(new); 3683 } 3684 } else 3685 *dst++ = cpu_to_scr(*src++); 3686 3687 } 3688 } 3689 3690 /* 3691 ** Linux host data structure 3692 */ 3693 3694 struct host_data { 3695 struct ncb *ncb; 3696 }; 3697 3698 #define PRINT_ADDR(cmd, arg...) dev_info(&cmd->device->sdev_gendev , ## arg) 3699 3700 static void ncr_print_msg(struct ccb *cp, char *label, u_char *msg) 3701 { 3702 PRINT_ADDR(cp->cmd, "%s: ", label); 3703 3704 spi_print_msg(msg); 3705 printk("\n"); 3706 } 3707 3708 /*========================================================== 3709 ** 3710 ** NCR chip clock divisor table. 3711 ** Divisors are multiplied by 10,000,000 in order to make 3712 ** calculations more simple. 3713 ** 3714 **========================================================== 3715 */ 3716 3717 #define _5M 5000000 3718 static u_long div_10M[] = 3719 {2*_5M, 3*_5M, 4*_5M, 6*_5M, 8*_5M, 12*_5M, 16*_5M}; 3720 3721 3722 /*=============================================================== 3723 ** 3724 ** Prepare io register values used by ncr_init() according 3725 ** to selected and supported features. 3726 ** 3727 ** NCR chips allow burst lengths of 2, 4, 8, 16, 32, 64, 128 3728 ** transfers. 32,64,128 are only supported by 875 and 895 chips. 3729 ** We use log base 2 (burst length) as internal code, with 3730 ** value 0 meaning "burst disabled". 3731 ** 3732 **=============================================================== 3733 */ 3734 3735 /* 3736 * Burst length from burst code. 3737 */ 3738 #define burst_length(bc) (!(bc))? 0 : 1 << (bc) 3739 3740 /* 3741 * Burst code from io register bits. Burst enable is ctest0 for c720 3742 */ 3743 #define burst_code(dmode, ctest0) \ 3744 (ctest0) & 0x80 ? 0 : (((dmode) & 0xc0) >> 6) + 1 3745 3746 /* 3747 * Set initial io register bits from burst code. 3748 */ 3749 static inline void ncr_init_burst(struct ncb *np, u_char bc) 3750 { 3751 u_char *be = &np->rv_ctest0; 3752 *be &= ~0x80; 3753 np->rv_dmode &= ~(0x3 << 6); 3754 np->rv_ctest5 &= ~0x4; 3755 3756 if (!bc) { 3757 *be |= 0x80; 3758 } else { 3759 --bc; 3760 np->rv_dmode |= ((bc & 0x3) << 6); 3761 np->rv_ctest5 |= (bc & 0x4); 3762 } 3763 } 3764 3765 static void __init ncr_prepare_setting(struct ncb *np) 3766 { 3767 u_char burst_max; 3768 u_long period; 3769 int i; 3770 3771 /* 3772 ** Save assumed BIOS setting 3773 */ 3774 3775 np->sv_scntl0 = INB(nc_scntl0) & 0x0a; 3776 np->sv_scntl3 = INB(nc_scntl3) & 0x07; 3777 np->sv_dmode = INB(nc_dmode) & 0xce; 3778 np->sv_dcntl = INB(nc_dcntl) & 0xa8; 3779 np->sv_ctest0 = INB(nc_ctest0) & 0x84; 3780 np->sv_ctest3 = INB(nc_ctest3) & 0x01; 3781 np->sv_ctest4 = INB(nc_ctest4) & 0x80; 3782 np->sv_ctest5 = INB(nc_ctest5) & 0x24; 3783 np->sv_gpcntl = INB(nc_gpcntl); 3784 np->sv_stest2 = INB(nc_stest2) & 0x20; 3785 np->sv_stest4 = INB(nc_stest4); 3786 3787 /* 3788 ** Wide ? 3789 */ 3790 3791 np->maxwide = (np->features & FE_WIDE)? 1 : 0; 3792 3793 /* 3794 * Guess the frequency of the chip's clock. 3795 */ 3796 if (np->features & FE_ULTRA) 3797 np->clock_khz = 80000; 3798 else 3799 np->clock_khz = 40000; 3800 3801 /* 3802 * Get the clock multiplier factor. 3803 */ 3804 if (np->features & FE_QUAD) 3805 np->multiplier = 4; 3806 else if (np->features & FE_DBLR) 3807 np->multiplier = 2; 3808 else 3809 np->multiplier = 1; 3810 3811 /* 3812 * Measure SCSI clock frequency for chips 3813 * it may vary from assumed one. 3814 */ 3815 if (np->features & FE_VARCLK) 3816 ncr_getclock(np, np->multiplier); 3817 3818 /* 3819 * Divisor to be used for async (timer pre-scaler). 3820 */ 3821 i = np->clock_divn - 1; 3822 while (--i >= 0) { 3823 if (10ul * SCSI_NCR_MIN_ASYNC * np->clock_khz > div_10M[i]) { 3824 ++i; 3825 break; 3826 } 3827 } 3828 np->rv_scntl3 = i+1; 3829 3830 /* 3831 * Minimum synchronous period factor supported by the chip. 3832 * Btw, 'period' is in tenths of nanoseconds. 3833 */ 3834 3835 period = (4 * div_10M[0] + np->clock_khz - 1) / np->clock_khz; 3836 if (period <= 250) np->minsync = 10; 3837 else if (period <= 303) np->minsync = 11; 3838 else if (period <= 500) np->minsync = 12; 3839 else np->minsync = (period + 40 - 1) / 40; 3840 3841 /* 3842 * Check against chip SCSI standard support (SCSI-2,ULTRA,ULTRA2). 3843 */ 3844 3845 if (np->minsync < 25 && !(np->features & FE_ULTRA)) 3846 np->minsync = 25; 3847 3848 /* 3849 * Maximum synchronous period factor supported by the chip. 3850 */ 3851 3852 period = (11 * div_10M[np->clock_divn - 1]) / (4 * np->clock_khz); 3853 np->maxsync = period > 2540 ? 254 : period / 10; 3854 3855 /* 3856 ** Prepare initial value of other IO registers 3857 */ 3858 #if defined SCSI_NCR_TRUST_BIOS_SETTING 3859 np->rv_scntl0 = np->sv_scntl0; 3860 np->rv_dmode = np->sv_dmode; 3861 np->rv_dcntl = np->sv_dcntl; 3862 np->rv_ctest0 = np->sv_ctest0; 3863 np->rv_ctest3 = np->sv_ctest3; 3864 np->rv_ctest4 = np->sv_ctest4; 3865 np->rv_ctest5 = np->sv_ctest5; 3866 burst_max = burst_code(np->sv_dmode, np->sv_ctest0); 3867 #else 3868 3869 /* 3870 ** Select burst length (dwords) 3871 */ 3872 burst_max = driver_setup.burst_max; 3873 if (burst_max == 255) 3874 burst_max = burst_code(np->sv_dmode, np->sv_ctest0); 3875 if (burst_max > 7) 3876 burst_max = 7; 3877 if (burst_max > np->maxburst) 3878 burst_max = np->maxburst; 3879 3880 /* 3881 ** Select all supported special features 3882 */ 3883 if (np->features & FE_ERL) 3884 np->rv_dmode |= ERL; /* Enable Read Line */ 3885 if (np->features & FE_BOF) 3886 np->rv_dmode |= BOF; /* Burst Opcode Fetch */ 3887 if (np->features & FE_ERMP) 3888 np->rv_dmode |= ERMP; /* Enable Read Multiple */ 3889 if (np->features & FE_PFEN) 3890 np->rv_dcntl |= PFEN; /* Prefetch Enable */ 3891 if (np->features & FE_CLSE) 3892 np->rv_dcntl |= CLSE; /* Cache Line Size Enable */ 3893 if (np->features & FE_WRIE) 3894 np->rv_ctest3 |= WRIE; /* Write and Invalidate */ 3895 if (np->features & FE_DFS) 3896 np->rv_ctest5 |= DFS; /* Dma Fifo Size */ 3897 if (np->features & FE_MUX) 3898 np->rv_ctest4 |= MUX; /* Host bus multiplex mode */ 3899 if (np->features & FE_EA) 3900 np->rv_dcntl |= EA; /* Enable ACK */ 3901 if (np->features & FE_EHP) 3902 np->rv_ctest0 |= EHP; /* Even host parity */ 3903 3904 /* 3905 ** Select some other 3906 */ 3907 if (driver_setup.master_parity) 3908 np->rv_ctest4 |= MPEE; /* Master parity checking */ 3909 if (driver_setup.scsi_parity) 3910 np->rv_scntl0 |= 0x0a; /* full arb., ena parity, par->ATN */ 3911 3912 /* 3913 ** Get SCSI addr of host adapter (set by bios?). 3914 */ 3915 if (np->myaddr == 255) { 3916 np->myaddr = INB(nc_scid) & 0x07; 3917 if (!np->myaddr) 3918 np->myaddr = SCSI_NCR_MYADDR; 3919 } 3920 3921 #endif /* SCSI_NCR_TRUST_BIOS_SETTING */ 3922 3923 /* 3924 * Prepare initial io register bits for burst length 3925 */ 3926 ncr_init_burst(np, burst_max); 3927 3928 /* 3929 ** Set SCSI BUS mode. 3930 ** 3931 ** - ULTRA2 chips (895/895A/896) report the current 3932 ** BUS mode through the STEST4 IO register. 3933 ** - For previous generation chips (825/825A/875), 3934 ** user has to tell us how to check against HVD, 3935 ** since a 100% safe algorithm is not possible. 3936 */ 3937 np->scsi_mode = SMODE_SE; 3938 if (np->features & FE_DIFF) { 3939 switch(driver_setup.diff_support) { 3940 case 4: /* Trust previous settings if present, then GPIO3 */ 3941 if (np->sv_scntl3) { 3942 if (np->sv_stest2 & 0x20) 3943 np->scsi_mode = SMODE_HVD; 3944 break; 3945 } 3946 case 3: /* SYMBIOS controllers report HVD through GPIO3 */ 3947 if (INB(nc_gpreg) & 0x08) 3948 break; 3949 case 2: /* Set HVD unconditionally */ 3950 np->scsi_mode = SMODE_HVD; 3951 case 1: /* Trust previous settings for HVD */ 3952 if (np->sv_stest2 & 0x20) 3953 np->scsi_mode = SMODE_HVD; 3954 break; 3955 default:/* Don't care about HVD */ 3956 break; 3957 } 3958 } 3959 if (np->scsi_mode == SMODE_HVD) 3960 np->rv_stest2 |= 0x20; 3961 3962 /* 3963 ** Set LED support from SCRIPTS. 3964 ** Ignore this feature for boards known to use a 3965 ** specific GPIO wiring and for the 895A or 896 3966 ** that drive the LED directly. 3967 ** Also probe initial setting of GPIO0 as output. 3968 */ 3969 if ((driver_setup.led_pin) && 3970 !(np->features & FE_LEDC) && !(np->sv_gpcntl & 0x01)) 3971 np->features |= FE_LED0; 3972 3973 /* 3974 ** Set irq mode. 3975 */ 3976 switch(driver_setup.irqm & 3) { 3977 case 2: 3978 np->rv_dcntl |= IRQM; 3979 break; 3980 case 1: 3981 np->rv_dcntl |= (np->sv_dcntl & IRQM); 3982 break; 3983 default: 3984 break; 3985 } 3986 3987 /* 3988 ** Configure targets according to driver setup. 3989 ** Allow to override sync, wide and NOSCAN from 3990 ** boot command line. 3991 */ 3992 for (i = 0 ; i < MAX_TARGET ; i++) { 3993 struct tcb *tp = &np->target[i]; 3994 3995 tp->usrsync = driver_setup.default_sync; 3996 tp->usrwide = driver_setup.max_wide; 3997 tp->usrtags = MAX_TAGS; 3998 tp->period = 0xffff; 3999 if (!driver_setup.disconnection) 4000 np->target[i].usrflag = UF_NODISC; 4001 } 4002 4003 /* 4004 ** Announce all that stuff to user. 4005 */ 4006 4007 printk(KERN_INFO "%s: ID %d, Fast-%d%s%s\n", ncr_name(np), 4008 np->myaddr, 4009 np->minsync < 12 ? 40 : (np->minsync < 25 ? 20 : 10), 4010 (np->rv_scntl0 & 0xa) ? ", Parity Checking" : ", NO Parity", 4011 (np->rv_stest2 & 0x20) ? ", Differential" : ""); 4012 4013 if (bootverbose > 1) { 4014 printk (KERN_INFO "%s: initial SCNTL3/DMODE/DCNTL/CTEST3/4/5 = " 4015 "(hex) %02x/%02x/%02x/%02x/%02x/%02x\n", 4016 ncr_name(np), np->sv_scntl3, np->sv_dmode, np->sv_dcntl, 4017 np->sv_ctest3, np->sv_ctest4, np->sv_ctest5); 4018 4019 printk (KERN_INFO "%s: final SCNTL3/DMODE/DCNTL/CTEST3/4/5 = " 4020 "(hex) %02x/%02x/%02x/%02x/%02x/%02x\n", 4021 ncr_name(np), np->rv_scntl3, np->rv_dmode, np->rv_dcntl, 4022 np->rv_ctest3, np->rv_ctest4, np->rv_ctest5); 4023 } 4024 4025 if (bootverbose && np->paddr2) 4026 printk (KERN_INFO "%s: on-chip RAM at 0x%lx\n", 4027 ncr_name(np), np->paddr2); 4028 } 4029 4030 /*========================================================== 4031 ** 4032 ** 4033 ** Done SCSI commands list management. 4034 ** 4035 ** We donnot enter the scsi_done() callback immediately 4036 ** after a command has been seen as completed but we 4037 ** insert it into a list which is flushed outside any kind 4038 ** of driver critical section. 4039 ** This allows to do minimal stuff under interrupt and 4040 ** inside critical sections and to also avoid locking up 4041 ** on recursive calls to driver entry points under SMP. 4042 ** In fact, the only kernel point which is entered by the 4043 ** driver with a driver lock set is kmalloc(GFP_ATOMIC) 4044 ** that shall not reenter the driver under any circumstances, 4045 ** AFAIK. 4046 ** 4047 **========================================================== 4048 */ 4049 static inline void ncr_queue_done_cmd(struct ncb *np, struct scsi_cmnd *cmd) 4050 { 4051 unmap_scsi_data(np, cmd); 4052 cmd->host_scribble = (char *) np->done_list; 4053 np->done_list = cmd; 4054 } 4055 4056 static inline void ncr_flush_done_cmds(struct scsi_cmnd *lcmd) 4057 { 4058 struct scsi_cmnd *cmd; 4059 4060 while (lcmd) { 4061 cmd = lcmd; 4062 lcmd = (struct scsi_cmnd *) cmd->host_scribble; 4063 cmd->scsi_done(cmd); 4064 } 4065 } 4066 4067 /*========================================================== 4068 ** 4069 ** 4070 ** Prepare the next negotiation message if needed. 4071 ** 4072 ** Fill in the part of message buffer that contains the 4073 ** negotiation and the nego_status field of the CCB. 4074 ** Returns the size of the message in bytes. 4075 ** 4076 ** 4077 **========================================================== 4078 */ 4079 4080 4081 static int ncr_prepare_nego(struct ncb *np, struct ccb *cp, u_char *msgptr) 4082 { 4083 struct tcb *tp = &np->target[cp->target]; 4084 int msglen = 0; 4085 int nego = 0; 4086 struct scsi_target *starget = tp->starget; 4087 4088 /* negotiate wide transfers ? */ 4089 if (!tp->widedone) { 4090 if (spi_support_wide(starget)) { 4091 nego = NS_WIDE; 4092 } else 4093 tp->widedone=1; 4094 } 4095 4096 /* negotiate synchronous transfers? */ 4097 if (!nego && !tp->period) { 4098 if (spi_support_sync(starget)) { 4099 nego = NS_SYNC; 4100 } else { 4101 tp->period =0xffff; 4102 dev_info(&starget->dev, "target did not report SYNC.\n"); 4103 } 4104 } 4105 4106 switch (nego) { 4107 case NS_SYNC: 4108 msglen += spi_populate_sync_msg(msgptr + msglen, 4109 tp->maxoffs ? tp->minsync : 0, tp->maxoffs); 4110 break; 4111 case NS_WIDE: 4112 msglen += spi_populate_width_msg(msgptr + msglen, tp->usrwide); 4113 break; 4114 } 4115 4116 cp->nego_status = nego; 4117 4118 if (nego) { 4119 tp->nego_cp = cp; 4120 if (DEBUG_FLAGS & DEBUG_NEGO) { 4121 ncr_print_msg(cp, nego == NS_WIDE ? 4122 "wide msgout":"sync_msgout", msgptr); 4123 } 4124 } 4125 4126 return msglen; 4127 } 4128 4129 4130 4131 /*========================================================== 4132 ** 4133 ** 4134 ** Start execution of a SCSI command. 4135 ** This is called from the generic SCSI driver. 4136 ** 4137 ** 4138 **========================================================== 4139 */ 4140 static int ncr_queue_command (struct ncb *np, struct scsi_cmnd *cmd) 4141 { 4142 struct scsi_device *sdev = cmd->device; 4143 struct tcb *tp = &np->target[sdev->id]; 4144 struct lcb *lp = tp->lp[sdev->lun]; 4145 struct ccb *cp; 4146 4147 int segments; 4148 u_char idmsg, *msgptr; 4149 u32 msglen; 4150 int direction; 4151 u32 lastp, goalp; 4152 4153 /*--------------------------------------------- 4154 ** 4155 ** Some shortcuts ... 4156 ** 4157 **--------------------------------------------- 4158 */ 4159 if ((sdev->id == np->myaddr ) || 4160 (sdev->id >= MAX_TARGET) || 4161 (sdev->lun >= MAX_LUN )) { 4162 return(DID_BAD_TARGET); 4163 } 4164 4165 /*--------------------------------------------- 4166 ** 4167 ** Complete the 1st TEST UNIT READY command 4168 ** with error condition if the device is 4169 ** flagged NOSCAN, in order to speed up 4170 ** the boot. 4171 ** 4172 **--------------------------------------------- 4173 */ 4174 if ((cmd->cmnd[0] == 0 || cmd->cmnd[0] == 0x12) && 4175 (tp->usrflag & UF_NOSCAN)) { 4176 tp->usrflag &= ~UF_NOSCAN; 4177 return DID_BAD_TARGET; 4178 } 4179 4180 if (DEBUG_FLAGS & DEBUG_TINY) { 4181 PRINT_ADDR(cmd, "CMD=%x ", cmd->cmnd[0]); 4182 } 4183 4184 /*--------------------------------------------------- 4185 ** 4186 ** Assign a ccb / bind cmd. 4187 ** If resetting, shorten settle_time if necessary 4188 ** in order to avoid spurious timeouts. 4189 ** If resetting or no free ccb, 4190 ** insert cmd into the waiting list. 4191 ** 4192 **---------------------------------------------------- 4193 */ 4194 if (np->settle_time && cmd->timeout_per_command >= HZ) { 4195 u_long tlimit = jiffies + cmd->timeout_per_command - HZ; 4196 if (time_after(np->settle_time, tlimit)) 4197 np->settle_time = tlimit; 4198 } 4199 4200 if (np->settle_time || !(cp=ncr_get_ccb (np, cmd))) { 4201 insert_into_waiting_list(np, cmd); 4202 return(DID_OK); 4203 } 4204 cp->cmd = cmd; 4205 4206 /*---------------------------------------------------- 4207 ** 4208 ** Build the identify / tag / sdtr message 4209 ** 4210 **---------------------------------------------------- 4211 */ 4212 4213 idmsg = IDENTIFY(0, sdev->lun); 4214 4215 if (cp ->tag != NO_TAG || 4216 (cp != np->ccb && np->disc && !(tp->usrflag & UF_NODISC))) 4217 idmsg |= 0x40; 4218 4219 msgptr = cp->scsi_smsg; 4220 msglen = 0; 4221 msgptr[msglen++] = idmsg; 4222 4223 if (cp->tag != NO_TAG) { 4224 char order = np->order; 4225 4226 /* 4227 ** Force ordered tag if necessary to avoid timeouts 4228 ** and to preserve interactivity. 4229 */ 4230 if (lp && time_after(jiffies, lp->tags_stime)) { 4231 if (lp->tags_smap) { 4232 order = ORDERED_QUEUE_TAG; 4233 if ((DEBUG_FLAGS & DEBUG_TAGS)||bootverbose>2){ 4234 PRINT_ADDR(cmd, 4235 "ordered tag forced.\n"); 4236 } 4237 } 4238 lp->tags_stime = jiffies + 3*HZ; 4239 lp->tags_smap = lp->tags_umap; 4240 } 4241 4242 if (order == 0) { 4243 /* 4244 ** Ordered write ops, unordered read ops. 4245 */ 4246 switch (cmd->cmnd[0]) { 4247 case 0x08: /* READ_SMALL (6) */ 4248 case 0x28: /* READ_BIG (10) */ 4249 case 0xa8: /* READ_HUGE (12) */ 4250 order = SIMPLE_QUEUE_TAG; 4251 break; 4252 default: 4253 order = ORDERED_QUEUE_TAG; 4254 } 4255 } 4256 msgptr[msglen++] = order; 4257 /* 4258 ** Actual tags are numbered 1,3,5,..2*MAXTAGS+1, 4259 ** since we may have to deal with devices that have 4260 ** problems with #TAG 0 or too great #TAG numbers. 4261 */ 4262 msgptr[msglen++] = (cp->tag << 1) + 1; 4263 } 4264 4265 /*---------------------------------------------------- 4266 ** 4267 ** Build the data descriptors 4268 ** 4269 **---------------------------------------------------- 4270 */ 4271 4272 direction = cmd->sc_data_direction; 4273 if (direction != DMA_NONE) { 4274 segments = ncr_scatter(np, cp, cp->cmd); 4275 if (segments < 0) { 4276 ncr_free_ccb(np, cp); 4277 return(DID_ERROR); 4278 } 4279 } 4280 else { 4281 cp->data_len = 0; 4282 segments = 0; 4283 } 4284 4285 /*--------------------------------------------------- 4286 ** 4287 ** negotiation required? 4288 ** 4289 ** (nego_status is filled by ncr_prepare_nego()) 4290 ** 4291 **--------------------------------------------------- 4292 */ 4293 4294 cp->nego_status = 0; 4295 4296 if ((!tp->widedone || !tp->period) && !tp->nego_cp && lp) { 4297 msglen += ncr_prepare_nego (np, cp, msgptr + msglen); 4298 } 4299 4300 /*---------------------------------------------------- 4301 ** 4302 ** Determine xfer direction. 4303 ** 4304 **---------------------------------------------------- 4305 */ 4306 if (!cp->data_len) 4307 direction = DMA_NONE; 4308 4309 /* 4310 ** If data direction is BIDIRECTIONAL, speculate FROM_DEVICE 4311 ** but prepare alternate pointers for TO_DEVICE in case 4312 ** of our speculation will be just wrong. 4313 ** SCRIPTS will swap values if needed. 4314 */ 4315 switch(direction) { 4316 case DMA_BIDIRECTIONAL: 4317 case DMA_TO_DEVICE: 4318 goalp = NCB_SCRIPT_PHYS (np, data_out2) + 8; 4319 if (segments <= MAX_SCATTERL) 4320 lastp = goalp - 8 - (segments * 16); 4321 else { 4322 lastp = NCB_SCRIPTH_PHYS (np, hdata_out2); 4323 lastp -= (segments - MAX_SCATTERL) * 16; 4324 } 4325 if (direction != DMA_BIDIRECTIONAL) 4326 break; 4327 cp->phys.header.wgoalp = cpu_to_scr(goalp); 4328 cp->phys.header.wlastp = cpu_to_scr(lastp); 4329 /* fall through */ 4330 case DMA_FROM_DEVICE: 4331 goalp = NCB_SCRIPT_PHYS (np, data_in2) + 8; 4332 if (segments <= MAX_SCATTERL) 4333 lastp = goalp - 8 - (segments * 16); 4334 else { 4335 lastp = NCB_SCRIPTH_PHYS (np, hdata_in2); 4336 lastp -= (segments - MAX_SCATTERL) * 16; 4337 } 4338 break; 4339 default: 4340 case DMA_NONE: 4341 lastp = goalp = NCB_SCRIPT_PHYS (np, no_data); 4342 break; 4343 } 4344 4345 /* 4346 ** Set all pointers values needed by SCRIPTS. 4347 ** If direction is unknown, start at data_io. 4348 */ 4349 cp->phys.header.lastp = cpu_to_scr(lastp); 4350 cp->phys.header.goalp = cpu_to_scr(goalp); 4351 4352 if (direction == DMA_BIDIRECTIONAL) 4353 cp->phys.header.savep = 4354 cpu_to_scr(NCB_SCRIPTH_PHYS (np, data_io)); 4355 else 4356 cp->phys.header.savep= cpu_to_scr(lastp); 4357 4358 /* 4359 ** Save the initial data pointer in order to be able 4360 ** to redo the command. 4361 */ 4362 cp->startp = cp->phys.header.savep; 4363 4364 /*---------------------------------------------------- 4365 ** 4366 ** fill in ccb 4367 ** 4368 **---------------------------------------------------- 4369 ** 4370 ** 4371 ** physical -> virtual backlink 4372 ** Generic SCSI command 4373 */ 4374 4375 /* 4376 ** Startqueue 4377 */ 4378 cp->start.schedule.l_paddr = cpu_to_scr(NCB_SCRIPT_PHYS (np, select)); 4379 cp->restart.schedule.l_paddr = cpu_to_scr(NCB_SCRIPT_PHYS (np, resel_dsa)); 4380 /* 4381 ** select 4382 */ 4383 cp->phys.select.sel_id = sdev_id(sdev); 4384 cp->phys.select.sel_scntl3 = tp->wval; 4385 cp->phys.select.sel_sxfer = tp->sval; 4386 /* 4387 ** message 4388 */ 4389 cp->phys.smsg.addr = cpu_to_scr(CCB_PHYS (cp, scsi_smsg)); 4390 cp->phys.smsg.size = cpu_to_scr(msglen); 4391 4392 /* 4393 ** command 4394 */ 4395 memcpy(cp->cdb_buf, cmd->cmnd, min_t(int, cmd->cmd_len, sizeof(cp->cdb_buf))); 4396 cp->phys.cmd.addr = cpu_to_scr(CCB_PHYS (cp, cdb_buf[0])); 4397 cp->phys.cmd.size = cpu_to_scr(cmd->cmd_len); 4398 4399 /* 4400 ** status 4401 */ 4402 cp->actualquirks = 0; 4403 cp->host_status = cp->nego_status ? HS_NEGOTIATE : HS_BUSY; 4404 cp->scsi_status = S_ILLEGAL; 4405 cp->parity_status = 0; 4406 4407 cp->xerr_status = XE_OK; 4408 #if 0 4409 cp->sync_status = tp->sval; 4410 cp->wide_status = tp->wval; 4411 #endif 4412 4413 /*---------------------------------------------------- 4414 ** 4415 ** Critical region: start this job. 4416 ** 4417 **---------------------------------------------------- 4418 */ 4419 4420 /* activate this job. */ 4421 cp->magic = CCB_MAGIC; 4422 4423 /* 4424 ** insert next CCBs into start queue. 4425 ** 2 max at a time is enough to flush the CCB wait queue. 4426 */ 4427 cp->auto_sense = 0; 4428 if (lp) 4429 ncr_start_next_ccb(np, lp, 2); 4430 else 4431 ncr_put_start_queue(np, cp); 4432 4433 /* Command is successfully queued. */ 4434 4435 return DID_OK; 4436 } 4437 4438 4439 /*========================================================== 4440 ** 4441 ** 4442 ** Insert a CCB into the start queue and wake up the 4443 ** SCRIPTS processor. 4444 ** 4445 ** 4446 **========================================================== 4447 */ 4448 4449 static void ncr_start_next_ccb(struct ncb *np, struct lcb *lp, int maxn) 4450 { 4451 struct list_head *qp; 4452 struct ccb *cp; 4453 4454 if (lp->held_ccb) 4455 return; 4456 4457 while (maxn-- && lp->queuedccbs < lp->queuedepth) { 4458 qp = ncr_list_pop(&lp->wait_ccbq); 4459 if (!qp) 4460 break; 4461 ++lp->queuedccbs; 4462 cp = list_entry(qp, struct ccb, link_ccbq); 4463 list_add_tail(qp, &lp->busy_ccbq); 4464 lp->jump_ccb[cp->tag == NO_TAG ? 0 : cp->tag] = 4465 cpu_to_scr(CCB_PHYS (cp, restart)); 4466 ncr_put_start_queue(np, cp); 4467 } 4468 } 4469 4470 static void ncr_put_start_queue(struct ncb *np, struct ccb *cp) 4471 { 4472 u16 qidx; 4473 4474 /* 4475 ** insert into start queue. 4476 */ 4477 if (!np->squeueput) np->squeueput = 1; 4478 qidx = np->squeueput + 2; 4479 if (qidx >= MAX_START + MAX_START) qidx = 1; 4480 4481 np->scripth->tryloop [qidx] = cpu_to_scr(NCB_SCRIPT_PHYS (np, idle)); 4482 MEMORY_BARRIER(); 4483 np->scripth->tryloop [np->squeueput] = cpu_to_scr(CCB_PHYS (cp, start)); 4484 4485 np->squeueput = qidx; 4486 ++np->queuedccbs; 4487 cp->queued = 1; 4488 4489 if (DEBUG_FLAGS & DEBUG_QUEUE) 4490 printk ("%s: queuepos=%d.\n", ncr_name (np), np->squeueput); 4491 4492 /* 4493 ** Script processor may be waiting for reselect. 4494 ** Wake it up. 4495 */ 4496 MEMORY_BARRIER(); 4497 OUTB (nc_istat, SIGP); 4498 } 4499 4500 4501 static int ncr_reset_scsi_bus(struct ncb *np, int enab_int, int settle_delay) 4502 { 4503 u32 term; 4504 int retv = 0; 4505 4506 np->settle_time = jiffies + settle_delay * HZ; 4507 4508 if (bootverbose > 1) 4509 printk("%s: resetting, " 4510 "command processing suspended for %d seconds\n", 4511 ncr_name(np), settle_delay); 4512 4513 ncr_chip_reset(np, 100); 4514 udelay(2000); /* The 895 needs time for the bus mode to settle */ 4515 if (enab_int) 4516 OUTW (nc_sien, RST); 4517 /* 4518 ** Enable Tolerant, reset IRQD if present and 4519 ** properly set IRQ mode, prior to resetting the bus. 4520 */ 4521 OUTB (nc_stest3, TE); 4522 OUTB (nc_scntl1, CRST); 4523 udelay(200); 4524 4525 if (!driver_setup.bus_check) 4526 goto out; 4527 /* 4528 ** Check for no terminators or SCSI bus shorts to ground. 4529 ** Read SCSI data bus, data parity bits and control signals. 4530 ** We are expecting RESET to be TRUE and other signals to be 4531 ** FALSE. 4532 */ 4533 4534 term = INB(nc_sstat0); 4535 term = ((term & 2) << 7) + ((term & 1) << 17); /* rst sdp0 */ 4536 term |= ((INB(nc_sstat2) & 0x01) << 26) | /* sdp1 */ 4537 ((INW(nc_sbdl) & 0xff) << 9) | /* d7-0 */ 4538 ((INW(nc_sbdl) & 0xff00) << 10) | /* d15-8 */ 4539 INB(nc_sbcl); /* req ack bsy sel atn msg cd io */ 4540 4541 if (!(np->features & FE_WIDE)) 4542 term &= 0x3ffff; 4543 4544 if (term != (2<<7)) { 4545 printk("%s: suspicious SCSI data while resetting the BUS.\n", 4546 ncr_name(np)); 4547 printk("%s: %sdp0,d7-0,rst,req,ack,bsy,sel,atn,msg,c/d,i/o = " 4548 "0x%lx, expecting 0x%lx\n", 4549 ncr_name(np), 4550 (np->features & FE_WIDE) ? "dp1,d15-8," : "", 4551 (u_long)term, (u_long)(2<<7)); 4552 if (driver_setup.bus_check == 1) 4553 retv = 1; 4554 } 4555 out: 4556 OUTB (nc_scntl1, 0); 4557 return retv; 4558 } 4559 4560 /* 4561 * Start reset process. 4562 * If reset in progress do nothing. 4563 * The interrupt handler will reinitialize the chip. 4564 * The timeout handler will wait for settle_time before 4565 * clearing it and so resuming command processing. 4566 */ 4567 static void ncr_start_reset(struct ncb *np) 4568 { 4569 if (!np->settle_time) { 4570 ncr_reset_scsi_bus(np, 1, driver_setup.settle_delay); 4571 } 4572 } 4573 4574 /*========================================================== 4575 ** 4576 ** 4577 ** Reset the SCSI BUS. 4578 ** This is called from the generic SCSI driver. 4579 ** 4580 ** 4581 **========================================================== 4582 */ 4583 static int ncr_reset_bus (struct ncb *np, struct scsi_cmnd *cmd, int sync_reset) 4584 { 4585 /* struct scsi_device *device = cmd->device; */ 4586 struct ccb *cp; 4587 int found; 4588 4589 /* 4590 * Return immediately if reset is in progress. 4591 */ 4592 if (np->settle_time) { 4593 return FAILED; 4594 } 4595 /* 4596 * Start the reset process. 4597 * The script processor is then assumed to be stopped. 4598 * Commands will now be queued in the waiting list until a settle 4599 * delay of 2 seconds will be completed. 4600 */ 4601 ncr_start_reset(np); 4602 /* 4603 * First, look in the wakeup list 4604 */ 4605 for (found=0, cp=np->ccb; cp; cp=cp->link_ccb) { 4606 /* 4607 ** look for the ccb of this command. 4608 */ 4609 if (cp->host_status == HS_IDLE) continue; 4610 if (cp->cmd == cmd) { 4611 found = 1; 4612 break; 4613 } 4614 } 4615 /* 4616 * Then, look in the waiting list 4617 */ 4618 if (!found && retrieve_from_waiting_list(0, np, cmd)) 4619 found = 1; 4620 /* 4621 * Wake-up all awaiting commands with DID_RESET. 4622 */ 4623 reset_waiting_list(np); 4624 /* 4625 * Wake-up all pending commands with HS_RESET -> DID_RESET. 4626 */ 4627 ncr_wakeup(np, HS_RESET); 4628 /* 4629 * If the involved command was not in a driver queue, and the 4630 * scsi driver told us reset is synchronous, and the command is not 4631 * currently in the waiting list, complete it with DID_RESET status, 4632 * in order to keep it alive. 4633 */ 4634 if (!found && sync_reset && !retrieve_from_waiting_list(0, np, cmd)) { 4635 cmd->result = ScsiResult(DID_RESET, 0); 4636 ncr_queue_done_cmd(np, cmd); 4637 } 4638 4639 return SUCCESS; 4640 } 4641 4642 #if 0 /* unused and broken.. */ 4643 /*========================================================== 4644 ** 4645 ** 4646 ** Abort an SCSI command. 4647 ** This is called from the generic SCSI driver. 4648 ** 4649 ** 4650 **========================================================== 4651 */ 4652 static int ncr_abort_command (struct ncb *np, struct scsi_cmnd *cmd) 4653 { 4654 /* struct scsi_device *device = cmd->device; */ 4655 struct ccb *cp; 4656 int found; 4657 int retv; 4658 4659 /* 4660 * First, look for the scsi command in the waiting list 4661 */ 4662 if (remove_from_waiting_list(np, cmd)) { 4663 cmd->result = ScsiResult(DID_ABORT, 0); 4664 ncr_queue_done_cmd(np, cmd); 4665 return SCSI_ABORT_SUCCESS; 4666 } 4667 4668 /* 4669 * Then, look in the wakeup list 4670 */ 4671 for (found=0, cp=np->ccb; cp; cp=cp->link_ccb) { 4672 /* 4673 ** look for the ccb of this command. 4674 */ 4675 if (cp->host_status == HS_IDLE) continue; 4676 if (cp->cmd == cmd) { 4677 found = 1; 4678 break; 4679 } 4680 } 4681 4682 if (!found) { 4683 return SCSI_ABORT_NOT_RUNNING; 4684 } 4685 4686 if (np->settle_time) { 4687 return SCSI_ABORT_SNOOZE; 4688 } 4689 4690 /* 4691 ** If the CCB is active, patch schedule jumps for the 4692 ** script to abort the command. 4693 */ 4694 4695 switch(cp->host_status) { 4696 case HS_BUSY: 4697 case HS_NEGOTIATE: 4698 printk ("%s: abort ccb=%p (cancel)\n", ncr_name (np), cp); 4699 cp->start.schedule.l_paddr = 4700 cpu_to_scr(NCB_SCRIPTH_PHYS (np, cancel)); 4701 retv = SCSI_ABORT_PENDING; 4702 break; 4703 case HS_DISCONNECT: 4704 cp->restart.schedule.l_paddr = 4705 cpu_to_scr(NCB_SCRIPTH_PHYS (np, abort)); 4706 retv = SCSI_ABORT_PENDING; 4707 break; 4708 default: 4709 retv = SCSI_ABORT_NOT_RUNNING; 4710 break; 4711 4712 } 4713 4714 /* 4715 ** If there are no requests, the script 4716 ** processor will sleep on SEL_WAIT_RESEL. 4717 ** Let's wake it up, since it may have to work. 4718 */ 4719 OUTB (nc_istat, SIGP); 4720 4721 return retv; 4722 } 4723 #endif 4724 4725 static void ncr_detach(struct ncb *np) 4726 { 4727 struct ccb *cp; 4728 struct tcb *tp; 4729 struct lcb *lp; 4730 int target, lun; 4731 int i; 4732 char inst_name[16]; 4733 4734 /* Local copy so we don't access np after freeing it! */ 4735 strlcpy(inst_name, ncr_name(np), sizeof(inst_name)); 4736 4737 printk("%s: releasing host resources\n", ncr_name(np)); 4738 4739 /* 4740 ** Stop the ncr_timeout process 4741 ** Set release_stage to 1 and wait that ncr_timeout() set it to 2. 4742 */ 4743 4744 #ifdef DEBUG_NCR53C8XX 4745 printk("%s: stopping the timer\n", ncr_name(np)); 4746 #endif 4747 np->release_stage = 1; 4748 for (i = 50 ; i && np->release_stage != 2 ; i--) 4749 mdelay(100); 4750 if (np->release_stage != 2) 4751 printk("%s: the timer seems to be already stopped\n", ncr_name(np)); 4752 else np->release_stage = 2; 4753 4754 /* 4755 ** Disable chip interrupts 4756 */ 4757 4758 #ifdef DEBUG_NCR53C8XX 4759 printk("%s: disabling chip interrupts\n", ncr_name(np)); 4760 #endif 4761 OUTW (nc_sien , 0); 4762 OUTB (nc_dien , 0); 4763 4764 /* 4765 ** Reset NCR chip 4766 ** Restore bios setting for automatic clock detection. 4767 */ 4768 4769 printk("%s: resetting chip\n", ncr_name(np)); 4770 ncr_chip_reset(np, 100); 4771 4772 OUTB(nc_dmode, np->sv_dmode); 4773 OUTB(nc_dcntl, np->sv_dcntl); 4774 OUTB(nc_ctest0, np->sv_ctest0); 4775 OUTB(nc_ctest3, np->sv_ctest3); 4776 OUTB(nc_ctest4, np->sv_ctest4); 4777 OUTB(nc_ctest5, np->sv_ctest5); 4778 OUTB(nc_gpcntl, np->sv_gpcntl); 4779 OUTB(nc_stest2, np->sv_stest2); 4780 4781 ncr_selectclock(np, np->sv_scntl3); 4782 4783 /* 4784 ** Free allocated ccb(s) 4785 */ 4786 4787 while ((cp=np->ccb->link_ccb) != NULL) { 4788 np->ccb->link_ccb = cp->link_ccb; 4789 if (cp->host_status) { 4790 printk("%s: shall free an active ccb (host_status=%d)\n", 4791 ncr_name(np), cp->host_status); 4792 } 4793 #ifdef DEBUG_NCR53C8XX 4794 printk("%s: freeing ccb (%lx)\n", ncr_name(np), (u_long) cp); 4795 #endif 4796 m_free_dma(cp, sizeof(*cp), "CCB"); 4797 } 4798 4799 /* Free allocated tp(s) */ 4800 4801 for (target = 0; target < MAX_TARGET ; target++) { 4802 tp=&np->target[target]; 4803 for (lun = 0 ; lun < MAX_LUN ; lun++) { 4804 lp = tp->lp[lun]; 4805 if (lp) { 4806 #ifdef DEBUG_NCR53C8XX 4807 printk("%s: freeing lp (%lx)\n", ncr_name(np), (u_long) lp); 4808 #endif 4809 if (lp->jump_ccb != &lp->jump_ccb_0) 4810 m_free_dma(lp->jump_ccb,256,"JUMP_CCB"); 4811 m_free_dma(lp, sizeof(*lp), "LCB"); 4812 } 4813 } 4814 } 4815 4816 if (np->scripth0) 4817 m_free_dma(np->scripth0, sizeof(struct scripth), "SCRIPTH"); 4818 if (np->script0) 4819 m_free_dma(np->script0, sizeof(struct script), "SCRIPT"); 4820 if (np->ccb) 4821 m_free_dma(np->ccb, sizeof(struct ccb), "CCB"); 4822 m_free_dma(np, sizeof(struct ncb), "NCB"); 4823 4824 printk("%s: host resources successfully released\n", inst_name); 4825 } 4826 4827 /*========================================================== 4828 ** 4829 ** 4830 ** Complete execution of a SCSI command. 4831 ** Signal completion to the generic SCSI driver. 4832 ** 4833 ** 4834 **========================================================== 4835 */ 4836 4837 void ncr_complete (struct ncb *np, struct ccb *cp) 4838 { 4839 struct scsi_cmnd *cmd; 4840 struct tcb *tp; 4841 struct lcb *lp; 4842 4843 /* 4844 ** Sanity check 4845 */ 4846 4847 if (!cp || cp->magic != CCB_MAGIC || !cp->cmd) 4848 return; 4849 4850 /* 4851 ** Print minimal debug information. 4852 */ 4853 4854 if (DEBUG_FLAGS & DEBUG_TINY) 4855 printk ("CCB=%lx STAT=%x/%x\n", (unsigned long)cp, 4856 cp->host_status,cp->scsi_status); 4857 4858 /* 4859 ** Get command, target and lun pointers. 4860 */ 4861 4862 cmd = cp->cmd; 4863 cp->cmd = NULL; 4864 tp = &np->target[cmd->device->id]; 4865 lp = tp->lp[cmd->device->lun]; 4866 4867 /* 4868 ** We donnot queue more than 1 ccb per target 4869 ** with negotiation at any time. If this ccb was 4870 ** used for negotiation, clear this info in the tcb. 4871 */ 4872 4873 if (cp == tp->nego_cp) 4874 tp->nego_cp = NULL; 4875 4876 /* 4877 ** If auto-sense performed, change scsi status. 4878 */ 4879 if (cp->auto_sense) { 4880 cp->scsi_status = cp->auto_sense; 4881 } 4882 4883 /* 4884 ** If we were recovering from queue full or performing 4885 ** auto-sense, requeue skipped CCBs to the wait queue. 4886 */ 4887 4888 if (lp && lp->held_ccb) { 4889 if (cp == lp->held_ccb) { 4890 list_splice_init(&lp->skip_ccbq, &lp->wait_ccbq); 4891 lp->held_ccb = NULL; 4892 } 4893 } 4894 4895 /* 4896 ** Check for parity errors. 4897 */ 4898 4899 if (cp->parity_status > 1) { 4900 PRINT_ADDR(cmd, "%d parity error(s).\n",cp->parity_status); 4901 } 4902 4903 /* 4904 ** Check for extended errors. 4905 */ 4906 4907 if (cp->xerr_status != XE_OK) { 4908 switch (cp->xerr_status) { 4909 case XE_EXTRA_DATA: 4910 PRINT_ADDR(cmd, "extraneous data discarded.\n"); 4911 break; 4912 case XE_BAD_PHASE: 4913 PRINT_ADDR(cmd, "invalid scsi phase (4/5).\n"); 4914 break; 4915 default: 4916 PRINT_ADDR(cmd, "extended error %d.\n", 4917 cp->xerr_status); 4918 break; 4919 } 4920 if (cp->host_status==HS_COMPLETE) 4921 cp->host_status = HS_FAIL; 4922 } 4923 4924 /* 4925 ** Print out any error for debugging purpose. 4926 */ 4927 if (DEBUG_FLAGS & (DEBUG_RESULT|DEBUG_TINY)) { 4928 if (cp->host_status!=HS_COMPLETE || cp->scsi_status!=S_GOOD) { 4929 PRINT_ADDR(cmd, "ERROR: cmd=%x host_status=%x " 4930 "scsi_status=%x\n", cmd->cmnd[0], 4931 cp->host_status, cp->scsi_status); 4932 } 4933 } 4934 4935 /* 4936 ** Check the status. 4937 */ 4938 if ( (cp->host_status == HS_COMPLETE) 4939 && (cp->scsi_status == S_GOOD || 4940 cp->scsi_status == S_COND_MET)) { 4941 /* 4942 * All went well (GOOD status). 4943 * CONDITION MET status is returned on 4944 * `Pre-Fetch' or `Search data' success. 4945 */ 4946 cmd->result = ScsiResult(DID_OK, cp->scsi_status); 4947 4948 /* 4949 ** @RESID@ 4950 ** Could dig out the correct value for resid, 4951 ** but it would be quite complicated. 4952 */ 4953 /* if (cp->phys.header.lastp != cp->phys.header.goalp) */ 4954 4955 /* 4956 ** Allocate the lcb if not yet. 4957 */ 4958 if (!lp) 4959 ncr_alloc_lcb (np, cmd->device->id, cmd->device->lun); 4960 4961 tp->bytes += cp->data_len; 4962 tp->transfers ++; 4963 4964 /* 4965 ** If tags was reduced due to queue full, 4966 ** increase tags if 1000 good status received. 4967 */ 4968 if (lp && lp->usetags && lp->numtags < lp->maxtags) { 4969 ++lp->num_good; 4970 if (lp->num_good >= 1000) { 4971 lp->num_good = 0; 4972 ++lp->numtags; 4973 ncr_setup_tags (np, cmd->device); 4974 } 4975 } 4976 } else if ((cp->host_status == HS_COMPLETE) 4977 && (cp->scsi_status == S_CHECK_COND)) { 4978 /* 4979 ** Check condition code 4980 */ 4981 cmd->result = ScsiResult(DID_OK, S_CHECK_COND); 4982 4983 /* 4984 ** Copy back sense data to caller's buffer. 4985 */ 4986 memcpy(cmd->sense_buffer, cp->sense_buf, 4987 min(sizeof(cmd->sense_buffer), sizeof(cp->sense_buf))); 4988 4989 if (DEBUG_FLAGS & (DEBUG_RESULT|DEBUG_TINY)) { 4990 u_char * p = (u_char*) & cmd->sense_buffer; 4991 int i; 4992 PRINT_ADDR(cmd, "sense data:"); 4993 for (i=0; i<14; i++) printk (" %x", *p++); 4994 printk (".\n"); 4995 } 4996 } else if ((cp->host_status == HS_COMPLETE) 4997 && (cp->scsi_status == S_CONFLICT)) { 4998 /* 4999 ** Reservation Conflict condition code 5000 */ 5001 cmd->result = ScsiResult(DID_OK, S_CONFLICT); 5002 5003 } else if ((cp->host_status == HS_COMPLETE) 5004 && (cp->scsi_status == S_BUSY || 5005 cp->scsi_status == S_QUEUE_FULL)) { 5006 5007 /* 5008 ** Target is busy. 5009 */ 5010 cmd->result = ScsiResult(DID_OK, cp->scsi_status); 5011 5012 } else if ((cp->host_status == HS_SEL_TIMEOUT) 5013 || (cp->host_status == HS_TIMEOUT)) { 5014 5015 /* 5016 ** No response 5017 */ 5018 cmd->result = ScsiResult(DID_TIME_OUT, cp->scsi_status); 5019 5020 } else if (cp->host_status == HS_RESET) { 5021 5022 /* 5023 ** SCSI bus reset 5024 */ 5025 cmd->result = ScsiResult(DID_RESET, cp->scsi_status); 5026 5027 } else if (cp->host_status == HS_ABORTED) { 5028 5029 /* 5030 ** Transfer aborted 5031 */ 5032 cmd->result = ScsiResult(DID_ABORT, cp->scsi_status); 5033 5034 } else { 5035 5036 /* 5037 ** Other protocol messes 5038 */ 5039 PRINT_ADDR(cmd, "COMMAND FAILED (%x %x) @%p.\n", 5040 cp->host_status, cp->scsi_status, cp); 5041 5042 cmd->result = ScsiResult(DID_ERROR, cp->scsi_status); 5043 } 5044 5045 /* 5046 ** trace output 5047 */ 5048 5049 if (tp->usrflag & UF_TRACE) { 5050 u_char * p; 5051 int i; 5052 PRINT_ADDR(cmd, " CMD:"); 5053 p = (u_char*) &cmd->cmnd[0]; 5054 for (i=0; i<cmd->cmd_len; i++) printk (" %x", *p++); 5055 5056 if (cp->host_status==HS_COMPLETE) { 5057 switch (cp->scsi_status) { 5058 case S_GOOD: 5059 printk (" GOOD"); 5060 break; 5061 case S_CHECK_COND: 5062 printk (" SENSE:"); 5063 p = (u_char*) &cmd->sense_buffer; 5064 for (i=0; i<14; i++) 5065 printk (" %x", *p++); 5066 break; 5067 default: 5068 printk (" STAT: %x\n", cp->scsi_status); 5069 break; 5070 } 5071 } else printk (" HOSTERROR: %x", cp->host_status); 5072 printk ("\n"); 5073 } 5074 5075 /* 5076 ** Free this ccb 5077 */ 5078 ncr_free_ccb (np, cp); 5079 5080 /* 5081 ** requeue awaiting scsi commands for this lun. 5082 */ 5083 if (lp && lp->queuedccbs < lp->queuedepth && 5084 !list_empty(&lp->wait_ccbq)) 5085 ncr_start_next_ccb(np, lp, 2); 5086 5087 /* 5088 ** requeue awaiting scsi commands for this controller. 5089 */ 5090 if (np->waiting_list) 5091 requeue_waiting_list(np); 5092 5093 /* 5094 ** signal completion to generic driver. 5095 */ 5096 ncr_queue_done_cmd(np, cmd); 5097 } 5098 5099 /*========================================================== 5100 ** 5101 ** 5102 ** Signal all (or one) control block done. 5103 ** 5104 ** 5105 **========================================================== 5106 */ 5107 5108 /* 5109 ** This CCB has been skipped by the NCR. 5110 ** Queue it in the correponding unit queue. 5111 */ 5112 static void ncr_ccb_skipped(struct ncb *np, struct ccb *cp) 5113 { 5114 struct tcb *tp = &np->target[cp->target]; 5115 struct lcb *lp = tp->lp[cp->lun]; 5116 5117 if (lp && cp != np->ccb) { 5118 cp->host_status &= ~HS_SKIPMASK; 5119 cp->start.schedule.l_paddr = 5120 cpu_to_scr(NCB_SCRIPT_PHYS (np, select)); 5121 list_move_tail(&cp->link_ccbq, &lp->skip_ccbq); 5122 if (cp->queued) { 5123 --lp->queuedccbs; 5124 } 5125 } 5126 if (cp->queued) { 5127 --np->queuedccbs; 5128 cp->queued = 0; 5129 } 5130 } 5131 5132 /* 5133 ** The NCR has completed CCBs. 5134 ** Look at the DONE QUEUE if enabled, otherwise scan all CCBs 5135 */ 5136 void ncr_wakeup_done (struct ncb *np) 5137 { 5138 struct ccb *cp; 5139 #ifdef SCSI_NCR_CCB_DONE_SUPPORT 5140 int i, j; 5141 5142 i = np->ccb_done_ic; 5143 while (1) { 5144 j = i+1; 5145 if (j >= MAX_DONE) 5146 j = 0; 5147 5148 cp = np->ccb_done[j]; 5149 if (!CCB_DONE_VALID(cp)) 5150 break; 5151 5152 np->ccb_done[j] = (struct ccb *)CCB_DONE_EMPTY; 5153 np->scripth->done_queue[5*j + 4] = 5154 cpu_to_scr(NCB_SCRIPT_PHYS (np, done_plug)); 5155 MEMORY_BARRIER(); 5156 np->scripth->done_queue[5*i + 4] = 5157 cpu_to_scr(NCB_SCRIPT_PHYS (np, done_end)); 5158 5159 if (cp->host_status & HS_DONEMASK) 5160 ncr_complete (np, cp); 5161 else if (cp->host_status & HS_SKIPMASK) 5162 ncr_ccb_skipped (np, cp); 5163 5164 i = j; 5165 } 5166 np->ccb_done_ic = i; 5167 #else 5168 cp = np->ccb; 5169 while (cp) { 5170 if (cp->host_status & HS_DONEMASK) 5171 ncr_complete (np, cp); 5172 else if (cp->host_status & HS_SKIPMASK) 5173 ncr_ccb_skipped (np, cp); 5174 cp = cp->link_ccb; 5175 } 5176 #endif 5177 } 5178 5179 /* 5180 ** Complete all active CCBs. 5181 */ 5182 void ncr_wakeup (struct ncb *np, u_long code) 5183 { 5184 struct ccb *cp = np->ccb; 5185 5186 while (cp) { 5187 if (cp->host_status != HS_IDLE) { 5188 cp->host_status = code; 5189 ncr_complete (np, cp); 5190 } 5191 cp = cp->link_ccb; 5192 } 5193 } 5194 5195 /* 5196 ** Reset ncr chip. 5197 */ 5198 5199 /* Some initialisation must be done immediately following reset, for 53c720, 5200 * at least. EA (dcntl bit 5) isn't set here as it is set once only in 5201 * the _detect function. 5202 */ 5203 static void ncr_chip_reset(struct ncb *np, int delay) 5204 { 5205 OUTB (nc_istat, SRST); 5206 udelay(delay); 5207 OUTB (nc_istat, 0 ); 5208 5209 if (np->features & FE_EHP) 5210 OUTB (nc_ctest0, EHP); 5211 if (np->features & FE_MUX) 5212 OUTB (nc_ctest4, MUX); 5213 } 5214 5215 5216 /*========================================================== 5217 ** 5218 ** 5219 ** Start NCR chip. 5220 ** 5221 ** 5222 **========================================================== 5223 */ 5224 5225 void ncr_init (struct ncb *np, int reset, char * msg, u_long code) 5226 { 5227 int i; 5228 5229 /* 5230 ** Reset chip if asked, otherwise just clear fifos. 5231 */ 5232 5233 if (reset) { 5234 OUTB (nc_istat, SRST); 5235 udelay(100); 5236 } 5237 else { 5238 OUTB (nc_stest3, TE|CSF); 5239 OUTONB (nc_ctest3, CLF); 5240 } 5241 5242 /* 5243 ** Message. 5244 */ 5245 5246 if (msg) printk (KERN_INFO "%s: restart (%s).\n", ncr_name (np), msg); 5247 5248 /* 5249 ** Clear Start Queue 5250 */ 5251 np->queuedepth = MAX_START - 1; /* 1 entry needed as end marker */ 5252 for (i = 1; i < MAX_START + MAX_START; i += 2) 5253 np->scripth0->tryloop[i] = 5254 cpu_to_scr(NCB_SCRIPT_PHYS (np, idle)); 5255 5256 /* 5257 ** Start at first entry. 5258 */ 5259 np->squeueput = 0; 5260 np->script0->startpos[0] = cpu_to_scr(NCB_SCRIPTH_PHYS (np, tryloop)); 5261 5262 #ifdef SCSI_NCR_CCB_DONE_SUPPORT 5263 /* 5264 ** Clear Done Queue 5265 */ 5266 for (i = 0; i < MAX_DONE; i++) { 5267 np->ccb_done[i] = (struct ccb *)CCB_DONE_EMPTY; 5268 np->scripth0->done_queue[5*i + 4] = 5269 cpu_to_scr(NCB_SCRIPT_PHYS (np, done_end)); 5270 } 5271 #endif 5272 5273 /* 5274 ** Start at first entry. 5275 */ 5276 np->script0->done_pos[0] = cpu_to_scr(NCB_SCRIPTH_PHYS (np,done_queue)); 5277 np->ccb_done_ic = MAX_DONE-1; 5278 np->scripth0->done_queue[5*(MAX_DONE-1) + 4] = 5279 cpu_to_scr(NCB_SCRIPT_PHYS (np, done_plug)); 5280 5281 /* 5282 ** Wakeup all pending jobs. 5283 */ 5284 ncr_wakeup (np, code); 5285 5286 /* 5287 ** Init chip. 5288 */ 5289 5290 /* 5291 ** Remove reset; big delay because the 895 needs time for the 5292 ** bus mode to settle 5293 */ 5294 ncr_chip_reset(np, 2000); 5295 5296 OUTB (nc_scntl0, np->rv_scntl0 | 0xc0); 5297 /* full arb., ena parity, par->ATN */ 5298 OUTB (nc_scntl1, 0x00); /* odd parity, and remove CRST!! */ 5299 5300 ncr_selectclock(np, np->rv_scntl3); /* Select SCSI clock */ 5301 5302 OUTB (nc_scid , RRE|np->myaddr); /* Adapter SCSI address */ 5303 OUTW (nc_respid, 1ul<<np->myaddr); /* Id to respond to */ 5304 OUTB (nc_istat , SIGP ); /* Signal Process */ 5305 OUTB (nc_dmode , np->rv_dmode); /* Burst length, dma mode */ 5306 OUTB (nc_ctest5, np->rv_ctest5); /* Large fifo + large burst */ 5307 5308 OUTB (nc_dcntl , NOCOM|np->rv_dcntl); /* Protect SFBR */ 5309 OUTB (nc_ctest0, np->rv_ctest0); /* 720: CDIS and EHP */ 5310 OUTB (nc_ctest3, np->rv_ctest3); /* Write and invalidate */ 5311 OUTB (nc_ctest4, np->rv_ctest4); /* Master parity checking */ 5312 5313 OUTB (nc_stest2, EXT|np->rv_stest2); /* Extended Sreq/Sack filtering */ 5314 OUTB (nc_stest3, TE); /* TolerANT enable */ 5315 OUTB (nc_stime0, 0x0c ); /* HTH disabled STO 0.25 sec */ 5316 5317 /* 5318 ** Disable disconnects. 5319 */ 5320 5321 np->disc = 0; 5322 5323 /* 5324 ** Enable GPIO0 pin for writing if LED support. 5325 */ 5326 5327 if (np->features & FE_LED0) { 5328 OUTOFFB (nc_gpcntl, 0x01); 5329 } 5330 5331 /* 5332 ** enable ints 5333 */ 5334 5335 OUTW (nc_sien , STO|HTH|MA|SGE|UDC|RST|PAR); 5336 OUTB (nc_dien , MDPE|BF|ABRT|SSI|SIR|IID); 5337 5338 /* 5339 ** Fill in target structure. 5340 ** Reinitialize usrsync. 5341 ** Reinitialize usrwide. 5342 ** Prepare sync negotiation according to actual SCSI bus mode. 5343 */ 5344 5345 for (i=0;i<MAX_TARGET;i++) { 5346 struct tcb *tp = &np->target[i]; 5347 5348 tp->sval = 0; 5349 tp->wval = np->rv_scntl3; 5350 5351 if (tp->usrsync != 255) { 5352 if (tp->usrsync <= np->maxsync) { 5353 if (tp->usrsync < np->minsync) { 5354 tp->usrsync = np->minsync; 5355 } 5356 } 5357 else 5358 tp->usrsync = 255; 5359 } 5360 5361 if (tp->usrwide > np->maxwide) 5362 tp->usrwide = np->maxwide; 5363 5364 } 5365 5366 /* 5367 ** Start script processor. 5368 */ 5369 if (np->paddr2) { 5370 if (bootverbose) 5371 printk ("%s: Downloading SCSI SCRIPTS.\n", 5372 ncr_name(np)); 5373 OUTL (nc_scratcha, vtobus(np->script0)); 5374 OUTL_DSP (NCB_SCRIPTH_PHYS (np, start_ram)); 5375 } 5376 else 5377 OUTL_DSP (NCB_SCRIPT_PHYS (np, start)); 5378 } 5379 5380 /*========================================================== 5381 ** 5382 ** Prepare the negotiation values for wide and 5383 ** synchronous transfers. 5384 ** 5385 **========================================================== 5386 */ 5387 5388 static void ncr_negotiate (struct ncb* np, struct tcb* tp) 5389 { 5390 /* 5391 ** minsync unit is 4ns ! 5392 */ 5393 5394 u_long minsync = tp->usrsync; 5395 5396 /* 5397 ** SCSI bus mode limit 5398 */ 5399 5400 if (np->scsi_mode && np->scsi_mode == SMODE_SE) { 5401 if (minsync < 12) minsync = 12; 5402 } 5403 5404 /* 5405 ** our limit .. 5406 */ 5407 5408 if (minsync < np->minsync) 5409 minsync = np->minsync; 5410 5411 /* 5412 ** divider limit 5413 */ 5414 5415 if (minsync > np->maxsync) 5416 minsync = 255; 5417 5418 if (tp->maxoffs > np->maxoffs) 5419 tp->maxoffs = np->maxoffs; 5420 5421 tp->minsync = minsync; 5422 tp->maxoffs = (minsync<255 ? tp->maxoffs : 0); 5423 5424 /* 5425 ** period=0: has to negotiate sync transfer 5426 */ 5427 5428 tp->period=0; 5429 5430 /* 5431 ** widedone=0: has to negotiate wide transfer 5432 */ 5433 tp->widedone=0; 5434 } 5435 5436 /*========================================================== 5437 ** 5438 ** Get clock factor and sync divisor for a given 5439 ** synchronous factor period. 5440 ** Returns the clock factor (in sxfer) and scntl3 5441 ** synchronous divisor field. 5442 ** 5443 **========================================================== 5444 */ 5445 5446 static void ncr_getsync(struct ncb *np, u_char sfac, u_char *fakp, u_char *scntl3p) 5447 { 5448 u_long clk = np->clock_khz; /* SCSI clock frequency in kHz */ 5449 int div = np->clock_divn; /* Number of divisors supported */ 5450 u_long fak; /* Sync factor in sxfer */ 5451 u_long per; /* Period in tenths of ns */ 5452 u_long kpc; /* (per * clk) */ 5453 5454 /* 5455 ** Compute the synchronous period in tenths of nano-seconds 5456 */ 5457 if (sfac <= 10) per = 250; 5458 else if (sfac == 11) per = 303; 5459 else if (sfac == 12) per = 500; 5460 else per = 40 * sfac; 5461 5462 /* 5463 ** Look for the greatest clock divisor that allows an 5464 ** input speed faster than the period. 5465 */ 5466 kpc = per * clk; 5467 while (--div >= 0) 5468 if (kpc >= (div_10M[div] << 2)) break; 5469 5470 /* 5471 ** Calculate the lowest clock factor that allows an output 5472 ** speed not faster than the period. 5473 */ 5474 fak = (kpc - 1) / div_10M[div] + 1; 5475 5476 #if 0 /* This optimization does not seem very useful */ 5477 5478 per = (fak * div_10M[div]) / clk; 5479 5480 /* 5481 ** Why not to try the immediate lower divisor and to choose 5482 ** the one that allows the fastest output speed ? 5483 ** We don't want input speed too much greater than output speed. 5484 */ 5485 if (div >= 1 && fak < 8) { 5486 u_long fak2, per2; 5487 fak2 = (kpc - 1) / div_10M[div-1] + 1; 5488 per2 = (fak2 * div_10M[div-1]) / clk; 5489 if (per2 < per && fak2 <= 8) { 5490 fak = fak2; 5491 per = per2; 5492 --div; 5493 } 5494 } 5495 #endif 5496 5497 if (fak < 4) fak = 4; /* Should never happen, too bad ... */ 5498 5499 /* 5500 ** Compute and return sync parameters for the ncr 5501 */ 5502 *fakp = fak - 4; 5503 *scntl3p = ((div+1) << 4) + (sfac < 25 ? 0x80 : 0); 5504 } 5505 5506 5507 /*========================================================== 5508 ** 5509 ** Set actual values, sync status and patch all ccbs of 5510 ** a target according to new sync/wide agreement. 5511 ** 5512 **========================================================== 5513 */ 5514 5515 static void ncr_set_sync_wide_status (struct ncb *np, u_char target) 5516 { 5517 struct ccb *cp; 5518 struct tcb *tp = &np->target[target]; 5519 5520 /* 5521 ** set actual value and sync_status 5522 */ 5523 OUTB (nc_sxfer, tp->sval); 5524 np->sync_st = tp->sval; 5525 OUTB (nc_scntl3, tp->wval); 5526 np->wide_st = tp->wval; 5527 5528 /* 5529 ** patch ALL ccbs of this target. 5530 */ 5531 for (cp = np->ccb; cp; cp = cp->link_ccb) { 5532 if (!cp->cmd) continue; 5533 if (scmd_id(cp->cmd) != target) continue; 5534 #if 0 5535 cp->sync_status = tp->sval; 5536 cp->wide_status = tp->wval; 5537 #endif 5538 cp->phys.select.sel_scntl3 = tp->wval; 5539 cp->phys.select.sel_sxfer = tp->sval; 5540 } 5541 } 5542 5543 /*========================================================== 5544 ** 5545 ** Switch sync mode for current job and it's target 5546 ** 5547 **========================================================== 5548 */ 5549 5550 static void ncr_setsync (struct ncb *np, struct ccb *cp, u_char scntl3, u_char sxfer) 5551 { 5552 struct scsi_cmnd *cmd = cp->cmd; 5553 struct tcb *tp; 5554 u_char target = INB (nc_sdid) & 0x0f; 5555 u_char idiv; 5556 5557 BUG_ON(target != (scmd_id(cmd) & 0xf)); 5558 5559 tp = &np->target[target]; 5560 5561 if (!scntl3 || !(sxfer & 0x1f)) 5562 scntl3 = np->rv_scntl3; 5563 scntl3 = (scntl3 & 0xf0) | (tp->wval & EWS) | (np->rv_scntl3 & 0x07); 5564 5565 /* 5566 ** Deduce the value of controller sync period from scntl3. 5567 ** period is in tenths of nano-seconds. 5568 */ 5569 5570 idiv = ((scntl3 >> 4) & 0x7); 5571 if ((sxfer & 0x1f) && idiv) 5572 tp->period = (((sxfer>>5)+4)*div_10M[idiv-1])/np->clock_khz; 5573 else 5574 tp->period = 0xffff; 5575 5576 /* Stop there if sync parameters are unchanged */ 5577 if (tp->sval == sxfer && tp->wval == scntl3) 5578 return; 5579 tp->sval = sxfer; 5580 tp->wval = scntl3; 5581 5582 if (sxfer & 0x01f) { 5583 /* Disable extended Sreq/Sack filtering */ 5584 if (tp->period <= 2000) 5585 OUTOFFB(nc_stest2, EXT); 5586 } 5587 5588 spi_display_xfer_agreement(tp->starget); 5589 5590 /* 5591 ** set actual value and sync_status 5592 ** patch ALL ccbs of this target. 5593 */ 5594 ncr_set_sync_wide_status(np, target); 5595 } 5596 5597 /*========================================================== 5598 ** 5599 ** Switch wide mode for current job and it's target 5600 ** SCSI specs say: a SCSI device that accepts a WDTR 5601 ** message shall reset the synchronous agreement to 5602 ** asynchronous mode. 5603 ** 5604 **========================================================== 5605 */ 5606 5607 static void ncr_setwide (struct ncb *np, struct ccb *cp, u_char wide, u_char ack) 5608 { 5609 struct scsi_cmnd *cmd = cp->cmd; 5610 u16 target = INB (nc_sdid) & 0x0f; 5611 struct tcb *tp; 5612 u_char scntl3; 5613 u_char sxfer; 5614 5615 BUG_ON(target != (scmd_id(cmd) & 0xf)); 5616 5617 tp = &np->target[target]; 5618 tp->widedone = wide+1; 5619 scntl3 = (tp->wval & (~EWS)) | (wide ? EWS : 0); 5620 5621 sxfer = ack ? 0 : tp->sval; 5622 5623 /* 5624 ** Stop there if sync/wide parameters are unchanged 5625 */ 5626 if (tp->sval == sxfer && tp->wval == scntl3) return; 5627 tp->sval = sxfer; 5628 tp->wval = scntl3; 5629 5630 /* 5631 ** Bells and whistles ;-) 5632 */ 5633 if (bootverbose >= 2) { 5634 dev_info(&cmd->device->sdev_target->dev, "WIDE SCSI %sabled.\n", 5635 (scntl3 & EWS) ? "en" : "dis"); 5636 } 5637 5638 /* 5639 ** set actual value and sync_status 5640 ** patch ALL ccbs of this target. 5641 */ 5642 ncr_set_sync_wide_status(np, target); 5643 } 5644 5645 /*========================================================== 5646 ** 5647 ** Switch tagged mode for a target. 5648 ** 5649 **========================================================== 5650 */ 5651 5652 static void ncr_setup_tags (struct ncb *np, struct scsi_device *sdev) 5653 { 5654 unsigned char tn = sdev->id, ln = sdev->lun; 5655 struct tcb *tp = &np->target[tn]; 5656 struct lcb *lp = tp->lp[ln]; 5657 u_char reqtags, maxdepth; 5658 5659 /* 5660 ** Just in case ... 5661 */ 5662 if ((!tp) || (!lp) || !sdev) 5663 return; 5664 5665 /* 5666 ** If SCSI device queue depth is not yet set, leave here. 5667 */ 5668 if (!lp->scdev_depth) 5669 return; 5670 5671 /* 5672 ** Donnot allow more tags than the SCSI driver can queue 5673 ** for this device. 5674 ** Donnot allow more tags than we can handle. 5675 */ 5676 maxdepth = lp->scdev_depth; 5677 if (maxdepth > lp->maxnxs) maxdepth = lp->maxnxs; 5678 if (lp->maxtags > maxdepth) lp->maxtags = maxdepth; 5679 if (lp->numtags > maxdepth) lp->numtags = maxdepth; 5680 5681 /* 5682 ** only devices conformant to ANSI Version >= 2 5683 ** only devices capable of tagged commands 5684 ** only if enabled by user .. 5685 */ 5686 if (sdev->tagged_supported && lp->numtags > 1) { 5687 reqtags = lp->numtags; 5688 } else { 5689 reqtags = 1; 5690 } 5691 5692 /* 5693 ** Update max number of tags 5694 */ 5695 lp->numtags = reqtags; 5696 if (lp->numtags > lp->maxtags) 5697 lp->maxtags = lp->numtags; 5698 5699 /* 5700 ** If we want to switch tag mode, we must wait 5701 ** for no CCB to be active. 5702 */ 5703 if (reqtags > 1 && lp->usetags) { /* Stay in tagged mode */ 5704 if (lp->queuedepth == reqtags) /* Already announced */ 5705 return; 5706 lp->queuedepth = reqtags; 5707 } 5708 else if (reqtags <= 1 && !lp->usetags) { /* Stay in untagged mode */ 5709 lp->queuedepth = reqtags; 5710 return; 5711 } 5712 else { /* Want to switch tag mode */ 5713 if (lp->busyccbs) /* If not yet safe, return */ 5714 return; 5715 lp->queuedepth = reqtags; 5716 lp->usetags = reqtags > 1 ? 1 : 0; 5717 } 5718 5719 /* 5720 ** Patch the lun mini-script, according to tag mode. 5721 */ 5722 lp->jump_tag.l_paddr = lp->usetags? 5723 cpu_to_scr(NCB_SCRIPT_PHYS(np, resel_tag)) : 5724 cpu_to_scr(NCB_SCRIPT_PHYS(np, resel_notag)); 5725 5726 /* 5727 ** Announce change to user. 5728 */ 5729 if (bootverbose) { 5730 if (lp->usetags) { 5731 dev_info(&sdev->sdev_gendev, 5732 "tagged command queue depth set to %d\n", 5733 reqtags); 5734 } else { 5735 dev_info(&sdev->sdev_gendev, 5736 "tagged command queueing disabled\n"); 5737 } 5738 } 5739 } 5740 5741 /*========================================================== 5742 ** 5743 ** 5744 ** ncr timeout handler. 5745 ** 5746 ** 5747 **========================================================== 5748 ** 5749 ** Misused to keep the driver running when 5750 ** interrupts are not configured correctly. 5751 ** 5752 **---------------------------------------------------------- 5753 */ 5754 5755 static void ncr_timeout (struct ncb *np) 5756 { 5757 u_long thistime = jiffies; 5758 5759 /* 5760 ** If release process in progress, let's go 5761 ** Set the release stage from 1 to 2 to synchronize 5762 ** with the release process. 5763 */ 5764 5765 if (np->release_stage) { 5766 if (np->release_stage == 1) np->release_stage = 2; 5767 return; 5768 } 5769 5770 np->timer.expires = jiffies + SCSI_NCR_TIMER_INTERVAL; 5771 add_timer(&np->timer); 5772 5773 /* 5774 ** If we are resetting the ncr, wait for settle_time before 5775 ** clearing it. Then command processing will be resumed. 5776 */ 5777 if (np->settle_time) { 5778 if (np->settle_time <= thistime) { 5779 if (bootverbose > 1) 5780 printk("%s: command processing resumed\n", ncr_name(np)); 5781 np->settle_time = 0; 5782 np->disc = 1; 5783 requeue_waiting_list(np); 5784 } 5785 return; 5786 } 5787 5788 /* 5789 ** Since the generic scsi driver only allows us 0.5 second 5790 ** to perform abort of a command, we must look at ccbs about 5791 ** every 0.25 second. 5792 */ 5793 if (np->lasttime + 4*HZ < thistime) { 5794 /* 5795 ** block ncr interrupts 5796 */ 5797 np->lasttime = thistime; 5798 } 5799 5800 #ifdef SCSI_NCR_BROKEN_INTR 5801 if (INB(nc_istat) & (INTF|SIP|DIP)) { 5802 5803 /* 5804 ** Process pending interrupts. 5805 */ 5806 if (DEBUG_FLAGS & DEBUG_TINY) printk ("{"); 5807 ncr_exception (np); 5808 if (DEBUG_FLAGS & DEBUG_TINY) printk ("}"); 5809 } 5810 #endif /* SCSI_NCR_BROKEN_INTR */ 5811 } 5812 5813 /*========================================================== 5814 ** 5815 ** log message for real hard errors 5816 ** 5817 ** "ncr0 targ 0?: ERROR (ds:si) (so-si-sd) (sxfer/scntl3) @ name (dsp:dbc)." 5818 ** " reg: r0 r1 r2 r3 r4 r5 r6 ..... rf." 5819 ** 5820 ** exception register: 5821 ** ds: dstat 5822 ** si: sist 5823 ** 5824 ** SCSI bus lines: 5825 ** so: control lines as driver by NCR. 5826 ** si: control lines as seen by NCR. 5827 ** sd: scsi data lines as seen by NCR. 5828 ** 5829 ** wide/fastmode: 5830 ** sxfer: (see the manual) 5831 ** scntl3: (see the manual) 5832 ** 5833 ** current script command: 5834 ** dsp: script address (relative to start of script). 5835 ** dbc: first word of script command. 5836 ** 5837 ** First 16 register of the chip: 5838 ** r0..rf 5839 ** 5840 **========================================================== 5841 */ 5842 5843 static void ncr_log_hard_error(struct ncb *np, u16 sist, u_char dstat) 5844 { 5845 u32 dsp; 5846 int script_ofs; 5847 int script_size; 5848 char *script_name; 5849 u_char *script_base; 5850 int i; 5851 5852 dsp = INL (nc_dsp); 5853 5854 if (dsp > np->p_script && dsp <= np->p_script + sizeof(struct script)) { 5855 script_ofs = dsp - np->p_script; 5856 script_size = sizeof(struct script); 5857 script_base = (u_char *) np->script0; 5858 script_name = "script"; 5859 } 5860 else if (np->p_scripth < dsp && 5861 dsp <= np->p_scripth + sizeof(struct scripth)) { 5862 script_ofs = dsp - np->p_scripth; 5863 script_size = sizeof(struct scripth); 5864 script_base = (u_char *) np->scripth0; 5865 script_name = "scripth"; 5866 } else { 5867 script_ofs = dsp; 5868 script_size = 0; 5869 script_base = NULL; 5870 script_name = "mem"; 5871 } 5872 5873 printk ("%s:%d: ERROR (%x:%x) (%x-%x-%x) (%x/%x) @ (%s %x:%08x).\n", 5874 ncr_name (np), (unsigned)INB (nc_sdid)&0x0f, dstat, sist, 5875 (unsigned)INB (nc_socl), (unsigned)INB (nc_sbcl), (unsigned)INB (nc_sbdl), 5876 (unsigned)INB (nc_sxfer),(unsigned)INB (nc_scntl3), script_name, script_ofs, 5877 (unsigned)INL (nc_dbc)); 5878 5879 if (((script_ofs & 3) == 0) && 5880 (unsigned)script_ofs < script_size) { 5881 printk ("%s: script cmd = %08x\n", ncr_name(np), 5882 scr_to_cpu((int) *(ncrcmd *)(script_base + script_ofs))); 5883 } 5884 5885 printk ("%s: regdump:", ncr_name(np)); 5886 for (i=0; i<16;i++) 5887 printk (" %02x", (unsigned)INB_OFF(i)); 5888 printk (".\n"); 5889 } 5890 5891 /*============================================================ 5892 ** 5893 ** ncr chip exception handler. 5894 ** 5895 **============================================================ 5896 ** 5897 ** In normal cases, interrupt conditions occur one at a 5898 ** time. The ncr is able to stack in some extra registers 5899 ** other interrupts that will occurs after the first one. 5900 ** But severall interrupts may occur at the same time. 5901 ** 5902 ** We probably should only try to deal with the normal 5903 ** case, but it seems that multiple interrupts occur in 5904 ** some cases that are not abnormal at all. 5905 ** 5906 ** The most frequent interrupt condition is Phase Mismatch. 5907 ** We should want to service this interrupt quickly. 5908 ** A SCSI parity error may be delivered at the same time. 5909 ** The SIR interrupt is not very frequent in this driver, 5910 ** since the INTFLY is likely used for command completion 5911 ** signaling. 5912 ** The Selection Timeout interrupt may be triggered with 5913 ** IID and/or UDC. 5914 ** The SBMC interrupt (SCSI Bus Mode Change) may probably 5915 ** occur at any time. 5916 ** 5917 ** This handler try to deal as cleverly as possible with all 5918 ** the above. 5919 ** 5920 **============================================================ 5921 */ 5922 5923 void ncr_exception (struct ncb *np) 5924 { 5925 u_char istat, dstat; 5926 u16 sist; 5927 int i; 5928 5929 /* 5930 ** interrupt on the fly ? 5931 ** Since the global header may be copied back to a CCB 5932 ** using a posted PCI memory write, the last operation on 5933 ** the istat register is a READ in order to flush posted 5934 ** PCI write commands. 5935 */ 5936 istat = INB (nc_istat); 5937 if (istat & INTF) { 5938 OUTB (nc_istat, (istat & SIGP) | INTF); 5939 istat = INB (nc_istat); 5940 if (DEBUG_FLAGS & DEBUG_TINY) printk ("F "); 5941 ncr_wakeup_done (np); 5942 } 5943 5944 if (!(istat & (SIP|DIP))) 5945 return; 5946 5947 if (istat & CABRT) 5948 OUTB (nc_istat, CABRT); 5949 5950 /* 5951 ** Steinbach's Guideline for Systems Programming: 5952 ** Never test for an error condition you don't know how to handle. 5953 */ 5954 5955 sist = (istat & SIP) ? INW (nc_sist) : 0; 5956 dstat = (istat & DIP) ? INB (nc_dstat) : 0; 5957 5958 if (DEBUG_FLAGS & DEBUG_TINY) 5959 printk ("<%d|%x:%x|%x:%x>", 5960 (int)INB(nc_scr0), 5961 dstat,sist, 5962 (unsigned)INL(nc_dsp), 5963 (unsigned)INL(nc_dbc)); 5964 5965 /*======================================================== 5966 ** First, interrupts we want to service cleanly. 5967 ** 5968 ** Phase mismatch is the most frequent interrupt, and 5969 ** so we have to service it as quickly and as cleanly 5970 ** as possible. 5971 ** Programmed interrupts are rarely used in this driver, 5972 ** but we must handle them cleanly anyway. 5973 ** We try to deal with PAR and SBMC combined with 5974 ** some other interrupt(s). 5975 **========================================================= 5976 */ 5977 5978 if (!(sist & (STO|GEN|HTH|SGE|UDC|RST)) && 5979 !(dstat & (MDPE|BF|ABRT|IID))) { 5980 if ((sist & SBMC) && ncr_int_sbmc (np)) 5981 return; 5982 if ((sist & PAR) && ncr_int_par (np)) 5983 return; 5984 if (sist & MA) { 5985 ncr_int_ma (np); 5986 return; 5987 } 5988 if (dstat & SIR) { 5989 ncr_int_sir (np); 5990 return; 5991 } 5992 /* 5993 ** DEL 397 - 53C875 Rev 3 - Part Number 609-0392410 - ITEM 2. 5994 */ 5995 if (!(sist & (SBMC|PAR)) && !(dstat & SSI)) { 5996 printk( "%s: unknown interrupt(s) ignored, " 5997 "ISTAT=%x DSTAT=%x SIST=%x\n", 5998 ncr_name(np), istat, dstat, sist); 5999 return; 6000 } 6001 OUTONB_STD (); 6002 return; 6003 } 6004 6005 /*======================================================== 6006 ** Now, interrupts that need some fixing up. 6007 ** Order and multiple interrupts is so less important. 6008 ** 6009 ** If SRST has been asserted, we just reset the chip. 6010 ** 6011 ** Selection is intirely handled by the chip. If the 6012 ** chip says STO, we trust it. Seems some other 6013 ** interrupts may occur at the same time (UDC, IID), so 6014 ** we ignore them. In any case we do enough fix-up 6015 ** in the service routine. 6016 ** We just exclude some fatal dma errors. 6017 **========================================================= 6018 */ 6019 6020 if (sist & RST) { 6021 ncr_init (np, 1, bootverbose ? "scsi reset" : NULL, HS_RESET); 6022 return; 6023 } 6024 6025 if ((sist & STO) && 6026 !(dstat & (MDPE|BF|ABRT))) { 6027 /* 6028 ** DEL 397 - 53C875 Rev 3 - Part Number 609-0392410 - ITEM 1. 6029 */ 6030 OUTONB (nc_ctest3, CLF); 6031 6032 ncr_int_sto (np); 6033 return; 6034 } 6035 6036 /*========================================================= 6037 ** Now, interrupts we are not able to recover cleanly. 6038 ** (At least for the moment). 6039 ** 6040 ** Do the register dump. 6041 ** Log message for real hard errors. 6042 ** Clear all fifos. 6043 ** For MDPE, BF, ABORT, IID, SGE and HTH we reset the 6044 ** BUS and the chip. 6045 ** We are more soft for UDC. 6046 **========================================================= 6047 */ 6048 6049 if (time_after(jiffies, np->regtime)) { 6050 np->regtime = jiffies + 10*HZ; 6051 for (i = 0; i<sizeof(np->regdump); i++) 6052 ((char*)&np->regdump)[i] = INB_OFF(i); 6053 np->regdump.nc_dstat = dstat; 6054 np->regdump.nc_sist = sist; 6055 } 6056 6057 ncr_log_hard_error(np, sist, dstat); 6058 6059 printk ("%s: have to clear fifos.\n", ncr_name (np)); 6060 OUTB (nc_stest3, TE|CSF); 6061 OUTONB (nc_ctest3, CLF); 6062 6063 if ((sist & (SGE)) || 6064 (dstat & (MDPE|BF|ABRT|IID))) { 6065 ncr_start_reset(np); 6066 return; 6067 } 6068 6069 if (sist & HTH) { 6070 printk ("%s: handshake timeout\n", ncr_name(np)); 6071 ncr_start_reset(np); 6072 return; 6073 } 6074 6075 if (sist & UDC) { 6076 printk ("%s: unexpected disconnect\n", ncr_name(np)); 6077 OUTB (HS_PRT, HS_UNEXPECTED); 6078 OUTL_DSP (NCB_SCRIPT_PHYS (np, cleanup)); 6079 return; 6080 } 6081 6082 /*========================================================= 6083 ** We just miss the cause of the interrupt. :( 6084 ** Print a message. The timeout will do the real work. 6085 **========================================================= 6086 */ 6087 printk ("%s: unknown interrupt\n", ncr_name(np)); 6088 } 6089 6090 /*========================================================== 6091 ** 6092 ** ncr chip exception handler for selection timeout 6093 ** 6094 **========================================================== 6095 ** 6096 ** There seems to be a bug in the 53c810. 6097 ** Although a STO-Interrupt is pending, 6098 ** it continues executing script commands. 6099 ** But it will fail and interrupt (IID) on 6100 ** the next instruction where it's looking 6101 ** for a valid phase. 6102 ** 6103 **---------------------------------------------------------- 6104 */ 6105 6106 void ncr_int_sto (struct ncb *np) 6107 { 6108 u_long dsa; 6109 struct ccb *cp; 6110 if (DEBUG_FLAGS & DEBUG_TINY) printk ("T"); 6111 6112 /* 6113 ** look for ccb and set the status. 6114 */ 6115 6116 dsa = INL (nc_dsa); 6117 cp = np->ccb; 6118 while (cp && (CCB_PHYS (cp, phys) != dsa)) 6119 cp = cp->link_ccb; 6120 6121 if (cp) { 6122 cp-> host_status = HS_SEL_TIMEOUT; 6123 ncr_complete (np, cp); 6124 } 6125 6126 /* 6127 ** repair start queue and jump to start point. 6128 */ 6129 6130 OUTL_DSP (NCB_SCRIPTH_PHYS (np, sto_restart)); 6131 return; 6132 } 6133 6134 /*========================================================== 6135 ** 6136 ** ncr chip exception handler for SCSI bus mode change 6137 ** 6138 **========================================================== 6139 ** 6140 ** spi2-r12 11.2.3 says a transceiver mode change must 6141 ** generate a reset event and a device that detects a reset 6142 ** event shall initiate a hard reset. It says also that a 6143 ** device that detects a mode change shall set data transfer 6144 ** mode to eight bit asynchronous, etc... 6145 ** So, just resetting should be enough. 6146 ** 6147 ** 6148 **---------------------------------------------------------- 6149 */ 6150 6151 static int ncr_int_sbmc (struct ncb *np) 6152 { 6153 u_char scsi_mode = INB (nc_stest4) & SMODE; 6154 6155 if (scsi_mode != np->scsi_mode) { 6156 printk("%s: SCSI bus mode change from %x to %x.\n", 6157 ncr_name(np), np->scsi_mode, scsi_mode); 6158 6159 np->scsi_mode = scsi_mode; 6160 6161 6162 /* 6163 ** Suspend command processing for 1 second and 6164 ** reinitialize all except the chip. 6165 */ 6166 np->settle_time = jiffies + HZ; 6167 ncr_init (np, 0, bootverbose ? "scsi mode change" : NULL, HS_RESET); 6168 return 1; 6169 } 6170 return 0; 6171 } 6172 6173 /*========================================================== 6174 ** 6175 ** ncr chip exception handler for SCSI parity error. 6176 ** 6177 **========================================================== 6178 ** 6179 ** 6180 **---------------------------------------------------------- 6181 */ 6182 6183 static int ncr_int_par (struct ncb *np) 6184 { 6185 u_char hsts = INB (HS_PRT); 6186 u32 dbc = INL (nc_dbc); 6187 u_char sstat1 = INB (nc_sstat1); 6188 int phase = -1; 6189 int msg = -1; 6190 u32 jmp; 6191 6192 printk("%s: SCSI parity error detected: SCR1=%d DBC=%x SSTAT1=%x\n", 6193 ncr_name(np), hsts, dbc, sstat1); 6194 6195 /* 6196 * Ignore the interrupt if the NCR is not connected 6197 * to the SCSI bus, since the right work should have 6198 * been done on unexpected disconnection handling. 6199 */ 6200 if (!(INB (nc_scntl1) & ISCON)) 6201 return 0; 6202 6203 /* 6204 * If the nexus is not clearly identified, reset the bus. 6205 * We will try to do better later. 6206 */ 6207 if (hsts & HS_INVALMASK) 6208 goto reset_all; 6209 6210 /* 6211 * If the SCSI parity error occurs in MSG IN phase, prepare a 6212 * MSG PARITY message. Otherwise, prepare a INITIATOR DETECTED 6213 * ERROR message and let the device decide to retry the command 6214 * or to terminate with check condition. If we were in MSG IN 6215 * phase waiting for the response of a negotiation, we will 6216 * get SIR_NEGO_FAILED at dispatch. 6217 */ 6218 if (!(dbc & 0xc0000000)) 6219 phase = (dbc >> 24) & 7; 6220 if (phase == 7) 6221 msg = MSG_PARITY_ERROR; 6222 else 6223 msg = INITIATOR_ERROR; 6224 6225 6226 /* 6227 * If the NCR stopped on a MOVE ^ DATA_IN, we jump to a 6228 * script that will ignore all data in bytes until phase 6229 * change, since we are not sure the chip will wait the phase 6230 * change prior to delivering the interrupt. 6231 */ 6232 if (phase == 1) 6233 jmp = NCB_SCRIPTH_PHYS (np, par_err_data_in); 6234 else 6235 jmp = NCB_SCRIPTH_PHYS (np, par_err_other); 6236 6237 OUTONB (nc_ctest3, CLF ); /* clear dma fifo */ 6238 OUTB (nc_stest3, TE|CSF); /* clear scsi fifo */ 6239 6240 np->msgout[0] = msg; 6241 OUTL_DSP (jmp); 6242 return 1; 6243 6244 reset_all: 6245 ncr_start_reset(np); 6246 return 1; 6247 } 6248 6249 /*========================================================== 6250 ** 6251 ** 6252 ** ncr chip exception handler for phase errors. 6253 ** 6254 ** 6255 **========================================================== 6256 ** 6257 ** We have to construct a new transfer descriptor, 6258 ** to transfer the rest of the current block. 6259 ** 6260 **---------------------------------------------------------- 6261 */ 6262 6263 static void ncr_int_ma (struct ncb *np) 6264 { 6265 u32 dbc; 6266 u32 rest; 6267 u32 dsp; 6268 u32 dsa; 6269 u32 nxtdsp; 6270 u32 newtmp; 6271 u32 *vdsp; 6272 u32 oadr, olen; 6273 u32 *tblp; 6274 ncrcmd *newcmd; 6275 u_char cmd, sbcl; 6276 struct ccb *cp; 6277 6278 dsp = INL (nc_dsp); 6279 dbc = INL (nc_dbc); 6280 sbcl = INB (nc_sbcl); 6281 6282 cmd = dbc >> 24; 6283 rest = dbc & 0xffffff; 6284 6285 /* 6286 ** Take into account dma fifo and various buffers and latches, 6287 ** only if the interrupted phase is an OUTPUT phase. 6288 */ 6289 6290 if ((cmd & 1) == 0) { 6291 u_char ctest5, ss0, ss2; 6292 u16 delta; 6293 6294 ctest5 = (np->rv_ctest5 & DFS) ? INB (nc_ctest5) : 0; 6295 if (ctest5 & DFS) 6296 delta=(((ctest5 << 8) | (INB (nc_dfifo) & 0xff)) - rest) & 0x3ff; 6297 else 6298 delta=(INB (nc_dfifo) - rest) & 0x7f; 6299 6300 /* 6301 ** The data in the dma fifo has not been transferred to 6302 ** the target -> add the amount to the rest 6303 ** and clear the data. 6304 ** Check the sstat2 register in case of wide transfer. 6305 */ 6306 6307 rest += delta; 6308 ss0 = INB (nc_sstat0); 6309 if (ss0 & OLF) rest++; 6310 if (ss0 & ORF) rest++; 6311 if (INB(nc_scntl3) & EWS) { 6312 ss2 = INB (nc_sstat2); 6313 if (ss2 & OLF1) rest++; 6314 if (ss2 & ORF1) rest++; 6315 } 6316 6317 if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_PHASE)) 6318 printk ("P%x%x RL=%d D=%d SS0=%x ", cmd&7, sbcl&7, 6319 (unsigned) rest, (unsigned) delta, ss0); 6320 6321 } else { 6322 if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_PHASE)) 6323 printk ("P%x%x RL=%d ", cmd&7, sbcl&7, rest); 6324 } 6325 6326 /* 6327 ** Clear fifos. 6328 */ 6329 OUTONB (nc_ctest3, CLF ); /* clear dma fifo */ 6330 OUTB (nc_stest3, TE|CSF); /* clear scsi fifo */ 6331 6332 /* 6333 ** locate matching cp. 6334 ** if the interrupted phase is DATA IN or DATA OUT, 6335 ** trust the global header. 6336 */ 6337 dsa = INL (nc_dsa); 6338 if (!(cmd & 6)) { 6339 cp = np->header.cp; 6340 if (CCB_PHYS(cp, phys) != dsa) 6341 cp = NULL; 6342 } else { 6343 cp = np->ccb; 6344 while (cp && (CCB_PHYS (cp, phys) != dsa)) 6345 cp = cp->link_ccb; 6346 } 6347 6348 /* 6349 ** try to find the interrupted script command, 6350 ** and the address at which to continue. 6351 */ 6352 vdsp = NULL; 6353 nxtdsp = 0; 6354 if (dsp > np->p_script && 6355 dsp <= np->p_script + sizeof(struct script)) { 6356 vdsp = (u32 *)((char*)np->script0 + (dsp-np->p_script-8)); 6357 nxtdsp = dsp; 6358 } 6359 else if (dsp > np->p_scripth && 6360 dsp <= np->p_scripth + sizeof(struct scripth)) { 6361 vdsp = (u32 *)((char*)np->scripth0 + (dsp-np->p_scripth-8)); 6362 nxtdsp = dsp; 6363 } 6364 else if (cp) { 6365 if (dsp == CCB_PHYS (cp, patch[2])) { 6366 vdsp = &cp->patch[0]; 6367 nxtdsp = scr_to_cpu(vdsp[3]); 6368 } 6369 else if (dsp == CCB_PHYS (cp, patch[6])) { 6370 vdsp = &cp->patch[4]; 6371 nxtdsp = scr_to_cpu(vdsp[3]); 6372 } 6373 } 6374 6375 /* 6376 ** log the information 6377 */ 6378 6379 if (DEBUG_FLAGS & DEBUG_PHASE) { 6380 printk ("\nCP=%p CP2=%p DSP=%x NXT=%x VDSP=%p CMD=%x ", 6381 cp, np->header.cp, 6382 (unsigned)dsp, 6383 (unsigned)nxtdsp, vdsp, cmd); 6384 } 6385 6386 /* 6387 ** cp=0 means that the DSA does not point to a valid control 6388 ** block. This should not happen since we donnot use multi-byte 6389 ** move while we are being reselected ot after command complete. 6390 ** We are not able to recover from such a phase error. 6391 */ 6392 if (!cp) { 6393 printk ("%s: SCSI phase error fixup: " 6394 "CCB already dequeued (0x%08lx)\n", 6395 ncr_name (np), (u_long) np->header.cp); 6396 goto reset_all; 6397 } 6398 6399 /* 6400 ** get old startaddress and old length. 6401 */ 6402 6403 oadr = scr_to_cpu(vdsp[1]); 6404 6405 if (cmd & 0x10) { /* Table indirect */ 6406 tblp = (u32 *) ((char*) &cp->phys + oadr); 6407 olen = scr_to_cpu(tblp[0]); 6408 oadr = scr_to_cpu(tblp[1]); 6409 } else { 6410 tblp = (u32 *) 0; 6411 olen = scr_to_cpu(vdsp[0]) & 0xffffff; 6412 } 6413 6414 if (DEBUG_FLAGS & DEBUG_PHASE) { 6415 printk ("OCMD=%x\nTBLP=%p OLEN=%x OADR=%x\n", 6416 (unsigned) (scr_to_cpu(vdsp[0]) >> 24), 6417 tblp, 6418 (unsigned) olen, 6419 (unsigned) oadr); 6420 } 6421 6422 /* 6423 ** check cmd against assumed interrupted script command. 6424 */ 6425 6426 if (cmd != (scr_to_cpu(vdsp[0]) >> 24)) { 6427 PRINT_ADDR(cp->cmd, "internal error: cmd=%02x != %02x=(vdsp[0] " 6428 ">> 24)\n", cmd, scr_to_cpu(vdsp[0]) >> 24); 6429 6430 goto reset_all; 6431 } 6432 6433 /* 6434 ** cp != np->header.cp means that the header of the CCB 6435 ** currently being processed has not yet been copied to 6436 ** the global header area. That may happen if the device did 6437 ** not accept all our messages after having been selected. 6438 */ 6439 if (cp != np->header.cp) { 6440 printk ("%s: SCSI phase error fixup: " 6441 "CCB address mismatch (0x%08lx != 0x%08lx)\n", 6442 ncr_name (np), (u_long) cp, (u_long) np->header.cp); 6443 } 6444 6445 /* 6446 ** if old phase not dataphase, leave here. 6447 */ 6448 6449 if (cmd & 0x06) { 6450 PRINT_ADDR(cp->cmd, "phase change %x-%x %d@%08x resid=%d.\n", 6451 cmd&7, sbcl&7, (unsigned)olen, 6452 (unsigned)oadr, (unsigned)rest); 6453 goto unexpected_phase; 6454 } 6455 6456 /* 6457 ** choose the correct patch area. 6458 ** if savep points to one, choose the other. 6459 */ 6460 6461 newcmd = cp->patch; 6462 newtmp = CCB_PHYS (cp, patch); 6463 if (newtmp == scr_to_cpu(cp->phys.header.savep)) { 6464 newcmd = &cp->patch[4]; 6465 newtmp = CCB_PHYS (cp, patch[4]); 6466 } 6467 6468 /* 6469 ** fillin the commands 6470 */ 6471 6472 newcmd[0] = cpu_to_scr(((cmd & 0x0f) << 24) | rest); 6473 newcmd[1] = cpu_to_scr(oadr + olen - rest); 6474 newcmd[2] = cpu_to_scr(SCR_JUMP); 6475 newcmd[3] = cpu_to_scr(nxtdsp); 6476 6477 if (DEBUG_FLAGS & DEBUG_PHASE) { 6478 PRINT_ADDR(cp->cmd, "newcmd[%d] %x %x %x %x.\n", 6479 (int) (newcmd - cp->patch), 6480 (unsigned)scr_to_cpu(newcmd[0]), 6481 (unsigned)scr_to_cpu(newcmd[1]), 6482 (unsigned)scr_to_cpu(newcmd[2]), 6483 (unsigned)scr_to_cpu(newcmd[3])); 6484 } 6485 /* 6486 ** fake the return address (to the patch). 6487 ** and restart script processor at dispatcher. 6488 */ 6489 OUTL (nc_temp, newtmp); 6490 OUTL_DSP (NCB_SCRIPT_PHYS (np, dispatch)); 6491 return; 6492 6493 /* 6494 ** Unexpected phase changes that occurs when the current phase 6495 ** is not a DATA IN or DATA OUT phase are due to error conditions. 6496 ** Such event may only happen when the SCRIPTS is using a 6497 ** multibyte SCSI MOVE. 6498 ** 6499 ** Phase change Some possible cause 6500 ** 6501 ** COMMAND --> MSG IN SCSI parity error detected by target. 6502 ** COMMAND --> STATUS Bad command or refused by target. 6503 ** MSG OUT --> MSG IN Message rejected by target. 6504 ** MSG OUT --> COMMAND Bogus target that discards extended 6505 ** negotiation messages. 6506 ** 6507 ** The code below does not care of the new phase and so 6508 ** trusts the target. Why to annoy it ? 6509 ** If the interrupted phase is COMMAND phase, we restart at 6510 ** dispatcher. 6511 ** If a target does not get all the messages after selection, 6512 ** the code assumes blindly that the target discards extended 6513 ** messages and clears the negotiation status. 6514 ** If the target does not want all our response to negotiation, 6515 ** we force a SIR_NEGO_PROTO interrupt (it is a hack that avoids 6516 ** bloat for such a should_not_happen situation). 6517 ** In all other situation, we reset the BUS. 6518 ** Are these assumptions reasonnable ? (Wait and see ...) 6519 */ 6520 unexpected_phase: 6521 dsp -= 8; 6522 nxtdsp = 0; 6523 6524 switch (cmd & 7) { 6525 case 2: /* COMMAND phase */ 6526 nxtdsp = NCB_SCRIPT_PHYS (np, dispatch); 6527 break; 6528 #if 0 6529 case 3: /* STATUS phase */ 6530 nxtdsp = NCB_SCRIPT_PHYS (np, dispatch); 6531 break; 6532 #endif 6533 case 6: /* MSG OUT phase */ 6534 np->scripth->nxtdsp_go_on[0] = cpu_to_scr(dsp + 8); 6535 if (dsp == NCB_SCRIPT_PHYS (np, send_ident)) { 6536 cp->host_status = HS_BUSY; 6537 nxtdsp = NCB_SCRIPTH_PHYS (np, clratn_go_on); 6538 } 6539 else if (dsp == NCB_SCRIPTH_PHYS (np, send_wdtr) || 6540 dsp == NCB_SCRIPTH_PHYS (np, send_sdtr)) { 6541 nxtdsp = NCB_SCRIPTH_PHYS (np, nego_bad_phase); 6542 } 6543 break; 6544 #if 0 6545 case 7: /* MSG IN phase */ 6546 nxtdsp = NCB_SCRIPT_PHYS (np, clrack); 6547 break; 6548 #endif 6549 } 6550 6551 if (nxtdsp) { 6552 OUTL_DSP (nxtdsp); 6553 return; 6554 } 6555 6556 reset_all: 6557 ncr_start_reset(np); 6558 } 6559 6560 6561 static void ncr_sir_to_redo(struct ncb *np, int num, struct ccb *cp) 6562 { 6563 struct scsi_cmnd *cmd = cp->cmd; 6564 struct tcb *tp = &np->target[cmd->device->id]; 6565 struct lcb *lp = tp->lp[cmd->device->lun]; 6566 struct list_head *qp; 6567 struct ccb * cp2; 6568 int disc_cnt = 0; 6569 int busy_cnt = 0; 6570 u32 startp; 6571 u_char s_status = INB (SS_PRT); 6572 6573 /* 6574 ** Let the SCRIPTS processor skip all not yet started CCBs, 6575 ** and count disconnected CCBs. Since the busy queue is in 6576 ** the same order as the chip start queue, disconnected CCBs 6577 ** are before cp and busy ones after. 6578 */ 6579 if (lp) { 6580 qp = lp->busy_ccbq.prev; 6581 while (qp != &lp->busy_ccbq) { 6582 cp2 = list_entry(qp, struct ccb, link_ccbq); 6583 qp = qp->prev; 6584 ++busy_cnt; 6585 if (cp2 == cp) 6586 break; 6587 cp2->start.schedule.l_paddr = 6588 cpu_to_scr(NCB_SCRIPTH_PHYS (np, skip)); 6589 } 6590 lp->held_ccb = cp; /* Requeue when this one completes */ 6591 disc_cnt = lp->queuedccbs - busy_cnt; 6592 } 6593 6594 switch(s_status) { 6595 default: /* Just for safety, should never happen */ 6596 case S_QUEUE_FULL: 6597 /* 6598 ** Decrease number of tags to the number of 6599 ** disconnected commands. 6600 */ 6601 if (!lp) 6602 goto out; 6603 if (bootverbose >= 1) { 6604 PRINT_ADDR(cmd, "QUEUE FULL! %d busy, %d disconnected " 6605 "CCBs\n", busy_cnt, disc_cnt); 6606 } 6607 if (disc_cnt < lp->numtags) { 6608 lp->numtags = disc_cnt > 2 ? disc_cnt : 2; 6609 lp->num_good = 0; 6610 ncr_setup_tags (np, cmd->device); 6611 } 6612 /* 6613 ** Requeue the command to the start queue. 6614 ** If any disconnected commands, 6615 ** Clear SIGP. 6616 ** Jump to reselect. 6617 */ 6618 cp->phys.header.savep = cp->startp; 6619 cp->host_status = HS_BUSY; 6620 cp->scsi_status = S_ILLEGAL; 6621 6622 ncr_put_start_queue(np, cp); 6623 if (disc_cnt) 6624 INB (nc_ctest2); /* Clear SIGP */ 6625 OUTL_DSP (NCB_SCRIPT_PHYS (np, reselect)); 6626 return; 6627 case S_TERMINATED: 6628 case S_CHECK_COND: 6629 /* 6630 ** If we were requesting sense, give up. 6631 */ 6632 if (cp->auto_sense) 6633 goto out; 6634 6635 /* 6636 ** Device returned CHECK CONDITION status. 6637 ** Prepare all needed data strutures for getting 6638 ** sense data. 6639 ** 6640 ** identify message 6641 */ 6642 cp->scsi_smsg2[0] = IDENTIFY(0, cmd->device->lun); 6643 cp->phys.smsg.addr = cpu_to_scr(CCB_PHYS (cp, scsi_smsg2)); 6644 cp->phys.smsg.size = cpu_to_scr(1); 6645 6646 /* 6647 ** sense command 6648 */ 6649 cp->phys.cmd.addr = cpu_to_scr(CCB_PHYS (cp, sensecmd)); 6650 cp->phys.cmd.size = cpu_to_scr(6); 6651 6652 /* 6653 ** patch requested size into sense command 6654 */ 6655 cp->sensecmd[0] = 0x03; 6656 cp->sensecmd[1] = cmd->device->lun << 5; 6657 cp->sensecmd[4] = sizeof(cp->sense_buf); 6658 6659 /* 6660 ** sense data 6661 */ 6662 memset(cp->sense_buf, 0, sizeof(cp->sense_buf)); 6663 cp->phys.sense.addr = cpu_to_scr(CCB_PHYS(cp,sense_buf[0])); 6664 cp->phys.sense.size = cpu_to_scr(sizeof(cp->sense_buf)); 6665 6666 /* 6667 ** requeue the command. 6668 */ 6669 startp = cpu_to_scr(NCB_SCRIPTH_PHYS (np, sdata_in)); 6670 6671 cp->phys.header.savep = startp; 6672 cp->phys.header.goalp = startp + 24; 6673 cp->phys.header.lastp = startp; 6674 cp->phys.header.wgoalp = startp + 24; 6675 cp->phys.header.wlastp = startp; 6676 6677 cp->host_status = HS_BUSY; 6678 cp->scsi_status = S_ILLEGAL; 6679 cp->auto_sense = s_status; 6680 6681 cp->start.schedule.l_paddr = 6682 cpu_to_scr(NCB_SCRIPT_PHYS (np, select)); 6683 6684 /* 6685 ** Select without ATN for quirky devices. 6686 */ 6687 if (cmd->device->select_no_atn) 6688 cp->start.schedule.l_paddr = 6689 cpu_to_scr(NCB_SCRIPTH_PHYS (np, select_no_atn)); 6690 6691 ncr_put_start_queue(np, cp); 6692 6693 OUTL_DSP (NCB_SCRIPT_PHYS (np, start)); 6694 return; 6695 } 6696 6697 out: 6698 OUTONB_STD (); 6699 return; 6700 } 6701 6702 6703 /*========================================================== 6704 ** 6705 ** 6706 ** ncr chip exception handler for programmed interrupts. 6707 ** 6708 ** 6709 **========================================================== 6710 */ 6711 6712 void ncr_int_sir (struct ncb *np) 6713 { 6714 u_char scntl3; 6715 u_char chg, ofs, per, fak, wide; 6716 u_char num = INB (nc_dsps); 6717 struct ccb *cp=NULL; 6718 u_long dsa = INL (nc_dsa); 6719 u_char target = INB (nc_sdid) & 0x0f; 6720 struct tcb *tp = &np->target[target]; 6721 struct scsi_target *starget = tp->starget; 6722 6723 if (DEBUG_FLAGS & DEBUG_TINY) printk ("I#%d", num); 6724 6725 switch (num) { 6726 case SIR_INTFLY: 6727 /* 6728 ** This is used for HP Zalon/53c720 where INTFLY 6729 ** operation is currently broken. 6730 */ 6731 ncr_wakeup_done(np); 6732 #ifdef SCSI_NCR_CCB_DONE_SUPPORT 6733 OUTL(nc_dsp, NCB_SCRIPT_PHYS (np, done_end) + 8); 6734 #else 6735 OUTL(nc_dsp, NCB_SCRIPT_PHYS (np, start)); 6736 #endif 6737 return; 6738 case SIR_RESEL_NO_MSG_IN: 6739 case SIR_RESEL_NO_IDENTIFY: 6740 /* 6741 ** If devices reselecting without sending an IDENTIFY 6742 ** message still exist, this should help. 6743 ** We just assume lun=0, 1 CCB, no tag. 6744 */ 6745 if (tp->lp[0]) { 6746 OUTL_DSP (scr_to_cpu(tp->lp[0]->jump_ccb[0])); 6747 return; 6748 } 6749 case SIR_RESEL_BAD_TARGET: /* Will send a TARGET RESET message */ 6750 case SIR_RESEL_BAD_LUN: /* Will send a TARGET RESET message */ 6751 case SIR_RESEL_BAD_I_T_L_Q: /* Will send an ABORT TAG message */ 6752 case SIR_RESEL_BAD_I_T_L: /* Will send an ABORT message */ 6753 printk ("%s:%d: SIR %d, " 6754 "incorrect nexus identification on reselection\n", 6755 ncr_name (np), target, num); 6756 goto out; 6757 case SIR_DONE_OVERFLOW: 6758 printk ("%s:%d: SIR %d, " 6759 "CCB done queue overflow\n", 6760 ncr_name (np), target, num); 6761 goto out; 6762 case SIR_BAD_STATUS: 6763 cp = np->header.cp; 6764 if (!cp || CCB_PHYS (cp, phys) != dsa) 6765 goto out; 6766 ncr_sir_to_redo(np, num, cp); 6767 return; 6768 default: 6769 /* 6770 ** lookup the ccb 6771 */ 6772 cp = np->ccb; 6773 while (cp && (CCB_PHYS (cp, phys) != dsa)) 6774 cp = cp->link_ccb; 6775 6776 BUG_ON(!cp); 6777 BUG_ON(cp != np->header.cp); 6778 6779 if (!cp || cp != np->header.cp) 6780 goto out; 6781 } 6782 6783 switch (num) { 6784 /*----------------------------------------------------------------------------- 6785 ** 6786 ** Was Sie schon immer ueber transfermode negotiation wissen wollten ... 6787 ** ("Everything you've always wanted to know about transfer mode 6788 ** negotiation") 6789 ** 6790 ** We try to negotiate sync and wide transfer only after 6791 ** a successful inquire command. We look at byte 7 of the 6792 ** inquire data to determine the capabilities of the target. 6793 ** 6794 ** When we try to negotiate, we append the negotiation message 6795 ** to the identify and (maybe) simple tag message. 6796 ** The host status field is set to HS_NEGOTIATE to mark this 6797 ** situation. 6798 ** 6799 ** If the target doesn't answer this message immidiately 6800 ** (as required by the standard), the SIR_NEGO_FAIL interrupt 6801 ** will be raised eventually. 6802 ** The handler removes the HS_NEGOTIATE status, and sets the 6803 ** negotiated value to the default (async / nowide). 6804 ** 6805 ** If we receive a matching answer immediately, we check it 6806 ** for validity, and set the values. 6807 ** 6808 ** If we receive a Reject message immediately, we assume the 6809 ** negotiation has failed, and fall back to standard values. 6810 ** 6811 ** If we receive a negotiation message while not in HS_NEGOTIATE 6812 ** state, it's a target initiated negotiation. We prepare a 6813 ** (hopefully) valid answer, set our parameters, and send back 6814 ** this answer to the target. 6815 ** 6816 ** If the target doesn't fetch the answer (no message out phase), 6817 ** we assume the negotiation has failed, and fall back to default 6818 ** settings. 6819 ** 6820 ** When we set the values, we adjust them in all ccbs belonging 6821 ** to this target, in the controller's register, and in the "phys" 6822 ** field of the controller's struct ncb. 6823 ** 6824 ** Possible cases: hs sir msg_in value send goto 6825 ** We try to negotiate: 6826 ** -> target doesn't msgin NEG FAIL noop defa. - dispatch 6827 ** -> target rejected our msg NEG FAIL reject defa. - dispatch 6828 ** -> target answered (ok) NEG SYNC sdtr set - clrack 6829 ** -> target answered (!ok) NEG SYNC sdtr defa. REJ--->msg_bad 6830 ** -> target answered (ok) NEG WIDE wdtr set - clrack 6831 ** -> target answered (!ok) NEG WIDE wdtr defa. REJ--->msg_bad 6832 ** -> any other msgin NEG FAIL noop defa. - dispatch 6833 ** 6834 ** Target tries to negotiate: 6835 ** -> incoming message --- SYNC sdtr set SDTR - 6836 ** -> incoming message --- WIDE wdtr set WDTR - 6837 ** We sent our answer: 6838 ** -> target doesn't msgout --- PROTO ? defa. - dispatch 6839 ** 6840 **----------------------------------------------------------------------------- 6841 */ 6842 6843 case SIR_NEGO_FAILED: 6844 /*------------------------------------------------------- 6845 ** 6846 ** Negotiation failed. 6847 ** Target doesn't send an answer message, 6848 ** or target rejected our message. 6849 ** 6850 ** Remove negotiation request. 6851 ** 6852 **------------------------------------------------------- 6853 */ 6854 OUTB (HS_PRT, HS_BUSY); 6855 6856 /* fall through */ 6857 6858 case SIR_NEGO_PROTO: 6859 /*------------------------------------------------------- 6860 ** 6861 ** Negotiation failed. 6862 ** Target doesn't fetch the answer message. 6863 ** 6864 **------------------------------------------------------- 6865 */ 6866 6867 if (DEBUG_FLAGS & DEBUG_NEGO) { 6868 PRINT_ADDR(cp->cmd, "negotiation failed sir=%x " 6869 "status=%x.\n", num, cp->nego_status); 6870 } 6871 6872 /* 6873 ** any error in negotiation: 6874 ** fall back to default mode. 6875 */ 6876 switch (cp->nego_status) { 6877 6878 case NS_SYNC: 6879 spi_period(starget) = 0; 6880 spi_offset(starget) = 0; 6881 ncr_setsync (np, cp, 0, 0xe0); 6882 break; 6883 6884 case NS_WIDE: 6885 spi_width(starget) = 0; 6886 ncr_setwide (np, cp, 0, 0); 6887 break; 6888 6889 } 6890 np->msgin [0] = NOP; 6891 np->msgout[0] = NOP; 6892 cp->nego_status = 0; 6893 break; 6894 6895 case SIR_NEGO_SYNC: 6896 if (DEBUG_FLAGS & DEBUG_NEGO) { 6897 ncr_print_msg(cp, "sync msgin", np->msgin); 6898 } 6899 6900 chg = 0; 6901 per = np->msgin[3]; 6902 ofs = np->msgin[4]; 6903 if (ofs==0) per=255; 6904 6905 /* 6906 ** if target sends SDTR message, 6907 ** it CAN transfer synch. 6908 */ 6909 6910 if (ofs && starget) 6911 spi_support_sync(starget) = 1; 6912 6913 /* 6914 ** check values against driver limits. 6915 */ 6916 6917 if (per < np->minsync) 6918 {chg = 1; per = np->minsync;} 6919 if (per < tp->minsync) 6920 {chg = 1; per = tp->minsync;} 6921 if (ofs > tp->maxoffs) 6922 {chg = 1; ofs = tp->maxoffs;} 6923 6924 /* 6925 ** Check against controller limits. 6926 */ 6927 fak = 7; 6928 scntl3 = 0; 6929 if (ofs != 0) { 6930 ncr_getsync(np, per, &fak, &scntl3); 6931 if (fak > 7) { 6932 chg = 1; 6933 ofs = 0; 6934 } 6935 } 6936 if (ofs == 0) { 6937 fak = 7; 6938 per = 0; 6939 scntl3 = 0; 6940 tp->minsync = 0; 6941 } 6942 6943 if (DEBUG_FLAGS & DEBUG_NEGO) { 6944 PRINT_ADDR(cp->cmd, "sync: per=%d scntl3=0x%x ofs=%d " 6945 "fak=%d chg=%d.\n", per, scntl3, ofs, fak, chg); 6946 } 6947 6948 if (INB (HS_PRT) == HS_NEGOTIATE) { 6949 OUTB (HS_PRT, HS_BUSY); 6950 switch (cp->nego_status) { 6951 6952 case NS_SYNC: 6953 /* This was an answer message */ 6954 if (chg) { 6955 /* Answer wasn't acceptable. */ 6956 spi_period(starget) = 0; 6957 spi_offset(starget) = 0; 6958 ncr_setsync(np, cp, 0, 0xe0); 6959 OUTL_DSP(NCB_SCRIPT_PHYS (np, msg_bad)); 6960 } else { 6961 /* Answer is ok. */ 6962 spi_period(starget) = per; 6963 spi_offset(starget) = ofs; 6964 ncr_setsync(np, cp, scntl3, (fak<<5)|ofs); 6965 OUTL_DSP(NCB_SCRIPT_PHYS (np, clrack)); 6966 } 6967 return; 6968 6969 case NS_WIDE: 6970 spi_width(starget) = 0; 6971 ncr_setwide(np, cp, 0, 0); 6972 break; 6973 } 6974 } 6975 6976 /* 6977 ** It was a request. Set value and 6978 ** prepare an answer message 6979 */ 6980 6981 spi_period(starget) = per; 6982 spi_offset(starget) = ofs; 6983 ncr_setsync(np, cp, scntl3, (fak<<5)|ofs); 6984 6985 spi_populate_sync_msg(np->msgout, per, ofs); 6986 cp->nego_status = NS_SYNC; 6987 6988 if (DEBUG_FLAGS & DEBUG_NEGO) { 6989 ncr_print_msg(cp, "sync msgout", np->msgout); 6990 } 6991 6992 if (!ofs) { 6993 OUTL_DSP (NCB_SCRIPT_PHYS (np, msg_bad)); 6994 return; 6995 } 6996 np->msgin [0] = NOP; 6997 6998 break; 6999 7000 case SIR_NEGO_WIDE: 7001 /* 7002 ** Wide request message received. 7003 */ 7004 if (DEBUG_FLAGS & DEBUG_NEGO) { 7005 ncr_print_msg(cp, "wide msgin", np->msgin); 7006 } 7007 7008 /* 7009 ** get requested values. 7010 */ 7011 7012 chg = 0; 7013 wide = np->msgin[3]; 7014 7015 /* 7016 ** if target sends WDTR message, 7017 ** it CAN transfer wide. 7018 */ 7019 7020 if (wide && starget) 7021 spi_support_wide(starget) = 1; 7022 7023 /* 7024 ** check values against driver limits. 7025 */ 7026 7027 if (wide > tp->usrwide) 7028 {chg = 1; wide = tp->usrwide;} 7029 7030 if (DEBUG_FLAGS & DEBUG_NEGO) { 7031 PRINT_ADDR(cp->cmd, "wide: wide=%d chg=%d.\n", wide, 7032 chg); 7033 } 7034 7035 if (INB (HS_PRT) == HS_NEGOTIATE) { 7036 OUTB (HS_PRT, HS_BUSY); 7037 switch (cp->nego_status) { 7038 7039 case NS_WIDE: 7040 /* 7041 ** This was an answer message 7042 */ 7043 if (chg) { 7044 /* Answer wasn't acceptable. */ 7045 spi_width(starget) = 0; 7046 ncr_setwide(np, cp, 0, 1); 7047 OUTL_DSP (NCB_SCRIPT_PHYS (np, msg_bad)); 7048 } else { 7049 /* Answer is ok. */ 7050 spi_width(starget) = wide; 7051 ncr_setwide(np, cp, wide, 1); 7052 OUTL_DSP (NCB_SCRIPT_PHYS (np, clrack)); 7053 } 7054 return; 7055 7056 case NS_SYNC: 7057 spi_period(starget) = 0; 7058 spi_offset(starget) = 0; 7059 ncr_setsync(np, cp, 0, 0xe0); 7060 break; 7061 } 7062 } 7063 7064 /* 7065 ** It was a request, set value and 7066 ** prepare an answer message 7067 */ 7068 7069 spi_width(starget) = wide; 7070 ncr_setwide(np, cp, wide, 1); 7071 spi_populate_width_msg(np->msgout, wide); 7072 7073 np->msgin [0] = NOP; 7074 7075 cp->nego_status = NS_WIDE; 7076 7077 if (DEBUG_FLAGS & DEBUG_NEGO) { 7078 ncr_print_msg(cp, "wide msgout", np->msgin); 7079 } 7080 break; 7081 7082 /*-------------------------------------------------------------------- 7083 ** 7084 ** Processing of special messages 7085 ** 7086 **-------------------------------------------------------------------- 7087 */ 7088 7089 case SIR_REJECT_RECEIVED: 7090 /*----------------------------------------------- 7091 ** 7092 ** We received a MESSAGE_REJECT. 7093 ** 7094 **----------------------------------------------- 7095 */ 7096 7097 PRINT_ADDR(cp->cmd, "MESSAGE_REJECT received (%x:%x).\n", 7098 (unsigned)scr_to_cpu(np->lastmsg), np->msgout[0]); 7099 break; 7100 7101 case SIR_REJECT_SENT: 7102 /*----------------------------------------------- 7103 ** 7104 ** We received an unknown message 7105 ** 7106 **----------------------------------------------- 7107 */ 7108 7109 ncr_print_msg(cp, "MESSAGE_REJECT sent for", np->msgin); 7110 break; 7111 7112 /*-------------------------------------------------------------------- 7113 ** 7114 ** Processing of special messages 7115 ** 7116 **-------------------------------------------------------------------- 7117 */ 7118 7119 case SIR_IGN_RESIDUE: 7120 /*----------------------------------------------- 7121 ** 7122 ** We received an IGNORE RESIDUE message, 7123 ** which couldn't be handled by the script. 7124 ** 7125 **----------------------------------------------- 7126 */ 7127 7128 PRINT_ADDR(cp->cmd, "IGNORE_WIDE_RESIDUE received, but not yet " 7129 "implemented.\n"); 7130 break; 7131 #if 0 7132 case SIR_MISSING_SAVE: 7133 /*----------------------------------------------- 7134 ** 7135 ** We received an DISCONNECT message, 7136 ** but the datapointer wasn't saved before. 7137 ** 7138 **----------------------------------------------- 7139 */ 7140 7141 PRINT_ADDR(cp->cmd, "DISCONNECT received, but datapointer " 7142 "not saved: data=%x save=%x goal=%x.\n", 7143 (unsigned) INL (nc_temp), 7144 (unsigned) scr_to_cpu(np->header.savep), 7145 (unsigned) scr_to_cpu(np->header.goalp)); 7146 break; 7147 #endif 7148 } 7149 7150 out: 7151 OUTONB_STD (); 7152 } 7153 7154 /*========================================================== 7155 ** 7156 ** 7157 ** Acquire a control block 7158 ** 7159 ** 7160 **========================================================== 7161 */ 7162 7163 static struct ccb *ncr_get_ccb(struct ncb *np, struct scsi_cmnd *cmd) 7164 { 7165 u_char tn = cmd->device->id; 7166 u_char ln = cmd->device->lun; 7167 struct tcb *tp = &np->target[tn]; 7168 struct lcb *lp = tp->lp[ln]; 7169 u_char tag = NO_TAG; 7170 struct ccb *cp = NULL; 7171 7172 /* 7173 ** Lun structure available ? 7174 */ 7175 if (lp) { 7176 struct list_head *qp; 7177 /* 7178 ** Keep from using more tags than we can handle. 7179 */ 7180 if (lp->usetags && lp->busyccbs >= lp->maxnxs) 7181 return NULL; 7182 7183 /* 7184 ** Allocate a new CCB if needed. 7185 */ 7186 if (list_empty(&lp->free_ccbq)) 7187 ncr_alloc_ccb(np, tn, ln); 7188 7189 /* 7190 ** Look for free CCB 7191 */ 7192 qp = ncr_list_pop(&lp->free_ccbq); 7193 if (qp) { 7194 cp = list_entry(qp, struct ccb, link_ccbq); 7195 if (cp->magic) { 7196 PRINT_ADDR(cmd, "ccb free list corrupted " 7197 "(@%p)\n", cp); 7198 cp = NULL; 7199 } else { 7200 list_add_tail(qp, &lp->wait_ccbq); 7201 ++lp->busyccbs; 7202 } 7203 } 7204 7205 /* 7206 ** If a CCB is available, 7207 ** Get a tag for this nexus if required. 7208 */ 7209 if (cp) { 7210 if (lp->usetags) 7211 tag = lp->cb_tags[lp->ia_tag]; 7212 } 7213 else if (lp->actccbs > 0) 7214 return NULL; 7215 } 7216 7217 /* 7218 ** if nothing available, take the default. 7219 */ 7220 if (!cp) 7221 cp = np->ccb; 7222 7223 /* 7224 ** Wait until available. 7225 */ 7226 #if 0 7227 while (cp->magic) { 7228 if (flags & SCSI_NOSLEEP) break; 7229 if (tsleep ((caddr_t)cp, PRIBIO|PCATCH, "ncr", 0)) 7230 break; 7231 } 7232 #endif 7233 7234 if (cp->magic) 7235 return NULL; 7236 7237 cp->magic = 1; 7238 7239 /* 7240 ** Move to next available tag if tag used. 7241 */ 7242 if (lp) { 7243 if (tag != NO_TAG) { 7244 ++lp->ia_tag; 7245 if (lp->ia_tag == MAX_TAGS) 7246 lp->ia_tag = 0; 7247 lp->tags_umap |= (((tagmap_t) 1) << tag); 7248 } 7249 } 7250 7251 /* 7252 ** Remember all informations needed to free this CCB. 7253 */ 7254 cp->tag = tag; 7255 cp->target = tn; 7256 cp->lun = ln; 7257 7258 if (DEBUG_FLAGS & DEBUG_TAGS) { 7259 PRINT_ADDR(cmd, "ccb @%p using tag %d.\n", cp, tag); 7260 } 7261 7262 return cp; 7263 } 7264 7265 /*========================================================== 7266 ** 7267 ** 7268 ** Release one control block 7269 ** 7270 ** 7271 **========================================================== 7272 */ 7273 7274 static void ncr_free_ccb (struct ncb *np, struct ccb *cp) 7275 { 7276 struct tcb *tp = &np->target[cp->target]; 7277 struct lcb *lp = tp->lp[cp->lun]; 7278 7279 if (DEBUG_FLAGS & DEBUG_TAGS) { 7280 PRINT_ADDR(cp->cmd, "ccb @%p freeing tag %d.\n", cp, cp->tag); 7281 } 7282 7283 /* 7284 ** If lun control block available, 7285 ** decrement active commands and increment credit, 7286 ** free the tag if any and remove the JUMP for reselect. 7287 */ 7288 if (lp) { 7289 if (cp->tag != NO_TAG) { 7290 lp->cb_tags[lp->if_tag++] = cp->tag; 7291 if (lp->if_tag == MAX_TAGS) 7292 lp->if_tag = 0; 7293 lp->tags_umap &= ~(((tagmap_t) 1) << cp->tag); 7294 lp->tags_smap &= lp->tags_umap; 7295 lp->jump_ccb[cp->tag] = 7296 cpu_to_scr(NCB_SCRIPTH_PHYS(np, bad_i_t_l_q)); 7297 } else { 7298 lp->jump_ccb[0] = 7299 cpu_to_scr(NCB_SCRIPTH_PHYS(np, bad_i_t_l)); 7300 } 7301 } 7302 7303 /* 7304 ** Make this CCB available. 7305 */ 7306 7307 if (lp) { 7308 if (cp != np->ccb) 7309 list_move(&cp->link_ccbq, &lp->free_ccbq); 7310 --lp->busyccbs; 7311 if (cp->queued) { 7312 --lp->queuedccbs; 7313 } 7314 } 7315 cp -> host_status = HS_IDLE; 7316 cp -> magic = 0; 7317 if (cp->queued) { 7318 --np->queuedccbs; 7319 cp->queued = 0; 7320 } 7321 7322 #if 0 7323 if (cp == np->ccb) 7324 wakeup ((caddr_t) cp); 7325 #endif 7326 } 7327 7328 7329 #define ncr_reg_bus_addr(r) (np->paddr + offsetof (struct ncr_reg, r)) 7330 7331 /*------------------------------------------------------------------------ 7332 ** Initialize the fixed part of a CCB structure. 7333 **------------------------------------------------------------------------ 7334 **------------------------------------------------------------------------ 7335 */ 7336 static void ncr_init_ccb(struct ncb *np, struct ccb *cp) 7337 { 7338 ncrcmd copy_4 = np->features & FE_PFEN ? SCR_COPY(4) : SCR_COPY_F(4); 7339 7340 /* 7341 ** Remember virtual and bus address of this ccb. 7342 */ 7343 cp->p_ccb = vtobus(cp); 7344 cp->phys.header.cp = cp; 7345 7346 /* 7347 ** This allows list_del to work for the default ccb. 7348 */ 7349 INIT_LIST_HEAD(&cp->link_ccbq); 7350 7351 /* 7352 ** Initialyze the start and restart launch script. 7353 ** 7354 ** COPY(4) @(...p_phys), @(dsa) 7355 ** JUMP @(sched_point) 7356 */ 7357 cp->start.setup_dsa[0] = cpu_to_scr(copy_4); 7358 cp->start.setup_dsa[1] = cpu_to_scr(CCB_PHYS(cp, start.p_phys)); 7359 cp->start.setup_dsa[2] = cpu_to_scr(ncr_reg_bus_addr(nc_dsa)); 7360 cp->start.schedule.l_cmd = cpu_to_scr(SCR_JUMP); 7361 cp->start.p_phys = cpu_to_scr(CCB_PHYS(cp, phys)); 7362 7363 memcpy(&cp->restart, &cp->start, sizeof(cp->restart)); 7364 7365 cp->start.schedule.l_paddr = cpu_to_scr(NCB_SCRIPT_PHYS (np, idle)); 7366 cp->restart.schedule.l_paddr = cpu_to_scr(NCB_SCRIPTH_PHYS (np, abort)); 7367 } 7368 7369 7370 /*------------------------------------------------------------------------ 7371 ** Allocate a CCB and initialize its fixed part. 7372 **------------------------------------------------------------------------ 7373 **------------------------------------------------------------------------ 7374 */ 7375 static void ncr_alloc_ccb(struct ncb *np, u_char tn, u_char ln) 7376 { 7377 struct tcb *tp = &np->target[tn]; 7378 struct lcb *lp = tp->lp[ln]; 7379 struct ccb *cp = NULL; 7380 7381 /* 7382 ** Allocate memory for this CCB. 7383 */ 7384 cp = m_calloc_dma(sizeof(struct ccb), "CCB"); 7385 if (!cp) 7386 return; 7387 7388 /* 7389 ** Count it and initialyze it. 7390 */ 7391 lp->actccbs++; 7392 np->actccbs++; 7393 memset(cp, 0, sizeof (*cp)); 7394 ncr_init_ccb(np, cp); 7395 7396 /* 7397 ** Chain into wakeup list and free ccb queue and take it 7398 ** into account for tagged commands. 7399 */ 7400 cp->link_ccb = np->ccb->link_ccb; 7401 np->ccb->link_ccb = cp; 7402 7403 list_add(&cp->link_ccbq, &lp->free_ccbq); 7404 } 7405 7406 /*========================================================== 7407 ** 7408 ** 7409 ** Allocation of resources for Targets/Luns/Tags. 7410 ** 7411 ** 7412 **========================================================== 7413 */ 7414 7415 7416 /*------------------------------------------------------------------------ 7417 ** Target control block initialisation. 7418 **------------------------------------------------------------------------ 7419 ** This data structure is fully initialized after a SCSI command 7420 ** has been successfully completed for this target. 7421 ** It contains a SCRIPT that is called on target reselection. 7422 **------------------------------------------------------------------------ 7423 */ 7424 static void ncr_init_tcb (struct ncb *np, u_char tn) 7425 { 7426 struct tcb *tp = &np->target[tn]; 7427 ncrcmd copy_1 = np->features & FE_PFEN ? SCR_COPY(1) : SCR_COPY_F(1); 7428 int th = tn & 3; 7429 int i; 7430 7431 /* 7432 ** Jump to next tcb if SFBR does not match this target. 7433 ** JUMP IF (SFBR != #target#), @(next tcb) 7434 */ 7435 tp->jump_tcb.l_cmd = 7436 cpu_to_scr((SCR_JUMP ^ IFFALSE (DATA (0x80 + tn)))); 7437 tp->jump_tcb.l_paddr = np->jump_tcb[th].l_paddr; 7438 7439 /* 7440 ** Load the synchronous transfer register. 7441 ** COPY @(tp->sval), @(sxfer) 7442 */ 7443 tp->getscr[0] = cpu_to_scr(copy_1); 7444 tp->getscr[1] = cpu_to_scr(vtobus (&tp->sval)); 7445 #ifdef SCSI_NCR_BIG_ENDIAN 7446 tp->getscr[2] = cpu_to_scr(ncr_reg_bus_addr(nc_sxfer) ^ 3); 7447 #else 7448 tp->getscr[2] = cpu_to_scr(ncr_reg_bus_addr(nc_sxfer)); 7449 #endif 7450 7451 /* 7452 ** Load the timing register. 7453 ** COPY @(tp->wval), @(scntl3) 7454 */ 7455 tp->getscr[3] = cpu_to_scr(copy_1); 7456 tp->getscr[4] = cpu_to_scr(vtobus (&tp->wval)); 7457 #ifdef SCSI_NCR_BIG_ENDIAN 7458 tp->getscr[5] = cpu_to_scr(ncr_reg_bus_addr(nc_scntl3) ^ 3); 7459 #else 7460 tp->getscr[5] = cpu_to_scr(ncr_reg_bus_addr(nc_scntl3)); 7461 #endif 7462 7463 /* 7464 ** Get the IDENTIFY message and the lun. 7465 ** CALL @script(resel_lun) 7466 */ 7467 tp->call_lun.l_cmd = cpu_to_scr(SCR_CALL); 7468 tp->call_lun.l_paddr = cpu_to_scr(NCB_SCRIPT_PHYS (np, resel_lun)); 7469 7470 /* 7471 ** Look for the lun control block of this nexus. 7472 ** For i = 0 to 3 7473 ** JUMP ^ IFTRUE (MASK (i, 3)), @(next_lcb) 7474 */ 7475 for (i = 0 ; i < 4 ; i++) { 7476 tp->jump_lcb[i].l_cmd = 7477 cpu_to_scr((SCR_JUMP ^ IFTRUE (MASK (i, 3)))); 7478 tp->jump_lcb[i].l_paddr = 7479 cpu_to_scr(NCB_SCRIPTH_PHYS (np, bad_identify)); 7480 } 7481 7482 /* 7483 ** Link this target control block to the JUMP chain. 7484 */ 7485 np->jump_tcb[th].l_paddr = cpu_to_scr(vtobus (&tp->jump_tcb)); 7486 7487 /* 7488 ** These assert's should be moved at driver initialisations. 7489 */ 7490 #ifdef SCSI_NCR_BIG_ENDIAN 7491 BUG_ON(((offsetof(struct ncr_reg, nc_sxfer) ^ 7492 offsetof(struct tcb , sval )) &3) != 3); 7493 BUG_ON(((offsetof(struct ncr_reg, nc_scntl3) ^ 7494 offsetof(struct tcb , wval )) &3) != 3); 7495 #else 7496 BUG_ON(((offsetof(struct ncr_reg, nc_sxfer) ^ 7497 offsetof(struct tcb , sval )) &3) != 0); 7498 BUG_ON(((offsetof(struct ncr_reg, nc_scntl3) ^ 7499 offsetof(struct tcb , wval )) &3) != 0); 7500 #endif 7501 } 7502 7503 7504 /*------------------------------------------------------------------------ 7505 ** Lun control block allocation and initialization. 7506 **------------------------------------------------------------------------ 7507 ** This data structure is allocated and initialized after a SCSI 7508 ** command has been successfully completed for this target/lun. 7509 **------------------------------------------------------------------------ 7510 */ 7511 static struct lcb *ncr_alloc_lcb (struct ncb *np, u_char tn, u_char ln) 7512 { 7513 struct tcb *tp = &np->target[tn]; 7514 struct lcb *lp = tp->lp[ln]; 7515 ncrcmd copy_4 = np->features & FE_PFEN ? SCR_COPY(4) : SCR_COPY_F(4); 7516 int lh = ln & 3; 7517 7518 /* 7519 ** Already done, return. 7520 */ 7521 if (lp) 7522 return lp; 7523 7524 /* 7525 ** Allocate the lcb. 7526 */ 7527 lp = m_calloc_dma(sizeof(struct lcb), "LCB"); 7528 if (!lp) 7529 goto fail; 7530 memset(lp, 0, sizeof(*lp)); 7531 tp->lp[ln] = lp; 7532 7533 /* 7534 ** Initialize the target control block if not yet. 7535 */ 7536 if (!tp->jump_tcb.l_cmd) 7537 ncr_init_tcb(np, tn); 7538 7539 /* 7540 ** Initialize the CCB queue headers. 7541 */ 7542 INIT_LIST_HEAD(&lp->free_ccbq); 7543 INIT_LIST_HEAD(&lp->busy_ccbq); 7544 INIT_LIST_HEAD(&lp->wait_ccbq); 7545 INIT_LIST_HEAD(&lp->skip_ccbq); 7546 7547 /* 7548 ** Set max CCBs to 1 and use the default 1 entry 7549 ** jump table by default. 7550 */ 7551 lp->maxnxs = 1; 7552 lp->jump_ccb = &lp->jump_ccb_0; 7553 lp->p_jump_ccb = cpu_to_scr(vtobus(lp->jump_ccb)); 7554 7555 /* 7556 ** Initilialyze the reselect script: 7557 ** 7558 ** Jump to next lcb if SFBR does not match this lun. 7559 ** Load TEMP with the CCB direct jump table bus address. 7560 ** Get the SIMPLE TAG message and the tag. 7561 ** 7562 ** JUMP IF (SFBR != #lun#), @(next lcb) 7563 ** COPY @(lp->p_jump_ccb), @(temp) 7564 ** JUMP @script(resel_notag) 7565 */ 7566 lp->jump_lcb.l_cmd = 7567 cpu_to_scr((SCR_JUMP ^ IFFALSE (MASK (0x80+ln, 0xff)))); 7568 lp->jump_lcb.l_paddr = tp->jump_lcb[lh].l_paddr; 7569 7570 lp->load_jump_ccb[0] = cpu_to_scr(copy_4); 7571 lp->load_jump_ccb[1] = cpu_to_scr(vtobus (&lp->p_jump_ccb)); 7572 lp->load_jump_ccb[2] = cpu_to_scr(ncr_reg_bus_addr(nc_temp)); 7573 7574 lp->jump_tag.l_cmd = cpu_to_scr(SCR_JUMP); 7575 lp->jump_tag.l_paddr = cpu_to_scr(NCB_SCRIPT_PHYS (np, resel_notag)); 7576 7577 /* 7578 ** Link this lun control block to the JUMP chain. 7579 */ 7580 tp->jump_lcb[lh].l_paddr = cpu_to_scr(vtobus (&lp->jump_lcb)); 7581 7582 /* 7583 ** Initialize command queuing control. 7584 */ 7585 lp->busyccbs = 1; 7586 lp->queuedccbs = 1; 7587 lp->queuedepth = 1; 7588 fail: 7589 return lp; 7590 } 7591 7592 7593 /*------------------------------------------------------------------------ 7594 ** Lun control block setup on INQUIRY data received. 7595 **------------------------------------------------------------------------ 7596 ** We only support WIDE, SYNC for targets and CMDQ for logical units. 7597 ** This setup is done on each INQUIRY since we are expecting user 7598 ** will play with CHANGE DEFINITION commands. :-) 7599 **------------------------------------------------------------------------ 7600 */ 7601 static struct lcb *ncr_setup_lcb (struct ncb *np, struct scsi_device *sdev) 7602 { 7603 unsigned char tn = sdev->id, ln = sdev->lun; 7604 struct tcb *tp = &np->target[tn]; 7605 struct lcb *lp = tp->lp[ln]; 7606 7607 /* If no lcb, try to allocate it. */ 7608 if (!lp && !(lp = ncr_alloc_lcb(np, tn, ln))) 7609 goto fail; 7610 7611 /* 7612 ** If unit supports tagged commands, allocate the 7613 ** CCB JUMP table if not yet. 7614 */ 7615 if (sdev->tagged_supported && lp->jump_ccb == &lp->jump_ccb_0) { 7616 int i; 7617 lp->jump_ccb = m_calloc_dma(256, "JUMP_CCB"); 7618 if (!lp->jump_ccb) { 7619 lp->jump_ccb = &lp->jump_ccb_0; 7620 goto fail; 7621 } 7622 lp->p_jump_ccb = cpu_to_scr(vtobus(lp->jump_ccb)); 7623 for (i = 0 ; i < 64 ; i++) 7624 lp->jump_ccb[i] = 7625 cpu_to_scr(NCB_SCRIPTH_PHYS (np, bad_i_t_l_q)); 7626 for (i = 0 ; i < MAX_TAGS ; i++) 7627 lp->cb_tags[i] = i; 7628 lp->maxnxs = MAX_TAGS; 7629 lp->tags_stime = jiffies + 3*HZ; 7630 ncr_setup_tags (np, sdev); 7631 } 7632 7633 7634 fail: 7635 return lp; 7636 } 7637 7638 /*========================================================== 7639 ** 7640 ** 7641 ** Build Scatter Gather Block 7642 ** 7643 ** 7644 **========================================================== 7645 ** 7646 ** The transfer area may be scattered among 7647 ** several non adjacent physical pages. 7648 ** 7649 ** We may use MAX_SCATTER blocks. 7650 ** 7651 **---------------------------------------------------------- 7652 */ 7653 7654 /* 7655 ** We try to reduce the number of interrupts caused 7656 ** by unexpected phase changes due to disconnects. 7657 ** A typical harddisk may disconnect before ANY block. 7658 ** If we wanted to avoid unexpected phase changes at all 7659 ** we had to use a break point every 512 bytes. 7660 ** Of course the number of scatter/gather blocks is 7661 ** limited. 7662 ** Under Linux, the scatter/gatter blocks are provided by 7663 ** the generic driver. We just have to copy addresses and 7664 ** sizes to the data segment array. 7665 */ 7666 7667 static int ncr_scatter_no_sglist(struct ncb *np, struct ccb *cp, struct scsi_cmnd *cmd) 7668 { 7669 struct scr_tblmove *data = &cp->phys.data[MAX_SCATTER - 1]; 7670 int segment; 7671 7672 cp->data_len = cmd->request_bufflen; 7673 7674 if (cmd->request_bufflen) { 7675 dma_addr_t baddr = map_scsi_single_data(np, cmd); 7676 if (baddr) { 7677 ncr_build_sge(np, data, baddr, cmd->request_bufflen); 7678 segment = 1; 7679 } else { 7680 segment = -2; 7681 } 7682 } else { 7683 segment = 0; 7684 } 7685 7686 return segment; 7687 } 7688 7689 static int ncr_scatter(struct ncb *np, struct ccb *cp, struct scsi_cmnd *cmd) 7690 { 7691 int segment = 0; 7692 int use_sg = (int) cmd->use_sg; 7693 7694 cp->data_len = 0; 7695 7696 if (!use_sg) 7697 segment = ncr_scatter_no_sglist(np, cp, cmd); 7698 else if ((use_sg = map_scsi_sg_data(np, cmd)) > 0) { 7699 struct scatterlist *scatter = (struct scatterlist *)cmd->request_buffer; 7700 struct scr_tblmove *data; 7701 7702 if (use_sg > MAX_SCATTER) { 7703 unmap_scsi_data(np, cmd); 7704 return -1; 7705 } 7706 7707 data = &cp->phys.data[MAX_SCATTER - use_sg]; 7708 7709 for (segment = 0; segment < use_sg; segment++) { 7710 dma_addr_t baddr = sg_dma_address(&scatter[segment]); 7711 unsigned int len = sg_dma_len(&scatter[segment]); 7712 7713 ncr_build_sge(np, &data[segment], baddr, len); 7714 cp->data_len += len; 7715 } 7716 } else { 7717 segment = -2; 7718 } 7719 7720 return segment; 7721 } 7722 7723 /*========================================================== 7724 ** 7725 ** 7726 ** Test the bus snoop logic :-( 7727 ** 7728 ** Has to be called with interrupts disabled. 7729 ** 7730 ** 7731 **========================================================== 7732 */ 7733 7734 static int __init ncr_regtest (struct ncb* np) 7735 { 7736 register volatile u32 data; 7737 /* 7738 ** ncr registers may NOT be cached. 7739 ** write 0xffffffff to a read only register area, 7740 ** and try to read it back. 7741 */ 7742 data = 0xffffffff; 7743 OUTL_OFF(offsetof(struct ncr_reg, nc_dstat), data); 7744 data = INL_OFF(offsetof(struct ncr_reg, nc_dstat)); 7745 #if 1 7746 if (data == 0xffffffff) { 7747 #else 7748 if ((data & 0xe2f0fffd) != 0x02000080) { 7749 #endif 7750 printk ("CACHE TEST FAILED: reg dstat-sstat2 readback %x.\n", 7751 (unsigned) data); 7752 return (0x10); 7753 } 7754 return (0); 7755 } 7756 7757 static int __init ncr_snooptest (struct ncb* np) 7758 { 7759 u32 ncr_rd, ncr_wr, ncr_bk, host_rd, host_wr, pc; 7760 int i, err=0; 7761 if (np->reg) { 7762 err |= ncr_regtest (np); 7763 if (err) 7764 return (err); 7765 } 7766 7767 /* init */ 7768 pc = NCB_SCRIPTH_PHYS (np, snooptest); 7769 host_wr = 1; 7770 ncr_wr = 2; 7771 /* 7772 ** Set memory and register. 7773 */ 7774 np->ncr_cache = cpu_to_scr(host_wr); 7775 OUTL (nc_temp, ncr_wr); 7776 /* 7777 ** Start script (exchange values) 7778 */ 7779 OUTL_DSP (pc); 7780 /* 7781 ** Wait 'til done (with timeout) 7782 */ 7783 for (i=0; i<NCR_SNOOP_TIMEOUT; i++) 7784 if (INB(nc_istat) & (INTF|SIP|DIP)) 7785 break; 7786 /* 7787 ** Save termination position. 7788 */ 7789 pc = INL (nc_dsp); 7790 /* 7791 ** Read memory and register. 7792 */ 7793 host_rd = scr_to_cpu(np->ncr_cache); 7794 ncr_rd = INL (nc_scratcha); 7795 ncr_bk = INL (nc_temp); 7796 /* 7797 ** Reset ncr chip 7798 */ 7799 ncr_chip_reset(np, 100); 7800 /* 7801 ** check for timeout 7802 */ 7803 if (i>=NCR_SNOOP_TIMEOUT) { 7804 printk ("CACHE TEST FAILED: timeout.\n"); 7805 return (0x20); 7806 } 7807 /* 7808 ** Check termination position. 7809 */ 7810 if (pc != NCB_SCRIPTH_PHYS (np, snoopend)+8) { 7811 printk ("CACHE TEST FAILED: script execution failed.\n"); 7812 printk ("start=%08lx, pc=%08lx, end=%08lx\n", 7813 (u_long) NCB_SCRIPTH_PHYS (np, snooptest), (u_long) pc, 7814 (u_long) NCB_SCRIPTH_PHYS (np, snoopend) +8); 7815 return (0x40); 7816 } 7817 /* 7818 ** Show results. 7819 */ 7820 if (host_wr != ncr_rd) { 7821 printk ("CACHE TEST FAILED: host wrote %d, ncr read %d.\n", 7822 (int) host_wr, (int) ncr_rd); 7823 err |= 1; 7824 } 7825 if (host_rd != ncr_wr) { 7826 printk ("CACHE TEST FAILED: ncr wrote %d, host read %d.\n", 7827 (int) ncr_wr, (int) host_rd); 7828 err |= 2; 7829 } 7830 if (ncr_bk != ncr_wr) { 7831 printk ("CACHE TEST FAILED: ncr wrote %d, read back %d.\n", 7832 (int) ncr_wr, (int) ncr_bk); 7833 err |= 4; 7834 } 7835 return (err); 7836 } 7837 7838 /*========================================================== 7839 ** 7840 ** Determine the ncr's clock frequency. 7841 ** This is essential for the negotiation 7842 ** of the synchronous transfer rate. 7843 ** 7844 **========================================================== 7845 ** 7846 ** Note: we have to return the correct value. 7847 ** THERE IS NO SAFE DEFAULT VALUE. 7848 ** 7849 ** Most NCR/SYMBIOS boards are delivered with a 40 Mhz clock. 7850 ** 53C860 and 53C875 rev. 1 support fast20 transfers but 7851 ** do not have a clock doubler and so are provided with a 7852 ** 80 MHz clock. All other fast20 boards incorporate a doubler 7853 ** and so should be delivered with a 40 MHz clock. 7854 ** The future fast40 chips (895/895) use a 40 Mhz base clock 7855 ** and provide a clock quadrupler (160 Mhz). The code below 7856 ** tries to deal as cleverly as possible with all this stuff. 7857 ** 7858 **---------------------------------------------------------- 7859 */ 7860 7861 /* 7862 * Select NCR SCSI clock frequency 7863 */ 7864 static void ncr_selectclock(struct ncb *np, u_char scntl3) 7865 { 7866 if (np->multiplier < 2) { 7867 OUTB(nc_scntl3, scntl3); 7868 return; 7869 } 7870 7871 if (bootverbose >= 2) 7872 printk ("%s: enabling clock multiplier\n", ncr_name(np)); 7873 7874 OUTB(nc_stest1, DBLEN); /* Enable clock multiplier */ 7875 if (np->multiplier > 2) { /* Poll bit 5 of stest4 for quadrupler */ 7876 int i = 20; 7877 while (!(INB(nc_stest4) & LCKFRQ) && --i > 0) 7878 udelay(20); 7879 if (!i) 7880 printk("%s: the chip cannot lock the frequency\n", ncr_name(np)); 7881 } else /* Wait 20 micro-seconds for doubler */ 7882 udelay(20); 7883 OUTB(nc_stest3, HSC); /* Halt the scsi clock */ 7884 OUTB(nc_scntl3, scntl3); 7885 OUTB(nc_stest1, (DBLEN|DBLSEL));/* Select clock multiplier */ 7886 OUTB(nc_stest3, 0x00); /* Restart scsi clock */ 7887 } 7888 7889 7890 /* 7891 * calculate NCR SCSI clock frequency (in KHz) 7892 */ 7893 static unsigned __init ncrgetfreq (struct ncb *np, int gen) 7894 { 7895 unsigned ms = 0; 7896 char count = 0; 7897 7898 /* 7899 * Measure GEN timer delay in order 7900 * to calculate SCSI clock frequency 7901 * 7902 * This code will never execute too 7903 * many loop iterations (if DELAY is 7904 * reasonably correct). It could get 7905 * too low a delay (too high a freq.) 7906 * if the CPU is slow executing the 7907 * loop for some reason (an NMI, for 7908 * example). For this reason we will 7909 * if multiple measurements are to be 7910 * performed trust the higher delay 7911 * (lower frequency returned). 7912 */ 7913 OUTB (nc_stest1, 0); /* make sure clock doubler is OFF */ 7914 OUTW (nc_sien , 0); /* mask all scsi interrupts */ 7915 (void) INW (nc_sist); /* clear pending scsi interrupt */ 7916 OUTB (nc_dien , 0); /* mask all dma interrupts */ 7917 (void) INW (nc_sist); /* another one, just to be sure :) */ 7918 OUTB (nc_scntl3, 4); /* set pre-scaler to divide by 3 */ 7919 OUTB (nc_stime1, 0); /* disable general purpose timer */ 7920 OUTB (nc_stime1, gen); /* set to nominal delay of 1<<gen * 125us */ 7921 while (!(INW(nc_sist) & GEN) && ms++ < 100000) { 7922 for (count = 0; count < 10; count ++) 7923 udelay(100); /* count ms */ 7924 } 7925 OUTB (nc_stime1, 0); /* disable general purpose timer */ 7926 /* 7927 * set prescaler to divide by whatever 0 means 7928 * 0 ought to choose divide by 2, but appears 7929 * to set divide by 3.5 mode in my 53c810 ... 7930 */ 7931 OUTB (nc_scntl3, 0); 7932 7933 if (bootverbose >= 2) 7934 printk ("%s: Delay (GEN=%d): %u msec\n", ncr_name(np), gen, ms); 7935 /* 7936 * adjust for prescaler, and convert into KHz 7937 */ 7938 return ms ? ((1 << gen) * 4340) / ms : 0; 7939 } 7940 7941 /* 7942 * Get/probe NCR SCSI clock frequency 7943 */ 7944 static void __init ncr_getclock (struct ncb *np, int mult) 7945 { 7946 unsigned char scntl3 = INB(nc_scntl3); 7947 unsigned char stest1 = INB(nc_stest1); 7948 unsigned f1; 7949 7950 np->multiplier = 1; 7951 f1 = 40000; 7952 7953 /* 7954 ** True with 875 or 895 with clock multiplier selected 7955 */ 7956 if (mult > 1 && (stest1 & (DBLEN+DBLSEL)) == DBLEN+DBLSEL) { 7957 if (bootverbose >= 2) 7958 printk ("%s: clock multiplier found\n", ncr_name(np)); 7959 np->multiplier = mult; 7960 } 7961 7962 /* 7963 ** If multiplier not found or scntl3 not 7,5,3, 7964 ** reset chip and get frequency from general purpose timer. 7965 ** Otherwise trust scntl3 BIOS setting. 7966 */ 7967 if (np->multiplier != mult || (scntl3 & 7) < 3 || !(scntl3 & 1)) { 7968 unsigned f2; 7969 7970 ncr_chip_reset(np, 5); 7971 7972 (void) ncrgetfreq (np, 11); /* throw away first result */ 7973 f1 = ncrgetfreq (np, 11); 7974 f2 = ncrgetfreq (np, 11); 7975 7976 if(bootverbose) 7977 printk ("%s: NCR clock is %uKHz, %uKHz\n", ncr_name(np), f1, f2); 7978 7979 if (f1 > f2) f1 = f2; /* trust lower result */ 7980 7981 if (f1 < 45000) f1 = 40000; 7982 else if (f1 < 55000) f1 = 50000; 7983 else f1 = 80000; 7984 7985 if (f1 < 80000 && mult > 1) { 7986 if (bootverbose >= 2) 7987 printk ("%s: clock multiplier assumed\n", ncr_name(np)); 7988 np->multiplier = mult; 7989 } 7990 } else { 7991 if ((scntl3 & 7) == 3) f1 = 40000; 7992 else if ((scntl3 & 7) == 5) f1 = 80000; 7993 else f1 = 160000; 7994 7995 f1 /= np->multiplier; 7996 } 7997 7998 /* 7999 ** Compute controller synchronous parameters. 8000 */ 8001 f1 *= np->multiplier; 8002 np->clock_khz = f1; 8003 } 8004 8005 /*===================== LINUX ENTRY POINTS SECTION ==========================*/ 8006 8007 static int ncr53c8xx_slave_alloc(struct scsi_device *device) 8008 { 8009 struct Scsi_Host *host = device->host; 8010 struct ncb *np = ((struct host_data *) host->hostdata)->ncb; 8011 struct tcb *tp = &np->target[device->id]; 8012 tp->starget = device->sdev_target; 8013 8014 return 0; 8015 } 8016 8017 static int ncr53c8xx_slave_configure(struct scsi_device *device) 8018 { 8019 struct Scsi_Host *host = device->host; 8020 struct ncb *np = ((struct host_data *) host->hostdata)->ncb; 8021 struct tcb *tp = &np->target[device->id]; 8022 struct lcb *lp = tp->lp[device->lun]; 8023 int numtags, depth_to_use; 8024 8025 ncr_setup_lcb(np, device); 8026 8027 /* 8028 ** Select queue depth from driver setup. 8029 ** Donnot use more than configured by user. 8030 ** Use at least 2. 8031 ** Donnot use more than our maximum. 8032 */ 8033 numtags = device_queue_depth(np->unit, device->id, device->lun); 8034 if (numtags > tp->usrtags) 8035 numtags = tp->usrtags; 8036 if (!device->tagged_supported) 8037 numtags = 1; 8038 depth_to_use = numtags; 8039 if (depth_to_use < 2) 8040 depth_to_use = 2; 8041 if (depth_to_use > MAX_TAGS) 8042 depth_to_use = MAX_TAGS; 8043 8044 scsi_adjust_queue_depth(device, 8045 (device->tagged_supported ? 8046 MSG_SIMPLE_TAG : 0), 8047 depth_to_use); 8048 8049 /* 8050 ** Since the queue depth is not tunable under Linux, 8051 ** we need to know this value in order not to 8052 ** announce stupid things to user. 8053 ** 8054 ** XXX(hch): As of Linux 2.6 it certainly _is_ tunable.. 8055 ** In fact we just tuned it, or did I miss 8056 ** something important? :) 8057 */ 8058 if (lp) { 8059 lp->numtags = lp->maxtags = numtags; 8060 lp->scdev_depth = depth_to_use; 8061 } 8062 ncr_setup_tags (np, device); 8063 8064 #ifdef DEBUG_NCR53C8XX 8065 printk("ncr53c8xx_select_queue_depth: host=%d, id=%d, lun=%d, depth=%d\n", 8066 np->unit, device->id, device->lun, depth_to_use); 8067 #endif 8068 8069 if (spi_support_sync(device->sdev_target) && 8070 !spi_initial_dv(device->sdev_target)) 8071 spi_dv_device(device); 8072 return 0; 8073 } 8074 8075 static int ncr53c8xx_queue_command (struct scsi_cmnd *cmd, void (* done)(struct scsi_cmnd *)) 8076 { 8077 struct ncb *np = ((struct host_data *) cmd->device->host->hostdata)->ncb; 8078 unsigned long flags; 8079 int sts; 8080 8081 #ifdef DEBUG_NCR53C8XX 8082 printk("ncr53c8xx_queue_command\n"); 8083 #endif 8084 8085 cmd->scsi_done = done; 8086 cmd->host_scribble = NULL; 8087 cmd->__data_mapped = 0; 8088 cmd->__data_mapping = 0; 8089 8090 spin_lock_irqsave(&np->smp_lock, flags); 8091 8092 if ((sts = ncr_queue_command(np, cmd)) != DID_OK) { 8093 cmd->result = ScsiResult(sts, 0); 8094 #ifdef DEBUG_NCR53C8XX 8095 printk("ncr53c8xx : command not queued - result=%d\n", sts); 8096 #endif 8097 } 8098 #ifdef DEBUG_NCR53C8XX 8099 else 8100 printk("ncr53c8xx : command successfully queued\n"); 8101 #endif 8102 8103 spin_unlock_irqrestore(&np->smp_lock, flags); 8104 8105 if (sts != DID_OK) { 8106 unmap_scsi_data(np, cmd); 8107 done(cmd); 8108 sts = 0; 8109 } 8110 8111 return sts; 8112 } 8113 8114 irqreturn_t ncr53c8xx_intr(int irq, void *dev_id, struct pt_regs * regs) 8115 { 8116 unsigned long flags; 8117 struct Scsi_Host *shost = (struct Scsi_Host *)dev_id; 8118 struct host_data *host_data = (struct host_data *)shost->hostdata; 8119 struct ncb *np = host_data->ncb; 8120 struct scsi_cmnd *done_list; 8121 8122 #ifdef DEBUG_NCR53C8XX 8123 printk("ncr53c8xx : interrupt received\n"); 8124 #endif 8125 8126 if (DEBUG_FLAGS & DEBUG_TINY) printk ("["); 8127 8128 spin_lock_irqsave(&np->smp_lock, flags); 8129 ncr_exception(np); 8130 done_list = np->done_list; 8131 np->done_list = NULL; 8132 spin_unlock_irqrestore(&np->smp_lock, flags); 8133 8134 if (DEBUG_FLAGS & DEBUG_TINY) printk ("]\n"); 8135 8136 if (done_list) 8137 ncr_flush_done_cmds(done_list); 8138 return IRQ_HANDLED; 8139 } 8140 8141 static void ncr53c8xx_timeout(unsigned long npref) 8142 { 8143 struct ncb *np = (struct ncb *) npref; 8144 unsigned long flags; 8145 struct scsi_cmnd *done_list; 8146 8147 spin_lock_irqsave(&np->smp_lock, flags); 8148 ncr_timeout(np); 8149 done_list = np->done_list; 8150 np->done_list = NULL; 8151 spin_unlock_irqrestore(&np->smp_lock, flags); 8152 8153 if (done_list) 8154 ncr_flush_done_cmds(done_list); 8155 } 8156 8157 static int ncr53c8xx_bus_reset(struct scsi_cmnd *cmd) 8158 { 8159 struct ncb *np = ((struct host_data *) cmd->device->host->hostdata)->ncb; 8160 int sts; 8161 unsigned long flags; 8162 struct scsi_cmnd *done_list; 8163 8164 /* 8165 * If the mid-level driver told us reset is synchronous, it seems 8166 * that we must call the done() callback for the involved command, 8167 * even if this command was not queued to the low-level driver, 8168 * before returning SUCCESS. 8169 */ 8170 8171 spin_lock_irqsave(&np->smp_lock, flags); 8172 sts = ncr_reset_bus(np, cmd, 1); 8173 8174 done_list = np->done_list; 8175 np->done_list = NULL; 8176 spin_unlock_irqrestore(&np->smp_lock, flags); 8177 8178 ncr_flush_done_cmds(done_list); 8179 8180 return sts; 8181 } 8182 8183 #if 0 /* unused and broken */ 8184 static int ncr53c8xx_abort(struct scsi_cmnd *cmd) 8185 { 8186 struct ncb *np = ((struct host_data *) cmd->device->host->hostdata)->ncb; 8187 int sts; 8188 unsigned long flags; 8189 struct scsi_cmnd *done_list; 8190 8191 #if defined SCSI_RESET_SYNCHRONOUS && defined SCSI_RESET_ASYNCHRONOUS 8192 printk("ncr53c8xx_abort: pid=%lu serial_number=%ld\n", 8193 cmd->pid, cmd->serial_number); 8194 #else 8195 printk("ncr53c8xx_abort: command pid %lu\n", cmd->pid); 8196 #endif 8197 8198 NCR_LOCK_NCB(np, flags); 8199 8200 sts = ncr_abort_command(np, cmd); 8201 out: 8202 done_list = np->done_list; 8203 np->done_list = NULL; 8204 NCR_UNLOCK_NCB(np, flags); 8205 8206 ncr_flush_done_cmds(done_list); 8207 8208 return sts; 8209 } 8210 #endif 8211 8212 8213 /* 8214 ** Scsi command waiting list management. 8215 ** 8216 ** It may happen that we cannot insert a scsi command into the start queue, 8217 ** in the following circumstances. 8218 ** Too few preallocated ccb(s), 8219 ** maxtags < cmd_per_lun of the Linux host control block, 8220 ** etc... 8221 ** Such scsi commands are inserted into a waiting list. 8222 ** When a scsi command complete, we try to requeue the commands of the 8223 ** waiting list. 8224 */ 8225 8226 #define next_wcmd host_scribble 8227 8228 static void insert_into_waiting_list(struct ncb *np, struct scsi_cmnd *cmd) 8229 { 8230 struct scsi_cmnd *wcmd; 8231 8232 #ifdef DEBUG_WAITING_LIST 8233 printk("%s: cmd %lx inserted into waiting list\n", ncr_name(np), (u_long) cmd); 8234 #endif 8235 cmd->next_wcmd = NULL; 8236 if (!(wcmd = np->waiting_list)) np->waiting_list = cmd; 8237 else { 8238 while ((wcmd->next_wcmd) != 0) 8239 wcmd = (struct scsi_cmnd *) wcmd->next_wcmd; 8240 wcmd->next_wcmd = (char *) cmd; 8241 } 8242 } 8243 8244 static struct scsi_cmnd *retrieve_from_waiting_list(int to_remove, struct ncb *np, struct scsi_cmnd *cmd) 8245 { 8246 struct scsi_cmnd **pcmd = &np->waiting_list; 8247 8248 while (*pcmd) { 8249 if (cmd == *pcmd) { 8250 if (to_remove) { 8251 *pcmd = (struct scsi_cmnd *) cmd->next_wcmd; 8252 cmd->next_wcmd = NULL; 8253 } 8254 #ifdef DEBUG_WAITING_LIST 8255 printk("%s: cmd %lx retrieved from waiting list\n", ncr_name(np), (u_long) cmd); 8256 #endif 8257 return cmd; 8258 } 8259 pcmd = (struct scsi_cmnd **) &(*pcmd)->next_wcmd; 8260 } 8261 return NULL; 8262 } 8263 8264 static void process_waiting_list(struct ncb *np, int sts) 8265 { 8266 struct scsi_cmnd *waiting_list, *wcmd; 8267 8268 waiting_list = np->waiting_list; 8269 np->waiting_list = NULL; 8270 8271 #ifdef DEBUG_WAITING_LIST 8272 if (waiting_list) printk("%s: waiting_list=%lx processing sts=%d\n", ncr_name(np), (u_long) waiting_list, sts); 8273 #endif 8274 while ((wcmd = waiting_list) != 0) { 8275 waiting_list = (struct scsi_cmnd *) wcmd->next_wcmd; 8276 wcmd->next_wcmd = NULL; 8277 if (sts == DID_OK) { 8278 #ifdef DEBUG_WAITING_LIST 8279 printk("%s: cmd %lx trying to requeue\n", ncr_name(np), (u_long) wcmd); 8280 #endif 8281 sts = ncr_queue_command(np, wcmd); 8282 } 8283 if (sts != DID_OK) { 8284 #ifdef DEBUG_WAITING_LIST 8285 printk("%s: cmd %lx done forced sts=%d\n", ncr_name(np), (u_long) wcmd, sts); 8286 #endif 8287 wcmd->result = ScsiResult(sts, 0); 8288 ncr_queue_done_cmd(np, wcmd); 8289 } 8290 } 8291 } 8292 8293 #undef next_wcmd 8294 8295 static ssize_t show_ncr53c8xx_revision(struct class_device *dev, char *buf) 8296 { 8297 struct Scsi_Host *host = class_to_shost(dev); 8298 struct host_data *host_data = (struct host_data *)host->hostdata; 8299 8300 return snprintf(buf, 20, "0x%x\n", host_data->ncb->revision_id); 8301 } 8302 8303 static struct class_device_attribute ncr53c8xx_revision_attr = { 8304 .attr = { .name = "revision", .mode = S_IRUGO, }, 8305 .show = show_ncr53c8xx_revision, 8306 }; 8307 8308 static struct class_device_attribute *ncr53c8xx_host_attrs[] = { 8309 &ncr53c8xx_revision_attr, 8310 NULL 8311 }; 8312 8313 /*========================================================== 8314 ** 8315 ** Boot command line. 8316 ** 8317 **========================================================== 8318 */ 8319 #ifdef MODULE 8320 char *ncr53c8xx; /* command line passed by insmod */ 8321 module_param(ncr53c8xx, charp, 0); 8322 #endif 8323 8324 static int __init ncr53c8xx_setup(char *str) 8325 { 8326 return sym53c8xx__setup(str); 8327 } 8328 8329 #ifndef MODULE 8330 __setup("ncr53c8xx=", ncr53c8xx_setup); 8331 #endif 8332 8333 8334 /* 8335 * Host attach and initialisations. 8336 * 8337 * Allocate host data and ncb structure. 8338 * Request IO region and remap MMIO region. 8339 * Do chip initialization. 8340 * If all is OK, install interrupt handling and 8341 * start the timer daemon. 8342 */ 8343 struct Scsi_Host * __init ncr_attach(struct scsi_host_template *tpnt, 8344 int unit, struct ncr_device *device) 8345 { 8346 struct host_data *host_data; 8347 struct ncb *np = NULL; 8348 struct Scsi_Host *instance = NULL; 8349 u_long flags = 0; 8350 int i; 8351 8352 if (!tpnt->name) 8353 tpnt->name = SCSI_NCR_DRIVER_NAME; 8354 if (!tpnt->shost_attrs) 8355 tpnt->shost_attrs = ncr53c8xx_host_attrs; 8356 8357 tpnt->queuecommand = ncr53c8xx_queue_command; 8358 tpnt->slave_configure = ncr53c8xx_slave_configure; 8359 tpnt->slave_alloc = ncr53c8xx_slave_alloc; 8360 tpnt->eh_bus_reset_handler = ncr53c8xx_bus_reset; 8361 tpnt->can_queue = SCSI_NCR_CAN_QUEUE; 8362 tpnt->this_id = 7; 8363 tpnt->sg_tablesize = SCSI_NCR_SG_TABLESIZE; 8364 tpnt->cmd_per_lun = SCSI_NCR_CMD_PER_LUN; 8365 tpnt->use_clustering = ENABLE_CLUSTERING; 8366 8367 if (device->differential) 8368 driver_setup.diff_support = device->differential; 8369 8370 printk(KERN_INFO "ncr53c720-%d: rev 0x%x irq %d\n", 8371 unit, device->chip.revision_id, device->slot.irq); 8372 8373 instance = scsi_host_alloc(tpnt, sizeof(*host_data)); 8374 if (!instance) 8375 goto attach_error; 8376 host_data = (struct host_data *) instance->hostdata; 8377 8378 np = __m_calloc_dma(device->dev, sizeof(struct ncb), "NCB"); 8379 if (!np) 8380 goto attach_error; 8381 spin_lock_init(&np->smp_lock); 8382 np->dev = device->dev; 8383 np->p_ncb = vtobus(np); 8384 host_data->ncb = np; 8385 8386 np->ccb = m_calloc_dma(sizeof(struct ccb), "CCB"); 8387 if (!np->ccb) 8388 goto attach_error; 8389 8390 /* Store input information in the host data structure. */ 8391 np->unit = unit; 8392 np->verbose = driver_setup.verbose; 8393 sprintf(np->inst_name, "ncr53c720-%d", np->unit); 8394 np->revision_id = device->chip.revision_id; 8395 np->features = device->chip.features; 8396 np->clock_divn = device->chip.nr_divisor; 8397 np->maxoffs = device->chip.offset_max; 8398 np->maxburst = device->chip.burst_max; 8399 np->myaddr = device->host_id; 8400 8401 /* Allocate SCRIPTS areas. */ 8402 np->script0 = m_calloc_dma(sizeof(struct script), "SCRIPT"); 8403 if (!np->script0) 8404 goto attach_error; 8405 np->scripth0 = m_calloc_dma(sizeof(struct scripth), "SCRIPTH"); 8406 if (!np->scripth0) 8407 goto attach_error; 8408 8409 init_timer(&np->timer); 8410 np->timer.data = (unsigned long) np; 8411 np->timer.function = ncr53c8xx_timeout; 8412 8413 /* Try to map the controller chip to virtual and physical memory. */ 8414 8415 np->paddr = device->slot.base; 8416 np->paddr2 = (np->features & FE_RAM) ? device->slot.base_2 : 0; 8417 8418 if (device->slot.base_v) 8419 np->vaddr = device->slot.base_v; 8420 else 8421 np->vaddr = ioremap(device->slot.base_c, 128); 8422 8423 if (!np->vaddr) { 8424 printk(KERN_ERR 8425 "%s: can't map memory mapped IO region\n",ncr_name(np)); 8426 goto attach_error; 8427 } else { 8428 if (bootverbose > 1) 8429 printk(KERN_INFO 8430 "%s: using memory mapped IO at virtual address 0x%lx\n", ncr_name(np), (u_long) np->vaddr); 8431 } 8432 8433 /* Make the controller's registers available. Now the INB INW INL 8434 * OUTB OUTW OUTL macros can be used safely. 8435 */ 8436 8437 np->reg = (struct ncr_reg __iomem *)np->vaddr; 8438 8439 /* Do chip dependent initialization. */ 8440 ncr_prepare_setting(np); 8441 8442 if (np->paddr2 && sizeof(struct script) > 4096) { 8443 np->paddr2 = 0; 8444 printk(KERN_WARNING "%s: script too large, NOT using on chip RAM.\n", 8445 ncr_name(np)); 8446 } 8447 8448 instance->max_channel = 0; 8449 instance->this_id = np->myaddr; 8450 instance->max_id = np->maxwide ? 16 : 8; 8451 instance->max_lun = SCSI_NCR_MAX_LUN; 8452 instance->base = (unsigned long) np->reg; 8453 instance->irq = device->slot.irq; 8454 instance->unique_id = device->slot.base; 8455 instance->dma_channel = 0; 8456 instance->cmd_per_lun = MAX_TAGS; 8457 instance->can_queue = (MAX_START-4); 8458 /* This can happen if you forget to call ncr53c8xx_init from 8459 * your module_init */ 8460 BUG_ON(!ncr53c8xx_transport_template); 8461 instance->transportt = ncr53c8xx_transport_template; 8462 8463 /* Patch script to physical addresses */ 8464 ncr_script_fill(&script0, &scripth0); 8465 8466 np->scripth = np->scripth0; 8467 np->p_scripth = vtobus(np->scripth); 8468 np->p_script = (np->paddr2) ? np->paddr2 : vtobus(np->script0); 8469 8470 ncr_script_copy_and_bind(np, (ncrcmd *) &script0, 8471 (ncrcmd *) np->script0, sizeof(struct script)); 8472 ncr_script_copy_and_bind(np, (ncrcmd *) &scripth0, 8473 (ncrcmd *) np->scripth0, sizeof(struct scripth)); 8474 np->ccb->p_ccb = vtobus (np->ccb); 8475 8476 /* Patch the script for LED support. */ 8477 8478 if (np->features & FE_LED0) { 8479 np->script0->idle[0] = 8480 cpu_to_scr(SCR_REG_REG(gpreg, SCR_OR, 0x01)); 8481 np->script0->reselected[0] = 8482 cpu_to_scr(SCR_REG_REG(gpreg, SCR_AND, 0xfe)); 8483 np->script0->start[0] = 8484 cpu_to_scr(SCR_REG_REG(gpreg, SCR_AND, 0xfe)); 8485 } 8486 8487 /* 8488 * Look for the target control block of this nexus. 8489 * For i = 0 to 3 8490 * JUMP ^ IFTRUE (MASK (i, 3)), @(next_lcb) 8491 */ 8492 for (i = 0 ; i < 4 ; i++) { 8493 np->jump_tcb[i].l_cmd = 8494 cpu_to_scr((SCR_JUMP ^ IFTRUE (MASK (i, 3)))); 8495 np->jump_tcb[i].l_paddr = 8496 cpu_to_scr(NCB_SCRIPTH_PHYS (np, bad_target)); 8497 } 8498 8499 ncr_chip_reset(np, 100); 8500 8501 /* Now check the cache handling of the chipset. */ 8502 8503 if (ncr_snooptest(np)) { 8504 printk(KERN_ERR "CACHE INCORRECTLY CONFIGURED.\n"); 8505 goto attach_error; 8506 } 8507 8508 /* Install the interrupt handler. */ 8509 np->irq = device->slot.irq; 8510 8511 /* Initialize the fixed part of the default ccb. */ 8512 ncr_init_ccb(np, np->ccb); 8513 8514 /* 8515 * After SCSI devices have been opened, we cannot reset the bus 8516 * safely, so we do it here. Interrupt handler does the real work. 8517 * Process the reset exception if interrupts are not enabled yet. 8518 * Then enable disconnects. 8519 */ 8520 spin_lock_irqsave(&np->smp_lock, flags); 8521 if (ncr_reset_scsi_bus(np, 0, driver_setup.settle_delay) != 0) { 8522 printk(KERN_ERR "%s: FATAL ERROR: CHECK SCSI BUS - CABLES, TERMINATION, DEVICE POWER etc.!\n", ncr_name(np)); 8523 8524 spin_unlock_irqrestore(&np->smp_lock, flags); 8525 goto attach_error; 8526 } 8527 ncr_exception(np); 8528 8529 np->disc = 1; 8530 8531 /* 8532 * The middle-level SCSI driver does not wait for devices to settle. 8533 * Wait synchronously if more than 2 seconds. 8534 */ 8535 if (driver_setup.settle_delay > 2) { 8536 printk(KERN_INFO "%s: waiting %d seconds for scsi devices to settle...\n", 8537 ncr_name(np), driver_setup.settle_delay); 8538 mdelay(1000 * driver_setup.settle_delay); 8539 } 8540 8541 /* start the timeout daemon */ 8542 np->lasttime=0; 8543 ncr_timeout (np); 8544 8545 /* use SIMPLE TAG messages by default */ 8546 #ifdef SCSI_NCR_ALWAYS_SIMPLE_TAG 8547 np->order = SIMPLE_QUEUE_TAG; 8548 #endif 8549 8550 spin_unlock_irqrestore(&np->smp_lock, flags); 8551 8552 return instance; 8553 8554 attach_error: 8555 if (!instance) 8556 return NULL; 8557 printk(KERN_INFO "%s: detaching...\n", ncr_name(np)); 8558 if (!np) 8559 goto unregister; 8560 if (np->scripth0) 8561 m_free_dma(np->scripth0, sizeof(struct scripth), "SCRIPTH"); 8562 if (np->script0) 8563 m_free_dma(np->script0, sizeof(struct script), "SCRIPT"); 8564 if (np->ccb) 8565 m_free_dma(np->ccb, sizeof(struct ccb), "CCB"); 8566 m_free_dma(np, sizeof(struct ncb), "NCB"); 8567 host_data->ncb = NULL; 8568 8569 unregister: 8570 scsi_host_put(instance); 8571 8572 return NULL; 8573 } 8574 8575 8576 int ncr53c8xx_release(struct Scsi_Host *host) 8577 { 8578 struct host_data *host_data; 8579 #ifdef DEBUG_NCR53C8XX 8580 printk("ncr53c8xx: release\n"); 8581 #endif 8582 if (!host) 8583 return 1; 8584 host_data = (struct host_data *)host->hostdata; 8585 if (host_data && host_data->ncb) 8586 ncr_detach(host_data->ncb); 8587 return 1; 8588 } 8589 8590 static void ncr53c8xx_set_period(struct scsi_target *starget, int period) 8591 { 8592 struct Scsi_Host *shost = dev_to_shost(starget->dev.parent); 8593 struct ncb *np = ((struct host_data *)shost->hostdata)->ncb; 8594 struct tcb *tp = &np->target[starget->id]; 8595 8596 if (period > np->maxsync) 8597 period = np->maxsync; 8598 else if (period < np->minsync) 8599 period = np->minsync; 8600 8601 tp->usrsync = period; 8602 8603 ncr_negotiate(np, tp); 8604 } 8605 8606 static void ncr53c8xx_set_offset(struct scsi_target *starget, int offset) 8607 { 8608 struct Scsi_Host *shost = dev_to_shost(starget->dev.parent); 8609 struct ncb *np = ((struct host_data *)shost->hostdata)->ncb; 8610 struct tcb *tp = &np->target[starget->id]; 8611 8612 if (offset > np->maxoffs) 8613 offset = np->maxoffs; 8614 else if (offset < 0) 8615 offset = 0; 8616 8617 tp->maxoffs = offset; 8618 8619 ncr_negotiate(np, tp); 8620 } 8621 8622 static void ncr53c8xx_set_width(struct scsi_target *starget, int width) 8623 { 8624 struct Scsi_Host *shost = dev_to_shost(starget->dev.parent); 8625 struct ncb *np = ((struct host_data *)shost->hostdata)->ncb; 8626 struct tcb *tp = &np->target[starget->id]; 8627 8628 if (width > np->maxwide) 8629 width = np->maxwide; 8630 else if (width < 0) 8631 width = 0; 8632 8633 tp->usrwide = width; 8634 8635 ncr_negotiate(np, tp); 8636 } 8637 8638 static void ncr53c8xx_get_signalling(struct Scsi_Host *shost) 8639 { 8640 struct ncb *np = ((struct host_data *)shost->hostdata)->ncb; 8641 enum spi_signal_type type; 8642 8643 switch (np->scsi_mode) { 8644 case SMODE_SE: 8645 type = SPI_SIGNAL_SE; 8646 break; 8647 case SMODE_HVD: 8648 type = SPI_SIGNAL_HVD; 8649 break; 8650 default: 8651 type = SPI_SIGNAL_UNKNOWN; 8652 break; 8653 } 8654 spi_signalling(shost) = type; 8655 } 8656 8657 static struct spi_function_template ncr53c8xx_transport_functions = { 8658 .set_period = ncr53c8xx_set_period, 8659 .show_period = 1, 8660 .set_offset = ncr53c8xx_set_offset, 8661 .show_offset = 1, 8662 .set_width = ncr53c8xx_set_width, 8663 .show_width = 1, 8664 .get_signalling = ncr53c8xx_get_signalling, 8665 }; 8666 8667 int __init ncr53c8xx_init(void) 8668 { 8669 ncr53c8xx_transport_template = spi_attach_transport(&ncr53c8xx_transport_functions); 8670 if (!ncr53c8xx_transport_template) 8671 return -ENODEV; 8672 return 0; 8673 } 8674 8675 void ncr53c8xx_exit(void) 8676 { 8677 spi_release_transport(ncr53c8xx_transport_template); 8678 } 8679