1 /* 2 * This is the Fusion MPT base driver providing common API layer interface 3 * for access to MPT (Message Passing Technology) firmware. 4 * 5 * This code is based on drivers/scsi/mpt3sas/mpt3sas_base.h 6 * Copyright (C) 2012-2014 LSI Corporation 7 * Copyright (C) 2013-2014 Avago Technologies 8 * (mailto: MPT-FusionLinux.pdl@avagotech.com) 9 * 10 * This program is free software; you can redistribute it and/or 11 * modify it under the terms of the GNU General Public License 12 * as published by the Free Software Foundation; either version 2 13 * of the License, or (at your option) any later version. 14 * 15 * This program is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 * GNU General Public License for more details. 19 * 20 * NO WARRANTY 21 * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR 22 * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT 23 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT, 24 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is 25 * solely responsible for determining the appropriateness of using and 26 * distributing the Program and assumes all risks associated with its 27 * exercise of rights under this Agreement, including but not limited to 28 * the risks and costs of program errors, damage to or loss of data, 29 * programs or equipment, and unavailability or interruption of operations. 30 31 * DISCLAIMER OF LIABILITY 32 * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY 33 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 34 * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND 35 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR 36 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 37 * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED 38 * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES 39 40 * You should have received a copy of the GNU General Public License 41 * along with this program; if not, write to the Free Software 42 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, 43 * USA. 44 */ 45 46 #ifndef MPT3SAS_BASE_H_INCLUDED 47 #define MPT3SAS_BASE_H_INCLUDED 48 49 #include "mpi/mpi2_type.h" 50 #include "mpi/mpi2.h" 51 #include "mpi/mpi2_ioc.h" 52 #include "mpi/mpi2_cnfg.h" 53 #include "mpi/mpi2_init.h" 54 #include "mpi/mpi2_raid.h" 55 #include "mpi/mpi2_tool.h" 56 #include "mpi/mpi2_sas.h" 57 #include "mpi/mpi2_pci.h" 58 59 #include <scsi/scsi.h> 60 #include <scsi/scsi_cmnd.h> 61 #include <scsi/scsi_device.h> 62 #include <scsi/scsi_host.h> 63 #include <scsi/scsi_tcq.h> 64 #include <scsi/scsi_transport_sas.h> 65 #include <scsi/scsi_dbg.h> 66 #include <scsi/scsi_eh.h> 67 #include <linux/pci.h> 68 #include <linux/poll.h> 69 70 #include "mpt3sas_debug.h" 71 #include "mpt3sas_trigger_diag.h" 72 73 /* driver versioning info */ 74 #define MPT3SAS_DRIVER_NAME "mpt3sas" 75 #define MPT3SAS_AUTHOR "Avago Technologies <MPT-FusionLinux.pdl@avagotech.com>" 76 #define MPT3SAS_DESCRIPTION "LSI MPT Fusion SAS 3.0 Device Driver" 77 #define MPT3SAS_DRIVER_VERSION "25.100.00.00" 78 #define MPT3SAS_MAJOR_VERSION 25 79 #define MPT3SAS_MINOR_VERSION 100 80 #define MPT3SAS_BUILD_VERSION 0 81 #define MPT3SAS_RELEASE_VERSION 00 82 83 #define MPT2SAS_DRIVER_NAME "mpt2sas" 84 #define MPT2SAS_DESCRIPTION "LSI MPT Fusion SAS 2.0 Device Driver" 85 #define MPT2SAS_DRIVER_VERSION "20.102.00.00" 86 #define MPT2SAS_MAJOR_VERSION 20 87 #define MPT2SAS_MINOR_VERSION 102 88 #define MPT2SAS_BUILD_VERSION 0 89 #define MPT2SAS_RELEASE_VERSION 00 90 91 /* 92 * Set MPT3SAS_SG_DEPTH value based on user input. 93 */ 94 #define MPT_MAX_PHYS_SEGMENTS SG_CHUNK_SIZE 95 #define MPT_MIN_PHYS_SEGMENTS 16 96 #define MPT_KDUMP_MIN_PHYS_SEGMENTS 32 97 98 #define MCPU_MAX_CHAINS_PER_IO 3 99 100 #ifdef CONFIG_SCSI_MPT3SAS_MAX_SGE 101 #define MPT3SAS_SG_DEPTH CONFIG_SCSI_MPT3SAS_MAX_SGE 102 #else 103 #define MPT3SAS_SG_DEPTH MPT_MAX_PHYS_SEGMENTS 104 #endif 105 106 #ifdef CONFIG_SCSI_MPT2SAS_MAX_SGE 107 #define MPT2SAS_SG_DEPTH CONFIG_SCSI_MPT2SAS_MAX_SGE 108 #else 109 #define MPT2SAS_SG_DEPTH MPT_MAX_PHYS_SEGMENTS 110 #endif 111 112 /* 113 * Generic Defines 114 */ 115 #define MPT3SAS_SATA_QUEUE_DEPTH 32 116 #define MPT3SAS_SAS_QUEUE_DEPTH 254 117 #define MPT3SAS_RAID_QUEUE_DEPTH 128 118 #define MPT3SAS_KDUMP_SCSI_IO_DEPTH 200 119 120 #define MPT3SAS_RAID_MAX_SECTORS 8192 121 #define MPT3SAS_HOST_PAGE_SIZE_4K 12 122 #define MPT3SAS_NVME_QUEUE_DEPTH 128 123 #define MPT_NAME_LENGTH 32 /* generic length of strings */ 124 #define MPT_STRING_LENGTH 64 125 #define MPI_FRAME_START_OFFSET 256 126 #define REPLY_FREE_POOL_SIZE 512 /*(32 maxcredix *4)*(4 times)*/ 127 128 #define MPT_MAX_CALLBACKS 32 129 130 #define INTERNAL_CMDS_COUNT 10 /* reserved cmds */ 131 /* reserved for issuing internally framed scsi io cmds */ 132 #define INTERNAL_SCSIIO_CMDS_COUNT 3 133 134 #define MPI3_HIM_MASK 0xFFFFFFFF /* mask every bit*/ 135 136 #define MPT3SAS_INVALID_DEVICE_HANDLE 0xFFFF 137 138 #define MAX_CHAIN_ELEMT_SZ 16 139 #define DEFAULT_NUM_FWCHAIN_ELEMTS 8 140 141 #define FW_IMG_HDR_READ_TIMEOUT 15 142 /* 143 * NVMe defines 144 */ 145 #define NVME_PRP_SIZE 8 /* PRP size */ 146 #define NVME_CMD_PRP1_OFFSET 24 /* PRP1 offset in NVMe cmd */ 147 #define NVME_CMD_PRP2_OFFSET 32 /* PRP2 offset in NVMe cmd */ 148 #define NVME_ERROR_RESPONSE_SIZE 16 /* Max NVME Error Response */ 149 #define NVME_TASK_ABORT_MIN_TIMEOUT 6 150 #define NVME_TASK_ABORT_MAX_TIMEOUT 60 151 #define NVME_TASK_MNGT_CUSTOM_MASK (0x0010) 152 #define NVME_PRP_PAGE_SIZE 4096 /* Page size */ 153 154 155 /* 156 * reset phases 157 */ 158 #define MPT3_IOC_PRE_RESET 1 /* prior to host reset */ 159 #define MPT3_IOC_AFTER_RESET 2 /* just after host reset */ 160 #define MPT3_IOC_DONE_RESET 3 /* links re-initialized */ 161 162 /* 163 * logging format 164 */ 165 #define MPT3SAS_FMT "%s: " 166 167 /* 168 * WarpDrive Specific Log codes 169 */ 170 171 #define MPT2_WARPDRIVE_LOGENTRY (0x8002) 172 #define MPT2_WARPDRIVE_LC_SSDT (0x41) 173 #define MPT2_WARPDRIVE_LC_SSDLW (0x43) 174 #define MPT2_WARPDRIVE_LC_SSDLF (0x44) 175 #define MPT2_WARPDRIVE_LC_BRMF (0x4D) 176 177 /* 178 * per target private data 179 */ 180 #define MPT_TARGET_FLAGS_RAID_COMPONENT 0x01 181 #define MPT_TARGET_FLAGS_VOLUME 0x02 182 #define MPT_TARGET_FLAGS_DELETED 0x04 183 #define MPT_TARGET_FASTPATH_IO 0x08 184 #define MPT_TARGET_FLAGS_PCIE_DEVICE 0x10 185 186 #define SAS2_PCI_DEVICE_B0_REVISION (0x01) 187 #define SAS3_PCI_DEVICE_C0_REVISION (0x02) 188 189 /* 190 * Intel HBA branding 191 */ 192 #define MPT2SAS_INTEL_RMS25JB080_BRANDING \ 193 "Intel(R) Integrated RAID Module RMS25JB080" 194 #define MPT2SAS_INTEL_RMS25JB040_BRANDING \ 195 "Intel(R) Integrated RAID Module RMS25JB040" 196 #define MPT2SAS_INTEL_RMS25KB080_BRANDING \ 197 "Intel(R) Integrated RAID Module RMS25KB080" 198 #define MPT2SAS_INTEL_RMS25KB040_BRANDING \ 199 "Intel(R) Integrated RAID Module RMS25KB040" 200 #define MPT2SAS_INTEL_RMS25LB040_BRANDING \ 201 "Intel(R) Integrated RAID Module RMS25LB040" 202 #define MPT2SAS_INTEL_RMS25LB080_BRANDING \ 203 "Intel(R) Integrated RAID Module RMS25LB080" 204 #define MPT2SAS_INTEL_RMS2LL080_BRANDING \ 205 "Intel Integrated RAID Module RMS2LL080" 206 #define MPT2SAS_INTEL_RMS2LL040_BRANDING \ 207 "Intel Integrated RAID Module RMS2LL040" 208 #define MPT2SAS_INTEL_RS25GB008_BRANDING \ 209 "Intel(R) RAID Controller RS25GB008" 210 #define MPT2SAS_INTEL_SSD910_BRANDING \ 211 "Intel(R) SSD 910 Series" 212 213 #define MPT3SAS_INTEL_RMS3JC080_BRANDING \ 214 "Intel(R) Integrated RAID Module RMS3JC080" 215 #define MPT3SAS_INTEL_RS3GC008_BRANDING \ 216 "Intel(R) RAID Controller RS3GC008" 217 #define MPT3SAS_INTEL_RS3FC044_BRANDING \ 218 "Intel(R) RAID Controller RS3FC044" 219 #define MPT3SAS_INTEL_RS3UC080_BRANDING \ 220 "Intel(R) RAID Controller RS3UC080" 221 222 /* 223 * Intel HBA SSDIDs 224 */ 225 #define MPT2SAS_INTEL_RMS25JB080_SSDID 0x3516 226 #define MPT2SAS_INTEL_RMS25JB040_SSDID 0x3517 227 #define MPT2SAS_INTEL_RMS25KB080_SSDID 0x3518 228 #define MPT2SAS_INTEL_RMS25KB040_SSDID 0x3519 229 #define MPT2SAS_INTEL_RMS25LB040_SSDID 0x351A 230 #define MPT2SAS_INTEL_RMS25LB080_SSDID 0x351B 231 #define MPT2SAS_INTEL_RMS2LL080_SSDID 0x350E 232 #define MPT2SAS_INTEL_RMS2LL040_SSDID 0x350F 233 #define MPT2SAS_INTEL_RS25GB008_SSDID 0x3000 234 #define MPT2SAS_INTEL_SSD910_SSDID 0x3700 235 236 #define MPT3SAS_INTEL_RMS3JC080_SSDID 0x3521 237 #define MPT3SAS_INTEL_RS3GC008_SSDID 0x3522 238 #define MPT3SAS_INTEL_RS3FC044_SSDID 0x3523 239 #define MPT3SAS_INTEL_RS3UC080_SSDID 0x3524 240 241 /* 242 * Dell HBA branding 243 */ 244 #define MPT2SAS_DELL_BRANDING_SIZE 32 245 246 #define MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING "Dell 6Gbps SAS HBA" 247 #define MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING "Dell PERC H200 Adapter" 248 #define MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING "Dell PERC H200 Integrated" 249 #define MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING "Dell PERC H200 Modular" 250 #define MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING "Dell PERC H200 Embedded" 251 #define MPT2SAS_DELL_PERC_H200_BRANDING "Dell PERC H200" 252 #define MPT2SAS_DELL_6GBPS_SAS_BRANDING "Dell 6Gbps SAS" 253 254 #define MPT3SAS_DELL_12G_HBA_BRANDING \ 255 "Dell 12Gbps HBA" 256 257 /* 258 * Dell HBA SSDIDs 259 */ 260 #define MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID 0x1F1C 261 #define MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID 0x1F1D 262 #define MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID 0x1F1E 263 #define MPT2SAS_DELL_PERC_H200_MODULAR_SSDID 0x1F1F 264 #define MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID 0x1F20 265 #define MPT2SAS_DELL_PERC_H200_SSDID 0x1F21 266 #define MPT2SAS_DELL_6GBPS_SAS_SSDID 0x1F22 267 268 #define MPT3SAS_DELL_12G_HBA_SSDID 0x1F46 269 270 /* 271 * Cisco HBA branding 272 */ 273 #define MPT3SAS_CISCO_12G_8E_HBA_BRANDING \ 274 "Cisco 9300-8E 12G SAS HBA" 275 #define MPT3SAS_CISCO_12G_8I_HBA_BRANDING \ 276 "Cisco 9300-8i 12G SAS HBA" 277 #define MPT3SAS_CISCO_12G_AVILA_HBA_BRANDING \ 278 "Cisco 12G Modular SAS Pass through Controller" 279 #define MPT3SAS_CISCO_12G_COLUSA_MEZZANINE_HBA_BRANDING \ 280 "UCS C3X60 12G SAS Pass through Controller" 281 /* 282 * Cisco HBA SSSDIDs 283 */ 284 #define MPT3SAS_CISCO_12G_8E_HBA_SSDID 0x14C 285 #define MPT3SAS_CISCO_12G_8I_HBA_SSDID 0x154 286 #define MPT3SAS_CISCO_12G_AVILA_HBA_SSDID 0x155 287 #define MPT3SAS_CISCO_12G_COLUSA_MEZZANINE_HBA_SSDID 0x156 288 289 /* 290 * status bits for ioc->diag_buffer_status 291 */ 292 #define MPT3_DIAG_BUFFER_IS_REGISTERED (0x01) 293 #define MPT3_DIAG_BUFFER_IS_RELEASED (0x02) 294 #define MPT3_DIAG_BUFFER_IS_DIAG_RESET (0x04) 295 296 /* 297 * HP HBA branding 298 */ 299 #define MPT2SAS_HP_3PAR_SSVID 0x1590 300 301 #define MPT2SAS_HP_2_4_INTERNAL_BRANDING \ 302 "HP H220 Host Bus Adapter" 303 #define MPT2SAS_HP_2_4_EXTERNAL_BRANDING \ 304 "HP H221 Host Bus Adapter" 305 #define MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_BRANDING \ 306 "HP H222 Host Bus Adapter" 307 #define MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_BRANDING \ 308 "HP H220i Host Bus Adapter" 309 #define MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_BRANDING \ 310 "HP H210i Host Bus Adapter" 311 312 /* 313 * HO HBA SSDIDs 314 */ 315 #define MPT2SAS_HP_2_4_INTERNAL_SSDID 0x0041 316 #define MPT2SAS_HP_2_4_EXTERNAL_SSDID 0x0042 317 #define MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_SSDID 0x0043 318 #define MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_SSDID 0x0044 319 #define MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_SSDID 0x0046 320 321 /* 322 * Combined Reply Queue constants, 323 * There are twelve Supplemental Reply Post Host Index Registers 324 * and each register is at offset 0x10 bytes from the previous one. 325 */ 326 #define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_COUNT_G3 12 327 #define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_COUNT_G35 16 328 #define MPT3_SUP_REPLY_POST_HOST_INDEX_REG_OFFSET (0x10) 329 330 /* OEM Identifiers */ 331 #define MFG10_OEM_ID_INVALID (0x00000000) 332 #define MFG10_OEM_ID_DELL (0x00000001) 333 #define MFG10_OEM_ID_FSC (0x00000002) 334 #define MFG10_OEM_ID_SUN (0x00000003) 335 #define MFG10_OEM_ID_IBM (0x00000004) 336 337 /* GENERIC Flags 0*/ 338 #define MFG10_GF0_OCE_DISABLED (0x00000001) 339 #define MFG10_GF0_R1E_DRIVE_COUNT (0x00000002) 340 #define MFG10_GF0_R10_DISPLAY (0x00000004) 341 #define MFG10_GF0_SSD_DATA_SCRUB_DISABLE (0x00000008) 342 #define MFG10_GF0_SINGLE_DRIVE_R0 (0x00000010) 343 344 #define VIRTUAL_IO_FAILED_RETRY (0x32010081) 345 346 /* OEM Specific Flags will come from OEM specific header files */ 347 struct Mpi2ManufacturingPage10_t { 348 MPI2_CONFIG_PAGE_HEADER Header; /* 00h */ 349 U8 OEMIdentifier; /* 04h */ 350 U8 Reserved1; /* 05h */ 351 U16 Reserved2; /* 08h */ 352 U32 Reserved3; /* 0Ch */ 353 U32 GenericFlags0; /* 10h */ 354 U32 GenericFlags1; /* 14h */ 355 U32 Reserved4; /* 18h */ 356 U32 OEMSpecificFlags0; /* 1Ch */ 357 U32 OEMSpecificFlags1; /* 20h */ 358 U32 Reserved5[18]; /* 24h - 60h*/ 359 }; 360 361 362 /* Miscellaneous options */ 363 struct Mpi2ManufacturingPage11_t { 364 MPI2_CONFIG_PAGE_HEADER Header; /* 00h */ 365 __le32 Reserved1; /* 04h */ 366 u8 Reserved2; /* 08h */ 367 u8 EEDPTagMode; /* 09h */ 368 u8 Reserved3; /* 0Ah */ 369 u8 Reserved4; /* 0Bh */ 370 __le32 Reserved5[8]; /* 0Ch-2Ch */ 371 u16 AddlFlags2; /* 2Ch */ 372 u8 AddlFlags3; /* 2Eh */ 373 u8 Reserved6; /* 2Fh */ 374 __le32 Reserved7[7]; /* 30h - 4Bh */ 375 u8 NVMeAbortTO; /* 4Ch */ 376 u8 Reserved8; /* 4Dh */ 377 u16 Reserved9; /* 4Eh */ 378 __le32 Reserved10[4]; /* 50h - 60h */ 379 }; 380 381 /** 382 * struct MPT3SAS_TARGET - starget private hostdata 383 * @starget: starget object 384 * @sas_address: target sas address 385 * @raid_device: raid_device pointer to access volume data 386 * @handle: device handle 387 * @num_luns: number luns 388 * @flags: MPT_TARGET_FLAGS_XXX flags 389 * @deleted: target flaged for deletion 390 * @tm_busy: target is busy with TM request. 391 * @sas_dev: The sas_device associated with this target 392 * @pcie_dev: The pcie device associated with this target 393 */ 394 struct MPT3SAS_TARGET { 395 struct scsi_target *starget; 396 u64 sas_address; 397 struct _raid_device *raid_device; 398 u16 handle; 399 int num_luns; 400 u32 flags; 401 u8 deleted; 402 u8 tm_busy; 403 struct _sas_device *sas_dev; 404 struct _pcie_device *pcie_dev; 405 }; 406 407 408 /* 409 * per device private data 410 */ 411 #define MPT_DEVICE_FLAGS_INIT 0x01 412 413 #define MFG_PAGE10_HIDE_SSDS_MASK (0x00000003) 414 #define MFG_PAGE10_HIDE_ALL_DISKS (0x00) 415 #define MFG_PAGE10_EXPOSE_ALL_DISKS (0x01) 416 #define MFG_PAGE10_HIDE_IF_VOL_PRESENT (0x02) 417 418 /** 419 * struct MPT3SAS_DEVICE - sdev private hostdata 420 * @sas_target: starget private hostdata 421 * @lun: lun number 422 * @flags: MPT_DEVICE_XXX flags 423 * @configured_lun: lun is configured 424 * @block: device is in SDEV_BLOCK state 425 * @tlr_snoop_check: flag used in determining whether to disable TLR 426 * @eedp_enable: eedp support enable bit 427 * @eedp_type: 0(type_1), 1(type_2), 2(type_3) 428 * @eedp_block_length: block size 429 * @ata_command_pending: SATL passthrough outstanding for device 430 */ 431 struct MPT3SAS_DEVICE { 432 struct MPT3SAS_TARGET *sas_target; 433 unsigned int lun; 434 u32 flags; 435 u8 configured_lun; 436 u8 block; 437 u8 tlr_snoop_check; 438 u8 ignore_delay_remove; 439 /* Iopriority Command Handling */ 440 u8 ncq_prio_enable; 441 /* 442 * Bug workaround for SATL handling: the mpt2/3sas firmware 443 * doesn't return BUSY or TASK_SET_FULL for subsequent 444 * commands while a SATL pass through is in operation as the 445 * spec requires, it simply does nothing with them until the 446 * pass through completes, causing them possibly to timeout if 447 * the passthrough is a long executing command (like format or 448 * secure erase). This variable allows us to do the right 449 * thing while a SATL command is pending. 450 */ 451 unsigned long ata_command_pending; 452 453 }; 454 455 #define MPT3_CMD_NOT_USED 0x8000 /* free */ 456 #define MPT3_CMD_COMPLETE 0x0001 /* completed */ 457 #define MPT3_CMD_PENDING 0x0002 /* pending */ 458 #define MPT3_CMD_REPLY_VALID 0x0004 /* reply is valid */ 459 #define MPT3_CMD_RESET 0x0008 /* host reset dropped the command */ 460 461 /** 462 * struct _internal_cmd - internal commands struct 463 * @mutex: mutex 464 * @done: completion 465 * @reply: reply message pointer 466 * @sense: sense data 467 * @status: MPT3_CMD_XXX status 468 * @smid: system message id 469 */ 470 struct _internal_cmd { 471 struct mutex mutex; 472 struct completion done; 473 void *reply; 474 void *sense; 475 u16 status; 476 u16 smid; 477 }; 478 479 480 481 /** 482 * struct _sas_device - attached device information 483 * @list: sas device list 484 * @starget: starget object 485 * @sas_address: device sas address 486 * @device_name: retrieved from the SAS IDENTIFY frame. 487 * @handle: device handle 488 * @sas_address_parent: sas address of parent expander or sas host 489 * @enclosure_handle: enclosure handle 490 * @enclosure_logical_id: enclosure logical identifier 491 * @volume_handle: volume handle (valid when hidden raid member) 492 * @volume_wwid: volume unique identifier 493 * @device_info: bitfield provides detailed info about the device 494 * @id: target id 495 * @channel: target channel 496 * @slot: number number 497 * @phy: phy identifier provided in sas device page 0 498 * @responding: used in _scsih_sas_device_mark_responding 499 * @fast_path: fast path feature enable bit 500 * @pfa_led_on: flag for PFA LED status 501 * @pend_sas_rphy_add: flag to check if device is in sas_rphy_add() 502 * addition routine. 503 * @chassis_slot: chassis slot 504 * @is_chassis_slot_valid: chassis slot valid or not 505 */ 506 struct _sas_device { 507 struct list_head list; 508 struct scsi_target *starget; 509 u64 sas_address; 510 u64 device_name; 511 u16 handle; 512 u64 sas_address_parent; 513 u16 enclosure_handle; 514 u64 enclosure_logical_id; 515 u16 volume_handle; 516 u64 volume_wwid; 517 u32 device_info; 518 int id; 519 int channel; 520 u16 slot; 521 u8 phy; 522 u8 responding; 523 u8 fast_path; 524 u8 pfa_led_on; 525 u8 pend_sas_rphy_add; 526 u8 enclosure_level; 527 u8 chassis_slot; 528 u8 is_chassis_slot_valid; 529 u8 connector_name[5]; 530 struct kref refcount; 531 }; 532 533 static inline void sas_device_get(struct _sas_device *s) 534 { 535 kref_get(&s->refcount); 536 } 537 538 static inline void sas_device_free(struct kref *r) 539 { 540 kfree(container_of(r, struct _sas_device, refcount)); 541 } 542 543 static inline void sas_device_put(struct _sas_device *s) 544 { 545 kref_put(&s->refcount, sas_device_free); 546 } 547 548 /* 549 * struct _pcie_device - attached PCIe device information 550 * @list: pcie device list 551 * @starget: starget object 552 * @wwid: device WWID 553 * @handle: device handle 554 * @device_info: bitfield provides detailed info about the device 555 * @id: target id 556 * @channel: target channel 557 * @slot: slot number 558 * @port_num: port number 559 * @responding: used in _scsih_pcie_device_mark_responding 560 * @fast_path: fast path feature enable bit 561 * @nvme_mdts: MaximumDataTransferSize from PCIe Device Page 2 for 562 * NVMe device only 563 * @enclosure_handle: enclosure handle 564 * @enclosure_logical_id: enclosure logical identifier 565 * @enclosure_level: The level of device's enclosure from the controller 566 * @connector_name: ASCII value of the Connector's name 567 * @serial_number: pointer of serial number string allocated runtime 568 * @refcount: reference count for deletion 569 */ 570 struct _pcie_device { 571 struct list_head list; 572 struct scsi_target *starget; 573 u64 wwid; 574 u16 handle; 575 u32 device_info; 576 int id; 577 int channel; 578 u16 slot; 579 u8 port_num; 580 u8 responding; 581 u8 fast_path; 582 u32 nvme_mdts; 583 u16 enclosure_handle; 584 u64 enclosure_logical_id; 585 u8 enclosure_level; 586 u8 connector_name[4]; 587 u8 *serial_number; 588 u8 reset_timeout; 589 struct kref refcount; 590 }; 591 /** 592 * pcie_device_get - Increment the pcie device reference count 593 * 594 * @p: pcie_device object 595 * 596 * When ever this function called it will increment the 597 * reference count of the pcie device for which this function called. 598 * 599 */ 600 static inline void pcie_device_get(struct _pcie_device *p) 601 { 602 kref_get(&p->refcount); 603 } 604 605 /** 606 * pcie_device_free - Release the pcie device object 607 * @r - kref object 608 * 609 * Free's the pcie device object. It will be called when reference count 610 * reaches to zero. 611 */ 612 static inline void pcie_device_free(struct kref *r) 613 { 614 kfree(container_of(r, struct _pcie_device, refcount)); 615 } 616 617 /** 618 * pcie_device_put - Decrement the pcie device reference count 619 * 620 * @p: pcie_device object 621 * 622 * When ever this function called it will decrement the 623 * reference count of the pcie device for which this function called. 624 * 625 * When refernce count reaches to Zero, this will call pcie_device_free to the 626 * pcie_device object. 627 */ 628 static inline void pcie_device_put(struct _pcie_device *p) 629 { 630 kref_put(&p->refcount, pcie_device_free); 631 } 632 /** 633 * struct _raid_device - raid volume link list 634 * @list: sas device list 635 * @starget: starget object 636 * @sdev: scsi device struct (volumes are single lun) 637 * @wwid: unique identifier for the volume 638 * @handle: device handle 639 * @block_size: Block size of the volume 640 * @id: target id 641 * @channel: target channel 642 * @volume_type: the raid level 643 * @device_info: bitfield provides detailed info about the hidden components 644 * @num_pds: number of hidden raid components 645 * @responding: used in _scsih_raid_device_mark_responding 646 * @percent_complete: resync percent complete 647 * @direct_io_enabled: Whether direct io to PDs are allowed or not 648 * @stripe_exponent: X where 2powX is the stripe sz in blocks 649 * @block_exponent: X where 2powX is the block sz in bytes 650 * @max_lba: Maximum number of LBA in the volume 651 * @stripe_sz: Stripe Size of the volume 652 * @device_info: Device info of the volume member disk 653 * @pd_handle: Array of handles of the physical drives for direct I/O in le16 654 */ 655 #define MPT_MAX_WARPDRIVE_PDS 8 656 struct _raid_device { 657 struct list_head list; 658 struct scsi_target *starget; 659 struct scsi_device *sdev; 660 u64 wwid; 661 u16 handle; 662 u16 block_sz; 663 int id; 664 int channel; 665 u8 volume_type; 666 u8 num_pds; 667 u8 responding; 668 u8 percent_complete; 669 u8 direct_io_enabled; 670 u8 stripe_exponent; 671 u8 block_exponent; 672 u64 max_lba; 673 u32 stripe_sz; 674 u32 device_info; 675 u16 pd_handle[MPT_MAX_WARPDRIVE_PDS]; 676 }; 677 678 /** 679 * struct _boot_device - boot device info 680 * 681 * @channel: sas, raid, or pcie channel 682 * @device: holds pointer for struct _sas_device, struct _raid_device or 683 * struct _pcie_device 684 */ 685 struct _boot_device { 686 int channel; 687 void *device; 688 }; 689 690 /** 691 * struct _sas_port - wide/narrow sas port information 692 * @port_list: list of ports belonging to expander 693 * @num_phys: number of phys belonging to this port 694 * @remote_identify: attached device identification 695 * @rphy: sas transport rphy object 696 * @port: sas transport wide/narrow port object 697 * @phy_list: _sas_phy list objects belonging to this port 698 */ 699 struct _sas_port { 700 struct list_head port_list; 701 u8 num_phys; 702 struct sas_identify remote_identify; 703 struct sas_rphy *rphy; 704 struct sas_port *port; 705 struct list_head phy_list; 706 }; 707 708 /** 709 * struct _sas_phy - phy information 710 * @port_siblings: list of phys belonging to a port 711 * @identify: phy identification 712 * @remote_identify: attached device identification 713 * @phy: sas transport phy object 714 * @phy_id: unique phy id 715 * @handle: device handle for this phy 716 * @attached_handle: device handle for attached device 717 * @phy_belongs_to_port: port has been created for this phy 718 */ 719 struct _sas_phy { 720 struct list_head port_siblings; 721 struct sas_identify identify; 722 struct sas_identify remote_identify; 723 struct sas_phy *phy; 724 u8 phy_id; 725 u16 handle; 726 u16 attached_handle; 727 u8 phy_belongs_to_port; 728 }; 729 730 /** 731 * struct _sas_node - sas_host/expander information 732 * @list: list of expanders 733 * @parent_dev: parent device class 734 * @num_phys: number phys belonging to this sas_host/expander 735 * @sas_address: sas address of this sas_host/expander 736 * @handle: handle for this sas_host/expander 737 * @sas_address_parent: sas address of parent expander or sas host 738 * @enclosure_handle: handle for this a member of an enclosure 739 * @device_info: bitwise defining capabilities of this sas_host/expander 740 * @responding: used in _scsih_expander_device_mark_responding 741 * @phy: a list of phys that make up this sas_host/expander 742 * @sas_port_list: list of ports attached to this sas_host/expander 743 */ 744 struct _sas_node { 745 struct list_head list; 746 struct device *parent_dev; 747 u8 num_phys; 748 u64 sas_address; 749 u16 handle; 750 u64 sas_address_parent; 751 u16 enclosure_handle; 752 u64 enclosure_logical_id; 753 u8 responding; 754 struct _sas_phy *phy; 755 struct list_head sas_port_list; 756 }; 757 758 759 /** 760 * struct _enclosure_node - enclosure information 761 * @list: list of enclosures 762 * @pg0: enclosure pg0; 763 */ 764 struct _enclosure_node { 765 struct list_head list; 766 Mpi2SasEnclosurePage0_t pg0; 767 }; 768 769 /** 770 * enum reset_type - reset state 771 * @FORCE_BIG_HAMMER: issue diagnostic reset 772 * @SOFT_RESET: issue message_unit_reset, if fails to to big hammer 773 */ 774 enum reset_type { 775 FORCE_BIG_HAMMER, 776 SOFT_RESET, 777 }; 778 779 /** 780 * struct pcie_sg_list - PCIe SGL buffer (contiguous per I/O) 781 * @pcie_sgl: PCIe native SGL for NVMe devices 782 * @pcie_sgl_dma: physical address 783 */ 784 struct pcie_sg_list { 785 void *pcie_sgl; 786 dma_addr_t pcie_sgl_dma; 787 }; 788 789 /** 790 * struct chain_tracker - firmware chain tracker 791 * @chain_buffer: chain buffer 792 * @chain_buffer_dma: physical address 793 * @tracker_list: list of free request (ioc->free_chain_list) 794 */ 795 struct chain_tracker { 796 void *chain_buffer; 797 dma_addr_t chain_buffer_dma; 798 }; 799 800 struct chain_lookup { 801 struct chain_tracker *chains_per_smid; 802 atomic_t chain_offset; 803 }; 804 805 /** 806 * struct scsiio_tracker - scsi mf request tracker 807 * @smid: system message id 808 * @cb_idx: callback index 809 * @direct_io: To indicate whether I/O is direct (WARPDRIVE) 810 * @chain_list: list of associated firmware chain tracker 811 * @msix_io: IO's msix 812 */ 813 struct scsiio_tracker { 814 u16 smid; 815 u8 cb_idx; 816 u8 direct_io; 817 struct pcie_sg_list pcie_sg_list; 818 struct list_head chain_list; 819 u16 msix_io; 820 }; 821 822 /** 823 * struct request_tracker - firmware request tracker 824 * @smid: system message id 825 * @cb_idx: callback index 826 * @tracker_list: list of free request (ioc->free_list) 827 */ 828 struct request_tracker { 829 u16 smid; 830 u8 cb_idx; 831 struct list_head tracker_list; 832 }; 833 834 /** 835 * struct _tr_list - target reset list 836 * @handle: device handle 837 * @state: state machine 838 */ 839 struct _tr_list { 840 struct list_head list; 841 u16 handle; 842 u16 state; 843 }; 844 845 /** 846 * struct _sc_list - delayed SAS_IO_UNIT_CONTROL message list 847 * @handle: device handle 848 */ 849 struct _sc_list { 850 struct list_head list; 851 u16 handle; 852 }; 853 854 /** 855 * struct _event_ack_list - delayed event acknowledgment list 856 * @Event: Event ID 857 * @EventContext: used to track the event uniquely 858 */ 859 struct _event_ack_list { 860 struct list_head list; 861 U16 Event; 862 U32 EventContext; 863 }; 864 865 /** 866 * struct adapter_reply_queue - the reply queue struct 867 * @ioc: per adapter object 868 * @msix_index: msix index into vector table 869 * @vector: irq vector 870 * @reply_post_host_index: head index in the pool where FW completes IO 871 * @reply_post_free: reply post base virt address 872 * @name: the name registered to request_irq() 873 * @busy: isr is actively processing replies on another cpu 874 * @list: this list 875 */ 876 struct adapter_reply_queue { 877 struct MPT3SAS_ADAPTER *ioc; 878 u8 msix_index; 879 u32 reply_post_host_index; 880 Mpi2ReplyDescriptorsUnion_t *reply_post_free; 881 char name[MPT_NAME_LENGTH]; 882 atomic_t busy; 883 struct list_head list; 884 }; 885 886 typedef void (*MPT_ADD_SGE)(void *paddr, u32 flags_length, dma_addr_t dma_addr); 887 888 /* SAS3.0 support */ 889 typedef int (*MPT_BUILD_SG_SCMD)(struct MPT3SAS_ADAPTER *ioc, 890 struct scsi_cmnd *scmd, u16 smid, struct _pcie_device *pcie_device); 891 typedef void (*MPT_BUILD_SG)(struct MPT3SAS_ADAPTER *ioc, void *psge, 892 dma_addr_t data_out_dma, size_t data_out_sz, 893 dma_addr_t data_in_dma, size_t data_in_sz); 894 typedef void (*MPT_BUILD_ZERO_LEN_SGE)(struct MPT3SAS_ADAPTER *ioc, 895 void *paddr); 896 897 /* SAS3.5 support */ 898 typedef void (*NVME_BUILD_PRP)(struct MPT3SAS_ADAPTER *ioc, u16 smid, 899 Mpi26NVMeEncapsulatedRequest_t *nvme_encap_request, 900 dma_addr_t data_out_dma, size_t data_out_sz, dma_addr_t data_in_dma, 901 size_t data_in_sz); 902 903 /* To support atomic and non atomic descriptors*/ 904 typedef void (*PUT_SMID_IO_FP_HIP) (struct MPT3SAS_ADAPTER *ioc, u16 smid, 905 u16 funcdep); 906 typedef void (*PUT_SMID_DEFAULT) (struct MPT3SAS_ADAPTER *ioc, u16 smid); 907 908 /* IOC Facts and Port Facts converted from little endian to cpu */ 909 union mpi3_version_union { 910 MPI2_VERSION_STRUCT Struct; 911 u32 Word; 912 }; 913 914 struct mpt3sas_facts { 915 u16 MsgVersion; 916 u16 HeaderVersion; 917 u8 IOCNumber; 918 u8 VP_ID; 919 u8 VF_ID; 920 u16 IOCExceptions; 921 u16 IOCStatus; 922 u32 IOCLogInfo; 923 u8 MaxChainDepth; 924 u8 WhoInit; 925 u8 NumberOfPorts; 926 u8 MaxMSIxVectors; 927 u16 RequestCredit; 928 u16 ProductID; 929 u32 IOCCapabilities; 930 union mpi3_version_union FWVersion; 931 u16 IOCRequestFrameSize; 932 u16 IOCMaxChainSegmentSize; 933 u16 MaxInitiators; 934 u16 MaxTargets; 935 u16 MaxSasExpanders; 936 u16 MaxEnclosures; 937 u16 ProtocolFlags; 938 u16 HighPriorityCredit; 939 u16 MaxReplyDescriptorPostQueueDepth; 940 u8 ReplyFrameSize; 941 u8 MaxVolumes; 942 u16 MaxDevHandle; 943 u16 MaxPersistentEntries; 944 u16 MinDevHandle; 945 u8 CurrentHostPageSize; 946 }; 947 948 struct mpt3sas_port_facts { 949 u8 PortNumber; 950 u8 VP_ID; 951 u8 VF_ID; 952 u8 PortType; 953 u16 MaxPostedCmdBuffers; 954 }; 955 956 struct reply_post_struct { 957 Mpi2ReplyDescriptorsUnion_t *reply_post_free; 958 dma_addr_t reply_post_free_dma; 959 }; 960 961 typedef void (*MPT3SAS_FLUSH_RUNNING_CMDS)(struct MPT3SAS_ADAPTER *ioc); 962 /** 963 * struct MPT3SAS_ADAPTER - per adapter struct 964 * @list: ioc_list 965 * @shost: shost object 966 * @id: unique adapter id 967 * @cpu_count: number online cpus 968 * @name: generic ioc string 969 * @tmp_string: tmp string used for logging 970 * @pdev: pci pdev object 971 * @pio_chip: physical io register space 972 * @chip: memory mapped register space 973 * @chip_phys: physical addrss prior to mapping 974 * @logging_level: see mpt3sas_debug.h 975 * @fwfault_debug: debuging FW timeouts 976 * @ir_firmware: IR firmware present 977 * @bars: bitmask of BAR's that must be configured 978 * @mask_interrupts: ignore interrupt 979 * @dma_mask: used to set the consistent dma mask 980 * @pci_access_mutex: Mutex to synchronize ioctl, sysfs show path and 981 * pci resource handling 982 * @fault_reset_work_q_name: fw fault work queue 983 * @fault_reset_work_q: "" 984 * @fault_reset_work: "" 985 * @firmware_event_name: fw event work queue 986 * @firmware_event_thread: "" 987 * @fw_event_lock: 988 * @fw_event_list: list of fw events 989 * @aen_event_read_flag: event log was read 990 * @broadcast_aen_busy: broadcast aen waiting to be serviced 991 * @shost_recovery: host reset in progress 992 * @ioc_reset_in_progress_lock: 993 * @ioc_link_reset_in_progress: phy/hard reset in progress 994 * @ignore_loginfos: ignore loginfos during task management 995 * @remove_host: flag for when driver unloads, to avoid sending dev resets 996 * @pci_error_recovery: flag to prevent ioc access until slot reset completes 997 * @wait_for_discovery_to_complete: flag set at driver load time when 998 * waiting on reporting devices 999 * @is_driver_loading: flag set at driver load time 1000 * @port_enable_failed: flag set when port enable has failed 1001 * @start_scan: flag set from scan_start callback, cleared from _mpt3sas_fw_work 1002 * @start_scan_failed: means port enable failed, return's the ioc_status 1003 * @msix_enable: flag indicating msix is enabled 1004 * @msix_vector_count: number msix vectors 1005 * @cpu_msix_table: table for mapping cpus to msix index 1006 * @cpu_msix_table_sz: table size 1007 * @schedule_dead_ioc_flush_running_cmds: callback to flush pending commands 1008 * @scsi_io_cb_idx: shost generated commands 1009 * @tm_cb_idx: task management commands 1010 * @scsih_cb_idx: scsih internal commands 1011 * @transport_cb_idx: transport internal commands 1012 * @ctl_cb_idx: clt internal commands 1013 * @base_cb_idx: base internal commands 1014 * @config_cb_idx: base internal commands 1015 * @tm_tr_cb_idx : device removal target reset handshake 1016 * @tm_tr_volume_cb_idx : volume removal target reset 1017 * @base_cmds: 1018 * @transport_cmds: 1019 * @scsih_cmds: 1020 * @tm_cmds: 1021 * @ctl_cmds: 1022 * @config_cmds: 1023 * @base_add_sg_single: handler for either 32/64 bit sgl's 1024 * @event_type: bits indicating which events to log 1025 * @event_context: unique id for each logged event 1026 * @event_log: event log pointer 1027 * @event_masks: events that are masked 1028 * @facts: static facts data 1029 * @pfacts: static port facts data 1030 * @manu_pg0: static manufacturing page 0 1031 * @manu_pg10: static manufacturing page 10 1032 * @manu_pg11: static manufacturing page 11 1033 * @bios_pg2: static bios page 2 1034 * @bios_pg3: static bios page 3 1035 * @ioc_pg8: static ioc page 8 1036 * @iounit_pg0: static iounit page 0 1037 * @iounit_pg1: static iounit page 1 1038 * @iounit_pg8: static iounit page 8 1039 * @sas_hba: sas host object 1040 * @sas_expander_list: expander object list 1041 * @enclosure_list: enclosure object list 1042 * @sas_node_lock: 1043 * @sas_device_list: sas device object list 1044 * @sas_device_init_list: sas device object list (used only at init time) 1045 * @sas_device_lock: 1046 * @pcie_device_list: pcie device object list 1047 * @pcie_device_init_list: pcie device object list (used only at init time) 1048 * @pcie_device_lock: 1049 * @io_missing_delay: time for IO completed by fw when PDR enabled 1050 * @device_missing_delay: time for device missing by fw when PDR enabled 1051 * @sas_id : used for setting volume target IDs 1052 * @pcie_target_id: used for setting pcie target IDs 1053 * @blocking_handles: bitmask used to identify which devices need blocking 1054 * @pd_handles : bitmask for PD handles 1055 * @pd_handles_sz : size of pd_handle bitmask 1056 * @config_page_sz: config page size 1057 * @config_page: reserve memory for config page payload 1058 * @config_page_dma: 1059 * @hba_queue_depth: hba request queue depth 1060 * @sge_size: sg element size for either 32/64 bit 1061 * @scsiio_depth: SCSI_IO queue depth 1062 * @request_sz: per request frame size 1063 * @request: pool of request frames 1064 * @request_dma: 1065 * @request_dma_sz: 1066 * @scsi_lookup: firmware request tracker list 1067 * @scsi_lookup_lock: 1068 * @free_list: free list of request 1069 * @pending_io_count: 1070 * @reset_wq: 1071 * @chain: pool of chains 1072 * @chain_dma: 1073 * @max_sges_in_main_message: number sg elements in main message 1074 * @max_sges_in_chain_message: number sg elements per chain 1075 * @chains_needed_per_io: max chains per io 1076 * @chain_depth: total chains allocated 1077 * @chain_segment_sz: gives the max number of 1078 * SGEs accommodate on single chain buffer 1079 * @hi_priority_smid: 1080 * @hi_priority: 1081 * @hi_priority_dma: 1082 * @hi_priority_depth: 1083 * @hpr_lookup: 1084 * @hpr_free_list: 1085 * @internal_smid: 1086 * @internal: 1087 * @internal_dma: 1088 * @internal_depth: 1089 * @internal_lookup: 1090 * @internal_free_list: 1091 * @sense: pool of sense 1092 * @sense_dma: 1093 * @sense_dma_pool: 1094 * @reply_depth: hba reply queue depth: 1095 * @reply_sz: per reply frame size: 1096 * @reply: pool of replys: 1097 * @reply_dma: 1098 * @reply_dma_pool: 1099 * @reply_free_queue_depth: reply free depth 1100 * @reply_free: pool for reply free queue (32 bit addr) 1101 * @reply_free_dma: 1102 * @reply_free_dma_pool: 1103 * @reply_free_host_index: tail index in pool to insert free replys 1104 * @reply_post_queue_depth: reply post queue depth 1105 * @reply_post_struct: struct for reply_post_free physical & virt address 1106 * @rdpq_array_capable: FW supports multiple reply queue addresses in ioc_init 1107 * @rdpq_array_enable: rdpq_array support is enabled in the driver 1108 * @rdpq_array_enable_assigned: this ensures that rdpq_array_enable flag 1109 * is assigned only ones 1110 * @reply_queue_count: number of reply queue's 1111 * @reply_queue_list: link list contaning the reply queue info 1112 * @msix96_vector: 96 MSI-X vector support 1113 * @replyPostRegisterIndex: index of next position in Reply Desc Post Queue 1114 * @delayed_tr_list: target reset link list 1115 * @delayed_tr_volume_list: volume target reset link list 1116 * @delayed_sc_list: 1117 * @delayed_event_ack_list: 1118 * @temp_sensors_count: flag to carry the number of temperature sensors 1119 * @pci_access_mutex: Mutex to synchronize ioctl,sysfs show path and 1120 * pci resource handling. PCI resource freeing will lead to free 1121 * vital hardware/memory resource, which might be in use by cli/sysfs 1122 * path functions resulting in Null pointer reference followed by kernel 1123 * crash. To avoid the above race condition we use mutex syncrhonization 1124 * which ensures the syncrhonization between cli/sysfs_show path. 1125 */ 1126 struct MPT3SAS_ADAPTER { 1127 struct list_head list; 1128 struct Scsi_Host *shost; 1129 u8 id; 1130 int cpu_count; 1131 char name[MPT_NAME_LENGTH]; 1132 char driver_name[MPT_NAME_LENGTH - 8]; 1133 char tmp_string[MPT_STRING_LENGTH]; 1134 struct pci_dev *pdev; 1135 Mpi2SystemInterfaceRegs_t __iomem *chip; 1136 phys_addr_t chip_phys; 1137 int logging_level; 1138 int fwfault_debug; 1139 u8 ir_firmware; 1140 int bars; 1141 u8 mask_interrupts; 1142 int dma_mask; 1143 1144 /* fw fault handler */ 1145 char fault_reset_work_q_name[20]; 1146 struct workqueue_struct *fault_reset_work_q; 1147 struct delayed_work fault_reset_work; 1148 1149 /* fw event handler */ 1150 char firmware_event_name[20]; 1151 struct workqueue_struct *firmware_event_thread; 1152 spinlock_t fw_event_lock; 1153 struct list_head fw_event_list; 1154 1155 /* misc flags */ 1156 int aen_event_read_flag; 1157 u8 broadcast_aen_busy; 1158 u16 broadcast_aen_pending; 1159 u8 shost_recovery; 1160 u8 got_task_abort_from_ioctl; 1161 1162 struct mutex reset_in_progress_mutex; 1163 spinlock_t ioc_reset_in_progress_lock; 1164 u8 ioc_link_reset_in_progress; 1165 u8 ioc_reset_in_progress_status; 1166 1167 u8 ignore_loginfos; 1168 u8 remove_host; 1169 u8 pci_error_recovery; 1170 u8 wait_for_discovery_to_complete; 1171 u8 is_driver_loading; 1172 u8 port_enable_failed; 1173 u8 start_scan; 1174 u16 start_scan_failed; 1175 1176 u8 msix_enable; 1177 u16 msix_vector_count; 1178 u8 *cpu_msix_table; 1179 u16 cpu_msix_table_sz; 1180 resource_size_t __iomem **reply_post_host_index; 1181 u32 ioc_reset_count; 1182 MPT3SAS_FLUSH_RUNNING_CMDS schedule_dead_ioc_flush_running_cmds; 1183 u32 non_operational_loop; 1184 1185 /* internal commands, callback index */ 1186 u8 scsi_io_cb_idx; 1187 u8 tm_cb_idx; 1188 u8 transport_cb_idx; 1189 u8 scsih_cb_idx; 1190 u8 ctl_cb_idx; 1191 u8 base_cb_idx; 1192 u8 port_enable_cb_idx; 1193 u8 config_cb_idx; 1194 u8 tm_tr_cb_idx; 1195 u8 tm_tr_volume_cb_idx; 1196 u8 tm_sas_control_cb_idx; 1197 struct _internal_cmd base_cmds; 1198 struct _internal_cmd port_enable_cmds; 1199 struct _internal_cmd transport_cmds; 1200 struct _internal_cmd scsih_cmds; 1201 struct _internal_cmd tm_cmds; 1202 struct _internal_cmd ctl_cmds; 1203 struct _internal_cmd config_cmds; 1204 1205 MPT_ADD_SGE base_add_sg_single; 1206 1207 /* function ptr for either IEEE or MPI sg elements */ 1208 MPT_BUILD_SG_SCMD build_sg_scmd; 1209 MPT_BUILD_SG build_sg; 1210 MPT_BUILD_ZERO_LEN_SGE build_zero_len_sge; 1211 u16 sge_size_ieee; 1212 u16 hba_mpi_version_belonged; 1213 1214 /* function ptr for MPI sg elements only */ 1215 MPT_BUILD_SG build_sg_mpi; 1216 MPT_BUILD_ZERO_LEN_SGE build_zero_len_sge_mpi; 1217 1218 /* function ptr for NVMe PRP elements only */ 1219 NVME_BUILD_PRP build_nvme_prp; 1220 1221 /* event log */ 1222 u32 event_type[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS]; 1223 u32 event_context; 1224 void *event_log; 1225 u32 event_masks[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS]; 1226 1227 u8 tm_custom_handling; 1228 u8 nvme_abort_timeout; 1229 1230 1231 /* static config pages */ 1232 struct mpt3sas_facts facts; 1233 struct mpt3sas_port_facts *pfacts; 1234 Mpi2ManufacturingPage0_t manu_pg0; 1235 struct Mpi2ManufacturingPage10_t manu_pg10; 1236 struct Mpi2ManufacturingPage11_t manu_pg11; 1237 Mpi2BiosPage2_t bios_pg2; 1238 Mpi2BiosPage3_t bios_pg3; 1239 Mpi2IOCPage8_t ioc_pg8; 1240 Mpi2IOUnitPage0_t iounit_pg0; 1241 Mpi2IOUnitPage1_t iounit_pg1; 1242 Mpi2IOUnitPage8_t iounit_pg8; 1243 1244 struct _boot_device req_boot_device; 1245 struct _boot_device req_alt_boot_device; 1246 struct _boot_device current_boot_device; 1247 1248 /* sas hba, expander, and device list */ 1249 struct _sas_node sas_hba; 1250 struct list_head sas_expander_list; 1251 struct list_head enclosure_list; 1252 spinlock_t sas_node_lock; 1253 struct list_head sas_device_list; 1254 struct list_head sas_device_init_list; 1255 spinlock_t sas_device_lock; 1256 struct list_head pcie_device_list; 1257 struct list_head pcie_device_init_list; 1258 spinlock_t pcie_device_lock; 1259 1260 struct list_head raid_device_list; 1261 spinlock_t raid_device_lock; 1262 u8 io_missing_delay; 1263 u16 device_missing_delay; 1264 int sas_id; 1265 int pcie_target_id; 1266 1267 void *blocking_handles; 1268 void *pd_handles; 1269 u16 pd_handles_sz; 1270 1271 void *pend_os_device_add; 1272 u16 pend_os_device_add_sz; 1273 1274 /* config page */ 1275 u16 config_page_sz; 1276 void *config_page; 1277 dma_addr_t config_page_dma; 1278 void *config_vaddr; 1279 1280 /* scsiio request */ 1281 u16 hba_queue_depth; 1282 u16 sge_size; 1283 u16 scsiio_depth; 1284 u16 request_sz; 1285 u8 *request; 1286 dma_addr_t request_dma; 1287 u32 request_dma_sz; 1288 struct pcie_sg_list *pcie_sg_lookup; 1289 spinlock_t scsi_lookup_lock; 1290 int pending_io_count; 1291 wait_queue_head_t reset_wq; 1292 1293 /* PCIe SGL */ 1294 struct dma_pool *pcie_sgl_dma_pool; 1295 /* Host Page Size */ 1296 u32 page_size; 1297 1298 /* chain */ 1299 struct chain_lookup *chain_lookup; 1300 struct list_head free_chain_list; 1301 struct dma_pool *chain_dma_pool; 1302 ulong chain_pages; 1303 u16 max_sges_in_main_message; 1304 u16 max_sges_in_chain_message; 1305 u16 chains_needed_per_io; 1306 u32 chain_depth; 1307 u16 chain_segment_sz; 1308 u16 chains_per_prp_buffer; 1309 1310 /* hi-priority queue */ 1311 u16 hi_priority_smid; 1312 u8 *hi_priority; 1313 dma_addr_t hi_priority_dma; 1314 u16 hi_priority_depth; 1315 struct request_tracker *hpr_lookup; 1316 struct list_head hpr_free_list; 1317 1318 /* internal queue */ 1319 u16 internal_smid; 1320 u8 *internal; 1321 dma_addr_t internal_dma; 1322 u16 internal_depth; 1323 struct request_tracker *internal_lookup; 1324 struct list_head internal_free_list; 1325 1326 /* sense */ 1327 u8 *sense; 1328 dma_addr_t sense_dma; 1329 struct dma_pool *sense_dma_pool; 1330 1331 /* reply */ 1332 u16 reply_sz; 1333 u8 *reply; 1334 dma_addr_t reply_dma; 1335 u32 reply_dma_max_address; 1336 u32 reply_dma_min_address; 1337 struct dma_pool *reply_dma_pool; 1338 1339 /* reply free queue */ 1340 u16 reply_free_queue_depth; 1341 __le32 *reply_free; 1342 dma_addr_t reply_free_dma; 1343 struct dma_pool *reply_free_dma_pool; 1344 u32 reply_free_host_index; 1345 1346 /* reply post queue */ 1347 u16 reply_post_queue_depth; 1348 struct reply_post_struct *reply_post; 1349 u8 rdpq_array_capable; 1350 u8 rdpq_array_enable; 1351 u8 rdpq_array_enable_assigned; 1352 struct dma_pool *reply_post_free_dma_pool; 1353 struct dma_pool *reply_post_free_array_dma_pool; 1354 Mpi2IOCInitRDPQArrayEntry *reply_post_free_array; 1355 dma_addr_t reply_post_free_array_dma; 1356 u8 reply_queue_count; 1357 struct list_head reply_queue_list; 1358 1359 u8 combined_reply_queue; 1360 u8 combined_reply_index_count; 1361 /* reply post register index */ 1362 resource_size_t **replyPostRegisterIndex; 1363 1364 struct list_head delayed_tr_list; 1365 struct list_head delayed_tr_volume_list; 1366 struct list_head delayed_sc_list; 1367 struct list_head delayed_event_ack_list; 1368 u8 temp_sensors_count; 1369 struct mutex pci_access_mutex; 1370 1371 /* diag buffer support */ 1372 u8 *diag_buffer[MPI2_DIAG_BUF_TYPE_COUNT]; 1373 u32 diag_buffer_sz[MPI2_DIAG_BUF_TYPE_COUNT]; 1374 dma_addr_t diag_buffer_dma[MPI2_DIAG_BUF_TYPE_COUNT]; 1375 u8 diag_buffer_status[MPI2_DIAG_BUF_TYPE_COUNT]; 1376 u32 unique_id[MPI2_DIAG_BUF_TYPE_COUNT]; 1377 u32 product_specific[MPI2_DIAG_BUF_TYPE_COUNT][23]; 1378 u32 diagnostic_flags[MPI2_DIAG_BUF_TYPE_COUNT]; 1379 u32 ring_buffer_offset; 1380 u32 ring_buffer_sz; 1381 u8 is_warpdrive; 1382 u8 is_mcpu_endpoint; 1383 u8 hide_ir_msg; 1384 u8 mfg_pg10_hide_flag; 1385 u8 hide_drives; 1386 spinlock_t diag_trigger_lock; 1387 u8 diag_trigger_active; 1388 struct SL_WH_MASTER_TRIGGER_T diag_trigger_master; 1389 struct SL_WH_EVENT_TRIGGERS_T diag_trigger_event; 1390 struct SL_WH_SCSI_TRIGGERS_T diag_trigger_scsi; 1391 struct SL_WH_MPI_TRIGGERS_T diag_trigger_mpi; 1392 void *device_remove_in_progress; 1393 u16 device_remove_in_progress_sz; 1394 u8 is_gen35_ioc; 1395 PUT_SMID_IO_FP_HIP put_smid_scsi_io; 1396 1397 }; 1398 1399 typedef u8 (*MPT_CALLBACK)(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index, 1400 u32 reply); 1401 1402 1403 /* base shared API */ 1404 extern struct list_head mpt3sas_ioc_list; 1405 extern char driver_name[MPT_NAME_LENGTH]; 1406 /* spinlock on list operations over IOCs 1407 * Case: when multiple warpdrive cards(IOCs) are in use 1408 * Each IOC will added to the ioc list structure on initialization. 1409 * Watchdog threads run at regular intervals to check IOC for any 1410 * fault conditions which will trigger the dead_ioc thread to 1411 * deallocate pci resource, resulting deleting the IOC netry from list, 1412 * this deletion need to protected by spinlock to enusre that 1413 * ioc removal is syncrhonized, if not synchronized it might lead to 1414 * list_del corruption as the ioc list is traversed in cli path. 1415 */ 1416 extern spinlock_t gioc_lock; 1417 1418 void mpt3sas_base_start_watchdog(struct MPT3SAS_ADAPTER *ioc); 1419 void mpt3sas_base_stop_watchdog(struct MPT3SAS_ADAPTER *ioc); 1420 1421 int mpt3sas_base_attach(struct MPT3SAS_ADAPTER *ioc); 1422 void mpt3sas_base_detach(struct MPT3SAS_ADAPTER *ioc); 1423 int mpt3sas_base_map_resources(struct MPT3SAS_ADAPTER *ioc); 1424 void mpt3sas_base_free_resources(struct MPT3SAS_ADAPTER *ioc); 1425 void mpt3sas_free_enclosure_list(struct MPT3SAS_ADAPTER *ioc); 1426 int mpt3sas_base_hard_reset_handler(struct MPT3SAS_ADAPTER *ioc, 1427 enum reset_type type); 1428 1429 void *mpt3sas_base_get_msg_frame(struct MPT3SAS_ADAPTER *ioc, u16 smid); 1430 void *mpt3sas_base_get_sense_buffer(struct MPT3SAS_ADAPTER *ioc, u16 smid); 1431 __le32 mpt3sas_base_get_sense_buffer_dma(struct MPT3SAS_ADAPTER *ioc, 1432 u16 smid); 1433 void *mpt3sas_base_get_pcie_sgl(struct MPT3SAS_ADAPTER *ioc, u16 smid); 1434 dma_addr_t mpt3sas_base_get_pcie_sgl_dma(struct MPT3SAS_ADAPTER *ioc, u16 smid); 1435 void mpt3sas_base_sync_reply_irqs(struct MPT3SAS_ADAPTER *ioc); 1436 1437 void mpt3sas_base_put_smid_fast_path(struct MPT3SAS_ADAPTER *ioc, u16 smid, 1438 u16 handle); 1439 void mpt3sas_base_put_smid_hi_priority(struct MPT3SAS_ADAPTER *ioc, u16 smid, 1440 u16 msix_task); 1441 void mpt3sas_base_put_smid_nvme_encap(struct MPT3SAS_ADAPTER *ioc, u16 smid); 1442 void mpt3sas_base_put_smid_default(struct MPT3SAS_ADAPTER *ioc, u16 smid); 1443 /* hi-priority queue */ 1444 u16 mpt3sas_base_get_smid_hpr(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx); 1445 u16 mpt3sas_base_get_smid_scsiio(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx, 1446 struct scsi_cmnd *scmd); 1447 void mpt3sas_base_clear_st(struct MPT3SAS_ADAPTER *ioc, 1448 struct scsiio_tracker *st); 1449 1450 u16 mpt3sas_base_get_smid(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx); 1451 void mpt3sas_base_free_smid(struct MPT3SAS_ADAPTER *ioc, u16 smid); 1452 void mpt3sas_base_initialize_callback_handler(void); 1453 u8 mpt3sas_base_register_callback_handler(MPT_CALLBACK cb_func); 1454 void mpt3sas_base_release_callback_handler(u8 cb_idx); 1455 1456 u8 mpt3sas_base_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index, 1457 u32 reply); 1458 u8 mpt3sas_port_enable_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, 1459 u8 msix_index, u32 reply); 1460 void *mpt3sas_base_get_reply_virt_addr(struct MPT3SAS_ADAPTER *ioc, 1461 u32 phys_addr); 1462 1463 u32 mpt3sas_base_get_iocstate(struct MPT3SAS_ADAPTER *ioc, int cooked); 1464 1465 void mpt3sas_base_fault_info(struct MPT3SAS_ADAPTER *ioc , u16 fault_code); 1466 int mpt3sas_base_sas_iounit_control(struct MPT3SAS_ADAPTER *ioc, 1467 Mpi2SasIoUnitControlReply_t *mpi_reply, 1468 Mpi2SasIoUnitControlRequest_t *mpi_request); 1469 int mpt3sas_base_scsi_enclosure_processor(struct MPT3SAS_ADAPTER *ioc, 1470 Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request); 1471 1472 void mpt3sas_base_validate_event_type(struct MPT3SAS_ADAPTER *ioc, 1473 u32 *event_type); 1474 1475 void mpt3sas_halt_firmware(struct MPT3SAS_ADAPTER *ioc); 1476 1477 void mpt3sas_base_update_missing_delay(struct MPT3SAS_ADAPTER *ioc, 1478 u16 device_missing_delay, u8 io_missing_delay); 1479 1480 int mpt3sas_port_enable(struct MPT3SAS_ADAPTER *ioc); 1481 1482 void 1483 mpt3sas_wait_for_commands_to_complete(struct MPT3SAS_ADAPTER *ioc); 1484 1485 1486 /* scsih shared API */ 1487 struct scsi_cmnd *mpt3sas_scsih_scsi_lookup_get(struct MPT3SAS_ADAPTER *ioc, 1488 u16 smid); 1489 u8 mpt3sas_scsih_event_callback(struct MPT3SAS_ADAPTER *ioc, u8 msix_index, 1490 u32 reply); 1491 void mpt3sas_scsih_reset_handler(struct MPT3SAS_ADAPTER *ioc, int reset_phase); 1492 1493 int mpt3sas_scsih_issue_tm(struct MPT3SAS_ADAPTER *ioc, u16 handle, u64 lun, 1494 u8 type, u16 smid_task, u16 msix_task, u8 timeout, u8 tr_method); 1495 int mpt3sas_scsih_issue_locked_tm(struct MPT3SAS_ADAPTER *ioc, u16 handle, 1496 u64 lun, u8 type, u16 smid_task, u16 msix_task, 1497 u8 timeout, u8 tr_method); 1498 1499 void mpt3sas_scsih_set_tm_flag(struct MPT3SAS_ADAPTER *ioc, u16 handle); 1500 void mpt3sas_scsih_clear_tm_flag(struct MPT3SAS_ADAPTER *ioc, u16 handle); 1501 void mpt3sas_expander_remove(struct MPT3SAS_ADAPTER *ioc, u64 sas_address); 1502 void mpt3sas_device_remove_by_sas_address(struct MPT3SAS_ADAPTER *ioc, 1503 u64 sas_address); 1504 u8 mpt3sas_check_for_pending_internal_cmds(struct MPT3SAS_ADAPTER *ioc, 1505 u16 smid); 1506 1507 struct _sas_node *mpt3sas_scsih_expander_find_by_handle( 1508 struct MPT3SAS_ADAPTER *ioc, u16 handle); 1509 struct _sas_node *mpt3sas_scsih_expander_find_by_sas_address( 1510 struct MPT3SAS_ADAPTER *ioc, u64 sas_address); 1511 struct _sas_device *mpt3sas_get_sdev_by_addr( 1512 struct MPT3SAS_ADAPTER *ioc, u64 sas_address); 1513 struct _sas_device *__mpt3sas_get_sdev_by_addr( 1514 struct MPT3SAS_ADAPTER *ioc, u64 sas_address); 1515 struct _sas_device *mpt3sas_get_sdev_by_handle(struct MPT3SAS_ADAPTER *ioc, 1516 u16 handle); 1517 struct _pcie_device *mpt3sas_get_pdev_by_handle(struct MPT3SAS_ADAPTER *ioc, 1518 u16 handle); 1519 1520 void mpt3sas_port_enable_complete(struct MPT3SAS_ADAPTER *ioc); 1521 struct _raid_device * 1522 mpt3sas_raid_device_find_by_handle(struct MPT3SAS_ADAPTER *ioc, u16 handle); 1523 1524 /* config shared API */ 1525 u8 mpt3sas_config_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index, 1526 u32 reply); 1527 int mpt3sas_config_get_number_hba_phys(struct MPT3SAS_ADAPTER *ioc, 1528 u8 *num_phys); 1529 int mpt3sas_config_get_manufacturing_pg0(struct MPT3SAS_ADAPTER *ioc, 1530 Mpi2ConfigReply_t *mpi_reply, Mpi2ManufacturingPage0_t *config_page); 1531 int mpt3sas_config_get_manufacturing_pg7(struct MPT3SAS_ADAPTER *ioc, 1532 Mpi2ConfigReply_t *mpi_reply, Mpi2ManufacturingPage7_t *config_page, 1533 u16 sz); 1534 int mpt3sas_config_get_manufacturing_pg10(struct MPT3SAS_ADAPTER *ioc, 1535 Mpi2ConfigReply_t *mpi_reply, 1536 struct Mpi2ManufacturingPage10_t *config_page); 1537 1538 int mpt3sas_config_get_manufacturing_pg11(struct MPT3SAS_ADAPTER *ioc, 1539 Mpi2ConfigReply_t *mpi_reply, 1540 struct Mpi2ManufacturingPage11_t *config_page); 1541 int mpt3sas_config_set_manufacturing_pg11(struct MPT3SAS_ADAPTER *ioc, 1542 Mpi2ConfigReply_t *mpi_reply, 1543 struct Mpi2ManufacturingPage11_t *config_page); 1544 1545 int mpt3sas_config_get_bios_pg2(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t 1546 *mpi_reply, Mpi2BiosPage2_t *config_page); 1547 int mpt3sas_config_get_bios_pg3(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t 1548 *mpi_reply, Mpi2BiosPage3_t *config_page); 1549 int mpt3sas_config_get_iounit_pg0(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t 1550 *mpi_reply, Mpi2IOUnitPage0_t *config_page); 1551 int mpt3sas_config_get_sas_device_pg0(struct MPT3SAS_ADAPTER *ioc, 1552 Mpi2ConfigReply_t *mpi_reply, Mpi2SasDevicePage0_t *config_page, 1553 u32 form, u32 handle); 1554 int mpt3sas_config_get_sas_device_pg1(struct MPT3SAS_ADAPTER *ioc, 1555 Mpi2ConfigReply_t *mpi_reply, Mpi2SasDevicePage1_t *config_page, 1556 u32 form, u32 handle); 1557 int mpt3sas_config_get_pcie_device_pg0(struct MPT3SAS_ADAPTER *ioc, 1558 Mpi2ConfigReply_t *mpi_reply, Mpi26PCIeDevicePage0_t *config_page, 1559 u32 form, u32 handle); 1560 int mpt3sas_config_get_pcie_device_pg2(struct MPT3SAS_ADAPTER *ioc, 1561 Mpi2ConfigReply_t *mpi_reply, Mpi26PCIeDevicePage2_t *config_page, 1562 u32 form, u32 handle); 1563 int mpt3sas_config_get_sas_iounit_pg0(struct MPT3SAS_ADAPTER *ioc, 1564 Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage0_t *config_page, 1565 u16 sz); 1566 int mpt3sas_config_get_iounit_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t 1567 *mpi_reply, Mpi2IOUnitPage1_t *config_page); 1568 int mpt3sas_config_get_iounit_pg3(struct MPT3SAS_ADAPTER *ioc, 1569 Mpi2ConfigReply_t *mpi_reply, Mpi2IOUnitPage3_t *config_page, u16 sz); 1570 int mpt3sas_config_set_iounit_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t 1571 *mpi_reply, Mpi2IOUnitPage1_t *config_page); 1572 int mpt3sas_config_get_iounit_pg8(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t 1573 *mpi_reply, Mpi2IOUnitPage8_t *config_page); 1574 int mpt3sas_config_get_sas_iounit_pg1(struct MPT3SAS_ADAPTER *ioc, 1575 Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage1_t *config_page, 1576 u16 sz); 1577 int mpt3sas_config_set_sas_iounit_pg1(struct MPT3SAS_ADAPTER *ioc, 1578 Mpi2ConfigReply_t *mpi_reply, Mpi2SasIOUnitPage1_t *config_page, 1579 u16 sz); 1580 int mpt3sas_config_get_ioc_pg8(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t 1581 *mpi_reply, Mpi2IOCPage8_t *config_page); 1582 int mpt3sas_config_get_expander_pg0(struct MPT3SAS_ADAPTER *ioc, 1583 Mpi2ConfigReply_t *mpi_reply, Mpi2ExpanderPage0_t *config_page, 1584 u32 form, u32 handle); 1585 int mpt3sas_config_get_expander_pg1(struct MPT3SAS_ADAPTER *ioc, 1586 Mpi2ConfigReply_t *mpi_reply, Mpi2ExpanderPage1_t *config_page, 1587 u32 phy_number, u16 handle); 1588 int mpt3sas_config_get_enclosure_pg0(struct MPT3SAS_ADAPTER *ioc, 1589 Mpi2ConfigReply_t *mpi_reply, Mpi2SasEnclosurePage0_t *config_page, 1590 u32 form, u32 handle); 1591 int mpt3sas_config_get_phy_pg0(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t 1592 *mpi_reply, Mpi2SasPhyPage0_t *config_page, u32 phy_number); 1593 int mpt3sas_config_get_phy_pg1(struct MPT3SAS_ADAPTER *ioc, Mpi2ConfigReply_t 1594 *mpi_reply, Mpi2SasPhyPage1_t *config_page, u32 phy_number); 1595 int mpt3sas_config_get_raid_volume_pg1(struct MPT3SAS_ADAPTER *ioc, 1596 Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage1_t *config_page, u32 form, 1597 u32 handle); 1598 int mpt3sas_config_get_number_pds(struct MPT3SAS_ADAPTER *ioc, u16 handle, 1599 u8 *num_pds); 1600 int mpt3sas_config_get_raid_volume_pg0(struct MPT3SAS_ADAPTER *ioc, 1601 Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage0_t *config_page, u32 form, 1602 u32 handle, u16 sz); 1603 int mpt3sas_config_get_phys_disk_pg0(struct MPT3SAS_ADAPTER *ioc, 1604 Mpi2ConfigReply_t *mpi_reply, Mpi2RaidPhysDiskPage0_t *config_page, 1605 u32 form, u32 form_specific); 1606 int mpt3sas_config_get_volume_handle(struct MPT3SAS_ADAPTER *ioc, u16 pd_handle, 1607 u16 *volume_handle); 1608 int mpt3sas_config_get_volume_wwid(struct MPT3SAS_ADAPTER *ioc, 1609 u16 volume_handle, u64 *wwid); 1610 1611 /* ctl shared API */ 1612 extern struct device_attribute *mpt3sas_host_attrs[]; 1613 extern struct device_attribute *mpt3sas_dev_attrs[]; 1614 void mpt3sas_ctl_init(ushort hbas_to_enumerate); 1615 void mpt3sas_ctl_exit(ushort hbas_to_enumerate); 1616 u8 mpt3sas_ctl_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index, 1617 u32 reply); 1618 void mpt3sas_ctl_reset_handler(struct MPT3SAS_ADAPTER *ioc, int reset_phase); 1619 u8 mpt3sas_ctl_event_callback(struct MPT3SAS_ADAPTER *ioc, 1620 u8 msix_index, u32 reply); 1621 void mpt3sas_ctl_add_to_event_log(struct MPT3SAS_ADAPTER *ioc, 1622 Mpi2EventNotificationReply_t *mpi_reply); 1623 1624 void mpt3sas_enable_diag_buffer(struct MPT3SAS_ADAPTER *ioc, 1625 u8 bits_to_register); 1626 int mpt3sas_send_diag_release(struct MPT3SAS_ADAPTER *ioc, u8 buffer_type, 1627 u8 *issue_reset); 1628 1629 /* transport shared API */ 1630 extern struct scsi_transport_template *mpt3sas_transport_template; 1631 u8 mpt3sas_transport_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index, 1632 u32 reply); 1633 struct _sas_port *mpt3sas_transport_port_add(struct MPT3SAS_ADAPTER *ioc, 1634 u16 handle, u64 sas_address); 1635 void mpt3sas_transport_port_remove(struct MPT3SAS_ADAPTER *ioc, u64 sas_address, 1636 u64 sas_address_parent); 1637 int mpt3sas_transport_add_host_phy(struct MPT3SAS_ADAPTER *ioc, struct _sas_phy 1638 *mpt3sas_phy, Mpi2SasPhyPage0_t phy_pg0, struct device *parent_dev); 1639 int mpt3sas_transport_add_expander_phy(struct MPT3SAS_ADAPTER *ioc, 1640 struct _sas_phy *mpt3sas_phy, Mpi2ExpanderPage1_t expander_pg1, 1641 struct device *parent_dev); 1642 void mpt3sas_transport_update_links(struct MPT3SAS_ADAPTER *ioc, 1643 u64 sas_address, u16 handle, u8 phy_number, u8 link_rate); 1644 extern struct sas_function_template mpt3sas_transport_functions; 1645 extern struct scsi_transport_template *mpt3sas_transport_template; 1646 /* trigger data externs */ 1647 void mpt3sas_send_trigger_data_event(struct MPT3SAS_ADAPTER *ioc, 1648 struct SL_WH_TRIGGERS_EVENT_DATA_T *event_data); 1649 void mpt3sas_process_trigger_data(struct MPT3SAS_ADAPTER *ioc, 1650 struct SL_WH_TRIGGERS_EVENT_DATA_T *event_data); 1651 void mpt3sas_trigger_master(struct MPT3SAS_ADAPTER *ioc, 1652 u32 tigger_bitmask); 1653 void mpt3sas_trigger_event(struct MPT3SAS_ADAPTER *ioc, u16 event, 1654 u16 log_entry_qualifier); 1655 void mpt3sas_trigger_scsi(struct MPT3SAS_ADAPTER *ioc, u8 sense_key, 1656 u8 asc, u8 ascq); 1657 void mpt3sas_trigger_mpi(struct MPT3SAS_ADAPTER *ioc, u16 ioc_status, 1658 u32 loginfo); 1659 1660 /* warpdrive APIs */ 1661 u8 mpt3sas_get_num_volumes(struct MPT3SAS_ADAPTER *ioc); 1662 void mpt3sas_init_warpdrive_properties(struct MPT3SAS_ADAPTER *ioc, 1663 struct _raid_device *raid_device); 1664 void 1665 mpt3sas_setup_direct_io(struct MPT3SAS_ADAPTER *ioc, struct scsi_cmnd *scmd, 1666 struct _raid_device *raid_device, Mpi25SCSIIORequest_t *mpi_request); 1667 1668 /* NCQ Prio Handling Check */ 1669 bool scsih_ncq_prio_supp(struct scsi_device *sdev); 1670 1671 #endif /* MPT3SAS_BASE_H_INCLUDED */ 1672