xref: /linux/drivers/scsi/mpt3sas/mpi/mpi2_image.h (revision 635ee6c73034ea4488a8e26bb0d0291d83146863)
1ff92b9ddSSuganath Prabu /* SPDX-License-Identifier: GPL-2.0 */
2ff92b9ddSSuganath Prabu /*
3ff92b9ddSSuganath Prabu  * Copyright 2016-2020 Broadcom Limited. All rights reserved.
4ff92b9ddSSuganath Prabu  *
5ff92b9ddSSuganath Prabu  *          Name: mpi2_image.h
6ff92b9ddSSuganath Prabu  * Description: Contains definitions for firmware and other component images
7ff92b9ddSSuganath Prabu  * Creation Date: 04/02/2018
8*635ee6c7SSuganath Prabu  *       Version: 02.06.04
9ff92b9ddSSuganath Prabu  *
10ff92b9ddSSuganath Prabu  *
11ff92b9ddSSuganath Prabu  * Version History
12ff92b9ddSSuganath Prabu  * ---------------
13ff92b9ddSSuganath Prabu  *
14ff92b9ddSSuganath Prabu  * Date      Version   Description
15ff92b9ddSSuganath Prabu  * --------  --------  ------------------------------------------------------
16ff92b9ddSSuganath Prabu  * 08-01-18  02.06.00  Initial version for MPI 2.6.5.
17ff92b9ddSSuganath Prabu  * 08-14-18  02.06.01  Corrected define for MPI26_IMAGE_HEADER_SIGNATURE0_MPI26
18ff92b9ddSSuganath Prabu  * 08-28-18  02.06.02  Added MPI2_EXT_IMAGE_TYPE_RDE
19ff92b9ddSSuganath Prabu  * 09-07-18  02.06.03  Added MPI26_EVENT_PCIE_TOPO_PI_16_LANES
20*635ee6c7SSuganath Prabu  * 12-17-18  02.06.04  Addd MPI2_EXT_IMAGE_TYPE_PBLP
21*635ee6c7SSuganath Prabu  *			Shorten some defines to be compatible with DOS
22ff92b9ddSSuganath Prabu  */
23ff92b9ddSSuganath Prabu #ifndef MPI2_IMAGE_H
24ff92b9ddSSuganath Prabu #define MPI2_IMAGE_H
25ff92b9ddSSuganath Prabu 
26ff92b9ddSSuganath Prabu 
27ff92b9ddSSuganath Prabu /*FW Image Header */
28ff92b9ddSSuganath Prabu typedef struct _MPI2_FW_IMAGE_HEADER {
29ff92b9ddSSuganath Prabu 	U32 Signature;		/*0x00 */
30ff92b9ddSSuganath Prabu 	U32 Signature0;		/*0x04 */
31ff92b9ddSSuganath Prabu 	U32 Signature1;		/*0x08 */
32ff92b9ddSSuganath Prabu 	U32 Signature2;		/*0x0C */
33ff92b9ddSSuganath Prabu 	MPI2_VERSION_UNION MPIVersion;	/*0x10 */
34ff92b9ddSSuganath Prabu 	MPI2_VERSION_UNION FWVersion;	/*0x14 */
35ff92b9ddSSuganath Prabu 	MPI2_VERSION_UNION NVDATAVersion;	/*0x18 */
36ff92b9ddSSuganath Prabu 	MPI2_VERSION_UNION PackageVersion;	/*0x1C */
37ff92b9ddSSuganath Prabu 	U16 VendorID;		/*0x20 */
38ff92b9ddSSuganath Prabu 	U16 ProductID;		/*0x22 */
39ff92b9ddSSuganath Prabu 	U16 ProtocolFlags;	/*0x24 */
40ff92b9ddSSuganath Prabu 	U16 Reserved26;		/*0x26 */
41ff92b9ddSSuganath Prabu 	U32 IOCCapabilities;	/*0x28 */
42ff92b9ddSSuganath Prabu 	U32 ImageSize;		/*0x2C */
43ff92b9ddSSuganath Prabu 	U32 NextImageHeaderOffset;	/*0x30 */
44ff92b9ddSSuganath Prabu 	U32 Checksum;		/*0x34 */
45ff92b9ddSSuganath Prabu 	U32 Reserved38;		/*0x38 */
46ff92b9ddSSuganath Prabu 	U32 Reserved3C;		/*0x3C */
47ff92b9ddSSuganath Prabu 	U32 Reserved40;		/*0x40 */
48ff92b9ddSSuganath Prabu 	U32 Reserved44;		/*0x44 */
49ff92b9ddSSuganath Prabu 	U32 Reserved48;		/*0x48 */
50ff92b9ddSSuganath Prabu 	U32 Reserved4C;		/*0x4C */
51ff92b9ddSSuganath Prabu 	U32 Reserved50;		/*0x50 */
52ff92b9ddSSuganath Prabu 	U32 Reserved54;		/*0x54 */
53ff92b9ddSSuganath Prabu 	U32 Reserved58;		/*0x58 */
54ff92b9ddSSuganath Prabu 	U32 Reserved5C;		/*0x5C */
55ff92b9ddSSuganath Prabu 	U32 BootFlags;		/*0x60 */
56ff92b9ddSSuganath Prabu 	U32 FirmwareVersionNameWhat;	/*0x64 */
57ff92b9ddSSuganath Prabu 	U8 FirmwareVersionName[32];	/*0x68 */
58ff92b9ddSSuganath Prabu 	U32 VendorNameWhat;	/*0x88 */
59ff92b9ddSSuganath Prabu 	U8 VendorName[32];	/*0x8C */
60ff92b9ddSSuganath Prabu 	U32 PackageNameWhat;	/*0x88 */
61ff92b9ddSSuganath Prabu 	U8 PackageName[32];	/*0x8C */
62ff92b9ddSSuganath Prabu 	U32 ReservedD0;		/*0xD0 */
63ff92b9ddSSuganath Prabu 	U32 ReservedD4;		/*0xD4 */
64ff92b9ddSSuganath Prabu 	U32 ReservedD8;		/*0xD8 */
65ff92b9ddSSuganath Prabu 	U32 ReservedDC;		/*0xDC */
66ff92b9ddSSuganath Prabu 	U32 ReservedE0;		/*0xE0 */
67ff92b9ddSSuganath Prabu 	U32 ReservedE4;		/*0xE4 */
68ff92b9ddSSuganath Prabu 	U32 ReservedE8;		/*0xE8 */
69ff92b9ddSSuganath Prabu 	U32 ReservedEC;		/*0xEC */
70ff92b9ddSSuganath Prabu 	U32 ReservedF0;		/*0xF0 */
71ff92b9ddSSuganath Prabu 	U32 ReservedF4;		/*0xF4 */
72ff92b9ddSSuganath Prabu 	U32 ReservedF8;		/*0xF8 */
73ff92b9ddSSuganath Prabu 	U32 ReservedFC;		/*0xFC */
74ff92b9ddSSuganath Prabu } MPI2_FW_IMAGE_HEADER, *PTR_MPI2_FW_IMAGE_HEADER,
75ff92b9ddSSuganath Prabu 	Mpi2FWImageHeader_t, *pMpi2FWImageHeader_t;
76ff92b9ddSSuganath Prabu 
77ff92b9ddSSuganath Prabu /*Signature field */
78ff92b9ddSSuganath Prabu #define MPI2_FW_HEADER_SIGNATURE_OFFSET         (0x00)
79ff92b9ddSSuganath Prabu #define MPI2_FW_HEADER_SIGNATURE_MASK           (0xFF000000)
80ff92b9ddSSuganath Prabu #define MPI2_FW_HEADER_SIGNATURE                (0xEA000000)
81ff92b9ddSSuganath Prabu #define MPI26_FW_HEADER_SIGNATURE               (0xEB000000)
82ff92b9ddSSuganath Prabu 
83ff92b9ddSSuganath Prabu /*Signature0 field */
84ff92b9ddSSuganath Prabu #define MPI2_FW_HEADER_SIGNATURE0_OFFSET        (0x04)
85ff92b9ddSSuganath Prabu #define MPI2_FW_HEADER_SIGNATURE0               (0x5AFAA55A)
86ff92b9ddSSuganath Prabu /*Last byte is defined by architecture */
87ff92b9ddSSuganath Prabu #define MPI26_FW_HEADER_SIGNATURE0_BASE         (0x5AEAA500)
88ff92b9ddSSuganath Prabu #define MPI26_FW_HEADER_SIGNATURE0_ARC_0        (0x5A)
89ff92b9ddSSuganath Prabu #define MPI26_FW_HEADER_SIGNATURE0_ARC_1        (0x00)
90ff92b9ddSSuganath Prabu #define MPI26_FW_HEADER_SIGNATURE0_ARC_2        (0x01)
91ff92b9ddSSuganath Prabu /*legacy (0x5AEAA55A) */
92ff92b9ddSSuganath Prabu #define MPI26_FW_HEADER_SIGNATURE0_ARC_3        (0x02)
93ff92b9ddSSuganath Prabu #define MPI26_FW_HEADER_SIGNATURE0 \
94ff92b9ddSSuganath Prabu 	(MPI26_FW_HEADER_SIGNATURE0_BASE+MPI26_FW_HEADER_SIGNATURE0_ARC_0)
95ff92b9ddSSuganath Prabu #define MPI26_FW_HEADER_SIGNATURE0_3516 \
96ff92b9ddSSuganath Prabu 	(MPI26_FW_HEADER_SIGNATURE0_BASE+MPI26_FW_HEADER_SIGNATURE0_ARC_1)
97ff92b9ddSSuganath Prabu #define MPI26_FW_HEADER_SIGNATURE0_4008 \
98ff92b9ddSSuganath Prabu 	(MPI26_FW_HEADER_SIGNATURE0_BASE+MPI26_FW_HEADER_SIGNATURE0_ARC_3)
99ff92b9ddSSuganath Prabu 
100ff92b9ddSSuganath Prabu /*Signature1 field */
101ff92b9ddSSuganath Prabu #define MPI2_FW_HEADER_SIGNATURE1_OFFSET        (0x08)
102ff92b9ddSSuganath Prabu #define MPI2_FW_HEADER_SIGNATURE1               (0xA55AFAA5)
103ff92b9ddSSuganath Prabu #define MPI26_FW_HEADER_SIGNATURE1              (0xA55AEAA5)
104ff92b9ddSSuganath Prabu 
105ff92b9ddSSuganath Prabu /*Signature2 field */
106ff92b9ddSSuganath Prabu #define MPI2_FW_HEADER_SIGNATURE2_OFFSET        (0x0C)
107ff92b9ddSSuganath Prabu #define MPI2_FW_HEADER_SIGNATURE2               (0x5AA55AFA)
108ff92b9ddSSuganath Prabu #define MPI26_FW_HEADER_SIGNATURE2              (0x5AA55AEA)
109ff92b9ddSSuganath Prabu 
110ff92b9ddSSuganath Prabu /*defines for using the ProductID field */
111ff92b9ddSSuganath Prabu #define MPI2_FW_HEADER_PID_TYPE_MASK            (0xF000)
112ff92b9ddSSuganath Prabu #define MPI2_FW_HEADER_PID_TYPE_SAS             (0x2000)
113ff92b9ddSSuganath Prabu 
114ff92b9ddSSuganath Prabu #define MPI2_FW_HEADER_PID_PROD_MASK                    (0x0F00)
115ff92b9ddSSuganath Prabu #define MPI2_FW_HEADER_PID_PROD_A                       (0x0000)
116ff92b9ddSSuganath Prabu #define MPI2_FW_HEADER_PID_PROD_TARGET_INITIATOR_SCSI   (0x0200)
117ff92b9ddSSuganath Prabu #define MPI2_FW_HEADER_PID_PROD_IR_SCSI                 (0x0700)
118ff92b9ddSSuganath Prabu 
119ff92b9ddSSuganath Prabu #define MPI2_FW_HEADER_PID_FAMILY_MASK          (0x00FF)
120ff92b9ddSSuganath Prabu /*SAS ProductID Family bits */
121ff92b9ddSSuganath Prabu #define MPI2_FW_HEADER_PID_FAMILY_2108_SAS      (0x0013)
122ff92b9ddSSuganath Prabu #define MPI2_FW_HEADER_PID_FAMILY_2208_SAS      (0x0014)
123ff92b9ddSSuganath Prabu #define MPI25_FW_HEADER_PID_FAMILY_3108_SAS     (0x0021)
124ff92b9ddSSuganath Prabu #define MPI26_FW_HEADER_PID_FAMILY_3324_SAS     (0x0028)
125ff92b9ddSSuganath Prabu #define MPI26_FW_HEADER_PID_FAMILY_3516_SAS     (0x0031)
126ff92b9ddSSuganath Prabu 
127ff92b9ddSSuganath Prabu /*use MPI2_IOCFACTS_PROTOCOL_ defines for ProtocolFlags field */
128ff92b9ddSSuganath Prabu 
129ff92b9ddSSuganath Prabu /*use MPI2_IOCFACTS_CAPABILITY_ defines for IOCCapabilities field */
130ff92b9ddSSuganath Prabu 
131ff92b9ddSSuganath Prabu #define MPI2_FW_HEADER_IMAGESIZE_OFFSET         (0x2C)
132ff92b9ddSSuganath Prabu #define MPI2_FW_HEADER_NEXTIMAGE_OFFSET         (0x30)
133ff92b9ddSSuganath Prabu 
134ff92b9ddSSuganath Prabu #define MPI26_FW_HEADER_BOOTFLAGS_OFFSET          (0x60)
135ff92b9ddSSuganath Prabu #define MPI2_FW_HEADER_BOOTFLAGS_ISSI32M_FLAG     (0x00000001)
136ff92b9ddSSuganath Prabu #define MPI2_FW_HEADER_BOOTFLAGS_W25Q256JW_FLAG   (0x00000002)
137ff92b9ddSSuganath Prabu /*This image has a auto-discovery version of SPI */
138ff92b9ddSSuganath Prabu #define MPI2_FW_HEADER_BOOTFLAGS_AUTO_SPI_FLAG    (0x00000004)
139ff92b9ddSSuganath Prabu 
140ff92b9ddSSuganath Prabu 
141ff92b9ddSSuganath Prabu #define MPI2_FW_HEADER_VERNMHWAT_OFFSET         (0x64)
142ff92b9ddSSuganath Prabu 
143ff92b9ddSSuganath Prabu #define MPI2_FW_HEADER_WHAT_SIGNATURE           (0x29232840)
144ff92b9ddSSuganath Prabu 
145ff92b9ddSSuganath Prabu #define MPI2_FW_HEADER_SIZE                     (0x100)
146ff92b9ddSSuganath Prabu 
147ff92b9ddSSuganath Prabu 
148ff92b9ddSSuganath Prabu /****************************************************************************
149ff92b9ddSSuganath Prabu  *              Component Image Format and related defines                  *
150ff92b9ddSSuganath Prabu  ****************************************************************************/
151ff92b9ddSSuganath Prabu 
152ff92b9ddSSuganath Prabu /*Maximum number of Hash Exclusion entries in a Component Image Header */
153ff92b9ddSSuganath Prabu #define MPI26_COMP_IMG_HDR_NUM_HASH_EXCL        (4)
154ff92b9ddSSuganath Prabu 
155ff92b9ddSSuganath Prabu /*Hash Exclusion Format */
156ff92b9ddSSuganath Prabu typedef struct _MPI26_HASH_EXCLUSION_FORMAT {
157ff92b9ddSSuganath Prabu 	U32 Offset;        /*0x00 */
158ff92b9ddSSuganath Prabu 	U32 Size;          /*0x04 */
159ff92b9ddSSuganath Prabu } MPI26_HASH_EXCLUSION_FORMAT,
160ff92b9ddSSuganath Prabu 	*PTR_MPI26_HASH_EXCLUSION_FORMAT,
161ff92b9ddSSuganath Prabu 	Mpi26HashSxclusionFormat_t,
162ff92b9ddSSuganath Prabu 	*pMpi26HashExclusionFormat_t;
163ff92b9ddSSuganath Prabu 
164ff92b9ddSSuganath Prabu /*FW Image Header */
165ff92b9ddSSuganath Prabu typedef struct _MPI26_COMPONENT_IMAGE_HEADER {
166ff92b9ddSSuganath Prabu 	U32 Signature0;					/*0x00 */
167ff92b9ddSSuganath Prabu 	U32 LoadAddress;				/*0x04 */
168ff92b9ddSSuganath Prabu 	U32 DataSize;					/*0x08 */
169ff92b9ddSSuganath Prabu 	U32 StartAddress;				/*0x0C */
170ff92b9ddSSuganath Prabu 	U32 Signature1;					/*0x10 */
171ff92b9ddSSuganath Prabu 	U32 FlashOffset;				/*0x14 */
172ff92b9ddSSuganath Prabu 	U32 FlashSize;					/*0x18 */
173ff92b9ddSSuganath Prabu 	U32 VersionStringOffset;			/*0x1C */
174ff92b9ddSSuganath Prabu 	U32 BuildDateStringOffset;			/*0x20 */
175ff92b9ddSSuganath Prabu 	U32 BuildTimeStringOffset;			/*0x24 */
176ff92b9ddSSuganath Prabu 	U32 EnvironmentVariableOffset;			/*0x28 */
177ff92b9ddSSuganath Prabu 	U32 ApplicationSpecific;			/*0x2C */
178ff92b9ddSSuganath Prabu 	U32 Signature2;					/*0x30 */
179ff92b9ddSSuganath Prabu 	U32 HeaderSize;					/*0x34 */
180ff92b9ddSSuganath Prabu 	U32 Crc;					/*0x38 */
181ff92b9ddSSuganath Prabu 	U8 NotFlashImage;				/*0x3C */
182ff92b9ddSSuganath Prabu 	U8 Compressed;					/*0x3D */
183ff92b9ddSSuganath Prabu 	U16 Reserved3E;					/*0x3E */
184ff92b9ddSSuganath Prabu 	U32 SecondaryFlashOffset;			/*0x40 */
185ff92b9ddSSuganath Prabu 	U32 Reserved44;					/*0x44 */
186ff92b9ddSSuganath Prabu 	U32 Reserved48;					/*0x48 */
187ff92b9ddSSuganath Prabu 	MPI2_VERSION_UNION RMCInterfaceVersion;		/*0x4C */
188ff92b9ddSSuganath Prabu 	MPI2_VERSION_UNION Reserved50;			/*0x50 */
189ff92b9ddSSuganath Prabu 	MPI2_VERSION_UNION FWVersion;			/*0x54 */
190ff92b9ddSSuganath Prabu 	MPI2_VERSION_UNION NvdataVersion;		/*0x58 */
191ff92b9ddSSuganath Prabu 	MPI26_HASH_EXCLUSION_FORMAT
192ff92b9ddSSuganath Prabu 	HashExclusion[MPI26_COMP_IMG_HDR_NUM_HASH_EXCL];/*0x5C */
193ff92b9ddSSuganath Prabu 	U32 NextImageHeaderOffset;			/*0x7C */
194ff92b9ddSSuganath Prabu 	U32 Reserved80[32];				/*0x80 -- 0xFC */
195ff92b9ddSSuganath Prabu } MPI26_COMPONENT_IMAGE_HEADER,
196ff92b9ddSSuganath Prabu 	*PTR_MPI26_COMPONENT_IMAGE_HEADER,
197ff92b9ddSSuganath Prabu 	Mpi26ComponentImageHeader_t,
198ff92b9ddSSuganath Prabu 	*pMpi26ComponentImageHeader_t;
199ff92b9ddSSuganath Prabu 
200ff92b9ddSSuganath Prabu 
201ff92b9ddSSuganath Prabu /**** Definitions for Signature0 field ****/
202ff92b9ddSSuganath Prabu #define MPI26_IMAGE_HEADER_SIGNATURE0_MPI26                     (0xEB000042)
203ff92b9ddSSuganath Prabu 
204ff92b9ddSSuganath Prabu /**** Definitions for Signature1 field ****/
205*635ee6c7SSuganath Prabu #define MPI26_IMAGE_HEADER_SIG1_APPLICATION              (0x20505041)
206*635ee6c7SSuganath Prabu #define MPI26_IMAGE_HEADER_SIG1_CBB                      (0x20424243)
207*635ee6c7SSuganath Prabu #define MPI26_IMAGE_HEADER_SIG1_MFG                      (0x2047464D)
208*635ee6c7SSuganath Prabu #define MPI26_IMAGE_HEADER_SIG1_BIOS                     (0x534F4942)
209*635ee6c7SSuganath Prabu #define MPI26_IMAGE_HEADER_SIG1_HIIM                     (0x4D494948)
210*635ee6c7SSuganath Prabu #define MPI26_IMAGE_HEADER_SIG1_HIIA                     (0x41494948)
211*635ee6c7SSuganath Prabu #define MPI26_IMAGE_HEADER_SIG1_CPLD                     (0x444C5043)
212*635ee6c7SSuganath Prabu #define MPI26_IMAGE_HEADER_SIG1_SPD                      (0x20445053)
213*635ee6c7SSuganath Prabu #define MPI26_IMAGE_HEADER_SIG1_NVDATA                   (0x5444564E)
214*635ee6c7SSuganath Prabu #define MPI26_IMAGE_HEADER_SIG1_GAS_GAUGE                (0x20534147)
215*635ee6c7SSuganath Prabu #define MPI26_IMAGE_HEADER_SIG1_PBLP                     (0x504C4250)
216ff92b9ddSSuganath Prabu 
217ff92b9ddSSuganath Prabu /**** Definitions for Signature2 field ****/
218ff92b9ddSSuganath Prabu #define MPI26_IMAGE_HEADER_SIGNATURE2_VALUE                    (0x50584546)
219ff92b9ddSSuganath Prabu 
220ff92b9ddSSuganath Prabu /**** Offsets for Image Header Fields ****/
221ff92b9ddSSuganath Prabu #define MPI26_IMAGE_HEADER_SIGNATURE0_OFFSET                   (0x00)
222ff92b9ddSSuganath Prabu #define MPI26_IMAGE_HEADER_LOAD_ADDRESS_OFFSET                 (0x04)
223ff92b9ddSSuganath Prabu #define MPI26_IMAGE_HEADER_DATA_SIZE_OFFSET                    (0x08)
224ff92b9ddSSuganath Prabu #define MPI26_IMAGE_HEADER_START_ADDRESS_OFFSET                (0x0C)
225ff92b9ddSSuganath Prabu #define MPI26_IMAGE_HEADER_SIGNATURE1_OFFSET                   (0x10)
226ff92b9ddSSuganath Prabu #define MPI26_IMAGE_HEADER_FLASH_OFFSET_OFFSET                 (0x14)
227ff92b9ddSSuganath Prabu #define MPI26_IMAGE_HEADER_FLASH_SIZE_OFFSET                   (0x18)
228ff92b9ddSSuganath Prabu #define MPI26_IMAGE_HEADER_VERSION_STRING_OFFSET_OFFSET        (0x1C)
229ff92b9ddSSuganath Prabu #define MPI26_IMAGE_HEADER_BUILD_DATE_STRING_OFFSET_OFFSET     (0x20)
230ff92b9ddSSuganath Prabu #define MPI26_IMAGE_HEADER_BUILD_TIME_OFFSET_OFFSET            (0x24)
231ff92b9ddSSuganath Prabu #define MPI26_IMAGE_HEADER_ENVIROMENT_VAR_OFFSET_OFFSET        (0x28)
232ff92b9ddSSuganath Prabu #define MPI26_IMAGE_HEADER_APPLICATION_SPECIFIC_OFFSET         (0x2C)
233ff92b9ddSSuganath Prabu #define MPI26_IMAGE_HEADER_SIGNATURE2_OFFSET                   (0x30)
234ff92b9ddSSuganath Prabu #define MPI26_IMAGE_HEADER_HEADER_SIZE_OFFSET                  (0x34)
235ff92b9ddSSuganath Prabu #define MPI26_IMAGE_HEADER_CRC_OFFSET                          (0x38)
236ff92b9ddSSuganath Prabu #define MPI26_IMAGE_HEADER_NOT_FLASH_IMAGE_OFFSET              (0x3C)
237ff92b9ddSSuganath Prabu #define MPI26_IMAGE_HEADER_COMPRESSED_OFFSET                   (0x3D)
238ff92b9ddSSuganath Prabu #define MPI26_IMAGE_HEADER_SECONDARY_FLASH_OFFSET_OFFSET       (0x40)
239ff92b9ddSSuganath Prabu #define MPI26_IMAGE_HEADER_RMC_INTERFACE_VER_OFFSET            (0x4C)
240ff92b9ddSSuganath Prabu #define MPI26_IMAGE_HEADER_COMPONENT_IMAGE_VER_OFFSET          (0x54)
241ff92b9ddSSuganath Prabu #define MPI26_IMAGE_HEADER_HASH_EXCLUSION_OFFSET               (0x5C)
242ff92b9ddSSuganath Prabu #define MPI26_IMAGE_HEADER_NEXT_IMAGE_HEADER_OFFSET_OFFSET     (0x7C)
243ff92b9ddSSuganath Prabu 
244ff92b9ddSSuganath Prabu 
245ff92b9ddSSuganath Prabu #define MPI26_IMAGE_HEADER_SIZE                                (0x100)
246ff92b9ddSSuganath Prabu 
247ff92b9ddSSuganath Prabu 
248ff92b9ddSSuganath Prabu /*Extended Image Header */
249ff92b9ddSSuganath Prabu typedef struct _MPI2_EXT_IMAGE_HEADER {
250ff92b9ddSSuganath Prabu 	U8 ImageType;		/*0x00 */
251ff92b9ddSSuganath Prabu 	U8 Reserved1;		/*0x01 */
252ff92b9ddSSuganath Prabu 	U16 Reserved2;		/*0x02 */
253ff92b9ddSSuganath Prabu 	U32 Checksum;		/*0x04 */
254ff92b9ddSSuganath Prabu 	U32 ImageSize;		/*0x08 */
255ff92b9ddSSuganath Prabu 	U32 NextImageHeaderOffset;	/*0x0C */
256ff92b9ddSSuganath Prabu 	U32 PackageVersion;	/*0x10 */
257ff92b9ddSSuganath Prabu 	U32 Reserved3;		/*0x14 */
258ff92b9ddSSuganath Prabu 	U32 Reserved4;		/*0x18 */
259ff92b9ddSSuganath Prabu 	U32 Reserved5;		/*0x1C */
260ff92b9ddSSuganath Prabu 	U8 IdentifyString[32];	/*0x20 */
261ff92b9ddSSuganath Prabu } MPI2_EXT_IMAGE_HEADER, *PTR_MPI2_EXT_IMAGE_HEADER,
262ff92b9ddSSuganath Prabu 	Mpi2ExtImageHeader_t, *pMpi2ExtImageHeader_t;
263ff92b9ddSSuganath Prabu 
264ff92b9ddSSuganath Prabu /*useful offsets */
265ff92b9ddSSuganath Prabu #define MPI2_EXT_IMAGE_IMAGETYPE_OFFSET         (0x00)
266ff92b9ddSSuganath Prabu #define MPI2_EXT_IMAGE_IMAGESIZE_OFFSET         (0x08)
267ff92b9ddSSuganath Prabu #define MPI2_EXT_IMAGE_NEXTIMAGE_OFFSET         (0x0C)
268ff92b9ddSSuganath Prabu #define MPI2_EXT_IMAGE_PACKAGEVERSION_OFFSET   (0x10)
269ff92b9ddSSuganath Prabu 
270ff92b9ddSSuganath Prabu #define MPI2_EXT_IMAGE_HEADER_SIZE              (0x40)
271ff92b9ddSSuganath Prabu 
272ff92b9ddSSuganath Prabu /*defines for the ImageType field */
273ff92b9ddSSuganath Prabu #define MPI2_EXT_IMAGE_TYPE_UNSPECIFIED             (0x00)
274ff92b9ddSSuganath Prabu #define MPI2_EXT_IMAGE_TYPE_FW                      (0x01)
275ff92b9ddSSuganath Prabu #define MPI2_EXT_IMAGE_TYPE_NVDATA                  (0x03)
276ff92b9ddSSuganath Prabu #define MPI2_EXT_IMAGE_TYPE_BOOTLOADER              (0x04)
277ff92b9ddSSuganath Prabu #define MPI2_EXT_IMAGE_TYPE_INITIALIZATION          (0x05)
278ff92b9ddSSuganath Prabu #define MPI2_EXT_IMAGE_TYPE_FLASH_LAYOUT            (0x06)
279ff92b9ddSSuganath Prabu #define MPI2_EXT_IMAGE_TYPE_SUPPORTED_DEVICES       (0x07)
280ff92b9ddSSuganath Prabu #define MPI2_EXT_IMAGE_TYPE_MEGARAID                (0x08)
281ff92b9ddSSuganath Prabu #define MPI2_EXT_IMAGE_TYPE_ENCRYPTED_HASH          (0x09)
282ff92b9ddSSuganath Prabu #define MPI2_EXT_IMAGE_TYPE_RDE                     (0x0A)
283*635ee6c7SSuganath Prabu #define MPI2_EXT_IMAGE_TYPE_PBLP                    (0x0B)
284ff92b9ddSSuganath Prabu #define MPI2_EXT_IMAGE_TYPE_MIN_PRODUCT_SPECIFIC    (0x80)
285ff92b9ddSSuganath Prabu #define MPI2_EXT_IMAGE_TYPE_MAX_PRODUCT_SPECIFIC    (0xFF)
286ff92b9ddSSuganath Prabu 
287ff92b9ddSSuganath Prabu #define MPI2_EXT_IMAGE_TYPE_MAX (MPI2_EXT_IMAGE_TYPE_MAX_PRODUCT_SPECIFIC)
288ff92b9ddSSuganath Prabu 
289ff92b9ddSSuganath Prabu /*FLASH Layout Extended Image Data */
290ff92b9ddSSuganath Prabu 
291ff92b9ddSSuganath Prabu /*
292ff92b9ddSSuganath Prabu  *Host code (drivers, BIOS, utilities, etc.) should leave this define set to
293ff92b9ddSSuganath Prabu  *one and check RegionsPerLayout at runtime.
294ff92b9ddSSuganath Prabu  */
295ff92b9ddSSuganath Prabu #ifndef MPI2_FLASH_NUMBER_OF_REGIONS
296ff92b9ddSSuganath Prabu #define MPI2_FLASH_NUMBER_OF_REGIONS        (1)
297ff92b9ddSSuganath Prabu #endif
298ff92b9ddSSuganath Prabu 
299ff92b9ddSSuganath Prabu /*
300ff92b9ddSSuganath Prabu  *Host code (drivers, BIOS, utilities, etc.) should leave this define set to
301ff92b9ddSSuganath Prabu  *one and check NumberOfLayouts at runtime.
302ff92b9ddSSuganath Prabu  */
303ff92b9ddSSuganath Prabu #ifndef MPI2_FLASH_NUMBER_OF_LAYOUTS
304ff92b9ddSSuganath Prabu #define MPI2_FLASH_NUMBER_OF_LAYOUTS        (1)
305ff92b9ddSSuganath Prabu #endif
306ff92b9ddSSuganath Prabu 
307ff92b9ddSSuganath Prabu typedef struct _MPI2_FLASH_REGION {
308ff92b9ddSSuganath Prabu 	U8 RegionType;		/*0x00 */
309ff92b9ddSSuganath Prabu 	U8 Reserved1;		/*0x01 */
310ff92b9ddSSuganath Prabu 	U16 Reserved2;		/*0x02 */
311ff92b9ddSSuganath Prabu 	U32 RegionOffset;	/*0x04 */
312ff92b9ddSSuganath Prabu 	U32 RegionSize;		/*0x08 */
313ff92b9ddSSuganath Prabu 	U32 Reserved3;		/*0x0C */
314ff92b9ddSSuganath Prabu } MPI2_FLASH_REGION, *PTR_MPI2_FLASH_REGION,
315ff92b9ddSSuganath Prabu 	Mpi2FlashRegion_t, *pMpi2FlashRegion_t;
316ff92b9ddSSuganath Prabu 
317ff92b9ddSSuganath Prabu typedef struct _MPI2_FLASH_LAYOUT {
318ff92b9ddSSuganath Prabu 	U32 FlashSize;		/*0x00 */
319ff92b9ddSSuganath Prabu 	U32 Reserved1;		/*0x04 */
320ff92b9ddSSuganath Prabu 	U32 Reserved2;		/*0x08 */
321ff92b9ddSSuganath Prabu 	U32 Reserved3;		/*0x0C */
322ff92b9ddSSuganath Prabu 	MPI2_FLASH_REGION Region[MPI2_FLASH_NUMBER_OF_REGIONS];	/*0x10 */
323ff92b9ddSSuganath Prabu } MPI2_FLASH_LAYOUT, *PTR_MPI2_FLASH_LAYOUT,
324ff92b9ddSSuganath Prabu 	Mpi2FlashLayout_t, *pMpi2FlashLayout_t;
325ff92b9ddSSuganath Prabu 
326ff92b9ddSSuganath Prabu typedef struct _MPI2_FLASH_LAYOUT_DATA {
327ff92b9ddSSuganath Prabu 	U8 ImageRevision;	/*0x00 */
328ff92b9ddSSuganath Prabu 	U8 Reserved1;		/*0x01 */
329ff92b9ddSSuganath Prabu 	U8 SizeOfRegion;	/*0x02 */
330ff92b9ddSSuganath Prabu 	U8 Reserved2;		/*0x03 */
331ff92b9ddSSuganath Prabu 	U16 NumberOfLayouts;	/*0x04 */
332ff92b9ddSSuganath Prabu 	U16 RegionsPerLayout;	/*0x06 */
333ff92b9ddSSuganath Prabu 	U16 MinimumSectorAlignment;	/*0x08 */
334ff92b9ddSSuganath Prabu 	U16 Reserved3;		/*0x0A */
335ff92b9ddSSuganath Prabu 	U32 Reserved4;		/*0x0C */
336ff92b9ddSSuganath Prabu 	MPI2_FLASH_LAYOUT Layout[MPI2_FLASH_NUMBER_OF_LAYOUTS];	/*0x10 */
337ff92b9ddSSuganath Prabu } MPI2_FLASH_LAYOUT_DATA, *PTR_MPI2_FLASH_LAYOUT_DATA,
338ff92b9ddSSuganath Prabu 	Mpi2FlashLayoutData_t, *pMpi2FlashLayoutData_t;
339ff92b9ddSSuganath Prabu 
340ff92b9ddSSuganath Prabu /*defines for the RegionType field */
341ff92b9ddSSuganath Prabu #define MPI2_FLASH_REGION_UNUSED                (0x00)
342ff92b9ddSSuganath Prabu #define MPI2_FLASH_REGION_FIRMWARE              (0x01)
343ff92b9ddSSuganath Prabu #define MPI2_FLASH_REGION_BIOS                  (0x02)
344ff92b9ddSSuganath Prabu #define MPI2_FLASH_REGION_NVDATA                (0x03)
345ff92b9ddSSuganath Prabu #define MPI2_FLASH_REGION_FIRMWARE_BACKUP       (0x05)
346ff92b9ddSSuganath Prabu #define MPI2_FLASH_REGION_MFG_INFORMATION       (0x06)
347ff92b9ddSSuganath Prabu #define MPI2_FLASH_REGION_CONFIG_1              (0x07)
348ff92b9ddSSuganath Prabu #define MPI2_FLASH_REGION_CONFIG_2              (0x08)
349ff92b9ddSSuganath Prabu #define MPI2_FLASH_REGION_MEGARAID              (0x09)
350ff92b9ddSSuganath Prabu #define MPI2_FLASH_REGION_COMMON_BOOT_BLOCK     (0x0A)
351ff92b9ddSSuganath Prabu #define MPI2_FLASH_REGION_INIT (MPI2_FLASH_REGION_COMMON_BOOT_BLOCK)
352ff92b9ddSSuganath Prabu #define MPI2_FLASH_REGION_CBB_BACKUP            (0x0D)
353ff92b9ddSSuganath Prabu #define MPI2_FLASH_REGION_SBR                   (0x0E)
354ff92b9ddSSuganath Prabu #define MPI2_FLASH_REGION_SBR_BACKUP            (0x0F)
355ff92b9ddSSuganath Prabu #define MPI2_FLASH_REGION_HIIM                  (0x10)
356ff92b9ddSSuganath Prabu #define MPI2_FLASH_REGION_HIIA                  (0x11)
357ff92b9ddSSuganath Prabu #define MPI2_FLASH_REGION_CTLR                  (0x12)
358ff92b9ddSSuganath Prabu #define MPI2_FLASH_REGION_IMR_FIRMWARE          (0x13)
359ff92b9ddSSuganath Prabu #define MPI2_FLASH_REGION_MR_NVDATA             (0x14)
360ff92b9ddSSuganath Prabu #define MPI2_FLASH_REGION_CPLD                  (0x15)
361ff92b9ddSSuganath Prabu #define MPI2_FLASH_REGION_PSOC                  (0x16)
362ff92b9ddSSuganath Prabu 
363ff92b9ddSSuganath Prabu /*ImageRevision */
364ff92b9ddSSuganath Prabu #define MPI2_FLASH_LAYOUT_IMAGE_REVISION        (0x00)
365ff92b9ddSSuganath Prabu 
366ff92b9ddSSuganath Prabu /*Supported Devices Extended Image Data */
367ff92b9ddSSuganath Prabu 
368ff92b9ddSSuganath Prabu /*
369ff92b9ddSSuganath Prabu  *Host code (drivers, BIOS, utilities, etc.) should leave this define set to
370ff92b9ddSSuganath Prabu  *one and check NumberOfDevices at runtime.
371ff92b9ddSSuganath Prabu  */
372ff92b9ddSSuganath Prabu #ifndef MPI2_SUPPORTED_DEVICES_IMAGE_NUM_DEVICES
373ff92b9ddSSuganath Prabu #define MPI2_SUPPORTED_DEVICES_IMAGE_NUM_DEVICES    (1)
374ff92b9ddSSuganath Prabu #endif
375ff92b9ddSSuganath Prabu 
376ff92b9ddSSuganath Prabu typedef struct _MPI2_SUPPORTED_DEVICE {
377ff92b9ddSSuganath Prabu 	U16 DeviceID;		/*0x00 */
378ff92b9ddSSuganath Prabu 	U16 VendorID;		/*0x02 */
379ff92b9ddSSuganath Prabu 	U16 DeviceIDMask;	/*0x04 */
380ff92b9ddSSuganath Prabu 	U16 Reserved1;		/*0x06 */
381ff92b9ddSSuganath Prabu 	U8 LowPCIRev;		/*0x08 */
382ff92b9ddSSuganath Prabu 	U8 HighPCIRev;		/*0x09 */
383ff92b9ddSSuganath Prabu 	U16 Reserved2;		/*0x0A */
384ff92b9ddSSuganath Prabu 	U32 Reserved3;		/*0x0C */
385ff92b9ddSSuganath Prabu } MPI2_SUPPORTED_DEVICE, *PTR_MPI2_SUPPORTED_DEVICE,
386ff92b9ddSSuganath Prabu 	Mpi2SupportedDevice_t, *pMpi2SupportedDevice_t;
387ff92b9ddSSuganath Prabu 
388ff92b9ddSSuganath Prabu typedef struct _MPI2_SUPPORTED_DEVICES_DATA {
389ff92b9ddSSuganath Prabu 	U8 ImageRevision;	/*0x00 */
390ff92b9ddSSuganath Prabu 	U8 Reserved1;		/*0x01 */
391ff92b9ddSSuganath Prabu 	U8 NumberOfDevices;	/*0x02 */
392ff92b9ddSSuganath Prabu 	U8 Reserved2;		/*0x03 */
393ff92b9ddSSuganath Prabu 	U32 Reserved3;		/*0x04 */
394ff92b9ddSSuganath Prabu 	MPI2_SUPPORTED_DEVICE
395ff92b9ddSSuganath Prabu 	SupportedDevice[MPI2_SUPPORTED_DEVICES_IMAGE_NUM_DEVICES];/*0x08 */
396ff92b9ddSSuganath Prabu } MPI2_SUPPORTED_DEVICES_DATA, *PTR_MPI2_SUPPORTED_DEVICES_DATA,
397ff92b9ddSSuganath Prabu 	Mpi2SupportedDevicesData_t, *pMpi2SupportedDevicesData_t;
398ff92b9ddSSuganath Prabu 
399ff92b9ddSSuganath Prabu /*ImageRevision */
400ff92b9ddSSuganath Prabu #define MPI2_SUPPORTED_DEVICES_IMAGE_REVISION   (0x00)
401ff92b9ddSSuganath Prabu 
402ff92b9ddSSuganath Prabu /*Init Extended Image Data */
403ff92b9ddSSuganath Prabu 
404ff92b9ddSSuganath Prabu typedef struct _MPI2_INIT_IMAGE_FOOTER {
405ff92b9ddSSuganath Prabu 	U32 BootFlags;		/*0x00 */
406ff92b9ddSSuganath Prabu 	U32 ImageSize;		/*0x04 */
407ff92b9ddSSuganath Prabu 	U32 Signature0;		/*0x08 */
408ff92b9ddSSuganath Prabu 	U32 Signature1;		/*0x0C */
409ff92b9ddSSuganath Prabu 	U32 Signature2;		/*0x10 */
410ff92b9ddSSuganath Prabu 	U32 ResetVector;	/*0x14 */
411ff92b9ddSSuganath Prabu } MPI2_INIT_IMAGE_FOOTER, *PTR_MPI2_INIT_IMAGE_FOOTER,
412ff92b9ddSSuganath Prabu 	Mpi2InitImageFooter_t, *pMpi2InitImageFooter_t;
413ff92b9ddSSuganath Prabu 
414ff92b9ddSSuganath Prabu /*defines for the BootFlags field */
415ff92b9ddSSuganath Prabu #define MPI2_INIT_IMAGE_BOOTFLAGS_OFFSET        (0x00)
416ff92b9ddSSuganath Prabu 
417ff92b9ddSSuganath Prabu /*defines for the ImageSize field */
418ff92b9ddSSuganath Prabu #define MPI2_INIT_IMAGE_IMAGESIZE_OFFSET        (0x04)
419ff92b9ddSSuganath Prabu 
420ff92b9ddSSuganath Prabu /*defines for the Signature0 field */
421ff92b9ddSSuganath Prabu #define MPI2_INIT_IMAGE_SIGNATURE0_OFFSET       (0x08)
422ff92b9ddSSuganath Prabu #define MPI2_INIT_IMAGE_SIGNATURE0              (0x5AA55AEA)
423ff92b9ddSSuganath Prabu 
424ff92b9ddSSuganath Prabu /*defines for the Signature1 field */
425ff92b9ddSSuganath Prabu #define MPI2_INIT_IMAGE_SIGNATURE1_OFFSET       (0x0C)
426ff92b9ddSSuganath Prabu #define MPI2_INIT_IMAGE_SIGNATURE1              (0xA55AEAA5)
427ff92b9ddSSuganath Prabu 
428ff92b9ddSSuganath Prabu /*defines for the Signature2 field */
429ff92b9ddSSuganath Prabu #define MPI2_INIT_IMAGE_SIGNATURE2_OFFSET       (0x10)
430ff92b9ddSSuganath Prabu #define MPI2_INIT_IMAGE_SIGNATURE2              (0x5AEAA55A)
431ff92b9ddSSuganath Prabu 
432ff92b9ddSSuganath Prabu /*Signature fields as individual bytes */
433ff92b9ddSSuganath Prabu #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_0        (0xEA)
434ff92b9ddSSuganath Prabu #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_1        (0x5A)
435ff92b9ddSSuganath Prabu #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_2        (0xA5)
436ff92b9ddSSuganath Prabu #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_3        (0x5A)
437ff92b9ddSSuganath Prabu 
438ff92b9ddSSuganath Prabu #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_4        (0xA5)
439ff92b9ddSSuganath Prabu #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_5        (0xEA)
440ff92b9ddSSuganath Prabu #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_6        (0x5A)
441ff92b9ddSSuganath Prabu #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_7        (0xA5)
442ff92b9ddSSuganath Prabu 
443ff92b9ddSSuganath Prabu #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_8        (0x5A)
444ff92b9ddSSuganath Prabu #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_9        (0xA5)
445ff92b9ddSSuganath Prabu #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_A        (0xEA)
446ff92b9ddSSuganath Prabu #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_B        (0x5A)
447ff92b9ddSSuganath Prabu 
448ff92b9ddSSuganath Prabu /*defines for the ResetVector field */
449ff92b9ddSSuganath Prabu #define MPI2_INIT_IMAGE_RESETVECTOR_OFFSET      (0x14)
450ff92b9ddSSuganath Prabu 
451ff92b9ddSSuganath Prabu 
452ff92b9ddSSuganath Prabu /* Encrypted Hash Extended Image Data */
453ff92b9ddSSuganath Prabu 
454ff92b9ddSSuganath Prabu typedef struct _MPI25_ENCRYPTED_HASH_ENTRY {
455ff92b9ddSSuganath Prabu 	U8		HashImageType;		/*0x00 */
456ff92b9ddSSuganath Prabu 	U8		HashAlgorithm;		/*0x01 */
457ff92b9ddSSuganath Prabu 	U8		EncryptionAlgorithm;	/*0x02 */
458ff92b9ddSSuganath Prabu 	U8		Reserved1;		/*0x03 */
459ff92b9ddSSuganath Prabu 	U32		Reserved2;		/*0x04 */
460ff92b9ddSSuganath Prabu 	U32		EncryptedHash[1];	/*0x08 */ /* variable length */
461ff92b9ddSSuganath Prabu } MPI25_ENCRYPTED_HASH_ENTRY, *PTR_MPI25_ENCRYPTED_HASH_ENTRY,
462ff92b9ddSSuganath Prabu Mpi25EncryptedHashEntry_t, *pMpi25EncryptedHashEntry_t;
463ff92b9ddSSuganath Prabu 
464ff92b9ddSSuganath Prabu /* values for HashImageType */
465ff92b9ddSSuganath Prabu #define MPI25_HASH_IMAGE_TYPE_UNUSED            (0x00)
466ff92b9ddSSuganath Prabu #define MPI25_HASH_IMAGE_TYPE_FIRMWARE          (0x01)
467ff92b9ddSSuganath Prabu #define MPI25_HASH_IMAGE_TYPE_BIOS              (0x02)
468ff92b9ddSSuganath Prabu 
469ff92b9ddSSuganath Prabu #define MPI26_HASH_IMAGE_TYPE_UNUSED            (0x00)
470ff92b9ddSSuganath Prabu #define MPI26_HASH_IMAGE_TYPE_FIRMWARE          (0x01)
471ff92b9ddSSuganath Prabu #define MPI26_HASH_IMAGE_TYPE_BIOS              (0x02)
472ff92b9ddSSuganath Prabu #define MPI26_HASH_IMAGE_TYPE_KEY_HASH          (0x03)
473ff92b9ddSSuganath Prabu 
474ff92b9ddSSuganath Prabu /* values for HashAlgorithm */
475ff92b9ddSSuganath Prabu #define MPI25_HASH_ALGORITHM_UNUSED             (0x00)
476ff92b9ddSSuganath Prabu #define MPI25_HASH_ALGORITHM_SHA256             (0x01)
477ff92b9ddSSuganath Prabu 
478*635ee6c7SSuganath Prabu #define MPI26_HASH_ALGORITHM_VER_MASK		(0xE0)
479*635ee6c7SSuganath Prabu #define MPI26_HASH_ALGORITHM_VER_NONE		(0x00)
480*635ee6c7SSuganath Prabu #define MPI26_HASH_ALGORITHM_VER_SHA1		(0x20)
481*635ee6c7SSuganath Prabu #define MPI26_HASH_ALGORITHM_VER_SHA2		(0x40)
482*635ee6c7SSuganath Prabu #define MPI26_HASH_ALGORITHM_VER_SHA3		(0x60)
483ff92b9ddSSuganath Prabu #define MPI26_HASH_ALGORITHM_SIZE_MASK		(0x1F)
484ff92b9ddSSuganath Prabu #define MPI26_HASH_ALGORITHM_SIZE_256           (0x01)
485ff92b9ddSSuganath Prabu #define MPI26_HASH_ALGORITHM_SIZE_512           (0x02)
486ff92b9ddSSuganath Prabu 
487ff92b9ddSSuganath Prabu 
488ff92b9ddSSuganath Prabu /* values for EncryptionAlgorithm */
489ff92b9ddSSuganath Prabu #define MPI25_ENCRYPTION_ALG_UNUSED             (0x00)
490ff92b9ddSSuganath Prabu #define MPI25_ENCRYPTION_ALG_RSA256             (0x01)
491ff92b9ddSSuganath Prabu 
492ff92b9ddSSuganath Prabu #define MPI26_ENCRYPTION_ALG_UNUSED             (0x00)
493ff92b9ddSSuganath Prabu #define MPI26_ENCRYPTION_ALG_RSA256             (0x01)
494ff92b9ddSSuganath Prabu #define MPI26_ENCRYPTION_ALG_RSA512             (0x02)
495ff92b9ddSSuganath Prabu #define MPI26_ENCRYPTION_ALG_RSA1024            (0x03)
496ff92b9ddSSuganath Prabu #define MPI26_ENCRYPTION_ALG_RSA2048            (0x04)
497ff92b9ddSSuganath Prabu #define MPI26_ENCRYPTION_ALG_RSA4096            (0x05)
498ff92b9ddSSuganath Prabu 
499ff92b9ddSSuganath Prabu typedef struct _MPI25_ENCRYPTED_HASH_DATA {
500ff92b9ddSSuganath Prabu 	U8				ImageVersion;		/*0x00 */
501ff92b9ddSSuganath Prabu 	U8				NumHash;		/*0x01 */
502ff92b9ddSSuganath Prabu 	U16				Reserved1;		/*0x02 */
503ff92b9ddSSuganath Prabu 	U32				Reserved2;		/*0x04 */
504ff92b9ddSSuganath Prabu 	MPI25_ENCRYPTED_HASH_ENTRY	EncryptedHashEntry[1];  /*0x08 */
505ff92b9ddSSuganath Prabu } MPI25_ENCRYPTED_HASH_DATA, *PTR_MPI25_ENCRYPTED_HASH_DATA,
506ff92b9ddSSuganath Prabu Mpi25EncryptedHashData_t, *pMpi25EncryptedHashData_t;
507ff92b9ddSSuganath Prabu 
508ff92b9ddSSuganath Prabu 
509ff92b9ddSSuganath Prabu #endif /* MPI2_IMAGE_H */
510