1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * Copyright 2018-2026 Broadcom Inc. All rights reserved. 4 */ 5 #ifndef MPI30_IMAGE_H 6 #define MPI30_IMAGE_H 1 7 struct mpi3_comp_image_version { 8 __le16 build_num; 9 __le16 customer_id; 10 u8 phase_minor; 11 u8 phase_major; 12 u8 gen_minor; 13 u8 gen_major; 14 }; 15 16 struct mpi3_hash_exclusion_format { 17 __le32 offset; 18 __le32 size; 19 }; 20 21 #define MPI3_IMAGE_HASH_EXCUSION_NUM (4) 22 struct mpi3_component_image_header { 23 __le32 signature0; 24 __le32 load_address; 25 __le32 data_size; 26 __le32 start_offset; 27 __le32 signature1; 28 __le32 flash_offset; 29 __le32 image_size; 30 __le32 version_string_offset; 31 __le32 build_date_string_offset; 32 __le32 build_time_string_offset; 33 __le32 environment_variable_offset; 34 __le32 application_specific; 35 __le32 signature2; 36 __le32 header_size; 37 __le32 crc; 38 __le32 flags; 39 __le32 secondary_flash_offset; 40 __le32 etp_offset; 41 __le32 etp_size; 42 union mpi3_version_union rmc_interface_version; 43 union mpi3_version_union etp_interface_version; 44 struct mpi3_comp_image_version component_image_version; 45 struct mpi3_hash_exclusion_format hash_exclusion[MPI3_IMAGE_HASH_EXCUSION_NUM]; 46 __le32 next_image_header_offset; 47 union mpi3_version_union security_version; 48 __le32 reserved84[31]; 49 }; 50 51 #define MPI3_IMAGE_HEADER_SIGNATURE0_MPI3 (0xeb00003e) 52 #define MPI3_IMAGE_HEADER_LOAD_ADDRESS_INVALID (0x00000000) 53 #define MPI3_IMAGE_HEADER_SIGNATURE1_APPLICATION (0x20505041) 54 #define MPI3_IMAGE_HEADER_SIGNATURE1_FIRST_MUTABLE (0x20434d46) 55 #define MPI3_IMAGE_HEADER_SIGNATURE1_BSP (0x20505342) 56 #define MPI3_IMAGE_HEADER_SIGNATURE1_ROM_BIOS (0x534f4942) 57 #define MPI3_IMAGE_HEADER_SIGNATURE1_HII_X64 (0x4d494948) 58 #define MPI3_IMAGE_HEADER_SIGNATURE1_HII_ARM (0x41494948) 59 #define MPI3_IMAGE_HEADER_SIGNATURE1_CPLD (0x444c5043) 60 #define MPI3_IMAGE_HEADER_SIGNATURE1_SPD (0x20445053) 61 #define MPI3_IMAGE_HEADER_SIGNATURE1_GAS_GAUGE (0x20534147) 62 #define MPI3_IMAGE_HEADER_SIGNATURE1_PBLP (0x504c4250) 63 #define MPI3_IMAGE_HEADER_SIGNATURE1_MANIFEST (0x464e414d) 64 #define MPI3_IMAGE_HEADER_SIGNATURE1_OEM (0x204d454f) 65 #define MPI3_IMAGE_HEADER_SIGNATURE1_RMC (0x20434d52) 66 #define MPI3_IMAGE_HEADER_SIGNATURE1_SMM (0x204d4d53) 67 #define MPI3_IMAGE_HEADER_SIGNATURE1_PSW (0x20575350) 68 #define MPI3_IMAGE_HEADER_SIGNATURE2_VALUE (0x50584546) 69 #define MPI3_IMAGE_HEADER_FLAGS_SIGNED_UEFI_MASK (0x00000300) 70 #define MPI3_IMAGE_HEADER_FLAGS_SIGNED_UEFI_SHIFT (8) 71 #define MPI3_IMAGE_HEADER_FLAGS_CERT_CHAIN_FORMAT_MASK (0x000000c0) 72 #define MPI3_IMAGE_HEADER_FLAGS_CERT_CHAIN_FORMAT_SHIFT (6) 73 #define MPI3_IMAGE_HEADER_FLAGS_DEVICE_KEY_BASIS_MASK (0x00000030) 74 #define MPI3_IMAGE_HEADER_FLAGS_DEVICE_KEY_BASIS_SHIFT (4) 75 #define MPI3_IMAGE_HEADER_FLAGS_DEVICE_KEY_BASIS_CDI (0x00000000) 76 #define MPI3_IMAGE_HEADER_FLAGS_DEVICE_KEY_BASIS_DI (0x00000010) 77 #define MPI3_IMAGE_HEADER_FLAGS_SIGNED_NVDATA (0x00000008) 78 #define MPI3_IMAGE_HEADER_FLAGS_REQUIRES_ACTIVATION (0x00000004) 79 #define MPI3_IMAGE_HEADER_FLAGS_COMPRESSED (0x00000002) 80 #define MPI3_IMAGE_HEADER_FLAGS_FLASH (0x00000001) 81 #define MPI3_IMAGE_HEADER_SIGNATURE0_OFFSET (0x00) 82 #define MPI3_IMAGE_HEADER_LOAD_ADDRESS_OFFSET (0x04) 83 #define MPI3_IMAGE_HEADER_DATA_SIZE_OFFSET (0x08) 84 #define MPI3_IMAGE_HEADER_START_OFFSET_OFFSET (0x0c) 85 #define MPI3_IMAGE_HEADER_SIGNATURE1_OFFSET (0x10) 86 #define MPI3_IMAGE_HEADER_FLASH_OFFSET_OFFSET (0x14) 87 #define MPI3_IMAGE_HEADER_FLASH_SIZE_OFFSET (0x18) 88 #define MPI3_IMAGE_HEADER_VERSION_STRING_OFFSET_OFFSET (0x1c) 89 #define MPI3_IMAGE_HEADER_BUILD_DATE_STRING_OFFSET_OFFSET (0x20) 90 #define MPI3_IMAGE_HEADER_BUILD_TIME_OFFSET_OFFSET (0x24) 91 #define MPI3_IMAGE_HEADER_ENVIROMENT_VAR_OFFSET_OFFSET (0x28) 92 #define MPI3_IMAGE_HEADER_APPLICATION_SPECIFIC_OFFSET (0x2c) 93 #define MPI3_IMAGE_HEADER_SIGNATURE2_OFFSET (0x30) 94 #define MPI3_IMAGE_HEADER_HEADER_SIZE_OFFSET (0x34) 95 #define MPI3_IMAGE_HEADER_CRC_OFFSET (0x38) 96 #define MPI3_IMAGE_HEADER_FLAGS_OFFSET (0x3c) 97 #define MPI3_IMAGE_HEADER_SECONDARY_FLASH_OFFSET_OFFSET (0x40) 98 #define MPI3_IMAGE_HEADER_ETP_OFFSET_OFFSET (0x44) 99 #define MPI3_IMAGE_HEADER_ETP_SIZE_OFFSET (0x48) 100 #define MPI3_IMAGE_HEADER_RMC_INTERFACE_VER_OFFSET (0x4c) 101 #define MPI3_IMAGE_HEADER_ETP_INTERFACE_VER_OFFSET (0x50) 102 #define MPI3_IMAGE_HEADER_COMPONENT_IMAGE_VER_OFFSET (0x54) 103 #define MPI3_IMAGE_HEADER_HASH_EXCLUSION_OFFSET (0x5c) 104 #define MPI3_IMAGE_HEADER_NEXT_IMAGE_HEADER_OFFSET_OFFSET (0x7c) 105 #define MPI3_IMAGE_HEADER_SIZE (0x100) 106 #ifndef MPI3_CI_MANIFEST_MPI_MAX 107 #define MPI3_CI_MANIFEST_MPI_MAX (1) 108 #endif 109 struct mpi3_ci_manifest_mpi_comp_image_ref { 110 __le32 signature1; 111 __le32 reserved04[3]; 112 struct mpi3_comp_image_version component_image_version; 113 __le32 component_image_version_string_offset; 114 __le32 crc; 115 }; 116 117 struct mpi3_ci_manifest_mpi { 118 u8 manifest_type; 119 u8 reserved01[3]; 120 __le32 reserved04[3]; 121 u8 num_image_references; 122 u8 release_level; 123 __le16 reserved12; 124 __le16 reserved14; 125 __le16 flags; 126 __le32 reserved18[2]; 127 __le16 vendor_id; 128 __le16 device_id; 129 __le16 subsystem_vendor_id; 130 __le16 subsystem_id; 131 __le32 reserved28[2]; 132 union mpi3_version_union package_security_version; 133 __le32 reserved34; 134 struct mpi3_comp_image_version package_version; 135 __le32 package_version_string_offset; 136 __le32 package_build_date_string_offset; 137 __le32 package_build_time_string_offset; 138 __le32 diag_authorization_key_offset; 139 __le32 diag_authorization_identifier[16]; 140 struct mpi3_ci_manifest_mpi_comp_image_ref component_image_ref[MPI3_CI_MANIFEST_MPI_MAX]; 141 }; 142 143 #define MPI3_CI_MANIFEST_MPI_RELEASE_LEVEL_DEV (0x00) 144 #define MPI3_CI_MANIFEST_MPI_RELEASE_LEVEL_PREALPHA (0x10) 145 #define MPI3_CI_MANIFEST_MPI_RELEASE_LEVEL_ALPHA (0x20) 146 #define MPI3_CI_MANIFEST_MPI_RELEASE_LEVEL_BETA (0x30) 147 #define MPI3_CI_MANIFEST_MPI_RELEASE_LEVEL_RC (0x40) 148 #define MPI3_CI_MANIFEST_MPI_RELEASE_LEVEL_GCA (0x50) 149 #define MPI3_CI_MANIFEST_MPI_RELEASE_LEVEL_POINT (0x60) 150 #define MPI3_CI_MANIFEST_MPI_FLAGS_DIAG_AUTHORIZATION (0x01) 151 #define MPI3_CI_MANIFEST_MPI_FLAGS_DIAG_AUTH_ANCHOR_MASK (0x06) 152 #define MPI3_CI_MANIFEST_MPI_FLAGS_DIAG_AUTH_ANCHOR_SHIFT (1) 153 #define MPI3_CI_MANIFEST_MPI_FLAGS_DIAG_AUTH_ANCHOR_IDENTIFIER (0x00) 154 #define MPI3_CI_MANIFEST_MPI_FLAGS_DIAG_AUTH_ANCHOR_KEY_OFFSET (0x02) 155 #define MPI3_CI_MANIFEST_MPI_SUBSYSTEMID_IGNORED (0xffff) 156 #define MPI3_CI_MANIFEST_MPI_PKG_VER_STR_OFF_UNSPECIFIED (0x00000000) 157 #define MPI3_CI_MANIFEST_MPI_PKG_BUILD_DATE_STR_OFF_UNSPECIFIED (0x00000000) 158 #define MPI3_CI_MANIFEST_MPI_PKG_BUILD_TIME_STR_OFF_UNSPECIFIED (0x00000000) 159 160 struct mpi3_sb_manifest_ci_digest { 161 __le32 signature1; 162 __le32 reserved04[2]; 163 u8 hash_algorithm; 164 u8 reserved09[3]; 165 struct mpi3_comp_image_version component_image_version; 166 __le32 component_image_version_string_offset; 167 __le32 digest[16]; 168 }; 169 170 struct mpi3_sb_manifest_ci_ref_element { 171 u8 num_ci_digests; 172 u8 reserved01[3]; 173 struct mpi3_sb_manifest_ci_digest ci_digest[]; 174 }; 175 176 struct mpi3_sb_manifest_embedded_key_element { 177 __le32 reserved00[3]; 178 u8 key_algorithm; 179 u8 flags; 180 __le16 public_key_size; 181 __le32 start_tag; 182 __le32 public_key[]; 183 }; 184 185 #define MPI3_SB_MANIFEST_EMBEDDED_KEY_FLAGS_KEYINDEX_MASK (0x03) 186 #define MPI3_SB_MANIFEST_EMBEDDED_KEY_FLAGS_KEYINDEX_STRT (0x00) 187 #define MPI3_SB_MANIFEST_EMBEDDED_KEY_FLAGS_KEYINDEX_K2GO (0x01) 188 #define MPI3_SB_MANIFEST_EMBEDDED_KEY_STARTTAG_STRT (0x54525453) 189 #define MPI3_SB_MANIFEST_EMBEDDED_KEY_STARTTAG_K2GO (0x4f47324b) 190 #define MPI3_SB_MANIFEST_EMBEDDED_KEY_ENDTAG_STOP (0x504f5453) 191 #define MPI3_SB_MANIFEST_EMBEDDED_KEY_ENDTAG_K2ST (0x5453324b) 192 193 struct mpi3_sb_manifest_diag_key_element { 194 __le32 reserved00[3]; 195 u8 key_algorithm; 196 u8 flags; 197 __le16 public_key_size; 198 __le32 public_key[]; 199 }; 200 201 #define MPI3_SB_MANIFEST_DIAG_KEY_FLAGS_KEYINDEX_MASK (0x03) 202 #define MPI3_SB_MANIFEST_DIAG_KEY_FLAGS_KEYSELECT_FW_KEY (0x04) 203 union mpi3_sb_manifest_element_data { 204 struct mpi3_sb_manifest_ci_ref_element ci_ref; 205 struct mpi3_sb_manifest_embedded_key_element embed_key; 206 struct mpi3_sb_manifest_diag_key_element diag_key; 207 __le32 dword; 208 }; 209 struct mpi3_sb_manifest_element { 210 u8 manifest_element_form; 211 u8 reserved01[3]; 212 union mpi3_sb_manifest_element_data form_specific[]; 213 }; 214 #define MPI3_SB_MANIFEST_ELEMENT_FORM_CI_REFS (0x01) 215 #define MPI3_SB_MANIFEST_ELEMENT_FORM_EMBED_KEY (0x02) 216 #define MPI3_SB_MANIFEST_ELEMENT_FORM_DIAG_KEY (0x03) 217 struct mpi3_sb_manifest_mpi { 218 u8 manifest_type; 219 u8 reserved01[3]; 220 __le32 reserved04[3]; 221 u8 reserved10; 222 u8 release_level; 223 __le16 reserved12; 224 __le16 reserved14; 225 __le16 flags; 226 __le32 reserved18[2]; 227 __le16 vendor_id; 228 __le16 device_id; 229 __le16 subsystem_vendor_id; 230 __le16 subsystem_id; 231 __le32 reserved28[2]; 232 union mpi3_version_union package_security_version; 233 __le32 reserved34; 234 struct mpi3_comp_image_version package_version; 235 __le32 package_version_string_offset; 236 __le32 package_build_date_string_offset; 237 __le32 package_build_time_string_offset; 238 __le32 component_image_references_offset; 239 __le32 embedded_key0offset; 240 __le32 embedded_key1offset; 241 __le32 diag_authorization_key_offset; 242 __le32 reserved5c[9]; 243 struct mpi3_sb_manifest_element manifest_elements[]; 244 }; 245 246 union mpi3_ci_manifest { 247 struct mpi3_ci_manifest_mpi mpi; 248 struct mpi3_sb_manifest_mpi sb_mpi; 249 __le32 dword[1]; 250 }; 251 252 #define MPI3_SB_MANIFEST_APU_IMMEDIATE_DEFER_APU_ENABLE (0x01) 253 254 #define MPI3_CI_MANIFEST_TYPE_MPI (0x00) 255 #define MPI3_CI_MANIFEST_TYPE_SB (0x01) 256 257 struct mpi3_extended_image_header { 258 u8 image_type; 259 u8 reserved01[3]; 260 __le32 checksum; 261 __le32 image_size; 262 __le32 next_image_header_offset; 263 __le32 reserved10[4]; 264 __le32 identify_string[8]; 265 }; 266 267 #define MPI3_EXT_IMAGE_IMAGETYPE_OFFSET (0x00) 268 #define MPI3_EXT_IMAGE_IMAGESIZE_OFFSET (0x08) 269 #define MPI3_EXT_IMAGE_NEXTIMAGE_OFFSET (0x0c) 270 #define MPI3_EXT_IMAGE_HEADER_SIZE (0x40) 271 #define MPI3_EXT_IMAGE_TYPE_UNSPECIFIED (0x00) 272 #define MPI3_EXT_IMAGE_TYPE_NVDATA (0x03) 273 #define MPI3_EXT_IMAGE_TYPE_SUPPORTED_DEVICES (0x07) 274 #define MPI3_EXT_IMAGE_TYPE_ENCRYPTED_HASH (0x09) 275 #define MPI3_EXT_IMAGE_TYPE_RDE (0x0a) 276 #define MPI3_EXT_IMAGE_TYPE_AUXILIARY_PROCESSOR (0x0b) 277 #define MPI3_EXT_IMAGE_TYPE_MIN_PRODUCT_SPECIFIC (0x80) 278 #define MPI3_EXT_IMAGE_TYPE_MAX_PRODUCT_SPECIFIC (0xff) 279 struct mpi3_supported_device { 280 __le16 device_id; 281 __le16 vendor_id; 282 __le16 device_id_mask; 283 __le16 reserved06; 284 u8 low_pci_rev; 285 u8 high_pci_rev; 286 __le16 reserved0a; 287 __le32 reserved0c; 288 }; 289 290 #ifndef MPI3_SUPPORTED_DEVICE_MAX 291 #define MPI3_SUPPORTED_DEVICE_MAX (1) 292 #endif 293 struct mpi3_supported_devices_data { 294 u8 image_version; 295 u8 reserved01; 296 u8 num_devices; 297 u8 reserved03; 298 __le32 reserved04; 299 struct mpi3_supported_device supported_device[MPI3_SUPPORTED_DEVICE_MAX]; 300 }; 301 302 #ifndef MPI3_PUBLIC_KEY_MAX 303 #define MPI3_PUBLIC_KEY_MAX (1) 304 #endif 305 struct mpi3_encrypted_hash_entry { 306 u8 hash_image_type; 307 u8 hash_algorithm; 308 u8 encryption_algorithm; 309 u8 flags; 310 __le16 public_key_size; 311 __le16 signature_size; 312 __le32 public_key[MPI3_PUBLIC_KEY_MAX]; 313 }; 314 #define MPI3_HASH_IMAGE_TYPE_KEY_WITH_HASH (0x03) 315 #define MPI3_HASH_IMAGE_TYPE_KEY_WITH_HASH_1_OF_2 (0x04) 316 #define MPI3_HASH_IMAGE_TYPE_KEY_WITH_HASH_2_OF_2 (0x05) 317 #define MPI3_HASH_ALGORITHM_VERSION_MASK (0xe0) 318 #define MPI3_HASH_ALGORITHM_VERSION_SHIFT (5) 319 #define MPI3_HASH_ALGORITHM_VERSION_NONE (0x00) 320 #define MPI3_HASH_ALGORITHM_VERSION_SHA1 (0x20) 321 #define MPI3_HASH_ALGORITHM_VERSION_SHA2 (0x40) 322 #define MPI3_HASH_ALGORITHM_VERSION_SHA3 (0x60) 323 #define MPI3_HASH_ALGORITHM_SIZE_MASK (0x1f) 324 #define MPI3_HASH_ALGORITHM_SIZE_SHIFT (0) 325 #define MPI3_HASH_ALGORITHM_SIZE_UNUSED (0x00) 326 #define MPI3_HASH_ALGORITHM_SIZE_SHA256 (0x01) 327 #define MPI3_HASH_ALGORITHM_SIZE_SHA512 (0x02) 328 #define MPI3_HASH_ALGORITHM_SIZE_SHA384 (0x03) 329 #define MPI3_ENCRYPTION_ALGORITHM_UNUSED (0x00) 330 #define MPI3_ENCRYPTION_ALGORITHM_RSA256 (0x01) 331 #define MPI3_ENCRYPTION_ALGORITHM_RSA512 (0x02) 332 #define MPI3_ENCRYPTION_ALGORITHM_RSA1024 (0x03) 333 #define MPI3_ENCRYPTION_ALGORITHM_RSA2048 (0x04) 334 #define MPI3_ENCRYPTION_ALGORITHM_RSA4096 (0x05) 335 #define MPI3_ENCRYPTION_ALGORITHM_RSA3072 (0x06) 336 337 /* hierarchical signature system (hss) */ 338 #define MPI3_ENCRYPTION_ALGORITHM_ML_DSA_87 (0x0b) 339 #define MPI3_ENCRYPTION_ALGORITHM_ML_DSA_65 (0x0c) 340 #define MPI3_ENCRYPTION_ALGORITHM_ML_DSA_44 (0x0d) 341 #define MPI3_ENCRYPTED_HASH_ENTRY_FLAGS_PAIRED_KEY_MASK (0x0f) 342 #define MPI3_ENCRYPTED_HASH_ENTRY_FLAGS_PAIRED_KEY_SHIFT (0) 343 344 #ifndef MPI3_ENCRYPTED_HASH_ENTRY_MAX 345 #define MPI3_ENCRYPTED_HASH_ENTRY_MAX (1) 346 #endif 347 struct mpi3_encrypted_hash_data { 348 u8 image_version; 349 u8 num_hash; 350 __le16 reserved02; 351 __le32 reserved04; 352 struct mpi3_encrypted_hash_entry encrypted_hash_entry[MPI3_ENCRYPTED_HASH_ENTRY_MAX]; 353 }; 354 355 #ifndef MPI3_AUX_PROC_DATA_MAX 356 #define MPI3_AUX_PROC_DATA_MAX (1) 357 #endif 358 struct mpi3_aux_processor_data { 359 u8 boot_method; 360 u8 num_load_addr; 361 u8 reserved02; 362 u8 type; 363 __le32 version; 364 __le32 load_address[8]; 365 __le32 reserved28[22]; 366 __le32 aux_processor_data[MPI3_AUX_PROC_DATA_MAX]; 367 }; 368 369 #define MPI3_AUX_PROC_DATA_OFFSET (0x80) 370 #define MPI3_AUXPROCESSOR_BOOT_METHOD_MO_MSG (0x00) 371 #define MPI3_AUXPROCESSOR_BOOT_METHOD_MO_DOORBELL (0x01) 372 #define MPI3_AUXPROCESSOR_BOOT_METHOD_COMPONENT (0x02) 373 #define MPI3_AUXPROCESSOR_TYPE_ARM_A15 (0x00) 374 #define MPI3_AUXPROCESSOR_TYPE_ARM_M0 (0x01) 375 #define MPI3_AUXPROCESSOR_TYPE_ARM_R4 (0x02) 376 #endif 377