1 /******************************************************************* 2 * This file is part of the Emulex Linux Device Driver for * 3 * Fibre Channel Host Bus Adapters. * 4 * Copyright (C) 2004-2006 Emulex. All rights reserved. * 5 * EMULEX and SLI are trademarks of Emulex. * 6 * www.emulex.com * 7 * Portions Copyright (C) 2004-2005 Christoph Hellwig * 8 * * 9 * This program is free software; you can redistribute it and/or * 10 * modify it under the terms of version 2 of the GNU General * 11 * Public License as published by the Free Software Foundation. * 12 * This program is distributed in the hope that it will be useful. * 13 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND * 14 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, * 15 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE * 16 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD * 17 * TO BE LEGALLY INVALID. See the GNU General Public License for * 18 * more details, a copy of which can be found in the file COPYING * 19 * included with this package. * 20 *******************************************************************/ 21 22 #include <linux/blkdev.h> 23 #include <linux/pci.h> 24 #include <linux/interrupt.h> 25 26 #include <scsi/scsi_device.h> 27 #include <scsi/scsi_transport_fc.h> 28 29 #include <scsi/scsi.h> 30 31 #include "lpfc_hw.h" 32 #include "lpfc_sli.h" 33 #include "lpfc_disc.h" 34 #include "lpfc_scsi.h" 35 #include "lpfc.h" 36 #include "lpfc_logmsg.h" 37 #include "lpfc_crtn.h" 38 #include "lpfc_compat.h" 39 40 /**********************************************/ 41 42 /* mailbox command */ 43 /**********************************************/ 44 void 45 lpfc_dump_mem(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb, uint16_t offset) 46 { 47 MAILBOX_t *mb; 48 void *ctx; 49 50 mb = &pmb->mb; 51 ctx = pmb->context2; 52 53 /* Setup to dump VPD region */ 54 memset(pmb, 0, sizeof (LPFC_MBOXQ_t)); 55 mb->mbxCommand = MBX_DUMP_MEMORY; 56 mb->un.varDmp.cv = 1; 57 mb->un.varDmp.type = DMP_NV_PARAMS; 58 mb->un.varDmp.entry_index = offset; 59 mb->un.varDmp.region_id = DMP_REGION_VPD; 60 mb->un.varDmp.word_cnt = (DMP_RSP_SIZE / sizeof (uint32_t)); 61 mb->un.varDmp.co = 0; 62 mb->un.varDmp.resp_offset = 0; 63 pmb->context2 = ctx; 64 mb->mbxOwner = OWN_HOST; 65 return; 66 } 67 68 /**********************************************/ 69 /* lpfc_read_nv Issue a READ NVPARAM */ 70 /* mailbox command */ 71 /**********************************************/ 72 void 73 lpfc_read_nv(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb) 74 { 75 MAILBOX_t *mb; 76 77 mb = &pmb->mb; 78 memset(pmb, 0, sizeof (LPFC_MBOXQ_t)); 79 mb->mbxCommand = MBX_READ_NV; 80 mb->mbxOwner = OWN_HOST; 81 return; 82 } 83 84 /**********************************************/ 85 /* lpfc_read_la Issue a READ LA */ 86 /* mailbox command */ 87 /**********************************************/ 88 int 89 lpfc_read_la(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb, struct lpfc_dmabuf *mp) 90 { 91 MAILBOX_t *mb; 92 struct lpfc_sli *psli; 93 94 psli = &phba->sli; 95 mb = &pmb->mb; 96 memset(pmb, 0, sizeof (LPFC_MBOXQ_t)); 97 98 INIT_LIST_HEAD(&mp->list); 99 mb->mbxCommand = MBX_READ_LA64; 100 mb->un.varReadLA.un.lilpBde64.tus.f.bdeSize = 128; 101 mb->un.varReadLA.un.lilpBde64.addrHigh = putPaddrHigh(mp->phys); 102 mb->un.varReadLA.un.lilpBde64.addrLow = putPaddrLow(mp->phys); 103 104 /* Save address for later completion and set the owner to host so that 105 * the FW knows this mailbox is available for processing. 106 */ 107 pmb->context1 = (uint8_t *) mp; 108 mb->mbxOwner = OWN_HOST; 109 return (0); 110 } 111 112 /**********************************************/ 113 /* lpfc_clear_la Issue a CLEAR LA */ 114 /* mailbox command */ 115 /**********************************************/ 116 void 117 lpfc_clear_la(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb) 118 { 119 MAILBOX_t *mb; 120 121 mb = &pmb->mb; 122 memset(pmb, 0, sizeof (LPFC_MBOXQ_t)); 123 124 mb->un.varClearLA.eventTag = phba->fc_eventTag; 125 mb->mbxCommand = MBX_CLEAR_LA; 126 mb->mbxOwner = OWN_HOST; 127 return; 128 } 129 130 /**************************************************/ 131 /* lpfc_config_link Issue a CONFIG LINK */ 132 /* mailbox command */ 133 /**************************************************/ 134 void 135 lpfc_config_link(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb) 136 { 137 MAILBOX_t *mb = &pmb->mb; 138 memset(pmb, 0, sizeof (LPFC_MBOXQ_t)); 139 140 /* NEW_FEATURE 141 * SLI-2, Coalescing Response Feature. 142 */ 143 if (phba->cfg_cr_delay) { 144 mb->un.varCfgLnk.cr = 1; 145 mb->un.varCfgLnk.ci = 1; 146 mb->un.varCfgLnk.cr_delay = phba->cfg_cr_delay; 147 mb->un.varCfgLnk.cr_count = phba->cfg_cr_count; 148 } 149 150 mb->un.varCfgLnk.myId = phba->fc_myDID; 151 mb->un.varCfgLnk.edtov = phba->fc_edtov; 152 mb->un.varCfgLnk.arbtov = phba->fc_arbtov; 153 mb->un.varCfgLnk.ratov = phba->fc_ratov; 154 mb->un.varCfgLnk.rttov = phba->fc_rttov; 155 mb->un.varCfgLnk.altov = phba->fc_altov; 156 mb->un.varCfgLnk.crtov = phba->fc_crtov; 157 mb->un.varCfgLnk.citov = phba->fc_citov; 158 159 if (phba->cfg_ack0) 160 mb->un.varCfgLnk.ack0_enable = 1; 161 162 mb->mbxCommand = MBX_CONFIG_LINK; 163 mb->mbxOwner = OWN_HOST; 164 return; 165 } 166 167 /**********************************************/ 168 /* lpfc_init_link Issue an INIT LINK */ 169 /* mailbox command */ 170 /**********************************************/ 171 void 172 lpfc_init_link(struct lpfc_hba * phba, 173 LPFC_MBOXQ_t * pmb, uint32_t topology, uint32_t linkspeed) 174 { 175 lpfc_vpd_t *vpd; 176 struct lpfc_sli *psli; 177 MAILBOX_t *mb; 178 179 mb = &pmb->mb; 180 memset(pmb, 0, sizeof (LPFC_MBOXQ_t)); 181 182 psli = &phba->sli; 183 switch (topology) { 184 case FLAGS_TOPOLOGY_MODE_LOOP_PT: 185 mb->un.varInitLnk.link_flags = FLAGS_TOPOLOGY_MODE_LOOP; 186 mb->un.varInitLnk.link_flags |= FLAGS_TOPOLOGY_FAILOVER; 187 break; 188 case FLAGS_TOPOLOGY_MODE_PT_PT: 189 mb->un.varInitLnk.link_flags = FLAGS_TOPOLOGY_MODE_PT_PT; 190 break; 191 case FLAGS_TOPOLOGY_MODE_LOOP: 192 mb->un.varInitLnk.link_flags = FLAGS_TOPOLOGY_MODE_LOOP; 193 break; 194 case FLAGS_TOPOLOGY_MODE_PT_LOOP: 195 mb->un.varInitLnk.link_flags = FLAGS_TOPOLOGY_MODE_PT_PT; 196 mb->un.varInitLnk.link_flags |= FLAGS_TOPOLOGY_FAILOVER; 197 break; 198 case FLAGS_LOCAL_LB: 199 mb->un.varInitLnk.link_flags = FLAGS_LOCAL_LB; 200 break; 201 } 202 203 /* NEW_FEATURE 204 * Setting up the link speed 205 */ 206 vpd = &phba->vpd; 207 if (vpd->rev.feaLevelHigh >= 0x02){ 208 switch(linkspeed){ 209 case LINK_SPEED_1G: 210 case LINK_SPEED_2G: 211 case LINK_SPEED_4G: 212 mb->un.varInitLnk.link_flags |= 213 FLAGS_LINK_SPEED; 214 mb->un.varInitLnk.link_speed = linkspeed; 215 break; 216 case LINK_SPEED_AUTO: 217 default: 218 mb->un.varInitLnk.link_speed = 219 LINK_SPEED_AUTO; 220 break; 221 } 222 223 } 224 else 225 mb->un.varInitLnk.link_speed = LINK_SPEED_AUTO; 226 227 mb->mbxCommand = (volatile uint8_t)MBX_INIT_LINK; 228 mb->mbxOwner = OWN_HOST; 229 mb->un.varInitLnk.fabric_AL_PA = phba->fc_pref_ALPA; 230 return; 231 } 232 233 /**********************************************/ 234 /* lpfc_read_sparam Issue a READ SPARAM */ 235 /* mailbox command */ 236 /**********************************************/ 237 int 238 lpfc_read_sparam(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb) 239 { 240 struct lpfc_dmabuf *mp; 241 MAILBOX_t *mb; 242 struct lpfc_sli *psli; 243 244 psli = &phba->sli; 245 mb = &pmb->mb; 246 memset(pmb, 0, sizeof (LPFC_MBOXQ_t)); 247 248 mb->mbxOwner = OWN_HOST; 249 250 /* Get a buffer to hold the HBAs Service Parameters */ 251 252 if (((mp = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL)) == 0) || 253 ((mp->virt = lpfc_mbuf_alloc(phba, 0, &(mp->phys))) == 0)) { 254 kfree(mp); 255 mb->mbxCommand = MBX_READ_SPARM64; 256 /* READ_SPARAM: no buffers */ 257 lpfc_printf_log(phba, 258 KERN_WARNING, 259 LOG_MBOX, 260 "%d:0301 READ_SPARAM: no buffers\n", 261 phba->brd_no); 262 return (1); 263 } 264 INIT_LIST_HEAD(&mp->list); 265 mb->mbxCommand = MBX_READ_SPARM64; 266 mb->un.varRdSparm.un.sp64.tus.f.bdeSize = sizeof (struct serv_parm); 267 mb->un.varRdSparm.un.sp64.addrHigh = putPaddrHigh(mp->phys); 268 mb->un.varRdSparm.un.sp64.addrLow = putPaddrLow(mp->phys); 269 270 /* save address for completion */ 271 pmb->context1 = mp; 272 273 return (0); 274 } 275 276 /********************************************/ 277 /* lpfc_unreg_did Issue a UNREG_DID */ 278 /* mailbox command */ 279 /********************************************/ 280 void 281 lpfc_unreg_did(struct lpfc_hba * phba, uint32_t did, LPFC_MBOXQ_t * pmb) 282 { 283 MAILBOX_t *mb; 284 285 mb = &pmb->mb; 286 memset(pmb, 0, sizeof (LPFC_MBOXQ_t)); 287 288 mb->un.varUnregDID.did = did; 289 290 mb->mbxCommand = MBX_UNREG_D_ID; 291 mb->mbxOwner = OWN_HOST; 292 return; 293 } 294 295 /***********************************************/ 296 297 /* command to write slim */ 298 /***********************************************/ 299 void 300 lpfc_set_slim(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb, uint32_t addr, 301 uint32_t value) 302 { 303 MAILBOX_t *mb; 304 305 mb = &pmb->mb; 306 memset(pmb, 0, sizeof (LPFC_MBOXQ_t)); 307 308 /* addr = 0x090597 is AUTO ABTS disable for ELS commands */ 309 /* addr = 0x052198 is DELAYED ABTS enable for ELS commands */ 310 311 /* 312 * Always turn on DELAYED ABTS for ELS timeouts 313 */ 314 if ((addr == 0x052198) && (value == 0)) 315 value = 1; 316 317 mb->un.varWords[0] = addr; 318 mb->un.varWords[1] = value; 319 320 mb->mbxCommand = MBX_SET_SLIM; 321 mb->mbxOwner = OWN_HOST; 322 return; 323 } 324 325 /**********************************************/ 326 /* lpfc_read_nv Issue a READ CONFIG */ 327 /* mailbox command */ 328 /**********************************************/ 329 void 330 lpfc_read_config(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb) 331 { 332 MAILBOX_t *mb; 333 334 mb = &pmb->mb; 335 memset(pmb, 0, sizeof (LPFC_MBOXQ_t)); 336 337 mb->mbxCommand = MBX_READ_CONFIG; 338 mb->mbxOwner = OWN_HOST; 339 return; 340 } 341 342 /*************************************************/ 343 /* lpfc_read_lnk_stat Issue a READ LINK STATUS */ 344 /* mailbox command */ 345 /*************************************************/ 346 void 347 lpfc_read_lnk_stat(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb) 348 { 349 MAILBOX_t *mb; 350 351 mb = &pmb->mb; 352 memset(pmb, 0, sizeof (LPFC_MBOXQ_t)); 353 354 mb->mbxCommand = MBX_READ_LNK_STAT; 355 mb->mbxOwner = OWN_HOST; 356 return; 357 } 358 359 /********************************************/ 360 /* lpfc_reg_login Issue a REG_LOGIN */ 361 /* mailbox command */ 362 /********************************************/ 363 int 364 lpfc_reg_login(struct lpfc_hba * phba, 365 uint32_t did, uint8_t * param, LPFC_MBOXQ_t * pmb, uint32_t flag) 366 { 367 uint8_t *sparam; 368 struct lpfc_dmabuf *mp; 369 MAILBOX_t *mb; 370 struct lpfc_sli *psli; 371 372 psli = &phba->sli; 373 mb = &pmb->mb; 374 memset(pmb, 0, sizeof (LPFC_MBOXQ_t)); 375 376 mb->un.varRegLogin.rpi = 0; 377 mb->un.varRegLogin.did = did; 378 mb->un.varWords[30] = flag; /* Set flag to issue action on cmpl */ 379 380 mb->mbxOwner = OWN_HOST; 381 382 /* Get a buffer to hold NPorts Service Parameters */ 383 if (((mp = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL)) == NULL) || 384 ((mp->virt = lpfc_mbuf_alloc(phba, 0, &(mp->phys))) == 0)) { 385 kfree(mp); 386 mb->mbxCommand = MBX_REG_LOGIN64; 387 /* REG_LOGIN: no buffers */ 388 lpfc_printf_log(phba, 389 KERN_WARNING, 390 LOG_MBOX, 391 "%d:0302 REG_LOGIN: no buffers Data x%x x%x\n", 392 phba->brd_no, 393 (uint32_t) did, (uint32_t) flag); 394 return (1); 395 } 396 INIT_LIST_HEAD(&mp->list); 397 sparam = mp->virt; 398 399 /* Copy param's into a new buffer */ 400 memcpy(sparam, param, sizeof (struct serv_parm)); 401 402 /* save address for completion */ 403 pmb->context1 = (uint8_t *) mp; 404 405 mb->mbxCommand = MBX_REG_LOGIN64; 406 mb->un.varRegLogin.un.sp64.tus.f.bdeSize = sizeof (struct serv_parm); 407 mb->un.varRegLogin.un.sp64.addrHigh = putPaddrHigh(mp->phys); 408 mb->un.varRegLogin.un.sp64.addrLow = putPaddrLow(mp->phys); 409 410 return (0); 411 } 412 413 /**********************************************/ 414 /* lpfc_unreg_login Issue a UNREG_LOGIN */ 415 /* mailbox command */ 416 /**********************************************/ 417 void 418 lpfc_unreg_login(struct lpfc_hba * phba, uint32_t rpi, LPFC_MBOXQ_t * pmb) 419 { 420 MAILBOX_t *mb; 421 422 mb = &pmb->mb; 423 memset(pmb, 0, sizeof (LPFC_MBOXQ_t)); 424 425 mb->un.varUnregLogin.rpi = (uint16_t) rpi; 426 mb->un.varUnregLogin.rsvd1 = 0; 427 428 mb->mbxCommand = MBX_UNREG_LOGIN; 429 mb->mbxOwner = OWN_HOST; 430 return; 431 } 432 433 static void 434 lpfc_config_pcb_setup(struct lpfc_hba * phba) 435 { 436 struct lpfc_sli *psli = &phba->sli; 437 struct lpfc_sli_ring *pring; 438 PCB_t *pcbp = &phba->slim2p->pcb; 439 dma_addr_t pdma_addr; 440 uint32_t offset; 441 uint32_t iocbCnt; 442 int i; 443 444 pcbp->maxRing = (psli->num_rings - 1); 445 446 iocbCnt = 0; 447 for (i = 0; i < psli->num_rings; i++) { 448 pring = &psli->ring[i]; 449 /* A ring MUST have both cmd and rsp entries defined to be 450 valid */ 451 if ((pring->numCiocb == 0) || (pring->numRiocb == 0)) { 452 pcbp->rdsc[i].cmdEntries = 0; 453 pcbp->rdsc[i].rspEntries = 0; 454 pcbp->rdsc[i].cmdAddrHigh = 0; 455 pcbp->rdsc[i].rspAddrHigh = 0; 456 pcbp->rdsc[i].cmdAddrLow = 0; 457 pcbp->rdsc[i].rspAddrLow = 0; 458 pring->cmdringaddr = NULL; 459 pring->rspringaddr = NULL; 460 continue; 461 } 462 /* Command ring setup for ring */ 463 pring->cmdringaddr = 464 (void *)&phba->slim2p->IOCBs[iocbCnt]; 465 pcbp->rdsc[i].cmdEntries = pring->numCiocb; 466 467 offset = (uint8_t *)&phba->slim2p->IOCBs[iocbCnt] - 468 (uint8_t *)phba->slim2p; 469 pdma_addr = phba->slim2p_mapping + offset; 470 pcbp->rdsc[i].cmdAddrHigh = putPaddrHigh(pdma_addr); 471 pcbp->rdsc[i].cmdAddrLow = putPaddrLow(pdma_addr); 472 iocbCnt += pring->numCiocb; 473 474 /* Response ring setup for ring */ 475 pring->rspringaddr = 476 (void *)&phba->slim2p->IOCBs[iocbCnt]; 477 478 pcbp->rdsc[i].rspEntries = pring->numRiocb; 479 offset = (uint8_t *)&phba->slim2p->IOCBs[iocbCnt] - 480 (uint8_t *)phba->slim2p; 481 pdma_addr = phba->slim2p_mapping + offset; 482 pcbp->rdsc[i].rspAddrHigh = putPaddrHigh(pdma_addr); 483 pcbp->rdsc[i].rspAddrLow = putPaddrLow(pdma_addr); 484 iocbCnt += pring->numRiocb; 485 } 486 } 487 488 void 489 lpfc_read_rev(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb) 490 { 491 MAILBOX_t *mb; 492 493 mb = &pmb->mb; 494 memset(pmb, 0, sizeof (LPFC_MBOXQ_t)); 495 mb->un.varRdRev.cv = 1; 496 mb->mbxCommand = MBX_READ_REV; 497 mb->mbxOwner = OWN_HOST; 498 return; 499 } 500 501 void 502 lpfc_config_ring(struct lpfc_hba * phba, int ring, LPFC_MBOXQ_t * pmb) 503 { 504 int i; 505 MAILBOX_t *mb = &pmb->mb; 506 struct lpfc_sli *psli; 507 struct lpfc_sli_ring *pring; 508 509 memset(pmb, 0, sizeof (LPFC_MBOXQ_t)); 510 511 mb->un.varCfgRing.ring = ring; 512 mb->un.varCfgRing.maxOrigXchg = 0; 513 mb->un.varCfgRing.maxRespXchg = 0; 514 mb->un.varCfgRing.recvNotify = 1; 515 516 psli = &phba->sli; 517 pring = &psli->ring[ring]; 518 mb->un.varCfgRing.numMask = pring->num_mask; 519 mb->mbxCommand = MBX_CONFIG_RING; 520 mb->mbxOwner = OWN_HOST; 521 522 /* Is this ring configured for a specific profile */ 523 if (pring->prt[0].profile) { 524 mb->un.varCfgRing.profile = pring->prt[0].profile; 525 return; 526 } 527 528 /* Otherwise we setup specific rctl / type masks for this ring */ 529 for (i = 0; i < pring->num_mask; i++) { 530 mb->un.varCfgRing.rrRegs[i].rval = pring->prt[i].rctl; 531 if (mb->un.varCfgRing.rrRegs[i].rval != FC_ELS_REQ) 532 mb->un.varCfgRing.rrRegs[i].rmask = 0xff; 533 else 534 mb->un.varCfgRing.rrRegs[i].rmask = 0xfe; 535 mb->un.varCfgRing.rrRegs[i].tval = pring->prt[i].type; 536 mb->un.varCfgRing.rrRegs[i].tmask = 0xff; 537 } 538 539 return; 540 } 541 542 void 543 lpfc_config_port(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb) 544 { 545 MAILBOX_t *mb = &pmb->mb; 546 dma_addr_t pdma_addr; 547 uint32_t bar_low, bar_high; 548 size_t offset; 549 struct lpfc_hgp hgp; 550 void __iomem *to_slim; 551 int i; 552 553 memset(pmb, 0, sizeof(LPFC_MBOXQ_t)); 554 mb->mbxCommand = MBX_CONFIG_PORT; 555 mb->mbxOwner = OWN_HOST; 556 557 mb->un.varCfgPort.pcbLen = sizeof(PCB_t); 558 559 offset = (uint8_t *)&phba->slim2p->pcb - (uint8_t *)phba->slim2p; 560 pdma_addr = phba->slim2p_mapping + offset; 561 mb->un.varCfgPort.pcbLow = putPaddrLow(pdma_addr); 562 mb->un.varCfgPort.pcbHigh = putPaddrHigh(pdma_addr); 563 564 /* Now setup pcb */ 565 phba->slim2p->pcb.type = TYPE_NATIVE_SLI2; 566 phba->slim2p->pcb.feature = FEATURE_INITIAL_SLI2; 567 568 /* Setup Mailbox pointers */ 569 phba->slim2p->pcb.mailBoxSize = sizeof(MAILBOX_t); 570 offset = (uint8_t *)&phba->slim2p->mbx - (uint8_t *)phba->slim2p; 571 pdma_addr = phba->slim2p_mapping + offset; 572 phba->slim2p->pcb.mbAddrHigh = putPaddrHigh(pdma_addr); 573 phba->slim2p->pcb.mbAddrLow = putPaddrLow(pdma_addr); 574 575 /* 576 * Setup Host Group ring pointer. 577 * 578 * For efficiency reasons, the ring get/put pointers can be 579 * placed in adapter memory (SLIM) rather than in host memory. 580 * This allows firmware to avoid PCI reads/writes when updating 581 * and checking pointers. 582 * 583 * The firmware recognizes the use of SLIM memory by comparing 584 * the address of the get/put pointers structure with that of 585 * the SLIM BAR (BAR0). 586 * 587 * Caution: be sure to use the PCI config space value of BAR0/BAR1 588 * (the hardware's view of the base address), not the OS's 589 * value of pci_resource_start() as the OS value may be a cookie 590 * for ioremap/iomap. 591 */ 592 593 594 pci_read_config_dword(phba->pcidev, PCI_BASE_ADDRESS_0, &bar_low); 595 pci_read_config_dword(phba->pcidev, PCI_BASE_ADDRESS_1, &bar_high); 596 597 598 /* mask off BAR0's flag bits 0 - 3 */ 599 phba->slim2p->pcb.hgpAddrLow = (bar_low & PCI_BASE_ADDRESS_MEM_MASK) + 600 (SLIMOFF*sizeof(uint32_t)); 601 if (bar_low & PCI_BASE_ADDRESS_MEM_TYPE_64) 602 phba->slim2p->pcb.hgpAddrHigh = bar_high; 603 else 604 phba->slim2p->pcb.hgpAddrHigh = 0; 605 /* write HGP data to SLIM at the required longword offset */ 606 memset(&hgp, 0, sizeof(struct lpfc_hgp)); 607 to_slim = phba->MBslimaddr + (SLIMOFF*sizeof (uint32_t)); 608 609 for (i=0; i < phba->sli.num_rings; i++) { 610 lpfc_memcpy_to_slim(to_slim, &hgp, sizeof(struct lpfc_hgp)); 611 to_slim += sizeof (struct lpfc_hgp); 612 } 613 614 /* Setup Port Group ring pointer */ 615 offset = (uint8_t *)&phba->slim2p->mbx.us.s2.port - 616 (uint8_t *)phba->slim2p; 617 pdma_addr = phba->slim2p_mapping + offset; 618 phba->slim2p->pcb.pgpAddrHigh = putPaddrHigh(pdma_addr); 619 phba->slim2p->pcb.pgpAddrLow = putPaddrLow(pdma_addr); 620 621 /* Use callback routine to setp rings in the pcb */ 622 lpfc_config_pcb_setup(phba); 623 624 /* special handling for LC HBAs */ 625 if (lpfc_is_LC_HBA(phba->pcidev->device)) { 626 uint32_t hbainit[5]; 627 628 lpfc_hba_init(phba, hbainit); 629 630 memcpy(&mb->un.varCfgPort.hbainit, hbainit, 20); 631 } 632 633 /* Swap PCB if needed */ 634 lpfc_sli_pcimem_bcopy(&phba->slim2p->pcb, &phba->slim2p->pcb, 635 sizeof (PCB_t)); 636 637 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 638 "%d:0405 Service Level Interface (SLI) 2 selected\n", 639 phba->brd_no); 640 } 641 642 void 643 lpfc_kill_board(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb) 644 { 645 MAILBOX_t *mb = &pmb->mb; 646 647 memset(pmb, 0, sizeof(LPFC_MBOXQ_t)); 648 mb->mbxCommand = MBX_KILL_BOARD; 649 mb->mbxOwner = OWN_HOST; 650 return; 651 } 652 653 void 654 lpfc_mbox_put(struct lpfc_hba * phba, LPFC_MBOXQ_t * mbq) 655 { 656 struct lpfc_sli *psli; 657 658 psli = &phba->sli; 659 660 list_add_tail(&mbq->list, &psli->mboxq); 661 662 psli->mboxq_cnt++; 663 664 return; 665 } 666 667 LPFC_MBOXQ_t * 668 lpfc_mbox_get(struct lpfc_hba * phba) 669 { 670 LPFC_MBOXQ_t *mbq = NULL; 671 struct lpfc_sli *psli = &phba->sli; 672 673 list_remove_head((&psli->mboxq), mbq, LPFC_MBOXQ_t, 674 list); 675 if (mbq) { 676 psli->mboxq_cnt--; 677 } 678 679 return mbq; 680 } 681