1 /******************************************************************* 2 * This file is part of the Emulex Linux Device Driver for * 3 * Fibre Channel Host Bus Adapters. * 4 * Copyright (C) 2004-2005 Emulex. All rights reserved. * 5 * EMULEX and SLI are trademarks of Emulex. * 6 * www.emulex.com * 7 * Portions Copyright (C) 2004-2005 Christoph Hellwig * 8 * * 9 * This program is free software; you can redistribute it and/or * 10 * modify it under the terms of version 2 of the GNU General * 11 * Public License as published by the Free Software Foundation. * 12 * This program is distributed in the hope that it will be useful. * 13 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND * 14 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, * 15 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE * 16 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD * 17 * TO BE LEGALLY INVALID. See the GNU General Public License for * 18 * more details, a copy of which can be found in the file COPYING * 19 * included with this package. * 20 *******************************************************************/ 21 22 #include <linux/blkdev.h> 23 #include <linux/pci.h> 24 #include <linux/interrupt.h> 25 26 #include "lpfc_hw.h" 27 #include "lpfc_sli.h" 28 #include "lpfc_disc.h" 29 #include "lpfc_scsi.h" 30 #include "lpfc.h" 31 #include "lpfc_logmsg.h" 32 #include "lpfc_crtn.h" 33 #include "lpfc_compat.h" 34 35 /**********************************************/ 36 37 /* mailbox command */ 38 /**********************************************/ 39 void 40 lpfc_dump_mem(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb, uint16_t offset) 41 { 42 MAILBOX_t *mb; 43 void *ctx; 44 45 mb = &pmb->mb; 46 ctx = pmb->context2; 47 48 /* Setup to dump VPD region */ 49 memset(pmb, 0, sizeof (LPFC_MBOXQ_t)); 50 mb->mbxCommand = MBX_DUMP_MEMORY; 51 mb->un.varDmp.cv = 1; 52 mb->un.varDmp.type = DMP_NV_PARAMS; 53 mb->un.varDmp.entry_index = offset; 54 mb->un.varDmp.region_id = DMP_REGION_VPD; 55 mb->un.varDmp.word_cnt = (DMP_RSP_SIZE / sizeof (uint32_t)); 56 mb->un.varDmp.co = 0; 57 mb->un.varDmp.resp_offset = 0; 58 pmb->context2 = ctx; 59 mb->mbxOwner = OWN_HOST; 60 return; 61 } 62 63 /**********************************************/ 64 /* lpfc_read_nv Issue a READ NVPARAM */ 65 /* mailbox command */ 66 /**********************************************/ 67 void 68 lpfc_read_nv(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb) 69 { 70 MAILBOX_t *mb; 71 72 mb = &pmb->mb; 73 memset(pmb, 0, sizeof (LPFC_MBOXQ_t)); 74 mb->mbxCommand = MBX_READ_NV; 75 mb->mbxOwner = OWN_HOST; 76 return; 77 } 78 79 /**********************************************/ 80 /* lpfc_read_la Issue a READ LA */ 81 /* mailbox command */ 82 /**********************************************/ 83 int 84 lpfc_read_la(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb, struct lpfc_dmabuf *mp) 85 { 86 MAILBOX_t *mb; 87 struct lpfc_sli *psli; 88 89 psli = &phba->sli; 90 mb = &pmb->mb; 91 memset(pmb, 0, sizeof (LPFC_MBOXQ_t)); 92 93 INIT_LIST_HEAD(&mp->list); 94 mb->mbxCommand = MBX_READ_LA64; 95 mb->un.varReadLA.un.lilpBde64.tus.f.bdeSize = 128; 96 mb->un.varReadLA.un.lilpBde64.addrHigh = putPaddrHigh(mp->phys); 97 mb->un.varReadLA.un.lilpBde64.addrLow = putPaddrLow(mp->phys); 98 99 /* Save address for later completion and set the owner to host so that 100 * the FW knows this mailbox is available for processing. 101 */ 102 pmb->context1 = (uint8_t *) mp; 103 mb->mbxOwner = OWN_HOST; 104 return (0); 105 } 106 107 /**********************************************/ 108 /* lpfc_clear_la Issue a CLEAR LA */ 109 /* mailbox command */ 110 /**********************************************/ 111 void 112 lpfc_clear_la(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb) 113 { 114 MAILBOX_t *mb; 115 116 mb = &pmb->mb; 117 memset(pmb, 0, sizeof (LPFC_MBOXQ_t)); 118 119 mb->un.varClearLA.eventTag = phba->fc_eventTag; 120 mb->mbxCommand = MBX_CLEAR_LA; 121 mb->mbxOwner = OWN_HOST; 122 return; 123 } 124 125 /**************************************************/ 126 /* lpfc_config_link Issue a CONFIG LINK */ 127 /* mailbox command */ 128 /**************************************************/ 129 void 130 lpfc_config_link(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb) 131 { 132 MAILBOX_t *mb = &pmb->mb; 133 memset(pmb, 0, sizeof (LPFC_MBOXQ_t)); 134 135 /* NEW_FEATURE 136 * SLI-2, Coalescing Response Feature. 137 */ 138 if (phba->cfg_cr_delay) { 139 mb->un.varCfgLnk.cr = 1; 140 mb->un.varCfgLnk.ci = 1; 141 mb->un.varCfgLnk.cr_delay = phba->cfg_cr_delay; 142 mb->un.varCfgLnk.cr_count = phba->cfg_cr_count; 143 } 144 145 mb->un.varCfgLnk.myId = phba->fc_myDID; 146 mb->un.varCfgLnk.edtov = phba->fc_edtov; 147 mb->un.varCfgLnk.arbtov = phba->fc_arbtov; 148 mb->un.varCfgLnk.ratov = phba->fc_ratov; 149 mb->un.varCfgLnk.rttov = phba->fc_rttov; 150 mb->un.varCfgLnk.altov = phba->fc_altov; 151 mb->un.varCfgLnk.crtov = phba->fc_crtov; 152 mb->un.varCfgLnk.citov = phba->fc_citov; 153 154 if (phba->cfg_ack0) 155 mb->un.varCfgLnk.ack0_enable = 1; 156 157 mb->mbxCommand = MBX_CONFIG_LINK; 158 mb->mbxOwner = OWN_HOST; 159 return; 160 } 161 162 /**********************************************/ 163 /* lpfc_init_link Issue an INIT LINK */ 164 /* mailbox command */ 165 /**********************************************/ 166 void 167 lpfc_init_link(struct lpfc_hba * phba, 168 LPFC_MBOXQ_t * pmb, uint32_t topology, uint32_t linkspeed) 169 { 170 lpfc_vpd_t *vpd; 171 struct lpfc_sli *psli; 172 MAILBOX_t *mb; 173 174 mb = &pmb->mb; 175 memset(pmb, 0, sizeof (LPFC_MBOXQ_t)); 176 177 psli = &phba->sli; 178 switch (topology) { 179 case FLAGS_TOPOLOGY_MODE_LOOP_PT: 180 mb->un.varInitLnk.link_flags = FLAGS_TOPOLOGY_MODE_LOOP; 181 mb->un.varInitLnk.link_flags |= FLAGS_TOPOLOGY_FAILOVER; 182 break; 183 case FLAGS_TOPOLOGY_MODE_PT_PT: 184 mb->un.varInitLnk.link_flags = FLAGS_TOPOLOGY_MODE_PT_PT; 185 break; 186 case FLAGS_TOPOLOGY_MODE_LOOP: 187 mb->un.varInitLnk.link_flags = FLAGS_TOPOLOGY_MODE_LOOP; 188 break; 189 case FLAGS_TOPOLOGY_MODE_PT_LOOP: 190 mb->un.varInitLnk.link_flags = FLAGS_TOPOLOGY_MODE_PT_PT; 191 mb->un.varInitLnk.link_flags |= FLAGS_TOPOLOGY_FAILOVER; 192 break; 193 } 194 195 /* NEW_FEATURE 196 * Setting up the link speed 197 */ 198 vpd = &phba->vpd; 199 if (vpd->rev.feaLevelHigh >= 0x02){ 200 switch(linkspeed){ 201 case LINK_SPEED_1G: 202 case LINK_SPEED_2G: 203 case LINK_SPEED_4G: 204 mb->un.varInitLnk.link_flags |= 205 FLAGS_LINK_SPEED; 206 mb->un.varInitLnk.link_speed = linkspeed; 207 break; 208 case LINK_SPEED_AUTO: 209 default: 210 mb->un.varInitLnk.link_speed = 211 LINK_SPEED_AUTO; 212 break; 213 } 214 215 } 216 else 217 mb->un.varInitLnk.link_speed = LINK_SPEED_AUTO; 218 219 mb->mbxCommand = (volatile uint8_t)MBX_INIT_LINK; 220 mb->mbxOwner = OWN_HOST; 221 mb->un.varInitLnk.fabric_AL_PA = phba->fc_pref_ALPA; 222 return; 223 } 224 225 /**********************************************/ 226 /* lpfc_read_sparam Issue a READ SPARAM */ 227 /* mailbox command */ 228 /**********************************************/ 229 int 230 lpfc_read_sparam(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb) 231 { 232 struct lpfc_dmabuf *mp; 233 MAILBOX_t *mb; 234 struct lpfc_sli *psli; 235 236 psli = &phba->sli; 237 mb = &pmb->mb; 238 memset(pmb, 0, sizeof (LPFC_MBOXQ_t)); 239 240 mb->mbxOwner = OWN_HOST; 241 242 /* Get a buffer to hold the HBAs Service Parameters */ 243 244 if (((mp = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL)) == 0) || 245 ((mp->virt = lpfc_mbuf_alloc(phba, 0, &(mp->phys))) == 0)) { 246 if (mp) 247 kfree(mp); 248 mb->mbxCommand = MBX_READ_SPARM64; 249 /* READ_SPARAM: no buffers */ 250 lpfc_printf_log(phba, 251 KERN_WARNING, 252 LOG_MBOX, 253 "%d:0301 READ_SPARAM: no buffers\n", 254 phba->brd_no); 255 return (1); 256 } 257 INIT_LIST_HEAD(&mp->list); 258 mb->mbxCommand = MBX_READ_SPARM64; 259 mb->un.varRdSparm.un.sp64.tus.f.bdeSize = sizeof (struct serv_parm); 260 mb->un.varRdSparm.un.sp64.addrHigh = putPaddrHigh(mp->phys); 261 mb->un.varRdSparm.un.sp64.addrLow = putPaddrLow(mp->phys); 262 263 /* save address for completion */ 264 pmb->context1 = mp; 265 266 return (0); 267 } 268 269 /********************************************/ 270 /* lpfc_unreg_did Issue a UNREG_DID */ 271 /* mailbox command */ 272 /********************************************/ 273 void 274 lpfc_unreg_did(struct lpfc_hba * phba, uint32_t did, LPFC_MBOXQ_t * pmb) 275 { 276 MAILBOX_t *mb; 277 278 mb = &pmb->mb; 279 memset(pmb, 0, sizeof (LPFC_MBOXQ_t)); 280 281 mb->un.varUnregDID.did = did; 282 283 mb->mbxCommand = MBX_UNREG_D_ID; 284 mb->mbxOwner = OWN_HOST; 285 return; 286 } 287 288 /***********************************************/ 289 290 /* command to write slim */ 291 /***********************************************/ 292 void 293 lpfc_set_slim(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb, uint32_t addr, 294 uint32_t value) 295 { 296 MAILBOX_t *mb; 297 298 mb = &pmb->mb; 299 memset(pmb, 0, sizeof (LPFC_MBOXQ_t)); 300 301 /* addr = 0x090597 is AUTO ABTS disable for ELS commands */ 302 /* addr = 0x052198 is DELAYED ABTS enable for ELS commands */ 303 304 /* 305 * Always turn on DELAYED ABTS for ELS timeouts 306 */ 307 if ((addr == 0x052198) && (value == 0)) 308 value = 1; 309 310 mb->un.varWords[0] = addr; 311 mb->un.varWords[1] = value; 312 313 mb->mbxCommand = MBX_SET_SLIM; 314 mb->mbxOwner = OWN_HOST; 315 return; 316 } 317 318 /**********************************************/ 319 /* lpfc_read_nv Issue a READ CONFIG */ 320 /* mailbox command */ 321 /**********************************************/ 322 void 323 lpfc_read_config(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb) 324 { 325 MAILBOX_t *mb; 326 327 mb = &pmb->mb; 328 memset(pmb, 0, sizeof (LPFC_MBOXQ_t)); 329 330 mb->mbxCommand = MBX_READ_CONFIG; 331 mb->mbxOwner = OWN_HOST; 332 return; 333 } 334 335 /********************************************/ 336 /* lpfc_reg_login Issue a REG_LOGIN */ 337 /* mailbox command */ 338 /********************************************/ 339 int 340 lpfc_reg_login(struct lpfc_hba * phba, 341 uint32_t did, uint8_t * param, LPFC_MBOXQ_t * pmb, uint32_t flag) 342 { 343 uint8_t *sparam; 344 struct lpfc_dmabuf *mp; 345 MAILBOX_t *mb; 346 struct lpfc_sli *psli; 347 348 psli = &phba->sli; 349 mb = &pmb->mb; 350 memset(pmb, 0, sizeof (LPFC_MBOXQ_t)); 351 352 mb->un.varRegLogin.rpi = 0; 353 mb->un.varRegLogin.did = did; 354 mb->un.varWords[30] = flag; /* Set flag to issue action on cmpl */ 355 356 mb->mbxOwner = OWN_HOST; 357 358 /* Get a buffer to hold NPorts Service Parameters */ 359 if (((mp = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL)) == NULL) || 360 ((mp->virt = lpfc_mbuf_alloc(phba, 0, &(mp->phys))) == 0)) { 361 if (mp) 362 kfree(mp); 363 364 mb->mbxCommand = MBX_REG_LOGIN64; 365 /* REG_LOGIN: no buffers */ 366 lpfc_printf_log(phba, 367 KERN_WARNING, 368 LOG_MBOX, 369 "%d:0302 REG_LOGIN: no buffers Data x%x x%x\n", 370 phba->brd_no, 371 (uint32_t) did, (uint32_t) flag); 372 return (1); 373 } 374 INIT_LIST_HEAD(&mp->list); 375 sparam = mp->virt; 376 377 /* Copy param's into a new buffer */ 378 memcpy(sparam, param, sizeof (struct serv_parm)); 379 380 /* save address for completion */ 381 pmb->context1 = (uint8_t *) mp; 382 383 mb->mbxCommand = MBX_REG_LOGIN64; 384 mb->un.varRegLogin.un.sp64.tus.f.bdeSize = sizeof (struct serv_parm); 385 mb->un.varRegLogin.un.sp64.addrHigh = putPaddrHigh(mp->phys); 386 mb->un.varRegLogin.un.sp64.addrLow = putPaddrLow(mp->phys); 387 388 return (0); 389 } 390 391 /**********************************************/ 392 /* lpfc_unreg_login Issue a UNREG_LOGIN */ 393 /* mailbox command */ 394 /**********************************************/ 395 void 396 lpfc_unreg_login(struct lpfc_hba * phba, uint32_t rpi, LPFC_MBOXQ_t * pmb) 397 { 398 MAILBOX_t *mb; 399 400 mb = &pmb->mb; 401 memset(pmb, 0, sizeof (LPFC_MBOXQ_t)); 402 403 mb->un.varUnregLogin.rpi = (uint16_t) rpi; 404 mb->un.varUnregLogin.rsvd1 = 0; 405 406 mb->mbxCommand = MBX_UNREG_LOGIN; 407 mb->mbxOwner = OWN_HOST; 408 return; 409 } 410 411 static void 412 lpfc_config_pcb_setup(struct lpfc_hba * phba) 413 { 414 struct lpfc_sli *psli = &phba->sli; 415 struct lpfc_sli_ring *pring; 416 PCB_t *pcbp = &phba->slim2p->pcb; 417 dma_addr_t pdma_addr; 418 uint32_t offset; 419 uint32_t iocbCnt; 420 int i; 421 422 pcbp->maxRing = (psli->num_rings - 1); 423 424 iocbCnt = 0; 425 for (i = 0; i < psli->num_rings; i++) { 426 pring = &psli->ring[i]; 427 /* A ring MUST have both cmd and rsp entries defined to be 428 valid */ 429 if ((pring->numCiocb == 0) || (pring->numRiocb == 0)) { 430 pcbp->rdsc[i].cmdEntries = 0; 431 pcbp->rdsc[i].rspEntries = 0; 432 pcbp->rdsc[i].cmdAddrHigh = 0; 433 pcbp->rdsc[i].rspAddrHigh = 0; 434 pcbp->rdsc[i].cmdAddrLow = 0; 435 pcbp->rdsc[i].rspAddrLow = 0; 436 pring->cmdringaddr = NULL; 437 pring->rspringaddr = NULL; 438 continue; 439 } 440 /* Command ring setup for ring */ 441 pring->cmdringaddr = 442 (void *)&phba->slim2p->IOCBs[iocbCnt]; 443 pcbp->rdsc[i].cmdEntries = pring->numCiocb; 444 445 offset = (uint8_t *)&phba->slim2p->IOCBs[iocbCnt] - 446 (uint8_t *)phba->slim2p; 447 pdma_addr = phba->slim2p_mapping + offset; 448 pcbp->rdsc[i].cmdAddrHigh = putPaddrHigh(pdma_addr); 449 pcbp->rdsc[i].cmdAddrLow = putPaddrLow(pdma_addr); 450 iocbCnt += pring->numCiocb; 451 452 /* Response ring setup for ring */ 453 pring->rspringaddr = 454 (void *)&phba->slim2p->IOCBs[iocbCnt]; 455 456 pcbp->rdsc[i].rspEntries = pring->numRiocb; 457 offset = (uint8_t *)&phba->slim2p->IOCBs[iocbCnt] - 458 (uint8_t *)phba->slim2p; 459 pdma_addr = phba->slim2p_mapping + offset; 460 pcbp->rdsc[i].rspAddrHigh = putPaddrHigh(pdma_addr); 461 pcbp->rdsc[i].rspAddrLow = putPaddrLow(pdma_addr); 462 iocbCnt += pring->numRiocb; 463 } 464 } 465 466 void 467 lpfc_read_rev(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb) 468 { 469 MAILBOX_t *mb; 470 471 mb = &pmb->mb; 472 memset(pmb, 0, sizeof (LPFC_MBOXQ_t)); 473 mb->un.varRdRev.cv = 1; 474 mb->mbxCommand = MBX_READ_REV; 475 mb->mbxOwner = OWN_HOST; 476 return; 477 } 478 479 void 480 lpfc_config_ring(struct lpfc_hba * phba, int ring, LPFC_MBOXQ_t * pmb) 481 { 482 int i; 483 MAILBOX_t *mb = &pmb->mb; 484 struct lpfc_sli *psli; 485 struct lpfc_sli_ring *pring; 486 487 memset(pmb, 0, sizeof (LPFC_MBOXQ_t)); 488 489 mb->un.varCfgRing.ring = ring; 490 mb->un.varCfgRing.maxOrigXchg = 0; 491 mb->un.varCfgRing.maxRespXchg = 0; 492 mb->un.varCfgRing.recvNotify = 1; 493 494 psli = &phba->sli; 495 pring = &psli->ring[ring]; 496 mb->un.varCfgRing.numMask = pring->num_mask; 497 mb->mbxCommand = MBX_CONFIG_RING; 498 mb->mbxOwner = OWN_HOST; 499 500 /* Is this ring configured for a specific profile */ 501 if (pring->prt[0].profile) { 502 mb->un.varCfgRing.profile = pring->prt[0].profile; 503 return; 504 } 505 506 /* Otherwise we setup specific rctl / type masks for this ring */ 507 for (i = 0; i < pring->num_mask; i++) { 508 mb->un.varCfgRing.rrRegs[i].rval = pring->prt[i].rctl; 509 if (mb->un.varCfgRing.rrRegs[i].rval != FC_ELS_REQ) 510 mb->un.varCfgRing.rrRegs[i].rmask = 0xff; 511 else 512 mb->un.varCfgRing.rrRegs[i].rmask = 0xfe; 513 mb->un.varCfgRing.rrRegs[i].tval = pring->prt[i].type; 514 mb->un.varCfgRing.rrRegs[i].tmask = 0xff; 515 } 516 517 return; 518 } 519 520 void 521 lpfc_config_port(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb) 522 { 523 MAILBOX_t *mb = &pmb->mb; 524 dma_addr_t pdma_addr; 525 uint32_t bar_low, bar_high; 526 size_t offset; 527 struct lpfc_hgp hgp; 528 void __iomem *to_slim; 529 530 memset(pmb, 0, sizeof(LPFC_MBOXQ_t)); 531 mb->mbxCommand = MBX_CONFIG_PORT; 532 mb->mbxOwner = OWN_HOST; 533 534 mb->un.varCfgPort.pcbLen = sizeof(PCB_t); 535 536 offset = (uint8_t *)&phba->slim2p->pcb - (uint8_t *)phba->slim2p; 537 pdma_addr = phba->slim2p_mapping + offset; 538 mb->un.varCfgPort.pcbLow = putPaddrLow(pdma_addr); 539 mb->un.varCfgPort.pcbHigh = putPaddrHigh(pdma_addr); 540 541 /* Now setup pcb */ 542 phba->slim2p->pcb.type = TYPE_NATIVE_SLI2; 543 phba->slim2p->pcb.feature = FEATURE_INITIAL_SLI2; 544 545 /* Setup Mailbox pointers */ 546 phba->slim2p->pcb.mailBoxSize = sizeof(MAILBOX_t); 547 offset = (uint8_t *)&phba->slim2p->mbx - (uint8_t *)phba->slim2p; 548 pdma_addr = phba->slim2p_mapping + offset; 549 phba->slim2p->pcb.mbAddrHigh = putPaddrHigh(pdma_addr); 550 phba->slim2p->pcb.mbAddrLow = putPaddrLow(pdma_addr); 551 552 /* 553 * Setup Host Group ring pointer. 554 * 555 * For efficiency reasons, the ring get/put pointers can be 556 * placed in adapter memory (SLIM) rather than in host memory. 557 * This allows firmware to avoid PCI reads/writes when updating 558 * and checking pointers. 559 * 560 * The firmware recognizes the use of SLIM memory by comparing 561 * the address of the get/put pointers structure with that of 562 * the SLIM BAR (BAR0). 563 * 564 * Caution: be sure to use the PCI config space value of BAR0/BAR1 565 * (the hardware's view of the base address), not the OS's 566 * value of pci_resource_start() as the OS value may be a cookie 567 * for ioremap/iomap. 568 */ 569 570 571 pci_read_config_dword(phba->pcidev, PCI_BASE_ADDRESS_0, &bar_low); 572 pci_read_config_dword(phba->pcidev, PCI_BASE_ADDRESS_1, &bar_high); 573 574 575 /* mask off BAR0's flag bits 0 - 3 */ 576 phba->slim2p->pcb.hgpAddrLow = (bar_low & PCI_BASE_ADDRESS_MEM_MASK) + 577 (SLIMOFF*sizeof(uint32_t)); 578 if (bar_low & PCI_BASE_ADDRESS_MEM_TYPE_64) 579 phba->slim2p->pcb.hgpAddrHigh = bar_high; 580 else 581 phba->slim2p->pcb.hgpAddrHigh = 0; 582 /* write HGP data to SLIM at the required longword offset */ 583 memset(&hgp, 0, sizeof(struct lpfc_hgp)); 584 to_slim = phba->MBslimaddr + (SLIMOFF*sizeof (uint32_t)); 585 lpfc_memcpy_to_slim(to_slim, &hgp, sizeof(struct lpfc_hgp)); 586 587 /* Setup Port Group ring pointer */ 588 offset = (uint8_t *)&phba->slim2p->mbx.us.s2.port - 589 (uint8_t *)phba->slim2p; 590 pdma_addr = phba->slim2p_mapping + offset; 591 phba->slim2p->pcb.pgpAddrHigh = putPaddrHigh(pdma_addr); 592 phba->slim2p->pcb.pgpAddrLow = putPaddrLow(pdma_addr); 593 594 /* Use callback routine to setp rings in the pcb */ 595 lpfc_config_pcb_setup(phba); 596 597 /* special handling for LC HBAs */ 598 if (lpfc_is_LC_HBA(phba->pcidev->device)) { 599 uint32_t hbainit[5]; 600 601 lpfc_hba_init(phba, hbainit); 602 603 memcpy(&mb->un.varCfgPort.hbainit, hbainit, 20); 604 } 605 606 /* Swap PCB if needed */ 607 lpfc_sli_pcimem_bcopy(&phba->slim2p->pcb, &phba->slim2p->pcb, 608 sizeof (PCB_t)); 609 610 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 611 "%d:0405 Service Level Interface (SLI) 2 selected\n", 612 phba->brd_no); 613 } 614 615 void 616 lpfc_mbox_put(struct lpfc_hba * phba, LPFC_MBOXQ_t * mbq) 617 { 618 struct lpfc_sli *psli; 619 620 psli = &phba->sli; 621 622 list_add_tail(&mbq->list, &psli->mboxq); 623 624 psli->mboxq_cnt++; 625 626 return; 627 } 628 629 LPFC_MBOXQ_t * 630 lpfc_mbox_get(struct lpfc_hba * phba) 631 { 632 LPFC_MBOXQ_t *mbq = NULL; 633 struct lpfc_sli *psli = &phba->sli; 634 635 list_remove_head((&psli->mboxq), mbq, LPFC_MBOXQ_t, 636 list); 637 if (mbq) { 638 psli->mboxq_cnt--; 639 } 640 641 return mbq; 642 } 643