1 /******************************************************************* 2 * This file is part of the Emulex Linux Device Driver for * 3 * Fibre Channel Host Bus Adapters. * 4 * Copyright (C) 2017-2022 Broadcom. All Rights Reserved. The term * 5 * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. * 6 * Copyright (C) 2004-2016 Emulex. All rights reserved. * 7 * EMULEX and SLI are trademarks of Emulex. * 8 * www.broadcom.com * 9 * Portions Copyright (C) 2004-2005 Christoph Hellwig * 10 * * 11 * This program is free software; you can redistribute it and/or * 12 * modify it under the terms of version 2 of the GNU General * 13 * Public License as published by the Free Software Foundation. * 14 * This program is distributed in the hope that it will be useful. * 15 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND * 16 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, * 17 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE * 18 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD * 19 * TO BE LEGALLY INVALID. See the GNU General Public License for * 20 * more details, a copy of which can be found in the file COPYING * 21 * included with this package. * 22 *******************************************************************/ 23 24 #include <linux/blkdev.h> 25 #include <linux/delay.h> 26 #include <linux/dma-mapping.h> 27 #include <linux/idr.h> 28 #include <linux/interrupt.h> 29 #include <linux/module.h> 30 #include <linux/kthread.h> 31 #include <linux/pci.h> 32 #include <linux/spinlock.h> 33 #include <linux/sched/clock.h> 34 #include <linux/ctype.h> 35 #include <linux/aer.h> 36 #include <linux/slab.h> 37 #include <linux/firmware.h> 38 #include <linux/miscdevice.h> 39 #include <linux/percpu.h> 40 #include <linux/irq.h> 41 #include <linux/bitops.h> 42 #include <linux/crash_dump.h> 43 #include <linux/cpu.h> 44 #include <linux/cpuhotplug.h> 45 46 #include <scsi/scsi.h> 47 #include <scsi/scsi_device.h> 48 #include <scsi/scsi_host.h> 49 #include <scsi/scsi_transport_fc.h> 50 #include <scsi/scsi_tcq.h> 51 #include <scsi/fc/fc_fs.h> 52 53 #include "lpfc_hw4.h" 54 #include "lpfc_hw.h" 55 #include "lpfc_sli.h" 56 #include "lpfc_sli4.h" 57 #include "lpfc_nl.h" 58 #include "lpfc_disc.h" 59 #include "lpfc.h" 60 #include "lpfc_scsi.h" 61 #include "lpfc_nvme.h" 62 #include "lpfc_logmsg.h" 63 #include "lpfc_crtn.h" 64 #include "lpfc_vport.h" 65 #include "lpfc_version.h" 66 #include "lpfc_ids.h" 67 68 static enum cpuhp_state lpfc_cpuhp_state; 69 /* Used when mapping IRQ vectors in a driver centric manner */ 70 static uint32_t lpfc_present_cpu; 71 static bool lpfc_pldv_detect; 72 73 static void __lpfc_cpuhp_remove(struct lpfc_hba *phba); 74 static void lpfc_cpuhp_remove(struct lpfc_hba *phba); 75 static void lpfc_cpuhp_add(struct lpfc_hba *phba); 76 static void lpfc_get_hba_model_desc(struct lpfc_hba *, uint8_t *, uint8_t *); 77 static int lpfc_post_rcv_buf(struct lpfc_hba *); 78 static int lpfc_sli4_queue_verify(struct lpfc_hba *); 79 static int lpfc_create_bootstrap_mbox(struct lpfc_hba *); 80 static int lpfc_setup_endian_order(struct lpfc_hba *); 81 static void lpfc_destroy_bootstrap_mbox(struct lpfc_hba *); 82 static void lpfc_free_els_sgl_list(struct lpfc_hba *); 83 static void lpfc_free_nvmet_sgl_list(struct lpfc_hba *); 84 static void lpfc_init_sgl_list(struct lpfc_hba *); 85 static int lpfc_init_active_sgl_array(struct lpfc_hba *); 86 static void lpfc_free_active_sgl(struct lpfc_hba *); 87 static int lpfc_hba_down_post_s3(struct lpfc_hba *phba); 88 static int lpfc_hba_down_post_s4(struct lpfc_hba *phba); 89 static int lpfc_sli4_cq_event_pool_create(struct lpfc_hba *); 90 static void lpfc_sli4_cq_event_pool_destroy(struct lpfc_hba *); 91 static void lpfc_sli4_cq_event_release_all(struct lpfc_hba *); 92 static void lpfc_sli4_disable_intr(struct lpfc_hba *); 93 static uint32_t lpfc_sli4_enable_intr(struct lpfc_hba *, uint32_t); 94 static void lpfc_sli4_oas_verify(struct lpfc_hba *phba); 95 static uint16_t lpfc_find_cpu_handle(struct lpfc_hba *, uint16_t, int); 96 static void lpfc_setup_bg(struct lpfc_hba *, struct Scsi_Host *); 97 static int lpfc_sli4_cgn_parm_chg_evt(struct lpfc_hba *); 98 static void lpfc_sli4_prep_dev_for_reset(struct lpfc_hba *phba); 99 100 static struct scsi_transport_template *lpfc_transport_template = NULL; 101 static struct scsi_transport_template *lpfc_vport_transport_template = NULL; 102 static DEFINE_IDR(lpfc_hba_index); 103 #define LPFC_NVMET_BUF_POST 254 104 static int lpfc_vmid_res_alloc(struct lpfc_hba *phba, struct lpfc_vport *vport); 105 106 /** 107 * lpfc_config_port_prep - Perform lpfc initialization prior to config port 108 * @phba: pointer to lpfc hba data structure. 109 * 110 * This routine will do LPFC initialization prior to issuing the CONFIG_PORT 111 * mailbox command. It retrieves the revision information from the HBA and 112 * collects the Vital Product Data (VPD) about the HBA for preparing the 113 * configuration of the HBA. 114 * 115 * Return codes: 116 * 0 - success. 117 * -ERESTART - requests the SLI layer to reset the HBA and try again. 118 * Any other value - indicates an error. 119 **/ 120 int 121 lpfc_config_port_prep(struct lpfc_hba *phba) 122 { 123 lpfc_vpd_t *vp = &phba->vpd; 124 int i = 0, rc; 125 LPFC_MBOXQ_t *pmb; 126 MAILBOX_t *mb; 127 char *lpfc_vpd_data = NULL; 128 uint16_t offset = 0; 129 static char licensed[56] = 130 "key unlock for use with gnu public licensed code only\0"; 131 static int init_key = 1; 132 133 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 134 if (!pmb) { 135 phba->link_state = LPFC_HBA_ERROR; 136 return -ENOMEM; 137 } 138 139 mb = &pmb->u.mb; 140 phba->link_state = LPFC_INIT_MBX_CMDS; 141 142 if (lpfc_is_LC_HBA(phba->pcidev->device)) { 143 if (init_key) { 144 uint32_t *ptext = (uint32_t *) licensed; 145 146 for (i = 0; i < 56; i += sizeof (uint32_t), ptext++) 147 *ptext = cpu_to_be32(*ptext); 148 init_key = 0; 149 } 150 151 lpfc_read_nv(phba, pmb); 152 memset((char*)mb->un.varRDnvp.rsvd3, 0, 153 sizeof (mb->un.varRDnvp.rsvd3)); 154 memcpy((char*)mb->un.varRDnvp.rsvd3, licensed, 155 sizeof (licensed)); 156 157 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); 158 159 if (rc != MBX_SUCCESS) { 160 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 161 "0324 Config Port initialization " 162 "error, mbxCmd x%x READ_NVPARM, " 163 "mbxStatus x%x\n", 164 mb->mbxCommand, mb->mbxStatus); 165 mempool_free(pmb, phba->mbox_mem_pool); 166 return -ERESTART; 167 } 168 memcpy(phba->wwnn, (char *)mb->un.varRDnvp.nodename, 169 sizeof(phba->wwnn)); 170 memcpy(phba->wwpn, (char *)mb->un.varRDnvp.portname, 171 sizeof(phba->wwpn)); 172 } 173 174 /* 175 * Clear all option bits except LPFC_SLI3_BG_ENABLED, 176 * which was already set in lpfc_get_cfgparam() 177 */ 178 phba->sli3_options &= (uint32_t)LPFC_SLI3_BG_ENABLED; 179 180 /* Setup and issue mailbox READ REV command */ 181 lpfc_read_rev(phba, pmb); 182 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); 183 if (rc != MBX_SUCCESS) { 184 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 185 "0439 Adapter failed to init, mbxCmd x%x " 186 "READ_REV, mbxStatus x%x\n", 187 mb->mbxCommand, mb->mbxStatus); 188 mempool_free( pmb, phba->mbox_mem_pool); 189 return -ERESTART; 190 } 191 192 193 /* 194 * The value of rr must be 1 since the driver set the cv field to 1. 195 * This setting requires the FW to set all revision fields. 196 */ 197 if (mb->un.varRdRev.rr == 0) { 198 vp->rev.rBit = 0; 199 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 200 "0440 Adapter failed to init, READ_REV has " 201 "missing revision information.\n"); 202 mempool_free(pmb, phba->mbox_mem_pool); 203 return -ERESTART; 204 } 205 206 if (phba->sli_rev == 3 && !mb->un.varRdRev.v3rsp) { 207 mempool_free(pmb, phba->mbox_mem_pool); 208 return -EINVAL; 209 } 210 211 /* Save information as VPD data */ 212 vp->rev.rBit = 1; 213 memcpy(&vp->sli3Feat, &mb->un.varRdRev.sli3Feat, sizeof(uint32_t)); 214 vp->rev.sli1FwRev = mb->un.varRdRev.sli1FwRev; 215 memcpy(vp->rev.sli1FwName, (char*) mb->un.varRdRev.sli1FwName, 16); 216 vp->rev.sli2FwRev = mb->un.varRdRev.sli2FwRev; 217 memcpy(vp->rev.sli2FwName, (char *) mb->un.varRdRev.sli2FwName, 16); 218 vp->rev.biuRev = mb->un.varRdRev.biuRev; 219 vp->rev.smRev = mb->un.varRdRev.smRev; 220 vp->rev.smFwRev = mb->un.varRdRev.un.smFwRev; 221 vp->rev.endecRev = mb->un.varRdRev.endecRev; 222 vp->rev.fcphHigh = mb->un.varRdRev.fcphHigh; 223 vp->rev.fcphLow = mb->un.varRdRev.fcphLow; 224 vp->rev.feaLevelHigh = mb->un.varRdRev.feaLevelHigh; 225 vp->rev.feaLevelLow = mb->un.varRdRev.feaLevelLow; 226 vp->rev.postKernRev = mb->un.varRdRev.postKernRev; 227 vp->rev.opFwRev = mb->un.varRdRev.opFwRev; 228 229 /* If the sli feature level is less then 9, we must 230 * tear down all RPIs and VPIs on link down if NPIV 231 * is enabled. 232 */ 233 if (vp->rev.feaLevelHigh < 9) 234 phba->sli3_options |= LPFC_SLI3_VPORT_TEARDOWN; 235 236 if (lpfc_is_LC_HBA(phba->pcidev->device)) 237 memcpy(phba->RandomData, (char *)&mb->un.varWords[24], 238 sizeof (phba->RandomData)); 239 240 /* Get adapter VPD information */ 241 lpfc_vpd_data = kmalloc(DMP_VPD_SIZE, GFP_KERNEL); 242 if (!lpfc_vpd_data) 243 goto out_free_mbox; 244 do { 245 lpfc_dump_mem(phba, pmb, offset, DMP_REGION_VPD); 246 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); 247 248 if (rc != MBX_SUCCESS) { 249 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 250 "0441 VPD not present on adapter, " 251 "mbxCmd x%x DUMP VPD, mbxStatus x%x\n", 252 mb->mbxCommand, mb->mbxStatus); 253 mb->un.varDmp.word_cnt = 0; 254 } 255 /* dump mem may return a zero when finished or we got a 256 * mailbox error, either way we are done. 257 */ 258 if (mb->un.varDmp.word_cnt == 0) 259 break; 260 261 if (mb->un.varDmp.word_cnt > DMP_VPD_SIZE - offset) 262 mb->un.varDmp.word_cnt = DMP_VPD_SIZE - offset; 263 lpfc_sli_pcimem_bcopy(((uint8_t *)mb) + DMP_RSP_OFFSET, 264 lpfc_vpd_data + offset, 265 mb->un.varDmp.word_cnt); 266 offset += mb->un.varDmp.word_cnt; 267 } while (mb->un.varDmp.word_cnt && offset < DMP_VPD_SIZE); 268 269 lpfc_parse_vpd(phba, lpfc_vpd_data, offset); 270 271 kfree(lpfc_vpd_data); 272 out_free_mbox: 273 mempool_free(pmb, phba->mbox_mem_pool); 274 return 0; 275 } 276 277 /** 278 * lpfc_config_async_cmpl - Completion handler for config async event mbox cmd 279 * @phba: pointer to lpfc hba data structure. 280 * @pmboxq: pointer to the driver internal queue element for mailbox command. 281 * 282 * This is the completion handler for driver's configuring asynchronous event 283 * mailbox command to the device. If the mailbox command returns successfully, 284 * it will set internal async event support flag to 1; otherwise, it will 285 * set internal async event support flag to 0. 286 **/ 287 static void 288 lpfc_config_async_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq) 289 { 290 if (pmboxq->u.mb.mbxStatus == MBX_SUCCESS) 291 phba->temp_sensor_support = 1; 292 else 293 phba->temp_sensor_support = 0; 294 mempool_free(pmboxq, phba->mbox_mem_pool); 295 return; 296 } 297 298 /** 299 * lpfc_dump_wakeup_param_cmpl - dump memory mailbox command completion handler 300 * @phba: pointer to lpfc hba data structure. 301 * @pmboxq: pointer to the driver internal queue element for mailbox command. 302 * 303 * This is the completion handler for dump mailbox command for getting 304 * wake up parameters. When this command complete, the response contain 305 * Option rom version of the HBA. This function translate the version number 306 * into a human readable string and store it in OptionROMVersion. 307 **/ 308 static void 309 lpfc_dump_wakeup_param_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq) 310 { 311 struct prog_id *prg; 312 uint32_t prog_id_word; 313 char dist = ' '; 314 /* character array used for decoding dist type. */ 315 char dist_char[] = "nabx"; 316 317 if (pmboxq->u.mb.mbxStatus != MBX_SUCCESS) { 318 mempool_free(pmboxq, phba->mbox_mem_pool); 319 return; 320 } 321 322 prg = (struct prog_id *) &prog_id_word; 323 324 /* word 7 contain option rom version */ 325 prog_id_word = pmboxq->u.mb.un.varWords[7]; 326 327 /* Decode the Option rom version word to a readable string */ 328 dist = dist_char[prg->dist]; 329 330 if ((prg->dist == 3) && (prg->num == 0)) 331 snprintf(phba->OptionROMVersion, 32, "%d.%d%d", 332 prg->ver, prg->rev, prg->lev); 333 else 334 snprintf(phba->OptionROMVersion, 32, "%d.%d%d%c%d", 335 prg->ver, prg->rev, prg->lev, 336 dist, prg->num); 337 mempool_free(pmboxq, phba->mbox_mem_pool); 338 return; 339 } 340 341 /** 342 * lpfc_update_vport_wwn - Updates the fc_nodename, fc_portname, 343 * @vport: pointer to lpfc vport data structure. 344 * 345 * 346 * Return codes 347 * None. 348 **/ 349 void 350 lpfc_update_vport_wwn(struct lpfc_vport *vport) 351 { 352 struct lpfc_hba *phba = vport->phba; 353 354 /* 355 * If the name is empty or there exists a soft name 356 * then copy the service params name, otherwise use the fc name 357 */ 358 if (vport->fc_nodename.u.wwn[0] == 0) 359 memcpy(&vport->fc_nodename, &vport->fc_sparam.nodeName, 360 sizeof(struct lpfc_name)); 361 else 362 memcpy(&vport->fc_sparam.nodeName, &vport->fc_nodename, 363 sizeof(struct lpfc_name)); 364 365 /* 366 * If the port name has changed, then set the Param changes flag 367 * to unreg the login 368 */ 369 if (vport->fc_portname.u.wwn[0] != 0 && 370 memcmp(&vport->fc_portname, &vport->fc_sparam.portName, 371 sizeof(struct lpfc_name))) { 372 vport->vport_flag |= FAWWPN_PARAM_CHG; 373 374 if (phba->sli_rev == LPFC_SLI_REV4 && 375 vport->port_type == LPFC_PHYSICAL_PORT && 376 phba->sli4_hba.fawwpn_flag & LPFC_FAWWPN_FABRIC) { 377 if (!(phba->sli4_hba.fawwpn_flag & LPFC_FAWWPN_CONFIG)) 378 phba->sli4_hba.fawwpn_flag &= 379 ~LPFC_FAWWPN_FABRIC; 380 lpfc_printf_log(phba, KERN_INFO, 381 LOG_SLI | LOG_DISCOVERY | LOG_ELS, 382 "2701 FA-PWWN change WWPN from %llx to " 383 "%llx: vflag x%x fawwpn_flag x%x\n", 384 wwn_to_u64(vport->fc_portname.u.wwn), 385 wwn_to_u64 386 (vport->fc_sparam.portName.u.wwn), 387 vport->vport_flag, 388 phba->sli4_hba.fawwpn_flag); 389 memcpy(&vport->fc_portname, &vport->fc_sparam.portName, 390 sizeof(struct lpfc_name)); 391 } 392 } 393 394 if (vport->fc_portname.u.wwn[0] == 0) 395 memcpy(&vport->fc_portname, &vport->fc_sparam.portName, 396 sizeof(struct lpfc_name)); 397 else 398 memcpy(&vport->fc_sparam.portName, &vport->fc_portname, 399 sizeof(struct lpfc_name)); 400 } 401 402 /** 403 * lpfc_config_port_post - Perform lpfc initialization after config port 404 * @phba: pointer to lpfc hba data structure. 405 * 406 * This routine will do LPFC initialization after the CONFIG_PORT mailbox 407 * command call. It performs all internal resource and state setups on the 408 * port: post IOCB buffers, enable appropriate host interrupt attentions, 409 * ELS ring timers, etc. 410 * 411 * Return codes 412 * 0 - success. 413 * Any other value - error. 414 **/ 415 int 416 lpfc_config_port_post(struct lpfc_hba *phba) 417 { 418 struct lpfc_vport *vport = phba->pport; 419 struct Scsi_Host *shost = lpfc_shost_from_vport(vport); 420 LPFC_MBOXQ_t *pmb; 421 MAILBOX_t *mb; 422 struct lpfc_dmabuf *mp; 423 struct lpfc_sli *psli = &phba->sli; 424 uint32_t status, timeout; 425 int i, j; 426 int rc; 427 428 spin_lock_irq(&phba->hbalock); 429 /* 430 * If the Config port completed correctly the HBA is not 431 * over heated any more. 432 */ 433 if (phba->over_temp_state == HBA_OVER_TEMP) 434 phba->over_temp_state = HBA_NORMAL_TEMP; 435 spin_unlock_irq(&phba->hbalock); 436 437 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 438 if (!pmb) { 439 phba->link_state = LPFC_HBA_ERROR; 440 return -ENOMEM; 441 } 442 mb = &pmb->u.mb; 443 444 /* Get login parameters for NID. */ 445 rc = lpfc_read_sparam(phba, pmb, 0); 446 if (rc) { 447 mempool_free(pmb, phba->mbox_mem_pool); 448 return -ENOMEM; 449 } 450 451 pmb->vport = vport; 452 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) { 453 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 454 "0448 Adapter failed init, mbxCmd x%x " 455 "READ_SPARM mbxStatus x%x\n", 456 mb->mbxCommand, mb->mbxStatus); 457 phba->link_state = LPFC_HBA_ERROR; 458 lpfc_mbox_rsrc_cleanup(phba, pmb, MBOX_THD_UNLOCKED); 459 return -EIO; 460 } 461 462 mp = (struct lpfc_dmabuf *)pmb->ctx_buf; 463 464 /* This dmabuf was allocated by lpfc_read_sparam. The dmabuf is no 465 * longer needed. Prevent unintended ctx_buf access as the mbox is 466 * reused. 467 */ 468 memcpy(&vport->fc_sparam, mp->virt, sizeof (struct serv_parm)); 469 lpfc_mbuf_free(phba, mp->virt, mp->phys); 470 kfree(mp); 471 pmb->ctx_buf = NULL; 472 lpfc_update_vport_wwn(vport); 473 474 /* Update the fc_host data structures with new wwn. */ 475 fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn); 476 fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn); 477 fc_host_max_npiv_vports(shost) = phba->max_vpi; 478 479 /* If no serial number in VPD data, use low 6 bytes of WWNN */ 480 /* This should be consolidated into parse_vpd ? - mr */ 481 if (phba->SerialNumber[0] == 0) { 482 uint8_t *outptr; 483 484 outptr = &vport->fc_nodename.u.s.IEEE[0]; 485 for (i = 0; i < 12; i++) { 486 status = *outptr++; 487 j = ((status & 0xf0) >> 4); 488 if (j <= 9) 489 phba->SerialNumber[i] = 490 (char)((uint8_t) 0x30 + (uint8_t) j); 491 else 492 phba->SerialNumber[i] = 493 (char)((uint8_t) 0x61 + (uint8_t) (j - 10)); 494 i++; 495 j = (status & 0xf); 496 if (j <= 9) 497 phba->SerialNumber[i] = 498 (char)((uint8_t) 0x30 + (uint8_t) j); 499 else 500 phba->SerialNumber[i] = 501 (char)((uint8_t) 0x61 + (uint8_t) (j - 10)); 502 } 503 } 504 505 lpfc_read_config(phba, pmb); 506 pmb->vport = vport; 507 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) { 508 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 509 "0453 Adapter failed to init, mbxCmd x%x " 510 "READ_CONFIG, mbxStatus x%x\n", 511 mb->mbxCommand, mb->mbxStatus); 512 phba->link_state = LPFC_HBA_ERROR; 513 mempool_free( pmb, phba->mbox_mem_pool); 514 return -EIO; 515 } 516 517 /* Check if the port is disabled */ 518 lpfc_sli_read_link_ste(phba); 519 520 /* Reset the DFT_HBA_Q_DEPTH to the max xri */ 521 if (phba->cfg_hba_queue_depth > mb->un.varRdConfig.max_xri) { 522 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 523 "3359 HBA queue depth changed from %d to %d\n", 524 phba->cfg_hba_queue_depth, 525 mb->un.varRdConfig.max_xri); 526 phba->cfg_hba_queue_depth = mb->un.varRdConfig.max_xri; 527 } 528 529 phba->lmt = mb->un.varRdConfig.lmt; 530 531 /* Get the default values for Model Name and Description */ 532 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc); 533 534 phba->link_state = LPFC_LINK_DOWN; 535 536 /* Only process IOCBs on ELS ring till hba_state is READY */ 537 if (psli->sli3_ring[LPFC_EXTRA_RING].sli.sli3.cmdringaddr) 538 psli->sli3_ring[LPFC_EXTRA_RING].flag |= LPFC_STOP_IOCB_EVENT; 539 if (psli->sli3_ring[LPFC_FCP_RING].sli.sli3.cmdringaddr) 540 psli->sli3_ring[LPFC_FCP_RING].flag |= LPFC_STOP_IOCB_EVENT; 541 542 /* Post receive buffers for desired rings */ 543 if (phba->sli_rev != 3) 544 lpfc_post_rcv_buf(phba); 545 546 /* 547 * Configure HBA MSI-X attention conditions to messages if MSI-X mode 548 */ 549 if (phba->intr_type == MSIX) { 550 rc = lpfc_config_msi(phba, pmb); 551 if (rc) { 552 mempool_free(pmb, phba->mbox_mem_pool); 553 return -EIO; 554 } 555 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); 556 if (rc != MBX_SUCCESS) { 557 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 558 "0352 Config MSI mailbox command " 559 "failed, mbxCmd x%x, mbxStatus x%x\n", 560 pmb->u.mb.mbxCommand, 561 pmb->u.mb.mbxStatus); 562 mempool_free(pmb, phba->mbox_mem_pool); 563 return -EIO; 564 } 565 } 566 567 spin_lock_irq(&phba->hbalock); 568 /* Initialize ERATT handling flag */ 569 phba->hba_flag &= ~HBA_ERATT_HANDLED; 570 571 /* Enable appropriate host interrupts */ 572 if (lpfc_readl(phba->HCregaddr, &status)) { 573 spin_unlock_irq(&phba->hbalock); 574 return -EIO; 575 } 576 status |= HC_MBINT_ENA | HC_ERINT_ENA | HC_LAINT_ENA; 577 if (psli->num_rings > 0) 578 status |= HC_R0INT_ENA; 579 if (psli->num_rings > 1) 580 status |= HC_R1INT_ENA; 581 if (psli->num_rings > 2) 582 status |= HC_R2INT_ENA; 583 if (psli->num_rings > 3) 584 status |= HC_R3INT_ENA; 585 586 if ((phba->cfg_poll & ENABLE_FCP_RING_POLLING) && 587 (phba->cfg_poll & DISABLE_FCP_RING_INT)) 588 status &= ~(HC_R0INT_ENA); 589 590 writel(status, phba->HCregaddr); 591 readl(phba->HCregaddr); /* flush */ 592 spin_unlock_irq(&phba->hbalock); 593 594 /* Set up ring-0 (ELS) timer */ 595 timeout = phba->fc_ratov * 2; 596 mod_timer(&vport->els_tmofunc, 597 jiffies + msecs_to_jiffies(1000 * timeout)); 598 /* Set up heart beat (HB) timer */ 599 mod_timer(&phba->hb_tmofunc, 600 jiffies + msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL)); 601 phba->hba_flag &= ~(HBA_HBEAT_INP | HBA_HBEAT_TMO); 602 phba->last_completion_time = jiffies; 603 /* Set up error attention (ERATT) polling timer */ 604 mod_timer(&phba->eratt_poll, 605 jiffies + msecs_to_jiffies(1000 * phba->eratt_poll_interval)); 606 607 if (phba->hba_flag & LINK_DISABLED) { 608 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 609 "2598 Adapter Link is disabled.\n"); 610 lpfc_down_link(phba, pmb); 611 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl; 612 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT); 613 if ((rc != MBX_SUCCESS) && (rc != MBX_BUSY)) { 614 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 615 "2599 Adapter failed to issue DOWN_LINK" 616 " mbox command rc 0x%x\n", rc); 617 618 mempool_free(pmb, phba->mbox_mem_pool); 619 return -EIO; 620 } 621 } else if (phba->cfg_suppress_link_up == LPFC_INITIALIZE_LINK) { 622 mempool_free(pmb, phba->mbox_mem_pool); 623 rc = phba->lpfc_hba_init_link(phba, MBX_NOWAIT); 624 if (rc) 625 return rc; 626 } 627 /* MBOX buffer will be freed in mbox compl */ 628 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 629 if (!pmb) { 630 phba->link_state = LPFC_HBA_ERROR; 631 return -ENOMEM; 632 } 633 634 lpfc_config_async(phba, pmb, LPFC_ELS_RING); 635 pmb->mbox_cmpl = lpfc_config_async_cmpl; 636 pmb->vport = phba->pport; 637 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT); 638 639 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) { 640 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 641 "0456 Adapter failed to issue " 642 "ASYNCEVT_ENABLE mbox status x%x\n", 643 rc); 644 mempool_free(pmb, phba->mbox_mem_pool); 645 } 646 647 /* Get Option rom version */ 648 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 649 if (!pmb) { 650 phba->link_state = LPFC_HBA_ERROR; 651 return -ENOMEM; 652 } 653 654 lpfc_dump_wakeup_param(phba, pmb); 655 pmb->mbox_cmpl = lpfc_dump_wakeup_param_cmpl; 656 pmb->vport = phba->pport; 657 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT); 658 659 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) { 660 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 661 "0435 Adapter failed " 662 "to get Option ROM version status x%x\n", rc); 663 mempool_free(pmb, phba->mbox_mem_pool); 664 } 665 666 return 0; 667 } 668 669 /** 670 * lpfc_sli4_refresh_params - update driver copy of params. 671 * @phba: Pointer to HBA context object. 672 * 673 * This is called to refresh driver copy of dynamic fields from the 674 * common_get_sli4_parameters descriptor. 675 **/ 676 int 677 lpfc_sli4_refresh_params(struct lpfc_hba *phba) 678 { 679 LPFC_MBOXQ_t *mboxq; 680 struct lpfc_mqe *mqe; 681 struct lpfc_sli4_parameters *mbx_sli4_parameters; 682 int length, rc; 683 684 mboxq = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 685 if (!mboxq) 686 return -ENOMEM; 687 688 mqe = &mboxq->u.mqe; 689 /* Read the port's SLI4 Config Parameters */ 690 length = (sizeof(struct lpfc_mbx_get_sli4_parameters) - 691 sizeof(struct lpfc_sli4_cfg_mhdr)); 692 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON, 693 LPFC_MBOX_OPCODE_GET_SLI4_PARAMETERS, 694 length, LPFC_SLI4_MBX_EMBED); 695 696 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); 697 if (unlikely(rc)) { 698 mempool_free(mboxq, phba->mbox_mem_pool); 699 return rc; 700 } 701 mbx_sli4_parameters = &mqe->un.get_sli4_parameters.sli4_parameters; 702 phba->sli4_hba.pc_sli4_params.mi_cap = 703 bf_get(cfg_mi_ver, mbx_sli4_parameters); 704 705 /* Are we forcing MI off via module parameter? */ 706 if (phba->cfg_enable_mi) 707 phba->sli4_hba.pc_sli4_params.mi_ver = 708 bf_get(cfg_mi_ver, mbx_sli4_parameters); 709 else 710 phba->sli4_hba.pc_sli4_params.mi_ver = 0; 711 712 phba->sli4_hba.pc_sli4_params.cmf = 713 bf_get(cfg_cmf, mbx_sli4_parameters); 714 phba->sli4_hba.pc_sli4_params.pls = 715 bf_get(cfg_pvl, mbx_sli4_parameters); 716 717 mempool_free(mboxq, phba->mbox_mem_pool); 718 return rc; 719 } 720 721 /** 722 * lpfc_hba_init_link - Initialize the FC link 723 * @phba: pointer to lpfc hba data structure. 724 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT 725 * 726 * This routine will issue the INIT_LINK mailbox command call. 727 * It is available to other drivers through the lpfc_hba data 728 * structure for use as a delayed link up mechanism with the 729 * module parameter lpfc_suppress_link_up. 730 * 731 * Return code 732 * 0 - success 733 * Any other value - error 734 **/ 735 static int 736 lpfc_hba_init_link(struct lpfc_hba *phba, uint32_t flag) 737 { 738 return lpfc_hba_init_link_fc_topology(phba, phba->cfg_topology, flag); 739 } 740 741 /** 742 * lpfc_hba_init_link_fc_topology - Initialize FC link with desired topology 743 * @phba: pointer to lpfc hba data structure. 744 * @fc_topology: desired fc topology. 745 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT 746 * 747 * This routine will issue the INIT_LINK mailbox command call. 748 * It is available to other drivers through the lpfc_hba data 749 * structure for use as a delayed link up mechanism with the 750 * module parameter lpfc_suppress_link_up. 751 * 752 * Return code 753 * 0 - success 754 * Any other value - error 755 **/ 756 int 757 lpfc_hba_init_link_fc_topology(struct lpfc_hba *phba, uint32_t fc_topology, 758 uint32_t flag) 759 { 760 struct lpfc_vport *vport = phba->pport; 761 LPFC_MBOXQ_t *pmb; 762 MAILBOX_t *mb; 763 int rc; 764 765 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 766 if (!pmb) { 767 phba->link_state = LPFC_HBA_ERROR; 768 return -ENOMEM; 769 } 770 mb = &pmb->u.mb; 771 pmb->vport = vport; 772 773 if ((phba->cfg_link_speed > LPFC_USER_LINK_SPEED_MAX) || 774 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_1G) && 775 !(phba->lmt & LMT_1Gb)) || 776 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_2G) && 777 !(phba->lmt & LMT_2Gb)) || 778 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_4G) && 779 !(phba->lmt & LMT_4Gb)) || 780 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_8G) && 781 !(phba->lmt & LMT_8Gb)) || 782 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_10G) && 783 !(phba->lmt & LMT_10Gb)) || 784 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_16G) && 785 !(phba->lmt & LMT_16Gb)) || 786 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_32G) && 787 !(phba->lmt & LMT_32Gb)) || 788 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_64G) && 789 !(phba->lmt & LMT_64Gb))) { 790 /* Reset link speed to auto */ 791 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 792 "1302 Invalid speed for this board:%d " 793 "Reset link speed to auto.\n", 794 phba->cfg_link_speed); 795 phba->cfg_link_speed = LPFC_USER_LINK_SPEED_AUTO; 796 } 797 lpfc_init_link(phba, pmb, fc_topology, phba->cfg_link_speed); 798 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl; 799 if (phba->sli_rev < LPFC_SLI_REV4) 800 lpfc_set_loopback_flag(phba); 801 rc = lpfc_sli_issue_mbox(phba, pmb, flag); 802 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) { 803 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 804 "0498 Adapter failed to init, mbxCmd x%x " 805 "INIT_LINK, mbxStatus x%x\n", 806 mb->mbxCommand, mb->mbxStatus); 807 if (phba->sli_rev <= LPFC_SLI_REV3) { 808 /* Clear all interrupt enable conditions */ 809 writel(0, phba->HCregaddr); 810 readl(phba->HCregaddr); /* flush */ 811 /* Clear all pending interrupts */ 812 writel(0xffffffff, phba->HAregaddr); 813 readl(phba->HAregaddr); /* flush */ 814 } 815 phba->link_state = LPFC_HBA_ERROR; 816 if (rc != MBX_BUSY || flag == MBX_POLL) 817 mempool_free(pmb, phba->mbox_mem_pool); 818 return -EIO; 819 } 820 phba->cfg_suppress_link_up = LPFC_INITIALIZE_LINK; 821 if (flag == MBX_POLL) 822 mempool_free(pmb, phba->mbox_mem_pool); 823 824 return 0; 825 } 826 827 /** 828 * lpfc_hba_down_link - this routine downs the FC link 829 * @phba: pointer to lpfc hba data structure. 830 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT 831 * 832 * This routine will issue the DOWN_LINK mailbox command call. 833 * It is available to other drivers through the lpfc_hba data 834 * structure for use to stop the link. 835 * 836 * Return code 837 * 0 - success 838 * Any other value - error 839 **/ 840 static int 841 lpfc_hba_down_link(struct lpfc_hba *phba, uint32_t flag) 842 { 843 LPFC_MBOXQ_t *pmb; 844 int rc; 845 846 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 847 if (!pmb) { 848 phba->link_state = LPFC_HBA_ERROR; 849 return -ENOMEM; 850 } 851 852 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 853 "0491 Adapter Link is disabled.\n"); 854 lpfc_down_link(phba, pmb); 855 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl; 856 rc = lpfc_sli_issue_mbox(phba, pmb, flag); 857 if ((rc != MBX_SUCCESS) && (rc != MBX_BUSY)) { 858 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 859 "2522 Adapter failed to issue DOWN_LINK" 860 " mbox command rc 0x%x\n", rc); 861 862 mempool_free(pmb, phba->mbox_mem_pool); 863 return -EIO; 864 } 865 if (flag == MBX_POLL) 866 mempool_free(pmb, phba->mbox_mem_pool); 867 868 return 0; 869 } 870 871 /** 872 * lpfc_hba_down_prep - Perform lpfc uninitialization prior to HBA reset 873 * @phba: pointer to lpfc HBA data structure. 874 * 875 * This routine will do LPFC uninitialization before the HBA is reset when 876 * bringing down the SLI Layer. 877 * 878 * Return codes 879 * 0 - success. 880 * Any other value - error. 881 **/ 882 int 883 lpfc_hba_down_prep(struct lpfc_hba *phba) 884 { 885 struct lpfc_vport **vports; 886 int i; 887 888 if (phba->sli_rev <= LPFC_SLI_REV3) { 889 /* Disable interrupts */ 890 writel(0, phba->HCregaddr); 891 readl(phba->HCregaddr); /* flush */ 892 } 893 894 if (phba->pport->load_flag & FC_UNLOADING) 895 lpfc_cleanup_discovery_resources(phba->pport); 896 else { 897 vports = lpfc_create_vport_work_array(phba); 898 if (vports != NULL) 899 for (i = 0; i <= phba->max_vports && 900 vports[i] != NULL; i++) 901 lpfc_cleanup_discovery_resources(vports[i]); 902 lpfc_destroy_vport_work_array(phba, vports); 903 } 904 return 0; 905 } 906 907 /** 908 * lpfc_sli4_free_sp_events - Cleanup sp_queue_events to free 909 * rspiocb which got deferred 910 * 911 * @phba: pointer to lpfc HBA data structure. 912 * 913 * This routine will cleanup completed slow path events after HBA is reset 914 * when bringing down the SLI Layer. 915 * 916 * 917 * Return codes 918 * void. 919 **/ 920 static void 921 lpfc_sli4_free_sp_events(struct lpfc_hba *phba) 922 { 923 struct lpfc_iocbq *rspiocbq; 924 struct hbq_dmabuf *dmabuf; 925 struct lpfc_cq_event *cq_event; 926 927 spin_lock_irq(&phba->hbalock); 928 phba->hba_flag &= ~HBA_SP_QUEUE_EVT; 929 spin_unlock_irq(&phba->hbalock); 930 931 while (!list_empty(&phba->sli4_hba.sp_queue_event)) { 932 /* Get the response iocb from the head of work queue */ 933 spin_lock_irq(&phba->hbalock); 934 list_remove_head(&phba->sli4_hba.sp_queue_event, 935 cq_event, struct lpfc_cq_event, list); 936 spin_unlock_irq(&phba->hbalock); 937 938 switch (bf_get(lpfc_wcqe_c_code, &cq_event->cqe.wcqe_cmpl)) { 939 case CQE_CODE_COMPL_WQE: 940 rspiocbq = container_of(cq_event, struct lpfc_iocbq, 941 cq_event); 942 lpfc_sli_release_iocbq(phba, rspiocbq); 943 break; 944 case CQE_CODE_RECEIVE: 945 case CQE_CODE_RECEIVE_V1: 946 dmabuf = container_of(cq_event, struct hbq_dmabuf, 947 cq_event); 948 lpfc_in_buf_free(phba, &dmabuf->dbuf); 949 } 950 } 951 } 952 953 /** 954 * lpfc_hba_free_post_buf - Perform lpfc uninitialization after HBA reset 955 * @phba: pointer to lpfc HBA data structure. 956 * 957 * This routine will cleanup posted ELS buffers after the HBA is reset 958 * when bringing down the SLI Layer. 959 * 960 * 961 * Return codes 962 * void. 963 **/ 964 static void 965 lpfc_hba_free_post_buf(struct lpfc_hba *phba) 966 { 967 struct lpfc_sli *psli = &phba->sli; 968 struct lpfc_sli_ring *pring; 969 struct lpfc_dmabuf *mp, *next_mp; 970 LIST_HEAD(buflist); 971 int count; 972 973 if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED) 974 lpfc_sli_hbqbuf_free_all(phba); 975 else { 976 /* Cleanup preposted buffers on the ELS ring */ 977 pring = &psli->sli3_ring[LPFC_ELS_RING]; 978 spin_lock_irq(&phba->hbalock); 979 list_splice_init(&pring->postbufq, &buflist); 980 spin_unlock_irq(&phba->hbalock); 981 982 count = 0; 983 list_for_each_entry_safe(mp, next_mp, &buflist, list) { 984 list_del(&mp->list); 985 count++; 986 lpfc_mbuf_free(phba, mp->virt, mp->phys); 987 kfree(mp); 988 } 989 990 spin_lock_irq(&phba->hbalock); 991 pring->postbufq_cnt -= count; 992 spin_unlock_irq(&phba->hbalock); 993 } 994 } 995 996 /** 997 * lpfc_hba_clean_txcmplq - Perform lpfc uninitialization after HBA reset 998 * @phba: pointer to lpfc HBA data structure. 999 * 1000 * This routine will cleanup the txcmplq after the HBA is reset when bringing 1001 * down the SLI Layer. 1002 * 1003 * Return codes 1004 * void 1005 **/ 1006 static void 1007 lpfc_hba_clean_txcmplq(struct lpfc_hba *phba) 1008 { 1009 struct lpfc_sli *psli = &phba->sli; 1010 struct lpfc_queue *qp = NULL; 1011 struct lpfc_sli_ring *pring; 1012 LIST_HEAD(completions); 1013 int i; 1014 struct lpfc_iocbq *piocb, *next_iocb; 1015 1016 if (phba->sli_rev != LPFC_SLI_REV4) { 1017 for (i = 0; i < psli->num_rings; i++) { 1018 pring = &psli->sli3_ring[i]; 1019 spin_lock_irq(&phba->hbalock); 1020 /* At this point in time the HBA is either reset or DOA 1021 * Nothing should be on txcmplq as it will 1022 * NEVER complete. 1023 */ 1024 list_splice_init(&pring->txcmplq, &completions); 1025 pring->txcmplq_cnt = 0; 1026 spin_unlock_irq(&phba->hbalock); 1027 1028 lpfc_sli_abort_iocb_ring(phba, pring); 1029 } 1030 /* Cancel all the IOCBs from the completions list */ 1031 lpfc_sli_cancel_iocbs(phba, &completions, 1032 IOSTAT_LOCAL_REJECT, IOERR_SLI_ABORTED); 1033 return; 1034 } 1035 list_for_each_entry(qp, &phba->sli4_hba.lpfc_wq_list, wq_list) { 1036 pring = qp->pring; 1037 if (!pring) 1038 continue; 1039 spin_lock_irq(&pring->ring_lock); 1040 list_for_each_entry_safe(piocb, next_iocb, 1041 &pring->txcmplq, list) 1042 piocb->cmd_flag &= ~LPFC_IO_ON_TXCMPLQ; 1043 list_splice_init(&pring->txcmplq, &completions); 1044 pring->txcmplq_cnt = 0; 1045 spin_unlock_irq(&pring->ring_lock); 1046 lpfc_sli_abort_iocb_ring(phba, pring); 1047 } 1048 /* Cancel all the IOCBs from the completions list */ 1049 lpfc_sli_cancel_iocbs(phba, &completions, 1050 IOSTAT_LOCAL_REJECT, IOERR_SLI_ABORTED); 1051 } 1052 1053 /** 1054 * lpfc_hba_down_post_s3 - Perform lpfc uninitialization after HBA reset 1055 * @phba: pointer to lpfc HBA data structure. 1056 * 1057 * This routine will do uninitialization after the HBA is reset when bring 1058 * down the SLI Layer. 1059 * 1060 * Return codes 1061 * 0 - success. 1062 * Any other value - error. 1063 **/ 1064 static int 1065 lpfc_hba_down_post_s3(struct lpfc_hba *phba) 1066 { 1067 lpfc_hba_free_post_buf(phba); 1068 lpfc_hba_clean_txcmplq(phba); 1069 return 0; 1070 } 1071 1072 /** 1073 * lpfc_hba_down_post_s4 - Perform lpfc uninitialization after HBA reset 1074 * @phba: pointer to lpfc HBA data structure. 1075 * 1076 * This routine will do uninitialization after the HBA is reset when bring 1077 * down the SLI Layer. 1078 * 1079 * Return codes 1080 * 0 - success. 1081 * Any other value - error. 1082 **/ 1083 static int 1084 lpfc_hba_down_post_s4(struct lpfc_hba *phba) 1085 { 1086 struct lpfc_io_buf *psb, *psb_next; 1087 struct lpfc_async_xchg_ctx *ctxp, *ctxp_next; 1088 struct lpfc_sli4_hdw_queue *qp; 1089 LIST_HEAD(aborts); 1090 LIST_HEAD(nvme_aborts); 1091 LIST_HEAD(nvmet_aborts); 1092 struct lpfc_sglq *sglq_entry = NULL; 1093 int cnt, idx; 1094 1095 1096 lpfc_sli_hbqbuf_free_all(phba); 1097 lpfc_hba_clean_txcmplq(phba); 1098 1099 /* At this point in time the HBA is either reset or DOA. Either 1100 * way, nothing should be on lpfc_abts_els_sgl_list, it needs to be 1101 * on the lpfc_els_sgl_list so that it can either be freed if the 1102 * driver is unloading or reposted if the driver is restarting 1103 * the port. 1104 */ 1105 1106 /* sgl_list_lock required because worker thread uses this 1107 * list. 1108 */ 1109 spin_lock_irq(&phba->sli4_hba.sgl_list_lock); 1110 list_for_each_entry(sglq_entry, 1111 &phba->sli4_hba.lpfc_abts_els_sgl_list, list) 1112 sglq_entry->state = SGL_FREED; 1113 1114 list_splice_init(&phba->sli4_hba.lpfc_abts_els_sgl_list, 1115 &phba->sli4_hba.lpfc_els_sgl_list); 1116 1117 1118 spin_unlock_irq(&phba->sli4_hba.sgl_list_lock); 1119 1120 /* abts_xxxx_buf_list_lock required because worker thread uses this 1121 * list. 1122 */ 1123 spin_lock_irq(&phba->hbalock); 1124 cnt = 0; 1125 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { 1126 qp = &phba->sli4_hba.hdwq[idx]; 1127 1128 spin_lock(&qp->abts_io_buf_list_lock); 1129 list_splice_init(&qp->lpfc_abts_io_buf_list, 1130 &aborts); 1131 1132 list_for_each_entry_safe(psb, psb_next, &aborts, list) { 1133 psb->pCmd = NULL; 1134 psb->status = IOSTAT_SUCCESS; 1135 cnt++; 1136 } 1137 spin_lock(&qp->io_buf_list_put_lock); 1138 list_splice_init(&aborts, &qp->lpfc_io_buf_list_put); 1139 qp->put_io_bufs += qp->abts_scsi_io_bufs; 1140 qp->put_io_bufs += qp->abts_nvme_io_bufs; 1141 qp->abts_scsi_io_bufs = 0; 1142 qp->abts_nvme_io_bufs = 0; 1143 spin_unlock(&qp->io_buf_list_put_lock); 1144 spin_unlock(&qp->abts_io_buf_list_lock); 1145 } 1146 spin_unlock_irq(&phba->hbalock); 1147 1148 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 1149 spin_lock_irq(&phba->sli4_hba.abts_nvmet_buf_list_lock); 1150 list_splice_init(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list, 1151 &nvmet_aborts); 1152 spin_unlock_irq(&phba->sli4_hba.abts_nvmet_buf_list_lock); 1153 list_for_each_entry_safe(ctxp, ctxp_next, &nvmet_aborts, list) { 1154 ctxp->flag &= ~(LPFC_NVME_XBUSY | LPFC_NVME_ABORT_OP); 1155 lpfc_nvmet_ctxbuf_post(phba, ctxp->ctxbuf); 1156 } 1157 } 1158 1159 lpfc_sli4_free_sp_events(phba); 1160 return cnt; 1161 } 1162 1163 /** 1164 * lpfc_hba_down_post - Wrapper func for hba down post routine 1165 * @phba: pointer to lpfc HBA data structure. 1166 * 1167 * This routine wraps the actual SLI3 or SLI4 routine for performing 1168 * uninitialization after the HBA is reset when bring down the SLI Layer. 1169 * 1170 * Return codes 1171 * 0 - success. 1172 * Any other value - error. 1173 **/ 1174 int 1175 lpfc_hba_down_post(struct lpfc_hba *phba) 1176 { 1177 return (*phba->lpfc_hba_down_post)(phba); 1178 } 1179 1180 /** 1181 * lpfc_hb_timeout - The HBA-timer timeout handler 1182 * @t: timer context used to obtain the pointer to lpfc hba data structure. 1183 * 1184 * This is the HBA-timer timeout handler registered to the lpfc driver. When 1185 * this timer fires, a HBA timeout event shall be posted to the lpfc driver 1186 * work-port-events bitmap and the worker thread is notified. This timeout 1187 * event will be used by the worker thread to invoke the actual timeout 1188 * handler routine, lpfc_hb_timeout_handler. Any periodical operations will 1189 * be performed in the timeout handler and the HBA timeout event bit shall 1190 * be cleared by the worker thread after it has taken the event bitmap out. 1191 **/ 1192 static void 1193 lpfc_hb_timeout(struct timer_list *t) 1194 { 1195 struct lpfc_hba *phba; 1196 uint32_t tmo_posted; 1197 unsigned long iflag; 1198 1199 phba = from_timer(phba, t, hb_tmofunc); 1200 1201 /* Check for heart beat timeout conditions */ 1202 spin_lock_irqsave(&phba->pport->work_port_lock, iflag); 1203 tmo_posted = phba->pport->work_port_events & WORKER_HB_TMO; 1204 if (!tmo_posted) 1205 phba->pport->work_port_events |= WORKER_HB_TMO; 1206 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag); 1207 1208 /* Tell the worker thread there is work to do */ 1209 if (!tmo_posted) 1210 lpfc_worker_wake_up(phba); 1211 return; 1212 } 1213 1214 /** 1215 * lpfc_rrq_timeout - The RRQ-timer timeout handler 1216 * @t: timer context used to obtain the pointer to lpfc hba data structure. 1217 * 1218 * This is the RRQ-timer timeout handler registered to the lpfc driver. When 1219 * this timer fires, a RRQ timeout event shall be posted to the lpfc driver 1220 * work-port-events bitmap and the worker thread is notified. This timeout 1221 * event will be used by the worker thread to invoke the actual timeout 1222 * handler routine, lpfc_rrq_handler. Any periodical operations will 1223 * be performed in the timeout handler and the RRQ timeout event bit shall 1224 * be cleared by the worker thread after it has taken the event bitmap out. 1225 **/ 1226 static void 1227 lpfc_rrq_timeout(struct timer_list *t) 1228 { 1229 struct lpfc_hba *phba; 1230 unsigned long iflag; 1231 1232 phba = from_timer(phba, t, rrq_tmr); 1233 spin_lock_irqsave(&phba->pport->work_port_lock, iflag); 1234 if (!(phba->pport->load_flag & FC_UNLOADING)) 1235 phba->hba_flag |= HBA_RRQ_ACTIVE; 1236 else 1237 phba->hba_flag &= ~HBA_RRQ_ACTIVE; 1238 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag); 1239 1240 if (!(phba->pport->load_flag & FC_UNLOADING)) 1241 lpfc_worker_wake_up(phba); 1242 } 1243 1244 /** 1245 * lpfc_hb_mbox_cmpl - The lpfc heart-beat mailbox command callback function 1246 * @phba: pointer to lpfc hba data structure. 1247 * @pmboxq: pointer to the driver internal queue element for mailbox command. 1248 * 1249 * This is the callback function to the lpfc heart-beat mailbox command. 1250 * If configured, the lpfc driver issues the heart-beat mailbox command to 1251 * the HBA every LPFC_HB_MBOX_INTERVAL (current 5) seconds. At the time the 1252 * heart-beat mailbox command is issued, the driver shall set up heart-beat 1253 * timeout timer to LPFC_HB_MBOX_TIMEOUT (current 30) seconds and marks 1254 * heart-beat outstanding state. Once the mailbox command comes back and 1255 * no error conditions detected, the heart-beat mailbox command timer is 1256 * reset to LPFC_HB_MBOX_INTERVAL seconds and the heart-beat outstanding 1257 * state is cleared for the next heart-beat. If the timer expired with the 1258 * heart-beat outstanding state set, the driver will put the HBA offline. 1259 **/ 1260 static void 1261 lpfc_hb_mbox_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq) 1262 { 1263 unsigned long drvr_flag; 1264 1265 spin_lock_irqsave(&phba->hbalock, drvr_flag); 1266 phba->hba_flag &= ~(HBA_HBEAT_INP | HBA_HBEAT_TMO); 1267 spin_unlock_irqrestore(&phba->hbalock, drvr_flag); 1268 1269 /* Check and reset heart-beat timer if necessary */ 1270 mempool_free(pmboxq, phba->mbox_mem_pool); 1271 if (!(phba->pport->fc_flag & FC_OFFLINE_MODE) && 1272 !(phba->link_state == LPFC_HBA_ERROR) && 1273 !(phba->pport->load_flag & FC_UNLOADING)) 1274 mod_timer(&phba->hb_tmofunc, 1275 jiffies + 1276 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL)); 1277 return; 1278 } 1279 1280 /* 1281 * lpfc_idle_stat_delay_work - idle_stat tracking 1282 * 1283 * This routine tracks per-cq idle_stat and determines polling decisions. 1284 * 1285 * Return codes: 1286 * None 1287 **/ 1288 static void 1289 lpfc_idle_stat_delay_work(struct work_struct *work) 1290 { 1291 struct lpfc_hba *phba = container_of(to_delayed_work(work), 1292 struct lpfc_hba, 1293 idle_stat_delay_work); 1294 struct lpfc_queue *cq; 1295 struct lpfc_sli4_hdw_queue *hdwq; 1296 struct lpfc_idle_stat *idle_stat; 1297 u32 i, idle_percent; 1298 u64 wall, wall_idle, diff_wall, diff_idle, busy_time; 1299 1300 if (phba->pport->load_flag & FC_UNLOADING) 1301 return; 1302 1303 if (phba->link_state == LPFC_HBA_ERROR || 1304 phba->pport->fc_flag & FC_OFFLINE_MODE || 1305 phba->cmf_active_mode != LPFC_CFG_OFF) 1306 goto requeue; 1307 1308 for_each_present_cpu(i) { 1309 hdwq = &phba->sli4_hba.hdwq[phba->sli4_hba.cpu_map[i].hdwq]; 1310 cq = hdwq->io_cq; 1311 1312 /* Skip if we've already handled this cq's primary CPU */ 1313 if (cq->chann != i) 1314 continue; 1315 1316 idle_stat = &phba->sli4_hba.idle_stat[i]; 1317 1318 /* get_cpu_idle_time returns values as running counters. Thus, 1319 * to know the amount for this period, the prior counter values 1320 * need to be subtracted from the current counter values. 1321 * From there, the idle time stat can be calculated as a 1322 * percentage of 100 - the sum of the other consumption times. 1323 */ 1324 wall_idle = get_cpu_idle_time(i, &wall, 1); 1325 diff_idle = wall_idle - idle_stat->prev_idle; 1326 diff_wall = wall - idle_stat->prev_wall; 1327 1328 if (diff_wall <= diff_idle) 1329 busy_time = 0; 1330 else 1331 busy_time = diff_wall - diff_idle; 1332 1333 idle_percent = div64_u64(100 * busy_time, diff_wall); 1334 idle_percent = 100 - idle_percent; 1335 1336 if (idle_percent < 15) 1337 cq->poll_mode = LPFC_QUEUE_WORK; 1338 else 1339 cq->poll_mode = LPFC_IRQ_POLL; 1340 1341 idle_stat->prev_idle = wall_idle; 1342 idle_stat->prev_wall = wall; 1343 } 1344 1345 requeue: 1346 schedule_delayed_work(&phba->idle_stat_delay_work, 1347 msecs_to_jiffies(LPFC_IDLE_STAT_DELAY)); 1348 } 1349 1350 static void 1351 lpfc_hb_eq_delay_work(struct work_struct *work) 1352 { 1353 struct lpfc_hba *phba = container_of(to_delayed_work(work), 1354 struct lpfc_hba, eq_delay_work); 1355 struct lpfc_eq_intr_info *eqi, *eqi_new; 1356 struct lpfc_queue *eq, *eq_next; 1357 unsigned char *ena_delay = NULL; 1358 uint32_t usdelay; 1359 int i; 1360 1361 if (!phba->cfg_auto_imax || phba->pport->load_flag & FC_UNLOADING) 1362 return; 1363 1364 if (phba->link_state == LPFC_HBA_ERROR || 1365 phba->pport->fc_flag & FC_OFFLINE_MODE) 1366 goto requeue; 1367 1368 ena_delay = kcalloc(phba->sli4_hba.num_possible_cpu, sizeof(*ena_delay), 1369 GFP_KERNEL); 1370 if (!ena_delay) 1371 goto requeue; 1372 1373 for (i = 0; i < phba->cfg_irq_chann; i++) { 1374 /* Get the EQ corresponding to the IRQ vector */ 1375 eq = phba->sli4_hba.hba_eq_hdl[i].eq; 1376 if (!eq) 1377 continue; 1378 if (eq->q_mode || eq->q_flag & HBA_EQ_DELAY_CHK) { 1379 eq->q_flag &= ~HBA_EQ_DELAY_CHK; 1380 ena_delay[eq->last_cpu] = 1; 1381 } 1382 } 1383 1384 for_each_present_cpu(i) { 1385 eqi = per_cpu_ptr(phba->sli4_hba.eq_info, i); 1386 if (ena_delay[i]) { 1387 usdelay = (eqi->icnt >> 10) * LPFC_EQ_DELAY_STEP; 1388 if (usdelay > LPFC_MAX_AUTO_EQ_DELAY) 1389 usdelay = LPFC_MAX_AUTO_EQ_DELAY; 1390 } else { 1391 usdelay = 0; 1392 } 1393 1394 eqi->icnt = 0; 1395 1396 list_for_each_entry_safe(eq, eq_next, &eqi->list, cpu_list) { 1397 if (unlikely(eq->last_cpu != i)) { 1398 eqi_new = per_cpu_ptr(phba->sli4_hba.eq_info, 1399 eq->last_cpu); 1400 list_move_tail(&eq->cpu_list, &eqi_new->list); 1401 continue; 1402 } 1403 if (usdelay != eq->q_mode) 1404 lpfc_modify_hba_eq_delay(phba, eq->hdwq, 1, 1405 usdelay); 1406 } 1407 } 1408 1409 kfree(ena_delay); 1410 1411 requeue: 1412 queue_delayed_work(phba->wq, &phba->eq_delay_work, 1413 msecs_to_jiffies(LPFC_EQ_DELAY_MSECS)); 1414 } 1415 1416 /** 1417 * lpfc_hb_mxp_handler - Multi-XRI pools handler to adjust XRI distribution 1418 * @phba: pointer to lpfc hba data structure. 1419 * 1420 * For each heartbeat, this routine does some heuristic methods to adjust 1421 * XRI distribution. The goal is to fully utilize free XRIs. 1422 **/ 1423 static void lpfc_hb_mxp_handler(struct lpfc_hba *phba) 1424 { 1425 u32 i; 1426 u32 hwq_count; 1427 1428 hwq_count = phba->cfg_hdw_queue; 1429 for (i = 0; i < hwq_count; i++) { 1430 /* Adjust XRIs in private pool */ 1431 lpfc_adjust_pvt_pool_count(phba, i); 1432 1433 /* Adjust high watermark */ 1434 lpfc_adjust_high_watermark(phba, i); 1435 1436 #ifdef LPFC_MXP_STAT 1437 /* Snapshot pbl, pvt and busy count */ 1438 lpfc_snapshot_mxp(phba, i); 1439 #endif 1440 } 1441 } 1442 1443 /** 1444 * lpfc_issue_hb_mbox - Issues heart-beat mailbox command 1445 * @phba: pointer to lpfc hba data structure. 1446 * 1447 * If a HB mbox is not already in progrees, this routine will allocate 1448 * a LPFC_MBOXQ_t, populate it with a MBX_HEARTBEAT (0x31) command, 1449 * and issue it. The HBA_HBEAT_INP flag means the command is in progress. 1450 **/ 1451 int 1452 lpfc_issue_hb_mbox(struct lpfc_hba *phba) 1453 { 1454 LPFC_MBOXQ_t *pmboxq; 1455 int retval; 1456 1457 /* Is a Heartbeat mbox already in progress */ 1458 if (phba->hba_flag & HBA_HBEAT_INP) 1459 return 0; 1460 1461 pmboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 1462 if (!pmboxq) 1463 return -ENOMEM; 1464 1465 lpfc_heart_beat(phba, pmboxq); 1466 pmboxq->mbox_cmpl = lpfc_hb_mbox_cmpl; 1467 pmboxq->vport = phba->pport; 1468 retval = lpfc_sli_issue_mbox(phba, pmboxq, MBX_NOWAIT); 1469 1470 if (retval != MBX_BUSY && retval != MBX_SUCCESS) { 1471 mempool_free(pmboxq, phba->mbox_mem_pool); 1472 return -ENXIO; 1473 } 1474 phba->hba_flag |= HBA_HBEAT_INP; 1475 1476 return 0; 1477 } 1478 1479 /** 1480 * lpfc_issue_hb_tmo - Signals heartbeat timer to issue mbox command 1481 * @phba: pointer to lpfc hba data structure. 1482 * 1483 * The heartbeat timer (every 5 sec) will fire. If the HBA_HBEAT_TMO 1484 * flag is set, it will force a MBX_HEARTBEAT mbox command, regardless 1485 * of the value of lpfc_enable_hba_heartbeat. 1486 * If lpfc_enable_hba_heartbeat is set, the timeout routine will always 1487 * try to issue a MBX_HEARTBEAT mbox command. 1488 **/ 1489 void 1490 lpfc_issue_hb_tmo(struct lpfc_hba *phba) 1491 { 1492 if (phba->cfg_enable_hba_heartbeat) 1493 return; 1494 phba->hba_flag |= HBA_HBEAT_TMO; 1495 } 1496 1497 /** 1498 * lpfc_hb_timeout_handler - The HBA-timer timeout handler 1499 * @phba: pointer to lpfc hba data structure. 1500 * 1501 * This is the actual HBA-timer timeout handler to be invoked by the worker 1502 * thread whenever the HBA timer fired and HBA-timeout event posted. This 1503 * handler performs any periodic operations needed for the device. If such 1504 * periodic event has already been attended to either in the interrupt handler 1505 * or by processing slow-ring or fast-ring events within the HBA-timer 1506 * timeout window (LPFC_HB_MBOX_INTERVAL), this handler just simply resets 1507 * the timer for the next timeout period. If lpfc heart-beat mailbox command 1508 * is configured and there is no heart-beat mailbox command outstanding, a 1509 * heart-beat mailbox is issued and timer set properly. Otherwise, if there 1510 * has been a heart-beat mailbox command outstanding, the HBA shall be put 1511 * to offline. 1512 **/ 1513 void 1514 lpfc_hb_timeout_handler(struct lpfc_hba *phba) 1515 { 1516 struct lpfc_vport **vports; 1517 struct lpfc_dmabuf *buf_ptr; 1518 int retval = 0; 1519 int i, tmo; 1520 struct lpfc_sli *psli = &phba->sli; 1521 LIST_HEAD(completions); 1522 1523 if (phba->cfg_xri_rebalancing) { 1524 /* Multi-XRI pools handler */ 1525 lpfc_hb_mxp_handler(phba); 1526 } 1527 1528 vports = lpfc_create_vport_work_array(phba); 1529 if (vports != NULL) 1530 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) { 1531 lpfc_rcv_seq_check_edtov(vports[i]); 1532 lpfc_fdmi_change_check(vports[i]); 1533 } 1534 lpfc_destroy_vport_work_array(phba, vports); 1535 1536 if ((phba->link_state == LPFC_HBA_ERROR) || 1537 (phba->pport->load_flag & FC_UNLOADING) || 1538 (phba->pport->fc_flag & FC_OFFLINE_MODE)) 1539 return; 1540 1541 if (phba->elsbuf_cnt && 1542 (phba->elsbuf_cnt == phba->elsbuf_prev_cnt)) { 1543 spin_lock_irq(&phba->hbalock); 1544 list_splice_init(&phba->elsbuf, &completions); 1545 phba->elsbuf_cnt = 0; 1546 phba->elsbuf_prev_cnt = 0; 1547 spin_unlock_irq(&phba->hbalock); 1548 1549 while (!list_empty(&completions)) { 1550 list_remove_head(&completions, buf_ptr, 1551 struct lpfc_dmabuf, list); 1552 lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys); 1553 kfree(buf_ptr); 1554 } 1555 } 1556 phba->elsbuf_prev_cnt = phba->elsbuf_cnt; 1557 1558 /* If there is no heart beat outstanding, issue a heartbeat command */ 1559 if (phba->cfg_enable_hba_heartbeat) { 1560 /* If IOs are completing, no need to issue a MBX_HEARTBEAT */ 1561 spin_lock_irq(&phba->pport->work_port_lock); 1562 if (time_after(phba->last_completion_time + 1563 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL), 1564 jiffies)) { 1565 spin_unlock_irq(&phba->pport->work_port_lock); 1566 if (phba->hba_flag & HBA_HBEAT_INP) 1567 tmo = (1000 * LPFC_HB_MBOX_TIMEOUT); 1568 else 1569 tmo = (1000 * LPFC_HB_MBOX_INTERVAL); 1570 goto out; 1571 } 1572 spin_unlock_irq(&phba->pport->work_port_lock); 1573 1574 /* Check if a MBX_HEARTBEAT is already in progress */ 1575 if (phba->hba_flag & HBA_HBEAT_INP) { 1576 /* 1577 * If heart beat timeout called with HBA_HBEAT_INP set 1578 * we need to give the hb mailbox cmd a chance to 1579 * complete or TMO. 1580 */ 1581 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 1582 "0459 Adapter heartbeat still outstanding: " 1583 "last compl time was %d ms.\n", 1584 jiffies_to_msecs(jiffies 1585 - phba->last_completion_time)); 1586 tmo = (1000 * LPFC_HB_MBOX_TIMEOUT); 1587 } else { 1588 if ((!(psli->sli_flag & LPFC_SLI_MBOX_ACTIVE)) && 1589 (list_empty(&psli->mboxq))) { 1590 1591 retval = lpfc_issue_hb_mbox(phba); 1592 if (retval) { 1593 tmo = (1000 * LPFC_HB_MBOX_INTERVAL); 1594 goto out; 1595 } 1596 phba->skipped_hb = 0; 1597 } else if (time_before_eq(phba->last_completion_time, 1598 phba->skipped_hb)) { 1599 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 1600 "2857 Last completion time not " 1601 " updated in %d ms\n", 1602 jiffies_to_msecs(jiffies 1603 - phba->last_completion_time)); 1604 } else 1605 phba->skipped_hb = jiffies; 1606 1607 tmo = (1000 * LPFC_HB_MBOX_TIMEOUT); 1608 goto out; 1609 } 1610 } else { 1611 /* Check to see if we want to force a MBX_HEARTBEAT */ 1612 if (phba->hba_flag & HBA_HBEAT_TMO) { 1613 retval = lpfc_issue_hb_mbox(phba); 1614 if (retval) 1615 tmo = (1000 * LPFC_HB_MBOX_INTERVAL); 1616 else 1617 tmo = (1000 * LPFC_HB_MBOX_TIMEOUT); 1618 goto out; 1619 } 1620 tmo = (1000 * LPFC_HB_MBOX_INTERVAL); 1621 } 1622 out: 1623 mod_timer(&phba->hb_tmofunc, jiffies + msecs_to_jiffies(tmo)); 1624 } 1625 1626 /** 1627 * lpfc_offline_eratt - Bring lpfc offline on hardware error attention 1628 * @phba: pointer to lpfc hba data structure. 1629 * 1630 * This routine is called to bring the HBA offline when HBA hardware error 1631 * other than Port Error 6 has been detected. 1632 **/ 1633 static void 1634 lpfc_offline_eratt(struct lpfc_hba *phba) 1635 { 1636 struct lpfc_sli *psli = &phba->sli; 1637 1638 spin_lock_irq(&phba->hbalock); 1639 psli->sli_flag &= ~LPFC_SLI_ACTIVE; 1640 spin_unlock_irq(&phba->hbalock); 1641 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT); 1642 1643 lpfc_offline(phba); 1644 lpfc_reset_barrier(phba); 1645 spin_lock_irq(&phba->hbalock); 1646 lpfc_sli_brdreset(phba); 1647 spin_unlock_irq(&phba->hbalock); 1648 lpfc_hba_down_post(phba); 1649 lpfc_sli_brdready(phba, HS_MBRDY); 1650 lpfc_unblock_mgmt_io(phba); 1651 phba->link_state = LPFC_HBA_ERROR; 1652 return; 1653 } 1654 1655 /** 1656 * lpfc_sli4_offline_eratt - Bring lpfc offline on SLI4 hardware error attention 1657 * @phba: pointer to lpfc hba data structure. 1658 * 1659 * This routine is called to bring a SLI4 HBA offline when HBA hardware error 1660 * other than Port Error 6 has been detected. 1661 **/ 1662 void 1663 lpfc_sli4_offline_eratt(struct lpfc_hba *phba) 1664 { 1665 spin_lock_irq(&phba->hbalock); 1666 if (phba->link_state == LPFC_HBA_ERROR && 1667 test_bit(HBA_PCI_ERR, &phba->bit_flags)) { 1668 spin_unlock_irq(&phba->hbalock); 1669 return; 1670 } 1671 phba->link_state = LPFC_HBA_ERROR; 1672 spin_unlock_irq(&phba->hbalock); 1673 1674 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT); 1675 lpfc_sli_flush_io_rings(phba); 1676 lpfc_offline(phba); 1677 lpfc_hba_down_post(phba); 1678 lpfc_unblock_mgmt_io(phba); 1679 } 1680 1681 /** 1682 * lpfc_handle_deferred_eratt - The HBA hardware deferred error handler 1683 * @phba: pointer to lpfc hba data structure. 1684 * 1685 * This routine is invoked to handle the deferred HBA hardware error 1686 * conditions. This type of error is indicated by HBA by setting ER1 1687 * and another ER bit in the host status register. The driver will 1688 * wait until the ER1 bit clears before handling the error condition. 1689 **/ 1690 static void 1691 lpfc_handle_deferred_eratt(struct lpfc_hba *phba) 1692 { 1693 uint32_t old_host_status = phba->work_hs; 1694 struct lpfc_sli *psli = &phba->sli; 1695 1696 /* If the pci channel is offline, ignore possible errors, 1697 * since we cannot communicate with the pci card anyway. 1698 */ 1699 if (pci_channel_offline(phba->pcidev)) { 1700 spin_lock_irq(&phba->hbalock); 1701 phba->hba_flag &= ~DEFER_ERATT; 1702 spin_unlock_irq(&phba->hbalock); 1703 return; 1704 } 1705 1706 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 1707 "0479 Deferred Adapter Hardware Error " 1708 "Data: x%x x%x x%x\n", 1709 phba->work_hs, phba->work_status[0], 1710 phba->work_status[1]); 1711 1712 spin_lock_irq(&phba->hbalock); 1713 psli->sli_flag &= ~LPFC_SLI_ACTIVE; 1714 spin_unlock_irq(&phba->hbalock); 1715 1716 1717 /* 1718 * Firmware stops when it triggred erratt. That could cause the I/Os 1719 * dropped by the firmware. Error iocb (I/O) on txcmplq and let the 1720 * SCSI layer retry it after re-establishing link. 1721 */ 1722 lpfc_sli_abort_fcp_rings(phba); 1723 1724 /* 1725 * There was a firmware error. Take the hba offline and then 1726 * attempt to restart it. 1727 */ 1728 lpfc_offline_prep(phba, LPFC_MBX_WAIT); 1729 lpfc_offline(phba); 1730 1731 /* Wait for the ER1 bit to clear.*/ 1732 while (phba->work_hs & HS_FFER1) { 1733 msleep(100); 1734 if (lpfc_readl(phba->HSregaddr, &phba->work_hs)) { 1735 phba->work_hs = UNPLUG_ERR ; 1736 break; 1737 } 1738 /* If driver is unloading let the worker thread continue */ 1739 if (phba->pport->load_flag & FC_UNLOADING) { 1740 phba->work_hs = 0; 1741 break; 1742 } 1743 } 1744 1745 /* 1746 * This is to ptrotect against a race condition in which 1747 * first write to the host attention register clear the 1748 * host status register. 1749 */ 1750 if ((!phba->work_hs) && (!(phba->pport->load_flag & FC_UNLOADING))) 1751 phba->work_hs = old_host_status & ~HS_FFER1; 1752 1753 spin_lock_irq(&phba->hbalock); 1754 phba->hba_flag &= ~DEFER_ERATT; 1755 spin_unlock_irq(&phba->hbalock); 1756 phba->work_status[0] = readl(phba->MBslimaddr + 0xa8); 1757 phba->work_status[1] = readl(phba->MBslimaddr + 0xac); 1758 } 1759 1760 static void 1761 lpfc_board_errevt_to_mgmt(struct lpfc_hba *phba) 1762 { 1763 struct lpfc_board_event_header board_event; 1764 struct Scsi_Host *shost; 1765 1766 board_event.event_type = FC_REG_BOARD_EVENT; 1767 board_event.subcategory = LPFC_EVENT_PORTINTERR; 1768 shost = lpfc_shost_from_vport(phba->pport); 1769 fc_host_post_vendor_event(shost, fc_get_event_number(), 1770 sizeof(board_event), 1771 (char *) &board_event, 1772 LPFC_NL_VENDOR_ID); 1773 } 1774 1775 /** 1776 * lpfc_handle_eratt_s3 - The SLI3 HBA hardware error handler 1777 * @phba: pointer to lpfc hba data structure. 1778 * 1779 * This routine is invoked to handle the following HBA hardware error 1780 * conditions: 1781 * 1 - HBA error attention interrupt 1782 * 2 - DMA ring index out of range 1783 * 3 - Mailbox command came back as unknown 1784 **/ 1785 static void 1786 lpfc_handle_eratt_s3(struct lpfc_hba *phba) 1787 { 1788 struct lpfc_vport *vport = phba->pport; 1789 struct lpfc_sli *psli = &phba->sli; 1790 uint32_t event_data; 1791 unsigned long temperature; 1792 struct temp_event temp_event_data; 1793 struct Scsi_Host *shost; 1794 1795 /* If the pci channel is offline, ignore possible errors, 1796 * since we cannot communicate with the pci card anyway. 1797 */ 1798 if (pci_channel_offline(phba->pcidev)) { 1799 spin_lock_irq(&phba->hbalock); 1800 phba->hba_flag &= ~DEFER_ERATT; 1801 spin_unlock_irq(&phba->hbalock); 1802 return; 1803 } 1804 1805 /* If resets are disabled then leave the HBA alone and return */ 1806 if (!phba->cfg_enable_hba_reset) 1807 return; 1808 1809 /* Send an internal error event to mgmt application */ 1810 lpfc_board_errevt_to_mgmt(phba); 1811 1812 if (phba->hba_flag & DEFER_ERATT) 1813 lpfc_handle_deferred_eratt(phba); 1814 1815 if ((phba->work_hs & HS_FFER6) || (phba->work_hs & HS_FFER8)) { 1816 if (phba->work_hs & HS_FFER6) 1817 /* Re-establishing Link */ 1818 lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT, 1819 "1301 Re-establishing Link " 1820 "Data: x%x x%x x%x\n", 1821 phba->work_hs, phba->work_status[0], 1822 phba->work_status[1]); 1823 if (phba->work_hs & HS_FFER8) 1824 /* Device Zeroization */ 1825 lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT, 1826 "2861 Host Authentication device " 1827 "zeroization Data:x%x x%x x%x\n", 1828 phba->work_hs, phba->work_status[0], 1829 phba->work_status[1]); 1830 1831 spin_lock_irq(&phba->hbalock); 1832 psli->sli_flag &= ~LPFC_SLI_ACTIVE; 1833 spin_unlock_irq(&phba->hbalock); 1834 1835 /* 1836 * Firmware stops when it triggled erratt with HS_FFER6. 1837 * That could cause the I/Os dropped by the firmware. 1838 * Error iocb (I/O) on txcmplq and let the SCSI layer 1839 * retry it after re-establishing link. 1840 */ 1841 lpfc_sli_abort_fcp_rings(phba); 1842 1843 /* 1844 * There was a firmware error. Take the hba offline and then 1845 * attempt to restart it. 1846 */ 1847 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT); 1848 lpfc_offline(phba); 1849 lpfc_sli_brdrestart(phba); 1850 if (lpfc_online(phba) == 0) { /* Initialize the HBA */ 1851 lpfc_unblock_mgmt_io(phba); 1852 return; 1853 } 1854 lpfc_unblock_mgmt_io(phba); 1855 } else if (phba->work_hs & HS_CRIT_TEMP) { 1856 temperature = readl(phba->MBslimaddr + TEMPERATURE_OFFSET); 1857 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT; 1858 temp_event_data.event_code = LPFC_CRIT_TEMP; 1859 temp_event_data.data = (uint32_t)temperature; 1860 1861 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 1862 "0406 Adapter maximum temperature exceeded " 1863 "(%ld), taking this port offline " 1864 "Data: x%x x%x x%x\n", 1865 temperature, phba->work_hs, 1866 phba->work_status[0], phba->work_status[1]); 1867 1868 shost = lpfc_shost_from_vport(phba->pport); 1869 fc_host_post_vendor_event(shost, fc_get_event_number(), 1870 sizeof(temp_event_data), 1871 (char *) &temp_event_data, 1872 SCSI_NL_VID_TYPE_PCI 1873 | PCI_VENDOR_ID_EMULEX); 1874 1875 spin_lock_irq(&phba->hbalock); 1876 phba->over_temp_state = HBA_OVER_TEMP; 1877 spin_unlock_irq(&phba->hbalock); 1878 lpfc_offline_eratt(phba); 1879 1880 } else { 1881 /* The if clause above forces this code path when the status 1882 * failure is a value other than FFER6. Do not call the offline 1883 * twice. This is the adapter hardware error path. 1884 */ 1885 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 1886 "0457 Adapter Hardware Error " 1887 "Data: x%x x%x x%x\n", 1888 phba->work_hs, 1889 phba->work_status[0], phba->work_status[1]); 1890 1891 event_data = FC_REG_DUMP_EVENT; 1892 shost = lpfc_shost_from_vport(vport); 1893 fc_host_post_vendor_event(shost, fc_get_event_number(), 1894 sizeof(event_data), (char *) &event_data, 1895 SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX); 1896 1897 lpfc_offline_eratt(phba); 1898 } 1899 return; 1900 } 1901 1902 /** 1903 * lpfc_sli4_port_sta_fn_reset - The SLI4 function reset due to port status reg 1904 * @phba: pointer to lpfc hba data structure. 1905 * @mbx_action: flag for mailbox shutdown action. 1906 * @en_rn_msg: send reset/port recovery message. 1907 * This routine is invoked to perform an SLI4 port PCI function reset in 1908 * response to port status register polling attention. It waits for port 1909 * status register (ERR, RDY, RN) bits before proceeding with function reset. 1910 * During this process, interrupt vectors are freed and later requested 1911 * for handling possible port resource change. 1912 **/ 1913 static int 1914 lpfc_sli4_port_sta_fn_reset(struct lpfc_hba *phba, int mbx_action, 1915 bool en_rn_msg) 1916 { 1917 int rc; 1918 uint32_t intr_mode; 1919 LPFC_MBOXQ_t *mboxq; 1920 1921 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) >= 1922 LPFC_SLI_INTF_IF_TYPE_2) { 1923 /* 1924 * On error status condition, driver need to wait for port 1925 * ready before performing reset. 1926 */ 1927 rc = lpfc_sli4_pdev_status_reg_wait(phba); 1928 if (rc) 1929 return rc; 1930 } 1931 1932 /* need reset: attempt for port recovery */ 1933 if (en_rn_msg) 1934 lpfc_printf_log(phba, KERN_ERR, LOG_SLI, 1935 "2887 Reset Needed: Attempting Port " 1936 "Recovery...\n"); 1937 1938 /* If we are no wait, the HBA has been reset and is not 1939 * functional, thus we should clear 1940 * (LPFC_SLI_ACTIVE | LPFC_SLI_MBOX_ACTIVE) flags. 1941 */ 1942 if (mbx_action == LPFC_MBX_NO_WAIT) { 1943 spin_lock_irq(&phba->hbalock); 1944 phba->sli.sli_flag &= ~LPFC_SLI_ACTIVE; 1945 if (phba->sli.mbox_active) { 1946 mboxq = phba->sli.mbox_active; 1947 mboxq->u.mb.mbxStatus = MBX_NOT_FINISHED; 1948 __lpfc_mbox_cmpl_put(phba, mboxq); 1949 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE; 1950 phba->sli.mbox_active = NULL; 1951 } 1952 spin_unlock_irq(&phba->hbalock); 1953 } 1954 1955 lpfc_offline_prep(phba, mbx_action); 1956 lpfc_sli_flush_io_rings(phba); 1957 lpfc_offline(phba); 1958 /* release interrupt for possible resource change */ 1959 lpfc_sli4_disable_intr(phba); 1960 rc = lpfc_sli_brdrestart(phba); 1961 if (rc) { 1962 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 1963 "6309 Failed to restart board\n"); 1964 return rc; 1965 } 1966 /* request and enable interrupt */ 1967 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode); 1968 if (intr_mode == LPFC_INTR_ERROR) { 1969 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 1970 "3175 Failed to enable interrupt\n"); 1971 return -EIO; 1972 } 1973 phba->intr_mode = intr_mode; 1974 rc = lpfc_online(phba); 1975 if (rc == 0) 1976 lpfc_unblock_mgmt_io(phba); 1977 1978 return rc; 1979 } 1980 1981 /** 1982 * lpfc_handle_eratt_s4 - The SLI4 HBA hardware error handler 1983 * @phba: pointer to lpfc hba data structure. 1984 * 1985 * This routine is invoked to handle the SLI4 HBA hardware error attention 1986 * conditions. 1987 **/ 1988 static void 1989 lpfc_handle_eratt_s4(struct lpfc_hba *phba) 1990 { 1991 struct lpfc_vport *vport = phba->pport; 1992 uint32_t event_data; 1993 struct Scsi_Host *shost; 1994 uint32_t if_type; 1995 struct lpfc_register portstat_reg = {0}; 1996 uint32_t reg_err1, reg_err2; 1997 uint32_t uerrlo_reg, uemasklo_reg; 1998 uint32_t smphr_port_status = 0, pci_rd_rc1, pci_rd_rc2; 1999 bool en_rn_msg = true; 2000 struct temp_event temp_event_data; 2001 struct lpfc_register portsmphr_reg; 2002 int rc, i; 2003 2004 /* If the pci channel is offline, ignore possible errors, since 2005 * we cannot communicate with the pci card anyway. 2006 */ 2007 if (pci_channel_offline(phba->pcidev)) { 2008 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 2009 "3166 pci channel is offline\n"); 2010 lpfc_sli_flush_io_rings(phba); 2011 return; 2012 } 2013 2014 memset(&portsmphr_reg, 0, sizeof(portsmphr_reg)); 2015 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf); 2016 switch (if_type) { 2017 case LPFC_SLI_INTF_IF_TYPE_0: 2018 pci_rd_rc1 = lpfc_readl( 2019 phba->sli4_hba.u.if_type0.UERRLOregaddr, 2020 &uerrlo_reg); 2021 pci_rd_rc2 = lpfc_readl( 2022 phba->sli4_hba.u.if_type0.UEMASKLOregaddr, 2023 &uemasklo_reg); 2024 /* consider PCI bus read error as pci_channel_offline */ 2025 if (pci_rd_rc1 == -EIO && pci_rd_rc2 == -EIO) 2026 return; 2027 if (!(phba->hba_flag & HBA_RECOVERABLE_UE)) { 2028 lpfc_sli4_offline_eratt(phba); 2029 return; 2030 } 2031 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 2032 "7623 Checking UE recoverable"); 2033 2034 for (i = 0; i < phba->sli4_hba.ue_to_sr / 1000; i++) { 2035 if (lpfc_readl(phba->sli4_hba.PSMPHRregaddr, 2036 &portsmphr_reg.word0)) 2037 continue; 2038 2039 smphr_port_status = bf_get(lpfc_port_smphr_port_status, 2040 &portsmphr_reg); 2041 if ((smphr_port_status & LPFC_PORT_SEM_MASK) == 2042 LPFC_PORT_SEM_UE_RECOVERABLE) 2043 break; 2044 /*Sleep for 1Sec, before checking SEMAPHORE */ 2045 msleep(1000); 2046 } 2047 2048 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 2049 "4827 smphr_port_status x%x : Waited %dSec", 2050 smphr_port_status, i); 2051 2052 /* Recoverable UE, reset the HBA device */ 2053 if ((smphr_port_status & LPFC_PORT_SEM_MASK) == 2054 LPFC_PORT_SEM_UE_RECOVERABLE) { 2055 for (i = 0; i < 20; i++) { 2056 msleep(1000); 2057 if (!lpfc_readl(phba->sli4_hba.PSMPHRregaddr, 2058 &portsmphr_reg.word0) && 2059 (LPFC_POST_STAGE_PORT_READY == 2060 bf_get(lpfc_port_smphr_port_status, 2061 &portsmphr_reg))) { 2062 rc = lpfc_sli4_port_sta_fn_reset(phba, 2063 LPFC_MBX_NO_WAIT, en_rn_msg); 2064 if (rc == 0) 2065 return; 2066 lpfc_printf_log(phba, KERN_ERR, 2067 LOG_TRACE_EVENT, 2068 "4215 Failed to recover UE"); 2069 break; 2070 } 2071 } 2072 } 2073 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 2074 "7624 Firmware not ready: Failing UE recovery," 2075 " waited %dSec", i); 2076 phba->link_state = LPFC_HBA_ERROR; 2077 break; 2078 2079 case LPFC_SLI_INTF_IF_TYPE_2: 2080 case LPFC_SLI_INTF_IF_TYPE_6: 2081 pci_rd_rc1 = lpfc_readl( 2082 phba->sli4_hba.u.if_type2.STATUSregaddr, 2083 &portstat_reg.word0); 2084 /* consider PCI bus read error as pci_channel_offline */ 2085 if (pci_rd_rc1 == -EIO) { 2086 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 2087 "3151 PCI bus read access failure: x%x\n", 2088 readl(phba->sli4_hba.u.if_type2.STATUSregaddr)); 2089 lpfc_sli4_offline_eratt(phba); 2090 return; 2091 } 2092 reg_err1 = readl(phba->sli4_hba.u.if_type2.ERR1regaddr); 2093 reg_err2 = readl(phba->sli4_hba.u.if_type2.ERR2regaddr); 2094 if (bf_get(lpfc_sliport_status_oti, &portstat_reg)) { 2095 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 2096 "2889 Port Overtemperature event, " 2097 "taking port offline Data: x%x x%x\n", 2098 reg_err1, reg_err2); 2099 2100 phba->sfp_alarm |= LPFC_TRANSGRESSION_HIGH_TEMPERATURE; 2101 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT; 2102 temp_event_data.event_code = LPFC_CRIT_TEMP; 2103 temp_event_data.data = 0xFFFFFFFF; 2104 2105 shost = lpfc_shost_from_vport(phba->pport); 2106 fc_host_post_vendor_event(shost, fc_get_event_number(), 2107 sizeof(temp_event_data), 2108 (char *)&temp_event_data, 2109 SCSI_NL_VID_TYPE_PCI 2110 | PCI_VENDOR_ID_EMULEX); 2111 2112 spin_lock_irq(&phba->hbalock); 2113 phba->over_temp_state = HBA_OVER_TEMP; 2114 spin_unlock_irq(&phba->hbalock); 2115 lpfc_sli4_offline_eratt(phba); 2116 return; 2117 } 2118 if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 && 2119 reg_err2 == SLIPORT_ERR2_REG_FW_RESTART) { 2120 lpfc_printf_log(phba, KERN_ERR, LOG_SLI, 2121 "3143 Port Down: Firmware Update " 2122 "Detected\n"); 2123 en_rn_msg = false; 2124 } else if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 && 2125 reg_err2 == SLIPORT_ERR2_REG_FORCED_DUMP) 2126 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 2127 "3144 Port Down: Debug Dump\n"); 2128 else if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 && 2129 reg_err2 == SLIPORT_ERR2_REG_FUNC_PROVISON) 2130 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 2131 "3145 Port Down: Provisioning\n"); 2132 2133 /* If resets are disabled then leave the HBA alone and return */ 2134 if (!phba->cfg_enable_hba_reset) 2135 return; 2136 2137 /* Check port status register for function reset */ 2138 rc = lpfc_sli4_port_sta_fn_reset(phba, LPFC_MBX_NO_WAIT, 2139 en_rn_msg); 2140 if (rc == 0) { 2141 /* don't report event on forced debug dump */ 2142 if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 && 2143 reg_err2 == SLIPORT_ERR2_REG_FORCED_DUMP) 2144 return; 2145 else 2146 break; 2147 } 2148 /* fall through for not able to recover */ 2149 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 2150 "3152 Unrecoverable error\n"); 2151 phba->link_state = LPFC_HBA_ERROR; 2152 break; 2153 case LPFC_SLI_INTF_IF_TYPE_1: 2154 default: 2155 break; 2156 } 2157 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 2158 "3123 Report dump event to upper layer\n"); 2159 /* Send an internal error event to mgmt application */ 2160 lpfc_board_errevt_to_mgmt(phba); 2161 2162 event_data = FC_REG_DUMP_EVENT; 2163 shost = lpfc_shost_from_vport(vport); 2164 fc_host_post_vendor_event(shost, fc_get_event_number(), 2165 sizeof(event_data), (char *) &event_data, 2166 SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX); 2167 } 2168 2169 /** 2170 * lpfc_handle_eratt - Wrapper func for handling hba error attention 2171 * @phba: pointer to lpfc HBA data structure. 2172 * 2173 * This routine wraps the actual SLI3 or SLI4 hba error attention handling 2174 * routine from the API jump table function pointer from the lpfc_hba struct. 2175 * 2176 * Return codes 2177 * 0 - success. 2178 * Any other value - error. 2179 **/ 2180 void 2181 lpfc_handle_eratt(struct lpfc_hba *phba) 2182 { 2183 (*phba->lpfc_handle_eratt)(phba); 2184 } 2185 2186 /** 2187 * lpfc_handle_latt - The HBA link event handler 2188 * @phba: pointer to lpfc hba data structure. 2189 * 2190 * This routine is invoked from the worker thread to handle a HBA host 2191 * attention link event. SLI3 only. 2192 **/ 2193 void 2194 lpfc_handle_latt(struct lpfc_hba *phba) 2195 { 2196 struct lpfc_vport *vport = phba->pport; 2197 struct lpfc_sli *psli = &phba->sli; 2198 LPFC_MBOXQ_t *pmb; 2199 volatile uint32_t control; 2200 int rc = 0; 2201 2202 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 2203 if (!pmb) { 2204 rc = 1; 2205 goto lpfc_handle_latt_err_exit; 2206 } 2207 2208 rc = lpfc_mbox_rsrc_prep(phba, pmb); 2209 if (rc) { 2210 rc = 2; 2211 mempool_free(pmb, phba->mbox_mem_pool); 2212 goto lpfc_handle_latt_err_exit; 2213 } 2214 2215 /* Cleanup any outstanding ELS commands */ 2216 lpfc_els_flush_all_cmd(phba); 2217 psli->slistat.link_event++; 2218 lpfc_read_topology(phba, pmb, (struct lpfc_dmabuf *)pmb->ctx_buf); 2219 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology; 2220 pmb->vport = vport; 2221 /* Block ELS IOCBs until we have processed this mbox command */ 2222 phba->sli.sli3_ring[LPFC_ELS_RING].flag |= LPFC_STOP_IOCB_EVENT; 2223 rc = lpfc_sli_issue_mbox (phba, pmb, MBX_NOWAIT); 2224 if (rc == MBX_NOT_FINISHED) { 2225 rc = 4; 2226 goto lpfc_handle_latt_free_mbuf; 2227 } 2228 2229 /* Clear Link Attention in HA REG */ 2230 spin_lock_irq(&phba->hbalock); 2231 writel(HA_LATT, phba->HAregaddr); 2232 readl(phba->HAregaddr); /* flush */ 2233 spin_unlock_irq(&phba->hbalock); 2234 2235 return; 2236 2237 lpfc_handle_latt_free_mbuf: 2238 phba->sli.sli3_ring[LPFC_ELS_RING].flag &= ~LPFC_STOP_IOCB_EVENT; 2239 lpfc_mbox_rsrc_cleanup(phba, pmb, MBOX_THD_UNLOCKED); 2240 lpfc_handle_latt_err_exit: 2241 /* Enable Link attention interrupts */ 2242 spin_lock_irq(&phba->hbalock); 2243 psli->sli_flag |= LPFC_PROCESS_LA; 2244 control = readl(phba->HCregaddr); 2245 control |= HC_LAINT_ENA; 2246 writel(control, phba->HCregaddr); 2247 readl(phba->HCregaddr); /* flush */ 2248 2249 /* Clear Link Attention in HA REG */ 2250 writel(HA_LATT, phba->HAregaddr); 2251 readl(phba->HAregaddr); /* flush */ 2252 spin_unlock_irq(&phba->hbalock); 2253 lpfc_linkdown(phba); 2254 phba->link_state = LPFC_HBA_ERROR; 2255 2256 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 2257 "0300 LATT: Cannot issue READ_LA: Data:%d\n", rc); 2258 2259 return; 2260 } 2261 2262 static void 2263 lpfc_fill_vpd(struct lpfc_hba *phba, uint8_t *vpd, int length, int *pindex) 2264 { 2265 int i, j; 2266 2267 while (length > 0) { 2268 /* Look for Serial Number */ 2269 if ((vpd[*pindex] == 'S') && (vpd[*pindex + 1] == 'N')) { 2270 *pindex += 2; 2271 i = vpd[*pindex]; 2272 *pindex += 1; 2273 j = 0; 2274 length -= (3+i); 2275 while (i--) { 2276 phba->SerialNumber[j++] = vpd[(*pindex)++]; 2277 if (j == 31) 2278 break; 2279 } 2280 phba->SerialNumber[j] = 0; 2281 continue; 2282 } else if ((vpd[*pindex] == 'V') && (vpd[*pindex + 1] == '1')) { 2283 phba->vpd_flag |= VPD_MODEL_DESC; 2284 *pindex += 2; 2285 i = vpd[*pindex]; 2286 *pindex += 1; 2287 j = 0; 2288 length -= (3+i); 2289 while (i--) { 2290 phba->ModelDesc[j++] = vpd[(*pindex)++]; 2291 if (j == 255) 2292 break; 2293 } 2294 phba->ModelDesc[j] = 0; 2295 continue; 2296 } else if ((vpd[*pindex] == 'V') && (vpd[*pindex + 1] == '2')) { 2297 phba->vpd_flag |= VPD_MODEL_NAME; 2298 *pindex += 2; 2299 i = vpd[*pindex]; 2300 *pindex += 1; 2301 j = 0; 2302 length -= (3+i); 2303 while (i--) { 2304 phba->ModelName[j++] = vpd[(*pindex)++]; 2305 if (j == 79) 2306 break; 2307 } 2308 phba->ModelName[j] = 0; 2309 continue; 2310 } else if ((vpd[*pindex] == 'V') && (vpd[*pindex + 1] == '3')) { 2311 phba->vpd_flag |= VPD_PROGRAM_TYPE; 2312 *pindex += 2; 2313 i = vpd[*pindex]; 2314 *pindex += 1; 2315 j = 0; 2316 length -= (3+i); 2317 while (i--) { 2318 phba->ProgramType[j++] = vpd[(*pindex)++]; 2319 if (j == 255) 2320 break; 2321 } 2322 phba->ProgramType[j] = 0; 2323 continue; 2324 } else if ((vpd[*pindex] == 'V') && (vpd[*pindex + 1] == '4')) { 2325 phba->vpd_flag |= VPD_PORT; 2326 *pindex += 2; 2327 i = vpd[*pindex]; 2328 *pindex += 1; 2329 j = 0; 2330 length -= (3 + i); 2331 while (i--) { 2332 if ((phba->sli_rev == LPFC_SLI_REV4) && 2333 (phba->sli4_hba.pport_name_sta == 2334 LPFC_SLI4_PPNAME_GET)) { 2335 j++; 2336 (*pindex)++; 2337 } else 2338 phba->Port[j++] = vpd[(*pindex)++]; 2339 if (j == 19) 2340 break; 2341 } 2342 if ((phba->sli_rev != LPFC_SLI_REV4) || 2343 (phba->sli4_hba.pport_name_sta == 2344 LPFC_SLI4_PPNAME_NON)) 2345 phba->Port[j] = 0; 2346 continue; 2347 } else { 2348 *pindex += 2; 2349 i = vpd[*pindex]; 2350 *pindex += 1; 2351 *pindex += i; 2352 length -= (3 + i); 2353 } 2354 } 2355 } 2356 2357 /** 2358 * lpfc_parse_vpd - Parse VPD (Vital Product Data) 2359 * @phba: pointer to lpfc hba data structure. 2360 * @vpd: pointer to the vital product data. 2361 * @len: length of the vital product data in bytes. 2362 * 2363 * This routine parses the Vital Product Data (VPD). The VPD is treated as 2364 * an array of characters. In this routine, the ModelName, ProgramType, and 2365 * ModelDesc, etc. fields of the phba data structure will be populated. 2366 * 2367 * Return codes 2368 * 0 - pointer to the VPD passed in is NULL 2369 * 1 - success 2370 **/ 2371 int 2372 lpfc_parse_vpd(struct lpfc_hba *phba, uint8_t *vpd, int len) 2373 { 2374 uint8_t lenlo, lenhi; 2375 int Length; 2376 int i; 2377 int finished = 0; 2378 int index = 0; 2379 2380 if (!vpd) 2381 return 0; 2382 2383 /* Vital Product */ 2384 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 2385 "0455 Vital Product Data: x%x x%x x%x x%x\n", 2386 (uint32_t) vpd[0], (uint32_t) vpd[1], (uint32_t) vpd[2], 2387 (uint32_t) vpd[3]); 2388 while (!finished && (index < (len - 4))) { 2389 switch (vpd[index]) { 2390 case 0x82: 2391 case 0x91: 2392 index += 1; 2393 lenlo = vpd[index]; 2394 index += 1; 2395 lenhi = vpd[index]; 2396 index += 1; 2397 i = ((((unsigned short)lenhi) << 8) + lenlo); 2398 index += i; 2399 break; 2400 case 0x90: 2401 index += 1; 2402 lenlo = vpd[index]; 2403 index += 1; 2404 lenhi = vpd[index]; 2405 index += 1; 2406 Length = ((((unsigned short)lenhi) << 8) + lenlo); 2407 if (Length > len - index) 2408 Length = len - index; 2409 2410 lpfc_fill_vpd(phba, vpd, Length, &index); 2411 finished = 0; 2412 break; 2413 case 0x78: 2414 finished = 1; 2415 break; 2416 default: 2417 index ++; 2418 break; 2419 } 2420 } 2421 2422 return(1); 2423 } 2424 2425 /** 2426 * lpfc_get_atto_model_desc - Retrieve ATTO HBA device model name and description 2427 * @phba: pointer to lpfc hba data structure. 2428 * @mdp: pointer to the data structure to hold the derived model name. 2429 * @descp: pointer to the data structure to hold the derived description. 2430 * 2431 * This routine retrieves HBA's description based on its registered PCI device 2432 * ID. The @descp passed into this function points to an array of 256 chars. It 2433 * shall be returned with the model name, maximum speed, and the host bus type. 2434 * The @mdp passed into this function points to an array of 80 chars. When the 2435 * function returns, the @mdp will be filled with the model name. 2436 **/ 2437 static void 2438 lpfc_get_atto_model_desc(struct lpfc_hba *phba, uint8_t *mdp, uint8_t *descp) 2439 { 2440 uint16_t sub_dev_id = phba->pcidev->subsystem_device; 2441 char *model = "<Unknown>"; 2442 int tbolt = 0; 2443 2444 switch (sub_dev_id) { 2445 case PCI_DEVICE_ID_CLRY_161E: 2446 model = "161E"; 2447 break; 2448 case PCI_DEVICE_ID_CLRY_162E: 2449 model = "162E"; 2450 break; 2451 case PCI_DEVICE_ID_CLRY_164E: 2452 model = "164E"; 2453 break; 2454 case PCI_DEVICE_ID_CLRY_161P: 2455 model = "161P"; 2456 break; 2457 case PCI_DEVICE_ID_CLRY_162P: 2458 model = "162P"; 2459 break; 2460 case PCI_DEVICE_ID_CLRY_164P: 2461 model = "164P"; 2462 break; 2463 case PCI_DEVICE_ID_CLRY_321E: 2464 model = "321E"; 2465 break; 2466 case PCI_DEVICE_ID_CLRY_322E: 2467 model = "322E"; 2468 break; 2469 case PCI_DEVICE_ID_CLRY_324E: 2470 model = "324E"; 2471 break; 2472 case PCI_DEVICE_ID_CLRY_321P: 2473 model = "321P"; 2474 break; 2475 case PCI_DEVICE_ID_CLRY_322P: 2476 model = "322P"; 2477 break; 2478 case PCI_DEVICE_ID_CLRY_324P: 2479 model = "324P"; 2480 break; 2481 case PCI_DEVICE_ID_TLFC_2XX2: 2482 model = "2XX2"; 2483 tbolt = 1; 2484 break; 2485 case PCI_DEVICE_ID_TLFC_3162: 2486 model = "3162"; 2487 tbolt = 1; 2488 break; 2489 case PCI_DEVICE_ID_TLFC_3322: 2490 model = "3322"; 2491 tbolt = 1; 2492 break; 2493 default: 2494 model = "Unknown"; 2495 break; 2496 } 2497 2498 if (mdp && mdp[0] == '\0') 2499 snprintf(mdp, 79, "%s", model); 2500 2501 if (descp && descp[0] == '\0') 2502 snprintf(descp, 255, 2503 "ATTO %s%s, Fibre Channel Adapter Initiator, Port %s", 2504 (tbolt) ? "ThunderLink FC " : "Celerity FC-", 2505 model, 2506 phba->Port); 2507 } 2508 2509 /** 2510 * lpfc_get_hba_model_desc - Retrieve HBA device model name and description 2511 * @phba: pointer to lpfc hba data structure. 2512 * @mdp: pointer to the data structure to hold the derived model name. 2513 * @descp: pointer to the data structure to hold the derived description. 2514 * 2515 * This routine retrieves HBA's description based on its registered PCI device 2516 * ID. The @descp passed into this function points to an array of 256 chars. It 2517 * shall be returned with the model name, maximum speed, and the host bus type. 2518 * The @mdp passed into this function points to an array of 80 chars. When the 2519 * function returns, the @mdp will be filled with the model name. 2520 **/ 2521 static void 2522 lpfc_get_hba_model_desc(struct lpfc_hba *phba, uint8_t *mdp, uint8_t *descp) 2523 { 2524 lpfc_vpd_t *vp; 2525 uint16_t dev_id = phba->pcidev->device; 2526 int max_speed; 2527 int GE = 0; 2528 int oneConnect = 0; /* default is not a oneConnect */ 2529 struct { 2530 char *name; 2531 char *bus; 2532 char *function; 2533 } m = {"<Unknown>", "", ""}; 2534 2535 if (mdp && mdp[0] != '\0' 2536 && descp && descp[0] != '\0') 2537 return; 2538 2539 if (phba->pcidev->vendor == PCI_VENDOR_ID_ATTO) { 2540 lpfc_get_atto_model_desc(phba, mdp, descp); 2541 return; 2542 } 2543 2544 if (phba->lmt & LMT_64Gb) 2545 max_speed = 64; 2546 else if (phba->lmt & LMT_32Gb) 2547 max_speed = 32; 2548 else if (phba->lmt & LMT_16Gb) 2549 max_speed = 16; 2550 else if (phba->lmt & LMT_10Gb) 2551 max_speed = 10; 2552 else if (phba->lmt & LMT_8Gb) 2553 max_speed = 8; 2554 else if (phba->lmt & LMT_4Gb) 2555 max_speed = 4; 2556 else if (phba->lmt & LMT_2Gb) 2557 max_speed = 2; 2558 else if (phba->lmt & LMT_1Gb) 2559 max_speed = 1; 2560 else 2561 max_speed = 0; 2562 2563 vp = &phba->vpd; 2564 2565 switch (dev_id) { 2566 case PCI_DEVICE_ID_FIREFLY: 2567 m = (typeof(m)){"LP6000", "PCI", 2568 "Obsolete, Unsupported Fibre Channel Adapter"}; 2569 break; 2570 case PCI_DEVICE_ID_SUPERFLY: 2571 if (vp->rev.biuRev >= 1 && vp->rev.biuRev <= 3) 2572 m = (typeof(m)){"LP7000", "PCI", ""}; 2573 else 2574 m = (typeof(m)){"LP7000E", "PCI", ""}; 2575 m.function = "Obsolete, Unsupported Fibre Channel Adapter"; 2576 break; 2577 case PCI_DEVICE_ID_DRAGONFLY: 2578 m = (typeof(m)){"LP8000", "PCI", 2579 "Obsolete, Unsupported Fibre Channel Adapter"}; 2580 break; 2581 case PCI_DEVICE_ID_CENTAUR: 2582 if (FC_JEDEC_ID(vp->rev.biuRev) == CENTAUR_2G_JEDEC_ID) 2583 m = (typeof(m)){"LP9002", "PCI", ""}; 2584 else 2585 m = (typeof(m)){"LP9000", "PCI", ""}; 2586 m.function = "Obsolete, Unsupported Fibre Channel Adapter"; 2587 break; 2588 case PCI_DEVICE_ID_RFLY: 2589 m = (typeof(m)){"LP952", "PCI", 2590 "Obsolete, Unsupported Fibre Channel Adapter"}; 2591 break; 2592 case PCI_DEVICE_ID_PEGASUS: 2593 m = (typeof(m)){"LP9802", "PCI-X", 2594 "Obsolete, Unsupported Fibre Channel Adapter"}; 2595 break; 2596 case PCI_DEVICE_ID_THOR: 2597 m = (typeof(m)){"LP10000", "PCI-X", 2598 "Obsolete, Unsupported Fibre Channel Adapter"}; 2599 break; 2600 case PCI_DEVICE_ID_VIPER: 2601 m = (typeof(m)){"LPX1000", "PCI-X", 2602 "Obsolete, Unsupported Fibre Channel Adapter"}; 2603 break; 2604 case PCI_DEVICE_ID_PFLY: 2605 m = (typeof(m)){"LP982", "PCI-X", 2606 "Obsolete, Unsupported Fibre Channel Adapter"}; 2607 break; 2608 case PCI_DEVICE_ID_TFLY: 2609 m = (typeof(m)){"LP1050", "PCI-X", 2610 "Obsolete, Unsupported Fibre Channel Adapter"}; 2611 break; 2612 case PCI_DEVICE_ID_HELIOS: 2613 m = (typeof(m)){"LP11000", "PCI-X2", 2614 "Obsolete, Unsupported Fibre Channel Adapter"}; 2615 break; 2616 case PCI_DEVICE_ID_HELIOS_SCSP: 2617 m = (typeof(m)){"LP11000-SP", "PCI-X2", 2618 "Obsolete, Unsupported Fibre Channel Adapter"}; 2619 break; 2620 case PCI_DEVICE_ID_HELIOS_DCSP: 2621 m = (typeof(m)){"LP11002-SP", "PCI-X2", 2622 "Obsolete, Unsupported Fibre Channel Adapter"}; 2623 break; 2624 case PCI_DEVICE_ID_NEPTUNE: 2625 m = (typeof(m)){"LPe1000", "PCIe", 2626 "Obsolete, Unsupported Fibre Channel Adapter"}; 2627 break; 2628 case PCI_DEVICE_ID_NEPTUNE_SCSP: 2629 m = (typeof(m)){"LPe1000-SP", "PCIe", 2630 "Obsolete, Unsupported Fibre Channel Adapter"}; 2631 break; 2632 case PCI_DEVICE_ID_NEPTUNE_DCSP: 2633 m = (typeof(m)){"LPe1002-SP", "PCIe", 2634 "Obsolete, Unsupported Fibre Channel Adapter"}; 2635 break; 2636 case PCI_DEVICE_ID_BMID: 2637 m = (typeof(m)){"LP1150", "PCI-X2", "Fibre Channel Adapter"}; 2638 break; 2639 case PCI_DEVICE_ID_BSMB: 2640 m = (typeof(m)){"LP111", "PCI-X2", 2641 "Obsolete, Unsupported Fibre Channel Adapter"}; 2642 break; 2643 case PCI_DEVICE_ID_ZEPHYR: 2644 m = (typeof(m)){"LPe11000", "PCIe", "Fibre Channel Adapter"}; 2645 break; 2646 case PCI_DEVICE_ID_ZEPHYR_SCSP: 2647 m = (typeof(m)){"LPe11000", "PCIe", "Fibre Channel Adapter"}; 2648 break; 2649 case PCI_DEVICE_ID_ZEPHYR_DCSP: 2650 m = (typeof(m)){"LP2105", "PCIe", "FCoE Adapter"}; 2651 GE = 1; 2652 break; 2653 case PCI_DEVICE_ID_ZMID: 2654 m = (typeof(m)){"LPe1150", "PCIe", "Fibre Channel Adapter"}; 2655 break; 2656 case PCI_DEVICE_ID_ZSMB: 2657 m = (typeof(m)){"LPe111", "PCIe", "Fibre Channel Adapter"}; 2658 break; 2659 case PCI_DEVICE_ID_LP101: 2660 m = (typeof(m)){"LP101", "PCI-X", 2661 "Obsolete, Unsupported Fibre Channel Adapter"}; 2662 break; 2663 case PCI_DEVICE_ID_LP10000S: 2664 m = (typeof(m)){"LP10000-S", "PCI", 2665 "Obsolete, Unsupported Fibre Channel Adapter"}; 2666 break; 2667 case PCI_DEVICE_ID_LP11000S: 2668 m = (typeof(m)){"LP11000-S", "PCI-X2", 2669 "Obsolete, Unsupported Fibre Channel Adapter"}; 2670 break; 2671 case PCI_DEVICE_ID_LPE11000S: 2672 m = (typeof(m)){"LPe11000-S", "PCIe", 2673 "Obsolete, Unsupported Fibre Channel Adapter"}; 2674 break; 2675 case PCI_DEVICE_ID_SAT: 2676 m = (typeof(m)){"LPe12000", "PCIe", "Fibre Channel Adapter"}; 2677 break; 2678 case PCI_DEVICE_ID_SAT_MID: 2679 m = (typeof(m)){"LPe1250", "PCIe", "Fibre Channel Adapter"}; 2680 break; 2681 case PCI_DEVICE_ID_SAT_SMB: 2682 m = (typeof(m)){"LPe121", "PCIe", "Fibre Channel Adapter"}; 2683 break; 2684 case PCI_DEVICE_ID_SAT_DCSP: 2685 m = (typeof(m)){"LPe12002-SP", "PCIe", "Fibre Channel Adapter"}; 2686 break; 2687 case PCI_DEVICE_ID_SAT_SCSP: 2688 m = (typeof(m)){"LPe12000-SP", "PCIe", "Fibre Channel Adapter"}; 2689 break; 2690 case PCI_DEVICE_ID_SAT_S: 2691 m = (typeof(m)){"LPe12000-S", "PCIe", "Fibre Channel Adapter"}; 2692 break; 2693 case PCI_DEVICE_ID_PROTEUS_VF: 2694 m = (typeof(m)){"LPev12000", "PCIe IOV", 2695 "Obsolete, Unsupported Fibre Channel Adapter"}; 2696 break; 2697 case PCI_DEVICE_ID_PROTEUS_PF: 2698 m = (typeof(m)){"LPev12000", "PCIe IOV", 2699 "Obsolete, Unsupported Fibre Channel Adapter"}; 2700 break; 2701 case PCI_DEVICE_ID_PROTEUS_S: 2702 m = (typeof(m)){"LPemv12002-S", "PCIe IOV", 2703 "Obsolete, Unsupported Fibre Channel Adapter"}; 2704 break; 2705 case PCI_DEVICE_ID_TIGERSHARK: 2706 oneConnect = 1; 2707 m = (typeof(m)){"OCe10100", "PCIe", "FCoE"}; 2708 break; 2709 case PCI_DEVICE_ID_TOMCAT: 2710 oneConnect = 1; 2711 m = (typeof(m)){"OCe11100", "PCIe", "FCoE"}; 2712 break; 2713 case PCI_DEVICE_ID_FALCON: 2714 m = (typeof(m)){"LPSe12002-ML1-E", "PCIe", 2715 "EmulexSecure Fibre"}; 2716 break; 2717 case PCI_DEVICE_ID_BALIUS: 2718 m = (typeof(m)){"LPVe12002", "PCIe Shared I/O", 2719 "Obsolete, Unsupported Fibre Channel Adapter"}; 2720 break; 2721 case PCI_DEVICE_ID_LANCER_FC: 2722 m = (typeof(m)){"LPe16000", "PCIe", "Fibre Channel Adapter"}; 2723 break; 2724 case PCI_DEVICE_ID_LANCER_FC_VF: 2725 m = (typeof(m)){"LPe16000", "PCIe", 2726 "Obsolete, Unsupported Fibre Channel Adapter"}; 2727 break; 2728 case PCI_DEVICE_ID_LANCER_FCOE: 2729 oneConnect = 1; 2730 m = (typeof(m)){"OCe15100", "PCIe", "FCoE"}; 2731 break; 2732 case PCI_DEVICE_ID_LANCER_FCOE_VF: 2733 oneConnect = 1; 2734 m = (typeof(m)){"OCe15100", "PCIe", 2735 "Obsolete, Unsupported FCoE"}; 2736 break; 2737 case PCI_DEVICE_ID_LANCER_G6_FC: 2738 m = (typeof(m)){"LPe32000", "PCIe", "Fibre Channel Adapter"}; 2739 break; 2740 case PCI_DEVICE_ID_LANCER_G7_FC: 2741 m = (typeof(m)){"LPe36000", "PCIe", "Fibre Channel Adapter"}; 2742 break; 2743 case PCI_DEVICE_ID_LANCER_G7P_FC: 2744 m = (typeof(m)){"LPe38000", "PCIe", "Fibre Channel Adapter"}; 2745 break; 2746 case PCI_DEVICE_ID_SKYHAWK: 2747 case PCI_DEVICE_ID_SKYHAWK_VF: 2748 oneConnect = 1; 2749 m = (typeof(m)){"OCe14000", "PCIe", "FCoE"}; 2750 break; 2751 default: 2752 m = (typeof(m)){"Unknown", "", ""}; 2753 break; 2754 } 2755 2756 if (mdp && mdp[0] == '\0') 2757 snprintf(mdp, 79,"%s", m.name); 2758 /* 2759 * oneConnect hba requires special processing, they are all initiators 2760 * and we put the port number on the end 2761 */ 2762 if (descp && descp[0] == '\0') { 2763 if (oneConnect) 2764 snprintf(descp, 255, 2765 "Emulex OneConnect %s, %s Initiator %s", 2766 m.name, m.function, 2767 phba->Port); 2768 else if (max_speed == 0) 2769 snprintf(descp, 255, 2770 "Emulex %s %s %s", 2771 m.name, m.bus, m.function); 2772 else 2773 snprintf(descp, 255, 2774 "Emulex %s %d%s %s %s", 2775 m.name, max_speed, (GE) ? "GE" : "Gb", 2776 m.bus, m.function); 2777 } 2778 } 2779 2780 /** 2781 * lpfc_sli3_post_buffer - Post IOCB(s) with DMA buffer descriptor(s) to a IOCB ring 2782 * @phba: pointer to lpfc hba data structure. 2783 * @pring: pointer to a IOCB ring. 2784 * @cnt: the number of IOCBs to be posted to the IOCB ring. 2785 * 2786 * This routine posts a given number of IOCBs with the associated DMA buffer 2787 * descriptors specified by the cnt argument to the given IOCB ring. 2788 * 2789 * Return codes 2790 * The number of IOCBs NOT able to be posted to the IOCB ring. 2791 **/ 2792 int 2793 lpfc_sli3_post_buffer(struct lpfc_hba *phba, struct lpfc_sli_ring *pring, int cnt) 2794 { 2795 IOCB_t *icmd; 2796 struct lpfc_iocbq *iocb; 2797 struct lpfc_dmabuf *mp1, *mp2; 2798 2799 cnt += pring->missbufcnt; 2800 2801 /* While there are buffers to post */ 2802 while (cnt > 0) { 2803 /* Allocate buffer for command iocb */ 2804 iocb = lpfc_sli_get_iocbq(phba); 2805 if (iocb == NULL) { 2806 pring->missbufcnt = cnt; 2807 return cnt; 2808 } 2809 icmd = &iocb->iocb; 2810 2811 /* 2 buffers can be posted per command */ 2812 /* Allocate buffer to post */ 2813 mp1 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL); 2814 if (mp1) 2815 mp1->virt = lpfc_mbuf_alloc(phba, MEM_PRI, &mp1->phys); 2816 if (!mp1 || !mp1->virt) { 2817 kfree(mp1); 2818 lpfc_sli_release_iocbq(phba, iocb); 2819 pring->missbufcnt = cnt; 2820 return cnt; 2821 } 2822 2823 INIT_LIST_HEAD(&mp1->list); 2824 /* Allocate buffer to post */ 2825 if (cnt > 1) { 2826 mp2 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL); 2827 if (mp2) 2828 mp2->virt = lpfc_mbuf_alloc(phba, MEM_PRI, 2829 &mp2->phys); 2830 if (!mp2 || !mp2->virt) { 2831 kfree(mp2); 2832 lpfc_mbuf_free(phba, mp1->virt, mp1->phys); 2833 kfree(mp1); 2834 lpfc_sli_release_iocbq(phba, iocb); 2835 pring->missbufcnt = cnt; 2836 return cnt; 2837 } 2838 2839 INIT_LIST_HEAD(&mp2->list); 2840 } else { 2841 mp2 = NULL; 2842 } 2843 2844 icmd->un.cont64[0].addrHigh = putPaddrHigh(mp1->phys); 2845 icmd->un.cont64[0].addrLow = putPaddrLow(mp1->phys); 2846 icmd->un.cont64[0].tus.f.bdeSize = FCELSSIZE; 2847 icmd->ulpBdeCount = 1; 2848 cnt--; 2849 if (mp2) { 2850 icmd->un.cont64[1].addrHigh = putPaddrHigh(mp2->phys); 2851 icmd->un.cont64[1].addrLow = putPaddrLow(mp2->phys); 2852 icmd->un.cont64[1].tus.f.bdeSize = FCELSSIZE; 2853 cnt--; 2854 icmd->ulpBdeCount = 2; 2855 } 2856 2857 icmd->ulpCommand = CMD_QUE_RING_BUF64_CN; 2858 icmd->ulpLe = 1; 2859 2860 if (lpfc_sli_issue_iocb(phba, pring->ringno, iocb, 0) == 2861 IOCB_ERROR) { 2862 lpfc_mbuf_free(phba, mp1->virt, mp1->phys); 2863 kfree(mp1); 2864 cnt++; 2865 if (mp2) { 2866 lpfc_mbuf_free(phba, mp2->virt, mp2->phys); 2867 kfree(mp2); 2868 cnt++; 2869 } 2870 lpfc_sli_release_iocbq(phba, iocb); 2871 pring->missbufcnt = cnt; 2872 return cnt; 2873 } 2874 lpfc_sli_ringpostbuf_put(phba, pring, mp1); 2875 if (mp2) 2876 lpfc_sli_ringpostbuf_put(phba, pring, mp2); 2877 } 2878 pring->missbufcnt = 0; 2879 return 0; 2880 } 2881 2882 /** 2883 * lpfc_post_rcv_buf - Post the initial receive IOCB buffers to ELS ring 2884 * @phba: pointer to lpfc hba data structure. 2885 * 2886 * This routine posts initial receive IOCB buffers to the ELS ring. The 2887 * current number of initial IOCB buffers specified by LPFC_BUF_RING0 is 2888 * set to 64 IOCBs. SLI3 only. 2889 * 2890 * Return codes 2891 * 0 - success (currently always success) 2892 **/ 2893 static int 2894 lpfc_post_rcv_buf(struct lpfc_hba *phba) 2895 { 2896 struct lpfc_sli *psli = &phba->sli; 2897 2898 /* Ring 0, ELS / CT buffers */ 2899 lpfc_sli3_post_buffer(phba, &psli->sli3_ring[LPFC_ELS_RING], LPFC_BUF_RING0); 2900 /* Ring 2 - FCP no buffers needed */ 2901 2902 return 0; 2903 } 2904 2905 #define S(N,V) (((V)<<(N))|((V)>>(32-(N)))) 2906 2907 /** 2908 * lpfc_sha_init - Set up initial array of hash table entries 2909 * @HashResultPointer: pointer to an array as hash table. 2910 * 2911 * This routine sets up the initial values to the array of hash table entries 2912 * for the LC HBAs. 2913 **/ 2914 static void 2915 lpfc_sha_init(uint32_t * HashResultPointer) 2916 { 2917 HashResultPointer[0] = 0x67452301; 2918 HashResultPointer[1] = 0xEFCDAB89; 2919 HashResultPointer[2] = 0x98BADCFE; 2920 HashResultPointer[3] = 0x10325476; 2921 HashResultPointer[4] = 0xC3D2E1F0; 2922 } 2923 2924 /** 2925 * lpfc_sha_iterate - Iterate initial hash table with the working hash table 2926 * @HashResultPointer: pointer to an initial/result hash table. 2927 * @HashWorkingPointer: pointer to an working hash table. 2928 * 2929 * This routine iterates an initial hash table pointed by @HashResultPointer 2930 * with the values from the working hash table pointeed by @HashWorkingPointer. 2931 * The results are putting back to the initial hash table, returned through 2932 * the @HashResultPointer as the result hash table. 2933 **/ 2934 static void 2935 lpfc_sha_iterate(uint32_t * HashResultPointer, uint32_t * HashWorkingPointer) 2936 { 2937 int t; 2938 uint32_t TEMP; 2939 uint32_t A, B, C, D, E; 2940 t = 16; 2941 do { 2942 HashWorkingPointer[t] = 2943 S(1, 2944 HashWorkingPointer[t - 3] ^ HashWorkingPointer[t - 2945 8] ^ 2946 HashWorkingPointer[t - 14] ^ HashWorkingPointer[t - 16]); 2947 } while (++t <= 79); 2948 t = 0; 2949 A = HashResultPointer[0]; 2950 B = HashResultPointer[1]; 2951 C = HashResultPointer[2]; 2952 D = HashResultPointer[3]; 2953 E = HashResultPointer[4]; 2954 2955 do { 2956 if (t < 20) { 2957 TEMP = ((B & C) | ((~B) & D)) + 0x5A827999; 2958 } else if (t < 40) { 2959 TEMP = (B ^ C ^ D) + 0x6ED9EBA1; 2960 } else if (t < 60) { 2961 TEMP = ((B & C) | (B & D) | (C & D)) + 0x8F1BBCDC; 2962 } else { 2963 TEMP = (B ^ C ^ D) + 0xCA62C1D6; 2964 } 2965 TEMP += S(5, A) + E + HashWorkingPointer[t]; 2966 E = D; 2967 D = C; 2968 C = S(30, B); 2969 B = A; 2970 A = TEMP; 2971 } while (++t <= 79); 2972 2973 HashResultPointer[0] += A; 2974 HashResultPointer[1] += B; 2975 HashResultPointer[2] += C; 2976 HashResultPointer[3] += D; 2977 HashResultPointer[4] += E; 2978 2979 } 2980 2981 /** 2982 * lpfc_challenge_key - Create challenge key based on WWPN of the HBA 2983 * @RandomChallenge: pointer to the entry of host challenge random number array. 2984 * @HashWorking: pointer to the entry of the working hash array. 2985 * 2986 * This routine calculates the working hash array referred by @HashWorking 2987 * from the challenge random numbers associated with the host, referred by 2988 * @RandomChallenge. The result is put into the entry of the working hash 2989 * array and returned by reference through @HashWorking. 2990 **/ 2991 static void 2992 lpfc_challenge_key(uint32_t * RandomChallenge, uint32_t * HashWorking) 2993 { 2994 *HashWorking = (*RandomChallenge ^ *HashWorking); 2995 } 2996 2997 /** 2998 * lpfc_hba_init - Perform special handling for LC HBA initialization 2999 * @phba: pointer to lpfc hba data structure. 3000 * @hbainit: pointer to an array of unsigned 32-bit integers. 3001 * 3002 * This routine performs the special handling for LC HBA initialization. 3003 **/ 3004 void 3005 lpfc_hba_init(struct lpfc_hba *phba, uint32_t *hbainit) 3006 { 3007 int t; 3008 uint32_t *HashWorking; 3009 uint32_t *pwwnn = (uint32_t *) phba->wwnn; 3010 3011 HashWorking = kcalloc(80, sizeof(uint32_t), GFP_KERNEL); 3012 if (!HashWorking) 3013 return; 3014 3015 HashWorking[0] = HashWorking[78] = *pwwnn++; 3016 HashWorking[1] = HashWorking[79] = *pwwnn; 3017 3018 for (t = 0; t < 7; t++) 3019 lpfc_challenge_key(phba->RandomData + t, HashWorking + t); 3020 3021 lpfc_sha_init(hbainit); 3022 lpfc_sha_iterate(hbainit, HashWorking); 3023 kfree(HashWorking); 3024 } 3025 3026 /** 3027 * lpfc_cleanup - Performs vport cleanups before deleting a vport 3028 * @vport: pointer to a virtual N_Port data structure. 3029 * 3030 * This routine performs the necessary cleanups before deleting the @vport. 3031 * It invokes the discovery state machine to perform necessary state 3032 * transitions and to release the ndlps associated with the @vport. Note, 3033 * the physical port is treated as @vport 0. 3034 **/ 3035 void 3036 lpfc_cleanup(struct lpfc_vport *vport) 3037 { 3038 struct lpfc_hba *phba = vport->phba; 3039 struct lpfc_nodelist *ndlp, *next_ndlp; 3040 int i = 0; 3041 3042 if (phba->link_state > LPFC_LINK_DOWN) 3043 lpfc_port_link_failure(vport); 3044 3045 /* Clean up VMID resources */ 3046 if (lpfc_is_vmid_enabled(phba)) 3047 lpfc_vmid_vport_cleanup(vport); 3048 3049 list_for_each_entry_safe(ndlp, next_ndlp, &vport->fc_nodes, nlp_listp) { 3050 if (vport->port_type != LPFC_PHYSICAL_PORT && 3051 ndlp->nlp_DID == Fabric_DID) { 3052 /* Just free up ndlp with Fabric_DID for vports */ 3053 lpfc_nlp_put(ndlp); 3054 continue; 3055 } 3056 3057 if (ndlp->nlp_DID == Fabric_Cntl_DID && 3058 ndlp->nlp_state == NLP_STE_UNUSED_NODE) { 3059 lpfc_nlp_put(ndlp); 3060 continue; 3061 } 3062 3063 /* Fabric Ports not in UNMAPPED state are cleaned up in the 3064 * DEVICE_RM event. 3065 */ 3066 if (ndlp->nlp_type & NLP_FABRIC && 3067 ndlp->nlp_state == NLP_STE_UNMAPPED_NODE) 3068 lpfc_disc_state_machine(vport, ndlp, NULL, 3069 NLP_EVT_DEVICE_RECOVERY); 3070 3071 if (!(ndlp->fc4_xpt_flags & (NVME_XPT_REGD|SCSI_XPT_REGD))) 3072 lpfc_disc_state_machine(vport, ndlp, NULL, 3073 NLP_EVT_DEVICE_RM); 3074 } 3075 3076 /* This is a special case flush to return all 3077 * IOs before entering this loop. There are 3078 * two points in the code where a flush is 3079 * avoided if the FC_UNLOADING flag is set. 3080 * one is in the multipool destroy, 3081 * (this prevents a crash) and the other is 3082 * in the nvme abort handler, ( also prevents 3083 * a crash). Both of these exceptions are 3084 * cases where the slot is still accessible. 3085 * The flush here is only when the pci slot 3086 * is offline. 3087 */ 3088 if (vport->load_flag & FC_UNLOADING && 3089 pci_channel_offline(phba->pcidev)) 3090 lpfc_sli_flush_io_rings(vport->phba); 3091 3092 /* At this point, ALL ndlp's should be gone 3093 * because of the previous NLP_EVT_DEVICE_RM. 3094 * Lets wait for this to happen, if needed. 3095 */ 3096 while (!list_empty(&vport->fc_nodes)) { 3097 if (i++ > 3000) { 3098 lpfc_printf_vlog(vport, KERN_ERR, 3099 LOG_TRACE_EVENT, 3100 "0233 Nodelist not empty\n"); 3101 list_for_each_entry_safe(ndlp, next_ndlp, 3102 &vport->fc_nodes, nlp_listp) { 3103 lpfc_printf_vlog(ndlp->vport, KERN_ERR, 3104 LOG_DISCOVERY, 3105 "0282 did:x%x ndlp:x%px " 3106 "refcnt:%d xflags x%x nflag x%x\n", 3107 ndlp->nlp_DID, (void *)ndlp, 3108 kref_read(&ndlp->kref), 3109 ndlp->fc4_xpt_flags, 3110 ndlp->nlp_flag); 3111 } 3112 break; 3113 } 3114 3115 /* Wait for any activity on ndlps to settle */ 3116 msleep(10); 3117 } 3118 lpfc_cleanup_vports_rrqs(vport, NULL); 3119 } 3120 3121 /** 3122 * lpfc_stop_vport_timers - Stop all the timers associated with a vport 3123 * @vport: pointer to a virtual N_Port data structure. 3124 * 3125 * This routine stops all the timers associated with a @vport. This function 3126 * is invoked before disabling or deleting a @vport. Note that the physical 3127 * port is treated as @vport 0. 3128 **/ 3129 void 3130 lpfc_stop_vport_timers(struct lpfc_vport *vport) 3131 { 3132 del_timer_sync(&vport->els_tmofunc); 3133 del_timer_sync(&vport->delayed_disc_tmo); 3134 lpfc_can_disctmo(vport); 3135 return; 3136 } 3137 3138 /** 3139 * __lpfc_sli4_stop_fcf_redisc_wait_timer - Stop FCF rediscovery wait timer 3140 * @phba: pointer to lpfc hba data structure. 3141 * 3142 * This routine stops the SLI4 FCF rediscover wait timer if it's on. The 3143 * caller of this routine should already hold the host lock. 3144 **/ 3145 void 3146 __lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba *phba) 3147 { 3148 /* Clear pending FCF rediscovery wait flag */ 3149 phba->fcf.fcf_flag &= ~FCF_REDISC_PEND; 3150 3151 /* Now, try to stop the timer */ 3152 del_timer(&phba->fcf.redisc_wait); 3153 } 3154 3155 /** 3156 * lpfc_sli4_stop_fcf_redisc_wait_timer - Stop FCF rediscovery wait timer 3157 * @phba: pointer to lpfc hba data structure. 3158 * 3159 * This routine stops the SLI4 FCF rediscover wait timer if it's on. It 3160 * checks whether the FCF rediscovery wait timer is pending with the host 3161 * lock held before proceeding with disabling the timer and clearing the 3162 * wait timer pendig flag. 3163 **/ 3164 void 3165 lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba *phba) 3166 { 3167 spin_lock_irq(&phba->hbalock); 3168 if (!(phba->fcf.fcf_flag & FCF_REDISC_PEND)) { 3169 /* FCF rediscovery timer already fired or stopped */ 3170 spin_unlock_irq(&phba->hbalock); 3171 return; 3172 } 3173 __lpfc_sli4_stop_fcf_redisc_wait_timer(phba); 3174 /* Clear failover in progress flags */ 3175 phba->fcf.fcf_flag &= ~(FCF_DEAD_DISC | FCF_ACVL_DISC); 3176 spin_unlock_irq(&phba->hbalock); 3177 } 3178 3179 /** 3180 * lpfc_cmf_stop - Stop CMF processing 3181 * @phba: pointer to lpfc hba data structure. 3182 * 3183 * This is called when the link goes down or if CMF mode is turned OFF. 3184 * It is also called when going offline or unloaded just before the 3185 * congestion info buffer is unregistered. 3186 **/ 3187 void 3188 lpfc_cmf_stop(struct lpfc_hba *phba) 3189 { 3190 int cpu; 3191 struct lpfc_cgn_stat *cgs; 3192 3193 /* We only do something if CMF is enabled */ 3194 if (!phba->sli4_hba.pc_sli4_params.cmf) 3195 return; 3196 3197 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT, 3198 "6221 Stop CMF / Cancel Timer\n"); 3199 3200 /* Cancel the CMF timer */ 3201 hrtimer_cancel(&phba->cmf_timer); 3202 3203 /* Zero CMF counters */ 3204 atomic_set(&phba->cmf_busy, 0); 3205 for_each_present_cpu(cpu) { 3206 cgs = per_cpu_ptr(phba->cmf_stat, cpu); 3207 atomic64_set(&cgs->total_bytes, 0); 3208 atomic64_set(&cgs->rcv_bytes, 0); 3209 atomic_set(&cgs->rx_io_cnt, 0); 3210 atomic64_set(&cgs->rx_latency, 0); 3211 } 3212 atomic_set(&phba->cmf_bw_wait, 0); 3213 3214 /* Resume any blocked IO - Queue unblock on workqueue */ 3215 queue_work(phba->wq, &phba->unblock_request_work); 3216 } 3217 3218 static inline uint64_t 3219 lpfc_get_max_line_rate(struct lpfc_hba *phba) 3220 { 3221 uint64_t rate = lpfc_sli_port_speed_get(phba); 3222 3223 return ((((unsigned long)rate) * 1024 * 1024) / 10); 3224 } 3225 3226 void 3227 lpfc_cmf_signal_init(struct lpfc_hba *phba) 3228 { 3229 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT, 3230 "6223 Signal CMF init\n"); 3231 3232 /* Use the new fc_linkspeed to recalculate */ 3233 phba->cmf_interval_rate = LPFC_CMF_INTERVAL; 3234 phba->cmf_max_line_rate = lpfc_get_max_line_rate(phba); 3235 phba->cmf_link_byte_count = div_u64(phba->cmf_max_line_rate * 3236 phba->cmf_interval_rate, 1000); 3237 phba->cmf_max_bytes_per_interval = phba->cmf_link_byte_count; 3238 3239 /* This is a signal to firmware to sync up CMF BW with link speed */ 3240 lpfc_issue_cmf_sync_wqe(phba, 0, 0); 3241 } 3242 3243 /** 3244 * lpfc_cmf_start - Start CMF processing 3245 * @phba: pointer to lpfc hba data structure. 3246 * 3247 * This is called when the link comes up or if CMF mode is turned OFF 3248 * to Monitor or Managed. 3249 **/ 3250 void 3251 lpfc_cmf_start(struct lpfc_hba *phba) 3252 { 3253 struct lpfc_cgn_stat *cgs; 3254 int cpu; 3255 3256 /* We only do something if CMF is enabled */ 3257 if (!phba->sli4_hba.pc_sli4_params.cmf || 3258 phba->cmf_active_mode == LPFC_CFG_OFF) 3259 return; 3260 3261 /* Reinitialize congestion buffer info */ 3262 lpfc_init_congestion_buf(phba); 3263 3264 atomic_set(&phba->cgn_fabric_warn_cnt, 0); 3265 atomic_set(&phba->cgn_fabric_alarm_cnt, 0); 3266 atomic_set(&phba->cgn_sync_alarm_cnt, 0); 3267 atomic_set(&phba->cgn_sync_warn_cnt, 0); 3268 3269 atomic_set(&phba->cmf_busy, 0); 3270 for_each_present_cpu(cpu) { 3271 cgs = per_cpu_ptr(phba->cmf_stat, cpu); 3272 atomic64_set(&cgs->total_bytes, 0); 3273 atomic64_set(&cgs->rcv_bytes, 0); 3274 atomic_set(&cgs->rx_io_cnt, 0); 3275 atomic64_set(&cgs->rx_latency, 0); 3276 } 3277 phba->cmf_latency.tv_sec = 0; 3278 phba->cmf_latency.tv_nsec = 0; 3279 3280 lpfc_cmf_signal_init(phba); 3281 3282 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT, 3283 "6222 Start CMF / Timer\n"); 3284 3285 phba->cmf_timer_cnt = 0; 3286 hrtimer_start(&phba->cmf_timer, 3287 ktime_set(0, LPFC_CMF_INTERVAL * 1000000), 3288 HRTIMER_MODE_REL); 3289 /* Setup for latency check in IO cmpl routines */ 3290 ktime_get_real_ts64(&phba->cmf_latency); 3291 3292 atomic_set(&phba->cmf_bw_wait, 0); 3293 atomic_set(&phba->cmf_stop_io, 0); 3294 } 3295 3296 /** 3297 * lpfc_stop_hba_timers - Stop all the timers associated with an HBA 3298 * @phba: pointer to lpfc hba data structure. 3299 * 3300 * This routine stops all the timers associated with a HBA. This function is 3301 * invoked before either putting a HBA offline or unloading the driver. 3302 **/ 3303 void 3304 lpfc_stop_hba_timers(struct lpfc_hba *phba) 3305 { 3306 if (phba->pport) 3307 lpfc_stop_vport_timers(phba->pport); 3308 cancel_delayed_work_sync(&phba->eq_delay_work); 3309 cancel_delayed_work_sync(&phba->idle_stat_delay_work); 3310 del_timer_sync(&phba->sli.mbox_tmo); 3311 del_timer_sync(&phba->fabric_block_timer); 3312 del_timer_sync(&phba->eratt_poll); 3313 del_timer_sync(&phba->hb_tmofunc); 3314 if (phba->sli_rev == LPFC_SLI_REV4) { 3315 del_timer_sync(&phba->rrq_tmr); 3316 phba->hba_flag &= ~HBA_RRQ_ACTIVE; 3317 } 3318 phba->hba_flag &= ~(HBA_HBEAT_INP | HBA_HBEAT_TMO); 3319 3320 switch (phba->pci_dev_grp) { 3321 case LPFC_PCI_DEV_LP: 3322 /* Stop any LightPulse device specific driver timers */ 3323 del_timer_sync(&phba->fcp_poll_timer); 3324 break; 3325 case LPFC_PCI_DEV_OC: 3326 /* Stop any OneConnect device specific driver timers */ 3327 lpfc_sli4_stop_fcf_redisc_wait_timer(phba); 3328 break; 3329 default: 3330 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 3331 "0297 Invalid device group (x%x)\n", 3332 phba->pci_dev_grp); 3333 break; 3334 } 3335 return; 3336 } 3337 3338 /** 3339 * lpfc_block_mgmt_io - Mark a HBA's management interface as blocked 3340 * @phba: pointer to lpfc hba data structure. 3341 * @mbx_action: flag for mailbox no wait action. 3342 * 3343 * This routine marks a HBA's management interface as blocked. Once the HBA's 3344 * management interface is marked as blocked, all the user space access to 3345 * the HBA, whether they are from sysfs interface or libdfc interface will 3346 * all be blocked. The HBA is set to block the management interface when the 3347 * driver prepares the HBA interface for online or offline. 3348 **/ 3349 static void 3350 lpfc_block_mgmt_io(struct lpfc_hba *phba, int mbx_action) 3351 { 3352 unsigned long iflag; 3353 uint8_t actcmd = MBX_HEARTBEAT; 3354 unsigned long timeout; 3355 3356 spin_lock_irqsave(&phba->hbalock, iflag); 3357 phba->sli.sli_flag |= LPFC_BLOCK_MGMT_IO; 3358 spin_unlock_irqrestore(&phba->hbalock, iflag); 3359 if (mbx_action == LPFC_MBX_NO_WAIT) 3360 return; 3361 timeout = msecs_to_jiffies(LPFC_MBOX_TMO * 1000) + jiffies; 3362 spin_lock_irqsave(&phba->hbalock, iflag); 3363 if (phba->sli.mbox_active) { 3364 actcmd = phba->sli.mbox_active->u.mb.mbxCommand; 3365 /* Determine how long we might wait for the active mailbox 3366 * command to be gracefully completed by firmware. 3367 */ 3368 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba, 3369 phba->sli.mbox_active) * 1000) + jiffies; 3370 } 3371 spin_unlock_irqrestore(&phba->hbalock, iflag); 3372 3373 /* Wait for the outstnading mailbox command to complete */ 3374 while (phba->sli.mbox_active) { 3375 /* Check active mailbox complete status every 2ms */ 3376 msleep(2); 3377 if (time_after(jiffies, timeout)) { 3378 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 3379 "2813 Mgmt IO is Blocked %x " 3380 "- mbox cmd %x still active\n", 3381 phba->sli.sli_flag, actcmd); 3382 break; 3383 } 3384 } 3385 } 3386 3387 /** 3388 * lpfc_sli4_node_prep - Assign RPIs for active nodes. 3389 * @phba: pointer to lpfc hba data structure. 3390 * 3391 * Allocate RPIs for all active remote nodes. This is needed whenever 3392 * an SLI4 adapter is reset and the driver is not unloading. Its purpose 3393 * is to fixup the temporary rpi assignments. 3394 **/ 3395 void 3396 lpfc_sli4_node_prep(struct lpfc_hba *phba) 3397 { 3398 struct lpfc_nodelist *ndlp, *next_ndlp; 3399 struct lpfc_vport **vports; 3400 int i, rpi; 3401 3402 if (phba->sli_rev != LPFC_SLI_REV4) 3403 return; 3404 3405 vports = lpfc_create_vport_work_array(phba); 3406 if (vports == NULL) 3407 return; 3408 3409 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) { 3410 if (vports[i]->load_flag & FC_UNLOADING) 3411 continue; 3412 3413 list_for_each_entry_safe(ndlp, next_ndlp, 3414 &vports[i]->fc_nodes, 3415 nlp_listp) { 3416 rpi = lpfc_sli4_alloc_rpi(phba); 3417 if (rpi == LPFC_RPI_ALLOC_ERROR) { 3418 /* TODO print log? */ 3419 continue; 3420 } 3421 ndlp->nlp_rpi = rpi; 3422 lpfc_printf_vlog(ndlp->vport, KERN_INFO, 3423 LOG_NODE | LOG_DISCOVERY, 3424 "0009 Assign RPI x%x to ndlp x%px " 3425 "DID:x%06x flg:x%x\n", 3426 ndlp->nlp_rpi, ndlp, ndlp->nlp_DID, 3427 ndlp->nlp_flag); 3428 } 3429 } 3430 lpfc_destroy_vport_work_array(phba, vports); 3431 } 3432 3433 /** 3434 * lpfc_create_expedite_pool - create expedite pool 3435 * @phba: pointer to lpfc hba data structure. 3436 * 3437 * This routine moves a batch of XRIs from lpfc_io_buf_list_put of HWQ 0 3438 * to expedite pool. Mark them as expedite. 3439 **/ 3440 static void lpfc_create_expedite_pool(struct lpfc_hba *phba) 3441 { 3442 struct lpfc_sli4_hdw_queue *qp; 3443 struct lpfc_io_buf *lpfc_ncmd; 3444 struct lpfc_io_buf *lpfc_ncmd_next; 3445 struct lpfc_epd_pool *epd_pool; 3446 unsigned long iflag; 3447 3448 epd_pool = &phba->epd_pool; 3449 qp = &phba->sli4_hba.hdwq[0]; 3450 3451 spin_lock_init(&epd_pool->lock); 3452 spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag); 3453 spin_lock(&epd_pool->lock); 3454 INIT_LIST_HEAD(&epd_pool->list); 3455 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, 3456 &qp->lpfc_io_buf_list_put, list) { 3457 list_move_tail(&lpfc_ncmd->list, &epd_pool->list); 3458 lpfc_ncmd->expedite = true; 3459 qp->put_io_bufs--; 3460 epd_pool->count++; 3461 if (epd_pool->count >= XRI_BATCH) 3462 break; 3463 } 3464 spin_unlock(&epd_pool->lock); 3465 spin_unlock_irqrestore(&qp->io_buf_list_put_lock, iflag); 3466 } 3467 3468 /** 3469 * lpfc_destroy_expedite_pool - destroy expedite pool 3470 * @phba: pointer to lpfc hba data structure. 3471 * 3472 * This routine returns XRIs from expedite pool to lpfc_io_buf_list_put 3473 * of HWQ 0. Clear the mark. 3474 **/ 3475 static void lpfc_destroy_expedite_pool(struct lpfc_hba *phba) 3476 { 3477 struct lpfc_sli4_hdw_queue *qp; 3478 struct lpfc_io_buf *lpfc_ncmd; 3479 struct lpfc_io_buf *lpfc_ncmd_next; 3480 struct lpfc_epd_pool *epd_pool; 3481 unsigned long iflag; 3482 3483 epd_pool = &phba->epd_pool; 3484 qp = &phba->sli4_hba.hdwq[0]; 3485 3486 spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag); 3487 spin_lock(&epd_pool->lock); 3488 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, 3489 &epd_pool->list, list) { 3490 list_move_tail(&lpfc_ncmd->list, 3491 &qp->lpfc_io_buf_list_put); 3492 lpfc_ncmd->flags = false; 3493 qp->put_io_bufs++; 3494 epd_pool->count--; 3495 } 3496 spin_unlock(&epd_pool->lock); 3497 spin_unlock_irqrestore(&qp->io_buf_list_put_lock, iflag); 3498 } 3499 3500 /** 3501 * lpfc_create_multixri_pools - create multi-XRI pools 3502 * @phba: pointer to lpfc hba data structure. 3503 * 3504 * This routine initialize public, private per HWQ. Then, move XRIs from 3505 * lpfc_io_buf_list_put to public pool. High and low watermark are also 3506 * Initialized. 3507 **/ 3508 void lpfc_create_multixri_pools(struct lpfc_hba *phba) 3509 { 3510 u32 i, j; 3511 u32 hwq_count; 3512 u32 count_per_hwq; 3513 struct lpfc_io_buf *lpfc_ncmd; 3514 struct lpfc_io_buf *lpfc_ncmd_next; 3515 unsigned long iflag; 3516 struct lpfc_sli4_hdw_queue *qp; 3517 struct lpfc_multixri_pool *multixri_pool; 3518 struct lpfc_pbl_pool *pbl_pool; 3519 struct lpfc_pvt_pool *pvt_pool; 3520 3521 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 3522 "1234 num_hdw_queue=%d num_present_cpu=%d common_xri_cnt=%d\n", 3523 phba->cfg_hdw_queue, phba->sli4_hba.num_present_cpu, 3524 phba->sli4_hba.io_xri_cnt); 3525 3526 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) 3527 lpfc_create_expedite_pool(phba); 3528 3529 hwq_count = phba->cfg_hdw_queue; 3530 count_per_hwq = phba->sli4_hba.io_xri_cnt / hwq_count; 3531 3532 for (i = 0; i < hwq_count; i++) { 3533 multixri_pool = kzalloc(sizeof(*multixri_pool), GFP_KERNEL); 3534 3535 if (!multixri_pool) { 3536 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 3537 "1238 Failed to allocate memory for " 3538 "multixri_pool\n"); 3539 3540 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) 3541 lpfc_destroy_expedite_pool(phba); 3542 3543 j = 0; 3544 while (j < i) { 3545 qp = &phba->sli4_hba.hdwq[j]; 3546 kfree(qp->p_multixri_pool); 3547 j++; 3548 } 3549 phba->cfg_xri_rebalancing = 0; 3550 return; 3551 } 3552 3553 qp = &phba->sli4_hba.hdwq[i]; 3554 qp->p_multixri_pool = multixri_pool; 3555 3556 multixri_pool->xri_limit = count_per_hwq; 3557 multixri_pool->rrb_next_hwqid = i; 3558 3559 /* Deal with public free xri pool */ 3560 pbl_pool = &multixri_pool->pbl_pool; 3561 spin_lock_init(&pbl_pool->lock); 3562 spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag); 3563 spin_lock(&pbl_pool->lock); 3564 INIT_LIST_HEAD(&pbl_pool->list); 3565 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, 3566 &qp->lpfc_io_buf_list_put, list) { 3567 list_move_tail(&lpfc_ncmd->list, &pbl_pool->list); 3568 qp->put_io_bufs--; 3569 pbl_pool->count++; 3570 } 3571 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 3572 "1235 Moved %d buffers from PUT list over to pbl_pool[%d]\n", 3573 pbl_pool->count, i); 3574 spin_unlock(&pbl_pool->lock); 3575 spin_unlock_irqrestore(&qp->io_buf_list_put_lock, iflag); 3576 3577 /* Deal with private free xri pool */ 3578 pvt_pool = &multixri_pool->pvt_pool; 3579 pvt_pool->high_watermark = multixri_pool->xri_limit / 2; 3580 pvt_pool->low_watermark = XRI_BATCH; 3581 spin_lock_init(&pvt_pool->lock); 3582 spin_lock_irqsave(&pvt_pool->lock, iflag); 3583 INIT_LIST_HEAD(&pvt_pool->list); 3584 pvt_pool->count = 0; 3585 spin_unlock_irqrestore(&pvt_pool->lock, iflag); 3586 } 3587 } 3588 3589 /** 3590 * lpfc_destroy_multixri_pools - destroy multi-XRI pools 3591 * @phba: pointer to lpfc hba data structure. 3592 * 3593 * This routine returns XRIs from public/private to lpfc_io_buf_list_put. 3594 **/ 3595 static void lpfc_destroy_multixri_pools(struct lpfc_hba *phba) 3596 { 3597 u32 i; 3598 u32 hwq_count; 3599 struct lpfc_io_buf *lpfc_ncmd; 3600 struct lpfc_io_buf *lpfc_ncmd_next; 3601 unsigned long iflag; 3602 struct lpfc_sli4_hdw_queue *qp; 3603 struct lpfc_multixri_pool *multixri_pool; 3604 struct lpfc_pbl_pool *pbl_pool; 3605 struct lpfc_pvt_pool *pvt_pool; 3606 3607 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) 3608 lpfc_destroy_expedite_pool(phba); 3609 3610 if (!(phba->pport->load_flag & FC_UNLOADING)) 3611 lpfc_sli_flush_io_rings(phba); 3612 3613 hwq_count = phba->cfg_hdw_queue; 3614 3615 for (i = 0; i < hwq_count; i++) { 3616 qp = &phba->sli4_hba.hdwq[i]; 3617 multixri_pool = qp->p_multixri_pool; 3618 if (!multixri_pool) 3619 continue; 3620 3621 qp->p_multixri_pool = NULL; 3622 3623 spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag); 3624 3625 /* Deal with public free xri pool */ 3626 pbl_pool = &multixri_pool->pbl_pool; 3627 spin_lock(&pbl_pool->lock); 3628 3629 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 3630 "1236 Moving %d buffers from pbl_pool[%d] TO PUT list\n", 3631 pbl_pool->count, i); 3632 3633 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, 3634 &pbl_pool->list, list) { 3635 list_move_tail(&lpfc_ncmd->list, 3636 &qp->lpfc_io_buf_list_put); 3637 qp->put_io_bufs++; 3638 pbl_pool->count--; 3639 } 3640 3641 INIT_LIST_HEAD(&pbl_pool->list); 3642 pbl_pool->count = 0; 3643 3644 spin_unlock(&pbl_pool->lock); 3645 3646 /* Deal with private free xri pool */ 3647 pvt_pool = &multixri_pool->pvt_pool; 3648 spin_lock(&pvt_pool->lock); 3649 3650 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 3651 "1237 Moving %d buffers from pvt_pool[%d] TO PUT list\n", 3652 pvt_pool->count, i); 3653 3654 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, 3655 &pvt_pool->list, list) { 3656 list_move_tail(&lpfc_ncmd->list, 3657 &qp->lpfc_io_buf_list_put); 3658 qp->put_io_bufs++; 3659 pvt_pool->count--; 3660 } 3661 3662 INIT_LIST_HEAD(&pvt_pool->list); 3663 pvt_pool->count = 0; 3664 3665 spin_unlock(&pvt_pool->lock); 3666 spin_unlock_irqrestore(&qp->io_buf_list_put_lock, iflag); 3667 3668 kfree(multixri_pool); 3669 } 3670 } 3671 3672 /** 3673 * lpfc_online - Initialize and bring a HBA online 3674 * @phba: pointer to lpfc hba data structure. 3675 * 3676 * This routine initializes the HBA and brings a HBA online. During this 3677 * process, the management interface is blocked to prevent user space access 3678 * to the HBA interfering with the driver initialization. 3679 * 3680 * Return codes 3681 * 0 - successful 3682 * 1 - failed 3683 **/ 3684 int 3685 lpfc_online(struct lpfc_hba *phba) 3686 { 3687 struct lpfc_vport *vport; 3688 struct lpfc_vport **vports; 3689 int i, error = 0; 3690 bool vpis_cleared = false; 3691 3692 if (!phba) 3693 return 0; 3694 vport = phba->pport; 3695 3696 if (!(vport->fc_flag & FC_OFFLINE_MODE)) 3697 return 0; 3698 3699 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 3700 "0458 Bring Adapter online\n"); 3701 3702 lpfc_block_mgmt_io(phba, LPFC_MBX_WAIT); 3703 3704 if (phba->sli_rev == LPFC_SLI_REV4) { 3705 if (lpfc_sli4_hba_setup(phba)) { /* Initialize SLI4 HBA */ 3706 lpfc_unblock_mgmt_io(phba); 3707 return 1; 3708 } 3709 spin_lock_irq(&phba->hbalock); 3710 if (!phba->sli4_hba.max_cfg_param.vpi_used) 3711 vpis_cleared = true; 3712 spin_unlock_irq(&phba->hbalock); 3713 3714 /* Reestablish the local initiator port. 3715 * The offline process destroyed the previous lport. 3716 */ 3717 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME && 3718 !phba->nvmet_support) { 3719 error = lpfc_nvme_create_localport(phba->pport); 3720 if (error) 3721 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 3722 "6132 NVME restore reg failed " 3723 "on nvmei error x%x\n", error); 3724 } 3725 } else { 3726 lpfc_sli_queue_init(phba); 3727 if (lpfc_sli_hba_setup(phba)) { /* Initialize SLI2/SLI3 HBA */ 3728 lpfc_unblock_mgmt_io(phba); 3729 return 1; 3730 } 3731 } 3732 3733 vports = lpfc_create_vport_work_array(phba); 3734 if (vports != NULL) { 3735 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) { 3736 struct Scsi_Host *shost; 3737 shost = lpfc_shost_from_vport(vports[i]); 3738 spin_lock_irq(shost->host_lock); 3739 vports[i]->fc_flag &= ~FC_OFFLINE_MODE; 3740 if (phba->sli3_options & LPFC_SLI3_NPIV_ENABLED) 3741 vports[i]->fc_flag |= FC_VPORT_NEEDS_REG_VPI; 3742 if (phba->sli_rev == LPFC_SLI_REV4) { 3743 vports[i]->fc_flag |= FC_VPORT_NEEDS_INIT_VPI; 3744 if ((vpis_cleared) && 3745 (vports[i]->port_type != 3746 LPFC_PHYSICAL_PORT)) 3747 vports[i]->vpi = 0; 3748 } 3749 spin_unlock_irq(shost->host_lock); 3750 } 3751 } 3752 lpfc_destroy_vport_work_array(phba, vports); 3753 3754 if (phba->cfg_xri_rebalancing) 3755 lpfc_create_multixri_pools(phba); 3756 3757 lpfc_cpuhp_add(phba); 3758 3759 lpfc_unblock_mgmt_io(phba); 3760 return 0; 3761 } 3762 3763 /** 3764 * lpfc_unblock_mgmt_io - Mark a HBA's management interface to be not blocked 3765 * @phba: pointer to lpfc hba data structure. 3766 * 3767 * This routine marks a HBA's management interface as not blocked. Once the 3768 * HBA's management interface is marked as not blocked, all the user space 3769 * access to the HBA, whether they are from sysfs interface or libdfc 3770 * interface will be allowed. The HBA is set to block the management interface 3771 * when the driver prepares the HBA interface for online or offline and then 3772 * set to unblock the management interface afterwards. 3773 **/ 3774 void 3775 lpfc_unblock_mgmt_io(struct lpfc_hba * phba) 3776 { 3777 unsigned long iflag; 3778 3779 spin_lock_irqsave(&phba->hbalock, iflag); 3780 phba->sli.sli_flag &= ~LPFC_BLOCK_MGMT_IO; 3781 spin_unlock_irqrestore(&phba->hbalock, iflag); 3782 } 3783 3784 /** 3785 * lpfc_offline_prep - Prepare a HBA to be brought offline 3786 * @phba: pointer to lpfc hba data structure. 3787 * @mbx_action: flag for mailbox shutdown action. 3788 * 3789 * This routine is invoked to prepare a HBA to be brought offline. It performs 3790 * unregistration login to all the nodes on all vports and flushes the mailbox 3791 * queue to make it ready to be brought offline. 3792 **/ 3793 void 3794 lpfc_offline_prep(struct lpfc_hba *phba, int mbx_action) 3795 { 3796 struct lpfc_vport *vport = phba->pport; 3797 struct lpfc_nodelist *ndlp, *next_ndlp; 3798 struct lpfc_vport **vports; 3799 struct Scsi_Host *shost; 3800 int i; 3801 int offline; 3802 bool hba_pci_err; 3803 3804 if (vport->fc_flag & FC_OFFLINE_MODE) 3805 return; 3806 3807 lpfc_block_mgmt_io(phba, mbx_action); 3808 3809 lpfc_linkdown(phba); 3810 3811 offline = pci_channel_offline(phba->pcidev); 3812 hba_pci_err = test_bit(HBA_PCI_ERR, &phba->bit_flags); 3813 3814 /* Issue an unreg_login to all nodes on all vports */ 3815 vports = lpfc_create_vport_work_array(phba); 3816 if (vports != NULL) { 3817 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) { 3818 if (vports[i]->load_flag & FC_UNLOADING) 3819 continue; 3820 shost = lpfc_shost_from_vport(vports[i]); 3821 spin_lock_irq(shost->host_lock); 3822 vports[i]->vpi_state &= ~LPFC_VPI_REGISTERED; 3823 vports[i]->fc_flag |= FC_VPORT_NEEDS_REG_VPI; 3824 vports[i]->fc_flag &= ~FC_VFI_REGISTERED; 3825 spin_unlock_irq(shost->host_lock); 3826 3827 shost = lpfc_shost_from_vport(vports[i]); 3828 list_for_each_entry_safe(ndlp, next_ndlp, 3829 &vports[i]->fc_nodes, 3830 nlp_listp) { 3831 3832 spin_lock_irq(&ndlp->lock); 3833 ndlp->nlp_flag &= ~NLP_NPR_ADISC; 3834 spin_unlock_irq(&ndlp->lock); 3835 3836 if (offline || hba_pci_err) { 3837 spin_lock_irq(&ndlp->lock); 3838 ndlp->nlp_flag &= ~(NLP_UNREG_INP | 3839 NLP_RPI_REGISTERED); 3840 spin_unlock_irq(&ndlp->lock); 3841 if (phba->sli_rev == LPFC_SLI_REV4) 3842 lpfc_sli_rpi_release(vports[i], 3843 ndlp); 3844 } else { 3845 lpfc_unreg_rpi(vports[i], ndlp); 3846 } 3847 /* 3848 * Whenever an SLI4 port goes offline, free the 3849 * RPI. Get a new RPI when the adapter port 3850 * comes back online. 3851 */ 3852 if (phba->sli_rev == LPFC_SLI_REV4) { 3853 lpfc_printf_vlog(vports[i], KERN_INFO, 3854 LOG_NODE | LOG_DISCOVERY, 3855 "0011 Free RPI x%x on " 3856 "ndlp: x%px did x%x\n", 3857 ndlp->nlp_rpi, ndlp, 3858 ndlp->nlp_DID); 3859 lpfc_sli4_free_rpi(phba, ndlp->nlp_rpi); 3860 ndlp->nlp_rpi = LPFC_RPI_ALLOC_ERROR; 3861 } 3862 3863 if (ndlp->nlp_type & NLP_FABRIC) { 3864 lpfc_disc_state_machine(vports[i], ndlp, 3865 NULL, NLP_EVT_DEVICE_RECOVERY); 3866 3867 /* Don't remove the node unless the node 3868 * has been unregistered with the 3869 * transport, and we're not in recovery 3870 * before dev_loss_tmo triggered. 3871 * Otherwise, let dev_loss take care of 3872 * the node. 3873 */ 3874 if (!(ndlp->save_flags & 3875 NLP_IN_RECOV_POST_DEV_LOSS) && 3876 !(ndlp->fc4_xpt_flags & 3877 (NVME_XPT_REGD | SCSI_XPT_REGD))) 3878 lpfc_disc_state_machine 3879 (vports[i], ndlp, 3880 NULL, 3881 NLP_EVT_DEVICE_RM); 3882 } 3883 } 3884 } 3885 } 3886 lpfc_destroy_vport_work_array(phba, vports); 3887 3888 lpfc_sli_mbox_sys_shutdown(phba, mbx_action); 3889 3890 if (phba->wq) 3891 flush_workqueue(phba->wq); 3892 } 3893 3894 /** 3895 * lpfc_offline - Bring a HBA offline 3896 * @phba: pointer to lpfc hba data structure. 3897 * 3898 * This routine actually brings a HBA offline. It stops all the timers 3899 * associated with the HBA, brings down the SLI layer, and eventually 3900 * marks the HBA as in offline state for the upper layer protocol. 3901 **/ 3902 void 3903 lpfc_offline(struct lpfc_hba *phba) 3904 { 3905 struct Scsi_Host *shost; 3906 struct lpfc_vport **vports; 3907 int i; 3908 3909 if (phba->pport->fc_flag & FC_OFFLINE_MODE) 3910 return; 3911 3912 /* stop port and all timers associated with this hba */ 3913 lpfc_stop_port(phba); 3914 3915 /* Tear down the local and target port registrations. The 3916 * nvme transports need to cleanup. 3917 */ 3918 lpfc_nvmet_destroy_targetport(phba); 3919 lpfc_nvme_destroy_localport(phba->pport); 3920 3921 vports = lpfc_create_vport_work_array(phba); 3922 if (vports != NULL) 3923 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) 3924 lpfc_stop_vport_timers(vports[i]); 3925 lpfc_destroy_vport_work_array(phba, vports); 3926 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 3927 "0460 Bring Adapter offline\n"); 3928 /* Bring down the SLI Layer and cleanup. The HBA is offline 3929 now. */ 3930 lpfc_sli_hba_down(phba); 3931 spin_lock_irq(&phba->hbalock); 3932 phba->work_ha = 0; 3933 spin_unlock_irq(&phba->hbalock); 3934 vports = lpfc_create_vport_work_array(phba); 3935 if (vports != NULL) 3936 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) { 3937 shost = lpfc_shost_from_vport(vports[i]); 3938 spin_lock_irq(shost->host_lock); 3939 vports[i]->work_port_events = 0; 3940 vports[i]->fc_flag |= FC_OFFLINE_MODE; 3941 spin_unlock_irq(shost->host_lock); 3942 } 3943 lpfc_destroy_vport_work_array(phba, vports); 3944 /* If OFFLINE flag is clear (i.e. unloading), cpuhp removal is handled 3945 * in hba_unset 3946 */ 3947 if (phba->pport->fc_flag & FC_OFFLINE_MODE) 3948 __lpfc_cpuhp_remove(phba); 3949 3950 if (phba->cfg_xri_rebalancing) 3951 lpfc_destroy_multixri_pools(phba); 3952 } 3953 3954 /** 3955 * lpfc_scsi_free - Free all the SCSI buffers and IOCBs from driver lists 3956 * @phba: pointer to lpfc hba data structure. 3957 * 3958 * This routine is to free all the SCSI buffers and IOCBs from the driver 3959 * list back to kernel. It is called from lpfc_pci_remove_one to free 3960 * the internal resources before the device is removed from the system. 3961 **/ 3962 static void 3963 lpfc_scsi_free(struct lpfc_hba *phba) 3964 { 3965 struct lpfc_io_buf *sb, *sb_next; 3966 3967 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP)) 3968 return; 3969 3970 spin_lock_irq(&phba->hbalock); 3971 3972 /* Release all the lpfc_scsi_bufs maintained by this host. */ 3973 3974 spin_lock(&phba->scsi_buf_list_put_lock); 3975 list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list_put, 3976 list) { 3977 list_del(&sb->list); 3978 dma_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data, 3979 sb->dma_handle); 3980 kfree(sb); 3981 phba->total_scsi_bufs--; 3982 } 3983 spin_unlock(&phba->scsi_buf_list_put_lock); 3984 3985 spin_lock(&phba->scsi_buf_list_get_lock); 3986 list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list_get, 3987 list) { 3988 list_del(&sb->list); 3989 dma_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data, 3990 sb->dma_handle); 3991 kfree(sb); 3992 phba->total_scsi_bufs--; 3993 } 3994 spin_unlock(&phba->scsi_buf_list_get_lock); 3995 spin_unlock_irq(&phba->hbalock); 3996 } 3997 3998 /** 3999 * lpfc_io_free - Free all the IO buffers and IOCBs from driver lists 4000 * @phba: pointer to lpfc hba data structure. 4001 * 4002 * This routine is to free all the IO buffers and IOCBs from the driver 4003 * list back to kernel. It is called from lpfc_pci_remove_one to free 4004 * the internal resources before the device is removed from the system. 4005 **/ 4006 void 4007 lpfc_io_free(struct lpfc_hba *phba) 4008 { 4009 struct lpfc_io_buf *lpfc_ncmd, *lpfc_ncmd_next; 4010 struct lpfc_sli4_hdw_queue *qp; 4011 int idx; 4012 4013 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { 4014 qp = &phba->sli4_hba.hdwq[idx]; 4015 /* Release all the lpfc_nvme_bufs maintained by this host. */ 4016 spin_lock(&qp->io_buf_list_put_lock); 4017 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, 4018 &qp->lpfc_io_buf_list_put, 4019 list) { 4020 list_del(&lpfc_ncmd->list); 4021 qp->put_io_bufs--; 4022 dma_pool_free(phba->lpfc_sg_dma_buf_pool, 4023 lpfc_ncmd->data, lpfc_ncmd->dma_handle); 4024 if (phba->cfg_xpsgl && !phba->nvmet_support) 4025 lpfc_put_sgl_per_hdwq(phba, lpfc_ncmd); 4026 lpfc_put_cmd_rsp_buf_per_hdwq(phba, lpfc_ncmd); 4027 kfree(lpfc_ncmd); 4028 qp->total_io_bufs--; 4029 } 4030 spin_unlock(&qp->io_buf_list_put_lock); 4031 4032 spin_lock(&qp->io_buf_list_get_lock); 4033 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, 4034 &qp->lpfc_io_buf_list_get, 4035 list) { 4036 list_del(&lpfc_ncmd->list); 4037 qp->get_io_bufs--; 4038 dma_pool_free(phba->lpfc_sg_dma_buf_pool, 4039 lpfc_ncmd->data, lpfc_ncmd->dma_handle); 4040 if (phba->cfg_xpsgl && !phba->nvmet_support) 4041 lpfc_put_sgl_per_hdwq(phba, lpfc_ncmd); 4042 lpfc_put_cmd_rsp_buf_per_hdwq(phba, lpfc_ncmd); 4043 kfree(lpfc_ncmd); 4044 qp->total_io_bufs--; 4045 } 4046 spin_unlock(&qp->io_buf_list_get_lock); 4047 } 4048 } 4049 4050 /** 4051 * lpfc_sli4_els_sgl_update - update ELS xri-sgl sizing and mapping 4052 * @phba: pointer to lpfc hba data structure. 4053 * 4054 * This routine first calculates the sizes of the current els and allocated 4055 * scsi sgl lists, and then goes through all sgls to updates the physical 4056 * XRIs assigned due to port function reset. During port initialization, the 4057 * current els and allocated scsi sgl lists are 0s. 4058 * 4059 * Return codes 4060 * 0 - successful (for now, it always returns 0) 4061 **/ 4062 int 4063 lpfc_sli4_els_sgl_update(struct lpfc_hba *phba) 4064 { 4065 struct lpfc_sglq *sglq_entry = NULL, *sglq_entry_next = NULL; 4066 uint16_t i, lxri, xri_cnt, els_xri_cnt; 4067 LIST_HEAD(els_sgl_list); 4068 int rc; 4069 4070 /* 4071 * update on pci function's els xri-sgl list 4072 */ 4073 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba); 4074 4075 if (els_xri_cnt > phba->sli4_hba.els_xri_cnt) { 4076 /* els xri-sgl expanded */ 4077 xri_cnt = els_xri_cnt - phba->sli4_hba.els_xri_cnt; 4078 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 4079 "3157 ELS xri-sgl count increased from " 4080 "%d to %d\n", phba->sli4_hba.els_xri_cnt, 4081 els_xri_cnt); 4082 /* allocate the additional els sgls */ 4083 for (i = 0; i < xri_cnt; i++) { 4084 sglq_entry = kzalloc(sizeof(struct lpfc_sglq), 4085 GFP_KERNEL); 4086 if (sglq_entry == NULL) { 4087 lpfc_printf_log(phba, KERN_ERR, 4088 LOG_TRACE_EVENT, 4089 "2562 Failure to allocate an " 4090 "ELS sgl entry:%d\n", i); 4091 rc = -ENOMEM; 4092 goto out_free_mem; 4093 } 4094 sglq_entry->buff_type = GEN_BUFF_TYPE; 4095 sglq_entry->virt = lpfc_mbuf_alloc(phba, 0, 4096 &sglq_entry->phys); 4097 if (sglq_entry->virt == NULL) { 4098 kfree(sglq_entry); 4099 lpfc_printf_log(phba, KERN_ERR, 4100 LOG_TRACE_EVENT, 4101 "2563 Failure to allocate an " 4102 "ELS mbuf:%d\n", i); 4103 rc = -ENOMEM; 4104 goto out_free_mem; 4105 } 4106 sglq_entry->sgl = sglq_entry->virt; 4107 memset(sglq_entry->sgl, 0, LPFC_BPL_SIZE); 4108 sglq_entry->state = SGL_FREED; 4109 list_add_tail(&sglq_entry->list, &els_sgl_list); 4110 } 4111 spin_lock_irq(&phba->sli4_hba.sgl_list_lock); 4112 list_splice_init(&els_sgl_list, 4113 &phba->sli4_hba.lpfc_els_sgl_list); 4114 spin_unlock_irq(&phba->sli4_hba.sgl_list_lock); 4115 } else if (els_xri_cnt < phba->sli4_hba.els_xri_cnt) { 4116 /* els xri-sgl shrinked */ 4117 xri_cnt = phba->sli4_hba.els_xri_cnt - els_xri_cnt; 4118 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 4119 "3158 ELS xri-sgl count decreased from " 4120 "%d to %d\n", phba->sli4_hba.els_xri_cnt, 4121 els_xri_cnt); 4122 spin_lock_irq(&phba->sli4_hba.sgl_list_lock); 4123 list_splice_init(&phba->sli4_hba.lpfc_els_sgl_list, 4124 &els_sgl_list); 4125 /* release extra els sgls from list */ 4126 for (i = 0; i < xri_cnt; i++) { 4127 list_remove_head(&els_sgl_list, 4128 sglq_entry, struct lpfc_sglq, list); 4129 if (sglq_entry) { 4130 __lpfc_mbuf_free(phba, sglq_entry->virt, 4131 sglq_entry->phys); 4132 kfree(sglq_entry); 4133 } 4134 } 4135 list_splice_init(&els_sgl_list, 4136 &phba->sli4_hba.lpfc_els_sgl_list); 4137 spin_unlock_irq(&phba->sli4_hba.sgl_list_lock); 4138 } else 4139 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 4140 "3163 ELS xri-sgl count unchanged: %d\n", 4141 els_xri_cnt); 4142 phba->sli4_hba.els_xri_cnt = els_xri_cnt; 4143 4144 /* update xris to els sgls on the list */ 4145 sglq_entry = NULL; 4146 sglq_entry_next = NULL; 4147 list_for_each_entry_safe(sglq_entry, sglq_entry_next, 4148 &phba->sli4_hba.lpfc_els_sgl_list, list) { 4149 lxri = lpfc_sli4_next_xritag(phba); 4150 if (lxri == NO_XRI) { 4151 lpfc_printf_log(phba, KERN_ERR, 4152 LOG_TRACE_EVENT, 4153 "2400 Failed to allocate xri for " 4154 "ELS sgl\n"); 4155 rc = -ENOMEM; 4156 goto out_free_mem; 4157 } 4158 sglq_entry->sli4_lxritag = lxri; 4159 sglq_entry->sli4_xritag = phba->sli4_hba.xri_ids[lxri]; 4160 } 4161 return 0; 4162 4163 out_free_mem: 4164 lpfc_free_els_sgl_list(phba); 4165 return rc; 4166 } 4167 4168 /** 4169 * lpfc_sli4_nvmet_sgl_update - update xri-sgl sizing and mapping 4170 * @phba: pointer to lpfc hba data structure. 4171 * 4172 * This routine first calculates the sizes of the current els and allocated 4173 * scsi sgl lists, and then goes through all sgls to updates the physical 4174 * XRIs assigned due to port function reset. During port initialization, the 4175 * current els and allocated scsi sgl lists are 0s. 4176 * 4177 * Return codes 4178 * 0 - successful (for now, it always returns 0) 4179 **/ 4180 int 4181 lpfc_sli4_nvmet_sgl_update(struct lpfc_hba *phba) 4182 { 4183 struct lpfc_sglq *sglq_entry = NULL, *sglq_entry_next = NULL; 4184 uint16_t i, lxri, xri_cnt, els_xri_cnt; 4185 uint16_t nvmet_xri_cnt; 4186 LIST_HEAD(nvmet_sgl_list); 4187 int rc; 4188 4189 /* 4190 * update on pci function's nvmet xri-sgl list 4191 */ 4192 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba); 4193 4194 /* For NVMET, ALL remaining XRIs are dedicated for IO processing */ 4195 nvmet_xri_cnt = phba->sli4_hba.max_cfg_param.max_xri - els_xri_cnt; 4196 if (nvmet_xri_cnt > phba->sli4_hba.nvmet_xri_cnt) { 4197 /* els xri-sgl expanded */ 4198 xri_cnt = nvmet_xri_cnt - phba->sli4_hba.nvmet_xri_cnt; 4199 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 4200 "6302 NVMET xri-sgl cnt grew from %d to %d\n", 4201 phba->sli4_hba.nvmet_xri_cnt, nvmet_xri_cnt); 4202 /* allocate the additional nvmet sgls */ 4203 for (i = 0; i < xri_cnt; i++) { 4204 sglq_entry = kzalloc(sizeof(struct lpfc_sglq), 4205 GFP_KERNEL); 4206 if (sglq_entry == NULL) { 4207 lpfc_printf_log(phba, KERN_ERR, 4208 LOG_TRACE_EVENT, 4209 "6303 Failure to allocate an " 4210 "NVMET sgl entry:%d\n", i); 4211 rc = -ENOMEM; 4212 goto out_free_mem; 4213 } 4214 sglq_entry->buff_type = NVMET_BUFF_TYPE; 4215 sglq_entry->virt = lpfc_nvmet_buf_alloc(phba, 0, 4216 &sglq_entry->phys); 4217 if (sglq_entry->virt == NULL) { 4218 kfree(sglq_entry); 4219 lpfc_printf_log(phba, KERN_ERR, 4220 LOG_TRACE_EVENT, 4221 "6304 Failure to allocate an " 4222 "NVMET buf:%d\n", i); 4223 rc = -ENOMEM; 4224 goto out_free_mem; 4225 } 4226 sglq_entry->sgl = sglq_entry->virt; 4227 memset(sglq_entry->sgl, 0, 4228 phba->cfg_sg_dma_buf_size); 4229 sglq_entry->state = SGL_FREED; 4230 list_add_tail(&sglq_entry->list, &nvmet_sgl_list); 4231 } 4232 spin_lock_irq(&phba->hbalock); 4233 spin_lock(&phba->sli4_hba.sgl_list_lock); 4234 list_splice_init(&nvmet_sgl_list, 4235 &phba->sli4_hba.lpfc_nvmet_sgl_list); 4236 spin_unlock(&phba->sli4_hba.sgl_list_lock); 4237 spin_unlock_irq(&phba->hbalock); 4238 } else if (nvmet_xri_cnt < phba->sli4_hba.nvmet_xri_cnt) { 4239 /* nvmet xri-sgl shrunk */ 4240 xri_cnt = phba->sli4_hba.nvmet_xri_cnt - nvmet_xri_cnt; 4241 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 4242 "6305 NVMET xri-sgl count decreased from " 4243 "%d to %d\n", phba->sli4_hba.nvmet_xri_cnt, 4244 nvmet_xri_cnt); 4245 spin_lock_irq(&phba->hbalock); 4246 spin_lock(&phba->sli4_hba.sgl_list_lock); 4247 list_splice_init(&phba->sli4_hba.lpfc_nvmet_sgl_list, 4248 &nvmet_sgl_list); 4249 /* release extra nvmet sgls from list */ 4250 for (i = 0; i < xri_cnt; i++) { 4251 list_remove_head(&nvmet_sgl_list, 4252 sglq_entry, struct lpfc_sglq, list); 4253 if (sglq_entry) { 4254 lpfc_nvmet_buf_free(phba, sglq_entry->virt, 4255 sglq_entry->phys); 4256 kfree(sglq_entry); 4257 } 4258 } 4259 list_splice_init(&nvmet_sgl_list, 4260 &phba->sli4_hba.lpfc_nvmet_sgl_list); 4261 spin_unlock(&phba->sli4_hba.sgl_list_lock); 4262 spin_unlock_irq(&phba->hbalock); 4263 } else 4264 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 4265 "6306 NVMET xri-sgl count unchanged: %d\n", 4266 nvmet_xri_cnt); 4267 phba->sli4_hba.nvmet_xri_cnt = nvmet_xri_cnt; 4268 4269 /* update xris to nvmet sgls on the list */ 4270 sglq_entry = NULL; 4271 sglq_entry_next = NULL; 4272 list_for_each_entry_safe(sglq_entry, sglq_entry_next, 4273 &phba->sli4_hba.lpfc_nvmet_sgl_list, list) { 4274 lxri = lpfc_sli4_next_xritag(phba); 4275 if (lxri == NO_XRI) { 4276 lpfc_printf_log(phba, KERN_ERR, 4277 LOG_TRACE_EVENT, 4278 "6307 Failed to allocate xri for " 4279 "NVMET sgl\n"); 4280 rc = -ENOMEM; 4281 goto out_free_mem; 4282 } 4283 sglq_entry->sli4_lxritag = lxri; 4284 sglq_entry->sli4_xritag = phba->sli4_hba.xri_ids[lxri]; 4285 } 4286 return 0; 4287 4288 out_free_mem: 4289 lpfc_free_nvmet_sgl_list(phba); 4290 return rc; 4291 } 4292 4293 int 4294 lpfc_io_buf_flush(struct lpfc_hba *phba, struct list_head *cbuf) 4295 { 4296 LIST_HEAD(blist); 4297 struct lpfc_sli4_hdw_queue *qp; 4298 struct lpfc_io_buf *lpfc_cmd; 4299 struct lpfc_io_buf *iobufp, *prev_iobufp; 4300 int idx, cnt, xri, inserted; 4301 4302 cnt = 0; 4303 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { 4304 qp = &phba->sli4_hba.hdwq[idx]; 4305 spin_lock_irq(&qp->io_buf_list_get_lock); 4306 spin_lock(&qp->io_buf_list_put_lock); 4307 4308 /* Take everything off the get and put lists */ 4309 list_splice_init(&qp->lpfc_io_buf_list_get, &blist); 4310 list_splice(&qp->lpfc_io_buf_list_put, &blist); 4311 INIT_LIST_HEAD(&qp->lpfc_io_buf_list_get); 4312 INIT_LIST_HEAD(&qp->lpfc_io_buf_list_put); 4313 cnt += qp->get_io_bufs + qp->put_io_bufs; 4314 qp->get_io_bufs = 0; 4315 qp->put_io_bufs = 0; 4316 qp->total_io_bufs = 0; 4317 spin_unlock(&qp->io_buf_list_put_lock); 4318 spin_unlock_irq(&qp->io_buf_list_get_lock); 4319 } 4320 4321 /* 4322 * Take IO buffers off blist and put on cbuf sorted by XRI. 4323 * This is because POST_SGL takes a sequential range of XRIs 4324 * to post to the firmware. 4325 */ 4326 for (idx = 0; idx < cnt; idx++) { 4327 list_remove_head(&blist, lpfc_cmd, struct lpfc_io_buf, list); 4328 if (!lpfc_cmd) 4329 return cnt; 4330 if (idx == 0) { 4331 list_add_tail(&lpfc_cmd->list, cbuf); 4332 continue; 4333 } 4334 xri = lpfc_cmd->cur_iocbq.sli4_xritag; 4335 inserted = 0; 4336 prev_iobufp = NULL; 4337 list_for_each_entry(iobufp, cbuf, list) { 4338 if (xri < iobufp->cur_iocbq.sli4_xritag) { 4339 if (prev_iobufp) 4340 list_add(&lpfc_cmd->list, 4341 &prev_iobufp->list); 4342 else 4343 list_add(&lpfc_cmd->list, cbuf); 4344 inserted = 1; 4345 break; 4346 } 4347 prev_iobufp = iobufp; 4348 } 4349 if (!inserted) 4350 list_add_tail(&lpfc_cmd->list, cbuf); 4351 } 4352 return cnt; 4353 } 4354 4355 int 4356 lpfc_io_buf_replenish(struct lpfc_hba *phba, struct list_head *cbuf) 4357 { 4358 struct lpfc_sli4_hdw_queue *qp; 4359 struct lpfc_io_buf *lpfc_cmd; 4360 int idx, cnt; 4361 4362 qp = phba->sli4_hba.hdwq; 4363 cnt = 0; 4364 while (!list_empty(cbuf)) { 4365 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { 4366 list_remove_head(cbuf, lpfc_cmd, 4367 struct lpfc_io_buf, list); 4368 if (!lpfc_cmd) 4369 return cnt; 4370 cnt++; 4371 qp = &phba->sli4_hba.hdwq[idx]; 4372 lpfc_cmd->hdwq_no = idx; 4373 lpfc_cmd->hdwq = qp; 4374 lpfc_cmd->cur_iocbq.cmd_cmpl = NULL; 4375 spin_lock(&qp->io_buf_list_put_lock); 4376 list_add_tail(&lpfc_cmd->list, 4377 &qp->lpfc_io_buf_list_put); 4378 qp->put_io_bufs++; 4379 qp->total_io_bufs++; 4380 spin_unlock(&qp->io_buf_list_put_lock); 4381 } 4382 } 4383 return cnt; 4384 } 4385 4386 /** 4387 * lpfc_sli4_io_sgl_update - update xri-sgl sizing and mapping 4388 * @phba: pointer to lpfc hba data structure. 4389 * 4390 * This routine first calculates the sizes of the current els and allocated 4391 * scsi sgl lists, and then goes through all sgls to updates the physical 4392 * XRIs assigned due to port function reset. During port initialization, the 4393 * current els and allocated scsi sgl lists are 0s. 4394 * 4395 * Return codes 4396 * 0 - successful (for now, it always returns 0) 4397 **/ 4398 int 4399 lpfc_sli4_io_sgl_update(struct lpfc_hba *phba) 4400 { 4401 struct lpfc_io_buf *lpfc_ncmd = NULL, *lpfc_ncmd_next = NULL; 4402 uint16_t i, lxri, els_xri_cnt; 4403 uint16_t io_xri_cnt, io_xri_max; 4404 LIST_HEAD(io_sgl_list); 4405 int rc, cnt; 4406 4407 /* 4408 * update on pci function's allocated nvme xri-sgl list 4409 */ 4410 4411 /* maximum number of xris available for nvme buffers */ 4412 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba); 4413 io_xri_max = phba->sli4_hba.max_cfg_param.max_xri - els_xri_cnt; 4414 phba->sli4_hba.io_xri_max = io_xri_max; 4415 4416 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 4417 "6074 Current allocated XRI sgl count:%d, " 4418 "maximum XRI count:%d els_xri_cnt:%d\n\n", 4419 phba->sli4_hba.io_xri_cnt, 4420 phba->sli4_hba.io_xri_max, 4421 els_xri_cnt); 4422 4423 cnt = lpfc_io_buf_flush(phba, &io_sgl_list); 4424 4425 if (phba->sli4_hba.io_xri_cnt > phba->sli4_hba.io_xri_max) { 4426 /* max nvme xri shrunk below the allocated nvme buffers */ 4427 io_xri_cnt = phba->sli4_hba.io_xri_cnt - 4428 phba->sli4_hba.io_xri_max; 4429 /* release the extra allocated nvme buffers */ 4430 for (i = 0; i < io_xri_cnt; i++) { 4431 list_remove_head(&io_sgl_list, lpfc_ncmd, 4432 struct lpfc_io_buf, list); 4433 if (lpfc_ncmd) { 4434 dma_pool_free(phba->lpfc_sg_dma_buf_pool, 4435 lpfc_ncmd->data, 4436 lpfc_ncmd->dma_handle); 4437 kfree(lpfc_ncmd); 4438 } 4439 } 4440 phba->sli4_hba.io_xri_cnt -= io_xri_cnt; 4441 } 4442 4443 /* update xris associated to remaining allocated nvme buffers */ 4444 lpfc_ncmd = NULL; 4445 lpfc_ncmd_next = NULL; 4446 phba->sli4_hba.io_xri_cnt = cnt; 4447 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, 4448 &io_sgl_list, list) { 4449 lxri = lpfc_sli4_next_xritag(phba); 4450 if (lxri == NO_XRI) { 4451 lpfc_printf_log(phba, KERN_ERR, 4452 LOG_TRACE_EVENT, 4453 "6075 Failed to allocate xri for " 4454 "nvme buffer\n"); 4455 rc = -ENOMEM; 4456 goto out_free_mem; 4457 } 4458 lpfc_ncmd->cur_iocbq.sli4_lxritag = lxri; 4459 lpfc_ncmd->cur_iocbq.sli4_xritag = phba->sli4_hba.xri_ids[lxri]; 4460 } 4461 cnt = lpfc_io_buf_replenish(phba, &io_sgl_list); 4462 return 0; 4463 4464 out_free_mem: 4465 lpfc_io_free(phba); 4466 return rc; 4467 } 4468 4469 /** 4470 * lpfc_new_io_buf - IO buffer allocator for HBA with SLI4 IF spec 4471 * @phba: Pointer to lpfc hba data structure. 4472 * @num_to_alloc: The requested number of buffers to allocate. 4473 * 4474 * This routine allocates nvme buffers for device with SLI-4 interface spec, 4475 * the nvme buffer contains all the necessary information needed to initiate 4476 * an I/O. After allocating up to @num_to_allocate IO buffers and put 4477 * them on a list, it post them to the port by using SGL block post. 4478 * 4479 * Return codes: 4480 * int - number of IO buffers that were allocated and posted. 4481 * 0 = failure, less than num_to_alloc is a partial failure. 4482 **/ 4483 int 4484 lpfc_new_io_buf(struct lpfc_hba *phba, int num_to_alloc) 4485 { 4486 struct lpfc_io_buf *lpfc_ncmd; 4487 struct lpfc_iocbq *pwqeq; 4488 uint16_t iotag, lxri = 0; 4489 int bcnt, num_posted; 4490 LIST_HEAD(prep_nblist); 4491 LIST_HEAD(post_nblist); 4492 LIST_HEAD(nvme_nblist); 4493 4494 phba->sli4_hba.io_xri_cnt = 0; 4495 for (bcnt = 0; bcnt < num_to_alloc; bcnt++) { 4496 lpfc_ncmd = kzalloc(sizeof(*lpfc_ncmd), GFP_KERNEL); 4497 if (!lpfc_ncmd) 4498 break; 4499 /* 4500 * Get memory from the pci pool to map the virt space to 4501 * pci bus space for an I/O. The DMA buffer includes the 4502 * number of SGE's necessary to support the sg_tablesize. 4503 */ 4504 lpfc_ncmd->data = dma_pool_zalloc(phba->lpfc_sg_dma_buf_pool, 4505 GFP_KERNEL, 4506 &lpfc_ncmd->dma_handle); 4507 if (!lpfc_ncmd->data) { 4508 kfree(lpfc_ncmd); 4509 break; 4510 } 4511 4512 if (phba->cfg_xpsgl && !phba->nvmet_support) { 4513 INIT_LIST_HEAD(&lpfc_ncmd->dma_sgl_xtra_list); 4514 } else { 4515 /* 4516 * 4K Page alignment is CRITICAL to BlockGuard, double 4517 * check to be sure. 4518 */ 4519 if ((phba->sli3_options & LPFC_SLI3_BG_ENABLED) && 4520 (((unsigned long)(lpfc_ncmd->data) & 4521 (unsigned long)(SLI4_PAGE_SIZE - 1)) != 0)) { 4522 lpfc_printf_log(phba, KERN_ERR, 4523 LOG_TRACE_EVENT, 4524 "3369 Memory alignment err: " 4525 "addr=%lx\n", 4526 (unsigned long)lpfc_ncmd->data); 4527 dma_pool_free(phba->lpfc_sg_dma_buf_pool, 4528 lpfc_ncmd->data, 4529 lpfc_ncmd->dma_handle); 4530 kfree(lpfc_ncmd); 4531 break; 4532 } 4533 } 4534 4535 INIT_LIST_HEAD(&lpfc_ncmd->dma_cmd_rsp_list); 4536 4537 lxri = lpfc_sli4_next_xritag(phba); 4538 if (lxri == NO_XRI) { 4539 dma_pool_free(phba->lpfc_sg_dma_buf_pool, 4540 lpfc_ncmd->data, lpfc_ncmd->dma_handle); 4541 kfree(lpfc_ncmd); 4542 break; 4543 } 4544 pwqeq = &lpfc_ncmd->cur_iocbq; 4545 4546 /* Allocate iotag for lpfc_ncmd->cur_iocbq. */ 4547 iotag = lpfc_sli_next_iotag(phba, pwqeq); 4548 if (iotag == 0) { 4549 dma_pool_free(phba->lpfc_sg_dma_buf_pool, 4550 lpfc_ncmd->data, lpfc_ncmd->dma_handle); 4551 kfree(lpfc_ncmd); 4552 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 4553 "6121 Failed to allocate IOTAG for" 4554 " XRI:0x%x\n", lxri); 4555 lpfc_sli4_free_xri(phba, lxri); 4556 break; 4557 } 4558 pwqeq->sli4_lxritag = lxri; 4559 pwqeq->sli4_xritag = phba->sli4_hba.xri_ids[lxri]; 4560 4561 /* Initialize local short-hand pointers. */ 4562 lpfc_ncmd->dma_sgl = lpfc_ncmd->data; 4563 lpfc_ncmd->dma_phys_sgl = lpfc_ncmd->dma_handle; 4564 lpfc_ncmd->cur_iocbq.io_buf = lpfc_ncmd; 4565 spin_lock_init(&lpfc_ncmd->buf_lock); 4566 4567 /* add the nvme buffer to a post list */ 4568 list_add_tail(&lpfc_ncmd->list, &post_nblist); 4569 phba->sli4_hba.io_xri_cnt++; 4570 } 4571 lpfc_printf_log(phba, KERN_INFO, LOG_NVME, 4572 "6114 Allocate %d out of %d requested new NVME " 4573 "buffers of size x%zu bytes\n", bcnt, num_to_alloc, 4574 sizeof(*lpfc_ncmd)); 4575 4576 4577 /* post the list of nvme buffer sgls to port if available */ 4578 if (!list_empty(&post_nblist)) 4579 num_posted = lpfc_sli4_post_io_sgl_list( 4580 phba, &post_nblist, bcnt); 4581 else 4582 num_posted = 0; 4583 4584 return num_posted; 4585 } 4586 4587 static uint64_t 4588 lpfc_get_wwpn(struct lpfc_hba *phba) 4589 { 4590 uint64_t wwn; 4591 int rc; 4592 LPFC_MBOXQ_t *mboxq; 4593 MAILBOX_t *mb; 4594 4595 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, 4596 GFP_KERNEL); 4597 if (!mboxq) 4598 return (uint64_t)-1; 4599 4600 /* First get WWN of HBA instance */ 4601 lpfc_read_nv(phba, mboxq); 4602 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); 4603 if (rc != MBX_SUCCESS) { 4604 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 4605 "6019 Mailbox failed , mbxCmd x%x " 4606 "READ_NV, mbxStatus x%x\n", 4607 bf_get(lpfc_mqe_command, &mboxq->u.mqe), 4608 bf_get(lpfc_mqe_status, &mboxq->u.mqe)); 4609 mempool_free(mboxq, phba->mbox_mem_pool); 4610 return (uint64_t) -1; 4611 } 4612 mb = &mboxq->u.mb; 4613 memcpy(&wwn, (char *)mb->un.varRDnvp.portname, sizeof(uint64_t)); 4614 /* wwn is WWPN of HBA instance */ 4615 mempool_free(mboxq, phba->mbox_mem_pool); 4616 if (phba->sli_rev == LPFC_SLI_REV4) 4617 return be64_to_cpu(wwn); 4618 else 4619 return rol64(wwn, 32); 4620 } 4621 4622 static unsigned short lpfc_get_sg_tablesize(struct lpfc_hba *phba) 4623 { 4624 if (phba->sli_rev == LPFC_SLI_REV4) 4625 if (phba->cfg_xpsgl && !phba->nvmet_support) 4626 return LPFC_MAX_SG_TABLESIZE; 4627 else 4628 return phba->cfg_scsi_seg_cnt; 4629 else 4630 return phba->cfg_sg_seg_cnt; 4631 } 4632 4633 /** 4634 * lpfc_vmid_res_alloc - Allocates resources for VMID 4635 * @phba: pointer to lpfc hba data structure. 4636 * @vport: pointer to vport data structure 4637 * 4638 * This routine allocated the resources needed for the VMID. 4639 * 4640 * Return codes 4641 * 0 on Success 4642 * Non-0 on Failure 4643 */ 4644 static int 4645 lpfc_vmid_res_alloc(struct lpfc_hba *phba, struct lpfc_vport *vport) 4646 { 4647 /* VMID feature is supported only on SLI4 */ 4648 if (phba->sli_rev == LPFC_SLI_REV3) { 4649 phba->cfg_vmid_app_header = 0; 4650 phba->cfg_vmid_priority_tagging = 0; 4651 } 4652 4653 if (lpfc_is_vmid_enabled(phba)) { 4654 vport->vmid = 4655 kcalloc(phba->cfg_max_vmid, sizeof(struct lpfc_vmid), 4656 GFP_KERNEL); 4657 if (!vport->vmid) 4658 return -ENOMEM; 4659 4660 rwlock_init(&vport->vmid_lock); 4661 4662 /* Set the VMID parameters for the vport */ 4663 vport->vmid_priority_tagging = phba->cfg_vmid_priority_tagging; 4664 vport->vmid_inactivity_timeout = 4665 phba->cfg_vmid_inactivity_timeout; 4666 vport->max_vmid = phba->cfg_max_vmid; 4667 vport->cur_vmid_cnt = 0; 4668 4669 vport->vmid_priority_range = bitmap_zalloc 4670 (LPFC_VMID_MAX_PRIORITY_RANGE, GFP_KERNEL); 4671 4672 if (!vport->vmid_priority_range) { 4673 kfree(vport->vmid); 4674 return -ENOMEM; 4675 } 4676 4677 hash_init(vport->hash_table); 4678 } 4679 return 0; 4680 } 4681 4682 /** 4683 * lpfc_create_port - Create an FC port 4684 * @phba: pointer to lpfc hba data structure. 4685 * @instance: a unique integer ID to this FC port. 4686 * @dev: pointer to the device data structure. 4687 * 4688 * This routine creates a FC port for the upper layer protocol. The FC port 4689 * can be created on top of either a physical port or a virtual port provided 4690 * by the HBA. This routine also allocates a SCSI host data structure (shost) 4691 * and associates the FC port created before adding the shost into the SCSI 4692 * layer. 4693 * 4694 * Return codes 4695 * @vport - pointer to the virtual N_Port data structure. 4696 * NULL - port create failed. 4697 **/ 4698 struct lpfc_vport * 4699 lpfc_create_port(struct lpfc_hba *phba, int instance, struct device *dev) 4700 { 4701 struct lpfc_vport *vport; 4702 struct Scsi_Host *shost = NULL; 4703 struct scsi_host_template *template; 4704 int error = 0; 4705 int i; 4706 uint64_t wwn; 4707 bool use_no_reset_hba = false; 4708 int rc; 4709 4710 if (lpfc_no_hba_reset_cnt) { 4711 if (phba->sli_rev < LPFC_SLI_REV4 && 4712 dev == &phba->pcidev->dev) { 4713 /* Reset the port first */ 4714 lpfc_sli_brdrestart(phba); 4715 rc = lpfc_sli_chipset_init(phba); 4716 if (rc) 4717 return NULL; 4718 } 4719 wwn = lpfc_get_wwpn(phba); 4720 } 4721 4722 for (i = 0; i < lpfc_no_hba_reset_cnt; i++) { 4723 if (wwn == lpfc_no_hba_reset[i]) { 4724 lpfc_printf_log(phba, KERN_ERR, 4725 LOG_TRACE_EVENT, 4726 "6020 Setting use_no_reset port=%llx\n", 4727 wwn); 4728 use_no_reset_hba = true; 4729 break; 4730 } 4731 } 4732 4733 /* Seed template for SCSI host registration */ 4734 if (dev == &phba->pcidev->dev) { 4735 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) { 4736 /* Seed physical port template */ 4737 template = &lpfc_template; 4738 4739 if (use_no_reset_hba) 4740 /* template is for a no reset SCSI Host */ 4741 template->eh_host_reset_handler = NULL; 4742 4743 /* Seed updated value of sg_tablesize */ 4744 template->sg_tablesize = lpfc_get_sg_tablesize(phba); 4745 } else { 4746 /* NVMET is for physical port only */ 4747 template = &lpfc_template_nvme; 4748 } 4749 } else { 4750 /* Seed vport template */ 4751 template = &lpfc_vport_template; 4752 4753 /* Seed updated value of sg_tablesize */ 4754 template->sg_tablesize = lpfc_get_sg_tablesize(phba); 4755 } 4756 4757 shost = scsi_host_alloc(template, sizeof(struct lpfc_vport)); 4758 if (!shost) 4759 goto out; 4760 4761 vport = (struct lpfc_vport *) shost->hostdata; 4762 vport->phba = phba; 4763 vport->load_flag |= FC_LOADING; 4764 vport->fc_flag |= FC_VPORT_NEEDS_REG_VPI; 4765 vport->fc_rscn_flush = 0; 4766 lpfc_get_vport_cfgparam(vport); 4767 4768 /* Adjust value in vport */ 4769 vport->cfg_enable_fc4_type = phba->cfg_enable_fc4_type; 4770 4771 shost->unique_id = instance; 4772 shost->max_id = LPFC_MAX_TARGET; 4773 shost->max_lun = vport->cfg_max_luns; 4774 shost->this_id = -1; 4775 shost->max_cmd_len = 16; 4776 4777 if (phba->sli_rev == LPFC_SLI_REV4) { 4778 if (!phba->cfg_fcp_mq_threshold || 4779 phba->cfg_fcp_mq_threshold > phba->cfg_hdw_queue) 4780 phba->cfg_fcp_mq_threshold = phba->cfg_hdw_queue; 4781 4782 shost->nr_hw_queues = min_t(int, 2 * num_possible_nodes(), 4783 phba->cfg_fcp_mq_threshold); 4784 4785 shost->dma_boundary = 4786 phba->sli4_hba.pc_sli4_params.sge_supp_len-1; 4787 } else 4788 /* SLI-3 has a limited number of hardware queues (3), 4789 * thus there is only one for FCP processing. 4790 */ 4791 shost->nr_hw_queues = 1; 4792 4793 /* 4794 * Set initial can_queue value since 0 is no longer supported and 4795 * scsi_add_host will fail. This will be adjusted later based on the 4796 * max xri value determined in hba setup. 4797 */ 4798 shost->can_queue = phba->cfg_hba_queue_depth - 10; 4799 if (dev != &phba->pcidev->dev) { 4800 shost->transportt = lpfc_vport_transport_template; 4801 vport->port_type = LPFC_NPIV_PORT; 4802 } else { 4803 shost->transportt = lpfc_transport_template; 4804 vport->port_type = LPFC_PHYSICAL_PORT; 4805 } 4806 4807 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP, 4808 "9081 CreatePort TMPLATE type %x TBLsize %d " 4809 "SEGcnt %d/%d\n", 4810 vport->port_type, shost->sg_tablesize, 4811 phba->cfg_scsi_seg_cnt, phba->cfg_sg_seg_cnt); 4812 4813 /* Allocate the resources for VMID */ 4814 rc = lpfc_vmid_res_alloc(phba, vport); 4815 4816 if (rc) 4817 goto out_put_shost; 4818 4819 /* Initialize all internally managed lists. */ 4820 INIT_LIST_HEAD(&vport->fc_nodes); 4821 INIT_LIST_HEAD(&vport->rcv_buffer_list); 4822 spin_lock_init(&vport->work_port_lock); 4823 4824 timer_setup(&vport->fc_disctmo, lpfc_disc_timeout, 0); 4825 4826 timer_setup(&vport->els_tmofunc, lpfc_els_timeout, 0); 4827 4828 timer_setup(&vport->delayed_disc_tmo, lpfc_delayed_disc_tmo, 0); 4829 4830 if (phba->sli3_options & LPFC_SLI3_BG_ENABLED) 4831 lpfc_setup_bg(phba, shost); 4832 4833 error = scsi_add_host_with_dma(shost, dev, &phba->pcidev->dev); 4834 if (error) 4835 goto out_free_vmid; 4836 4837 spin_lock_irq(&phba->port_list_lock); 4838 list_add_tail(&vport->listentry, &phba->port_list); 4839 spin_unlock_irq(&phba->port_list_lock); 4840 return vport; 4841 4842 out_free_vmid: 4843 kfree(vport->vmid); 4844 bitmap_free(vport->vmid_priority_range); 4845 out_put_shost: 4846 scsi_host_put(shost); 4847 out: 4848 return NULL; 4849 } 4850 4851 /** 4852 * destroy_port - destroy an FC port 4853 * @vport: pointer to an lpfc virtual N_Port data structure. 4854 * 4855 * This routine destroys a FC port from the upper layer protocol. All the 4856 * resources associated with the port are released. 4857 **/ 4858 void 4859 destroy_port(struct lpfc_vport *vport) 4860 { 4861 struct Scsi_Host *shost = lpfc_shost_from_vport(vport); 4862 struct lpfc_hba *phba = vport->phba; 4863 4864 lpfc_debugfs_terminate(vport); 4865 fc_remove_host(shost); 4866 scsi_remove_host(shost); 4867 4868 spin_lock_irq(&phba->port_list_lock); 4869 list_del_init(&vport->listentry); 4870 spin_unlock_irq(&phba->port_list_lock); 4871 4872 lpfc_cleanup(vport); 4873 return; 4874 } 4875 4876 /** 4877 * lpfc_get_instance - Get a unique integer ID 4878 * 4879 * This routine allocates a unique integer ID from lpfc_hba_index pool. It 4880 * uses the kernel idr facility to perform the task. 4881 * 4882 * Return codes: 4883 * instance - a unique integer ID allocated as the new instance. 4884 * -1 - lpfc get instance failed. 4885 **/ 4886 int 4887 lpfc_get_instance(void) 4888 { 4889 int ret; 4890 4891 ret = idr_alloc(&lpfc_hba_index, NULL, 0, 0, GFP_KERNEL); 4892 return ret < 0 ? -1 : ret; 4893 } 4894 4895 /** 4896 * lpfc_scan_finished - method for SCSI layer to detect whether scan is done 4897 * @shost: pointer to SCSI host data structure. 4898 * @time: elapsed time of the scan in jiffies. 4899 * 4900 * This routine is called by the SCSI layer with a SCSI host to determine 4901 * whether the scan host is finished. 4902 * 4903 * Note: there is no scan_start function as adapter initialization will have 4904 * asynchronously kicked off the link initialization. 4905 * 4906 * Return codes 4907 * 0 - SCSI host scan is not over yet. 4908 * 1 - SCSI host scan is over. 4909 **/ 4910 int lpfc_scan_finished(struct Scsi_Host *shost, unsigned long time) 4911 { 4912 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata; 4913 struct lpfc_hba *phba = vport->phba; 4914 int stat = 0; 4915 4916 spin_lock_irq(shost->host_lock); 4917 4918 if (vport->load_flag & FC_UNLOADING) { 4919 stat = 1; 4920 goto finished; 4921 } 4922 if (time >= msecs_to_jiffies(30 * 1000)) { 4923 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 4924 "0461 Scanning longer than 30 " 4925 "seconds. Continuing initialization\n"); 4926 stat = 1; 4927 goto finished; 4928 } 4929 if (time >= msecs_to_jiffies(15 * 1000) && 4930 phba->link_state <= LPFC_LINK_DOWN) { 4931 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 4932 "0465 Link down longer than 15 " 4933 "seconds. Continuing initialization\n"); 4934 stat = 1; 4935 goto finished; 4936 } 4937 4938 if (vport->port_state != LPFC_VPORT_READY) 4939 goto finished; 4940 if (vport->num_disc_nodes || vport->fc_prli_sent) 4941 goto finished; 4942 if (vport->fc_map_cnt == 0 && time < msecs_to_jiffies(2 * 1000)) 4943 goto finished; 4944 if ((phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) != 0) 4945 goto finished; 4946 4947 stat = 1; 4948 4949 finished: 4950 spin_unlock_irq(shost->host_lock); 4951 return stat; 4952 } 4953 4954 static void lpfc_host_supported_speeds_set(struct Scsi_Host *shost) 4955 { 4956 struct lpfc_vport *vport = (struct lpfc_vport *)shost->hostdata; 4957 struct lpfc_hba *phba = vport->phba; 4958 4959 fc_host_supported_speeds(shost) = 0; 4960 /* 4961 * Avoid reporting supported link speed for FCoE as it can't be 4962 * controlled via FCoE. 4963 */ 4964 if (phba->hba_flag & HBA_FCOE_MODE) 4965 return; 4966 4967 if (phba->lmt & LMT_256Gb) 4968 fc_host_supported_speeds(shost) |= FC_PORTSPEED_256GBIT; 4969 if (phba->lmt & LMT_128Gb) 4970 fc_host_supported_speeds(shost) |= FC_PORTSPEED_128GBIT; 4971 if (phba->lmt & LMT_64Gb) 4972 fc_host_supported_speeds(shost) |= FC_PORTSPEED_64GBIT; 4973 if (phba->lmt & LMT_32Gb) 4974 fc_host_supported_speeds(shost) |= FC_PORTSPEED_32GBIT; 4975 if (phba->lmt & LMT_16Gb) 4976 fc_host_supported_speeds(shost) |= FC_PORTSPEED_16GBIT; 4977 if (phba->lmt & LMT_10Gb) 4978 fc_host_supported_speeds(shost) |= FC_PORTSPEED_10GBIT; 4979 if (phba->lmt & LMT_8Gb) 4980 fc_host_supported_speeds(shost) |= FC_PORTSPEED_8GBIT; 4981 if (phba->lmt & LMT_4Gb) 4982 fc_host_supported_speeds(shost) |= FC_PORTSPEED_4GBIT; 4983 if (phba->lmt & LMT_2Gb) 4984 fc_host_supported_speeds(shost) |= FC_PORTSPEED_2GBIT; 4985 if (phba->lmt & LMT_1Gb) 4986 fc_host_supported_speeds(shost) |= FC_PORTSPEED_1GBIT; 4987 } 4988 4989 /** 4990 * lpfc_host_attrib_init - Initialize SCSI host attributes on a FC port 4991 * @shost: pointer to SCSI host data structure. 4992 * 4993 * This routine initializes a given SCSI host attributes on a FC port. The 4994 * SCSI host can be either on top of a physical port or a virtual port. 4995 **/ 4996 void lpfc_host_attrib_init(struct Scsi_Host *shost) 4997 { 4998 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata; 4999 struct lpfc_hba *phba = vport->phba; 5000 /* 5001 * Set fixed host attributes. Must done after lpfc_sli_hba_setup(). 5002 */ 5003 5004 fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn); 5005 fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn); 5006 fc_host_supported_classes(shost) = FC_COS_CLASS3; 5007 5008 memset(fc_host_supported_fc4s(shost), 0, 5009 sizeof(fc_host_supported_fc4s(shost))); 5010 fc_host_supported_fc4s(shost)[2] = 1; 5011 fc_host_supported_fc4s(shost)[7] = 1; 5012 5013 lpfc_vport_symbolic_node_name(vport, fc_host_symbolic_name(shost), 5014 sizeof fc_host_symbolic_name(shost)); 5015 5016 lpfc_host_supported_speeds_set(shost); 5017 5018 fc_host_maxframe_size(shost) = 5019 (((uint32_t) vport->fc_sparam.cmn.bbRcvSizeMsb & 0x0F) << 8) | 5020 (uint32_t) vport->fc_sparam.cmn.bbRcvSizeLsb; 5021 5022 fc_host_dev_loss_tmo(shost) = vport->cfg_devloss_tmo; 5023 5024 /* This value is also unchanging */ 5025 memset(fc_host_active_fc4s(shost), 0, 5026 sizeof(fc_host_active_fc4s(shost))); 5027 fc_host_active_fc4s(shost)[2] = 1; 5028 fc_host_active_fc4s(shost)[7] = 1; 5029 5030 fc_host_max_npiv_vports(shost) = phba->max_vpi; 5031 spin_lock_irq(shost->host_lock); 5032 vport->load_flag &= ~FC_LOADING; 5033 spin_unlock_irq(shost->host_lock); 5034 } 5035 5036 /** 5037 * lpfc_stop_port_s3 - Stop SLI3 device port 5038 * @phba: pointer to lpfc hba data structure. 5039 * 5040 * This routine is invoked to stop an SLI3 device port, it stops the device 5041 * from generating interrupts and stops the device driver's timers for the 5042 * device. 5043 **/ 5044 static void 5045 lpfc_stop_port_s3(struct lpfc_hba *phba) 5046 { 5047 /* Clear all interrupt enable conditions */ 5048 writel(0, phba->HCregaddr); 5049 readl(phba->HCregaddr); /* flush */ 5050 /* Clear all pending interrupts */ 5051 writel(0xffffffff, phba->HAregaddr); 5052 readl(phba->HAregaddr); /* flush */ 5053 5054 /* Reset some HBA SLI setup states */ 5055 lpfc_stop_hba_timers(phba); 5056 phba->pport->work_port_events = 0; 5057 } 5058 5059 /** 5060 * lpfc_stop_port_s4 - Stop SLI4 device port 5061 * @phba: pointer to lpfc hba data structure. 5062 * 5063 * This routine is invoked to stop an SLI4 device port, it stops the device 5064 * from generating interrupts and stops the device driver's timers for the 5065 * device. 5066 **/ 5067 static void 5068 lpfc_stop_port_s4(struct lpfc_hba *phba) 5069 { 5070 /* Reset some HBA SLI4 setup states */ 5071 lpfc_stop_hba_timers(phba); 5072 if (phba->pport) 5073 phba->pport->work_port_events = 0; 5074 phba->sli4_hba.intr_enable = 0; 5075 } 5076 5077 /** 5078 * lpfc_stop_port - Wrapper function for stopping hba port 5079 * @phba: Pointer to HBA context object. 5080 * 5081 * This routine wraps the actual SLI3 or SLI4 hba stop port routine from 5082 * the API jump table function pointer from the lpfc_hba struct. 5083 **/ 5084 void 5085 lpfc_stop_port(struct lpfc_hba *phba) 5086 { 5087 phba->lpfc_stop_port(phba); 5088 5089 if (phba->wq) 5090 flush_workqueue(phba->wq); 5091 } 5092 5093 /** 5094 * lpfc_fcf_redisc_wait_start_timer - Start fcf rediscover wait timer 5095 * @phba: Pointer to hba for which this call is being executed. 5096 * 5097 * This routine starts the timer waiting for the FCF rediscovery to complete. 5098 **/ 5099 void 5100 lpfc_fcf_redisc_wait_start_timer(struct lpfc_hba *phba) 5101 { 5102 unsigned long fcf_redisc_wait_tmo = 5103 (jiffies + msecs_to_jiffies(LPFC_FCF_REDISCOVER_WAIT_TMO)); 5104 /* Start fcf rediscovery wait period timer */ 5105 mod_timer(&phba->fcf.redisc_wait, fcf_redisc_wait_tmo); 5106 spin_lock_irq(&phba->hbalock); 5107 /* Allow action to new fcf asynchronous event */ 5108 phba->fcf.fcf_flag &= ~(FCF_AVAILABLE | FCF_SCAN_DONE); 5109 /* Mark the FCF rediscovery pending state */ 5110 phba->fcf.fcf_flag |= FCF_REDISC_PEND; 5111 spin_unlock_irq(&phba->hbalock); 5112 } 5113 5114 /** 5115 * lpfc_sli4_fcf_redisc_wait_tmo - FCF table rediscover wait timeout 5116 * @t: Timer context used to obtain the pointer to lpfc hba data structure. 5117 * 5118 * This routine is invoked when waiting for FCF table rediscover has been 5119 * timed out. If new FCF record(s) has (have) been discovered during the 5120 * wait period, a new FCF event shall be added to the FCOE async event 5121 * list, and then worker thread shall be waked up for processing from the 5122 * worker thread context. 5123 **/ 5124 static void 5125 lpfc_sli4_fcf_redisc_wait_tmo(struct timer_list *t) 5126 { 5127 struct lpfc_hba *phba = from_timer(phba, t, fcf.redisc_wait); 5128 5129 /* Don't send FCF rediscovery event if timer cancelled */ 5130 spin_lock_irq(&phba->hbalock); 5131 if (!(phba->fcf.fcf_flag & FCF_REDISC_PEND)) { 5132 spin_unlock_irq(&phba->hbalock); 5133 return; 5134 } 5135 /* Clear FCF rediscovery timer pending flag */ 5136 phba->fcf.fcf_flag &= ~FCF_REDISC_PEND; 5137 /* FCF rediscovery event to worker thread */ 5138 phba->fcf.fcf_flag |= FCF_REDISC_EVT; 5139 spin_unlock_irq(&phba->hbalock); 5140 lpfc_printf_log(phba, KERN_INFO, LOG_FIP, 5141 "2776 FCF rediscover quiescent timer expired\n"); 5142 /* wake up worker thread */ 5143 lpfc_worker_wake_up(phba); 5144 } 5145 5146 /** 5147 * lpfc_vmid_poll - VMID timeout detection 5148 * @t: Timer context used to obtain the pointer to lpfc hba data structure. 5149 * 5150 * This routine is invoked when there is no I/O on by a VM for the specified 5151 * amount of time. When this situation is detected, the VMID has to be 5152 * deregistered from the switch and all the local resources freed. The VMID 5153 * will be reassigned to the VM once the I/O begins. 5154 **/ 5155 static void 5156 lpfc_vmid_poll(struct timer_list *t) 5157 { 5158 struct lpfc_hba *phba = from_timer(phba, t, inactive_vmid_poll); 5159 u32 wake_up = 0; 5160 5161 /* check if there is a need to issue QFPA */ 5162 if (phba->pport->vmid_priority_tagging) { 5163 wake_up = 1; 5164 phba->pport->work_port_events |= WORKER_CHECK_VMID_ISSUE_QFPA; 5165 } 5166 5167 /* Is the vmid inactivity timer enabled */ 5168 if (phba->pport->vmid_inactivity_timeout || 5169 phba->pport->load_flag & FC_DEREGISTER_ALL_APP_ID) { 5170 wake_up = 1; 5171 phba->pport->work_port_events |= WORKER_CHECK_INACTIVE_VMID; 5172 } 5173 5174 if (wake_up) 5175 lpfc_worker_wake_up(phba); 5176 5177 /* restart the timer for the next iteration */ 5178 mod_timer(&phba->inactive_vmid_poll, jiffies + msecs_to_jiffies(1000 * 5179 LPFC_VMID_TIMER)); 5180 } 5181 5182 /** 5183 * lpfc_sli4_parse_latt_fault - Parse sli4 link-attention link fault code 5184 * @phba: pointer to lpfc hba data structure. 5185 * @acqe_link: pointer to the async link completion queue entry. 5186 * 5187 * This routine is to parse the SLI4 link-attention link fault code. 5188 **/ 5189 static void 5190 lpfc_sli4_parse_latt_fault(struct lpfc_hba *phba, 5191 struct lpfc_acqe_link *acqe_link) 5192 { 5193 switch (bf_get(lpfc_acqe_link_fault, acqe_link)) { 5194 case LPFC_ASYNC_LINK_FAULT_NONE: 5195 case LPFC_ASYNC_LINK_FAULT_LOCAL: 5196 case LPFC_ASYNC_LINK_FAULT_REMOTE: 5197 case LPFC_ASYNC_LINK_FAULT_LR_LRR: 5198 break; 5199 default: 5200 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 5201 "0398 Unknown link fault code: x%x\n", 5202 bf_get(lpfc_acqe_link_fault, acqe_link)); 5203 break; 5204 } 5205 } 5206 5207 /** 5208 * lpfc_sli4_parse_latt_type - Parse sli4 link attention type 5209 * @phba: pointer to lpfc hba data structure. 5210 * @acqe_link: pointer to the async link completion queue entry. 5211 * 5212 * This routine is to parse the SLI4 link attention type and translate it 5213 * into the base driver's link attention type coding. 5214 * 5215 * Return: Link attention type in terms of base driver's coding. 5216 **/ 5217 static uint8_t 5218 lpfc_sli4_parse_latt_type(struct lpfc_hba *phba, 5219 struct lpfc_acqe_link *acqe_link) 5220 { 5221 uint8_t att_type; 5222 5223 switch (bf_get(lpfc_acqe_link_status, acqe_link)) { 5224 case LPFC_ASYNC_LINK_STATUS_DOWN: 5225 case LPFC_ASYNC_LINK_STATUS_LOGICAL_DOWN: 5226 att_type = LPFC_ATT_LINK_DOWN; 5227 break; 5228 case LPFC_ASYNC_LINK_STATUS_UP: 5229 /* Ignore physical link up events - wait for logical link up */ 5230 att_type = LPFC_ATT_RESERVED; 5231 break; 5232 case LPFC_ASYNC_LINK_STATUS_LOGICAL_UP: 5233 att_type = LPFC_ATT_LINK_UP; 5234 break; 5235 default: 5236 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 5237 "0399 Invalid link attention type: x%x\n", 5238 bf_get(lpfc_acqe_link_status, acqe_link)); 5239 att_type = LPFC_ATT_RESERVED; 5240 break; 5241 } 5242 return att_type; 5243 } 5244 5245 /** 5246 * lpfc_sli_port_speed_get - Get sli3 link speed code to link speed 5247 * @phba: pointer to lpfc hba data structure. 5248 * 5249 * This routine is to get an SLI3 FC port's link speed in Mbps. 5250 * 5251 * Return: link speed in terms of Mbps. 5252 **/ 5253 uint32_t 5254 lpfc_sli_port_speed_get(struct lpfc_hba *phba) 5255 { 5256 uint32_t link_speed; 5257 5258 if (!lpfc_is_link_up(phba)) 5259 return 0; 5260 5261 if (phba->sli_rev <= LPFC_SLI_REV3) { 5262 switch (phba->fc_linkspeed) { 5263 case LPFC_LINK_SPEED_1GHZ: 5264 link_speed = 1000; 5265 break; 5266 case LPFC_LINK_SPEED_2GHZ: 5267 link_speed = 2000; 5268 break; 5269 case LPFC_LINK_SPEED_4GHZ: 5270 link_speed = 4000; 5271 break; 5272 case LPFC_LINK_SPEED_8GHZ: 5273 link_speed = 8000; 5274 break; 5275 case LPFC_LINK_SPEED_10GHZ: 5276 link_speed = 10000; 5277 break; 5278 case LPFC_LINK_SPEED_16GHZ: 5279 link_speed = 16000; 5280 break; 5281 default: 5282 link_speed = 0; 5283 } 5284 } else { 5285 if (phba->sli4_hba.link_state.logical_speed) 5286 link_speed = 5287 phba->sli4_hba.link_state.logical_speed; 5288 else 5289 link_speed = phba->sli4_hba.link_state.speed; 5290 } 5291 return link_speed; 5292 } 5293 5294 /** 5295 * lpfc_sli4_port_speed_parse - Parse async evt link speed code to link speed 5296 * @phba: pointer to lpfc hba data structure. 5297 * @evt_code: asynchronous event code. 5298 * @speed_code: asynchronous event link speed code. 5299 * 5300 * This routine is to parse the giving SLI4 async event link speed code into 5301 * value of Mbps for the link speed. 5302 * 5303 * Return: link speed in terms of Mbps. 5304 **/ 5305 static uint32_t 5306 lpfc_sli4_port_speed_parse(struct lpfc_hba *phba, uint32_t evt_code, 5307 uint8_t speed_code) 5308 { 5309 uint32_t port_speed; 5310 5311 switch (evt_code) { 5312 case LPFC_TRAILER_CODE_LINK: 5313 switch (speed_code) { 5314 case LPFC_ASYNC_LINK_SPEED_ZERO: 5315 port_speed = 0; 5316 break; 5317 case LPFC_ASYNC_LINK_SPEED_10MBPS: 5318 port_speed = 10; 5319 break; 5320 case LPFC_ASYNC_LINK_SPEED_100MBPS: 5321 port_speed = 100; 5322 break; 5323 case LPFC_ASYNC_LINK_SPEED_1GBPS: 5324 port_speed = 1000; 5325 break; 5326 case LPFC_ASYNC_LINK_SPEED_10GBPS: 5327 port_speed = 10000; 5328 break; 5329 case LPFC_ASYNC_LINK_SPEED_20GBPS: 5330 port_speed = 20000; 5331 break; 5332 case LPFC_ASYNC_LINK_SPEED_25GBPS: 5333 port_speed = 25000; 5334 break; 5335 case LPFC_ASYNC_LINK_SPEED_40GBPS: 5336 port_speed = 40000; 5337 break; 5338 case LPFC_ASYNC_LINK_SPEED_100GBPS: 5339 port_speed = 100000; 5340 break; 5341 default: 5342 port_speed = 0; 5343 } 5344 break; 5345 case LPFC_TRAILER_CODE_FC: 5346 switch (speed_code) { 5347 case LPFC_FC_LA_SPEED_UNKNOWN: 5348 port_speed = 0; 5349 break; 5350 case LPFC_FC_LA_SPEED_1G: 5351 port_speed = 1000; 5352 break; 5353 case LPFC_FC_LA_SPEED_2G: 5354 port_speed = 2000; 5355 break; 5356 case LPFC_FC_LA_SPEED_4G: 5357 port_speed = 4000; 5358 break; 5359 case LPFC_FC_LA_SPEED_8G: 5360 port_speed = 8000; 5361 break; 5362 case LPFC_FC_LA_SPEED_10G: 5363 port_speed = 10000; 5364 break; 5365 case LPFC_FC_LA_SPEED_16G: 5366 port_speed = 16000; 5367 break; 5368 case LPFC_FC_LA_SPEED_32G: 5369 port_speed = 32000; 5370 break; 5371 case LPFC_FC_LA_SPEED_64G: 5372 port_speed = 64000; 5373 break; 5374 case LPFC_FC_LA_SPEED_128G: 5375 port_speed = 128000; 5376 break; 5377 case LPFC_FC_LA_SPEED_256G: 5378 port_speed = 256000; 5379 break; 5380 default: 5381 port_speed = 0; 5382 } 5383 break; 5384 default: 5385 port_speed = 0; 5386 } 5387 return port_speed; 5388 } 5389 5390 /** 5391 * lpfc_sli4_async_link_evt - Process the asynchronous FCoE link event 5392 * @phba: pointer to lpfc hba data structure. 5393 * @acqe_link: pointer to the async link completion queue entry. 5394 * 5395 * This routine is to handle the SLI4 asynchronous FCoE link event. 5396 **/ 5397 static void 5398 lpfc_sli4_async_link_evt(struct lpfc_hba *phba, 5399 struct lpfc_acqe_link *acqe_link) 5400 { 5401 LPFC_MBOXQ_t *pmb; 5402 MAILBOX_t *mb; 5403 struct lpfc_mbx_read_top *la; 5404 uint8_t att_type; 5405 int rc; 5406 5407 att_type = lpfc_sli4_parse_latt_type(phba, acqe_link); 5408 if (att_type != LPFC_ATT_LINK_DOWN && att_type != LPFC_ATT_LINK_UP) 5409 return; 5410 phba->fcoe_eventtag = acqe_link->event_tag; 5411 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 5412 if (!pmb) { 5413 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 5414 "0395 The mboxq allocation failed\n"); 5415 return; 5416 } 5417 5418 rc = lpfc_mbox_rsrc_prep(phba, pmb); 5419 if (rc) { 5420 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 5421 "0396 mailbox allocation failed\n"); 5422 goto out_free_pmb; 5423 } 5424 5425 /* Cleanup any outstanding ELS commands */ 5426 lpfc_els_flush_all_cmd(phba); 5427 5428 /* Block ELS IOCBs until we have done process link event */ 5429 phba->sli4_hba.els_wq->pring->flag |= LPFC_STOP_IOCB_EVENT; 5430 5431 /* Update link event statistics */ 5432 phba->sli.slistat.link_event++; 5433 5434 /* Create lpfc_handle_latt mailbox command from link ACQE */ 5435 lpfc_read_topology(phba, pmb, (struct lpfc_dmabuf *)pmb->ctx_buf); 5436 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology; 5437 pmb->vport = phba->pport; 5438 5439 /* Keep the link status for extra SLI4 state machine reference */ 5440 phba->sli4_hba.link_state.speed = 5441 lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_LINK, 5442 bf_get(lpfc_acqe_link_speed, acqe_link)); 5443 phba->sli4_hba.link_state.duplex = 5444 bf_get(lpfc_acqe_link_duplex, acqe_link); 5445 phba->sli4_hba.link_state.status = 5446 bf_get(lpfc_acqe_link_status, acqe_link); 5447 phba->sli4_hba.link_state.type = 5448 bf_get(lpfc_acqe_link_type, acqe_link); 5449 phba->sli4_hba.link_state.number = 5450 bf_get(lpfc_acqe_link_number, acqe_link); 5451 phba->sli4_hba.link_state.fault = 5452 bf_get(lpfc_acqe_link_fault, acqe_link); 5453 phba->sli4_hba.link_state.logical_speed = 5454 bf_get(lpfc_acqe_logical_link_speed, acqe_link) * 10; 5455 5456 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 5457 "2900 Async FC/FCoE Link event - Speed:%dGBit " 5458 "duplex:x%x LA Type:x%x Port Type:%d Port Number:%d " 5459 "Logical speed:%dMbps Fault:%d\n", 5460 phba->sli4_hba.link_state.speed, 5461 phba->sli4_hba.link_state.topology, 5462 phba->sli4_hba.link_state.status, 5463 phba->sli4_hba.link_state.type, 5464 phba->sli4_hba.link_state.number, 5465 phba->sli4_hba.link_state.logical_speed, 5466 phba->sli4_hba.link_state.fault); 5467 /* 5468 * For FC Mode: issue the READ_TOPOLOGY mailbox command to fetch 5469 * topology info. Note: Optional for non FC-AL ports. 5470 */ 5471 if (!(phba->hba_flag & HBA_FCOE_MODE)) { 5472 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT); 5473 if (rc == MBX_NOT_FINISHED) 5474 goto out_free_pmb; 5475 return; 5476 } 5477 /* 5478 * For FCoE Mode: fill in all the topology information we need and call 5479 * the READ_TOPOLOGY completion routine to continue without actually 5480 * sending the READ_TOPOLOGY mailbox command to the port. 5481 */ 5482 /* Initialize completion status */ 5483 mb = &pmb->u.mb; 5484 mb->mbxStatus = MBX_SUCCESS; 5485 5486 /* Parse port fault information field */ 5487 lpfc_sli4_parse_latt_fault(phba, acqe_link); 5488 5489 /* Parse and translate link attention fields */ 5490 la = (struct lpfc_mbx_read_top *) &pmb->u.mb.un.varReadTop; 5491 la->eventTag = acqe_link->event_tag; 5492 bf_set(lpfc_mbx_read_top_att_type, la, att_type); 5493 bf_set(lpfc_mbx_read_top_link_spd, la, 5494 (bf_get(lpfc_acqe_link_speed, acqe_link))); 5495 5496 /* Fake the the following irrelvant fields */ 5497 bf_set(lpfc_mbx_read_top_topology, la, LPFC_TOPOLOGY_PT_PT); 5498 bf_set(lpfc_mbx_read_top_alpa_granted, la, 0); 5499 bf_set(lpfc_mbx_read_top_il, la, 0); 5500 bf_set(lpfc_mbx_read_top_pb, la, 0); 5501 bf_set(lpfc_mbx_read_top_fa, la, 0); 5502 bf_set(lpfc_mbx_read_top_mm, la, 0); 5503 5504 /* Invoke the lpfc_handle_latt mailbox command callback function */ 5505 lpfc_mbx_cmpl_read_topology(phba, pmb); 5506 5507 return; 5508 5509 out_free_pmb: 5510 lpfc_mbox_rsrc_cleanup(phba, pmb, MBOX_THD_UNLOCKED); 5511 } 5512 5513 /** 5514 * lpfc_async_link_speed_to_read_top - Parse async evt link speed code to read 5515 * topology. 5516 * @phba: pointer to lpfc hba data structure. 5517 * @speed_code: asynchronous event link speed code. 5518 * 5519 * This routine is to parse the giving SLI4 async event link speed code into 5520 * value of Read topology link speed. 5521 * 5522 * Return: link speed in terms of Read topology. 5523 **/ 5524 static uint8_t 5525 lpfc_async_link_speed_to_read_top(struct lpfc_hba *phba, uint8_t speed_code) 5526 { 5527 uint8_t port_speed; 5528 5529 switch (speed_code) { 5530 case LPFC_FC_LA_SPEED_1G: 5531 port_speed = LPFC_LINK_SPEED_1GHZ; 5532 break; 5533 case LPFC_FC_LA_SPEED_2G: 5534 port_speed = LPFC_LINK_SPEED_2GHZ; 5535 break; 5536 case LPFC_FC_LA_SPEED_4G: 5537 port_speed = LPFC_LINK_SPEED_4GHZ; 5538 break; 5539 case LPFC_FC_LA_SPEED_8G: 5540 port_speed = LPFC_LINK_SPEED_8GHZ; 5541 break; 5542 case LPFC_FC_LA_SPEED_16G: 5543 port_speed = LPFC_LINK_SPEED_16GHZ; 5544 break; 5545 case LPFC_FC_LA_SPEED_32G: 5546 port_speed = LPFC_LINK_SPEED_32GHZ; 5547 break; 5548 case LPFC_FC_LA_SPEED_64G: 5549 port_speed = LPFC_LINK_SPEED_64GHZ; 5550 break; 5551 case LPFC_FC_LA_SPEED_128G: 5552 port_speed = LPFC_LINK_SPEED_128GHZ; 5553 break; 5554 case LPFC_FC_LA_SPEED_256G: 5555 port_speed = LPFC_LINK_SPEED_256GHZ; 5556 break; 5557 default: 5558 port_speed = 0; 5559 break; 5560 } 5561 5562 return port_speed; 5563 } 5564 5565 void 5566 lpfc_cgn_dump_rxmonitor(struct lpfc_hba *phba) 5567 { 5568 if (!phba->rx_monitor) { 5569 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT, 5570 "4411 Rx Monitor Info is empty.\n"); 5571 } else { 5572 lpfc_rx_monitor_report(phba, phba->rx_monitor, NULL, 0, 5573 LPFC_MAX_RXMONITOR_DUMP); 5574 } 5575 } 5576 5577 /** 5578 * lpfc_cgn_update_stat - Save data into congestion stats buffer 5579 * @phba: pointer to lpfc hba data structure. 5580 * @dtag: FPIN descriptor received 5581 * 5582 * Increment the FPIN received counter/time when it happens. 5583 */ 5584 void 5585 lpfc_cgn_update_stat(struct lpfc_hba *phba, uint32_t dtag) 5586 { 5587 struct lpfc_cgn_info *cp; 5588 struct tm broken; 5589 struct timespec64 cur_time; 5590 u32 cnt; 5591 u32 value; 5592 5593 /* Make sure we have a congestion info buffer */ 5594 if (!phba->cgn_i) 5595 return; 5596 cp = (struct lpfc_cgn_info *)phba->cgn_i->virt; 5597 ktime_get_real_ts64(&cur_time); 5598 time64_to_tm(cur_time.tv_sec, 0, &broken); 5599 5600 /* Update congestion statistics */ 5601 switch (dtag) { 5602 case ELS_DTAG_LNK_INTEGRITY: 5603 cnt = le32_to_cpu(cp->link_integ_notification); 5604 cnt++; 5605 cp->link_integ_notification = cpu_to_le32(cnt); 5606 5607 cp->cgn_stat_lnk_month = broken.tm_mon + 1; 5608 cp->cgn_stat_lnk_day = broken.tm_mday; 5609 cp->cgn_stat_lnk_year = broken.tm_year - 100; 5610 cp->cgn_stat_lnk_hour = broken.tm_hour; 5611 cp->cgn_stat_lnk_min = broken.tm_min; 5612 cp->cgn_stat_lnk_sec = broken.tm_sec; 5613 break; 5614 case ELS_DTAG_DELIVERY: 5615 cnt = le32_to_cpu(cp->delivery_notification); 5616 cnt++; 5617 cp->delivery_notification = cpu_to_le32(cnt); 5618 5619 cp->cgn_stat_del_month = broken.tm_mon + 1; 5620 cp->cgn_stat_del_day = broken.tm_mday; 5621 cp->cgn_stat_del_year = broken.tm_year - 100; 5622 cp->cgn_stat_del_hour = broken.tm_hour; 5623 cp->cgn_stat_del_min = broken.tm_min; 5624 cp->cgn_stat_del_sec = broken.tm_sec; 5625 break; 5626 case ELS_DTAG_PEER_CONGEST: 5627 cnt = le32_to_cpu(cp->cgn_peer_notification); 5628 cnt++; 5629 cp->cgn_peer_notification = cpu_to_le32(cnt); 5630 5631 cp->cgn_stat_peer_month = broken.tm_mon + 1; 5632 cp->cgn_stat_peer_day = broken.tm_mday; 5633 cp->cgn_stat_peer_year = broken.tm_year - 100; 5634 cp->cgn_stat_peer_hour = broken.tm_hour; 5635 cp->cgn_stat_peer_min = broken.tm_min; 5636 cp->cgn_stat_peer_sec = broken.tm_sec; 5637 break; 5638 case ELS_DTAG_CONGESTION: 5639 cnt = le32_to_cpu(cp->cgn_notification); 5640 cnt++; 5641 cp->cgn_notification = cpu_to_le32(cnt); 5642 5643 cp->cgn_stat_cgn_month = broken.tm_mon + 1; 5644 cp->cgn_stat_cgn_day = broken.tm_mday; 5645 cp->cgn_stat_cgn_year = broken.tm_year - 100; 5646 cp->cgn_stat_cgn_hour = broken.tm_hour; 5647 cp->cgn_stat_cgn_min = broken.tm_min; 5648 cp->cgn_stat_cgn_sec = broken.tm_sec; 5649 } 5650 if (phba->cgn_fpin_frequency && 5651 phba->cgn_fpin_frequency != LPFC_FPIN_INIT_FREQ) { 5652 value = LPFC_CGN_TIMER_TO_MIN / phba->cgn_fpin_frequency; 5653 cp->cgn_stat_npm = value; 5654 } 5655 value = lpfc_cgn_calc_crc32(cp, LPFC_CGN_INFO_SZ, 5656 LPFC_CGN_CRC32_SEED); 5657 cp->cgn_info_crc = cpu_to_le32(value); 5658 } 5659 5660 /** 5661 * lpfc_cgn_save_evt_cnt - Save data into registered congestion buffer 5662 * @phba: pointer to lpfc hba data structure. 5663 * 5664 * Save the congestion event data every minute. 5665 * On the hour collapse all the minute data into hour data. Every day 5666 * collapse all the hour data into daily data. Separate driver 5667 * and fabrc congestion event counters that will be saved out 5668 * to the registered congestion buffer every minute. 5669 */ 5670 static void 5671 lpfc_cgn_save_evt_cnt(struct lpfc_hba *phba) 5672 { 5673 struct lpfc_cgn_info *cp; 5674 struct tm broken; 5675 struct timespec64 cur_time; 5676 uint32_t i, index; 5677 uint16_t value, mvalue; 5678 uint64_t bps; 5679 uint32_t mbps; 5680 uint32_t dvalue, wvalue, lvalue, avalue; 5681 uint64_t latsum; 5682 __le16 *ptr; 5683 __le32 *lptr; 5684 __le16 *mptr; 5685 5686 /* Make sure we have a congestion info buffer */ 5687 if (!phba->cgn_i) 5688 return; 5689 cp = (struct lpfc_cgn_info *)phba->cgn_i->virt; 5690 5691 if (time_before(jiffies, phba->cgn_evt_timestamp)) 5692 return; 5693 phba->cgn_evt_timestamp = jiffies + 5694 msecs_to_jiffies(LPFC_CGN_TIMER_TO_MIN); 5695 phba->cgn_evt_minute++; 5696 5697 /* We should get to this point in the routine on 1 minute intervals */ 5698 5699 ktime_get_real_ts64(&cur_time); 5700 time64_to_tm(cur_time.tv_sec, 0, &broken); 5701 5702 if (phba->cgn_fpin_frequency && 5703 phba->cgn_fpin_frequency != LPFC_FPIN_INIT_FREQ) { 5704 value = LPFC_CGN_TIMER_TO_MIN / phba->cgn_fpin_frequency; 5705 cp->cgn_stat_npm = value; 5706 } 5707 5708 /* Read and clear the latency counters for this minute */ 5709 lvalue = atomic_read(&phba->cgn_latency_evt_cnt); 5710 latsum = atomic64_read(&phba->cgn_latency_evt); 5711 atomic_set(&phba->cgn_latency_evt_cnt, 0); 5712 atomic64_set(&phba->cgn_latency_evt, 0); 5713 5714 /* We need to store MB/sec bandwidth in the congestion information. 5715 * block_cnt is count of 512 byte blocks for the entire minute, 5716 * bps will get bytes per sec before finally converting to MB/sec. 5717 */ 5718 bps = div_u64(phba->rx_block_cnt, LPFC_SEC_MIN) * 512; 5719 phba->rx_block_cnt = 0; 5720 mvalue = bps / (1024 * 1024); /* convert to MB/sec */ 5721 5722 /* Every minute */ 5723 /* cgn parameters */ 5724 cp->cgn_info_mode = phba->cgn_p.cgn_param_mode; 5725 cp->cgn_info_level0 = phba->cgn_p.cgn_param_level0; 5726 cp->cgn_info_level1 = phba->cgn_p.cgn_param_level1; 5727 cp->cgn_info_level2 = phba->cgn_p.cgn_param_level2; 5728 5729 /* Fill in default LUN qdepth */ 5730 value = (uint16_t)(phba->pport->cfg_lun_queue_depth); 5731 cp->cgn_lunq = cpu_to_le16(value); 5732 5733 /* Record congestion buffer info - every minute 5734 * cgn_driver_evt_cnt (Driver events) 5735 * cgn_fabric_warn_cnt (Congestion Warnings) 5736 * cgn_latency_evt_cnt / cgn_latency_evt (IO Latency) 5737 * cgn_fabric_alarm_cnt (Congestion Alarms) 5738 */ 5739 index = ++cp->cgn_index_minute; 5740 if (cp->cgn_index_minute == LPFC_MIN_HOUR) { 5741 cp->cgn_index_minute = 0; 5742 index = 0; 5743 } 5744 5745 /* Get the number of driver events in this sample and reset counter */ 5746 dvalue = atomic_read(&phba->cgn_driver_evt_cnt); 5747 atomic_set(&phba->cgn_driver_evt_cnt, 0); 5748 5749 /* Get the number of warning events - FPIN and Signal for this minute */ 5750 wvalue = 0; 5751 if ((phba->cgn_reg_fpin & LPFC_CGN_FPIN_WARN) || 5752 phba->cgn_reg_signal == EDC_CG_SIG_WARN_ONLY || 5753 phba->cgn_reg_signal == EDC_CG_SIG_WARN_ALARM) 5754 wvalue = atomic_read(&phba->cgn_fabric_warn_cnt); 5755 atomic_set(&phba->cgn_fabric_warn_cnt, 0); 5756 5757 /* Get the number of alarm events - FPIN and Signal for this minute */ 5758 avalue = 0; 5759 if ((phba->cgn_reg_fpin & LPFC_CGN_FPIN_ALARM) || 5760 phba->cgn_reg_signal == EDC_CG_SIG_WARN_ALARM) 5761 avalue = atomic_read(&phba->cgn_fabric_alarm_cnt); 5762 atomic_set(&phba->cgn_fabric_alarm_cnt, 0); 5763 5764 /* Collect the driver, warning, alarm and latency counts for this 5765 * minute into the driver congestion buffer. 5766 */ 5767 ptr = &cp->cgn_drvr_min[index]; 5768 value = (uint16_t)dvalue; 5769 *ptr = cpu_to_le16(value); 5770 5771 ptr = &cp->cgn_warn_min[index]; 5772 value = (uint16_t)wvalue; 5773 *ptr = cpu_to_le16(value); 5774 5775 ptr = &cp->cgn_alarm_min[index]; 5776 value = (uint16_t)avalue; 5777 *ptr = cpu_to_le16(value); 5778 5779 lptr = &cp->cgn_latency_min[index]; 5780 if (lvalue) { 5781 lvalue = (uint32_t)div_u64(latsum, lvalue); 5782 *lptr = cpu_to_le32(lvalue); 5783 } else { 5784 *lptr = 0; 5785 } 5786 5787 /* Collect the bandwidth value into the driver's congesion buffer. */ 5788 mptr = &cp->cgn_bw_min[index]; 5789 *mptr = cpu_to_le16(mvalue); 5790 5791 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT, 5792 "2418 Congestion Info - minute (%d): %d %d %d %d %d\n", 5793 index, dvalue, wvalue, *lptr, mvalue, avalue); 5794 5795 /* Every hour */ 5796 if ((phba->cgn_evt_minute % LPFC_MIN_HOUR) == 0) { 5797 /* Record congestion buffer info - every hour 5798 * Collapse all minutes into an hour 5799 */ 5800 index = ++cp->cgn_index_hour; 5801 if (cp->cgn_index_hour == LPFC_HOUR_DAY) { 5802 cp->cgn_index_hour = 0; 5803 index = 0; 5804 } 5805 5806 dvalue = 0; 5807 wvalue = 0; 5808 lvalue = 0; 5809 avalue = 0; 5810 mvalue = 0; 5811 mbps = 0; 5812 for (i = 0; i < LPFC_MIN_HOUR; i++) { 5813 dvalue += le16_to_cpu(cp->cgn_drvr_min[i]); 5814 wvalue += le16_to_cpu(cp->cgn_warn_min[i]); 5815 lvalue += le32_to_cpu(cp->cgn_latency_min[i]); 5816 mbps += le16_to_cpu(cp->cgn_bw_min[i]); 5817 avalue += le16_to_cpu(cp->cgn_alarm_min[i]); 5818 } 5819 if (lvalue) /* Avg of latency averages */ 5820 lvalue /= LPFC_MIN_HOUR; 5821 if (mbps) /* Avg of Bandwidth averages */ 5822 mvalue = mbps / LPFC_MIN_HOUR; 5823 5824 lptr = &cp->cgn_drvr_hr[index]; 5825 *lptr = cpu_to_le32(dvalue); 5826 lptr = &cp->cgn_warn_hr[index]; 5827 *lptr = cpu_to_le32(wvalue); 5828 lptr = &cp->cgn_latency_hr[index]; 5829 *lptr = cpu_to_le32(lvalue); 5830 mptr = &cp->cgn_bw_hr[index]; 5831 *mptr = cpu_to_le16(mvalue); 5832 lptr = &cp->cgn_alarm_hr[index]; 5833 *lptr = cpu_to_le32(avalue); 5834 5835 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT, 5836 "2419 Congestion Info - hour " 5837 "(%d): %d %d %d %d %d\n", 5838 index, dvalue, wvalue, lvalue, mvalue, avalue); 5839 } 5840 5841 /* Every day */ 5842 if ((phba->cgn_evt_minute % LPFC_MIN_DAY) == 0) { 5843 /* Record congestion buffer info - every hour 5844 * Collapse all hours into a day. Rotate days 5845 * after LPFC_MAX_CGN_DAYS. 5846 */ 5847 index = ++cp->cgn_index_day; 5848 if (cp->cgn_index_day == LPFC_MAX_CGN_DAYS) { 5849 cp->cgn_index_day = 0; 5850 index = 0; 5851 } 5852 5853 /* Anytime we overwrite daily index 0, after we wrap, 5854 * we will be overwriting the oldest day, so we must 5855 * update the congestion data start time for that day. 5856 * That start time should have previously been saved after 5857 * we wrote the last days worth of data. 5858 */ 5859 if ((phba->hba_flag & HBA_CGN_DAY_WRAP) && index == 0) { 5860 time64_to_tm(phba->cgn_daily_ts.tv_sec, 0, &broken); 5861 5862 cp->cgn_info_month = broken.tm_mon + 1; 5863 cp->cgn_info_day = broken.tm_mday; 5864 cp->cgn_info_year = broken.tm_year - 100; 5865 cp->cgn_info_hour = broken.tm_hour; 5866 cp->cgn_info_minute = broken.tm_min; 5867 cp->cgn_info_second = broken.tm_sec; 5868 5869 lpfc_printf_log 5870 (phba, KERN_INFO, LOG_CGN_MGMT, 5871 "2646 CGNInfo idx0 Start Time: " 5872 "%d/%d/%d %d:%d:%d\n", 5873 cp->cgn_info_day, cp->cgn_info_month, 5874 cp->cgn_info_year, cp->cgn_info_hour, 5875 cp->cgn_info_minute, cp->cgn_info_second); 5876 } 5877 5878 dvalue = 0; 5879 wvalue = 0; 5880 lvalue = 0; 5881 mvalue = 0; 5882 mbps = 0; 5883 avalue = 0; 5884 for (i = 0; i < LPFC_HOUR_DAY; i++) { 5885 dvalue += le32_to_cpu(cp->cgn_drvr_hr[i]); 5886 wvalue += le32_to_cpu(cp->cgn_warn_hr[i]); 5887 lvalue += le32_to_cpu(cp->cgn_latency_hr[i]); 5888 mbps += le16_to_cpu(cp->cgn_bw_hr[i]); 5889 avalue += le32_to_cpu(cp->cgn_alarm_hr[i]); 5890 } 5891 if (lvalue) /* Avg of latency averages */ 5892 lvalue /= LPFC_HOUR_DAY; 5893 if (mbps) /* Avg of Bandwidth averages */ 5894 mvalue = mbps / LPFC_HOUR_DAY; 5895 5896 lptr = &cp->cgn_drvr_day[index]; 5897 *lptr = cpu_to_le32(dvalue); 5898 lptr = &cp->cgn_warn_day[index]; 5899 *lptr = cpu_to_le32(wvalue); 5900 lptr = &cp->cgn_latency_day[index]; 5901 *lptr = cpu_to_le32(lvalue); 5902 mptr = &cp->cgn_bw_day[index]; 5903 *mptr = cpu_to_le16(mvalue); 5904 lptr = &cp->cgn_alarm_day[index]; 5905 *lptr = cpu_to_le32(avalue); 5906 5907 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT, 5908 "2420 Congestion Info - daily (%d): " 5909 "%d %d %d %d %d\n", 5910 index, dvalue, wvalue, lvalue, mvalue, avalue); 5911 5912 /* We just wrote LPFC_MAX_CGN_DAYS of data, 5913 * so we are wrapped on any data after this. 5914 * Save this as the start time for the next day. 5915 */ 5916 if (index == (LPFC_MAX_CGN_DAYS - 1)) { 5917 phba->hba_flag |= HBA_CGN_DAY_WRAP; 5918 ktime_get_real_ts64(&phba->cgn_daily_ts); 5919 } 5920 } 5921 5922 /* Use the frequency found in the last rcv'ed FPIN */ 5923 value = phba->cgn_fpin_frequency; 5924 cp->cgn_warn_freq = cpu_to_le16(value); 5925 cp->cgn_alarm_freq = cpu_to_le16(value); 5926 5927 lvalue = lpfc_cgn_calc_crc32(cp, LPFC_CGN_INFO_SZ, 5928 LPFC_CGN_CRC32_SEED); 5929 cp->cgn_info_crc = cpu_to_le32(lvalue); 5930 } 5931 5932 /** 5933 * lpfc_calc_cmf_latency - latency from start of rxate timer interval 5934 * @phba: The Hba for which this call is being executed. 5935 * 5936 * The routine calculates the latency from the beginning of the CMF timer 5937 * interval to the current point in time. It is called from IO completion 5938 * when we exceed our Bandwidth limitation for the time interval. 5939 */ 5940 uint32_t 5941 lpfc_calc_cmf_latency(struct lpfc_hba *phba) 5942 { 5943 struct timespec64 cmpl_time; 5944 uint32_t msec = 0; 5945 5946 ktime_get_real_ts64(&cmpl_time); 5947 5948 /* This routine works on a ms granularity so sec and usec are 5949 * converted accordingly. 5950 */ 5951 if (cmpl_time.tv_sec == phba->cmf_latency.tv_sec) { 5952 msec = (cmpl_time.tv_nsec - phba->cmf_latency.tv_nsec) / 5953 NSEC_PER_MSEC; 5954 } else { 5955 if (cmpl_time.tv_nsec >= phba->cmf_latency.tv_nsec) { 5956 msec = (cmpl_time.tv_sec - 5957 phba->cmf_latency.tv_sec) * MSEC_PER_SEC; 5958 msec += ((cmpl_time.tv_nsec - 5959 phba->cmf_latency.tv_nsec) / NSEC_PER_MSEC); 5960 } else { 5961 msec = (cmpl_time.tv_sec - phba->cmf_latency.tv_sec - 5962 1) * MSEC_PER_SEC; 5963 msec += (((NSEC_PER_SEC - phba->cmf_latency.tv_nsec) + 5964 cmpl_time.tv_nsec) / NSEC_PER_MSEC); 5965 } 5966 } 5967 return msec; 5968 } 5969 5970 /** 5971 * lpfc_cmf_timer - This is the timer function for one congestion 5972 * rate interval. 5973 * @timer: Pointer to the high resolution timer that expired 5974 */ 5975 static enum hrtimer_restart 5976 lpfc_cmf_timer(struct hrtimer *timer) 5977 { 5978 struct lpfc_hba *phba = container_of(timer, struct lpfc_hba, 5979 cmf_timer); 5980 struct rx_info_entry entry; 5981 uint32_t io_cnt; 5982 uint32_t busy, max_read; 5983 uint64_t total, rcv, lat, mbpi, extra, cnt; 5984 int timer_interval = LPFC_CMF_INTERVAL; 5985 uint32_t ms; 5986 struct lpfc_cgn_stat *cgs; 5987 int cpu; 5988 5989 /* Only restart the timer if congestion mgmt is on */ 5990 if (phba->cmf_active_mode == LPFC_CFG_OFF || 5991 !phba->cmf_latency.tv_sec) { 5992 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT, 5993 "6224 CMF timer exit: %d %lld\n", 5994 phba->cmf_active_mode, 5995 (uint64_t)phba->cmf_latency.tv_sec); 5996 return HRTIMER_NORESTART; 5997 } 5998 5999 /* If pport is not ready yet, just exit and wait for 6000 * the next timer cycle to hit. 6001 */ 6002 if (!phba->pport) 6003 goto skip; 6004 6005 /* Do not block SCSI IO while in the timer routine since 6006 * total_bytes will be cleared 6007 */ 6008 atomic_set(&phba->cmf_stop_io, 1); 6009 6010 /* First we need to calculate the actual ms between 6011 * the last timer interrupt and this one. We ask for 6012 * LPFC_CMF_INTERVAL, however the actual time may 6013 * vary depending on system overhead. 6014 */ 6015 ms = lpfc_calc_cmf_latency(phba); 6016 6017 6018 /* Immediately after we calculate the time since the last 6019 * timer interrupt, set the start time for the next 6020 * interrupt 6021 */ 6022 ktime_get_real_ts64(&phba->cmf_latency); 6023 6024 phba->cmf_link_byte_count = 6025 div_u64(phba->cmf_max_line_rate * LPFC_CMF_INTERVAL, 1000); 6026 6027 /* Collect all the stats from the prior timer interval */ 6028 total = 0; 6029 io_cnt = 0; 6030 lat = 0; 6031 rcv = 0; 6032 for_each_present_cpu(cpu) { 6033 cgs = per_cpu_ptr(phba->cmf_stat, cpu); 6034 total += atomic64_xchg(&cgs->total_bytes, 0); 6035 io_cnt += atomic_xchg(&cgs->rx_io_cnt, 0); 6036 lat += atomic64_xchg(&cgs->rx_latency, 0); 6037 rcv += atomic64_xchg(&cgs->rcv_bytes, 0); 6038 } 6039 6040 /* Before we issue another CMF_SYNC_WQE, retrieve the BW 6041 * returned from the last CMF_SYNC_WQE issued, from 6042 * cmf_last_sync_bw. This will be the target BW for 6043 * this next timer interval. 6044 */ 6045 if (phba->cmf_active_mode == LPFC_CFG_MANAGED && 6046 phba->link_state != LPFC_LINK_DOWN && 6047 phba->hba_flag & HBA_SETUP) { 6048 mbpi = phba->cmf_last_sync_bw; 6049 phba->cmf_last_sync_bw = 0; 6050 extra = 0; 6051 6052 /* Calculate any extra bytes needed to account for the 6053 * timer accuracy. If we are less than LPFC_CMF_INTERVAL 6054 * calculate the adjustment needed for total to reflect 6055 * a full LPFC_CMF_INTERVAL. 6056 */ 6057 if (ms && ms < LPFC_CMF_INTERVAL) { 6058 cnt = div_u64(total, ms); /* bytes per ms */ 6059 cnt *= LPFC_CMF_INTERVAL; /* what total should be */ 6060 6061 /* If the timeout is scheduled to be shorter, 6062 * this value may skew the data, so cap it at mbpi. 6063 */ 6064 if ((phba->hba_flag & HBA_SHORT_CMF) && cnt > mbpi) 6065 cnt = mbpi; 6066 6067 extra = cnt - total; 6068 } 6069 lpfc_issue_cmf_sync_wqe(phba, LPFC_CMF_INTERVAL, total + extra); 6070 } else { 6071 /* For Monitor mode or link down we want mbpi 6072 * to be the full link speed 6073 */ 6074 mbpi = phba->cmf_link_byte_count; 6075 extra = 0; 6076 } 6077 phba->cmf_timer_cnt++; 6078 6079 if (io_cnt) { 6080 /* Update congestion info buffer latency in us */ 6081 atomic_add(io_cnt, &phba->cgn_latency_evt_cnt); 6082 atomic64_add(lat, &phba->cgn_latency_evt); 6083 } 6084 busy = atomic_xchg(&phba->cmf_busy, 0); 6085 max_read = atomic_xchg(&phba->rx_max_read_cnt, 0); 6086 6087 /* Calculate MBPI for the next timer interval */ 6088 if (mbpi) { 6089 if (mbpi > phba->cmf_link_byte_count || 6090 phba->cmf_active_mode == LPFC_CFG_MONITOR) 6091 mbpi = phba->cmf_link_byte_count; 6092 6093 /* Change max_bytes_per_interval to what the prior 6094 * CMF_SYNC_WQE cmpl indicated. 6095 */ 6096 if (mbpi != phba->cmf_max_bytes_per_interval) 6097 phba->cmf_max_bytes_per_interval = mbpi; 6098 } 6099 6100 /* Save rxmonitor information for debug */ 6101 if (phba->rx_monitor) { 6102 entry.total_bytes = total; 6103 entry.cmf_bytes = total + extra; 6104 entry.rcv_bytes = rcv; 6105 entry.cmf_busy = busy; 6106 entry.cmf_info = phba->cmf_active_info; 6107 if (io_cnt) { 6108 entry.avg_io_latency = div_u64(lat, io_cnt); 6109 entry.avg_io_size = div_u64(rcv, io_cnt); 6110 } else { 6111 entry.avg_io_latency = 0; 6112 entry.avg_io_size = 0; 6113 } 6114 entry.max_read_cnt = max_read; 6115 entry.io_cnt = io_cnt; 6116 entry.max_bytes_per_interval = mbpi; 6117 if (phba->cmf_active_mode == LPFC_CFG_MANAGED) 6118 entry.timer_utilization = phba->cmf_last_ts; 6119 else 6120 entry.timer_utilization = ms; 6121 entry.timer_interval = ms; 6122 phba->cmf_last_ts = 0; 6123 6124 lpfc_rx_monitor_record(phba->rx_monitor, &entry); 6125 } 6126 6127 if (phba->cmf_active_mode == LPFC_CFG_MONITOR) { 6128 /* If Monitor mode, check if we are oversubscribed 6129 * against the full line rate. 6130 */ 6131 if (mbpi && total > mbpi) 6132 atomic_inc(&phba->cgn_driver_evt_cnt); 6133 } 6134 phba->rx_block_cnt += div_u64(rcv, 512); /* save 512 byte block cnt */ 6135 6136 /* Each minute save Fabric and Driver congestion information */ 6137 lpfc_cgn_save_evt_cnt(phba); 6138 6139 phba->hba_flag &= ~HBA_SHORT_CMF; 6140 6141 /* Since we need to call lpfc_cgn_save_evt_cnt every minute, on the 6142 * minute, adjust our next timer interval, if needed, to ensure a 6143 * 1 minute granularity when we get the next timer interrupt. 6144 */ 6145 if (time_after(jiffies + msecs_to_jiffies(LPFC_CMF_INTERVAL), 6146 phba->cgn_evt_timestamp)) { 6147 timer_interval = jiffies_to_msecs(phba->cgn_evt_timestamp - 6148 jiffies); 6149 if (timer_interval <= 0) 6150 timer_interval = LPFC_CMF_INTERVAL; 6151 else 6152 phba->hba_flag |= HBA_SHORT_CMF; 6153 6154 /* If we adjust timer_interval, max_bytes_per_interval 6155 * needs to be adjusted as well. 6156 */ 6157 phba->cmf_link_byte_count = div_u64(phba->cmf_max_line_rate * 6158 timer_interval, 1000); 6159 if (phba->cmf_active_mode == LPFC_CFG_MONITOR) 6160 phba->cmf_max_bytes_per_interval = 6161 phba->cmf_link_byte_count; 6162 } 6163 6164 /* Since total_bytes has already been zero'ed, its okay to unblock 6165 * after max_bytes_per_interval is setup. 6166 */ 6167 if (atomic_xchg(&phba->cmf_bw_wait, 0)) 6168 queue_work(phba->wq, &phba->unblock_request_work); 6169 6170 /* SCSI IO is now unblocked */ 6171 atomic_set(&phba->cmf_stop_io, 0); 6172 6173 skip: 6174 hrtimer_forward_now(timer, 6175 ktime_set(0, timer_interval * NSEC_PER_MSEC)); 6176 return HRTIMER_RESTART; 6177 } 6178 6179 #define trunk_link_status(__idx)\ 6180 bf_get(lpfc_acqe_fc_la_trunk_config_port##__idx, acqe_fc) ?\ 6181 ((phba->trunk_link.link##__idx.state == LPFC_LINK_UP) ?\ 6182 "Link up" : "Link down") : "NA" 6183 /* Did port __idx reported an error */ 6184 #define trunk_port_fault(__idx)\ 6185 bf_get(lpfc_acqe_fc_la_trunk_config_port##__idx, acqe_fc) ?\ 6186 (port_fault & (1 << __idx) ? "YES" : "NO") : "NA" 6187 6188 static void 6189 lpfc_update_trunk_link_status(struct lpfc_hba *phba, 6190 struct lpfc_acqe_fc_la *acqe_fc) 6191 { 6192 uint8_t port_fault = bf_get(lpfc_acqe_fc_la_trunk_linkmask, acqe_fc); 6193 uint8_t err = bf_get(lpfc_acqe_fc_la_trunk_fault, acqe_fc); 6194 u8 cnt = 0; 6195 6196 phba->sli4_hba.link_state.speed = 6197 lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_FC, 6198 bf_get(lpfc_acqe_fc_la_speed, acqe_fc)); 6199 6200 phba->sli4_hba.link_state.logical_speed = 6201 bf_get(lpfc_acqe_fc_la_llink_spd, acqe_fc) * 10; 6202 /* We got FC link speed, convert to fc_linkspeed (READ_TOPOLOGY) */ 6203 phba->fc_linkspeed = 6204 lpfc_async_link_speed_to_read_top( 6205 phba, 6206 bf_get(lpfc_acqe_fc_la_speed, acqe_fc)); 6207 6208 if (bf_get(lpfc_acqe_fc_la_trunk_config_port0, acqe_fc)) { 6209 phba->trunk_link.link0.state = 6210 bf_get(lpfc_acqe_fc_la_trunk_link_status_port0, acqe_fc) 6211 ? LPFC_LINK_UP : LPFC_LINK_DOWN; 6212 phba->trunk_link.link0.fault = port_fault & 0x1 ? err : 0; 6213 cnt++; 6214 } 6215 if (bf_get(lpfc_acqe_fc_la_trunk_config_port1, acqe_fc)) { 6216 phba->trunk_link.link1.state = 6217 bf_get(lpfc_acqe_fc_la_trunk_link_status_port1, acqe_fc) 6218 ? LPFC_LINK_UP : LPFC_LINK_DOWN; 6219 phba->trunk_link.link1.fault = port_fault & 0x2 ? err : 0; 6220 cnt++; 6221 } 6222 if (bf_get(lpfc_acqe_fc_la_trunk_config_port2, acqe_fc)) { 6223 phba->trunk_link.link2.state = 6224 bf_get(lpfc_acqe_fc_la_trunk_link_status_port2, acqe_fc) 6225 ? LPFC_LINK_UP : LPFC_LINK_DOWN; 6226 phba->trunk_link.link2.fault = port_fault & 0x4 ? err : 0; 6227 cnt++; 6228 } 6229 if (bf_get(lpfc_acqe_fc_la_trunk_config_port3, acqe_fc)) { 6230 phba->trunk_link.link3.state = 6231 bf_get(lpfc_acqe_fc_la_trunk_link_status_port3, acqe_fc) 6232 ? LPFC_LINK_UP : LPFC_LINK_DOWN; 6233 phba->trunk_link.link3.fault = port_fault & 0x8 ? err : 0; 6234 cnt++; 6235 } 6236 6237 if (cnt) 6238 phba->trunk_link.phy_lnk_speed = 6239 phba->sli4_hba.link_state.logical_speed / (cnt * 1000); 6240 else 6241 phba->trunk_link.phy_lnk_speed = LPFC_LINK_SPEED_UNKNOWN; 6242 6243 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 6244 "2910 Async FC Trunking Event - Speed:%d\n" 6245 "\tLogical speed:%d " 6246 "port0: %s port1: %s port2: %s port3: %s\n", 6247 phba->sli4_hba.link_state.speed, 6248 phba->sli4_hba.link_state.logical_speed, 6249 trunk_link_status(0), trunk_link_status(1), 6250 trunk_link_status(2), trunk_link_status(3)); 6251 6252 if (phba->cmf_active_mode != LPFC_CFG_OFF) 6253 lpfc_cmf_signal_init(phba); 6254 6255 if (port_fault) 6256 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 6257 "3202 trunk error:0x%x (%s) seen on port0:%s " 6258 /* 6259 * SLI-4: We have only 0xA error codes 6260 * defined as of now. print an appropriate 6261 * message in case driver needs to be updated. 6262 */ 6263 "port1:%s port2:%s port3:%s\n", err, err > 0xA ? 6264 "UNDEFINED. update driver." : trunk_errmsg[err], 6265 trunk_port_fault(0), trunk_port_fault(1), 6266 trunk_port_fault(2), trunk_port_fault(3)); 6267 } 6268 6269 6270 /** 6271 * lpfc_sli4_async_fc_evt - Process the asynchronous FC link event 6272 * @phba: pointer to lpfc hba data structure. 6273 * @acqe_fc: pointer to the async fc completion queue entry. 6274 * 6275 * This routine is to handle the SLI4 asynchronous FC event. It will simply log 6276 * that the event was received and then issue a read_topology mailbox command so 6277 * that the rest of the driver will treat it the same as SLI3. 6278 **/ 6279 static void 6280 lpfc_sli4_async_fc_evt(struct lpfc_hba *phba, struct lpfc_acqe_fc_la *acqe_fc) 6281 { 6282 LPFC_MBOXQ_t *pmb; 6283 MAILBOX_t *mb; 6284 struct lpfc_mbx_read_top *la; 6285 int rc; 6286 6287 if (bf_get(lpfc_trailer_type, acqe_fc) != 6288 LPFC_FC_LA_EVENT_TYPE_FC_LINK) { 6289 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 6290 "2895 Non FC link Event detected.(%d)\n", 6291 bf_get(lpfc_trailer_type, acqe_fc)); 6292 return; 6293 } 6294 6295 if (bf_get(lpfc_acqe_fc_la_att_type, acqe_fc) == 6296 LPFC_FC_LA_TYPE_TRUNKING_EVENT) { 6297 lpfc_update_trunk_link_status(phba, acqe_fc); 6298 return; 6299 } 6300 6301 /* Keep the link status for extra SLI4 state machine reference */ 6302 phba->sli4_hba.link_state.speed = 6303 lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_FC, 6304 bf_get(lpfc_acqe_fc_la_speed, acqe_fc)); 6305 phba->sli4_hba.link_state.duplex = LPFC_ASYNC_LINK_DUPLEX_FULL; 6306 phba->sli4_hba.link_state.topology = 6307 bf_get(lpfc_acqe_fc_la_topology, acqe_fc); 6308 phba->sli4_hba.link_state.status = 6309 bf_get(lpfc_acqe_fc_la_att_type, acqe_fc); 6310 phba->sli4_hba.link_state.type = 6311 bf_get(lpfc_acqe_fc_la_port_type, acqe_fc); 6312 phba->sli4_hba.link_state.number = 6313 bf_get(lpfc_acqe_fc_la_port_number, acqe_fc); 6314 phba->sli4_hba.link_state.fault = 6315 bf_get(lpfc_acqe_link_fault, acqe_fc); 6316 6317 if (bf_get(lpfc_acqe_fc_la_att_type, acqe_fc) == 6318 LPFC_FC_LA_TYPE_LINK_DOWN) 6319 phba->sli4_hba.link_state.logical_speed = 0; 6320 else if (!phba->sli4_hba.conf_trunk) 6321 phba->sli4_hba.link_state.logical_speed = 6322 bf_get(lpfc_acqe_fc_la_llink_spd, acqe_fc) * 10; 6323 6324 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 6325 "2896 Async FC event - Speed:%dGBaud Topology:x%x " 6326 "LA Type:x%x Port Type:%d Port Number:%d Logical speed:" 6327 "%dMbps Fault:%d\n", 6328 phba->sli4_hba.link_state.speed, 6329 phba->sli4_hba.link_state.topology, 6330 phba->sli4_hba.link_state.status, 6331 phba->sli4_hba.link_state.type, 6332 phba->sli4_hba.link_state.number, 6333 phba->sli4_hba.link_state.logical_speed, 6334 phba->sli4_hba.link_state.fault); 6335 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 6336 if (!pmb) { 6337 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 6338 "2897 The mboxq allocation failed\n"); 6339 return; 6340 } 6341 rc = lpfc_mbox_rsrc_prep(phba, pmb); 6342 if (rc) { 6343 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 6344 "2898 The mboxq prep failed\n"); 6345 goto out_free_pmb; 6346 } 6347 6348 /* Cleanup any outstanding ELS commands */ 6349 lpfc_els_flush_all_cmd(phba); 6350 6351 /* Block ELS IOCBs until we have done process link event */ 6352 phba->sli4_hba.els_wq->pring->flag |= LPFC_STOP_IOCB_EVENT; 6353 6354 /* Update link event statistics */ 6355 phba->sli.slistat.link_event++; 6356 6357 /* Create lpfc_handle_latt mailbox command from link ACQE */ 6358 lpfc_read_topology(phba, pmb, (struct lpfc_dmabuf *)pmb->ctx_buf); 6359 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology; 6360 pmb->vport = phba->pport; 6361 6362 if (phba->sli4_hba.link_state.status != LPFC_FC_LA_TYPE_LINK_UP) { 6363 phba->link_flag &= ~(LS_MDS_LINK_DOWN | LS_MDS_LOOPBACK); 6364 6365 switch (phba->sli4_hba.link_state.status) { 6366 case LPFC_FC_LA_TYPE_MDS_LINK_DOWN: 6367 phba->link_flag |= LS_MDS_LINK_DOWN; 6368 break; 6369 case LPFC_FC_LA_TYPE_MDS_LOOPBACK: 6370 phba->link_flag |= LS_MDS_LOOPBACK; 6371 break; 6372 default: 6373 break; 6374 } 6375 6376 /* Initialize completion status */ 6377 mb = &pmb->u.mb; 6378 mb->mbxStatus = MBX_SUCCESS; 6379 6380 /* Parse port fault information field */ 6381 lpfc_sli4_parse_latt_fault(phba, (void *)acqe_fc); 6382 6383 /* Parse and translate link attention fields */ 6384 la = (struct lpfc_mbx_read_top *)&pmb->u.mb.un.varReadTop; 6385 la->eventTag = acqe_fc->event_tag; 6386 6387 if (phba->sli4_hba.link_state.status == 6388 LPFC_FC_LA_TYPE_UNEXP_WWPN) { 6389 bf_set(lpfc_mbx_read_top_att_type, la, 6390 LPFC_FC_LA_TYPE_UNEXP_WWPN); 6391 } else { 6392 bf_set(lpfc_mbx_read_top_att_type, la, 6393 LPFC_FC_LA_TYPE_LINK_DOWN); 6394 } 6395 /* Invoke the mailbox command callback function */ 6396 lpfc_mbx_cmpl_read_topology(phba, pmb); 6397 6398 return; 6399 } 6400 6401 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT); 6402 if (rc == MBX_NOT_FINISHED) 6403 goto out_free_pmb; 6404 return; 6405 6406 out_free_pmb: 6407 lpfc_mbox_rsrc_cleanup(phba, pmb, MBOX_THD_UNLOCKED); 6408 } 6409 6410 /** 6411 * lpfc_sli4_async_sli_evt - Process the asynchronous SLI link event 6412 * @phba: pointer to lpfc hba data structure. 6413 * @acqe_sli: pointer to the async SLI completion queue entry. 6414 * 6415 * This routine is to handle the SLI4 asynchronous SLI events. 6416 **/ 6417 static void 6418 lpfc_sli4_async_sli_evt(struct lpfc_hba *phba, struct lpfc_acqe_sli *acqe_sli) 6419 { 6420 char port_name; 6421 char message[128]; 6422 uint8_t status; 6423 uint8_t evt_type; 6424 uint8_t operational = 0; 6425 struct temp_event temp_event_data; 6426 struct lpfc_acqe_misconfigured_event *misconfigured; 6427 struct lpfc_acqe_cgn_signal *cgn_signal; 6428 struct Scsi_Host *shost; 6429 struct lpfc_vport **vports; 6430 int rc, i, cnt; 6431 6432 evt_type = bf_get(lpfc_trailer_type, acqe_sli); 6433 6434 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 6435 "2901 Async SLI event - Type:%d, Event Data: x%08x " 6436 "x%08x x%08x x%08x\n", evt_type, 6437 acqe_sli->event_data1, acqe_sli->event_data2, 6438 acqe_sli->event_data3, acqe_sli->trailer); 6439 6440 port_name = phba->Port[0]; 6441 if (port_name == 0x00) 6442 port_name = '?'; /* get port name is empty */ 6443 6444 switch (evt_type) { 6445 case LPFC_SLI_EVENT_TYPE_OVER_TEMP: 6446 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT; 6447 temp_event_data.event_code = LPFC_THRESHOLD_TEMP; 6448 temp_event_data.data = (uint32_t)acqe_sli->event_data1; 6449 6450 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI, 6451 "3190 Over Temperature:%d Celsius- Port Name %c\n", 6452 acqe_sli->event_data1, port_name); 6453 6454 phba->sfp_warning |= LPFC_TRANSGRESSION_HIGH_TEMPERATURE; 6455 shost = lpfc_shost_from_vport(phba->pport); 6456 fc_host_post_vendor_event(shost, fc_get_event_number(), 6457 sizeof(temp_event_data), 6458 (char *)&temp_event_data, 6459 SCSI_NL_VID_TYPE_PCI 6460 | PCI_VENDOR_ID_EMULEX); 6461 break; 6462 case LPFC_SLI_EVENT_TYPE_NORM_TEMP: 6463 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT; 6464 temp_event_data.event_code = LPFC_NORMAL_TEMP; 6465 temp_event_data.data = (uint32_t)acqe_sli->event_data1; 6466 6467 lpfc_printf_log(phba, KERN_INFO, LOG_SLI | LOG_LDS_EVENT, 6468 "3191 Normal Temperature:%d Celsius - Port Name %c\n", 6469 acqe_sli->event_data1, port_name); 6470 6471 shost = lpfc_shost_from_vport(phba->pport); 6472 fc_host_post_vendor_event(shost, fc_get_event_number(), 6473 sizeof(temp_event_data), 6474 (char *)&temp_event_data, 6475 SCSI_NL_VID_TYPE_PCI 6476 | PCI_VENDOR_ID_EMULEX); 6477 break; 6478 case LPFC_SLI_EVENT_TYPE_MISCONFIGURED: 6479 misconfigured = (struct lpfc_acqe_misconfigured_event *) 6480 &acqe_sli->event_data1; 6481 6482 /* fetch the status for this port */ 6483 switch (phba->sli4_hba.lnk_info.lnk_no) { 6484 case LPFC_LINK_NUMBER_0: 6485 status = bf_get(lpfc_sli_misconfigured_port0_state, 6486 &misconfigured->theEvent); 6487 operational = bf_get(lpfc_sli_misconfigured_port0_op, 6488 &misconfigured->theEvent); 6489 break; 6490 case LPFC_LINK_NUMBER_1: 6491 status = bf_get(lpfc_sli_misconfigured_port1_state, 6492 &misconfigured->theEvent); 6493 operational = bf_get(lpfc_sli_misconfigured_port1_op, 6494 &misconfigured->theEvent); 6495 break; 6496 case LPFC_LINK_NUMBER_2: 6497 status = bf_get(lpfc_sli_misconfigured_port2_state, 6498 &misconfigured->theEvent); 6499 operational = bf_get(lpfc_sli_misconfigured_port2_op, 6500 &misconfigured->theEvent); 6501 break; 6502 case LPFC_LINK_NUMBER_3: 6503 status = bf_get(lpfc_sli_misconfigured_port3_state, 6504 &misconfigured->theEvent); 6505 operational = bf_get(lpfc_sli_misconfigured_port3_op, 6506 &misconfigured->theEvent); 6507 break; 6508 default: 6509 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 6510 "3296 " 6511 "LPFC_SLI_EVENT_TYPE_MISCONFIGURED " 6512 "event: Invalid link %d", 6513 phba->sli4_hba.lnk_info.lnk_no); 6514 return; 6515 } 6516 6517 /* Skip if optic state unchanged */ 6518 if (phba->sli4_hba.lnk_info.optic_state == status) 6519 return; 6520 6521 switch (status) { 6522 case LPFC_SLI_EVENT_STATUS_VALID: 6523 sprintf(message, "Physical Link is functional"); 6524 break; 6525 case LPFC_SLI_EVENT_STATUS_NOT_PRESENT: 6526 sprintf(message, "Optics faulted/incorrectly " 6527 "installed/not installed - Reseat optics, " 6528 "if issue not resolved, replace."); 6529 break; 6530 case LPFC_SLI_EVENT_STATUS_WRONG_TYPE: 6531 sprintf(message, 6532 "Optics of two types installed - Remove one " 6533 "optic or install matching pair of optics."); 6534 break; 6535 case LPFC_SLI_EVENT_STATUS_UNSUPPORTED: 6536 sprintf(message, "Incompatible optics - Replace with " 6537 "compatible optics for card to function."); 6538 break; 6539 case LPFC_SLI_EVENT_STATUS_UNQUALIFIED: 6540 sprintf(message, "Unqualified optics - Replace with " 6541 "Avago optics for Warranty and Technical " 6542 "Support - Link is%s operational", 6543 (operational) ? " not" : ""); 6544 break; 6545 case LPFC_SLI_EVENT_STATUS_UNCERTIFIED: 6546 sprintf(message, "Uncertified optics - Replace with " 6547 "Avago-certified optics to enable link " 6548 "operation - Link is%s operational", 6549 (operational) ? " not" : ""); 6550 break; 6551 default: 6552 /* firmware is reporting a status we don't know about */ 6553 sprintf(message, "Unknown event status x%02x", status); 6554 break; 6555 } 6556 6557 /* Issue READ_CONFIG mbox command to refresh supported speeds */ 6558 rc = lpfc_sli4_read_config(phba); 6559 if (rc) { 6560 phba->lmt = 0; 6561 lpfc_printf_log(phba, KERN_ERR, 6562 LOG_TRACE_EVENT, 6563 "3194 Unable to retrieve supported " 6564 "speeds, rc = 0x%x\n", rc); 6565 } 6566 rc = lpfc_sli4_refresh_params(phba); 6567 if (rc) { 6568 lpfc_printf_log(phba, KERN_ERR, LOG_SLI, 6569 "3174 Unable to update pls support, " 6570 "rc x%x\n", rc); 6571 } 6572 vports = lpfc_create_vport_work_array(phba); 6573 if (vports != NULL) { 6574 for (i = 0; i <= phba->max_vports && vports[i] != NULL; 6575 i++) { 6576 shost = lpfc_shost_from_vport(vports[i]); 6577 lpfc_host_supported_speeds_set(shost); 6578 } 6579 } 6580 lpfc_destroy_vport_work_array(phba, vports); 6581 6582 phba->sli4_hba.lnk_info.optic_state = status; 6583 lpfc_printf_log(phba, KERN_ERR, LOG_SLI, 6584 "3176 Port Name %c %s\n", port_name, message); 6585 break; 6586 case LPFC_SLI_EVENT_TYPE_REMOTE_DPORT: 6587 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 6588 "3192 Remote DPort Test Initiated - " 6589 "Event Data1:x%08x Event Data2: x%08x\n", 6590 acqe_sli->event_data1, acqe_sli->event_data2); 6591 break; 6592 case LPFC_SLI_EVENT_TYPE_PORT_PARAMS_CHG: 6593 /* Call FW to obtain active parms */ 6594 lpfc_sli4_cgn_parm_chg_evt(phba); 6595 break; 6596 case LPFC_SLI_EVENT_TYPE_MISCONF_FAWWN: 6597 /* Misconfigured WWN. Reports that the SLI Port is configured 6598 * to use FA-WWN, but the attached device doesn’t support it. 6599 * Event Data1 - N.A, Event Data2 - N.A 6600 * This event only happens on the physical port. 6601 */ 6602 lpfc_log_msg(phba, KERN_WARNING, LOG_SLI | LOG_DISCOVERY, 6603 "2699 Misconfigured FA-PWWN - Attached device " 6604 "does not support FA-PWWN\n"); 6605 phba->sli4_hba.fawwpn_flag &= ~LPFC_FAWWPN_FABRIC; 6606 memset(phba->pport->fc_portname.u.wwn, 0, 6607 sizeof(struct lpfc_name)); 6608 break; 6609 case LPFC_SLI_EVENT_TYPE_EEPROM_FAILURE: 6610 /* EEPROM failure. No driver action is required */ 6611 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI, 6612 "2518 EEPROM failure - " 6613 "Event Data1: x%08x Event Data2: x%08x\n", 6614 acqe_sli->event_data1, acqe_sli->event_data2); 6615 break; 6616 case LPFC_SLI_EVENT_TYPE_CGN_SIGNAL: 6617 if (phba->cmf_active_mode == LPFC_CFG_OFF) 6618 break; 6619 cgn_signal = (struct lpfc_acqe_cgn_signal *) 6620 &acqe_sli->event_data1; 6621 phba->cgn_acqe_cnt++; 6622 6623 cnt = bf_get(lpfc_warn_acqe, cgn_signal); 6624 atomic64_add(cnt, &phba->cgn_acqe_stat.warn); 6625 atomic64_add(cgn_signal->alarm_cnt, &phba->cgn_acqe_stat.alarm); 6626 6627 /* no threshold for CMF, even 1 signal will trigger an event */ 6628 6629 /* Alarm overrides warning, so check that first */ 6630 if (cgn_signal->alarm_cnt) { 6631 if (phba->cgn_reg_signal == EDC_CG_SIG_WARN_ALARM) { 6632 /* Keep track of alarm cnt for CMF_SYNC_WQE */ 6633 atomic_add(cgn_signal->alarm_cnt, 6634 &phba->cgn_sync_alarm_cnt); 6635 } 6636 } else if (cnt) { 6637 /* signal action needs to be taken */ 6638 if (phba->cgn_reg_signal == EDC_CG_SIG_WARN_ONLY || 6639 phba->cgn_reg_signal == EDC_CG_SIG_WARN_ALARM) { 6640 /* Keep track of warning cnt for CMF_SYNC_WQE */ 6641 atomic_add(cnt, &phba->cgn_sync_warn_cnt); 6642 } 6643 } 6644 break; 6645 case LPFC_SLI_EVENT_TYPE_RD_SIGNAL: 6646 /* May be accompanied by a temperature event */ 6647 lpfc_printf_log(phba, KERN_INFO, 6648 LOG_SLI | LOG_LINK_EVENT | LOG_LDS_EVENT, 6649 "2902 Remote Degrade Signaling: x%08x x%08x " 6650 "x%08x\n", 6651 acqe_sli->event_data1, acqe_sli->event_data2, 6652 acqe_sli->event_data3); 6653 break; 6654 default: 6655 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 6656 "3193 Unrecognized SLI event, type: 0x%x", 6657 evt_type); 6658 break; 6659 } 6660 } 6661 6662 /** 6663 * lpfc_sli4_perform_vport_cvl - Perform clear virtual link on a vport 6664 * @vport: pointer to vport data structure. 6665 * 6666 * This routine is to perform Clear Virtual Link (CVL) on a vport in 6667 * response to a CVL event. 6668 * 6669 * Return the pointer to the ndlp with the vport if successful, otherwise 6670 * return NULL. 6671 **/ 6672 static struct lpfc_nodelist * 6673 lpfc_sli4_perform_vport_cvl(struct lpfc_vport *vport) 6674 { 6675 struct lpfc_nodelist *ndlp; 6676 struct Scsi_Host *shost; 6677 struct lpfc_hba *phba; 6678 6679 if (!vport) 6680 return NULL; 6681 phba = vport->phba; 6682 if (!phba) 6683 return NULL; 6684 ndlp = lpfc_findnode_did(vport, Fabric_DID); 6685 if (!ndlp) { 6686 /* Cannot find existing Fabric ndlp, so allocate a new one */ 6687 ndlp = lpfc_nlp_init(vport, Fabric_DID); 6688 if (!ndlp) 6689 return NULL; 6690 /* Set the node type */ 6691 ndlp->nlp_type |= NLP_FABRIC; 6692 /* Put ndlp onto node list */ 6693 lpfc_enqueue_node(vport, ndlp); 6694 } 6695 if ((phba->pport->port_state < LPFC_FLOGI) && 6696 (phba->pport->port_state != LPFC_VPORT_FAILED)) 6697 return NULL; 6698 /* If virtual link is not yet instantiated ignore CVL */ 6699 if ((vport != phba->pport) && (vport->port_state < LPFC_FDISC) 6700 && (vport->port_state != LPFC_VPORT_FAILED)) 6701 return NULL; 6702 shost = lpfc_shost_from_vport(vport); 6703 if (!shost) 6704 return NULL; 6705 lpfc_linkdown_port(vport); 6706 lpfc_cleanup_pending_mbox(vport); 6707 spin_lock_irq(shost->host_lock); 6708 vport->fc_flag |= FC_VPORT_CVL_RCVD; 6709 spin_unlock_irq(shost->host_lock); 6710 6711 return ndlp; 6712 } 6713 6714 /** 6715 * lpfc_sli4_perform_all_vport_cvl - Perform clear virtual link on all vports 6716 * @phba: pointer to lpfc hba data structure. 6717 * 6718 * This routine is to perform Clear Virtual Link (CVL) on all vports in 6719 * response to a FCF dead event. 6720 **/ 6721 static void 6722 lpfc_sli4_perform_all_vport_cvl(struct lpfc_hba *phba) 6723 { 6724 struct lpfc_vport **vports; 6725 int i; 6726 6727 vports = lpfc_create_vport_work_array(phba); 6728 if (vports) 6729 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) 6730 lpfc_sli4_perform_vport_cvl(vports[i]); 6731 lpfc_destroy_vport_work_array(phba, vports); 6732 } 6733 6734 /** 6735 * lpfc_sli4_async_fip_evt - Process the asynchronous FCoE FIP event 6736 * @phba: pointer to lpfc hba data structure. 6737 * @acqe_fip: pointer to the async fcoe completion queue entry. 6738 * 6739 * This routine is to handle the SLI4 asynchronous fcoe event. 6740 **/ 6741 static void 6742 lpfc_sli4_async_fip_evt(struct lpfc_hba *phba, 6743 struct lpfc_acqe_fip *acqe_fip) 6744 { 6745 uint8_t event_type = bf_get(lpfc_trailer_type, acqe_fip); 6746 int rc; 6747 struct lpfc_vport *vport; 6748 struct lpfc_nodelist *ndlp; 6749 int active_vlink_present; 6750 struct lpfc_vport **vports; 6751 int i; 6752 6753 phba->fc_eventTag = acqe_fip->event_tag; 6754 phba->fcoe_eventtag = acqe_fip->event_tag; 6755 switch (event_type) { 6756 case LPFC_FIP_EVENT_TYPE_NEW_FCF: 6757 case LPFC_FIP_EVENT_TYPE_FCF_PARAM_MOD: 6758 if (event_type == LPFC_FIP_EVENT_TYPE_NEW_FCF) 6759 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 6760 "2546 New FCF event, evt_tag:x%x, " 6761 "index:x%x\n", 6762 acqe_fip->event_tag, 6763 acqe_fip->index); 6764 else 6765 lpfc_printf_log(phba, KERN_WARNING, LOG_FIP | 6766 LOG_DISCOVERY, 6767 "2788 FCF param modified event, " 6768 "evt_tag:x%x, index:x%x\n", 6769 acqe_fip->event_tag, 6770 acqe_fip->index); 6771 if (phba->fcf.fcf_flag & FCF_DISCOVERY) { 6772 /* 6773 * During period of FCF discovery, read the FCF 6774 * table record indexed by the event to update 6775 * FCF roundrobin failover eligible FCF bmask. 6776 */ 6777 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | 6778 LOG_DISCOVERY, 6779 "2779 Read FCF (x%x) for updating " 6780 "roundrobin FCF failover bmask\n", 6781 acqe_fip->index); 6782 rc = lpfc_sli4_read_fcf_rec(phba, acqe_fip->index); 6783 } 6784 6785 /* If the FCF discovery is in progress, do nothing. */ 6786 spin_lock_irq(&phba->hbalock); 6787 if (phba->hba_flag & FCF_TS_INPROG) { 6788 spin_unlock_irq(&phba->hbalock); 6789 break; 6790 } 6791 /* If fast FCF failover rescan event is pending, do nothing */ 6792 if (phba->fcf.fcf_flag & (FCF_REDISC_EVT | FCF_REDISC_PEND)) { 6793 spin_unlock_irq(&phba->hbalock); 6794 break; 6795 } 6796 6797 /* If the FCF has been in discovered state, do nothing. */ 6798 if (phba->fcf.fcf_flag & FCF_SCAN_DONE) { 6799 spin_unlock_irq(&phba->hbalock); 6800 break; 6801 } 6802 spin_unlock_irq(&phba->hbalock); 6803 6804 /* Otherwise, scan the entire FCF table and re-discover SAN */ 6805 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY, 6806 "2770 Start FCF table scan per async FCF " 6807 "event, evt_tag:x%x, index:x%x\n", 6808 acqe_fip->event_tag, acqe_fip->index); 6809 rc = lpfc_sli4_fcf_scan_read_fcf_rec(phba, 6810 LPFC_FCOE_FCF_GET_FIRST); 6811 if (rc) 6812 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 6813 "2547 Issue FCF scan read FCF mailbox " 6814 "command failed (x%x)\n", rc); 6815 break; 6816 6817 case LPFC_FIP_EVENT_TYPE_FCF_TABLE_FULL: 6818 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 6819 "2548 FCF Table full count 0x%x tag 0x%x\n", 6820 bf_get(lpfc_acqe_fip_fcf_count, acqe_fip), 6821 acqe_fip->event_tag); 6822 break; 6823 6824 case LPFC_FIP_EVENT_TYPE_FCF_DEAD: 6825 phba->fcoe_cvl_eventtag = acqe_fip->event_tag; 6826 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 6827 "2549 FCF (x%x) disconnected from network, " 6828 "tag:x%x\n", acqe_fip->index, 6829 acqe_fip->event_tag); 6830 /* 6831 * If we are in the middle of FCF failover process, clear 6832 * the corresponding FCF bit in the roundrobin bitmap. 6833 */ 6834 spin_lock_irq(&phba->hbalock); 6835 if ((phba->fcf.fcf_flag & FCF_DISCOVERY) && 6836 (phba->fcf.current_rec.fcf_indx != acqe_fip->index)) { 6837 spin_unlock_irq(&phba->hbalock); 6838 /* Update FLOGI FCF failover eligible FCF bmask */ 6839 lpfc_sli4_fcf_rr_index_clear(phba, acqe_fip->index); 6840 break; 6841 } 6842 spin_unlock_irq(&phba->hbalock); 6843 6844 /* If the event is not for currently used fcf do nothing */ 6845 if (phba->fcf.current_rec.fcf_indx != acqe_fip->index) 6846 break; 6847 6848 /* 6849 * Otherwise, request the port to rediscover the entire FCF 6850 * table for a fast recovery from case that the current FCF 6851 * is no longer valid as we are not in the middle of FCF 6852 * failover process already. 6853 */ 6854 spin_lock_irq(&phba->hbalock); 6855 /* Mark the fast failover process in progress */ 6856 phba->fcf.fcf_flag |= FCF_DEAD_DISC; 6857 spin_unlock_irq(&phba->hbalock); 6858 6859 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY, 6860 "2771 Start FCF fast failover process due to " 6861 "FCF DEAD event: evt_tag:x%x, fcf_index:x%x " 6862 "\n", acqe_fip->event_tag, acqe_fip->index); 6863 rc = lpfc_sli4_redisc_fcf_table(phba); 6864 if (rc) { 6865 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | 6866 LOG_TRACE_EVENT, 6867 "2772 Issue FCF rediscover mailbox " 6868 "command failed, fail through to FCF " 6869 "dead event\n"); 6870 spin_lock_irq(&phba->hbalock); 6871 phba->fcf.fcf_flag &= ~FCF_DEAD_DISC; 6872 spin_unlock_irq(&phba->hbalock); 6873 /* 6874 * Last resort will fail over by treating this 6875 * as a link down to FCF registration. 6876 */ 6877 lpfc_sli4_fcf_dead_failthrough(phba); 6878 } else { 6879 /* Reset FCF roundrobin bmask for new discovery */ 6880 lpfc_sli4_clear_fcf_rr_bmask(phba); 6881 /* 6882 * Handling fast FCF failover to a DEAD FCF event is 6883 * considered equalivant to receiving CVL to all vports. 6884 */ 6885 lpfc_sli4_perform_all_vport_cvl(phba); 6886 } 6887 break; 6888 case LPFC_FIP_EVENT_TYPE_CVL: 6889 phba->fcoe_cvl_eventtag = acqe_fip->event_tag; 6890 lpfc_printf_log(phba, KERN_ERR, 6891 LOG_TRACE_EVENT, 6892 "2718 Clear Virtual Link Received for VPI 0x%x" 6893 " tag 0x%x\n", acqe_fip->index, acqe_fip->event_tag); 6894 6895 vport = lpfc_find_vport_by_vpid(phba, 6896 acqe_fip->index); 6897 ndlp = lpfc_sli4_perform_vport_cvl(vport); 6898 if (!ndlp) 6899 break; 6900 active_vlink_present = 0; 6901 6902 vports = lpfc_create_vport_work_array(phba); 6903 if (vports) { 6904 for (i = 0; i <= phba->max_vports && vports[i] != NULL; 6905 i++) { 6906 if ((!(vports[i]->fc_flag & 6907 FC_VPORT_CVL_RCVD)) && 6908 (vports[i]->port_state > LPFC_FDISC)) { 6909 active_vlink_present = 1; 6910 break; 6911 } 6912 } 6913 lpfc_destroy_vport_work_array(phba, vports); 6914 } 6915 6916 /* 6917 * Don't re-instantiate if vport is marked for deletion. 6918 * If we are here first then vport_delete is going to wait 6919 * for discovery to complete. 6920 */ 6921 if (!(vport->load_flag & FC_UNLOADING) && 6922 active_vlink_present) { 6923 /* 6924 * If there are other active VLinks present, 6925 * re-instantiate the Vlink using FDISC. 6926 */ 6927 mod_timer(&ndlp->nlp_delayfunc, 6928 jiffies + msecs_to_jiffies(1000)); 6929 spin_lock_irq(&ndlp->lock); 6930 ndlp->nlp_flag |= NLP_DELAY_TMO; 6931 spin_unlock_irq(&ndlp->lock); 6932 ndlp->nlp_last_elscmd = ELS_CMD_FDISC; 6933 vport->port_state = LPFC_FDISC; 6934 } else { 6935 /* 6936 * Otherwise, we request port to rediscover 6937 * the entire FCF table for a fast recovery 6938 * from possible case that the current FCF 6939 * is no longer valid if we are not already 6940 * in the FCF failover process. 6941 */ 6942 spin_lock_irq(&phba->hbalock); 6943 if (phba->fcf.fcf_flag & FCF_DISCOVERY) { 6944 spin_unlock_irq(&phba->hbalock); 6945 break; 6946 } 6947 /* Mark the fast failover process in progress */ 6948 phba->fcf.fcf_flag |= FCF_ACVL_DISC; 6949 spin_unlock_irq(&phba->hbalock); 6950 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | 6951 LOG_DISCOVERY, 6952 "2773 Start FCF failover per CVL, " 6953 "evt_tag:x%x\n", acqe_fip->event_tag); 6954 rc = lpfc_sli4_redisc_fcf_table(phba); 6955 if (rc) { 6956 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | 6957 LOG_TRACE_EVENT, 6958 "2774 Issue FCF rediscover " 6959 "mailbox command failed, " 6960 "through to CVL event\n"); 6961 spin_lock_irq(&phba->hbalock); 6962 phba->fcf.fcf_flag &= ~FCF_ACVL_DISC; 6963 spin_unlock_irq(&phba->hbalock); 6964 /* 6965 * Last resort will be re-try on the 6966 * the current registered FCF entry. 6967 */ 6968 lpfc_retry_pport_discovery(phba); 6969 } else 6970 /* 6971 * Reset FCF roundrobin bmask for new 6972 * discovery. 6973 */ 6974 lpfc_sli4_clear_fcf_rr_bmask(phba); 6975 } 6976 break; 6977 default: 6978 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 6979 "0288 Unknown FCoE event type 0x%x event tag " 6980 "0x%x\n", event_type, acqe_fip->event_tag); 6981 break; 6982 } 6983 } 6984 6985 /** 6986 * lpfc_sli4_async_dcbx_evt - Process the asynchronous dcbx event 6987 * @phba: pointer to lpfc hba data structure. 6988 * @acqe_dcbx: pointer to the async dcbx completion queue entry. 6989 * 6990 * This routine is to handle the SLI4 asynchronous dcbx event. 6991 **/ 6992 static void 6993 lpfc_sli4_async_dcbx_evt(struct lpfc_hba *phba, 6994 struct lpfc_acqe_dcbx *acqe_dcbx) 6995 { 6996 phba->fc_eventTag = acqe_dcbx->event_tag; 6997 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 6998 "0290 The SLI4 DCBX asynchronous event is not " 6999 "handled yet\n"); 7000 } 7001 7002 /** 7003 * lpfc_sli4_async_grp5_evt - Process the asynchronous group5 event 7004 * @phba: pointer to lpfc hba data structure. 7005 * @acqe_grp5: pointer to the async grp5 completion queue entry. 7006 * 7007 * This routine is to handle the SLI4 asynchronous grp5 event. A grp5 event 7008 * is an asynchronous notified of a logical link speed change. The Port 7009 * reports the logical link speed in units of 10Mbps. 7010 **/ 7011 static void 7012 lpfc_sli4_async_grp5_evt(struct lpfc_hba *phba, 7013 struct lpfc_acqe_grp5 *acqe_grp5) 7014 { 7015 uint16_t prev_ll_spd; 7016 7017 phba->fc_eventTag = acqe_grp5->event_tag; 7018 phba->fcoe_eventtag = acqe_grp5->event_tag; 7019 prev_ll_spd = phba->sli4_hba.link_state.logical_speed; 7020 phba->sli4_hba.link_state.logical_speed = 7021 (bf_get(lpfc_acqe_grp5_llink_spd, acqe_grp5)) * 10; 7022 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 7023 "2789 GRP5 Async Event: Updating logical link speed " 7024 "from %dMbps to %dMbps\n", prev_ll_spd, 7025 phba->sli4_hba.link_state.logical_speed); 7026 } 7027 7028 /** 7029 * lpfc_sli4_async_cmstat_evt - Process the asynchronous cmstat event 7030 * @phba: pointer to lpfc hba data structure. 7031 * 7032 * This routine is to handle the SLI4 asynchronous cmstat event. A cmstat event 7033 * is an asynchronous notification of a request to reset CM stats. 7034 **/ 7035 static void 7036 lpfc_sli4_async_cmstat_evt(struct lpfc_hba *phba) 7037 { 7038 if (!phba->cgn_i) 7039 return; 7040 lpfc_init_congestion_stat(phba); 7041 } 7042 7043 /** 7044 * lpfc_cgn_params_val - Validate FW congestion parameters. 7045 * @phba: pointer to lpfc hba data structure. 7046 * @p_cfg_param: pointer to FW provided congestion parameters. 7047 * 7048 * This routine validates the congestion parameters passed 7049 * by the FW to the driver via an ACQE event. 7050 **/ 7051 static void 7052 lpfc_cgn_params_val(struct lpfc_hba *phba, struct lpfc_cgn_param *p_cfg_param) 7053 { 7054 spin_lock_irq(&phba->hbalock); 7055 7056 if (!lpfc_rangecheck(p_cfg_param->cgn_param_mode, LPFC_CFG_OFF, 7057 LPFC_CFG_MONITOR)) { 7058 lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT, 7059 "6225 CMF mode param out of range: %d\n", 7060 p_cfg_param->cgn_param_mode); 7061 p_cfg_param->cgn_param_mode = LPFC_CFG_OFF; 7062 } 7063 7064 spin_unlock_irq(&phba->hbalock); 7065 } 7066 7067 static const char * const lpfc_cmf_mode_to_str[] = { 7068 "OFF", 7069 "MANAGED", 7070 "MONITOR", 7071 }; 7072 7073 /** 7074 * lpfc_cgn_params_parse - Process a FW cong parm change event 7075 * @phba: pointer to lpfc hba data structure. 7076 * @p_cgn_param: pointer to a data buffer with the FW cong params. 7077 * @len: the size of pdata in bytes. 7078 * 7079 * This routine validates the congestion management buffer signature 7080 * from the FW, validates the contents and makes corrections for 7081 * valid, in-range values. If the signature magic is correct and 7082 * after parameter validation, the contents are copied to the driver's 7083 * @phba structure. If the magic is incorrect, an error message is 7084 * logged. 7085 **/ 7086 static void 7087 lpfc_cgn_params_parse(struct lpfc_hba *phba, 7088 struct lpfc_cgn_param *p_cgn_param, uint32_t len) 7089 { 7090 struct lpfc_cgn_info *cp; 7091 uint32_t crc, oldmode; 7092 char acr_string[4] = {0}; 7093 7094 /* Make sure the FW has encoded the correct magic number to 7095 * validate the congestion parameter in FW memory. 7096 */ 7097 if (p_cgn_param->cgn_param_magic == LPFC_CFG_PARAM_MAGIC_NUM) { 7098 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT | LOG_INIT, 7099 "4668 FW cgn parm buffer data: " 7100 "magic 0x%x version %d mode %d " 7101 "level0 %d level1 %d " 7102 "level2 %d byte13 %d " 7103 "byte14 %d byte15 %d " 7104 "byte11 %d byte12 %d activeMode %d\n", 7105 p_cgn_param->cgn_param_magic, 7106 p_cgn_param->cgn_param_version, 7107 p_cgn_param->cgn_param_mode, 7108 p_cgn_param->cgn_param_level0, 7109 p_cgn_param->cgn_param_level1, 7110 p_cgn_param->cgn_param_level2, 7111 p_cgn_param->byte13, 7112 p_cgn_param->byte14, 7113 p_cgn_param->byte15, 7114 p_cgn_param->byte11, 7115 p_cgn_param->byte12, 7116 phba->cmf_active_mode); 7117 7118 oldmode = phba->cmf_active_mode; 7119 7120 /* Any parameters out of range are corrected to defaults 7121 * by this routine. No need to fail. 7122 */ 7123 lpfc_cgn_params_val(phba, p_cgn_param); 7124 7125 /* Parameters are verified, move them into driver storage */ 7126 spin_lock_irq(&phba->hbalock); 7127 memcpy(&phba->cgn_p, p_cgn_param, 7128 sizeof(struct lpfc_cgn_param)); 7129 7130 /* Update parameters in congestion info buffer now */ 7131 if (phba->cgn_i) { 7132 cp = (struct lpfc_cgn_info *)phba->cgn_i->virt; 7133 cp->cgn_info_mode = phba->cgn_p.cgn_param_mode; 7134 cp->cgn_info_level0 = phba->cgn_p.cgn_param_level0; 7135 cp->cgn_info_level1 = phba->cgn_p.cgn_param_level1; 7136 cp->cgn_info_level2 = phba->cgn_p.cgn_param_level2; 7137 crc = lpfc_cgn_calc_crc32(cp, LPFC_CGN_INFO_SZ, 7138 LPFC_CGN_CRC32_SEED); 7139 cp->cgn_info_crc = cpu_to_le32(crc); 7140 } 7141 spin_unlock_irq(&phba->hbalock); 7142 7143 phba->cmf_active_mode = phba->cgn_p.cgn_param_mode; 7144 7145 switch (oldmode) { 7146 case LPFC_CFG_OFF: 7147 if (phba->cgn_p.cgn_param_mode != LPFC_CFG_OFF) { 7148 /* Turning CMF on */ 7149 lpfc_cmf_start(phba); 7150 7151 if (phba->link_state >= LPFC_LINK_UP) { 7152 phba->cgn_reg_fpin = 7153 phba->cgn_init_reg_fpin; 7154 phba->cgn_reg_signal = 7155 phba->cgn_init_reg_signal; 7156 lpfc_issue_els_edc(phba->pport, 0); 7157 } 7158 } 7159 break; 7160 case LPFC_CFG_MANAGED: 7161 switch (phba->cgn_p.cgn_param_mode) { 7162 case LPFC_CFG_OFF: 7163 /* Turning CMF off */ 7164 lpfc_cmf_stop(phba); 7165 if (phba->link_state >= LPFC_LINK_UP) 7166 lpfc_issue_els_edc(phba->pport, 0); 7167 break; 7168 case LPFC_CFG_MONITOR: 7169 phba->cmf_max_bytes_per_interval = 7170 phba->cmf_link_byte_count; 7171 7172 /* Resume blocked IO - unblock on workqueue */ 7173 queue_work(phba->wq, 7174 &phba->unblock_request_work); 7175 break; 7176 } 7177 break; 7178 case LPFC_CFG_MONITOR: 7179 switch (phba->cgn_p.cgn_param_mode) { 7180 case LPFC_CFG_OFF: 7181 /* Turning CMF off */ 7182 lpfc_cmf_stop(phba); 7183 if (phba->link_state >= LPFC_LINK_UP) 7184 lpfc_issue_els_edc(phba->pport, 0); 7185 break; 7186 case LPFC_CFG_MANAGED: 7187 lpfc_cmf_signal_init(phba); 7188 break; 7189 } 7190 break; 7191 } 7192 if (oldmode != LPFC_CFG_OFF || 7193 oldmode != phba->cgn_p.cgn_param_mode) { 7194 if (phba->cgn_p.cgn_param_mode == LPFC_CFG_MANAGED) 7195 scnprintf(acr_string, sizeof(acr_string), "%u", 7196 phba->cgn_p.cgn_param_level0); 7197 else 7198 scnprintf(acr_string, sizeof(acr_string), "NA"); 7199 7200 dev_info(&phba->pcidev->dev, "%d: " 7201 "4663 CMF: Mode %s acr %s\n", 7202 phba->brd_no, 7203 lpfc_cmf_mode_to_str 7204 [phba->cgn_p.cgn_param_mode], 7205 acr_string); 7206 } 7207 } else { 7208 lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT | LOG_INIT, 7209 "4669 FW cgn parm buf wrong magic 0x%x " 7210 "version %d\n", p_cgn_param->cgn_param_magic, 7211 p_cgn_param->cgn_param_version); 7212 } 7213 } 7214 7215 /** 7216 * lpfc_sli4_cgn_params_read - Read and Validate FW congestion parameters. 7217 * @phba: pointer to lpfc hba data structure. 7218 * 7219 * This routine issues a read_object mailbox command to 7220 * get the congestion management parameters from the FW 7221 * parses it and updates the driver maintained values. 7222 * 7223 * Returns 7224 * 0 if the object was empty 7225 * -Eval if an error was encountered 7226 * Count if bytes were read from object 7227 **/ 7228 int 7229 lpfc_sli4_cgn_params_read(struct lpfc_hba *phba) 7230 { 7231 int ret = 0; 7232 struct lpfc_cgn_param *p_cgn_param = NULL; 7233 u32 *pdata = NULL; 7234 u32 len = 0; 7235 7236 /* Find out if the FW has a new set of congestion parameters. */ 7237 len = sizeof(struct lpfc_cgn_param); 7238 pdata = kzalloc(len, GFP_KERNEL); 7239 ret = lpfc_read_object(phba, (char *)LPFC_PORT_CFG_NAME, 7240 pdata, len); 7241 7242 /* 0 means no data. A negative means error. A positive means 7243 * bytes were copied. 7244 */ 7245 if (!ret) { 7246 lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT | LOG_INIT, 7247 "4670 CGN RD OBJ returns no data\n"); 7248 goto rd_obj_err; 7249 } else if (ret < 0) { 7250 /* Some error. Just exit and return it to the caller.*/ 7251 goto rd_obj_err; 7252 } 7253 7254 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT | LOG_INIT, 7255 "6234 READ CGN PARAMS Successful %d\n", len); 7256 7257 /* Parse data pointer over len and update the phba congestion 7258 * parameters with values passed back. The receive rate values 7259 * may have been altered in FW, but take no action here. 7260 */ 7261 p_cgn_param = (struct lpfc_cgn_param *)pdata; 7262 lpfc_cgn_params_parse(phba, p_cgn_param, len); 7263 7264 rd_obj_err: 7265 kfree(pdata); 7266 return ret; 7267 } 7268 7269 /** 7270 * lpfc_sli4_cgn_parm_chg_evt - Process a FW congestion param change event 7271 * @phba: pointer to lpfc hba data structure. 7272 * 7273 * The FW generated Async ACQE SLI event calls this routine when 7274 * the event type is an SLI Internal Port Event and the Event Code 7275 * indicates a change to the FW maintained congestion parameters. 7276 * 7277 * This routine executes a Read_Object mailbox call to obtain the 7278 * current congestion parameters maintained in FW and corrects 7279 * the driver's active congestion parameters. 7280 * 7281 * The acqe event is not passed because there is no further data 7282 * required. 7283 * 7284 * Returns nonzero error if event processing encountered an error. 7285 * Zero otherwise for success. 7286 **/ 7287 static int 7288 lpfc_sli4_cgn_parm_chg_evt(struct lpfc_hba *phba) 7289 { 7290 int ret = 0; 7291 7292 if (!phba->sli4_hba.pc_sli4_params.cmf) { 7293 lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT | LOG_INIT, 7294 "4664 Cgn Evt when E2E off. Drop event\n"); 7295 return -EACCES; 7296 } 7297 7298 /* If the event is claiming an empty object, it's ok. A write 7299 * could have cleared it. Only error is a negative return 7300 * status. 7301 */ 7302 ret = lpfc_sli4_cgn_params_read(phba); 7303 if (ret < 0) { 7304 lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT | LOG_INIT, 7305 "4667 Error reading Cgn Params (%d)\n", 7306 ret); 7307 } else if (!ret) { 7308 lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT | LOG_INIT, 7309 "4673 CGN Event empty object.\n"); 7310 } 7311 return ret; 7312 } 7313 7314 /** 7315 * lpfc_sli4_async_event_proc - Process all the pending asynchronous event 7316 * @phba: pointer to lpfc hba data structure. 7317 * 7318 * This routine is invoked by the worker thread to process all the pending 7319 * SLI4 asynchronous events. 7320 **/ 7321 void lpfc_sli4_async_event_proc(struct lpfc_hba *phba) 7322 { 7323 struct lpfc_cq_event *cq_event; 7324 unsigned long iflags; 7325 7326 /* First, declare the async event has been handled */ 7327 spin_lock_irqsave(&phba->hbalock, iflags); 7328 phba->hba_flag &= ~ASYNC_EVENT; 7329 spin_unlock_irqrestore(&phba->hbalock, iflags); 7330 7331 /* Now, handle all the async events */ 7332 spin_lock_irqsave(&phba->sli4_hba.asynce_list_lock, iflags); 7333 while (!list_empty(&phba->sli4_hba.sp_asynce_work_queue)) { 7334 list_remove_head(&phba->sli4_hba.sp_asynce_work_queue, 7335 cq_event, struct lpfc_cq_event, list); 7336 spin_unlock_irqrestore(&phba->sli4_hba.asynce_list_lock, 7337 iflags); 7338 7339 /* Process the asynchronous event */ 7340 switch (bf_get(lpfc_trailer_code, &cq_event->cqe.mcqe_cmpl)) { 7341 case LPFC_TRAILER_CODE_LINK: 7342 lpfc_sli4_async_link_evt(phba, 7343 &cq_event->cqe.acqe_link); 7344 break; 7345 case LPFC_TRAILER_CODE_FCOE: 7346 lpfc_sli4_async_fip_evt(phba, &cq_event->cqe.acqe_fip); 7347 break; 7348 case LPFC_TRAILER_CODE_DCBX: 7349 lpfc_sli4_async_dcbx_evt(phba, 7350 &cq_event->cqe.acqe_dcbx); 7351 break; 7352 case LPFC_TRAILER_CODE_GRP5: 7353 lpfc_sli4_async_grp5_evt(phba, 7354 &cq_event->cqe.acqe_grp5); 7355 break; 7356 case LPFC_TRAILER_CODE_FC: 7357 lpfc_sli4_async_fc_evt(phba, &cq_event->cqe.acqe_fc); 7358 break; 7359 case LPFC_TRAILER_CODE_SLI: 7360 lpfc_sli4_async_sli_evt(phba, &cq_event->cqe.acqe_sli); 7361 break; 7362 case LPFC_TRAILER_CODE_CMSTAT: 7363 lpfc_sli4_async_cmstat_evt(phba); 7364 break; 7365 default: 7366 lpfc_printf_log(phba, KERN_ERR, 7367 LOG_TRACE_EVENT, 7368 "1804 Invalid asynchronous event code: " 7369 "x%x\n", bf_get(lpfc_trailer_code, 7370 &cq_event->cqe.mcqe_cmpl)); 7371 break; 7372 } 7373 7374 /* Free the completion event processed to the free pool */ 7375 lpfc_sli4_cq_event_release(phba, cq_event); 7376 spin_lock_irqsave(&phba->sli4_hba.asynce_list_lock, iflags); 7377 } 7378 spin_unlock_irqrestore(&phba->sli4_hba.asynce_list_lock, iflags); 7379 } 7380 7381 /** 7382 * lpfc_sli4_fcf_redisc_event_proc - Process fcf table rediscovery event 7383 * @phba: pointer to lpfc hba data structure. 7384 * 7385 * This routine is invoked by the worker thread to process FCF table 7386 * rediscovery pending completion event. 7387 **/ 7388 void lpfc_sli4_fcf_redisc_event_proc(struct lpfc_hba *phba) 7389 { 7390 int rc; 7391 7392 spin_lock_irq(&phba->hbalock); 7393 /* Clear FCF rediscovery timeout event */ 7394 phba->fcf.fcf_flag &= ~FCF_REDISC_EVT; 7395 /* Clear driver fast failover FCF record flag */ 7396 phba->fcf.failover_rec.flag = 0; 7397 /* Set state for FCF fast failover */ 7398 phba->fcf.fcf_flag |= FCF_REDISC_FOV; 7399 spin_unlock_irq(&phba->hbalock); 7400 7401 /* Scan FCF table from the first entry to re-discover SAN */ 7402 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY, 7403 "2777 Start post-quiescent FCF table scan\n"); 7404 rc = lpfc_sli4_fcf_scan_read_fcf_rec(phba, LPFC_FCOE_FCF_GET_FIRST); 7405 if (rc) 7406 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 7407 "2747 Issue FCF scan read FCF mailbox " 7408 "command failed 0x%x\n", rc); 7409 } 7410 7411 /** 7412 * lpfc_api_table_setup - Set up per hba pci-device group func api jump table 7413 * @phba: pointer to lpfc hba data structure. 7414 * @dev_grp: The HBA PCI-Device group number. 7415 * 7416 * This routine is invoked to set up the per HBA PCI-Device group function 7417 * API jump table entries. 7418 * 7419 * Return: 0 if success, otherwise -ENODEV 7420 **/ 7421 int 7422 lpfc_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp) 7423 { 7424 int rc; 7425 7426 /* Set up lpfc PCI-device group */ 7427 phba->pci_dev_grp = dev_grp; 7428 7429 /* The LPFC_PCI_DEV_OC uses SLI4 */ 7430 if (dev_grp == LPFC_PCI_DEV_OC) 7431 phba->sli_rev = LPFC_SLI_REV4; 7432 7433 /* Set up device INIT API function jump table */ 7434 rc = lpfc_init_api_table_setup(phba, dev_grp); 7435 if (rc) 7436 return -ENODEV; 7437 /* Set up SCSI API function jump table */ 7438 rc = lpfc_scsi_api_table_setup(phba, dev_grp); 7439 if (rc) 7440 return -ENODEV; 7441 /* Set up SLI API function jump table */ 7442 rc = lpfc_sli_api_table_setup(phba, dev_grp); 7443 if (rc) 7444 return -ENODEV; 7445 /* Set up MBOX API function jump table */ 7446 rc = lpfc_mbox_api_table_setup(phba, dev_grp); 7447 if (rc) 7448 return -ENODEV; 7449 7450 return 0; 7451 } 7452 7453 /** 7454 * lpfc_log_intr_mode - Log the active interrupt mode 7455 * @phba: pointer to lpfc hba data structure. 7456 * @intr_mode: active interrupt mode adopted. 7457 * 7458 * This routine it invoked to log the currently used active interrupt mode 7459 * to the device. 7460 **/ 7461 static void lpfc_log_intr_mode(struct lpfc_hba *phba, uint32_t intr_mode) 7462 { 7463 switch (intr_mode) { 7464 case 0: 7465 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 7466 "0470 Enable INTx interrupt mode.\n"); 7467 break; 7468 case 1: 7469 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 7470 "0481 Enabled MSI interrupt mode.\n"); 7471 break; 7472 case 2: 7473 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 7474 "0480 Enabled MSI-X interrupt mode.\n"); 7475 break; 7476 default: 7477 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 7478 "0482 Illegal interrupt mode.\n"); 7479 break; 7480 } 7481 return; 7482 } 7483 7484 /** 7485 * lpfc_enable_pci_dev - Enable a generic PCI device. 7486 * @phba: pointer to lpfc hba data structure. 7487 * 7488 * This routine is invoked to enable the PCI device that is common to all 7489 * PCI devices. 7490 * 7491 * Return codes 7492 * 0 - successful 7493 * other values - error 7494 **/ 7495 static int 7496 lpfc_enable_pci_dev(struct lpfc_hba *phba) 7497 { 7498 struct pci_dev *pdev; 7499 7500 /* Obtain PCI device reference */ 7501 if (!phba->pcidev) 7502 goto out_error; 7503 else 7504 pdev = phba->pcidev; 7505 /* Enable PCI device */ 7506 if (pci_enable_device_mem(pdev)) 7507 goto out_error; 7508 /* Request PCI resource for the device */ 7509 if (pci_request_mem_regions(pdev, LPFC_DRIVER_NAME)) 7510 goto out_disable_device; 7511 /* Set up device as PCI master and save state for EEH */ 7512 pci_set_master(pdev); 7513 pci_try_set_mwi(pdev); 7514 pci_save_state(pdev); 7515 7516 /* PCIe EEH recovery on powerpc platforms needs fundamental reset */ 7517 if (pci_is_pcie(pdev)) 7518 pdev->needs_freset = 1; 7519 7520 return 0; 7521 7522 out_disable_device: 7523 pci_disable_device(pdev); 7524 out_error: 7525 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 7526 "1401 Failed to enable pci device\n"); 7527 return -ENODEV; 7528 } 7529 7530 /** 7531 * lpfc_disable_pci_dev - Disable a generic PCI device. 7532 * @phba: pointer to lpfc hba data structure. 7533 * 7534 * This routine is invoked to disable the PCI device that is common to all 7535 * PCI devices. 7536 **/ 7537 static void 7538 lpfc_disable_pci_dev(struct lpfc_hba *phba) 7539 { 7540 struct pci_dev *pdev; 7541 7542 /* Obtain PCI device reference */ 7543 if (!phba->pcidev) 7544 return; 7545 else 7546 pdev = phba->pcidev; 7547 /* Release PCI resource and disable PCI device */ 7548 pci_release_mem_regions(pdev); 7549 pci_disable_device(pdev); 7550 7551 return; 7552 } 7553 7554 /** 7555 * lpfc_reset_hba - Reset a hba 7556 * @phba: pointer to lpfc hba data structure. 7557 * 7558 * This routine is invoked to reset a hba device. It brings the HBA 7559 * offline, performs a board restart, and then brings the board back 7560 * online. The lpfc_offline calls lpfc_sli_hba_down which will clean up 7561 * on outstanding mailbox commands. 7562 **/ 7563 void 7564 lpfc_reset_hba(struct lpfc_hba *phba) 7565 { 7566 /* If resets are disabled then set error state and return. */ 7567 if (!phba->cfg_enable_hba_reset) { 7568 phba->link_state = LPFC_HBA_ERROR; 7569 return; 7570 } 7571 7572 /* If not LPFC_SLI_ACTIVE, force all IO to be flushed */ 7573 if (phba->sli.sli_flag & LPFC_SLI_ACTIVE) { 7574 lpfc_offline_prep(phba, LPFC_MBX_WAIT); 7575 } else { 7576 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT); 7577 lpfc_sli_flush_io_rings(phba); 7578 } 7579 lpfc_offline(phba); 7580 lpfc_sli_brdrestart(phba); 7581 lpfc_online(phba); 7582 lpfc_unblock_mgmt_io(phba); 7583 } 7584 7585 /** 7586 * lpfc_sli_sriov_nr_virtfn_get - Get the number of sr-iov virtual functions 7587 * @phba: pointer to lpfc hba data structure. 7588 * 7589 * This function enables the PCI SR-IOV virtual functions to a physical 7590 * function. It invokes the PCI SR-IOV api with the @nr_vfn provided to 7591 * enable the number of virtual functions to the physical function. As 7592 * not all devices support SR-IOV, the return code from the pci_enable_sriov() 7593 * API call does not considered as an error condition for most of the device. 7594 **/ 7595 uint16_t 7596 lpfc_sli_sriov_nr_virtfn_get(struct lpfc_hba *phba) 7597 { 7598 struct pci_dev *pdev = phba->pcidev; 7599 uint16_t nr_virtfn; 7600 int pos; 7601 7602 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV); 7603 if (pos == 0) 7604 return 0; 7605 7606 pci_read_config_word(pdev, pos + PCI_SRIOV_TOTAL_VF, &nr_virtfn); 7607 return nr_virtfn; 7608 } 7609 7610 /** 7611 * lpfc_sli_probe_sriov_nr_virtfn - Enable a number of sr-iov virtual functions 7612 * @phba: pointer to lpfc hba data structure. 7613 * @nr_vfn: number of virtual functions to be enabled. 7614 * 7615 * This function enables the PCI SR-IOV virtual functions to a physical 7616 * function. It invokes the PCI SR-IOV api with the @nr_vfn provided to 7617 * enable the number of virtual functions to the physical function. As 7618 * not all devices support SR-IOV, the return code from the pci_enable_sriov() 7619 * API call does not considered as an error condition for most of the device. 7620 **/ 7621 int 7622 lpfc_sli_probe_sriov_nr_virtfn(struct lpfc_hba *phba, int nr_vfn) 7623 { 7624 struct pci_dev *pdev = phba->pcidev; 7625 uint16_t max_nr_vfn; 7626 int rc; 7627 7628 max_nr_vfn = lpfc_sli_sriov_nr_virtfn_get(phba); 7629 if (nr_vfn > max_nr_vfn) { 7630 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 7631 "3057 Requested vfs (%d) greater than " 7632 "supported vfs (%d)", nr_vfn, max_nr_vfn); 7633 return -EINVAL; 7634 } 7635 7636 rc = pci_enable_sriov(pdev, nr_vfn); 7637 if (rc) { 7638 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 7639 "2806 Failed to enable sriov on this device " 7640 "with vfn number nr_vf:%d, rc:%d\n", 7641 nr_vfn, rc); 7642 } else 7643 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 7644 "2807 Successful enable sriov on this device " 7645 "with vfn number nr_vf:%d\n", nr_vfn); 7646 return rc; 7647 } 7648 7649 static void 7650 lpfc_unblock_requests_work(struct work_struct *work) 7651 { 7652 struct lpfc_hba *phba = container_of(work, struct lpfc_hba, 7653 unblock_request_work); 7654 7655 lpfc_unblock_requests(phba); 7656 } 7657 7658 /** 7659 * lpfc_setup_driver_resource_phase1 - Phase1 etup driver internal resources. 7660 * @phba: pointer to lpfc hba data structure. 7661 * 7662 * This routine is invoked to set up the driver internal resources before the 7663 * device specific resource setup to support the HBA device it attached to. 7664 * 7665 * Return codes 7666 * 0 - successful 7667 * other values - error 7668 **/ 7669 static int 7670 lpfc_setup_driver_resource_phase1(struct lpfc_hba *phba) 7671 { 7672 struct lpfc_sli *psli = &phba->sli; 7673 7674 /* 7675 * Driver resources common to all SLI revisions 7676 */ 7677 atomic_set(&phba->fast_event_count, 0); 7678 atomic_set(&phba->dbg_log_idx, 0); 7679 atomic_set(&phba->dbg_log_cnt, 0); 7680 atomic_set(&phba->dbg_log_dmping, 0); 7681 spin_lock_init(&phba->hbalock); 7682 7683 /* Initialize port_list spinlock */ 7684 spin_lock_init(&phba->port_list_lock); 7685 INIT_LIST_HEAD(&phba->port_list); 7686 7687 INIT_LIST_HEAD(&phba->work_list); 7688 7689 /* Initialize the wait queue head for the kernel thread */ 7690 init_waitqueue_head(&phba->work_waitq); 7691 7692 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 7693 "1403 Protocols supported %s %s %s\n", 7694 ((phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) ? 7695 "SCSI" : " "), 7696 ((phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) ? 7697 "NVME" : " "), 7698 (phba->nvmet_support ? "NVMET" : " ")); 7699 7700 /* Initialize the IO buffer list used by driver for SLI3 SCSI */ 7701 spin_lock_init(&phba->scsi_buf_list_get_lock); 7702 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_get); 7703 spin_lock_init(&phba->scsi_buf_list_put_lock); 7704 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_put); 7705 7706 /* Initialize the fabric iocb list */ 7707 INIT_LIST_HEAD(&phba->fabric_iocb_list); 7708 7709 /* Initialize list to save ELS buffers */ 7710 INIT_LIST_HEAD(&phba->elsbuf); 7711 7712 /* Initialize FCF connection rec list */ 7713 INIT_LIST_HEAD(&phba->fcf_conn_rec_list); 7714 7715 /* Initialize OAS configuration list */ 7716 spin_lock_init(&phba->devicelock); 7717 INIT_LIST_HEAD(&phba->luns); 7718 7719 /* MBOX heartbeat timer */ 7720 timer_setup(&psli->mbox_tmo, lpfc_mbox_timeout, 0); 7721 /* Fabric block timer */ 7722 timer_setup(&phba->fabric_block_timer, lpfc_fabric_block_timeout, 0); 7723 /* EA polling mode timer */ 7724 timer_setup(&phba->eratt_poll, lpfc_poll_eratt, 0); 7725 /* Heartbeat timer */ 7726 timer_setup(&phba->hb_tmofunc, lpfc_hb_timeout, 0); 7727 7728 INIT_DELAYED_WORK(&phba->eq_delay_work, lpfc_hb_eq_delay_work); 7729 7730 INIT_DELAYED_WORK(&phba->idle_stat_delay_work, 7731 lpfc_idle_stat_delay_work); 7732 INIT_WORK(&phba->unblock_request_work, lpfc_unblock_requests_work); 7733 return 0; 7734 } 7735 7736 /** 7737 * lpfc_sli_driver_resource_setup - Setup driver internal resources for SLI3 dev 7738 * @phba: pointer to lpfc hba data structure. 7739 * 7740 * This routine is invoked to set up the driver internal resources specific to 7741 * support the SLI-3 HBA device it attached to. 7742 * 7743 * Return codes 7744 * 0 - successful 7745 * other values - error 7746 **/ 7747 static int 7748 lpfc_sli_driver_resource_setup(struct lpfc_hba *phba) 7749 { 7750 int rc, entry_sz; 7751 7752 /* 7753 * Initialize timers used by driver 7754 */ 7755 7756 /* FCP polling mode timer */ 7757 timer_setup(&phba->fcp_poll_timer, lpfc_poll_timeout, 0); 7758 7759 /* Host attention work mask setup */ 7760 phba->work_ha_mask = (HA_ERATT | HA_MBATT | HA_LATT); 7761 phba->work_ha_mask |= (HA_RXMASK << (LPFC_ELS_RING * 4)); 7762 7763 /* Get all the module params for configuring this host */ 7764 lpfc_get_cfgparam(phba); 7765 /* Set up phase-1 common device driver resources */ 7766 7767 rc = lpfc_setup_driver_resource_phase1(phba); 7768 if (rc) 7769 return -ENODEV; 7770 7771 if (!phba->sli.sli3_ring) 7772 phba->sli.sli3_ring = kcalloc(LPFC_SLI3_MAX_RING, 7773 sizeof(struct lpfc_sli_ring), 7774 GFP_KERNEL); 7775 if (!phba->sli.sli3_ring) 7776 return -ENOMEM; 7777 7778 /* 7779 * Since lpfc_sg_seg_cnt is module parameter, the sg_dma_buf_size 7780 * used to create the sg_dma_buf_pool must be dynamically calculated. 7781 */ 7782 7783 if (phba->sli_rev == LPFC_SLI_REV4) 7784 entry_sz = sizeof(struct sli4_sge); 7785 else 7786 entry_sz = sizeof(struct ulp_bde64); 7787 7788 /* There are going to be 2 reserved BDEs: 1 FCP cmnd + 1 FCP rsp */ 7789 if (phba->cfg_enable_bg) { 7790 /* 7791 * The scsi_buf for a T10-DIF I/O will hold the FCP cmnd, 7792 * the FCP rsp, and a BDE for each. Sice we have no control 7793 * over how many protection data segments the SCSI Layer 7794 * will hand us (ie: there could be one for every block 7795 * in the IO), we just allocate enough BDEs to accomidate 7796 * our max amount and we need to limit lpfc_sg_seg_cnt to 7797 * minimize the risk of running out. 7798 */ 7799 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) + 7800 sizeof(struct fcp_rsp) + 7801 (LPFC_MAX_SG_SEG_CNT * entry_sz); 7802 7803 if (phba->cfg_sg_seg_cnt > LPFC_MAX_SG_SEG_CNT_DIF) 7804 phba->cfg_sg_seg_cnt = LPFC_MAX_SG_SEG_CNT_DIF; 7805 7806 /* Total BDEs in BPL for scsi_sg_list and scsi_sg_prot_list */ 7807 phba->cfg_total_seg_cnt = LPFC_MAX_SG_SEG_CNT; 7808 } else { 7809 /* 7810 * The scsi_buf for a regular I/O will hold the FCP cmnd, 7811 * the FCP rsp, a BDE for each, and a BDE for up to 7812 * cfg_sg_seg_cnt data segments. 7813 */ 7814 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) + 7815 sizeof(struct fcp_rsp) + 7816 ((phba->cfg_sg_seg_cnt + 2) * entry_sz); 7817 7818 /* Total BDEs in BPL for scsi_sg_list */ 7819 phba->cfg_total_seg_cnt = phba->cfg_sg_seg_cnt + 2; 7820 } 7821 7822 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP, 7823 "9088 INIT sg_tablesize:%d dmabuf_size:%d total_bde:%d\n", 7824 phba->cfg_sg_seg_cnt, phba->cfg_sg_dma_buf_size, 7825 phba->cfg_total_seg_cnt); 7826 7827 phba->max_vpi = LPFC_MAX_VPI; 7828 /* This will be set to correct value after config_port mbox */ 7829 phba->max_vports = 0; 7830 7831 /* 7832 * Initialize the SLI Layer to run with lpfc HBAs. 7833 */ 7834 lpfc_sli_setup(phba); 7835 lpfc_sli_queue_init(phba); 7836 7837 /* Allocate device driver memory */ 7838 if (lpfc_mem_alloc(phba, BPL_ALIGN_SZ)) 7839 return -ENOMEM; 7840 7841 phba->lpfc_sg_dma_buf_pool = 7842 dma_pool_create("lpfc_sg_dma_buf_pool", 7843 &phba->pcidev->dev, phba->cfg_sg_dma_buf_size, 7844 BPL_ALIGN_SZ, 0); 7845 7846 if (!phba->lpfc_sg_dma_buf_pool) 7847 goto fail_free_mem; 7848 7849 phba->lpfc_cmd_rsp_buf_pool = 7850 dma_pool_create("lpfc_cmd_rsp_buf_pool", 7851 &phba->pcidev->dev, 7852 sizeof(struct fcp_cmnd) + 7853 sizeof(struct fcp_rsp), 7854 BPL_ALIGN_SZ, 0); 7855 7856 if (!phba->lpfc_cmd_rsp_buf_pool) 7857 goto fail_free_dma_buf_pool; 7858 7859 /* 7860 * Enable sr-iov virtual functions if supported and configured 7861 * through the module parameter. 7862 */ 7863 if (phba->cfg_sriov_nr_virtfn > 0) { 7864 rc = lpfc_sli_probe_sriov_nr_virtfn(phba, 7865 phba->cfg_sriov_nr_virtfn); 7866 if (rc) { 7867 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 7868 "2808 Requested number of SR-IOV " 7869 "virtual functions (%d) is not " 7870 "supported\n", 7871 phba->cfg_sriov_nr_virtfn); 7872 phba->cfg_sriov_nr_virtfn = 0; 7873 } 7874 } 7875 7876 return 0; 7877 7878 fail_free_dma_buf_pool: 7879 dma_pool_destroy(phba->lpfc_sg_dma_buf_pool); 7880 phba->lpfc_sg_dma_buf_pool = NULL; 7881 fail_free_mem: 7882 lpfc_mem_free(phba); 7883 return -ENOMEM; 7884 } 7885 7886 /** 7887 * lpfc_sli_driver_resource_unset - Unset drvr internal resources for SLI3 dev 7888 * @phba: pointer to lpfc hba data structure. 7889 * 7890 * This routine is invoked to unset the driver internal resources set up 7891 * specific for supporting the SLI-3 HBA device it attached to. 7892 **/ 7893 static void 7894 lpfc_sli_driver_resource_unset(struct lpfc_hba *phba) 7895 { 7896 /* Free device driver memory allocated */ 7897 lpfc_mem_free_all(phba); 7898 7899 return; 7900 } 7901 7902 /** 7903 * lpfc_sli4_driver_resource_setup - Setup drvr internal resources for SLI4 dev 7904 * @phba: pointer to lpfc hba data structure. 7905 * 7906 * This routine is invoked to set up the driver internal resources specific to 7907 * support the SLI-4 HBA device it attached to. 7908 * 7909 * Return codes 7910 * 0 - successful 7911 * other values - error 7912 **/ 7913 static int 7914 lpfc_sli4_driver_resource_setup(struct lpfc_hba *phba) 7915 { 7916 LPFC_MBOXQ_t *mboxq; 7917 MAILBOX_t *mb; 7918 int rc, i, max_buf_size; 7919 int longs; 7920 int extra; 7921 uint64_t wwn; 7922 u32 if_type; 7923 u32 if_fam; 7924 7925 phba->sli4_hba.num_present_cpu = lpfc_present_cpu; 7926 phba->sli4_hba.num_possible_cpu = cpumask_last(cpu_possible_mask) + 1; 7927 phba->sli4_hba.curr_disp_cpu = 0; 7928 7929 /* Get all the module params for configuring this host */ 7930 lpfc_get_cfgparam(phba); 7931 7932 /* Set up phase-1 common device driver resources */ 7933 rc = lpfc_setup_driver_resource_phase1(phba); 7934 if (rc) 7935 return -ENODEV; 7936 7937 /* Before proceed, wait for POST done and device ready */ 7938 rc = lpfc_sli4_post_status_check(phba); 7939 if (rc) 7940 return -ENODEV; 7941 7942 /* Allocate all driver workqueues here */ 7943 7944 /* The lpfc_wq workqueue for deferred irq use */ 7945 phba->wq = alloc_workqueue("lpfc_wq", WQ_MEM_RECLAIM, 0); 7946 if (!phba->wq) 7947 return -ENOMEM; 7948 7949 /* 7950 * Initialize timers used by driver 7951 */ 7952 7953 timer_setup(&phba->rrq_tmr, lpfc_rrq_timeout, 0); 7954 7955 /* FCF rediscover timer */ 7956 timer_setup(&phba->fcf.redisc_wait, lpfc_sli4_fcf_redisc_wait_tmo, 0); 7957 7958 /* CMF congestion timer */ 7959 hrtimer_init(&phba->cmf_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); 7960 phba->cmf_timer.function = lpfc_cmf_timer; 7961 7962 /* 7963 * Control structure for handling external multi-buffer mailbox 7964 * command pass-through. 7965 */ 7966 memset((uint8_t *)&phba->mbox_ext_buf_ctx, 0, 7967 sizeof(struct lpfc_mbox_ext_buf_ctx)); 7968 INIT_LIST_HEAD(&phba->mbox_ext_buf_ctx.ext_dmabuf_list); 7969 7970 phba->max_vpi = LPFC_MAX_VPI; 7971 7972 /* This will be set to correct value after the read_config mbox */ 7973 phba->max_vports = 0; 7974 7975 /* Program the default value of vlan_id and fc_map */ 7976 phba->valid_vlan = 0; 7977 phba->fc_map[0] = LPFC_FCOE_FCF_MAP0; 7978 phba->fc_map[1] = LPFC_FCOE_FCF_MAP1; 7979 phba->fc_map[2] = LPFC_FCOE_FCF_MAP2; 7980 7981 /* 7982 * For SLI4, instead of using ring 0 (LPFC_FCP_RING) for FCP commands 7983 * we will associate a new ring, for each EQ/CQ/WQ tuple. 7984 * The WQ create will allocate the ring. 7985 */ 7986 7987 /* Initialize buffer queue management fields */ 7988 INIT_LIST_HEAD(&phba->hbqs[LPFC_ELS_HBQ].hbq_buffer_list); 7989 phba->hbqs[LPFC_ELS_HBQ].hbq_alloc_buffer = lpfc_sli4_rb_alloc; 7990 phba->hbqs[LPFC_ELS_HBQ].hbq_free_buffer = lpfc_sli4_rb_free; 7991 7992 /* for VMID idle timeout if VMID is enabled */ 7993 if (lpfc_is_vmid_enabled(phba)) 7994 timer_setup(&phba->inactive_vmid_poll, lpfc_vmid_poll, 0); 7995 7996 /* 7997 * Initialize the SLI Layer to run with lpfc SLI4 HBAs. 7998 */ 7999 /* Initialize the Abort buffer list used by driver */ 8000 spin_lock_init(&phba->sli4_hba.abts_io_buf_list_lock); 8001 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_io_buf_list); 8002 8003 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 8004 /* Initialize the Abort nvme buffer list used by driver */ 8005 spin_lock_init(&phba->sli4_hba.abts_nvmet_buf_list_lock); 8006 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list); 8007 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_nvmet_io_wait_list); 8008 spin_lock_init(&phba->sli4_hba.t_active_list_lock); 8009 INIT_LIST_HEAD(&phba->sli4_hba.t_active_ctx_list); 8010 } 8011 8012 /* This abort list used by worker thread */ 8013 spin_lock_init(&phba->sli4_hba.sgl_list_lock); 8014 spin_lock_init(&phba->sli4_hba.nvmet_io_wait_lock); 8015 spin_lock_init(&phba->sli4_hba.asynce_list_lock); 8016 spin_lock_init(&phba->sli4_hba.els_xri_abrt_list_lock); 8017 8018 /* 8019 * Initialize driver internal slow-path work queues 8020 */ 8021 8022 /* Driver internel slow-path CQ Event pool */ 8023 INIT_LIST_HEAD(&phba->sli4_hba.sp_cqe_event_pool); 8024 /* Response IOCB work queue list */ 8025 INIT_LIST_HEAD(&phba->sli4_hba.sp_queue_event); 8026 /* Asynchronous event CQ Event work queue list */ 8027 INIT_LIST_HEAD(&phba->sli4_hba.sp_asynce_work_queue); 8028 /* Slow-path XRI aborted CQ Event work queue list */ 8029 INIT_LIST_HEAD(&phba->sli4_hba.sp_els_xri_aborted_work_queue); 8030 /* Receive queue CQ Event work queue list */ 8031 INIT_LIST_HEAD(&phba->sli4_hba.sp_unsol_work_queue); 8032 8033 /* Initialize extent block lists. */ 8034 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_rpi_blk_list); 8035 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_xri_blk_list); 8036 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_vfi_blk_list); 8037 INIT_LIST_HEAD(&phba->lpfc_vpi_blk_list); 8038 8039 /* Initialize mboxq lists. If the early init routines fail 8040 * these lists need to be correctly initialized. 8041 */ 8042 INIT_LIST_HEAD(&phba->sli.mboxq); 8043 INIT_LIST_HEAD(&phba->sli.mboxq_cmpl); 8044 8045 /* initialize optic_state to 0xFF */ 8046 phba->sli4_hba.lnk_info.optic_state = 0xff; 8047 8048 /* Allocate device driver memory */ 8049 rc = lpfc_mem_alloc(phba, SGL_ALIGN_SZ); 8050 if (rc) 8051 goto out_destroy_workqueue; 8052 8053 /* IF Type 2 ports get initialized now. */ 8054 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) >= 8055 LPFC_SLI_INTF_IF_TYPE_2) { 8056 rc = lpfc_pci_function_reset(phba); 8057 if (unlikely(rc)) { 8058 rc = -ENODEV; 8059 goto out_free_mem; 8060 } 8061 phba->temp_sensor_support = 1; 8062 } 8063 8064 /* Create the bootstrap mailbox command */ 8065 rc = lpfc_create_bootstrap_mbox(phba); 8066 if (unlikely(rc)) 8067 goto out_free_mem; 8068 8069 /* Set up the host's endian order with the device. */ 8070 rc = lpfc_setup_endian_order(phba); 8071 if (unlikely(rc)) 8072 goto out_free_bsmbx; 8073 8074 /* Set up the hba's configuration parameters. */ 8075 rc = lpfc_sli4_read_config(phba); 8076 if (unlikely(rc)) 8077 goto out_free_bsmbx; 8078 8079 if (phba->sli4_hba.fawwpn_flag & LPFC_FAWWPN_CONFIG) { 8080 /* Right now the link is down, if FA-PWWN is configured the 8081 * firmware will try FLOGI before the driver gets a link up. 8082 * If it fails, the driver should get a MISCONFIGURED async 8083 * event which will clear this flag. The only notification 8084 * the driver gets is if it fails, if it succeeds there is no 8085 * notification given. Assume success. 8086 */ 8087 phba->sli4_hba.fawwpn_flag |= LPFC_FAWWPN_FABRIC; 8088 } 8089 8090 rc = lpfc_mem_alloc_active_rrq_pool_s4(phba); 8091 if (unlikely(rc)) 8092 goto out_free_bsmbx; 8093 8094 /* IF Type 0 ports get initialized now. */ 8095 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) == 8096 LPFC_SLI_INTF_IF_TYPE_0) { 8097 rc = lpfc_pci_function_reset(phba); 8098 if (unlikely(rc)) 8099 goto out_free_bsmbx; 8100 } 8101 8102 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, 8103 GFP_KERNEL); 8104 if (!mboxq) { 8105 rc = -ENOMEM; 8106 goto out_free_bsmbx; 8107 } 8108 8109 /* Check for NVMET being configured */ 8110 phba->nvmet_support = 0; 8111 if (lpfc_enable_nvmet_cnt) { 8112 8113 /* First get WWN of HBA instance */ 8114 lpfc_read_nv(phba, mboxq); 8115 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); 8116 if (rc != MBX_SUCCESS) { 8117 lpfc_printf_log(phba, KERN_ERR, 8118 LOG_TRACE_EVENT, 8119 "6016 Mailbox failed , mbxCmd x%x " 8120 "READ_NV, mbxStatus x%x\n", 8121 bf_get(lpfc_mqe_command, &mboxq->u.mqe), 8122 bf_get(lpfc_mqe_status, &mboxq->u.mqe)); 8123 mempool_free(mboxq, phba->mbox_mem_pool); 8124 rc = -EIO; 8125 goto out_free_bsmbx; 8126 } 8127 mb = &mboxq->u.mb; 8128 memcpy(&wwn, (char *)mb->un.varRDnvp.nodename, 8129 sizeof(uint64_t)); 8130 wwn = cpu_to_be64(wwn); 8131 phba->sli4_hba.wwnn.u.name = wwn; 8132 memcpy(&wwn, (char *)mb->un.varRDnvp.portname, 8133 sizeof(uint64_t)); 8134 /* wwn is WWPN of HBA instance */ 8135 wwn = cpu_to_be64(wwn); 8136 phba->sli4_hba.wwpn.u.name = wwn; 8137 8138 /* Check to see if it matches any module parameter */ 8139 for (i = 0; i < lpfc_enable_nvmet_cnt; i++) { 8140 if (wwn == lpfc_enable_nvmet[i]) { 8141 #if (IS_ENABLED(CONFIG_NVME_TARGET_FC)) 8142 if (lpfc_nvmet_mem_alloc(phba)) 8143 break; 8144 8145 phba->nvmet_support = 1; /* a match */ 8146 8147 lpfc_printf_log(phba, KERN_ERR, 8148 LOG_TRACE_EVENT, 8149 "6017 NVME Target %016llx\n", 8150 wwn); 8151 #else 8152 lpfc_printf_log(phba, KERN_ERR, 8153 LOG_TRACE_EVENT, 8154 "6021 Can't enable NVME Target." 8155 " NVME_TARGET_FC infrastructure" 8156 " is not in kernel\n"); 8157 #endif 8158 /* Not supported for NVMET */ 8159 phba->cfg_xri_rebalancing = 0; 8160 if (phba->irq_chann_mode == NHT_MODE) { 8161 phba->cfg_irq_chann = 8162 phba->sli4_hba.num_present_cpu; 8163 phba->cfg_hdw_queue = 8164 phba->sli4_hba.num_present_cpu; 8165 phba->irq_chann_mode = NORMAL_MODE; 8166 } 8167 break; 8168 } 8169 } 8170 } 8171 8172 lpfc_nvme_mod_param_dep(phba); 8173 8174 /* 8175 * Get sli4 parameters that override parameters from Port capabilities. 8176 * If this call fails, it isn't critical unless the SLI4 parameters come 8177 * back in conflict. 8178 */ 8179 rc = lpfc_get_sli4_parameters(phba, mboxq); 8180 if (rc) { 8181 if_type = bf_get(lpfc_sli_intf_if_type, 8182 &phba->sli4_hba.sli_intf); 8183 if_fam = bf_get(lpfc_sli_intf_sli_family, 8184 &phba->sli4_hba.sli_intf); 8185 if (phba->sli4_hba.extents_in_use && 8186 phba->sli4_hba.rpi_hdrs_in_use) { 8187 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 8188 "2999 Unsupported SLI4 Parameters " 8189 "Extents and RPI headers enabled.\n"); 8190 if (if_type == LPFC_SLI_INTF_IF_TYPE_0 && 8191 if_fam == LPFC_SLI_INTF_FAMILY_BE2) { 8192 mempool_free(mboxq, phba->mbox_mem_pool); 8193 rc = -EIO; 8194 goto out_free_bsmbx; 8195 } 8196 } 8197 if (!(if_type == LPFC_SLI_INTF_IF_TYPE_0 && 8198 if_fam == LPFC_SLI_INTF_FAMILY_BE2)) { 8199 mempool_free(mboxq, phba->mbox_mem_pool); 8200 rc = -EIO; 8201 goto out_free_bsmbx; 8202 } 8203 } 8204 8205 /* 8206 * 1 for cmd, 1 for rsp, NVME adds an extra one 8207 * for boundary conditions in its max_sgl_segment template. 8208 */ 8209 extra = 2; 8210 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) 8211 extra++; 8212 8213 /* 8214 * It doesn't matter what family our adapter is in, we are 8215 * limited to 2 Pages, 512 SGEs, for our SGL. 8216 * There are going to be 2 reserved SGEs: 1 FCP cmnd + 1 FCP rsp 8217 */ 8218 max_buf_size = (2 * SLI4_PAGE_SIZE); 8219 8220 /* 8221 * Since lpfc_sg_seg_cnt is module param, the sg_dma_buf_size 8222 * used to create the sg_dma_buf_pool must be calculated. 8223 */ 8224 if (phba->sli3_options & LPFC_SLI3_BG_ENABLED) { 8225 /* Both cfg_enable_bg and cfg_external_dif code paths */ 8226 8227 /* 8228 * The scsi_buf for a T10-DIF I/O holds the FCP cmnd, 8229 * the FCP rsp, and a SGE. Sice we have no control 8230 * over how many protection segments the SCSI Layer 8231 * will hand us (ie: there could be one for every block 8232 * in the IO), just allocate enough SGEs to accomidate 8233 * our max amount and we need to limit lpfc_sg_seg_cnt 8234 * to minimize the risk of running out. 8235 */ 8236 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) + 8237 sizeof(struct fcp_rsp) + max_buf_size; 8238 8239 /* Total SGEs for scsi_sg_list and scsi_sg_prot_list */ 8240 phba->cfg_total_seg_cnt = LPFC_MAX_SGL_SEG_CNT; 8241 8242 /* 8243 * If supporting DIF, reduce the seg count for scsi to 8244 * allow room for the DIF sges. 8245 */ 8246 if (phba->cfg_enable_bg && 8247 phba->cfg_sg_seg_cnt > LPFC_MAX_BG_SLI4_SEG_CNT_DIF) 8248 phba->cfg_scsi_seg_cnt = LPFC_MAX_BG_SLI4_SEG_CNT_DIF; 8249 else 8250 phba->cfg_scsi_seg_cnt = phba->cfg_sg_seg_cnt; 8251 8252 } else { 8253 /* 8254 * The scsi_buf for a regular I/O holds the FCP cmnd, 8255 * the FCP rsp, a SGE for each, and a SGE for up to 8256 * cfg_sg_seg_cnt data segments. 8257 */ 8258 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) + 8259 sizeof(struct fcp_rsp) + 8260 ((phba->cfg_sg_seg_cnt + extra) * 8261 sizeof(struct sli4_sge)); 8262 8263 /* Total SGEs for scsi_sg_list */ 8264 phba->cfg_total_seg_cnt = phba->cfg_sg_seg_cnt + extra; 8265 phba->cfg_scsi_seg_cnt = phba->cfg_sg_seg_cnt; 8266 8267 /* 8268 * NOTE: if (phba->cfg_sg_seg_cnt + extra) <= 256 we only 8269 * need to post 1 page for the SGL. 8270 */ 8271 } 8272 8273 if (phba->cfg_xpsgl && !phba->nvmet_support) 8274 phba->cfg_sg_dma_buf_size = LPFC_DEFAULT_XPSGL_SIZE; 8275 else if (phba->cfg_sg_dma_buf_size <= LPFC_MIN_SG_SLI4_BUF_SZ) 8276 phba->cfg_sg_dma_buf_size = LPFC_MIN_SG_SLI4_BUF_SZ; 8277 else 8278 phba->cfg_sg_dma_buf_size = 8279 SLI4_PAGE_ALIGN(phba->cfg_sg_dma_buf_size); 8280 8281 phba->border_sge_num = phba->cfg_sg_dma_buf_size / 8282 sizeof(struct sli4_sge); 8283 8284 /* Limit to LPFC_MAX_NVME_SEG_CNT for NVME. */ 8285 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 8286 if (phba->cfg_sg_seg_cnt > LPFC_MAX_NVME_SEG_CNT) { 8287 lpfc_printf_log(phba, KERN_INFO, LOG_NVME | LOG_INIT, 8288 "6300 Reducing NVME sg segment " 8289 "cnt to %d\n", 8290 LPFC_MAX_NVME_SEG_CNT); 8291 phba->cfg_nvme_seg_cnt = LPFC_MAX_NVME_SEG_CNT; 8292 } else 8293 phba->cfg_nvme_seg_cnt = phba->cfg_sg_seg_cnt; 8294 } 8295 8296 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP, 8297 "9087 sg_seg_cnt:%d dmabuf_size:%d " 8298 "total:%d scsi:%d nvme:%d\n", 8299 phba->cfg_sg_seg_cnt, phba->cfg_sg_dma_buf_size, 8300 phba->cfg_total_seg_cnt, phba->cfg_scsi_seg_cnt, 8301 phba->cfg_nvme_seg_cnt); 8302 8303 if (phba->cfg_sg_dma_buf_size < SLI4_PAGE_SIZE) 8304 i = phba->cfg_sg_dma_buf_size; 8305 else 8306 i = SLI4_PAGE_SIZE; 8307 8308 phba->lpfc_sg_dma_buf_pool = 8309 dma_pool_create("lpfc_sg_dma_buf_pool", 8310 &phba->pcidev->dev, 8311 phba->cfg_sg_dma_buf_size, 8312 i, 0); 8313 if (!phba->lpfc_sg_dma_buf_pool) { 8314 rc = -ENOMEM; 8315 goto out_free_bsmbx; 8316 } 8317 8318 phba->lpfc_cmd_rsp_buf_pool = 8319 dma_pool_create("lpfc_cmd_rsp_buf_pool", 8320 &phba->pcidev->dev, 8321 sizeof(struct fcp_cmnd) + 8322 sizeof(struct fcp_rsp), 8323 i, 0); 8324 if (!phba->lpfc_cmd_rsp_buf_pool) { 8325 rc = -ENOMEM; 8326 goto out_free_sg_dma_buf; 8327 } 8328 8329 mempool_free(mboxq, phba->mbox_mem_pool); 8330 8331 /* Verify OAS is supported */ 8332 lpfc_sli4_oas_verify(phba); 8333 8334 /* Verify RAS support on adapter */ 8335 lpfc_sli4_ras_init(phba); 8336 8337 /* Verify all the SLI4 queues */ 8338 rc = lpfc_sli4_queue_verify(phba); 8339 if (rc) 8340 goto out_free_cmd_rsp_buf; 8341 8342 /* Create driver internal CQE event pool */ 8343 rc = lpfc_sli4_cq_event_pool_create(phba); 8344 if (rc) 8345 goto out_free_cmd_rsp_buf; 8346 8347 /* Initialize sgl lists per host */ 8348 lpfc_init_sgl_list(phba); 8349 8350 /* Allocate and initialize active sgl array */ 8351 rc = lpfc_init_active_sgl_array(phba); 8352 if (rc) { 8353 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 8354 "1430 Failed to initialize sgl list.\n"); 8355 goto out_destroy_cq_event_pool; 8356 } 8357 rc = lpfc_sli4_init_rpi_hdrs(phba); 8358 if (rc) { 8359 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 8360 "1432 Failed to initialize rpi headers.\n"); 8361 goto out_free_active_sgl; 8362 } 8363 8364 /* Allocate eligible FCF bmask memory for FCF roundrobin failover */ 8365 longs = (LPFC_SLI4_FCF_TBL_INDX_MAX + BITS_PER_LONG - 1)/BITS_PER_LONG; 8366 phba->fcf.fcf_rr_bmask = kcalloc(longs, sizeof(unsigned long), 8367 GFP_KERNEL); 8368 if (!phba->fcf.fcf_rr_bmask) { 8369 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 8370 "2759 Failed allocate memory for FCF round " 8371 "robin failover bmask\n"); 8372 rc = -ENOMEM; 8373 goto out_remove_rpi_hdrs; 8374 } 8375 8376 phba->sli4_hba.hba_eq_hdl = kcalloc(phba->cfg_irq_chann, 8377 sizeof(struct lpfc_hba_eq_hdl), 8378 GFP_KERNEL); 8379 if (!phba->sli4_hba.hba_eq_hdl) { 8380 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 8381 "2572 Failed allocate memory for " 8382 "fast-path per-EQ handle array\n"); 8383 rc = -ENOMEM; 8384 goto out_free_fcf_rr_bmask; 8385 } 8386 8387 phba->sli4_hba.cpu_map = kcalloc(phba->sli4_hba.num_possible_cpu, 8388 sizeof(struct lpfc_vector_map_info), 8389 GFP_KERNEL); 8390 if (!phba->sli4_hba.cpu_map) { 8391 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 8392 "3327 Failed allocate memory for msi-x " 8393 "interrupt vector mapping\n"); 8394 rc = -ENOMEM; 8395 goto out_free_hba_eq_hdl; 8396 } 8397 8398 phba->sli4_hba.eq_info = alloc_percpu(struct lpfc_eq_intr_info); 8399 if (!phba->sli4_hba.eq_info) { 8400 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 8401 "3321 Failed allocation for per_cpu stats\n"); 8402 rc = -ENOMEM; 8403 goto out_free_hba_cpu_map; 8404 } 8405 8406 phba->sli4_hba.idle_stat = kcalloc(phba->sli4_hba.num_possible_cpu, 8407 sizeof(*phba->sli4_hba.idle_stat), 8408 GFP_KERNEL); 8409 if (!phba->sli4_hba.idle_stat) { 8410 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 8411 "3390 Failed allocation for idle_stat\n"); 8412 rc = -ENOMEM; 8413 goto out_free_hba_eq_info; 8414 } 8415 8416 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS 8417 phba->sli4_hba.c_stat = alloc_percpu(struct lpfc_hdwq_stat); 8418 if (!phba->sli4_hba.c_stat) { 8419 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 8420 "3332 Failed allocating per cpu hdwq stats\n"); 8421 rc = -ENOMEM; 8422 goto out_free_hba_idle_stat; 8423 } 8424 #endif 8425 8426 phba->cmf_stat = alloc_percpu(struct lpfc_cgn_stat); 8427 if (!phba->cmf_stat) { 8428 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 8429 "3331 Failed allocating per cpu cgn stats\n"); 8430 rc = -ENOMEM; 8431 goto out_free_hba_hdwq_info; 8432 } 8433 8434 /* 8435 * Enable sr-iov virtual functions if supported and configured 8436 * through the module parameter. 8437 */ 8438 if (phba->cfg_sriov_nr_virtfn > 0) { 8439 rc = lpfc_sli_probe_sriov_nr_virtfn(phba, 8440 phba->cfg_sriov_nr_virtfn); 8441 if (rc) { 8442 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 8443 "3020 Requested number of SR-IOV " 8444 "virtual functions (%d) is not " 8445 "supported\n", 8446 phba->cfg_sriov_nr_virtfn); 8447 phba->cfg_sriov_nr_virtfn = 0; 8448 } 8449 } 8450 8451 return 0; 8452 8453 out_free_hba_hdwq_info: 8454 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS 8455 free_percpu(phba->sli4_hba.c_stat); 8456 out_free_hba_idle_stat: 8457 #endif 8458 kfree(phba->sli4_hba.idle_stat); 8459 out_free_hba_eq_info: 8460 free_percpu(phba->sli4_hba.eq_info); 8461 out_free_hba_cpu_map: 8462 kfree(phba->sli4_hba.cpu_map); 8463 out_free_hba_eq_hdl: 8464 kfree(phba->sli4_hba.hba_eq_hdl); 8465 out_free_fcf_rr_bmask: 8466 kfree(phba->fcf.fcf_rr_bmask); 8467 out_remove_rpi_hdrs: 8468 lpfc_sli4_remove_rpi_hdrs(phba); 8469 out_free_active_sgl: 8470 lpfc_free_active_sgl(phba); 8471 out_destroy_cq_event_pool: 8472 lpfc_sli4_cq_event_pool_destroy(phba); 8473 out_free_cmd_rsp_buf: 8474 dma_pool_destroy(phba->lpfc_cmd_rsp_buf_pool); 8475 phba->lpfc_cmd_rsp_buf_pool = NULL; 8476 out_free_sg_dma_buf: 8477 dma_pool_destroy(phba->lpfc_sg_dma_buf_pool); 8478 phba->lpfc_sg_dma_buf_pool = NULL; 8479 out_free_bsmbx: 8480 lpfc_destroy_bootstrap_mbox(phba); 8481 out_free_mem: 8482 lpfc_mem_free(phba); 8483 out_destroy_workqueue: 8484 destroy_workqueue(phba->wq); 8485 phba->wq = NULL; 8486 return rc; 8487 } 8488 8489 /** 8490 * lpfc_sli4_driver_resource_unset - Unset drvr internal resources for SLI4 dev 8491 * @phba: pointer to lpfc hba data structure. 8492 * 8493 * This routine is invoked to unset the driver internal resources set up 8494 * specific for supporting the SLI-4 HBA device it attached to. 8495 **/ 8496 static void 8497 lpfc_sli4_driver_resource_unset(struct lpfc_hba *phba) 8498 { 8499 struct lpfc_fcf_conn_entry *conn_entry, *next_conn_entry; 8500 8501 free_percpu(phba->sli4_hba.eq_info); 8502 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS 8503 free_percpu(phba->sli4_hba.c_stat); 8504 #endif 8505 free_percpu(phba->cmf_stat); 8506 kfree(phba->sli4_hba.idle_stat); 8507 8508 /* Free memory allocated for msi-x interrupt vector to CPU mapping */ 8509 kfree(phba->sli4_hba.cpu_map); 8510 phba->sli4_hba.num_possible_cpu = 0; 8511 phba->sli4_hba.num_present_cpu = 0; 8512 phba->sli4_hba.curr_disp_cpu = 0; 8513 cpumask_clear(&phba->sli4_hba.irq_aff_mask); 8514 8515 /* Free memory allocated for fast-path work queue handles */ 8516 kfree(phba->sli4_hba.hba_eq_hdl); 8517 8518 /* Free the allocated rpi headers. */ 8519 lpfc_sli4_remove_rpi_hdrs(phba); 8520 lpfc_sli4_remove_rpis(phba); 8521 8522 /* Free eligible FCF index bmask */ 8523 kfree(phba->fcf.fcf_rr_bmask); 8524 8525 /* Free the ELS sgl list */ 8526 lpfc_free_active_sgl(phba); 8527 lpfc_free_els_sgl_list(phba); 8528 lpfc_free_nvmet_sgl_list(phba); 8529 8530 /* Free the completion queue EQ event pool */ 8531 lpfc_sli4_cq_event_release_all(phba); 8532 lpfc_sli4_cq_event_pool_destroy(phba); 8533 8534 /* Release resource identifiers. */ 8535 lpfc_sli4_dealloc_resource_identifiers(phba); 8536 8537 /* Free the bsmbx region. */ 8538 lpfc_destroy_bootstrap_mbox(phba); 8539 8540 /* Free the SLI Layer memory with SLI4 HBAs */ 8541 lpfc_mem_free_all(phba); 8542 8543 /* Free the current connect table */ 8544 list_for_each_entry_safe(conn_entry, next_conn_entry, 8545 &phba->fcf_conn_rec_list, list) { 8546 list_del_init(&conn_entry->list); 8547 kfree(conn_entry); 8548 } 8549 8550 return; 8551 } 8552 8553 /** 8554 * lpfc_init_api_table_setup - Set up init api function jump table 8555 * @phba: The hba struct for which this call is being executed. 8556 * @dev_grp: The HBA PCI-Device group number. 8557 * 8558 * This routine sets up the device INIT interface API function jump table 8559 * in @phba struct. 8560 * 8561 * Returns: 0 - success, -ENODEV - failure. 8562 **/ 8563 int 8564 lpfc_init_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp) 8565 { 8566 phba->lpfc_hba_init_link = lpfc_hba_init_link; 8567 phba->lpfc_hba_down_link = lpfc_hba_down_link; 8568 phba->lpfc_selective_reset = lpfc_selective_reset; 8569 switch (dev_grp) { 8570 case LPFC_PCI_DEV_LP: 8571 phba->lpfc_hba_down_post = lpfc_hba_down_post_s3; 8572 phba->lpfc_handle_eratt = lpfc_handle_eratt_s3; 8573 phba->lpfc_stop_port = lpfc_stop_port_s3; 8574 break; 8575 case LPFC_PCI_DEV_OC: 8576 phba->lpfc_hba_down_post = lpfc_hba_down_post_s4; 8577 phba->lpfc_handle_eratt = lpfc_handle_eratt_s4; 8578 phba->lpfc_stop_port = lpfc_stop_port_s4; 8579 break; 8580 default: 8581 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 8582 "1431 Invalid HBA PCI-device group: 0x%x\n", 8583 dev_grp); 8584 return -ENODEV; 8585 } 8586 return 0; 8587 } 8588 8589 /** 8590 * lpfc_setup_driver_resource_phase2 - Phase2 setup driver internal resources. 8591 * @phba: pointer to lpfc hba data structure. 8592 * 8593 * This routine is invoked to set up the driver internal resources after the 8594 * device specific resource setup to support the HBA device it attached to. 8595 * 8596 * Return codes 8597 * 0 - successful 8598 * other values - error 8599 **/ 8600 static int 8601 lpfc_setup_driver_resource_phase2(struct lpfc_hba *phba) 8602 { 8603 int error; 8604 8605 /* Startup the kernel thread for this host adapter. */ 8606 phba->worker_thread = kthread_run(lpfc_do_work, phba, 8607 "lpfc_worker_%d", phba->brd_no); 8608 if (IS_ERR(phba->worker_thread)) { 8609 error = PTR_ERR(phba->worker_thread); 8610 return error; 8611 } 8612 8613 return 0; 8614 } 8615 8616 /** 8617 * lpfc_unset_driver_resource_phase2 - Phase2 unset driver internal resources. 8618 * @phba: pointer to lpfc hba data structure. 8619 * 8620 * This routine is invoked to unset the driver internal resources set up after 8621 * the device specific resource setup for supporting the HBA device it 8622 * attached to. 8623 **/ 8624 static void 8625 lpfc_unset_driver_resource_phase2(struct lpfc_hba *phba) 8626 { 8627 if (phba->wq) { 8628 destroy_workqueue(phba->wq); 8629 phba->wq = NULL; 8630 } 8631 8632 /* Stop kernel worker thread */ 8633 if (phba->worker_thread) 8634 kthread_stop(phba->worker_thread); 8635 } 8636 8637 /** 8638 * lpfc_free_iocb_list - Free iocb list. 8639 * @phba: pointer to lpfc hba data structure. 8640 * 8641 * This routine is invoked to free the driver's IOCB list and memory. 8642 **/ 8643 void 8644 lpfc_free_iocb_list(struct lpfc_hba *phba) 8645 { 8646 struct lpfc_iocbq *iocbq_entry = NULL, *iocbq_next = NULL; 8647 8648 spin_lock_irq(&phba->hbalock); 8649 list_for_each_entry_safe(iocbq_entry, iocbq_next, 8650 &phba->lpfc_iocb_list, list) { 8651 list_del(&iocbq_entry->list); 8652 kfree(iocbq_entry); 8653 phba->total_iocbq_bufs--; 8654 } 8655 spin_unlock_irq(&phba->hbalock); 8656 8657 return; 8658 } 8659 8660 /** 8661 * lpfc_init_iocb_list - Allocate and initialize iocb list. 8662 * @phba: pointer to lpfc hba data structure. 8663 * @iocb_count: number of requested iocbs 8664 * 8665 * This routine is invoked to allocate and initizlize the driver's IOCB 8666 * list and set up the IOCB tag array accordingly. 8667 * 8668 * Return codes 8669 * 0 - successful 8670 * other values - error 8671 **/ 8672 int 8673 lpfc_init_iocb_list(struct lpfc_hba *phba, int iocb_count) 8674 { 8675 struct lpfc_iocbq *iocbq_entry = NULL; 8676 uint16_t iotag; 8677 int i; 8678 8679 /* Initialize and populate the iocb list per host. */ 8680 INIT_LIST_HEAD(&phba->lpfc_iocb_list); 8681 for (i = 0; i < iocb_count; i++) { 8682 iocbq_entry = kzalloc(sizeof(struct lpfc_iocbq), GFP_KERNEL); 8683 if (iocbq_entry == NULL) { 8684 printk(KERN_ERR "%s: only allocated %d iocbs of " 8685 "expected %d count. Unloading driver.\n", 8686 __func__, i, iocb_count); 8687 goto out_free_iocbq; 8688 } 8689 8690 iotag = lpfc_sli_next_iotag(phba, iocbq_entry); 8691 if (iotag == 0) { 8692 kfree(iocbq_entry); 8693 printk(KERN_ERR "%s: failed to allocate IOTAG. " 8694 "Unloading driver.\n", __func__); 8695 goto out_free_iocbq; 8696 } 8697 iocbq_entry->sli4_lxritag = NO_XRI; 8698 iocbq_entry->sli4_xritag = NO_XRI; 8699 8700 spin_lock_irq(&phba->hbalock); 8701 list_add(&iocbq_entry->list, &phba->lpfc_iocb_list); 8702 phba->total_iocbq_bufs++; 8703 spin_unlock_irq(&phba->hbalock); 8704 } 8705 8706 return 0; 8707 8708 out_free_iocbq: 8709 lpfc_free_iocb_list(phba); 8710 8711 return -ENOMEM; 8712 } 8713 8714 /** 8715 * lpfc_free_sgl_list - Free a given sgl list. 8716 * @phba: pointer to lpfc hba data structure. 8717 * @sglq_list: pointer to the head of sgl list. 8718 * 8719 * This routine is invoked to free a give sgl list and memory. 8720 **/ 8721 void 8722 lpfc_free_sgl_list(struct lpfc_hba *phba, struct list_head *sglq_list) 8723 { 8724 struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL; 8725 8726 list_for_each_entry_safe(sglq_entry, sglq_next, sglq_list, list) { 8727 list_del(&sglq_entry->list); 8728 lpfc_mbuf_free(phba, sglq_entry->virt, sglq_entry->phys); 8729 kfree(sglq_entry); 8730 } 8731 } 8732 8733 /** 8734 * lpfc_free_els_sgl_list - Free els sgl list. 8735 * @phba: pointer to lpfc hba data structure. 8736 * 8737 * This routine is invoked to free the driver's els sgl list and memory. 8738 **/ 8739 static void 8740 lpfc_free_els_sgl_list(struct lpfc_hba *phba) 8741 { 8742 LIST_HEAD(sglq_list); 8743 8744 /* Retrieve all els sgls from driver list */ 8745 spin_lock_irq(&phba->sli4_hba.sgl_list_lock); 8746 list_splice_init(&phba->sli4_hba.lpfc_els_sgl_list, &sglq_list); 8747 spin_unlock_irq(&phba->sli4_hba.sgl_list_lock); 8748 8749 /* Now free the sgl list */ 8750 lpfc_free_sgl_list(phba, &sglq_list); 8751 } 8752 8753 /** 8754 * lpfc_free_nvmet_sgl_list - Free nvmet sgl list. 8755 * @phba: pointer to lpfc hba data structure. 8756 * 8757 * This routine is invoked to free the driver's nvmet sgl list and memory. 8758 **/ 8759 static void 8760 lpfc_free_nvmet_sgl_list(struct lpfc_hba *phba) 8761 { 8762 struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL; 8763 LIST_HEAD(sglq_list); 8764 8765 /* Retrieve all nvmet sgls from driver list */ 8766 spin_lock_irq(&phba->hbalock); 8767 spin_lock(&phba->sli4_hba.sgl_list_lock); 8768 list_splice_init(&phba->sli4_hba.lpfc_nvmet_sgl_list, &sglq_list); 8769 spin_unlock(&phba->sli4_hba.sgl_list_lock); 8770 spin_unlock_irq(&phba->hbalock); 8771 8772 /* Now free the sgl list */ 8773 list_for_each_entry_safe(sglq_entry, sglq_next, &sglq_list, list) { 8774 list_del(&sglq_entry->list); 8775 lpfc_nvmet_buf_free(phba, sglq_entry->virt, sglq_entry->phys); 8776 kfree(sglq_entry); 8777 } 8778 8779 /* Update the nvmet_xri_cnt to reflect no current sgls. 8780 * The next initialization cycle sets the count and allocates 8781 * the sgls over again. 8782 */ 8783 phba->sli4_hba.nvmet_xri_cnt = 0; 8784 } 8785 8786 /** 8787 * lpfc_init_active_sgl_array - Allocate the buf to track active ELS XRIs. 8788 * @phba: pointer to lpfc hba data structure. 8789 * 8790 * This routine is invoked to allocate the driver's active sgl memory. 8791 * This array will hold the sglq_entry's for active IOs. 8792 **/ 8793 static int 8794 lpfc_init_active_sgl_array(struct lpfc_hba *phba) 8795 { 8796 int size; 8797 size = sizeof(struct lpfc_sglq *); 8798 size *= phba->sli4_hba.max_cfg_param.max_xri; 8799 8800 phba->sli4_hba.lpfc_sglq_active_list = 8801 kzalloc(size, GFP_KERNEL); 8802 if (!phba->sli4_hba.lpfc_sglq_active_list) 8803 return -ENOMEM; 8804 return 0; 8805 } 8806 8807 /** 8808 * lpfc_free_active_sgl - Free the buf that tracks active ELS XRIs. 8809 * @phba: pointer to lpfc hba data structure. 8810 * 8811 * This routine is invoked to walk through the array of active sglq entries 8812 * and free all of the resources. 8813 * This is just a place holder for now. 8814 **/ 8815 static void 8816 lpfc_free_active_sgl(struct lpfc_hba *phba) 8817 { 8818 kfree(phba->sli4_hba.lpfc_sglq_active_list); 8819 } 8820 8821 /** 8822 * lpfc_init_sgl_list - Allocate and initialize sgl list. 8823 * @phba: pointer to lpfc hba data structure. 8824 * 8825 * This routine is invoked to allocate and initizlize the driver's sgl 8826 * list and set up the sgl xritag tag array accordingly. 8827 * 8828 **/ 8829 static void 8830 lpfc_init_sgl_list(struct lpfc_hba *phba) 8831 { 8832 /* Initialize and populate the sglq list per host/VF. */ 8833 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_els_sgl_list); 8834 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_els_sgl_list); 8835 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_nvmet_sgl_list); 8836 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list); 8837 8838 /* els xri-sgl book keeping */ 8839 phba->sli4_hba.els_xri_cnt = 0; 8840 8841 /* nvme xri-buffer book keeping */ 8842 phba->sli4_hba.io_xri_cnt = 0; 8843 } 8844 8845 /** 8846 * lpfc_sli4_init_rpi_hdrs - Post the rpi header memory region to the port 8847 * @phba: pointer to lpfc hba data structure. 8848 * 8849 * This routine is invoked to post rpi header templates to the 8850 * port for those SLI4 ports that do not support extents. This routine 8851 * posts a PAGE_SIZE memory region to the port to hold up to 8852 * PAGE_SIZE modulo 64 rpi context headers. This is an initialization routine 8853 * and should be called only when interrupts are disabled. 8854 * 8855 * Return codes 8856 * 0 - successful 8857 * -ERROR - otherwise. 8858 **/ 8859 int 8860 lpfc_sli4_init_rpi_hdrs(struct lpfc_hba *phba) 8861 { 8862 int rc = 0; 8863 struct lpfc_rpi_hdr *rpi_hdr; 8864 8865 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_rpi_hdr_list); 8866 if (!phba->sli4_hba.rpi_hdrs_in_use) 8867 return rc; 8868 if (phba->sli4_hba.extents_in_use) 8869 return -EIO; 8870 8871 rpi_hdr = lpfc_sli4_create_rpi_hdr(phba); 8872 if (!rpi_hdr) { 8873 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 8874 "0391 Error during rpi post operation\n"); 8875 lpfc_sli4_remove_rpis(phba); 8876 rc = -ENODEV; 8877 } 8878 8879 return rc; 8880 } 8881 8882 /** 8883 * lpfc_sli4_create_rpi_hdr - Allocate an rpi header memory region 8884 * @phba: pointer to lpfc hba data structure. 8885 * 8886 * This routine is invoked to allocate a single 4KB memory region to 8887 * support rpis and stores them in the phba. This single region 8888 * provides support for up to 64 rpis. The region is used globally 8889 * by the device. 8890 * 8891 * Returns: 8892 * A valid rpi hdr on success. 8893 * A NULL pointer on any failure. 8894 **/ 8895 struct lpfc_rpi_hdr * 8896 lpfc_sli4_create_rpi_hdr(struct lpfc_hba *phba) 8897 { 8898 uint16_t rpi_limit, curr_rpi_range; 8899 struct lpfc_dmabuf *dmabuf; 8900 struct lpfc_rpi_hdr *rpi_hdr; 8901 8902 /* 8903 * If the SLI4 port supports extents, posting the rpi header isn't 8904 * required. Set the expected maximum count and let the actual value 8905 * get set when extents are fully allocated. 8906 */ 8907 if (!phba->sli4_hba.rpi_hdrs_in_use) 8908 return NULL; 8909 if (phba->sli4_hba.extents_in_use) 8910 return NULL; 8911 8912 /* The limit on the logical index is just the max_rpi count. */ 8913 rpi_limit = phba->sli4_hba.max_cfg_param.max_rpi; 8914 8915 spin_lock_irq(&phba->hbalock); 8916 /* 8917 * Establish the starting RPI in this header block. The starting 8918 * rpi is normalized to a zero base because the physical rpi is 8919 * port based. 8920 */ 8921 curr_rpi_range = phba->sli4_hba.next_rpi; 8922 spin_unlock_irq(&phba->hbalock); 8923 8924 /* Reached full RPI range */ 8925 if (curr_rpi_range == rpi_limit) 8926 return NULL; 8927 8928 /* 8929 * First allocate the protocol header region for the port. The 8930 * port expects a 4KB DMA-mapped memory region that is 4K aligned. 8931 */ 8932 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL); 8933 if (!dmabuf) 8934 return NULL; 8935 8936 dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev, 8937 LPFC_HDR_TEMPLATE_SIZE, 8938 &dmabuf->phys, GFP_KERNEL); 8939 if (!dmabuf->virt) { 8940 rpi_hdr = NULL; 8941 goto err_free_dmabuf; 8942 } 8943 8944 if (!IS_ALIGNED(dmabuf->phys, LPFC_HDR_TEMPLATE_SIZE)) { 8945 rpi_hdr = NULL; 8946 goto err_free_coherent; 8947 } 8948 8949 /* Save the rpi header data for cleanup later. */ 8950 rpi_hdr = kzalloc(sizeof(struct lpfc_rpi_hdr), GFP_KERNEL); 8951 if (!rpi_hdr) 8952 goto err_free_coherent; 8953 8954 rpi_hdr->dmabuf = dmabuf; 8955 rpi_hdr->len = LPFC_HDR_TEMPLATE_SIZE; 8956 rpi_hdr->page_count = 1; 8957 spin_lock_irq(&phba->hbalock); 8958 8959 /* The rpi_hdr stores the logical index only. */ 8960 rpi_hdr->start_rpi = curr_rpi_range; 8961 rpi_hdr->next_rpi = phba->sli4_hba.next_rpi + LPFC_RPI_HDR_COUNT; 8962 list_add_tail(&rpi_hdr->list, &phba->sli4_hba.lpfc_rpi_hdr_list); 8963 8964 spin_unlock_irq(&phba->hbalock); 8965 return rpi_hdr; 8966 8967 err_free_coherent: 8968 dma_free_coherent(&phba->pcidev->dev, LPFC_HDR_TEMPLATE_SIZE, 8969 dmabuf->virt, dmabuf->phys); 8970 err_free_dmabuf: 8971 kfree(dmabuf); 8972 return NULL; 8973 } 8974 8975 /** 8976 * lpfc_sli4_remove_rpi_hdrs - Remove all rpi header memory regions 8977 * @phba: pointer to lpfc hba data structure. 8978 * 8979 * This routine is invoked to remove all memory resources allocated 8980 * to support rpis for SLI4 ports not supporting extents. This routine 8981 * presumes the caller has released all rpis consumed by fabric or port 8982 * logins and is prepared to have the header pages removed. 8983 **/ 8984 void 8985 lpfc_sli4_remove_rpi_hdrs(struct lpfc_hba *phba) 8986 { 8987 struct lpfc_rpi_hdr *rpi_hdr, *next_rpi_hdr; 8988 8989 if (!phba->sli4_hba.rpi_hdrs_in_use) 8990 goto exit; 8991 8992 list_for_each_entry_safe(rpi_hdr, next_rpi_hdr, 8993 &phba->sli4_hba.lpfc_rpi_hdr_list, list) { 8994 list_del(&rpi_hdr->list); 8995 dma_free_coherent(&phba->pcidev->dev, rpi_hdr->len, 8996 rpi_hdr->dmabuf->virt, rpi_hdr->dmabuf->phys); 8997 kfree(rpi_hdr->dmabuf); 8998 kfree(rpi_hdr); 8999 } 9000 exit: 9001 /* There are no rpis available to the port now. */ 9002 phba->sli4_hba.next_rpi = 0; 9003 } 9004 9005 /** 9006 * lpfc_hba_alloc - Allocate driver hba data structure for a device. 9007 * @pdev: pointer to pci device data structure. 9008 * 9009 * This routine is invoked to allocate the driver hba data structure for an 9010 * HBA device. If the allocation is successful, the phba reference to the 9011 * PCI device data structure is set. 9012 * 9013 * Return codes 9014 * pointer to @phba - successful 9015 * NULL - error 9016 **/ 9017 static struct lpfc_hba * 9018 lpfc_hba_alloc(struct pci_dev *pdev) 9019 { 9020 struct lpfc_hba *phba; 9021 9022 /* Allocate memory for HBA structure */ 9023 phba = kzalloc(sizeof(struct lpfc_hba), GFP_KERNEL); 9024 if (!phba) { 9025 dev_err(&pdev->dev, "failed to allocate hba struct\n"); 9026 return NULL; 9027 } 9028 9029 /* Set reference to PCI device in HBA structure */ 9030 phba->pcidev = pdev; 9031 9032 /* Assign an unused board number */ 9033 phba->brd_no = lpfc_get_instance(); 9034 if (phba->brd_no < 0) { 9035 kfree(phba); 9036 return NULL; 9037 } 9038 phba->eratt_poll_interval = LPFC_ERATT_POLL_INTERVAL; 9039 9040 spin_lock_init(&phba->ct_ev_lock); 9041 INIT_LIST_HEAD(&phba->ct_ev_waiters); 9042 9043 return phba; 9044 } 9045 9046 /** 9047 * lpfc_hba_free - Free driver hba data structure with a device. 9048 * @phba: pointer to lpfc hba data structure. 9049 * 9050 * This routine is invoked to free the driver hba data structure with an 9051 * HBA device. 9052 **/ 9053 static void 9054 lpfc_hba_free(struct lpfc_hba *phba) 9055 { 9056 if (phba->sli_rev == LPFC_SLI_REV4) 9057 kfree(phba->sli4_hba.hdwq); 9058 9059 /* Release the driver assigned board number */ 9060 idr_remove(&lpfc_hba_index, phba->brd_no); 9061 9062 /* Free memory allocated with sli3 rings */ 9063 kfree(phba->sli.sli3_ring); 9064 phba->sli.sli3_ring = NULL; 9065 9066 kfree(phba); 9067 return; 9068 } 9069 9070 /** 9071 * lpfc_setup_fdmi_mask - Setup initial FDMI mask for HBA and Port attributes 9072 * @vport: pointer to lpfc vport data structure. 9073 * 9074 * This routine is will setup initial FDMI attribute masks for 9075 * FDMI2 or SmartSAN depending on module parameters. The driver will attempt 9076 * to get these attributes first before falling back, the attribute 9077 * fallback hierarchy is SmartSAN -> FDMI2 -> FMDI1 9078 **/ 9079 void 9080 lpfc_setup_fdmi_mask(struct lpfc_vport *vport) 9081 { 9082 struct lpfc_hba *phba = vport->phba; 9083 9084 vport->load_flag |= FC_ALLOW_FDMI; 9085 if (phba->cfg_enable_SmartSAN || 9086 phba->cfg_fdmi_on == LPFC_FDMI_SUPPORT) { 9087 /* Setup appropriate attribute masks */ 9088 vport->fdmi_hba_mask = LPFC_FDMI2_HBA_ATTR; 9089 if (phba->cfg_enable_SmartSAN) 9090 vport->fdmi_port_mask = LPFC_FDMI2_SMART_ATTR; 9091 else 9092 vport->fdmi_port_mask = LPFC_FDMI2_PORT_ATTR; 9093 } 9094 9095 lpfc_printf_log(phba, KERN_INFO, LOG_DISCOVERY, 9096 "6077 Setup FDMI mask: hba x%x port x%x\n", 9097 vport->fdmi_hba_mask, vport->fdmi_port_mask); 9098 } 9099 9100 /** 9101 * lpfc_create_shost - Create hba physical port with associated scsi host. 9102 * @phba: pointer to lpfc hba data structure. 9103 * 9104 * This routine is invoked to create HBA physical port and associate a SCSI 9105 * host with it. 9106 * 9107 * Return codes 9108 * 0 - successful 9109 * other values - error 9110 **/ 9111 static int 9112 lpfc_create_shost(struct lpfc_hba *phba) 9113 { 9114 struct lpfc_vport *vport; 9115 struct Scsi_Host *shost; 9116 9117 /* Initialize HBA FC structure */ 9118 phba->fc_edtov = FF_DEF_EDTOV; 9119 phba->fc_ratov = FF_DEF_RATOV; 9120 phba->fc_altov = FF_DEF_ALTOV; 9121 phba->fc_arbtov = FF_DEF_ARBTOV; 9122 9123 atomic_set(&phba->sdev_cnt, 0); 9124 vport = lpfc_create_port(phba, phba->brd_no, &phba->pcidev->dev); 9125 if (!vport) 9126 return -ENODEV; 9127 9128 shost = lpfc_shost_from_vport(vport); 9129 phba->pport = vport; 9130 9131 if (phba->nvmet_support) { 9132 /* Only 1 vport (pport) will support NVME target */ 9133 phba->targetport = NULL; 9134 phba->cfg_enable_fc4_type = LPFC_ENABLE_NVME; 9135 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_NVME_DISC, 9136 "6076 NVME Target Found\n"); 9137 } 9138 9139 lpfc_debugfs_initialize(vport); 9140 /* Put reference to SCSI host to driver's device private data */ 9141 pci_set_drvdata(phba->pcidev, shost); 9142 9143 lpfc_setup_fdmi_mask(vport); 9144 9145 /* 9146 * At this point we are fully registered with PSA. In addition, 9147 * any initial discovery should be completed. 9148 */ 9149 return 0; 9150 } 9151 9152 /** 9153 * lpfc_destroy_shost - Destroy hba physical port with associated scsi host. 9154 * @phba: pointer to lpfc hba data structure. 9155 * 9156 * This routine is invoked to destroy HBA physical port and the associated 9157 * SCSI host. 9158 **/ 9159 static void 9160 lpfc_destroy_shost(struct lpfc_hba *phba) 9161 { 9162 struct lpfc_vport *vport = phba->pport; 9163 9164 /* Destroy physical port that associated with the SCSI host */ 9165 destroy_port(vport); 9166 9167 return; 9168 } 9169 9170 /** 9171 * lpfc_setup_bg - Setup Block guard structures and debug areas. 9172 * @phba: pointer to lpfc hba data structure. 9173 * @shost: the shost to be used to detect Block guard settings. 9174 * 9175 * This routine sets up the local Block guard protocol settings for @shost. 9176 * This routine also allocates memory for debugging bg buffers. 9177 **/ 9178 static void 9179 lpfc_setup_bg(struct lpfc_hba *phba, struct Scsi_Host *shost) 9180 { 9181 uint32_t old_mask; 9182 uint32_t old_guard; 9183 9184 if (phba->cfg_prot_mask && phba->cfg_prot_guard) { 9185 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 9186 "1478 Registering BlockGuard with the " 9187 "SCSI layer\n"); 9188 9189 old_mask = phba->cfg_prot_mask; 9190 old_guard = phba->cfg_prot_guard; 9191 9192 /* Only allow supported values */ 9193 phba->cfg_prot_mask &= (SHOST_DIF_TYPE1_PROTECTION | 9194 SHOST_DIX_TYPE0_PROTECTION | 9195 SHOST_DIX_TYPE1_PROTECTION); 9196 phba->cfg_prot_guard &= (SHOST_DIX_GUARD_IP | 9197 SHOST_DIX_GUARD_CRC); 9198 9199 /* DIF Type 1 protection for profiles AST1/C1 is end to end */ 9200 if (phba->cfg_prot_mask == SHOST_DIX_TYPE1_PROTECTION) 9201 phba->cfg_prot_mask |= SHOST_DIF_TYPE1_PROTECTION; 9202 9203 if (phba->cfg_prot_mask && phba->cfg_prot_guard) { 9204 if ((old_mask != phba->cfg_prot_mask) || 9205 (old_guard != phba->cfg_prot_guard)) 9206 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 9207 "1475 Registering BlockGuard with the " 9208 "SCSI layer: mask %d guard %d\n", 9209 phba->cfg_prot_mask, 9210 phba->cfg_prot_guard); 9211 9212 scsi_host_set_prot(shost, phba->cfg_prot_mask); 9213 scsi_host_set_guard(shost, phba->cfg_prot_guard); 9214 } else 9215 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 9216 "1479 Not Registering BlockGuard with the SCSI " 9217 "layer, Bad protection parameters: %d %d\n", 9218 old_mask, old_guard); 9219 } 9220 } 9221 9222 /** 9223 * lpfc_post_init_setup - Perform necessary device post initialization setup. 9224 * @phba: pointer to lpfc hba data structure. 9225 * 9226 * This routine is invoked to perform all the necessary post initialization 9227 * setup for the device. 9228 **/ 9229 static void 9230 lpfc_post_init_setup(struct lpfc_hba *phba) 9231 { 9232 struct Scsi_Host *shost; 9233 struct lpfc_adapter_event_header adapter_event; 9234 9235 /* Get the default values for Model Name and Description */ 9236 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc); 9237 9238 /* 9239 * hba setup may have changed the hba_queue_depth so we need to 9240 * adjust the value of can_queue. 9241 */ 9242 shost = pci_get_drvdata(phba->pcidev); 9243 shost->can_queue = phba->cfg_hba_queue_depth - 10; 9244 9245 lpfc_host_attrib_init(shost); 9246 9247 if (phba->cfg_poll & DISABLE_FCP_RING_INT) { 9248 spin_lock_irq(shost->host_lock); 9249 lpfc_poll_start_timer(phba); 9250 spin_unlock_irq(shost->host_lock); 9251 } 9252 9253 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 9254 "0428 Perform SCSI scan\n"); 9255 /* Send board arrival event to upper layer */ 9256 adapter_event.event_type = FC_REG_ADAPTER_EVENT; 9257 adapter_event.subcategory = LPFC_EVENT_ARRIVAL; 9258 fc_host_post_vendor_event(shost, fc_get_event_number(), 9259 sizeof(adapter_event), 9260 (char *) &adapter_event, 9261 LPFC_NL_VENDOR_ID); 9262 return; 9263 } 9264 9265 /** 9266 * lpfc_sli_pci_mem_setup - Setup SLI3 HBA PCI memory space. 9267 * @phba: pointer to lpfc hba data structure. 9268 * 9269 * This routine is invoked to set up the PCI device memory space for device 9270 * with SLI-3 interface spec. 9271 * 9272 * Return codes 9273 * 0 - successful 9274 * other values - error 9275 **/ 9276 static int 9277 lpfc_sli_pci_mem_setup(struct lpfc_hba *phba) 9278 { 9279 struct pci_dev *pdev = phba->pcidev; 9280 unsigned long bar0map_len, bar2map_len; 9281 int i, hbq_count; 9282 void *ptr; 9283 int error; 9284 9285 if (!pdev) 9286 return -ENODEV; 9287 9288 /* Set the device DMA mask size */ 9289 error = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); 9290 if (error) 9291 error = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); 9292 if (error) 9293 return error; 9294 error = -ENODEV; 9295 9296 /* Get the bus address of Bar0 and Bar2 and the number of bytes 9297 * required by each mapping. 9298 */ 9299 phba->pci_bar0_map = pci_resource_start(pdev, 0); 9300 bar0map_len = pci_resource_len(pdev, 0); 9301 9302 phba->pci_bar2_map = pci_resource_start(pdev, 2); 9303 bar2map_len = pci_resource_len(pdev, 2); 9304 9305 /* Map HBA SLIM to a kernel virtual address. */ 9306 phba->slim_memmap_p = ioremap(phba->pci_bar0_map, bar0map_len); 9307 if (!phba->slim_memmap_p) { 9308 dev_printk(KERN_ERR, &pdev->dev, 9309 "ioremap failed for SLIM memory.\n"); 9310 goto out; 9311 } 9312 9313 /* Map HBA Control Registers to a kernel virtual address. */ 9314 phba->ctrl_regs_memmap_p = ioremap(phba->pci_bar2_map, bar2map_len); 9315 if (!phba->ctrl_regs_memmap_p) { 9316 dev_printk(KERN_ERR, &pdev->dev, 9317 "ioremap failed for HBA control registers.\n"); 9318 goto out_iounmap_slim; 9319 } 9320 9321 /* Allocate memory for SLI-2 structures */ 9322 phba->slim2p.virt = dma_alloc_coherent(&pdev->dev, SLI2_SLIM_SIZE, 9323 &phba->slim2p.phys, GFP_KERNEL); 9324 if (!phba->slim2p.virt) 9325 goto out_iounmap; 9326 9327 phba->mbox = phba->slim2p.virt + offsetof(struct lpfc_sli2_slim, mbx); 9328 phba->mbox_ext = (phba->slim2p.virt + 9329 offsetof(struct lpfc_sli2_slim, mbx_ext_words)); 9330 phba->pcb = (phba->slim2p.virt + offsetof(struct lpfc_sli2_slim, pcb)); 9331 phba->IOCBs = (phba->slim2p.virt + 9332 offsetof(struct lpfc_sli2_slim, IOCBs)); 9333 9334 phba->hbqslimp.virt = dma_alloc_coherent(&pdev->dev, 9335 lpfc_sli_hbq_size(), 9336 &phba->hbqslimp.phys, 9337 GFP_KERNEL); 9338 if (!phba->hbqslimp.virt) 9339 goto out_free_slim; 9340 9341 hbq_count = lpfc_sli_hbq_count(); 9342 ptr = phba->hbqslimp.virt; 9343 for (i = 0; i < hbq_count; ++i) { 9344 phba->hbqs[i].hbq_virt = ptr; 9345 INIT_LIST_HEAD(&phba->hbqs[i].hbq_buffer_list); 9346 ptr += (lpfc_hbq_defs[i]->entry_count * 9347 sizeof(struct lpfc_hbq_entry)); 9348 } 9349 phba->hbqs[LPFC_ELS_HBQ].hbq_alloc_buffer = lpfc_els_hbq_alloc; 9350 phba->hbqs[LPFC_ELS_HBQ].hbq_free_buffer = lpfc_els_hbq_free; 9351 9352 memset(phba->hbqslimp.virt, 0, lpfc_sli_hbq_size()); 9353 9354 phba->MBslimaddr = phba->slim_memmap_p; 9355 phba->HAregaddr = phba->ctrl_regs_memmap_p + HA_REG_OFFSET; 9356 phba->CAregaddr = phba->ctrl_regs_memmap_p + CA_REG_OFFSET; 9357 phba->HSregaddr = phba->ctrl_regs_memmap_p + HS_REG_OFFSET; 9358 phba->HCregaddr = phba->ctrl_regs_memmap_p + HC_REG_OFFSET; 9359 9360 return 0; 9361 9362 out_free_slim: 9363 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE, 9364 phba->slim2p.virt, phba->slim2p.phys); 9365 out_iounmap: 9366 iounmap(phba->ctrl_regs_memmap_p); 9367 out_iounmap_slim: 9368 iounmap(phba->slim_memmap_p); 9369 out: 9370 return error; 9371 } 9372 9373 /** 9374 * lpfc_sli_pci_mem_unset - Unset SLI3 HBA PCI memory space. 9375 * @phba: pointer to lpfc hba data structure. 9376 * 9377 * This routine is invoked to unset the PCI device memory space for device 9378 * with SLI-3 interface spec. 9379 **/ 9380 static void 9381 lpfc_sli_pci_mem_unset(struct lpfc_hba *phba) 9382 { 9383 struct pci_dev *pdev; 9384 9385 /* Obtain PCI device reference */ 9386 if (!phba->pcidev) 9387 return; 9388 else 9389 pdev = phba->pcidev; 9390 9391 /* Free coherent DMA memory allocated */ 9392 dma_free_coherent(&pdev->dev, lpfc_sli_hbq_size(), 9393 phba->hbqslimp.virt, phba->hbqslimp.phys); 9394 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE, 9395 phba->slim2p.virt, phba->slim2p.phys); 9396 9397 /* I/O memory unmap */ 9398 iounmap(phba->ctrl_regs_memmap_p); 9399 iounmap(phba->slim_memmap_p); 9400 9401 return; 9402 } 9403 9404 /** 9405 * lpfc_sli4_post_status_check - Wait for SLI4 POST done and check status 9406 * @phba: pointer to lpfc hba data structure. 9407 * 9408 * This routine is invoked to wait for SLI4 device Power On Self Test (POST) 9409 * done and check status. 9410 * 9411 * Return 0 if successful, otherwise -ENODEV. 9412 **/ 9413 int 9414 lpfc_sli4_post_status_check(struct lpfc_hba *phba) 9415 { 9416 struct lpfc_register portsmphr_reg, uerrlo_reg, uerrhi_reg; 9417 struct lpfc_register reg_data; 9418 int i, port_error = 0; 9419 uint32_t if_type; 9420 9421 memset(&portsmphr_reg, 0, sizeof(portsmphr_reg)); 9422 memset(®_data, 0, sizeof(reg_data)); 9423 if (!phba->sli4_hba.PSMPHRregaddr) 9424 return -ENODEV; 9425 9426 /* Wait up to 30 seconds for the SLI Port POST done and ready */ 9427 for (i = 0; i < 3000; i++) { 9428 if (lpfc_readl(phba->sli4_hba.PSMPHRregaddr, 9429 &portsmphr_reg.word0) || 9430 (bf_get(lpfc_port_smphr_perr, &portsmphr_reg))) { 9431 /* Port has a fatal POST error, break out */ 9432 port_error = -ENODEV; 9433 break; 9434 } 9435 if (LPFC_POST_STAGE_PORT_READY == 9436 bf_get(lpfc_port_smphr_port_status, &portsmphr_reg)) 9437 break; 9438 msleep(10); 9439 } 9440 9441 /* 9442 * If there was a port error during POST, then don't proceed with 9443 * other register reads as the data may not be valid. Just exit. 9444 */ 9445 if (port_error) { 9446 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 9447 "1408 Port Failed POST - portsmphr=0x%x, " 9448 "perr=x%x, sfi=x%x, nip=x%x, ipc=x%x, scr1=x%x, " 9449 "scr2=x%x, hscratch=x%x, pstatus=x%x\n", 9450 portsmphr_reg.word0, 9451 bf_get(lpfc_port_smphr_perr, &portsmphr_reg), 9452 bf_get(lpfc_port_smphr_sfi, &portsmphr_reg), 9453 bf_get(lpfc_port_smphr_nip, &portsmphr_reg), 9454 bf_get(lpfc_port_smphr_ipc, &portsmphr_reg), 9455 bf_get(lpfc_port_smphr_scr1, &portsmphr_reg), 9456 bf_get(lpfc_port_smphr_scr2, &portsmphr_reg), 9457 bf_get(lpfc_port_smphr_host_scratch, &portsmphr_reg), 9458 bf_get(lpfc_port_smphr_port_status, &portsmphr_reg)); 9459 } else { 9460 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 9461 "2534 Device Info: SLIFamily=0x%x, " 9462 "SLIRev=0x%x, IFType=0x%x, SLIHint_1=0x%x, " 9463 "SLIHint_2=0x%x, FT=0x%x\n", 9464 bf_get(lpfc_sli_intf_sli_family, 9465 &phba->sli4_hba.sli_intf), 9466 bf_get(lpfc_sli_intf_slirev, 9467 &phba->sli4_hba.sli_intf), 9468 bf_get(lpfc_sli_intf_if_type, 9469 &phba->sli4_hba.sli_intf), 9470 bf_get(lpfc_sli_intf_sli_hint1, 9471 &phba->sli4_hba.sli_intf), 9472 bf_get(lpfc_sli_intf_sli_hint2, 9473 &phba->sli4_hba.sli_intf), 9474 bf_get(lpfc_sli_intf_func_type, 9475 &phba->sli4_hba.sli_intf)); 9476 /* 9477 * Check for other Port errors during the initialization 9478 * process. Fail the load if the port did not come up 9479 * correctly. 9480 */ 9481 if_type = bf_get(lpfc_sli_intf_if_type, 9482 &phba->sli4_hba.sli_intf); 9483 switch (if_type) { 9484 case LPFC_SLI_INTF_IF_TYPE_0: 9485 phba->sli4_hba.ue_mask_lo = 9486 readl(phba->sli4_hba.u.if_type0.UEMASKLOregaddr); 9487 phba->sli4_hba.ue_mask_hi = 9488 readl(phba->sli4_hba.u.if_type0.UEMASKHIregaddr); 9489 uerrlo_reg.word0 = 9490 readl(phba->sli4_hba.u.if_type0.UERRLOregaddr); 9491 uerrhi_reg.word0 = 9492 readl(phba->sli4_hba.u.if_type0.UERRHIregaddr); 9493 if ((~phba->sli4_hba.ue_mask_lo & uerrlo_reg.word0) || 9494 (~phba->sli4_hba.ue_mask_hi & uerrhi_reg.word0)) { 9495 lpfc_printf_log(phba, KERN_ERR, 9496 LOG_TRACE_EVENT, 9497 "1422 Unrecoverable Error " 9498 "Detected during POST " 9499 "uerr_lo_reg=0x%x, " 9500 "uerr_hi_reg=0x%x, " 9501 "ue_mask_lo_reg=0x%x, " 9502 "ue_mask_hi_reg=0x%x\n", 9503 uerrlo_reg.word0, 9504 uerrhi_reg.word0, 9505 phba->sli4_hba.ue_mask_lo, 9506 phba->sli4_hba.ue_mask_hi); 9507 port_error = -ENODEV; 9508 } 9509 break; 9510 case LPFC_SLI_INTF_IF_TYPE_2: 9511 case LPFC_SLI_INTF_IF_TYPE_6: 9512 /* Final checks. The port status should be clean. */ 9513 if (lpfc_readl(phba->sli4_hba.u.if_type2.STATUSregaddr, 9514 ®_data.word0) || 9515 (bf_get(lpfc_sliport_status_err, ®_data) && 9516 !bf_get(lpfc_sliport_status_rn, ®_data))) { 9517 phba->work_status[0] = 9518 readl(phba->sli4_hba.u.if_type2. 9519 ERR1regaddr); 9520 phba->work_status[1] = 9521 readl(phba->sli4_hba.u.if_type2. 9522 ERR2regaddr); 9523 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 9524 "2888 Unrecoverable port error " 9525 "following POST: port status reg " 9526 "0x%x, port_smphr reg 0x%x, " 9527 "error 1=0x%x, error 2=0x%x\n", 9528 reg_data.word0, 9529 portsmphr_reg.word0, 9530 phba->work_status[0], 9531 phba->work_status[1]); 9532 port_error = -ENODEV; 9533 break; 9534 } 9535 9536 if (lpfc_pldv_detect && 9537 bf_get(lpfc_sli_intf_sli_family, 9538 &phba->sli4_hba.sli_intf) == 9539 LPFC_SLI_INTF_FAMILY_G6) 9540 pci_write_config_byte(phba->pcidev, 9541 LPFC_SLI_INTF, CFG_PLD); 9542 break; 9543 case LPFC_SLI_INTF_IF_TYPE_1: 9544 default: 9545 break; 9546 } 9547 } 9548 return port_error; 9549 } 9550 9551 /** 9552 * lpfc_sli4_bar0_register_memmap - Set up SLI4 BAR0 register memory map. 9553 * @phba: pointer to lpfc hba data structure. 9554 * @if_type: The SLI4 interface type getting configured. 9555 * 9556 * This routine is invoked to set up SLI4 BAR0 PCI config space register 9557 * memory map. 9558 **/ 9559 static void 9560 lpfc_sli4_bar0_register_memmap(struct lpfc_hba *phba, uint32_t if_type) 9561 { 9562 switch (if_type) { 9563 case LPFC_SLI_INTF_IF_TYPE_0: 9564 phba->sli4_hba.u.if_type0.UERRLOregaddr = 9565 phba->sli4_hba.conf_regs_memmap_p + LPFC_UERR_STATUS_LO; 9566 phba->sli4_hba.u.if_type0.UERRHIregaddr = 9567 phba->sli4_hba.conf_regs_memmap_p + LPFC_UERR_STATUS_HI; 9568 phba->sli4_hba.u.if_type0.UEMASKLOregaddr = 9569 phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_LO; 9570 phba->sli4_hba.u.if_type0.UEMASKHIregaddr = 9571 phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_HI; 9572 phba->sli4_hba.SLIINTFregaddr = 9573 phba->sli4_hba.conf_regs_memmap_p + LPFC_SLI_INTF; 9574 break; 9575 case LPFC_SLI_INTF_IF_TYPE_2: 9576 phba->sli4_hba.u.if_type2.EQDregaddr = 9577 phba->sli4_hba.conf_regs_memmap_p + 9578 LPFC_CTL_PORT_EQ_DELAY_OFFSET; 9579 phba->sli4_hba.u.if_type2.ERR1regaddr = 9580 phba->sli4_hba.conf_regs_memmap_p + 9581 LPFC_CTL_PORT_ER1_OFFSET; 9582 phba->sli4_hba.u.if_type2.ERR2regaddr = 9583 phba->sli4_hba.conf_regs_memmap_p + 9584 LPFC_CTL_PORT_ER2_OFFSET; 9585 phba->sli4_hba.u.if_type2.CTRLregaddr = 9586 phba->sli4_hba.conf_regs_memmap_p + 9587 LPFC_CTL_PORT_CTL_OFFSET; 9588 phba->sli4_hba.u.if_type2.STATUSregaddr = 9589 phba->sli4_hba.conf_regs_memmap_p + 9590 LPFC_CTL_PORT_STA_OFFSET; 9591 phba->sli4_hba.SLIINTFregaddr = 9592 phba->sli4_hba.conf_regs_memmap_p + LPFC_SLI_INTF; 9593 phba->sli4_hba.PSMPHRregaddr = 9594 phba->sli4_hba.conf_regs_memmap_p + 9595 LPFC_CTL_PORT_SEM_OFFSET; 9596 phba->sli4_hba.RQDBregaddr = 9597 phba->sli4_hba.conf_regs_memmap_p + 9598 LPFC_ULP0_RQ_DOORBELL; 9599 phba->sli4_hba.WQDBregaddr = 9600 phba->sli4_hba.conf_regs_memmap_p + 9601 LPFC_ULP0_WQ_DOORBELL; 9602 phba->sli4_hba.CQDBregaddr = 9603 phba->sli4_hba.conf_regs_memmap_p + LPFC_EQCQ_DOORBELL; 9604 phba->sli4_hba.EQDBregaddr = phba->sli4_hba.CQDBregaddr; 9605 phba->sli4_hba.MQDBregaddr = 9606 phba->sli4_hba.conf_regs_memmap_p + LPFC_MQ_DOORBELL; 9607 phba->sli4_hba.BMBXregaddr = 9608 phba->sli4_hba.conf_regs_memmap_p + LPFC_BMBX; 9609 break; 9610 case LPFC_SLI_INTF_IF_TYPE_6: 9611 phba->sli4_hba.u.if_type2.EQDregaddr = 9612 phba->sli4_hba.conf_regs_memmap_p + 9613 LPFC_CTL_PORT_EQ_DELAY_OFFSET; 9614 phba->sli4_hba.u.if_type2.ERR1regaddr = 9615 phba->sli4_hba.conf_regs_memmap_p + 9616 LPFC_CTL_PORT_ER1_OFFSET; 9617 phba->sli4_hba.u.if_type2.ERR2regaddr = 9618 phba->sli4_hba.conf_regs_memmap_p + 9619 LPFC_CTL_PORT_ER2_OFFSET; 9620 phba->sli4_hba.u.if_type2.CTRLregaddr = 9621 phba->sli4_hba.conf_regs_memmap_p + 9622 LPFC_CTL_PORT_CTL_OFFSET; 9623 phba->sli4_hba.u.if_type2.STATUSregaddr = 9624 phba->sli4_hba.conf_regs_memmap_p + 9625 LPFC_CTL_PORT_STA_OFFSET; 9626 phba->sli4_hba.PSMPHRregaddr = 9627 phba->sli4_hba.conf_regs_memmap_p + 9628 LPFC_CTL_PORT_SEM_OFFSET; 9629 phba->sli4_hba.BMBXregaddr = 9630 phba->sli4_hba.conf_regs_memmap_p + LPFC_BMBX; 9631 break; 9632 case LPFC_SLI_INTF_IF_TYPE_1: 9633 default: 9634 dev_printk(KERN_ERR, &phba->pcidev->dev, 9635 "FATAL - unsupported SLI4 interface type - %d\n", 9636 if_type); 9637 break; 9638 } 9639 } 9640 9641 /** 9642 * lpfc_sli4_bar1_register_memmap - Set up SLI4 BAR1 register memory map. 9643 * @phba: pointer to lpfc hba data structure. 9644 * @if_type: sli if type to operate on. 9645 * 9646 * This routine is invoked to set up SLI4 BAR1 register memory map. 9647 **/ 9648 static void 9649 lpfc_sli4_bar1_register_memmap(struct lpfc_hba *phba, uint32_t if_type) 9650 { 9651 switch (if_type) { 9652 case LPFC_SLI_INTF_IF_TYPE_0: 9653 phba->sli4_hba.PSMPHRregaddr = 9654 phba->sli4_hba.ctrl_regs_memmap_p + 9655 LPFC_SLIPORT_IF0_SMPHR; 9656 phba->sli4_hba.ISRregaddr = phba->sli4_hba.ctrl_regs_memmap_p + 9657 LPFC_HST_ISR0; 9658 phba->sli4_hba.IMRregaddr = phba->sli4_hba.ctrl_regs_memmap_p + 9659 LPFC_HST_IMR0; 9660 phba->sli4_hba.ISCRregaddr = phba->sli4_hba.ctrl_regs_memmap_p + 9661 LPFC_HST_ISCR0; 9662 break; 9663 case LPFC_SLI_INTF_IF_TYPE_6: 9664 phba->sli4_hba.RQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p + 9665 LPFC_IF6_RQ_DOORBELL; 9666 phba->sli4_hba.WQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p + 9667 LPFC_IF6_WQ_DOORBELL; 9668 phba->sli4_hba.CQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p + 9669 LPFC_IF6_CQ_DOORBELL; 9670 phba->sli4_hba.EQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p + 9671 LPFC_IF6_EQ_DOORBELL; 9672 phba->sli4_hba.MQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p + 9673 LPFC_IF6_MQ_DOORBELL; 9674 break; 9675 case LPFC_SLI_INTF_IF_TYPE_2: 9676 case LPFC_SLI_INTF_IF_TYPE_1: 9677 default: 9678 dev_err(&phba->pcidev->dev, 9679 "FATAL - unsupported SLI4 interface type - %d\n", 9680 if_type); 9681 break; 9682 } 9683 } 9684 9685 /** 9686 * lpfc_sli4_bar2_register_memmap - Set up SLI4 BAR2 register memory map. 9687 * @phba: pointer to lpfc hba data structure. 9688 * @vf: virtual function number 9689 * 9690 * This routine is invoked to set up SLI4 BAR2 doorbell register memory map 9691 * based on the given viftual function number, @vf. 9692 * 9693 * Return 0 if successful, otherwise -ENODEV. 9694 **/ 9695 static int 9696 lpfc_sli4_bar2_register_memmap(struct lpfc_hba *phba, uint32_t vf) 9697 { 9698 if (vf > LPFC_VIR_FUNC_MAX) 9699 return -ENODEV; 9700 9701 phba->sli4_hba.RQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p + 9702 vf * LPFC_VFR_PAGE_SIZE + 9703 LPFC_ULP0_RQ_DOORBELL); 9704 phba->sli4_hba.WQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p + 9705 vf * LPFC_VFR_PAGE_SIZE + 9706 LPFC_ULP0_WQ_DOORBELL); 9707 phba->sli4_hba.CQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p + 9708 vf * LPFC_VFR_PAGE_SIZE + 9709 LPFC_EQCQ_DOORBELL); 9710 phba->sli4_hba.EQDBregaddr = phba->sli4_hba.CQDBregaddr; 9711 phba->sli4_hba.MQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p + 9712 vf * LPFC_VFR_PAGE_SIZE + LPFC_MQ_DOORBELL); 9713 phba->sli4_hba.BMBXregaddr = (phba->sli4_hba.drbl_regs_memmap_p + 9714 vf * LPFC_VFR_PAGE_SIZE + LPFC_BMBX); 9715 return 0; 9716 } 9717 9718 /** 9719 * lpfc_create_bootstrap_mbox - Create the bootstrap mailbox 9720 * @phba: pointer to lpfc hba data structure. 9721 * 9722 * This routine is invoked to create the bootstrap mailbox 9723 * region consistent with the SLI-4 interface spec. This 9724 * routine allocates all memory necessary to communicate 9725 * mailbox commands to the port and sets up all alignment 9726 * needs. No locks are expected to be held when calling 9727 * this routine. 9728 * 9729 * Return codes 9730 * 0 - successful 9731 * -ENOMEM - could not allocated memory. 9732 **/ 9733 static int 9734 lpfc_create_bootstrap_mbox(struct lpfc_hba *phba) 9735 { 9736 uint32_t bmbx_size; 9737 struct lpfc_dmabuf *dmabuf; 9738 struct dma_address *dma_address; 9739 uint32_t pa_addr; 9740 uint64_t phys_addr; 9741 9742 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL); 9743 if (!dmabuf) 9744 return -ENOMEM; 9745 9746 /* 9747 * The bootstrap mailbox region is comprised of 2 parts 9748 * plus an alignment restriction of 16 bytes. 9749 */ 9750 bmbx_size = sizeof(struct lpfc_bmbx_create) + (LPFC_ALIGN_16_BYTE - 1); 9751 dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev, bmbx_size, 9752 &dmabuf->phys, GFP_KERNEL); 9753 if (!dmabuf->virt) { 9754 kfree(dmabuf); 9755 return -ENOMEM; 9756 } 9757 9758 /* 9759 * Initialize the bootstrap mailbox pointers now so that the register 9760 * operations are simple later. The mailbox dma address is required 9761 * to be 16-byte aligned. Also align the virtual memory as each 9762 * maibox is copied into the bmbx mailbox region before issuing the 9763 * command to the port. 9764 */ 9765 phba->sli4_hba.bmbx.dmabuf = dmabuf; 9766 phba->sli4_hba.bmbx.bmbx_size = bmbx_size; 9767 9768 phba->sli4_hba.bmbx.avirt = PTR_ALIGN(dmabuf->virt, 9769 LPFC_ALIGN_16_BYTE); 9770 phba->sli4_hba.bmbx.aphys = ALIGN(dmabuf->phys, 9771 LPFC_ALIGN_16_BYTE); 9772 9773 /* 9774 * Set the high and low physical addresses now. The SLI4 alignment 9775 * requirement is 16 bytes and the mailbox is posted to the port 9776 * as two 30-bit addresses. The other data is a bit marking whether 9777 * the 30-bit address is the high or low address. 9778 * Upcast bmbx aphys to 64bits so shift instruction compiles 9779 * clean on 32 bit machines. 9780 */ 9781 dma_address = &phba->sli4_hba.bmbx.dma_address; 9782 phys_addr = (uint64_t)phba->sli4_hba.bmbx.aphys; 9783 pa_addr = (uint32_t) ((phys_addr >> 34) & 0x3fffffff); 9784 dma_address->addr_hi = (uint32_t) ((pa_addr << 2) | 9785 LPFC_BMBX_BIT1_ADDR_HI); 9786 9787 pa_addr = (uint32_t) ((phba->sli4_hba.bmbx.aphys >> 4) & 0x3fffffff); 9788 dma_address->addr_lo = (uint32_t) ((pa_addr << 2) | 9789 LPFC_BMBX_BIT1_ADDR_LO); 9790 return 0; 9791 } 9792 9793 /** 9794 * lpfc_destroy_bootstrap_mbox - Destroy all bootstrap mailbox resources 9795 * @phba: pointer to lpfc hba data structure. 9796 * 9797 * This routine is invoked to teardown the bootstrap mailbox 9798 * region and release all host resources. This routine requires 9799 * the caller to ensure all mailbox commands recovered, no 9800 * additional mailbox comands are sent, and interrupts are disabled 9801 * before calling this routine. 9802 * 9803 **/ 9804 static void 9805 lpfc_destroy_bootstrap_mbox(struct lpfc_hba *phba) 9806 { 9807 dma_free_coherent(&phba->pcidev->dev, 9808 phba->sli4_hba.bmbx.bmbx_size, 9809 phba->sli4_hba.bmbx.dmabuf->virt, 9810 phba->sli4_hba.bmbx.dmabuf->phys); 9811 9812 kfree(phba->sli4_hba.bmbx.dmabuf); 9813 memset(&phba->sli4_hba.bmbx, 0, sizeof(struct lpfc_bmbx)); 9814 } 9815 9816 static const char * const lpfc_topo_to_str[] = { 9817 "Loop then P2P", 9818 "Loopback", 9819 "P2P Only", 9820 "Unsupported", 9821 "Loop Only", 9822 "Unsupported", 9823 "P2P then Loop", 9824 }; 9825 9826 #define LINK_FLAGS_DEF 0x0 9827 #define LINK_FLAGS_P2P 0x1 9828 #define LINK_FLAGS_LOOP 0x2 9829 /** 9830 * lpfc_map_topology - Map the topology read from READ_CONFIG 9831 * @phba: pointer to lpfc hba data structure. 9832 * @rd_config: pointer to read config data 9833 * 9834 * This routine is invoked to map the topology values as read 9835 * from the read config mailbox command. If the persistent 9836 * topology feature is supported, the firmware will provide the 9837 * saved topology information to be used in INIT_LINK 9838 **/ 9839 static void 9840 lpfc_map_topology(struct lpfc_hba *phba, struct lpfc_mbx_read_config *rd_config) 9841 { 9842 u8 ptv, tf, pt; 9843 9844 ptv = bf_get(lpfc_mbx_rd_conf_ptv, rd_config); 9845 tf = bf_get(lpfc_mbx_rd_conf_tf, rd_config); 9846 pt = bf_get(lpfc_mbx_rd_conf_pt, rd_config); 9847 9848 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 9849 "2027 Read Config Data : ptv:0x%x, tf:0x%x pt:0x%x", 9850 ptv, tf, pt); 9851 if (!ptv) { 9852 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI, 9853 "2019 FW does not support persistent topology " 9854 "Using driver parameter defined value [%s]", 9855 lpfc_topo_to_str[phba->cfg_topology]); 9856 return; 9857 } 9858 /* FW supports persistent topology - override module parameter value */ 9859 phba->hba_flag |= HBA_PERSISTENT_TOPO; 9860 9861 /* if ASIC_GEN_NUM >= 0xC) */ 9862 if ((bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) == 9863 LPFC_SLI_INTF_IF_TYPE_6) || 9864 (bf_get(lpfc_sli_intf_sli_family, &phba->sli4_hba.sli_intf) == 9865 LPFC_SLI_INTF_FAMILY_G6)) { 9866 if (!tf) { 9867 phba->cfg_topology = ((pt == LINK_FLAGS_LOOP) 9868 ? FLAGS_TOPOLOGY_MODE_LOOP 9869 : FLAGS_TOPOLOGY_MODE_PT_PT); 9870 } else { 9871 phba->hba_flag &= ~HBA_PERSISTENT_TOPO; 9872 } 9873 } else { /* G5 */ 9874 if (tf) { 9875 /* If topology failover set - pt is '0' or '1' */ 9876 phba->cfg_topology = (pt ? FLAGS_TOPOLOGY_MODE_PT_LOOP : 9877 FLAGS_TOPOLOGY_MODE_LOOP_PT); 9878 } else { 9879 phba->cfg_topology = ((pt == LINK_FLAGS_P2P) 9880 ? FLAGS_TOPOLOGY_MODE_PT_PT 9881 : FLAGS_TOPOLOGY_MODE_LOOP); 9882 } 9883 } 9884 if (phba->hba_flag & HBA_PERSISTENT_TOPO) { 9885 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 9886 "2020 Using persistent topology value [%s]", 9887 lpfc_topo_to_str[phba->cfg_topology]); 9888 } else { 9889 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI, 9890 "2021 Invalid topology values from FW " 9891 "Using driver parameter defined value [%s]", 9892 lpfc_topo_to_str[phba->cfg_topology]); 9893 } 9894 } 9895 9896 /** 9897 * lpfc_sli4_read_config - Get the config parameters. 9898 * @phba: pointer to lpfc hba data structure. 9899 * 9900 * This routine is invoked to read the configuration parameters from the HBA. 9901 * The configuration parameters are used to set the base and maximum values 9902 * for RPI's XRI's VPI's VFI's and FCFIs. These values also affect the resource 9903 * allocation for the port. 9904 * 9905 * Return codes 9906 * 0 - successful 9907 * -ENOMEM - No available memory 9908 * -EIO - The mailbox failed to complete successfully. 9909 **/ 9910 int 9911 lpfc_sli4_read_config(struct lpfc_hba *phba) 9912 { 9913 LPFC_MBOXQ_t *pmb; 9914 struct lpfc_mbx_read_config *rd_config; 9915 union lpfc_sli4_cfg_shdr *shdr; 9916 uint32_t shdr_status, shdr_add_status; 9917 struct lpfc_mbx_get_func_cfg *get_func_cfg; 9918 struct lpfc_rsrc_desc_fcfcoe *desc; 9919 char *pdesc_0; 9920 uint16_t forced_link_speed; 9921 uint32_t if_type, qmin, fawwpn; 9922 int length, i, rc = 0, rc2; 9923 9924 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 9925 if (!pmb) { 9926 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 9927 "2011 Unable to allocate memory for issuing " 9928 "SLI_CONFIG_SPECIAL mailbox command\n"); 9929 return -ENOMEM; 9930 } 9931 9932 lpfc_read_config(phba, pmb); 9933 9934 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); 9935 if (rc != MBX_SUCCESS) { 9936 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 9937 "2012 Mailbox failed , mbxCmd x%x " 9938 "READ_CONFIG, mbxStatus x%x\n", 9939 bf_get(lpfc_mqe_command, &pmb->u.mqe), 9940 bf_get(lpfc_mqe_status, &pmb->u.mqe)); 9941 rc = -EIO; 9942 } else { 9943 rd_config = &pmb->u.mqe.un.rd_config; 9944 if (bf_get(lpfc_mbx_rd_conf_lnk_ldv, rd_config)) { 9945 phba->sli4_hba.lnk_info.lnk_dv = LPFC_LNK_DAT_VAL; 9946 phba->sli4_hba.lnk_info.lnk_tp = 9947 bf_get(lpfc_mbx_rd_conf_lnk_type, rd_config); 9948 phba->sli4_hba.lnk_info.lnk_no = 9949 bf_get(lpfc_mbx_rd_conf_lnk_numb, rd_config); 9950 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 9951 "3081 lnk_type:%d, lnk_numb:%d\n", 9952 phba->sli4_hba.lnk_info.lnk_tp, 9953 phba->sli4_hba.lnk_info.lnk_no); 9954 } else 9955 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI, 9956 "3082 Mailbox (x%x) returned ldv:x0\n", 9957 bf_get(lpfc_mqe_command, &pmb->u.mqe)); 9958 if (bf_get(lpfc_mbx_rd_conf_bbscn_def, rd_config)) { 9959 phba->bbcredit_support = 1; 9960 phba->sli4_hba.bbscn_params.word0 = rd_config->word8; 9961 } 9962 9963 fawwpn = bf_get(lpfc_mbx_rd_conf_fawwpn, rd_config); 9964 9965 if (fawwpn) { 9966 lpfc_printf_log(phba, KERN_INFO, 9967 LOG_INIT | LOG_DISCOVERY, 9968 "2702 READ_CONFIG: FA-PWWN is " 9969 "configured on\n"); 9970 phba->sli4_hba.fawwpn_flag |= LPFC_FAWWPN_CONFIG; 9971 } else { 9972 /* Clear FW configured flag, preserve driver flag */ 9973 phba->sli4_hba.fawwpn_flag &= ~LPFC_FAWWPN_CONFIG; 9974 } 9975 9976 phba->sli4_hba.conf_trunk = 9977 bf_get(lpfc_mbx_rd_conf_trunk, rd_config); 9978 phba->sli4_hba.extents_in_use = 9979 bf_get(lpfc_mbx_rd_conf_extnts_inuse, rd_config); 9980 9981 phba->sli4_hba.max_cfg_param.max_xri = 9982 bf_get(lpfc_mbx_rd_conf_xri_count, rd_config); 9983 /* Reduce resource usage in kdump environment */ 9984 if (is_kdump_kernel() && 9985 phba->sli4_hba.max_cfg_param.max_xri > 512) 9986 phba->sli4_hba.max_cfg_param.max_xri = 512; 9987 phba->sli4_hba.max_cfg_param.xri_base = 9988 bf_get(lpfc_mbx_rd_conf_xri_base, rd_config); 9989 phba->sli4_hba.max_cfg_param.max_vpi = 9990 bf_get(lpfc_mbx_rd_conf_vpi_count, rd_config); 9991 /* Limit the max we support */ 9992 if (phba->sli4_hba.max_cfg_param.max_vpi > LPFC_MAX_VPORTS) 9993 phba->sli4_hba.max_cfg_param.max_vpi = LPFC_MAX_VPORTS; 9994 phba->sli4_hba.max_cfg_param.vpi_base = 9995 bf_get(lpfc_mbx_rd_conf_vpi_base, rd_config); 9996 phba->sli4_hba.max_cfg_param.max_rpi = 9997 bf_get(lpfc_mbx_rd_conf_rpi_count, rd_config); 9998 phba->sli4_hba.max_cfg_param.rpi_base = 9999 bf_get(lpfc_mbx_rd_conf_rpi_base, rd_config); 10000 phba->sli4_hba.max_cfg_param.max_vfi = 10001 bf_get(lpfc_mbx_rd_conf_vfi_count, rd_config); 10002 phba->sli4_hba.max_cfg_param.vfi_base = 10003 bf_get(lpfc_mbx_rd_conf_vfi_base, rd_config); 10004 phba->sli4_hba.max_cfg_param.max_fcfi = 10005 bf_get(lpfc_mbx_rd_conf_fcfi_count, rd_config); 10006 phba->sli4_hba.max_cfg_param.max_eq = 10007 bf_get(lpfc_mbx_rd_conf_eq_count, rd_config); 10008 phba->sli4_hba.max_cfg_param.max_rq = 10009 bf_get(lpfc_mbx_rd_conf_rq_count, rd_config); 10010 phba->sli4_hba.max_cfg_param.max_wq = 10011 bf_get(lpfc_mbx_rd_conf_wq_count, rd_config); 10012 phba->sli4_hba.max_cfg_param.max_cq = 10013 bf_get(lpfc_mbx_rd_conf_cq_count, rd_config); 10014 phba->lmt = bf_get(lpfc_mbx_rd_conf_lmt, rd_config); 10015 phba->sli4_hba.next_xri = phba->sli4_hba.max_cfg_param.xri_base; 10016 phba->vpi_base = phba->sli4_hba.max_cfg_param.vpi_base; 10017 phba->vfi_base = phba->sli4_hba.max_cfg_param.vfi_base; 10018 phba->max_vpi = (phba->sli4_hba.max_cfg_param.max_vpi > 0) ? 10019 (phba->sli4_hba.max_cfg_param.max_vpi - 1) : 0; 10020 phba->max_vports = phba->max_vpi; 10021 10022 /* Next decide on FPIN or Signal E2E CGN support 10023 * For congestion alarms and warnings valid combination are: 10024 * 1. FPIN alarms / FPIN warnings 10025 * 2. Signal alarms / Signal warnings 10026 * 3. FPIN alarms / Signal warnings 10027 * 4. Signal alarms / FPIN warnings 10028 * 10029 * Initialize the adapter frequency to 100 mSecs 10030 */ 10031 phba->cgn_reg_fpin = LPFC_CGN_FPIN_BOTH; 10032 phba->cgn_reg_signal = EDC_CG_SIG_NOTSUPPORTED; 10033 phba->cgn_sig_freq = lpfc_fabric_cgn_frequency; 10034 10035 if (lpfc_use_cgn_signal) { 10036 if (bf_get(lpfc_mbx_rd_conf_wcs, rd_config)) { 10037 phba->cgn_reg_signal = EDC_CG_SIG_WARN_ONLY; 10038 phba->cgn_reg_fpin &= ~LPFC_CGN_FPIN_WARN; 10039 } 10040 if (bf_get(lpfc_mbx_rd_conf_acs, rd_config)) { 10041 /* MUST support both alarm and warning 10042 * because EDC does not support alarm alone. 10043 */ 10044 if (phba->cgn_reg_signal != 10045 EDC_CG_SIG_WARN_ONLY) { 10046 /* Must support both or none */ 10047 phba->cgn_reg_fpin = LPFC_CGN_FPIN_BOTH; 10048 phba->cgn_reg_signal = 10049 EDC_CG_SIG_NOTSUPPORTED; 10050 } else { 10051 phba->cgn_reg_signal = 10052 EDC_CG_SIG_WARN_ALARM; 10053 phba->cgn_reg_fpin = 10054 LPFC_CGN_FPIN_NONE; 10055 } 10056 } 10057 } 10058 10059 /* Set the congestion initial signal and fpin values. */ 10060 phba->cgn_init_reg_fpin = phba->cgn_reg_fpin; 10061 phba->cgn_init_reg_signal = phba->cgn_reg_signal; 10062 10063 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT, 10064 "6446 READ_CONFIG reg_sig x%x reg_fpin:x%x\n", 10065 phba->cgn_reg_signal, phba->cgn_reg_fpin); 10066 10067 lpfc_map_topology(phba, rd_config); 10068 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 10069 "2003 cfg params Extents? %d " 10070 "XRI(B:%d M:%d), " 10071 "VPI(B:%d M:%d) " 10072 "VFI(B:%d M:%d) " 10073 "RPI(B:%d M:%d) " 10074 "FCFI:%d EQ:%d CQ:%d WQ:%d RQ:%d lmt:x%x\n", 10075 phba->sli4_hba.extents_in_use, 10076 phba->sli4_hba.max_cfg_param.xri_base, 10077 phba->sli4_hba.max_cfg_param.max_xri, 10078 phba->sli4_hba.max_cfg_param.vpi_base, 10079 phba->sli4_hba.max_cfg_param.max_vpi, 10080 phba->sli4_hba.max_cfg_param.vfi_base, 10081 phba->sli4_hba.max_cfg_param.max_vfi, 10082 phba->sli4_hba.max_cfg_param.rpi_base, 10083 phba->sli4_hba.max_cfg_param.max_rpi, 10084 phba->sli4_hba.max_cfg_param.max_fcfi, 10085 phba->sli4_hba.max_cfg_param.max_eq, 10086 phba->sli4_hba.max_cfg_param.max_cq, 10087 phba->sli4_hba.max_cfg_param.max_wq, 10088 phba->sli4_hba.max_cfg_param.max_rq, 10089 phba->lmt); 10090 10091 /* 10092 * Calculate queue resources based on how 10093 * many WQ/CQ/EQs are available. 10094 */ 10095 qmin = phba->sli4_hba.max_cfg_param.max_wq; 10096 if (phba->sli4_hba.max_cfg_param.max_cq < qmin) 10097 qmin = phba->sli4_hba.max_cfg_param.max_cq; 10098 /* 10099 * Reserve 4 (ELS, NVME LS, MBOX, plus one extra) and 10100 * the remainder can be used for NVME / FCP. 10101 */ 10102 qmin -= 4; 10103 if (phba->sli4_hba.max_cfg_param.max_eq < qmin) 10104 qmin = phba->sli4_hba.max_cfg_param.max_eq; 10105 10106 /* Check to see if there is enough for default cfg */ 10107 if ((phba->cfg_irq_chann > qmin) || 10108 (phba->cfg_hdw_queue > qmin)) { 10109 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10110 "2005 Reducing Queues - " 10111 "FW resource limitation: " 10112 "WQ %d CQ %d EQ %d: min %d: " 10113 "IRQ %d HDWQ %d\n", 10114 phba->sli4_hba.max_cfg_param.max_wq, 10115 phba->sli4_hba.max_cfg_param.max_cq, 10116 phba->sli4_hba.max_cfg_param.max_eq, 10117 qmin, phba->cfg_irq_chann, 10118 phba->cfg_hdw_queue); 10119 10120 if (phba->cfg_irq_chann > qmin) 10121 phba->cfg_irq_chann = qmin; 10122 if (phba->cfg_hdw_queue > qmin) 10123 phba->cfg_hdw_queue = qmin; 10124 } 10125 } 10126 10127 if (rc) 10128 goto read_cfg_out; 10129 10130 /* Update link speed if forced link speed is supported */ 10131 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf); 10132 if (if_type >= LPFC_SLI_INTF_IF_TYPE_2) { 10133 forced_link_speed = 10134 bf_get(lpfc_mbx_rd_conf_link_speed, rd_config); 10135 if (forced_link_speed) { 10136 phba->hba_flag |= HBA_FORCED_LINK_SPEED; 10137 10138 switch (forced_link_speed) { 10139 case LINK_SPEED_1G: 10140 phba->cfg_link_speed = 10141 LPFC_USER_LINK_SPEED_1G; 10142 break; 10143 case LINK_SPEED_2G: 10144 phba->cfg_link_speed = 10145 LPFC_USER_LINK_SPEED_2G; 10146 break; 10147 case LINK_SPEED_4G: 10148 phba->cfg_link_speed = 10149 LPFC_USER_LINK_SPEED_4G; 10150 break; 10151 case LINK_SPEED_8G: 10152 phba->cfg_link_speed = 10153 LPFC_USER_LINK_SPEED_8G; 10154 break; 10155 case LINK_SPEED_10G: 10156 phba->cfg_link_speed = 10157 LPFC_USER_LINK_SPEED_10G; 10158 break; 10159 case LINK_SPEED_16G: 10160 phba->cfg_link_speed = 10161 LPFC_USER_LINK_SPEED_16G; 10162 break; 10163 case LINK_SPEED_32G: 10164 phba->cfg_link_speed = 10165 LPFC_USER_LINK_SPEED_32G; 10166 break; 10167 case LINK_SPEED_64G: 10168 phba->cfg_link_speed = 10169 LPFC_USER_LINK_SPEED_64G; 10170 break; 10171 case 0xffff: 10172 phba->cfg_link_speed = 10173 LPFC_USER_LINK_SPEED_AUTO; 10174 break; 10175 default: 10176 lpfc_printf_log(phba, KERN_ERR, 10177 LOG_TRACE_EVENT, 10178 "0047 Unrecognized link " 10179 "speed : %d\n", 10180 forced_link_speed); 10181 phba->cfg_link_speed = 10182 LPFC_USER_LINK_SPEED_AUTO; 10183 } 10184 } 10185 } 10186 10187 /* Reset the DFT_HBA_Q_DEPTH to the max xri */ 10188 length = phba->sli4_hba.max_cfg_param.max_xri - 10189 lpfc_sli4_get_els_iocb_cnt(phba); 10190 if (phba->cfg_hba_queue_depth > length) { 10191 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 10192 "3361 HBA queue depth changed from %d to %d\n", 10193 phba->cfg_hba_queue_depth, length); 10194 phba->cfg_hba_queue_depth = length; 10195 } 10196 10197 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) < 10198 LPFC_SLI_INTF_IF_TYPE_2) 10199 goto read_cfg_out; 10200 10201 /* get the pf# and vf# for SLI4 if_type 2 port */ 10202 length = (sizeof(struct lpfc_mbx_get_func_cfg) - 10203 sizeof(struct lpfc_sli4_cfg_mhdr)); 10204 lpfc_sli4_config(phba, pmb, LPFC_MBOX_SUBSYSTEM_COMMON, 10205 LPFC_MBOX_OPCODE_GET_FUNCTION_CONFIG, 10206 length, LPFC_SLI4_MBX_EMBED); 10207 10208 rc2 = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); 10209 shdr = (union lpfc_sli4_cfg_shdr *) 10210 &pmb->u.mqe.un.sli4_config.header.cfg_shdr; 10211 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response); 10212 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response); 10213 if (rc2 || shdr_status || shdr_add_status) { 10214 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10215 "3026 Mailbox failed , mbxCmd x%x " 10216 "GET_FUNCTION_CONFIG, mbxStatus x%x\n", 10217 bf_get(lpfc_mqe_command, &pmb->u.mqe), 10218 bf_get(lpfc_mqe_status, &pmb->u.mqe)); 10219 goto read_cfg_out; 10220 } 10221 10222 /* search for fc_fcoe resrouce descriptor */ 10223 get_func_cfg = &pmb->u.mqe.un.get_func_cfg; 10224 10225 pdesc_0 = (char *)&get_func_cfg->func_cfg.desc[0]; 10226 desc = (struct lpfc_rsrc_desc_fcfcoe *)pdesc_0; 10227 length = bf_get(lpfc_rsrc_desc_fcfcoe_length, desc); 10228 if (length == LPFC_RSRC_DESC_TYPE_FCFCOE_V0_RSVD) 10229 length = LPFC_RSRC_DESC_TYPE_FCFCOE_V0_LENGTH; 10230 else if (length != LPFC_RSRC_DESC_TYPE_FCFCOE_V1_LENGTH) 10231 goto read_cfg_out; 10232 10233 for (i = 0; i < LPFC_RSRC_DESC_MAX_NUM; i++) { 10234 desc = (struct lpfc_rsrc_desc_fcfcoe *)(pdesc_0 + length * i); 10235 if (LPFC_RSRC_DESC_TYPE_FCFCOE == 10236 bf_get(lpfc_rsrc_desc_fcfcoe_type, desc)) { 10237 phba->sli4_hba.iov.pf_number = 10238 bf_get(lpfc_rsrc_desc_fcfcoe_pfnum, desc); 10239 phba->sli4_hba.iov.vf_number = 10240 bf_get(lpfc_rsrc_desc_fcfcoe_vfnum, desc); 10241 break; 10242 } 10243 } 10244 10245 if (i < LPFC_RSRC_DESC_MAX_NUM) 10246 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 10247 "3027 GET_FUNCTION_CONFIG: pf_number:%d, " 10248 "vf_number:%d\n", phba->sli4_hba.iov.pf_number, 10249 phba->sli4_hba.iov.vf_number); 10250 else 10251 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10252 "3028 GET_FUNCTION_CONFIG: failed to find " 10253 "Resource Descriptor:x%x\n", 10254 LPFC_RSRC_DESC_TYPE_FCFCOE); 10255 10256 read_cfg_out: 10257 mempool_free(pmb, phba->mbox_mem_pool); 10258 return rc; 10259 } 10260 10261 /** 10262 * lpfc_setup_endian_order - Write endian order to an SLI4 if_type 0 port. 10263 * @phba: pointer to lpfc hba data structure. 10264 * 10265 * This routine is invoked to setup the port-side endian order when 10266 * the port if_type is 0. This routine has no function for other 10267 * if_types. 10268 * 10269 * Return codes 10270 * 0 - successful 10271 * -ENOMEM - No available memory 10272 * -EIO - The mailbox failed to complete successfully. 10273 **/ 10274 static int 10275 lpfc_setup_endian_order(struct lpfc_hba *phba) 10276 { 10277 LPFC_MBOXQ_t *mboxq; 10278 uint32_t if_type, rc = 0; 10279 uint32_t endian_mb_data[2] = {HOST_ENDIAN_LOW_WORD0, 10280 HOST_ENDIAN_HIGH_WORD1}; 10281 10282 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf); 10283 switch (if_type) { 10284 case LPFC_SLI_INTF_IF_TYPE_0: 10285 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, 10286 GFP_KERNEL); 10287 if (!mboxq) { 10288 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10289 "0492 Unable to allocate memory for " 10290 "issuing SLI_CONFIG_SPECIAL mailbox " 10291 "command\n"); 10292 return -ENOMEM; 10293 } 10294 10295 /* 10296 * The SLI4_CONFIG_SPECIAL mailbox command requires the first 10297 * two words to contain special data values and no other data. 10298 */ 10299 memset(mboxq, 0, sizeof(LPFC_MBOXQ_t)); 10300 memcpy(&mboxq->u.mqe, &endian_mb_data, sizeof(endian_mb_data)); 10301 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); 10302 if (rc != MBX_SUCCESS) { 10303 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10304 "0493 SLI_CONFIG_SPECIAL mailbox " 10305 "failed with status x%x\n", 10306 rc); 10307 rc = -EIO; 10308 } 10309 mempool_free(mboxq, phba->mbox_mem_pool); 10310 break; 10311 case LPFC_SLI_INTF_IF_TYPE_6: 10312 case LPFC_SLI_INTF_IF_TYPE_2: 10313 case LPFC_SLI_INTF_IF_TYPE_1: 10314 default: 10315 break; 10316 } 10317 return rc; 10318 } 10319 10320 /** 10321 * lpfc_sli4_queue_verify - Verify and update EQ counts 10322 * @phba: pointer to lpfc hba data structure. 10323 * 10324 * This routine is invoked to check the user settable queue counts for EQs. 10325 * After this routine is called the counts will be set to valid values that 10326 * adhere to the constraints of the system's interrupt vectors and the port's 10327 * queue resources. 10328 * 10329 * Return codes 10330 * 0 - successful 10331 * -ENOMEM - No available memory 10332 **/ 10333 static int 10334 lpfc_sli4_queue_verify(struct lpfc_hba *phba) 10335 { 10336 /* 10337 * Sanity check for configured queue parameters against the run-time 10338 * device parameters 10339 */ 10340 10341 if (phba->nvmet_support) { 10342 if (phba->cfg_hdw_queue < phba->cfg_nvmet_mrq) 10343 phba->cfg_nvmet_mrq = phba->cfg_hdw_queue; 10344 if (phba->cfg_nvmet_mrq > LPFC_NVMET_MRQ_MAX) 10345 phba->cfg_nvmet_mrq = LPFC_NVMET_MRQ_MAX; 10346 } 10347 10348 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 10349 "2574 IO channels: hdwQ %d IRQ %d MRQ: %d\n", 10350 phba->cfg_hdw_queue, phba->cfg_irq_chann, 10351 phba->cfg_nvmet_mrq); 10352 10353 /* Get EQ depth from module parameter, fake the default for now */ 10354 phba->sli4_hba.eq_esize = LPFC_EQE_SIZE_4B; 10355 phba->sli4_hba.eq_ecount = LPFC_EQE_DEF_COUNT; 10356 10357 /* Get CQ depth from module parameter, fake the default for now */ 10358 phba->sli4_hba.cq_esize = LPFC_CQE_SIZE; 10359 phba->sli4_hba.cq_ecount = LPFC_CQE_DEF_COUNT; 10360 return 0; 10361 } 10362 10363 static int 10364 lpfc_alloc_io_wq_cq(struct lpfc_hba *phba, int idx) 10365 { 10366 struct lpfc_queue *qdesc; 10367 u32 wqesize; 10368 int cpu; 10369 10370 cpu = lpfc_find_cpu_handle(phba, idx, LPFC_FIND_BY_HDWQ); 10371 /* Create Fast Path IO CQs */ 10372 if (phba->enab_exp_wqcq_pages) 10373 /* Increase the CQ size when WQEs contain an embedded cdb */ 10374 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_EXPANDED_PAGE_SIZE, 10375 phba->sli4_hba.cq_esize, 10376 LPFC_CQE_EXP_COUNT, cpu); 10377 10378 else 10379 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, 10380 phba->sli4_hba.cq_esize, 10381 phba->sli4_hba.cq_ecount, cpu); 10382 if (!qdesc) { 10383 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10384 "0499 Failed allocate fast-path IO CQ (%d)\n", 10385 idx); 10386 return 1; 10387 } 10388 qdesc->qe_valid = 1; 10389 qdesc->hdwq = idx; 10390 qdesc->chann = cpu; 10391 phba->sli4_hba.hdwq[idx].io_cq = qdesc; 10392 10393 /* Create Fast Path IO WQs */ 10394 if (phba->enab_exp_wqcq_pages) { 10395 /* Increase the WQ size when WQEs contain an embedded cdb */ 10396 wqesize = (phba->fcp_embed_io) ? 10397 LPFC_WQE128_SIZE : phba->sli4_hba.wq_esize; 10398 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_EXPANDED_PAGE_SIZE, 10399 wqesize, 10400 LPFC_WQE_EXP_COUNT, cpu); 10401 } else 10402 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, 10403 phba->sli4_hba.wq_esize, 10404 phba->sli4_hba.wq_ecount, cpu); 10405 10406 if (!qdesc) { 10407 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10408 "0503 Failed allocate fast-path IO WQ (%d)\n", 10409 idx); 10410 return 1; 10411 } 10412 qdesc->hdwq = idx; 10413 qdesc->chann = cpu; 10414 phba->sli4_hba.hdwq[idx].io_wq = qdesc; 10415 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list); 10416 return 0; 10417 } 10418 10419 /** 10420 * lpfc_sli4_queue_create - Create all the SLI4 queues 10421 * @phba: pointer to lpfc hba data structure. 10422 * 10423 * This routine is invoked to allocate all the SLI4 queues for the FCoE HBA 10424 * operation. For each SLI4 queue type, the parameters such as queue entry 10425 * count (queue depth) shall be taken from the module parameter. For now, 10426 * we just use some constant number as place holder. 10427 * 10428 * Return codes 10429 * 0 - successful 10430 * -ENOMEM - No availble memory 10431 * -EIO - The mailbox failed to complete successfully. 10432 **/ 10433 int 10434 lpfc_sli4_queue_create(struct lpfc_hba *phba) 10435 { 10436 struct lpfc_queue *qdesc; 10437 int idx, cpu, eqcpu; 10438 struct lpfc_sli4_hdw_queue *qp; 10439 struct lpfc_vector_map_info *cpup; 10440 struct lpfc_vector_map_info *eqcpup; 10441 struct lpfc_eq_intr_info *eqi; 10442 10443 /* 10444 * Create HBA Record arrays. 10445 * Both NVME and FCP will share that same vectors / EQs 10446 */ 10447 phba->sli4_hba.mq_esize = LPFC_MQE_SIZE; 10448 phba->sli4_hba.mq_ecount = LPFC_MQE_DEF_COUNT; 10449 phba->sli4_hba.wq_esize = LPFC_WQE_SIZE; 10450 phba->sli4_hba.wq_ecount = LPFC_WQE_DEF_COUNT; 10451 phba->sli4_hba.rq_esize = LPFC_RQE_SIZE; 10452 phba->sli4_hba.rq_ecount = LPFC_RQE_DEF_COUNT; 10453 phba->sli4_hba.eq_esize = LPFC_EQE_SIZE_4B; 10454 phba->sli4_hba.eq_ecount = LPFC_EQE_DEF_COUNT; 10455 phba->sli4_hba.cq_esize = LPFC_CQE_SIZE; 10456 phba->sli4_hba.cq_ecount = LPFC_CQE_DEF_COUNT; 10457 10458 if (!phba->sli4_hba.hdwq) { 10459 phba->sli4_hba.hdwq = kcalloc( 10460 phba->cfg_hdw_queue, sizeof(struct lpfc_sli4_hdw_queue), 10461 GFP_KERNEL); 10462 if (!phba->sli4_hba.hdwq) { 10463 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10464 "6427 Failed allocate memory for " 10465 "fast-path Hardware Queue array\n"); 10466 goto out_error; 10467 } 10468 /* Prepare hardware queues to take IO buffers */ 10469 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { 10470 qp = &phba->sli4_hba.hdwq[idx]; 10471 spin_lock_init(&qp->io_buf_list_get_lock); 10472 spin_lock_init(&qp->io_buf_list_put_lock); 10473 INIT_LIST_HEAD(&qp->lpfc_io_buf_list_get); 10474 INIT_LIST_HEAD(&qp->lpfc_io_buf_list_put); 10475 qp->get_io_bufs = 0; 10476 qp->put_io_bufs = 0; 10477 qp->total_io_bufs = 0; 10478 spin_lock_init(&qp->abts_io_buf_list_lock); 10479 INIT_LIST_HEAD(&qp->lpfc_abts_io_buf_list); 10480 qp->abts_scsi_io_bufs = 0; 10481 qp->abts_nvme_io_bufs = 0; 10482 INIT_LIST_HEAD(&qp->sgl_list); 10483 INIT_LIST_HEAD(&qp->cmd_rsp_buf_list); 10484 spin_lock_init(&qp->hdwq_lock); 10485 } 10486 } 10487 10488 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 10489 if (phba->nvmet_support) { 10490 phba->sli4_hba.nvmet_cqset = kcalloc( 10491 phba->cfg_nvmet_mrq, 10492 sizeof(struct lpfc_queue *), 10493 GFP_KERNEL); 10494 if (!phba->sli4_hba.nvmet_cqset) { 10495 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10496 "3121 Fail allocate memory for " 10497 "fast-path CQ set array\n"); 10498 goto out_error; 10499 } 10500 phba->sli4_hba.nvmet_mrq_hdr = kcalloc( 10501 phba->cfg_nvmet_mrq, 10502 sizeof(struct lpfc_queue *), 10503 GFP_KERNEL); 10504 if (!phba->sli4_hba.nvmet_mrq_hdr) { 10505 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10506 "3122 Fail allocate memory for " 10507 "fast-path RQ set hdr array\n"); 10508 goto out_error; 10509 } 10510 phba->sli4_hba.nvmet_mrq_data = kcalloc( 10511 phba->cfg_nvmet_mrq, 10512 sizeof(struct lpfc_queue *), 10513 GFP_KERNEL); 10514 if (!phba->sli4_hba.nvmet_mrq_data) { 10515 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10516 "3124 Fail allocate memory for " 10517 "fast-path RQ set data array\n"); 10518 goto out_error; 10519 } 10520 } 10521 } 10522 10523 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_wq_list); 10524 10525 /* Create HBA Event Queues (EQs) */ 10526 for_each_present_cpu(cpu) { 10527 /* We only want to create 1 EQ per vector, even though 10528 * multiple CPUs might be using that vector. so only 10529 * selects the CPUs that are LPFC_CPU_FIRST_IRQ. 10530 */ 10531 cpup = &phba->sli4_hba.cpu_map[cpu]; 10532 if (!(cpup->flag & LPFC_CPU_FIRST_IRQ)) 10533 continue; 10534 10535 /* Get a ptr to the Hardware Queue associated with this CPU */ 10536 qp = &phba->sli4_hba.hdwq[cpup->hdwq]; 10537 10538 /* Allocate an EQ */ 10539 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, 10540 phba->sli4_hba.eq_esize, 10541 phba->sli4_hba.eq_ecount, cpu); 10542 if (!qdesc) { 10543 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10544 "0497 Failed allocate EQ (%d)\n", 10545 cpup->hdwq); 10546 goto out_error; 10547 } 10548 qdesc->qe_valid = 1; 10549 qdesc->hdwq = cpup->hdwq; 10550 qdesc->chann = cpu; /* First CPU this EQ is affinitized to */ 10551 qdesc->last_cpu = qdesc->chann; 10552 10553 /* Save the allocated EQ in the Hardware Queue */ 10554 qp->hba_eq = qdesc; 10555 10556 eqi = per_cpu_ptr(phba->sli4_hba.eq_info, qdesc->last_cpu); 10557 list_add(&qdesc->cpu_list, &eqi->list); 10558 } 10559 10560 /* Now we need to populate the other Hardware Queues, that share 10561 * an IRQ vector, with the associated EQ ptr. 10562 */ 10563 for_each_present_cpu(cpu) { 10564 cpup = &phba->sli4_hba.cpu_map[cpu]; 10565 10566 /* Check for EQ already allocated in previous loop */ 10567 if (cpup->flag & LPFC_CPU_FIRST_IRQ) 10568 continue; 10569 10570 /* Check for multiple CPUs per hdwq */ 10571 qp = &phba->sli4_hba.hdwq[cpup->hdwq]; 10572 if (qp->hba_eq) 10573 continue; 10574 10575 /* We need to share an EQ for this hdwq */ 10576 eqcpu = lpfc_find_cpu_handle(phba, cpup->eq, LPFC_FIND_BY_EQ); 10577 eqcpup = &phba->sli4_hba.cpu_map[eqcpu]; 10578 qp->hba_eq = phba->sli4_hba.hdwq[eqcpup->hdwq].hba_eq; 10579 } 10580 10581 /* Allocate IO Path SLI4 CQ/WQs */ 10582 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { 10583 if (lpfc_alloc_io_wq_cq(phba, idx)) 10584 goto out_error; 10585 } 10586 10587 if (phba->nvmet_support) { 10588 for (idx = 0; idx < phba->cfg_nvmet_mrq; idx++) { 10589 cpu = lpfc_find_cpu_handle(phba, idx, 10590 LPFC_FIND_BY_HDWQ); 10591 qdesc = lpfc_sli4_queue_alloc(phba, 10592 LPFC_DEFAULT_PAGE_SIZE, 10593 phba->sli4_hba.cq_esize, 10594 phba->sli4_hba.cq_ecount, 10595 cpu); 10596 if (!qdesc) { 10597 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10598 "3142 Failed allocate NVME " 10599 "CQ Set (%d)\n", idx); 10600 goto out_error; 10601 } 10602 qdesc->qe_valid = 1; 10603 qdesc->hdwq = idx; 10604 qdesc->chann = cpu; 10605 phba->sli4_hba.nvmet_cqset[idx] = qdesc; 10606 } 10607 } 10608 10609 /* 10610 * Create Slow Path Completion Queues (CQs) 10611 */ 10612 10613 cpu = lpfc_find_cpu_handle(phba, 0, LPFC_FIND_BY_EQ); 10614 /* Create slow-path Mailbox Command Complete Queue */ 10615 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, 10616 phba->sli4_hba.cq_esize, 10617 phba->sli4_hba.cq_ecount, cpu); 10618 if (!qdesc) { 10619 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10620 "0500 Failed allocate slow-path mailbox CQ\n"); 10621 goto out_error; 10622 } 10623 qdesc->qe_valid = 1; 10624 phba->sli4_hba.mbx_cq = qdesc; 10625 10626 /* Create slow-path ELS Complete Queue */ 10627 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, 10628 phba->sli4_hba.cq_esize, 10629 phba->sli4_hba.cq_ecount, cpu); 10630 if (!qdesc) { 10631 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10632 "0501 Failed allocate slow-path ELS CQ\n"); 10633 goto out_error; 10634 } 10635 qdesc->qe_valid = 1; 10636 qdesc->chann = cpu; 10637 phba->sli4_hba.els_cq = qdesc; 10638 10639 10640 /* 10641 * Create Slow Path Work Queues (WQs) 10642 */ 10643 10644 /* Create Mailbox Command Queue */ 10645 10646 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, 10647 phba->sli4_hba.mq_esize, 10648 phba->sli4_hba.mq_ecount, cpu); 10649 if (!qdesc) { 10650 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10651 "0505 Failed allocate slow-path MQ\n"); 10652 goto out_error; 10653 } 10654 qdesc->chann = cpu; 10655 phba->sli4_hba.mbx_wq = qdesc; 10656 10657 /* 10658 * Create ELS Work Queues 10659 */ 10660 10661 /* Create slow-path ELS Work Queue */ 10662 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, 10663 phba->sli4_hba.wq_esize, 10664 phba->sli4_hba.wq_ecount, cpu); 10665 if (!qdesc) { 10666 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10667 "0504 Failed allocate slow-path ELS WQ\n"); 10668 goto out_error; 10669 } 10670 qdesc->chann = cpu; 10671 phba->sli4_hba.els_wq = qdesc; 10672 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list); 10673 10674 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 10675 /* Create NVME LS Complete Queue */ 10676 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, 10677 phba->sli4_hba.cq_esize, 10678 phba->sli4_hba.cq_ecount, cpu); 10679 if (!qdesc) { 10680 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10681 "6079 Failed allocate NVME LS CQ\n"); 10682 goto out_error; 10683 } 10684 qdesc->chann = cpu; 10685 qdesc->qe_valid = 1; 10686 phba->sli4_hba.nvmels_cq = qdesc; 10687 10688 /* Create NVME LS Work Queue */ 10689 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, 10690 phba->sli4_hba.wq_esize, 10691 phba->sli4_hba.wq_ecount, cpu); 10692 if (!qdesc) { 10693 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10694 "6080 Failed allocate NVME LS WQ\n"); 10695 goto out_error; 10696 } 10697 qdesc->chann = cpu; 10698 phba->sli4_hba.nvmels_wq = qdesc; 10699 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list); 10700 } 10701 10702 /* 10703 * Create Receive Queue (RQ) 10704 */ 10705 10706 /* Create Receive Queue for header */ 10707 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, 10708 phba->sli4_hba.rq_esize, 10709 phba->sli4_hba.rq_ecount, cpu); 10710 if (!qdesc) { 10711 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10712 "0506 Failed allocate receive HRQ\n"); 10713 goto out_error; 10714 } 10715 phba->sli4_hba.hdr_rq = qdesc; 10716 10717 /* Create Receive Queue for data */ 10718 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, 10719 phba->sli4_hba.rq_esize, 10720 phba->sli4_hba.rq_ecount, cpu); 10721 if (!qdesc) { 10722 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10723 "0507 Failed allocate receive DRQ\n"); 10724 goto out_error; 10725 } 10726 phba->sli4_hba.dat_rq = qdesc; 10727 10728 if ((phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) && 10729 phba->nvmet_support) { 10730 for (idx = 0; idx < phba->cfg_nvmet_mrq; idx++) { 10731 cpu = lpfc_find_cpu_handle(phba, idx, 10732 LPFC_FIND_BY_HDWQ); 10733 /* Create NVMET Receive Queue for header */ 10734 qdesc = lpfc_sli4_queue_alloc(phba, 10735 LPFC_DEFAULT_PAGE_SIZE, 10736 phba->sli4_hba.rq_esize, 10737 LPFC_NVMET_RQE_DEF_COUNT, 10738 cpu); 10739 if (!qdesc) { 10740 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10741 "3146 Failed allocate " 10742 "receive HRQ\n"); 10743 goto out_error; 10744 } 10745 qdesc->hdwq = idx; 10746 phba->sli4_hba.nvmet_mrq_hdr[idx] = qdesc; 10747 10748 /* Only needed for header of RQ pair */ 10749 qdesc->rqbp = kzalloc_node(sizeof(*qdesc->rqbp), 10750 GFP_KERNEL, 10751 cpu_to_node(cpu)); 10752 if (qdesc->rqbp == NULL) { 10753 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10754 "6131 Failed allocate " 10755 "Header RQBP\n"); 10756 goto out_error; 10757 } 10758 10759 /* Put list in known state in case driver load fails. */ 10760 INIT_LIST_HEAD(&qdesc->rqbp->rqb_buffer_list); 10761 10762 /* Create NVMET Receive Queue for data */ 10763 qdesc = lpfc_sli4_queue_alloc(phba, 10764 LPFC_DEFAULT_PAGE_SIZE, 10765 phba->sli4_hba.rq_esize, 10766 LPFC_NVMET_RQE_DEF_COUNT, 10767 cpu); 10768 if (!qdesc) { 10769 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10770 "3156 Failed allocate " 10771 "receive DRQ\n"); 10772 goto out_error; 10773 } 10774 qdesc->hdwq = idx; 10775 phba->sli4_hba.nvmet_mrq_data[idx] = qdesc; 10776 } 10777 } 10778 10779 /* Clear NVME stats */ 10780 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 10781 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { 10782 memset(&phba->sli4_hba.hdwq[idx].nvme_cstat, 0, 10783 sizeof(phba->sli4_hba.hdwq[idx].nvme_cstat)); 10784 } 10785 } 10786 10787 /* Clear SCSI stats */ 10788 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) { 10789 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { 10790 memset(&phba->sli4_hba.hdwq[idx].scsi_cstat, 0, 10791 sizeof(phba->sli4_hba.hdwq[idx].scsi_cstat)); 10792 } 10793 } 10794 10795 return 0; 10796 10797 out_error: 10798 lpfc_sli4_queue_destroy(phba); 10799 return -ENOMEM; 10800 } 10801 10802 static inline void 10803 __lpfc_sli4_release_queue(struct lpfc_queue **qp) 10804 { 10805 if (*qp != NULL) { 10806 lpfc_sli4_queue_free(*qp); 10807 *qp = NULL; 10808 } 10809 } 10810 10811 static inline void 10812 lpfc_sli4_release_queues(struct lpfc_queue ***qs, int max) 10813 { 10814 int idx; 10815 10816 if (*qs == NULL) 10817 return; 10818 10819 for (idx = 0; idx < max; idx++) 10820 __lpfc_sli4_release_queue(&(*qs)[idx]); 10821 10822 kfree(*qs); 10823 *qs = NULL; 10824 } 10825 10826 static inline void 10827 lpfc_sli4_release_hdwq(struct lpfc_hba *phba) 10828 { 10829 struct lpfc_sli4_hdw_queue *hdwq; 10830 struct lpfc_queue *eq; 10831 uint32_t idx; 10832 10833 hdwq = phba->sli4_hba.hdwq; 10834 10835 /* Loop thru all Hardware Queues */ 10836 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { 10837 /* Free the CQ/WQ corresponding to the Hardware Queue */ 10838 lpfc_sli4_queue_free(hdwq[idx].io_cq); 10839 lpfc_sli4_queue_free(hdwq[idx].io_wq); 10840 hdwq[idx].hba_eq = NULL; 10841 hdwq[idx].io_cq = NULL; 10842 hdwq[idx].io_wq = NULL; 10843 if (phba->cfg_xpsgl && !phba->nvmet_support) 10844 lpfc_free_sgl_per_hdwq(phba, &hdwq[idx]); 10845 lpfc_free_cmd_rsp_buf_per_hdwq(phba, &hdwq[idx]); 10846 } 10847 /* Loop thru all IRQ vectors */ 10848 for (idx = 0; idx < phba->cfg_irq_chann; idx++) { 10849 /* Free the EQ corresponding to the IRQ vector */ 10850 eq = phba->sli4_hba.hba_eq_hdl[idx].eq; 10851 lpfc_sli4_queue_free(eq); 10852 phba->sli4_hba.hba_eq_hdl[idx].eq = NULL; 10853 } 10854 } 10855 10856 /** 10857 * lpfc_sli4_queue_destroy - Destroy all the SLI4 queues 10858 * @phba: pointer to lpfc hba data structure. 10859 * 10860 * This routine is invoked to release all the SLI4 queues with the FCoE HBA 10861 * operation. 10862 * 10863 * Return codes 10864 * 0 - successful 10865 * -ENOMEM - No available memory 10866 * -EIO - The mailbox failed to complete successfully. 10867 **/ 10868 void 10869 lpfc_sli4_queue_destroy(struct lpfc_hba *phba) 10870 { 10871 /* 10872 * Set FREE_INIT before beginning to free the queues. 10873 * Wait until the users of queues to acknowledge to 10874 * release queues by clearing FREE_WAIT. 10875 */ 10876 spin_lock_irq(&phba->hbalock); 10877 phba->sli.sli_flag |= LPFC_QUEUE_FREE_INIT; 10878 while (phba->sli.sli_flag & LPFC_QUEUE_FREE_WAIT) { 10879 spin_unlock_irq(&phba->hbalock); 10880 msleep(20); 10881 spin_lock_irq(&phba->hbalock); 10882 } 10883 spin_unlock_irq(&phba->hbalock); 10884 10885 lpfc_sli4_cleanup_poll_list(phba); 10886 10887 /* Release HBA eqs */ 10888 if (phba->sli4_hba.hdwq) 10889 lpfc_sli4_release_hdwq(phba); 10890 10891 if (phba->nvmet_support) { 10892 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_cqset, 10893 phba->cfg_nvmet_mrq); 10894 10895 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_mrq_hdr, 10896 phba->cfg_nvmet_mrq); 10897 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_mrq_data, 10898 phba->cfg_nvmet_mrq); 10899 } 10900 10901 /* Release mailbox command work queue */ 10902 __lpfc_sli4_release_queue(&phba->sli4_hba.mbx_wq); 10903 10904 /* Release ELS work queue */ 10905 __lpfc_sli4_release_queue(&phba->sli4_hba.els_wq); 10906 10907 /* Release ELS work queue */ 10908 __lpfc_sli4_release_queue(&phba->sli4_hba.nvmels_wq); 10909 10910 /* Release unsolicited receive queue */ 10911 __lpfc_sli4_release_queue(&phba->sli4_hba.hdr_rq); 10912 __lpfc_sli4_release_queue(&phba->sli4_hba.dat_rq); 10913 10914 /* Release ELS complete queue */ 10915 __lpfc_sli4_release_queue(&phba->sli4_hba.els_cq); 10916 10917 /* Release NVME LS complete queue */ 10918 __lpfc_sli4_release_queue(&phba->sli4_hba.nvmels_cq); 10919 10920 /* Release mailbox command complete queue */ 10921 __lpfc_sli4_release_queue(&phba->sli4_hba.mbx_cq); 10922 10923 /* Everything on this list has been freed */ 10924 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_wq_list); 10925 10926 /* Done with freeing the queues */ 10927 spin_lock_irq(&phba->hbalock); 10928 phba->sli.sli_flag &= ~LPFC_QUEUE_FREE_INIT; 10929 spin_unlock_irq(&phba->hbalock); 10930 } 10931 10932 int 10933 lpfc_free_rq_buffer(struct lpfc_hba *phba, struct lpfc_queue *rq) 10934 { 10935 struct lpfc_rqb *rqbp; 10936 struct lpfc_dmabuf *h_buf; 10937 struct rqb_dmabuf *rqb_buffer; 10938 10939 rqbp = rq->rqbp; 10940 while (!list_empty(&rqbp->rqb_buffer_list)) { 10941 list_remove_head(&rqbp->rqb_buffer_list, h_buf, 10942 struct lpfc_dmabuf, list); 10943 10944 rqb_buffer = container_of(h_buf, struct rqb_dmabuf, hbuf); 10945 (rqbp->rqb_free_buffer)(phba, rqb_buffer); 10946 rqbp->buffer_count--; 10947 } 10948 return 1; 10949 } 10950 10951 static int 10952 lpfc_create_wq_cq(struct lpfc_hba *phba, struct lpfc_queue *eq, 10953 struct lpfc_queue *cq, struct lpfc_queue *wq, uint16_t *cq_map, 10954 int qidx, uint32_t qtype) 10955 { 10956 struct lpfc_sli_ring *pring; 10957 int rc; 10958 10959 if (!eq || !cq || !wq) { 10960 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10961 "6085 Fast-path %s (%d) not allocated\n", 10962 ((eq) ? ((cq) ? "WQ" : "CQ") : "EQ"), qidx); 10963 return -ENOMEM; 10964 } 10965 10966 /* create the Cq first */ 10967 rc = lpfc_cq_create(phba, cq, eq, 10968 (qtype == LPFC_MBOX) ? LPFC_MCQ : LPFC_WCQ, qtype); 10969 if (rc) { 10970 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10971 "6086 Failed setup of CQ (%d), rc = 0x%x\n", 10972 qidx, (uint32_t)rc); 10973 return rc; 10974 } 10975 10976 if (qtype != LPFC_MBOX) { 10977 /* Setup cq_map for fast lookup */ 10978 if (cq_map) 10979 *cq_map = cq->queue_id; 10980 10981 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 10982 "6087 CQ setup: cq[%d]-id=%d, parent eq[%d]-id=%d\n", 10983 qidx, cq->queue_id, qidx, eq->queue_id); 10984 10985 /* create the wq */ 10986 rc = lpfc_wq_create(phba, wq, cq, qtype); 10987 if (rc) { 10988 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10989 "4618 Fail setup fastpath WQ (%d), rc = 0x%x\n", 10990 qidx, (uint32_t)rc); 10991 /* no need to tear down cq - caller will do so */ 10992 return rc; 10993 } 10994 10995 /* Bind this CQ/WQ to the NVME ring */ 10996 pring = wq->pring; 10997 pring->sli.sli4.wqp = (void *)wq; 10998 cq->pring = pring; 10999 11000 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 11001 "2593 WQ setup: wq[%d]-id=%d assoc=%d, cq[%d]-id=%d\n", 11002 qidx, wq->queue_id, wq->assoc_qid, qidx, cq->queue_id); 11003 } else { 11004 rc = lpfc_mq_create(phba, wq, cq, LPFC_MBOX); 11005 if (rc) { 11006 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11007 "0539 Failed setup of slow-path MQ: " 11008 "rc = 0x%x\n", rc); 11009 /* no need to tear down cq - caller will do so */ 11010 return rc; 11011 } 11012 11013 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 11014 "2589 MBX MQ setup: wq-id=%d, parent cq-id=%d\n", 11015 phba->sli4_hba.mbx_wq->queue_id, 11016 phba->sli4_hba.mbx_cq->queue_id); 11017 } 11018 11019 return 0; 11020 } 11021 11022 /** 11023 * lpfc_setup_cq_lookup - Setup the CQ lookup table 11024 * @phba: pointer to lpfc hba data structure. 11025 * 11026 * This routine will populate the cq_lookup table by all 11027 * available CQ queue_id's. 11028 **/ 11029 static void 11030 lpfc_setup_cq_lookup(struct lpfc_hba *phba) 11031 { 11032 struct lpfc_queue *eq, *childq; 11033 int qidx; 11034 11035 memset(phba->sli4_hba.cq_lookup, 0, 11036 (sizeof(struct lpfc_queue *) * (phba->sli4_hba.cq_max + 1))); 11037 /* Loop thru all IRQ vectors */ 11038 for (qidx = 0; qidx < phba->cfg_irq_chann; qidx++) { 11039 /* Get the EQ corresponding to the IRQ vector */ 11040 eq = phba->sli4_hba.hba_eq_hdl[qidx].eq; 11041 if (!eq) 11042 continue; 11043 /* Loop through all CQs associated with that EQ */ 11044 list_for_each_entry(childq, &eq->child_list, list) { 11045 if (childq->queue_id > phba->sli4_hba.cq_max) 11046 continue; 11047 if (childq->subtype == LPFC_IO) 11048 phba->sli4_hba.cq_lookup[childq->queue_id] = 11049 childq; 11050 } 11051 } 11052 } 11053 11054 /** 11055 * lpfc_sli4_queue_setup - Set up all the SLI4 queues 11056 * @phba: pointer to lpfc hba data structure. 11057 * 11058 * This routine is invoked to set up all the SLI4 queues for the FCoE HBA 11059 * operation. 11060 * 11061 * Return codes 11062 * 0 - successful 11063 * -ENOMEM - No available memory 11064 * -EIO - The mailbox failed to complete successfully. 11065 **/ 11066 int 11067 lpfc_sli4_queue_setup(struct lpfc_hba *phba) 11068 { 11069 uint32_t shdr_status, shdr_add_status; 11070 union lpfc_sli4_cfg_shdr *shdr; 11071 struct lpfc_vector_map_info *cpup; 11072 struct lpfc_sli4_hdw_queue *qp; 11073 LPFC_MBOXQ_t *mboxq; 11074 int qidx, cpu; 11075 uint32_t length, usdelay; 11076 int rc = -ENOMEM; 11077 11078 /* Check for dual-ULP support */ 11079 mboxq = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 11080 if (!mboxq) { 11081 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11082 "3249 Unable to allocate memory for " 11083 "QUERY_FW_CFG mailbox command\n"); 11084 return -ENOMEM; 11085 } 11086 length = (sizeof(struct lpfc_mbx_query_fw_config) - 11087 sizeof(struct lpfc_sli4_cfg_mhdr)); 11088 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON, 11089 LPFC_MBOX_OPCODE_QUERY_FW_CFG, 11090 length, LPFC_SLI4_MBX_EMBED); 11091 11092 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); 11093 11094 shdr = (union lpfc_sli4_cfg_shdr *) 11095 &mboxq->u.mqe.un.sli4_config.header.cfg_shdr; 11096 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response); 11097 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response); 11098 if (shdr_status || shdr_add_status || rc) { 11099 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11100 "3250 QUERY_FW_CFG mailbox failed with status " 11101 "x%x add_status x%x, mbx status x%x\n", 11102 shdr_status, shdr_add_status, rc); 11103 mempool_free(mboxq, phba->mbox_mem_pool); 11104 rc = -ENXIO; 11105 goto out_error; 11106 } 11107 11108 phba->sli4_hba.fw_func_mode = 11109 mboxq->u.mqe.un.query_fw_cfg.rsp.function_mode; 11110 phba->sli4_hba.ulp0_mode = mboxq->u.mqe.un.query_fw_cfg.rsp.ulp0_mode; 11111 phba->sli4_hba.ulp1_mode = mboxq->u.mqe.un.query_fw_cfg.rsp.ulp1_mode; 11112 phba->sli4_hba.physical_port = 11113 mboxq->u.mqe.un.query_fw_cfg.rsp.physical_port; 11114 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 11115 "3251 QUERY_FW_CFG: func_mode:x%x, ulp0_mode:x%x, " 11116 "ulp1_mode:x%x\n", phba->sli4_hba.fw_func_mode, 11117 phba->sli4_hba.ulp0_mode, phba->sli4_hba.ulp1_mode); 11118 11119 mempool_free(mboxq, phba->mbox_mem_pool); 11120 11121 /* 11122 * Set up HBA Event Queues (EQs) 11123 */ 11124 qp = phba->sli4_hba.hdwq; 11125 11126 /* Set up HBA event queue */ 11127 if (!qp) { 11128 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11129 "3147 Fast-path EQs not allocated\n"); 11130 rc = -ENOMEM; 11131 goto out_error; 11132 } 11133 11134 /* Loop thru all IRQ vectors */ 11135 for (qidx = 0; qidx < phba->cfg_irq_chann; qidx++) { 11136 /* Create HBA Event Queues (EQs) in order */ 11137 for_each_present_cpu(cpu) { 11138 cpup = &phba->sli4_hba.cpu_map[cpu]; 11139 11140 /* Look for the CPU thats using that vector with 11141 * LPFC_CPU_FIRST_IRQ set. 11142 */ 11143 if (!(cpup->flag & LPFC_CPU_FIRST_IRQ)) 11144 continue; 11145 if (qidx != cpup->eq) 11146 continue; 11147 11148 /* Create an EQ for that vector */ 11149 rc = lpfc_eq_create(phba, qp[cpup->hdwq].hba_eq, 11150 phba->cfg_fcp_imax); 11151 if (rc) { 11152 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11153 "0523 Failed setup of fast-path" 11154 " EQ (%d), rc = 0x%x\n", 11155 cpup->eq, (uint32_t)rc); 11156 goto out_destroy; 11157 } 11158 11159 /* Save the EQ for that vector in the hba_eq_hdl */ 11160 phba->sli4_hba.hba_eq_hdl[cpup->eq].eq = 11161 qp[cpup->hdwq].hba_eq; 11162 11163 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 11164 "2584 HBA EQ setup: queue[%d]-id=%d\n", 11165 cpup->eq, 11166 qp[cpup->hdwq].hba_eq->queue_id); 11167 } 11168 } 11169 11170 /* Loop thru all Hardware Queues */ 11171 for (qidx = 0; qidx < phba->cfg_hdw_queue; qidx++) { 11172 cpu = lpfc_find_cpu_handle(phba, qidx, LPFC_FIND_BY_HDWQ); 11173 cpup = &phba->sli4_hba.cpu_map[cpu]; 11174 11175 /* Create the CQ/WQ corresponding to the Hardware Queue */ 11176 rc = lpfc_create_wq_cq(phba, 11177 phba->sli4_hba.hdwq[cpup->hdwq].hba_eq, 11178 qp[qidx].io_cq, 11179 qp[qidx].io_wq, 11180 &phba->sli4_hba.hdwq[qidx].io_cq_map, 11181 qidx, 11182 LPFC_IO); 11183 if (rc) { 11184 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11185 "0535 Failed to setup fastpath " 11186 "IO WQ/CQ (%d), rc = 0x%x\n", 11187 qidx, (uint32_t)rc); 11188 goto out_destroy; 11189 } 11190 } 11191 11192 /* 11193 * Set up Slow Path Complete Queues (CQs) 11194 */ 11195 11196 /* Set up slow-path MBOX CQ/MQ */ 11197 11198 if (!phba->sli4_hba.mbx_cq || !phba->sli4_hba.mbx_wq) { 11199 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11200 "0528 %s not allocated\n", 11201 phba->sli4_hba.mbx_cq ? 11202 "Mailbox WQ" : "Mailbox CQ"); 11203 rc = -ENOMEM; 11204 goto out_destroy; 11205 } 11206 11207 rc = lpfc_create_wq_cq(phba, qp[0].hba_eq, 11208 phba->sli4_hba.mbx_cq, 11209 phba->sli4_hba.mbx_wq, 11210 NULL, 0, LPFC_MBOX); 11211 if (rc) { 11212 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11213 "0529 Failed setup of mailbox WQ/CQ: rc = 0x%x\n", 11214 (uint32_t)rc); 11215 goto out_destroy; 11216 } 11217 if (phba->nvmet_support) { 11218 if (!phba->sli4_hba.nvmet_cqset) { 11219 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11220 "3165 Fast-path NVME CQ Set " 11221 "array not allocated\n"); 11222 rc = -ENOMEM; 11223 goto out_destroy; 11224 } 11225 if (phba->cfg_nvmet_mrq > 1) { 11226 rc = lpfc_cq_create_set(phba, 11227 phba->sli4_hba.nvmet_cqset, 11228 qp, 11229 LPFC_WCQ, LPFC_NVMET); 11230 if (rc) { 11231 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11232 "3164 Failed setup of NVME CQ " 11233 "Set, rc = 0x%x\n", 11234 (uint32_t)rc); 11235 goto out_destroy; 11236 } 11237 } else { 11238 /* Set up NVMET Receive Complete Queue */ 11239 rc = lpfc_cq_create(phba, phba->sli4_hba.nvmet_cqset[0], 11240 qp[0].hba_eq, 11241 LPFC_WCQ, LPFC_NVMET); 11242 if (rc) { 11243 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11244 "6089 Failed setup NVMET CQ: " 11245 "rc = 0x%x\n", (uint32_t)rc); 11246 goto out_destroy; 11247 } 11248 phba->sli4_hba.nvmet_cqset[0]->chann = 0; 11249 11250 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 11251 "6090 NVMET CQ setup: cq-id=%d, " 11252 "parent eq-id=%d\n", 11253 phba->sli4_hba.nvmet_cqset[0]->queue_id, 11254 qp[0].hba_eq->queue_id); 11255 } 11256 } 11257 11258 /* Set up slow-path ELS WQ/CQ */ 11259 if (!phba->sli4_hba.els_cq || !phba->sli4_hba.els_wq) { 11260 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11261 "0530 ELS %s not allocated\n", 11262 phba->sli4_hba.els_cq ? "WQ" : "CQ"); 11263 rc = -ENOMEM; 11264 goto out_destroy; 11265 } 11266 rc = lpfc_create_wq_cq(phba, qp[0].hba_eq, 11267 phba->sli4_hba.els_cq, 11268 phba->sli4_hba.els_wq, 11269 NULL, 0, LPFC_ELS); 11270 if (rc) { 11271 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11272 "0525 Failed setup of ELS WQ/CQ: rc = 0x%x\n", 11273 (uint32_t)rc); 11274 goto out_destroy; 11275 } 11276 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 11277 "2590 ELS WQ setup: wq-id=%d, parent cq-id=%d\n", 11278 phba->sli4_hba.els_wq->queue_id, 11279 phba->sli4_hba.els_cq->queue_id); 11280 11281 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 11282 /* Set up NVME LS Complete Queue */ 11283 if (!phba->sli4_hba.nvmels_cq || !phba->sli4_hba.nvmels_wq) { 11284 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11285 "6091 LS %s not allocated\n", 11286 phba->sli4_hba.nvmels_cq ? "WQ" : "CQ"); 11287 rc = -ENOMEM; 11288 goto out_destroy; 11289 } 11290 rc = lpfc_create_wq_cq(phba, qp[0].hba_eq, 11291 phba->sli4_hba.nvmels_cq, 11292 phba->sli4_hba.nvmels_wq, 11293 NULL, 0, LPFC_NVME_LS); 11294 if (rc) { 11295 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11296 "0526 Failed setup of NVVME LS WQ/CQ: " 11297 "rc = 0x%x\n", (uint32_t)rc); 11298 goto out_destroy; 11299 } 11300 11301 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 11302 "6096 ELS WQ setup: wq-id=%d, " 11303 "parent cq-id=%d\n", 11304 phba->sli4_hba.nvmels_wq->queue_id, 11305 phba->sli4_hba.nvmels_cq->queue_id); 11306 } 11307 11308 /* 11309 * Create NVMET Receive Queue (RQ) 11310 */ 11311 if (phba->nvmet_support) { 11312 if ((!phba->sli4_hba.nvmet_cqset) || 11313 (!phba->sli4_hba.nvmet_mrq_hdr) || 11314 (!phba->sli4_hba.nvmet_mrq_data)) { 11315 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11316 "6130 MRQ CQ Queues not " 11317 "allocated\n"); 11318 rc = -ENOMEM; 11319 goto out_destroy; 11320 } 11321 if (phba->cfg_nvmet_mrq > 1) { 11322 rc = lpfc_mrq_create(phba, 11323 phba->sli4_hba.nvmet_mrq_hdr, 11324 phba->sli4_hba.nvmet_mrq_data, 11325 phba->sli4_hba.nvmet_cqset, 11326 LPFC_NVMET); 11327 if (rc) { 11328 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11329 "6098 Failed setup of NVMET " 11330 "MRQ: rc = 0x%x\n", 11331 (uint32_t)rc); 11332 goto out_destroy; 11333 } 11334 11335 } else { 11336 rc = lpfc_rq_create(phba, 11337 phba->sli4_hba.nvmet_mrq_hdr[0], 11338 phba->sli4_hba.nvmet_mrq_data[0], 11339 phba->sli4_hba.nvmet_cqset[0], 11340 LPFC_NVMET); 11341 if (rc) { 11342 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11343 "6057 Failed setup of NVMET " 11344 "Receive Queue: rc = 0x%x\n", 11345 (uint32_t)rc); 11346 goto out_destroy; 11347 } 11348 11349 lpfc_printf_log( 11350 phba, KERN_INFO, LOG_INIT, 11351 "6099 NVMET RQ setup: hdr-rq-id=%d, " 11352 "dat-rq-id=%d parent cq-id=%d\n", 11353 phba->sli4_hba.nvmet_mrq_hdr[0]->queue_id, 11354 phba->sli4_hba.nvmet_mrq_data[0]->queue_id, 11355 phba->sli4_hba.nvmet_cqset[0]->queue_id); 11356 11357 } 11358 } 11359 11360 if (!phba->sli4_hba.hdr_rq || !phba->sli4_hba.dat_rq) { 11361 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11362 "0540 Receive Queue not allocated\n"); 11363 rc = -ENOMEM; 11364 goto out_destroy; 11365 } 11366 11367 rc = lpfc_rq_create(phba, phba->sli4_hba.hdr_rq, phba->sli4_hba.dat_rq, 11368 phba->sli4_hba.els_cq, LPFC_USOL); 11369 if (rc) { 11370 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11371 "0541 Failed setup of Receive Queue: " 11372 "rc = 0x%x\n", (uint32_t)rc); 11373 goto out_destroy; 11374 } 11375 11376 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 11377 "2592 USL RQ setup: hdr-rq-id=%d, dat-rq-id=%d " 11378 "parent cq-id=%d\n", 11379 phba->sli4_hba.hdr_rq->queue_id, 11380 phba->sli4_hba.dat_rq->queue_id, 11381 phba->sli4_hba.els_cq->queue_id); 11382 11383 if (phba->cfg_fcp_imax) 11384 usdelay = LPFC_SEC_TO_USEC / phba->cfg_fcp_imax; 11385 else 11386 usdelay = 0; 11387 11388 for (qidx = 0; qidx < phba->cfg_irq_chann; 11389 qidx += LPFC_MAX_EQ_DELAY_EQID_CNT) 11390 lpfc_modify_hba_eq_delay(phba, qidx, LPFC_MAX_EQ_DELAY_EQID_CNT, 11391 usdelay); 11392 11393 if (phba->sli4_hba.cq_max) { 11394 kfree(phba->sli4_hba.cq_lookup); 11395 phba->sli4_hba.cq_lookup = kcalloc((phba->sli4_hba.cq_max + 1), 11396 sizeof(struct lpfc_queue *), GFP_KERNEL); 11397 if (!phba->sli4_hba.cq_lookup) { 11398 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11399 "0549 Failed setup of CQ Lookup table: " 11400 "size 0x%x\n", phba->sli4_hba.cq_max); 11401 rc = -ENOMEM; 11402 goto out_destroy; 11403 } 11404 lpfc_setup_cq_lookup(phba); 11405 } 11406 return 0; 11407 11408 out_destroy: 11409 lpfc_sli4_queue_unset(phba); 11410 out_error: 11411 return rc; 11412 } 11413 11414 /** 11415 * lpfc_sli4_queue_unset - Unset all the SLI4 queues 11416 * @phba: pointer to lpfc hba data structure. 11417 * 11418 * This routine is invoked to unset all the SLI4 queues with the FCoE HBA 11419 * operation. 11420 * 11421 * Return codes 11422 * 0 - successful 11423 * -ENOMEM - No available memory 11424 * -EIO - The mailbox failed to complete successfully. 11425 **/ 11426 void 11427 lpfc_sli4_queue_unset(struct lpfc_hba *phba) 11428 { 11429 struct lpfc_sli4_hdw_queue *qp; 11430 struct lpfc_queue *eq; 11431 int qidx; 11432 11433 /* Unset mailbox command work queue */ 11434 if (phba->sli4_hba.mbx_wq) 11435 lpfc_mq_destroy(phba, phba->sli4_hba.mbx_wq); 11436 11437 /* Unset NVME LS work queue */ 11438 if (phba->sli4_hba.nvmels_wq) 11439 lpfc_wq_destroy(phba, phba->sli4_hba.nvmels_wq); 11440 11441 /* Unset ELS work queue */ 11442 if (phba->sli4_hba.els_wq) 11443 lpfc_wq_destroy(phba, phba->sli4_hba.els_wq); 11444 11445 /* Unset unsolicited receive queue */ 11446 if (phba->sli4_hba.hdr_rq) 11447 lpfc_rq_destroy(phba, phba->sli4_hba.hdr_rq, 11448 phba->sli4_hba.dat_rq); 11449 11450 /* Unset mailbox command complete queue */ 11451 if (phba->sli4_hba.mbx_cq) 11452 lpfc_cq_destroy(phba, phba->sli4_hba.mbx_cq); 11453 11454 /* Unset ELS complete queue */ 11455 if (phba->sli4_hba.els_cq) 11456 lpfc_cq_destroy(phba, phba->sli4_hba.els_cq); 11457 11458 /* Unset NVME LS complete queue */ 11459 if (phba->sli4_hba.nvmels_cq) 11460 lpfc_cq_destroy(phba, phba->sli4_hba.nvmels_cq); 11461 11462 if (phba->nvmet_support) { 11463 /* Unset NVMET MRQ queue */ 11464 if (phba->sli4_hba.nvmet_mrq_hdr) { 11465 for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++) 11466 lpfc_rq_destroy( 11467 phba, 11468 phba->sli4_hba.nvmet_mrq_hdr[qidx], 11469 phba->sli4_hba.nvmet_mrq_data[qidx]); 11470 } 11471 11472 /* Unset NVMET CQ Set complete queue */ 11473 if (phba->sli4_hba.nvmet_cqset) { 11474 for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++) 11475 lpfc_cq_destroy( 11476 phba, phba->sli4_hba.nvmet_cqset[qidx]); 11477 } 11478 } 11479 11480 /* Unset fast-path SLI4 queues */ 11481 if (phba->sli4_hba.hdwq) { 11482 /* Loop thru all Hardware Queues */ 11483 for (qidx = 0; qidx < phba->cfg_hdw_queue; qidx++) { 11484 /* Destroy the CQ/WQ corresponding to Hardware Queue */ 11485 qp = &phba->sli4_hba.hdwq[qidx]; 11486 lpfc_wq_destroy(phba, qp->io_wq); 11487 lpfc_cq_destroy(phba, qp->io_cq); 11488 } 11489 /* Loop thru all IRQ vectors */ 11490 for (qidx = 0; qidx < phba->cfg_irq_chann; qidx++) { 11491 /* Destroy the EQ corresponding to the IRQ vector */ 11492 eq = phba->sli4_hba.hba_eq_hdl[qidx].eq; 11493 lpfc_eq_destroy(phba, eq); 11494 } 11495 } 11496 11497 kfree(phba->sli4_hba.cq_lookup); 11498 phba->sli4_hba.cq_lookup = NULL; 11499 phba->sli4_hba.cq_max = 0; 11500 } 11501 11502 /** 11503 * lpfc_sli4_cq_event_pool_create - Create completion-queue event free pool 11504 * @phba: pointer to lpfc hba data structure. 11505 * 11506 * This routine is invoked to allocate and set up a pool of completion queue 11507 * events. The body of the completion queue event is a completion queue entry 11508 * CQE. For now, this pool is used for the interrupt service routine to queue 11509 * the following HBA completion queue events for the worker thread to process: 11510 * - Mailbox asynchronous events 11511 * - Receive queue completion unsolicited events 11512 * Later, this can be used for all the slow-path events. 11513 * 11514 * Return codes 11515 * 0 - successful 11516 * -ENOMEM - No available memory 11517 **/ 11518 static int 11519 lpfc_sli4_cq_event_pool_create(struct lpfc_hba *phba) 11520 { 11521 struct lpfc_cq_event *cq_event; 11522 int i; 11523 11524 for (i = 0; i < (4 * phba->sli4_hba.cq_ecount); i++) { 11525 cq_event = kmalloc(sizeof(struct lpfc_cq_event), GFP_KERNEL); 11526 if (!cq_event) 11527 goto out_pool_create_fail; 11528 list_add_tail(&cq_event->list, 11529 &phba->sli4_hba.sp_cqe_event_pool); 11530 } 11531 return 0; 11532 11533 out_pool_create_fail: 11534 lpfc_sli4_cq_event_pool_destroy(phba); 11535 return -ENOMEM; 11536 } 11537 11538 /** 11539 * lpfc_sli4_cq_event_pool_destroy - Free completion-queue event free pool 11540 * @phba: pointer to lpfc hba data structure. 11541 * 11542 * This routine is invoked to free the pool of completion queue events at 11543 * driver unload time. Note that, it is the responsibility of the driver 11544 * cleanup routine to free all the outstanding completion-queue events 11545 * allocated from this pool back into the pool before invoking this routine 11546 * to destroy the pool. 11547 **/ 11548 static void 11549 lpfc_sli4_cq_event_pool_destroy(struct lpfc_hba *phba) 11550 { 11551 struct lpfc_cq_event *cq_event, *next_cq_event; 11552 11553 list_for_each_entry_safe(cq_event, next_cq_event, 11554 &phba->sli4_hba.sp_cqe_event_pool, list) { 11555 list_del(&cq_event->list); 11556 kfree(cq_event); 11557 } 11558 } 11559 11560 /** 11561 * __lpfc_sli4_cq_event_alloc - Allocate a completion-queue event from free pool 11562 * @phba: pointer to lpfc hba data structure. 11563 * 11564 * This routine is the lock free version of the API invoked to allocate a 11565 * completion-queue event from the free pool. 11566 * 11567 * Return: Pointer to the newly allocated completion-queue event if successful 11568 * NULL otherwise. 11569 **/ 11570 struct lpfc_cq_event * 11571 __lpfc_sli4_cq_event_alloc(struct lpfc_hba *phba) 11572 { 11573 struct lpfc_cq_event *cq_event = NULL; 11574 11575 list_remove_head(&phba->sli4_hba.sp_cqe_event_pool, cq_event, 11576 struct lpfc_cq_event, list); 11577 return cq_event; 11578 } 11579 11580 /** 11581 * lpfc_sli4_cq_event_alloc - Allocate a completion-queue event from free pool 11582 * @phba: pointer to lpfc hba data structure. 11583 * 11584 * This routine is the lock version of the API invoked to allocate a 11585 * completion-queue event from the free pool. 11586 * 11587 * Return: Pointer to the newly allocated completion-queue event if successful 11588 * NULL otherwise. 11589 **/ 11590 struct lpfc_cq_event * 11591 lpfc_sli4_cq_event_alloc(struct lpfc_hba *phba) 11592 { 11593 struct lpfc_cq_event *cq_event; 11594 unsigned long iflags; 11595 11596 spin_lock_irqsave(&phba->hbalock, iflags); 11597 cq_event = __lpfc_sli4_cq_event_alloc(phba); 11598 spin_unlock_irqrestore(&phba->hbalock, iflags); 11599 return cq_event; 11600 } 11601 11602 /** 11603 * __lpfc_sli4_cq_event_release - Release a completion-queue event to free pool 11604 * @phba: pointer to lpfc hba data structure. 11605 * @cq_event: pointer to the completion queue event to be freed. 11606 * 11607 * This routine is the lock free version of the API invoked to release a 11608 * completion-queue event back into the free pool. 11609 **/ 11610 void 11611 __lpfc_sli4_cq_event_release(struct lpfc_hba *phba, 11612 struct lpfc_cq_event *cq_event) 11613 { 11614 list_add_tail(&cq_event->list, &phba->sli4_hba.sp_cqe_event_pool); 11615 } 11616 11617 /** 11618 * lpfc_sli4_cq_event_release - Release a completion-queue event to free pool 11619 * @phba: pointer to lpfc hba data structure. 11620 * @cq_event: pointer to the completion queue event to be freed. 11621 * 11622 * This routine is the lock version of the API invoked to release a 11623 * completion-queue event back into the free pool. 11624 **/ 11625 void 11626 lpfc_sli4_cq_event_release(struct lpfc_hba *phba, 11627 struct lpfc_cq_event *cq_event) 11628 { 11629 unsigned long iflags; 11630 spin_lock_irqsave(&phba->hbalock, iflags); 11631 __lpfc_sli4_cq_event_release(phba, cq_event); 11632 spin_unlock_irqrestore(&phba->hbalock, iflags); 11633 } 11634 11635 /** 11636 * lpfc_sli4_cq_event_release_all - Release all cq events to the free pool 11637 * @phba: pointer to lpfc hba data structure. 11638 * 11639 * This routine is to free all the pending completion-queue events to the 11640 * back into the free pool for device reset. 11641 **/ 11642 static void 11643 lpfc_sli4_cq_event_release_all(struct lpfc_hba *phba) 11644 { 11645 LIST_HEAD(cq_event_list); 11646 struct lpfc_cq_event *cq_event; 11647 unsigned long iflags; 11648 11649 /* Retrieve all the pending WCQEs from pending WCQE lists */ 11650 11651 /* Pending ELS XRI abort events */ 11652 spin_lock_irqsave(&phba->sli4_hba.els_xri_abrt_list_lock, iflags); 11653 list_splice_init(&phba->sli4_hba.sp_els_xri_aborted_work_queue, 11654 &cq_event_list); 11655 spin_unlock_irqrestore(&phba->sli4_hba.els_xri_abrt_list_lock, iflags); 11656 11657 /* Pending asynnc events */ 11658 spin_lock_irqsave(&phba->sli4_hba.asynce_list_lock, iflags); 11659 list_splice_init(&phba->sli4_hba.sp_asynce_work_queue, 11660 &cq_event_list); 11661 spin_unlock_irqrestore(&phba->sli4_hba.asynce_list_lock, iflags); 11662 11663 while (!list_empty(&cq_event_list)) { 11664 list_remove_head(&cq_event_list, cq_event, 11665 struct lpfc_cq_event, list); 11666 lpfc_sli4_cq_event_release(phba, cq_event); 11667 } 11668 } 11669 11670 /** 11671 * lpfc_pci_function_reset - Reset pci function. 11672 * @phba: pointer to lpfc hba data structure. 11673 * 11674 * This routine is invoked to request a PCI function reset. It will destroys 11675 * all resources assigned to the PCI function which originates this request. 11676 * 11677 * Return codes 11678 * 0 - successful 11679 * -ENOMEM - No available memory 11680 * -EIO - The mailbox failed to complete successfully. 11681 **/ 11682 int 11683 lpfc_pci_function_reset(struct lpfc_hba *phba) 11684 { 11685 LPFC_MBOXQ_t *mboxq; 11686 uint32_t rc = 0, if_type; 11687 uint32_t shdr_status, shdr_add_status; 11688 uint32_t rdy_chk; 11689 uint32_t port_reset = 0; 11690 union lpfc_sli4_cfg_shdr *shdr; 11691 struct lpfc_register reg_data; 11692 uint16_t devid; 11693 11694 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf); 11695 switch (if_type) { 11696 case LPFC_SLI_INTF_IF_TYPE_0: 11697 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, 11698 GFP_KERNEL); 11699 if (!mboxq) { 11700 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11701 "0494 Unable to allocate memory for " 11702 "issuing SLI_FUNCTION_RESET mailbox " 11703 "command\n"); 11704 return -ENOMEM; 11705 } 11706 11707 /* Setup PCI function reset mailbox-ioctl command */ 11708 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON, 11709 LPFC_MBOX_OPCODE_FUNCTION_RESET, 0, 11710 LPFC_SLI4_MBX_EMBED); 11711 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); 11712 shdr = (union lpfc_sli4_cfg_shdr *) 11713 &mboxq->u.mqe.un.sli4_config.header.cfg_shdr; 11714 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response); 11715 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, 11716 &shdr->response); 11717 mempool_free(mboxq, phba->mbox_mem_pool); 11718 if (shdr_status || shdr_add_status || rc) { 11719 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11720 "0495 SLI_FUNCTION_RESET mailbox " 11721 "failed with status x%x add_status x%x," 11722 " mbx status x%x\n", 11723 shdr_status, shdr_add_status, rc); 11724 rc = -ENXIO; 11725 } 11726 break; 11727 case LPFC_SLI_INTF_IF_TYPE_2: 11728 case LPFC_SLI_INTF_IF_TYPE_6: 11729 wait: 11730 /* 11731 * Poll the Port Status Register and wait for RDY for 11732 * up to 30 seconds. If the port doesn't respond, treat 11733 * it as an error. 11734 */ 11735 for (rdy_chk = 0; rdy_chk < 1500; rdy_chk++) { 11736 if (lpfc_readl(phba->sli4_hba.u.if_type2. 11737 STATUSregaddr, ®_data.word0)) { 11738 rc = -ENODEV; 11739 goto out; 11740 } 11741 if (bf_get(lpfc_sliport_status_rdy, ®_data)) 11742 break; 11743 msleep(20); 11744 } 11745 11746 if (!bf_get(lpfc_sliport_status_rdy, ®_data)) { 11747 phba->work_status[0] = readl( 11748 phba->sli4_hba.u.if_type2.ERR1regaddr); 11749 phba->work_status[1] = readl( 11750 phba->sli4_hba.u.if_type2.ERR2regaddr); 11751 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11752 "2890 Port not ready, port status reg " 11753 "0x%x error 1=0x%x, error 2=0x%x\n", 11754 reg_data.word0, 11755 phba->work_status[0], 11756 phba->work_status[1]); 11757 rc = -ENODEV; 11758 goto out; 11759 } 11760 11761 if (bf_get(lpfc_sliport_status_pldv, ®_data)) 11762 lpfc_pldv_detect = true; 11763 11764 if (!port_reset) { 11765 /* 11766 * Reset the port now 11767 */ 11768 reg_data.word0 = 0; 11769 bf_set(lpfc_sliport_ctrl_end, ®_data, 11770 LPFC_SLIPORT_LITTLE_ENDIAN); 11771 bf_set(lpfc_sliport_ctrl_ip, ®_data, 11772 LPFC_SLIPORT_INIT_PORT); 11773 writel(reg_data.word0, phba->sli4_hba.u.if_type2. 11774 CTRLregaddr); 11775 /* flush */ 11776 pci_read_config_word(phba->pcidev, 11777 PCI_DEVICE_ID, &devid); 11778 11779 port_reset = 1; 11780 msleep(20); 11781 goto wait; 11782 } else if (bf_get(lpfc_sliport_status_rn, ®_data)) { 11783 rc = -ENODEV; 11784 goto out; 11785 } 11786 break; 11787 11788 case LPFC_SLI_INTF_IF_TYPE_1: 11789 default: 11790 break; 11791 } 11792 11793 out: 11794 /* Catch the not-ready port failure after a port reset. */ 11795 if (rc) { 11796 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11797 "3317 HBA not functional: IP Reset Failed " 11798 "try: echo fw_reset > board_mode\n"); 11799 rc = -ENODEV; 11800 } 11801 11802 return rc; 11803 } 11804 11805 /** 11806 * lpfc_sli4_pci_mem_setup - Setup SLI4 HBA PCI memory space. 11807 * @phba: pointer to lpfc hba data structure. 11808 * 11809 * This routine is invoked to set up the PCI device memory space for device 11810 * with SLI-4 interface spec. 11811 * 11812 * Return codes 11813 * 0 - successful 11814 * other values - error 11815 **/ 11816 static int 11817 lpfc_sli4_pci_mem_setup(struct lpfc_hba *phba) 11818 { 11819 struct pci_dev *pdev = phba->pcidev; 11820 unsigned long bar0map_len, bar1map_len, bar2map_len; 11821 int error; 11822 uint32_t if_type; 11823 11824 if (!pdev) 11825 return -ENODEV; 11826 11827 /* Set the device DMA mask size */ 11828 error = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); 11829 if (error) 11830 error = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); 11831 if (error) 11832 return error; 11833 11834 /* 11835 * The BARs and register set definitions and offset locations are 11836 * dependent on the if_type. 11837 */ 11838 if (pci_read_config_dword(pdev, LPFC_SLI_INTF, 11839 &phba->sli4_hba.sli_intf.word0)) { 11840 return -ENODEV; 11841 } 11842 11843 /* There is no SLI3 failback for SLI4 devices. */ 11844 if (bf_get(lpfc_sli_intf_valid, &phba->sli4_hba.sli_intf) != 11845 LPFC_SLI_INTF_VALID) { 11846 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 11847 "2894 SLI_INTF reg contents invalid " 11848 "sli_intf reg 0x%x\n", 11849 phba->sli4_hba.sli_intf.word0); 11850 return -ENODEV; 11851 } 11852 11853 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf); 11854 /* 11855 * Get the bus address of SLI4 device Bar regions and the 11856 * number of bytes required by each mapping. The mapping of the 11857 * particular PCI BARs regions is dependent on the type of 11858 * SLI4 device. 11859 */ 11860 if (pci_resource_start(pdev, PCI_64BIT_BAR0)) { 11861 phba->pci_bar0_map = pci_resource_start(pdev, PCI_64BIT_BAR0); 11862 bar0map_len = pci_resource_len(pdev, PCI_64BIT_BAR0); 11863 11864 /* 11865 * Map SLI4 PCI Config Space Register base to a kernel virtual 11866 * addr 11867 */ 11868 phba->sli4_hba.conf_regs_memmap_p = 11869 ioremap(phba->pci_bar0_map, bar0map_len); 11870 if (!phba->sli4_hba.conf_regs_memmap_p) { 11871 dev_printk(KERN_ERR, &pdev->dev, 11872 "ioremap failed for SLI4 PCI config " 11873 "registers.\n"); 11874 return -ENODEV; 11875 } 11876 phba->pci_bar0_memmap_p = phba->sli4_hba.conf_regs_memmap_p; 11877 /* Set up BAR0 PCI config space register memory map */ 11878 lpfc_sli4_bar0_register_memmap(phba, if_type); 11879 } else { 11880 phba->pci_bar0_map = pci_resource_start(pdev, 1); 11881 bar0map_len = pci_resource_len(pdev, 1); 11882 if (if_type >= LPFC_SLI_INTF_IF_TYPE_2) { 11883 dev_printk(KERN_ERR, &pdev->dev, 11884 "FATAL - No BAR0 mapping for SLI4, if_type 2\n"); 11885 return -ENODEV; 11886 } 11887 phba->sli4_hba.conf_regs_memmap_p = 11888 ioremap(phba->pci_bar0_map, bar0map_len); 11889 if (!phba->sli4_hba.conf_regs_memmap_p) { 11890 dev_printk(KERN_ERR, &pdev->dev, 11891 "ioremap failed for SLI4 PCI config " 11892 "registers.\n"); 11893 return -ENODEV; 11894 } 11895 lpfc_sli4_bar0_register_memmap(phba, if_type); 11896 } 11897 11898 if (if_type == LPFC_SLI_INTF_IF_TYPE_0) { 11899 if (pci_resource_start(pdev, PCI_64BIT_BAR2)) { 11900 /* 11901 * Map SLI4 if type 0 HBA Control Register base to a 11902 * kernel virtual address and setup the registers. 11903 */ 11904 phba->pci_bar1_map = pci_resource_start(pdev, 11905 PCI_64BIT_BAR2); 11906 bar1map_len = pci_resource_len(pdev, PCI_64BIT_BAR2); 11907 phba->sli4_hba.ctrl_regs_memmap_p = 11908 ioremap(phba->pci_bar1_map, 11909 bar1map_len); 11910 if (!phba->sli4_hba.ctrl_regs_memmap_p) { 11911 dev_err(&pdev->dev, 11912 "ioremap failed for SLI4 HBA " 11913 "control registers.\n"); 11914 error = -ENOMEM; 11915 goto out_iounmap_conf; 11916 } 11917 phba->pci_bar2_memmap_p = 11918 phba->sli4_hba.ctrl_regs_memmap_p; 11919 lpfc_sli4_bar1_register_memmap(phba, if_type); 11920 } else { 11921 error = -ENOMEM; 11922 goto out_iounmap_conf; 11923 } 11924 } 11925 11926 if ((if_type == LPFC_SLI_INTF_IF_TYPE_6) && 11927 (pci_resource_start(pdev, PCI_64BIT_BAR2))) { 11928 /* 11929 * Map SLI4 if type 6 HBA Doorbell Register base to a kernel 11930 * virtual address and setup the registers. 11931 */ 11932 phba->pci_bar1_map = pci_resource_start(pdev, PCI_64BIT_BAR2); 11933 bar1map_len = pci_resource_len(pdev, PCI_64BIT_BAR2); 11934 phba->sli4_hba.drbl_regs_memmap_p = 11935 ioremap(phba->pci_bar1_map, bar1map_len); 11936 if (!phba->sli4_hba.drbl_regs_memmap_p) { 11937 dev_err(&pdev->dev, 11938 "ioremap failed for SLI4 HBA doorbell registers.\n"); 11939 error = -ENOMEM; 11940 goto out_iounmap_conf; 11941 } 11942 phba->pci_bar2_memmap_p = phba->sli4_hba.drbl_regs_memmap_p; 11943 lpfc_sli4_bar1_register_memmap(phba, if_type); 11944 } 11945 11946 if (if_type == LPFC_SLI_INTF_IF_TYPE_0) { 11947 if (pci_resource_start(pdev, PCI_64BIT_BAR4)) { 11948 /* 11949 * Map SLI4 if type 0 HBA Doorbell Register base to 11950 * a kernel virtual address and setup the registers. 11951 */ 11952 phba->pci_bar2_map = pci_resource_start(pdev, 11953 PCI_64BIT_BAR4); 11954 bar2map_len = pci_resource_len(pdev, PCI_64BIT_BAR4); 11955 phba->sli4_hba.drbl_regs_memmap_p = 11956 ioremap(phba->pci_bar2_map, 11957 bar2map_len); 11958 if (!phba->sli4_hba.drbl_regs_memmap_p) { 11959 dev_err(&pdev->dev, 11960 "ioremap failed for SLI4 HBA" 11961 " doorbell registers.\n"); 11962 error = -ENOMEM; 11963 goto out_iounmap_ctrl; 11964 } 11965 phba->pci_bar4_memmap_p = 11966 phba->sli4_hba.drbl_regs_memmap_p; 11967 error = lpfc_sli4_bar2_register_memmap(phba, LPFC_VF0); 11968 if (error) 11969 goto out_iounmap_all; 11970 } else { 11971 error = -ENOMEM; 11972 goto out_iounmap_all; 11973 } 11974 } 11975 11976 if (if_type == LPFC_SLI_INTF_IF_TYPE_6 && 11977 pci_resource_start(pdev, PCI_64BIT_BAR4)) { 11978 /* 11979 * Map SLI4 if type 6 HBA DPP Register base to a kernel 11980 * virtual address and setup the registers. 11981 */ 11982 phba->pci_bar2_map = pci_resource_start(pdev, PCI_64BIT_BAR4); 11983 bar2map_len = pci_resource_len(pdev, PCI_64BIT_BAR4); 11984 phba->sli4_hba.dpp_regs_memmap_p = 11985 ioremap(phba->pci_bar2_map, bar2map_len); 11986 if (!phba->sli4_hba.dpp_regs_memmap_p) { 11987 dev_err(&pdev->dev, 11988 "ioremap failed for SLI4 HBA dpp registers.\n"); 11989 error = -ENOMEM; 11990 goto out_iounmap_ctrl; 11991 } 11992 phba->pci_bar4_memmap_p = phba->sli4_hba.dpp_regs_memmap_p; 11993 } 11994 11995 /* Set up the EQ/CQ register handeling functions now */ 11996 switch (if_type) { 11997 case LPFC_SLI_INTF_IF_TYPE_0: 11998 case LPFC_SLI_INTF_IF_TYPE_2: 11999 phba->sli4_hba.sli4_eq_clr_intr = lpfc_sli4_eq_clr_intr; 12000 phba->sli4_hba.sli4_write_eq_db = lpfc_sli4_write_eq_db; 12001 phba->sli4_hba.sli4_write_cq_db = lpfc_sli4_write_cq_db; 12002 break; 12003 case LPFC_SLI_INTF_IF_TYPE_6: 12004 phba->sli4_hba.sli4_eq_clr_intr = lpfc_sli4_if6_eq_clr_intr; 12005 phba->sli4_hba.sli4_write_eq_db = lpfc_sli4_if6_write_eq_db; 12006 phba->sli4_hba.sli4_write_cq_db = lpfc_sli4_if6_write_cq_db; 12007 break; 12008 default: 12009 break; 12010 } 12011 12012 return 0; 12013 12014 out_iounmap_all: 12015 iounmap(phba->sli4_hba.drbl_regs_memmap_p); 12016 out_iounmap_ctrl: 12017 iounmap(phba->sli4_hba.ctrl_regs_memmap_p); 12018 out_iounmap_conf: 12019 iounmap(phba->sli4_hba.conf_regs_memmap_p); 12020 12021 return error; 12022 } 12023 12024 /** 12025 * lpfc_sli4_pci_mem_unset - Unset SLI4 HBA PCI memory space. 12026 * @phba: pointer to lpfc hba data structure. 12027 * 12028 * This routine is invoked to unset the PCI device memory space for device 12029 * with SLI-4 interface spec. 12030 **/ 12031 static void 12032 lpfc_sli4_pci_mem_unset(struct lpfc_hba *phba) 12033 { 12034 uint32_t if_type; 12035 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf); 12036 12037 switch (if_type) { 12038 case LPFC_SLI_INTF_IF_TYPE_0: 12039 iounmap(phba->sli4_hba.drbl_regs_memmap_p); 12040 iounmap(phba->sli4_hba.ctrl_regs_memmap_p); 12041 iounmap(phba->sli4_hba.conf_regs_memmap_p); 12042 break; 12043 case LPFC_SLI_INTF_IF_TYPE_2: 12044 iounmap(phba->sli4_hba.conf_regs_memmap_p); 12045 break; 12046 case LPFC_SLI_INTF_IF_TYPE_6: 12047 iounmap(phba->sli4_hba.drbl_regs_memmap_p); 12048 iounmap(phba->sli4_hba.conf_regs_memmap_p); 12049 if (phba->sli4_hba.dpp_regs_memmap_p) 12050 iounmap(phba->sli4_hba.dpp_regs_memmap_p); 12051 break; 12052 case LPFC_SLI_INTF_IF_TYPE_1: 12053 default: 12054 dev_printk(KERN_ERR, &phba->pcidev->dev, 12055 "FATAL - unsupported SLI4 interface type - %d\n", 12056 if_type); 12057 break; 12058 } 12059 } 12060 12061 /** 12062 * lpfc_sli_enable_msix - Enable MSI-X interrupt mode on SLI-3 device 12063 * @phba: pointer to lpfc hba data structure. 12064 * 12065 * This routine is invoked to enable the MSI-X interrupt vectors to device 12066 * with SLI-3 interface specs. 12067 * 12068 * Return codes 12069 * 0 - successful 12070 * other values - error 12071 **/ 12072 static int 12073 lpfc_sli_enable_msix(struct lpfc_hba *phba) 12074 { 12075 int rc; 12076 LPFC_MBOXQ_t *pmb; 12077 12078 /* Set up MSI-X multi-message vectors */ 12079 rc = pci_alloc_irq_vectors(phba->pcidev, 12080 LPFC_MSIX_VECTORS, LPFC_MSIX_VECTORS, PCI_IRQ_MSIX); 12081 if (rc < 0) { 12082 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 12083 "0420 PCI enable MSI-X failed (%d)\n", rc); 12084 goto vec_fail_out; 12085 } 12086 12087 /* 12088 * Assign MSI-X vectors to interrupt handlers 12089 */ 12090 12091 /* vector-0 is associated to slow-path handler */ 12092 rc = request_irq(pci_irq_vector(phba->pcidev, 0), 12093 &lpfc_sli_sp_intr_handler, 0, 12094 LPFC_SP_DRIVER_HANDLER_NAME, phba); 12095 if (rc) { 12096 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 12097 "0421 MSI-X slow-path request_irq failed " 12098 "(%d)\n", rc); 12099 goto msi_fail_out; 12100 } 12101 12102 /* vector-1 is associated to fast-path handler */ 12103 rc = request_irq(pci_irq_vector(phba->pcidev, 1), 12104 &lpfc_sli_fp_intr_handler, 0, 12105 LPFC_FP_DRIVER_HANDLER_NAME, phba); 12106 12107 if (rc) { 12108 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 12109 "0429 MSI-X fast-path request_irq failed " 12110 "(%d)\n", rc); 12111 goto irq_fail_out; 12112 } 12113 12114 /* 12115 * Configure HBA MSI-X attention conditions to messages 12116 */ 12117 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 12118 12119 if (!pmb) { 12120 rc = -ENOMEM; 12121 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 12122 "0474 Unable to allocate memory for issuing " 12123 "MBOX_CONFIG_MSI command\n"); 12124 goto mem_fail_out; 12125 } 12126 rc = lpfc_config_msi(phba, pmb); 12127 if (rc) 12128 goto mbx_fail_out; 12129 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); 12130 if (rc != MBX_SUCCESS) { 12131 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX, 12132 "0351 Config MSI mailbox command failed, " 12133 "mbxCmd x%x, mbxStatus x%x\n", 12134 pmb->u.mb.mbxCommand, pmb->u.mb.mbxStatus); 12135 goto mbx_fail_out; 12136 } 12137 12138 /* Free memory allocated for mailbox command */ 12139 mempool_free(pmb, phba->mbox_mem_pool); 12140 return rc; 12141 12142 mbx_fail_out: 12143 /* Free memory allocated for mailbox command */ 12144 mempool_free(pmb, phba->mbox_mem_pool); 12145 12146 mem_fail_out: 12147 /* free the irq already requested */ 12148 free_irq(pci_irq_vector(phba->pcidev, 1), phba); 12149 12150 irq_fail_out: 12151 /* free the irq already requested */ 12152 free_irq(pci_irq_vector(phba->pcidev, 0), phba); 12153 12154 msi_fail_out: 12155 /* Unconfigure MSI-X capability structure */ 12156 pci_free_irq_vectors(phba->pcidev); 12157 12158 vec_fail_out: 12159 return rc; 12160 } 12161 12162 /** 12163 * lpfc_sli_enable_msi - Enable MSI interrupt mode on SLI-3 device. 12164 * @phba: pointer to lpfc hba data structure. 12165 * 12166 * This routine is invoked to enable the MSI interrupt mode to device with 12167 * SLI-3 interface spec. The kernel function pci_enable_msi() is called to 12168 * enable the MSI vector. The device driver is responsible for calling the 12169 * request_irq() to register MSI vector with a interrupt the handler, which 12170 * is done in this function. 12171 * 12172 * Return codes 12173 * 0 - successful 12174 * other values - error 12175 */ 12176 static int 12177 lpfc_sli_enable_msi(struct lpfc_hba *phba) 12178 { 12179 int rc; 12180 12181 rc = pci_enable_msi(phba->pcidev); 12182 if (!rc) 12183 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 12184 "0012 PCI enable MSI mode success.\n"); 12185 else { 12186 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 12187 "0471 PCI enable MSI mode failed (%d)\n", rc); 12188 return rc; 12189 } 12190 12191 rc = request_irq(phba->pcidev->irq, lpfc_sli_intr_handler, 12192 0, LPFC_DRIVER_NAME, phba); 12193 if (rc) { 12194 pci_disable_msi(phba->pcidev); 12195 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 12196 "0478 MSI request_irq failed (%d)\n", rc); 12197 } 12198 return rc; 12199 } 12200 12201 /** 12202 * lpfc_sli_enable_intr - Enable device interrupt to SLI-3 device. 12203 * @phba: pointer to lpfc hba data structure. 12204 * @cfg_mode: Interrupt configuration mode (INTx, MSI or MSI-X). 12205 * 12206 * This routine is invoked to enable device interrupt and associate driver's 12207 * interrupt handler(s) to interrupt vector(s) to device with SLI-3 interface 12208 * spec. Depends on the interrupt mode configured to the driver, the driver 12209 * will try to fallback from the configured interrupt mode to an interrupt 12210 * mode which is supported by the platform, kernel, and device in the order 12211 * of: 12212 * MSI-X -> MSI -> IRQ. 12213 * 12214 * Return codes 12215 * 0 - successful 12216 * other values - error 12217 **/ 12218 static uint32_t 12219 lpfc_sli_enable_intr(struct lpfc_hba *phba, uint32_t cfg_mode) 12220 { 12221 uint32_t intr_mode = LPFC_INTR_ERROR; 12222 int retval; 12223 12224 /* Need to issue conf_port mbox cmd before conf_msi mbox cmd */ 12225 retval = lpfc_sli_config_port(phba, LPFC_SLI_REV3); 12226 if (retval) 12227 return intr_mode; 12228 phba->hba_flag &= ~HBA_NEEDS_CFG_PORT; 12229 12230 if (cfg_mode == 2) { 12231 /* Now, try to enable MSI-X interrupt mode */ 12232 retval = lpfc_sli_enable_msix(phba); 12233 if (!retval) { 12234 /* Indicate initialization to MSI-X mode */ 12235 phba->intr_type = MSIX; 12236 intr_mode = 2; 12237 } 12238 } 12239 12240 /* Fallback to MSI if MSI-X initialization failed */ 12241 if (cfg_mode >= 1 && phba->intr_type == NONE) { 12242 retval = lpfc_sli_enable_msi(phba); 12243 if (!retval) { 12244 /* Indicate initialization to MSI mode */ 12245 phba->intr_type = MSI; 12246 intr_mode = 1; 12247 } 12248 } 12249 12250 /* Fallback to INTx if both MSI-X/MSI initalization failed */ 12251 if (phba->intr_type == NONE) { 12252 retval = request_irq(phba->pcidev->irq, lpfc_sli_intr_handler, 12253 IRQF_SHARED, LPFC_DRIVER_NAME, phba); 12254 if (!retval) { 12255 /* Indicate initialization to INTx mode */ 12256 phba->intr_type = INTx; 12257 intr_mode = 0; 12258 } 12259 } 12260 return intr_mode; 12261 } 12262 12263 /** 12264 * lpfc_sli_disable_intr - Disable device interrupt to SLI-3 device. 12265 * @phba: pointer to lpfc hba data structure. 12266 * 12267 * This routine is invoked to disable device interrupt and disassociate the 12268 * driver's interrupt handler(s) from interrupt vector(s) to device with 12269 * SLI-3 interface spec. Depending on the interrupt mode, the driver will 12270 * release the interrupt vector(s) for the message signaled interrupt. 12271 **/ 12272 static void 12273 lpfc_sli_disable_intr(struct lpfc_hba *phba) 12274 { 12275 int nr_irqs, i; 12276 12277 if (phba->intr_type == MSIX) 12278 nr_irqs = LPFC_MSIX_VECTORS; 12279 else 12280 nr_irqs = 1; 12281 12282 for (i = 0; i < nr_irqs; i++) 12283 free_irq(pci_irq_vector(phba->pcidev, i), phba); 12284 pci_free_irq_vectors(phba->pcidev); 12285 12286 /* Reset interrupt management states */ 12287 phba->intr_type = NONE; 12288 phba->sli.slistat.sli_intr = 0; 12289 } 12290 12291 /** 12292 * lpfc_find_cpu_handle - Find the CPU that corresponds to the specified Queue 12293 * @phba: pointer to lpfc hba data structure. 12294 * @id: EQ vector index or Hardware Queue index 12295 * @match: LPFC_FIND_BY_EQ = match by EQ 12296 * LPFC_FIND_BY_HDWQ = match by Hardware Queue 12297 * Return the CPU that matches the selection criteria 12298 */ 12299 static uint16_t 12300 lpfc_find_cpu_handle(struct lpfc_hba *phba, uint16_t id, int match) 12301 { 12302 struct lpfc_vector_map_info *cpup; 12303 int cpu; 12304 12305 /* Loop through all CPUs */ 12306 for_each_present_cpu(cpu) { 12307 cpup = &phba->sli4_hba.cpu_map[cpu]; 12308 12309 /* If we are matching by EQ, there may be multiple CPUs using 12310 * using the same vector, so select the one with 12311 * LPFC_CPU_FIRST_IRQ set. 12312 */ 12313 if ((match == LPFC_FIND_BY_EQ) && 12314 (cpup->flag & LPFC_CPU_FIRST_IRQ) && 12315 (cpup->eq == id)) 12316 return cpu; 12317 12318 /* If matching by HDWQ, select the first CPU that matches */ 12319 if ((match == LPFC_FIND_BY_HDWQ) && (cpup->hdwq == id)) 12320 return cpu; 12321 } 12322 return 0; 12323 } 12324 12325 #ifdef CONFIG_X86 12326 /** 12327 * lpfc_find_hyper - Determine if the CPU map entry is hyper-threaded 12328 * @phba: pointer to lpfc hba data structure. 12329 * @cpu: CPU map index 12330 * @phys_id: CPU package physical id 12331 * @core_id: CPU core id 12332 */ 12333 static int 12334 lpfc_find_hyper(struct lpfc_hba *phba, int cpu, 12335 uint16_t phys_id, uint16_t core_id) 12336 { 12337 struct lpfc_vector_map_info *cpup; 12338 int idx; 12339 12340 for_each_present_cpu(idx) { 12341 cpup = &phba->sli4_hba.cpu_map[idx]; 12342 /* Does the cpup match the one we are looking for */ 12343 if ((cpup->phys_id == phys_id) && 12344 (cpup->core_id == core_id) && 12345 (cpu != idx)) 12346 return 1; 12347 } 12348 return 0; 12349 } 12350 #endif 12351 12352 /* 12353 * lpfc_assign_eq_map_info - Assigns eq for vector_map structure 12354 * @phba: pointer to lpfc hba data structure. 12355 * @eqidx: index for eq and irq vector 12356 * @flag: flags to set for vector_map structure 12357 * @cpu: cpu used to index vector_map structure 12358 * 12359 * The routine assigns eq info into vector_map structure 12360 */ 12361 static inline void 12362 lpfc_assign_eq_map_info(struct lpfc_hba *phba, uint16_t eqidx, uint16_t flag, 12363 unsigned int cpu) 12364 { 12365 struct lpfc_vector_map_info *cpup = &phba->sli4_hba.cpu_map[cpu]; 12366 struct lpfc_hba_eq_hdl *eqhdl = lpfc_get_eq_hdl(eqidx); 12367 12368 cpup->eq = eqidx; 12369 cpup->flag |= flag; 12370 12371 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 12372 "3336 Set Affinity: CPU %d irq %d eq %d flag x%x\n", 12373 cpu, eqhdl->irq, cpup->eq, cpup->flag); 12374 } 12375 12376 /** 12377 * lpfc_cpu_map_array_init - Initialize cpu_map structure 12378 * @phba: pointer to lpfc hba data structure. 12379 * 12380 * The routine initializes the cpu_map array structure 12381 */ 12382 static void 12383 lpfc_cpu_map_array_init(struct lpfc_hba *phba) 12384 { 12385 struct lpfc_vector_map_info *cpup; 12386 struct lpfc_eq_intr_info *eqi; 12387 int cpu; 12388 12389 for_each_possible_cpu(cpu) { 12390 cpup = &phba->sli4_hba.cpu_map[cpu]; 12391 cpup->phys_id = LPFC_VECTOR_MAP_EMPTY; 12392 cpup->core_id = LPFC_VECTOR_MAP_EMPTY; 12393 cpup->hdwq = LPFC_VECTOR_MAP_EMPTY; 12394 cpup->eq = LPFC_VECTOR_MAP_EMPTY; 12395 cpup->flag = 0; 12396 eqi = per_cpu_ptr(phba->sli4_hba.eq_info, cpu); 12397 INIT_LIST_HEAD(&eqi->list); 12398 eqi->icnt = 0; 12399 } 12400 } 12401 12402 /** 12403 * lpfc_hba_eq_hdl_array_init - Initialize hba_eq_hdl structure 12404 * @phba: pointer to lpfc hba data structure. 12405 * 12406 * The routine initializes the hba_eq_hdl array structure 12407 */ 12408 static void 12409 lpfc_hba_eq_hdl_array_init(struct lpfc_hba *phba) 12410 { 12411 struct lpfc_hba_eq_hdl *eqhdl; 12412 int i; 12413 12414 for (i = 0; i < phba->cfg_irq_chann; i++) { 12415 eqhdl = lpfc_get_eq_hdl(i); 12416 eqhdl->irq = LPFC_IRQ_EMPTY; 12417 eqhdl->phba = phba; 12418 } 12419 } 12420 12421 /** 12422 * lpfc_cpu_affinity_check - Check vector CPU affinity mappings 12423 * @phba: pointer to lpfc hba data structure. 12424 * @vectors: number of msix vectors allocated. 12425 * 12426 * The routine will figure out the CPU affinity assignment for every 12427 * MSI-X vector allocated for the HBA. 12428 * In addition, the CPU to IO channel mapping will be calculated 12429 * and the phba->sli4_hba.cpu_map array will reflect this. 12430 */ 12431 static void 12432 lpfc_cpu_affinity_check(struct lpfc_hba *phba, int vectors) 12433 { 12434 int i, cpu, idx, next_idx, new_cpu, start_cpu, first_cpu; 12435 int max_phys_id, min_phys_id; 12436 int max_core_id, min_core_id; 12437 struct lpfc_vector_map_info *cpup; 12438 struct lpfc_vector_map_info *new_cpup; 12439 #ifdef CONFIG_X86 12440 struct cpuinfo_x86 *cpuinfo; 12441 #endif 12442 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS 12443 struct lpfc_hdwq_stat *c_stat; 12444 #endif 12445 12446 max_phys_id = 0; 12447 min_phys_id = LPFC_VECTOR_MAP_EMPTY; 12448 max_core_id = 0; 12449 min_core_id = LPFC_VECTOR_MAP_EMPTY; 12450 12451 /* Update CPU map with physical id and core id of each CPU */ 12452 for_each_present_cpu(cpu) { 12453 cpup = &phba->sli4_hba.cpu_map[cpu]; 12454 #ifdef CONFIG_X86 12455 cpuinfo = &cpu_data(cpu); 12456 cpup->phys_id = cpuinfo->phys_proc_id; 12457 cpup->core_id = cpuinfo->cpu_core_id; 12458 if (lpfc_find_hyper(phba, cpu, cpup->phys_id, cpup->core_id)) 12459 cpup->flag |= LPFC_CPU_MAP_HYPER; 12460 #else 12461 /* No distinction between CPUs for other platforms */ 12462 cpup->phys_id = 0; 12463 cpup->core_id = cpu; 12464 #endif 12465 12466 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 12467 "3328 CPU %d physid %d coreid %d flag x%x\n", 12468 cpu, cpup->phys_id, cpup->core_id, cpup->flag); 12469 12470 if (cpup->phys_id > max_phys_id) 12471 max_phys_id = cpup->phys_id; 12472 if (cpup->phys_id < min_phys_id) 12473 min_phys_id = cpup->phys_id; 12474 12475 if (cpup->core_id > max_core_id) 12476 max_core_id = cpup->core_id; 12477 if (cpup->core_id < min_core_id) 12478 min_core_id = cpup->core_id; 12479 } 12480 12481 /* After looking at each irq vector assigned to this pcidev, its 12482 * possible to see that not ALL CPUs have been accounted for. 12483 * Next we will set any unassigned (unaffinitized) cpu map 12484 * entries to a IRQ on the same phys_id. 12485 */ 12486 first_cpu = cpumask_first(cpu_present_mask); 12487 start_cpu = first_cpu; 12488 12489 for_each_present_cpu(cpu) { 12490 cpup = &phba->sli4_hba.cpu_map[cpu]; 12491 12492 /* Is this CPU entry unassigned */ 12493 if (cpup->eq == LPFC_VECTOR_MAP_EMPTY) { 12494 /* Mark CPU as IRQ not assigned by the kernel */ 12495 cpup->flag |= LPFC_CPU_MAP_UNASSIGN; 12496 12497 /* If so, find a new_cpup thats on the the SAME 12498 * phys_id as cpup. start_cpu will start where we 12499 * left off so all unassigned entries don't get assgined 12500 * the IRQ of the first entry. 12501 */ 12502 new_cpu = start_cpu; 12503 for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) { 12504 new_cpup = &phba->sli4_hba.cpu_map[new_cpu]; 12505 if (!(new_cpup->flag & LPFC_CPU_MAP_UNASSIGN) && 12506 (new_cpup->eq != LPFC_VECTOR_MAP_EMPTY) && 12507 (new_cpup->phys_id == cpup->phys_id)) 12508 goto found_same; 12509 new_cpu = cpumask_next( 12510 new_cpu, cpu_present_mask); 12511 if (new_cpu == nr_cpumask_bits) 12512 new_cpu = first_cpu; 12513 } 12514 /* At this point, we leave the CPU as unassigned */ 12515 continue; 12516 found_same: 12517 /* We found a matching phys_id, so copy the IRQ info */ 12518 cpup->eq = new_cpup->eq; 12519 12520 /* Bump start_cpu to the next slot to minmize the 12521 * chance of having multiple unassigned CPU entries 12522 * selecting the same IRQ. 12523 */ 12524 start_cpu = cpumask_next(new_cpu, cpu_present_mask); 12525 if (start_cpu == nr_cpumask_bits) 12526 start_cpu = first_cpu; 12527 12528 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 12529 "3337 Set Affinity: CPU %d " 12530 "eq %d from peer cpu %d same " 12531 "phys_id (%d)\n", 12532 cpu, cpup->eq, new_cpu, 12533 cpup->phys_id); 12534 } 12535 } 12536 12537 /* Set any unassigned cpu map entries to a IRQ on any phys_id */ 12538 start_cpu = first_cpu; 12539 12540 for_each_present_cpu(cpu) { 12541 cpup = &phba->sli4_hba.cpu_map[cpu]; 12542 12543 /* Is this entry unassigned */ 12544 if (cpup->eq == LPFC_VECTOR_MAP_EMPTY) { 12545 /* Mark it as IRQ not assigned by the kernel */ 12546 cpup->flag |= LPFC_CPU_MAP_UNASSIGN; 12547 12548 /* If so, find a new_cpup thats on ANY phys_id 12549 * as the cpup. start_cpu will start where we 12550 * left off so all unassigned entries don't get 12551 * assigned the IRQ of the first entry. 12552 */ 12553 new_cpu = start_cpu; 12554 for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) { 12555 new_cpup = &phba->sli4_hba.cpu_map[new_cpu]; 12556 if (!(new_cpup->flag & LPFC_CPU_MAP_UNASSIGN) && 12557 (new_cpup->eq != LPFC_VECTOR_MAP_EMPTY)) 12558 goto found_any; 12559 new_cpu = cpumask_next( 12560 new_cpu, cpu_present_mask); 12561 if (new_cpu == nr_cpumask_bits) 12562 new_cpu = first_cpu; 12563 } 12564 /* We should never leave an entry unassigned */ 12565 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 12566 "3339 Set Affinity: CPU %d " 12567 "eq %d UNASSIGNED\n", 12568 cpup->hdwq, cpup->eq); 12569 continue; 12570 found_any: 12571 /* We found an available entry, copy the IRQ info */ 12572 cpup->eq = new_cpup->eq; 12573 12574 /* Bump start_cpu to the next slot to minmize the 12575 * chance of having multiple unassigned CPU entries 12576 * selecting the same IRQ. 12577 */ 12578 start_cpu = cpumask_next(new_cpu, cpu_present_mask); 12579 if (start_cpu == nr_cpumask_bits) 12580 start_cpu = first_cpu; 12581 12582 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 12583 "3338 Set Affinity: CPU %d " 12584 "eq %d from peer cpu %d (%d/%d)\n", 12585 cpu, cpup->eq, new_cpu, 12586 new_cpup->phys_id, new_cpup->core_id); 12587 } 12588 } 12589 12590 /* Assign hdwq indices that are unique across all cpus in the map 12591 * that are also FIRST_CPUs. 12592 */ 12593 idx = 0; 12594 for_each_present_cpu(cpu) { 12595 cpup = &phba->sli4_hba.cpu_map[cpu]; 12596 12597 /* Only FIRST IRQs get a hdwq index assignment. */ 12598 if (!(cpup->flag & LPFC_CPU_FIRST_IRQ)) 12599 continue; 12600 12601 /* 1 to 1, the first LPFC_CPU_FIRST_IRQ cpus to a unique hdwq */ 12602 cpup->hdwq = idx; 12603 idx++; 12604 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 12605 "3333 Set Affinity: CPU %d (phys %d core %d): " 12606 "hdwq %d eq %d flg x%x\n", 12607 cpu, cpup->phys_id, cpup->core_id, 12608 cpup->hdwq, cpup->eq, cpup->flag); 12609 } 12610 /* Associate a hdwq with each cpu_map entry 12611 * This will be 1 to 1 - hdwq to cpu, unless there are less 12612 * hardware queues then CPUs. For that case we will just round-robin 12613 * the available hardware queues as they get assigned to CPUs. 12614 * The next_idx is the idx from the FIRST_CPU loop above to account 12615 * for irq_chann < hdwq. The idx is used for round-robin assignments 12616 * and needs to start at 0. 12617 */ 12618 next_idx = idx; 12619 start_cpu = 0; 12620 idx = 0; 12621 for_each_present_cpu(cpu) { 12622 cpup = &phba->sli4_hba.cpu_map[cpu]; 12623 12624 /* FIRST cpus are already mapped. */ 12625 if (cpup->flag & LPFC_CPU_FIRST_IRQ) 12626 continue; 12627 12628 /* If the cfg_irq_chann < cfg_hdw_queue, set the hdwq 12629 * of the unassigned cpus to the next idx so that all 12630 * hdw queues are fully utilized. 12631 */ 12632 if (next_idx < phba->cfg_hdw_queue) { 12633 cpup->hdwq = next_idx; 12634 next_idx++; 12635 continue; 12636 } 12637 12638 /* Not a First CPU and all hdw_queues are used. Reuse a 12639 * Hardware Queue for another CPU, so be smart about it 12640 * and pick one that has its IRQ/EQ mapped to the same phys_id 12641 * (CPU package) and core_id. 12642 */ 12643 new_cpu = start_cpu; 12644 for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) { 12645 new_cpup = &phba->sli4_hba.cpu_map[new_cpu]; 12646 if (new_cpup->hdwq != LPFC_VECTOR_MAP_EMPTY && 12647 new_cpup->phys_id == cpup->phys_id && 12648 new_cpup->core_id == cpup->core_id) { 12649 goto found_hdwq; 12650 } 12651 new_cpu = cpumask_next(new_cpu, cpu_present_mask); 12652 if (new_cpu == nr_cpumask_bits) 12653 new_cpu = first_cpu; 12654 } 12655 12656 /* If we can't match both phys_id and core_id, 12657 * settle for just a phys_id match. 12658 */ 12659 new_cpu = start_cpu; 12660 for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) { 12661 new_cpup = &phba->sli4_hba.cpu_map[new_cpu]; 12662 if (new_cpup->hdwq != LPFC_VECTOR_MAP_EMPTY && 12663 new_cpup->phys_id == cpup->phys_id) 12664 goto found_hdwq; 12665 12666 new_cpu = cpumask_next(new_cpu, cpu_present_mask); 12667 if (new_cpu == nr_cpumask_bits) 12668 new_cpu = first_cpu; 12669 } 12670 12671 /* Otherwise just round robin on cfg_hdw_queue */ 12672 cpup->hdwq = idx % phba->cfg_hdw_queue; 12673 idx++; 12674 goto logit; 12675 found_hdwq: 12676 /* We found an available entry, copy the IRQ info */ 12677 start_cpu = cpumask_next(new_cpu, cpu_present_mask); 12678 if (start_cpu == nr_cpumask_bits) 12679 start_cpu = first_cpu; 12680 cpup->hdwq = new_cpup->hdwq; 12681 logit: 12682 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 12683 "3335 Set Affinity: CPU %d (phys %d core %d): " 12684 "hdwq %d eq %d flg x%x\n", 12685 cpu, cpup->phys_id, cpup->core_id, 12686 cpup->hdwq, cpup->eq, cpup->flag); 12687 } 12688 12689 /* 12690 * Initialize the cpu_map slots for not-present cpus in case 12691 * a cpu is hot-added. Perform a simple hdwq round robin assignment. 12692 */ 12693 idx = 0; 12694 for_each_possible_cpu(cpu) { 12695 cpup = &phba->sli4_hba.cpu_map[cpu]; 12696 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS 12697 c_stat = per_cpu_ptr(phba->sli4_hba.c_stat, cpu); 12698 c_stat->hdwq_no = cpup->hdwq; 12699 #endif 12700 if (cpup->hdwq != LPFC_VECTOR_MAP_EMPTY) 12701 continue; 12702 12703 cpup->hdwq = idx++ % phba->cfg_hdw_queue; 12704 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS 12705 c_stat->hdwq_no = cpup->hdwq; 12706 #endif 12707 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 12708 "3340 Set Affinity: not present " 12709 "CPU %d hdwq %d\n", 12710 cpu, cpup->hdwq); 12711 } 12712 12713 /* The cpu_map array will be used later during initialization 12714 * when EQ / CQ / WQs are allocated and configured. 12715 */ 12716 return; 12717 } 12718 12719 /** 12720 * lpfc_cpuhp_get_eq 12721 * 12722 * @phba: pointer to lpfc hba data structure. 12723 * @cpu: cpu going offline 12724 * @eqlist: eq list to append to 12725 */ 12726 static int 12727 lpfc_cpuhp_get_eq(struct lpfc_hba *phba, unsigned int cpu, 12728 struct list_head *eqlist) 12729 { 12730 const struct cpumask *maskp; 12731 struct lpfc_queue *eq; 12732 struct cpumask *tmp; 12733 u16 idx; 12734 12735 tmp = kzalloc(cpumask_size(), GFP_KERNEL); 12736 if (!tmp) 12737 return -ENOMEM; 12738 12739 for (idx = 0; idx < phba->cfg_irq_chann; idx++) { 12740 maskp = pci_irq_get_affinity(phba->pcidev, idx); 12741 if (!maskp) 12742 continue; 12743 /* 12744 * if irq is not affinitized to the cpu going 12745 * then we don't need to poll the eq attached 12746 * to it. 12747 */ 12748 if (!cpumask_and(tmp, maskp, cpumask_of(cpu))) 12749 continue; 12750 /* get the cpus that are online and are affini- 12751 * tized to this irq vector. If the count is 12752 * more than 1 then cpuhp is not going to shut- 12753 * down this vector. Since this cpu has not 12754 * gone offline yet, we need >1. 12755 */ 12756 cpumask_and(tmp, maskp, cpu_online_mask); 12757 if (cpumask_weight(tmp) > 1) 12758 continue; 12759 12760 /* Now that we have an irq to shutdown, get the eq 12761 * mapped to this irq. Note: multiple hdwq's in 12762 * the software can share an eq, but eventually 12763 * only eq will be mapped to this vector 12764 */ 12765 eq = phba->sli4_hba.hba_eq_hdl[idx].eq; 12766 list_add(&eq->_poll_list, eqlist); 12767 } 12768 kfree(tmp); 12769 return 0; 12770 } 12771 12772 static void __lpfc_cpuhp_remove(struct lpfc_hba *phba) 12773 { 12774 if (phba->sli_rev != LPFC_SLI_REV4) 12775 return; 12776 12777 cpuhp_state_remove_instance_nocalls(lpfc_cpuhp_state, 12778 &phba->cpuhp); 12779 /* 12780 * unregistering the instance doesn't stop the polling 12781 * timer. Wait for the poll timer to retire. 12782 */ 12783 synchronize_rcu(); 12784 del_timer_sync(&phba->cpuhp_poll_timer); 12785 } 12786 12787 static void lpfc_cpuhp_remove(struct lpfc_hba *phba) 12788 { 12789 if (phba->pport && (phba->pport->fc_flag & FC_OFFLINE_MODE)) 12790 return; 12791 12792 __lpfc_cpuhp_remove(phba); 12793 } 12794 12795 static void lpfc_cpuhp_add(struct lpfc_hba *phba) 12796 { 12797 if (phba->sli_rev != LPFC_SLI_REV4) 12798 return; 12799 12800 rcu_read_lock(); 12801 12802 if (!list_empty(&phba->poll_list)) 12803 mod_timer(&phba->cpuhp_poll_timer, 12804 jiffies + msecs_to_jiffies(LPFC_POLL_HB)); 12805 12806 rcu_read_unlock(); 12807 12808 cpuhp_state_add_instance_nocalls(lpfc_cpuhp_state, 12809 &phba->cpuhp); 12810 } 12811 12812 static int __lpfc_cpuhp_checks(struct lpfc_hba *phba, int *retval) 12813 { 12814 if (phba->pport->load_flag & FC_UNLOADING) { 12815 *retval = -EAGAIN; 12816 return true; 12817 } 12818 12819 if (phba->sli_rev != LPFC_SLI_REV4) { 12820 *retval = 0; 12821 return true; 12822 } 12823 12824 /* proceed with the hotplug */ 12825 return false; 12826 } 12827 12828 /** 12829 * lpfc_irq_set_aff - set IRQ affinity 12830 * @eqhdl: EQ handle 12831 * @cpu: cpu to set affinity 12832 * 12833 **/ 12834 static inline void 12835 lpfc_irq_set_aff(struct lpfc_hba_eq_hdl *eqhdl, unsigned int cpu) 12836 { 12837 cpumask_clear(&eqhdl->aff_mask); 12838 cpumask_set_cpu(cpu, &eqhdl->aff_mask); 12839 irq_set_status_flags(eqhdl->irq, IRQ_NO_BALANCING); 12840 irq_set_affinity(eqhdl->irq, &eqhdl->aff_mask); 12841 } 12842 12843 /** 12844 * lpfc_irq_clear_aff - clear IRQ affinity 12845 * @eqhdl: EQ handle 12846 * 12847 **/ 12848 static inline void 12849 lpfc_irq_clear_aff(struct lpfc_hba_eq_hdl *eqhdl) 12850 { 12851 cpumask_clear(&eqhdl->aff_mask); 12852 irq_clear_status_flags(eqhdl->irq, IRQ_NO_BALANCING); 12853 } 12854 12855 /** 12856 * lpfc_irq_rebalance - rebalances IRQ affinity according to cpuhp event 12857 * @phba: pointer to HBA context object. 12858 * @cpu: cpu going offline/online 12859 * @offline: true, cpu is going offline. false, cpu is coming online. 12860 * 12861 * If cpu is going offline, we'll try our best effort to find the next 12862 * online cpu on the phba's original_mask and migrate all offlining IRQ 12863 * affinities. 12864 * 12865 * If cpu is coming online, reaffinitize the IRQ back to the onlining cpu. 12866 * 12867 * Note: Call only if NUMA or NHT mode is enabled, otherwise rely on 12868 * PCI_IRQ_AFFINITY to auto-manage IRQ affinity. 12869 * 12870 **/ 12871 static void 12872 lpfc_irq_rebalance(struct lpfc_hba *phba, unsigned int cpu, bool offline) 12873 { 12874 struct lpfc_vector_map_info *cpup; 12875 struct cpumask *aff_mask; 12876 unsigned int cpu_select, cpu_next, idx; 12877 const struct cpumask *orig_mask; 12878 12879 if (phba->irq_chann_mode == NORMAL_MODE) 12880 return; 12881 12882 orig_mask = &phba->sli4_hba.irq_aff_mask; 12883 12884 if (!cpumask_test_cpu(cpu, orig_mask)) 12885 return; 12886 12887 cpup = &phba->sli4_hba.cpu_map[cpu]; 12888 12889 if (!(cpup->flag & LPFC_CPU_FIRST_IRQ)) 12890 return; 12891 12892 if (offline) { 12893 /* Find next online CPU on original mask */ 12894 cpu_next = cpumask_next_wrap(cpu, orig_mask, cpu, true); 12895 cpu_select = lpfc_next_online_cpu(orig_mask, cpu_next); 12896 12897 /* Found a valid CPU */ 12898 if ((cpu_select < nr_cpu_ids) && (cpu_select != cpu)) { 12899 /* Go through each eqhdl and ensure offlining 12900 * cpu aff_mask is migrated 12901 */ 12902 for (idx = 0; idx < phba->cfg_irq_chann; idx++) { 12903 aff_mask = lpfc_get_aff_mask(idx); 12904 12905 /* Migrate affinity */ 12906 if (cpumask_test_cpu(cpu, aff_mask)) 12907 lpfc_irq_set_aff(lpfc_get_eq_hdl(idx), 12908 cpu_select); 12909 } 12910 } else { 12911 /* Rely on irqbalance if no online CPUs left on NUMA */ 12912 for (idx = 0; idx < phba->cfg_irq_chann; idx++) 12913 lpfc_irq_clear_aff(lpfc_get_eq_hdl(idx)); 12914 } 12915 } else { 12916 /* Migrate affinity back to this CPU */ 12917 lpfc_irq_set_aff(lpfc_get_eq_hdl(cpup->eq), cpu); 12918 } 12919 } 12920 12921 static int lpfc_cpu_offline(unsigned int cpu, struct hlist_node *node) 12922 { 12923 struct lpfc_hba *phba = hlist_entry_safe(node, struct lpfc_hba, cpuhp); 12924 struct lpfc_queue *eq, *next; 12925 LIST_HEAD(eqlist); 12926 int retval; 12927 12928 if (!phba) { 12929 WARN_ONCE(!phba, "cpu: %u. phba:NULL", raw_smp_processor_id()); 12930 return 0; 12931 } 12932 12933 if (__lpfc_cpuhp_checks(phba, &retval)) 12934 return retval; 12935 12936 lpfc_irq_rebalance(phba, cpu, true); 12937 12938 retval = lpfc_cpuhp_get_eq(phba, cpu, &eqlist); 12939 if (retval) 12940 return retval; 12941 12942 /* start polling on these eq's */ 12943 list_for_each_entry_safe(eq, next, &eqlist, _poll_list) { 12944 list_del_init(&eq->_poll_list); 12945 lpfc_sli4_start_polling(eq); 12946 } 12947 12948 return 0; 12949 } 12950 12951 static int lpfc_cpu_online(unsigned int cpu, struct hlist_node *node) 12952 { 12953 struct lpfc_hba *phba = hlist_entry_safe(node, struct lpfc_hba, cpuhp); 12954 struct lpfc_queue *eq, *next; 12955 unsigned int n; 12956 int retval; 12957 12958 if (!phba) { 12959 WARN_ONCE(!phba, "cpu: %u. phba:NULL", raw_smp_processor_id()); 12960 return 0; 12961 } 12962 12963 if (__lpfc_cpuhp_checks(phba, &retval)) 12964 return retval; 12965 12966 lpfc_irq_rebalance(phba, cpu, false); 12967 12968 list_for_each_entry_safe(eq, next, &phba->poll_list, _poll_list) { 12969 n = lpfc_find_cpu_handle(phba, eq->hdwq, LPFC_FIND_BY_HDWQ); 12970 if (n == cpu) 12971 lpfc_sli4_stop_polling(eq); 12972 } 12973 12974 return 0; 12975 } 12976 12977 /** 12978 * lpfc_sli4_enable_msix - Enable MSI-X interrupt mode to SLI-4 device 12979 * @phba: pointer to lpfc hba data structure. 12980 * 12981 * This routine is invoked to enable the MSI-X interrupt vectors to device 12982 * with SLI-4 interface spec. It also allocates MSI-X vectors and maps them 12983 * to cpus on the system. 12984 * 12985 * When cfg_irq_numa is enabled, the adapter will only allocate vectors for 12986 * the number of cpus on the same numa node as this adapter. The vectors are 12987 * allocated without requesting OS affinity mapping. A vector will be 12988 * allocated and assigned to each online and offline cpu. If the cpu is 12989 * online, then affinity will be set to that cpu. If the cpu is offline, then 12990 * affinity will be set to the nearest peer cpu within the numa node that is 12991 * online. If there are no online cpus within the numa node, affinity is not 12992 * assigned and the OS may do as it pleases. Note: cpu vector affinity mapping 12993 * is consistent with the way cpu online/offline is handled when cfg_irq_numa is 12994 * configured. 12995 * 12996 * If numa mode is not enabled and there is more than 1 vector allocated, then 12997 * the driver relies on the managed irq interface where the OS assigns vector to 12998 * cpu affinity. The driver will then use that affinity mapping to setup its 12999 * cpu mapping table. 13000 * 13001 * Return codes 13002 * 0 - successful 13003 * other values - error 13004 **/ 13005 static int 13006 lpfc_sli4_enable_msix(struct lpfc_hba *phba) 13007 { 13008 int vectors, rc, index; 13009 char *name; 13010 const struct cpumask *aff_mask = NULL; 13011 unsigned int cpu = 0, cpu_cnt = 0, cpu_select = nr_cpu_ids; 13012 struct lpfc_vector_map_info *cpup; 13013 struct lpfc_hba_eq_hdl *eqhdl; 13014 const struct cpumask *maskp; 13015 unsigned int flags = PCI_IRQ_MSIX; 13016 13017 /* Set up MSI-X multi-message vectors */ 13018 vectors = phba->cfg_irq_chann; 13019 13020 if (phba->irq_chann_mode != NORMAL_MODE) 13021 aff_mask = &phba->sli4_hba.irq_aff_mask; 13022 13023 if (aff_mask) { 13024 cpu_cnt = cpumask_weight(aff_mask); 13025 vectors = min(phba->cfg_irq_chann, cpu_cnt); 13026 13027 /* cpu: iterates over aff_mask including offline or online 13028 * cpu_select: iterates over online aff_mask to set affinity 13029 */ 13030 cpu = cpumask_first(aff_mask); 13031 cpu_select = lpfc_next_online_cpu(aff_mask, cpu); 13032 } else { 13033 flags |= PCI_IRQ_AFFINITY; 13034 } 13035 13036 rc = pci_alloc_irq_vectors(phba->pcidev, 1, vectors, flags); 13037 if (rc < 0) { 13038 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 13039 "0484 PCI enable MSI-X failed (%d)\n", rc); 13040 goto vec_fail_out; 13041 } 13042 vectors = rc; 13043 13044 /* Assign MSI-X vectors to interrupt handlers */ 13045 for (index = 0; index < vectors; index++) { 13046 eqhdl = lpfc_get_eq_hdl(index); 13047 name = eqhdl->handler_name; 13048 memset(name, 0, LPFC_SLI4_HANDLER_NAME_SZ); 13049 snprintf(name, LPFC_SLI4_HANDLER_NAME_SZ, 13050 LPFC_DRIVER_HANDLER_NAME"%d", index); 13051 13052 eqhdl->idx = index; 13053 rc = pci_irq_vector(phba->pcidev, index); 13054 if (rc < 0) { 13055 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 13056 "0489 MSI-X fast-path (%d) " 13057 "pci_irq_vec failed (%d)\n", index, rc); 13058 goto cfg_fail_out; 13059 } 13060 eqhdl->irq = rc; 13061 13062 rc = request_irq(eqhdl->irq, &lpfc_sli4_hba_intr_handler, 0, 13063 name, eqhdl); 13064 if (rc) { 13065 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 13066 "0486 MSI-X fast-path (%d) " 13067 "request_irq failed (%d)\n", index, rc); 13068 goto cfg_fail_out; 13069 } 13070 13071 if (aff_mask) { 13072 /* If found a neighboring online cpu, set affinity */ 13073 if (cpu_select < nr_cpu_ids) 13074 lpfc_irq_set_aff(eqhdl, cpu_select); 13075 13076 /* Assign EQ to cpu_map */ 13077 lpfc_assign_eq_map_info(phba, index, 13078 LPFC_CPU_FIRST_IRQ, 13079 cpu); 13080 13081 /* Iterate to next offline or online cpu in aff_mask */ 13082 cpu = cpumask_next(cpu, aff_mask); 13083 13084 /* Find next online cpu in aff_mask to set affinity */ 13085 cpu_select = lpfc_next_online_cpu(aff_mask, cpu); 13086 } else if (vectors == 1) { 13087 cpu = cpumask_first(cpu_present_mask); 13088 lpfc_assign_eq_map_info(phba, index, LPFC_CPU_FIRST_IRQ, 13089 cpu); 13090 } else { 13091 maskp = pci_irq_get_affinity(phba->pcidev, index); 13092 13093 /* Loop through all CPUs associated with vector index */ 13094 for_each_cpu_and(cpu, maskp, cpu_present_mask) { 13095 cpup = &phba->sli4_hba.cpu_map[cpu]; 13096 13097 /* If this is the first CPU thats assigned to 13098 * this vector, set LPFC_CPU_FIRST_IRQ. 13099 * 13100 * With certain platforms its possible that irq 13101 * vectors are affinitized to all the cpu's. 13102 * This can result in each cpu_map.eq to be set 13103 * to the last vector, resulting in overwrite 13104 * of all the previous cpu_map.eq. Ensure that 13105 * each vector receives a place in cpu_map. 13106 * Later call to lpfc_cpu_affinity_check will 13107 * ensure we are nicely balanced out. 13108 */ 13109 if (cpup->eq != LPFC_VECTOR_MAP_EMPTY) 13110 continue; 13111 lpfc_assign_eq_map_info(phba, index, 13112 LPFC_CPU_FIRST_IRQ, 13113 cpu); 13114 break; 13115 } 13116 } 13117 } 13118 13119 if (vectors != phba->cfg_irq_chann) { 13120 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 13121 "3238 Reducing IO channels to match number of " 13122 "MSI-X vectors, requested %d got %d\n", 13123 phba->cfg_irq_chann, vectors); 13124 if (phba->cfg_irq_chann > vectors) 13125 phba->cfg_irq_chann = vectors; 13126 } 13127 13128 return rc; 13129 13130 cfg_fail_out: 13131 /* free the irq already requested */ 13132 for (--index; index >= 0; index--) { 13133 eqhdl = lpfc_get_eq_hdl(index); 13134 lpfc_irq_clear_aff(eqhdl); 13135 free_irq(eqhdl->irq, eqhdl); 13136 } 13137 13138 /* Unconfigure MSI-X capability structure */ 13139 pci_free_irq_vectors(phba->pcidev); 13140 13141 vec_fail_out: 13142 return rc; 13143 } 13144 13145 /** 13146 * lpfc_sli4_enable_msi - Enable MSI interrupt mode to SLI-4 device 13147 * @phba: pointer to lpfc hba data structure. 13148 * 13149 * This routine is invoked to enable the MSI interrupt mode to device with 13150 * SLI-4 interface spec. The kernel function pci_alloc_irq_vectors() is 13151 * called to enable the MSI vector. The device driver is responsible for 13152 * calling the request_irq() to register MSI vector with a interrupt the 13153 * handler, which is done in this function. 13154 * 13155 * Return codes 13156 * 0 - successful 13157 * other values - error 13158 **/ 13159 static int 13160 lpfc_sli4_enable_msi(struct lpfc_hba *phba) 13161 { 13162 int rc, index; 13163 unsigned int cpu; 13164 struct lpfc_hba_eq_hdl *eqhdl; 13165 13166 rc = pci_alloc_irq_vectors(phba->pcidev, 1, 1, 13167 PCI_IRQ_MSI | PCI_IRQ_AFFINITY); 13168 if (rc > 0) 13169 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 13170 "0487 PCI enable MSI mode success.\n"); 13171 else { 13172 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 13173 "0488 PCI enable MSI mode failed (%d)\n", rc); 13174 return rc ? rc : -1; 13175 } 13176 13177 rc = request_irq(phba->pcidev->irq, lpfc_sli4_intr_handler, 13178 0, LPFC_DRIVER_NAME, phba); 13179 if (rc) { 13180 pci_free_irq_vectors(phba->pcidev); 13181 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 13182 "0490 MSI request_irq failed (%d)\n", rc); 13183 return rc; 13184 } 13185 13186 eqhdl = lpfc_get_eq_hdl(0); 13187 rc = pci_irq_vector(phba->pcidev, 0); 13188 if (rc < 0) { 13189 pci_free_irq_vectors(phba->pcidev); 13190 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 13191 "0496 MSI pci_irq_vec failed (%d)\n", rc); 13192 return rc; 13193 } 13194 eqhdl->irq = rc; 13195 13196 cpu = cpumask_first(cpu_present_mask); 13197 lpfc_assign_eq_map_info(phba, 0, LPFC_CPU_FIRST_IRQ, cpu); 13198 13199 for (index = 0; index < phba->cfg_irq_chann; index++) { 13200 eqhdl = lpfc_get_eq_hdl(index); 13201 eqhdl->idx = index; 13202 } 13203 13204 return 0; 13205 } 13206 13207 /** 13208 * lpfc_sli4_enable_intr - Enable device interrupt to SLI-4 device 13209 * @phba: pointer to lpfc hba data structure. 13210 * @cfg_mode: Interrupt configuration mode (INTx, MSI or MSI-X). 13211 * 13212 * This routine is invoked to enable device interrupt and associate driver's 13213 * interrupt handler(s) to interrupt vector(s) to device with SLI-4 13214 * interface spec. Depends on the interrupt mode configured to the driver, 13215 * the driver will try to fallback from the configured interrupt mode to an 13216 * interrupt mode which is supported by the platform, kernel, and device in 13217 * the order of: 13218 * MSI-X -> MSI -> IRQ. 13219 * 13220 * Return codes 13221 * Interrupt mode (2, 1, 0) - successful 13222 * LPFC_INTR_ERROR - error 13223 **/ 13224 static uint32_t 13225 lpfc_sli4_enable_intr(struct lpfc_hba *phba, uint32_t cfg_mode) 13226 { 13227 uint32_t intr_mode = LPFC_INTR_ERROR; 13228 int retval, idx; 13229 13230 if (cfg_mode == 2) { 13231 /* Preparation before conf_msi mbox cmd */ 13232 retval = 0; 13233 if (!retval) { 13234 /* Now, try to enable MSI-X interrupt mode */ 13235 retval = lpfc_sli4_enable_msix(phba); 13236 if (!retval) { 13237 /* Indicate initialization to MSI-X mode */ 13238 phba->intr_type = MSIX; 13239 intr_mode = 2; 13240 } 13241 } 13242 } 13243 13244 /* Fallback to MSI if MSI-X initialization failed */ 13245 if (cfg_mode >= 1 && phba->intr_type == NONE) { 13246 retval = lpfc_sli4_enable_msi(phba); 13247 if (!retval) { 13248 /* Indicate initialization to MSI mode */ 13249 phba->intr_type = MSI; 13250 intr_mode = 1; 13251 } 13252 } 13253 13254 /* Fallback to INTx if both MSI-X/MSI initalization failed */ 13255 if (phba->intr_type == NONE) { 13256 retval = request_irq(phba->pcidev->irq, lpfc_sli4_intr_handler, 13257 IRQF_SHARED, LPFC_DRIVER_NAME, phba); 13258 if (!retval) { 13259 struct lpfc_hba_eq_hdl *eqhdl; 13260 unsigned int cpu; 13261 13262 /* Indicate initialization to INTx mode */ 13263 phba->intr_type = INTx; 13264 intr_mode = 0; 13265 13266 eqhdl = lpfc_get_eq_hdl(0); 13267 retval = pci_irq_vector(phba->pcidev, 0); 13268 if (retval < 0) { 13269 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 13270 "0502 INTR pci_irq_vec failed (%d)\n", 13271 retval); 13272 return LPFC_INTR_ERROR; 13273 } 13274 eqhdl->irq = retval; 13275 13276 cpu = cpumask_first(cpu_present_mask); 13277 lpfc_assign_eq_map_info(phba, 0, LPFC_CPU_FIRST_IRQ, 13278 cpu); 13279 for (idx = 0; idx < phba->cfg_irq_chann; idx++) { 13280 eqhdl = lpfc_get_eq_hdl(idx); 13281 eqhdl->idx = idx; 13282 } 13283 } 13284 } 13285 return intr_mode; 13286 } 13287 13288 /** 13289 * lpfc_sli4_disable_intr - Disable device interrupt to SLI-4 device 13290 * @phba: pointer to lpfc hba data structure. 13291 * 13292 * This routine is invoked to disable device interrupt and disassociate 13293 * the driver's interrupt handler(s) from interrupt vector(s) to device 13294 * with SLI-4 interface spec. Depending on the interrupt mode, the driver 13295 * will release the interrupt vector(s) for the message signaled interrupt. 13296 **/ 13297 static void 13298 lpfc_sli4_disable_intr(struct lpfc_hba *phba) 13299 { 13300 /* Disable the currently initialized interrupt mode */ 13301 if (phba->intr_type == MSIX) { 13302 int index; 13303 struct lpfc_hba_eq_hdl *eqhdl; 13304 13305 /* Free up MSI-X multi-message vectors */ 13306 for (index = 0; index < phba->cfg_irq_chann; index++) { 13307 eqhdl = lpfc_get_eq_hdl(index); 13308 lpfc_irq_clear_aff(eqhdl); 13309 free_irq(eqhdl->irq, eqhdl); 13310 } 13311 } else { 13312 free_irq(phba->pcidev->irq, phba); 13313 } 13314 13315 pci_free_irq_vectors(phba->pcidev); 13316 13317 /* Reset interrupt management states */ 13318 phba->intr_type = NONE; 13319 phba->sli.slistat.sli_intr = 0; 13320 } 13321 13322 /** 13323 * lpfc_unset_hba - Unset SLI3 hba device initialization 13324 * @phba: pointer to lpfc hba data structure. 13325 * 13326 * This routine is invoked to unset the HBA device initialization steps to 13327 * a device with SLI-3 interface spec. 13328 **/ 13329 static void 13330 lpfc_unset_hba(struct lpfc_hba *phba) 13331 { 13332 struct lpfc_vport *vport = phba->pport; 13333 struct Scsi_Host *shost = lpfc_shost_from_vport(vport); 13334 13335 spin_lock_irq(shost->host_lock); 13336 vport->load_flag |= FC_UNLOADING; 13337 spin_unlock_irq(shost->host_lock); 13338 13339 kfree(phba->vpi_bmask); 13340 kfree(phba->vpi_ids); 13341 13342 lpfc_stop_hba_timers(phba); 13343 13344 phba->pport->work_port_events = 0; 13345 13346 lpfc_sli_hba_down(phba); 13347 13348 lpfc_sli_brdrestart(phba); 13349 13350 lpfc_sli_disable_intr(phba); 13351 13352 return; 13353 } 13354 13355 /** 13356 * lpfc_sli4_xri_exchange_busy_wait - Wait for device XRI exchange busy 13357 * @phba: Pointer to HBA context object. 13358 * 13359 * This function is called in the SLI4 code path to wait for completion 13360 * of device's XRIs exchange busy. It will check the XRI exchange busy 13361 * on outstanding FCP and ELS I/Os every 10ms for up to 10 seconds; after 13362 * that, it will check the XRI exchange busy on outstanding FCP and ELS 13363 * I/Os every 30 seconds, log error message, and wait forever. Only when 13364 * all XRI exchange busy complete, the driver unload shall proceed with 13365 * invoking the function reset ioctl mailbox command to the CNA and the 13366 * the rest of the driver unload resource release. 13367 **/ 13368 static void 13369 lpfc_sli4_xri_exchange_busy_wait(struct lpfc_hba *phba) 13370 { 13371 struct lpfc_sli4_hdw_queue *qp; 13372 int idx, ccnt; 13373 int wait_time = 0; 13374 int io_xri_cmpl = 1; 13375 int nvmet_xri_cmpl = 1; 13376 int els_xri_cmpl = list_empty(&phba->sli4_hba.lpfc_abts_els_sgl_list); 13377 13378 /* Driver just aborted IOs during the hba_unset process. Pause 13379 * here to give the HBA time to complete the IO and get entries 13380 * into the abts lists. 13381 */ 13382 msleep(LPFC_XRI_EXCH_BUSY_WAIT_T1 * 5); 13383 13384 /* Wait for NVME pending IO to flush back to transport. */ 13385 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) 13386 lpfc_nvme_wait_for_io_drain(phba); 13387 13388 ccnt = 0; 13389 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { 13390 qp = &phba->sli4_hba.hdwq[idx]; 13391 io_xri_cmpl = list_empty(&qp->lpfc_abts_io_buf_list); 13392 if (!io_xri_cmpl) /* if list is NOT empty */ 13393 ccnt++; 13394 } 13395 if (ccnt) 13396 io_xri_cmpl = 0; 13397 13398 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 13399 nvmet_xri_cmpl = 13400 list_empty(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list); 13401 } 13402 13403 while (!els_xri_cmpl || !io_xri_cmpl || !nvmet_xri_cmpl) { 13404 if (wait_time > LPFC_XRI_EXCH_BUSY_WAIT_TMO) { 13405 if (!nvmet_xri_cmpl) 13406 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 13407 "6424 NVMET XRI exchange busy " 13408 "wait time: %d seconds.\n", 13409 wait_time/1000); 13410 if (!io_xri_cmpl) 13411 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 13412 "6100 IO XRI exchange busy " 13413 "wait time: %d seconds.\n", 13414 wait_time/1000); 13415 if (!els_xri_cmpl) 13416 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 13417 "2878 ELS XRI exchange busy " 13418 "wait time: %d seconds.\n", 13419 wait_time/1000); 13420 msleep(LPFC_XRI_EXCH_BUSY_WAIT_T2); 13421 wait_time += LPFC_XRI_EXCH_BUSY_WAIT_T2; 13422 } else { 13423 msleep(LPFC_XRI_EXCH_BUSY_WAIT_T1); 13424 wait_time += LPFC_XRI_EXCH_BUSY_WAIT_T1; 13425 } 13426 13427 ccnt = 0; 13428 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { 13429 qp = &phba->sli4_hba.hdwq[idx]; 13430 io_xri_cmpl = list_empty( 13431 &qp->lpfc_abts_io_buf_list); 13432 if (!io_xri_cmpl) /* if list is NOT empty */ 13433 ccnt++; 13434 } 13435 if (ccnt) 13436 io_xri_cmpl = 0; 13437 13438 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 13439 nvmet_xri_cmpl = list_empty( 13440 &phba->sli4_hba.lpfc_abts_nvmet_ctx_list); 13441 } 13442 els_xri_cmpl = 13443 list_empty(&phba->sli4_hba.lpfc_abts_els_sgl_list); 13444 13445 } 13446 } 13447 13448 /** 13449 * lpfc_sli4_hba_unset - Unset the fcoe hba 13450 * @phba: Pointer to HBA context object. 13451 * 13452 * This function is called in the SLI4 code path to reset the HBA's FCoE 13453 * function. The caller is not required to hold any lock. This routine 13454 * issues PCI function reset mailbox command to reset the FCoE function. 13455 * At the end of the function, it calls lpfc_hba_down_post function to 13456 * free any pending commands. 13457 **/ 13458 static void 13459 lpfc_sli4_hba_unset(struct lpfc_hba *phba) 13460 { 13461 int wait_cnt = 0; 13462 LPFC_MBOXQ_t *mboxq; 13463 struct pci_dev *pdev = phba->pcidev; 13464 13465 lpfc_stop_hba_timers(phba); 13466 hrtimer_cancel(&phba->cmf_timer); 13467 13468 if (phba->pport) 13469 phba->sli4_hba.intr_enable = 0; 13470 13471 /* 13472 * Gracefully wait out the potential current outstanding asynchronous 13473 * mailbox command. 13474 */ 13475 13476 /* First, block any pending async mailbox command from posted */ 13477 spin_lock_irq(&phba->hbalock); 13478 phba->sli.sli_flag |= LPFC_SLI_ASYNC_MBX_BLK; 13479 spin_unlock_irq(&phba->hbalock); 13480 /* Now, trying to wait it out if we can */ 13481 while (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) { 13482 msleep(10); 13483 if (++wait_cnt > LPFC_ACTIVE_MBOX_WAIT_CNT) 13484 break; 13485 } 13486 /* Forcefully release the outstanding mailbox command if timed out */ 13487 if (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) { 13488 spin_lock_irq(&phba->hbalock); 13489 mboxq = phba->sli.mbox_active; 13490 mboxq->u.mb.mbxStatus = MBX_NOT_FINISHED; 13491 __lpfc_mbox_cmpl_put(phba, mboxq); 13492 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE; 13493 phba->sli.mbox_active = NULL; 13494 spin_unlock_irq(&phba->hbalock); 13495 } 13496 13497 /* Abort all iocbs associated with the hba */ 13498 lpfc_sli_hba_iocb_abort(phba); 13499 13500 if (!pci_channel_offline(phba->pcidev)) 13501 /* Wait for completion of device XRI exchange busy */ 13502 lpfc_sli4_xri_exchange_busy_wait(phba); 13503 13504 /* per-phba callback de-registration for hotplug event */ 13505 if (phba->pport) 13506 lpfc_cpuhp_remove(phba); 13507 13508 /* Disable PCI subsystem interrupt */ 13509 lpfc_sli4_disable_intr(phba); 13510 13511 /* Disable SR-IOV if enabled */ 13512 if (phba->cfg_sriov_nr_virtfn) 13513 pci_disable_sriov(pdev); 13514 13515 /* Stop kthread signal shall trigger work_done one more time */ 13516 kthread_stop(phba->worker_thread); 13517 13518 /* Disable FW logging to host memory */ 13519 lpfc_ras_stop_fwlog(phba); 13520 13521 /* Reset SLI4 HBA FCoE function */ 13522 lpfc_pci_function_reset(phba); 13523 13524 /* release all queue allocated resources. */ 13525 lpfc_sli4_queue_destroy(phba); 13526 13527 /* Free RAS DMA memory */ 13528 if (phba->ras_fwlog.ras_enabled) 13529 lpfc_sli4_ras_dma_free(phba); 13530 13531 /* Stop the SLI4 device port */ 13532 if (phba->pport) 13533 phba->pport->work_port_events = 0; 13534 } 13535 13536 static uint32_t 13537 lpfc_cgn_crc32(uint32_t crc, u8 byte) 13538 { 13539 uint32_t msb = 0; 13540 uint32_t bit; 13541 13542 for (bit = 0; bit < 8; bit++) { 13543 msb = (crc >> 31) & 1; 13544 crc <<= 1; 13545 13546 if (msb ^ (byte & 1)) { 13547 crc ^= LPFC_CGN_CRC32_MAGIC_NUMBER; 13548 crc |= 1; 13549 } 13550 byte >>= 1; 13551 } 13552 return crc; 13553 } 13554 13555 static uint32_t 13556 lpfc_cgn_reverse_bits(uint32_t wd) 13557 { 13558 uint32_t result = 0; 13559 uint32_t i; 13560 13561 for (i = 0; i < 32; i++) { 13562 result <<= 1; 13563 result |= (1 & (wd >> i)); 13564 } 13565 return result; 13566 } 13567 13568 /* 13569 * The routine corresponds with the algorithm the HBA firmware 13570 * uses to validate the data integrity. 13571 */ 13572 uint32_t 13573 lpfc_cgn_calc_crc32(void *ptr, uint32_t byteLen, uint32_t crc) 13574 { 13575 uint32_t i; 13576 uint32_t result; 13577 uint8_t *data = (uint8_t *)ptr; 13578 13579 for (i = 0; i < byteLen; ++i) 13580 crc = lpfc_cgn_crc32(crc, data[i]); 13581 13582 result = ~lpfc_cgn_reverse_bits(crc); 13583 return result; 13584 } 13585 13586 void 13587 lpfc_init_congestion_buf(struct lpfc_hba *phba) 13588 { 13589 struct lpfc_cgn_info *cp; 13590 struct timespec64 cmpl_time; 13591 struct tm broken; 13592 uint16_t size; 13593 uint32_t crc; 13594 13595 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT, 13596 "6235 INIT Congestion Buffer %p\n", phba->cgn_i); 13597 13598 if (!phba->cgn_i) 13599 return; 13600 cp = (struct lpfc_cgn_info *)phba->cgn_i->virt; 13601 13602 atomic_set(&phba->cgn_fabric_warn_cnt, 0); 13603 atomic_set(&phba->cgn_fabric_alarm_cnt, 0); 13604 atomic_set(&phba->cgn_sync_alarm_cnt, 0); 13605 atomic_set(&phba->cgn_sync_warn_cnt, 0); 13606 13607 atomic_set(&phba->cgn_driver_evt_cnt, 0); 13608 atomic_set(&phba->cgn_latency_evt_cnt, 0); 13609 atomic64_set(&phba->cgn_latency_evt, 0); 13610 phba->cgn_evt_minute = 0; 13611 phba->hba_flag &= ~HBA_CGN_DAY_WRAP; 13612 13613 memset(cp, 0xff, offsetof(struct lpfc_cgn_info, cgn_stat)); 13614 cp->cgn_info_size = cpu_to_le16(LPFC_CGN_INFO_SZ); 13615 cp->cgn_info_version = LPFC_CGN_INFO_V3; 13616 13617 /* cgn parameters */ 13618 cp->cgn_info_mode = phba->cgn_p.cgn_param_mode; 13619 cp->cgn_info_level0 = phba->cgn_p.cgn_param_level0; 13620 cp->cgn_info_level1 = phba->cgn_p.cgn_param_level1; 13621 cp->cgn_info_level2 = phba->cgn_p.cgn_param_level2; 13622 13623 ktime_get_real_ts64(&cmpl_time); 13624 time64_to_tm(cmpl_time.tv_sec, 0, &broken); 13625 13626 cp->cgn_info_month = broken.tm_mon + 1; 13627 cp->cgn_info_day = broken.tm_mday; 13628 cp->cgn_info_year = broken.tm_year - 100; /* relative to 2000 */ 13629 cp->cgn_info_hour = broken.tm_hour; 13630 cp->cgn_info_minute = broken.tm_min; 13631 cp->cgn_info_second = broken.tm_sec; 13632 13633 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT | LOG_INIT, 13634 "2643 CGNInfo Init: Start Time " 13635 "%d/%d/%d %d:%d:%d\n", 13636 cp->cgn_info_day, cp->cgn_info_month, 13637 cp->cgn_info_year, cp->cgn_info_hour, 13638 cp->cgn_info_minute, cp->cgn_info_second); 13639 13640 /* Fill in default LUN qdepth */ 13641 if (phba->pport) { 13642 size = (uint16_t)(phba->pport->cfg_lun_queue_depth); 13643 cp->cgn_lunq = cpu_to_le16(size); 13644 } 13645 13646 /* last used Index initialized to 0xff already */ 13647 13648 cp->cgn_warn_freq = cpu_to_le16(LPFC_FPIN_INIT_FREQ); 13649 cp->cgn_alarm_freq = cpu_to_le16(LPFC_FPIN_INIT_FREQ); 13650 crc = lpfc_cgn_calc_crc32(cp, LPFC_CGN_INFO_SZ, LPFC_CGN_CRC32_SEED); 13651 cp->cgn_info_crc = cpu_to_le32(crc); 13652 13653 phba->cgn_evt_timestamp = jiffies + 13654 msecs_to_jiffies(LPFC_CGN_TIMER_TO_MIN); 13655 } 13656 13657 void 13658 lpfc_init_congestion_stat(struct lpfc_hba *phba) 13659 { 13660 struct lpfc_cgn_info *cp; 13661 struct timespec64 cmpl_time; 13662 struct tm broken; 13663 uint32_t crc; 13664 13665 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT, 13666 "6236 INIT Congestion Stat %p\n", phba->cgn_i); 13667 13668 if (!phba->cgn_i) 13669 return; 13670 13671 cp = (struct lpfc_cgn_info *)phba->cgn_i->virt; 13672 memset(&cp->cgn_stat, 0, sizeof(cp->cgn_stat)); 13673 13674 ktime_get_real_ts64(&cmpl_time); 13675 time64_to_tm(cmpl_time.tv_sec, 0, &broken); 13676 13677 cp->cgn_stat_month = broken.tm_mon + 1; 13678 cp->cgn_stat_day = broken.tm_mday; 13679 cp->cgn_stat_year = broken.tm_year - 100; /* relative to 2000 */ 13680 cp->cgn_stat_hour = broken.tm_hour; 13681 cp->cgn_stat_minute = broken.tm_min; 13682 13683 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT | LOG_INIT, 13684 "2647 CGNstat Init: Start Time " 13685 "%d/%d/%d %d:%d\n", 13686 cp->cgn_stat_day, cp->cgn_stat_month, 13687 cp->cgn_stat_year, cp->cgn_stat_hour, 13688 cp->cgn_stat_minute); 13689 13690 crc = lpfc_cgn_calc_crc32(cp, LPFC_CGN_INFO_SZ, LPFC_CGN_CRC32_SEED); 13691 cp->cgn_info_crc = cpu_to_le32(crc); 13692 } 13693 13694 /** 13695 * __lpfc_reg_congestion_buf - register congestion info buffer with HBA 13696 * @phba: Pointer to hba context object. 13697 * @reg: flag to determine register or unregister. 13698 */ 13699 static int 13700 __lpfc_reg_congestion_buf(struct lpfc_hba *phba, int reg) 13701 { 13702 struct lpfc_mbx_reg_congestion_buf *reg_congestion_buf; 13703 union lpfc_sli4_cfg_shdr *shdr; 13704 uint32_t shdr_status, shdr_add_status; 13705 LPFC_MBOXQ_t *mboxq; 13706 int length, rc; 13707 13708 if (!phba->cgn_i) 13709 return -ENXIO; 13710 13711 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 13712 if (!mboxq) { 13713 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX, 13714 "2641 REG_CONGESTION_BUF mbox allocation fail: " 13715 "HBA state x%x reg %d\n", 13716 phba->pport->port_state, reg); 13717 return -ENOMEM; 13718 } 13719 13720 length = (sizeof(struct lpfc_mbx_reg_congestion_buf) - 13721 sizeof(struct lpfc_sli4_cfg_mhdr)); 13722 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON, 13723 LPFC_MBOX_OPCODE_REG_CONGESTION_BUF, length, 13724 LPFC_SLI4_MBX_EMBED); 13725 reg_congestion_buf = &mboxq->u.mqe.un.reg_congestion_buf; 13726 bf_set(lpfc_mbx_reg_cgn_buf_type, reg_congestion_buf, 1); 13727 if (reg > 0) 13728 bf_set(lpfc_mbx_reg_cgn_buf_cnt, reg_congestion_buf, 1); 13729 else 13730 bf_set(lpfc_mbx_reg_cgn_buf_cnt, reg_congestion_buf, 0); 13731 reg_congestion_buf->length = sizeof(struct lpfc_cgn_info); 13732 reg_congestion_buf->addr_lo = 13733 putPaddrLow(phba->cgn_i->phys); 13734 reg_congestion_buf->addr_hi = 13735 putPaddrHigh(phba->cgn_i->phys); 13736 13737 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); 13738 shdr = (union lpfc_sli4_cfg_shdr *) 13739 &mboxq->u.mqe.un.sli4_config.header.cfg_shdr; 13740 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response); 13741 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, 13742 &shdr->response); 13743 mempool_free(mboxq, phba->mbox_mem_pool); 13744 if (shdr_status || shdr_add_status || rc) { 13745 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 13746 "2642 REG_CONGESTION_BUF mailbox " 13747 "failed with status x%x add_status x%x," 13748 " mbx status x%x reg %d\n", 13749 shdr_status, shdr_add_status, rc, reg); 13750 return -ENXIO; 13751 } 13752 return 0; 13753 } 13754 13755 int 13756 lpfc_unreg_congestion_buf(struct lpfc_hba *phba) 13757 { 13758 lpfc_cmf_stop(phba); 13759 return __lpfc_reg_congestion_buf(phba, 0); 13760 } 13761 13762 int 13763 lpfc_reg_congestion_buf(struct lpfc_hba *phba) 13764 { 13765 return __lpfc_reg_congestion_buf(phba, 1); 13766 } 13767 13768 /** 13769 * lpfc_get_sli4_parameters - Get the SLI4 Config PARAMETERS. 13770 * @phba: Pointer to HBA context object. 13771 * @mboxq: Pointer to the mailboxq memory for the mailbox command response. 13772 * 13773 * This function is called in the SLI4 code path to read the port's 13774 * sli4 capabilities. 13775 * 13776 * This function may be be called from any context that can block-wait 13777 * for the completion. The expectation is that this routine is called 13778 * typically from probe_one or from the online routine. 13779 **/ 13780 int 13781 lpfc_get_sli4_parameters(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq) 13782 { 13783 int rc; 13784 struct lpfc_mqe *mqe = &mboxq->u.mqe; 13785 struct lpfc_pc_sli4_params *sli4_params; 13786 uint32_t mbox_tmo; 13787 int length; 13788 bool exp_wqcq_pages = true; 13789 struct lpfc_sli4_parameters *mbx_sli4_parameters; 13790 13791 /* 13792 * By default, the driver assumes the SLI4 port requires RPI 13793 * header postings. The SLI4_PARAM response will correct this 13794 * assumption. 13795 */ 13796 phba->sli4_hba.rpi_hdrs_in_use = 1; 13797 13798 /* Read the port's SLI4 Config Parameters */ 13799 length = (sizeof(struct lpfc_mbx_get_sli4_parameters) - 13800 sizeof(struct lpfc_sli4_cfg_mhdr)); 13801 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON, 13802 LPFC_MBOX_OPCODE_GET_SLI4_PARAMETERS, 13803 length, LPFC_SLI4_MBX_EMBED); 13804 if (!phba->sli4_hba.intr_enable) 13805 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); 13806 else { 13807 mbox_tmo = lpfc_mbox_tmo_val(phba, mboxq); 13808 rc = lpfc_sli_issue_mbox_wait(phba, mboxq, mbox_tmo); 13809 } 13810 if (unlikely(rc)) 13811 return rc; 13812 sli4_params = &phba->sli4_hba.pc_sli4_params; 13813 mbx_sli4_parameters = &mqe->un.get_sli4_parameters.sli4_parameters; 13814 sli4_params->if_type = bf_get(cfg_if_type, mbx_sli4_parameters); 13815 sli4_params->sli_rev = bf_get(cfg_sli_rev, mbx_sli4_parameters); 13816 sli4_params->sli_family = bf_get(cfg_sli_family, mbx_sli4_parameters); 13817 sli4_params->featurelevel_1 = bf_get(cfg_sli_hint_1, 13818 mbx_sli4_parameters); 13819 sli4_params->featurelevel_2 = bf_get(cfg_sli_hint_2, 13820 mbx_sli4_parameters); 13821 if (bf_get(cfg_phwq, mbx_sli4_parameters)) 13822 phba->sli3_options |= LPFC_SLI4_PHWQ_ENABLED; 13823 else 13824 phba->sli3_options &= ~LPFC_SLI4_PHWQ_ENABLED; 13825 sli4_params->sge_supp_len = mbx_sli4_parameters->sge_supp_len; 13826 sli4_params->loopbk_scope = bf_get(cfg_loopbk_scope, 13827 mbx_sli4_parameters); 13828 sli4_params->oas_supported = bf_get(cfg_oas, mbx_sli4_parameters); 13829 sli4_params->cqv = bf_get(cfg_cqv, mbx_sli4_parameters); 13830 sli4_params->mqv = bf_get(cfg_mqv, mbx_sli4_parameters); 13831 sli4_params->wqv = bf_get(cfg_wqv, mbx_sli4_parameters); 13832 sli4_params->rqv = bf_get(cfg_rqv, mbx_sli4_parameters); 13833 sli4_params->eqav = bf_get(cfg_eqav, mbx_sli4_parameters); 13834 sli4_params->cqav = bf_get(cfg_cqav, mbx_sli4_parameters); 13835 sli4_params->wqsize = bf_get(cfg_wqsize, mbx_sli4_parameters); 13836 sli4_params->bv1s = bf_get(cfg_bv1s, mbx_sli4_parameters); 13837 sli4_params->pls = bf_get(cfg_pvl, mbx_sli4_parameters); 13838 sli4_params->sgl_pages_max = bf_get(cfg_sgl_page_cnt, 13839 mbx_sli4_parameters); 13840 sli4_params->wqpcnt = bf_get(cfg_wqpcnt, mbx_sli4_parameters); 13841 sli4_params->sgl_pp_align = bf_get(cfg_sgl_pp_align, 13842 mbx_sli4_parameters); 13843 phba->sli4_hba.extents_in_use = bf_get(cfg_ext, mbx_sli4_parameters); 13844 phba->sli4_hba.rpi_hdrs_in_use = bf_get(cfg_hdrr, mbx_sli4_parameters); 13845 sli4_params->mi_cap = bf_get(cfg_mi_ver, mbx_sli4_parameters); 13846 13847 /* Check for Extended Pre-Registered SGL support */ 13848 phba->cfg_xpsgl = bf_get(cfg_xpsgl, mbx_sli4_parameters); 13849 13850 /* Check for firmware nvme support */ 13851 rc = (bf_get(cfg_nvme, mbx_sli4_parameters) && 13852 bf_get(cfg_xib, mbx_sli4_parameters)); 13853 13854 if (rc) { 13855 /* Save this to indicate the Firmware supports NVME */ 13856 sli4_params->nvme = 1; 13857 13858 /* Firmware NVME support, check driver FC4 NVME support */ 13859 if (phba->cfg_enable_fc4_type == LPFC_ENABLE_FCP) { 13860 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_NVME, 13861 "6133 Disabling NVME support: " 13862 "FC4 type not supported: x%x\n", 13863 phba->cfg_enable_fc4_type); 13864 goto fcponly; 13865 } 13866 } else { 13867 /* No firmware NVME support, check driver FC4 NVME support */ 13868 sli4_params->nvme = 0; 13869 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 13870 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_NVME, 13871 "6101 Disabling NVME support: Not " 13872 "supported by firmware (%d %d) x%x\n", 13873 bf_get(cfg_nvme, mbx_sli4_parameters), 13874 bf_get(cfg_xib, mbx_sli4_parameters), 13875 phba->cfg_enable_fc4_type); 13876 fcponly: 13877 phba->nvmet_support = 0; 13878 phba->cfg_nvmet_mrq = 0; 13879 phba->cfg_nvme_seg_cnt = 0; 13880 13881 /* If no FC4 type support, move to just SCSI support */ 13882 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP)) 13883 return -ENODEV; 13884 phba->cfg_enable_fc4_type = LPFC_ENABLE_FCP; 13885 } 13886 } 13887 13888 /* If the NVME FC4 type is enabled, scale the sg_seg_cnt to 13889 * accommodate 512K and 1M IOs in a single nvme buf. 13890 */ 13891 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) 13892 phba->cfg_sg_seg_cnt = LPFC_MAX_NVME_SEG_CNT; 13893 13894 /* Enable embedded Payload BDE if support is indicated */ 13895 if (bf_get(cfg_pbde, mbx_sli4_parameters)) 13896 phba->cfg_enable_pbde = 1; 13897 else 13898 phba->cfg_enable_pbde = 0; 13899 13900 /* 13901 * To support Suppress Response feature we must satisfy 3 conditions. 13902 * lpfc_suppress_rsp module parameter must be set (default). 13903 * In SLI4-Parameters Descriptor: 13904 * Extended Inline Buffers (XIB) must be supported. 13905 * Suppress Response IU Not Supported (SRIUNS) must NOT be supported 13906 * (double negative). 13907 */ 13908 if (phba->cfg_suppress_rsp && bf_get(cfg_xib, mbx_sli4_parameters) && 13909 !(bf_get(cfg_nosr, mbx_sli4_parameters))) 13910 phba->sli.sli_flag |= LPFC_SLI_SUPPRESS_RSP; 13911 else 13912 phba->cfg_suppress_rsp = 0; 13913 13914 if (bf_get(cfg_eqdr, mbx_sli4_parameters)) 13915 phba->sli.sli_flag |= LPFC_SLI_USE_EQDR; 13916 13917 /* Make sure that sge_supp_len can be handled by the driver */ 13918 if (sli4_params->sge_supp_len > LPFC_MAX_SGE_SIZE) 13919 sli4_params->sge_supp_len = LPFC_MAX_SGE_SIZE; 13920 13921 /* 13922 * Check whether the adapter supports an embedded copy of the 13923 * FCP CMD IU within the WQE for FCP_Ixxx commands. In order 13924 * to use this option, 128-byte WQEs must be used. 13925 */ 13926 if (bf_get(cfg_ext_embed_cb, mbx_sli4_parameters)) 13927 phba->fcp_embed_io = 1; 13928 else 13929 phba->fcp_embed_io = 0; 13930 13931 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_NVME, 13932 "6422 XIB %d PBDE %d: FCP %d NVME %d %d %d\n", 13933 bf_get(cfg_xib, mbx_sli4_parameters), 13934 phba->cfg_enable_pbde, 13935 phba->fcp_embed_io, sli4_params->nvme, 13936 phba->cfg_nvme_embed_cmd, phba->cfg_suppress_rsp); 13937 13938 if ((bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) == 13939 LPFC_SLI_INTF_IF_TYPE_2) && 13940 (bf_get(lpfc_sli_intf_sli_family, &phba->sli4_hba.sli_intf) == 13941 LPFC_SLI_INTF_FAMILY_LNCR_A0)) 13942 exp_wqcq_pages = false; 13943 13944 if ((bf_get(cfg_cqpsize, mbx_sli4_parameters) & LPFC_CQ_16K_PAGE_SZ) && 13945 (bf_get(cfg_wqpsize, mbx_sli4_parameters) & LPFC_WQ_16K_PAGE_SZ) && 13946 exp_wqcq_pages && 13947 (sli4_params->wqsize & LPFC_WQ_SZ128_SUPPORT)) 13948 phba->enab_exp_wqcq_pages = 1; 13949 else 13950 phba->enab_exp_wqcq_pages = 0; 13951 /* 13952 * Check if the SLI port supports MDS Diagnostics 13953 */ 13954 if (bf_get(cfg_mds_diags, mbx_sli4_parameters)) 13955 phba->mds_diags_support = 1; 13956 else 13957 phba->mds_diags_support = 0; 13958 13959 /* 13960 * Check if the SLI port supports NSLER 13961 */ 13962 if (bf_get(cfg_nsler, mbx_sli4_parameters)) 13963 phba->nsler = 1; 13964 else 13965 phba->nsler = 0; 13966 13967 return 0; 13968 } 13969 13970 /** 13971 * lpfc_pci_probe_one_s3 - PCI probe func to reg SLI-3 device to PCI subsystem. 13972 * @pdev: pointer to PCI device 13973 * @pid: pointer to PCI device identifier 13974 * 13975 * This routine is to be called to attach a device with SLI-3 interface spec 13976 * to the PCI subsystem. When an Emulex HBA with SLI-3 interface spec is 13977 * presented on PCI bus, the kernel PCI subsystem looks at PCI device-specific 13978 * information of the device and driver to see if the driver state that it can 13979 * support this kind of device. If the match is successful, the driver core 13980 * invokes this routine. If this routine determines it can claim the HBA, it 13981 * does all the initialization that it needs to do to handle the HBA properly. 13982 * 13983 * Return code 13984 * 0 - driver can claim the device 13985 * negative value - driver can not claim the device 13986 **/ 13987 static int 13988 lpfc_pci_probe_one_s3(struct pci_dev *pdev, const struct pci_device_id *pid) 13989 { 13990 struct lpfc_hba *phba; 13991 struct lpfc_vport *vport = NULL; 13992 struct Scsi_Host *shost = NULL; 13993 int error; 13994 uint32_t cfg_mode, intr_mode; 13995 13996 /* Allocate memory for HBA structure */ 13997 phba = lpfc_hba_alloc(pdev); 13998 if (!phba) 13999 return -ENOMEM; 14000 14001 /* Perform generic PCI device enabling operation */ 14002 error = lpfc_enable_pci_dev(phba); 14003 if (error) 14004 goto out_free_phba; 14005 14006 /* Set up SLI API function jump table for PCI-device group-0 HBAs */ 14007 error = lpfc_api_table_setup(phba, LPFC_PCI_DEV_LP); 14008 if (error) 14009 goto out_disable_pci_dev; 14010 14011 /* Set up SLI-3 specific device PCI memory space */ 14012 error = lpfc_sli_pci_mem_setup(phba); 14013 if (error) { 14014 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 14015 "1402 Failed to set up pci memory space.\n"); 14016 goto out_disable_pci_dev; 14017 } 14018 14019 /* Set up SLI-3 specific device driver resources */ 14020 error = lpfc_sli_driver_resource_setup(phba); 14021 if (error) { 14022 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 14023 "1404 Failed to set up driver resource.\n"); 14024 goto out_unset_pci_mem_s3; 14025 } 14026 14027 /* Initialize and populate the iocb list per host */ 14028 14029 error = lpfc_init_iocb_list(phba, LPFC_IOCB_LIST_CNT); 14030 if (error) { 14031 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 14032 "1405 Failed to initialize iocb list.\n"); 14033 goto out_unset_driver_resource_s3; 14034 } 14035 14036 /* Set up common device driver resources */ 14037 error = lpfc_setup_driver_resource_phase2(phba); 14038 if (error) { 14039 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 14040 "1406 Failed to set up driver resource.\n"); 14041 goto out_free_iocb_list; 14042 } 14043 14044 /* Get the default values for Model Name and Description */ 14045 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc); 14046 14047 /* Create SCSI host to the physical port */ 14048 error = lpfc_create_shost(phba); 14049 if (error) { 14050 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 14051 "1407 Failed to create scsi host.\n"); 14052 goto out_unset_driver_resource; 14053 } 14054 14055 /* Configure sysfs attributes */ 14056 vport = phba->pport; 14057 error = lpfc_alloc_sysfs_attr(vport); 14058 if (error) { 14059 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 14060 "1476 Failed to allocate sysfs attr\n"); 14061 goto out_destroy_shost; 14062 } 14063 14064 shost = lpfc_shost_from_vport(vport); /* save shost for error cleanup */ 14065 /* Now, trying to enable interrupt and bring up the device */ 14066 cfg_mode = phba->cfg_use_msi; 14067 while (true) { 14068 /* Put device to a known state before enabling interrupt */ 14069 lpfc_stop_port(phba); 14070 /* Configure and enable interrupt */ 14071 intr_mode = lpfc_sli_enable_intr(phba, cfg_mode); 14072 if (intr_mode == LPFC_INTR_ERROR) { 14073 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14074 "0431 Failed to enable interrupt.\n"); 14075 error = -ENODEV; 14076 goto out_free_sysfs_attr; 14077 } 14078 /* SLI-3 HBA setup */ 14079 if (lpfc_sli_hba_setup(phba)) { 14080 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14081 "1477 Failed to set up hba\n"); 14082 error = -ENODEV; 14083 goto out_remove_device; 14084 } 14085 14086 /* Wait 50ms for the interrupts of previous mailbox commands */ 14087 msleep(50); 14088 /* Check active interrupts on message signaled interrupts */ 14089 if (intr_mode == 0 || 14090 phba->sli.slistat.sli_intr > LPFC_MSIX_VECTORS) { 14091 /* Log the current active interrupt mode */ 14092 phba->intr_mode = intr_mode; 14093 lpfc_log_intr_mode(phba, intr_mode); 14094 break; 14095 } else { 14096 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 14097 "0447 Configure interrupt mode (%d) " 14098 "failed active interrupt test.\n", 14099 intr_mode); 14100 /* Disable the current interrupt mode */ 14101 lpfc_sli_disable_intr(phba); 14102 /* Try next level of interrupt mode */ 14103 cfg_mode = --intr_mode; 14104 } 14105 } 14106 14107 /* Perform post initialization setup */ 14108 lpfc_post_init_setup(phba); 14109 14110 /* Check if there are static vports to be created. */ 14111 lpfc_create_static_vport(phba); 14112 14113 return 0; 14114 14115 out_remove_device: 14116 lpfc_unset_hba(phba); 14117 out_free_sysfs_attr: 14118 lpfc_free_sysfs_attr(vport); 14119 out_destroy_shost: 14120 lpfc_destroy_shost(phba); 14121 out_unset_driver_resource: 14122 lpfc_unset_driver_resource_phase2(phba); 14123 out_free_iocb_list: 14124 lpfc_free_iocb_list(phba); 14125 out_unset_driver_resource_s3: 14126 lpfc_sli_driver_resource_unset(phba); 14127 out_unset_pci_mem_s3: 14128 lpfc_sli_pci_mem_unset(phba); 14129 out_disable_pci_dev: 14130 lpfc_disable_pci_dev(phba); 14131 if (shost) 14132 scsi_host_put(shost); 14133 out_free_phba: 14134 lpfc_hba_free(phba); 14135 return error; 14136 } 14137 14138 /** 14139 * lpfc_pci_remove_one_s3 - PCI func to unreg SLI-3 device from PCI subsystem. 14140 * @pdev: pointer to PCI device 14141 * 14142 * This routine is to be called to disattach a device with SLI-3 interface 14143 * spec from PCI subsystem. When an Emulex HBA with SLI-3 interface spec is 14144 * removed from PCI bus, it performs all the necessary cleanup for the HBA 14145 * device to be removed from the PCI subsystem properly. 14146 **/ 14147 static void 14148 lpfc_pci_remove_one_s3(struct pci_dev *pdev) 14149 { 14150 struct Scsi_Host *shost = pci_get_drvdata(pdev); 14151 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata; 14152 struct lpfc_vport **vports; 14153 struct lpfc_hba *phba = vport->phba; 14154 int i; 14155 14156 spin_lock_irq(&phba->hbalock); 14157 vport->load_flag |= FC_UNLOADING; 14158 spin_unlock_irq(&phba->hbalock); 14159 14160 lpfc_free_sysfs_attr(vport); 14161 14162 /* Release all the vports against this physical port */ 14163 vports = lpfc_create_vport_work_array(phba); 14164 if (vports != NULL) 14165 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) { 14166 if (vports[i]->port_type == LPFC_PHYSICAL_PORT) 14167 continue; 14168 fc_vport_terminate(vports[i]->fc_vport); 14169 } 14170 lpfc_destroy_vport_work_array(phba, vports); 14171 14172 /* Remove FC host with the physical port */ 14173 fc_remove_host(shost); 14174 scsi_remove_host(shost); 14175 14176 /* Clean up all nodes, mailboxes and IOs. */ 14177 lpfc_cleanup(vport); 14178 14179 /* 14180 * Bring down the SLI Layer. This step disable all interrupts, 14181 * clears the rings, discards all mailbox commands, and resets 14182 * the HBA. 14183 */ 14184 14185 /* HBA interrupt will be disabled after this call */ 14186 lpfc_sli_hba_down(phba); 14187 /* Stop kthread signal shall trigger work_done one more time */ 14188 kthread_stop(phba->worker_thread); 14189 /* Final cleanup of txcmplq and reset the HBA */ 14190 lpfc_sli_brdrestart(phba); 14191 14192 kfree(phba->vpi_bmask); 14193 kfree(phba->vpi_ids); 14194 14195 lpfc_stop_hba_timers(phba); 14196 spin_lock_irq(&phba->port_list_lock); 14197 list_del_init(&vport->listentry); 14198 spin_unlock_irq(&phba->port_list_lock); 14199 14200 lpfc_debugfs_terminate(vport); 14201 14202 /* Disable SR-IOV if enabled */ 14203 if (phba->cfg_sriov_nr_virtfn) 14204 pci_disable_sriov(pdev); 14205 14206 /* Disable interrupt */ 14207 lpfc_sli_disable_intr(phba); 14208 14209 scsi_host_put(shost); 14210 14211 /* 14212 * Call scsi_free before mem_free since scsi bufs are released to their 14213 * corresponding pools here. 14214 */ 14215 lpfc_scsi_free(phba); 14216 lpfc_free_iocb_list(phba); 14217 14218 lpfc_mem_free_all(phba); 14219 14220 dma_free_coherent(&pdev->dev, lpfc_sli_hbq_size(), 14221 phba->hbqslimp.virt, phba->hbqslimp.phys); 14222 14223 /* Free resources associated with SLI2 interface */ 14224 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE, 14225 phba->slim2p.virt, phba->slim2p.phys); 14226 14227 /* unmap adapter SLIM and Control Registers */ 14228 iounmap(phba->ctrl_regs_memmap_p); 14229 iounmap(phba->slim_memmap_p); 14230 14231 lpfc_hba_free(phba); 14232 14233 pci_release_mem_regions(pdev); 14234 pci_disable_device(pdev); 14235 } 14236 14237 /** 14238 * lpfc_pci_suspend_one_s3 - PCI func to suspend SLI-3 device for power mgmnt 14239 * @dev_d: pointer to device 14240 * 14241 * This routine is to be called from the kernel's PCI subsystem to support 14242 * system Power Management (PM) to device with SLI-3 interface spec. When 14243 * PM invokes this method, it quiesces the device by stopping the driver's 14244 * worker thread for the device, turning off device's interrupt and DMA, 14245 * and bring the device offline. Note that as the driver implements the 14246 * minimum PM requirements to a power-aware driver's PM support for the 14247 * suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, FREEZE) 14248 * to the suspend() method call will be treated as SUSPEND and the driver will 14249 * fully reinitialize its device during resume() method call, the driver will 14250 * set device to PCI_D3hot state in PCI config space instead of setting it 14251 * according to the @msg provided by the PM. 14252 * 14253 * Return code 14254 * 0 - driver suspended the device 14255 * Error otherwise 14256 **/ 14257 static int __maybe_unused 14258 lpfc_pci_suspend_one_s3(struct device *dev_d) 14259 { 14260 struct Scsi_Host *shost = dev_get_drvdata(dev_d); 14261 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 14262 14263 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 14264 "0473 PCI device Power Management suspend.\n"); 14265 14266 /* Bring down the device */ 14267 lpfc_offline_prep(phba, LPFC_MBX_WAIT); 14268 lpfc_offline(phba); 14269 kthread_stop(phba->worker_thread); 14270 14271 /* Disable interrupt from device */ 14272 lpfc_sli_disable_intr(phba); 14273 14274 return 0; 14275 } 14276 14277 /** 14278 * lpfc_pci_resume_one_s3 - PCI func to resume SLI-3 device for power mgmnt 14279 * @dev_d: pointer to device 14280 * 14281 * This routine is to be called from the kernel's PCI subsystem to support 14282 * system Power Management (PM) to device with SLI-3 interface spec. When PM 14283 * invokes this method, it restores the device's PCI config space state and 14284 * fully reinitializes the device and brings it online. Note that as the 14285 * driver implements the minimum PM requirements to a power-aware driver's 14286 * PM for suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, 14287 * FREEZE) to the suspend() method call will be treated as SUSPEND and the 14288 * driver will fully reinitialize its device during resume() method call, 14289 * the device will be set to PCI_D0 directly in PCI config space before 14290 * restoring the state. 14291 * 14292 * Return code 14293 * 0 - driver suspended the device 14294 * Error otherwise 14295 **/ 14296 static int __maybe_unused 14297 lpfc_pci_resume_one_s3(struct device *dev_d) 14298 { 14299 struct Scsi_Host *shost = dev_get_drvdata(dev_d); 14300 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 14301 uint32_t intr_mode; 14302 int error; 14303 14304 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 14305 "0452 PCI device Power Management resume.\n"); 14306 14307 /* Startup the kernel thread for this host adapter. */ 14308 phba->worker_thread = kthread_run(lpfc_do_work, phba, 14309 "lpfc_worker_%d", phba->brd_no); 14310 if (IS_ERR(phba->worker_thread)) { 14311 error = PTR_ERR(phba->worker_thread); 14312 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 14313 "0434 PM resume failed to start worker " 14314 "thread: error=x%x.\n", error); 14315 return error; 14316 } 14317 14318 /* Init cpu_map array */ 14319 lpfc_cpu_map_array_init(phba); 14320 /* Init hba_eq_hdl array */ 14321 lpfc_hba_eq_hdl_array_init(phba); 14322 /* Configure and enable interrupt */ 14323 intr_mode = lpfc_sli_enable_intr(phba, phba->intr_mode); 14324 if (intr_mode == LPFC_INTR_ERROR) { 14325 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14326 "0430 PM resume Failed to enable interrupt\n"); 14327 return -EIO; 14328 } else 14329 phba->intr_mode = intr_mode; 14330 14331 /* Restart HBA and bring it online */ 14332 lpfc_sli_brdrestart(phba); 14333 lpfc_online(phba); 14334 14335 /* Log the current active interrupt mode */ 14336 lpfc_log_intr_mode(phba, phba->intr_mode); 14337 14338 return 0; 14339 } 14340 14341 /** 14342 * lpfc_sli_prep_dev_for_recover - Prepare SLI3 device for pci slot recover 14343 * @phba: pointer to lpfc hba data structure. 14344 * 14345 * This routine is called to prepare the SLI3 device for PCI slot recover. It 14346 * aborts all the outstanding SCSI I/Os to the pci device. 14347 **/ 14348 static void 14349 lpfc_sli_prep_dev_for_recover(struct lpfc_hba *phba) 14350 { 14351 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14352 "2723 PCI channel I/O abort preparing for recovery\n"); 14353 14354 /* 14355 * There may be errored I/Os through HBA, abort all I/Os on txcmplq 14356 * and let the SCSI mid-layer to retry them to recover. 14357 */ 14358 lpfc_sli_abort_fcp_rings(phba); 14359 } 14360 14361 /** 14362 * lpfc_sli_prep_dev_for_reset - Prepare SLI3 device for pci slot reset 14363 * @phba: pointer to lpfc hba data structure. 14364 * 14365 * This routine is called to prepare the SLI3 device for PCI slot reset. It 14366 * disables the device interrupt and pci device, and aborts the internal FCP 14367 * pending I/Os. 14368 **/ 14369 static void 14370 lpfc_sli_prep_dev_for_reset(struct lpfc_hba *phba) 14371 { 14372 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14373 "2710 PCI channel disable preparing for reset\n"); 14374 14375 /* Block any management I/Os to the device */ 14376 lpfc_block_mgmt_io(phba, LPFC_MBX_WAIT); 14377 14378 /* Block all SCSI devices' I/Os on the host */ 14379 lpfc_scsi_dev_block(phba); 14380 14381 /* Flush all driver's outstanding SCSI I/Os as we are to reset */ 14382 lpfc_sli_flush_io_rings(phba); 14383 14384 /* stop all timers */ 14385 lpfc_stop_hba_timers(phba); 14386 14387 /* Disable interrupt and pci device */ 14388 lpfc_sli_disable_intr(phba); 14389 pci_disable_device(phba->pcidev); 14390 } 14391 14392 /** 14393 * lpfc_sli_prep_dev_for_perm_failure - Prepare SLI3 dev for pci slot disable 14394 * @phba: pointer to lpfc hba data structure. 14395 * 14396 * This routine is called to prepare the SLI3 device for PCI slot permanently 14397 * disabling. It blocks the SCSI transport layer traffic and flushes the FCP 14398 * pending I/Os. 14399 **/ 14400 static void 14401 lpfc_sli_prep_dev_for_perm_failure(struct lpfc_hba *phba) 14402 { 14403 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14404 "2711 PCI channel permanent disable for failure\n"); 14405 /* Block all SCSI devices' I/Os on the host */ 14406 lpfc_scsi_dev_block(phba); 14407 lpfc_sli4_prep_dev_for_reset(phba); 14408 14409 /* stop all timers */ 14410 lpfc_stop_hba_timers(phba); 14411 14412 /* Clean up all driver's outstanding SCSI I/Os */ 14413 lpfc_sli_flush_io_rings(phba); 14414 } 14415 14416 /** 14417 * lpfc_io_error_detected_s3 - Method for handling SLI-3 device PCI I/O error 14418 * @pdev: pointer to PCI device. 14419 * @state: the current PCI connection state. 14420 * 14421 * This routine is called from the PCI subsystem for I/O error handling to 14422 * device with SLI-3 interface spec. This function is called by the PCI 14423 * subsystem after a PCI bus error affecting this device has been detected. 14424 * When this function is invoked, it will need to stop all the I/Os and 14425 * interrupt(s) to the device. Once that is done, it will return 14426 * PCI_ERS_RESULT_NEED_RESET for the PCI subsystem to perform proper recovery 14427 * as desired. 14428 * 14429 * Return codes 14430 * PCI_ERS_RESULT_CAN_RECOVER - can be recovered with reset_link 14431 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery 14432 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered 14433 **/ 14434 static pci_ers_result_t 14435 lpfc_io_error_detected_s3(struct pci_dev *pdev, pci_channel_state_t state) 14436 { 14437 struct Scsi_Host *shost = pci_get_drvdata(pdev); 14438 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 14439 14440 switch (state) { 14441 case pci_channel_io_normal: 14442 /* Non-fatal error, prepare for recovery */ 14443 lpfc_sli_prep_dev_for_recover(phba); 14444 return PCI_ERS_RESULT_CAN_RECOVER; 14445 case pci_channel_io_frozen: 14446 /* Fatal error, prepare for slot reset */ 14447 lpfc_sli_prep_dev_for_reset(phba); 14448 return PCI_ERS_RESULT_NEED_RESET; 14449 case pci_channel_io_perm_failure: 14450 /* Permanent failure, prepare for device down */ 14451 lpfc_sli_prep_dev_for_perm_failure(phba); 14452 return PCI_ERS_RESULT_DISCONNECT; 14453 default: 14454 /* Unknown state, prepare and request slot reset */ 14455 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14456 "0472 Unknown PCI error state: x%x\n", state); 14457 lpfc_sli_prep_dev_for_reset(phba); 14458 return PCI_ERS_RESULT_NEED_RESET; 14459 } 14460 } 14461 14462 /** 14463 * lpfc_io_slot_reset_s3 - Method for restarting PCI SLI-3 device from scratch. 14464 * @pdev: pointer to PCI device. 14465 * 14466 * This routine is called from the PCI subsystem for error handling to 14467 * device with SLI-3 interface spec. This is called after PCI bus has been 14468 * reset to restart the PCI card from scratch, as if from a cold-boot. 14469 * During the PCI subsystem error recovery, after driver returns 14470 * PCI_ERS_RESULT_NEED_RESET, the PCI subsystem will perform proper error 14471 * recovery and then call this routine before calling the .resume method 14472 * to recover the device. This function will initialize the HBA device, 14473 * enable the interrupt, but it will just put the HBA to offline state 14474 * without passing any I/O traffic. 14475 * 14476 * Return codes 14477 * PCI_ERS_RESULT_RECOVERED - the device has been recovered 14478 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered 14479 */ 14480 static pci_ers_result_t 14481 lpfc_io_slot_reset_s3(struct pci_dev *pdev) 14482 { 14483 struct Scsi_Host *shost = pci_get_drvdata(pdev); 14484 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 14485 struct lpfc_sli *psli = &phba->sli; 14486 uint32_t intr_mode; 14487 14488 dev_printk(KERN_INFO, &pdev->dev, "recovering from a slot reset.\n"); 14489 if (pci_enable_device_mem(pdev)) { 14490 printk(KERN_ERR "lpfc: Cannot re-enable " 14491 "PCI device after reset.\n"); 14492 return PCI_ERS_RESULT_DISCONNECT; 14493 } 14494 14495 pci_restore_state(pdev); 14496 14497 /* 14498 * As the new kernel behavior of pci_restore_state() API call clears 14499 * device saved_state flag, need to save the restored state again. 14500 */ 14501 pci_save_state(pdev); 14502 14503 if (pdev->is_busmaster) 14504 pci_set_master(pdev); 14505 14506 spin_lock_irq(&phba->hbalock); 14507 psli->sli_flag &= ~LPFC_SLI_ACTIVE; 14508 spin_unlock_irq(&phba->hbalock); 14509 14510 /* Configure and enable interrupt */ 14511 intr_mode = lpfc_sli_enable_intr(phba, phba->intr_mode); 14512 if (intr_mode == LPFC_INTR_ERROR) { 14513 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14514 "0427 Cannot re-enable interrupt after " 14515 "slot reset.\n"); 14516 return PCI_ERS_RESULT_DISCONNECT; 14517 } else 14518 phba->intr_mode = intr_mode; 14519 14520 /* Take device offline, it will perform cleanup */ 14521 lpfc_offline_prep(phba, LPFC_MBX_WAIT); 14522 lpfc_offline(phba); 14523 lpfc_sli_brdrestart(phba); 14524 14525 /* Log the current active interrupt mode */ 14526 lpfc_log_intr_mode(phba, phba->intr_mode); 14527 14528 return PCI_ERS_RESULT_RECOVERED; 14529 } 14530 14531 /** 14532 * lpfc_io_resume_s3 - Method for resuming PCI I/O operation on SLI-3 device. 14533 * @pdev: pointer to PCI device 14534 * 14535 * This routine is called from the PCI subsystem for error handling to device 14536 * with SLI-3 interface spec. It is called when kernel error recovery tells 14537 * the lpfc driver that it is ok to resume normal PCI operation after PCI bus 14538 * error recovery. After this call, traffic can start to flow from this device 14539 * again. 14540 */ 14541 static void 14542 lpfc_io_resume_s3(struct pci_dev *pdev) 14543 { 14544 struct Scsi_Host *shost = pci_get_drvdata(pdev); 14545 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 14546 14547 /* Bring device online, it will be no-op for non-fatal error resume */ 14548 lpfc_online(phba); 14549 } 14550 14551 /** 14552 * lpfc_sli4_get_els_iocb_cnt - Calculate the # of ELS IOCBs to reserve 14553 * @phba: pointer to lpfc hba data structure. 14554 * 14555 * returns the number of ELS/CT IOCBs to reserve 14556 **/ 14557 int 14558 lpfc_sli4_get_els_iocb_cnt(struct lpfc_hba *phba) 14559 { 14560 int max_xri = phba->sli4_hba.max_cfg_param.max_xri; 14561 14562 if (phba->sli_rev == LPFC_SLI_REV4) { 14563 if (max_xri <= 100) 14564 return 10; 14565 else if (max_xri <= 256) 14566 return 25; 14567 else if (max_xri <= 512) 14568 return 50; 14569 else if (max_xri <= 1024) 14570 return 100; 14571 else if (max_xri <= 1536) 14572 return 150; 14573 else if (max_xri <= 2048) 14574 return 200; 14575 else 14576 return 250; 14577 } else 14578 return 0; 14579 } 14580 14581 /** 14582 * lpfc_sli4_get_iocb_cnt - Calculate the # of total IOCBs to reserve 14583 * @phba: pointer to lpfc hba data structure. 14584 * 14585 * returns the number of ELS/CT + NVMET IOCBs to reserve 14586 **/ 14587 int 14588 lpfc_sli4_get_iocb_cnt(struct lpfc_hba *phba) 14589 { 14590 int max_xri = lpfc_sli4_get_els_iocb_cnt(phba); 14591 14592 if (phba->nvmet_support) 14593 max_xri += LPFC_NVMET_BUF_POST; 14594 return max_xri; 14595 } 14596 14597 14598 static int 14599 lpfc_log_write_firmware_error(struct lpfc_hba *phba, uint32_t offset, 14600 uint32_t magic_number, uint32_t ftype, uint32_t fid, uint32_t fsize, 14601 const struct firmware *fw) 14602 { 14603 int rc; 14604 u8 sli_family; 14605 14606 sli_family = bf_get(lpfc_sli_intf_sli_family, &phba->sli4_hba.sli_intf); 14607 /* Three cases: (1) FW was not supported on the detected adapter. 14608 * (2) FW update has been locked out administratively. 14609 * (3) Some other error during FW update. 14610 * In each case, an unmaskable message is written to the console 14611 * for admin diagnosis. 14612 */ 14613 if (offset == ADD_STATUS_FW_NOT_SUPPORTED || 14614 (sli_family == LPFC_SLI_INTF_FAMILY_G6 && 14615 magic_number != MAGIC_NUMBER_G6) || 14616 (sli_family == LPFC_SLI_INTF_FAMILY_G7 && 14617 magic_number != MAGIC_NUMBER_G7) || 14618 (sli_family == LPFC_SLI_INTF_FAMILY_G7P && 14619 magic_number != MAGIC_NUMBER_G7P)) { 14620 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14621 "3030 This firmware version is not supported on" 14622 " this HBA model. Device:%x Magic:%x Type:%x " 14623 "ID:%x Size %d %zd\n", 14624 phba->pcidev->device, magic_number, ftype, fid, 14625 fsize, fw->size); 14626 rc = -EINVAL; 14627 } else if (offset == ADD_STATUS_FW_DOWNLOAD_HW_DISABLED) { 14628 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14629 "3021 Firmware downloads have been prohibited " 14630 "by a system configuration setting on " 14631 "Device:%x Magic:%x Type:%x ID:%x Size %d " 14632 "%zd\n", 14633 phba->pcidev->device, magic_number, ftype, fid, 14634 fsize, fw->size); 14635 rc = -EACCES; 14636 } else { 14637 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14638 "3022 FW Download failed. Add Status x%x " 14639 "Device:%x Magic:%x Type:%x ID:%x Size %d " 14640 "%zd\n", 14641 offset, phba->pcidev->device, magic_number, 14642 ftype, fid, fsize, fw->size); 14643 rc = -EIO; 14644 } 14645 return rc; 14646 } 14647 14648 /** 14649 * lpfc_write_firmware - attempt to write a firmware image to the port 14650 * @fw: pointer to firmware image returned from request_firmware. 14651 * @context: pointer to firmware image returned from request_firmware. 14652 * 14653 **/ 14654 static void 14655 lpfc_write_firmware(const struct firmware *fw, void *context) 14656 { 14657 struct lpfc_hba *phba = (struct lpfc_hba *)context; 14658 char fwrev[FW_REV_STR_SIZE]; 14659 struct lpfc_grp_hdr *image; 14660 struct list_head dma_buffer_list; 14661 int i, rc = 0; 14662 struct lpfc_dmabuf *dmabuf, *next; 14663 uint32_t offset = 0, temp_offset = 0; 14664 uint32_t magic_number, ftype, fid, fsize; 14665 14666 /* It can be null in no-wait mode, sanity check */ 14667 if (!fw) { 14668 rc = -ENXIO; 14669 goto out; 14670 } 14671 image = (struct lpfc_grp_hdr *)fw->data; 14672 14673 magic_number = be32_to_cpu(image->magic_number); 14674 ftype = bf_get_be32(lpfc_grp_hdr_file_type, image); 14675 fid = bf_get_be32(lpfc_grp_hdr_id, image); 14676 fsize = be32_to_cpu(image->size); 14677 14678 INIT_LIST_HEAD(&dma_buffer_list); 14679 lpfc_decode_firmware_rev(phba, fwrev, 1); 14680 if (strncmp(fwrev, image->revision, strnlen(image->revision, 16))) { 14681 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14682 "3023 Updating Firmware, Current Version:%s " 14683 "New Version:%s\n", 14684 fwrev, image->revision); 14685 for (i = 0; i < LPFC_MBX_WR_CONFIG_MAX_BDE; i++) { 14686 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), 14687 GFP_KERNEL); 14688 if (!dmabuf) { 14689 rc = -ENOMEM; 14690 goto release_out; 14691 } 14692 dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev, 14693 SLI4_PAGE_SIZE, 14694 &dmabuf->phys, 14695 GFP_KERNEL); 14696 if (!dmabuf->virt) { 14697 kfree(dmabuf); 14698 rc = -ENOMEM; 14699 goto release_out; 14700 } 14701 list_add_tail(&dmabuf->list, &dma_buffer_list); 14702 } 14703 while (offset < fw->size) { 14704 temp_offset = offset; 14705 list_for_each_entry(dmabuf, &dma_buffer_list, list) { 14706 if (temp_offset + SLI4_PAGE_SIZE > fw->size) { 14707 memcpy(dmabuf->virt, 14708 fw->data + temp_offset, 14709 fw->size - temp_offset); 14710 temp_offset = fw->size; 14711 break; 14712 } 14713 memcpy(dmabuf->virt, fw->data + temp_offset, 14714 SLI4_PAGE_SIZE); 14715 temp_offset += SLI4_PAGE_SIZE; 14716 } 14717 rc = lpfc_wr_object(phba, &dma_buffer_list, 14718 (fw->size - offset), &offset); 14719 if (rc) { 14720 rc = lpfc_log_write_firmware_error(phba, offset, 14721 magic_number, 14722 ftype, 14723 fid, 14724 fsize, 14725 fw); 14726 goto release_out; 14727 } 14728 } 14729 rc = offset; 14730 } else 14731 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14732 "3029 Skipped Firmware update, Current " 14733 "Version:%s New Version:%s\n", 14734 fwrev, image->revision); 14735 14736 release_out: 14737 list_for_each_entry_safe(dmabuf, next, &dma_buffer_list, list) { 14738 list_del(&dmabuf->list); 14739 dma_free_coherent(&phba->pcidev->dev, SLI4_PAGE_SIZE, 14740 dmabuf->virt, dmabuf->phys); 14741 kfree(dmabuf); 14742 } 14743 release_firmware(fw); 14744 out: 14745 if (rc < 0) 14746 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14747 "3062 Firmware update error, status %d.\n", rc); 14748 else 14749 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14750 "3024 Firmware update success: size %d.\n", rc); 14751 } 14752 14753 /** 14754 * lpfc_sli4_request_firmware_update - Request linux generic firmware upgrade 14755 * @phba: pointer to lpfc hba data structure. 14756 * @fw_upgrade: which firmware to update. 14757 * 14758 * This routine is called to perform Linux generic firmware upgrade on device 14759 * that supports such feature. 14760 **/ 14761 int 14762 lpfc_sli4_request_firmware_update(struct lpfc_hba *phba, uint8_t fw_upgrade) 14763 { 14764 uint8_t file_name[ELX_MODEL_NAME_SIZE]; 14765 int ret; 14766 const struct firmware *fw; 14767 14768 /* Only supported on SLI4 interface type 2 for now */ 14769 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) < 14770 LPFC_SLI_INTF_IF_TYPE_2) 14771 return -EPERM; 14772 14773 snprintf(file_name, ELX_MODEL_NAME_SIZE, "%s.grp", phba->ModelName); 14774 14775 if (fw_upgrade == INT_FW_UPGRADE) { 14776 ret = request_firmware_nowait(THIS_MODULE, FW_ACTION_UEVENT, 14777 file_name, &phba->pcidev->dev, 14778 GFP_KERNEL, (void *)phba, 14779 lpfc_write_firmware); 14780 } else if (fw_upgrade == RUN_FW_UPGRADE) { 14781 ret = request_firmware(&fw, file_name, &phba->pcidev->dev); 14782 if (!ret) 14783 lpfc_write_firmware(fw, (void *)phba); 14784 } else { 14785 ret = -EINVAL; 14786 } 14787 14788 return ret; 14789 } 14790 14791 /** 14792 * lpfc_pci_probe_one_s4 - PCI probe func to reg SLI-4 device to PCI subsys 14793 * @pdev: pointer to PCI device 14794 * @pid: pointer to PCI device identifier 14795 * 14796 * This routine is called from the kernel's PCI subsystem to device with 14797 * SLI-4 interface spec. When an Emulex HBA with SLI-4 interface spec is 14798 * presented on PCI bus, the kernel PCI subsystem looks at PCI device-specific 14799 * information of the device and driver to see if the driver state that it 14800 * can support this kind of device. If the match is successful, the driver 14801 * core invokes this routine. If this routine determines it can claim the HBA, 14802 * it does all the initialization that it needs to do to handle the HBA 14803 * properly. 14804 * 14805 * Return code 14806 * 0 - driver can claim the device 14807 * negative value - driver can not claim the device 14808 **/ 14809 static int 14810 lpfc_pci_probe_one_s4(struct pci_dev *pdev, const struct pci_device_id *pid) 14811 { 14812 struct lpfc_hba *phba; 14813 struct lpfc_vport *vport = NULL; 14814 struct Scsi_Host *shost = NULL; 14815 int error; 14816 uint32_t cfg_mode, intr_mode; 14817 14818 /* Allocate memory for HBA structure */ 14819 phba = lpfc_hba_alloc(pdev); 14820 if (!phba) 14821 return -ENOMEM; 14822 14823 INIT_LIST_HEAD(&phba->poll_list); 14824 14825 /* Perform generic PCI device enabling operation */ 14826 error = lpfc_enable_pci_dev(phba); 14827 if (error) 14828 goto out_free_phba; 14829 14830 /* Set up SLI API function jump table for PCI-device group-1 HBAs */ 14831 error = lpfc_api_table_setup(phba, LPFC_PCI_DEV_OC); 14832 if (error) 14833 goto out_disable_pci_dev; 14834 14835 /* Set up SLI-4 specific device PCI memory space */ 14836 error = lpfc_sli4_pci_mem_setup(phba); 14837 if (error) { 14838 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 14839 "1410 Failed to set up pci memory space.\n"); 14840 goto out_disable_pci_dev; 14841 } 14842 14843 /* Set up SLI-4 Specific device driver resources */ 14844 error = lpfc_sli4_driver_resource_setup(phba); 14845 if (error) { 14846 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 14847 "1412 Failed to set up driver resource.\n"); 14848 goto out_unset_pci_mem_s4; 14849 } 14850 14851 INIT_LIST_HEAD(&phba->active_rrq_list); 14852 INIT_LIST_HEAD(&phba->fcf.fcf_pri_list); 14853 14854 /* Set up common device driver resources */ 14855 error = lpfc_setup_driver_resource_phase2(phba); 14856 if (error) { 14857 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 14858 "1414 Failed to set up driver resource.\n"); 14859 goto out_unset_driver_resource_s4; 14860 } 14861 14862 /* Get the default values for Model Name and Description */ 14863 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc); 14864 14865 /* Now, trying to enable interrupt and bring up the device */ 14866 cfg_mode = phba->cfg_use_msi; 14867 14868 /* Put device to a known state before enabling interrupt */ 14869 phba->pport = NULL; 14870 lpfc_stop_port(phba); 14871 14872 /* Init cpu_map array */ 14873 lpfc_cpu_map_array_init(phba); 14874 14875 /* Init hba_eq_hdl array */ 14876 lpfc_hba_eq_hdl_array_init(phba); 14877 14878 /* Configure and enable interrupt */ 14879 intr_mode = lpfc_sli4_enable_intr(phba, cfg_mode); 14880 if (intr_mode == LPFC_INTR_ERROR) { 14881 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14882 "0426 Failed to enable interrupt.\n"); 14883 error = -ENODEV; 14884 goto out_unset_driver_resource; 14885 } 14886 /* Default to single EQ for non-MSI-X */ 14887 if (phba->intr_type != MSIX) { 14888 phba->cfg_irq_chann = 1; 14889 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 14890 if (phba->nvmet_support) 14891 phba->cfg_nvmet_mrq = 1; 14892 } 14893 } 14894 lpfc_cpu_affinity_check(phba, phba->cfg_irq_chann); 14895 14896 /* Create SCSI host to the physical port */ 14897 error = lpfc_create_shost(phba); 14898 if (error) { 14899 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 14900 "1415 Failed to create scsi host.\n"); 14901 goto out_disable_intr; 14902 } 14903 vport = phba->pport; 14904 shost = lpfc_shost_from_vport(vport); /* save shost for error cleanup */ 14905 14906 /* Configure sysfs attributes */ 14907 error = lpfc_alloc_sysfs_attr(vport); 14908 if (error) { 14909 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 14910 "1416 Failed to allocate sysfs attr\n"); 14911 goto out_destroy_shost; 14912 } 14913 14914 /* Set up SLI-4 HBA */ 14915 if (lpfc_sli4_hba_setup(phba)) { 14916 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14917 "1421 Failed to set up hba\n"); 14918 error = -ENODEV; 14919 goto out_free_sysfs_attr; 14920 } 14921 14922 /* Log the current active interrupt mode */ 14923 phba->intr_mode = intr_mode; 14924 lpfc_log_intr_mode(phba, intr_mode); 14925 14926 /* Perform post initialization setup */ 14927 lpfc_post_init_setup(phba); 14928 14929 /* NVME support in FW earlier in the driver load corrects the 14930 * FC4 type making a check for nvme_support unnecessary. 14931 */ 14932 if (phba->nvmet_support == 0) { 14933 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 14934 /* Create NVME binding with nvme_fc_transport. This 14935 * ensures the vport is initialized. If the localport 14936 * create fails, it should not unload the driver to 14937 * support field issues. 14938 */ 14939 error = lpfc_nvme_create_localport(vport); 14940 if (error) { 14941 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14942 "6004 NVME registration " 14943 "failed, error x%x\n", 14944 error); 14945 } 14946 } 14947 } 14948 14949 /* check for firmware upgrade or downgrade */ 14950 if (phba->cfg_request_firmware_upgrade) 14951 lpfc_sli4_request_firmware_update(phba, INT_FW_UPGRADE); 14952 14953 /* Check if there are static vports to be created. */ 14954 lpfc_create_static_vport(phba); 14955 14956 timer_setup(&phba->cpuhp_poll_timer, lpfc_sli4_poll_hbtimer, 0); 14957 cpuhp_state_add_instance_nocalls(lpfc_cpuhp_state, &phba->cpuhp); 14958 14959 return 0; 14960 14961 out_free_sysfs_attr: 14962 lpfc_free_sysfs_attr(vport); 14963 out_destroy_shost: 14964 lpfc_destroy_shost(phba); 14965 out_disable_intr: 14966 lpfc_sli4_disable_intr(phba); 14967 out_unset_driver_resource: 14968 lpfc_unset_driver_resource_phase2(phba); 14969 out_unset_driver_resource_s4: 14970 lpfc_sli4_driver_resource_unset(phba); 14971 out_unset_pci_mem_s4: 14972 lpfc_sli4_pci_mem_unset(phba); 14973 out_disable_pci_dev: 14974 lpfc_disable_pci_dev(phba); 14975 if (shost) 14976 scsi_host_put(shost); 14977 out_free_phba: 14978 lpfc_hba_free(phba); 14979 return error; 14980 } 14981 14982 /** 14983 * lpfc_pci_remove_one_s4 - PCI func to unreg SLI-4 device from PCI subsystem 14984 * @pdev: pointer to PCI device 14985 * 14986 * This routine is called from the kernel's PCI subsystem to device with 14987 * SLI-4 interface spec. When an Emulex HBA with SLI-4 interface spec is 14988 * removed from PCI bus, it performs all the necessary cleanup for the HBA 14989 * device to be removed from the PCI subsystem properly. 14990 **/ 14991 static void 14992 lpfc_pci_remove_one_s4(struct pci_dev *pdev) 14993 { 14994 struct Scsi_Host *shost = pci_get_drvdata(pdev); 14995 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata; 14996 struct lpfc_vport **vports; 14997 struct lpfc_hba *phba = vport->phba; 14998 int i; 14999 15000 /* Mark the device unloading flag */ 15001 spin_lock_irq(&phba->hbalock); 15002 vport->load_flag |= FC_UNLOADING; 15003 spin_unlock_irq(&phba->hbalock); 15004 if (phba->cgn_i) 15005 lpfc_unreg_congestion_buf(phba); 15006 15007 lpfc_free_sysfs_attr(vport); 15008 15009 /* Release all the vports against this physical port */ 15010 vports = lpfc_create_vport_work_array(phba); 15011 if (vports != NULL) 15012 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) { 15013 if (vports[i]->port_type == LPFC_PHYSICAL_PORT) 15014 continue; 15015 fc_vport_terminate(vports[i]->fc_vport); 15016 } 15017 lpfc_destroy_vport_work_array(phba, vports); 15018 15019 /* Remove FC host with the physical port */ 15020 fc_remove_host(shost); 15021 scsi_remove_host(shost); 15022 15023 /* Perform ndlp cleanup on the physical port. The nvme and nvmet 15024 * localports are destroyed after to cleanup all transport memory. 15025 */ 15026 lpfc_cleanup(vport); 15027 lpfc_nvmet_destroy_targetport(phba); 15028 lpfc_nvme_destroy_localport(vport); 15029 15030 /* De-allocate multi-XRI pools */ 15031 if (phba->cfg_xri_rebalancing) 15032 lpfc_destroy_multixri_pools(phba); 15033 15034 /* 15035 * Bring down the SLI Layer. This step disables all interrupts, 15036 * clears the rings, discards all mailbox commands, and resets 15037 * the HBA FCoE function. 15038 */ 15039 lpfc_debugfs_terminate(vport); 15040 15041 lpfc_stop_hba_timers(phba); 15042 spin_lock_irq(&phba->port_list_lock); 15043 list_del_init(&vport->listentry); 15044 spin_unlock_irq(&phba->port_list_lock); 15045 15046 /* Perform scsi free before driver resource_unset since scsi 15047 * buffers are released to their corresponding pools here. 15048 */ 15049 lpfc_io_free(phba); 15050 lpfc_free_iocb_list(phba); 15051 lpfc_sli4_hba_unset(phba); 15052 15053 lpfc_unset_driver_resource_phase2(phba); 15054 lpfc_sli4_driver_resource_unset(phba); 15055 15056 /* Unmap adapter Control and Doorbell registers */ 15057 lpfc_sli4_pci_mem_unset(phba); 15058 15059 /* Release PCI resources and disable device's PCI function */ 15060 scsi_host_put(shost); 15061 lpfc_disable_pci_dev(phba); 15062 15063 /* Finally, free the driver's device data structure */ 15064 lpfc_hba_free(phba); 15065 15066 return; 15067 } 15068 15069 /** 15070 * lpfc_pci_suspend_one_s4 - PCI func to suspend SLI-4 device for power mgmnt 15071 * @dev_d: pointer to device 15072 * 15073 * This routine is called from the kernel's PCI subsystem to support system 15074 * Power Management (PM) to device with SLI-4 interface spec. When PM invokes 15075 * this method, it quiesces the device by stopping the driver's worker 15076 * thread for the device, turning off device's interrupt and DMA, and bring 15077 * the device offline. Note that as the driver implements the minimum PM 15078 * requirements to a power-aware driver's PM support for suspend/resume -- all 15079 * the possible PM messages (SUSPEND, HIBERNATE, FREEZE) to the suspend() 15080 * method call will be treated as SUSPEND and the driver will fully 15081 * reinitialize its device during resume() method call, the driver will set 15082 * device to PCI_D3hot state in PCI config space instead of setting it 15083 * according to the @msg provided by the PM. 15084 * 15085 * Return code 15086 * 0 - driver suspended the device 15087 * Error otherwise 15088 **/ 15089 static int __maybe_unused 15090 lpfc_pci_suspend_one_s4(struct device *dev_d) 15091 { 15092 struct Scsi_Host *shost = dev_get_drvdata(dev_d); 15093 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 15094 15095 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 15096 "2843 PCI device Power Management suspend.\n"); 15097 15098 /* Bring down the device */ 15099 lpfc_offline_prep(phba, LPFC_MBX_WAIT); 15100 lpfc_offline(phba); 15101 kthread_stop(phba->worker_thread); 15102 15103 /* Disable interrupt from device */ 15104 lpfc_sli4_disable_intr(phba); 15105 lpfc_sli4_queue_destroy(phba); 15106 15107 return 0; 15108 } 15109 15110 /** 15111 * lpfc_pci_resume_one_s4 - PCI func to resume SLI-4 device for power mgmnt 15112 * @dev_d: pointer to device 15113 * 15114 * This routine is called from the kernel's PCI subsystem to support system 15115 * Power Management (PM) to device with SLI-4 interface spac. When PM invokes 15116 * this method, it restores the device's PCI config space state and fully 15117 * reinitializes the device and brings it online. Note that as the driver 15118 * implements the minimum PM requirements to a power-aware driver's PM for 15119 * suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, FREEZE) 15120 * to the suspend() method call will be treated as SUSPEND and the driver 15121 * will fully reinitialize its device during resume() method call, the device 15122 * will be set to PCI_D0 directly in PCI config space before restoring the 15123 * state. 15124 * 15125 * Return code 15126 * 0 - driver suspended the device 15127 * Error otherwise 15128 **/ 15129 static int __maybe_unused 15130 lpfc_pci_resume_one_s4(struct device *dev_d) 15131 { 15132 struct Scsi_Host *shost = dev_get_drvdata(dev_d); 15133 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 15134 uint32_t intr_mode; 15135 int error; 15136 15137 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 15138 "0292 PCI device Power Management resume.\n"); 15139 15140 /* Startup the kernel thread for this host adapter. */ 15141 phba->worker_thread = kthread_run(lpfc_do_work, phba, 15142 "lpfc_worker_%d", phba->brd_no); 15143 if (IS_ERR(phba->worker_thread)) { 15144 error = PTR_ERR(phba->worker_thread); 15145 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 15146 "0293 PM resume failed to start worker " 15147 "thread: error=x%x.\n", error); 15148 return error; 15149 } 15150 15151 /* Configure and enable interrupt */ 15152 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode); 15153 if (intr_mode == LPFC_INTR_ERROR) { 15154 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 15155 "0294 PM resume Failed to enable interrupt\n"); 15156 return -EIO; 15157 } else 15158 phba->intr_mode = intr_mode; 15159 15160 /* Restart HBA and bring it online */ 15161 lpfc_sli_brdrestart(phba); 15162 lpfc_online(phba); 15163 15164 /* Log the current active interrupt mode */ 15165 lpfc_log_intr_mode(phba, phba->intr_mode); 15166 15167 return 0; 15168 } 15169 15170 /** 15171 * lpfc_sli4_prep_dev_for_recover - Prepare SLI4 device for pci slot recover 15172 * @phba: pointer to lpfc hba data structure. 15173 * 15174 * This routine is called to prepare the SLI4 device for PCI slot recover. It 15175 * aborts all the outstanding SCSI I/Os to the pci device. 15176 **/ 15177 static void 15178 lpfc_sli4_prep_dev_for_recover(struct lpfc_hba *phba) 15179 { 15180 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 15181 "2828 PCI channel I/O abort preparing for recovery\n"); 15182 /* 15183 * There may be errored I/Os through HBA, abort all I/Os on txcmplq 15184 * and let the SCSI mid-layer to retry them to recover. 15185 */ 15186 lpfc_sli_abort_fcp_rings(phba); 15187 } 15188 15189 /** 15190 * lpfc_sli4_prep_dev_for_reset - Prepare SLI4 device for pci slot reset 15191 * @phba: pointer to lpfc hba data structure. 15192 * 15193 * This routine is called to prepare the SLI4 device for PCI slot reset. It 15194 * disables the device interrupt and pci device, and aborts the internal FCP 15195 * pending I/Os. 15196 **/ 15197 static void 15198 lpfc_sli4_prep_dev_for_reset(struct lpfc_hba *phba) 15199 { 15200 int offline = pci_channel_offline(phba->pcidev); 15201 15202 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 15203 "2826 PCI channel disable preparing for reset offline" 15204 " %d\n", offline); 15205 15206 /* Block any management I/Os to the device */ 15207 lpfc_block_mgmt_io(phba, LPFC_MBX_NO_WAIT); 15208 15209 15210 /* HBA_PCI_ERR was set in io_error_detect */ 15211 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT); 15212 /* Flush all driver's outstanding I/Os as we are to reset */ 15213 lpfc_sli_flush_io_rings(phba); 15214 lpfc_offline(phba); 15215 15216 /* stop all timers */ 15217 lpfc_stop_hba_timers(phba); 15218 15219 lpfc_sli4_queue_destroy(phba); 15220 /* Disable interrupt and pci device */ 15221 lpfc_sli4_disable_intr(phba); 15222 pci_disable_device(phba->pcidev); 15223 } 15224 15225 /** 15226 * lpfc_sli4_prep_dev_for_perm_failure - Prepare SLI4 dev for pci slot disable 15227 * @phba: pointer to lpfc hba data structure. 15228 * 15229 * This routine is called to prepare the SLI4 device for PCI slot permanently 15230 * disabling. It blocks the SCSI transport layer traffic and flushes the FCP 15231 * pending I/Os. 15232 **/ 15233 static void 15234 lpfc_sli4_prep_dev_for_perm_failure(struct lpfc_hba *phba) 15235 { 15236 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 15237 "2827 PCI channel permanent disable for failure\n"); 15238 15239 /* Block all SCSI devices' I/Os on the host */ 15240 lpfc_scsi_dev_block(phba); 15241 15242 /* stop all timers */ 15243 lpfc_stop_hba_timers(phba); 15244 15245 /* Clean up all driver's outstanding I/Os */ 15246 lpfc_sli_flush_io_rings(phba); 15247 } 15248 15249 /** 15250 * lpfc_io_error_detected_s4 - Method for handling PCI I/O error to SLI-4 device 15251 * @pdev: pointer to PCI device. 15252 * @state: the current PCI connection state. 15253 * 15254 * This routine is called from the PCI subsystem for error handling to device 15255 * with SLI-4 interface spec. This function is called by the PCI subsystem 15256 * after a PCI bus error affecting this device has been detected. When this 15257 * function is invoked, it will need to stop all the I/Os and interrupt(s) 15258 * to the device. Once that is done, it will return PCI_ERS_RESULT_NEED_RESET 15259 * for the PCI subsystem to perform proper recovery as desired. 15260 * 15261 * Return codes 15262 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery 15263 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered 15264 **/ 15265 static pci_ers_result_t 15266 lpfc_io_error_detected_s4(struct pci_dev *pdev, pci_channel_state_t state) 15267 { 15268 struct Scsi_Host *shost = pci_get_drvdata(pdev); 15269 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 15270 bool hba_pci_err; 15271 15272 switch (state) { 15273 case pci_channel_io_normal: 15274 /* Non-fatal error, prepare for recovery */ 15275 lpfc_sli4_prep_dev_for_recover(phba); 15276 return PCI_ERS_RESULT_CAN_RECOVER; 15277 case pci_channel_io_frozen: 15278 hba_pci_err = test_and_set_bit(HBA_PCI_ERR, &phba->bit_flags); 15279 /* Fatal error, prepare for slot reset */ 15280 if (!hba_pci_err) 15281 lpfc_sli4_prep_dev_for_reset(phba); 15282 else 15283 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 15284 "2832 Already handling PCI error " 15285 "state: x%x\n", state); 15286 return PCI_ERS_RESULT_NEED_RESET; 15287 case pci_channel_io_perm_failure: 15288 set_bit(HBA_PCI_ERR, &phba->bit_flags); 15289 /* Permanent failure, prepare for device down */ 15290 lpfc_sli4_prep_dev_for_perm_failure(phba); 15291 return PCI_ERS_RESULT_DISCONNECT; 15292 default: 15293 hba_pci_err = test_and_set_bit(HBA_PCI_ERR, &phba->bit_flags); 15294 if (!hba_pci_err) 15295 lpfc_sli4_prep_dev_for_reset(phba); 15296 /* Unknown state, prepare and request slot reset */ 15297 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 15298 "2825 Unknown PCI error state: x%x\n", state); 15299 lpfc_sli4_prep_dev_for_reset(phba); 15300 return PCI_ERS_RESULT_NEED_RESET; 15301 } 15302 } 15303 15304 /** 15305 * lpfc_io_slot_reset_s4 - Method for restart PCI SLI-4 device from scratch 15306 * @pdev: pointer to PCI device. 15307 * 15308 * This routine is called from the PCI subsystem for error handling to device 15309 * with SLI-4 interface spec. It is called after PCI bus has been reset to 15310 * restart the PCI card from scratch, as if from a cold-boot. During the 15311 * PCI subsystem error recovery, after the driver returns 15312 * PCI_ERS_RESULT_NEED_RESET, the PCI subsystem will perform proper error 15313 * recovery and then call this routine before calling the .resume method to 15314 * recover the device. This function will initialize the HBA device, enable 15315 * the interrupt, but it will just put the HBA to offline state without 15316 * passing any I/O traffic. 15317 * 15318 * Return codes 15319 * PCI_ERS_RESULT_RECOVERED - the device has been recovered 15320 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered 15321 */ 15322 static pci_ers_result_t 15323 lpfc_io_slot_reset_s4(struct pci_dev *pdev) 15324 { 15325 struct Scsi_Host *shost = pci_get_drvdata(pdev); 15326 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 15327 struct lpfc_sli *psli = &phba->sli; 15328 uint32_t intr_mode; 15329 bool hba_pci_err; 15330 15331 dev_printk(KERN_INFO, &pdev->dev, "recovering from a slot reset.\n"); 15332 if (pci_enable_device_mem(pdev)) { 15333 printk(KERN_ERR "lpfc: Cannot re-enable " 15334 "PCI device after reset.\n"); 15335 return PCI_ERS_RESULT_DISCONNECT; 15336 } 15337 15338 pci_restore_state(pdev); 15339 15340 hba_pci_err = test_and_clear_bit(HBA_PCI_ERR, &phba->bit_flags); 15341 if (!hba_pci_err) 15342 dev_info(&pdev->dev, 15343 "hba_pci_err was not set, recovering slot reset.\n"); 15344 /* 15345 * As the new kernel behavior of pci_restore_state() API call clears 15346 * device saved_state flag, need to save the restored state again. 15347 */ 15348 pci_save_state(pdev); 15349 15350 if (pdev->is_busmaster) 15351 pci_set_master(pdev); 15352 15353 spin_lock_irq(&phba->hbalock); 15354 psli->sli_flag &= ~LPFC_SLI_ACTIVE; 15355 spin_unlock_irq(&phba->hbalock); 15356 15357 /* Init cpu_map array */ 15358 lpfc_cpu_map_array_init(phba); 15359 /* Configure and enable interrupt */ 15360 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode); 15361 if (intr_mode == LPFC_INTR_ERROR) { 15362 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 15363 "2824 Cannot re-enable interrupt after " 15364 "slot reset.\n"); 15365 return PCI_ERS_RESULT_DISCONNECT; 15366 } else 15367 phba->intr_mode = intr_mode; 15368 lpfc_cpu_affinity_check(phba, phba->cfg_irq_chann); 15369 15370 /* Log the current active interrupt mode */ 15371 lpfc_log_intr_mode(phba, phba->intr_mode); 15372 15373 return PCI_ERS_RESULT_RECOVERED; 15374 } 15375 15376 /** 15377 * lpfc_io_resume_s4 - Method for resuming PCI I/O operation to SLI-4 device 15378 * @pdev: pointer to PCI device 15379 * 15380 * This routine is called from the PCI subsystem for error handling to device 15381 * with SLI-4 interface spec. It is called when kernel error recovery tells 15382 * the lpfc driver that it is ok to resume normal PCI operation after PCI bus 15383 * error recovery. After this call, traffic can start to flow from this device 15384 * again. 15385 **/ 15386 static void 15387 lpfc_io_resume_s4(struct pci_dev *pdev) 15388 { 15389 struct Scsi_Host *shost = pci_get_drvdata(pdev); 15390 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 15391 15392 /* 15393 * In case of slot reset, as function reset is performed through 15394 * mailbox command which needs DMA to be enabled, this operation 15395 * has to be moved to the io resume phase. Taking device offline 15396 * will perform the necessary cleanup. 15397 */ 15398 if (!(phba->sli.sli_flag & LPFC_SLI_ACTIVE)) { 15399 /* Perform device reset */ 15400 lpfc_sli_brdrestart(phba); 15401 /* Bring the device back online */ 15402 lpfc_online(phba); 15403 } 15404 } 15405 15406 /** 15407 * lpfc_pci_probe_one - lpfc PCI probe func to reg dev to PCI subsystem 15408 * @pdev: pointer to PCI device 15409 * @pid: pointer to PCI device identifier 15410 * 15411 * This routine is to be registered to the kernel's PCI subsystem. When an 15412 * Emulex HBA device is presented on PCI bus, the kernel PCI subsystem looks 15413 * at PCI device-specific information of the device and driver to see if the 15414 * driver state that it can support this kind of device. If the match is 15415 * successful, the driver core invokes this routine. This routine dispatches 15416 * the action to the proper SLI-3 or SLI-4 device probing routine, which will 15417 * do all the initialization that it needs to do to handle the HBA device 15418 * properly. 15419 * 15420 * Return code 15421 * 0 - driver can claim the device 15422 * negative value - driver can not claim the device 15423 **/ 15424 static int 15425 lpfc_pci_probe_one(struct pci_dev *pdev, const struct pci_device_id *pid) 15426 { 15427 int rc; 15428 struct lpfc_sli_intf intf; 15429 15430 if (pci_read_config_dword(pdev, LPFC_SLI_INTF, &intf.word0)) 15431 return -ENODEV; 15432 15433 if ((bf_get(lpfc_sli_intf_valid, &intf) == LPFC_SLI_INTF_VALID) && 15434 (bf_get(lpfc_sli_intf_slirev, &intf) == LPFC_SLI_INTF_REV_SLI4)) 15435 rc = lpfc_pci_probe_one_s4(pdev, pid); 15436 else 15437 rc = lpfc_pci_probe_one_s3(pdev, pid); 15438 15439 return rc; 15440 } 15441 15442 /** 15443 * lpfc_pci_remove_one - lpfc PCI func to unreg dev from PCI subsystem 15444 * @pdev: pointer to PCI device 15445 * 15446 * This routine is to be registered to the kernel's PCI subsystem. When an 15447 * Emulex HBA is removed from PCI bus, the driver core invokes this routine. 15448 * This routine dispatches the action to the proper SLI-3 or SLI-4 device 15449 * remove routine, which will perform all the necessary cleanup for the 15450 * device to be removed from the PCI subsystem properly. 15451 **/ 15452 static void 15453 lpfc_pci_remove_one(struct pci_dev *pdev) 15454 { 15455 struct Scsi_Host *shost = pci_get_drvdata(pdev); 15456 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 15457 15458 switch (phba->pci_dev_grp) { 15459 case LPFC_PCI_DEV_LP: 15460 lpfc_pci_remove_one_s3(pdev); 15461 break; 15462 case LPFC_PCI_DEV_OC: 15463 lpfc_pci_remove_one_s4(pdev); 15464 break; 15465 default: 15466 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 15467 "1424 Invalid PCI device group: 0x%x\n", 15468 phba->pci_dev_grp); 15469 break; 15470 } 15471 return; 15472 } 15473 15474 /** 15475 * lpfc_pci_suspend_one - lpfc PCI func to suspend dev for power management 15476 * @dev: pointer to device 15477 * 15478 * This routine is to be registered to the kernel's PCI subsystem to support 15479 * system Power Management (PM). When PM invokes this method, it dispatches 15480 * the action to the proper SLI-3 or SLI-4 device suspend routine, which will 15481 * suspend the device. 15482 * 15483 * Return code 15484 * 0 - driver suspended the device 15485 * Error otherwise 15486 **/ 15487 static int __maybe_unused 15488 lpfc_pci_suspend_one(struct device *dev) 15489 { 15490 struct Scsi_Host *shost = dev_get_drvdata(dev); 15491 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 15492 int rc = -ENODEV; 15493 15494 switch (phba->pci_dev_grp) { 15495 case LPFC_PCI_DEV_LP: 15496 rc = lpfc_pci_suspend_one_s3(dev); 15497 break; 15498 case LPFC_PCI_DEV_OC: 15499 rc = lpfc_pci_suspend_one_s4(dev); 15500 break; 15501 default: 15502 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 15503 "1425 Invalid PCI device group: 0x%x\n", 15504 phba->pci_dev_grp); 15505 break; 15506 } 15507 return rc; 15508 } 15509 15510 /** 15511 * lpfc_pci_resume_one - lpfc PCI func to resume dev for power management 15512 * @dev: pointer to device 15513 * 15514 * This routine is to be registered to the kernel's PCI subsystem to support 15515 * system Power Management (PM). When PM invokes this method, it dispatches 15516 * the action to the proper SLI-3 or SLI-4 device resume routine, which will 15517 * resume the device. 15518 * 15519 * Return code 15520 * 0 - driver suspended the device 15521 * Error otherwise 15522 **/ 15523 static int __maybe_unused 15524 lpfc_pci_resume_one(struct device *dev) 15525 { 15526 struct Scsi_Host *shost = dev_get_drvdata(dev); 15527 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 15528 int rc = -ENODEV; 15529 15530 switch (phba->pci_dev_grp) { 15531 case LPFC_PCI_DEV_LP: 15532 rc = lpfc_pci_resume_one_s3(dev); 15533 break; 15534 case LPFC_PCI_DEV_OC: 15535 rc = lpfc_pci_resume_one_s4(dev); 15536 break; 15537 default: 15538 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 15539 "1426 Invalid PCI device group: 0x%x\n", 15540 phba->pci_dev_grp); 15541 break; 15542 } 15543 return rc; 15544 } 15545 15546 /** 15547 * lpfc_io_error_detected - lpfc method for handling PCI I/O error 15548 * @pdev: pointer to PCI device. 15549 * @state: the current PCI connection state. 15550 * 15551 * This routine is registered to the PCI subsystem for error handling. This 15552 * function is called by the PCI subsystem after a PCI bus error affecting 15553 * this device has been detected. When this routine is invoked, it dispatches 15554 * the action to the proper SLI-3 or SLI-4 device error detected handling 15555 * routine, which will perform the proper error detected operation. 15556 * 15557 * Return codes 15558 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery 15559 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered 15560 **/ 15561 static pci_ers_result_t 15562 lpfc_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state) 15563 { 15564 struct Scsi_Host *shost = pci_get_drvdata(pdev); 15565 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 15566 pci_ers_result_t rc = PCI_ERS_RESULT_DISCONNECT; 15567 15568 if (phba->link_state == LPFC_HBA_ERROR && 15569 phba->hba_flag & HBA_IOQ_FLUSH) 15570 return PCI_ERS_RESULT_NEED_RESET; 15571 15572 switch (phba->pci_dev_grp) { 15573 case LPFC_PCI_DEV_LP: 15574 rc = lpfc_io_error_detected_s3(pdev, state); 15575 break; 15576 case LPFC_PCI_DEV_OC: 15577 rc = lpfc_io_error_detected_s4(pdev, state); 15578 break; 15579 default: 15580 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 15581 "1427 Invalid PCI device group: 0x%x\n", 15582 phba->pci_dev_grp); 15583 break; 15584 } 15585 return rc; 15586 } 15587 15588 /** 15589 * lpfc_io_slot_reset - lpfc method for restart PCI dev from scratch 15590 * @pdev: pointer to PCI device. 15591 * 15592 * This routine is registered to the PCI subsystem for error handling. This 15593 * function is called after PCI bus has been reset to restart the PCI card 15594 * from scratch, as if from a cold-boot. When this routine is invoked, it 15595 * dispatches the action to the proper SLI-3 or SLI-4 device reset handling 15596 * routine, which will perform the proper device reset. 15597 * 15598 * Return codes 15599 * PCI_ERS_RESULT_RECOVERED - the device has been recovered 15600 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered 15601 **/ 15602 static pci_ers_result_t 15603 lpfc_io_slot_reset(struct pci_dev *pdev) 15604 { 15605 struct Scsi_Host *shost = pci_get_drvdata(pdev); 15606 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 15607 pci_ers_result_t rc = PCI_ERS_RESULT_DISCONNECT; 15608 15609 switch (phba->pci_dev_grp) { 15610 case LPFC_PCI_DEV_LP: 15611 rc = lpfc_io_slot_reset_s3(pdev); 15612 break; 15613 case LPFC_PCI_DEV_OC: 15614 rc = lpfc_io_slot_reset_s4(pdev); 15615 break; 15616 default: 15617 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 15618 "1428 Invalid PCI device group: 0x%x\n", 15619 phba->pci_dev_grp); 15620 break; 15621 } 15622 return rc; 15623 } 15624 15625 /** 15626 * lpfc_io_resume - lpfc method for resuming PCI I/O operation 15627 * @pdev: pointer to PCI device 15628 * 15629 * This routine is registered to the PCI subsystem for error handling. It 15630 * is called when kernel error recovery tells the lpfc driver that it is 15631 * OK to resume normal PCI operation after PCI bus error recovery. When 15632 * this routine is invoked, it dispatches the action to the proper SLI-3 15633 * or SLI-4 device io_resume routine, which will resume the device operation. 15634 **/ 15635 static void 15636 lpfc_io_resume(struct pci_dev *pdev) 15637 { 15638 struct Scsi_Host *shost = pci_get_drvdata(pdev); 15639 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 15640 15641 switch (phba->pci_dev_grp) { 15642 case LPFC_PCI_DEV_LP: 15643 lpfc_io_resume_s3(pdev); 15644 break; 15645 case LPFC_PCI_DEV_OC: 15646 lpfc_io_resume_s4(pdev); 15647 break; 15648 default: 15649 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 15650 "1429 Invalid PCI device group: 0x%x\n", 15651 phba->pci_dev_grp); 15652 break; 15653 } 15654 return; 15655 } 15656 15657 /** 15658 * lpfc_sli4_oas_verify - Verify OAS is supported by this adapter 15659 * @phba: pointer to lpfc hba data structure. 15660 * 15661 * This routine checks to see if OAS is supported for this adapter. If 15662 * supported, the configure Flash Optimized Fabric flag is set. Otherwise, 15663 * the enable oas flag is cleared and the pool created for OAS device data 15664 * is destroyed. 15665 * 15666 **/ 15667 static void 15668 lpfc_sli4_oas_verify(struct lpfc_hba *phba) 15669 { 15670 15671 if (!phba->cfg_EnableXLane) 15672 return; 15673 15674 if (phba->sli4_hba.pc_sli4_params.oas_supported) { 15675 phba->cfg_fof = 1; 15676 } else { 15677 phba->cfg_fof = 0; 15678 mempool_destroy(phba->device_data_mem_pool); 15679 phba->device_data_mem_pool = NULL; 15680 } 15681 15682 return; 15683 } 15684 15685 /** 15686 * lpfc_sli4_ras_init - Verify RAS-FW log is supported by this adapter 15687 * @phba: pointer to lpfc hba data structure. 15688 * 15689 * This routine checks to see if RAS is supported by the adapter. Check the 15690 * function through which RAS support enablement is to be done. 15691 **/ 15692 void 15693 lpfc_sli4_ras_init(struct lpfc_hba *phba) 15694 { 15695 /* if ASIC_GEN_NUM >= 0xC) */ 15696 if ((bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) == 15697 LPFC_SLI_INTF_IF_TYPE_6) || 15698 (bf_get(lpfc_sli_intf_sli_family, &phba->sli4_hba.sli_intf) == 15699 LPFC_SLI_INTF_FAMILY_G6)) { 15700 phba->ras_fwlog.ras_hwsupport = true; 15701 if (phba->cfg_ras_fwlog_func == PCI_FUNC(phba->pcidev->devfn) && 15702 phba->cfg_ras_fwlog_buffsize) 15703 phba->ras_fwlog.ras_enabled = true; 15704 else 15705 phba->ras_fwlog.ras_enabled = false; 15706 } else { 15707 phba->ras_fwlog.ras_hwsupport = false; 15708 } 15709 } 15710 15711 15712 MODULE_DEVICE_TABLE(pci, lpfc_id_table); 15713 15714 static const struct pci_error_handlers lpfc_err_handler = { 15715 .error_detected = lpfc_io_error_detected, 15716 .slot_reset = lpfc_io_slot_reset, 15717 .resume = lpfc_io_resume, 15718 }; 15719 15720 static SIMPLE_DEV_PM_OPS(lpfc_pci_pm_ops_one, 15721 lpfc_pci_suspend_one, 15722 lpfc_pci_resume_one); 15723 15724 static struct pci_driver lpfc_driver = { 15725 .name = LPFC_DRIVER_NAME, 15726 .id_table = lpfc_id_table, 15727 .probe = lpfc_pci_probe_one, 15728 .remove = lpfc_pci_remove_one, 15729 .shutdown = lpfc_pci_remove_one, 15730 .driver.pm = &lpfc_pci_pm_ops_one, 15731 .err_handler = &lpfc_err_handler, 15732 }; 15733 15734 static const struct file_operations lpfc_mgmt_fop = { 15735 .owner = THIS_MODULE, 15736 }; 15737 15738 static struct miscdevice lpfc_mgmt_dev = { 15739 .minor = MISC_DYNAMIC_MINOR, 15740 .name = "lpfcmgmt", 15741 .fops = &lpfc_mgmt_fop, 15742 }; 15743 15744 /** 15745 * lpfc_init - lpfc module initialization routine 15746 * 15747 * This routine is to be invoked when the lpfc module is loaded into the 15748 * kernel. The special kernel macro module_init() is used to indicate the 15749 * role of this routine to the kernel as lpfc module entry point. 15750 * 15751 * Return codes 15752 * 0 - successful 15753 * -ENOMEM - FC attach transport failed 15754 * all others - failed 15755 */ 15756 static int __init 15757 lpfc_init(void) 15758 { 15759 int error = 0; 15760 15761 pr_info(LPFC_MODULE_DESC "\n"); 15762 pr_info(LPFC_COPYRIGHT "\n"); 15763 15764 error = misc_register(&lpfc_mgmt_dev); 15765 if (error) 15766 printk(KERN_ERR "Could not register lpfcmgmt device, " 15767 "misc_register returned with status %d", error); 15768 15769 error = -ENOMEM; 15770 lpfc_transport_functions.vport_create = lpfc_vport_create; 15771 lpfc_transport_functions.vport_delete = lpfc_vport_delete; 15772 lpfc_transport_template = 15773 fc_attach_transport(&lpfc_transport_functions); 15774 if (lpfc_transport_template == NULL) 15775 goto unregister; 15776 lpfc_vport_transport_template = 15777 fc_attach_transport(&lpfc_vport_transport_functions); 15778 if (lpfc_vport_transport_template == NULL) { 15779 fc_release_transport(lpfc_transport_template); 15780 goto unregister; 15781 } 15782 lpfc_wqe_cmd_template(); 15783 lpfc_nvmet_cmd_template(); 15784 15785 /* Initialize in case vector mapping is needed */ 15786 lpfc_present_cpu = num_present_cpus(); 15787 15788 lpfc_pldv_detect = false; 15789 15790 error = cpuhp_setup_state_multi(CPUHP_AP_ONLINE_DYN, 15791 "lpfc/sli4:online", 15792 lpfc_cpu_online, lpfc_cpu_offline); 15793 if (error < 0) 15794 goto cpuhp_failure; 15795 lpfc_cpuhp_state = error; 15796 15797 error = pci_register_driver(&lpfc_driver); 15798 if (error) 15799 goto unwind; 15800 15801 return error; 15802 15803 unwind: 15804 cpuhp_remove_multi_state(lpfc_cpuhp_state); 15805 cpuhp_failure: 15806 fc_release_transport(lpfc_transport_template); 15807 fc_release_transport(lpfc_vport_transport_template); 15808 unregister: 15809 misc_deregister(&lpfc_mgmt_dev); 15810 15811 return error; 15812 } 15813 15814 void lpfc_dmp_dbg(struct lpfc_hba *phba) 15815 { 15816 unsigned int start_idx; 15817 unsigned int dbg_cnt; 15818 unsigned int temp_idx; 15819 int i; 15820 int j = 0; 15821 unsigned long rem_nsec; 15822 15823 if (atomic_cmpxchg(&phba->dbg_log_dmping, 0, 1) != 0) 15824 return; 15825 15826 start_idx = (unsigned int)atomic_read(&phba->dbg_log_idx) % DBG_LOG_SZ; 15827 dbg_cnt = (unsigned int)atomic_read(&phba->dbg_log_cnt); 15828 if (!dbg_cnt) 15829 goto out; 15830 temp_idx = start_idx; 15831 if (dbg_cnt >= DBG_LOG_SZ) { 15832 dbg_cnt = DBG_LOG_SZ; 15833 temp_idx -= 1; 15834 } else { 15835 if ((start_idx + dbg_cnt) > (DBG_LOG_SZ - 1)) { 15836 temp_idx = (start_idx + dbg_cnt) % DBG_LOG_SZ; 15837 } else { 15838 if (start_idx < dbg_cnt) 15839 start_idx = DBG_LOG_SZ - (dbg_cnt - start_idx); 15840 else 15841 start_idx -= dbg_cnt; 15842 } 15843 } 15844 dev_info(&phba->pcidev->dev, "start %d end %d cnt %d\n", 15845 start_idx, temp_idx, dbg_cnt); 15846 15847 for (i = 0; i < dbg_cnt; i++) { 15848 if ((start_idx + i) < DBG_LOG_SZ) 15849 temp_idx = (start_idx + i) % DBG_LOG_SZ; 15850 else 15851 temp_idx = j++; 15852 rem_nsec = do_div(phba->dbg_log[temp_idx].t_ns, NSEC_PER_SEC); 15853 dev_info(&phba->pcidev->dev, "%d: [%5lu.%06lu] %s", 15854 temp_idx, 15855 (unsigned long)phba->dbg_log[temp_idx].t_ns, 15856 rem_nsec / 1000, 15857 phba->dbg_log[temp_idx].log); 15858 } 15859 out: 15860 atomic_set(&phba->dbg_log_cnt, 0); 15861 atomic_set(&phba->dbg_log_dmping, 0); 15862 } 15863 15864 __printf(2, 3) 15865 void lpfc_dbg_print(struct lpfc_hba *phba, const char *fmt, ...) 15866 { 15867 unsigned int idx; 15868 va_list args; 15869 int dbg_dmping = atomic_read(&phba->dbg_log_dmping); 15870 struct va_format vaf; 15871 15872 15873 va_start(args, fmt); 15874 if (unlikely(dbg_dmping)) { 15875 vaf.fmt = fmt; 15876 vaf.va = &args; 15877 dev_info(&phba->pcidev->dev, "%pV", &vaf); 15878 va_end(args); 15879 return; 15880 } 15881 idx = (unsigned int)atomic_fetch_add(1, &phba->dbg_log_idx) % 15882 DBG_LOG_SZ; 15883 15884 atomic_inc(&phba->dbg_log_cnt); 15885 15886 vscnprintf(phba->dbg_log[idx].log, 15887 sizeof(phba->dbg_log[idx].log), fmt, args); 15888 va_end(args); 15889 15890 phba->dbg_log[idx].t_ns = local_clock(); 15891 } 15892 15893 /** 15894 * lpfc_exit - lpfc module removal routine 15895 * 15896 * This routine is invoked when the lpfc module is removed from the kernel. 15897 * The special kernel macro module_exit() is used to indicate the role of 15898 * this routine to the kernel as lpfc module exit point. 15899 */ 15900 static void __exit 15901 lpfc_exit(void) 15902 { 15903 misc_deregister(&lpfc_mgmt_dev); 15904 pci_unregister_driver(&lpfc_driver); 15905 cpuhp_remove_multi_state(lpfc_cpuhp_state); 15906 fc_release_transport(lpfc_transport_template); 15907 fc_release_transport(lpfc_vport_transport_template); 15908 idr_destroy(&lpfc_hba_index); 15909 } 15910 15911 module_init(lpfc_init); 15912 module_exit(lpfc_exit); 15913 MODULE_LICENSE("GPL"); 15914 MODULE_DESCRIPTION(LPFC_MODULE_DESC); 15915 MODULE_AUTHOR("Broadcom"); 15916 MODULE_VERSION("0:" LPFC_DRIVER_VERSION); 15917