1 /******************************************************************* 2 * This file is part of the Emulex Linux Device Driver for * 3 * Fibre Channel Host Bus Adapters. * 4 * Copyright (C) 2017-2022 Broadcom. All Rights Reserved. The term * 5 * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. * 6 * Copyright (C) 2004-2016 Emulex. All rights reserved. * 7 * EMULEX and SLI are trademarks of Emulex. * 8 * www.broadcom.com * 9 * Portions Copyright (C) 2004-2005 Christoph Hellwig * 10 * * 11 * This program is free software; you can redistribute it and/or * 12 * modify it under the terms of version 2 of the GNU General * 13 * Public License as published by the Free Software Foundation. * 14 * This program is distributed in the hope that it will be useful. * 15 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND * 16 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, * 17 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE * 18 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD * 19 * TO BE LEGALLY INVALID. See the GNU General Public License for * 20 * more details, a copy of which can be found in the file COPYING * 21 * included with this package. * 22 *******************************************************************/ 23 24 #include <linux/blkdev.h> 25 #include <linux/delay.h> 26 #include <linux/dma-mapping.h> 27 #include <linux/idr.h> 28 #include <linux/interrupt.h> 29 #include <linux/module.h> 30 #include <linux/kthread.h> 31 #include <linux/pci.h> 32 #include <linux/spinlock.h> 33 #include <linux/ctype.h> 34 #include <linux/aer.h> 35 #include <linux/slab.h> 36 #include <linux/firmware.h> 37 #include <linux/miscdevice.h> 38 #include <linux/percpu.h> 39 #include <linux/irq.h> 40 #include <linux/bitops.h> 41 #include <linux/crash_dump.h> 42 #include <linux/cpu.h> 43 #include <linux/cpuhotplug.h> 44 45 #include <scsi/scsi.h> 46 #include <scsi/scsi_device.h> 47 #include <scsi/scsi_host.h> 48 #include <scsi/scsi_transport_fc.h> 49 #include <scsi/scsi_tcq.h> 50 #include <scsi/fc/fc_fs.h> 51 52 #include "lpfc_hw4.h" 53 #include "lpfc_hw.h" 54 #include "lpfc_sli.h" 55 #include "lpfc_sli4.h" 56 #include "lpfc_nl.h" 57 #include "lpfc_disc.h" 58 #include "lpfc.h" 59 #include "lpfc_scsi.h" 60 #include "lpfc_nvme.h" 61 #include "lpfc_logmsg.h" 62 #include "lpfc_crtn.h" 63 #include "lpfc_vport.h" 64 #include "lpfc_version.h" 65 #include "lpfc_ids.h" 66 67 static enum cpuhp_state lpfc_cpuhp_state; 68 /* Used when mapping IRQ vectors in a driver centric manner */ 69 static uint32_t lpfc_present_cpu; 70 static bool lpfc_pldv_detect; 71 72 static void __lpfc_cpuhp_remove(struct lpfc_hba *phba); 73 static void lpfc_cpuhp_remove(struct lpfc_hba *phba); 74 static void lpfc_cpuhp_add(struct lpfc_hba *phba); 75 static void lpfc_get_hba_model_desc(struct lpfc_hba *, uint8_t *, uint8_t *); 76 static int lpfc_post_rcv_buf(struct lpfc_hba *); 77 static int lpfc_sli4_queue_verify(struct lpfc_hba *); 78 static int lpfc_create_bootstrap_mbox(struct lpfc_hba *); 79 static int lpfc_setup_endian_order(struct lpfc_hba *); 80 static void lpfc_destroy_bootstrap_mbox(struct lpfc_hba *); 81 static void lpfc_free_els_sgl_list(struct lpfc_hba *); 82 static void lpfc_free_nvmet_sgl_list(struct lpfc_hba *); 83 static void lpfc_init_sgl_list(struct lpfc_hba *); 84 static int lpfc_init_active_sgl_array(struct lpfc_hba *); 85 static void lpfc_free_active_sgl(struct lpfc_hba *); 86 static int lpfc_hba_down_post_s3(struct lpfc_hba *phba); 87 static int lpfc_hba_down_post_s4(struct lpfc_hba *phba); 88 static int lpfc_sli4_cq_event_pool_create(struct lpfc_hba *); 89 static void lpfc_sli4_cq_event_pool_destroy(struct lpfc_hba *); 90 static void lpfc_sli4_cq_event_release_all(struct lpfc_hba *); 91 static void lpfc_sli4_disable_intr(struct lpfc_hba *); 92 static uint32_t lpfc_sli4_enable_intr(struct lpfc_hba *, uint32_t); 93 static void lpfc_sli4_oas_verify(struct lpfc_hba *phba); 94 static uint16_t lpfc_find_cpu_handle(struct lpfc_hba *, uint16_t, int); 95 static void lpfc_setup_bg(struct lpfc_hba *, struct Scsi_Host *); 96 static int lpfc_sli4_cgn_parm_chg_evt(struct lpfc_hba *); 97 static void lpfc_sli4_prep_dev_for_reset(struct lpfc_hba *phba); 98 99 static struct scsi_transport_template *lpfc_transport_template = NULL; 100 static struct scsi_transport_template *lpfc_vport_transport_template = NULL; 101 static DEFINE_IDR(lpfc_hba_index); 102 #define LPFC_NVMET_BUF_POST 254 103 static int lpfc_vmid_res_alloc(struct lpfc_hba *phba, struct lpfc_vport *vport); 104 105 /** 106 * lpfc_config_port_prep - Perform lpfc initialization prior to config port 107 * @phba: pointer to lpfc hba data structure. 108 * 109 * This routine will do LPFC initialization prior to issuing the CONFIG_PORT 110 * mailbox command. It retrieves the revision information from the HBA and 111 * collects the Vital Product Data (VPD) about the HBA for preparing the 112 * configuration of the HBA. 113 * 114 * Return codes: 115 * 0 - success. 116 * -ERESTART - requests the SLI layer to reset the HBA and try again. 117 * Any other value - indicates an error. 118 **/ 119 int 120 lpfc_config_port_prep(struct lpfc_hba *phba) 121 { 122 lpfc_vpd_t *vp = &phba->vpd; 123 int i = 0, rc; 124 LPFC_MBOXQ_t *pmb; 125 MAILBOX_t *mb; 126 char *lpfc_vpd_data = NULL; 127 uint16_t offset = 0; 128 static char licensed[56] = 129 "key unlock for use with gnu public licensed code only\0"; 130 static int init_key = 1; 131 132 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 133 if (!pmb) { 134 phba->link_state = LPFC_HBA_ERROR; 135 return -ENOMEM; 136 } 137 138 mb = &pmb->u.mb; 139 phba->link_state = LPFC_INIT_MBX_CMDS; 140 141 if (lpfc_is_LC_HBA(phba->pcidev->device)) { 142 if (init_key) { 143 uint32_t *ptext = (uint32_t *) licensed; 144 145 for (i = 0; i < 56; i += sizeof (uint32_t), ptext++) 146 *ptext = cpu_to_be32(*ptext); 147 init_key = 0; 148 } 149 150 lpfc_read_nv(phba, pmb); 151 memset((char*)mb->un.varRDnvp.rsvd3, 0, 152 sizeof (mb->un.varRDnvp.rsvd3)); 153 memcpy((char*)mb->un.varRDnvp.rsvd3, licensed, 154 sizeof (licensed)); 155 156 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); 157 158 if (rc != MBX_SUCCESS) { 159 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 160 "0324 Config Port initialization " 161 "error, mbxCmd x%x READ_NVPARM, " 162 "mbxStatus x%x\n", 163 mb->mbxCommand, mb->mbxStatus); 164 mempool_free(pmb, phba->mbox_mem_pool); 165 return -ERESTART; 166 } 167 memcpy(phba->wwnn, (char *)mb->un.varRDnvp.nodename, 168 sizeof(phba->wwnn)); 169 memcpy(phba->wwpn, (char *)mb->un.varRDnvp.portname, 170 sizeof(phba->wwpn)); 171 } 172 173 /* 174 * Clear all option bits except LPFC_SLI3_BG_ENABLED, 175 * which was already set in lpfc_get_cfgparam() 176 */ 177 phba->sli3_options &= (uint32_t)LPFC_SLI3_BG_ENABLED; 178 179 /* Setup and issue mailbox READ REV command */ 180 lpfc_read_rev(phba, pmb); 181 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); 182 if (rc != MBX_SUCCESS) { 183 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 184 "0439 Adapter failed to init, mbxCmd x%x " 185 "READ_REV, mbxStatus x%x\n", 186 mb->mbxCommand, mb->mbxStatus); 187 mempool_free( pmb, phba->mbox_mem_pool); 188 return -ERESTART; 189 } 190 191 192 /* 193 * The value of rr must be 1 since the driver set the cv field to 1. 194 * This setting requires the FW to set all revision fields. 195 */ 196 if (mb->un.varRdRev.rr == 0) { 197 vp->rev.rBit = 0; 198 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 199 "0440 Adapter failed to init, READ_REV has " 200 "missing revision information.\n"); 201 mempool_free(pmb, phba->mbox_mem_pool); 202 return -ERESTART; 203 } 204 205 if (phba->sli_rev == 3 && !mb->un.varRdRev.v3rsp) { 206 mempool_free(pmb, phba->mbox_mem_pool); 207 return -EINVAL; 208 } 209 210 /* Save information as VPD data */ 211 vp->rev.rBit = 1; 212 memcpy(&vp->sli3Feat, &mb->un.varRdRev.sli3Feat, sizeof(uint32_t)); 213 vp->rev.sli1FwRev = mb->un.varRdRev.sli1FwRev; 214 memcpy(vp->rev.sli1FwName, (char*) mb->un.varRdRev.sli1FwName, 16); 215 vp->rev.sli2FwRev = mb->un.varRdRev.sli2FwRev; 216 memcpy(vp->rev.sli2FwName, (char *) mb->un.varRdRev.sli2FwName, 16); 217 vp->rev.biuRev = mb->un.varRdRev.biuRev; 218 vp->rev.smRev = mb->un.varRdRev.smRev; 219 vp->rev.smFwRev = mb->un.varRdRev.un.smFwRev; 220 vp->rev.endecRev = mb->un.varRdRev.endecRev; 221 vp->rev.fcphHigh = mb->un.varRdRev.fcphHigh; 222 vp->rev.fcphLow = mb->un.varRdRev.fcphLow; 223 vp->rev.feaLevelHigh = mb->un.varRdRev.feaLevelHigh; 224 vp->rev.feaLevelLow = mb->un.varRdRev.feaLevelLow; 225 vp->rev.postKernRev = mb->un.varRdRev.postKernRev; 226 vp->rev.opFwRev = mb->un.varRdRev.opFwRev; 227 228 /* If the sli feature level is less then 9, we must 229 * tear down all RPIs and VPIs on link down if NPIV 230 * is enabled. 231 */ 232 if (vp->rev.feaLevelHigh < 9) 233 phba->sli3_options |= LPFC_SLI3_VPORT_TEARDOWN; 234 235 if (lpfc_is_LC_HBA(phba->pcidev->device)) 236 memcpy(phba->RandomData, (char *)&mb->un.varWords[24], 237 sizeof (phba->RandomData)); 238 239 /* Get adapter VPD information */ 240 lpfc_vpd_data = kmalloc(DMP_VPD_SIZE, GFP_KERNEL); 241 if (!lpfc_vpd_data) 242 goto out_free_mbox; 243 do { 244 lpfc_dump_mem(phba, pmb, offset, DMP_REGION_VPD); 245 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); 246 247 if (rc != MBX_SUCCESS) { 248 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 249 "0441 VPD not present on adapter, " 250 "mbxCmd x%x DUMP VPD, mbxStatus x%x\n", 251 mb->mbxCommand, mb->mbxStatus); 252 mb->un.varDmp.word_cnt = 0; 253 } 254 /* dump mem may return a zero when finished or we got a 255 * mailbox error, either way we are done. 256 */ 257 if (mb->un.varDmp.word_cnt == 0) 258 break; 259 260 if (mb->un.varDmp.word_cnt > DMP_VPD_SIZE - offset) 261 mb->un.varDmp.word_cnt = DMP_VPD_SIZE - offset; 262 lpfc_sli_pcimem_bcopy(((uint8_t *)mb) + DMP_RSP_OFFSET, 263 lpfc_vpd_data + offset, 264 mb->un.varDmp.word_cnt); 265 offset += mb->un.varDmp.word_cnt; 266 } while (mb->un.varDmp.word_cnt && offset < DMP_VPD_SIZE); 267 268 lpfc_parse_vpd(phba, lpfc_vpd_data, offset); 269 270 kfree(lpfc_vpd_data); 271 out_free_mbox: 272 mempool_free(pmb, phba->mbox_mem_pool); 273 return 0; 274 } 275 276 /** 277 * lpfc_config_async_cmpl - Completion handler for config async event mbox cmd 278 * @phba: pointer to lpfc hba data structure. 279 * @pmboxq: pointer to the driver internal queue element for mailbox command. 280 * 281 * This is the completion handler for driver's configuring asynchronous event 282 * mailbox command to the device. If the mailbox command returns successfully, 283 * it will set internal async event support flag to 1; otherwise, it will 284 * set internal async event support flag to 0. 285 **/ 286 static void 287 lpfc_config_async_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq) 288 { 289 if (pmboxq->u.mb.mbxStatus == MBX_SUCCESS) 290 phba->temp_sensor_support = 1; 291 else 292 phba->temp_sensor_support = 0; 293 mempool_free(pmboxq, phba->mbox_mem_pool); 294 return; 295 } 296 297 /** 298 * lpfc_dump_wakeup_param_cmpl - dump memory mailbox command completion handler 299 * @phba: pointer to lpfc hba data structure. 300 * @pmboxq: pointer to the driver internal queue element for mailbox command. 301 * 302 * This is the completion handler for dump mailbox command for getting 303 * wake up parameters. When this command complete, the response contain 304 * Option rom version of the HBA. This function translate the version number 305 * into a human readable string and store it in OptionROMVersion. 306 **/ 307 static void 308 lpfc_dump_wakeup_param_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq) 309 { 310 struct prog_id *prg; 311 uint32_t prog_id_word; 312 char dist = ' '; 313 /* character array used for decoding dist type. */ 314 char dist_char[] = "nabx"; 315 316 if (pmboxq->u.mb.mbxStatus != MBX_SUCCESS) { 317 mempool_free(pmboxq, phba->mbox_mem_pool); 318 return; 319 } 320 321 prg = (struct prog_id *) &prog_id_word; 322 323 /* word 7 contain option rom version */ 324 prog_id_word = pmboxq->u.mb.un.varWords[7]; 325 326 /* Decode the Option rom version word to a readable string */ 327 dist = dist_char[prg->dist]; 328 329 if ((prg->dist == 3) && (prg->num == 0)) 330 snprintf(phba->OptionROMVersion, 32, "%d.%d%d", 331 prg->ver, prg->rev, prg->lev); 332 else 333 snprintf(phba->OptionROMVersion, 32, "%d.%d%d%c%d", 334 prg->ver, prg->rev, prg->lev, 335 dist, prg->num); 336 mempool_free(pmboxq, phba->mbox_mem_pool); 337 return; 338 } 339 340 /** 341 * lpfc_update_vport_wwn - Updates the fc_nodename, fc_portname, 342 * @vport: pointer to lpfc vport data structure. 343 * 344 * 345 * Return codes 346 * None. 347 **/ 348 void 349 lpfc_update_vport_wwn(struct lpfc_vport *vport) 350 { 351 struct lpfc_hba *phba = vport->phba; 352 353 /* 354 * If the name is empty or there exists a soft name 355 * then copy the service params name, otherwise use the fc name 356 */ 357 if (vport->fc_nodename.u.wwn[0] == 0) 358 memcpy(&vport->fc_nodename, &vport->fc_sparam.nodeName, 359 sizeof(struct lpfc_name)); 360 else 361 memcpy(&vport->fc_sparam.nodeName, &vport->fc_nodename, 362 sizeof(struct lpfc_name)); 363 364 /* 365 * If the port name has changed, then set the Param changes flag 366 * to unreg the login 367 */ 368 if (vport->fc_portname.u.wwn[0] != 0 && 369 memcmp(&vport->fc_portname, &vport->fc_sparam.portName, 370 sizeof(struct lpfc_name))) { 371 vport->vport_flag |= FAWWPN_PARAM_CHG; 372 373 if (phba->sli_rev == LPFC_SLI_REV4 && 374 vport->port_type == LPFC_PHYSICAL_PORT && 375 phba->sli4_hba.fawwpn_flag & LPFC_FAWWPN_FABRIC) { 376 if (!(phba->sli4_hba.fawwpn_flag & LPFC_FAWWPN_CONFIG)) 377 phba->sli4_hba.fawwpn_flag &= 378 ~LPFC_FAWWPN_FABRIC; 379 lpfc_printf_log(phba, KERN_INFO, 380 LOG_SLI | LOG_DISCOVERY | LOG_ELS, 381 "2701 FA-PWWN change WWPN from %llx to " 382 "%llx: vflag x%x fawwpn_flag x%x\n", 383 wwn_to_u64(vport->fc_portname.u.wwn), 384 wwn_to_u64 385 (vport->fc_sparam.portName.u.wwn), 386 vport->vport_flag, 387 phba->sli4_hba.fawwpn_flag); 388 memcpy(&vport->fc_portname, &vport->fc_sparam.portName, 389 sizeof(struct lpfc_name)); 390 } 391 } 392 393 if (vport->fc_portname.u.wwn[0] == 0) 394 memcpy(&vport->fc_portname, &vport->fc_sparam.portName, 395 sizeof(struct lpfc_name)); 396 else 397 memcpy(&vport->fc_sparam.portName, &vport->fc_portname, 398 sizeof(struct lpfc_name)); 399 } 400 401 /** 402 * lpfc_config_port_post - Perform lpfc initialization after config port 403 * @phba: pointer to lpfc hba data structure. 404 * 405 * This routine will do LPFC initialization after the CONFIG_PORT mailbox 406 * command call. It performs all internal resource and state setups on the 407 * port: post IOCB buffers, enable appropriate host interrupt attentions, 408 * ELS ring timers, etc. 409 * 410 * Return codes 411 * 0 - success. 412 * Any other value - error. 413 **/ 414 int 415 lpfc_config_port_post(struct lpfc_hba *phba) 416 { 417 struct lpfc_vport *vport = phba->pport; 418 struct Scsi_Host *shost = lpfc_shost_from_vport(vport); 419 LPFC_MBOXQ_t *pmb; 420 MAILBOX_t *mb; 421 struct lpfc_dmabuf *mp; 422 struct lpfc_sli *psli = &phba->sli; 423 uint32_t status, timeout; 424 int i, j; 425 int rc; 426 427 spin_lock_irq(&phba->hbalock); 428 /* 429 * If the Config port completed correctly the HBA is not 430 * over heated any more. 431 */ 432 if (phba->over_temp_state == HBA_OVER_TEMP) 433 phba->over_temp_state = HBA_NORMAL_TEMP; 434 spin_unlock_irq(&phba->hbalock); 435 436 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 437 if (!pmb) { 438 phba->link_state = LPFC_HBA_ERROR; 439 return -ENOMEM; 440 } 441 mb = &pmb->u.mb; 442 443 /* Get login parameters for NID. */ 444 rc = lpfc_read_sparam(phba, pmb, 0); 445 if (rc) { 446 mempool_free(pmb, phba->mbox_mem_pool); 447 return -ENOMEM; 448 } 449 450 pmb->vport = vport; 451 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) { 452 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 453 "0448 Adapter failed init, mbxCmd x%x " 454 "READ_SPARM mbxStatus x%x\n", 455 mb->mbxCommand, mb->mbxStatus); 456 phba->link_state = LPFC_HBA_ERROR; 457 lpfc_mbox_rsrc_cleanup(phba, pmb, MBOX_THD_UNLOCKED); 458 return -EIO; 459 } 460 461 mp = (struct lpfc_dmabuf *)pmb->ctx_buf; 462 463 /* This dmabuf was allocated by lpfc_read_sparam. The dmabuf is no 464 * longer needed. Prevent unintended ctx_buf access as the mbox is 465 * reused. 466 */ 467 memcpy(&vport->fc_sparam, mp->virt, sizeof (struct serv_parm)); 468 lpfc_mbuf_free(phba, mp->virt, mp->phys); 469 kfree(mp); 470 pmb->ctx_buf = NULL; 471 lpfc_update_vport_wwn(vport); 472 473 /* Update the fc_host data structures with new wwn. */ 474 fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn); 475 fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn); 476 fc_host_max_npiv_vports(shost) = phba->max_vpi; 477 478 /* If no serial number in VPD data, use low 6 bytes of WWNN */ 479 /* This should be consolidated into parse_vpd ? - mr */ 480 if (phba->SerialNumber[0] == 0) { 481 uint8_t *outptr; 482 483 outptr = &vport->fc_nodename.u.s.IEEE[0]; 484 for (i = 0; i < 12; i++) { 485 status = *outptr++; 486 j = ((status & 0xf0) >> 4); 487 if (j <= 9) 488 phba->SerialNumber[i] = 489 (char)((uint8_t) 0x30 + (uint8_t) j); 490 else 491 phba->SerialNumber[i] = 492 (char)((uint8_t) 0x61 + (uint8_t) (j - 10)); 493 i++; 494 j = (status & 0xf); 495 if (j <= 9) 496 phba->SerialNumber[i] = 497 (char)((uint8_t) 0x30 + (uint8_t) j); 498 else 499 phba->SerialNumber[i] = 500 (char)((uint8_t) 0x61 + (uint8_t) (j - 10)); 501 } 502 } 503 504 lpfc_read_config(phba, pmb); 505 pmb->vport = vport; 506 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) { 507 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 508 "0453 Adapter failed to init, mbxCmd x%x " 509 "READ_CONFIG, mbxStatus x%x\n", 510 mb->mbxCommand, mb->mbxStatus); 511 phba->link_state = LPFC_HBA_ERROR; 512 mempool_free( pmb, phba->mbox_mem_pool); 513 return -EIO; 514 } 515 516 /* Check if the port is disabled */ 517 lpfc_sli_read_link_ste(phba); 518 519 /* Reset the DFT_HBA_Q_DEPTH to the max xri */ 520 if (phba->cfg_hba_queue_depth > mb->un.varRdConfig.max_xri) { 521 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 522 "3359 HBA queue depth changed from %d to %d\n", 523 phba->cfg_hba_queue_depth, 524 mb->un.varRdConfig.max_xri); 525 phba->cfg_hba_queue_depth = mb->un.varRdConfig.max_xri; 526 } 527 528 phba->lmt = mb->un.varRdConfig.lmt; 529 530 /* Get the default values for Model Name and Description */ 531 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc); 532 533 phba->link_state = LPFC_LINK_DOWN; 534 535 /* Only process IOCBs on ELS ring till hba_state is READY */ 536 if (psli->sli3_ring[LPFC_EXTRA_RING].sli.sli3.cmdringaddr) 537 psli->sli3_ring[LPFC_EXTRA_RING].flag |= LPFC_STOP_IOCB_EVENT; 538 if (psli->sli3_ring[LPFC_FCP_RING].sli.sli3.cmdringaddr) 539 psli->sli3_ring[LPFC_FCP_RING].flag |= LPFC_STOP_IOCB_EVENT; 540 541 /* Post receive buffers for desired rings */ 542 if (phba->sli_rev != 3) 543 lpfc_post_rcv_buf(phba); 544 545 /* 546 * Configure HBA MSI-X attention conditions to messages if MSI-X mode 547 */ 548 if (phba->intr_type == MSIX) { 549 rc = lpfc_config_msi(phba, pmb); 550 if (rc) { 551 mempool_free(pmb, phba->mbox_mem_pool); 552 return -EIO; 553 } 554 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); 555 if (rc != MBX_SUCCESS) { 556 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 557 "0352 Config MSI mailbox command " 558 "failed, mbxCmd x%x, mbxStatus x%x\n", 559 pmb->u.mb.mbxCommand, 560 pmb->u.mb.mbxStatus); 561 mempool_free(pmb, phba->mbox_mem_pool); 562 return -EIO; 563 } 564 } 565 566 spin_lock_irq(&phba->hbalock); 567 /* Initialize ERATT handling flag */ 568 phba->hba_flag &= ~HBA_ERATT_HANDLED; 569 570 /* Enable appropriate host interrupts */ 571 if (lpfc_readl(phba->HCregaddr, &status)) { 572 spin_unlock_irq(&phba->hbalock); 573 return -EIO; 574 } 575 status |= HC_MBINT_ENA | HC_ERINT_ENA | HC_LAINT_ENA; 576 if (psli->num_rings > 0) 577 status |= HC_R0INT_ENA; 578 if (psli->num_rings > 1) 579 status |= HC_R1INT_ENA; 580 if (psli->num_rings > 2) 581 status |= HC_R2INT_ENA; 582 if (psli->num_rings > 3) 583 status |= HC_R3INT_ENA; 584 585 if ((phba->cfg_poll & ENABLE_FCP_RING_POLLING) && 586 (phba->cfg_poll & DISABLE_FCP_RING_INT)) 587 status &= ~(HC_R0INT_ENA); 588 589 writel(status, phba->HCregaddr); 590 readl(phba->HCregaddr); /* flush */ 591 spin_unlock_irq(&phba->hbalock); 592 593 /* Set up ring-0 (ELS) timer */ 594 timeout = phba->fc_ratov * 2; 595 mod_timer(&vport->els_tmofunc, 596 jiffies + msecs_to_jiffies(1000 * timeout)); 597 /* Set up heart beat (HB) timer */ 598 mod_timer(&phba->hb_tmofunc, 599 jiffies + msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL)); 600 phba->hba_flag &= ~(HBA_HBEAT_INP | HBA_HBEAT_TMO); 601 phba->last_completion_time = jiffies; 602 /* Set up error attention (ERATT) polling timer */ 603 mod_timer(&phba->eratt_poll, 604 jiffies + msecs_to_jiffies(1000 * phba->eratt_poll_interval)); 605 606 if (phba->hba_flag & LINK_DISABLED) { 607 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 608 "2598 Adapter Link is disabled.\n"); 609 lpfc_down_link(phba, pmb); 610 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl; 611 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT); 612 if ((rc != MBX_SUCCESS) && (rc != MBX_BUSY)) { 613 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 614 "2599 Adapter failed to issue DOWN_LINK" 615 " mbox command rc 0x%x\n", rc); 616 617 mempool_free(pmb, phba->mbox_mem_pool); 618 return -EIO; 619 } 620 } else if (phba->cfg_suppress_link_up == LPFC_INITIALIZE_LINK) { 621 mempool_free(pmb, phba->mbox_mem_pool); 622 rc = phba->lpfc_hba_init_link(phba, MBX_NOWAIT); 623 if (rc) 624 return rc; 625 } 626 /* MBOX buffer will be freed in mbox compl */ 627 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 628 if (!pmb) { 629 phba->link_state = LPFC_HBA_ERROR; 630 return -ENOMEM; 631 } 632 633 lpfc_config_async(phba, pmb, LPFC_ELS_RING); 634 pmb->mbox_cmpl = lpfc_config_async_cmpl; 635 pmb->vport = phba->pport; 636 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT); 637 638 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) { 639 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 640 "0456 Adapter failed to issue " 641 "ASYNCEVT_ENABLE mbox status x%x\n", 642 rc); 643 mempool_free(pmb, phba->mbox_mem_pool); 644 } 645 646 /* Get Option rom version */ 647 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 648 if (!pmb) { 649 phba->link_state = LPFC_HBA_ERROR; 650 return -ENOMEM; 651 } 652 653 lpfc_dump_wakeup_param(phba, pmb); 654 pmb->mbox_cmpl = lpfc_dump_wakeup_param_cmpl; 655 pmb->vport = phba->pport; 656 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT); 657 658 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) { 659 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 660 "0435 Adapter failed " 661 "to get Option ROM version status x%x\n", rc); 662 mempool_free(pmb, phba->mbox_mem_pool); 663 } 664 665 return 0; 666 } 667 668 /** 669 * lpfc_sli4_refresh_params - update driver copy of params. 670 * @phba: Pointer to HBA context object. 671 * 672 * This is called to refresh driver copy of dynamic fields from the 673 * common_get_sli4_parameters descriptor. 674 **/ 675 int 676 lpfc_sli4_refresh_params(struct lpfc_hba *phba) 677 { 678 LPFC_MBOXQ_t *mboxq; 679 struct lpfc_mqe *mqe; 680 struct lpfc_sli4_parameters *mbx_sli4_parameters; 681 int length, rc; 682 683 mboxq = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 684 if (!mboxq) 685 return -ENOMEM; 686 687 mqe = &mboxq->u.mqe; 688 /* Read the port's SLI4 Config Parameters */ 689 length = (sizeof(struct lpfc_mbx_get_sli4_parameters) - 690 sizeof(struct lpfc_sli4_cfg_mhdr)); 691 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON, 692 LPFC_MBOX_OPCODE_GET_SLI4_PARAMETERS, 693 length, LPFC_SLI4_MBX_EMBED); 694 695 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); 696 if (unlikely(rc)) { 697 mempool_free(mboxq, phba->mbox_mem_pool); 698 return rc; 699 } 700 mbx_sli4_parameters = &mqe->un.get_sli4_parameters.sli4_parameters; 701 phba->sli4_hba.pc_sli4_params.mi_cap = 702 bf_get(cfg_mi_ver, mbx_sli4_parameters); 703 704 /* Are we forcing MI off via module parameter? */ 705 if (phba->cfg_enable_mi) 706 phba->sli4_hba.pc_sli4_params.mi_ver = 707 bf_get(cfg_mi_ver, mbx_sli4_parameters); 708 else 709 phba->sli4_hba.pc_sli4_params.mi_ver = 0; 710 711 phba->sli4_hba.pc_sli4_params.cmf = 712 bf_get(cfg_cmf, mbx_sli4_parameters); 713 phba->sli4_hba.pc_sli4_params.pls = 714 bf_get(cfg_pvl, mbx_sli4_parameters); 715 716 mempool_free(mboxq, phba->mbox_mem_pool); 717 return rc; 718 } 719 720 /** 721 * lpfc_hba_init_link - Initialize the FC link 722 * @phba: pointer to lpfc hba data structure. 723 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT 724 * 725 * This routine will issue the INIT_LINK mailbox command call. 726 * It is available to other drivers through the lpfc_hba data 727 * structure for use as a delayed link up mechanism with the 728 * module parameter lpfc_suppress_link_up. 729 * 730 * Return code 731 * 0 - success 732 * Any other value - error 733 **/ 734 static int 735 lpfc_hba_init_link(struct lpfc_hba *phba, uint32_t flag) 736 { 737 return lpfc_hba_init_link_fc_topology(phba, phba->cfg_topology, flag); 738 } 739 740 /** 741 * lpfc_hba_init_link_fc_topology - Initialize FC link with desired topology 742 * @phba: pointer to lpfc hba data structure. 743 * @fc_topology: desired fc topology. 744 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT 745 * 746 * This routine will issue the INIT_LINK mailbox command call. 747 * It is available to other drivers through the lpfc_hba data 748 * structure for use as a delayed link up mechanism with the 749 * module parameter lpfc_suppress_link_up. 750 * 751 * Return code 752 * 0 - success 753 * Any other value - error 754 **/ 755 int 756 lpfc_hba_init_link_fc_topology(struct lpfc_hba *phba, uint32_t fc_topology, 757 uint32_t flag) 758 { 759 struct lpfc_vport *vport = phba->pport; 760 LPFC_MBOXQ_t *pmb; 761 MAILBOX_t *mb; 762 int rc; 763 764 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 765 if (!pmb) { 766 phba->link_state = LPFC_HBA_ERROR; 767 return -ENOMEM; 768 } 769 mb = &pmb->u.mb; 770 pmb->vport = vport; 771 772 if ((phba->cfg_link_speed > LPFC_USER_LINK_SPEED_MAX) || 773 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_1G) && 774 !(phba->lmt & LMT_1Gb)) || 775 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_2G) && 776 !(phba->lmt & LMT_2Gb)) || 777 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_4G) && 778 !(phba->lmt & LMT_4Gb)) || 779 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_8G) && 780 !(phba->lmt & LMT_8Gb)) || 781 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_10G) && 782 !(phba->lmt & LMT_10Gb)) || 783 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_16G) && 784 !(phba->lmt & LMT_16Gb)) || 785 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_32G) && 786 !(phba->lmt & LMT_32Gb)) || 787 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_64G) && 788 !(phba->lmt & LMT_64Gb))) { 789 /* Reset link speed to auto */ 790 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 791 "1302 Invalid speed for this board:%d " 792 "Reset link speed to auto.\n", 793 phba->cfg_link_speed); 794 phba->cfg_link_speed = LPFC_USER_LINK_SPEED_AUTO; 795 } 796 lpfc_init_link(phba, pmb, fc_topology, phba->cfg_link_speed); 797 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl; 798 if (phba->sli_rev < LPFC_SLI_REV4) 799 lpfc_set_loopback_flag(phba); 800 rc = lpfc_sli_issue_mbox(phba, pmb, flag); 801 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) { 802 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 803 "0498 Adapter failed to init, mbxCmd x%x " 804 "INIT_LINK, mbxStatus x%x\n", 805 mb->mbxCommand, mb->mbxStatus); 806 if (phba->sli_rev <= LPFC_SLI_REV3) { 807 /* Clear all interrupt enable conditions */ 808 writel(0, phba->HCregaddr); 809 readl(phba->HCregaddr); /* flush */ 810 /* Clear all pending interrupts */ 811 writel(0xffffffff, phba->HAregaddr); 812 readl(phba->HAregaddr); /* flush */ 813 } 814 phba->link_state = LPFC_HBA_ERROR; 815 if (rc != MBX_BUSY || flag == MBX_POLL) 816 mempool_free(pmb, phba->mbox_mem_pool); 817 return -EIO; 818 } 819 phba->cfg_suppress_link_up = LPFC_INITIALIZE_LINK; 820 if (flag == MBX_POLL) 821 mempool_free(pmb, phba->mbox_mem_pool); 822 823 return 0; 824 } 825 826 /** 827 * lpfc_hba_down_link - this routine downs the FC link 828 * @phba: pointer to lpfc hba data structure. 829 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT 830 * 831 * This routine will issue the DOWN_LINK mailbox command call. 832 * It is available to other drivers through the lpfc_hba data 833 * structure for use to stop the link. 834 * 835 * Return code 836 * 0 - success 837 * Any other value - error 838 **/ 839 static int 840 lpfc_hba_down_link(struct lpfc_hba *phba, uint32_t flag) 841 { 842 LPFC_MBOXQ_t *pmb; 843 int rc; 844 845 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 846 if (!pmb) { 847 phba->link_state = LPFC_HBA_ERROR; 848 return -ENOMEM; 849 } 850 851 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 852 "0491 Adapter Link is disabled.\n"); 853 lpfc_down_link(phba, pmb); 854 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl; 855 rc = lpfc_sli_issue_mbox(phba, pmb, flag); 856 if ((rc != MBX_SUCCESS) && (rc != MBX_BUSY)) { 857 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 858 "2522 Adapter failed to issue DOWN_LINK" 859 " mbox command rc 0x%x\n", rc); 860 861 mempool_free(pmb, phba->mbox_mem_pool); 862 return -EIO; 863 } 864 if (flag == MBX_POLL) 865 mempool_free(pmb, phba->mbox_mem_pool); 866 867 return 0; 868 } 869 870 /** 871 * lpfc_hba_down_prep - Perform lpfc uninitialization prior to HBA reset 872 * @phba: pointer to lpfc HBA data structure. 873 * 874 * This routine will do LPFC uninitialization before the HBA is reset when 875 * bringing down the SLI Layer. 876 * 877 * Return codes 878 * 0 - success. 879 * Any other value - error. 880 **/ 881 int 882 lpfc_hba_down_prep(struct lpfc_hba *phba) 883 { 884 struct lpfc_vport **vports; 885 int i; 886 887 if (phba->sli_rev <= LPFC_SLI_REV3) { 888 /* Disable interrupts */ 889 writel(0, phba->HCregaddr); 890 readl(phba->HCregaddr); /* flush */ 891 } 892 893 if (phba->pport->load_flag & FC_UNLOADING) 894 lpfc_cleanup_discovery_resources(phba->pport); 895 else { 896 vports = lpfc_create_vport_work_array(phba); 897 if (vports != NULL) 898 for (i = 0; i <= phba->max_vports && 899 vports[i] != NULL; i++) 900 lpfc_cleanup_discovery_resources(vports[i]); 901 lpfc_destroy_vport_work_array(phba, vports); 902 } 903 return 0; 904 } 905 906 /** 907 * lpfc_sli4_free_sp_events - Cleanup sp_queue_events to free 908 * rspiocb which got deferred 909 * 910 * @phba: pointer to lpfc HBA data structure. 911 * 912 * This routine will cleanup completed slow path events after HBA is reset 913 * when bringing down the SLI Layer. 914 * 915 * 916 * Return codes 917 * void. 918 **/ 919 static void 920 lpfc_sli4_free_sp_events(struct lpfc_hba *phba) 921 { 922 struct lpfc_iocbq *rspiocbq; 923 struct hbq_dmabuf *dmabuf; 924 struct lpfc_cq_event *cq_event; 925 926 spin_lock_irq(&phba->hbalock); 927 phba->hba_flag &= ~HBA_SP_QUEUE_EVT; 928 spin_unlock_irq(&phba->hbalock); 929 930 while (!list_empty(&phba->sli4_hba.sp_queue_event)) { 931 /* Get the response iocb from the head of work queue */ 932 spin_lock_irq(&phba->hbalock); 933 list_remove_head(&phba->sli4_hba.sp_queue_event, 934 cq_event, struct lpfc_cq_event, list); 935 spin_unlock_irq(&phba->hbalock); 936 937 switch (bf_get(lpfc_wcqe_c_code, &cq_event->cqe.wcqe_cmpl)) { 938 case CQE_CODE_COMPL_WQE: 939 rspiocbq = container_of(cq_event, struct lpfc_iocbq, 940 cq_event); 941 lpfc_sli_release_iocbq(phba, rspiocbq); 942 break; 943 case CQE_CODE_RECEIVE: 944 case CQE_CODE_RECEIVE_V1: 945 dmabuf = container_of(cq_event, struct hbq_dmabuf, 946 cq_event); 947 lpfc_in_buf_free(phba, &dmabuf->dbuf); 948 } 949 } 950 } 951 952 /** 953 * lpfc_hba_free_post_buf - Perform lpfc uninitialization after HBA reset 954 * @phba: pointer to lpfc HBA data structure. 955 * 956 * This routine will cleanup posted ELS buffers after the HBA is reset 957 * when bringing down the SLI Layer. 958 * 959 * 960 * Return codes 961 * void. 962 **/ 963 static void 964 lpfc_hba_free_post_buf(struct lpfc_hba *phba) 965 { 966 struct lpfc_sli *psli = &phba->sli; 967 struct lpfc_sli_ring *pring; 968 struct lpfc_dmabuf *mp, *next_mp; 969 LIST_HEAD(buflist); 970 int count; 971 972 if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED) 973 lpfc_sli_hbqbuf_free_all(phba); 974 else { 975 /* Cleanup preposted buffers on the ELS ring */ 976 pring = &psli->sli3_ring[LPFC_ELS_RING]; 977 spin_lock_irq(&phba->hbalock); 978 list_splice_init(&pring->postbufq, &buflist); 979 spin_unlock_irq(&phba->hbalock); 980 981 count = 0; 982 list_for_each_entry_safe(mp, next_mp, &buflist, list) { 983 list_del(&mp->list); 984 count++; 985 lpfc_mbuf_free(phba, mp->virt, mp->phys); 986 kfree(mp); 987 } 988 989 spin_lock_irq(&phba->hbalock); 990 pring->postbufq_cnt -= count; 991 spin_unlock_irq(&phba->hbalock); 992 } 993 } 994 995 /** 996 * lpfc_hba_clean_txcmplq - Perform lpfc uninitialization after HBA reset 997 * @phba: pointer to lpfc HBA data structure. 998 * 999 * This routine will cleanup the txcmplq after the HBA is reset when bringing 1000 * down the SLI Layer. 1001 * 1002 * Return codes 1003 * void 1004 **/ 1005 static void 1006 lpfc_hba_clean_txcmplq(struct lpfc_hba *phba) 1007 { 1008 struct lpfc_sli *psli = &phba->sli; 1009 struct lpfc_queue *qp = NULL; 1010 struct lpfc_sli_ring *pring; 1011 LIST_HEAD(completions); 1012 int i; 1013 struct lpfc_iocbq *piocb, *next_iocb; 1014 1015 if (phba->sli_rev != LPFC_SLI_REV4) { 1016 for (i = 0; i < psli->num_rings; i++) { 1017 pring = &psli->sli3_ring[i]; 1018 spin_lock_irq(&phba->hbalock); 1019 /* At this point in time the HBA is either reset or DOA 1020 * Nothing should be on txcmplq as it will 1021 * NEVER complete. 1022 */ 1023 list_splice_init(&pring->txcmplq, &completions); 1024 pring->txcmplq_cnt = 0; 1025 spin_unlock_irq(&phba->hbalock); 1026 1027 lpfc_sli_abort_iocb_ring(phba, pring); 1028 } 1029 /* Cancel all the IOCBs from the completions list */ 1030 lpfc_sli_cancel_iocbs(phba, &completions, 1031 IOSTAT_LOCAL_REJECT, IOERR_SLI_ABORTED); 1032 return; 1033 } 1034 list_for_each_entry(qp, &phba->sli4_hba.lpfc_wq_list, wq_list) { 1035 pring = qp->pring; 1036 if (!pring) 1037 continue; 1038 spin_lock_irq(&pring->ring_lock); 1039 list_for_each_entry_safe(piocb, next_iocb, 1040 &pring->txcmplq, list) 1041 piocb->cmd_flag &= ~LPFC_IO_ON_TXCMPLQ; 1042 list_splice_init(&pring->txcmplq, &completions); 1043 pring->txcmplq_cnt = 0; 1044 spin_unlock_irq(&pring->ring_lock); 1045 lpfc_sli_abort_iocb_ring(phba, pring); 1046 } 1047 /* Cancel all the IOCBs from the completions list */ 1048 lpfc_sli_cancel_iocbs(phba, &completions, 1049 IOSTAT_LOCAL_REJECT, IOERR_SLI_ABORTED); 1050 } 1051 1052 /** 1053 * lpfc_hba_down_post_s3 - Perform lpfc uninitialization after HBA reset 1054 * @phba: pointer to lpfc HBA data structure. 1055 * 1056 * This routine will do uninitialization after the HBA is reset when bring 1057 * down the SLI Layer. 1058 * 1059 * Return codes 1060 * 0 - success. 1061 * Any other value - error. 1062 **/ 1063 static int 1064 lpfc_hba_down_post_s3(struct lpfc_hba *phba) 1065 { 1066 lpfc_hba_free_post_buf(phba); 1067 lpfc_hba_clean_txcmplq(phba); 1068 return 0; 1069 } 1070 1071 /** 1072 * lpfc_hba_down_post_s4 - Perform lpfc uninitialization after HBA reset 1073 * @phba: pointer to lpfc HBA data structure. 1074 * 1075 * This routine will do uninitialization after the HBA is reset when bring 1076 * down the SLI Layer. 1077 * 1078 * Return codes 1079 * 0 - success. 1080 * Any other value - error. 1081 **/ 1082 static int 1083 lpfc_hba_down_post_s4(struct lpfc_hba *phba) 1084 { 1085 struct lpfc_io_buf *psb, *psb_next; 1086 struct lpfc_async_xchg_ctx *ctxp, *ctxp_next; 1087 struct lpfc_sli4_hdw_queue *qp; 1088 LIST_HEAD(aborts); 1089 LIST_HEAD(nvme_aborts); 1090 LIST_HEAD(nvmet_aborts); 1091 struct lpfc_sglq *sglq_entry = NULL; 1092 int cnt, idx; 1093 1094 1095 lpfc_sli_hbqbuf_free_all(phba); 1096 lpfc_hba_clean_txcmplq(phba); 1097 1098 /* At this point in time the HBA is either reset or DOA. Either 1099 * way, nothing should be on lpfc_abts_els_sgl_list, it needs to be 1100 * on the lpfc_els_sgl_list so that it can either be freed if the 1101 * driver is unloading or reposted if the driver is restarting 1102 * the port. 1103 */ 1104 1105 /* sgl_list_lock required because worker thread uses this 1106 * list. 1107 */ 1108 spin_lock_irq(&phba->sli4_hba.sgl_list_lock); 1109 list_for_each_entry(sglq_entry, 1110 &phba->sli4_hba.lpfc_abts_els_sgl_list, list) 1111 sglq_entry->state = SGL_FREED; 1112 1113 list_splice_init(&phba->sli4_hba.lpfc_abts_els_sgl_list, 1114 &phba->sli4_hba.lpfc_els_sgl_list); 1115 1116 1117 spin_unlock_irq(&phba->sli4_hba.sgl_list_lock); 1118 1119 /* abts_xxxx_buf_list_lock required because worker thread uses this 1120 * list. 1121 */ 1122 spin_lock_irq(&phba->hbalock); 1123 cnt = 0; 1124 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { 1125 qp = &phba->sli4_hba.hdwq[idx]; 1126 1127 spin_lock(&qp->abts_io_buf_list_lock); 1128 list_splice_init(&qp->lpfc_abts_io_buf_list, 1129 &aborts); 1130 1131 list_for_each_entry_safe(psb, psb_next, &aborts, list) { 1132 psb->pCmd = NULL; 1133 psb->status = IOSTAT_SUCCESS; 1134 cnt++; 1135 } 1136 spin_lock(&qp->io_buf_list_put_lock); 1137 list_splice_init(&aborts, &qp->lpfc_io_buf_list_put); 1138 qp->put_io_bufs += qp->abts_scsi_io_bufs; 1139 qp->put_io_bufs += qp->abts_nvme_io_bufs; 1140 qp->abts_scsi_io_bufs = 0; 1141 qp->abts_nvme_io_bufs = 0; 1142 spin_unlock(&qp->io_buf_list_put_lock); 1143 spin_unlock(&qp->abts_io_buf_list_lock); 1144 } 1145 spin_unlock_irq(&phba->hbalock); 1146 1147 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 1148 spin_lock_irq(&phba->sli4_hba.abts_nvmet_buf_list_lock); 1149 list_splice_init(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list, 1150 &nvmet_aborts); 1151 spin_unlock_irq(&phba->sli4_hba.abts_nvmet_buf_list_lock); 1152 list_for_each_entry_safe(ctxp, ctxp_next, &nvmet_aborts, list) { 1153 ctxp->flag &= ~(LPFC_NVME_XBUSY | LPFC_NVME_ABORT_OP); 1154 lpfc_nvmet_ctxbuf_post(phba, ctxp->ctxbuf); 1155 } 1156 } 1157 1158 lpfc_sli4_free_sp_events(phba); 1159 return cnt; 1160 } 1161 1162 /** 1163 * lpfc_hba_down_post - Wrapper func for hba down post routine 1164 * @phba: pointer to lpfc HBA data structure. 1165 * 1166 * This routine wraps the actual SLI3 or SLI4 routine for performing 1167 * uninitialization after the HBA is reset when bring down the SLI Layer. 1168 * 1169 * Return codes 1170 * 0 - success. 1171 * Any other value - error. 1172 **/ 1173 int 1174 lpfc_hba_down_post(struct lpfc_hba *phba) 1175 { 1176 return (*phba->lpfc_hba_down_post)(phba); 1177 } 1178 1179 /** 1180 * lpfc_hb_timeout - The HBA-timer timeout handler 1181 * @t: timer context used to obtain the pointer to lpfc hba data structure. 1182 * 1183 * This is the HBA-timer timeout handler registered to the lpfc driver. When 1184 * this timer fires, a HBA timeout event shall be posted to the lpfc driver 1185 * work-port-events bitmap and the worker thread is notified. This timeout 1186 * event will be used by the worker thread to invoke the actual timeout 1187 * handler routine, lpfc_hb_timeout_handler. Any periodical operations will 1188 * be performed in the timeout handler and the HBA timeout event bit shall 1189 * be cleared by the worker thread after it has taken the event bitmap out. 1190 **/ 1191 static void 1192 lpfc_hb_timeout(struct timer_list *t) 1193 { 1194 struct lpfc_hba *phba; 1195 uint32_t tmo_posted; 1196 unsigned long iflag; 1197 1198 phba = from_timer(phba, t, hb_tmofunc); 1199 1200 /* Check for heart beat timeout conditions */ 1201 spin_lock_irqsave(&phba->pport->work_port_lock, iflag); 1202 tmo_posted = phba->pport->work_port_events & WORKER_HB_TMO; 1203 if (!tmo_posted) 1204 phba->pport->work_port_events |= WORKER_HB_TMO; 1205 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag); 1206 1207 /* Tell the worker thread there is work to do */ 1208 if (!tmo_posted) 1209 lpfc_worker_wake_up(phba); 1210 return; 1211 } 1212 1213 /** 1214 * lpfc_rrq_timeout - The RRQ-timer timeout handler 1215 * @t: timer context used to obtain the pointer to lpfc hba data structure. 1216 * 1217 * This is the RRQ-timer timeout handler registered to the lpfc driver. When 1218 * this timer fires, a RRQ timeout event shall be posted to the lpfc driver 1219 * work-port-events bitmap and the worker thread is notified. This timeout 1220 * event will be used by the worker thread to invoke the actual timeout 1221 * handler routine, lpfc_rrq_handler. Any periodical operations will 1222 * be performed in the timeout handler and the RRQ timeout event bit shall 1223 * be cleared by the worker thread after it has taken the event bitmap out. 1224 **/ 1225 static void 1226 lpfc_rrq_timeout(struct timer_list *t) 1227 { 1228 struct lpfc_hba *phba; 1229 unsigned long iflag; 1230 1231 phba = from_timer(phba, t, rrq_tmr); 1232 spin_lock_irqsave(&phba->pport->work_port_lock, iflag); 1233 if (!(phba->pport->load_flag & FC_UNLOADING)) 1234 phba->hba_flag |= HBA_RRQ_ACTIVE; 1235 else 1236 phba->hba_flag &= ~HBA_RRQ_ACTIVE; 1237 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag); 1238 1239 if (!(phba->pport->load_flag & FC_UNLOADING)) 1240 lpfc_worker_wake_up(phba); 1241 } 1242 1243 /** 1244 * lpfc_hb_mbox_cmpl - The lpfc heart-beat mailbox command callback function 1245 * @phba: pointer to lpfc hba data structure. 1246 * @pmboxq: pointer to the driver internal queue element for mailbox command. 1247 * 1248 * This is the callback function to the lpfc heart-beat mailbox command. 1249 * If configured, the lpfc driver issues the heart-beat mailbox command to 1250 * the HBA every LPFC_HB_MBOX_INTERVAL (current 5) seconds. At the time the 1251 * heart-beat mailbox command is issued, the driver shall set up heart-beat 1252 * timeout timer to LPFC_HB_MBOX_TIMEOUT (current 30) seconds and marks 1253 * heart-beat outstanding state. Once the mailbox command comes back and 1254 * no error conditions detected, the heart-beat mailbox command timer is 1255 * reset to LPFC_HB_MBOX_INTERVAL seconds and the heart-beat outstanding 1256 * state is cleared for the next heart-beat. If the timer expired with the 1257 * heart-beat outstanding state set, the driver will put the HBA offline. 1258 **/ 1259 static void 1260 lpfc_hb_mbox_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq) 1261 { 1262 unsigned long drvr_flag; 1263 1264 spin_lock_irqsave(&phba->hbalock, drvr_flag); 1265 phba->hba_flag &= ~(HBA_HBEAT_INP | HBA_HBEAT_TMO); 1266 spin_unlock_irqrestore(&phba->hbalock, drvr_flag); 1267 1268 /* Check and reset heart-beat timer if necessary */ 1269 mempool_free(pmboxq, phba->mbox_mem_pool); 1270 if (!(phba->pport->fc_flag & FC_OFFLINE_MODE) && 1271 !(phba->link_state == LPFC_HBA_ERROR) && 1272 !(phba->pport->load_flag & FC_UNLOADING)) 1273 mod_timer(&phba->hb_tmofunc, 1274 jiffies + 1275 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL)); 1276 return; 1277 } 1278 1279 /* 1280 * lpfc_idle_stat_delay_work - idle_stat tracking 1281 * 1282 * This routine tracks per-cq idle_stat and determines polling decisions. 1283 * 1284 * Return codes: 1285 * None 1286 **/ 1287 static void 1288 lpfc_idle_stat_delay_work(struct work_struct *work) 1289 { 1290 struct lpfc_hba *phba = container_of(to_delayed_work(work), 1291 struct lpfc_hba, 1292 idle_stat_delay_work); 1293 struct lpfc_queue *cq; 1294 struct lpfc_sli4_hdw_queue *hdwq; 1295 struct lpfc_idle_stat *idle_stat; 1296 u32 i, idle_percent; 1297 u64 wall, wall_idle, diff_wall, diff_idle, busy_time; 1298 1299 if (phba->pport->load_flag & FC_UNLOADING) 1300 return; 1301 1302 if (phba->link_state == LPFC_HBA_ERROR || 1303 phba->pport->fc_flag & FC_OFFLINE_MODE || 1304 phba->cmf_active_mode != LPFC_CFG_OFF) 1305 goto requeue; 1306 1307 for_each_present_cpu(i) { 1308 hdwq = &phba->sli4_hba.hdwq[phba->sli4_hba.cpu_map[i].hdwq]; 1309 cq = hdwq->io_cq; 1310 1311 /* Skip if we've already handled this cq's primary CPU */ 1312 if (cq->chann != i) 1313 continue; 1314 1315 idle_stat = &phba->sli4_hba.idle_stat[i]; 1316 1317 /* get_cpu_idle_time returns values as running counters. Thus, 1318 * to know the amount for this period, the prior counter values 1319 * need to be subtracted from the current counter values. 1320 * From there, the idle time stat can be calculated as a 1321 * percentage of 100 - the sum of the other consumption times. 1322 */ 1323 wall_idle = get_cpu_idle_time(i, &wall, 1); 1324 diff_idle = wall_idle - idle_stat->prev_idle; 1325 diff_wall = wall - idle_stat->prev_wall; 1326 1327 if (diff_wall <= diff_idle) 1328 busy_time = 0; 1329 else 1330 busy_time = diff_wall - diff_idle; 1331 1332 idle_percent = div64_u64(100 * busy_time, diff_wall); 1333 idle_percent = 100 - idle_percent; 1334 1335 if (idle_percent < 15) 1336 cq->poll_mode = LPFC_QUEUE_WORK; 1337 else 1338 cq->poll_mode = LPFC_IRQ_POLL; 1339 1340 idle_stat->prev_idle = wall_idle; 1341 idle_stat->prev_wall = wall; 1342 } 1343 1344 requeue: 1345 schedule_delayed_work(&phba->idle_stat_delay_work, 1346 msecs_to_jiffies(LPFC_IDLE_STAT_DELAY)); 1347 } 1348 1349 static void 1350 lpfc_hb_eq_delay_work(struct work_struct *work) 1351 { 1352 struct lpfc_hba *phba = container_of(to_delayed_work(work), 1353 struct lpfc_hba, eq_delay_work); 1354 struct lpfc_eq_intr_info *eqi, *eqi_new; 1355 struct lpfc_queue *eq, *eq_next; 1356 unsigned char *ena_delay = NULL; 1357 uint32_t usdelay; 1358 int i; 1359 1360 if (!phba->cfg_auto_imax || phba->pport->load_flag & FC_UNLOADING) 1361 return; 1362 1363 if (phba->link_state == LPFC_HBA_ERROR || 1364 phba->pport->fc_flag & FC_OFFLINE_MODE) 1365 goto requeue; 1366 1367 ena_delay = kcalloc(phba->sli4_hba.num_possible_cpu, sizeof(*ena_delay), 1368 GFP_KERNEL); 1369 if (!ena_delay) 1370 goto requeue; 1371 1372 for (i = 0; i < phba->cfg_irq_chann; i++) { 1373 /* Get the EQ corresponding to the IRQ vector */ 1374 eq = phba->sli4_hba.hba_eq_hdl[i].eq; 1375 if (!eq) 1376 continue; 1377 if (eq->q_mode || eq->q_flag & HBA_EQ_DELAY_CHK) { 1378 eq->q_flag &= ~HBA_EQ_DELAY_CHK; 1379 ena_delay[eq->last_cpu] = 1; 1380 } 1381 } 1382 1383 for_each_present_cpu(i) { 1384 eqi = per_cpu_ptr(phba->sli4_hba.eq_info, i); 1385 if (ena_delay[i]) { 1386 usdelay = (eqi->icnt >> 10) * LPFC_EQ_DELAY_STEP; 1387 if (usdelay > LPFC_MAX_AUTO_EQ_DELAY) 1388 usdelay = LPFC_MAX_AUTO_EQ_DELAY; 1389 } else { 1390 usdelay = 0; 1391 } 1392 1393 eqi->icnt = 0; 1394 1395 list_for_each_entry_safe(eq, eq_next, &eqi->list, cpu_list) { 1396 if (unlikely(eq->last_cpu != i)) { 1397 eqi_new = per_cpu_ptr(phba->sli4_hba.eq_info, 1398 eq->last_cpu); 1399 list_move_tail(&eq->cpu_list, &eqi_new->list); 1400 continue; 1401 } 1402 if (usdelay != eq->q_mode) 1403 lpfc_modify_hba_eq_delay(phba, eq->hdwq, 1, 1404 usdelay); 1405 } 1406 } 1407 1408 kfree(ena_delay); 1409 1410 requeue: 1411 queue_delayed_work(phba->wq, &phba->eq_delay_work, 1412 msecs_to_jiffies(LPFC_EQ_DELAY_MSECS)); 1413 } 1414 1415 /** 1416 * lpfc_hb_mxp_handler - Multi-XRI pools handler to adjust XRI distribution 1417 * @phba: pointer to lpfc hba data structure. 1418 * 1419 * For each heartbeat, this routine does some heuristic methods to adjust 1420 * XRI distribution. The goal is to fully utilize free XRIs. 1421 **/ 1422 static void lpfc_hb_mxp_handler(struct lpfc_hba *phba) 1423 { 1424 u32 i; 1425 u32 hwq_count; 1426 1427 hwq_count = phba->cfg_hdw_queue; 1428 for (i = 0; i < hwq_count; i++) { 1429 /* Adjust XRIs in private pool */ 1430 lpfc_adjust_pvt_pool_count(phba, i); 1431 1432 /* Adjust high watermark */ 1433 lpfc_adjust_high_watermark(phba, i); 1434 1435 #ifdef LPFC_MXP_STAT 1436 /* Snapshot pbl, pvt and busy count */ 1437 lpfc_snapshot_mxp(phba, i); 1438 #endif 1439 } 1440 } 1441 1442 /** 1443 * lpfc_issue_hb_mbox - Issues heart-beat mailbox command 1444 * @phba: pointer to lpfc hba data structure. 1445 * 1446 * If a HB mbox is not already in progrees, this routine will allocate 1447 * a LPFC_MBOXQ_t, populate it with a MBX_HEARTBEAT (0x31) command, 1448 * and issue it. The HBA_HBEAT_INP flag means the command is in progress. 1449 **/ 1450 int 1451 lpfc_issue_hb_mbox(struct lpfc_hba *phba) 1452 { 1453 LPFC_MBOXQ_t *pmboxq; 1454 int retval; 1455 1456 /* Is a Heartbeat mbox already in progress */ 1457 if (phba->hba_flag & HBA_HBEAT_INP) 1458 return 0; 1459 1460 pmboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 1461 if (!pmboxq) 1462 return -ENOMEM; 1463 1464 lpfc_heart_beat(phba, pmboxq); 1465 pmboxq->mbox_cmpl = lpfc_hb_mbox_cmpl; 1466 pmboxq->vport = phba->pport; 1467 retval = lpfc_sli_issue_mbox(phba, pmboxq, MBX_NOWAIT); 1468 1469 if (retval != MBX_BUSY && retval != MBX_SUCCESS) { 1470 mempool_free(pmboxq, phba->mbox_mem_pool); 1471 return -ENXIO; 1472 } 1473 phba->hba_flag |= HBA_HBEAT_INP; 1474 1475 return 0; 1476 } 1477 1478 /** 1479 * lpfc_issue_hb_tmo - Signals heartbeat timer to issue mbox command 1480 * @phba: pointer to lpfc hba data structure. 1481 * 1482 * The heartbeat timer (every 5 sec) will fire. If the HBA_HBEAT_TMO 1483 * flag is set, it will force a MBX_HEARTBEAT mbox command, regardless 1484 * of the value of lpfc_enable_hba_heartbeat. 1485 * If lpfc_enable_hba_heartbeat is set, the timeout routine will always 1486 * try to issue a MBX_HEARTBEAT mbox command. 1487 **/ 1488 void 1489 lpfc_issue_hb_tmo(struct lpfc_hba *phba) 1490 { 1491 if (phba->cfg_enable_hba_heartbeat) 1492 return; 1493 phba->hba_flag |= HBA_HBEAT_TMO; 1494 } 1495 1496 /** 1497 * lpfc_hb_timeout_handler - The HBA-timer timeout handler 1498 * @phba: pointer to lpfc hba data structure. 1499 * 1500 * This is the actual HBA-timer timeout handler to be invoked by the worker 1501 * thread whenever the HBA timer fired and HBA-timeout event posted. This 1502 * handler performs any periodic operations needed for the device. If such 1503 * periodic event has already been attended to either in the interrupt handler 1504 * or by processing slow-ring or fast-ring events within the HBA-timer 1505 * timeout window (LPFC_HB_MBOX_INTERVAL), this handler just simply resets 1506 * the timer for the next timeout period. If lpfc heart-beat mailbox command 1507 * is configured and there is no heart-beat mailbox command outstanding, a 1508 * heart-beat mailbox is issued and timer set properly. Otherwise, if there 1509 * has been a heart-beat mailbox command outstanding, the HBA shall be put 1510 * to offline. 1511 **/ 1512 void 1513 lpfc_hb_timeout_handler(struct lpfc_hba *phba) 1514 { 1515 struct lpfc_vport **vports; 1516 struct lpfc_dmabuf *buf_ptr; 1517 int retval = 0; 1518 int i, tmo; 1519 struct lpfc_sli *psli = &phba->sli; 1520 LIST_HEAD(completions); 1521 1522 if (phba->cfg_xri_rebalancing) { 1523 /* Multi-XRI pools handler */ 1524 lpfc_hb_mxp_handler(phba); 1525 } 1526 1527 vports = lpfc_create_vport_work_array(phba); 1528 if (vports != NULL) 1529 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) { 1530 lpfc_rcv_seq_check_edtov(vports[i]); 1531 lpfc_fdmi_change_check(vports[i]); 1532 } 1533 lpfc_destroy_vport_work_array(phba, vports); 1534 1535 if ((phba->link_state == LPFC_HBA_ERROR) || 1536 (phba->pport->load_flag & FC_UNLOADING) || 1537 (phba->pport->fc_flag & FC_OFFLINE_MODE)) 1538 return; 1539 1540 if (phba->elsbuf_cnt && 1541 (phba->elsbuf_cnt == phba->elsbuf_prev_cnt)) { 1542 spin_lock_irq(&phba->hbalock); 1543 list_splice_init(&phba->elsbuf, &completions); 1544 phba->elsbuf_cnt = 0; 1545 phba->elsbuf_prev_cnt = 0; 1546 spin_unlock_irq(&phba->hbalock); 1547 1548 while (!list_empty(&completions)) { 1549 list_remove_head(&completions, buf_ptr, 1550 struct lpfc_dmabuf, list); 1551 lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys); 1552 kfree(buf_ptr); 1553 } 1554 } 1555 phba->elsbuf_prev_cnt = phba->elsbuf_cnt; 1556 1557 /* If there is no heart beat outstanding, issue a heartbeat command */ 1558 if (phba->cfg_enable_hba_heartbeat) { 1559 /* If IOs are completing, no need to issue a MBX_HEARTBEAT */ 1560 spin_lock_irq(&phba->pport->work_port_lock); 1561 if (time_after(phba->last_completion_time + 1562 msecs_to_jiffies(1000 * LPFC_HB_MBOX_INTERVAL), 1563 jiffies)) { 1564 spin_unlock_irq(&phba->pport->work_port_lock); 1565 if (phba->hba_flag & HBA_HBEAT_INP) 1566 tmo = (1000 * LPFC_HB_MBOX_TIMEOUT); 1567 else 1568 tmo = (1000 * LPFC_HB_MBOX_INTERVAL); 1569 goto out; 1570 } 1571 spin_unlock_irq(&phba->pport->work_port_lock); 1572 1573 /* Check if a MBX_HEARTBEAT is already in progress */ 1574 if (phba->hba_flag & HBA_HBEAT_INP) { 1575 /* 1576 * If heart beat timeout called with HBA_HBEAT_INP set 1577 * we need to give the hb mailbox cmd a chance to 1578 * complete or TMO. 1579 */ 1580 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 1581 "0459 Adapter heartbeat still outstanding: " 1582 "last compl time was %d ms.\n", 1583 jiffies_to_msecs(jiffies 1584 - phba->last_completion_time)); 1585 tmo = (1000 * LPFC_HB_MBOX_TIMEOUT); 1586 } else { 1587 if ((!(psli->sli_flag & LPFC_SLI_MBOX_ACTIVE)) && 1588 (list_empty(&psli->mboxq))) { 1589 1590 retval = lpfc_issue_hb_mbox(phba); 1591 if (retval) { 1592 tmo = (1000 * LPFC_HB_MBOX_INTERVAL); 1593 goto out; 1594 } 1595 phba->skipped_hb = 0; 1596 } else if (time_before_eq(phba->last_completion_time, 1597 phba->skipped_hb)) { 1598 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 1599 "2857 Last completion time not " 1600 " updated in %d ms\n", 1601 jiffies_to_msecs(jiffies 1602 - phba->last_completion_time)); 1603 } else 1604 phba->skipped_hb = jiffies; 1605 1606 tmo = (1000 * LPFC_HB_MBOX_TIMEOUT); 1607 goto out; 1608 } 1609 } else { 1610 /* Check to see if we want to force a MBX_HEARTBEAT */ 1611 if (phba->hba_flag & HBA_HBEAT_TMO) { 1612 retval = lpfc_issue_hb_mbox(phba); 1613 if (retval) 1614 tmo = (1000 * LPFC_HB_MBOX_INTERVAL); 1615 else 1616 tmo = (1000 * LPFC_HB_MBOX_TIMEOUT); 1617 goto out; 1618 } 1619 tmo = (1000 * LPFC_HB_MBOX_INTERVAL); 1620 } 1621 out: 1622 mod_timer(&phba->hb_tmofunc, jiffies + msecs_to_jiffies(tmo)); 1623 } 1624 1625 /** 1626 * lpfc_offline_eratt - Bring lpfc offline on hardware error attention 1627 * @phba: pointer to lpfc hba data structure. 1628 * 1629 * This routine is called to bring the HBA offline when HBA hardware error 1630 * other than Port Error 6 has been detected. 1631 **/ 1632 static void 1633 lpfc_offline_eratt(struct lpfc_hba *phba) 1634 { 1635 struct lpfc_sli *psli = &phba->sli; 1636 1637 spin_lock_irq(&phba->hbalock); 1638 psli->sli_flag &= ~LPFC_SLI_ACTIVE; 1639 spin_unlock_irq(&phba->hbalock); 1640 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT); 1641 1642 lpfc_offline(phba); 1643 lpfc_reset_barrier(phba); 1644 spin_lock_irq(&phba->hbalock); 1645 lpfc_sli_brdreset(phba); 1646 spin_unlock_irq(&phba->hbalock); 1647 lpfc_hba_down_post(phba); 1648 lpfc_sli_brdready(phba, HS_MBRDY); 1649 lpfc_unblock_mgmt_io(phba); 1650 phba->link_state = LPFC_HBA_ERROR; 1651 return; 1652 } 1653 1654 /** 1655 * lpfc_sli4_offline_eratt - Bring lpfc offline on SLI4 hardware error attention 1656 * @phba: pointer to lpfc hba data structure. 1657 * 1658 * This routine is called to bring a SLI4 HBA offline when HBA hardware error 1659 * other than Port Error 6 has been detected. 1660 **/ 1661 void 1662 lpfc_sli4_offline_eratt(struct lpfc_hba *phba) 1663 { 1664 spin_lock_irq(&phba->hbalock); 1665 if (phba->link_state == LPFC_HBA_ERROR && 1666 test_bit(HBA_PCI_ERR, &phba->bit_flags)) { 1667 spin_unlock_irq(&phba->hbalock); 1668 return; 1669 } 1670 phba->link_state = LPFC_HBA_ERROR; 1671 spin_unlock_irq(&phba->hbalock); 1672 1673 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT); 1674 lpfc_sli_flush_io_rings(phba); 1675 lpfc_offline(phba); 1676 lpfc_hba_down_post(phba); 1677 lpfc_unblock_mgmt_io(phba); 1678 } 1679 1680 /** 1681 * lpfc_handle_deferred_eratt - The HBA hardware deferred error handler 1682 * @phba: pointer to lpfc hba data structure. 1683 * 1684 * This routine is invoked to handle the deferred HBA hardware error 1685 * conditions. This type of error is indicated by HBA by setting ER1 1686 * and another ER bit in the host status register. The driver will 1687 * wait until the ER1 bit clears before handling the error condition. 1688 **/ 1689 static void 1690 lpfc_handle_deferred_eratt(struct lpfc_hba *phba) 1691 { 1692 uint32_t old_host_status = phba->work_hs; 1693 struct lpfc_sli *psli = &phba->sli; 1694 1695 /* If the pci channel is offline, ignore possible errors, 1696 * since we cannot communicate with the pci card anyway. 1697 */ 1698 if (pci_channel_offline(phba->pcidev)) { 1699 spin_lock_irq(&phba->hbalock); 1700 phba->hba_flag &= ~DEFER_ERATT; 1701 spin_unlock_irq(&phba->hbalock); 1702 return; 1703 } 1704 1705 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 1706 "0479 Deferred Adapter Hardware Error " 1707 "Data: x%x x%x x%x\n", 1708 phba->work_hs, phba->work_status[0], 1709 phba->work_status[1]); 1710 1711 spin_lock_irq(&phba->hbalock); 1712 psli->sli_flag &= ~LPFC_SLI_ACTIVE; 1713 spin_unlock_irq(&phba->hbalock); 1714 1715 1716 /* 1717 * Firmware stops when it triggred erratt. That could cause the I/Os 1718 * dropped by the firmware. Error iocb (I/O) on txcmplq and let the 1719 * SCSI layer retry it after re-establishing link. 1720 */ 1721 lpfc_sli_abort_fcp_rings(phba); 1722 1723 /* 1724 * There was a firmware error. Take the hba offline and then 1725 * attempt to restart it. 1726 */ 1727 lpfc_offline_prep(phba, LPFC_MBX_WAIT); 1728 lpfc_offline(phba); 1729 1730 /* Wait for the ER1 bit to clear.*/ 1731 while (phba->work_hs & HS_FFER1) { 1732 msleep(100); 1733 if (lpfc_readl(phba->HSregaddr, &phba->work_hs)) { 1734 phba->work_hs = UNPLUG_ERR ; 1735 break; 1736 } 1737 /* If driver is unloading let the worker thread continue */ 1738 if (phba->pport->load_flag & FC_UNLOADING) { 1739 phba->work_hs = 0; 1740 break; 1741 } 1742 } 1743 1744 /* 1745 * This is to ptrotect against a race condition in which 1746 * first write to the host attention register clear the 1747 * host status register. 1748 */ 1749 if ((!phba->work_hs) && (!(phba->pport->load_flag & FC_UNLOADING))) 1750 phba->work_hs = old_host_status & ~HS_FFER1; 1751 1752 spin_lock_irq(&phba->hbalock); 1753 phba->hba_flag &= ~DEFER_ERATT; 1754 spin_unlock_irq(&phba->hbalock); 1755 phba->work_status[0] = readl(phba->MBslimaddr + 0xa8); 1756 phba->work_status[1] = readl(phba->MBslimaddr + 0xac); 1757 } 1758 1759 static void 1760 lpfc_board_errevt_to_mgmt(struct lpfc_hba *phba) 1761 { 1762 struct lpfc_board_event_header board_event; 1763 struct Scsi_Host *shost; 1764 1765 board_event.event_type = FC_REG_BOARD_EVENT; 1766 board_event.subcategory = LPFC_EVENT_PORTINTERR; 1767 shost = lpfc_shost_from_vport(phba->pport); 1768 fc_host_post_vendor_event(shost, fc_get_event_number(), 1769 sizeof(board_event), 1770 (char *) &board_event, 1771 LPFC_NL_VENDOR_ID); 1772 } 1773 1774 /** 1775 * lpfc_handle_eratt_s3 - The SLI3 HBA hardware error handler 1776 * @phba: pointer to lpfc hba data structure. 1777 * 1778 * This routine is invoked to handle the following HBA hardware error 1779 * conditions: 1780 * 1 - HBA error attention interrupt 1781 * 2 - DMA ring index out of range 1782 * 3 - Mailbox command came back as unknown 1783 **/ 1784 static void 1785 lpfc_handle_eratt_s3(struct lpfc_hba *phba) 1786 { 1787 struct lpfc_vport *vport = phba->pport; 1788 struct lpfc_sli *psli = &phba->sli; 1789 uint32_t event_data; 1790 unsigned long temperature; 1791 struct temp_event temp_event_data; 1792 struct Scsi_Host *shost; 1793 1794 /* If the pci channel is offline, ignore possible errors, 1795 * since we cannot communicate with the pci card anyway. 1796 */ 1797 if (pci_channel_offline(phba->pcidev)) { 1798 spin_lock_irq(&phba->hbalock); 1799 phba->hba_flag &= ~DEFER_ERATT; 1800 spin_unlock_irq(&phba->hbalock); 1801 return; 1802 } 1803 1804 /* If resets are disabled then leave the HBA alone and return */ 1805 if (!phba->cfg_enable_hba_reset) 1806 return; 1807 1808 /* Send an internal error event to mgmt application */ 1809 lpfc_board_errevt_to_mgmt(phba); 1810 1811 if (phba->hba_flag & DEFER_ERATT) 1812 lpfc_handle_deferred_eratt(phba); 1813 1814 if ((phba->work_hs & HS_FFER6) || (phba->work_hs & HS_FFER8)) { 1815 if (phba->work_hs & HS_FFER6) 1816 /* Re-establishing Link */ 1817 lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT, 1818 "1301 Re-establishing Link " 1819 "Data: x%x x%x x%x\n", 1820 phba->work_hs, phba->work_status[0], 1821 phba->work_status[1]); 1822 if (phba->work_hs & HS_FFER8) 1823 /* Device Zeroization */ 1824 lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT, 1825 "2861 Host Authentication device " 1826 "zeroization Data:x%x x%x x%x\n", 1827 phba->work_hs, phba->work_status[0], 1828 phba->work_status[1]); 1829 1830 spin_lock_irq(&phba->hbalock); 1831 psli->sli_flag &= ~LPFC_SLI_ACTIVE; 1832 spin_unlock_irq(&phba->hbalock); 1833 1834 /* 1835 * Firmware stops when it triggled erratt with HS_FFER6. 1836 * That could cause the I/Os dropped by the firmware. 1837 * Error iocb (I/O) on txcmplq and let the SCSI layer 1838 * retry it after re-establishing link. 1839 */ 1840 lpfc_sli_abort_fcp_rings(phba); 1841 1842 /* 1843 * There was a firmware error. Take the hba offline and then 1844 * attempt to restart it. 1845 */ 1846 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT); 1847 lpfc_offline(phba); 1848 lpfc_sli_brdrestart(phba); 1849 if (lpfc_online(phba) == 0) { /* Initialize the HBA */ 1850 lpfc_unblock_mgmt_io(phba); 1851 return; 1852 } 1853 lpfc_unblock_mgmt_io(phba); 1854 } else if (phba->work_hs & HS_CRIT_TEMP) { 1855 temperature = readl(phba->MBslimaddr + TEMPERATURE_OFFSET); 1856 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT; 1857 temp_event_data.event_code = LPFC_CRIT_TEMP; 1858 temp_event_data.data = (uint32_t)temperature; 1859 1860 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 1861 "0406 Adapter maximum temperature exceeded " 1862 "(%ld), taking this port offline " 1863 "Data: x%x x%x x%x\n", 1864 temperature, phba->work_hs, 1865 phba->work_status[0], phba->work_status[1]); 1866 1867 shost = lpfc_shost_from_vport(phba->pport); 1868 fc_host_post_vendor_event(shost, fc_get_event_number(), 1869 sizeof(temp_event_data), 1870 (char *) &temp_event_data, 1871 SCSI_NL_VID_TYPE_PCI 1872 | PCI_VENDOR_ID_EMULEX); 1873 1874 spin_lock_irq(&phba->hbalock); 1875 phba->over_temp_state = HBA_OVER_TEMP; 1876 spin_unlock_irq(&phba->hbalock); 1877 lpfc_offline_eratt(phba); 1878 1879 } else { 1880 /* The if clause above forces this code path when the status 1881 * failure is a value other than FFER6. Do not call the offline 1882 * twice. This is the adapter hardware error path. 1883 */ 1884 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 1885 "0457 Adapter Hardware Error " 1886 "Data: x%x x%x x%x\n", 1887 phba->work_hs, 1888 phba->work_status[0], phba->work_status[1]); 1889 1890 event_data = FC_REG_DUMP_EVENT; 1891 shost = lpfc_shost_from_vport(vport); 1892 fc_host_post_vendor_event(shost, fc_get_event_number(), 1893 sizeof(event_data), (char *) &event_data, 1894 SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX); 1895 1896 lpfc_offline_eratt(phba); 1897 } 1898 return; 1899 } 1900 1901 /** 1902 * lpfc_sli4_port_sta_fn_reset - The SLI4 function reset due to port status reg 1903 * @phba: pointer to lpfc hba data structure. 1904 * @mbx_action: flag for mailbox shutdown action. 1905 * @en_rn_msg: send reset/port recovery message. 1906 * This routine is invoked to perform an SLI4 port PCI function reset in 1907 * response to port status register polling attention. It waits for port 1908 * status register (ERR, RDY, RN) bits before proceeding with function reset. 1909 * During this process, interrupt vectors are freed and later requested 1910 * for handling possible port resource change. 1911 **/ 1912 static int 1913 lpfc_sli4_port_sta_fn_reset(struct lpfc_hba *phba, int mbx_action, 1914 bool en_rn_msg) 1915 { 1916 int rc; 1917 uint32_t intr_mode; 1918 LPFC_MBOXQ_t *mboxq; 1919 1920 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) >= 1921 LPFC_SLI_INTF_IF_TYPE_2) { 1922 /* 1923 * On error status condition, driver need to wait for port 1924 * ready before performing reset. 1925 */ 1926 rc = lpfc_sli4_pdev_status_reg_wait(phba); 1927 if (rc) 1928 return rc; 1929 } 1930 1931 /* need reset: attempt for port recovery */ 1932 if (en_rn_msg) 1933 lpfc_printf_log(phba, KERN_ERR, LOG_SLI, 1934 "2887 Reset Needed: Attempting Port " 1935 "Recovery...\n"); 1936 1937 /* If we are no wait, the HBA has been reset and is not 1938 * functional, thus we should clear 1939 * (LPFC_SLI_ACTIVE | LPFC_SLI_MBOX_ACTIVE) flags. 1940 */ 1941 if (mbx_action == LPFC_MBX_NO_WAIT) { 1942 spin_lock_irq(&phba->hbalock); 1943 phba->sli.sli_flag &= ~LPFC_SLI_ACTIVE; 1944 if (phba->sli.mbox_active) { 1945 mboxq = phba->sli.mbox_active; 1946 mboxq->u.mb.mbxStatus = MBX_NOT_FINISHED; 1947 __lpfc_mbox_cmpl_put(phba, mboxq); 1948 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE; 1949 phba->sli.mbox_active = NULL; 1950 } 1951 spin_unlock_irq(&phba->hbalock); 1952 } 1953 1954 lpfc_offline_prep(phba, mbx_action); 1955 lpfc_sli_flush_io_rings(phba); 1956 lpfc_offline(phba); 1957 /* release interrupt for possible resource change */ 1958 lpfc_sli4_disable_intr(phba); 1959 rc = lpfc_sli_brdrestart(phba); 1960 if (rc) { 1961 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 1962 "6309 Failed to restart board\n"); 1963 return rc; 1964 } 1965 /* request and enable interrupt */ 1966 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode); 1967 if (intr_mode == LPFC_INTR_ERROR) { 1968 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 1969 "3175 Failed to enable interrupt\n"); 1970 return -EIO; 1971 } 1972 phba->intr_mode = intr_mode; 1973 rc = lpfc_online(phba); 1974 if (rc == 0) 1975 lpfc_unblock_mgmt_io(phba); 1976 1977 return rc; 1978 } 1979 1980 /** 1981 * lpfc_handle_eratt_s4 - The SLI4 HBA hardware error handler 1982 * @phba: pointer to lpfc hba data structure. 1983 * 1984 * This routine is invoked to handle the SLI4 HBA hardware error attention 1985 * conditions. 1986 **/ 1987 static void 1988 lpfc_handle_eratt_s4(struct lpfc_hba *phba) 1989 { 1990 struct lpfc_vport *vport = phba->pport; 1991 uint32_t event_data; 1992 struct Scsi_Host *shost; 1993 uint32_t if_type; 1994 struct lpfc_register portstat_reg = {0}; 1995 uint32_t reg_err1, reg_err2; 1996 uint32_t uerrlo_reg, uemasklo_reg; 1997 uint32_t smphr_port_status = 0, pci_rd_rc1, pci_rd_rc2; 1998 bool en_rn_msg = true; 1999 struct temp_event temp_event_data; 2000 struct lpfc_register portsmphr_reg; 2001 int rc, i; 2002 2003 /* If the pci channel is offline, ignore possible errors, since 2004 * we cannot communicate with the pci card anyway. 2005 */ 2006 if (pci_channel_offline(phba->pcidev)) { 2007 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 2008 "3166 pci channel is offline\n"); 2009 lpfc_sli_flush_io_rings(phba); 2010 return; 2011 } 2012 2013 memset(&portsmphr_reg, 0, sizeof(portsmphr_reg)); 2014 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf); 2015 switch (if_type) { 2016 case LPFC_SLI_INTF_IF_TYPE_0: 2017 pci_rd_rc1 = lpfc_readl( 2018 phba->sli4_hba.u.if_type0.UERRLOregaddr, 2019 &uerrlo_reg); 2020 pci_rd_rc2 = lpfc_readl( 2021 phba->sli4_hba.u.if_type0.UEMASKLOregaddr, 2022 &uemasklo_reg); 2023 /* consider PCI bus read error as pci_channel_offline */ 2024 if (pci_rd_rc1 == -EIO && pci_rd_rc2 == -EIO) 2025 return; 2026 if (!(phba->hba_flag & HBA_RECOVERABLE_UE)) { 2027 lpfc_sli4_offline_eratt(phba); 2028 return; 2029 } 2030 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 2031 "7623 Checking UE recoverable"); 2032 2033 for (i = 0; i < phba->sli4_hba.ue_to_sr / 1000; i++) { 2034 if (lpfc_readl(phba->sli4_hba.PSMPHRregaddr, 2035 &portsmphr_reg.word0)) 2036 continue; 2037 2038 smphr_port_status = bf_get(lpfc_port_smphr_port_status, 2039 &portsmphr_reg); 2040 if ((smphr_port_status & LPFC_PORT_SEM_MASK) == 2041 LPFC_PORT_SEM_UE_RECOVERABLE) 2042 break; 2043 /*Sleep for 1Sec, before checking SEMAPHORE */ 2044 msleep(1000); 2045 } 2046 2047 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 2048 "4827 smphr_port_status x%x : Waited %dSec", 2049 smphr_port_status, i); 2050 2051 /* Recoverable UE, reset the HBA device */ 2052 if ((smphr_port_status & LPFC_PORT_SEM_MASK) == 2053 LPFC_PORT_SEM_UE_RECOVERABLE) { 2054 for (i = 0; i < 20; i++) { 2055 msleep(1000); 2056 if (!lpfc_readl(phba->sli4_hba.PSMPHRregaddr, 2057 &portsmphr_reg.word0) && 2058 (LPFC_POST_STAGE_PORT_READY == 2059 bf_get(lpfc_port_smphr_port_status, 2060 &portsmphr_reg))) { 2061 rc = lpfc_sli4_port_sta_fn_reset(phba, 2062 LPFC_MBX_NO_WAIT, en_rn_msg); 2063 if (rc == 0) 2064 return; 2065 lpfc_printf_log(phba, KERN_ERR, 2066 LOG_TRACE_EVENT, 2067 "4215 Failed to recover UE"); 2068 break; 2069 } 2070 } 2071 } 2072 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 2073 "7624 Firmware not ready: Failing UE recovery," 2074 " waited %dSec", i); 2075 phba->link_state = LPFC_HBA_ERROR; 2076 break; 2077 2078 case LPFC_SLI_INTF_IF_TYPE_2: 2079 case LPFC_SLI_INTF_IF_TYPE_6: 2080 pci_rd_rc1 = lpfc_readl( 2081 phba->sli4_hba.u.if_type2.STATUSregaddr, 2082 &portstat_reg.word0); 2083 /* consider PCI bus read error as pci_channel_offline */ 2084 if (pci_rd_rc1 == -EIO) { 2085 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 2086 "3151 PCI bus read access failure: x%x\n", 2087 readl(phba->sli4_hba.u.if_type2.STATUSregaddr)); 2088 lpfc_sli4_offline_eratt(phba); 2089 return; 2090 } 2091 reg_err1 = readl(phba->sli4_hba.u.if_type2.ERR1regaddr); 2092 reg_err2 = readl(phba->sli4_hba.u.if_type2.ERR2regaddr); 2093 if (bf_get(lpfc_sliport_status_oti, &portstat_reg)) { 2094 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 2095 "2889 Port Overtemperature event, " 2096 "taking port offline Data: x%x x%x\n", 2097 reg_err1, reg_err2); 2098 2099 phba->sfp_alarm |= LPFC_TRANSGRESSION_HIGH_TEMPERATURE; 2100 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT; 2101 temp_event_data.event_code = LPFC_CRIT_TEMP; 2102 temp_event_data.data = 0xFFFFFFFF; 2103 2104 shost = lpfc_shost_from_vport(phba->pport); 2105 fc_host_post_vendor_event(shost, fc_get_event_number(), 2106 sizeof(temp_event_data), 2107 (char *)&temp_event_data, 2108 SCSI_NL_VID_TYPE_PCI 2109 | PCI_VENDOR_ID_EMULEX); 2110 2111 spin_lock_irq(&phba->hbalock); 2112 phba->over_temp_state = HBA_OVER_TEMP; 2113 spin_unlock_irq(&phba->hbalock); 2114 lpfc_sli4_offline_eratt(phba); 2115 return; 2116 } 2117 if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 && 2118 reg_err2 == SLIPORT_ERR2_REG_FW_RESTART) { 2119 lpfc_printf_log(phba, KERN_ERR, LOG_SLI, 2120 "3143 Port Down: Firmware Update " 2121 "Detected\n"); 2122 en_rn_msg = false; 2123 } else if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 && 2124 reg_err2 == SLIPORT_ERR2_REG_FORCED_DUMP) 2125 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 2126 "3144 Port Down: Debug Dump\n"); 2127 else if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 && 2128 reg_err2 == SLIPORT_ERR2_REG_FUNC_PROVISON) 2129 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 2130 "3145 Port Down: Provisioning\n"); 2131 2132 /* If resets are disabled then leave the HBA alone and return */ 2133 if (!phba->cfg_enable_hba_reset) 2134 return; 2135 2136 /* Check port status register for function reset */ 2137 rc = lpfc_sli4_port_sta_fn_reset(phba, LPFC_MBX_NO_WAIT, 2138 en_rn_msg); 2139 if (rc == 0) { 2140 /* don't report event on forced debug dump */ 2141 if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 && 2142 reg_err2 == SLIPORT_ERR2_REG_FORCED_DUMP) 2143 return; 2144 else 2145 break; 2146 } 2147 /* fall through for not able to recover */ 2148 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 2149 "3152 Unrecoverable error\n"); 2150 phba->link_state = LPFC_HBA_ERROR; 2151 break; 2152 case LPFC_SLI_INTF_IF_TYPE_1: 2153 default: 2154 break; 2155 } 2156 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 2157 "3123 Report dump event to upper layer\n"); 2158 /* Send an internal error event to mgmt application */ 2159 lpfc_board_errevt_to_mgmt(phba); 2160 2161 event_data = FC_REG_DUMP_EVENT; 2162 shost = lpfc_shost_from_vport(vport); 2163 fc_host_post_vendor_event(shost, fc_get_event_number(), 2164 sizeof(event_data), (char *) &event_data, 2165 SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX); 2166 } 2167 2168 /** 2169 * lpfc_handle_eratt - Wrapper func for handling hba error attention 2170 * @phba: pointer to lpfc HBA data structure. 2171 * 2172 * This routine wraps the actual SLI3 or SLI4 hba error attention handling 2173 * routine from the API jump table function pointer from the lpfc_hba struct. 2174 * 2175 * Return codes 2176 * 0 - success. 2177 * Any other value - error. 2178 **/ 2179 void 2180 lpfc_handle_eratt(struct lpfc_hba *phba) 2181 { 2182 (*phba->lpfc_handle_eratt)(phba); 2183 } 2184 2185 /** 2186 * lpfc_handle_latt - The HBA link event handler 2187 * @phba: pointer to lpfc hba data structure. 2188 * 2189 * This routine is invoked from the worker thread to handle a HBA host 2190 * attention link event. SLI3 only. 2191 **/ 2192 void 2193 lpfc_handle_latt(struct lpfc_hba *phba) 2194 { 2195 struct lpfc_vport *vport = phba->pport; 2196 struct lpfc_sli *psli = &phba->sli; 2197 LPFC_MBOXQ_t *pmb; 2198 volatile uint32_t control; 2199 int rc = 0; 2200 2201 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 2202 if (!pmb) { 2203 rc = 1; 2204 goto lpfc_handle_latt_err_exit; 2205 } 2206 2207 rc = lpfc_mbox_rsrc_prep(phba, pmb); 2208 if (rc) { 2209 rc = 2; 2210 mempool_free(pmb, phba->mbox_mem_pool); 2211 goto lpfc_handle_latt_err_exit; 2212 } 2213 2214 /* Cleanup any outstanding ELS commands */ 2215 lpfc_els_flush_all_cmd(phba); 2216 psli->slistat.link_event++; 2217 lpfc_read_topology(phba, pmb, (struct lpfc_dmabuf *)pmb->ctx_buf); 2218 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology; 2219 pmb->vport = vport; 2220 /* Block ELS IOCBs until we have processed this mbox command */ 2221 phba->sli.sli3_ring[LPFC_ELS_RING].flag |= LPFC_STOP_IOCB_EVENT; 2222 rc = lpfc_sli_issue_mbox (phba, pmb, MBX_NOWAIT); 2223 if (rc == MBX_NOT_FINISHED) { 2224 rc = 4; 2225 goto lpfc_handle_latt_free_mbuf; 2226 } 2227 2228 /* Clear Link Attention in HA REG */ 2229 spin_lock_irq(&phba->hbalock); 2230 writel(HA_LATT, phba->HAregaddr); 2231 readl(phba->HAregaddr); /* flush */ 2232 spin_unlock_irq(&phba->hbalock); 2233 2234 return; 2235 2236 lpfc_handle_latt_free_mbuf: 2237 phba->sli.sli3_ring[LPFC_ELS_RING].flag &= ~LPFC_STOP_IOCB_EVENT; 2238 lpfc_mbox_rsrc_cleanup(phba, pmb, MBOX_THD_UNLOCKED); 2239 lpfc_handle_latt_err_exit: 2240 /* Enable Link attention interrupts */ 2241 spin_lock_irq(&phba->hbalock); 2242 psli->sli_flag |= LPFC_PROCESS_LA; 2243 control = readl(phba->HCregaddr); 2244 control |= HC_LAINT_ENA; 2245 writel(control, phba->HCregaddr); 2246 readl(phba->HCregaddr); /* flush */ 2247 2248 /* Clear Link Attention in HA REG */ 2249 writel(HA_LATT, phba->HAregaddr); 2250 readl(phba->HAregaddr); /* flush */ 2251 spin_unlock_irq(&phba->hbalock); 2252 lpfc_linkdown(phba); 2253 phba->link_state = LPFC_HBA_ERROR; 2254 2255 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 2256 "0300 LATT: Cannot issue READ_LA: Data:%d\n", rc); 2257 2258 return; 2259 } 2260 2261 static void 2262 lpfc_fill_vpd(struct lpfc_hba *phba, uint8_t *vpd, int length, int *pindex) 2263 { 2264 int i, j; 2265 2266 while (length > 0) { 2267 /* Look for Serial Number */ 2268 if ((vpd[*pindex] == 'S') && (vpd[*pindex + 1] == 'N')) { 2269 *pindex += 2; 2270 i = vpd[*pindex]; 2271 *pindex += 1; 2272 j = 0; 2273 length -= (3+i); 2274 while (i--) { 2275 phba->SerialNumber[j++] = vpd[(*pindex)++]; 2276 if (j == 31) 2277 break; 2278 } 2279 phba->SerialNumber[j] = 0; 2280 continue; 2281 } else if ((vpd[*pindex] == 'V') && (vpd[*pindex + 1] == '1')) { 2282 phba->vpd_flag |= VPD_MODEL_DESC; 2283 *pindex += 2; 2284 i = vpd[*pindex]; 2285 *pindex += 1; 2286 j = 0; 2287 length -= (3+i); 2288 while (i--) { 2289 phba->ModelDesc[j++] = vpd[(*pindex)++]; 2290 if (j == 255) 2291 break; 2292 } 2293 phba->ModelDesc[j] = 0; 2294 continue; 2295 } else if ((vpd[*pindex] == 'V') && (vpd[*pindex + 1] == '2')) { 2296 phba->vpd_flag |= VPD_MODEL_NAME; 2297 *pindex += 2; 2298 i = vpd[*pindex]; 2299 *pindex += 1; 2300 j = 0; 2301 length -= (3+i); 2302 while (i--) { 2303 phba->ModelName[j++] = vpd[(*pindex)++]; 2304 if (j == 79) 2305 break; 2306 } 2307 phba->ModelName[j] = 0; 2308 continue; 2309 } else if ((vpd[*pindex] == 'V') && (vpd[*pindex + 1] == '3')) { 2310 phba->vpd_flag |= VPD_PROGRAM_TYPE; 2311 *pindex += 2; 2312 i = vpd[*pindex]; 2313 *pindex += 1; 2314 j = 0; 2315 length -= (3+i); 2316 while (i--) { 2317 phba->ProgramType[j++] = vpd[(*pindex)++]; 2318 if (j == 255) 2319 break; 2320 } 2321 phba->ProgramType[j] = 0; 2322 continue; 2323 } else if ((vpd[*pindex] == 'V') && (vpd[*pindex + 1] == '4')) { 2324 phba->vpd_flag |= VPD_PORT; 2325 *pindex += 2; 2326 i = vpd[*pindex]; 2327 *pindex += 1; 2328 j = 0; 2329 length -= (3 + i); 2330 while (i--) { 2331 if ((phba->sli_rev == LPFC_SLI_REV4) && 2332 (phba->sli4_hba.pport_name_sta == 2333 LPFC_SLI4_PPNAME_GET)) { 2334 j++; 2335 (*pindex)++; 2336 } else 2337 phba->Port[j++] = vpd[(*pindex)++]; 2338 if (j == 19) 2339 break; 2340 } 2341 if ((phba->sli_rev != LPFC_SLI_REV4) || 2342 (phba->sli4_hba.pport_name_sta == 2343 LPFC_SLI4_PPNAME_NON)) 2344 phba->Port[j] = 0; 2345 continue; 2346 } else { 2347 *pindex += 2; 2348 i = vpd[*pindex]; 2349 *pindex += 1; 2350 *pindex += i; 2351 length -= (3 + i); 2352 } 2353 } 2354 } 2355 2356 /** 2357 * lpfc_parse_vpd - Parse VPD (Vital Product Data) 2358 * @phba: pointer to lpfc hba data structure. 2359 * @vpd: pointer to the vital product data. 2360 * @len: length of the vital product data in bytes. 2361 * 2362 * This routine parses the Vital Product Data (VPD). The VPD is treated as 2363 * an array of characters. In this routine, the ModelName, ProgramType, and 2364 * ModelDesc, etc. fields of the phba data structure will be populated. 2365 * 2366 * Return codes 2367 * 0 - pointer to the VPD passed in is NULL 2368 * 1 - success 2369 **/ 2370 int 2371 lpfc_parse_vpd(struct lpfc_hba *phba, uint8_t *vpd, int len) 2372 { 2373 uint8_t lenlo, lenhi; 2374 int Length; 2375 int i; 2376 int finished = 0; 2377 int index = 0; 2378 2379 if (!vpd) 2380 return 0; 2381 2382 /* Vital Product */ 2383 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 2384 "0455 Vital Product Data: x%x x%x x%x x%x\n", 2385 (uint32_t) vpd[0], (uint32_t) vpd[1], (uint32_t) vpd[2], 2386 (uint32_t) vpd[3]); 2387 while (!finished && (index < (len - 4))) { 2388 switch (vpd[index]) { 2389 case 0x82: 2390 case 0x91: 2391 index += 1; 2392 lenlo = vpd[index]; 2393 index += 1; 2394 lenhi = vpd[index]; 2395 index += 1; 2396 i = ((((unsigned short)lenhi) << 8) + lenlo); 2397 index += i; 2398 break; 2399 case 0x90: 2400 index += 1; 2401 lenlo = vpd[index]; 2402 index += 1; 2403 lenhi = vpd[index]; 2404 index += 1; 2405 Length = ((((unsigned short)lenhi) << 8) + lenlo); 2406 if (Length > len - index) 2407 Length = len - index; 2408 2409 lpfc_fill_vpd(phba, vpd, Length, &index); 2410 finished = 0; 2411 break; 2412 case 0x78: 2413 finished = 1; 2414 break; 2415 default: 2416 index ++; 2417 break; 2418 } 2419 } 2420 2421 return(1); 2422 } 2423 2424 /** 2425 * lpfc_get_atto_model_desc - Retrieve ATTO HBA device model name and description 2426 * @phba: pointer to lpfc hba data structure. 2427 * @mdp: pointer to the data structure to hold the derived model name. 2428 * @descp: pointer to the data structure to hold the derived description. 2429 * 2430 * This routine retrieves HBA's description based on its registered PCI device 2431 * ID. The @descp passed into this function points to an array of 256 chars. It 2432 * shall be returned with the model name, maximum speed, and the host bus type. 2433 * The @mdp passed into this function points to an array of 80 chars. When the 2434 * function returns, the @mdp will be filled with the model name. 2435 **/ 2436 static void 2437 lpfc_get_atto_model_desc(struct lpfc_hba *phba, uint8_t *mdp, uint8_t *descp) 2438 { 2439 uint16_t sub_dev_id = phba->pcidev->subsystem_device; 2440 char *model = "<Unknown>"; 2441 int tbolt = 0; 2442 2443 switch (sub_dev_id) { 2444 case PCI_DEVICE_ID_CLRY_161E: 2445 model = "161E"; 2446 break; 2447 case PCI_DEVICE_ID_CLRY_162E: 2448 model = "162E"; 2449 break; 2450 case PCI_DEVICE_ID_CLRY_164E: 2451 model = "164E"; 2452 break; 2453 case PCI_DEVICE_ID_CLRY_161P: 2454 model = "161P"; 2455 break; 2456 case PCI_DEVICE_ID_CLRY_162P: 2457 model = "162P"; 2458 break; 2459 case PCI_DEVICE_ID_CLRY_164P: 2460 model = "164P"; 2461 break; 2462 case PCI_DEVICE_ID_CLRY_321E: 2463 model = "321E"; 2464 break; 2465 case PCI_DEVICE_ID_CLRY_322E: 2466 model = "322E"; 2467 break; 2468 case PCI_DEVICE_ID_CLRY_324E: 2469 model = "324E"; 2470 break; 2471 case PCI_DEVICE_ID_CLRY_321P: 2472 model = "321P"; 2473 break; 2474 case PCI_DEVICE_ID_CLRY_322P: 2475 model = "322P"; 2476 break; 2477 case PCI_DEVICE_ID_CLRY_324P: 2478 model = "324P"; 2479 break; 2480 case PCI_DEVICE_ID_TLFC_2XX2: 2481 model = "2XX2"; 2482 tbolt = 1; 2483 break; 2484 case PCI_DEVICE_ID_TLFC_3162: 2485 model = "3162"; 2486 tbolt = 1; 2487 break; 2488 case PCI_DEVICE_ID_TLFC_3322: 2489 model = "3322"; 2490 tbolt = 1; 2491 break; 2492 default: 2493 model = "Unknown"; 2494 break; 2495 } 2496 2497 if (mdp && mdp[0] == '\0') 2498 snprintf(mdp, 79, "%s", model); 2499 2500 if (descp && descp[0] == '\0') 2501 snprintf(descp, 255, 2502 "ATTO %s%s, Fibre Channel Adapter Initiator, Port %s", 2503 (tbolt) ? "ThunderLink FC " : "Celerity FC-", 2504 model, 2505 phba->Port); 2506 } 2507 2508 /** 2509 * lpfc_get_hba_model_desc - Retrieve HBA device model name and description 2510 * @phba: pointer to lpfc hba data structure. 2511 * @mdp: pointer to the data structure to hold the derived model name. 2512 * @descp: pointer to the data structure to hold the derived description. 2513 * 2514 * This routine retrieves HBA's description based on its registered PCI device 2515 * ID. The @descp passed into this function points to an array of 256 chars. It 2516 * shall be returned with the model name, maximum speed, and the host bus type. 2517 * The @mdp passed into this function points to an array of 80 chars. When the 2518 * function returns, the @mdp will be filled with the model name. 2519 **/ 2520 static void 2521 lpfc_get_hba_model_desc(struct lpfc_hba *phba, uint8_t *mdp, uint8_t *descp) 2522 { 2523 lpfc_vpd_t *vp; 2524 uint16_t dev_id = phba->pcidev->device; 2525 int max_speed; 2526 int GE = 0; 2527 int oneConnect = 0; /* default is not a oneConnect */ 2528 struct { 2529 char *name; 2530 char *bus; 2531 char *function; 2532 } m = {"<Unknown>", "", ""}; 2533 2534 if (mdp && mdp[0] != '\0' 2535 && descp && descp[0] != '\0') 2536 return; 2537 2538 if (phba->pcidev->vendor == PCI_VENDOR_ID_ATTO) { 2539 lpfc_get_atto_model_desc(phba, mdp, descp); 2540 return; 2541 } 2542 2543 if (phba->lmt & LMT_64Gb) 2544 max_speed = 64; 2545 else if (phba->lmt & LMT_32Gb) 2546 max_speed = 32; 2547 else if (phba->lmt & LMT_16Gb) 2548 max_speed = 16; 2549 else if (phba->lmt & LMT_10Gb) 2550 max_speed = 10; 2551 else if (phba->lmt & LMT_8Gb) 2552 max_speed = 8; 2553 else if (phba->lmt & LMT_4Gb) 2554 max_speed = 4; 2555 else if (phba->lmt & LMT_2Gb) 2556 max_speed = 2; 2557 else if (phba->lmt & LMT_1Gb) 2558 max_speed = 1; 2559 else 2560 max_speed = 0; 2561 2562 vp = &phba->vpd; 2563 2564 switch (dev_id) { 2565 case PCI_DEVICE_ID_FIREFLY: 2566 m = (typeof(m)){"LP6000", "PCI", 2567 "Obsolete, Unsupported Fibre Channel Adapter"}; 2568 break; 2569 case PCI_DEVICE_ID_SUPERFLY: 2570 if (vp->rev.biuRev >= 1 && vp->rev.biuRev <= 3) 2571 m = (typeof(m)){"LP7000", "PCI", ""}; 2572 else 2573 m = (typeof(m)){"LP7000E", "PCI", ""}; 2574 m.function = "Obsolete, Unsupported Fibre Channel Adapter"; 2575 break; 2576 case PCI_DEVICE_ID_DRAGONFLY: 2577 m = (typeof(m)){"LP8000", "PCI", 2578 "Obsolete, Unsupported Fibre Channel Adapter"}; 2579 break; 2580 case PCI_DEVICE_ID_CENTAUR: 2581 if (FC_JEDEC_ID(vp->rev.biuRev) == CENTAUR_2G_JEDEC_ID) 2582 m = (typeof(m)){"LP9002", "PCI", ""}; 2583 else 2584 m = (typeof(m)){"LP9000", "PCI", ""}; 2585 m.function = "Obsolete, Unsupported Fibre Channel Adapter"; 2586 break; 2587 case PCI_DEVICE_ID_RFLY: 2588 m = (typeof(m)){"LP952", "PCI", 2589 "Obsolete, Unsupported Fibre Channel Adapter"}; 2590 break; 2591 case PCI_DEVICE_ID_PEGASUS: 2592 m = (typeof(m)){"LP9802", "PCI-X", 2593 "Obsolete, Unsupported Fibre Channel Adapter"}; 2594 break; 2595 case PCI_DEVICE_ID_THOR: 2596 m = (typeof(m)){"LP10000", "PCI-X", 2597 "Obsolete, Unsupported Fibre Channel Adapter"}; 2598 break; 2599 case PCI_DEVICE_ID_VIPER: 2600 m = (typeof(m)){"LPX1000", "PCI-X", 2601 "Obsolete, Unsupported Fibre Channel Adapter"}; 2602 break; 2603 case PCI_DEVICE_ID_PFLY: 2604 m = (typeof(m)){"LP982", "PCI-X", 2605 "Obsolete, Unsupported Fibre Channel Adapter"}; 2606 break; 2607 case PCI_DEVICE_ID_TFLY: 2608 m = (typeof(m)){"LP1050", "PCI-X", 2609 "Obsolete, Unsupported Fibre Channel Adapter"}; 2610 break; 2611 case PCI_DEVICE_ID_HELIOS: 2612 m = (typeof(m)){"LP11000", "PCI-X2", 2613 "Obsolete, Unsupported Fibre Channel Adapter"}; 2614 break; 2615 case PCI_DEVICE_ID_HELIOS_SCSP: 2616 m = (typeof(m)){"LP11000-SP", "PCI-X2", 2617 "Obsolete, Unsupported Fibre Channel Adapter"}; 2618 break; 2619 case PCI_DEVICE_ID_HELIOS_DCSP: 2620 m = (typeof(m)){"LP11002-SP", "PCI-X2", 2621 "Obsolete, Unsupported Fibre Channel Adapter"}; 2622 break; 2623 case PCI_DEVICE_ID_NEPTUNE: 2624 m = (typeof(m)){"LPe1000", "PCIe", 2625 "Obsolete, Unsupported Fibre Channel Adapter"}; 2626 break; 2627 case PCI_DEVICE_ID_NEPTUNE_SCSP: 2628 m = (typeof(m)){"LPe1000-SP", "PCIe", 2629 "Obsolete, Unsupported Fibre Channel Adapter"}; 2630 break; 2631 case PCI_DEVICE_ID_NEPTUNE_DCSP: 2632 m = (typeof(m)){"LPe1002-SP", "PCIe", 2633 "Obsolete, Unsupported Fibre Channel Adapter"}; 2634 break; 2635 case PCI_DEVICE_ID_BMID: 2636 m = (typeof(m)){"LP1150", "PCI-X2", "Fibre Channel Adapter"}; 2637 break; 2638 case PCI_DEVICE_ID_BSMB: 2639 m = (typeof(m)){"LP111", "PCI-X2", 2640 "Obsolete, Unsupported Fibre Channel Adapter"}; 2641 break; 2642 case PCI_DEVICE_ID_ZEPHYR: 2643 m = (typeof(m)){"LPe11000", "PCIe", "Fibre Channel Adapter"}; 2644 break; 2645 case PCI_DEVICE_ID_ZEPHYR_SCSP: 2646 m = (typeof(m)){"LPe11000", "PCIe", "Fibre Channel Adapter"}; 2647 break; 2648 case PCI_DEVICE_ID_ZEPHYR_DCSP: 2649 m = (typeof(m)){"LP2105", "PCIe", "FCoE Adapter"}; 2650 GE = 1; 2651 break; 2652 case PCI_DEVICE_ID_ZMID: 2653 m = (typeof(m)){"LPe1150", "PCIe", "Fibre Channel Adapter"}; 2654 break; 2655 case PCI_DEVICE_ID_ZSMB: 2656 m = (typeof(m)){"LPe111", "PCIe", "Fibre Channel Adapter"}; 2657 break; 2658 case PCI_DEVICE_ID_LP101: 2659 m = (typeof(m)){"LP101", "PCI-X", 2660 "Obsolete, Unsupported Fibre Channel Adapter"}; 2661 break; 2662 case PCI_DEVICE_ID_LP10000S: 2663 m = (typeof(m)){"LP10000-S", "PCI", 2664 "Obsolete, Unsupported Fibre Channel Adapter"}; 2665 break; 2666 case PCI_DEVICE_ID_LP11000S: 2667 m = (typeof(m)){"LP11000-S", "PCI-X2", 2668 "Obsolete, Unsupported Fibre Channel Adapter"}; 2669 break; 2670 case PCI_DEVICE_ID_LPE11000S: 2671 m = (typeof(m)){"LPe11000-S", "PCIe", 2672 "Obsolete, Unsupported Fibre Channel Adapter"}; 2673 break; 2674 case PCI_DEVICE_ID_SAT: 2675 m = (typeof(m)){"LPe12000", "PCIe", "Fibre Channel Adapter"}; 2676 break; 2677 case PCI_DEVICE_ID_SAT_MID: 2678 m = (typeof(m)){"LPe1250", "PCIe", "Fibre Channel Adapter"}; 2679 break; 2680 case PCI_DEVICE_ID_SAT_SMB: 2681 m = (typeof(m)){"LPe121", "PCIe", "Fibre Channel Adapter"}; 2682 break; 2683 case PCI_DEVICE_ID_SAT_DCSP: 2684 m = (typeof(m)){"LPe12002-SP", "PCIe", "Fibre Channel Adapter"}; 2685 break; 2686 case PCI_DEVICE_ID_SAT_SCSP: 2687 m = (typeof(m)){"LPe12000-SP", "PCIe", "Fibre Channel Adapter"}; 2688 break; 2689 case PCI_DEVICE_ID_SAT_S: 2690 m = (typeof(m)){"LPe12000-S", "PCIe", "Fibre Channel Adapter"}; 2691 break; 2692 case PCI_DEVICE_ID_PROTEUS_VF: 2693 m = (typeof(m)){"LPev12000", "PCIe IOV", 2694 "Obsolete, Unsupported Fibre Channel Adapter"}; 2695 break; 2696 case PCI_DEVICE_ID_PROTEUS_PF: 2697 m = (typeof(m)){"LPev12000", "PCIe IOV", 2698 "Obsolete, Unsupported Fibre Channel Adapter"}; 2699 break; 2700 case PCI_DEVICE_ID_PROTEUS_S: 2701 m = (typeof(m)){"LPemv12002-S", "PCIe IOV", 2702 "Obsolete, Unsupported Fibre Channel Adapter"}; 2703 break; 2704 case PCI_DEVICE_ID_TIGERSHARK: 2705 oneConnect = 1; 2706 m = (typeof(m)){"OCe10100", "PCIe", "FCoE"}; 2707 break; 2708 case PCI_DEVICE_ID_TOMCAT: 2709 oneConnect = 1; 2710 m = (typeof(m)){"OCe11100", "PCIe", "FCoE"}; 2711 break; 2712 case PCI_DEVICE_ID_FALCON: 2713 m = (typeof(m)){"LPSe12002-ML1-E", "PCIe", 2714 "EmulexSecure Fibre"}; 2715 break; 2716 case PCI_DEVICE_ID_BALIUS: 2717 m = (typeof(m)){"LPVe12002", "PCIe Shared I/O", 2718 "Obsolete, Unsupported Fibre Channel Adapter"}; 2719 break; 2720 case PCI_DEVICE_ID_LANCER_FC: 2721 m = (typeof(m)){"LPe16000", "PCIe", "Fibre Channel Adapter"}; 2722 break; 2723 case PCI_DEVICE_ID_LANCER_FC_VF: 2724 m = (typeof(m)){"LPe16000", "PCIe", 2725 "Obsolete, Unsupported Fibre Channel Adapter"}; 2726 break; 2727 case PCI_DEVICE_ID_LANCER_FCOE: 2728 oneConnect = 1; 2729 m = (typeof(m)){"OCe15100", "PCIe", "FCoE"}; 2730 break; 2731 case PCI_DEVICE_ID_LANCER_FCOE_VF: 2732 oneConnect = 1; 2733 m = (typeof(m)){"OCe15100", "PCIe", 2734 "Obsolete, Unsupported FCoE"}; 2735 break; 2736 case PCI_DEVICE_ID_LANCER_G6_FC: 2737 m = (typeof(m)){"LPe32000", "PCIe", "Fibre Channel Adapter"}; 2738 break; 2739 case PCI_DEVICE_ID_LANCER_G7_FC: 2740 m = (typeof(m)){"LPe36000", "PCIe", "Fibre Channel Adapter"}; 2741 break; 2742 case PCI_DEVICE_ID_LANCER_G7P_FC: 2743 m = (typeof(m)){"LPe38000", "PCIe", "Fibre Channel Adapter"}; 2744 break; 2745 case PCI_DEVICE_ID_SKYHAWK: 2746 case PCI_DEVICE_ID_SKYHAWK_VF: 2747 oneConnect = 1; 2748 m = (typeof(m)){"OCe14000", "PCIe", "FCoE"}; 2749 break; 2750 default: 2751 m = (typeof(m)){"Unknown", "", ""}; 2752 break; 2753 } 2754 2755 if (mdp && mdp[0] == '\0') 2756 snprintf(mdp, 79,"%s", m.name); 2757 /* 2758 * oneConnect hba requires special processing, they are all initiators 2759 * and we put the port number on the end 2760 */ 2761 if (descp && descp[0] == '\0') { 2762 if (oneConnect) 2763 snprintf(descp, 255, 2764 "Emulex OneConnect %s, %s Initiator %s", 2765 m.name, m.function, 2766 phba->Port); 2767 else if (max_speed == 0) 2768 snprintf(descp, 255, 2769 "Emulex %s %s %s", 2770 m.name, m.bus, m.function); 2771 else 2772 snprintf(descp, 255, 2773 "Emulex %s %d%s %s %s", 2774 m.name, max_speed, (GE) ? "GE" : "Gb", 2775 m.bus, m.function); 2776 } 2777 } 2778 2779 /** 2780 * lpfc_sli3_post_buffer - Post IOCB(s) with DMA buffer descriptor(s) to a IOCB ring 2781 * @phba: pointer to lpfc hba data structure. 2782 * @pring: pointer to a IOCB ring. 2783 * @cnt: the number of IOCBs to be posted to the IOCB ring. 2784 * 2785 * This routine posts a given number of IOCBs with the associated DMA buffer 2786 * descriptors specified by the cnt argument to the given IOCB ring. 2787 * 2788 * Return codes 2789 * The number of IOCBs NOT able to be posted to the IOCB ring. 2790 **/ 2791 int 2792 lpfc_sli3_post_buffer(struct lpfc_hba *phba, struct lpfc_sli_ring *pring, int cnt) 2793 { 2794 IOCB_t *icmd; 2795 struct lpfc_iocbq *iocb; 2796 struct lpfc_dmabuf *mp1, *mp2; 2797 2798 cnt += pring->missbufcnt; 2799 2800 /* While there are buffers to post */ 2801 while (cnt > 0) { 2802 /* Allocate buffer for command iocb */ 2803 iocb = lpfc_sli_get_iocbq(phba); 2804 if (iocb == NULL) { 2805 pring->missbufcnt = cnt; 2806 return cnt; 2807 } 2808 icmd = &iocb->iocb; 2809 2810 /* 2 buffers can be posted per command */ 2811 /* Allocate buffer to post */ 2812 mp1 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL); 2813 if (mp1) 2814 mp1->virt = lpfc_mbuf_alloc(phba, MEM_PRI, &mp1->phys); 2815 if (!mp1 || !mp1->virt) { 2816 kfree(mp1); 2817 lpfc_sli_release_iocbq(phba, iocb); 2818 pring->missbufcnt = cnt; 2819 return cnt; 2820 } 2821 2822 INIT_LIST_HEAD(&mp1->list); 2823 /* Allocate buffer to post */ 2824 if (cnt > 1) { 2825 mp2 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL); 2826 if (mp2) 2827 mp2->virt = lpfc_mbuf_alloc(phba, MEM_PRI, 2828 &mp2->phys); 2829 if (!mp2 || !mp2->virt) { 2830 kfree(mp2); 2831 lpfc_mbuf_free(phba, mp1->virt, mp1->phys); 2832 kfree(mp1); 2833 lpfc_sli_release_iocbq(phba, iocb); 2834 pring->missbufcnt = cnt; 2835 return cnt; 2836 } 2837 2838 INIT_LIST_HEAD(&mp2->list); 2839 } else { 2840 mp2 = NULL; 2841 } 2842 2843 icmd->un.cont64[0].addrHigh = putPaddrHigh(mp1->phys); 2844 icmd->un.cont64[0].addrLow = putPaddrLow(mp1->phys); 2845 icmd->un.cont64[0].tus.f.bdeSize = FCELSSIZE; 2846 icmd->ulpBdeCount = 1; 2847 cnt--; 2848 if (mp2) { 2849 icmd->un.cont64[1].addrHigh = putPaddrHigh(mp2->phys); 2850 icmd->un.cont64[1].addrLow = putPaddrLow(mp2->phys); 2851 icmd->un.cont64[1].tus.f.bdeSize = FCELSSIZE; 2852 cnt--; 2853 icmd->ulpBdeCount = 2; 2854 } 2855 2856 icmd->ulpCommand = CMD_QUE_RING_BUF64_CN; 2857 icmd->ulpLe = 1; 2858 2859 if (lpfc_sli_issue_iocb(phba, pring->ringno, iocb, 0) == 2860 IOCB_ERROR) { 2861 lpfc_mbuf_free(phba, mp1->virt, mp1->phys); 2862 kfree(mp1); 2863 cnt++; 2864 if (mp2) { 2865 lpfc_mbuf_free(phba, mp2->virt, mp2->phys); 2866 kfree(mp2); 2867 cnt++; 2868 } 2869 lpfc_sli_release_iocbq(phba, iocb); 2870 pring->missbufcnt = cnt; 2871 return cnt; 2872 } 2873 lpfc_sli_ringpostbuf_put(phba, pring, mp1); 2874 if (mp2) 2875 lpfc_sli_ringpostbuf_put(phba, pring, mp2); 2876 } 2877 pring->missbufcnt = 0; 2878 return 0; 2879 } 2880 2881 /** 2882 * lpfc_post_rcv_buf - Post the initial receive IOCB buffers to ELS ring 2883 * @phba: pointer to lpfc hba data structure. 2884 * 2885 * This routine posts initial receive IOCB buffers to the ELS ring. The 2886 * current number of initial IOCB buffers specified by LPFC_BUF_RING0 is 2887 * set to 64 IOCBs. SLI3 only. 2888 * 2889 * Return codes 2890 * 0 - success (currently always success) 2891 **/ 2892 static int 2893 lpfc_post_rcv_buf(struct lpfc_hba *phba) 2894 { 2895 struct lpfc_sli *psli = &phba->sli; 2896 2897 /* Ring 0, ELS / CT buffers */ 2898 lpfc_sli3_post_buffer(phba, &psli->sli3_ring[LPFC_ELS_RING], LPFC_BUF_RING0); 2899 /* Ring 2 - FCP no buffers needed */ 2900 2901 return 0; 2902 } 2903 2904 #define S(N,V) (((V)<<(N))|((V)>>(32-(N)))) 2905 2906 /** 2907 * lpfc_sha_init - Set up initial array of hash table entries 2908 * @HashResultPointer: pointer to an array as hash table. 2909 * 2910 * This routine sets up the initial values to the array of hash table entries 2911 * for the LC HBAs. 2912 **/ 2913 static void 2914 lpfc_sha_init(uint32_t * HashResultPointer) 2915 { 2916 HashResultPointer[0] = 0x67452301; 2917 HashResultPointer[1] = 0xEFCDAB89; 2918 HashResultPointer[2] = 0x98BADCFE; 2919 HashResultPointer[3] = 0x10325476; 2920 HashResultPointer[4] = 0xC3D2E1F0; 2921 } 2922 2923 /** 2924 * lpfc_sha_iterate - Iterate initial hash table with the working hash table 2925 * @HashResultPointer: pointer to an initial/result hash table. 2926 * @HashWorkingPointer: pointer to an working hash table. 2927 * 2928 * This routine iterates an initial hash table pointed by @HashResultPointer 2929 * with the values from the working hash table pointeed by @HashWorkingPointer. 2930 * The results are putting back to the initial hash table, returned through 2931 * the @HashResultPointer as the result hash table. 2932 **/ 2933 static void 2934 lpfc_sha_iterate(uint32_t * HashResultPointer, uint32_t * HashWorkingPointer) 2935 { 2936 int t; 2937 uint32_t TEMP; 2938 uint32_t A, B, C, D, E; 2939 t = 16; 2940 do { 2941 HashWorkingPointer[t] = 2942 S(1, 2943 HashWorkingPointer[t - 3] ^ HashWorkingPointer[t - 2944 8] ^ 2945 HashWorkingPointer[t - 14] ^ HashWorkingPointer[t - 16]); 2946 } while (++t <= 79); 2947 t = 0; 2948 A = HashResultPointer[0]; 2949 B = HashResultPointer[1]; 2950 C = HashResultPointer[2]; 2951 D = HashResultPointer[3]; 2952 E = HashResultPointer[4]; 2953 2954 do { 2955 if (t < 20) { 2956 TEMP = ((B & C) | ((~B) & D)) + 0x5A827999; 2957 } else if (t < 40) { 2958 TEMP = (B ^ C ^ D) + 0x6ED9EBA1; 2959 } else if (t < 60) { 2960 TEMP = ((B & C) | (B & D) | (C & D)) + 0x8F1BBCDC; 2961 } else { 2962 TEMP = (B ^ C ^ D) + 0xCA62C1D6; 2963 } 2964 TEMP += S(5, A) + E + HashWorkingPointer[t]; 2965 E = D; 2966 D = C; 2967 C = S(30, B); 2968 B = A; 2969 A = TEMP; 2970 } while (++t <= 79); 2971 2972 HashResultPointer[0] += A; 2973 HashResultPointer[1] += B; 2974 HashResultPointer[2] += C; 2975 HashResultPointer[3] += D; 2976 HashResultPointer[4] += E; 2977 2978 } 2979 2980 /** 2981 * lpfc_challenge_key - Create challenge key based on WWPN of the HBA 2982 * @RandomChallenge: pointer to the entry of host challenge random number array. 2983 * @HashWorking: pointer to the entry of the working hash array. 2984 * 2985 * This routine calculates the working hash array referred by @HashWorking 2986 * from the challenge random numbers associated with the host, referred by 2987 * @RandomChallenge. The result is put into the entry of the working hash 2988 * array and returned by reference through @HashWorking. 2989 **/ 2990 static void 2991 lpfc_challenge_key(uint32_t * RandomChallenge, uint32_t * HashWorking) 2992 { 2993 *HashWorking = (*RandomChallenge ^ *HashWorking); 2994 } 2995 2996 /** 2997 * lpfc_hba_init - Perform special handling for LC HBA initialization 2998 * @phba: pointer to lpfc hba data structure. 2999 * @hbainit: pointer to an array of unsigned 32-bit integers. 3000 * 3001 * This routine performs the special handling for LC HBA initialization. 3002 **/ 3003 void 3004 lpfc_hba_init(struct lpfc_hba *phba, uint32_t *hbainit) 3005 { 3006 int t; 3007 uint32_t *HashWorking; 3008 uint32_t *pwwnn = (uint32_t *) phba->wwnn; 3009 3010 HashWorking = kcalloc(80, sizeof(uint32_t), GFP_KERNEL); 3011 if (!HashWorking) 3012 return; 3013 3014 HashWorking[0] = HashWorking[78] = *pwwnn++; 3015 HashWorking[1] = HashWorking[79] = *pwwnn; 3016 3017 for (t = 0; t < 7; t++) 3018 lpfc_challenge_key(phba->RandomData + t, HashWorking + t); 3019 3020 lpfc_sha_init(hbainit); 3021 lpfc_sha_iterate(hbainit, HashWorking); 3022 kfree(HashWorking); 3023 } 3024 3025 /** 3026 * lpfc_cleanup - Performs vport cleanups before deleting a vport 3027 * @vport: pointer to a virtual N_Port data structure. 3028 * 3029 * This routine performs the necessary cleanups before deleting the @vport. 3030 * It invokes the discovery state machine to perform necessary state 3031 * transitions and to release the ndlps associated with the @vport. Note, 3032 * the physical port is treated as @vport 0. 3033 **/ 3034 void 3035 lpfc_cleanup(struct lpfc_vport *vport) 3036 { 3037 struct lpfc_hba *phba = vport->phba; 3038 struct lpfc_nodelist *ndlp, *next_ndlp; 3039 int i = 0; 3040 3041 if (phba->link_state > LPFC_LINK_DOWN) 3042 lpfc_port_link_failure(vport); 3043 3044 /* Clean up VMID resources */ 3045 if (lpfc_is_vmid_enabled(phba)) 3046 lpfc_vmid_vport_cleanup(vport); 3047 3048 list_for_each_entry_safe(ndlp, next_ndlp, &vport->fc_nodes, nlp_listp) { 3049 if (vport->port_type != LPFC_PHYSICAL_PORT && 3050 ndlp->nlp_DID == Fabric_DID) { 3051 /* Just free up ndlp with Fabric_DID for vports */ 3052 lpfc_nlp_put(ndlp); 3053 continue; 3054 } 3055 3056 if (ndlp->nlp_DID == Fabric_Cntl_DID && 3057 ndlp->nlp_state == NLP_STE_UNUSED_NODE) { 3058 lpfc_nlp_put(ndlp); 3059 continue; 3060 } 3061 3062 /* Fabric Ports not in UNMAPPED state are cleaned up in the 3063 * DEVICE_RM event. 3064 */ 3065 if (ndlp->nlp_type & NLP_FABRIC && 3066 ndlp->nlp_state == NLP_STE_UNMAPPED_NODE) 3067 lpfc_disc_state_machine(vport, ndlp, NULL, 3068 NLP_EVT_DEVICE_RECOVERY); 3069 3070 if (!(ndlp->fc4_xpt_flags & (NVME_XPT_REGD|SCSI_XPT_REGD))) 3071 lpfc_disc_state_machine(vport, ndlp, NULL, 3072 NLP_EVT_DEVICE_RM); 3073 } 3074 3075 /* This is a special case flush to return all 3076 * IOs before entering this loop. There are 3077 * two points in the code where a flush is 3078 * avoided if the FC_UNLOADING flag is set. 3079 * one is in the multipool destroy, 3080 * (this prevents a crash) and the other is 3081 * in the nvme abort handler, ( also prevents 3082 * a crash). Both of these exceptions are 3083 * cases where the slot is still accessible. 3084 * The flush here is only when the pci slot 3085 * is offline. 3086 */ 3087 if (vport->load_flag & FC_UNLOADING && 3088 pci_channel_offline(phba->pcidev)) 3089 lpfc_sli_flush_io_rings(vport->phba); 3090 3091 /* At this point, ALL ndlp's should be gone 3092 * because of the previous NLP_EVT_DEVICE_RM. 3093 * Lets wait for this to happen, if needed. 3094 */ 3095 while (!list_empty(&vport->fc_nodes)) { 3096 if (i++ > 3000) { 3097 lpfc_printf_vlog(vport, KERN_ERR, 3098 LOG_TRACE_EVENT, 3099 "0233 Nodelist not empty\n"); 3100 list_for_each_entry_safe(ndlp, next_ndlp, 3101 &vport->fc_nodes, nlp_listp) { 3102 lpfc_printf_vlog(ndlp->vport, KERN_ERR, 3103 LOG_DISCOVERY, 3104 "0282 did:x%x ndlp:x%px " 3105 "refcnt:%d xflags x%x nflag x%x\n", 3106 ndlp->nlp_DID, (void *)ndlp, 3107 kref_read(&ndlp->kref), 3108 ndlp->fc4_xpt_flags, 3109 ndlp->nlp_flag); 3110 } 3111 break; 3112 } 3113 3114 /* Wait for any activity on ndlps to settle */ 3115 msleep(10); 3116 } 3117 lpfc_cleanup_vports_rrqs(vport, NULL); 3118 } 3119 3120 /** 3121 * lpfc_stop_vport_timers - Stop all the timers associated with a vport 3122 * @vport: pointer to a virtual N_Port data structure. 3123 * 3124 * This routine stops all the timers associated with a @vport. This function 3125 * is invoked before disabling or deleting a @vport. Note that the physical 3126 * port is treated as @vport 0. 3127 **/ 3128 void 3129 lpfc_stop_vport_timers(struct lpfc_vport *vport) 3130 { 3131 del_timer_sync(&vport->els_tmofunc); 3132 del_timer_sync(&vport->delayed_disc_tmo); 3133 lpfc_can_disctmo(vport); 3134 return; 3135 } 3136 3137 /** 3138 * __lpfc_sli4_stop_fcf_redisc_wait_timer - Stop FCF rediscovery wait timer 3139 * @phba: pointer to lpfc hba data structure. 3140 * 3141 * This routine stops the SLI4 FCF rediscover wait timer if it's on. The 3142 * caller of this routine should already hold the host lock. 3143 **/ 3144 void 3145 __lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba *phba) 3146 { 3147 /* Clear pending FCF rediscovery wait flag */ 3148 phba->fcf.fcf_flag &= ~FCF_REDISC_PEND; 3149 3150 /* Now, try to stop the timer */ 3151 del_timer(&phba->fcf.redisc_wait); 3152 } 3153 3154 /** 3155 * lpfc_sli4_stop_fcf_redisc_wait_timer - Stop FCF rediscovery wait timer 3156 * @phba: pointer to lpfc hba data structure. 3157 * 3158 * This routine stops the SLI4 FCF rediscover wait timer if it's on. It 3159 * checks whether the FCF rediscovery wait timer is pending with the host 3160 * lock held before proceeding with disabling the timer and clearing the 3161 * wait timer pendig flag. 3162 **/ 3163 void 3164 lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba *phba) 3165 { 3166 spin_lock_irq(&phba->hbalock); 3167 if (!(phba->fcf.fcf_flag & FCF_REDISC_PEND)) { 3168 /* FCF rediscovery timer already fired or stopped */ 3169 spin_unlock_irq(&phba->hbalock); 3170 return; 3171 } 3172 __lpfc_sli4_stop_fcf_redisc_wait_timer(phba); 3173 /* Clear failover in progress flags */ 3174 phba->fcf.fcf_flag &= ~(FCF_DEAD_DISC | FCF_ACVL_DISC); 3175 spin_unlock_irq(&phba->hbalock); 3176 } 3177 3178 /** 3179 * lpfc_cmf_stop - Stop CMF processing 3180 * @phba: pointer to lpfc hba data structure. 3181 * 3182 * This is called when the link goes down or if CMF mode is turned OFF. 3183 * It is also called when going offline or unloaded just before the 3184 * congestion info buffer is unregistered. 3185 **/ 3186 void 3187 lpfc_cmf_stop(struct lpfc_hba *phba) 3188 { 3189 int cpu; 3190 struct lpfc_cgn_stat *cgs; 3191 3192 /* We only do something if CMF is enabled */ 3193 if (!phba->sli4_hba.pc_sli4_params.cmf) 3194 return; 3195 3196 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT, 3197 "6221 Stop CMF / Cancel Timer\n"); 3198 3199 /* Cancel the CMF timer */ 3200 hrtimer_cancel(&phba->cmf_timer); 3201 3202 /* Zero CMF counters */ 3203 atomic_set(&phba->cmf_busy, 0); 3204 for_each_present_cpu(cpu) { 3205 cgs = per_cpu_ptr(phba->cmf_stat, cpu); 3206 atomic64_set(&cgs->total_bytes, 0); 3207 atomic64_set(&cgs->rcv_bytes, 0); 3208 atomic_set(&cgs->rx_io_cnt, 0); 3209 atomic64_set(&cgs->rx_latency, 0); 3210 } 3211 atomic_set(&phba->cmf_bw_wait, 0); 3212 3213 /* Resume any blocked IO - Queue unblock on workqueue */ 3214 queue_work(phba->wq, &phba->unblock_request_work); 3215 } 3216 3217 static inline uint64_t 3218 lpfc_get_max_line_rate(struct lpfc_hba *phba) 3219 { 3220 uint64_t rate = lpfc_sli_port_speed_get(phba); 3221 3222 return ((((unsigned long)rate) * 1024 * 1024) / 10); 3223 } 3224 3225 void 3226 lpfc_cmf_signal_init(struct lpfc_hba *phba) 3227 { 3228 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT, 3229 "6223 Signal CMF init\n"); 3230 3231 /* Use the new fc_linkspeed to recalculate */ 3232 phba->cmf_interval_rate = LPFC_CMF_INTERVAL; 3233 phba->cmf_max_line_rate = lpfc_get_max_line_rate(phba); 3234 phba->cmf_link_byte_count = div_u64(phba->cmf_max_line_rate * 3235 phba->cmf_interval_rate, 1000); 3236 phba->cmf_max_bytes_per_interval = phba->cmf_link_byte_count; 3237 3238 /* This is a signal to firmware to sync up CMF BW with link speed */ 3239 lpfc_issue_cmf_sync_wqe(phba, 0, 0); 3240 } 3241 3242 /** 3243 * lpfc_cmf_start - Start CMF processing 3244 * @phba: pointer to lpfc hba data structure. 3245 * 3246 * This is called when the link comes up or if CMF mode is turned OFF 3247 * to Monitor or Managed. 3248 **/ 3249 void 3250 lpfc_cmf_start(struct lpfc_hba *phba) 3251 { 3252 struct lpfc_cgn_stat *cgs; 3253 int cpu; 3254 3255 /* We only do something if CMF is enabled */ 3256 if (!phba->sli4_hba.pc_sli4_params.cmf || 3257 phba->cmf_active_mode == LPFC_CFG_OFF) 3258 return; 3259 3260 /* Reinitialize congestion buffer info */ 3261 lpfc_init_congestion_buf(phba); 3262 3263 atomic_set(&phba->cgn_fabric_warn_cnt, 0); 3264 atomic_set(&phba->cgn_fabric_alarm_cnt, 0); 3265 atomic_set(&phba->cgn_sync_alarm_cnt, 0); 3266 atomic_set(&phba->cgn_sync_warn_cnt, 0); 3267 3268 atomic_set(&phba->cmf_busy, 0); 3269 for_each_present_cpu(cpu) { 3270 cgs = per_cpu_ptr(phba->cmf_stat, cpu); 3271 atomic64_set(&cgs->total_bytes, 0); 3272 atomic64_set(&cgs->rcv_bytes, 0); 3273 atomic_set(&cgs->rx_io_cnt, 0); 3274 atomic64_set(&cgs->rx_latency, 0); 3275 } 3276 phba->cmf_latency.tv_sec = 0; 3277 phba->cmf_latency.tv_nsec = 0; 3278 3279 lpfc_cmf_signal_init(phba); 3280 3281 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT, 3282 "6222 Start CMF / Timer\n"); 3283 3284 phba->cmf_timer_cnt = 0; 3285 hrtimer_start(&phba->cmf_timer, 3286 ktime_set(0, LPFC_CMF_INTERVAL * 1000000), 3287 HRTIMER_MODE_REL); 3288 /* Setup for latency check in IO cmpl routines */ 3289 ktime_get_real_ts64(&phba->cmf_latency); 3290 3291 atomic_set(&phba->cmf_bw_wait, 0); 3292 atomic_set(&phba->cmf_stop_io, 0); 3293 } 3294 3295 /** 3296 * lpfc_stop_hba_timers - Stop all the timers associated with an HBA 3297 * @phba: pointer to lpfc hba data structure. 3298 * 3299 * This routine stops all the timers associated with a HBA. This function is 3300 * invoked before either putting a HBA offline or unloading the driver. 3301 **/ 3302 void 3303 lpfc_stop_hba_timers(struct lpfc_hba *phba) 3304 { 3305 if (phba->pport) 3306 lpfc_stop_vport_timers(phba->pport); 3307 cancel_delayed_work_sync(&phba->eq_delay_work); 3308 cancel_delayed_work_sync(&phba->idle_stat_delay_work); 3309 del_timer_sync(&phba->sli.mbox_tmo); 3310 del_timer_sync(&phba->fabric_block_timer); 3311 del_timer_sync(&phba->eratt_poll); 3312 del_timer_sync(&phba->hb_tmofunc); 3313 if (phba->sli_rev == LPFC_SLI_REV4) { 3314 del_timer_sync(&phba->rrq_tmr); 3315 phba->hba_flag &= ~HBA_RRQ_ACTIVE; 3316 } 3317 phba->hba_flag &= ~(HBA_HBEAT_INP | HBA_HBEAT_TMO); 3318 3319 switch (phba->pci_dev_grp) { 3320 case LPFC_PCI_DEV_LP: 3321 /* Stop any LightPulse device specific driver timers */ 3322 del_timer_sync(&phba->fcp_poll_timer); 3323 break; 3324 case LPFC_PCI_DEV_OC: 3325 /* Stop any OneConnect device specific driver timers */ 3326 lpfc_sli4_stop_fcf_redisc_wait_timer(phba); 3327 break; 3328 default: 3329 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 3330 "0297 Invalid device group (x%x)\n", 3331 phba->pci_dev_grp); 3332 break; 3333 } 3334 return; 3335 } 3336 3337 /** 3338 * lpfc_block_mgmt_io - Mark a HBA's management interface as blocked 3339 * @phba: pointer to lpfc hba data structure. 3340 * @mbx_action: flag for mailbox no wait action. 3341 * 3342 * This routine marks a HBA's management interface as blocked. Once the HBA's 3343 * management interface is marked as blocked, all the user space access to 3344 * the HBA, whether they are from sysfs interface or libdfc interface will 3345 * all be blocked. The HBA is set to block the management interface when the 3346 * driver prepares the HBA interface for online or offline. 3347 **/ 3348 static void 3349 lpfc_block_mgmt_io(struct lpfc_hba *phba, int mbx_action) 3350 { 3351 unsigned long iflag; 3352 uint8_t actcmd = MBX_HEARTBEAT; 3353 unsigned long timeout; 3354 3355 spin_lock_irqsave(&phba->hbalock, iflag); 3356 phba->sli.sli_flag |= LPFC_BLOCK_MGMT_IO; 3357 spin_unlock_irqrestore(&phba->hbalock, iflag); 3358 if (mbx_action == LPFC_MBX_NO_WAIT) 3359 return; 3360 timeout = msecs_to_jiffies(LPFC_MBOX_TMO * 1000) + jiffies; 3361 spin_lock_irqsave(&phba->hbalock, iflag); 3362 if (phba->sli.mbox_active) { 3363 actcmd = phba->sli.mbox_active->u.mb.mbxCommand; 3364 /* Determine how long we might wait for the active mailbox 3365 * command to be gracefully completed by firmware. 3366 */ 3367 timeout = msecs_to_jiffies(lpfc_mbox_tmo_val(phba, 3368 phba->sli.mbox_active) * 1000) + jiffies; 3369 } 3370 spin_unlock_irqrestore(&phba->hbalock, iflag); 3371 3372 /* Wait for the outstnading mailbox command to complete */ 3373 while (phba->sli.mbox_active) { 3374 /* Check active mailbox complete status every 2ms */ 3375 msleep(2); 3376 if (time_after(jiffies, timeout)) { 3377 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 3378 "2813 Mgmt IO is Blocked %x " 3379 "- mbox cmd %x still active\n", 3380 phba->sli.sli_flag, actcmd); 3381 break; 3382 } 3383 } 3384 } 3385 3386 /** 3387 * lpfc_sli4_node_prep - Assign RPIs for active nodes. 3388 * @phba: pointer to lpfc hba data structure. 3389 * 3390 * Allocate RPIs for all active remote nodes. This is needed whenever 3391 * an SLI4 adapter is reset and the driver is not unloading. Its purpose 3392 * is to fixup the temporary rpi assignments. 3393 **/ 3394 void 3395 lpfc_sli4_node_prep(struct lpfc_hba *phba) 3396 { 3397 struct lpfc_nodelist *ndlp, *next_ndlp; 3398 struct lpfc_vport **vports; 3399 int i, rpi; 3400 3401 if (phba->sli_rev != LPFC_SLI_REV4) 3402 return; 3403 3404 vports = lpfc_create_vport_work_array(phba); 3405 if (vports == NULL) 3406 return; 3407 3408 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) { 3409 if (vports[i]->load_flag & FC_UNLOADING) 3410 continue; 3411 3412 list_for_each_entry_safe(ndlp, next_ndlp, 3413 &vports[i]->fc_nodes, 3414 nlp_listp) { 3415 rpi = lpfc_sli4_alloc_rpi(phba); 3416 if (rpi == LPFC_RPI_ALLOC_ERROR) { 3417 /* TODO print log? */ 3418 continue; 3419 } 3420 ndlp->nlp_rpi = rpi; 3421 lpfc_printf_vlog(ndlp->vport, KERN_INFO, 3422 LOG_NODE | LOG_DISCOVERY, 3423 "0009 Assign RPI x%x to ndlp x%px " 3424 "DID:x%06x flg:x%x\n", 3425 ndlp->nlp_rpi, ndlp, ndlp->nlp_DID, 3426 ndlp->nlp_flag); 3427 } 3428 } 3429 lpfc_destroy_vport_work_array(phba, vports); 3430 } 3431 3432 /** 3433 * lpfc_create_expedite_pool - create expedite pool 3434 * @phba: pointer to lpfc hba data structure. 3435 * 3436 * This routine moves a batch of XRIs from lpfc_io_buf_list_put of HWQ 0 3437 * to expedite pool. Mark them as expedite. 3438 **/ 3439 static void lpfc_create_expedite_pool(struct lpfc_hba *phba) 3440 { 3441 struct lpfc_sli4_hdw_queue *qp; 3442 struct lpfc_io_buf *lpfc_ncmd; 3443 struct lpfc_io_buf *lpfc_ncmd_next; 3444 struct lpfc_epd_pool *epd_pool; 3445 unsigned long iflag; 3446 3447 epd_pool = &phba->epd_pool; 3448 qp = &phba->sli4_hba.hdwq[0]; 3449 3450 spin_lock_init(&epd_pool->lock); 3451 spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag); 3452 spin_lock(&epd_pool->lock); 3453 INIT_LIST_HEAD(&epd_pool->list); 3454 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, 3455 &qp->lpfc_io_buf_list_put, list) { 3456 list_move_tail(&lpfc_ncmd->list, &epd_pool->list); 3457 lpfc_ncmd->expedite = true; 3458 qp->put_io_bufs--; 3459 epd_pool->count++; 3460 if (epd_pool->count >= XRI_BATCH) 3461 break; 3462 } 3463 spin_unlock(&epd_pool->lock); 3464 spin_unlock_irqrestore(&qp->io_buf_list_put_lock, iflag); 3465 } 3466 3467 /** 3468 * lpfc_destroy_expedite_pool - destroy expedite pool 3469 * @phba: pointer to lpfc hba data structure. 3470 * 3471 * This routine returns XRIs from expedite pool to lpfc_io_buf_list_put 3472 * of HWQ 0. Clear the mark. 3473 **/ 3474 static void lpfc_destroy_expedite_pool(struct lpfc_hba *phba) 3475 { 3476 struct lpfc_sli4_hdw_queue *qp; 3477 struct lpfc_io_buf *lpfc_ncmd; 3478 struct lpfc_io_buf *lpfc_ncmd_next; 3479 struct lpfc_epd_pool *epd_pool; 3480 unsigned long iflag; 3481 3482 epd_pool = &phba->epd_pool; 3483 qp = &phba->sli4_hba.hdwq[0]; 3484 3485 spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag); 3486 spin_lock(&epd_pool->lock); 3487 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, 3488 &epd_pool->list, list) { 3489 list_move_tail(&lpfc_ncmd->list, 3490 &qp->lpfc_io_buf_list_put); 3491 lpfc_ncmd->flags = false; 3492 qp->put_io_bufs++; 3493 epd_pool->count--; 3494 } 3495 spin_unlock(&epd_pool->lock); 3496 spin_unlock_irqrestore(&qp->io_buf_list_put_lock, iflag); 3497 } 3498 3499 /** 3500 * lpfc_create_multixri_pools - create multi-XRI pools 3501 * @phba: pointer to lpfc hba data structure. 3502 * 3503 * This routine initialize public, private per HWQ. Then, move XRIs from 3504 * lpfc_io_buf_list_put to public pool. High and low watermark are also 3505 * Initialized. 3506 **/ 3507 void lpfc_create_multixri_pools(struct lpfc_hba *phba) 3508 { 3509 u32 i, j; 3510 u32 hwq_count; 3511 u32 count_per_hwq; 3512 struct lpfc_io_buf *lpfc_ncmd; 3513 struct lpfc_io_buf *lpfc_ncmd_next; 3514 unsigned long iflag; 3515 struct lpfc_sli4_hdw_queue *qp; 3516 struct lpfc_multixri_pool *multixri_pool; 3517 struct lpfc_pbl_pool *pbl_pool; 3518 struct lpfc_pvt_pool *pvt_pool; 3519 3520 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 3521 "1234 num_hdw_queue=%d num_present_cpu=%d common_xri_cnt=%d\n", 3522 phba->cfg_hdw_queue, phba->sli4_hba.num_present_cpu, 3523 phba->sli4_hba.io_xri_cnt); 3524 3525 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) 3526 lpfc_create_expedite_pool(phba); 3527 3528 hwq_count = phba->cfg_hdw_queue; 3529 count_per_hwq = phba->sli4_hba.io_xri_cnt / hwq_count; 3530 3531 for (i = 0; i < hwq_count; i++) { 3532 multixri_pool = kzalloc(sizeof(*multixri_pool), GFP_KERNEL); 3533 3534 if (!multixri_pool) { 3535 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 3536 "1238 Failed to allocate memory for " 3537 "multixri_pool\n"); 3538 3539 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) 3540 lpfc_destroy_expedite_pool(phba); 3541 3542 j = 0; 3543 while (j < i) { 3544 qp = &phba->sli4_hba.hdwq[j]; 3545 kfree(qp->p_multixri_pool); 3546 j++; 3547 } 3548 phba->cfg_xri_rebalancing = 0; 3549 return; 3550 } 3551 3552 qp = &phba->sli4_hba.hdwq[i]; 3553 qp->p_multixri_pool = multixri_pool; 3554 3555 multixri_pool->xri_limit = count_per_hwq; 3556 multixri_pool->rrb_next_hwqid = i; 3557 3558 /* Deal with public free xri pool */ 3559 pbl_pool = &multixri_pool->pbl_pool; 3560 spin_lock_init(&pbl_pool->lock); 3561 spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag); 3562 spin_lock(&pbl_pool->lock); 3563 INIT_LIST_HEAD(&pbl_pool->list); 3564 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, 3565 &qp->lpfc_io_buf_list_put, list) { 3566 list_move_tail(&lpfc_ncmd->list, &pbl_pool->list); 3567 qp->put_io_bufs--; 3568 pbl_pool->count++; 3569 } 3570 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 3571 "1235 Moved %d buffers from PUT list over to pbl_pool[%d]\n", 3572 pbl_pool->count, i); 3573 spin_unlock(&pbl_pool->lock); 3574 spin_unlock_irqrestore(&qp->io_buf_list_put_lock, iflag); 3575 3576 /* Deal with private free xri pool */ 3577 pvt_pool = &multixri_pool->pvt_pool; 3578 pvt_pool->high_watermark = multixri_pool->xri_limit / 2; 3579 pvt_pool->low_watermark = XRI_BATCH; 3580 spin_lock_init(&pvt_pool->lock); 3581 spin_lock_irqsave(&pvt_pool->lock, iflag); 3582 INIT_LIST_HEAD(&pvt_pool->list); 3583 pvt_pool->count = 0; 3584 spin_unlock_irqrestore(&pvt_pool->lock, iflag); 3585 } 3586 } 3587 3588 /** 3589 * lpfc_destroy_multixri_pools - destroy multi-XRI pools 3590 * @phba: pointer to lpfc hba data structure. 3591 * 3592 * This routine returns XRIs from public/private to lpfc_io_buf_list_put. 3593 **/ 3594 static void lpfc_destroy_multixri_pools(struct lpfc_hba *phba) 3595 { 3596 u32 i; 3597 u32 hwq_count; 3598 struct lpfc_io_buf *lpfc_ncmd; 3599 struct lpfc_io_buf *lpfc_ncmd_next; 3600 unsigned long iflag; 3601 struct lpfc_sli4_hdw_queue *qp; 3602 struct lpfc_multixri_pool *multixri_pool; 3603 struct lpfc_pbl_pool *pbl_pool; 3604 struct lpfc_pvt_pool *pvt_pool; 3605 3606 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) 3607 lpfc_destroy_expedite_pool(phba); 3608 3609 if (!(phba->pport->load_flag & FC_UNLOADING)) 3610 lpfc_sli_flush_io_rings(phba); 3611 3612 hwq_count = phba->cfg_hdw_queue; 3613 3614 for (i = 0; i < hwq_count; i++) { 3615 qp = &phba->sli4_hba.hdwq[i]; 3616 multixri_pool = qp->p_multixri_pool; 3617 if (!multixri_pool) 3618 continue; 3619 3620 qp->p_multixri_pool = NULL; 3621 3622 spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag); 3623 3624 /* Deal with public free xri pool */ 3625 pbl_pool = &multixri_pool->pbl_pool; 3626 spin_lock(&pbl_pool->lock); 3627 3628 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 3629 "1236 Moving %d buffers from pbl_pool[%d] TO PUT list\n", 3630 pbl_pool->count, i); 3631 3632 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, 3633 &pbl_pool->list, list) { 3634 list_move_tail(&lpfc_ncmd->list, 3635 &qp->lpfc_io_buf_list_put); 3636 qp->put_io_bufs++; 3637 pbl_pool->count--; 3638 } 3639 3640 INIT_LIST_HEAD(&pbl_pool->list); 3641 pbl_pool->count = 0; 3642 3643 spin_unlock(&pbl_pool->lock); 3644 3645 /* Deal with private free xri pool */ 3646 pvt_pool = &multixri_pool->pvt_pool; 3647 spin_lock(&pvt_pool->lock); 3648 3649 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 3650 "1237 Moving %d buffers from pvt_pool[%d] TO PUT list\n", 3651 pvt_pool->count, i); 3652 3653 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, 3654 &pvt_pool->list, list) { 3655 list_move_tail(&lpfc_ncmd->list, 3656 &qp->lpfc_io_buf_list_put); 3657 qp->put_io_bufs++; 3658 pvt_pool->count--; 3659 } 3660 3661 INIT_LIST_HEAD(&pvt_pool->list); 3662 pvt_pool->count = 0; 3663 3664 spin_unlock(&pvt_pool->lock); 3665 spin_unlock_irqrestore(&qp->io_buf_list_put_lock, iflag); 3666 3667 kfree(multixri_pool); 3668 } 3669 } 3670 3671 /** 3672 * lpfc_online - Initialize and bring a HBA online 3673 * @phba: pointer to lpfc hba data structure. 3674 * 3675 * This routine initializes the HBA and brings a HBA online. During this 3676 * process, the management interface is blocked to prevent user space access 3677 * to the HBA interfering with the driver initialization. 3678 * 3679 * Return codes 3680 * 0 - successful 3681 * 1 - failed 3682 **/ 3683 int 3684 lpfc_online(struct lpfc_hba *phba) 3685 { 3686 struct lpfc_vport *vport; 3687 struct lpfc_vport **vports; 3688 int i, error = 0; 3689 bool vpis_cleared = false; 3690 3691 if (!phba) 3692 return 0; 3693 vport = phba->pport; 3694 3695 if (!(vport->fc_flag & FC_OFFLINE_MODE)) 3696 return 0; 3697 3698 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 3699 "0458 Bring Adapter online\n"); 3700 3701 lpfc_block_mgmt_io(phba, LPFC_MBX_WAIT); 3702 3703 if (phba->sli_rev == LPFC_SLI_REV4) { 3704 if (lpfc_sli4_hba_setup(phba)) { /* Initialize SLI4 HBA */ 3705 lpfc_unblock_mgmt_io(phba); 3706 return 1; 3707 } 3708 spin_lock_irq(&phba->hbalock); 3709 if (!phba->sli4_hba.max_cfg_param.vpi_used) 3710 vpis_cleared = true; 3711 spin_unlock_irq(&phba->hbalock); 3712 3713 /* Reestablish the local initiator port. 3714 * The offline process destroyed the previous lport. 3715 */ 3716 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME && 3717 !phba->nvmet_support) { 3718 error = lpfc_nvme_create_localport(phba->pport); 3719 if (error) 3720 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 3721 "6132 NVME restore reg failed " 3722 "on nvmei error x%x\n", error); 3723 } 3724 } else { 3725 lpfc_sli_queue_init(phba); 3726 if (lpfc_sli_hba_setup(phba)) { /* Initialize SLI2/SLI3 HBA */ 3727 lpfc_unblock_mgmt_io(phba); 3728 return 1; 3729 } 3730 } 3731 3732 vports = lpfc_create_vport_work_array(phba); 3733 if (vports != NULL) { 3734 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) { 3735 struct Scsi_Host *shost; 3736 shost = lpfc_shost_from_vport(vports[i]); 3737 spin_lock_irq(shost->host_lock); 3738 vports[i]->fc_flag &= ~FC_OFFLINE_MODE; 3739 if (phba->sli3_options & LPFC_SLI3_NPIV_ENABLED) 3740 vports[i]->fc_flag |= FC_VPORT_NEEDS_REG_VPI; 3741 if (phba->sli_rev == LPFC_SLI_REV4) { 3742 vports[i]->fc_flag |= FC_VPORT_NEEDS_INIT_VPI; 3743 if ((vpis_cleared) && 3744 (vports[i]->port_type != 3745 LPFC_PHYSICAL_PORT)) 3746 vports[i]->vpi = 0; 3747 } 3748 spin_unlock_irq(shost->host_lock); 3749 } 3750 } 3751 lpfc_destroy_vport_work_array(phba, vports); 3752 3753 if (phba->cfg_xri_rebalancing) 3754 lpfc_create_multixri_pools(phba); 3755 3756 lpfc_cpuhp_add(phba); 3757 3758 lpfc_unblock_mgmt_io(phba); 3759 return 0; 3760 } 3761 3762 /** 3763 * lpfc_unblock_mgmt_io - Mark a HBA's management interface to be not blocked 3764 * @phba: pointer to lpfc hba data structure. 3765 * 3766 * This routine marks a HBA's management interface as not blocked. Once the 3767 * HBA's management interface is marked as not blocked, all the user space 3768 * access to the HBA, whether they are from sysfs interface or libdfc 3769 * interface will be allowed. The HBA is set to block the management interface 3770 * when the driver prepares the HBA interface for online or offline and then 3771 * set to unblock the management interface afterwards. 3772 **/ 3773 void 3774 lpfc_unblock_mgmt_io(struct lpfc_hba * phba) 3775 { 3776 unsigned long iflag; 3777 3778 spin_lock_irqsave(&phba->hbalock, iflag); 3779 phba->sli.sli_flag &= ~LPFC_BLOCK_MGMT_IO; 3780 spin_unlock_irqrestore(&phba->hbalock, iflag); 3781 } 3782 3783 /** 3784 * lpfc_offline_prep - Prepare a HBA to be brought offline 3785 * @phba: pointer to lpfc hba data structure. 3786 * @mbx_action: flag for mailbox shutdown action. 3787 * 3788 * This routine is invoked to prepare a HBA to be brought offline. It performs 3789 * unregistration login to all the nodes on all vports and flushes the mailbox 3790 * queue to make it ready to be brought offline. 3791 **/ 3792 void 3793 lpfc_offline_prep(struct lpfc_hba *phba, int mbx_action) 3794 { 3795 struct lpfc_vport *vport = phba->pport; 3796 struct lpfc_nodelist *ndlp, *next_ndlp; 3797 struct lpfc_vport **vports; 3798 struct Scsi_Host *shost; 3799 int i; 3800 int offline; 3801 bool hba_pci_err; 3802 3803 if (vport->fc_flag & FC_OFFLINE_MODE) 3804 return; 3805 3806 lpfc_block_mgmt_io(phba, mbx_action); 3807 3808 lpfc_linkdown(phba); 3809 3810 offline = pci_channel_offline(phba->pcidev); 3811 hba_pci_err = test_bit(HBA_PCI_ERR, &phba->bit_flags); 3812 3813 /* Issue an unreg_login to all nodes on all vports */ 3814 vports = lpfc_create_vport_work_array(phba); 3815 if (vports != NULL) { 3816 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) { 3817 if (vports[i]->load_flag & FC_UNLOADING) 3818 continue; 3819 shost = lpfc_shost_from_vport(vports[i]); 3820 spin_lock_irq(shost->host_lock); 3821 vports[i]->vpi_state &= ~LPFC_VPI_REGISTERED; 3822 vports[i]->fc_flag |= FC_VPORT_NEEDS_REG_VPI; 3823 vports[i]->fc_flag &= ~FC_VFI_REGISTERED; 3824 spin_unlock_irq(shost->host_lock); 3825 3826 shost = lpfc_shost_from_vport(vports[i]); 3827 list_for_each_entry_safe(ndlp, next_ndlp, 3828 &vports[i]->fc_nodes, 3829 nlp_listp) { 3830 3831 spin_lock_irq(&ndlp->lock); 3832 ndlp->nlp_flag &= ~NLP_NPR_ADISC; 3833 spin_unlock_irq(&ndlp->lock); 3834 3835 if (offline || hba_pci_err) { 3836 spin_lock_irq(&ndlp->lock); 3837 ndlp->nlp_flag &= ~(NLP_UNREG_INP | 3838 NLP_RPI_REGISTERED); 3839 spin_unlock_irq(&ndlp->lock); 3840 if (phba->sli_rev == LPFC_SLI_REV4) 3841 lpfc_sli_rpi_release(vports[i], 3842 ndlp); 3843 } else { 3844 lpfc_unreg_rpi(vports[i], ndlp); 3845 } 3846 /* 3847 * Whenever an SLI4 port goes offline, free the 3848 * RPI. Get a new RPI when the adapter port 3849 * comes back online. 3850 */ 3851 if (phba->sli_rev == LPFC_SLI_REV4) { 3852 lpfc_printf_vlog(vports[i], KERN_INFO, 3853 LOG_NODE | LOG_DISCOVERY, 3854 "0011 Free RPI x%x on " 3855 "ndlp: x%px did x%x\n", 3856 ndlp->nlp_rpi, ndlp, 3857 ndlp->nlp_DID); 3858 lpfc_sli4_free_rpi(phba, ndlp->nlp_rpi); 3859 ndlp->nlp_rpi = LPFC_RPI_ALLOC_ERROR; 3860 } 3861 3862 if (ndlp->nlp_type & NLP_FABRIC) { 3863 lpfc_disc_state_machine(vports[i], ndlp, 3864 NULL, NLP_EVT_DEVICE_RECOVERY); 3865 3866 /* Don't remove the node unless the node 3867 * has been unregistered with the 3868 * transport, and we're not in recovery 3869 * before dev_loss_tmo triggered. 3870 * Otherwise, let dev_loss take care of 3871 * the node. 3872 */ 3873 if (!(ndlp->save_flags & 3874 NLP_IN_RECOV_POST_DEV_LOSS) && 3875 !(ndlp->fc4_xpt_flags & 3876 (NVME_XPT_REGD | SCSI_XPT_REGD))) 3877 lpfc_disc_state_machine 3878 (vports[i], ndlp, 3879 NULL, 3880 NLP_EVT_DEVICE_RM); 3881 } 3882 } 3883 } 3884 } 3885 lpfc_destroy_vport_work_array(phba, vports); 3886 3887 lpfc_sli_mbox_sys_shutdown(phba, mbx_action); 3888 3889 if (phba->wq) 3890 flush_workqueue(phba->wq); 3891 } 3892 3893 /** 3894 * lpfc_offline - Bring a HBA offline 3895 * @phba: pointer to lpfc hba data structure. 3896 * 3897 * This routine actually brings a HBA offline. It stops all the timers 3898 * associated with the HBA, brings down the SLI layer, and eventually 3899 * marks the HBA as in offline state for the upper layer protocol. 3900 **/ 3901 void 3902 lpfc_offline(struct lpfc_hba *phba) 3903 { 3904 struct Scsi_Host *shost; 3905 struct lpfc_vport **vports; 3906 int i; 3907 3908 if (phba->pport->fc_flag & FC_OFFLINE_MODE) 3909 return; 3910 3911 /* stop port and all timers associated with this hba */ 3912 lpfc_stop_port(phba); 3913 3914 /* Tear down the local and target port registrations. The 3915 * nvme transports need to cleanup. 3916 */ 3917 lpfc_nvmet_destroy_targetport(phba); 3918 lpfc_nvme_destroy_localport(phba->pport); 3919 3920 vports = lpfc_create_vport_work_array(phba); 3921 if (vports != NULL) 3922 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) 3923 lpfc_stop_vport_timers(vports[i]); 3924 lpfc_destroy_vport_work_array(phba, vports); 3925 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 3926 "0460 Bring Adapter offline\n"); 3927 /* Bring down the SLI Layer and cleanup. The HBA is offline 3928 now. */ 3929 lpfc_sli_hba_down(phba); 3930 spin_lock_irq(&phba->hbalock); 3931 phba->work_ha = 0; 3932 spin_unlock_irq(&phba->hbalock); 3933 vports = lpfc_create_vport_work_array(phba); 3934 if (vports != NULL) 3935 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) { 3936 shost = lpfc_shost_from_vport(vports[i]); 3937 spin_lock_irq(shost->host_lock); 3938 vports[i]->work_port_events = 0; 3939 vports[i]->fc_flag |= FC_OFFLINE_MODE; 3940 spin_unlock_irq(shost->host_lock); 3941 } 3942 lpfc_destroy_vport_work_array(phba, vports); 3943 /* If OFFLINE flag is clear (i.e. unloading), cpuhp removal is handled 3944 * in hba_unset 3945 */ 3946 if (phba->pport->fc_flag & FC_OFFLINE_MODE) 3947 __lpfc_cpuhp_remove(phba); 3948 3949 if (phba->cfg_xri_rebalancing) 3950 lpfc_destroy_multixri_pools(phba); 3951 } 3952 3953 /** 3954 * lpfc_scsi_free - Free all the SCSI buffers and IOCBs from driver lists 3955 * @phba: pointer to lpfc hba data structure. 3956 * 3957 * This routine is to free all the SCSI buffers and IOCBs from the driver 3958 * list back to kernel. It is called from lpfc_pci_remove_one to free 3959 * the internal resources before the device is removed from the system. 3960 **/ 3961 static void 3962 lpfc_scsi_free(struct lpfc_hba *phba) 3963 { 3964 struct lpfc_io_buf *sb, *sb_next; 3965 3966 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP)) 3967 return; 3968 3969 spin_lock_irq(&phba->hbalock); 3970 3971 /* Release all the lpfc_scsi_bufs maintained by this host. */ 3972 3973 spin_lock(&phba->scsi_buf_list_put_lock); 3974 list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list_put, 3975 list) { 3976 list_del(&sb->list); 3977 dma_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data, 3978 sb->dma_handle); 3979 kfree(sb); 3980 phba->total_scsi_bufs--; 3981 } 3982 spin_unlock(&phba->scsi_buf_list_put_lock); 3983 3984 spin_lock(&phba->scsi_buf_list_get_lock); 3985 list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list_get, 3986 list) { 3987 list_del(&sb->list); 3988 dma_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data, 3989 sb->dma_handle); 3990 kfree(sb); 3991 phba->total_scsi_bufs--; 3992 } 3993 spin_unlock(&phba->scsi_buf_list_get_lock); 3994 spin_unlock_irq(&phba->hbalock); 3995 } 3996 3997 /** 3998 * lpfc_io_free - Free all the IO buffers and IOCBs from driver lists 3999 * @phba: pointer to lpfc hba data structure. 4000 * 4001 * This routine is to free all the IO buffers and IOCBs from the driver 4002 * list back to kernel. It is called from lpfc_pci_remove_one to free 4003 * the internal resources before the device is removed from the system. 4004 **/ 4005 void 4006 lpfc_io_free(struct lpfc_hba *phba) 4007 { 4008 struct lpfc_io_buf *lpfc_ncmd, *lpfc_ncmd_next; 4009 struct lpfc_sli4_hdw_queue *qp; 4010 int idx; 4011 4012 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { 4013 qp = &phba->sli4_hba.hdwq[idx]; 4014 /* Release all the lpfc_nvme_bufs maintained by this host. */ 4015 spin_lock(&qp->io_buf_list_put_lock); 4016 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, 4017 &qp->lpfc_io_buf_list_put, 4018 list) { 4019 list_del(&lpfc_ncmd->list); 4020 qp->put_io_bufs--; 4021 dma_pool_free(phba->lpfc_sg_dma_buf_pool, 4022 lpfc_ncmd->data, lpfc_ncmd->dma_handle); 4023 if (phba->cfg_xpsgl && !phba->nvmet_support) 4024 lpfc_put_sgl_per_hdwq(phba, lpfc_ncmd); 4025 lpfc_put_cmd_rsp_buf_per_hdwq(phba, lpfc_ncmd); 4026 kfree(lpfc_ncmd); 4027 qp->total_io_bufs--; 4028 } 4029 spin_unlock(&qp->io_buf_list_put_lock); 4030 4031 spin_lock(&qp->io_buf_list_get_lock); 4032 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, 4033 &qp->lpfc_io_buf_list_get, 4034 list) { 4035 list_del(&lpfc_ncmd->list); 4036 qp->get_io_bufs--; 4037 dma_pool_free(phba->lpfc_sg_dma_buf_pool, 4038 lpfc_ncmd->data, lpfc_ncmd->dma_handle); 4039 if (phba->cfg_xpsgl && !phba->nvmet_support) 4040 lpfc_put_sgl_per_hdwq(phba, lpfc_ncmd); 4041 lpfc_put_cmd_rsp_buf_per_hdwq(phba, lpfc_ncmd); 4042 kfree(lpfc_ncmd); 4043 qp->total_io_bufs--; 4044 } 4045 spin_unlock(&qp->io_buf_list_get_lock); 4046 } 4047 } 4048 4049 /** 4050 * lpfc_sli4_els_sgl_update - update ELS xri-sgl sizing and mapping 4051 * @phba: pointer to lpfc hba data structure. 4052 * 4053 * This routine first calculates the sizes of the current els and allocated 4054 * scsi sgl lists, and then goes through all sgls to updates the physical 4055 * XRIs assigned due to port function reset. During port initialization, the 4056 * current els and allocated scsi sgl lists are 0s. 4057 * 4058 * Return codes 4059 * 0 - successful (for now, it always returns 0) 4060 **/ 4061 int 4062 lpfc_sli4_els_sgl_update(struct lpfc_hba *phba) 4063 { 4064 struct lpfc_sglq *sglq_entry = NULL, *sglq_entry_next = NULL; 4065 uint16_t i, lxri, xri_cnt, els_xri_cnt; 4066 LIST_HEAD(els_sgl_list); 4067 int rc; 4068 4069 /* 4070 * update on pci function's els xri-sgl list 4071 */ 4072 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba); 4073 4074 if (els_xri_cnt > phba->sli4_hba.els_xri_cnt) { 4075 /* els xri-sgl expanded */ 4076 xri_cnt = els_xri_cnt - phba->sli4_hba.els_xri_cnt; 4077 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 4078 "3157 ELS xri-sgl count increased from " 4079 "%d to %d\n", phba->sli4_hba.els_xri_cnt, 4080 els_xri_cnt); 4081 /* allocate the additional els sgls */ 4082 for (i = 0; i < xri_cnt; i++) { 4083 sglq_entry = kzalloc(sizeof(struct lpfc_sglq), 4084 GFP_KERNEL); 4085 if (sglq_entry == NULL) { 4086 lpfc_printf_log(phba, KERN_ERR, 4087 LOG_TRACE_EVENT, 4088 "2562 Failure to allocate an " 4089 "ELS sgl entry:%d\n", i); 4090 rc = -ENOMEM; 4091 goto out_free_mem; 4092 } 4093 sglq_entry->buff_type = GEN_BUFF_TYPE; 4094 sglq_entry->virt = lpfc_mbuf_alloc(phba, 0, 4095 &sglq_entry->phys); 4096 if (sglq_entry->virt == NULL) { 4097 kfree(sglq_entry); 4098 lpfc_printf_log(phba, KERN_ERR, 4099 LOG_TRACE_EVENT, 4100 "2563 Failure to allocate an " 4101 "ELS mbuf:%d\n", i); 4102 rc = -ENOMEM; 4103 goto out_free_mem; 4104 } 4105 sglq_entry->sgl = sglq_entry->virt; 4106 memset(sglq_entry->sgl, 0, LPFC_BPL_SIZE); 4107 sglq_entry->state = SGL_FREED; 4108 list_add_tail(&sglq_entry->list, &els_sgl_list); 4109 } 4110 spin_lock_irq(&phba->sli4_hba.sgl_list_lock); 4111 list_splice_init(&els_sgl_list, 4112 &phba->sli4_hba.lpfc_els_sgl_list); 4113 spin_unlock_irq(&phba->sli4_hba.sgl_list_lock); 4114 } else if (els_xri_cnt < phba->sli4_hba.els_xri_cnt) { 4115 /* els xri-sgl shrinked */ 4116 xri_cnt = phba->sli4_hba.els_xri_cnt - els_xri_cnt; 4117 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 4118 "3158 ELS xri-sgl count decreased from " 4119 "%d to %d\n", phba->sli4_hba.els_xri_cnt, 4120 els_xri_cnt); 4121 spin_lock_irq(&phba->sli4_hba.sgl_list_lock); 4122 list_splice_init(&phba->sli4_hba.lpfc_els_sgl_list, 4123 &els_sgl_list); 4124 /* release extra els sgls from list */ 4125 for (i = 0; i < xri_cnt; i++) { 4126 list_remove_head(&els_sgl_list, 4127 sglq_entry, struct lpfc_sglq, list); 4128 if (sglq_entry) { 4129 __lpfc_mbuf_free(phba, sglq_entry->virt, 4130 sglq_entry->phys); 4131 kfree(sglq_entry); 4132 } 4133 } 4134 list_splice_init(&els_sgl_list, 4135 &phba->sli4_hba.lpfc_els_sgl_list); 4136 spin_unlock_irq(&phba->sli4_hba.sgl_list_lock); 4137 } else 4138 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 4139 "3163 ELS xri-sgl count unchanged: %d\n", 4140 els_xri_cnt); 4141 phba->sli4_hba.els_xri_cnt = els_xri_cnt; 4142 4143 /* update xris to els sgls on the list */ 4144 sglq_entry = NULL; 4145 sglq_entry_next = NULL; 4146 list_for_each_entry_safe(sglq_entry, sglq_entry_next, 4147 &phba->sli4_hba.lpfc_els_sgl_list, list) { 4148 lxri = lpfc_sli4_next_xritag(phba); 4149 if (lxri == NO_XRI) { 4150 lpfc_printf_log(phba, KERN_ERR, 4151 LOG_TRACE_EVENT, 4152 "2400 Failed to allocate xri for " 4153 "ELS sgl\n"); 4154 rc = -ENOMEM; 4155 goto out_free_mem; 4156 } 4157 sglq_entry->sli4_lxritag = lxri; 4158 sglq_entry->sli4_xritag = phba->sli4_hba.xri_ids[lxri]; 4159 } 4160 return 0; 4161 4162 out_free_mem: 4163 lpfc_free_els_sgl_list(phba); 4164 return rc; 4165 } 4166 4167 /** 4168 * lpfc_sli4_nvmet_sgl_update - update xri-sgl sizing and mapping 4169 * @phba: pointer to lpfc hba data structure. 4170 * 4171 * This routine first calculates the sizes of the current els and allocated 4172 * scsi sgl lists, and then goes through all sgls to updates the physical 4173 * XRIs assigned due to port function reset. During port initialization, the 4174 * current els and allocated scsi sgl lists are 0s. 4175 * 4176 * Return codes 4177 * 0 - successful (for now, it always returns 0) 4178 **/ 4179 int 4180 lpfc_sli4_nvmet_sgl_update(struct lpfc_hba *phba) 4181 { 4182 struct lpfc_sglq *sglq_entry = NULL, *sglq_entry_next = NULL; 4183 uint16_t i, lxri, xri_cnt, els_xri_cnt; 4184 uint16_t nvmet_xri_cnt; 4185 LIST_HEAD(nvmet_sgl_list); 4186 int rc; 4187 4188 /* 4189 * update on pci function's nvmet xri-sgl list 4190 */ 4191 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba); 4192 4193 /* For NVMET, ALL remaining XRIs are dedicated for IO processing */ 4194 nvmet_xri_cnt = phba->sli4_hba.max_cfg_param.max_xri - els_xri_cnt; 4195 if (nvmet_xri_cnt > phba->sli4_hba.nvmet_xri_cnt) { 4196 /* els xri-sgl expanded */ 4197 xri_cnt = nvmet_xri_cnt - phba->sli4_hba.nvmet_xri_cnt; 4198 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 4199 "6302 NVMET xri-sgl cnt grew from %d to %d\n", 4200 phba->sli4_hba.nvmet_xri_cnt, nvmet_xri_cnt); 4201 /* allocate the additional nvmet sgls */ 4202 for (i = 0; i < xri_cnt; i++) { 4203 sglq_entry = kzalloc(sizeof(struct lpfc_sglq), 4204 GFP_KERNEL); 4205 if (sglq_entry == NULL) { 4206 lpfc_printf_log(phba, KERN_ERR, 4207 LOG_TRACE_EVENT, 4208 "6303 Failure to allocate an " 4209 "NVMET sgl entry:%d\n", i); 4210 rc = -ENOMEM; 4211 goto out_free_mem; 4212 } 4213 sglq_entry->buff_type = NVMET_BUFF_TYPE; 4214 sglq_entry->virt = lpfc_nvmet_buf_alloc(phba, 0, 4215 &sglq_entry->phys); 4216 if (sglq_entry->virt == NULL) { 4217 kfree(sglq_entry); 4218 lpfc_printf_log(phba, KERN_ERR, 4219 LOG_TRACE_EVENT, 4220 "6304 Failure to allocate an " 4221 "NVMET buf:%d\n", i); 4222 rc = -ENOMEM; 4223 goto out_free_mem; 4224 } 4225 sglq_entry->sgl = sglq_entry->virt; 4226 memset(sglq_entry->sgl, 0, 4227 phba->cfg_sg_dma_buf_size); 4228 sglq_entry->state = SGL_FREED; 4229 list_add_tail(&sglq_entry->list, &nvmet_sgl_list); 4230 } 4231 spin_lock_irq(&phba->hbalock); 4232 spin_lock(&phba->sli4_hba.sgl_list_lock); 4233 list_splice_init(&nvmet_sgl_list, 4234 &phba->sli4_hba.lpfc_nvmet_sgl_list); 4235 spin_unlock(&phba->sli4_hba.sgl_list_lock); 4236 spin_unlock_irq(&phba->hbalock); 4237 } else if (nvmet_xri_cnt < phba->sli4_hba.nvmet_xri_cnt) { 4238 /* nvmet xri-sgl shrunk */ 4239 xri_cnt = phba->sli4_hba.nvmet_xri_cnt - nvmet_xri_cnt; 4240 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 4241 "6305 NVMET xri-sgl count decreased from " 4242 "%d to %d\n", phba->sli4_hba.nvmet_xri_cnt, 4243 nvmet_xri_cnt); 4244 spin_lock_irq(&phba->hbalock); 4245 spin_lock(&phba->sli4_hba.sgl_list_lock); 4246 list_splice_init(&phba->sli4_hba.lpfc_nvmet_sgl_list, 4247 &nvmet_sgl_list); 4248 /* release extra nvmet sgls from list */ 4249 for (i = 0; i < xri_cnt; i++) { 4250 list_remove_head(&nvmet_sgl_list, 4251 sglq_entry, struct lpfc_sglq, list); 4252 if (sglq_entry) { 4253 lpfc_nvmet_buf_free(phba, sglq_entry->virt, 4254 sglq_entry->phys); 4255 kfree(sglq_entry); 4256 } 4257 } 4258 list_splice_init(&nvmet_sgl_list, 4259 &phba->sli4_hba.lpfc_nvmet_sgl_list); 4260 spin_unlock(&phba->sli4_hba.sgl_list_lock); 4261 spin_unlock_irq(&phba->hbalock); 4262 } else 4263 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 4264 "6306 NVMET xri-sgl count unchanged: %d\n", 4265 nvmet_xri_cnt); 4266 phba->sli4_hba.nvmet_xri_cnt = nvmet_xri_cnt; 4267 4268 /* update xris to nvmet sgls on the list */ 4269 sglq_entry = NULL; 4270 sglq_entry_next = NULL; 4271 list_for_each_entry_safe(sglq_entry, sglq_entry_next, 4272 &phba->sli4_hba.lpfc_nvmet_sgl_list, list) { 4273 lxri = lpfc_sli4_next_xritag(phba); 4274 if (lxri == NO_XRI) { 4275 lpfc_printf_log(phba, KERN_ERR, 4276 LOG_TRACE_EVENT, 4277 "6307 Failed to allocate xri for " 4278 "NVMET sgl\n"); 4279 rc = -ENOMEM; 4280 goto out_free_mem; 4281 } 4282 sglq_entry->sli4_lxritag = lxri; 4283 sglq_entry->sli4_xritag = phba->sli4_hba.xri_ids[lxri]; 4284 } 4285 return 0; 4286 4287 out_free_mem: 4288 lpfc_free_nvmet_sgl_list(phba); 4289 return rc; 4290 } 4291 4292 int 4293 lpfc_io_buf_flush(struct lpfc_hba *phba, struct list_head *cbuf) 4294 { 4295 LIST_HEAD(blist); 4296 struct lpfc_sli4_hdw_queue *qp; 4297 struct lpfc_io_buf *lpfc_cmd; 4298 struct lpfc_io_buf *iobufp, *prev_iobufp; 4299 int idx, cnt, xri, inserted; 4300 4301 cnt = 0; 4302 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { 4303 qp = &phba->sli4_hba.hdwq[idx]; 4304 spin_lock_irq(&qp->io_buf_list_get_lock); 4305 spin_lock(&qp->io_buf_list_put_lock); 4306 4307 /* Take everything off the get and put lists */ 4308 list_splice_init(&qp->lpfc_io_buf_list_get, &blist); 4309 list_splice(&qp->lpfc_io_buf_list_put, &blist); 4310 INIT_LIST_HEAD(&qp->lpfc_io_buf_list_get); 4311 INIT_LIST_HEAD(&qp->lpfc_io_buf_list_put); 4312 cnt += qp->get_io_bufs + qp->put_io_bufs; 4313 qp->get_io_bufs = 0; 4314 qp->put_io_bufs = 0; 4315 qp->total_io_bufs = 0; 4316 spin_unlock(&qp->io_buf_list_put_lock); 4317 spin_unlock_irq(&qp->io_buf_list_get_lock); 4318 } 4319 4320 /* 4321 * Take IO buffers off blist and put on cbuf sorted by XRI. 4322 * This is because POST_SGL takes a sequential range of XRIs 4323 * to post to the firmware. 4324 */ 4325 for (idx = 0; idx < cnt; idx++) { 4326 list_remove_head(&blist, lpfc_cmd, struct lpfc_io_buf, list); 4327 if (!lpfc_cmd) 4328 return cnt; 4329 if (idx == 0) { 4330 list_add_tail(&lpfc_cmd->list, cbuf); 4331 continue; 4332 } 4333 xri = lpfc_cmd->cur_iocbq.sli4_xritag; 4334 inserted = 0; 4335 prev_iobufp = NULL; 4336 list_for_each_entry(iobufp, cbuf, list) { 4337 if (xri < iobufp->cur_iocbq.sli4_xritag) { 4338 if (prev_iobufp) 4339 list_add(&lpfc_cmd->list, 4340 &prev_iobufp->list); 4341 else 4342 list_add(&lpfc_cmd->list, cbuf); 4343 inserted = 1; 4344 break; 4345 } 4346 prev_iobufp = iobufp; 4347 } 4348 if (!inserted) 4349 list_add_tail(&lpfc_cmd->list, cbuf); 4350 } 4351 return cnt; 4352 } 4353 4354 int 4355 lpfc_io_buf_replenish(struct lpfc_hba *phba, struct list_head *cbuf) 4356 { 4357 struct lpfc_sli4_hdw_queue *qp; 4358 struct lpfc_io_buf *lpfc_cmd; 4359 int idx, cnt; 4360 4361 qp = phba->sli4_hba.hdwq; 4362 cnt = 0; 4363 while (!list_empty(cbuf)) { 4364 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { 4365 list_remove_head(cbuf, lpfc_cmd, 4366 struct lpfc_io_buf, list); 4367 if (!lpfc_cmd) 4368 return cnt; 4369 cnt++; 4370 qp = &phba->sli4_hba.hdwq[idx]; 4371 lpfc_cmd->hdwq_no = idx; 4372 lpfc_cmd->hdwq = qp; 4373 lpfc_cmd->cur_iocbq.cmd_cmpl = NULL; 4374 spin_lock(&qp->io_buf_list_put_lock); 4375 list_add_tail(&lpfc_cmd->list, 4376 &qp->lpfc_io_buf_list_put); 4377 qp->put_io_bufs++; 4378 qp->total_io_bufs++; 4379 spin_unlock(&qp->io_buf_list_put_lock); 4380 } 4381 } 4382 return cnt; 4383 } 4384 4385 /** 4386 * lpfc_sli4_io_sgl_update - update xri-sgl sizing and mapping 4387 * @phba: pointer to lpfc hba data structure. 4388 * 4389 * This routine first calculates the sizes of the current els and allocated 4390 * scsi sgl lists, and then goes through all sgls to updates the physical 4391 * XRIs assigned due to port function reset. During port initialization, the 4392 * current els and allocated scsi sgl lists are 0s. 4393 * 4394 * Return codes 4395 * 0 - successful (for now, it always returns 0) 4396 **/ 4397 int 4398 lpfc_sli4_io_sgl_update(struct lpfc_hba *phba) 4399 { 4400 struct lpfc_io_buf *lpfc_ncmd = NULL, *lpfc_ncmd_next = NULL; 4401 uint16_t i, lxri, els_xri_cnt; 4402 uint16_t io_xri_cnt, io_xri_max; 4403 LIST_HEAD(io_sgl_list); 4404 int rc, cnt; 4405 4406 /* 4407 * update on pci function's allocated nvme xri-sgl list 4408 */ 4409 4410 /* maximum number of xris available for nvme buffers */ 4411 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba); 4412 io_xri_max = phba->sli4_hba.max_cfg_param.max_xri - els_xri_cnt; 4413 phba->sli4_hba.io_xri_max = io_xri_max; 4414 4415 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 4416 "6074 Current allocated XRI sgl count:%d, " 4417 "maximum XRI count:%d els_xri_cnt:%d\n\n", 4418 phba->sli4_hba.io_xri_cnt, 4419 phba->sli4_hba.io_xri_max, 4420 els_xri_cnt); 4421 4422 cnt = lpfc_io_buf_flush(phba, &io_sgl_list); 4423 4424 if (phba->sli4_hba.io_xri_cnt > phba->sli4_hba.io_xri_max) { 4425 /* max nvme xri shrunk below the allocated nvme buffers */ 4426 io_xri_cnt = phba->sli4_hba.io_xri_cnt - 4427 phba->sli4_hba.io_xri_max; 4428 /* release the extra allocated nvme buffers */ 4429 for (i = 0; i < io_xri_cnt; i++) { 4430 list_remove_head(&io_sgl_list, lpfc_ncmd, 4431 struct lpfc_io_buf, list); 4432 if (lpfc_ncmd) { 4433 dma_pool_free(phba->lpfc_sg_dma_buf_pool, 4434 lpfc_ncmd->data, 4435 lpfc_ncmd->dma_handle); 4436 kfree(lpfc_ncmd); 4437 } 4438 } 4439 phba->sli4_hba.io_xri_cnt -= io_xri_cnt; 4440 } 4441 4442 /* update xris associated to remaining allocated nvme buffers */ 4443 lpfc_ncmd = NULL; 4444 lpfc_ncmd_next = NULL; 4445 phba->sli4_hba.io_xri_cnt = cnt; 4446 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, 4447 &io_sgl_list, list) { 4448 lxri = lpfc_sli4_next_xritag(phba); 4449 if (lxri == NO_XRI) { 4450 lpfc_printf_log(phba, KERN_ERR, 4451 LOG_TRACE_EVENT, 4452 "6075 Failed to allocate xri for " 4453 "nvme buffer\n"); 4454 rc = -ENOMEM; 4455 goto out_free_mem; 4456 } 4457 lpfc_ncmd->cur_iocbq.sli4_lxritag = lxri; 4458 lpfc_ncmd->cur_iocbq.sli4_xritag = phba->sli4_hba.xri_ids[lxri]; 4459 } 4460 cnt = lpfc_io_buf_replenish(phba, &io_sgl_list); 4461 return 0; 4462 4463 out_free_mem: 4464 lpfc_io_free(phba); 4465 return rc; 4466 } 4467 4468 /** 4469 * lpfc_new_io_buf - IO buffer allocator for HBA with SLI4 IF spec 4470 * @phba: Pointer to lpfc hba data structure. 4471 * @num_to_alloc: The requested number of buffers to allocate. 4472 * 4473 * This routine allocates nvme buffers for device with SLI-4 interface spec, 4474 * the nvme buffer contains all the necessary information needed to initiate 4475 * an I/O. After allocating up to @num_to_allocate IO buffers and put 4476 * them on a list, it post them to the port by using SGL block post. 4477 * 4478 * Return codes: 4479 * int - number of IO buffers that were allocated and posted. 4480 * 0 = failure, less than num_to_alloc is a partial failure. 4481 **/ 4482 int 4483 lpfc_new_io_buf(struct lpfc_hba *phba, int num_to_alloc) 4484 { 4485 struct lpfc_io_buf *lpfc_ncmd; 4486 struct lpfc_iocbq *pwqeq; 4487 uint16_t iotag, lxri = 0; 4488 int bcnt, num_posted; 4489 LIST_HEAD(prep_nblist); 4490 LIST_HEAD(post_nblist); 4491 LIST_HEAD(nvme_nblist); 4492 4493 phba->sli4_hba.io_xri_cnt = 0; 4494 for (bcnt = 0; bcnt < num_to_alloc; bcnt++) { 4495 lpfc_ncmd = kzalloc(sizeof(*lpfc_ncmd), GFP_KERNEL); 4496 if (!lpfc_ncmd) 4497 break; 4498 /* 4499 * Get memory from the pci pool to map the virt space to 4500 * pci bus space for an I/O. The DMA buffer includes the 4501 * number of SGE's necessary to support the sg_tablesize. 4502 */ 4503 lpfc_ncmd->data = dma_pool_zalloc(phba->lpfc_sg_dma_buf_pool, 4504 GFP_KERNEL, 4505 &lpfc_ncmd->dma_handle); 4506 if (!lpfc_ncmd->data) { 4507 kfree(lpfc_ncmd); 4508 break; 4509 } 4510 4511 if (phba->cfg_xpsgl && !phba->nvmet_support) { 4512 INIT_LIST_HEAD(&lpfc_ncmd->dma_sgl_xtra_list); 4513 } else { 4514 /* 4515 * 4K Page alignment is CRITICAL to BlockGuard, double 4516 * check to be sure. 4517 */ 4518 if ((phba->sli3_options & LPFC_SLI3_BG_ENABLED) && 4519 (((unsigned long)(lpfc_ncmd->data) & 4520 (unsigned long)(SLI4_PAGE_SIZE - 1)) != 0)) { 4521 lpfc_printf_log(phba, KERN_ERR, 4522 LOG_TRACE_EVENT, 4523 "3369 Memory alignment err: " 4524 "addr=%lx\n", 4525 (unsigned long)lpfc_ncmd->data); 4526 dma_pool_free(phba->lpfc_sg_dma_buf_pool, 4527 lpfc_ncmd->data, 4528 lpfc_ncmd->dma_handle); 4529 kfree(lpfc_ncmd); 4530 break; 4531 } 4532 } 4533 4534 INIT_LIST_HEAD(&lpfc_ncmd->dma_cmd_rsp_list); 4535 4536 lxri = lpfc_sli4_next_xritag(phba); 4537 if (lxri == NO_XRI) { 4538 dma_pool_free(phba->lpfc_sg_dma_buf_pool, 4539 lpfc_ncmd->data, lpfc_ncmd->dma_handle); 4540 kfree(lpfc_ncmd); 4541 break; 4542 } 4543 pwqeq = &lpfc_ncmd->cur_iocbq; 4544 4545 /* Allocate iotag for lpfc_ncmd->cur_iocbq. */ 4546 iotag = lpfc_sli_next_iotag(phba, pwqeq); 4547 if (iotag == 0) { 4548 dma_pool_free(phba->lpfc_sg_dma_buf_pool, 4549 lpfc_ncmd->data, lpfc_ncmd->dma_handle); 4550 kfree(lpfc_ncmd); 4551 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 4552 "6121 Failed to allocate IOTAG for" 4553 " XRI:0x%x\n", lxri); 4554 lpfc_sli4_free_xri(phba, lxri); 4555 break; 4556 } 4557 pwqeq->sli4_lxritag = lxri; 4558 pwqeq->sli4_xritag = phba->sli4_hba.xri_ids[lxri]; 4559 4560 /* Initialize local short-hand pointers. */ 4561 lpfc_ncmd->dma_sgl = lpfc_ncmd->data; 4562 lpfc_ncmd->dma_phys_sgl = lpfc_ncmd->dma_handle; 4563 lpfc_ncmd->cur_iocbq.io_buf = lpfc_ncmd; 4564 spin_lock_init(&lpfc_ncmd->buf_lock); 4565 4566 /* add the nvme buffer to a post list */ 4567 list_add_tail(&lpfc_ncmd->list, &post_nblist); 4568 phba->sli4_hba.io_xri_cnt++; 4569 } 4570 lpfc_printf_log(phba, KERN_INFO, LOG_NVME, 4571 "6114 Allocate %d out of %d requested new NVME " 4572 "buffers of size x%zu bytes\n", bcnt, num_to_alloc, 4573 sizeof(*lpfc_ncmd)); 4574 4575 4576 /* post the list of nvme buffer sgls to port if available */ 4577 if (!list_empty(&post_nblist)) 4578 num_posted = lpfc_sli4_post_io_sgl_list( 4579 phba, &post_nblist, bcnt); 4580 else 4581 num_posted = 0; 4582 4583 return num_posted; 4584 } 4585 4586 static uint64_t 4587 lpfc_get_wwpn(struct lpfc_hba *phba) 4588 { 4589 uint64_t wwn; 4590 int rc; 4591 LPFC_MBOXQ_t *mboxq; 4592 MAILBOX_t *mb; 4593 4594 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, 4595 GFP_KERNEL); 4596 if (!mboxq) 4597 return (uint64_t)-1; 4598 4599 /* First get WWN of HBA instance */ 4600 lpfc_read_nv(phba, mboxq); 4601 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); 4602 if (rc != MBX_SUCCESS) { 4603 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 4604 "6019 Mailbox failed , mbxCmd x%x " 4605 "READ_NV, mbxStatus x%x\n", 4606 bf_get(lpfc_mqe_command, &mboxq->u.mqe), 4607 bf_get(lpfc_mqe_status, &mboxq->u.mqe)); 4608 mempool_free(mboxq, phba->mbox_mem_pool); 4609 return (uint64_t) -1; 4610 } 4611 mb = &mboxq->u.mb; 4612 memcpy(&wwn, (char *)mb->un.varRDnvp.portname, sizeof(uint64_t)); 4613 /* wwn is WWPN of HBA instance */ 4614 mempool_free(mboxq, phba->mbox_mem_pool); 4615 if (phba->sli_rev == LPFC_SLI_REV4) 4616 return be64_to_cpu(wwn); 4617 else 4618 return rol64(wwn, 32); 4619 } 4620 4621 static unsigned short lpfc_get_sg_tablesize(struct lpfc_hba *phba) 4622 { 4623 if (phba->sli_rev == LPFC_SLI_REV4) 4624 if (phba->cfg_xpsgl && !phba->nvmet_support) 4625 return LPFC_MAX_SG_TABLESIZE; 4626 else 4627 return phba->cfg_scsi_seg_cnt; 4628 else 4629 return phba->cfg_sg_seg_cnt; 4630 } 4631 4632 /** 4633 * lpfc_vmid_res_alloc - Allocates resources for VMID 4634 * @phba: pointer to lpfc hba data structure. 4635 * @vport: pointer to vport data structure 4636 * 4637 * This routine allocated the resources needed for the VMID. 4638 * 4639 * Return codes 4640 * 0 on Success 4641 * Non-0 on Failure 4642 */ 4643 static int 4644 lpfc_vmid_res_alloc(struct lpfc_hba *phba, struct lpfc_vport *vport) 4645 { 4646 /* VMID feature is supported only on SLI4 */ 4647 if (phba->sli_rev == LPFC_SLI_REV3) { 4648 phba->cfg_vmid_app_header = 0; 4649 phba->cfg_vmid_priority_tagging = 0; 4650 } 4651 4652 if (lpfc_is_vmid_enabled(phba)) { 4653 vport->vmid = 4654 kcalloc(phba->cfg_max_vmid, sizeof(struct lpfc_vmid), 4655 GFP_KERNEL); 4656 if (!vport->vmid) 4657 return -ENOMEM; 4658 4659 rwlock_init(&vport->vmid_lock); 4660 4661 /* Set the VMID parameters for the vport */ 4662 vport->vmid_priority_tagging = phba->cfg_vmid_priority_tagging; 4663 vport->vmid_inactivity_timeout = 4664 phba->cfg_vmid_inactivity_timeout; 4665 vport->max_vmid = phba->cfg_max_vmid; 4666 vport->cur_vmid_cnt = 0; 4667 4668 vport->vmid_priority_range = bitmap_zalloc 4669 (LPFC_VMID_MAX_PRIORITY_RANGE, GFP_KERNEL); 4670 4671 if (!vport->vmid_priority_range) { 4672 kfree(vport->vmid); 4673 return -ENOMEM; 4674 } 4675 4676 hash_init(vport->hash_table); 4677 } 4678 return 0; 4679 } 4680 4681 /** 4682 * lpfc_create_port - Create an FC port 4683 * @phba: pointer to lpfc hba data structure. 4684 * @instance: a unique integer ID to this FC port. 4685 * @dev: pointer to the device data structure. 4686 * 4687 * This routine creates a FC port for the upper layer protocol. The FC port 4688 * can be created on top of either a physical port or a virtual port provided 4689 * by the HBA. This routine also allocates a SCSI host data structure (shost) 4690 * and associates the FC port created before adding the shost into the SCSI 4691 * layer. 4692 * 4693 * Return codes 4694 * @vport - pointer to the virtual N_Port data structure. 4695 * NULL - port create failed. 4696 **/ 4697 struct lpfc_vport * 4698 lpfc_create_port(struct lpfc_hba *phba, int instance, struct device *dev) 4699 { 4700 struct lpfc_vport *vport; 4701 struct Scsi_Host *shost = NULL; 4702 struct scsi_host_template *template; 4703 int error = 0; 4704 int i; 4705 uint64_t wwn; 4706 bool use_no_reset_hba = false; 4707 int rc; 4708 4709 if (lpfc_no_hba_reset_cnt) { 4710 if (phba->sli_rev < LPFC_SLI_REV4 && 4711 dev == &phba->pcidev->dev) { 4712 /* Reset the port first */ 4713 lpfc_sli_brdrestart(phba); 4714 rc = lpfc_sli_chipset_init(phba); 4715 if (rc) 4716 return NULL; 4717 } 4718 wwn = lpfc_get_wwpn(phba); 4719 } 4720 4721 for (i = 0; i < lpfc_no_hba_reset_cnt; i++) { 4722 if (wwn == lpfc_no_hba_reset[i]) { 4723 lpfc_printf_log(phba, KERN_ERR, 4724 LOG_TRACE_EVENT, 4725 "6020 Setting use_no_reset port=%llx\n", 4726 wwn); 4727 use_no_reset_hba = true; 4728 break; 4729 } 4730 } 4731 4732 /* Seed template for SCSI host registration */ 4733 if (dev == &phba->pcidev->dev) { 4734 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) { 4735 /* Seed physical port template */ 4736 template = &lpfc_template; 4737 4738 if (use_no_reset_hba) 4739 /* template is for a no reset SCSI Host */ 4740 template->eh_host_reset_handler = NULL; 4741 4742 /* Seed updated value of sg_tablesize */ 4743 template->sg_tablesize = lpfc_get_sg_tablesize(phba); 4744 } else { 4745 /* NVMET is for physical port only */ 4746 template = &lpfc_template_nvme; 4747 } 4748 } else { 4749 /* Seed vport template */ 4750 template = &lpfc_vport_template; 4751 4752 /* Seed updated value of sg_tablesize */ 4753 template->sg_tablesize = lpfc_get_sg_tablesize(phba); 4754 } 4755 4756 shost = scsi_host_alloc(template, sizeof(struct lpfc_vport)); 4757 if (!shost) 4758 goto out; 4759 4760 vport = (struct lpfc_vport *) shost->hostdata; 4761 vport->phba = phba; 4762 vport->load_flag |= FC_LOADING; 4763 vport->fc_flag |= FC_VPORT_NEEDS_REG_VPI; 4764 vport->fc_rscn_flush = 0; 4765 lpfc_get_vport_cfgparam(vport); 4766 4767 /* Adjust value in vport */ 4768 vport->cfg_enable_fc4_type = phba->cfg_enable_fc4_type; 4769 4770 shost->unique_id = instance; 4771 shost->max_id = LPFC_MAX_TARGET; 4772 shost->max_lun = vport->cfg_max_luns; 4773 shost->this_id = -1; 4774 shost->max_cmd_len = 16; 4775 4776 if (phba->sli_rev == LPFC_SLI_REV4) { 4777 if (!phba->cfg_fcp_mq_threshold || 4778 phba->cfg_fcp_mq_threshold > phba->cfg_hdw_queue) 4779 phba->cfg_fcp_mq_threshold = phba->cfg_hdw_queue; 4780 4781 shost->nr_hw_queues = min_t(int, 2 * num_possible_nodes(), 4782 phba->cfg_fcp_mq_threshold); 4783 4784 shost->dma_boundary = 4785 phba->sli4_hba.pc_sli4_params.sge_supp_len-1; 4786 } else 4787 /* SLI-3 has a limited number of hardware queues (3), 4788 * thus there is only one for FCP processing. 4789 */ 4790 shost->nr_hw_queues = 1; 4791 4792 /* 4793 * Set initial can_queue value since 0 is no longer supported and 4794 * scsi_add_host will fail. This will be adjusted later based on the 4795 * max xri value determined in hba setup. 4796 */ 4797 shost->can_queue = phba->cfg_hba_queue_depth - 10; 4798 if (dev != &phba->pcidev->dev) { 4799 shost->transportt = lpfc_vport_transport_template; 4800 vport->port_type = LPFC_NPIV_PORT; 4801 } else { 4802 shost->transportt = lpfc_transport_template; 4803 vport->port_type = LPFC_PHYSICAL_PORT; 4804 } 4805 4806 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP, 4807 "9081 CreatePort TMPLATE type %x TBLsize %d " 4808 "SEGcnt %d/%d\n", 4809 vport->port_type, shost->sg_tablesize, 4810 phba->cfg_scsi_seg_cnt, phba->cfg_sg_seg_cnt); 4811 4812 /* Allocate the resources for VMID */ 4813 rc = lpfc_vmid_res_alloc(phba, vport); 4814 4815 if (rc) 4816 goto out; 4817 4818 /* Initialize all internally managed lists. */ 4819 INIT_LIST_HEAD(&vport->fc_nodes); 4820 INIT_LIST_HEAD(&vport->rcv_buffer_list); 4821 spin_lock_init(&vport->work_port_lock); 4822 4823 timer_setup(&vport->fc_disctmo, lpfc_disc_timeout, 0); 4824 4825 timer_setup(&vport->els_tmofunc, lpfc_els_timeout, 0); 4826 4827 timer_setup(&vport->delayed_disc_tmo, lpfc_delayed_disc_tmo, 0); 4828 4829 if (phba->sli3_options & LPFC_SLI3_BG_ENABLED) 4830 lpfc_setup_bg(phba, shost); 4831 4832 error = scsi_add_host_with_dma(shost, dev, &phba->pcidev->dev); 4833 if (error) 4834 goto out_put_shost; 4835 4836 spin_lock_irq(&phba->port_list_lock); 4837 list_add_tail(&vport->listentry, &phba->port_list); 4838 spin_unlock_irq(&phba->port_list_lock); 4839 return vport; 4840 4841 out_put_shost: 4842 kfree(vport->vmid); 4843 bitmap_free(vport->vmid_priority_range); 4844 scsi_host_put(shost); 4845 out: 4846 return NULL; 4847 } 4848 4849 /** 4850 * destroy_port - destroy an FC port 4851 * @vport: pointer to an lpfc virtual N_Port data structure. 4852 * 4853 * This routine destroys a FC port from the upper layer protocol. All the 4854 * resources associated with the port are released. 4855 **/ 4856 void 4857 destroy_port(struct lpfc_vport *vport) 4858 { 4859 struct Scsi_Host *shost = lpfc_shost_from_vport(vport); 4860 struct lpfc_hba *phba = vport->phba; 4861 4862 lpfc_debugfs_terminate(vport); 4863 fc_remove_host(shost); 4864 scsi_remove_host(shost); 4865 4866 spin_lock_irq(&phba->port_list_lock); 4867 list_del_init(&vport->listentry); 4868 spin_unlock_irq(&phba->port_list_lock); 4869 4870 lpfc_cleanup(vport); 4871 return; 4872 } 4873 4874 /** 4875 * lpfc_get_instance - Get a unique integer ID 4876 * 4877 * This routine allocates a unique integer ID from lpfc_hba_index pool. It 4878 * uses the kernel idr facility to perform the task. 4879 * 4880 * Return codes: 4881 * instance - a unique integer ID allocated as the new instance. 4882 * -1 - lpfc get instance failed. 4883 **/ 4884 int 4885 lpfc_get_instance(void) 4886 { 4887 int ret; 4888 4889 ret = idr_alloc(&lpfc_hba_index, NULL, 0, 0, GFP_KERNEL); 4890 return ret < 0 ? -1 : ret; 4891 } 4892 4893 /** 4894 * lpfc_scan_finished - method for SCSI layer to detect whether scan is done 4895 * @shost: pointer to SCSI host data structure. 4896 * @time: elapsed time of the scan in jiffies. 4897 * 4898 * This routine is called by the SCSI layer with a SCSI host to determine 4899 * whether the scan host is finished. 4900 * 4901 * Note: there is no scan_start function as adapter initialization will have 4902 * asynchronously kicked off the link initialization. 4903 * 4904 * Return codes 4905 * 0 - SCSI host scan is not over yet. 4906 * 1 - SCSI host scan is over. 4907 **/ 4908 int lpfc_scan_finished(struct Scsi_Host *shost, unsigned long time) 4909 { 4910 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata; 4911 struct lpfc_hba *phba = vport->phba; 4912 int stat = 0; 4913 4914 spin_lock_irq(shost->host_lock); 4915 4916 if (vport->load_flag & FC_UNLOADING) { 4917 stat = 1; 4918 goto finished; 4919 } 4920 if (time >= msecs_to_jiffies(30 * 1000)) { 4921 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 4922 "0461 Scanning longer than 30 " 4923 "seconds. Continuing initialization\n"); 4924 stat = 1; 4925 goto finished; 4926 } 4927 if (time >= msecs_to_jiffies(15 * 1000) && 4928 phba->link_state <= LPFC_LINK_DOWN) { 4929 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 4930 "0465 Link down longer than 15 " 4931 "seconds. Continuing initialization\n"); 4932 stat = 1; 4933 goto finished; 4934 } 4935 4936 if (vport->port_state != LPFC_VPORT_READY) 4937 goto finished; 4938 if (vport->num_disc_nodes || vport->fc_prli_sent) 4939 goto finished; 4940 if (vport->fc_map_cnt == 0 && time < msecs_to_jiffies(2 * 1000)) 4941 goto finished; 4942 if ((phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) != 0) 4943 goto finished; 4944 4945 stat = 1; 4946 4947 finished: 4948 spin_unlock_irq(shost->host_lock); 4949 return stat; 4950 } 4951 4952 static void lpfc_host_supported_speeds_set(struct Scsi_Host *shost) 4953 { 4954 struct lpfc_vport *vport = (struct lpfc_vport *)shost->hostdata; 4955 struct lpfc_hba *phba = vport->phba; 4956 4957 fc_host_supported_speeds(shost) = 0; 4958 /* 4959 * Avoid reporting supported link speed for FCoE as it can't be 4960 * controlled via FCoE. 4961 */ 4962 if (phba->hba_flag & HBA_FCOE_MODE) 4963 return; 4964 4965 if (phba->lmt & LMT_256Gb) 4966 fc_host_supported_speeds(shost) |= FC_PORTSPEED_256GBIT; 4967 if (phba->lmt & LMT_128Gb) 4968 fc_host_supported_speeds(shost) |= FC_PORTSPEED_128GBIT; 4969 if (phba->lmt & LMT_64Gb) 4970 fc_host_supported_speeds(shost) |= FC_PORTSPEED_64GBIT; 4971 if (phba->lmt & LMT_32Gb) 4972 fc_host_supported_speeds(shost) |= FC_PORTSPEED_32GBIT; 4973 if (phba->lmt & LMT_16Gb) 4974 fc_host_supported_speeds(shost) |= FC_PORTSPEED_16GBIT; 4975 if (phba->lmt & LMT_10Gb) 4976 fc_host_supported_speeds(shost) |= FC_PORTSPEED_10GBIT; 4977 if (phba->lmt & LMT_8Gb) 4978 fc_host_supported_speeds(shost) |= FC_PORTSPEED_8GBIT; 4979 if (phba->lmt & LMT_4Gb) 4980 fc_host_supported_speeds(shost) |= FC_PORTSPEED_4GBIT; 4981 if (phba->lmt & LMT_2Gb) 4982 fc_host_supported_speeds(shost) |= FC_PORTSPEED_2GBIT; 4983 if (phba->lmt & LMT_1Gb) 4984 fc_host_supported_speeds(shost) |= FC_PORTSPEED_1GBIT; 4985 } 4986 4987 /** 4988 * lpfc_host_attrib_init - Initialize SCSI host attributes on a FC port 4989 * @shost: pointer to SCSI host data structure. 4990 * 4991 * This routine initializes a given SCSI host attributes on a FC port. The 4992 * SCSI host can be either on top of a physical port or a virtual port. 4993 **/ 4994 void lpfc_host_attrib_init(struct Scsi_Host *shost) 4995 { 4996 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata; 4997 struct lpfc_hba *phba = vport->phba; 4998 /* 4999 * Set fixed host attributes. Must done after lpfc_sli_hba_setup(). 5000 */ 5001 5002 fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn); 5003 fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn); 5004 fc_host_supported_classes(shost) = FC_COS_CLASS3; 5005 5006 memset(fc_host_supported_fc4s(shost), 0, 5007 sizeof(fc_host_supported_fc4s(shost))); 5008 fc_host_supported_fc4s(shost)[2] = 1; 5009 fc_host_supported_fc4s(shost)[7] = 1; 5010 5011 lpfc_vport_symbolic_node_name(vport, fc_host_symbolic_name(shost), 5012 sizeof fc_host_symbolic_name(shost)); 5013 5014 lpfc_host_supported_speeds_set(shost); 5015 5016 fc_host_maxframe_size(shost) = 5017 (((uint32_t) vport->fc_sparam.cmn.bbRcvSizeMsb & 0x0F) << 8) | 5018 (uint32_t) vport->fc_sparam.cmn.bbRcvSizeLsb; 5019 5020 fc_host_dev_loss_tmo(shost) = vport->cfg_devloss_tmo; 5021 5022 /* This value is also unchanging */ 5023 memset(fc_host_active_fc4s(shost), 0, 5024 sizeof(fc_host_active_fc4s(shost))); 5025 fc_host_active_fc4s(shost)[2] = 1; 5026 fc_host_active_fc4s(shost)[7] = 1; 5027 5028 fc_host_max_npiv_vports(shost) = phba->max_vpi; 5029 spin_lock_irq(shost->host_lock); 5030 vport->load_flag &= ~FC_LOADING; 5031 spin_unlock_irq(shost->host_lock); 5032 } 5033 5034 /** 5035 * lpfc_stop_port_s3 - Stop SLI3 device port 5036 * @phba: pointer to lpfc hba data structure. 5037 * 5038 * This routine is invoked to stop an SLI3 device port, it stops the device 5039 * from generating interrupts and stops the device driver's timers for the 5040 * device. 5041 **/ 5042 static void 5043 lpfc_stop_port_s3(struct lpfc_hba *phba) 5044 { 5045 /* Clear all interrupt enable conditions */ 5046 writel(0, phba->HCregaddr); 5047 readl(phba->HCregaddr); /* flush */ 5048 /* Clear all pending interrupts */ 5049 writel(0xffffffff, phba->HAregaddr); 5050 readl(phba->HAregaddr); /* flush */ 5051 5052 /* Reset some HBA SLI setup states */ 5053 lpfc_stop_hba_timers(phba); 5054 phba->pport->work_port_events = 0; 5055 } 5056 5057 /** 5058 * lpfc_stop_port_s4 - Stop SLI4 device port 5059 * @phba: pointer to lpfc hba data structure. 5060 * 5061 * This routine is invoked to stop an SLI4 device port, it stops the device 5062 * from generating interrupts and stops the device driver's timers for the 5063 * device. 5064 **/ 5065 static void 5066 lpfc_stop_port_s4(struct lpfc_hba *phba) 5067 { 5068 /* Reset some HBA SLI4 setup states */ 5069 lpfc_stop_hba_timers(phba); 5070 if (phba->pport) 5071 phba->pport->work_port_events = 0; 5072 phba->sli4_hba.intr_enable = 0; 5073 } 5074 5075 /** 5076 * lpfc_stop_port - Wrapper function for stopping hba port 5077 * @phba: Pointer to HBA context object. 5078 * 5079 * This routine wraps the actual SLI3 or SLI4 hba stop port routine from 5080 * the API jump table function pointer from the lpfc_hba struct. 5081 **/ 5082 void 5083 lpfc_stop_port(struct lpfc_hba *phba) 5084 { 5085 phba->lpfc_stop_port(phba); 5086 5087 if (phba->wq) 5088 flush_workqueue(phba->wq); 5089 } 5090 5091 /** 5092 * lpfc_fcf_redisc_wait_start_timer - Start fcf rediscover wait timer 5093 * @phba: Pointer to hba for which this call is being executed. 5094 * 5095 * This routine starts the timer waiting for the FCF rediscovery to complete. 5096 **/ 5097 void 5098 lpfc_fcf_redisc_wait_start_timer(struct lpfc_hba *phba) 5099 { 5100 unsigned long fcf_redisc_wait_tmo = 5101 (jiffies + msecs_to_jiffies(LPFC_FCF_REDISCOVER_WAIT_TMO)); 5102 /* Start fcf rediscovery wait period timer */ 5103 mod_timer(&phba->fcf.redisc_wait, fcf_redisc_wait_tmo); 5104 spin_lock_irq(&phba->hbalock); 5105 /* Allow action to new fcf asynchronous event */ 5106 phba->fcf.fcf_flag &= ~(FCF_AVAILABLE | FCF_SCAN_DONE); 5107 /* Mark the FCF rediscovery pending state */ 5108 phba->fcf.fcf_flag |= FCF_REDISC_PEND; 5109 spin_unlock_irq(&phba->hbalock); 5110 } 5111 5112 /** 5113 * lpfc_sli4_fcf_redisc_wait_tmo - FCF table rediscover wait timeout 5114 * @t: Timer context used to obtain the pointer to lpfc hba data structure. 5115 * 5116 * This routine is invoked when waiting for FCF table rediscover has been 5117 * timed out. If new FCF record(s) has (have) been discovered during the 5118 * wait period, a new FCF event shall be added to the FCOE async event 5119 * list, and then worker thread shall be waked up for processing from the 5120 * worker thread context. 5121 **/ 5122 static void 5123 lpfc_sli4_fcf_redisc_wait_tmo(struct timer_list *t) 5124 { 5125 struct lpfc_hba *phba = from_timer(phba, t, fcf.redisc_wait); 5126 5127 /* Don't send FCF rediscovery event if timer cancelled */ 5128 spin_lock_irq(&phba->hbalock); 5129 if (!(phba->fcf.fcf_flag & FCF_REDISC_PEND)) { 5130 spin_unlock_irq(&phba->hbalock); 5131 return; 5132 } 5133 /* Clear FCF rediscovery timer pending flag */ 5134 phba->fcf.fcf_flag &= ~FCF_REDISC_PEND; 5135 /* FCF rediscovery event to worker thread */ 5136 phba->fcf.fcf_flag |= FCF_REDISC_EVT; 5137 spin_unlock_irq(&phba->hbalock); 5138 lpfc_printf_log(phba, KERN_INFO, LOG_FIP, 5139 "2776 FCF rediscover quiescent timer expired\n"); 5140 /* wake up worker thread */ 5141 lpfc_worker_wake_up(phba); 5142 } 5143 5144 /** 5145 * lpfc_vmid_poll - VMID timeout detection 5146 * @t: Timer context used to obtain the pointer to lpfc hba data structure. 5147 * 5148 * This routine is invoked when there is no I/O on by a VM for the specified 5149 * amount of time. When this situation is detected, the VMID has to be 5150 * deregistered from the switch and all the local resources freed. The VMID 5151 * will be reassigned to the VM once the I/O begins. 5152 **/ 5153 static void 5154 lpfc_vmid_poll(struct timer_list *t) 5155 { 5156 struct lpfc_hba *phba = from_timer(phba, t, inactive_vmid_poll); 5157 u32 wake_up = 0; 5158 5159 /* check if there is a need to issue QFPA */ 5160 if (phba->pport->vmid_priority_tagging) { 5161 wake_up = 1; 5162 phba->pport->work_port_events |= WORKER_CHECK_VMID_ISSUE_QFPA; 5163 } 5164 5165 /* Is the vmid inactivity timer enabled */ 5166 if (phba->pport->vmid_inactivity_timeout || 5167 phba->pport->load_flag & FC_DEREGISTER_ALL_APP_ID) { 5168 wake_up = 1; 5169 phba->pport->work_port_events |= WORKER_CHECK_INACTIVE_VMID; 5170 } 5171 5172 if (wake_up) 5173 lpfc_worker_wake_up(phba); 5174 5175 /* restart the timer for the next iteration */ 5176 mod_timer(&phba->inactive_vmid_poll, jiffies + msecs_to_jiffies(1000 * 5177 LPFC_VMID_TIMER)); 5178 } 5179 5180 /** 5181 * lpfc_sli4_parse_latt_fault - Parse sli4 link-attention link fault code 5182 * @phba: pointer to lpfc hba data structure. 5183 * @acqe_link: pointer to the async link completion queue entry. 5184 * 5185 * This routine is to parse the SLI4 link-attention link fault code. 5186 **/ 5187 static void 5188 lpfc_sli4_parse_latt_fault(struct lpfc_hba *phba, 5189 struct lpfc_acqe_link *acqe_link) 5190 { 5191 switch (bf_get(lpfc_acqe_link_fault, acqe_link)) { 5192 case LPFC_ASYNC_LINK_FAULT_NONE: 5193 case LPFC_ASYNC_LINK_FAULT_LOCAL: 5194 case LPFC_ASYNC_LINK_FAULT_REMOTE: 5195 case LPFC_ASYNC_LINK_FAULT_LR_LRR: 5196 break; 5197 default: 5198 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 5199 "0398 Unknown link fault code: x%x\n", 5200 bf_get(lpfc_acqe_link_fault, acqe_link)); 5201 break; 5202 } 5203 } 5204 5205 /** 5206 * lpfc_sli4_parse_latt_type - Parse sli4 link attention type 5207 * @phba: pointer to lpfc hba data structure. 5208 * @acqe_link: pointer to the async link completion queue entry. 5209 * 5210 * This routine is to parse the SLI4 link attention type and translate it 5211 * into the base driver's link attention type coding. 5212 * 5213 * Return: Link attention type in terms of base driver's coding. 5214 **/ 5215 static uint8_t 5216 lpfc_sli4_parse_latt_type(struct lpfc_hba *phba, 5217 struct lpfc_acqe_link *acqe_link) 5218 { 5219 uint8_t att_type; 5220 5221 switch (bf_get(lpfc_acqe_link_status, acqe_link)) { 5222 case LPFC_ASYNC_LINK_STATUS_DOWN: 5223 case LPFC_ASYNC_LINK_STATUS_LOGICAL_DOWN: 5224 att_type = LPFC_ATT_LINK_DOWN; 5225 break; 5226 case LPFC_ASYNC_LINK_STATUS_UP: 5227 /* Ignore physical link up events - wait for logical link up */ 5228 att_type = LPFC_ATT_RESERVED; 5229 break; 5230 case LPFC_ASYNC_LINK_STATUS_LOGICAL_UP: 5231 att_type = LPFC_ATT_LINK_UP; 5232 break; 5233 default: 5234 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 5235 "0399 Invalid link attention type: x%x\n", 5236 bf_get(lpfc_acqe_link_status, acqe_link)); 5237 att_type = LPFC_ATT_RESERVED; 5238 break; 5239 } 5240 return att_type; 5241 } 5242 5243 /** 5244 * lpfc_sli_port_speed_get - Get sli3 link speed code to link speed 5245 * @phba: pointer to lpfc hba data structure. 5246 * 5247 * This routine is to get an SLI3 FC port's link speed in Mbps. 5248 * 5249 * Return: link speed in terms of Mbps. 5250 **/ 5251 uint32_t 5252 lpfc_sli_port_speed_get(struct lpfc_hba *phba) 5253 { 5254 uint32_t link_speed; 5255 5256 if (!lpfc_is_link_up(phba)) 5257 return 0; 5258 5259 if (phba->sli_rev <= LPFC_SLI_REV3) { 5260 switch (phba->fc_linkspeed) { 5261 case LPFC_LINK_SPEED_1GHZ: 5262 link_speed = 1000; 5263 break; 5264 case LPFC_LINK_SPEED_2GHZ: 5265 link_speed = 2000; 5266 break; 5267 case LPFC_LINK_SPEED_4GHZ: 5268 link_speed = 4000; 5269 break; 5270 case LPFC_LINK_SPEED_8GHZ: 5271 link_speed = 8000; 5272 break; 5273 case LPFC_LINK_SPEED_10GHZ: 5274 link_speed = 10000; 5275 break; 5276 case LPFC_LINK_SPEED_16GHZ: 5277 link_speed = 16000; 5278 break; 5279 default: 5280 link_speed = 0; 5281 } 5282 } else { 5283 if (phba->sli4_hba.link_state.logical_speed) 5284 link_speed = 5285 phba->sli4_hba.link_state.logical_speed; 5286 else 5287 link_speed = phba->sli4_hba.link_state.speed; 5288 } 5289 return link_speed; 5290 } 5291 5292 /** 5293 * lpfc_sli4_port_speed_parse - Parse async evt link speed code to link speed 5294 * @phba: pointer to lpfc hba data structure. 5295 * @evt_code: asynchronous event code. 5296 * @speed_code: asynchronous event link speed code. 5297 * 5298 * This routine is to parse the giving SLI4 async event link speed code into 5299 * value of Mbps for the link speed. 5300 * 5301 * Return: link speed in terms of Mbps. 5302 **/ 5303 static uint32_t 5304 lpfc_sli4_port_speed_parse(struct lpfc_hba *phba, uint32_t evt_code, 5305 uint8_t speed_code) 5306 { 5307 uint32_t port_speed; 5308 5309 switch (evt_code) { 5310 case LPFC_TRAILER_CODE_LINK: 5311 switch (speed_code) { 5312 case LPFC_ASYNC_LINK_SPEED_ZERO: 5313 port_speed = 0; 5314 break; 5315 case LPFC_ASYNC_LINK_SPEED_10MBPS: 5316 port_speed = 10; 5317 break; 5318 case LPFC_ASYNC_LINK_SPEED_100MBPS: 5319 port_speed = 100; 5320 break; 5321 case LPFC_ASYNC_LINK_SPEED_1GBPS: 5322 port_speed = 1000; 5323 break; 5324 case LPFC_ASYNC_LINK_SPEED_10GBPS: 5325 port_speed = 10000; 5326 break; 5327 case LPFC_ASYNC_LINK_SPEED_20GBPS: 5328 port_speed = 20000; 5329 break; 5330 case LPFC_ASYNC_LINK_SPEED_25GBPS: 5331 port_speed = 25000; 5332 break; 5333 case LPFC_ASYNC_LINK_SPEED_40GBPS: 5334 port_speed = 40000; 5335 break; 5336 case LPFC_ASYNC_LINK_SPEED_100GBPS: 5337 port_speed = 100000; 5338 break; 5339 default: 5340 port_speed = 0; 5341 } 5342 break; 5343 case LPFC_TRAILER_CODE_FC: 5344 switch (speed_code) { 5345 case LPFC_FC_LA_SPEED_UNKNOWN: 5346 port_speed = 0; 5347 break; 5348 case LPFC_FC_LA_SPEED_1G: 5349 port_speed = 1000; 5350 break; 5351 case LPFC_FC_LA_SPEED_2G: 5352 port_speed = 2000; 5353 break; 5354 case LPFC_FC_LA_SPEED_4G: 5355 port_speed = 4000; 5356 break; 5357 case LPFC_FC_LA_SPEED_8G: 5358 port_speed = 8000; 5359 break; 5360 case LPFC_FC_LA_SPEED_10G: 5361 port_speed = 10000; 5362 break; 5363 case LPFC_FC_LA_SPEED_16G: 5364 port_speed = 16000; 5365 break; 5366 case LPFC_FC_LA_SPEED_32G: 5367 port_speed = 32000; 5368 break; 5369 case LPFC_FC_LA_SPEED_64G: 5370 port_speed = 64000; 5371 break; 5372 case LPFC_FC_LA_SPEED_128G: 5373 port_speed = 128000; 5374 break; 5375 case LPFC_FC_LA_SPEED_256G: 5376 port_speed = 256000; 5377 break; 5378 default: 5379 port_speed = 0; 5380 } 5381 break; 5382 default: 5383 port_speed = 0; 5384 } 5385 return port_speed; 5386 } 5387 5388 /** 5389 * lpfc_sli4_async_link_evt - Process the asynchronous FCoE link event 5390 * @phba: pointer to lpfc hba data structure. 5391 * @acqe_link: pointer to the async link completion queue entry. 5392 * 5393 * This routine is to handle the SLI4 asynchronous FCoE link event. 5394 **/ 5395 static void 5396 lpfc_sli4_async_link_evt(struct lpfc_hba *phba, 5397 struct lpfc_acqe_link *acqe_link) 5398 { 5399 LPFC_MBOXQ_t *pmb; 5400 MAILBOX_t *mb; 5401 struct lpfc_mbx_read_top *la; 5402 uint8_t att_type; 5403 int rc; 5404 5405 att_type = lpfc_sli4_parse_latt_type(phba, acqe_link); 5406 if (att_type != LPFC_ATT_LINK_DOWN && att_type != LPFC_ATT_LINK_UP) 5407 return; 5408 phba->fcoe_eventtag = acqe_link->event_tag; 5409 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 5410 if (!pmb) { 5411 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 5412 "0395 The mboxq allocation failed\n"); 5413 return; 5414 } 5415 5416 rc = lpfc_mbox_rsrc_prep(phba, pmb); 5417 if (rc) { 5418 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 5419 "0396 mailbox allocation failed\n"); 5420 goto out_free_pmb; 5421 } 5422 5423 /* Cleanup any outstanding ELS commands */ 5424 lpfc_els_flush_all_cmd(phba); 5425 5426 /* Block ELS IOCBs until we have done process link event */ 5427 phba->sli4_hba.els_wq->pring->flag |= LPFC_STOP_IOCB_EVENT; 5428 5429 /* Update link event statistics */ 5430 phba->sli.slistat.link_event++; 5431 5432 /* Create lpfc_handle_latt mailbox command from link ACQE */ 5433 lpfc_read_topology(phba, pmb, (struct lpfc_dmabuf *)pmb->ctx_buf); 5434 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology; 5435 pmb->vport = phba->pport; 5436 5437 /* Keep the link status for extra SLI4 state machine reference */ 5438 phba->sli4_hba.link_state.speed = 5439 lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_LINK, 5440 bf_get(lpfc_acqe_link_speed, acqe_link)); 5441 phba->sli4_hba.link_state.duplex = 5442 bf_get(lpfc_acqe_link_duplex, acqe_link); 5443 phba->sli4_hba.link_state.status = 5444 bf_get(lpfc_acqe_link_status, acqe_link); 5445 phba->sli4_hba.link_state.type = 5446 bf_get(lpfc_acqe_link_type, acqe_link); 5447 phba->sli4_hba.link_state.number = 5448 bf_get(lpfc_acqe_link_number, acqe_link); 5449 phba->sli4_hba.link_state.fault = 5450 bf_get(lpfc_acqe_link_fault, acqe_link); 5451 phba->sli4_hba.link_state.logical_speed = 5452 bf_get(lpfc_acqe_logical_link_speed, acqe_link) * 10; 5453 5454 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 5455 "2900 Async FC/FCoE Link event - Speed:%dGBit " 5456 "duplex:x%x LA Type:x%x Port Type:%d Port Number:%d " 5457 "Logical speed:%dMbps Fault:%d\n", 5458 phba->sli4_hba.link_state.speed, 5459 phba->sli4_hba.link_state.topology, 5460 phba->sli4_hba.link_state.status, 5461 phba->sli4_hba.link_state.type, 5462 phba->sli4_hba.link_state.number, 5463 phba->sli4_hba.link_state.logical_speed, 5464 phba->sli4_hba.link_state.fault); 5465 /* 5466 * For FC Mode: issue the READ_TOPOLOGY mailbox command to fetch 5467 * topology info. Note: Optional for non FC-AL ports. 5468 */ 5469 if (!(phba->hba_flag & HBA_FCOE_MODE)) { 5470 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT); 5471 if (rc == MBX_NOT_FINISHED) 5472 goto out_free_pmb; 5473 return; 5474 } 5475 /* 5476 * For FCoE Mode: fill in all the topology information we need and call 5477 * the READ_TOPOLOGY completion routine to continue without actually 5478 * sending the READ_TOPOLOGY mailbox command to the port. 5479 */ 5480 /* Initialize completion status */ 5481 mb = &pmb->u.mb; 5482 mb->mbxStatus = MBX_SUCCESS; 5483 5484 /* Parse port fault information field */ 5485 lpfc_sli4_parse_latt_fault(phba, acqe_link); 5486 5487 /* Parse and translate link attention fields */ 5488 la = (struct lpfc_mbx_read_top *) &pmb->u.mb.un.varReadTop; 5489 la->eventTag = acqe_link->event_tag; 5490 bf_set(lpfc_mbx_read_top_att_type, la, att_type); 5491 bf_set(lpfc_mbx_read_top_link_spd, la, 5492 (bf_get(lpfc_acqe_link_speed, acqe_link))); 5493 5494 /* Fake the the following irrelvant fields */ 5495 bf_set(lpfc_mbx_read_top_topology, la, LPFC_TOPOLOGY_PT_PT); 5496 bf_set(lpfc_mbx_read_top_alpa_granted, la, 0); 5497 bf_set(lpfc_mbx_read_top_il, la, 0); 5498 bf_set(lpfc_mbx_read_top_pb, la, 0); 5499 bf_set(lpfc_mbx_read_top_fa, la, 0); 5500 bf_set(lpfc_mbx_read_top_mm, la, 0); 5501 5502 /* Invoke the lpfc_handle_latt mailbox command callback function */ 5503 lpfc_mbx_cmpl_read_topology(phba, pmb); 5504 5505 return; 5506 5507 out_free_pmb: 5508 lpfc_mbox_rsrc_cleanup(phba, pmb, MBOX_THD_UNLOCKED); 5509 } 5510 5511 /** 5512 * lpfc_async_link_speed_to_read_top - Parse async evt link speed code to read 5513 * topology. 5514 * @phba: pointer to lpfc hba data structure. 5515 * @speed_code: asynchronous event link speed code. 5516 * 5517 * This routine is to parse the giving SLI4 async event link speed code into 5518 * value of Read topology link speed. 5519 * 5520 * Return: link speed in terms of Read topology. 5521 **/ 5522 static uint8_t 5523 lpfc_async_link_speed_to_read_top(struct lpfc_hba *phba, uint8_t speed_code) 5524 { 5525 uint8_t port_speed; 5526 5527 switch (speed_code) { 5528 case LPFC_FC_LA_SPEED_1G: 5529 port_speed = LPFC_LINK_SPEED_1GHZ; 5530 break; 5531 case LPFC_FC_LA_SPEED_2G: 5532 port_speed = LPFC_LINK_SPEED_2GHZ; 5533 break; 5534 case LPFC_FC_LA_SPEED_4G: 5535 port_speed = LPFC_LINK_SPEED_4GHZ; 5536 break; 5537 case LPFC_FC_LA_SPEED_8G: 5538 port_speed = LPFC_LINK_SPEED_8GHZ; 5539 break; 5540 case LPFC_FC_LA_SPEED_16G: 5541 port_speed = LPFC_LINK_SPEED_16GHZ; 5542 break; 5543 case LPFC_FC_LA_SPEED_32G: 5544 port_speed = LPFC_LINK_SPEED_32GHZ; 5545 break; 5546 case LPFC_FC_LA_SPEED_64G: 5547 port_speed = LPFC_LINK_SPEED_64GHZ; 5548 break; 5549 case LPFC_FC_LA_SPEED_128G: 5550 port_speed = LPFC_LINK_SPEED_128GHZ; 5551 break; 5552 case LPFC_FC_LA_SPEED_256G: 5553 port_speed = LPFC_LINK_SPEED_256GHZ; 5554 break; 5555 default: 5556 port_speed = 0; 5557 break; 5558 } 5559 5560 return port_speed; 5561 } 5562 5563 void 5564 lpfc_cgn_dump_rxmonitor(struct lpfc_hba *phba) 5565 { 5566 if (!phba->rx_monitor) { 5567 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT, 5568 "4411 Rx Monitor Info is empty.\n"); 5569 } else { 5570 lpfc_rx_monitor_report(phba, phba->rx_monitor, NULL, 0, 5571 LPFC_MAX_RXMONITOR_DUMP); 5572 } 5573 } 5574 5575 /** 5576 * lpfc_cgn_update_stat - Save data into congestion stats buffer 5577 * @phba: pointer to lpfc hba data structure. 5578 * @dtag: FPIN descriptor received 5579 * 5580 * Increment the FPIN received counter/time when it happens. 5581 */ 5582 void 5583 lpfc_cgn_update_stat(struct lpfc_hba *phba, uint32_t dtag) 5584 { 5585 struct lpfc_cgn_info *cp; 5586 struct tm broken; 5587 struct timespec64 cur_time; 5588 u32 cnt; 5589 u32 value; 5590 5591 /* Make sure we have a congestion info buffer */ 5592 if (!phba->cgn_i) 5593 return; 5594 cp = (struct lpfc_cgn_info *)phba->cgn_i->virt; 5595 ktime_get_real_ts64(&cur_time); 5596 time64_to_tm(cur_time.tv_sec, 0, &broken); 5597 5598 /* Update congestion statistics */ 5599 switch (dtag) { 5600 case ELS_DTAG_LNK_INTEGRITY: 5601 cnt = le32_to_cpu(cp->link_integ_notification); 5602 cnt++; 5603 cp->link_integ_notification = cpu_to_le32(cnt); 5604 5605 cp->cgn_stat_lnk_month = broken.tm_mon + 1; 5606 cp->cgn_stat_lnk_day = broken.tm_mday; 5607 cp->cgn_stat_lnk_year = broken.tm_year - 100; 5608 cp->cgn_stat_lnk_hour = broken.tm_hour; 5609 cp->cgn_stat_lnk_min = broken.tm_min; 5610 cp->cgn_stat_lnk_sec = broken.tm_sec; 5611 break; 5612 case ELS_DTAG_DELIVERY: 5613 cnt = le32_to_cpu(cp->delivery_notification); 5614 cnt++; 5615 cp->delivery_notification = cpu_to_le32(cnt); 5616 5617 cp->cgn_stat_del_month = broken.tm_mon + 1; 5618 cp->cgn_stat_del_day = broken.tm_mday; 5619 cp->cgn_stat_del_year = broken.tm_year - 100; 5620 cp->cgn_stat_del_hour = broken.tm_hour; 5621 cp->cgn_stat_del_min = broken.tm_min; 5622 cp->cgn_stat_del_sec = broken.tm_sec; 5623 break; 5624 case ELS_DTAG_PEER_CONGEST: 5625 cnt = le32_to_cpu(cp->cgn_peer_notification); 5626 cnt++; 5627 cp->cgn_peer_notification = cpu_to_le32(cnt); 5628 5629 cp->cgn_stat_peer_month = broken.tm_mon + 1; 5630 cp->cgn_stat_peer_day = broken.tm_mday; 5631 cp->cgn_stat_peer_year = broken.tm_year - 100; 5632 cp->cgn_stat_peer_hour = broken.tm_hour; 5633 cp->cgn_stat_peer_min = broken.tm_min; 5634 cp->cgn_stat_peer_sec = broken.tm_sec; 5635 break; 5636 case ELS_DTAG_CONGESTION: 5637 cnt = le32_to_cpu(cp->cgn_notification); 5638 cnt++; 5639 cp->cgn_notification = cpu_to_le32(cnt); 5640 5641 cp->cgn_stat_cgn_month = broken.tm_mon + 1; 5642 cp->cgn_stat_cgn_day = broken.tm_mday; 5643 cp->cgn_stat_cgn_year = broken.tm_year - 100; 5644 cp->cgn_stat_cgn_hour = broken.tm_hour; 5645 cp->cgn_stat_cgn_min = broken.tm_min; 5646 cp->cgn_stat_cgn_sec = broken.tm_sec; 5647 } 5648 if (phba->cgn_fpin_frequency && 5649 phba->cgn_fpin_frequency != LPFC_FPIN_INIT_FREQ) { 5650 value = LPFC_CGN_TIMER_TO_MIN / phba->cgn_fpin_frequency; 5651 cp->cgn_stat_npm = value; 5652 } 5653 value = lpfc_cgn_calc_crc32(cp, LPFC_CGN_INFO_SZ, 5654 LPFC_CGN_CRC32_SEED); 5655 cp->cgn_info_crc = cpu_to_le32(value); 5656 } 5657 5658 /** 5659 * lpfc_cgn_save_evt_cnt - Save data into registered congestion buffer 5660 * @phba: pointer to lpfc hba data structure. 5661 * 5662 * Save the congestion event data every minute. 5663 * On the hour collapse all the minute data into hour data. Every day 5664 * collapse all the hour data into daily data. Separate driver 5665 * and fabrc congestion event counters that will be saved out 5666 * to the registered congestion buffer every minute. 5667 */ 5668 static void 5669 lpfc_cgn_save_evt_cnt(struct lpfc_hba *phba) 5670 { 5671 struct lpfc_cgn_info *cp; 5672 struct tm broken; 5673 struct timespec64 cur_time; 5674 uint32_t i, index; 5675 uint16_t value, mvalue; 5676 uint64_t bps; 5677 uint32_t mbps; 5678 uint32_t dvalue, wvalue, lvalue, avalue; 5679 uint64_t latsum; 5680 __le16 *ptr; 5681 __le32 *lptr; 5682 __le16 *mptr; 5683 5684 /* Make sure we have a congestion info buffer */ 5685 if (!phba->cgn_i) 5686 return; 5687 cp = (struct lpfc_cgn_info *)phba->cgn_i->virt; 5688 5689 if (time_before(jiffies, phba->cgn_evt_timestamp)) 5690 return; 5691 phba->cgn_evt_timestamp = jiffies + 5692 msecs_to_jiffies(LPFC_CGN_TIMER_TO_MIN); 5693 phba->cgn_evt_minute++; 5694 5695 /* We should get to this point in the routine on 1 minute intervals */ 5696 5697 ktime_get_real_ts64(&cur_time); 5698 time64_to_tm(cur_time.tv_sec, 0, &broken); 5699 5700 if (phba->cgn_fpin_frequency && 5701 phba->cgn_fpin_frequency != LPFC_FPIN_INIT_FREQ) { 5702 value = LPFC_CGN_TIMER_TO_MIN / phba->cgn_fpin_frequency; 5703 cp->cgn_stat_npm = value; 5704 } 5705 5706 /* Read and clear the latency counters for this minute */ 5707 lvalue = atomic_read(&phba->cgn_latency_evt_cnt); 5708 latsum = atomic64_read(&phba->cgn_latency_evt); 5709 atomic_set(&phba->cgn_latency_evt_cnt, 0); 5710 atomic64_set(&phba->cgn_latency_evt, 0); 5711 5712 /* We need to store MB/sec bandwidth in the congestion information. 5713 * block_cnt is count of 512 byte blocks for the entire minute, 5714 * bps will get bytes per sec before finally converting to MB/sec. 5715 */ 5716 bps = div_u64(phba->rx_block_cnt, LPFC_SEC_MIN) * 512; 5717 phba->rx_block_cnt = 0; 5718 mvalue = bps / (1024 * 1024); /* convert to MB/sec */ 5719 5720 /* Every minute */ 5721 /* cgn parameters */ 5722 cp->cgn_info_mode = phba->cgn_p.cgn_param_mode; 5723 cp->cgn_info_level0 = phba->cgn_p.cgn_param_level0; 5724 cp->cgn_info_level1 = phba->cgn_p.cgn_param_level1; 5725 cp->cgn_info_level2 = phba->cgn_p.cgn_param_level2; 5726 5727 /* Fill in default LUN qdepth */ 5728 value = (uint16_t)(phba->pport->cfg_lun_queue_depth); 5729 cp->cgn_lunq = cpu_to_le16(value); 5730 5731 /* Record congestion buffer info - every minute 5732 * cgn_driver_evt_cnt (Driver events) 5733 * cgn_fabric_warn_cnt (Congestion Warnings) 5734 * cgn_latency_evt_cnt / cgn_latency_evt (IO Latency) 5735 * cgn_fabric_alarm_cnt (Congestion Alarms) 5736 */ 5737 index = ++cp->cgn_index_minute; 5738 if (cp->cgn_index_minute == LPFC_MIN_HOUR) { 5739 cp->cgn_index_minute = 0; 5740 index = 0; 5741 } 5742 5743 /* Get the number of driver events in this sample and reset counter */ 5744 dvalue = atomic_read(&phba->cgn_driver_evt_cnt); 5745 atomic_set(&phba->cgn_driver_evt_cnt, 0); 5746 5747 /* Get the number of warning events - FPIN and Signal for this minute */ 5748 wvalue = 0; 5749 if ((phba->cgn_reg_fpin & LPFC_CGN_FPIN_WARN) || 5750 phba->cgn_reg_signal == EDC_CG_SIG_WARN_ONLY || 5751 phba->cgn_reg_signal == EDC_CG_SIG_WARN_ALARM) 5752 wvalue = atomic_read(&phba->cgn_fabric_warn_cnt); 5753 atomic_set(&phba->cgn_fabric_warn_cnt, 0); 5754 5755 /* Get the number of alarm events - FPIN and Signal for this minute */ 5756 avalue = 0; 5757 if ((phba->cgn_reg_fpin & LPFC_CGN_FPIN_ALARM) || 5758 phba->cgn_reg_signal == EDC_CG_SIG_WARN_ALARM) 5759 avalue = atomic_read(&phba->cgn_fabric_alarm_cnt); 5760 atomic_set(&phba->cgn_fabric_alarm_cnt, 0); 5761 5762 /* Collect the driver, warning, alarm and latency counts for this 5763 * minute into the driver congestion buffer. 5764 */ 5765 ptr = &cp->cgn_drvr_min[index]; 5766 value = (uint16_t)dvalue; 5767 *ptr = cpu_to_le16(value); 5768 5769 ptr = &cp->cgn_warn_min[index]; 5770 value = (uint16_t)wvalue; 5771 *ptr = cpu_to_le16(value); 5772 5773 ptr = &cp->cgn_alarm_min[index]; 5774 value = (uint16_t)avalue; 5775 *ptr = cpu_to_le16(value); 5776 5777 lptr = &cp->cgn_latency_min[index]; 5778 if (lvalue) { 5779 lvalue = (uint32_t)div_u64(latsum, lvalue); 5780 *lptr = cpu_to_le32(lvalue); 5781 } else { 5782 *lptr = 0; 5783 } 5784 5785 /* Collect the bandwidth value into the driver's congesion buffer. */ 5786 mptr = &cp->cgn_bw_min[index]; 5787 *mptr = cpu_to_le16(mvalue); 5788 5789 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT, 5790 "2418 Congestion Info - minute (%d): %d %d %d %d %d\n", 5791 index, dvalue, wvalue, *lptr, mvalue, avalue); 5792 5793 /* Every hour */ 5794 if ((phba->cgn_evt_minute % LPFC_MIN_HOUR) == 0) { 5795 /* Record congestion buffer info - every hour 5796 * Collapse all minutes into an hour 5797 */ 5798 index = ++cp->cgn_index_hour; 5799 if (cp->cgn_index_hour == LPFC_HOUR_DAY) { 5800 cp->cgn_index_hour = 0; 5801 index = 0; 5802 } 5803 5804 dvalue = 0; 5805 wvalue = 0; 5806 lvalue = 0; 5807 avalue = 0; 5808 mvalue = 0; 5809 mbps = 0; 5810 for (i = 0; i < LPFC_MIN_HOUR; i++) { 5811 dvalue += le16_to_cpu(cp->cgn_drvr_min[i]); 5812 wvalue += le16_to_cpu(cp->cgn_warn_min[i]); 5813 lvalue += le32_to_cpu(cp->cgn_latency_min[i]); 5814 mbps += le16_to_cpu(cp->cgn_bw_min[i]); 5815 avalue += le16_to_cpu(cp->cgn_alarm_min[i]); 5816 } 5817 if (lvalue) /* Avg of latency averages */ 5818 lvalue /= LPFC_MIN_HOUR; 5819 if (mbps) /* Avg of Bandwidth averages */ 5820 mvalue = mbps / LPFC_MIN_HOUR; 5821 5822 lptr = &cp->cgn_drvr_hr[index]; 5823 *lptr = cpu_to_le32(dvalue); 5824 lptr = &cp->cgn_warn_hr[index]; 5825 *lptr = cpu_to_le32(wvalue); 5826 lptr = &cp->cgn_latency_hr[index]; 5827 *lptr = cpu_to_le32(lvalue); 5828 mptr = &cp->cgn_bw_hr[index]; 5829 *mptr = cpu_to_le16(mvalue); 5830 lptr = &cp->cgn_alarm_hr[index]; 5831 *lptr = cpu_to_le32(avalue); 5832 5833 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT, 5834 "2419 Congestion Info - hour " 5835 "(%d): %d %d %d %d %d\n", 5836 index, dvalue, wvalue, lvalue, mvalue, avalue); 5837 } 5838 5839 /* Every day */ 5840 if ((phba->cgn_evt_minute % LPFC_MIN_DAY) == 0) { 5841 /* Record congestion buffer info - every hour 5842 * Collapse all hours into a day. Rotate days 5843 * after LPFC_MAX_CGN_DAYS. 5844 */ 5845 index = ++cp->cgn_index_day; 5846 if (cp->cgn_index_day == LPFC_MAX_CGN_DAYS) { 5847 cp->cgn_index_day = 0; 5848 index = 0; 5849 } 5850 5851 /* Anytime we overwrite daily index 0, after we wrap, 5852 * we will be overwriting the oldest day, so we must 5853 * update the congestion data start time for that day. 5854 * That start time should have previously been saved after 5855 * we wrote the last days worth of data. 5856 */ 5857 if ((phba->hba_flag & HBA_CGN_DAY_WRAP) && index == 0) { 5858 time64_to_tm(phba->cgn_daily_ts.tv_sec, 0, &broken); 5859 5860 cp->cgn_info_month = broken.tm_mon + 1; 5861 cp->cgn_info_day = broken.tm_mday; 5862 cp->cgn_info_year = broken.tm_year - 100; 5863 cp->cgn_info_hour = broken.tm_hour; 5864 cp->cgn_info_minute = broken.tm_min; 5865 cp->cgn_info_second = broken.tm_sec; 5866 5867 lpfc_printf_log 5868 (phba, KERN_INFO, LOG_CGN_MGMT, 5869 "2646 CGNInfo idx0 Start Time: " 5870 "%d/%d/%d %d:%d:%d\n", 5871 cp->cgn_info_day, cp->cgn_info_month, 5872 cp->cgn_info_year, cp->cgn_info_hour, 5873 cp->cgn_info_minute, cp->cgn_info_second); 5874 } 5875 5876 dvalue = 0; 5877 wvalue = 0; 5878 lvalue = 0; 5879 mvalue = 0; 5880 mbps = 0; 5881 avalue = 0; 5882 for (i = 0; i < LPFC_HOUR_DAY; i++) { 5883 dvalue += le32_to_cpu(cp->cgn_drvr_hr[i]); 5884 wvalue += le32_to_cpu(cp->cgn_warn_hr[i]); 5885 lvalue += le32_to_cpu(cp->cgn_latency_hr[i]); 5886 mbps += le16_to_cpu(cp->cgn_bw_hr[i]); 5887 avalue += le32_to_cpu(cp->cgn_alarm_hr[i]); 5888 } 5889 if (lvalue) /* Avg of latency averages */ 5890 lvalue /= LPFC_HOUR_DAY; 5891 if (mbps) /* Avg of Bandwidth averages */ 5892 mvalue = mbps / LPFC_HOUR_DAY; 5893 5894 lptr = &cp->cgn_drvr_day[index]; 5895 *lptr = cpu_to_le32(dvalue); 5896 lptr = &cp->cgn_warn_day[index]; 5897 *lptr = cpu_to_le32(wvalue); 5898 lptr = &cp->cgn_latency_day[index]; 5899 *lptr = cpu_to_le32(lvalue); 5900 mptr = &cp->cgn_bw_day[index]; 5901 *mptr = cpu_to_le16(mvalue); 5902 lptr = &cp->cgn_alarm_day[index]; 5903 *lptr = cpu_to_le32(avalue); 5904 5905 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT, 5906 "2420 Congestion Info - daily (%d): " 5907 "%d %d %d %d %d\n", 5908 index, dvalue, wvalue, lvalue, mvalue, avalue); 5909 5910 /* We just wrote LPFC_MAX_CGN_DAYS of data, 5911 * so we are wrapped on any data after this. 5912 * Save this as the start time for the next day. 5913 */ 5914 if (index == (LPFC_MAX_CGN_DAYS - 1)) { 5915 phba->hba_flag |= HBA_CGN_DAY_WRAP; 5916 ktime_get_real_ts64(&phba->cgn_daily_ts); 5917 } 5918 } 5919 5920 /* Use the frequency found in the last rcv'ed FPIN */ 5921 value = phba->cgn_fpin_frequency; 5922 cp->cgn_warn_freq = cpu_to_le16(value); 5923 cp->cgn_alarm_freq = cpu_to_le16(value); 5924 5925 lvalue = lpfc_cgn_calc_crc32(cp, LPFC_CGN_INFO_SZ, 5926 LPFC_CGN_CRC32_SEED); 5927 cp->cgn_info_crc = cpu_to_le32(lvalue); 5928 } 5929 5930 /** 5931 * lpfc_calc_cmf_latency - latency from start of rxate timer interval 5932 * @phba: The Hba for which this call is being executed. 5933 * 5934 * The routine calculates the latency from the beginning of the CMF timer 5935 * interval to the current point in time. It is called from IO completion 5936 * when we exceed our Bandwidth limitation for the time interval. 5937 */ 5938 uint32_t 5939 lpfc_calc_cmf_latency(struct lpfc_hba *phba) 5940 { 5941 struct timespec64 cmpl_time; 5942 uint32_t msec = 0; 5943 5944 ktime_get_real_ts64(&cmpl_time); 5945 5946 /* This routine works on a ms granularity so sec and usec are 5947 * converted accordingly. 5948 */ 5949 if (cmpl_time.tv_sec == phba->cmf_latency.tv_sec) { 5950 msec = (cmpl_time.tv_nsec - phba->cmf_latency.tv_nsec) / 5951 NSEC_PER_MSEC; 5952 } else { 5953 if (cmpl_time.tv_nsec >= phba->cmf_latency.tv_nsec) { 5954 msec = (cmpl_time.tv_sec - 5955 phba->cmf_latency.tv_sec) * MSEC_PER_SEC; 5956 msec += ((cmpl_time.tv_nsec - 5957 phba->cmf_latency.tv_nsec) / NSEC_PER_MSEC); 5958 } else { 5959 msec = (cmpl_time.tv_sec - phba->cmf_latency.tv_sec - 5960 1) * MSEC_PER_SEC; 5961 msec += (((NSEC_PER_SEC - phba->cmf_latency.tv_nsec) + 5962 cmpl_time.tv_nsec) / NSEC_PER_MSEC); 5963 } 5964 } 5965 return msec; 5966 } 5967 5968 /** 5969 * lpfc_cmf_timer - This is the timer function for one congestion 5970 * rate interval. 5971 * @timer: Pointer to the high resolution timer that expired 5972 */ 5973 static enum hrtimer_restart 5974 lpfc_cmf_timer(struct hrtimer *timer) 5975 { 5976 struct lpfc_hba *phba = container_of(timer, struct lpfc_hba, 5977 cmf_timer); 5978 struct rx_info_entry entry; 5979 uint32_t io_cnt; 5980 uint32_t busy, max_read; 5981 uint64_t total, rcv, lat, mbpi, extra, cnt; 5982 int timer_interval = LPFC_CMF_INTERVAL; 5983 uint32_t ms; 5984 struct lpfc_cgn_stat *cgs; 5985 int cpu; 5986 5987 /* Only restart the timer if congestion mgmt is on */ 5988 if (phba->cmf_active_mode == LPFC_CFG_OFF || 5989 !phba->cmf_latency.tv_sec) { 5990 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT, 5991 "6224 CMF timer exit: %d %lld\n", 5992 phba->cmf_active_mode, 5993 (uint64_t)phba->cmf_latency.tv_sec); 5994 return HRTIMER_NORESTART; 5995 } 5996 5997 /* If pport is not ready yet, just exit and wait for 5998 * the next timer cycle to hit. 5999 */ 6000 if (!phba->pport) 6001 goto skip; 6002 6003 /* Do not block SCSI IO while in the timer routine since 6004 * total_bytes will be cleared 6005 */ 6006 atomic_set(&phba->cmf_stop_io, 1); 6007 6008 /* First we need to calculate the actual ms between 6009 * the last timer interrupt and this one. We ask for 6010 * LPFC_CMF_INTERVAL, however the actual time may 6011 * vary depending on system overhead. 6012 */ 6013 ms = lpfc_calc_cmf_latency(phba); 6014 6015 6016 /* Immediately after we calculate the time since the last 6017 * timer interrupt, set the start time for the next 6018 * interrupt 6019 */ 6020 ktime_get_real_ts64(&phba->cmf_latency); 6021 6022 phba->cmf_link_byte_count = 6023 div_u64(phba->cmf_max_line_rate * LPFC_CMF_INTERVAL, 1000); 6024 6025 /* Collect all the stats from the prior timer interval */ 6026 total = 0; 6027 io_cnt = 0; 6028 lat = 0; 6029 rcv = 0; 6030 for_each_present_cpu(cpu) { 6031 cgs = per_cpu_ptr(phba->cmf_stat, cpu); 6032 total += atomic64_xchg(&cgs->total_bytes, 0); 6033 io_cnt += atomic_xchg(&cgs->rx_io_cnt, 0); 6034 lat += atomic64_xchg(&cgs->rx_latency, 0); 6035 rcv += atomic64_xchg(&cgs->rcv_bytes, 0); 6036 } 6037 6038 /* Before we issue another CMF_SYNC_WQE, retrieve the BW 6039 * returned from the last CMF_SYNC_WQE issued, from 6040 * cmf_last_sync_bw. This will be the target BW for 6041 * this next timer interval. 6042 */ 6043 if (phba->cmf_active_mode == LPFC_CFG_MANAGED && 6044 phba->link_state != LPFC_LINK_DOWN && 6045 phba->hba_flag & HBA_SETUP) { 6046 mbpi = phba->cmf_last_sync_bw; 6047 phba->cmf_last_sync_bw = 0; 6048 extra = 0; 6049 6050 /* Calculate any extra bytes needed to account for the 6051 * timer accuracy. If we are less than LPFC_CMF_INTERVAL 6052 * calculate the adjustment needed for total to reflect 6053 * a full LPFC_CMF_INTERVAL. 6054 */ 6055 if (ms && ms < LPFC_CMF_INTERVAL) { 6056 cnt = div_u64(total, ms); /* bytes per ms */ 6057 cnt *= LPFC_CMF_INTERVAL; /* what total should be */ 6058 6059 /* If the timeout is scheduled to be shorter, 6060 * this value may skew the data, so cap it at mbpi. 6061 */ 6062 if ((phba->hba_flag & HBA_SHORT_CMF) && cnt > mbpi) 6063 cnt = mbpi; 6064 6065 extra = cnt - total; 6066 } 6067 lpfc_issue_cmf_sync_wqe(phba, LPFC_CMF_INTERVAL, total + extra); 6068 } else { 6069 /* For Monitor mode or link down we want mbpi 6070 * to be the full link speed 6071 */ 6072 mbpi = phba->cmf_link_byte_count; 6073 extra = 0; 6074 } 6075 phba->cmf_timer_cnt++; 6076 6077 if (io_cnt) { 6078 /* Update congestion info buffer latency in us */ 6079 atomic_add(io_cnt, &phba->cgn_latency_evt_cnt); 6080 atomic64_add(lat, &phba->cgn_latency_evt); 6081 } 6082 busy = atomic_xchg(&phba->cmf_busy, 0); 6083 max_read = atomic_xchg(&phba->rx_max_read_cnt, 0); 6084 6085 /* Calculate MBPI for the next timer interval */ 6086 if (mbpi) { 6087 if (mbpi > phba->cmf_link_byte_count || 6088 phba->cmf_active_mode == LPFC_CFG_MONITOR) 6089 mbpi = phba->cmf_link_byte_count; 6090 6091 /* Change max_bytes_per_interval to what the prior 6092 * CMF_SYNC_WQE cmpl indicated. 6093 */ 6094 if (mbpi != phba->cmf_max_bytes_per_interval) 6095 phba->cmf_max_bytes_per_interval = mbpi; 6096 } 6097 6098 /* Save rxmonitor information for debug */ 6099 if (phba->rx_monitor) { 6100 entry.total_bytes = total; 6101 entry.cmf_bytes = total + extra; 6102 entry.rcv_bytes = rcv; 6103 entry.cmf_busy = busy; 6104 entry.cmf_info = phba->cmf_active_info; 6105 if (io_cnt) { 6106 entry.avg_io_latency = div_u64(lat, io_cnt); 6107 entry.avg_io_size = div_u64(rcv, io_cnt); 6108 } else { 6109 entry.avg_io_latency = 0; 6110 entry.avg_io_size = 0; 6111 } 6112 entry.max_read_cnt = max_read; 6113 entry.io_cnt = io_cnt; 6114 entry.max_bytes_per_interval = mbpi; 6115 if (phba->cmf_active_mode == LPFC_CFG_MANAGED) 6116 entry.timer_utilization = phba->cmf_last_ts; 6117 else 6118 entry.timer_utilization = ms; 6119 entry.timer_interval = ms; 6120 phba->cmf_last_ts = 0; 6121 6122 lpfc_rx_monitor_record(phba->rx_monitor, &entry); 6123 } 6124 6125 if (phba->cmf_active_mode == LPFC_CFG_MONITOR) { 6126 /* If Monitor mode, check if we are oversubscribed 6127 * against the full line rate. 6128 */ 6129 if (mbpi && total > mbpi) 6130 atomic_inc(&phba->cgn_driver_evt_cnt); 6131 } 6132 phba->rx_block_cnt += div_u64(rcv, 512); /* save 512 byte block cnt */ 6133 6134 /* Each minute save Fabric and Driver congestion information */ 6135 lpfc_cgn_save_evt_cnt(phba); 6136 6137 phba->hba_flag &= ~HBA_SHORT_CMF; 6138 6139 /* Since we need to call lpfc_cgn_save_evt_cnt every minute, on the 6140 * minute, adjust our next timer interval, if needed, to ensure a 6141 * 1 minute granularity when we get the next timer interrupt. 6142 */ 6143 if (time_after(jiffies + msecs_to_jiffies(LPFC_CMF_INTERVAL), 6144 phba->cgn_evt_timestamp)) { 6145 timer_interval = jiffies_to_msecs(phba->cgn_evt_timestamp - 6146 jiffies); 6147 if (timer_interval <= 0) 6148 timer_interval = LPFC_CMF_INTERVAL; 6149 else 6150 phba->hba_flag |= HBA_SHORT_CMF; 6151 6152 /* If we adjust timer_interval, max_bytes_per_interval 6153 * needs to be adjusted as well. 6154 */ 6155 phba->cmf_link_byte_count = div_u64(phba->cmf_max_line_rate * 6156 timer_interval, 1000); 6157 if (phba->cmf_active_mode == LPFC_CFG_MONITOR) 6158 phba->cmf_max_bytes_per_interval = 6159 phba->cmf_link_byte_count; 6160 } 6161 6162 /* Since total_bytes has already been zero'ed, its okay to unblock 6163 * after max_bytes_per_interval is setup. 6164 */ 6165 if (atomic_xchg(&phba->cmf_bw_wait, 0)) 6166 queue_work(phba->wq, &phba->unblock_request_work); 6167 6168 /* SCSI IO is now unblocked */ 6169 atomic_set(&phba->cmf_stop_io, 0); 6170 6171 skip: 6172 hrtimer_forward_now(timer, 6173 ktime_set(0, timer_interval * NSEC_PER_MSEC)); 6174 return HRTIMER_RESTART; 6175 } 6176 6177 #define trunk_link_status(__idx)\ 6178 bf_get(lpfc_acqe_fc_la_trunk_config_port##__idx, acqe_fc) ?\ 6179 ((phba->trunk_link.link##__idx.state == LPFC_LINK_UP) ?\ 6180 "Link up" : "Link down") : "NA" 6181 /* Did port __idx reported an error */ 6182 #define trunk_port_fault(__idx)\ 6183 bf_get(lpfc_acqe_fc_la_trunk_config_port##__idx, acqe_fc) ?\ 6184 (port_fault & (1 << __idx) ? "YES" : "NO") : "NA" 6185 6186 static void 6187 lpfc_update_trunk_link_status(struct lpfc_hba *phba, 6188 struct lpfc_acqe_fc_la *acqe_fc) 6189 { 6190 uint8_t port_fault = bf_get(lpfc_acqe_fc_la_trunk_linkmask, acqe_fc); 6191 uint8_t err = bf_get(lpfc_acqe_fc_la_trunk_fault, acqe_fc); 6192 u8 cnt = 0; 6193 6194 phba->sli4_hba.link_state.speed = 6195 lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_FC, 6196 bf_get(lpfc_acqe_fc_la_speed, acqe_fc)); 6197 6198 phba->sli4_hba.link_state.logical_speed = 6199 bf_get(lpfc_acqe_fc_la_llink_spd, acqe_fc) * 10; 6200 /* We got FC link speed, convert to fc_linkspeed (READ_TOPOLOGY) */ 6201 phba->fc_linkspeed = 6202 lpfc_async_link_speed_to_read_top( 6203 phba, 6204 bf_get(lpfc_acqe_fc_la_speed, acqe_fc)); 6205 6206 if (bf_get(lpfc_acqe_fc_la_trunk_config_port0, acqe_fc)) { 6207 phba->trunk_link.link0.state = 6208 bf_get(lpfc_acqe_fc_la_trunk_link_status_port0, acqe_fc) 6209 ? LPFC_LINK_UP : LPFC_LINK_DOWN; 6210 phba->trunk_link.link0.fault = port_fault & 0x1 ? err : 0; 6211 cnt++; 6212 } 6213 if (bf_get(lpfc_acqe_fc_la_trunk_config_port1, acqe_fc)) { 6214 phba->trunk_link.link1.state = 6215 bf_get(lpfc_acqe_fc_la_trunk_link_status_port1, acqe_fc) 6216 ? LPFC_LINK_UP : LPFC_LINK_DOWN; 6217 phba->trunk_link.link1.fault = port_fault & 0x2 ? err : 0; 6218 cnt++; 6219 } 6220 if (bf_get(lpfc_acqe_fc_la_trunk_config_port2, acqe_fc)) { 6221 phba->trunk_link.link2.state = 6222 bf_get(lpfc_acqe_fc_la_trunk_link_status_port2, acqe_fc) 6223 ? LPFC_LINK_UP : LPFC_LINK_DOWN; 6224 phba->trunk_link.link2.fault = port_fault & 0x4 ? err : 0; 6225 cnt++; 6226 } 6227 if (bf_get(lpfc_acqe_fc_la_trunk_config_port3, acqe_fc)) { 6228 phba->trunk_link.link3.state = 6229 bf_get(lpfc_acqe_fc_la_trunk_link_status_port3, acqe_fc) 6230 ? LPFC_LINK_UP : LPFC_LINK_DOWN; 6231 phba->trunk_link.link3.fault = port_fault & 0x8 ? err : 0; 6232 cnt++; 6233 } 6234 6235 if (cnt) 6236 phba->trunk_link.phy_lnk_speed = 6237 phba->sli4_hba.link_state.logical_speed / (cnt * 1000); 6238 else 6239 phba->trunk_link.phy_lnk_speed = LPFC_LINK_SPEED_UNKNOWN; 6240 6241 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 6242 "2910 Async FC Trunking Event - Speed:%d\n" 6243 "\tLogical speed:%d " 6244 "port0: %s port1: %s port2: %s port3: %s\n", 6245 phba->sli4_hba.link_state.speed, 6246 phba->sli4_hba.link_state.logical_speed, 6247 trunk_link_status(0), trunk_link_status(1), 6248 trunk_link_status(2), trunk_link_status(3)); 6249 6250 if (phba->cmf_active_mode != LPFC_CFG_OFF) 6251 lpfc_cmf_signal_init(phba); 6252 6253 if (port_fault) 6254 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 6255 "3202 trunk error:0x%x (%s) seen on port0:%s " 6256 /* 6257 * SLI-4: We have only 0xA error codes 6258 * defined as of now. print an appropriate 6259 * message in case driver needs to be updated. 6260 */ 6261 "port1:%s port2:%s port3:%s\n", err, err > 0xA ? 6262 "UNDEFINED. update driver." : trunk_errmsg[err], 6263 trunk_port_fault(0), trunk_port_fault(1), 6264 trunk_port_fault(2), trunk_port_fault(3)); 6265 } 6266 6267 6268 /** 6269 * lpfc_sli4_async_fc_evt - Process the asynchronous FC link event 6270 * @phba: pointer to lpfc hba data structure. 6271 * @acqe_fc: pointer to the async fc completion queue entry. 6272 * 6273 * This routine is to handle the SLI4 asynchronous FC event. It will simply log 6274 * that the event was received and then issue a read_topology mailbox command so 6275 * that the rest of the driver will treat it the same as SLI3. 6276 **/ 6277 static void 6278 lpfc_sli4_async_fc_evt(struct lpfc_hba *phba, struct lpfc_acqe_fc_la *acqe_fc) 6279 { 6280 LPFC_MBOXQ_t *pmb; 6281 MAILBOX_t *mb; 6282 struct lpfc_mbx_read_top *la; 6283 int rc; 6284 6285 if (bf_get(lpfc_trailer_type, acqe_fc) != 6286 LPFC_FC_LA_EVENT_TYPE_FC_LINK) { 6287 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 6288 "2895 Non FC link Event detected.(%d)\n", 6289 bf_get(lpfc_trailer_type, acqe_fc)); 6290 return; 6291 } 6292 6293 if (bf_get(lpfc_acqe_fc_la_att_type, acqe_fc) == 6294 LPFC_FC_LA_TYPE_TRUNKING_EVENT) { 6295 lpfc_update_trunk_link_status(phba, acqe_fc); 6296 return; 6297 } 6298 6299 /* Keep the link status for extra SLI4 state machine reference */ 6300 phba->sli4_hba.link_state.speed = 6301 lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_FC, 6302 bf_get(lpfc_acqe_fc_la_speed, acqe_fc)); 6303 phba->sli4_hba.link_state.duplex = LPFC_ASYNC_LINK_DUPLEX_FULL; 6304 phba->sli4_hba.link_state.topology = 6305 bf_get(lpfc_acqe_fc_la_topology, acqe_fc); 6306 phba->sli4_hba.link_state.status = 6307 bf_get(lpfc_acqe_fc_la_att_type, acqe_fc); 6308 phba->sli4_hba.link_state.type = 6309 bf_get(lpfc_acqe_fc_la_port_type, acqe_fc); 6310 phba->sli4_hba.link_state.number = 6311 bf_get(lpfc_acqe_fc_la_port_number, acqe_fc); 6312 phba->sli4_hba.link_state.fault = 6313 bf_get(lpfc_acqe_link_fault, acqe_fc); 6314 6315 if (bf_get(lpfc_acqe_fc_la_att_type, acqe_fc) == 6316 LPFC_FC_LA_TYPE_LINK_DOWN) 6317 phba->sli4_hba.link_state.logical_speed = 0; 6318 else if (!phba->sli4_hba.conf_trunk) 6319 phba->sli4_hba.link_state.logical_speed = 6320 bf_get(lpfc_acqe_fc_la_llink_spd, acqe_fc) * 10; 6321 6322 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 6323 "2896 Async FC event - Speed:%dGBaud Topology:x%x " 6324 "LA Type:x%x Port Type:%d Port Number:%d Logical speed:" 6325 "%dMbps Fault:%d\n", 6326 phba->sli4_hba.link_state.speed, 6327 phba->sli4_hba.link_state.topology, 6328 phba->sli4_hba.link_state.status, 6329 phba->sli4_hba.link_state.type, 6330 phba->sli4_hba.link_state.number, 6331 phba->sli4_hba.link_state.logical_speed, 6332 phba->sli4_hba.link_state.fault); 6333 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 6334 if (!pmb) { 6335 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 6336 "2897 The mboxq allocation failed\n"); 6337 return; 6338 } 6339 rc = lpfc_mbox_rsrc_prep(phba, pmb); 6340 if (rc) { 6341 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 6342 "2898 The mboxq prep failed\n"); 6343 goto out_free_pmb; 6344 } 6345 6346 /* Cleanup any outstanding ELS commands */ 6347 lpfc_els_flush_all_cmd(phba); 6348 6349 /* Block ELS IOCBs until we have done process link event */ 6350 phba->sli4_hba.els_wq->pring->flag |= LPFC_STOP_IOCB_EVENT; 6351 6352 /* Update link event statistics */ 6353 phba->sli.slistat.link_event++; 6354 6355 /* Create lpfc_handle_latt mailbox command from link ACQE */ 6356 lpfc_read_topology(phba, pmb, (struct lpfc_dmabuf *)pmb->ctx_buf); 6357 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology; 6358 pmb->vport = phba->pport; 6359 6360 if (phba->sli4_hba.link_state.status != LPFC_FC_LA_TYPE_LINK_UP) { 6361 phba->link_flag &= ~(LS_MDS_LINK_DOWN | LS_MDS_LOOPBACK); 6362 6363 switch (phba->sli4_hba.link_state.status) { 6364 case LPFC_FC_LA_TYPE_MDS_LINK_DOWN: 6365 phba->link_flag |= LS_MDS_LINK_DOWN; 6366 break; 6367 case LPFC_FC_LA_TYPE_MDS_LOOPBACK: 6368 phba->link_flag |= LS_MDS_LOOPBACK; 6369 break; 6370 default: 6371 break; 6372 } 6373 6374 /* Initialize completion status */ 6375 mb = &pmb->u.mb; 6376 mb->mbxStatus = MBX_SUCCESS; 6377 6378 /* Parse port fault information field */ 6379 lpfc_sli4_parse_latt_fault(phba, (void *)acqe_fc); 6380 6381 /* Parse and translate link attention fields */ 6382 la = (struct lpfc_mbx_read_top *)&pmb->u.mb.un.varReadTop; 6383 la->eventTag = acqe_fc->event_tag; 6384 6385 if (phba->sli4_hba.link_state.status == 6386 LPFC_FC_LA_TYPE_UNEXP_WWPN) { 6387 bf_set(lpfc_mbx_read_top_att_type, la, 6388 LPFC_FC_LA_TYPE_UNEXP_WWPN); 6389 } else { 6390 bf_set(lpfc_mbx_read_top_att_type, la, 6391 LPFC_FC_LA_TYPE_LINK_DOWN); 6392 } 6393 /* Invoke the mailbox command callback function */ 6394 lpfc_mbx_cmpl_read_topology(phba, pmb); 6395 6396 return; 6397 } 6398 6399 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT); 6400 if (rc == MBX_NOT_FINISHED) 6401 goto out_free_pmb; 6402 return; 6403 6404 out_free_pmb: 6405 lpfc_mbox_rsrc_cleanup(phba, pmb, MBOX_THD_UNLOCKED); 6406 } 6407 6408 /** 6409 * lpfc_sli4_async_sli_evt - Process the asynchronous SLI link event 6410 * @phba: pointer to lpfc hba data structure. 6411 * @acqe_sli: pointer to the async SLI completion queue entry. 6412 * 6413 * This routine is to handle the SLI4 asynchronous SLI events. 6414 **/ 6415 static void 6416 lpfc_sli4_async_sli_evt(struct lpfc_hba *phba, struct lpfc_acqe_sli *acqe_sli) 6417 { 6418 char port_name; 6419 char message[128]; 6420 uint8_t status; 6421 uint8_t evt_type; 6422 uint8_t operational = 0; 6423 struct temp_event temp_event_data; 6424 struct lpfc_acqe_misconfigured_event *misconfigured; 6425 struct lpfc_acqe_cgn_signal *cgn_signal; 6426 struct Scsi_Host *shost; 6427 struct lpfc_vport **vports; 6428 int rc, i, cnt; 6429 6430 evt_type = bf_get(lpfc_trailer_type, acqe_sli); 6431 6432 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 6433 "2901 Async SLI event - Type:%d, Event Data: x%08x " 6434 "x%08x x%08x x%08x\n", evt_type, 6435 acqe_sli->event_data1, acqe_sli->event_data2, 6436 acqe_sli->event_data3, acqe_sli->trailer); 6437 6438 port_name = phba->Port[0]; 6439 if (port_name == 0x00) 6440 port_name = '?'; /* get port name is empty */ 6441 6442 switch (evt_type) { 6443 case LPFC_SLI_EVENT_TYPE_OVER_TEMP: 6444 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT; 6445 temp_event_data.event_code = LPFC_THRESHOLD_TEMP; 6446 temp_event_data.data = (uint32_t)acqe_sli->event_data1; 6447 6448 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI, 6449 "3190 Over Temperature:%d Celsius- Port Name %c\n", 6450 acqe_sli->event_data1, port_name); 6451 6452 phba->sfp_warning |= LPFC_TRANSGRESSION_HIGH_TEMPERATURE; 6453 shost = lpfc_shost_from_vport(phba->pport); 6454 fc_host_post_vendor_event(shost, fc_get_event_number(), 6455 sizeof(temp_event_data), 6456 (char *)&temp_event_data, 6457 SCSI_NL_VID_TYPE_PCI 6458 | PCI_VENDOR_ID_EMULEX); 6459 break; 6460 case LPFC_SLI_EVENT_TYPE_NORM_TEMP: 6461 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT; 6462 temp_event_data.event_code = LPFC_NORMAL_TEMP; 6463 temp_event_data.data = (uint32_t)acqe_sli->event_data1; 6464 6465 lpfc_printf_log(phba, KERN_INFO, LOG_SLI | LOG_LDS_EVENT, 6466 "3191 Normal Temperature:%d Celsius - Port Name %c\n", 6467 acqe_sli->event_data1, port_name); 6468 6469 shost = lpfc_shost_from_vport(phba->pport); 6470 fc_host_post_vendor_event(shost, fc_get_event_number(), 6471 sizeof(temp_event_data), 6472 (char *)&temp_event_data, 6473 SCSI_NL_VID_TYPE_PCI 6474 | PCI_VENDOR_ID_EMULEX); 6475 break; 6476 case LPFC_SLI_EVENT_TYPE_MISCONFIGURED: 6477 misconfigured = (struct lpfc_acqe_misconfigured_event *) 6478 &acqe_sli->event_data1; 6479 6480 /* fetch the status for this port */ 6481 switch (phba->sli4_hba.lnk_info.lnk_no) { 6482 case LPFC_LINK_NUMBER_0: 6483 status = bf_get(lpfc_sli_misconfigured_port0_state, 6484 &misconfigured->theEvent); 6485 operational = bf_get(lpfc_sli_misconfigured_port0_op, 6486 &misconfigured->theEvent); 6487 break; 6488 case LPFC_LINK_NUMBER_1: 6489 status = bf_get(lpfc_sli_misconfigured_port1_state, 6490 &misconfigured->theEvent); 6491 operational = bf_get(lpfc_sli_misconfigured_port1_op, 6492 &misconfigured->theEvent); 6493 break; 6494 case LPFC_LINK_NUMBER_2: 6495 status = bf_get(lpfc_sli_misconfigured_port2_state, 6496 &misconfigured->theEvent); 6497 operational = bf_get(lpfc_sli_misconfigured_port2_op, 6498 &misconfigured->theEvent); 6499 break; 6500 case LPFC_LINK_NUMBER_3: 6501 status = bf_get(lpfc_sli_misconfigured_port3_state, 6502 &misconfigured->theEvent); 6503 operational = bf_get(lpfc_sli_misconfigured_port3_op, 6504 &misconfigured->theEvent); 6505 break; 6506 default: 6507 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 6508 "3296 " 6509 "LPFC_SLI_EVENT_TYPE_MISCONFIGURED " 6510 "event: Invalid link %d", 6511 phba->sli4_hba.lnk_info.lnk_no); 6512 return; 6513 } 6514 6515 /* Skip if optic state unchanged */ 6516 if (phba->sli4_hba.lnk_info.optic_state == status) 6517 return; 6518 6519 switch (status) { 6520 case LPFC_SLI_EVENT_STATUS_VALID: 6521 sprintf(message, "Physical Link is functional"); 6522 break; 6523 case LPFC_SLI_EVENT_STATUS_NOT_PRESENT: 6524 sprintf(message, "Optics faulted/incorrectly " 6525 "installed/not installed - Reseat optics, " 6526 "if issue not resolved, replace."); 6527 break; 6528 case LPFC_SLI_EVENT_STATUS_WRONG_TYPE: 6529 sprintf(message, 6530 "Optics of two types installed - Remove one " 6531 "optic or install matching pair of optics."); 6532 break; 6533 case LPFC_SLI_EVENT_STATUS_UNSUPPORTED: 6534 sprintf(message, "Incompatible optics - Replace with " 6535 "compatible optics for card to function."); 6536 break; 6537 case LPFC_SLI_EVENT_STATUS_UNQUALIFIED: 6538 sprintf(message, "Unqualified optics - Replace with " 6539 "Avago optics for Warranty and Technical " 6540 "Support - Link is%s operational", 6541 (operational) ? " not" : ""); 6542 break; 6543 case LPFC_SLI_EVENT_STATUS_UNCERTIFIED: 6544 sprintf(message, "Uncertified optics - Replace with " 6545 "Avago-certified optics to enable link " 6546 "operation - Link is%s operational", 6547 (operational) ? " not" : ""); 6548 break; 6549 default: 6550 /* firmware is reporting a status we don't know about */ 6551 sprintf(message, "Unknown event status x%02x", status); 6552 break; 6553 } 6554 6555 /* Issue READ_CONFIG mbox command to refresh supported speeds */ 6556 rc = lpfc_sli4_read_config(phba); 6557 if (rc) { 6558 phba->lmt = 0; 6559 lpfc_printf_log(phba, KERN_ERR, 6560 LOG_TRACE_EVENT, 6561 "3194 Unable to retrieve supported " 6562 "speeds, rc = 0x%x\n", rc); 6563 } 6564 rc = lpfc_sli4_refresh_params(phba); 6565 if (rc) { 6566 lpfc_printf_log(phba, KERN_ERR, LOG_SLI, 6567 "3174 Unable to update pls support, " 6568 "rc x%x\n", rc); 6569 } 6570 vports = lpfc_create_vport_work_array(phba); 6571 if (vports != NULL) { 6572 for (i = 0; i <= phba->max_vports && vports[i] != NULL; 6573 i++) { 6574 shost = lpfc_shost_from_vport(vports[i]); 6575 lpfc_host_supported_speeds_set(shost); 6576 } 6577 } 6578 lpfc_destroy_vport_work_array(phba, vports); 6579 6580 phba->sli4_hba.lnk_info.optic_state = status; 6581 lpfc_printf_log(phba, KERN_ERR, LOG_SLI, 6582 "3176 Port Name %c %s\n", port_name, message); 6583 break; 6584 case LPFC_SLI_EVENT_TYPE_REMOTE_DPORT: 6585 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 6586 "3192 Remote DPort Test Initiated - " 6587 "Event Data1:x%08x Event Data2: x%08x\n", 6588 acqe_sli->event_data1, acqe_sli->event_data2); 6589 break; 6590 case LPFC_SLI_EVENT_TYPE_PORT_PARAMS_CHG: 6591 /* Call FW to obtain active parms */ 6592 lpfc_sli4_cgn_parm_chg_evt(phba); 6593 break; 6594 case LPFC_SLI_EVENT_TYPE_MISCONF_FAWWN: 6595 /* Misconfigured WWN. Reports that the SLI Port is configured 6596 * to use FA-WWN, but the attached device doesn’t support it. 6597 * Event Data1 - N.A, Event Data2 - N.A 6598 * This event only happens on the physical port. 6599 */ 6600 lpfc_log_msg(phba, KERN_WARNING, LOG_SLI | LOG_DISCOVERY, 6601 "2699 Misconfigured FA-PWWN - Attached device " 6602 "does not support FA-PWWN\n"); 6603 phba->sli4_hba.fawwpn_flag &= ~LPFC_FAWWPN_FABRIC; 6604 memset(phba->pport->fc_portname.u.wwn, 0, 6605 sizeof(struct lpfc_name)); 6606 break; 6607 case LPFC_SLI_EVENT_TYPE_EEPROM_FAILURE: 6608 /* EEPROM failure. No driver action is required */ 6609 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI, 6610 "2518 EEPROM failure - " 6611 "Event Data1: x%08x Event Data2: x%08x\n", 6612 acqe_sli->event_data1, acqe_sli->event_data2); 6613 break; 6614 case LPFC_SLI_EVENT_TYPE_CGN_SIGNAL: 6615 if (phba->cmf_active_mode == LPFC_CFG_OFF) 6616 break; 6617 cgn_signal = (struct lpfc_acqe_cgn_signal *) 6618 &acqe_sli->event_data1; 6619 phba->cgn_acqe_cnt++; 6620 6621 cnt = bf_get(lpfc_warn_acqe, cgn_signal); 6622 atomic64_add(cnt, &phba->cgn_acqe_stat.warn); 6623 atomic64_add(cgn_signal->alarm_cnt, &phba->cgn_acqe_stat.alarm); 6624 6625 /* no threshold for CMF, even 1 signal will trigger an event */ 6626 6627 /* Alarm overrides warning, so check that first */ 6628 if (cgn_signal->alarm_cnt) { 6629 if (phba->cgn_reg_signal == EDC_CG_SIG_WARN_ALARM) { 6630 /* Keep track of alarm cnt for CMF_SYNC_WQE */ 6631 atomic_add(cgn_signal->alarm_cnt, 6632 &phba->cgn_sync_alarm_cnt); 6633 } 6634 } else if (cnt) { 6635 /* signal action needs to be taken */ 6636 if (phba->cgn_reg_signal == EDC_CG_SIG_WARN_ONLY || 6637 phba->cgn_reg_signal == EDC_CG_SIG_WARN_ALARM) { 6638 /* Keep track of warning cnt for CMF_SYNC_WQE */ 6639 atomic_add(cnt, &phba->cgn_sync_warn_cnt); 6640 } 6641 } 6642 break; 6643 case LPFC_SLI_EVENT_TYPE_RD_SIGNAL: 6644 /* May be accompanied by a temperature event */ 6645 lpfc_printf_log(phba, KERN_INFO, 6646 LOG_SLI | LOG_LINK_EVENT | LOG_LDS_EVENT, 6647 "2902 Remote Degrade Signaling: x%08x x%08x " 6648 "x%08x\n", 6649 acqe_sli->event_data1, acqe_sli->event_data2, 6650 acqe_sli->event_data3); 6651 break; 6652 default: 6653 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 6654 "3193 Unrecognized SLI event, type: 0x%x", 6655 evt_type); 6656 break; 6657 } 6658 } 6659 6660 /** 6661 * lpfc_sli4_perform_vport_cvl - Perform clear virtual link on a vport 6662 * @vport: pointer to vport data structure. 6663 * 6664 * This routine is to perform Clear Virtual Link (CVL) on a vport in 6665 * response to a CVL event. 6666 * 6667 * Return the pointer to the ndlp with the vport if successful, otherwise 6668 * return NULL. 6669 **/ 6670 static struct lpfc_nodelist * 6671 lpfc_sli4_perform_vport_cvl(struct lpfc_vport *vport) 6672 { 6673 struct lpfc_nodelist *ndlp; 6674 struct Scsi_Host *shost; 6675 struct lpfc_hba *phba; 6676 6677 if (!vport) 6678 return NULL; 6679 phba = vport->phba; 6680 if (!phba) 6681 return NULL; 6682 ndlp = lpfc_findnode_did(vport, Fabric_DID); 6683 if (!ndlp) { 6684 /* Cannot find existing Fabric ndlp, so allocate a new one */ 6685 ndlp = lpfc_nlp_init(vport, Fabric_DID); 6686 if (!ndlp) 6687 return NULL; 6688 /* Set the node type */ 6689 ndlp->nlp_type |= NLP_FABRIC; 6690 /* Put ndlp onto node list */ 6691 lpfc_enqueue_node(vport, ndlp); 6692 } 6693 if ((phba->pport->port_state < LPFC_FLOGI) && 6694 (phba->pport->port_state != LPFC_VPORT_FAILED)) 6695 return NULL; 6696 /* If virtual link is not yet instantiated ignore CVL */ 6697 if ((vport != phba->pport) && (vport->port_state < LPFC_FDISC) 6698 && (vport->port_state != LPFC_VPORT_FAILED)) 6699 return NULL; 6700 shost = lpfc_shost_from_vport(vport); 6701 if (!shost) 6702 return NULL; 6703 lpfc_linkdown_port(vport); 6704 lpfc_cleanup_pending_mbox(vport); 6705 spin_lock_irq(shost->host_lock); 6706 vport->fc_flag |= FC_VPORT_CVL_RCVD; 6707 spin_unlock_irq(shost->host_lock); 6708 6709 return ndlp; 6710 } 6711 6712 /** 6713 * lpfc_sli4_perform_all_vport_cvl - Perform clear virtual link on all vports 6714 * @phba: pointer to lpfc hba data structure. 6715 * 6716 * This routine is to perform Clear Virtual Link (CVL) on all vports in 6717 * response to a FCF dead event. 6718 **/ 6719 static void 6720 lpfc_sli4_perform_all_vport_cvl(struct lpfc_hba *phba) 6721 { 6722 struct lpfc_vport **vports; 6723 int i; 6724 6725 vports = lpfc_create_vport_work_array(phba); 6726 if (vports) 6727 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) 6728 lpfc_sli4_perform_vport_cvl(vports[i]); 6729 lpfc_destroy_vport_work_array(phba, vports); 6730 } 6731 6732 /** 6733 * lpfc_sli4_async_fip_evt - Process the asynchronous FCoE FIP event 6734 * @phba: pointer to lpfc hba data structure. 6735 * @acqe_fip: pointer to the async fcoe completion queue entry. 6736 * 6737 * This routine is to handle the SLI4 asynchronous fcoe event. 6738 **/ 6739 static void 6740 lpfc_sli4_async_fip_evt(struct lpfc_hba *phba, 6741 struct lpfc_acqe_fip *acqe_fip) 6742 { 6743 uint8_t event_type = bf_get(lpfc_trailer_type, acqe_fip); 6744 int rc; 6745 struct lpfc_vport *vport; 6746 struct lpfc_nodelist *ndlp; 6747 int active_vlink_present; 6748 struct lpfc_vport **vports; 6749 int i; 6750 6751 phba->fc_eventTag = acqe_fip->event_tag; 6752 phba->fcoe_eventtag = acqe_fip->event_tag; 6753 switch (event_type) { 6754 case LPFC_FIP_EVENT_TYPE_NEW_FCF: 6755 case LPFC_FIP_EVENT_TYPE_FCF_PARAM_MOD: 6756 if (event_type == LPFC_FIP_EVENT_TYPE_NEW_FCF) 6757 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 6758 "2546 New FCF event, evt_tag:x%x, " 6759 "index:x%x\n", 6760 acqe_fip->event_tag, 6761 acqe_fip->index); 6762 else 6763 lpfc_printf_log(phba, KERN_WARNING, LOG_FIP | 6764 LOG_DISCOVERY, 6765 "2788 FCF param modified event, " 6766 "evt_tag:x%x, index:x%x\n", 6767 acqe_fip->event_tag, 6768 acqe_fip->index); 6769 if (phba->fcf.fcf_flag & FCF_DISCOVERY) { 6770 /* 6771 * During period of FCF discovery, read the FCF 6772 * table record indexed by the event to update 6773 * FCF roundrobin failover eligible FCF bmask. 6774 */ 6775 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | 6776 LOG_DISCOVERY, 6777 "2779 Read FCF (x%x) for updating " 6778 "roundrobin FCF failover bmask\n", 6779 acqe_fip->index); 6780 rc = lpfc_sli4_read_fcf_rec(phba, acqe_fip->index); 6781 } 6782 6783 /* If the FCF discovery is in progress, do nothing. */ 6784 spin_lock_irq(&phba->hbalock); 6785 if (phba->hba_flag & FCF_TS_INPROG) { 6786 spin_unlock_irq(&phba->hbalock); 6787 break; 6788 } 6789 /* If fast FCF failover rescan event is pending, do nothing */ 6790 if (phba->fcf.fcf_flag & (FCF_REDISC_EVT | FCF_REDISC_PEND)) { 6791 spin_unlock_irq(&phba->hbalock); 6792 break; 6793 } 6794 6795 /* If the FCF has been in discovered state, do nothing. */ 6796 if (phba->fcf.fcf_flag & FCF_SCAN_DONE) { 6797 spin_unlock_irq(&phba->hbalock); 6798 break; 6799 } 6800 spin_unlock_irq(&phba->hbalock); 6801 6802 /* Otherwise, scan the entire FCF table and re-discover SAN */ 6803 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY, 6804 "2770 Start FCF table scan per async FCF " 6805 "event, evt_tag:x%x, index:x%x\n", 6806 acqe_fip->event_tag, acqe_fip->index); 6807 rc = lpfc_sli4_fcf_scan_read_fcf_rec(phba, 6808 LPFC_FCOE_FCF_GET_FIRST); 6809 if (rc) 6810 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 6811 "2547 Issue FCF scan read FCF mailbox " 6812 "command failed (x%x)\n", rc); 6813 break; 6814 6815 case LPFC_FIP_EVENT_TYPE_FCF_TABLE_FULL: 6816 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 6817 "2548 FCF Table full count 0x%x tag 0x%x\n", 6818 bf_get(lpfc_acqe_fip_fcf_count, acqe_fip), 6819 acqe_fip->event_tag); 6820 break; 6821 6822 case LPFC_FIP_EVENT_TYPE_FCF_DEAD: 6823 phba->fcoe_cvl_eventtag = acqe_fip->event_tag; 6824 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 6825 "2549 FCF (x%x) disconnected from network, " 6826 "tag:x%x\n", acqe_fip->index, 6827 acqe_fip->event_tag); 6828 /* 6829 * If we are in the middle of FCF failover process, clear 6830 * the corresponding FCF bit in the roundrobin bitmap. 6831 */ 6832 spin_lock_irq(&phba->hbalock); 6833 if ((phba->fcf.fcf_flag & FCF_DISCOVERY) && 6834 (phba->fcf.current_rec.fcf_indx != acqe_fip->index)) { 6835 spin_unlock_irq(&phba->hbalock); 6836 /* Update FLOGI FCF failover eligible FCF bmask */ 6837 lpfc_sli4_fcf_rr_index_clear(phba, acqe_fip->index); 6838 break; 6839 } 6840 spin_unlock_irq(&phba->hbalock); 6841 6842 /* If the event is not for currently used fcf do nothing */ 6843 if (phba->fcf.current_rec.fcf_indx != acqe_fip->index) 6844 break; 6845 6846 /* 6847 * Otherwise, request the port to rediscover the entire FCF 6848 * table for a fast recovery from case that the current FCF 6849 * is no longer valid as we are not in the middle of FCF 6850 * failover process already. 6851 */ 6852 spin_lock_irq(&phba->hbalock); 6853 /* Mark the fast failover process in progress */ 6854 phba->fcf.fcf_flag |= FCF_DEAD_DISC; 6855 spin_unlock_irq(&phba->hbalock); 6856 6857 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY, 6858 "2771 Start FCF fast failover process due to " 6859 "FCF DEAD event: evt_tag:x%x, fcf_index:x%x " 6860 "\n", acqe_fip->event_tag, acqe_fip->index); 6861 rc = lpfc_sli4_redisc_fcf_table(phba); 6862 if (rc) { 6863 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | 6864 LOG_TRACE_EVENT, 6865 "2772 Issue FCF rediscover mailbox " 6866 "command failed, fail through to FCF " 6867 "dead event\n"); 6868 spin_lock_irq(&phba->hbalock); 6869 phba->fcf.fcf_flag &= ~FCF_DEAD_DISC; 6870 spin_unlock_irq(&phba->hbalock); 6871 /* 6872 * Last resort will fail over by treating this 6873 * as a link down to FCF registration. 6874 */ 6875 lpfc_sli4_fcf_dead_failthrough(phba); 6876 } else { 6877 /* Reset FCF roundrobin bmask for new discovery */ 6878 lpfc_sli4_clear_fcf_rr_bmask(phba); 6879 /* 6880 * Handling fast FCF failover to a DEAD FCF event is 6881 * considered equalivant to receiving CVL to all vports. 6882 */ 6883 lpfc_sli4_perform_all_vport_cvl(phba); 6884 } 6885 break; 6886 case LPFC_FIP_EVENT_TYPE_CVL: 6887 phba->fcoe_cvl_eventtag = acqe_fip->event_tag; 6888 lpfc_printf_log(phba, KERN_ERR, 6889 LOG_TRACE_EVENT, 6890 "2718 Clear Virtual Link Received for VPI 0x%x" 6891 " tag 0x%x\n", acqe_fip->index, acqe_fip->event_tag); 6892 6893 vport = lpfc_find_vport_by_vpid(phba, 6894 acqe_fip->index); 6895 ndlp = lpfc_sli4_perform_vport_cvl(vport); 6896 if (!ndlp) 6897 break; 6898 active_vlink_present = 0; 6899 6900 vports = lpfc_create_vport_work_array(phba); 6901 if (vports) { 6902 for (i = 0; i <= phba->max_vports && vports[i] != NULL; 6903 i++) { 6904 if ((!(vports[i]->fc_flag & 6905 FC_VPORT_CVL_RCVD)) && 6906 (vports[i]->port_state > LPFC_FDISC)) { 6907 active_vlink_present = 1; 6908 break; 6909 } 6910 } 6911 lpfc_destroy_vport_work_array(phba, vports); 6912 } 6913 6914 /* 6915 * Don't re-instantiate if vport is marked for deletion. 6916 * If we are here first then vport_delete is going to wait 6917 * for discovery to complete. 6918 */ 6919 if (!(vport->load_flag & FC_UNLOADING) && 6920 active_vlink_present) { 6921 /* 6922 * If there are other active VLinks present, 6923 * re-instantiate the Vlink using FDISC. 6924 */ 6925 mod_timer(&ndlp->nlp_delayfunc, 6926 jiffies + msecs_to_jiffies(1000)); 6927 spin_lock_irq(&ndlp->lock); 6928 ndlp->nlp_flag |= NLP_DELAY_TMO; 6929 spin_unlock_irq(&ndlp->lock); 6930 ndlp->nlp_last_elscmd = ELS_CMD_FDISC; 6931 vport->port_state = LPFC_FDISC; 6932 } else { 6933 /* 6934 * Otherwise, we request port to rediscover 6935 * the entire FCF table for a fast recovery 6936 * from possible case that the current FCF 6937 * is no longer valid if we are not already 6938 * in the FCF failover process. 6939 */ 6940 spin_lock_irq(&phba->hbalock); 6941 if (phba->fcf.fcf_flag & FCF_DISCOVERY) { 6942 spin_unlock_irq(&phba->hbalock); 6943 break; 6944 } 6945 /* Mark the fast failover process in progress */ 6946 phba->fcf.fcf_flag |= FCF_ACVL_DISC; 6947 spin_unlock_irq(&phba->hbalock); 6948 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | 6949 LOG_DISCOVERY, 6950 "2773 Start FCF failover per CVL, " 6951 "evt_tag:x%x\n", acqe_fip->event_tag); 6952 rc = lpfc_sli4_redisc_fcf_table(phba); 6953 if (rc) { 6954 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | 6955 LOG_TRACE_EVENT, 6956 "2774 Issue FCF rediscover " 6957 "mailbox command failed, " 6958 "through to CVL event\n"); 6959 spin_lock_irq(&phba->hbalock); 6960 phba->fcf.fcf_flag &= ~FCF_ACVL_DISC; 6961 spin_unlock_irq(&phba->hbalock); 6962 /* 6963 * Last resort will be re-try on the 6964 * the current registered FCF entry. 6965 */ 6966 lpfc_retry_pport_discovery(phba); 6967 } else 6968 /* 6969 * Reset FCF roundrobin bmask for new 6970 * discovery. 6971 */ 6972 lpfc_sli4_clear_fcf_rr_bmask(phba); 6973 } 6974 break; 6975 default: 6976 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 6977 "0288 Unknown FCoE event type 0x%x event tag " 6978 "0x%x\n", event_type, acqe_fip->event_tag); 6979 break; 6980 } 6981 } 6982 6983 /** 6984 * lpfc_sli4_async_dcbx_evt - Process the asynchronous dcbx event 6985 * @phba: pointer to lpfc hba data structure. 6986 * @acqe_dcbx: pointer to the async dcbx completion queue entry. 6987 * 6988 * This routine is to handle the SLI4 asynchronous dcbx event. 6989 **/ 6990 static void 6991 lpfc_sli4_async_dcbx_evt(struct lpfc_hba *phba, 6992 struct lpfc_acqe_dcbx *acqe_dcbx) 6993 { 6994 phba->fc_eventTag = acqe_dcbx->event_tag; 6995 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 6996 "0290 The SLI4 DCBX asynchronous event is not " 6997 "handled yet\n"); 6998 } 6999 7000 /** 7001 * lpfc_sli4_async_grp5_evt - Process the asynchronous group5 event 7002 * @phba: pointer to lpfc hba data structure. 7003 * @acqe_grp5: pointer to the async grp5 completion queue entry. 7004 * 7005 * This routine is to handle the SLI4 asynchronous grp5 event. A grp5 event 7006 * is an asynchronous notified of a logical link speed change. The Port 7007 * reports the logical link speed in units of 10Mbps. 7008 **/ 7009 static void 7010 lpfc_sli4_async_grp5_evt(struct lpfc_hba *phba, 7011 struct lpfc_acqe_grp5 *acqe_grp5) 7012 { 7013 uint16_t prev_ll_spd; 7014 7015 phba->fc_eventTag = acqe_grp5->event_tag; 7016 phba->fcoe_eventtag = acqe_grp5->event_tag; 7017 prev_ll_spd = phba->sli4_hba.link_state.logical_speed; 7018 phba->sli4_hba.link_state.logical_speed = 7019 (bf_get(lpfc_acqe_grp5_llink_spd, acqe_grp5)) * 10; 7020 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 7021 "2789 GRP5 Async Event: Updating logical link speed " 7022 "from %dMbps to %dMbps\n", prev_ll_spd, 7023 phba->sli4_hba.link_state.logical_speed); 7024 } 7025 7026 /** 7027 * lpfc_sli4_async_cmstat_evt - Process the asynchronous cmstat event 7028 * @phba: pointer to lpfc hba data structure. 7029 * 7030 * This routine is to handle the SLI4 asynchronous cmstat event. A cmstat event 7031 * is an asynchronous notification of a request to reset CM stats. 7032 **/ 7033 static void 7034 lpfc_sli4_async_cmstat_evt(struct lpfc_hba *phba) 7035 { 7036 if (!phba->cgn_i) 7037 return; 7038 lpfc_init_congestion_stat(phba); 7039 } 7040 7041 /** 7042 * lpfc_cgn_params_val - Validate FW congestion parameters. 7043 * @phba: pointer to lpfc hba data structure. 7044 * @p_cfg_param: pointer to FW provided congestion parameters. 7045 * 7046 * This routine validates the congestion parameters passed 7047 * by the FW to the driver via an ACQE event. 7048 **/ 7049 static void 7050 lpfc_cgn_params_val(struct lpfc_hba *phba, struct lpfc_cgn_param *p_cfg_param) 7051 { 7052 spin_lock_irq(&phba->hbalock); 7053 7054 if (!lpfc_rangecheck(p_cfg_param->cgn_param_mode, LPFC_CFG_OFF, 7055 LPFC_CFG_MONITOR)) { 7056 lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT, 7057 "6225 CMF mode param out of range: %d\n", 7058 p_cfg_param->cgn_param_mode); 7059 p_cfg_param->cgn_param_mode = LPFC_CFG_OFF; 7060 } 7061 7062 spin_unlock_irq(&phba->hbalock); 7063 } 7064 7065 static const char * const lpfc_cmf_mode_to_str[] = { 7066 "OFF", 7067 "MANAGED", 7068 "MONITOR", 7069 }; 7070 7071 /** 7072 * lpfc_cgn_params_parse - Process a FW cong parm change event 7073 * @phba: pointer to lpfc hba data structure. 7074 * @p_cgn_param: pointer to a data buffer with the FW cong params. 7075 * @len: the size of pdata in bytes. 7076 * 7077 * This routine validates the congestion management buffer signature 7078 * from the FW, validates the contents and makes corrections for 7079 * valid, in-range values. If the signature magic is correct and 7080 * after parameter validation, the contents are copied to the driver's 7081 * @phba structure. If the magic is incorrect, an error message is 7082 * logged. 7083 **/ 7084 static void 7085 lpfc_cgn_params_parse(struct lpfc_hba *phba, 7086 struct lpfc_cgn_param *p_cgn_param, uint32_t len) 7087 { 7088 struct lpfc_cgn_info *cp; 7089 uint32_t crc, oldmode; 7090 char acr_string[4] = {0}; 7091 7092 /* Make sure the FW has encoded the correct magic number to 7093 * validate the congestion parameter in FW memory. 7094 */ 7095 if (p_cgn_param->cgn_param_magic == LPFC_CFG_PARAM_MAGIC_NUM) { 7096 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT | LOG_INIT, 7097 "4668 FW cgn parm buffer data: " 7098 "magic 0x%x version %d mode %d " 7099 "level0 %d level1 %d " 7100 "level2 %d byte13 %d " 7101 "byte14 %d byte15 %d " 7102 "byte11 %d byte12 %d activeMode %d\n", 7103 p_cgn_param->cgn_param_magic, 7104 p_cgn_param->cgn_param_version, 7105 p_cgn_param->cgn_param_mode, 7106 p_cgn_param->cgn_param_level0, 7107 p_cgn_param->cgn_param_level1, 7108 p_cgn_param->cgn_param_level2, 7109 p_cgn_param->byte13, 7110 p_cgn_param->byte14, 7111 p_cgn_param->byte15, 7112 p_cgn_param->byte11, 7113 p_cgn_param->byte12, 7114 phba->cmf_active_mode); 7115 7116 oldmode = phba->cmf_active_mode; 7117 7118 /* Any parameters out of range are corrected to defaults 7119 * by this routine. No need to fail. 7120 */ 7121 lpfc_cgn_params_val(phba, p_cgn_param); 7122 7123 /* Parameters are verified, move them into driver storage */ 7124 spin_lock_irq(&phba->hbalock); 7125 memcpy(&phba->cgn_p, p_cgn_param, 7126 sizeof(struct lpfc_cgn_param)); 7127 7128 /* Update parameters in congestion info buffer now */ 7129 if (phba->cgn_i) { 7130 cp = (struct lpfc_cgn_info *)phba->cgn_i->virt; 7131 cp->cgn_info_mode = phba->cgn_p.cgn_param_mode; 7132 cp->cgn_info_level0 = phba->cgn_p.cgn_param_level0; 7133 cp->cgn_info_level1 = phba->cgn_p.cgn_param_level1; 7134 cp->cgn_info_level2 = phba->cgn_p.cgn_param_level2; 7135 crc = lpfc_cgn_calc_crc32(cp, LPFC_CGN_INFO_SZ, 7136 LPFC_CGN_CRC32_SEED); 7137 cp->cgn_info_crc = cpu_to_le32(crc); 7138 } 7139 spin_unlock_irq(&phba->hbalock); 7140 7141 phba->cmf_active_mode = phba->cgn_p.cgn_param_mode; 7142 7143 switch (oldmode) { 7144 case LPFC_CFG_OFF: 7145 if (phba->cgn_p.cgn_param_mode != LPFC_CFG_OFF) { 7146 /* Turning CMF on */ 7147 lpfc_cmf_start(phba); 7148 7149 if (phba->link_state >= LPFC_LINK_UP) { 7150 phba->cgn_reg_fpin = 7151 phba->cgn_init_reg_fpin; 7152 phba->cgn_reg_signal = 7153 phba->cgn_init_reg_signal; 7154 lpfc_issue_els_edc(phba->pport, 0); 7155 } 7156 } 7157 break; 7158 case LPFC_CFG_MANAGED: 7159 switch (phba->cgn_p.cgn_param_mode) { 7160 case LPFC_CFG_OFF: 7161 /* Turning CMF off */ 7162 lpfc_cmf_stop(phba); 7163 if (phba->link_state >= LPFC_LINK_UP) 7164 lpfc_issue_els_edc(phba->pport, 0); 7165 break; 7166 case LPFC_CFG_MONITOR: 7167 phba->cmf_max_bytes_per_interval = 7168 phba->cmf_link_byte_count; 7169 7170 /* Resume blocked IO - unblock on workqueue */ 7171 queue_work(phba->wq, 7172 &phba->unblock_request_work); 7173 break; 7174 } 7175 break; 7176 case LPFC_CFG_MONITOR: 7177 switch (phba->cgn_p.cgn_param_mode) { 7178 case LPFC_CFG_OFF: 7179 /* Turning CMF off */ 7180 lpfc_cmf_stop(phba); 7181 if (phba->link_state >= LPFC_LINK_UP) 7182 lpfc_issue_els_edc(phba->pport, 0); 7183 break; 7184 case LPFC_CFG_MANAGED: 7185 lpfc_cmf_signal_init(phba); 7186 break; 7187 } 7188 break; 7189 } 7190 if (oldmode != LPFC_CFG_OFF || 7191 oldmode != phba->cgn_p.cgn_param_mode) { 7192 if (phba->cgn_p.cgn_param_mode == LPFC_CFG_MANAGED) 7193 scnprintf(acr_string, sizeof(acr_string), "%u", 7194 phba->cgn_p.cgn_param_level0); 7195 else 7196 scnprintf(acr_string, sizeof(acr_string), "NA"); 7197 7198 dev_info(&phba->pcidev->dev, "%d: " 7199 "4663 CMF: Mode %s acr %s\n", 7200 phba->brd_no, 7201 lpfc_cmf_mode_to_str 7202 [phba->cgn_p.cgn_param_mode], 7203 acr_string); 7204 } 7205 } else { 7206 lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT | LOG_INIT, 7207 "4669 FW cgn parm buf wrong magic 0x%x " 7208 "version %d\n", p_cgn_param->cgn_param_magic, 7209 p_cgn_param->cgn_param_version); 7210 } 7211 } 7212 7213 /** 7214 * lpfc_sli4_cgn_params_read - Read and Validate FW congestion parameters. 7215 * @phba: pointer to lpfc hba data structure. 7216 * 7217 * This routine issues a read_object mailbox command to 7218 * get the congestion management parameters from the FW 7219 * parses it and updates the driver maintained values. 7220 * 7221 * Returns 7222 * 0 if the object was empty 7223 * -Eval if an error was encountered 7224 * Count if bytes were read from object 7225 **/ 7226 int 7227 lpfc_sli4_cgn_params_read(struct lpfc_hba *phba) 7228 { 7229 int ret = 0; 7230 struct lpfc_cgn_param *p_cgn_param = NULL; 7231 u32 *pdata = NULL; 7232 u32 len = 0; 7233 7234 /* Find out if the FW has a new set of congestion parameters. */ 7235 len = sizeof(struct lpfc_cgn_param); 7236 pdata = kzalloc(len, GFP_KERNEL); 7237 ret = lpfc_read_object(phba, (char *)LPFC_PORT_CFG_NAME, 7238 pdata, len); 7239 7240 /* 0 means no data. A negative means error. A positive means 7241 * bytes were copied. 7242 */ 7243 if (!ret) { 7244 lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT | LOG_INIT, 7245 "4670 CGN RD OBJ returns no data\n"); 7246 goto rd_obj_err; 7247 } else if (ret < 0) { 7248 /* Some error. Just exit and return it to the caller.*/ 7249 goto rd_obj_err; 7250 } 7251 7252 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT | LOG_INIT, 7253 "6234 READ CGN PARAMS Successful %d\n", len); 7254 7255 /* Parse data pointer over len and update the phba congestion 7256 * parameters with values passed back. The receive rate values 7257 * may have been altered in FW, but take no action here. 7258 */ 7259 p_cgn_param = (struct lpfc_cgn_param *)pdata; 7260 lpfc_cgn_params_parse(phba, p_cgn_param, len); 7261 7262 rd_obj_err: 7263 kfree(pdata); 7264 return ret; 7265 } 7266 7267 /** 7268 * lpfc_sli4_cgn_parm_chg_evt - Process a FW congestion param change event 7269 * @phba: pointer to lpfc hba data structure. 7270 * 7271 * The FW generated Async ACQE SLI event calls this routine when 7272 * the event type is an SLI Internal Port Event and the Event Code 7273 * indicates a change to the FW maintained congestion parameters. 7274 * 7275 * This routine executes a Read_Object mailbox call to obtain the 7276 * current congestion parameters maintained in FW and corrects 7277 * the driver's active congestion parameters. 7278 * 7279 * The acqe event is not passed because there is no further data 7280 * required. 7281 * 7282 * Returns nonzero error if event processing encountered an error. 7283 * Zero otherwise for success. 7284 **/ 7285 static int 7286 lpfc_sli4_cgn_parm_chg_evt(struct lpfc_hba *phba) 7287 { 7288 int ret = 0; 7289 7290 if (!phba->sli4_hba.pc_sli4_params.cmf) { 7291 lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT | LOG_INIT, 7292 "4664 Cgn Evt when E2E off. Drop event\n"); 7293 return -EACCES; 7294 } 7295 7296 /* If the event is claiming an empty object, it's ok. A write 7297 * could have cleared it. Only error is a negative return 7298 * status. 7299 */ 7300 ret = lpfc_sli4_cgn_params_read(phba); 7301 if (ret < 0) { 7302 lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT | LOG_INIT, 7303 "4667 Error reading Cgn Params (%d)\n", 7304 ret); 7305 } else if (!ret) { 7306 lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT | LOG_INIT, 7307 "4673 CGN Event empty object.\n"); 7308 } 7309 return ret; 7310 } 7311 7312 /** 7313 * lpfc_sli4_async_event_proc - Process all the pending asynchronous event 7314 * @phba: pointer to lpfc hba data structure. 7315 * 7316 * This routine is invoked by the worker thread to process all the pending 7317 * SLI4 asynchronous events. 7318 **/ 7319 void lpfc_sli4_async_event_proc(struct lpfc_hba *phba) 7320 { 7321 struct lpfc_cq_event *cq_event; 7322 unsigned long iflags; 7323 7324 /* First, declare the async event has been handled */ 7325 spin_lock_irqsave(&phba->hbalock, iflags); 7326 phba->hba_flag &= ~ASYNC_EVENT; 7327 spin_unlock_irqrestore(&phba->hbalock, iflags); 7328 7329 /* Now, handle all the async events */ 7330 spin_lock_irqsave(&phba->sli4_hba.asynce_list_lock, iflags); 7331 while (!list_empty(&phba->sli4_hba.sp_asynce_work_queue)) { 7332 list_remove_head(&phba->sli4_hba.sp_asynce_work_queue, 7333 cq_event, struct lpfc_cq_event, list); 7334 spin_unlock_irqrestore(&phba->sli4_hba.asynce_list_lock, 7335 iflags); 7336 7337 /* Process the asynchronous event */ 7338 switch (bf_get(lpfc_trailer_code, &cq_event->cqe.mcqe_cmpl)) { 7339 case LPFC_TRAILER_CODE_LINK: 7340 lpfc_sli4_async_link_evt(phba, 7341 &cq_event->cqe.acqe_link); 7342 break; 7343 case LPFC_TRAILER_CODE_FCOE: 7344 lpfc_sli4_async_fip_evt(phba, &cq_event->cqe.acqe_fip); 7345 break; 7346 case LPFC_TRAILER_CODE_DCBX: 7347 lpfc_sli4_async_dcbx_evt(phba, 7348 &cq_event->cqe.acqe_dcbx); 7349 break; 7350 case LPFC_TRAILER_CODE_GRP5: 7351 lpfc_sli4_async_grp5_evt(phba, 7352 &cq_event->cqe.acqe_grp5); 7353 break; 7354 case LPFC_TRAILER_CODE_FC: 7355 lpfc_sli4_async_fc_evt(phba, &cq_event->cqe.acqe_fc); 7356 break; 7357 case LPFC_TRAILER_CODE_SLI: 7358 lpfc_sli4_async_sli_evt(phba, &cq_event->cqe.acqe_sli); 7359 break; 7360 case LPFC_TRAILER_CODE_CMSTAT: 7361 lpfc_sli4_async_cmstat_evt(phba); 7362 break; 7363 default: 7364 lpfc_printf_log(phba, KERN_ERR, 7365 LOG_TRACE_EVENT, 7366 "1804 Invalid asynchronous event code: " 7367 "x%x\n", bf_get(lpfc_trailer_code, 7368 &cq_event->cqe.mcqe_cmpl)); 7369 break; 7370 } 7371 7372 /* Free the completion event processed to the free pool */ 7373 lpfc_sli4_cq_event_release(phba, cq_event); 7374 spin_lock_irqsave(&phba->sli4_hba.asynce_list_lock, iflags); 7375 } 7376 spin_unlock_irqrestore(&phba->sli4_hba.asynce_list_lock, iflags); 7377 } 7378 7379 /** 7380 * lpfc_sli4_fcf_redisc_event_proc - Process fcf table rediscovery event 7381 * @phba: pointer to lpfc hba data structure. 7382 * 7383 * This routine is invoked by the worker thread to process FCF table 7384 * rediscovery pending completion event. 7385 **/ 7386 void lpfc_sli4_fcf_redisc_event_proc(struct lpfc_hba *phba) 7387 { 7388 int rc; 7389 7390 spin_lock_irq(&phba->hbalock); 7391 /* Clear FCF rediscovery timeout event */ 7392 phba->fcf.fcf_flag &= ~FCF_REDISC_EVT; 7393 /* Clear driver fast failover FCF record flag */ 7394 phba->fcf.failover_rec.flag = 0; 7395 /* Set state for FCF fast failover */ 7396 phba->fcf.fcf_flag |= FCF_REDISC_FOV; 7397 spin_unlock_irq(&phba->hbalock); 7398 7399 /* Scan FCF table from the first entry to re-discover SAN */ 7400 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY, 7401 "2777 Start post-quiescent FCF table scan\n"); 7402 rc = lpfc_sli4_fcf_scan_read_fcf_rec(phba, LPFC_FCOE_FCF_GET_FIRST); 7403 if (rc) 7404 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 7405 "2747 Issue FCF scan read FCF mailbox " 7406 "command failed 0x%x\n", rc); 7407 } 7408 7409 /** 7410 * lpfc_api_table_setup - Set up per hba pci-device group func api jump table 7411 * @phba: pointer to lpfc hba data structure. 7412 * @dev_grp: The HBA PCI-Device group number. 7413 * 7414 * This routine is invoked to set up the per HBA PCI-Device group function 7415 * API jump table entries. 7416 * 7417 * Return: 0 if success, otherwise -ENODEV 7418 **/ 7419 int 7420 lpfc_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp) 7421 { 7422 int rc; 7423 7424 /* Set up lpfc PCI-device group */ 7425 phba->pci_dev_grp = dev_grp; 7426 7427 /* The LPFC_PCI_DEV_OC uses SLI4 */ 7428 if (dev_grp == LPFC_PCI_DEV_OC) 7429 phba->sli_rev = LPFC_SLI_REV4; 7430 7431 /* Set up device INIT API function jump table */ 7432 rc = lpfc_init_api_table_setup(phba, dev_grp); 7433 if (rc) 7434 return -ENODEV; 7435 /* Set up SCSI API function jump table */ 7436 rc = lpfc_scsi_api_table_setup(phba, dev_grp); 7437 if (rc) 7438 return -ENODEV; 7439 /* Set up SLI API function jump table */ 7440 rc = lpfc_sli_api_table_setup(phba, dev_grp); 7441 if (rc) 7442 return -ENODEV; 7443 /* Set up MBOX API function jump table */ 7444 rc = lpfc_mbox_api_table_setup(phba, dev_grp); 7445 if (rc) 7446 return -ENODEV; 7447 7448 return 0; 7449 } 7450 7451 /** 7452 * lpfc_log_intr_mode - Log the active interrupt mode 7453 * @phba: pointer to lpfc hba data structure. 7454 * @intr_mode: active interrupt mode adopted. 7455 * 7456 * This routine it invoked to log the currently used active interrupt mode 7457 * to the device. 7458 **/ 7459 static void lpfc_log_intr_mode(struct lpfc_hba *phba, uint32_t intr_mode) 7460 { 7461 switch (intr_mode) { 7462 case 0: 7463 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 7464 "0470 Enable INTx interrupt mode.\n"); 7465 break; 7466 case 1: 7467 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 7468 "0481 Enabled MSI interrupt mode.\n"); 7469 break; 7470 case 2: 7471 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 7472 "0480 Enabled MSI-X interrupt mode.\n"); 7473 break; 7474 default: 7475 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 7476 "0482 Illegal interrupt mode.\n"); 7477 break; 7478 } 7479 return; 7480 } 7481 7482 /** 7483 * lpfc_enable_pci_dev - Enable a generic PCI device. 7484 * @phba: pointer to lpfc hba data structure. 7485 * 7486 * This routine is invoked to enable the PCI device that is common to all 7487 * PCI devices. 7488 * 7489 * Return codes 7490 * 0 - successful 7491 * other values - error 7492 **/ 7493 static int 7494 lpfc_enable_pci_dev(struct lpfc_hba *phba) 7495 { 7496 struct pci_dev *pdev; 7497 7498 /* Obtain PCI device reference */ 7499 if (!phba->pcidev) 7500 goto out_error; 7501 else 7502 pdev = phba->pcidev; 7503 /* Enable PCI device */ 7504 if (pci_enable_device_mem(pdev)) 7505 goto out_error; 7506 /* Request PCI resource for the device */ 7507 if (pci_request_mem_regions(pdev, LPFC_DRIVER_NAME)) 7508 goto out_disable_device; 7509 /* Set up device as PCI master and save state for EEH */ 7510 pci_set_master(pdev); 7511 pci_try_set_mwi(pdev); 7512 pci_save_state(pdev); 7513 7514 /* PCIe EEH recovery on powerpc platforms needs fundamental reset */ 7515 if (pci_is_pcie(pdev)) 7516 pdev->needs_freset = 1; 7517 7518 return 0; 7519 7520 out_disable_device: 7521 pci_disable_device(pdev); 7522 out_error: 7523 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 7524 "1401 Failed to enable pci device\n"); 7525 return -ENODEV; 7526 } 7527 7528 /** 7529 * lpfc_disable_pci_dev - Disable a generic PCI device. 7530 * @phba: pointer to lpfc hba data structure. 7531 * 7532 * This routine is invoked to disable the PCI device that is common to all 7533 * PCI devices. 7534 **/ 7535 static void 7536 lpfc_disable_pci_dev(struct lpfc_hba *phba) 7537 { 7538 struct pci_dev *pdev; 7539 7540 /* Obtain PCI device reference */ 7541 if (!phba->pcidev) 7542 return; 7543 else 7544 pdev = phba->pcidev; 7545 /* Release PCI resource and disable PCI device */ 7546 pci_release_mem_regions(pdev); 7547 pci_disable_device(pdev); 7548 7549 return; 7550 } 7551 7552 /** 7553 * lpfc_reset_hba - Reset a hba 7554 * @phba: pointer to lpfc hba data structure. 7555 * 7556 * This routine is invoked to reset a hba device. It brings the HBA 7557 * offline, performs a board restart, and then brings the board back 7558 * online. The lpfc_offline calls lpfc_sli_hba_down which will clean up 7559 * on outstanding mailbox commands. 7560 **/ 7561 void 7562 lpfc_reset_hba(struct lpfc_hba *phba) 7563 { 7564 /* If resets are disabled then set error state and return. */ 7565 if (!phba->cfg_enable_hba_reset) { 7566 phba->link_state = LPFC_HBA_ERROR; 7567 return; 7568 } 7569 7570 /* If not LPFC_SLI_ACTIVE, force all IO to be flushed */ 7571 if (phba->sli.sli_flag & LPFC_SLI_ACTIVE) { 7572 lpfc_offline_prep(phba, LPFC_MBX_WAIT); 7573 } else { 7574 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT); 7575 lpfc_sli_flush_io_rings(phba); 7576 } 7577 lpfc_offline(phba); 7578 lpfc_sli_brdrestart(phba); 7579 lpfc_online(phba); 7580 lpfc_unblock_mgmt_io(phba); 7581 } 7582 7583 /** 7584 * lpfc_sli_sriov_nr_virtfn_get - Get the number of sr-iov virtual functions 7585 * @phba: pointer to lpfc hba data structure. 7586 * 7587 * This function enables the PCI SR-IOV virtual functions to a physical 7588 * function. It invokes the PCI SR-IOV api with the @nr_vfn provided to 7589 * enable the number of virtual functions to the physical function. As 7590 * not all devices support SR-IOV, the return code from the pci_enable_sriov() 7591 * API call does not considered as an error condition for most of the device. 7592 **/ 7593 uint16_t 7594 lpfc_sli_sriov_nr_virtfn_get(struct lpfc_hba *phba) 7595 { 7596 struct pci_dev *pdev = phba->pcidev; 7597 uint16_t nr_virtfn; 7598 int pos; 7599 7600 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV); 7601 if (pos == 0) 7602 return 0; 7603 7604 pci_read_config_word(pdev, pos + PCI_SRIOV_TOTAL_VF, &nr_virtfn); 7605 return nr_virtfn; 7606 } 7607 7608 /** 7609 * lpfc_sli_probe_sriov_nr_virtfn - Enable a number of sr-iov virtual functions 7610 * @phba: pointer to lpfc hba data structure. 7611 * @nr_vfn: number of virtual functions to be enabled. 7612 * 7613 * This function enables the PCI SR-IOV virtual functions to a physical 7614 * function. It invokes the PCI SR-IOV api with the @nr_vfn provided to 7615 * enable the number of virtual functions to the physical function. As 7616 * not all devices support SR-IOV, the return code from the pci_enable_sriov() 7617 * API call does not considered as an error condition for most of the device. 7618 **/ 7619 int 7620 lpfc_sli_probe_sriov_nr_virtfn(struct lpfc_hba *phba, int nr_vfn) 7621 { 7622 struct pci_dev *pdev = phba->pcidev; 7623 uint16_t max_nr_vfn; 7624 int rc; 7625 7626 max_nr_vfn = lpfc_sli_sriov_nr_virtfn_get(phba); 7627 if (nr_vfn > max_nr_vfn) { 7628 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 7629 "3057 Requested vfs (%d) greater than " 7630 "supported vfs (%d)", nr_vfn, max_nr_vfn); 7631 return -EINVAL; 7632 } 7633 7634 rc = pci_enable_sriov(pdev, nr_vfn); 7635 if (rc) { 7636 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 7637 "2806 Failed to enable sriov on this device " 7638 "with vfn number nr_vf:%d, rc:%d\n", 7639 nr_vfn, rc); 7640 } else 7641 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 7642 "2807 Successful enable sriov on this device " 7643 "with vfn number nr_vf:%d\n", nr_vfn); 7644 return rc; 7645 } 7646 7647 static void 7648 lpfc_unblock_requests_work(struct work_struct *work) 7649 { 7650 struct lpfc_hba *phba = container_of(work, struct lpfc_hba, 7651 unblock_request_work); 7652 7653 lpfc_unblock_requests(phba); 7654 } 7655 7656 /** 7657 * lpfc_setup_driver_resource_phase1 - Phase1 etup driver internal resources. 7658 * @phba: pointer to lpfc hba data structure. 7659 * 7660 * This routine is invoked to set up the driver internal resources before the 7661 * device specific resource setup to support the HBA device it attached to. 7662 * 7663 * Return codes 7664 * 0 - successful 7665 * other values - error 7666 **/ 7667 static int 7668 lpfc_setup_driver_resource_phase1(struct lpfc_hba *phba) 7669 { 7670 struct lpfc_sli *psli = &phba->sli; 7671 7672 /* 7673 * Driver resources common to all SLI revisions 7674 */ 7675 atomic_set(&phba->fast_event_count, 0); 7676 atomic_set(&phba->dbg_log_idx, 0); 7677 atomic_set(&phba->dbg_log_cnt, 0); 7678 atomic_set(&phba->dbg_log_dmping, 0); 7679 spin_lock_init(&phba->hbalock); 7680 7681 /* Initialize port_list spinlock */ 7682 spin_lock_init(&phba->port_list_lock); 7683 INIT_LIST_HEAD(&phba->port_list); 7684 7685 INIT_LIST_HEAD(&phba->work_list); 7686 7687 /* Initialize the wait queue head for the kernel thread */ 7688 init_waitqueue_head(&phba->work_waitq); 7689 7690 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 7691 "1403 Protocols supported %s %s %s\n", 7692 ((phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) ? 7693 "SCSI" : " "), 7694 ((phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) ? 7695 "NVME" : " "), 7696 (phba->nvmet_support ? "NVMET" : " ")); 7697 7698 /* Initialize the IO buffer list used by driver for SLI3 SCSI */ 7699 spin_lock_init(&phba->scsi_buf_list_get_lock); 7700 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_get); 7701 spin_lock_init(&phba->scsi_buf_list_put_lock); 7702 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_put); 7703 7704 /* Initialize the fabric iocb list */ 7705 INIT_LIST_HEAD(&phba->fabric_iocb_list); 7706 7707 /* Initialize list to save ELS buffers */ 7708 INIT_LIST_HEAD(&phba->elsbuf); 7709 7710 /* Initialize FCF connection rec list */ 7711 INIT_LIST_HEAD(&phba->fcf_conn_rec_list); 7712 7713 /* Initialize OAS configuration list */ 7714 spin_lock_init(&phba->devicelock); 7715 INIT_LIST_HEAD(&phba->luns); 7716 7717 /* MBOX heartbeat timer */ 7718 timer_setup(&psli->mbox_tmo, lpfc_mbox_timeout, 0); 7719 /* Fabric block timer */ 7720 timer_setup(&phba->fabric_block_timer, lpfc_fabric_block_timeout, 0); 7721 /* EA polling mode timer */ 7722 timer_setup(&phba->eratt_poll, lpfc_poll_eratt, 0); 7723 /* Heartbeat timer */ 7724 timer_setup(&phba->hb_tmofunc, lpfc_hb_timeout, 0); 7725 7726 INIT_DELAYED_WORK(&phba->eq_delay_work, lpfc_hb_eq_delay_work); 7727 7728 INIT_DELAYED_WORK(&phba->idle_stat_delay_work, 7729 lpfc_idle_stat_delay_work); 7730 INIT_WORK(&phba->unblock_request_work, lpfc_unblock_requests_work); 7731 return 0; 7732 } 7733 7734 /** 7735 * lpfc_sli_driver_resource_setup - Setup driver internal resources for SLI3 dev 7736 * @phba: pointer to lpfc hba data structure. 7737 * 7738 * This routine is invoked to set up the driver internal resources specific to 7739 * support the SLI-3 HBA device it attached to. 7740 * 7741 * Return codes 7742 * 0 - successful 7743 * other values - error 7744 **/ 7745 static int 7746 lpfc_sli_driver_resource_setup(struct lpfc_hba *phba) 7747 { 7748 int rc, entry_sz; 7749 7750 /* 7751 * Initialize timers used by driver 7752 */ 7753 7754 /* FCP polling mode timer */ 7755 timer_setup(&phba->fcp_poll_timer, lpfc_poll_timeout, 0); 7756 7757 /* Host attention work mask setup */ 7758 phba->work_ha_mask = (HA_ERATT | HA_MBATT | HA_LATT); 7759 phba->work_ha_mask |= (HA_RXMASK << (LPFC_ELS_RING * 4)); 7760 7761 /* Get all the module params for configuring this host */ 7762 lpfc_get_cfgparam(phba); 7763 /* Set up phase-1 common device driver resources */ 7764 7765 rc = lpfc_setup_driver_resource_phase1(phba); 7766 if (rc) 7767 return -ENODEV; 7768 7769 if (!phba->sli.sli3_ring) 7770 phba->sli.sli3_ring = kcalloc(LPFC_SLI3_MAX_RING, 7771 sizeof(struct lpfc_sli_ring), 7772 GFP_KERNEL); 7773 if (!phba->sli.sli3_ring) 7774 return -ENOMEM; 7775 7776 /* 7777 * Since lpfc_sg_seg_cnt is module parameter, the sg_dma_buf_size 7778 * used to create the sg_dma_buf_pool must be dynamically calculated. 7779 */ 7780 7781 if (phba->sli_rev == LPFC_SLI_REV4) 7782 entry_sz = sizeof(struct sli4_sge); 7783 else 7784 entry_sz = sizeof(struct ulp_bde64); 7785 7786 /* There are going to be 2 reserved BDEs: 1 FCP cmnd + 1 FCP rsp */ 7787 if (phba->cfg_enable_bg) { 7788 /* 7789 * The scsi_buf for a T10-DIF I/O will hold the FCP cmnd, 7790 * the FCP rsp, and a BDE for each. Sice we have no control 7791 * over how many protection data segments the SCSI Layer 7792 * will hand us (ie: there could be one for every block 7793 * in the IO), we just allocate enough BDEs to accomidate 7794 * our max amount and we need to limit lpfc_sg_seg_cnt to 7795 * minimize the risk of running out. 7796 */ 7797 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) + 7798 sizeof(struct fcp_rsp) + 7799 (LPFC_MAX_SG_SEG_CNT * entry_sz); 7800 7801 if (phba->cfg_sg_seg_cnt > LPFC_MAX_SG_SEG_CNT_DIF) 7802 phba->cfg_sg_seg_cnt = LPFC_MAX_SG_SEG_CNT_DIF; 7803 7804 /* Total BDEs in BPL for scsi_sg_list and scsi_sg_prot_list */ 7805 phba->cfg_total_seg_cnt = LPFC_MAX_SG_SEG_CNT; 7806 } else { 7807 /* 7808 * The scsi_buf for a regular I/O will hold the FCP cmnd, 7809 * the FCP rsp, a BDE for each, and a BDE for up to 7810 * cfg_sg_seg_cnt data segments. 7811 */ 7812 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) + 7813 sizeof(struct fcp_rsp) + 7814 ((phba->cfg_sg_seg_cnt + 2) * entry_sz); 7815 7816 /* Total BDEs in BPL for scsi_sg_list */ 7817 phba->cfg_total_seg_cnt = phba->cfg_sg_seg_cnt + 2; 7818 } 7819 7820 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP, 7821 "9088 INIT sg_tablesize:%d dmabuf_size:%d total_bde:%d\n", 7822 phba->cfg_sg_seg_cnt, phba->cfg_sg_dma_buf_size, 7823 phba->cfg_total_seg_cnt); 7824 7825 phba->max_vpi = LPFC_MAX_VPI; 7826 /* This will be set to correct value after config_port mbox */ 7827 phba->max_vports = 0; 7828 7829 /* 7830 * Initialize the SLI Layer to run with lpfc HBAs. 7831 */ 7832 lpfc_sli_setup(phba); 7833 lpfc_sli_queue_init(phba); 7834 7835 /* Allocate device driver memory */ 7836 if (lpfc_mem_alloc(phba, BPL_ALIGN_SZ)) 7837 return -ENOMEM; 7838 7839 phba->lpfc_sg_dma_buf_pool = 7840 dma_pool_create("lpfc_sg_dma_buf_pool", 7841 &phba->pcidev->dev, phba->cfg_sg_dma_buf_size, 7842 BPL_ALIGN_SZ, 0); 7843 7844 if (!phba->lpfc_sg_dma_buf_pool) 7845 goto fail_free_mem; 7846 7847 phba->lpfc_cmd_rsp_buf_pool = 7848 dma_pool_create("lpfc_cmd_rsp_buf_pool", 7849 &phba->pcidev->dev, 7850 sizeof(struct fcp_cmnd) + 7851 sizeof(struct fcp_rsp), 7852 BPL_ALIGN_SZ, 0); 7853 7854 if (!phba->lpfc_cmd_rsp_buf_pool) 7855 goto fail_free_dma_buf_pool; 7856 7857 /* 7858 * Enable sr-iov virtual functions if supported and configured 7859 * through the module parameter. 7860 */ 7861 if (phba->cfg_sriov_nr_virtfn > 0) { 7862 rc = lpfc_sli_probe_sriov_nr_virtfn(phba, 7863 phba->cfg_sriov_nr_virtfn); 7864 if (rc) { 7865 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 7866 "2808 Requested number of SR-IOV " 7867 "virtual functions (%d) is not " 7868 "supported\n", 7869 phba->cfg_sriov_nr_virtfn); 7870 phba->cfg_sriov_nr_virtfn = 0; 7871 } 7872 } 7873 7874 return 0; 7875 7876 fail_free_dma_buf_pool: 7877 dma_pool_destroy(phba->lpfc_sg_dma_buf_pool); 7878 phba->lpfc_sg_dma_buf_pool = NULL; 7879 fail_free_mem: 7880 lpfc_mem_free(phba); 7881 return -ENOMEM; 7882 } 7883 7884 /** 7885 * lpfc_sli_driver_resource_unset - Unset drvr internal resources for SLI3 dev 7886 * @phba: pointer to lpfc hba data structure. 7887 * 7888 * This routine is invoked to unset the driver internal resources set up 7889 * specific for supporting the SLI-3 HBA device it attached to. 7890 **/ 7891 static void 7892 lpfc_sli_driver_resource_unset(struct lpfc_hba *phba) 7893 { 7894 /* Free device driver memory allocated */ 7895 lpfc_mem_free_all(phba); 7896 7897 return; 7898 } 7899 7900 /** 7901 * lpfc_sli4_driver_resource_setup - Setup drvr internal resources for SLI4 dev 7902 * @phba: pointer to lpfc hba data structure. 7903 * 7904 * This routine is invoked to set up the driver internal resources specific to 7905 * support the SLI-4 HBA device it attached to. 7906 * 7907 * Return codes 7908 * 0 - successful 7909 * other values - error 7910 **/ 7911 static int 7912 lpfc_sli4_driver_resource_setup(struct lpfc_hba *phba) 7913 { 7914 LPFC_MBOXQ_t *mboxq; 7915 MAILBOX_t *mb; 7916 int rc, i, max_buf_size; 7917 int longs; 7918 int extra; 7919 uint64_t wwn; 7920 u32 if_type; 7921 u32 if_fam; 7922 7923 phba->sli4_hba.num_present_cpu = lpfc_present_cpu; 7924 phba->sli4_hba.num_possible_cpu = cpumask_last(cpu_possible_mask) + 1; 7925 phba->sli4_hba.curr_disp_cpu = 0; 7926 7927 /* Get all the module params for configuring this host */ 7928 lpfc_get_cfgparam(phba); 7929 7930 /* Set up phase-1 common device driver resources */ 7931 rc = lpfc_setup_driver_resource_phase1(phba); 7932 if (rc) 7933 return -ENODEV; 7934 7935 /* Before proceed, wait for POST done and device ready */ 7936 rc = lpfc_sli4_post_status_check(phba); 7937 if (rc) 7938 return -ENODEV; 7939 7940 /* Allocate all driver workqueues here */ 7941 7942 /* The lpfc_wq workqueue for deferred irq use */ 7943 phba->wq = alloc_workqueue("lpfc_wq", WQ_MEM_RECLAIM, 0); 7944 if (!phba->wq) 7945 return -ENOMEM; 7946 7947 /* 7948 * Initialize timers used by driver 7949 */ 7950 7951 timer_setup(&phba->rrq_tmr, lpfc_rrq_timeout, 0); 7952 7953 /* FCF rediscover timer */ 7954 timer_setup(&phba->fcf.redisc_wait, lpfc_sli4_fcf_redisc_wait_tmo, 0); 7955 7956 /* CMF congestion timer */ 7957 hrtimer_init(&phba->cmf_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); 7958 phba->cmf_timer.function = lpfc_cmf_timer; 7959 7960 /* 7961 * Control structure for handling external multi-buffer mailbox 7962 * command pass-through. 7963 */ 7964 memset((uint8_t *)&phba->mbox_ext_buf_ctx, 0, 7965 sizeof(struct lpfc_mbox_ext_buf_ctx)); 7966 INIT_LIST_HEAD(&phba->mbox_ext_buf_ctx.ext_dmabuf_list); 7967 7968 phba->max_vpi = LPFC_MAX_VPI; 7969 7970 /* This will be set to correct value after the read_config mbox */ 7971 phba->max_vports = 0; 7972 7973 /* Program the default value of vlan_id and fc_map */ 7974 phba->valid_vlan = 0; 7975 phba->fc_map[0] = LPFC_FCOE_FCF_MAP0; 7976 phba->fc_map[1] = LPFC_FCOE_FCF_MAP1; 7977 phba->fc_map[2] = LPFC_FCOE_FCF_MAP2; 7978 7979 /* 7980 * For SLI4, instead of using ring 0 (LPFC_FCP_RING) for FCP commands 7981 * we will associate a new ring, for each EQ/CQ/WQ tuple. 7982 * The WQ create will allocate the ring. 7983 */ 7984 7985 /* Initialize buffer queue management fields */ 7986 INIT_LIST_HEAD(&phba->hbqs[LPFC_ELS_HBQ].hbq_buffer_list); 7987 phba->hbqs[LPFC_ELS_HBQ].hbq_alloc_buffer = lpfc_sli4_rb_alloc; 7988 phba->hbqs[LPFC_ELS_HBQ].hbq_free_buffer = lpfc_sli4_rb_free; 7989 7990 /* for VMID idle timeout if VMID is enabled */ 7991 if (lpfc_is_vmid_enabled(phba)) 7992 timer_setup(&phba->inactive_vmid_poll, lpfc_vmid_poll, 0); 7993 7994 /* 7995 * Initialize the SLI Layer to run with lpfc SLI4 HBAs. 7996 */ 7997 /* Initialize the Abort buffer list used by driver */ 7998 spin_lock_init(&phba->sli4_hba.abts_io_buf_list_lock); 7999 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_io_buf_list); 8000 8001 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 8002 /* Initialize the Abort nvme buffer list used by driver */ 8003 spin_lock_init(&phba->sli4_hba.abts_nvmet_buf_list_lock); 8004 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list); 8005 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_nvmet_io_wait_list); 8006 spin_lock_init(&phba->sli4_hba.t_active_list_lock); 8007 INIT_LIST_HEAD(&phba->sli4_hba.t_active_ctx_list); 8008 } 8009 8010 /* This abort list used by worker thread */ 8011 spin_lock_init(&phba->sli4_hba.sgl_list_lock); 8012 spin_lock_init(&phba->sli4_hba.nvmet_io_wait_lock); 8013 spin_lock_init(&phba->sli4_hba.asynce_list_lock); 8014 spin_lock_init(&phba->sli4_hba.els_xri_abrt_list_lock); 8015 8016 /* 8017 * Initialize driver internal slow-path work queues 8018 */ 8019 8020 /* Driver internel slow-path CQ Event pool */ 8021 INIT_LIST_HEAD(&phba->sli4_hba.sp_cqe_event_pool); 8022 /* Response IOCB work queue list */ 8023 INIT_LIST_HEAD(&phba->sli4_hba.sp_queue_event); 8024 /* Asynchronous event CQ Event work queue list */ 8025 INIT_LIST_HEAD(&phba->sli4_hba.sp_asynce_work_queue); 8026 /* Slow-path XRI aborted CQ Event work queue list */ 8027 INIT_LIST_HEAD(&phba->sli4_hba.sp_els_xri_aborted_work_queue); 8028 /* Receive queue CQ Event work queue list */ 8029 INIT_LIST_HEAD(&phba->sli4_hba.sp_unsol_work_queue); 8030 8031 /* Initialize extent block lists. */ 8032 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_rpi_blk_list); 8033 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_xri_blk_list); 8034 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_vfi_blk_list); 8035 INIT_LIST_HEAD(&phba->lpfc_vpi_blk_list); 8036 8037 /* Initialize mboxq lists. If the early init routines fail 8038 * these lists need to be correctly initialized. 8039 */ 8040 INIT_LIST_HEAD(&phba->sli.mboxq); 8041 INIT_LIST_HEAD(&phba->sli.mboxq_cmpl); 8042 8043 /* initialize optic_state to 0xFF */ 8044 phba->sli4_hba.lnk_info.optic_state = 0xff; 8045 8046 /* Allocate device driver memory */ 8047 rc = lpfc_mem_alloc(phba, SGL_ALIGN_SZ); 8048 if (rc) 8049 goto out_destroy_workqueue; 8050 8051 /* IF Type 2 ports get initialized now. */ 8052 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) >= 8053 LPFC_SLI_INTF_IF_TYPE_2) { 8054 rc = lpfc_pci_function_reset(phba); 8055 if (unlikely(rc)) { 8056 rc = -ENODEV; 8057 goto out_free_mem; 8058 } 8059 phba->temp_sensor_support = 1; 8060 } 8061 8062 /* Create the bootstrap mailbox command */ 8063 rc = lpfc_create_bootstrap_mbox(phba); 8064 if (unlikely(rc)) 8065 goto out_free_mem; 8066 8067 /* Set up the host's endian order with the device. */ 8068 rc = lpfc_setup_endian_order(phba); 8069 if (unlikely(rc)) 8070 goto out_free_bsmbx; 8071 8072 /* Set up the hba's configuration parameters. */ 8073 rc = lpfc_sli4_read_config(phba); 8074 if (unlikely(rc)) 8075 goto out_free_bsmbx; 8076 8077 if (phba->sli4_hba.fawwpn_flag & LPFC_FAWWPN_CONFIG) { 8078 /* Right now the link is down, if FA-PWWN is configured the 8079 * firmware will try FLOGI before the driver gets a link up. 8080 * If it fails, the driver should get a MISCONFIGURED async 8081 * event which will clear this flag. The only notification 8082 * the driver gets is if it fails, if it succeeds there is no 8083 * notification given. Assume success. 8084 */ 8085 phba->sli4_hba.fawwpn_flag |= LPFC_FAWWPN_FABRIC; 8086 } 8087 8088 rc = lpfc_mem_alloc_active_rrq_pool_s4(phba); 8089 if (unlikely(rc)) 8090 goto out_free_bsmbx; 8091 8092 /* IF Type 0 ports get initialized now. */ 8093 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) == 8094 LPFC_SLI_INTF_IF_TYPE_0) { 8095 rc = lpfc_pci_function_reset(phba); 8096 if (unlikely(rc)) 8097 goto out_free_bsmbx; 8098 } 8099 8100 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, 8101 GFP_KERNEL); 8102 if (!mboxq) { 8103 rc = -ENOMEM; 8104 goto out_free_bsmbx; 8105 } 8106 8107 /* Check for NVMET being configured */ 8108 phba->nvmet_support = 0; 8109 if (lpfc_enable_nvmet_cnt) { 8110 8111 /* First get WWN of HBA instance */ 8112 lpfc_read_nv(phba, mboxq); 8113 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); 8114 if (rc != MBX_SUCCESS) { 8115 lpfc_printf_log(phba, KERN_ERR, 8116 LOG_TRACE_EVENT, 8117 "6016 Mailbox failed , mbxCmd x%x " 8118 "READ_NV, mbxStatus x%x\n", 8119 bf_get(lpfc_mqe_command, &mboxq->u.mqe), 8120 bf_get(lpfc_mqe_status, &mboxq->u.mqe)); 8121 mempool_free(mboxq, phba->mbox_mem_pool); 8122 rc = -EIO; 8123 goto out_free_bsmbx; 8124 } 8125 mb = &mboxq->u.mb; 8126 memcpy(&wwn, (char *)mb->un.varRDnvp.nodename, 8127 sizeof(uint64_t)); 8128 wwn = cpu_to_be64(wwn); 8129 phba->sli4_hba.wwnn.u.name = wwn; 8130 memcpy(&wwn, (char *)mb->un.varRDnvp.portname, 8131 sizeof(uint64_t)); 8132 /* wwn is WWPN of HBA instance */ 8133 wwn = cpu_to_be64(wwn); 8134 phba->sli4_hba.wwpn.u.name = wwn; 8135 8136 /* Check to see if it matches any module parameter */ 8137 for (i = 0; i < lpfc_enable_nvmet_cnt; i++) { 8138 if (wwn == lpfc_enable_nvmet[i]) { 8139 #if (IS_ENABLED(CONFIG_NVME_TARGET_FC)) 8140 if (lpfc_nvmet_mem_alloc(phba)) 8141 break; 8142 8143 phba->nvmet_support = 1; /* a match */ 8144 8145 lpfc_printf_log(phba, KERN_ERR, 8146 LOG_TRACE_EVENT, 8147 "6017 NVME Target %016llx\n", 8148 wwn); 8149 #else 8150 lpfc_printf_log(phba, KERN_ERR, 8151 LOG_TRACE_EVENT, 8152 "6021 Can't enable NVME Target." 8153 " NVME_TARGET_FC infrastructure" 8154 " is not in kernel\n"); 8155 #endif 8156 /* Not supported for NVMET */ 8157 phba->cfg_xri_rebalancing = 0; 8158 if (phba->irq_chann_mode == NHT_MODE) { 8159 phba->cfg_irq_chann = 8160 phba->sli4_hba.num_present_cpu; 8161 phba->cfg_hdw_queue = 8162 phba->sli4_hba.num_present_cpu; 8163 phba->irq_chann_mode = NORMAL_MODE; 8164 } 8165 break; 8166 } 8167 } 8168 } 8169 8170 lpfc_nvme_mod_param_dep(phba); 8171 8172 /* 8173 * Get sli4 parameters that override parameters from Port capabilities. 8174 * If this call fails, it isn't critical unless the SLI4 parameters come 8175 * back in conflict. 8176 */ 8177 rc = lpfc_get_sli4_parameters(phba, mboxq); 8178 if (rc) { 8179 if_type = bf_get(lpfc_sli_intf_if_type, 8180 &phba->sli4_hba.sli_intf); 8181 if_fam = bf_get(lpfc_sli_intf_sli_family, 8182 &phba->sli4_hba.sli_intf); 8183 if (phba->sli4_hba.extents_in_use && 8184 phba->sli4_hba.rpi_hdrs_in_use) { 8185 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 8186 "2999 Unsupported SLI4 Parameters " 8187 "Extents and RPI headers enabled.\n"); 8188 if (if_type == LPFC_SLI_INTF_IF_TYPE_0 && 8189 if_fam == LPFC_SLI_INTF_FAMILY_BE2) { 8190 mempool_free(mboxq, phba->mbox_mem_pool); 8191 rc = -EIO; 8192 goto out_free_bsmbx; 8193 } 8194 } 8195 if (!(if_type == LPFC_SLI_INTF_IF_TYPE_0 && 8196 if_fam == LPFC_SLI_INTF_FAMILY_BE2)) { 8197 mempool_free(mboxq, phba->mbox_mem_pool); 8198 rc = -EIO; 8199 goto out_free_bsmbx; 8200 } 8201 } 8202 8203 /* 8204 * 1 for cmd, 1 for rsp, NVME adds an extra one 8205 * for boundary conditions in its max_sgl_segment template. 8206 */ 8207 extra = 2; 8208 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) 8209 extra++; 8210 8211 /* 8212 * It doesn't matter what family our adapter is in, we are 8213 * limited to 2 Pages, 512 SGEs, for our SGL. 8214 * There are going to be 2 reserved SGEs: 1 FCP cmnd + 1 FCP rsp 8215 */ 8216 max_buf_size = (2 * SLI4_PAGE_SIZE); 8217 8218 /* 8219 * Since lpfc_sg_seg_cnt is module param, the sg_dma_buf_size 8220 * used to create the sg_dma_buf_pool must be calculated. 8221 */ 8222 if (phba->sli3_options & LPFC_SLI3_BG_ENABLED) { 8223 /* Both cfg_enable_bg and cfg_external_dif code paths */ 8224 8225 /* 8226 * The scsi_buf for a T10-DIF I/O holds the FCP cmnd, 8227 * the FCP rsp, and a SGE. Sice we have no control 8228 * over how many protection segments the SCSI Layer 8229 * will hand us (ie: there could be one for every block 8230 * in the IO), just allocate enough SGEs to accomidate 8231 * our max amount and we need to limit lpfc_sg_seg_cnt 8232 * to minimize the risk of running out. 8233 */ 8234 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) + 8235 sizeof(struct fcp_rsp) + max_buf_size; 8236 8237 /* Total SGEs for scsi_sg_list and scsi_sg_prot_list */ 8238 phba->cfg_total_seg_cnt = LPFC_MAX_SGL_SEG_CNT; 8239 8240 /* 8241 * If supporting DIF, reduce the seg count for scsi to 8242 * allow room for the DIF sges. 8243 */ 8244 if (phba->cfg_enable_bg && 8245 phba->cfg_sg_seg_cnt > LPFC_MAX_BG_SLI4_SEG_CNT_DIF) 8246 phba->cfg_scsi_seg_cnt = LPFC_MAX_BG_SLI4_SEG_CNT_DIF; 8247 else 8248 phba->cfg_scsi_seg_cnt = phba->cfg_sg_seg_cnt; 8249 8250 } else { 8251 /* 8252 * The scsi_buf for a regular I/O holds the FCP cmnd, 8253 * the FCP rsp, a SGE for each, and a SGE for up to 8254 * cfg_sg_seg_cnt data segments. 8255 */ 8256 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) + 8257 sizeof(struct fcp_rsp) + 8258 ((phba->cfg_sg_seg_cnt + extra) * 8259 sizeof(struct sli4_sge)); 8260 8261 /* Total SGEs for scsi_sg_list */ 8262 phba->cfg_total_seg_cnt = phba->cfg_sg_seg_cnt + extra; 8263 phba->cfg_scsi_seg_cnt = phba->cfg_sg_seg_cnt; 8264 8265 /* 8266 * NOTE: if (phba->cfg_sg_seg_cnt + extra) <= 256 we only 8267 * need to post 1 page for the SGL. 8268 */ 8269 } 8270 8271 if (phba->cfg_xpsgl && !phba->nvmet_support) 8272 phba->cfg_sg_dma_buf_size = LPFC_DEFAULT_XPSGL_SIZE; 8273 else if (phba->cfg_sg_dma_buf_size <= LPFC_MIN_SG_SLI4_BUF_SZ) 8274 phba->cfg_sg_dma_buf_size = LPFC_MIN_SG_SLI4_BUF_SZ; 8275 else 8276 phba->cfg_sg_dma_buf_size = 8277 SLI4_PAGE_ALIGN(phba->cfg_sg_dma_buf_size); 8278 8279 phba->border_sge_num = phba->cfg_sg_dma_buf_size / 8280 sizeof(struct sli4_sge); 8281 8282 /* Limit to LPFC_MAX_NVME_SEG_CNT for NVME. */ 8283 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 8284 if (phba->cfg_sg_seg_cnt > LPFC_MAX_NVME_SEG_CNT) { 8285 lpfc_printf_log(phba, KERN_INFO, LOG_NVME | LOG_INIT, 8286 "6300 Reducing NVME sg segment " 8287 "cnt to %d\n", 8288 LPFC_MAX_NVME_SEG_CNT); 8289 phba->cfg_nvme_seg_cnt = LPFC_MAX_NVME_SEG_CNT; 8290 } else 8291 phba->cfg_nvme_seg_cnt = phba->cfg_sg_seg_cnt; 8292 } 8293 8294 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP, 8295 "9087 sg_seg_cnt:%d dmabuf_size:%d " 8296 "total:%d scsi:%d nvme:%d\n", 8297 phba->cfg_sg_seg_cnt, phba->cfg_sg_dma_buf_size, 8298 phba->cfg_total_seg_cnt, phba->cfg_scsi_seg_cnt, 8299 phba->cfg_nvme_seg_cnt); 8300 8301 if (phba->cfg_sg_dma_buf_size < SLI4_PAGE_SIZE) 8302 i = phba->cfg_sg_dma_buf_size; 8303 else 8304 i = SLI4_PAGE_SIZE; 8305 8306 phba->lpfc_sg_dma_buf_pool = 8307 dma_pool_create("lpfc_sg_dma_buf_pool", 8308 &phba->pcidev->dev, 8309 phba->cfg_sg_dma_buf_size, 8310 i, 0); 8311 if (!phba->lpfc_sg_dma_buf_pool) { 8312 rc = -ENOMEM; 8313 goto out_free_bsmbx; 8314 } 8315 8316 phba->lpfc_cmd_rsp_buf_pool = 8317 dma_pool_create("lpfc_cmd_rsp_buf_pool", 8318 &phba->pcidev->dev, 8319 sizeof(struct fcp_cmnd) + 8320 sizeof(struct fcp_rsp), 8321 i, 0); 8322 if (!phba->lpfc_cmd_rsp_buf_pool) { 8323 rc = -ENOMEM; 8324 goto out_free_sg_dma_buf; 8325 } 8326 8327 mempool_free(mboxq, phba->mbox_mem_pool); 8328 8329 /* Verify OAS is supported */ 8330 lpfc_sli4_oas_verify(phba); 8331 8332 /* Verify RAS support on adapter */ 8333 lpfc_sli4_ras_init(phba); 8334 8335 /* Verify all the SLI4 queues */ 8336 rc = lpfc_sli4_queue_verify(phba); 8337 if (rc) 8338 goto out_free_cmd_rsp_buf; 8339 8340 /* Create driver internal CQE event pool */ 8341 rc = lpfc_sli4_cq_event_pool_create(phba); 8342 if (rc) 8343 goto out_free_cmd_rsp_buf; 8344 8345 /* Initialize sgl lists per host */ 8346 lpfc_init_sgl_list(phba); 8347 8348 /* Allocate and initialize active sgl array */ 8349 rc = lpfc_init_active_sgl_array(phba); 8350 if (rc) { 8351 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 8352 "1430 Failed to initialize sgl list.\n"); 8353 goto out_destroy_cq_event_pool; 8354 } 8355 rc = lpfc_sli4_init_rpi_hdrs(phba); 8356 if (rc) { 8357 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 8358 "1432 Failed to initialize rpi headers.\n"); 8359 goto out_free_active_sgl; 8360 } 8361 8362 /* Allocate eligible FCF bmask memory for FCF roundrobin failover */ 8363 longs = (LPFC_SLI4_FCF_TBL_INDX_MAX + BITS_PER_LONG - 1)/BITS_PER_LONG; 8364 phba->fcf.fcf_rr_bmask = kcalloc(longs, sizeof(unsigned long), 8365 GFP_KERNEL); 8366 if (!phba->fcf.fcf_rr_bmask) { 8367 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 8368 "2759 Failed allocate memory for FCF round " 8369 "robin failover bmask\n"); 8370 rc = -ENOMEM; 8371 goto out_remove_rpi_hdrs; 8372 } 8373 8374 phba->sli4_hba.hba_eq_hdl = kcalloc(phba->cfg_irq_chann, 8375 sizeof(struct lpfc_hba_eq_hdl), 8376 GFP_KERNEL); 8377 if (!phba->sli4_hba.hba_eq_hdl) { 8378 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 8379 "2572 Failed allocate memory for " 8380 "fast-path per-EQ handle array\n"); 8381 rc = -ENOMEM; 8382 goto out_free_fcf_rr_bmask; 8383 } 8384 8385 phba->sli4_hba.cpu_map = kcalloc(phba->sli4_hba.num_possible_cpu, 8386 sizeof(struct lpfc_vector_map_info), 8387 GFP_KERNEL); 8388 if (!phba->sli4_hba.cpu_map) { 8389 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 8390 "3327 Failed allocate memory for msi-x " 8391 "interrupt vector mapping\n"); 8392 rc = -ENOMEM; 8393 goto out_free_hba_eq_hdl; 8394 } 8395 8396 phba->sli4_hba.eq_info = alloc_percpu(struct lpfc_eq_intr_info); 8397 if (!phba->sli4_hba.eq_info) { 8398 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 8399 "3321 Failed allocation for per_cpu stats\n"); 8400 rc = -ENOMEM; 8401 goto out_free_hba_cpu_map; 8402 } 8403 8404 phba->sli4_hba.idle_stat = kcalloc(phba->sli4_hba.num_possible_cpu, 8405 sizeof(*phba->sli4_hba.idle_stat), 8406 GFP_KERNEL); 8407 if (!phba->sli4_hba.idle_stat) { 8408 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 8409 "3390 Failed allocation for idle_stat\n"); 8410 rc = -ENOMEM; 8411 goto out_free_hba_eq_info; 8412 } 8413 8414 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS 8415 phba->sli4_hba.c_stat = alloc_percpu(struct lpfc_hdwq_stat); 8416 if (!phba->sli4_hba.c_stat) { 8417 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 8418 "3332 Failed allocating per cpu hdwq stats\n"); 8419 rc = -ENOMEM; 8420 goto out_free_hba_idle_stat; 8421 } 8422 #endif 8423 8424 phba->cmf_stat = alloc_percpu(struct lpfc_cgn_stat); 8425 if (!phba->cmf_stat) { 8426 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 8427 "3331 Failed allocating per cpu cgn stats\n"); 8428 rc = -ENOMEM; 8429 goto out_free_hba_hdwq_info; 8430 } 8431 8432 /* 8433 * Enable sr-iov virtual functions if supported and configured 8434 * through the module parameter. 8435 */ 8436 if (phba->cfg_sriov_nr_virtfn > 0) { 8437 rc = lpfc_sli_probe_sriov_nr_virtfn(phba, 8438 phba->cfg_sriov_nr_virtfn); 8439 if (rc) { 8440 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 8441 "3020 Requested number of SR-IOV " 8442 "virtual functions (%d) is not " 8443 "supported\n", 8444 phba->cfg_sriov_nr_virtfn); 8445 phba->cfg_sriov_nr_virtfn = 0; 8446 } 8447 } 8448 8449 return 0; 8450 8451 out_free_hba_hdwq_info: 8452 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS 8453 free_percpu(phba->sli4_hba.c_stat); 8454 out_free_hba_idle_stat: 8455 #endif 8456 kfree(phba->sli4_hba.idle_stat); 8457 out_free_hba_eq_info: 8458 free_percpu(phba->sli4_hba.eq_info); 8459 out_free_hba_cpu_map: 8460 kfree(phba->sli4_hba.cpu_map); 8461 out_free_hba_eq_hdl: 8462 kfree(phba->sli4_hba.hba_eq_hdl); 8463 out_free_fcf_rr_bmask: 8464 kfree(phba->fcf.fcf_rr_bmask); 8465 out_remove_rpi_hdrs: 8466 lpfc_sli4_remove_rpi_hdrs(phba); 8467 out_free_active_sgl: 8468 lpfc_free_active_sgl(phba); 8469 out_destroy_cq_event_pool: 8470 lpfc_sli4_cq_event_pool_destroy(phba); 8471 out_free_cmd_rsp_buf: 8472 dma_pool_destroy(phba->lpfc_cmd_rsp_buf_pool); 8473 phba->lpfc_cmd_rsp_buf_pool = NULL; 8474 out_free_sg_dma_buf: 8475 dma_pool_destroy(phba->lpfc_sg_dma_buf_pool); 8476 phba->lpfc_sg_dma_buf_pool = NULL; 8477 out_free_bsmbx: 8478 lpfc_destroy_bootstrap_mbox(phba); 8479 out_free_mem: 8480 lpfc_mem_free(phba); 8481 out_destroy_workqueue: 8482 destroy_workqueue(phba->wq); 8483 phba->wq = NULL; 8484 return rc; 8485 } 8486 8487 /** 8488 * lpfc_sli4_driver_resource_unset - Unset drvr internal resources for SLI4 dev 8489 * @phba: pointer to lpfc hba data structure. 8490 * 8491 * This routine is invoked to unset the driver internal resources set up 8492 * specific for supporting the SLI-4 HBA device it attached to. 8493 **/ 8494 static void 8495 lpfc_sli4_driver_resource_unset(struct lpfc_hba *phba) 8496 { 8497 struct lpfc_fcf_conn_entry *conn_entry, *next_conn_entry; 8498 8499 free_percpu(phba->sli4_hba.eq_info); 8500 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS 8501 free_percpu(phba->sli4_hba.c_stat); 8502 #endif 8503 free_percpu(phba->cmf_stat); 8504 kfree(phba->sli4_hba.idle_stat); 8505 8506 /* Free memory allocated for msi-x interrupt vector to CPU mapping */ 8507 kfree(phba->sli4_hba.cpu_map); 8508 phba->sli4_hba.num_possible_cpu = 0; 8509 phba->sli4_hba.num_present_cpu = 0; 8510 phba->sli4_hba.curr_disp_cpu = 0; 8511 cpumask_clear(&phba->sli4_hba.irq_aff_mask); 8512 8513 /* Free memory allocated for fast-path work queue handles */ 8514 kfree(phba->sli4_hba.hba_eq_hdl); 8515 8516 /* Free the allocated rpi headers. */ 8517 lpfc_sli4_remove_rpi_hdrs(phba); 8518 lpfc_sli4_remove_rpis(phba); 8519 8520 /* Free eligible FCF index bmask */ 8521 kfree(phba->fcf.fcf_rr_bmask); 8522 8523 /* Free the ELS sgl list */ 8524 lpfc_free_active_sgl(phba); 8525 lpfc_free_els_sgl_list(phba); 8526 lpfc_free_nvmet_sgl_list(phba); 8527 8528 /* Free the completion queue EQ event pool */ 8529 lpfc_sli4_cq_event_release_all(phba); 8530 lpfc_sli4_cq_event_pool_destroy(phba); 8531 8532 /* Release resource identifiers. */ 8533 lpfc_sli4_dealloc_resource_identifiers(phba); 8534 8535 /* Free the bsmbx region. */ 8536 lpfc_destroy_bootstrap_mbox(phba); 8537 8538 /* Free the SLI Layer memory with SLI4 HBAs */ 8539 lpfc_mem_free_all(phba); 8540 8541 /* Free the current connect table */ 8542 list_for_each_entry_safe(conn_entry, next_conn_entry, 8543 &phba->fcf_conn_rec_list, list) { 8544 list_del_init(&conn_entry->list); 8545 kfree(conn_entry); 8546 } 8547 8548 return; 8549 } 8550 8551 /** 8552 * lpfc_init_api_table_setup - Set up init api function jump table 8553 * @phba: The hba struct for which this call is being executed. 8554 * @dev_grp: The HBA PCI-Device group number. 8555 * 8556 * This routine sets up the device INIT interface API function jump table 8557 * in @phba struct. 8558 * 8559 * Returns: 0 - success, -ENODEV - failure. 8560 **/ 8561 int 8562 lpfc_init_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp) 8563 { 8564 phba->lpfc_hba_init_link = lpfc_hba_init_link; 8565 phba->lpfc_hba_down_link = lpfc_hba_down_link; 8566 phba->lpfc_selective_reset = lpfc_selective_reset; 8567 switch (dev_grp) { 8568 case LPFC_PCI_DEV_LP: 8569 phba->lpfc_hba_down_post = lpfc_hba_down_post_s3; 8570 phba->lpfc_handle_eratt = lpfc_handle_eratt_s3; 8571 phba->lpfc_stop_port = lpfc_stop_port_s3; 8572 break; 8573 case LPFC_PCI_DEV_OC: 8574 phba->lpfc_hba_down_post = lpfc_hba_down_post_s4; 8575 phba->lpfc_handle_eratt = lpfc_handle_eratt_s4; 8576 phba->lpfc_stop_port = lpfc_stop_port_s4; 8577 break; 8578 default: 8579 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 8580 "1431 Invalid HBA PCI-device group: 0x%x\n", 8581 dev_grp); 8582 return -ENODEV; 8583 } 8584 return 0; 8585 } 8586 8587 /** 8588 * lpfc_setup_driver_resource_phase2 - Phase2 setup driver internal resources. 8589 * @phba: pointer to lpfc hba data structure. 8590 * 8591 * This routine is invoked to set up the driver internal resources after the 8592 * device specific resource setup to support the HBA device it attached to. 8593 * 8594 * Return codes 8595 * 0 - successful 8596 * other values - error 8597 **/ 8598 static int 8599 lpfc_setup_driver_resource_phase2(struct lpfc_hba *phba) 8600 { 8601 int error; 8602 8603 /* Startup the kernel thread for this host adapter. */ 8604 phba->worker_thread = kthread_run(lpfc_do_work, phba, 8605 "lpfc_worker_%d", phba->brd_no); 8606 if (IS_ERR(phba->worker_thread)) { 8607 error = PTR_ERR(phba->worker_thread); 8608 return error; 8609 } 8610 8611 return 0; 8612 } 8613 8614 /** 8615 * lpfc_unset_driver_resource_phase2 - Phase2 unset driver internal resources. 8616 * @phba: pointer to lpfc hba data structure. 8617 * 8618 * This routine is invoked to unset the driver internal resources set up after 8619 * the device specific resource setup for supporting the HBA device it 8620 * attached to. 8621 **/ 8622 static void 8623 lpfc_unset_driver_resource_phase2(struct lpfc_hba *phba) 8624 { 8625 if (phba->wq) { 8626 destroy_workqueue(phba->wq); 8627 phba->wq = NULL; 8628 } 8629 8630 /* Stop kernel worker thread */ 8631 if (phba->worker_thread) 8632 kthread_stop(phba->worker_thread); 8633 } 8634 8635 /** 8636 * lpfc_free_iocb_list - Free iocb list. 8637 * @phba: pointer to lpfc hba data structure. 8638 * 8639 * This routine is invoked to free the driver's IOCB list and memory. 8640 **/ 8641 void 8642 lpfc_free_iocb_list(struct lpfc_hba *phba) 8643 { 8644 struct lpfc_iocbq *iocbq_entry = NULL, *iocbq_next = NULL; 8645 8646 spin_lock_irq(&phba->hbalock); 8647 list_for_each_entry_safe(iocbq_entry, iocbq_next, 8648 &phba->lpfc_iocb_list, list) { 8649 list_del(&iocbq_entry->list); 8650 kfree(iocbq_entry); 8651 phba->total_iocbq_bufs--; 8652 } 8653 spin_unlock_irq(&phba->hbalock); 8654 8655 return; 8656 } 8657 8658 /** 8659 * lpfc_init_iocb_list - Allocate and initialize iocb list. 8660 * @phba: pointer to lpfc hba data structure. 8661 * @iocb_count: number of requested iocbs 8662 * 8663 * This routine is invoked to allocate and initizlize the driver's IOCB 8664 * list and set up the IOCB tag array accordingly. 8665 * 8666 * Return codes 8667 * 0 - successful 8668 * other values - error 8669 **/ 8670 int 8671 lpfc_init_iocb_list(struct lpfc_hba *phba, int iocb_count) 8672 { 8673 struct lpfc_iocbq *iocbq_entry = NULL; 8674 uint16_t iotag; 8675 int i; 8676 8677 /* Initialize and populate the iocb list per host. */ 8678 INIT_LIST_HEAD(&phba->lpfc_iocb_list); 8679 for (i = 0; i < iocb_count; i++) { 8680 iocbq_entry = kzalloc(sizeof(struct lpfc_iocbq), GFP_KERNEL); 8681 if (iocbq_entry == NULL) { 8682 printk(KERN_ERR "%s: only allocated %d iocbs of " 8683 "expected %d count. Unloading driver.\n", 8684 __func__, i, iocb_count); 8685 goto out_free_iocbq; 8686 } 8687 8688 iotag = lpfc_sli_next_iotag(phba, iocbq_entry); 8689 if (iotag == 0) { 8690 kfree(iocbq_entry); 8691 printk(KERN_ERR "%s: failed to allocate IOTAG. " 8692 "Unloading driver.\n", __func__); 8693 goto out_free_iocbq; 8694 } 8695 iocbq_entry->sli4_lxritag = NO_XRI; 8696 iocbq_entry->sli4_xritag = NO_XRI; 8697 8698 spin_lock_irq(&phba->hbalock); 8699 list_add(&iocbq_entry->list, &phba->lpfc_iocb_list); 8700 phba->total_iocbq_bufs++; 8701 spin_unlock_irq(&phba->hbalock); 8702 } 8703 8704 return 0; 8705 8706 out_free_iocbq: 8707 lpfc_free_iocb_list(phba); 8708 8709 return -ENOMEM; 8710 } 8711 8712 /** 8713 * lpfc_free_sgl_list - Free a given sgl list. 8714 * @phba: pointer to lpfc hba data structure. 8715 * @sglq_list: pointer to the head of sgl list. 8716 * 8717 * This routine is invoked to free a give sgl list and memory. 8718 **/ 8719 void 8720 lpfc_free_sgl_list(struct lpfc_hba *phba, struct list_head *sglq_list) 8721 { 8722 struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL; 8723 8724 list_for_each_entry_safe(sglq_entry, sglq_next, sglq_list, list) { 8725 list_del(&sglq_entry->list); 8726 lpfc_mbuf_free(phba, sglq_entry->virt, sglq_entry->phys); 8727 kfree(sglq_entry); 8728 } 8729 } 8730 8731 /** 8732 * lpfc_free_els_sgl_list - Free els sgl list. 8733 * @phba: pointer to lpfc hba data structure. 8734 * 8735 * This routine is invoked to free the driver's els sgl list and memory. 8736 **/ 8737 static void 8738 lpfc_free_els_sgl_list(struct lpfc_hba *phba) 8739 { 8740 LIST_HEAD(sglq_list); 8741 8742 /* Retrieve all els sgls from driver list */ 8743 spin_lock_irq(&phba->sli4_hba.sgl_list_lock); 8744 list_splice_init(&phba->sli4_hba.lpfc_els_sgl_list, &sglq_list); 8745 spin_unlock_irq(&phba->sli4_hba.sgl_list_lock); 8746 8747 /* Now free the sgl list */ 8748 lpfc_free_sgl_list(phba, &sglq_list); 8749 } 8750 8751 /** 8752 * lpfc_free_nvmet_sgl_list - Free nvmet sgl list. 8753 * @phba: pointer to lpfc hba data structure. 8754 * 8755 * This routine is invoked to free the driver's nvmet sgl list and memory. 8756 **/ 8757 static void 8758 lpfc_free_nvmet_sgl_list(struct lpfc_hba *phba) 8759 { 8760 struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL; 8761 LIST_HEAD(sglq_list); 8762 8763 /* Retrieve all nvmet sgls from driver list */ 8764 spin_lock_irq(&phba->hbalock); 8765 spin_lock(&phba->sli4_hba.sgl_list_lock); 8766 list_splice_init(&phba->sli4_hba.lpfc_nvmet_sgl_list, &sglq_list); 8767 spin_unlock(&phba->sli4_hba.sgl_list_lock); 8768 spin_unlock_irq(&phba->hbalock); 8769 8770 /* Now free the sgl list */ 8771 list_for_each_entry_safe(sglq_entry, sglq_next, &sglq_list, list) { 8772 list_del(&sglq_entry->list); 8773 lpfc_nvmet_buf_free(phba, sglq_entry->virt, sglq_entry->phys); 8774 kfree(sglq_entry); 8775 } 8776 8777 /* Update the nvmet_xri_cnt to reflect no current sgls. 8778 * The next initialization cycle sets the count and allocates 8779 * the sgls over again. 8780 */ 8781 phba->sli4_hba.nvmet_xri_cnt = 0; 8782 } 8783 8784 /** 8785 * lpfc_init_active_sgl_array - Allocate the buf to track active ELS XRIs. 8786 * @phba: pointer to lpfc hba data structure. 8787 * 8788 * This routine is invoked to allocate the driver's active sgl memory. 8789 * This array will hold the sglq_entry's for active IOs. 8790 **/ 8791 static int 8792 lpfc_init_active_sgl_array(struct lpfc_hba *phba) 8793 { 8794 int size; 8795 size = sizeof(struct lpfc_sglq *); 8796 size *= phba->sli4_hba.max_cfg_param.max_xri; 8797 8798 phba->sli4_hba.lpfc_sglq_active_list = 8799 kzalloc(size, GFP_KERNEL); 8800 if (!phba->sli4_hba.lpfc_sglq_active_list) 8801 return -ENOMEM; 8802 return 0; 8803 } 8804 8805 /** 8806 * lpfc_free_active_sgl - Free the buf that tracks active ELS XRIs. 8807 * @phba: pointer to lpfc hba data structure. 8808 * 8809 * This routine is invoked to walk through the array of active sglq entries 8810 * and free all of the resources. 8811 * This is just a place holder for now. 8812 **/ 8813 static void 8814 lpfc_free_active_sgl(struct lpfc_hba *phba) 8815 { 8816 kfree(phba->sli4_hba.lpfc_sglq_active_list); 8817 } 8818 8819 /** 8820 * lpfc_init_sgl_list - Allocate and initialize sgl list. 8821 * @phba: pointer to lpfc hba data structure. 8822 * 8823 * This routine is invoked to allocate and initizlize the driver's sgl 8824 * list and set up the sgl xritag tag array accordingly. 8825 * 8826 **/ 8827 static void 8828 lpfc_init_sgl_list(struct lpfc_hba *phba) 8829 { 8830 /* Initialize and populate the sglq list per host/VF. */ 8831 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_els_sgl_list); 8832 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_els_sgl_list); 8833 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_nvmet_sgl_list); 8834 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list); 8835 8836 /* els xri-sgl book keeping */ 8837 phba->sli4_hba.els_xri_cnt = 0; 8838 8839 /* nvme xri-buffer book keeping */ 8840 phba->sli4_hba.io_xri_cnt = 0; 8841 } 8842 8843 /** 8844 * lpfc_sli4_init_rpi_hdrs - Post the rpi header memory region to the port 8845 * @phba: pointer to lpfc hba data structure. 8846 * 8847 * This routine is invoked to post rpi header templates to the 8848 * port for those SLI4 ports that do not support extents. This routine 8849 * posts a PAGE_SIZE memory region to the port to hold up to 8850 * PAGE_SIZE modulo 64 rpi context headers. This is an initialization routine 8851 * and should be called only when interrupts are disabled. 8852 * 8853 * Return codes 8854 * 0 - successful 8855 * -ERROR - otherwise. 8856 **/ 8857 int 8858 lpfc_sli4_init_rpi_hdrs(struct lpfc_hba *phba) 8859 { 8860 int rc = 0; 8861 struct lpfc_rpi_hdr *rpi_hdr; 8862 8863 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_rpi_hdr_list); 8864 if (!phba->sli4_hba.rpi_hdrs_in_use) 8865 return rc; 8866 if (phba->sli4_hba.extents_in_use) 8867 return -EIO; 8868 8869 rpi_hdr = lpfc_sli4_create_rpi_hdr(phba); 8870 if (!rpi_hdr) { 8871 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 8872 "0391 Error during rpi post operation\n"); 8873 lpfc_sli4_remove_rpis(phba); 8874 rc = -ENODEV; 8875 } 8876 8877 return rc; 8878 } 8879 8880 /** 8881 * lpfc_sli4_create_rpi_hdr - Allocate an rpi header memory region 8882 * @phba: pointer to lpfc hba data structure. 8883 * 8884 * This routine is invoked to allocate a single 4KB memory region to 8885 * support rpis and stores them in the phba. This single region 8886 * provides support for up to 64 rpis. The region is used globally 8887 * by the device. 8888 * 8889 * Returns: 8890 * A valid rpi hdr on success. 8891 * A NULL pointer on any failure. 8892 **/ 8893 struct lpfc_rpi_hdr * 8894 lpfc_sli4_create_rpi_hdr(struct lpfc_hba *phba) 8895 { 8896 uint16_t rpi_limit, curr_rpi_range; 8897 struct lpfc_dmabuf *dmabuf; 8898 struct lpfc_rpi_hdr *rpi_hdr; 8899 8900 /* 8901 * If the SLI4 port supports extents, posting the rpi header isn't 8902 * required. Set the expected maximum count and let the actual value 8903 * get set when extents are fully allocated. 8904 */ 8905 if (!phba->sli4_hba.rpi_hdrs_in_use) 8906 return NULL; 8907 if (phba->sli4_hba.extents_in_use) 8908 return NULL; 8909 8910 /* The limit on the logical index is just the max_rpi count. */ 8911 rpi_limit = phba->sli4_hba.max_cfg_param.max_rpi; 8912 8913 spin_lock_irq(&phba->hbalock); 8914 /* 8915 * Establish the starting RPI in this header block. The starting 8916 * rpi is normalized to a zero base because the physical rpi is 8917 * port based. 8918 */ 8919 curr_rpi_range = phba->sli4_hba.next_rpi; 8920 spin_unlock_irq(&phba->hbalock); 8921 8922 /* Reached full RPI range */ 8923 if (curr_rpi_range == rpi_limit) 8924 return NULL; 8925 8926 /* 8927 * First allocate the protocol header region for the port. The 8928 * port expects a 4KB DMA-mapped memory region that is 4K aligned. 8929 */ 8930 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL); 8931 if (!dmabuf) 8932 return NULL; 8933 8934 dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev, 8935 LPFC_HDR_TEMPLATE_SIZE, 8936 &dmabuf->phys, GFP_KERNEL); 8937 if (!dmabuf->virt) { 8938 rpi_hdr = NULL; 8939 goto err_free_dmabuf; 8940 } 8941 8942 if (!IS_ALIGNED(dmabuf->phys, LPFC_HDR_TEMPLATE_SIZE)) { 8943 rpi_hdr = NULL; 8944 goto err_free_coherent; 8945 } 8946 8947 /* Save the rpi header data for cleanup later. */ 8948 rpi_hdr = kzalloc(sizeof(struct lpfc_rpi_hdr), GFP_KERNEL); 8949 if (!rpi_hdr) 8950 goto err_free_coherent; 8951 8952 rpi_hdr->dmabuf = dmabuf; 8953 rpi_hdr->len = LPFC_HDR_TEMPLATE_SIZE; 8954 rpi_hdr->page_count = 1; 8955 spin_lock_irq(&phba->hbalock); 8956 8957 /* The rpi_hdr stores the logical index only. */ 8958 rpi_hdr->start_rpi = curr_rpi_range; 8959 rpi_hdr->next_rpi = phba->sli4_hba.next_rpi + LPFC_RPI_HDR_COUNT; 8960 list_add_tail(&rpi_hdr->list, &phba->sli4_hba.lpfc_rpi_hdr_list); 8961 8962 spin_unlock_irq(&phba->hbalock); 8963 return rpi_hdr; 8964 8965 err_free_coherent: 8966 dma_free_coherent(&phba->pcidev->dev, LPFC_HDR_TEMPLATE_SIZE, 8967 dmabuf->virt, dmabuf->phys); 8968 err_free_dmabuf: 8969 kfree(dmabuf); 8970 return NULL; 8971 } 8972 8973 /** 8974 * lpfc_sli4_remove_rpi_hdrs - Remove all rpi header memory regions 8975 * @phba: pointer to lpfc hba data structure. 8976 * 8977 * This routine is invoked to remove all memory resources allocated 8978 * to support rpis for SLI4 ports not supporting extents. This routine 8979 * presumes the caller has released all rpis consumed by fabric or port 8980 * logins and is prepared to have the header pages removed. 8981 **/ 8982 void 8983 lpfc_sli4_remove_rpi_hdrs(struct lpfc_hba *phba) 8984 { 8985 struct lpfc_rpi_hdr *rpi_hdr, *next_rpi_hdr; 8986 8987 if (!phba->sli4_hba.rpi_hdrs_in_use) 8988 goto exit; 8989 8990 list_for_each_entry_safe(rpi_hdr, next_rpi_hdr, 8991 &phba->sli4_hba.lpfc_rpi_hdr_list, list) { 8992 list_del(&rpi_hdr->list); 8993 dma_free_coherent(&phba->pcidev->dev, rpi_hdr->len, 8994 rpi_hdr->dmabuf->virt, rpi_hdr->dmabuf->phys); 8995 kfree(rpi_hdr->dmabuf); 8996 kfree(rpi_hdr); 8997 } 8998 exit: 8999 /* There are no rpis available to the port now. */ 9000 phba->sli4_hba.next_rpi = 0; 9001 } 9002 9003 /** 9004 * lpfc_hba_alloc - Allocate driver hba data structure for a device. 9005 * @pdev: pointer to pci device data structure. 9006 * 9007 * This routine is invoked to allocate the driver hba data structure for an 9008 * HBA device. If the allocation is successful, the phba reference to the 9009 * PCI device data structure is set. 9010 * 9011 * Return codes 9012 * pointer to @phba - successful 9013 * NULL - error 9014 **/ 9015 static struct lpfc_hba * 9016 lpfc_hba_alloc(struct pci_dev *pdev) 9017 { 9018 struct lpfc_hba *phba; 9019 9020 /* Allocate memory for HBA structure */ 9021 phba = kzalloc(sizeof(struct lpfc_hba), GFP_KERNEL); 9022 if (!phba) { 9023 dev_err(&pdev->dev, "failed to allocate hba struct\n"); 9024 return NULL; 9025 } 9026 9027 /* Set reference to PCI device in HBA structure */ 9028 phba->pcidev = pdev; 9029 9030 /* Assign an unused board number */ 9031 phba->brd_no = lpfc_get_instance(); 9032 if (phba->brd_no < 0) { 9033 kfree(phba); 9034 return NULL; 9035 } 9036 phba->eratt_poll_interval = LPFC_ERATT_POLL_INTERVAL; 9037 9038 spin_lock_init(&phba->ct_ev_lock); 9039 INIT_LIST_HEAD(&phba->ct_ev_waiters); 9040 9041 return phba; 9042 } 9043 9044 /** 9045 * lpfc_hba_free - Free driver hba data structure with a device. 9046 * @phba: pointer to lpfc hba data structure. 9047 * 9048 * This routine is invoked to free the driver hba data structure with an 9049 * HBA device. 9050 **/ 9051 static void 9052 lpfc_hba_free(struct lpfc_hba *phba) 9053 { 9054 if (phba->sli_rev == LPFC_SLI_REV4) 9055 kfree(phba->sli4_hba.hdwq); 9056 9057 /* Release the driver assigned board number */ 9058 idr_remove(&lpfc_hba_index, phba->brd_no); 9059 9060 /* Free memory allocated with sli3 rings */ 9061 kfree(phba->sli.sli3_ring); 9062 phba->sli.sli3_ring = NULL; 9063 9064 kfree(phba); 9065 return; 9066 } 9067 9068 /** 9069 * lpfc_setup_fdmi_mask - Setup initial FDMI mask for HBA and Port attributes 9070 * @vport: pointer to lpfc vport data structure. 9071 * 9072 * This routine is will setup initial FDMI attribute masks for 9073 * FDMI2 or SmartSAN depending on module parameters. The driver will attempt 9074 * to get these attributes first before falling back, the attribute 9075 * fallback hierarchy is SmartSAN -> FDMI2 -> FMDI1 9076 **/ 9077 void 9078 lpfc_setup_fdmi_mask(struct lpfc_vport *vport) 9079 { 9080 struct lpfc_hba *phba = vport->phba; 9081 9082 vport->load_flag |= FC_ALLOW_FDMI; 9083 if (phba->cfg_enable_SmartSAN || 9084 phba->cfg_fdmi_on == LPFC_FDMI_SUPPORT) { 9085 /* Setup appropriate attribute masks */ 9086 vport->fdmi_hba_mask = LPFC_FDMI2_HBA_ATTR; 9087 if (phba->cfg_enable_SmartSAN) 9088 vport->fdmi_port_mask = LPFC_FDMI2_SMART_ATTR; 9089 else 9090 vport->fdmi_port_mask = LPFC_FDMI2_PORT_ATTR; 9091 } 9092 9093 lpfc_printf_log(phba, KERN_INFO, LOG_DISCOVERY, 9094 "6077 Setup FDMI mask: hba x%x port x%x\n", 9095 vport->fdmi_hba_mask, vport->fdmi_port_mask); 9096 } 9097 9098 /** 9099 * lpfc_create_shost - Create hba physical port with associated scsi host. 9100 * @phba: pointer to lpfc hba data structure. 9101 * 9102 * This routine is invoked to create HBA physical port and associate a SCSI 9103 * host with it. 9104 * 9105 * Return codes 9106 * 0 - successful 9107 * other values - error 9108 **/ 9109 static int 9110 lpfc_create_shost(struct lpfc_hba *phba) 9111 { 9112 struct lpfc_vport *vport; 9113 struct Scsi_Host *shost; 9114 9115 /* Initialize HBA FC structure */ 9116 phba->fc_edtov = FF_DEF_EDTOV; 9117 phba->fc_ratov = FF_DEF_RATOV; 9118 phba->fc_altov = FF_DEF_ALTOV; 9119 phba->fc_arbtov = FF_DEF_ARBTOV; 9120 9121 atomic_set(&phba->sdev_cnt, 0); 9122 vport = lpfc_create_port(phba, phba->brd_no, &phba->pcidev->dev); 9123 if (!vport) 9124 return -ENODEV; 9125 9126 shost = lpfc_shost_from_vport(vport); 9127 phba->pport = vport; 9128 9129 if (phba->nvmet_support) { 9130 /* Only 1 vport (pport) will support NVME target */ 9131 phba->targetport = NULL; 9132 phba->cfg_enable_fc4_type = LPFC_ENABLE_NVME; 9133 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_NVME_DISC, 9134 "6076 NVME Target Found\n"); 9135 } 9136 9137 lpfc_debugfs_initialize(vport); 9138 /* Put reference to SCSI host to driver's device private data */ 9139 pci_set_drvdata(phba->pcidev, shost); 9140 9141 lpfc_setup_fdmi_mask(vport); 9142 9143 /* 9144 * At this point we are fully registered with PSA. In addition, 9145 * any initial discovery should be completed. 9146 */ 9147 return 0; 9148 } 9149 9150 /** 9151 * lpfc_destroy_shost - Destroy hba physical port with associated scsi host. 9152 * @phba: pointer to lpfc hba data structure. 9153 * 9154 * This routine is invoked to destroy HBA physical port and the associated 9155 * SCSI host. 9156 **/ 9157 static void 9158 lpfc_destroy_shost(struct lpfc_hba *phba) 9159 { 9160 struct lpfc_vport *vport = phba->pport; 9161 9162 /* Destroy physical port that associated with the SCSI host */ 9163 destroy_port(vport); 9164 9165 return; 9166 } 9167 9168 /** 9169 * lpfc_setup_bg - Setup Block guard structures and debug areas. 9170 * @phba: pointer to lpfc hba data structure. 9171 * @shost: the shost to be used to detect Block guard settings. 9172 * 9173 * This routine sets up the local Block guard protocol settings for @shost. 9174 * This routine also allocates memory for debugging bg buffers. 9175 **/ 9176 static void 9177 lpfc_setup_bg(struct lpfc_hba *phba, struct Scsi_Host *shost) 9178 { 9179 uint32_t old_mask; 9180 uint32_t old_guard; 9181 9182 if (phba->cfg_prot_mask && phba->cfg_prot_guard) { 9183 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 9184 "1478 Registering BlockGuard with the " 9185 "SCSI layer\n"); 9186 9187 old_mask = phba->cfg_prot_mask; 9188 old_guard = phba->cfg_prot_guard; 9189 9190 /* Only allow supported values */ 9191 phba->cfg_prot_mask &= (SHOST_DIF_TYPE1_PROTECTION | 9192 SHOST_DIX_TYPE0_PROTECTION | 9193 SHOST_DIX_TYPE1_PROTECTION); 9194 phba->cfg_prot_guard &= (SHOST_DIX_GUARD_IP | 9195 SHOST_DIX_GUARD_CRC); 9196 9197 /* DIF Type 1 protection for profiles AST1/C1 is end to end */ 9198 if (phba->cfg_prot_mask == SHOST_DIX_TYPE1_PROTECTION) 9199 phba->cfg_prot_mask |= SHOST_DIF_TYPE1_PROTECTION; 9200 9201 if (phba->cfg_prot_mask && phba->cfg_prot_guard) { 9202 if ((old_mask != phba->cfg_prot_mask) || 9203 (old_guard != phba->cfg_prot_guard)) 9204 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 9205 "1475 Registering BlockGuard with the " 9206 "SCSI layer: mask %d guard %d\n", 9207 phba->cfg_prot_mask, 9208 phba->cfg_prot_guard); 9209 9210 scsi_host_set_prot(shost, phba->cfg_prot_mask); 9211 scsi_host_set_guard(shost, phba->cfg_prot_guard); 9212 } else 9213 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 9214 "1479 Not Registering BlockGuard with the SCSI " 9215 "layer, Bad protection parameters: %d %d\n", 9216 old_mask, old_guard); 9217 } 9218 } 9219 9220 /** 9221 * lpfc_post_init_setup - Perform necessary device post initialization setup. 9222 * @phba: pointer to lpfc hba data structure. 9223 * 9224 * This routine is invoked to perform all the necessary post initialization 9225 * setup for the device. 9226 **/ 9227 static void 9228 lpfc_post_init_setup(struct lpfc_hba *phba) 9229 { 9230 struct Scsi_Host *shost; 9231 struct lpfc_adapter_event_header adapter_event; 9232 9233 /* Get the default values for Model Name and Description */ 9234 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc); 9235 9236 /* 9237 * hba setup may have changed the hba_queue_depth so we need to 9238 * adjust the value of can_queue. 9239 */ 9240 shost = pci_get_drvdata(phba->pcidev); 9241 shost->can_queue = phba->cfg_hba_queue_depth - 10; 9242 9243 lpfc_host_attrib_init(shost); 9244 9245 if (phba->cfg_poll & DISABLE_FCP_RING_INT) { 9246 spin_lock_irq(shost->host_lock); 9247 lpfc_poll_start_timer(phba); 9248 spin_unlock_irq(shost->host_lock); 9249 } 9250 9251 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 9252 "0428 Perform SCSI scan\n"); 9253 /* Send board arrival event to upper layer */ 9254 adapter_event.event_type = FC_REG_ADAPTER_EVENT; 9255 adapter_event.subcategory = LPFC_EVENT_ARRIVAL; 9256 fc_host_post_vendor_event(shost, fc_get_event_number(), 9257 sizeof(adapter_event), 9258 (char *) &adapter_event, 9259 LPFC_NL_VENDOR_ID); 9260 return; 9261 } 9262 9263 /** 9264 * lpfc_sli_pci_mem_setup - Setup SLI3 HBA PCI memory space. 9265 * @phba: pointer to lpfc hba data structure. 9266 * 9267 * This routine is invoked to set up the PCI device memory space for device 9268 * with SLI-3 interface spec. 9269 * 9270 * Return codes 9271 * 0 - successful 9272 * other values - error 9273 **/ 9274 static int 9275 lpfc_sli_pci_mem_setup(struct lpfc_hba *phba) 9276 { 9277 struct pci_dev *pdev = phba->pcidev; 9278 unsigned long bar0map_len, bar2map_len; 9279 int i, hbq_count; 9280 void *ptr; 9281 int error; 9282 9283 if (!pdev) 9284 return -ENODEV; 9285 9286 /* Set the device DMA mask size */ 9287 error = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); 9288 if (error) 9289 error = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); 9290 if (error) 9291 return error; 9292 error = -ENODEV; 9293 9294 /* Get the bus address of Bar0 and Bar2 and the number of bytes 9295 * required by each mapping. 9296 */ 9297 phba->pci_bar0_map = pci_resource_start(pdev, 0); 9298 bar0map_len = pci_resource_len(pdev, 0); 9299 9300 phba->pci_bar2_map = pci_resource_start(pdev, 2); 9301 bar2map_len = pci_resource_len(pdev, 2); 9302 9303 /* Map HBA SLIM to a kernel virtual address. */ 9304 phba->slim_memmap_p = ioremap(phba->pci_bar0_map, bar0map_len); 9305 if (!phba->slim_memmap_p) { 9306 dev_printk(KERN_ERR, &pdev->dev, 9307 "ioremap failed for SLIM memory.\n"); 9308 goto out; 9309 } 9310 9311 /* Map HBA Control Registers to a kernel virtual address. */ 9312 phba->ctrl_regs_memmap_p = ioremap(phba->pci_bar2_map, bar2map_len); 9313 if (!phba->ctrl_regs_memmap_p) { 9314 dev_printk(KERN_ERR, &pdev->dev, 9315 "ioremap failed for HBA control registers.\n"); 9316 goto out_iounmap_slim; 9317 } 9318 9319 /* Allocate memory for SLI-2 structures */ 9320 phba->slim2p.virt = dma_alloc_coherent(&pdev->dev, SLI2_SLIM_SIZE, 9321 &phba->slim2p.phys, GFP_KERNEL); 9322 if (!phba->slim2p.virt) 9323 goto out_iounmap; 9324 9325 phba->mbox = phba->slim2p.virt + offsetof(struct lpfc_sli2_slim, mbx); 9326 phba->mbox_ext = (phba->slim2p.virt + 9327 offsetof(struct lpfc_sli2_slim, mbx_ext_words)); 9328 phba->pcb = (phba->slim2p.virt + offsetof(struct lpfc_sli2_slim, pcb)); 9329 phba->IOCBs = (phba->slim2p.virt + 9330 offsetof(struct lpfc_sli2_slim, IOCBs)); 9331 9332 phba->hbqslimp.virt = dma_alloc_coherent(&pdev->dev, 9333 lpfc_sli_hbq_size(), 9334 &phba->hbqslimp.phys, 9335 GFP_KERNEL); 9336 if (!phba->hbqslimp.virt) 9337 goto out_free_slim; 9338 9339 hbq_count = lpfc_sli_hbq_count(); 9340 ptr = phba->hbqslimp.virt; 9341 for (i = 0; i < hbq_count; ++i) { 9342 phba->hbqs[i].hbq_virt = ptr; 9343 INIT_LIST_HEAD(&phba->hbqs[i].hbq_buffer_list); 9344 ptr += (lpfc_hbq_defs[i]->entry_count * 9345 sizeof(struct lpfc_hbq_entry)); 9346 } 9347 phba->hbqs[LPFC_ELS_HBQ].hbq_alloc_buffer = lpfc_els_hbq_alloc; 9348 phba->hbqs[LPFC_ELS_HBQ].hbq_free_buffer = lpfc_els_hbq_free; 9349 9350 memset(phba->hbqslimp.virt, 0, lpfc_sli_hbq_size()); 9351 9352 phba->MBslimaddr = phba->slim_memmap_p; 9353 phba->HAregaddr = phba->ctrl_regs_memmap_p + HA_REG_OFFSET; 9354 phba->CAregaddr = phba->ctrl_regs_memmap_p + CA_REG_OFFSET; 9355 phba->HSregaddr = phba->ctrl_regs_memmap_p + HS_REG_OFFSET; 9356 phba->HCregaddr = phba->ctrl_regs_memmap_p + HC_REG_OFFSET; 9357 9358 return 0; 9359 9360 out_free_slim: 9361 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE, 9362 phba->slim2p.virt, phba->slim2p.phys); 9363 out_iounmap: 9364 iounmap(phba->ctrl_regs_memmap_p); 9365 out_iounmap_slim: 9366 iounmap(phba->slim_memmap_p); 9367 out: 9368 return error; 9369 } 9370 9371 /** 9372 * lpfc_sli_pci_mem_unset - Unset SLI3 HBA PCI memory space. 9373 * @phba: pointer to lpfc hba data structure. 9374 * 9375 * This routine is invoked to unset the PCI device memory space for device 9376 * with SLI-3 interface spec. 9377 **/ 9378 static void 9379 lpfc_sli_pci_mem_unset(struct lpfc_hba *phba) 9380 { 9381 struct pci_dev *pdev; 9382 9383 /* Obtain PCI device reference */ 9384 if (!phba->pcidev) 9385 return; 9386 else 9387 pdev = phba->pcidev; 9388 9389 /* Free coherent DMA memory allocated */ 9390 dma_free_coherent(&pdev->dev, lpfc_sli_hbq_size(), 9391 phba->hbqslimp.virt, phba->hbqslimp.phys); 9392 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE, 9393 phba->slim2p.virt, phba->slim2p.phys); 9394 9395 /* I/O memory unmap */ 9396 iounmap(phba->ctrl_regs_memmap_p); 9397 iounmap(phba->slim_memmap_p); 9398 9399 return; 9400 } 9401 9402 /** 9403 * lpfc_sli4_post_status_check - Wait for SLI4 POST done and check status 9404 * @phba: pointer to lpfc hba data structure. 9405 * 9406 * This routine is invoked to wait for SLI4 device Power On Self Test (POST) 9407 * done and check status. 9408 * 9409 * Return 0 if successful, otherwise -ENODEV. 9410 **/ 9411 int 9412 lpfc_sli4_post_status_check(struct lpfc_hba *phba) 9413 { 9414 struct lpfc_register portsmphr_reg, uerrlo_reg, uerrhi_reg; 9415 struct lpfc_register reg_data; 9416 int i, port_error = 0; 9417 uint32_t if_type; 9418 9419 memset(&portsmphr_reg, 0, sizeof(portsmphr_reg)); 9420 memset(®_data, 0, sizeof(reg_data)); 9421 if (!phba->sli4_hba.PSMPHRregaddr) 9422 return -ENODEV; 9423 9424 /* Wait up to 30 seconds for the SLI Port POST done and ready */ 9425 for (i = 0; i < 3000; i++) { 9426 if (lpfc_readl(phba->sli4_hba.PSMPHRregaddr, 9427 &portsmphr_reg.word0) || 9428 (bf_get(lpfc_port_smphr_perr, &portsmphr_reg))) { 9429 /* Port has a fatal POST error, break out */ 9430 port_error = -ENODEV; 9431 break; 9432 } 9433 if (LPFC_POST_STAGE_PORT_READY == 9434 bf_get(lpfc_port_smphr_port_status, &portsmphr_reg)) 9435 break; 9436 msleep(10); 9437 } 9438 9439 /* 9440 * If there was a port error during POST, then don't proceed with 9441 * other register reads as the data may not be valid. Just exit. 9442 */ 9443 if (port_error) { 9444 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 9445 "1408 Port Failed POST - portsmphr=0x%x, " 9446 "perr=x%x, sfi=x%x, nip=x%x, ipc=x%x, scr1=x%x, " 9447 "scr2=x%x, hscratch=x%x, pstatus=x%x\n", 9448 portsmphr_reg.word0, 9449 bf_get(lpfc_port_smphr_perr, &portsmphr_reg), 9450 bf_get(lpfc_port_smphr_sfi, &portsmphr_reg), 9451 bf_get(lpfc_port_smphr_nip, &portsmphr_reg), 9452 bf_get(lpfc_port_smphr_ipc, &portsmphr_reg), 9453 bf_get(lpfc_port_smphr_scr1, &portsmphr_reg), 9454 bf_get(lpfc_port_smphr_scr2, &portsmphr_reg), 9455 bf_get(lpfc_port_smphr_host_scratch, &portsmphr_reg), 9456 bf_get(lpfc_port_smphr_port_status, &portsmphr_reg)); 9457 } else { 9458 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 9459 "2534 Device Info: SLIFamily=0x%x, " 9460 "SLIRev=0x%x, IFType=0x%x, SLIHint_1=0x%x, " 9461 "SLIHint_2=0x%x, FT=0x%x\n", 9462 bf_get(lpfc_sli_intf_sli_family, 9463 &phba->sli4_hba.sli_intf), 9464 bf_get(lpfc_sli_intf_slirev, 9465 &phba->sli4_hba.sli_intf), 9466 bf_get(lpfc_sli_intf_if_type, 9467 &phba->sli4_hba.sli_intf), 9468 bf_get(lpfc_sli_intf_sli_hint1, 9469 &phba->sli4_hba.sli_intf), 9470 bf_get(lpfc_sli_intf_sli_hint2, 9471 &phba->sli4_hba.sli_intf), 9472 bf_get(lpfc_sli_intf_func_type, 9473 &phba->sli4_hba.sli_intf)); 9474 /* 9475 * Check for other Port errors during the initialization 9476 * process. Fail the load if the port did not come up 9477 * correctly. 9478 */ 9479 if_type = bf_get(lpfc_sli_intf_if_type, 9480 &phba->sli4_hba.sli_intf); 9481 switch (if_type) { 9482 case LPFC_SLI_INTF_IF_TYPE_0: 9483 phba->sli4_hba.ue_mask_lo = 9484 readl(phba->sli4_hba.u.if_type0.UEMASKLOregaddr); 9485 phba->sli4_hba.ue_mask_hi = 9486 readl(phba->sli4_hba.u.if_type0.UEMASKHIregaddr); 9487 uerrlo_reg.word0 = 9488 readl(phba->sli4_hba.u.if_type0.UERRLOregaddr); 9489 uerrhi_reg.word0 = 9490 readl(phba->sli4_hba.u.if_type0.UERRHIregaddr); 9491 if ((~phba->sli4_hba.ue_mask_lo & uerrlo_reg.word0) || 9492 (~phba->sli4_hba.ue_mask_hi & uerrhi_reg.word0)) { 9493 lpfc_printf_log(phba, KERN_ERR, 9494 LOG_TRACE_EVENT, 9495 "1422 Unrecoverable Error " 9496 "Detected during POST " 9497 "uerr_lo_reg=0x%x, " 9498 "uerr_hi_reg=0x%x, " 9499 "ue_mask_lo_reg=0x%x, " 9500 "ue_mask_hi_reg=0x%x\n", 9501 uerrlo_reg.word0, 9502 uerrhi_reg.word0, 9503 phba->sli4_hba.ue_mask_lo, 9504 phba->sli4_hba.ue_mask_hi); 9505 port_error = -ENODEV; 9506 } 9507 break; 9508 case LPFC_SLI_INTF_IF_TYPE_2: 9509 case LPFC_SLI_INTF_IF_TYPE_6: 9510 /* Final checks. The port status should be clean. */ 9511 if (lpfc_readl(phba->sli4_hba.u.if_type2.STATUSregaddr, 9512 ®_data.word0) || 9513 (bf_get(lpfc_sliport_status_err, ®_data) && 9514 !bf_get(lpfc_sliport_status_rn, ®_data))) { 9515 phba->work_status[0] = 9516 readl(phba->sli4_hba.u.if_type2. 9517 ERR1regaddr); 9518 phba->work_status[1] = 9519 readl(phba->sli4_hba.u.if_type2. 9520 ERR2regaddr); 9521 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 9522 "2888 Unrecoverable port error " 9523 "following POST: port status reg " 9524 "0x%x, port_smphr reg 0x%x, " 9525 "error 1=0x%x, error 2=0x%x\n", 9526 reg_data.word0, 9527 portsmphr_reg.word0, 9528 phba->work_status[0], 9529 phba->work_status[1]); 9530 port_error = -ENODEV; 9531 break; 9532 } 9533 9534 if (lpfc_pldv_detect && 9535 bf_get(lpfc_sli_intf_sli_family, 9536 &phba->sli4_hba.sli_intf) == 9537 LPFC_SLI_INTF_FAMILY_G6) 9538 pci_write_config_byte(phba->pcidev, 9539 LPFC_SLI_INTF, CFG_PLD); 9540 break; 9541 case LPFC_SLI_INTF_IF_TYPE_1: 9542 default: 9543 break; 9544 } 9545 } 9546 return port_error; 9547 } 9548 9549 /** 9550 * lpfc_sli4_bar0_register_memmap - Set up SLI4 BAR0 register memory map. 9551 * @phba: pointer to lpfc hba data structure. 9552 * @if_type: The SLI4 interface type getting configured. 9553 * 9554 * This routine is invoked to set up SLI4 BAR0 PCI config space register 9555 * memory map. 9556 **/ 9557 static void 9558 lpfc_sli4_bar0_register_memmap(struct lpfc_hba *phba, uint32_t if_type) 9559 { 9560 switch (if_type) { 9561 case LPFC_SLI_INTF_IF_TYPE_0: 9562 phba->sli4_hba.u.if_type0.UERRLOregaddr = 9563 phba->sli4_hba.conf_regs_memmap_p + LPFC_UERR_STATUS_LO; 9564 phba->sli4_hba.u.if_type0.UERRHIregaddr = 9565 phba->sli4_hba.conf_regs_memmap_p + LPFC_UERR_STATUS_HI; 9566 phba->sli4_hba.u.if_type0.UEMASKLOregaddr = 9567 phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_LO; 9568 phba->sli4_hba.u.if_type0.UEMASKHIregaddr = 9569 phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_HI; 9570 phba->sli4_hba.SLIINTFregaddr = 9571 phba->sli4_hba.conf_regs_memmap_p + LPFC_SLI_INTF; 9572 break; 9573 case LPFC_SLI_INTF_IF_TYPE_2: 9574 phba->sli4_hba.u.if_type2.EQDregaddr = 9575 phba->sli4_hba.conf_regs_memmap_p + 9576 LPFC_CTL_PORT_EQ_DELAY_OFFSET; 9577 phba->sli4_hba.u.if_type2.ERR1regaddr = 9578 phba->sli4_hba.conf_regs_memmap_p + 9579 LPFC_CTL_PORT_ER1_OFFSET; 9580 phba->sli4_hba.u.if_type2.ERR2regaddr = 9581 phba->sli4_hba.conf_regs_memmap_p + 9582 LPFC_CTL_PORT_ER2_OFFSET; 9583 phba->sli4_hba.u.if_type2.CTRLregaddr = 9584 phba->sli4_hba.conf_regs_memmap_p + 9585 LPFC_CTL_PORT_CTL_OFFSET; 9586 phba->sli4_hba.u.if_type2.STATUSregaddr = 9587 phba->sli4_hba.conf_regs_memmap_p + 9588 LPFC_CTL_PORT_STA_OFFSET; 9589 phba->sli4_hba.SLIINTFregaddr = 9590 phba->sli4_hba.conf_regs_memmap_p + LPFC_SLI_INTF; 9591 phba->sli4_hba.PSMPHRregaddr = 9592 phba->sli4_hba.conf_regs_memmap_p + 9593 LPFC_CTL_PORT_SEM_OFFSET; 9594 phba->sli4_hba.RQDBregaddr = 9595 phba->sli4_hba.conf_regs_memmap_p + 9596 LPFC_ULP0_RQ_DOORBELL; 9597 phba->sli4_hba.WQDBregaddr = 9598 phba->sli4_hba.conf_regs_memmap_p + 9599 LPFC_ULP0_WQ_DOORBELL; 9600 phba->sli4_hba.CQDBregaddr = 9601 phba->sli4_hba.conf_regs_memmap_p + LPFC_EQCQ_DOORBELL; 9602 phba->sli4_hba.EQDBregaddr = phba->sli4_hba.CQDBregaddr; 9603 phba->sli4_hba.MQDBregaddr = 9604 phba->sli4_hba.conf_regs_memmap_p + LPFC_MQ_DOORBELL; 9605 phba->sli4_hba.BMBXregaddr = 9606 phba->sli4_hba.conf_regs_memmap_p + LPFC_BMBX; 9607 break; 9608 case LPFC_SLI_INTF_IF_TYPE_6: 9609 phba->sli4_hba.u.if_type2.EQDregaddr = 9610 phba->sli4_hba.conf_regs_memmap_p + 9611 LPFC_CTL_PORT_EQ_DELAY_OFFSET; 9612 phba->sli4_hba.u.if_type2.ERR1regaddr = 9613 phba->sli4_hba.conf_regs_memmap_p + 9614 LPFC_CTL_PORT_ER1_OFFSET; 9615 phba->sli4_hba.u.if_type2.ERR2regaddr = 9616 phba->sli4_hba.conf_regs_memmap_p + 9617 LPFC_CTL_PORT_ER2_OFFSET; 9618 phba->sli4_hba.u.if_type2.CTRLregaddr = 9619 phba->sli4_hba.conf_regs_memmap_p + 9620 LPFC_CTL_PORT_CTL_OFFSET; 9621 phba->sli4_hba.u.if_type2.STATUSregaddr = 9622 phba->sli4_hba.conf_regs_memmap_p + 9623 LPFC_CTL_PORT_STA_OFFSET; 9624 phba->sli4_hba.PSMPHRregaddr = 9625 phba->sli4_hba.conf_regs_memmap_p + 9626 LPFC_CTL_PORT_SEM_OFFSET; 9627 phba->sli4_hba.BMBXregaddr = 9628 phba->sli4_hba.conf_regs_memmap_p + LPFC_BMBX; 9629 break; 9630 case LPFC_SLI_INTF_IF_TYPE_1: 9631 default: 9632 dev_printk(KERN_ERR, &phba->pcidev->dev, 9633 "FATAL - unsupported SLI4 interface type - %d\n", 9634 if_type); 9635 break; 9636 } 9637 } 9638 9639 /** 9640 * lpfc_sli4_bar1_register_memmap - Set up SLI4 BAR1 register memory map. 9641 * @phba: pointer to lpfc hba data structure. 9642 * @if_type: sli if type to operate on. 9643 * 9644 * This routine is invoked to set up SLI4 BAR1 register memory map. 9645 **/ 9646 static void 9647 lpfc_sli4_bar1_register_memmap(struct lpfc_hba *phba, uint32_t if_type) 9648 { 9649 switch (if_type) { 9650 case LPFC_SLI_INTF_IF_TYPE_0: 9651 phba->sli4_hba.PSMPHRregaddr = 9652 phba->sli4_hba.ctrl_regs_memmap_p + 9653 LPFC_SLIPORT_IF0_SMPHR; 9654 phba->sli4_hba.ISRregaddr = phba->sli4_hba.ctrl_regs_memmap_p + 9655 LPFC_HST_ISR0; 9656 phba->sli4_hba.IMRregaddr = phba->sli4_hba.ctrl_regs_memmap_p + 9657 LPFC_HST_IMR0; 9658 phba->sli4_hba.ISCRregaddr = phba->sli4_hba.ctrl_regs_memmap_p + 9659 LPFC_HST_ISCR0; 9660 break; 9661 case LPFC_SLI_INTF_IF_TYPE_6: 9662 phba->sli4_hba.RQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p + 9663 LPFC_IF6_RQ_DOORBELL; 9664 phba->sli4_hba.WQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p + 9665 LPFC_IF6_WQ_DOORBELL; 9666 phba->sli4_hba.CQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p + 9667 LPFC_IF6_CQ_DOORBELL; 9668 phba->sli4_hba.EQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p + 9669 LPFC_IF6_EQ_DOORBELL; 9670 phba->sli4_hba.MQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p + 9671 LPFC_IF6_MQ_DOORBELL; 9672 break; 9673 case LPFC_SLI_INTF_IF_TYPE_2: 9674 case LPFC_SLI_INTF_IF_TYPE_1: 9675 default: 9676 dev_err(&phba->pcidev->dev, 9677 "FATAL - unsupported SLI4 interface type - %d\n", 9678 if_type); 9679 break; 9680 } 9681 } 9682 9683 /** 9684 * lpfc_sli4_bar2_register_memmap - Set up SLI4 BAR2 register memory map. 9685 * @phba: pointer to lpfc hba data structure. 9686 * @vf: virtual function number 9687 * 9688 * This routine is invoked to set up SLI4 BAR2 doorbell register memory map 9689 * based on the given viftual function number, @vf. 9690 * 9691 * Return 0 if successful, otherwise -ENODEV. 9692 **/ 9693 static int 9694 lpfc_sli4_bar2_register_memmap(struct lpfc_hba *phba, uint32_t vf) 9695 { 9696 if (vf > LPFC_VIR_FUNC_MAX) 9697 return -ENODEV; 9698 9699 phba->sli4_hba.RQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p + 9700 vf * LPFC_VFR_PAGE_SIZE + 9701 LPFC_ULP0_RQ_DOORBELL); 9702 phba->sli4_hba.WQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p + 9703 vf * LPFC_VFR_PAGE_SIZE + 9704 LPFC_ULP0_WQ_DOORBELL); 9705 phba->sli4_hba.CQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p + 9706 vf * LPFC_VFR_PAGE_SIZE + 9707 LPFC_EQCQ_DOORBELL); 9708 phba->sli4_hba.EQDBregaddr = phba->sli4_hba.CQDBregaddr; 9709 phba->sli4_hba.MQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p + 9710 vf * LPFC_VFR_PAGE_SIZE + LPFC_MQ_DOORBELL); 9711 phba->sli4_hba.BMBXregaddr = (phba->sli4_hba.drbl_regs_memmap_p + 9712 vf * LPFC_VFR_PAGE_SIZE + LPFC_BMBX); 9713 return 0; 9714 } 9715 9716 /** 9717 * lpfc_create_bootstrap_mbox - Create the bootstrap mailbox 9718 * @phba: pointer to lpfc hba data structure. 9719 * 9720 * This routine is invoked to create the bootstrap mailbox 9721 * region consistent with the SLI-4 interface spec. This 9722 * routine allocates all memory necessary to communicate 9723 * mailbox commands to the port and sets up all alignment 9724 * needs. No locks are expected to be held when calling 9725 * this routine. 9726 * 9727 * Return codes 9728 * 0 - successful 9729 * -ENOMEM - could not allocated memory. 9730 **/ 9731 static int 9732 lpfc_create_bootstrap_mbox(struct lpfc_hba *phba) 9733 { 9734 uint32_t bmbx_size; 9735 struct lpfc_dmabuf *dmabuf; 9736 struct dma_address *dma_address; 9737 uint32_t pa_addr; 9738 uint64_t phys_addr; 9739 9740 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL); 9741 if (!dmabuf) 9742 return -ENOMEM; 9743 9744 /* 9745 * The bootstrap mailbox region is comprised of 2 parts 9746 * plus an alignment restriction of 16 bytes. 9747 */ 9748 bmbx_size = sizeof(struct lpfc_bmbx_create) + (LPFC_ALIGN_16_BYTE - 1); 9749 dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev, bmbx_size, 9750 &dmabuf->phys, GFP_KERNEL); 9751 if (!dmabuf->virt) { 9752 kfree(dmabuf); 9753 return -ENOMEM; 9754 } 9755 9756 /* 9757 * Initialize the bootstrap mailbox pointers now so that the register 9758 * operations are simple later. The mailbox dma address is required 9759 * to be 16-byte aligned. Also align the virtual memory as each 9760 * maibox is copied into the bmbx mailbox region before issuing the 9761 * command to the port. 9762 */ 9763 phba->sli4_hba.bmbx.dmabuf = dmabuf; 9764 phba->sli4_hba.bmbx.bmbx_size = bmbx_size; 9765 9766 phba->sli4_hba.bmbx.avirt = PTR_ALIGN(dmabuf->virt, 9767 LPFC_ALIGN_16_BYTE); 9768 phba->sli4_hba.bmbx.aphys = ALIGN(dmabuf->phys, 9769 LPFC_ALIGN_16_BYTE); 9770 9771 /* 9772 * Set the high and low physical addresses now. The SLI4 alignment 9773 * requirement is 16 bytes and the mailbox is posted to the port 9774 * as two 30-bit addresses. The other data is a bit marking whether 9775 * the 30-bit address is the high or low address. 9776 * Upcast bmbx aphys to 64bits so shift instruction compiles 9777 * clean on 32 bit machines. 9778 */ 9779 dma_address = &phba->sli4_hba.bmbx.dma_address; 9780 phys_addr = (uint64_t)phba->sli4_hba.bmbx.aphys; 9781 pa_addr = (uint32_t) ((phys_addr >> 34) & 0x3fffffff); 9782 dma_address->addr_hi = (uint32_t) ((pa_addr << 2) | 9783 LPFC_BMBX_BIT1_ADDR_HI); 9784 9785 pa_addr = (uint32_t) ((phba->sli4_hba.bmbx.aphys >> 4) & 0x3fffffff); 9786 dma_address->addr_lo = (uint32_t) ((pa_addr << 2) | 9787 LPFC_BMBX_BIT1_ADDR_LO); 9788 return 0; 9789 } 9790 9791 /** 9792 * lpfc_destroy_bootstrap_mbox - Destroy all bootstrap mailbox resources 9793 * @phba: pointer to lpfc hba data structure. 9794 * 9795 * This routine is invoked to teardown the bootstrap mailbox 9796 * region and release all host resources. This routine requires 9797 * the caller to ensure all mailbox commands recovered, no 9798 * additional mailbox comands are sent, and interrupts are disabled 9799 * before calling this routine. 9800 * 9801 **/ 9802 static void 9803 lpfc_destroy_bootstrap_mbox(struct lpfc_hba *phba) 9804 { 9805 dma_free_coherent(&phba->pcidev->dev, 9806 phba->sli4_hba.bmbx.bmbx_size, 9807 phba->sli4_hba.bmbx.dmabuf->virt, 9808 phba->sli4_hba.bmbx.dmabuf->phys); 9809 9810 kfree(phba->sli4_hba.bmbx.dmabuf); 9811 memset(&phba->sli4_hba.bmbx, 0, sizeof(struct lpfc_bmbx)); 9812 } 9813 9814 static const char * const lpfc_topo_to_str[] = { 9815 "Loop then P2P", 9816 "Loopback", 9817 "P2P Only", 9818 "Unsupported", 9819 "Loop Only", 9820 "Unsupported", 9821 "P2P then Loop", 9822 }; 9823 9824 #define LINK_FLAGS_DEF 0x0 9825 #define LINK_FLAGS_P2P 0x1 9826 #define LINK_FLAGS_LOOP 0x2 9827 /** 9828 * lpfc_map_topology - Map the topology read from READ_CONFIG 9829 * @phba: pointer to lpfc hba data structure. 9830 * @rd_config: pointer to read config data 9831 * 9832 * This routine is invoked to map the topology values as read 9833 * from the read config mailbox command. If the persistent 9834 * topology feature is supported, the firmware will provide the 9835 * saved topology information to be used in INIT_LINK 9836 **/ 9837 static void 9838 lpfc_map_topology(struct lpfc_hba *phba, struct lpfc_mbx_read_config *rd_config) 9839 { 9840 u8 ptv, tf, pt; 9841 9842 ptv = bf_get(lpfc_mbx_rd_conf_ptv, rd_config); 9843 tf = bf_get(lpfc_mbx_rd_conf_tf, rd_config); 9844 pt = bf_get(lpfc_mbx_rd_conf_pt, rd_config); 9845 9846 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 9847 "2027 Read Config Data : ptv:0x%x, tf:0x%x pt:0x%x", 9848 ptv, tf, pt); 9849 if (!ptv) { 9850 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI, 9851 "2019 FW does not support persistent topology " 9852 "Using driver parameter defined value [%s]", 9853 lpfc_topo_to_str[phba->cfg_topology]); 9854 return; 9855 } 9856 /* FW supports persistent topology - override module parameter value */ 9857 phba->hba_flag |= HBA_PERSISTENT_TOPO; 9858 9859 /* if ASIC_GEN_NUM >= 0xC) */ 9860 if ((bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) == 9861 LPFC_SLI_INTF_IF_TYPE_6) || 9862 (bf_get(lpfc_sli_intf_sli_family, &phba->sli4_hba.sli_intf) == 9863 LPFC_SLI_INTF_FAMILY_G6)) { 9864 if (!tf) { 9865 phba->cfg_topology = ((pt == LINK_FLAGS_LOOP) 9866 ? FLAGS_TOPOLOGY_MODE_LOOP 9867 : FLAGS_TOPOLOGY_MODE_PT_PT); 9868 } else { 9869 phba->hba_flag &= ~HBA_PERSISTENT_TOPO; 9870 } 9871 } else { /* G5 */ 9872 if (tf) { 9873 /* If topology failover set - pt is '0' or '1' */ 9874 phba->cfg_topology = (pt ? FLAGS_TOPOLOGY_MODE_PT_LOOP : 9875 FLAGS_TOPOLOGY_MODE_LOOP_PT); 9876 } else { 9877 phba->cfg_topology = ((pt == LINK_FLAGS_P2P) 9878 ? FLAGS_TOPOLOGY_MODE_PT_PT 9879 : FLAGS_TOPOLOGY_MODE_LOOP); 9880 } 9881 } 9882 if (phba->hba_flag & HBA_PERSISTENT_TOPO) { 9883 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 9884 "2020 Using persistent topology value [%s]", 9885 lpfc_topo_to_str[phba->cfg_topology]); 9886 } else { 9887 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI, 9888 "2021 Invalid topology values from FW " 9889 "Using driver parameter defined value [%s]", 9890 lpfc_topo_to_str[phba->cfg_topology]); 9891 } 9892 } 9893 9894 /** 9895 * lpfc_sli4_read_config - Get the config parameters. 9896 * @phba: pointer to lpfc hba data structure. 9897 * 9898 * This routine is invoked to read the configuration parameters from the HBA. 9899 * The configuration parameters are used to set the base and maximum values 9900 * for RPI's XRI's VPI's VFI's and FCFIs. These values also affect the resource 9901 * allocation for the port. 9902 * 9903 * Return codes 9904 * 0 - successful 9905 * -ENOMEM - No available memory 9906 * -EIO - The mailbox failed to complete successfully. 9907 **/ 9908 int 9909 lpfc_sli4_read_config(struct lpfc_hba *phba) 9910 { 9911 LPFC_MBOXQ_t *pmb; 9912 struct lpfc_mbx_read_config *rd_config; 9913 union lpfc_sli4_cfg_shdr *shdr; 9914 uint32_t shdr_status, shdr_add_status; 9915 struct lpfc_mbx_get_func_cfg *get_func_cfg; 9916 struct lpfc_rsrc_desc_fcfcoe *desc; 9917 char *pdesc_0; 9918 uint16_t forced_link_speed; 9919 uint32_t if_type, qmin, fawwpn; 9920 int length, i, rc = 0, rc2; 9921 9922 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 9923 if (!pmb) { 9924 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 9925 "2011 Unable to allocate memory for issuing " 9926 "SLI_CONFIG_SPECIAL mailbox command\n"); 9927 return -ENOMEM; 9928 } 9929 9930 lpfc_read_config(phba, pmb); 9931 9932 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); 9933 if (rc != MBX_SUCCESS) { 9934 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 9935 "2012 Mailbox failed , mbxCmd x%x " 9936 "READ_CONFIG, mbxStatus x%x\n", 9937 bf_get(lpfc_mqe_command, &pmb->u.mqe), 9938 bf_get(lpfc_mqe_status, &pmb->u.mqe)); 9939 rc = -EIO; 9940 } else { 9941 rd_config = &pmb->u.mqe.un.rd_config; 9942 if (bf_get(lpfc_mbx_rd_conf_lnk_ldv, rd_config)) { 9943 phba->sli4_hba.lnk_info.lnk_dv = LPFC_LNK_DAT_VAL; 9944 phba->sli4_hba.lnk_info.lnk_tp = 9945 bf_get(lpfc_mbx_rd_conf_lnk_type, rd_config); 9946 phba->sli4_hba.lnk_info.lnk_no = 9947 bf_get(lpfc_mbx_rd_conf_lnk_numb, rd_config); 9948 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 9949 "3081 lnk_type:%d, lnk_numb:%d\n", 9950 phba->sli4_hba.lnk_info.lnk_tp, 9951 phba->sli4_hba.lnk_info.lnk_no); 9952 } else 9953 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI, 9954 "3082 Mailbox (x%x) returned ldv:x0\n", 9955 bf_get(lpfc_mqe_command, &pmb->u.mqe)); 9956 if (bf_get(lpfc_mbx_rd_conf_bbscn_def, rd_config)) { 9957 phba->bbcredit_support = 1; 9958 phba->sli4_hba.bbscn_params.word0 = rd_config->word8; 9959 } 9960 9961 fawwpn = bf_get(lpfc_mbx_rd_conf_fawwpn, rd_config); 9962 9963 if (fawwpn) { 9964 lpfc_printf_log(phba, KERN_INFO, 9965 LOG_INIT | LOG_DISCOVERY, 9966 "2702 READ_CONFIG: FA-PWWN is " 9967 "configured on\n"); 9968 phba->sli4_hba.fawwpn_flag |= LPFC_FAWWPN_CONFIG; 9969 } else { 9970 /* Clear FW configured flag, preserve driver flag */ 9971 phba->sli4_hba.fawwpn_flag &= ~LPFC_FAWWPN_CONFIG; 9972 } 9973 9974 phba->sli4_hba.conf_trunk = 9975 bf_get(lpfc_mbx_rd_conf_trunk, rd_config); 9976 phba->sli4_hba.extents_in_use = 9977 bf_get(lpfc_mbx_rd_conf_extnts_inuse, rd_config); 9978 9979 phba->sli4_hba.max_cfg_param.max_xri = 9980 bf_get(lpfc_mbx_rd_conf_xri_count, rd_config); 9981 /* Reduce resource usage in kdump environment */ 9982 if (is_kdump_kernel() && 9983 phba->sli4_hba.max_cfg_param.max_xri > 512) 9984 phba->sli4_hba.max_cfg_param.max_xri = 512; 9985 phba->sli4_hba.max_cfg_param.xri_base = 9986 bf_get(lpfc_mbx_rd_conf_xri_base, rd_config); 9987 phba->sli4_hba.max_cfg_param.max_vpi = 9988 bf_get(lpfc_mbx_rd_conf_vpi_count, rd_config); 9989 /* Limit the max we support */ 9990 if (phba->sli4_hba.max_cfg_param.max_vpi > LPFC_MAX_VPORTS) 9991 phba->sli4_hba.max_cfg_param.max_vpi = LPFC_MAX_VPORTS; 9992 phba->sli4_hba.max_cfg_param.vpi_base = 9993 bf_get(lpfc_mbx_rd_conf_vpi_base, rd_config); 9994 phba->sli4_hba.max_cfg_param.max_rpi = 9995 bf_get(lpfc_mbx_rd_conf_rpi_count, rd_config); 9996 phba->sli4_hba.max_cfg_param.rpi_base = 9997 bf_get(lpfc_mbx_rd_conf_rpi_base, rd_config); 9998 phba->sli4_hba.max_cfg_param.max_vfi = 9999 bf_get(lpfc_mbx_rd_conf_vfi_count, rd_config); 10000 phba->sli4_hba.max_cfg_param.vfi_base = 10001 bf_get(lpfc_mbx_rd_conf_vfi_base, rd_config); 10002 phba->sli4_hba.max_cfg_param.max_fcfi = 10003 bf_get(lpfc_mbx_rd_conf_fcfi_count, rd_config); 10004 phba->sli4_hba.max_cfg_param.max_eq = 10005 bf_get(lpfc_mbx_rd_conf_eq_count, rd_config); 10006 phba->sli4_hba.max_cfg_param.max_rq = 10007 bf_get(lpfc_mbx_rd_conf_rq_count, rd_config); 10008 phba->sli4_hba.max_cfg_param.max_wq = 10009 bf_get(lpfc_mbx_rd_conf_wq_count, rd_config); 10010 phba->sli4_hba.max_cfg_param.max_cq = 10011 bf_get(lpfc_mbx_rd_conf_cq_count, rd_config); 10012 phba->lmt = bf_get(lpfc_mbx_rd_conf_lmt, rd_config); 10013 phba->sli4_hba.next_xri = phba->sli4_hba.max_cfg_param.xri_base; 10014 phba->vpi_base = phba->sli4_hba.max_cfg_param.vpi_base; 10015 phba->vfi_base = phba->sli4_hba.max_cfg_param.vfi_base; 10016 phba->max_vpi = (phba->sli4_hba.max_cfg_param.max_vpi > 0) ? 10017 (phba->sli4_hba.max_cfg_param.max_vpi - 1) : 0; 10018 phba->max_vports = phba->max_vpi; 10019 10020 /* Next decide on FPIN or Signal E2E CGN support 10021 * For congestion alarms and warnings valid combination are: 10022 * 1. FPIN alarms / FPIN warnings 10023 * 2. Signal alarms / Signal warnings 10024 * 3. FPIN alarms / Signal warnings 10025 * 4. Signal alarms / FPIN warnings 10026 * 10027 * Initialize the adapter frequency to 100 mSecs 10028 */ 10029 phba->cgn_reg_fpin = LPFC_CGN_FPIN_BOTH; 10030 phba->cgn_reg_signal = EDC_CG_SIG_NOTSUPPORTED; 10031 phba->cgn_sig_freq = lpfc_fabric_cgn_frequency; 10032 10033 if (lpfc_use_cgn_signal) { 10034 if (bf_get(lpfc_mbx_rd_conf_wcs, rd_config)) { 10035 phba->cgn_reg_signal = EDC_CG_SIG_WARN_ONLY; 10036 phba->cgn_reg_fpin &= ~LPFC_CGN_FPIN_WARN; 10037 } 10038 if (bf_get(lpfc_mbx_rd_conf_acs, rd_config)) { 10039 /* MUST support both alarm and warning 10040 * because EDC does not support alarm alone. 10041 */ 10042 if (phba->cgn_reg_signal != 10043 EDC_CG_SIG_WARN_ONLY) { 10044 /* Must support both or none */ 10045 phba->cgn_reg_fpin = LPFC_CGN_FPIN_BOTH; 10046 phba->cgn_reg_signal = 10047 EDC_CG_SIG_NOTSUPPORTED; 10048 } else { 10049 phba->cgn_reg_signal = 10050 EDC_CG_SIG_WARN_ALARM; 10051 phba->cgn_reg_fpin = 10052 LPFC_CGN_FPIN_NONE; 10053 } 10054 } 10055 } 10056 10057 /* Set the congestion initial signal and fpin values. */ 10058 phba->cgn_init_reg_fpin = phba->cgn_reg_fpin; 10059 phba->cgn_init_reg_signal = phba->cgn_reg_signal; 10060 10061 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT, 10062 "6446 READ_CONFIG reg_sig x%x reg_fpin:x%x\n", 10063 phba->cgn_reg_signal, phba->cgn_reg_fpin); 10064 10065 lpfc_map_topology(phba, rd_config); 10066 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 10067 "2003 cfg params Extents? %d " 10068 "XRI(B:%d M:%d), " 10069 "VPI(B:%d M:%d) " 10070 "VFI(B:%d M:%d) " 10071 "RPI(B:%d M:%d) " 10072 "FCFI:%d EQ:%d CQ:%d WQ:%d RQ:%d lmt:x%x\n", 10073 phba->sli4_hba.extents_in_use, 10074 phba->sli4_hba.max_cfg_param.xri_base, 10075 phba->sli4_hba.max_cfg_param.max_xri, 10076 phba->sli4_hba.max_cfg_param.vpi_base, 10077 phba->sli4_hba.max_cfg_param.max_vpi, 10078 phba->sli4_hba.max_cfg_param.vfi_base, 10079 phba->sli4_hba.max_cfg_param.max_vfi, 10080 phba->sli4_hba.max_cfg_param.rpi_base, 10081 phba->sli4_hba.max_cfg_param.max_rpi, 10082 phba->sli4_hba.max_cfg_param.max_fcfi, 10083 phba->sli4_hba.max_cfg_param.max_eq, 10084 phba->sli4_hba.max_cfg_param.max_cq, 10085 phba->sli4_hba.max_cfg_param.max_wq, 10086 phba->sli4_hba.max_cfg_param.max_rq, 10087 phba->lmt); 10088 10089 /* 10090 * Calculate queue resources based on how 10091 * many WQ/CQ/EQs are available. 10092 */ 10093 qmin = phba->sli4_hba.max_cfg_param.max_wq; 10094 if (phba->sli4_hba.max_cfg_param.max_cq < qmin) 10095 qmin = phba->sli4_hba.max_cfg_param.max_cq; 10096 /* 10097 * Reserve 4 (ELS, NVME LS, MBOX, plus one extra) and 10098 * the remainder can be used for NVME / FCP. 10099 */ 10100 qmin -= 4; 10101 if (phba->sli4_hba.max_cfg_param.max_eq < qmin) 10102 qmin = phba->sli4_hba.max_cfg_param.max_eq; 10103 10104 /* Check to see if there is enough for default cfg */ 10105 if ((phba->cfg_irq_chann > qmin) || 10106 (phba->cfg_hdw_queue > qmin)) { 10107 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10108 "2005 Reducing Queues - " 10109 "FW resource limitation: " 10110 "WQ %d CQ %d EQ %d: min %d: " 10111 "IRQ %d HDWQ %d\n", 10112 phba->sli4_hba.max_cfg_param.max_wq, 10113 phba->sli4_hba.max_cfg_param.max_cq, 10114 phba->sli4_hba.max_cfg_param.max_eq, 10115 qmin, phba->cfg_irq_chann, 10116 phba->cfg_hdw_queue); 10117 10118 if (phba->cfg_irq_chann > qmin) 10119 phba->cfg_irq_chann = qmin; 10120 if (phba->cfg_hdw_queue > qmin) 10121 phba->cfg_hdw_queue = qmin; 10122 } 10123 } 10124 10125 if (rc) 10126 goto read_cfg_out; 10127 10128 /* Update link speed if forced link speed is supported */ 10129 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf); 10130 if (if_type >= LPFC_SLI_INTF_IF_TYPE_2) { 10131 forced_link_speed = 10132 bf_get(lpfc_mbx_rd_conf_link_speed, rd_config); 10133 if (forced_link_speed) { 10134 phba->hba_flag |= HBA_FORCED_LINK_SPEED; 10135 10136 switch (forced_link_speed) { 10137 case LINK_SPEED_1G: 10138 phba->cfg_link_speed = 10139 LPFC_USER_LINK_SPEED_1G; 10140 break; 10141 case LINK_SPEED_2G: 10142 phba->cfg_link_speed = 10143 LPFC_USER_LINK_SPEED_2G; 10144 break; 10145 case LINK_SPEED_4G: 10146 phba->cfg_link_speed = 10147 LPFC_USER_LINK_SPEED_4G; 10148 break; 10149 case LINK_SPEED_8G: 10150 phba->cfg_link_speed = 10151 LPFC_USER_LINK_SPEED_8G; 10152 break; 10153 case LINK_SPEED_10G: 10154 phba->cfg_link_speed = 10155 LPFC_USER_LINK_SPEED_10G; 10156 break; 10157 case LINK_SPEED_16G: 10158 phba->cfg_link_speed = 10159 LPFC_USER_LINK_SPEED_16G; 10160 break; 10161 case LINK_SPEED_32G: 10162 phba->cfg_link_speed = 10163 LPFC_USER_LINK_SPEED_32G; 10164 break; 10165 case LINK_SPEED_64G: 10166 phba->cfg_link_speed = 10167 LPFC_USER_LINK_SPEED_64G; 10168 break; 10169 case 0xffff: 10170 phba->cfg_link_speed = 10171 LPFC_USER_LINK_SPEED_AUTO; 10172 break; 10173 default: 10174 lpfc_printf_log(phba, KERN_ERR, 10175 LOG_TRACE_EVENT, 10176 "0047 Unrecognized link " 10177 "speed : %d\n", 10178 forced_link_speed); 10179 phba->cfg_link_speed = 10180 LPFC_USER_LINK_SPEED_AUTO; 10181 } 10182 } 10183 } 10184 10185 /* Reset the DFT_HBA_Q_DEPTH to the max xri */ 10186 length = phba->sli4_hba.max_cfg_param.max_xri - 10187 lpfc_sli4_get_els_iocb_cnt(phba); 10188 if (phba->cfg_hba_queue_depth > length) { 10189 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 10190 "3361 HBA queue depth changed from %d to %d\n", 10191 phba->cfg_hba_queue_depth, length); 10192 phba->cfg_hba_queue_depth = length; 10193 } 10194 10195 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) < 10196 LPFC_SLI_INTF_IF_TYPE_2) 10197 goto read_cfg_out; 10198 10199 /* get the pf# and vf# for SLI4 if_type 2 port */ 10200 length = (sizeof(struct lpfc_mbx_get_func_cfg) - 10201 sizeof(struct lpfc_sli4_cfg_mhdr)); 10202 lpfc_sli4_config(phba, pmb, LPFC_MBOX_SUBSYSTEM_COMMON, 10203 LPFC_MBOX_OPCODE_GET_FUNCTION_CONFIG, 10204 length, LPFC_SLI4_MBX_EMBED); 10205 10206 rc2 = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); 10207 shdr = (union lpfc_sli4_cfg_shdr *) 10208 &pmb->u.mqe.un.sli4_config.header.cfg_shdr; 10209 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response); 10210 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response); 10211 if (rc2 || shdr_status || shdr_add_status) { 10212 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10213 "3026 Mailbox failed , mbxCmd x%x " 10214 "GET_FUNCTION_CONFIG, mbxStatus x%x\n", 10215 bf_get(lpfc_mqe_command, &pmb->u.mqe), 10216 bf_get(lpfc_mqe_status, &pmb->u.mqe)); 10217 goto read_cfg_out; 10218 } 10219 10220 /* search for fc_fcoe resrouce descriptor */ 10221 get_func_cfg = &pmb->u.mqe.un.get_func_cfg; 10222 10223 pdesc_0 = (char *)&get_func_cfg->func_cfg.desc[0]; 10224 desc = (struct lpfc_rsrc_desc_fcfcoe *)pdesc_0; 10225 length = bf_get(lpfc_rsrc_desc_fcfcoe_length, desc); 10226 if (length == LPFC_RSRC_DESC_TYPE_FCFCOE_V0_RSVD) 10227 length = LPFC_RSRC_DESC_TYPE_FCFCOE_V0_LENGTH; 10228 else if (length != LPFC_RSRC_DESC_TYPE_FCFCOE_V1_LENGTH) 10229 goto read_cfg_out; 10230 10231 for (i = 0; i < LPFC_RSRC_DESC_MAX_NUM; i++) { 10232 desc = (struct lpfc_rsrc_desc_fcfcoe *)(pdesc_0 + length * i); 10233 if (LPFC_RSRC_DESC_TYPE_FCFCOE == 10234 bf_get(lpfc_rsrc_desc_fcfcoe_type, desc)) { 10235 phba->sli4_hba.iov.pf_number = 10236 bf_get(lpfc_rsrc_desc_fcfcoe_pfnum, desc); 10237 phba->sli4_hba.iov.vf_number = 10238 bf_get(lpfc_rsrc_desc_fcfcoe_vfnum, desc); 10239 break; 10240 } 10241 } 10242 10243 if (i < LPFC_RSRC_DESC_MAX_NUM) 10244 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 10245 "3027 GET_FUNCTION_CONFIG: pf_number:%d, " 10246 "vf_number:%d\n", phba->sli4_hba.iov.pf_number, 10247 phba->sli4_hba.iov.vf_number); 10248 else 10249 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10250 "3028 GET_FUNCTION_CONFIG: failed to find " 10251 "Resource Descriptor:x%x\n", 10252 LPFC_RSRC_DESC_TYPE_FCFCOE); 10253 10254 read_cfg_out: 10255 mempool_free(pmb, phba->mbox_mem_pool); 10256 return rc; 10257 } 10258 10259 /** 10260 * lpfc_setup_endian_order - Write endian order to an SLI4 if_type 0 port. 10261 * @phba: pointer to lpfc hba data structure. 10262 * 10263 * This routine is invoked to setup the port-side endian order when 10264 * the port if_type is 0. This routine has no function for other 10265 * if_types. 10266 * 10267 * Return codes 10268 * 0 - successful 10269 * -ENOMEM - No available memory 10270 * -EIO - The mailbox failed to complete successfully. 10271 **/ 10272 static int 10273 lpfc_setup_endian_order(struct lpfc_hba *phba) 10274 { 10275 LPFC_MBOXQ_t *mboxq; 10276 uint32_t if_type, rc = 0; 10277 uint32_t endian_mb_data[2] = {HOST_ENDIAN_LOW_WORD0, 10278 HOST_ENDIAN_HIGH_WORD1}; 10279 10280 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf); 10281 switch (if_type) { 10282 case LPFC_SLI_INTF_IF_TYPE_0: 10283 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, 10284 GFP_KERNEL); 10285 if (!mboxq) { 10286 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10287 "0492 Unable to allocate memory for " 10288 "issuing SLI_CONFIG_SPECIAL mailbox " 10289 "command\n"); 10290 return -ENOMEM; 10291 } 10292 10293 /* 10294 * The SLI4_CONFIG_SPECIAL mailbox command requires the first 10295 * two words to contain special data values and no other data. 10296 */ 10297 memset(mboxq, 0, sizeof(LPFC_MBOXQ_t)); 10298 memcpy(&mboxq->u.mqe, &endian_mb_data, sizeof(endian_mb_data)); 10299 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); 10300 if (rc != MBX_SUCCESS) { 10301 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10302 "0493 SLI_CONFIG_SPECIAL mailbox " 10303 "failed with status x%x\n", 10304 rc); 10305 rc = -EIO; 10306 } 10307 mempool_free(mboxq, phba->mbox_mem_pool); 10308 break; 10309 case LPFC_SLI_INTF_IF_TYPE_6: 10310 case LPFC_SLI_INTF_IF_TYPE_2: 10311 case LPFC_SLI_INTF_IF_TYPE_1: 10312 default: 10313 break; 10314 } 10315 return rc; 10316 } 10317 10318 /** 10319 * lpfc_sli4_queue_verify - Verify and update EQ counts 10320 * @phba: pointer to lpfc hba data structure. 10321 * 10322 * This routine is invoked to check the user settable queue counts for EQs. 10323 * After this routine is called the counts will be set to valid values that 10324 * adhere to the constraints of the system's interrupt vectors and the port's 10325 * queue resources. 10326 * 10327 * Return codes 10328 * 0 - successful 10329 * -ENOMEM - No available memory 10330 **/ 10331 static int 10332 lpfc_sli4_queue_verify(struct lpfc_hba *phba) 10333 { 10334 /* 10335 * Sanity check for configured queue parameters against the run-time 10336 * device parameters 10337 */ 10338 10339 if (phba->nvmet_support) { 10340 if (phba->cfg_hdw_queue < phba->cfg_nvmet_mrq) 10341 phba->cfg_nvmet_mrq = phba->cfg_hdw_queue; 10342 if (phba->cfg_nvmet_mrq > LPFC_NVMET_MRQ_MAX) 10343 phba->cfg_nvmet_mrq = LPFC_NVMET_MRQ_MAX; 10344 } 10345 10346 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 10347 "2574 IO channels: hdwQ %d IRQ %d MRQ: %d\n", 10348 phba->cfg_hdw_queue, phba->cfg_irq_chann, 10349 phba->cfg_nvmet_mrq); 10350 10351 /* Get EQ depth from module parameter, fake the default for now */ 10352 phba->sli4_hba.eq_esize = LPFC_EQE_SIZE_4B; 10353 phba->sli4_hba.eq_ecount = LPFC_EQE_DEF_COUNT; 10354 10355 /* Get CQ depth from module parameter, fake the default for now */ 10356 phba->sli4_hba.cq_esize = LPFC_CQE_SIZE; 10357 phba->sli4_hba.cq_ecount = LPFC_CQE_DEF_COUNT; 10358 return 0; 10359 } 10360 10361 static int 10362 lpfc_alloc_io_wq_cq(struct lpfc_hba *phba, int idx) 10363 { 10364 struct lpfc_queue *qdesc; 10365 u32 wqesize; 10366 int cpu; 10367 10368 cpu = lpfc_find_cpu_handle(phba, idx, LPFC_FIND_BY_HDWQ); 10369 /* Create Fast Path IO CQs */ 10370 if (phba->enab_exp_wqcq_pages) 10371 /* Increase the CQ size when WQEs contain an embedded cdb */ 10372 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_EXPANDED_PAGE_SIZE, 10373 phba->sli4_hba.cq_esize, 10374 LPFC_CQE_EXP_COUNT, cpu); 10375 10376 else 10377 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, 10378 phba->sli4_hba.cq_esize, 10379 phba->sli4_hba.cq_ecount, cpu); 10380 if (!qdesc) { 10381 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10382 "0499 Failed allocate fast-path IO CQ (%d)\n", 10383 idx); 10384 return 1; 10385 } 10386 qdesc->qe_valid = 1; 10387 qdesc->hdwq = idx; 10388 qdesc->chann = cpu; 10389 phba->sli4_hba.hdwq[idx].io_cq = qdesc; 10390 10391 /* Create Fast Path IO WQs */ 10392 if (phba->enab_exp_wqcq_pages) { 10393 /* Increase the WQ size when WQEs contain an embedded cdb */ 10394 wqesize = (phba->fcp_embed_io) ? 10395 LPFC_WQE128_SIZE : phba->sli4_hba.wq_esize; 10396 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_EXPANDED_PAGE_SIZE, 10397 wqesize, 10398 LPFC_WQE_EXP_COUNT, cpu); 10399 } else 10400 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, 10401 phba->sli4_hba.wq_esize, 10402 phba->sli4_hba.wq_ecount, cpu); 10403 10404 if (!qdesc) { 10405 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10406 "0503 Failed allocate fast-path IO WQ (%d)\n", 10407 idx); 10408 return 1; 10409 } 10410 qdesc->hdwq = idx; 10411 qdesc->chann = cpu; 10412 phba->sli4_hba.hdwq[idx].io_wq = qdesc; 10413 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list); 10414 return 0; 10415 } 10416 10417 /** 10418 * lpfc_sli4_queue_create - Create all the SLI4 queues 10419 * @phba: pointer to lpfc hba data structure. 10420 * 10421 * This routine is invoked to allocate all the SLI4 queues for the FCoE HBA 10422 * operation. For each SLI4 queue type, the parameters such as queue entry 10423 * count (queue depth) shall be taken from the module parameter. For now, 10424 * we just use some constant number as place holder. 10425 * 10426 * Return codes 10427 * 0 - successful 10428 * -ENOMEM - No availble memory 10429 * -EIO - The mailbox failed to complete successfully. 10430 **/ 10431 int 10432 lpfc_sli4_queue_create(struct lpfc_hba *phba) 10433 { 10434 struct lpfc_queue *qdesc; 10435 int idx, cpu, eqcpu; 10436 struct lpfc_sli4_hdw_queue *qp; 10437 struct lpfc_vector_map_info *cpup; 10438 struct lpfc_vector_map_info *eqcpup; 10439 struct lpfc_eq_intr_info *eqi; 10440 10441 /* 10442 * Create HBA Record arrays. 10443 * Both NVME and FCP will share that same vectors / EQs 10444 */ 10445 phba->sli4_hba.mq_esize = LPFC_MQE_SIZE; 10446 phba->sli4_hba.mq_ecount = LPFC_MQE_DEF_COUNT; 10447 phba->sli4_hba.wq_esize = LPFC_WQE_SIZE; 10448 phba->sli4_hba.wq_ecount = LPFC_WQE_DEF_COUNT; 10449 phba->sli4_hba.rq_esize = LPFC_RQE_SIZE; 10450 phba->sli4_hba.rq_ecount = LPFC_RQE_DEF_COUNT; 10451 phba->sli4_hba.eq_esize = LPFC_EQE_SIZE_4B; 10452 phba->sli4_hba.eq_ecount = LPFC_EQE_DEF_COUNT; 10453 phba->sli4_hba.cq_esize = LPFC_CQE_SIZE; 10454 phba->sli4_hba.cq_ecount = LPFC_CQE_DEF_COUNT; 10455 10456 if (!phba->sli4_hba.hdwq) { 10457 phba->sli4_hba.hdwq = kcalloc( 10458 phba->cfg_hdw_queue, sizeof(struct lpfc_sli4_hdw_queue), 10459 GFP_KERNEL); 10460 if (!phba->sli4_hba.hdwq) { 10461 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10462 "6427 Failed allocate memory for " 10463 "fast-path Hardware Queue array\n"); 10464 goto out_error; 10465 } 10466 /* Prepare hardware queues to take IO buffers */ 10467 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { 10468 qp = &phba->sli4_hba.hdwq[idx]; 10469 spin_lock_init(&qp->io_buf_list_get_lock); 10470 spin_lock_init(&qp->io_buf_list_put_lock); 10471 INIT_LIST_HEAD(&qp->lpfc_io_buf_list_get); 10472 INIT_LIST_HEAD(&qp->lpfc_io_buf_list_put); 10473 qp->get_io_bufs = 0; 10474 qp->put_io_bufs = 0; 10475 qp->total_io_bufs = 0; 10476 spin_lock_init(&qp->abts_io_buf_list_lock); 10477 INIT_LIST_HEAD(&qp->lpfc_abts_io_buf_list); 10478 qp->abts_scsi_io_bufs = 0; 10479 qp->abts_nvme_io_bufs = 0; 10480 INIT_LIST_HEAD(&qp->sgl_list); 10481 INIT_LIST_HEAD(&qp->cmd_rsp_buf_list); 10482 spin_lock_init(&qp->hdwq_lock); 10483 } 10484 } 10485 10486 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 10487 if (phba->nvmet_support) { 10488 phba->sli4_hba.nvmet_cqset = kcalloc( 10489 phba->cfg_nvmet_mrq, 10490 sizeof(struct lpfc_queue *), 10491 GFP_KERNEL); 10492 if (!phba->sli4_hba.nvmet_cqset) { 10493 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10494 "3121 Fail allocate memory for " 10495 "fast-path CQ set array\n"); 10496 goto out_error; 10497 } 10498 phba->sli4_hba.nvmet_mrq_hdr = kcalloc( 10499 phba->cfg_nvmet_mrq, 10500 sizeof(struct lpfc_queue *), 10501 GFP_KERNEL); 10502 if (!phba->sli4_hba.nvmet_mrq_hdr) { 10503 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10504 "3122 Fail allocate memory for " 10505 "fast-path RQ set hdr array\n"); 10506 goto out_error; 10507 } 10508 phba->sli4_hba.nvmet_mrq_data = kcalloc( 10509 phba->cfg_nvmet_mrq, 10510 sizeof(struct lpfc_queue *), 10511 GFP_KERNEL); 10512 if (!phba->sli4_hba.nvmet_mrq_data) { 10513 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10514 "3124 Fail allocate memory for " 10515 "fast-path RQ set data array\n"); 10516 goto out_error; 10517 } 10518 } 10519 } 10520 10521 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_wq_list); 10522 10523 /* Create HBA Event Queues (EQs) */ 10524 for_each_present_cpu(cpu) { 10525 /* We only want to create 1 EQ per vector, even though 10526 * multiple CPUs might be using that vector. so only 10527 * selects the CPUs that are LPFC_CPU_FIRST_IRQ. 10528 */ 10529 cpup = &phba->sli4_hba.cpu_map[cpu]; 10530 if (!(cpup->flag & LPFC_CPU_FIRST_IRQ)) 10531 continue; 10532 10533 /* Get a ptr to the Hardware Queue associated with this CPU */ 10534 qp = &phba->sli4_hba.hdwq[cpup->hdwq]; 10535 10536 /* Allocate an EQ */ 10537 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, 10538 phba->sli4_hba.eq_esize, 10539 phba->sli4_hba.eq_ecount, cpu); 10540 if (!qdesc) { 10541 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10542 "0497 Failed allocate EQ (%d)\n", 10543 cpup->hdwq); 10544 goto out_error; 10545 } 10546 qdesc->qe_valid = 1; 10547 qdesc->hdwq = cpup->hdwq; 10548 qdesc->chann = cpu; /* First CPU this EQ is affinitized to */ 10549 qdesc->last_cpu = qdesc->chann; 10550 10551 /* Save the allocated EQ in the Hardware Queue */ 10552 qp->hba_eq = qdesc; 10553 10554 eqi = per_cpu_ptr(phba->sli4_hba.eq_info, qdesc->last_cpu); 10555 list_add(&qdesc->cpu_list, &eqi->list); 10556 } 10557 10558 /* Now we need to populate the other Hardware Queues, that share 10559 * an IRQ vector, with the associated EQ ptr. 10560 */ 10561 for_each_present_cpu(cpu) { 10562 cpup = &phba->sli4_hba.cpu_map[cpu]; 10563 10564 /* Check for EQ already allocated in previous loop */ 10565 if (cpup->flag & LPFC_CPU_FIRST_IRQ) 10566 continue; 10567 10568 /* Check for multiple CPUs per hdwq */ 10569 qp = &phba->sli4_hba.hdwq[cpup->hdwq]; 10570 if (qp->hba_eq) 10571 continue; 10572 10573 /* We need to share an EQ for this hdwq */ 10574 eqcpu = lpfc_find_cpu_handle(phba, cpup->eq, LPFC_FIND_BY_EQ); 10575 eqcpup = &phba->sli4_hba.cpu_map[eqcpu]; 10576 qp->hba_eq = phba->sli4_hba.hdwq[eqcpup->hdwq].hba_eq; 10577 } 10578 10579 /* Allocate IO Path SLI4 CQ/WQs */ 10580 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { 10581 if (lpfc_alloc_io_wq_cq(phba, idx)) 10582 goto out_error; 10583 } 10584 10585 if (phba->nvmet_support) { 10586 for (idx = 0; idx < phba->cfg_nvmet_mrq; idx++) { 10587 cpu = lpfc_find_cpu_handle(phba, idx, 10588 LPFC_FIND_BY_HDWQ); 10589 qdesc = lpfc_sli4_queue_alloc(phba, 10590 LPFC_DEFAULT_PAGE_SIZE, 10591 phba->sli4_hba.cq_esize, 10592 phba->sli4_hba.cq_ecount, 10593 cpu); 10594 if (!qdesc) { 10595 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10596 "3142 Failed allocate NVME " 10597 "CQ Set (%d)\n", idx); 10598 goto out_error; 10599 } 10600 qdesc->qe_valid = 1; 10601 qdesc->hdwq = idx; 10602 qdesc->chann = cpu; 10603 phba->sli4_hba.nvmet_cqset[idx] = qdesc; 10604 } 10605 } 10606 10607 /* 10608 * Create Slow Path Completion Queues (CQs) 10609 */ 10610 10611 cpu = lpfc_find_cpu_handle(phba, 0, LPFC_FIND_BY_EQ); 10612 /* Create slow-path Mailbox Command Complete Queue */ 10613 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, 10614 phba->sli4_hba.cq_esize, 10615 phba->sli4_hba.cq_ecount, cpu); 10616 if (!qdesc) { 10617 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10618 "0500 Failed allocate slow-path mailbox CQ\n"); 10619 goto out_error; 10620 } 10621 qdesc->qe_valid = 1; 10622 phba->sli4_hba.mbx_cq = qdesc; 10623 10624 /* Create slow-path ELS Complete Queue */ 10625 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, 10626 phba->sli4_hba.cq_esize, 10627 phba->sli4_hba.cq_ecount, cpu); 10628 if (!qdesc) { 10629 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10630 "0501 Failed allocate slow-path ELS CQ\n"); 10631 goto out_error; 10632 } 10633 qdesc->qe_valid = 1; 10634 qdesc->chann = cpu; 10635 phba->sli4_hba.els_cq = qdesc; 10636 10637 10638 /* 10639 * Create Slow Path Work Queues (WQs) 10640 */ 10641 10642 /* Create Mailbox Command Queue */ 10643 10644 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, 10645 phba->sli4_hba.mq_esize, 10646 phba->sli4_hba.mq_ecount, cpu); 10647 if (!qdesc) { 10648 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10649 "0505 Failed allocate slow-path MQ\n"); 10650 goto out_error; 10651 } 10652 qdesc->chann = cpu; 10653 phba->sli4_hba.mbx_wq = qdesc; 10654 10655 /* 10656 * Create ELS Work Queues 10657 */ 10658 10659 /* Create slow-path ELS Work Queue */ 10660 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, 10661 phba->sli4_hba.wq_esize, 10662 phba->sli4_hba.wq_ecount, cpu); 10663 if (!qdesc) { 10664 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10665 "0504 Failed allocate slow-path ELS WQ\n"); 10666 goto out_error; 10667 } 10668 qdesc->chann = cpu; 10669 phba->sli4_hba.els_wq = qdesc; 10670 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list); 10671 10672 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 10673 /* Create NVME LS Complete Queue */ 10674 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, 10675 phba->sli4_hba.cq_esize, 10676 phba->sli4_hba.cq_ecount, cpu); 10677 if (!qdesc) { 10678 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10679 "6079 Failed allocate NVME LS CQ\n"); 10680 goto out_error; 10681 } 10682 qdesc->chann = cpu; 10683 qdesc->qe_valid = 1; 10684 phba->sli4_hba.nvmels_cq = qdesc; 10685 10686 /* Create NVME LS Work Queue */ 10687 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, 10688 phba->sli4_hba.wq_esize, 10689 phba->sli4_hba.wq_ecount, cpu); 10690 if (!qdesc) { 10691 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10692 "6080 Failed allocate NVME LS WQ\n"); 10693 goto out_error; 10694 } 10695 qdesc->chann = cpu; 10696 phba->sli4_hba.nvmels_wq = qdesc; 10697 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list); 10698 } 10699 10700 /* 10701 * Create Receive Queue (RQ) 10702 */ 10703 10704 /* Create Receive Queue for header */ 10705 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, 10706 phba->sli4_hba.rq_esize, 10707 phba->sli4_hba.rq_ecount, cpu); 10708 if (!qdesc) { 10709 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10710 "0506 Failed allocate receive HRQ\n"); 10711 goto out_error; 10712 } 10713 phba->sli4_hba.hdr_rq = qdesc; 10714 10715 /* Create Receive Queue for data */ 10716 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, 10717 phba->sli4_hba.rq_esize, 10718 phba->sli4_hba.rq_ecount, cpu); 10719 if (!qdesc) { 10720 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10721 "0507 Failed allocate receive DRQ\n"); 10722 goto out_error; 10723 } 10724 phba->sli4_hba.dat_rq = qdesc; 10725 10726 if ((phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) && 10727 phba->nvmet_support) { 10728 for (idx = 0; idx < phba->cfg_nvmet_mrq; idx++) { 10729 cpu = lpfc_find_cpu_handle(phba, idx, 10730 LPFC_FIND_BY_HDWQ); 10731 /* Create NVMET Receive Queue for header */ 10732 qdesc = lpfc_sli4_queue_alloc(phba, 10733 LPFC_DEFAULT_PAGE_SIZE, 10734 phba->sli4_hba.rq_esize, 10735 LPFC_NVMET_RQE_DEF_COUNT, 10736 cpu); 10737 if (!qdesc) { 10738 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10739 "3146 Failed allocate " 10740 "receive HRQ\n"); 10741 goto out_error; 10742 } 10743 qdesc->hdwq = idx; 10744 phba->sli4_hba.nvmet_mrq_hdr[idx] = qdesc; 10745 10746 /* Only needed for header of RQ pair */ 10747 qdesc->rqbp = kzalloc_node(sizeof(*qdesc->rqbp), 10748 GFP_KERNEL, 10749 cpu_to_node(cpu)); 10750 if (qdesc->rqbp == NULL) { 10751 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10752 "6131 Failed allocate " 10753 "Header RQBP\n"); 10754 goto out_error; 10755 } 10756 10757 /* Put list in known state in case driver load fails. */ 10758 INIT_LIST_HEAD(&qdesc->rqbp->rqb_buffer_list); 10759 10760 /* Create NVMET Receive Queue for data */ 10761 qdesc = lpfc_sli4_queue_alloc(phba, 10762 LPFC_DEFAULT_PAGE_SIZE, 10763 phba->sli4_hba.rq_esize, 10764 LPFC_NVMET_RQE_DEF_COUNT, 10765 cpu); 10766 if (!qdesc) { 10767 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10768 "3156 Failed allocate " 10769 "receive DRQ\n"); 10770 goto out_error; 10771 } 10772 qdesc->hdwq = idx; 10773 phba->sli4_hba.nvmet_mrq_data[idx] = qdesc; 10774 } 10775 } 10776 10777 /* Clear NVME stats */ 10778 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 10779 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { 10780 memset(&phba->sli4_hba.hdwq[idx].nvme_cstat, 0, 10781 sizeof(phba->sli4_hba.hdwq[idx].nvme_cstat)); 10782 } 10783 } 10784 10785 /* Clear SCSI stats */ 10786 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) { 10787 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { 10788 memset(&phba->sli4_hba.hdwq[idx].scsi_cstat, 0, 10789 sizeof(phba->sli4_hba.hdwq[idx].scsi_cstat)); 10790 } 10791 } 10792 10793 return 0; 10794 10795 out_error: 10796 lpfc_sli4_queue_destroy(phba); 10797 return -ENOMEM; 10798 } 10799 10800 static inline void 10801 __lpfc_sli4_release_queue(struct lpfc_queue **qp) 10802 { 10803 if (*qp != NULL) { 10804 lpfc_sli4_queue_free(*qp); 10805 *qp = NULL; 10806 } 10807 } 10808 10809 static inline void 10810 lpfc_sli4_release_queues(struct lpfc_queue ***qs, int max) 10811 { 10812 int idx; 10813 10814 if (*qs == NULL) 10815 return; 10816 10817 for (idx = 0; idx < max; idx++) 10818 __lpfc_sli4_release_queue(&(*qs)[idx]); 10819 10820 kfree(*qs); 10821 *qs = NULL; 10822 } 10823 10824 static inline void 10825 lpfc_sli4_release_hdwq(struct lpfc_hba *phba) 10826 { 10827 struct lpfc_sli4_hdw_queue *hdwq; 10828 struct lpfc_queue *eq; 10829 uint32_t idx; 10830 10831 hdwq = phba->sli4_hba.hdwq; 10832 10833 /* Loop thru all Hardware Queues */ 10834 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { 10835 /* Free the CQ/WQ corresponding to the Hardware Queue */ 10836 lpfc_sli4_queue_free(hdwq[idx].io_cq); 10837 lpfc_sli4_queue_free(hdwq[idx].io_wq); 10838 hdwq[idx].hba_eq = NULL; 10839 hdwq[idx].io_cq = NULL; 10840 hdwq[idx].io_wq = NULL; 10841 if (phba->cfg_xpsgl && !phba->nvmet_support) 10842 lpfc_free_sgl_per_hdwq(phba, &hdwq[idx]); 10843 lpfc_free_cmd_rsp_buf_per_hdwq(phba, &hdwq[idx]); 10844 } 10845 /* Loop thru all IRQ vectors */ 10846 for (idx = 0; idx < phba->cfg_irq_chann; idx++) { 10847 /* Free the EQ corresponding to the IRQ vector */ 10848 eq = phba->sli4_hba.hba_eq_hdl[idx].eq; 10849 lpfc_sli4_queue_free(eq); 10850 phba->sli4_hba.hba_eq_hdl[idx].eq = NULL; 10851 } 10852 } 10853 10854 /** 10855 * lpfc_sli4_queue_destroy - Destroy all the SLI4 queues 10856 * @phba: pointer to lpfc hba data structure. 10857 * 10858 * This routine is invoked to release all the SLI4 queues with the FCoE HBA 10859 * operation. 10860 * 10861 * Return codes 10862 * 0 - successful 10863 * -ENOMEM - No available memory 10864 * -EIO - The mailbox failed to complete successfully. 10865 **/ 10866 void 10867 lpfc_sli4_queue_destroy(struct lpfc_hba *phba) 10868 { 10869 /* 10870 * Set FREE_INIT before beginning to free the queues. 10871 * Wait until the users of queues to acknowledge to 10872 * release queues by clearing FREE_WAIT. 10873 */ 10874 spin_lock_irq(&phba->hbalock); 10875 phba->sli.sli_flag |= LPFC_QUEUE_FREE_INIT; 10876 while (phba->sli.sli_flag & LPFC_QUEUE_FREE_WAIT) { 10877 spin_unlock_irq(&phba->hbalock); 10878 msleep(20); 10879 spin_lock_irq(&phba->hbalock); 10880 } 10881 spin_unlock_irq(&phba->hbalock); 10882 10883 lpfc_sli4_cleanup_poll_list(phba); 10884 10885 /* Release HBA eqs */ 10886 if (phba->sli4_hba.hdwq) 10887 lpfc_sli4_release_hdwq(phba); 10888 10889 if (phba->nvmet_support) { 10890 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_cqset, 10891 phba->cfg_nvmet_mrq); 10892 10893 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_mrq_hdr, 10894 phba->cfg_nvmet_mrq); 10895 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_mrq_data, 10896 phba->cfg_nvmet_mrq); 10897 } 10898 10899 /* Release mailbox command work queue */ 10900 __lpfc_sli4_release_queue(&phba->sli4_hba.mbx_wq); 10901 10902 /* Release ELS work queue */ 10903 __lpfc_sli4_release_queue(&phba->sli4_hba.els_wq); 10904 10905 /* Release ELS work queue */ 10906 __lpfc_sli4_release_queue(&phba->sli4_hba.nvmels_wq); 10907 10908 /* Release unsolicited receive queue */ 10909 __lpfc_sli4_release_queue(&phba->sli4_hba.hdr_rq); 10910 __lpfc_sli4_release_queue(&phba->sli4_hba.dat_rq); 10911 10912 /* Release ELS complete queue */ 10913 __lpfc_sli4_release_queue(&phba->sli4_hba.els_cq); 10914 10915 /* Release NVME LS complete queue */ 10916 __lpfc_sli4_release_queue(&phba->sli4_hba.nvmels_cq); 10917 10918 /* Release mailbox command complete queue */ 10919 __lpfc_sli4_release_queue(&phba->sli4_hba.mbx_cq); 10920 10921 /* Everything on this list has been freed */ 10922 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_wq_list); 10923 10924 /* Done with freeing the queues */ 10925 spin_lock_irq(&phba->hbalock); 10926 phba->sli.sli_flag &= ~LPFC_QUEUE_FREE_INIT; 10927 spin_unlock_irq(&phba->hbalock); 10928 } 10929 10930 int 10931 lpfc_free_rq_buffer(struct lpfc_hba *phba, struct lpfc_queue *rq) 10932 { 10933 struct lpfc_rqb *rqbp; 10934 struct lpfc_dmabuf *h_buf; 10935 struct rqb_dmabuf *rqb_buffer; 10936 10937 rqbp = rq->rqbp; 10938 while (!list_empty(&rqbp->rqb_buffer_list)) { 10939 list_remove_head(&rqbp->rqb_buffer_list, h_buf, 10940 struct lpfc_dmabuf, list); 10941 10942 rqb_buffer = container_of(h_buf, struct rqb_dmabuf, hbuf); 10943 (rqbp->rqb_free_buffer)(phba, rqb_buffer); 10944 rqbp->buffer_count--; 10945 } 10946 return 1; 10947 } 10948 10949 static int 10950 lpfc_create_wq_cq(struct lpfc_hba *phba, struct lpfc_queue *eq, 10951 struct lpfc_queue *cq, struct lpfc_queue *wq, uint16_t *cq_map, 10952 int qidx, uint32_t qtype) 10953 { 10954 struct lpfc_sli_ring *pring; 10955 int rc; 10956 10957 if (!eq || !cq || !wq) { 10958 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10959 "6085 Fast-path %s (%d) not allocated\n", 10960 ((eq) ? ((cq) ? "WQ" : "CQ") : "EQ"), qidx); 10961 return -ENOMEM; 10962 } 10963 10964 /* create the Cq first */ 10965 rc = lpfc_cq_create(phba, cq, eq, 10966 (qtype == LPFC_MBOX) ? LPFC_MCQ : LPFC_WCQ, qtype); 10967 if (rc) { 10968 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10969 "6086 Failed setup of CQ (%d), rc = 0x%x\n", 10970 qidx, (uint32_t)rc); 10971 return rc; 10972 } 10973 10974 if (qtype != LPFC_MBOX) { 10975 /* Setup cq_map for fast lookup */ 10976 if (cq_map) 10977 *cq_map = cq->queue_id; 10978 10979 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 10980 "6087 CQ setup: cq[%d]-id=%d, parent eq[%d]-id=%d\n", 10981 qidx, cq->queue_id, qidx, eq->queue_id); 10982 10983 /* create the wq */ 10984 rc = lpfc_wq_create(phba, wq, cq, qtype); 10985 if (rc) { 10986 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10987 "4618 Fail setup fastpath WQ (%d), rc = 0x%x\n", 10988 qidx, (uint32_t)rc); 10989 /* no need to tear down cq - caller will do so */ 10990 return rc; 10991 } 10992 10993 /* Bind this CQ/WQ to the NVME ring */ 10994 pring = wq->pring; 10995 pring->sli.sli4.wqp = (void *)wq; 10996 cq->pring = pring; 10997 10998 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 10999 "2593 WQ setup: wq[%d]-id=%d assoc=%d, cq[%d]-id=%d\n", 11000 qidx, wq->queue_id, wq->assoc_qid, qidx, cq->queue_id); 11001 } else { 11002 rc = lpfc_mq_create(phba, wq, cq, LPFC_MBOX); 11003 if (rc) { 11004 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11005 "0539 Failed setup of slow-path MQ: " 11006 "rc = 0x%x\n", rc); 11007 /* no need to tear down cq - caller will do so */ 11008 return rc; 11009 } 11010 11011 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 11012 "2589 MBX MQ setup: wq-id=%d, parent cq-id=%d\n", 11013 phba->sli4_hba.mbx_wq->queue_id, 11014 phba->sli4_hba.mbx_cq->queue_id); 11015 } 11016 11017 return 0; 11018 } 11019 11020 /** 11021 * lpfc_setup_cq_lookup - Setup the CQ lookup table 11022 * @phba: pointer to lpfc hba data structure. 11023 * 11024 * This routine will populate the cq_lookup table by all 11025 * available CQ queue_id's. 11026 **/ 11027 static void 11028 lpfc_setup_cq_lookup(struct lpfc_hba *phba) 11029 { 11030 struct lpfc_queue *eq, *childq; 11031 int qidx; 11032 11033 memset(phba->sli4_hba.cq_lookup, 0, 11034 (sizeof(struct lpfc_queue *) * (phba->sli4_hba.cq_max + 1))); 11035 /* Loop thru all IRQ vectors */ 11036 for (qidx = 0; qidx < phba->cfg_irq_chann; qidx++) { 11037 /* Get the EQ corresponding to the IRQ vector */ 11038 eq = phba->sli4_hba.hba_eq_hdl[qidx].eq; 11039 if (!eq) 11040 continue; 11041 /* Loop through all CQs associated with that EQ */ 11042 list_for_each_entry(childq, &eq->child_list, list) { 11043 if (childq->queue_id > phba->sli4_hba.cq_max) 11044 continue; 11045 if (childq->subtype == LPFC_IO) 11046 phba->sli4_hba.cq_lookup[childq->queue_id] = 11047 childq; 11048 } 11049 } 11050 } 11051 11052 /** 11053 * lpfc_sli4_queue_setup - Set up all the SLI4 queues 11054 * @phba: pointer to lpfc hba data structure. 11055 * 11056 * This routine is invoked to set up all the SLI4 queues for the FCoE HBA 11057 * operation. 11058 * 11059 * Return codes 11060 * 0 - successful 11061 * -ENOMEM - No available memory 11062 * -EIO - The mailbox failed to complete successfully. 11063 **/ 11064 int 11065 lpfc_sli4_queue_setup(struct lpfc_hba *phba) 11066 { 11067 uint32_t shdr_status, shdr_add_status; 11068 union lpfc_sli4_cfg_shdr *shdr; 11069 struct lpfc_vector_map_info *cpup; 11070 struct lpfc_sli4_hdw_queue *qp; 11071 LPFC_MBOXQ_t *mboxq; 11072 int qidx, cpu; 11073 uint32_t length, usdelay; 11074 int rc = -ENOMEM; 11075 11076 /* Check for dual-ULP support */ 11077 mboxq = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 11078 if (!mboxq) { 11079 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11080 "3249 Unable to allocate memory for " 11081 "QUERY_FW_CFG mailbox command\n"); 11082 return -ENOMEM; 11083 } 11084 length = (sizeof(struct lpfc_mbx_query_fw_config) - 11085 sizeof(struct lpfc_sli4_cfg_mhdr)); 11086 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON, 11087 LPFC_MBOX_OPCODE_QUERY_FW_CFG, 11088 length, LPFC_SLI4_MBX_EMBED); 11089 11090 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); 11091 11092 shdr = (union lpfc_sli4_cfg_shdr *) 11093 &mboxq->u.mqe.un.sli4_config.header.cfg_shdr; 11094 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response); 11095 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response); 11096 if (shdr_status || shdr_add_status || rc) { 11097 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11098 "3250 QUERY_FW_CFG mailbox failed with status " 11099 "x%x add_status x%x, mbx status x%x\n", 11100 shdr_status, shdr_add_status, rc); 11101 mempool_free(mboxq, phba->mbox_mem_pool); 11102 rc = -ENXIO; 11103 goto out_error; 11104 } 11105 11106 phba->sli4_hba.fw_func_mode = 11107 mboxq->u.mqe.un.query_fw_cfg.rsp.function_mode; 11108 phba->sli4_hba.ulp0_mode = mboxq->u.mqe.un.query_fw_cfg.rsp.ulp0_mode; 11109 phba->sli4_hba.ulp1_mode = mboxq->u.mqe.un.query_fw_cfg.rsp.ulp1_mode; 11110 phba->sli4_hba.physical_port = 11111 mboxq->u.mqe.un.query_fw_cfg.rsp.physical_port; 11112 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 11113 "3251 QUERY_FW_CFG: func_mode:x%x, ulp0_mode:x%x, " 11114 "ulp1_mode:x%x\n", phba->sli4_hba.fw_func_mode, 11115 phba->sli4_hba.ulp0_mode, phba->sli4_hba.ulp1_mode); 11116 11117 mempool_free(mboxq, phba->mbox_mem_pool); 11118 11119 /* 11120 * Set up HBA Event Queues (EQs) 11121 */ 11122 qp = phba->sli4_hba.hdwq; 11123 11124 /* Set up HBA event queue */ 11125 if (!qp) { 11126 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11127 "3147 Fast-path EQs not allocated\n"); 11128 rc = -ENOMEM; 11129 goto out_error; 11130 } 11131 11132 /* Loop thru all IRQ vectors */ 11133 for (qidx = 0; qidx < phba->cfg_irq_chann; qidx++) { 11134 /* Create HBA Event Queues (EQs) in order */ 11135 for_each_present_cpu(cpu) { 11136 cpup = &phba->sli4_hba.cpu_map[cpu]; 11137 11138 /* Look for the CPU thats using that vector with 11139 * LPFC_CPU_FIRST_IRQ set. 11140 */ 11141 if (!(cpup->flag & LPFC_CPU_FIRST_IRQ)) 11142 continue; 11143 if (qidx != cpup->eq) 11144 continue; 11145 11146 /* Create an EQ for that vector */ 11147 rc = lpfc_eq_create(phba, qp[cpup->hdwq].hba_eq, 11148 phba->cfg_fcp_imax); 11149 if (rc) { 11150 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11151 "0523 Failed setup of fast-path" 11152 " EQ (%d), rc = 0x%x\n", 11153 cpup->eq, (uint32_t)rc); 11154 goto out_destroy; 11155 } 11156 11157 /* Save the EQ for that vector in the hba_eq_hdl */ 11158 phba->sli4_hba.hba_eq_hdl[cpup->eq].eq = 11159 qp[cpup->hdwq].hba_eq; 11160 11161 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 11162 "2584 HBA EQ setup: queue[%d]-id=%d\n", 11163 cpup->eq, 11164 qp[cpup->hdwq].hba_eq->queue_id); 11165 } 11166 } 11167 11168 /* Loop thru all Hardware Queues */ 11169 for (qidx = 0; qidx < phba->cfg_hdw_queue; qidx++) { 11170 cpu = lpfc_find_cpu_handle(phba, qidx, LPFC_FIND_BY_HDWQ); 11171 cpup = &phba->sli4_hba.cpu_map[cpu]; 11172 11173 /* Create the CQ/WQ corresponding to the Hardware Queue */ 11174 rc = lpfc_create_wq_cq(phba, 11175 phba->sli4_hba.hdwq[cpup->hdwq].hba_eq, 11176 qp[qidx].io_cq, 11177 qp[qidx].io_wq, 11178 &phba->sli4_hba.hdwq[qidx].io_cq_map, 11179 qidx, 11180 LPFC_IO); 11181 if (rc) { 11182 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11183 "0535 Failed to setup fastpath " 11184 "IO WQ/CQ (%d), rc = 0x%x\n", 11185 qidx, (uint32_t)rc); 11186 goto out_destroy; 11187 } 11188 } 11189 11190 /* 11191 * Set up Slow Path Complete Queues (CQs) 11192 */ 11193 11194 /* Set up slow-path MBOX CQ/MQ */ 11195 11196 if (!phba->sli4_hba.mbx_cq || !phba->sli4_hba.mbx_wq) { 11197 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11198 "0528 %s not allocated\n", 11199 phba->sli4_hba.mbx_cq ? 11200 "Mailbox WQ" : "Mailbox CQ"); 11201 rc = -ENOMEM; 11202 goto out_destroy; 11203 } 11204 11205 rc = lpfc_create_wq_cq(phba, qp[0].hba_eq, 11206 phba->sli4_hba.mbx_cq, 11207 phba->sli4_hba.mbx_wq, 11208 NULL, 0, LPFC_MBOX); 11209 if (rc) { 11210 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11211 "0529 Failed setup of mailbox WQ/CQ: rc = 0x%x\n", 11212 (uint32_t)rc); 11213 goto out_destroy; 11214 } 11215 if (phba->nvmet_support) { 11216 if (!phba->sli4_hba.nvmet_cqset) { 11217 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11218 "3165 Fast-path NVME CQ Set " 11219 "array not allocated\n"); 11220 rc = -ENOMEM; 11221 goto out_destroy; 11222 } 11223 if (phba->cfg_nvmet_mrq > 1) { 11224 rc = lpfc_cq_create_set(phba, 11225 phba->sli4_hba.nvmet_cqset, 11226 qp, 11227 LPFC_WCQ, LPFC_NVMET); 11228 if (rc) { 11229 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11230 "3164 Failed setup of NVME CQ " 11231 "Set, rc = 0x%x\n", 11232 (uint32_t)rc); 11233 goto out_destroy; 11234 } 11235 } else { 11236 /* Set up NVMET Receive Complete Queue */ 11237 rc = lpfc_cq_create(phba, phba->sli4_hba.nvmet_cqset[0], 11238 qp[0].hba_eq, 11239 LPFC_WCQ, LPFC_NVMET); 11240 if (rc) { 11241 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11242 "6089 Failed setup NVMET CQ: " 11243 "rc = 0x%x\n", (uint32_t)rc); 11244 goto out_destroy; 11245 } 11246 phba->sli4_hba.nvmet_cqset[0]->chann = 0; 11247 11248 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 11249 "6090 NVMET CQ setup: cq-id=%d, " 11250 "parent eq-id=%d\n", 11251 phba->sli4_hba.nvmet_cqset[0]->queue_id, 11252 qp[0].hba_eq->queue_id); 11253 } 11254 } 11255 11256 /* Set up slow-path ELS WQ/CQ */ 11257 if (!phba->sli4_hba.els_cq || !phba->sli4_hba.els_wq) { 11258 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11259 "0530 ELS %s not allocated\n", 11260 phba->sli4_hba.els_cq ? "WQ" : "CQ"); 11261 rc = -ENOMEM; 11262 goto out_destroy; 11263 } 11264 rc = lpfc_create_wq_cq(phba, qp[0].hba_eq, 11265 phba->sli4_hba.els_cq, 11266 phba->sli4_hba.els_wq, 11267 NULL, 0, LPFC_ELS); 11268 if (rc) { 11269 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11270 "0525 Failed setup of ELS WQ/CQ: rc = 0x%x\n", 11271 (uint32_t)rc); 11272 goto out_destroy; 11273 } 11274 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 11275 "2590 ELS WQ setup: wq-id=%d, parent cq-id=%d\n", 11276 phba->sli4_hba.els_wq->queue_id, 11277 phba->sli4_hba.els_cq->queue_id); 11278 11279 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 11280 /* Set up NVME LS Complete Queue */ 11281 if (!phba->sli4_hba.nvmels_cq || !phba->sli4_hba.nvmels_wq) { 11282 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11283 "6091 LS %s not allocated\n", 11284 phba->sli4_hba.nvmels_cq ? "WQ" : "CQ"); 11285 rc = -ENOMEM; 11286 goto out_destroy; 11287 } 11288 rc = lpfc_create_wq_cq(phba, qp[0].hba_eq, 11289 phba->sli4_hba.nvmels_cq, 11290 phba->sli4_hba.nvmels_wq, 11291 NULL, 0, LPFC_NVME_LS); 11292 if (rc) { 11293 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11294 "0526 Failed setup of NVVME LS WQ/CQ: " 11295 "rc = 0x%x\n", (uint32_t)rc); 11296 goto out_destroy; 11297 } 11298 11299 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 11300 "6096 ELS WQ setup: wq-id=%d, " 11301 "parent cq-id=%d\n", 11302 phba->sli4_hba.nvmels_wq->queue_id, 11303 phba->sli4_hba.nvmels_cq->queue_id); 11304 } 11305 11306 /* 11307 * Create NVMET Receive Queue (RQ) 11308 */ 11309 if (phba->nvmet_support) { 11310 if ((!phba->sli4_hba.nvmet_cqset) || 11311 (!phba->sli4_hba.nvmet_mrq_hdr) || 11312 (!phba->sli4_hba.nvmet_mrq_data)) { 11313 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11314 "6130 MRQ CQ Queues not " 11315 "allocated\n"); 11316 rc = -ENOMEM; 11317 goto out_destroy; 11318 } 11319 if (phba->cfg_nvmet_mrq > 1) { 11320 rc = lpfc_mrq_create(phba, 11321 phba->sli4_hba.nvmet_mrq_hdr, 11322 phba->sli4_hba.nvmet_mrq_data, 11323 phba->sli4_hba.nvmet_cqset, 11324 LPFC_NVMET); 11325 if (rc) { 11326 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11327 "6098 Failed setup of NVMET " 11328 "MRQ: rc = 0x%x\n", 11329 (uint32_t)rc); 11330 goto out_destroy; 11331 } 11332 11333 } else { 11334 rc = lpfc_rq_create(phba, 11335 phba->sli4_hba.nvmet_mrq_hdr[0], 11336 phba->sli4_hba.nvmet_mrq_data[0], 11337 phba->sli4_hba.nvmet_cqset[0], 11338 LPFC_NVMET); 11339 if (rc) { 11340 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11341 "6057 Failed setup of NVMET " 11342 "Receive Queue: rc = 0x%x\n", 11343 (uint32_t)rc); 11344 goto out_destroy; 11345 } 11346 11347 lpfc_printf_log( 11348 phba, KERN_INFO, LOG_INIT, 11349 "6099 NVMET RQ setup: hdr-rq-id=%d, " 11350 "dat-rq-id=%d parent cq-id=%d\n", 11351 phba->sli4_hba.nvmet_mrq_hdr[0]->queue_id, 11352 phba->sli4_hba.nvmet_mrq_data[0]->queue_id, 11353 phba->sli4_hba.nvmet_cqset[0]->queue_id); 11354 11355 } 11356 } 11357 11358 if (!phba->sli4_hba.hdr_rq || !phba->sli4_hba.dat_rq) { 11359 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11360 "0540 Receive Queue not allocated\n"); 11361 rc = -ENOMEM; 11362 goto out_destroy; 11363 } 11364 11365 rc = lpfc_rq_create(phba, phba->sli4_hba.hdr_rq, phba->sli4_hba.dat_rq, 11366 phba->sli4_hba.els_cq, LPFC_USOL); 11367 if (rc) { 11368 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11369 "0541 Failed setup of Receive Queue: " 11370 "rc = 0x%x\n", (uint32_t)rc); 11371 goto out_destroy; 11372 } 11373 11374 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 11375 "2592 USL RQ setup: hdr-rq-id=%d, dat-rq-id=%d " 11376 "parent cq-id=%d\n", 11377 phba->sli4_hba.hdr_rq->queue_id, 11378 phba->sli4_hba.dat_rq->queue_id, 11379 phba->sli4_hba.els_cq->queue_id); 11380 11381 if (phba->cfg_fcp_imax) 11382 usdelay = LPFC_SEC_TO_USEC / phba->cfg_fcp_imax; 11383 else 11384 usdelay = 0; 11385 11386 for (qidx = 0; qidx < phba->cfg_irq_chann; 11387 qidx += LPFC_MAX_EQ_DELAY_EQID_CNT) 11388 lpfc_modify_hba_eq_delay(phba, qidx, LPFC_MAX_EQ_DELAY_EQID_CNT, 11389 usdelay); 11390 11391 if (phba->sli4_hba.cq_max) { 11392 kfree(phba->sli4_hba.cq_lookup); 11393 phba->sli4_hba.cq_lookup = kcalloc((phba->sli4_hba.cq_max + 1), 11394 sizeof(struct lpfc_queue *), GFP_KERNEL); 11395 if (!phba->sli4_hba.cq_lookup) { 11396 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11397 "0549 Failed setup of CQ Lookup table: " 11398 "size 0x%x\n", phba->sli4_hba.cq_max); 11399 rc = -ENOMEM; 11400 goto out_destroy; 11401 } 11402 lpfc_setup_cq_lookup(phba); 11403 } 11404 return 0; 11405 11406 out_destroy: 11407 lpfc_sli4_queue_unset(phba); 11408 out_error: 11409 return rc; 11410 } 11411 11412 /** 11413 * lpfc_sli4_queue_unset - Unset all the SLI4 queues 11414 * @phba: pointer to lpfc hba data structure. 11415 * 11416 * This routine is invoked to unset all the SLI4 queues with the FCoE HBA 11417 * operation. 11418 * 11419 * Return codes 11420 * 0 - successful 11421 * -ENOMEM - No available memory 11422 * -EIO - The mailbox failed to complete successfully. 11423 **/ 11424 void 11425 lpfc_sli4_queue_unset(struct lpfc_hba *phba) 11426 { 11427 struct lpfc_sli4_hdw_queue *qp; 11428 struct lpfc_queue *eq; 11429 int qidx; 11430 11431 /* Unset mailbox command work queue */ 11432 if (phba->sli4_hba.mbx_wq) 11433 lpfc_mq_destroy(phba, phba->sli4_hba.mbx_wq); 11434 11435 /* Unset NVME LS work queue */ 11436 if (phba->sli4_hba.nvmels_wq) 11437 lpfc_wq_destroy(phba, phba->sli4_hba.nvmels_wq); 11438 11439 /* Unset ELS work queue */ 11440 if (phba->sli4_hba.els_wq) 11441 lpfc_wq_destroy(phba, phba->sli4_hba.els_wq); 11442 11443 /* Unset unsolicited receive queue */ 11444 if (phba->sli4_hba.hdr_rq) 11445 lpfc_rq_destroy(phba, phba->sli4_hba.hdr_rq, 11446 phba->sli4_hba.dat_rq); 11447 11448 /* Unset mailbox command complete queue */ 11449 if (phba->sli4_hba.mbx_cq) 11450 lpfc_cq_destroy(phba, phba->sli4_hba.mbx_cq); 11451 11452 /* Unset ELS complete queue */ 11453 if (phba->sli4_hba.els_cq) 11454 lpfc_cq_destroy(phba, phba->sli4_hba.els_cq); 11455 11456 /* Unset NVME LS complete queue */ 11457 if (phba->sli4_hba.nvmels_cq) 11458 lpfc_cq_destroy(phba, phba->sli4_hba.nvmels_cq); 11459 11460 if (phba->nvmet_support) { 11461 /* Unset NVMET MRQ queue */ 11462 if (phba->sli4_hba.nvmet_mrq_hdr) { 11463 for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++) 11464 lpfc_rq_destroy( 11465 phba, 11466 phba->sli4_hba.nvmet_mrq_hdr[qidx], 11467 phba->sli4_hba.nvmet_mrq_data[qidx]); 11468 } 11469 11470 /* Unset NVMET CQ Set complete queue */ 11471 if (phba->sli4_hba.nvmet_cqset) { 11472 for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++) 11473 lpfc_cq_destroy( 11474 phba, phba->sli4_hba.nvmet_cqset[qidx]); 11475 } 11476 } 11477 11478 /* Unset fast-path SLI4 queues */ 11479 if (phba->sli4_hba.hdwq) { 11480 /* Loop thru all Hardware Queues */ 11481 for (qidx = 0; qidx < phba->cfg_hdw_queue; qidx++) { 11482 /* Destroy the CQ/WQ corresponding to Hardware Queue */ 11483 qp = &phba->sli4_hba.hdwq[qidx]; 11484 lpfc_wq_destroy(phba, qp->io_wq); 11485 lpfc_cq_destroy(phba, qp->io_cq); 11486 } 11487 /* Loop thru all IRQ vectors */ 11488 for (qidx = 0; qidx < phba->cfg_irq_chann; qidx++) { 11489 /* Destroy the EQ corresponding to the IRQ vector */ 11490 eq = phba->sli4_hba.hba_eq_hdl[qidx].eq; 11491 lpfc_eq_destroy(phba, eq); 11492 } 11493 } 11494 11495 kfree(phba->sli4_hba.cq_lookup); 11496 phba->sli4_hba.cq_lookup = NULL; 11497 phba->sli4_hba.cq_max = 0; 11498 } 11499 11500 /** 11501 * lpfc_sli4_cq_event_pool_create - Create completion-queue event free pool 11502 * @phba: pointer to lpfc hba data structure. 11503 * 11504 * This routine is invoked to allocate and set up a pool of completion queue 11505 * events. The body of the completion queue event is a completion queue entry 11506 * CQE. For now, this pool is used for the interrupt service routine to queue 11507 * the following HBA completion queue events for the worker thread to process: 11508 * - Mailbox asynchronous events 11509 * - Receive queue completion unsolicited events 11510 * Later, this can be used for all the slow-path events. 11511 * 11512 * Return codes 11513 * 0 - successful 11514 * -ENOMEM - No available memory 11515 **/ 11516 static int 11517 lpfc_sli4_cq_event_pool_create(struct lpfc_hba *phba) 11518 { 11519 struct lpfc_cq_event *cq_event; 11520 int i; 11521 11522 for (i = 0; i < (4 * phba->sli4_hba.cq_ecount); i++) { 11523 cq_event = kmalloc(sizeof(struct lpfc_cq_event), GFP_KERNEL); 11524 if (!cq_event) 11525 goto out_pool_create_fail; 11526 list_add_tail(&cq_event->list, 11527 &phba->sli4_hba.sp_cqe_event_pool); 11528 } 11529 return 0; 11530 11531 out_pool_create_fail: 11532 lpfc_sli4_cq_event_pool_destroy(phba); 11533 return -ENOMEM; 11534 } 11535 11536 /** 11537 * lpfc_sli4_cq_event_pool_destroy - Free completion-queue event free pool 11538 * @phba: pointer to lpfc hba data structure. 11539 * 11540 * This routine is invoked to free the pool of completion queue events at 11541 * driver unload time. Note that, it is the responsibility of the driver 11542 * cleanup routine to free all the outstanding completion-queue events 11543 * allocated from this pool back into the pool before invoking this routine 11544 * to destroy the pool. 11545 **/ 11546 static void 11547 lpfc_sli4_cq_event_pool_destroy(struct lpfc_hba *phba) 11548 { 11549 struct lpfc_cq_event *cq_event, *next_cq_event; 11550 11551 list_for_each_entry_safe(cq_event, next_cq_event, 11552 &phba->sli4_hba.sp_cqe_event_pool, list) { 11553 list_del(&cq_event->list); 11554 kfree(cq_event); 11555 } 11556 } 11557 11558 /** 11559 * __lpfc_sli4_cq_event_alloc - Allocate a completion-queue event from free pool 11560 * @phba: pointer to lpfc hba data structure. 11561 * 11562 * This routine is the lock free version of the API invoked to allocate a 11563 * completion-queue event from the free pool. 11564 * 11565 * Return: Pointer to the newly allocated completion-queue event if successful 11566 * NULL otherwise. 11567 **/ 11568 struct lpfc_cq_event * 11569 __lpfc_sli4_cq_event_alloc(struct lpfc_hba *phba) 11570 { 11571 struct lpfc_cq_event *cq_event = NULL; 11572 11573 list_remove_head(&phba->sli4_hba.sp_cqe_event_pool, cq_event, 11574 struct lpfc_cq_event, list); 11575 return cq_event; 11576 } 11577 11578 /** 11579 * lpfc_sli4_cq_event_alloc - Allocate a completion-queue event from free pool 11580 * @phba: pointer to lpfc hba data structure. 11581 * 11582 * This routine is the lock version of the API invoked to allocate a 11583 * completion-queue event from the free pool. 11584 * 11585 * Return: Pointer to the newly allocated completion-queue event if successful 11586 * NULL otherwise. 11587 **/ 11588 struct lpfc_cq_event * 11589 lpfc_sli4_cq_event_alloc(struct lpfc_hba *phba) 11590 { 11591 struct lpfc_cq_event *cq_event; 11592 unsigned long iflags; 11593 11594 spin_lock_irqsave(&phba->hbalock, iflags); 11595 cq_event = __lpfc_sli4_cq_event_alloc(phba); 11596 spin_unlock_irqrestore(&phba->hbalock, iflags); 11597 return cq_event; 11598 } 11599 11600 /** 11601 * __lpfc_sli4_cq_event_release - Release a completion-queue event to free pool 11602 * @phba: pointer to lpfc hba data structure. 11603 * @cq_event: pointer to the completion queue event to be freed. 11604 * 11605 * This routine is the lock free version of the API invoked to release a 11606 * completion-queue event back into the free pool. 11607 **/ 11608 void 11609 __lpfc_sli4_cq_event_release(struct lpfc_hba *phba, 11610 struct lpfc_cq_event *cq_event) 11611 { 11612 list_add_tail(&cq_event->list, &phba->sli4_hba.sp_cqe_event_pool); 11613 } 11614 11615 /** 11616 * lpfc_sli4_cq_event_release - Release a completion-queue event to free pool 11617 * @phba: pointer to lpfc hba data structure. 11618 * @cq_event: pointer to the completion queue event to be freed. 11619 * 11620 * This routine is the lock version of the API invoked to release a 11621 * completion-queue event back into the free pool. 11622 **/ 11623 void 11624 lpfc_sli4_cq_event_release(struct lpfc_hba *phba, 11625 struct lpfc_cq_event *cq_event) 11626 { 11627 unsigned long iflags; 11628 spin_lock_irqsave(&phba->hbalock, iflags); 11629 __lpfc_sli4_cq_event_release(phba, cq_event); 11630 spin_unlock_irqrestore(&phba->hbalock, iflags); 11631 } 11632 11633 /** 11634 * lpfc_sli4_cq_event_release_all - Release all cq events to the free pool 11635 * @phba: pointer to lpfc hba data structure. 11636 * 11637 * This routine is to free all the pending completion-queue events to the 11638 * back into the free pool for device reset. 11639 **/ 11640 static void 11641 lpfc_sli4_cq_event_release_all(struct lpfc_hba *phba) 11642 { 11643 LIST_HEAD(cq_event_list); 11644 struct lpfc_cq_event *cq_event; 11645 unsigned long iflags; 11646 11647 /* Retrieve all the pending WCQEs from pending WCQE lists */ 11648 11649 /* Pending ELS XRI abort events */ 11650 spin_lock_irqsave(&phba->sli4_hba.els_xri_abrt_list_lock, iflags); 11651 list_splice_init(&phba->sli4_hba.sp_els_xri_aborted_work_queue, 11652 &cq_event_list); 11653 spin_unlock_irqrestore(&phba->sli4_hba.els_xri_abrt_list_lock, iflags); 11654 11655 /* Pending asynnc events */ 11656 spin_lock_irqsave(&phba->sli4_hba.asynce_list_lock, iflags); 11657 list_splice_init(&phba->sli4_hba.sp_asynce_work_queue, 11658 &cq_event_list); 11659 spin_unlock_irqrestore(&phba->sli4_hba.asynce_list_lock, iflags); 11660 11661 while (!list_empty(&cq_event_list)) { 11662 list_remove_head(&cq_event_list, cq_event, 11663 struct lpfc_cq_event, list); 11664 lpfc_sli4_cq_event_release(phba, cq_event); 11665 } 11666 } 11667 11668 /** 11669 * lpfc_pci_function_reset - Reset pci function. 11670 * @phba: pointer to lpfc hba data structure. 11671 * 11672 * This routine is invoked to request a PCI function reset. It will destroys 11673 * all resources assigned to the PCI function which originates this request. 11674 * 11675 * Return codes 11676 * 0 - successful 11677 * -ENOMEM - No available memory 11678 * -EIO - The mailbox failed to complete successfully. 11679 **/ 11680 int 11681 lpfc_pci_function_reset(struct lpfc_hba *phba) 11682 { 11683 LPFC_MBOXQ_t *mboxq; 11684 uint32_t rc = 0, if_type; 11685 uint32_t shdr_status, shdr_add_status; 11686 uint32_t rdy_chk; 11687 uint32_t port_reset = 0; 11688 union lpfc_sli4_cfg_shdr *shdr; 11689 struct lpfc_register reg_data; 11690 uint16_t devid; 11691 11692 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf); 11693 switch (if_type) { 11694 case LPFC_SLI_INTF_IF_TYPE_0: 11695 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, 11696 GFP_KERNEL); 11697 if (!mboxq) { 11698 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11699 "0494 Unable to allocate memory for " 11700 "issuing SLI_FUNCTION_RESET mailbox " 11701 "command\n"); 11702 return -ENOMEM; 11703 } 11704 11705 /* Setup PCI function reset mailbox-ioctl command */ 11706 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON, 11707 LPFC_MBOX_OPCODE_FUNCTION_RESET, 0, 11708 LPFC_SLI4_MBX_EMBED); 11709 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); 11710 shdr = (union lpfc_sli4_cfg_shdr *) 11711 &mboxq->u.mqe.un.sli4_config.header.cfg_shdr; 11712 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response); 11713 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, 11714 &shdr->response); 11715 mempool_free(mboxq, phba->mbox_mem_pool); 11716 if (shdr_status || shdr_add_status || rc) { 11717 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11718 "0495 SLI_FUNCTION_RESET mailbox " 11719 "failed with status x%x add_status x%x," 11720 " mbx status x%x\n", 11721 shdr_status, shdr_add_status, rc); 11722 rc = -ENXIO; 11723 } 11724 break; 11725 case LPFC_SLI_INTF_IF_TYPE_2: 11726 case LPFC_SLI_INTF_IF_TYPE_6: 11727 wait: 11728 /* 11729 * Poll the Port Status Register and wait for RDY for 11730 * up to 30 seconds. If the port doesn't respond, treat 11731 * it as an error. 11732 */ 11733 for (rdy_chk = 0; rdy_chk < 1500; rdy_chk++) { 11734 if (lpfc_readl(phba->sli4_hba.u.if_type2. 11735 STATUSregaddr, ®_data.word0)) { 11736 rc = -ENODEV; 11737 goto out; 11738 } 11739 if (bf_get(lpfc_sliport_status_rdy, ®_data)) 11740 break; 11741 msleep(20); 11742 } 11743 11744 if (!bf_get(lpfc_sliport_status_rdy, ®_data)) { 11745 phba->work_status[0] = readl( 11746 phba->sli4_hba.u.if_type2.ERR1regaddr); 11747 phba->work_status[1] = readl( 11748 phba->sli4_hba.u.if_type2.ERR2regaddr); 11749 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11750 "2890 Port not ready, port status reg " 11751 "0x%x error 1=0x%x, error 2=0x%x\n", 11752 reg_data.word0, 11753 phba->work_status[0], 11754 phba->work_status[1]); 11755 rc = -ENODEV; 11756 goto out; 11757 } 11758 11759 if (bf_get(lpfc_sliport_status_pldv, ®_data)) 11760 lpfc_pldv_detect = true; 11761 11762 if (!port_reset) { 11763 /* 11764 * Reset the port now 11765 */ 11766 reg_data.word0 = 0; 11767 bf_set(lpfc_sliport_ctrl_end, ®_data, 11768 LPFC_SLIPORT_LITTLE_ENDIAN); 11769 bf_set(lpfc_sliport_ctrl_ip, ®_data, 11770 LPFC_SLIPORT_INIT_PORT); 11771 writel(reg_data.word0, phba->sli4_hba.u.if_type2. 11772 CTRLregaddr); 11773 /* flush */ 11774 pci_read_config_word(phba->pcidev, 11775 PCI_DEVICE_ID, &devid); 11776 11777 port_reset = 1; 11778 msleep(20); 11779 goto wait; 11780 } else if (bf_get(lpfc_sliport_status_rn, ®_data)) { 11781 rc = -ENODEV; 11782 goto out; 11783 } 11784 break; 11785 11786 case LPFC_SLI_INTF_IF_TYPE_1: 11787 default: 11788 break; 11789 } 11790 11791 out: 11792 /* Catch the not-ready port failure after a port reset. */ 11793 if (rc) { 11794 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11795 "3317 HBA not functional: IP Reset Failed " 11796 "try: echo fw_reset > board_mode\n"); 11797 rc = -ENODEV; 11798 } 11799 11800 return rc; 11801 } 11802 11803 /** 11804 * lpfc_sli4_pci_mem_setup - Setup SLI4 HBA PCI memory space. 11805 * @phba: pointer to lpfc hba data structure. 11806 * 11807 * This routine is invoked to set up the PCI device memory space for device 11808 * with SLI-4 interface spec. 11809 * 11810 * Return codes 11811 * 0 - successful 11812 * other values - error 11813 **/ 11814 static int 11815 lpfc_sli4_pci_mem_setup(struct lpfc_hba *phba) 11816 { 11817 struct pci_dev *pdev = phba->pcidev; 11818 unsigned long bar0map_len, bar1map_len, bar2map_len; 11819 int error; 11820 uint32_t if_type; 11821 11822 if (!pdev) 11823 return -ENODEV; 11824 11825 /* Set the device DMA mask size */ 11826 error = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); 11827 if (error) 11828 error = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); 11829 if (error) 11830 return error; 11831 11832 /* 11833 * The BARs and register set definitions and offset locations are 11834 * dependent on the if_type. 11835 */ 11836 if (pci_read_config_dword(pdev, LPFC_SLI_INTF, 11837 &phba->sli4_hba.sli_intf.word0)) { 11838 return -ENODEV; 11839 } 11840 11841 /* There is no SLI3 failback for SLI4 devices. */ 11842 if (bf_get(lpfc_sli_intf_valid, &phba->sli4_hba.sli_intf) != 11843 LPFC_SLI_INTF_VALID) { 11844 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 11845 "2894 SLI_INTF reg contents invalid " 11846 "sli_intf reg 0x%x\n", 11847 phba->sli4_hba.sli_intf.word0); 11848 return -ENODEV; 11849 } 11850 11851 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf); 11852 /* 11853 * Get the bus address of SLI4 device Bar regions and the 11854 * number of bytes required by each mapping. The mapping of the 11855 * particular PCI BARs regions is dependent on the type of 11856 * SLI4 device. 11857 */ 11858 if (pci_resource_start(pdev, PCI_64BIT_BAR0)) { 11859 phba->pci_bar0_map = pci_resource_start(pdev, PCI_64BIT_BAR0); 11860 bar0map_len = pci_resource_len(pdev, PCI_64BIT_BAR0); 11861 11862 /* 11863 * Map SLI4 PCI Config Space Register base to a kernel virtual 11864 * addr 11865 */ 11866 phba->sli4_hba.conf_regs_memmap_p = 11867 ioremap(phba->pci_bar0_map, bar0map_len); 11868 if (!phba->sli4_hba.conf_regs_memmap_p) { 11869 dev_printk(KERN_ERR, &pdev->dev, 11870 "ioremap failed for SLI4 PCI config " 11871 "registers.\n"); 11872 return -ENODEV; 11873 } 11874 phba->pci_bar0_memmap_p = phba->sli4_hba.conf_regs_memmap_p; 11875 /* Set up BAR0 PCI config space register memory map */ 11876 lpfc_sli4_bar0_register_memmap(phba, if_type); 11877 } else { 11878 phba->pci_bar0_map = pci_resource_start(pdev, 1); 11879 bar0map_len = pci_resource_len(pdev, 1); 11880 if (if_type >= LPFC_SLI_INTF_IF_TYPE_2) { 11881 dev_printk(KERN_ERR, &pdev->dev, 11882 "FATAL - No BAR0 mapping for SLI4, if_type 2\n"); 11883 return -ENODEV; 11884 } 11885 phba->sli4_hba.conf_regs_memmap_p = 11886 ioremap(phba->pci_bar0_map, bar0map_len); 11887 if (!phba->sli4_hba.conf_regs_memmap_p) { 11888 dev_printk(KERN_ERR, &pdev->dev, 11889 "ioremap failed for SLI4 PCI config " 11890 "registers.\n"); 11891 return -ENODEV; 11892 } 11893 lpfc_sli4_bar0_register_memmap(phba, if_type); 11894 } 11895 11896 if (if_type == LPFC_SLI_INTF_IF_TYPE_0) { 11897 if (pci_resource_start(pdev, PCI_64BIT_BAR2)) { 11898 /* 11899 * Map SLI4 if type 0 HBA Control Register base to a 11900 * kernel virtual address and setup the registers. 11901 */ 11902 phba->pci_bar1_map = pci_resource_start(pdev, 11903 PCI_64BIT_BAR2); 11904 bar1map_len = pci_resource_len(pdev, PCI_64BIT_BAR2); 11905 phba->sli4_hba.ctrl_regs_memmap_p = 11906 ioremap(phba->pci_bar1_map, 11907 bar1map_len); 11908 if (!phba->sli4_hba.ctrl_regs_memmap_p) { 11909 dev_err(&pdev->dev, 11910 "ioremap failed for SLI4 HBA " 11911 "control registers.\n"); 11912 error = -ENOMEM; 11913 goto out_iounmap_conf; 11914 } 11915 phba->pci_bar2_memmap_p = 11916 phba->sli4_hba.ctrl_regs_memmap_p; 11917 lpfc_sli4_bar1_register_memmap(phba, if_type); 11918 } else { 11919 error = -ENOMEM; 11920 goto out_iounmap_conf; 11921 } 11922 } 11923 11924 if ((if_type == LPFC_SLI_INTF_IF_TYPE_6) && 11925 (pci_resource_start(pdev, PCI_64BIT_BAR2))) { 11926 /* 11927 * Map SLI4 if type 6 HBA Doorbell Register base to a kernel 11928 * virtual address and setup the registers. 11929 */ 11930 phba->pci_bar1_map = pci_resource_start(pdev, PCI_64BIT_BAR2); 11931 bar1map_len = pci_resource_len(pdev, PCI_64BIT_BAR2); 11932 phba->sli4_hba.drbl_regs_memmap_p = 11933 ioremap(phba->pci_bar1_map, bar1map_len); 11934 if (!phba->sli4_hba.drbl_regs_memmap_p) { 11935 dev_err(&pdev->dev, 11936 "ioremap failed for SLI4 HBA doorbell registers.\n"); 11937 error = -ENOMEM; 11938 goto out_iounmap_conf; 11939 } 11940 phba->pci_bar2_memmap_p = phba->sli4_hba.drbl_regs_memmap_p; 11941 lpfc_sli4_bar1_register_memmap(phba, if_type); 11942 } 11943 11944 if (if_type == LPFC_SLI_INTF_IF_TYPE_0) { 11945 if (pci_resource_start(pdev, PCI_64BIT_BAR4)) { 11946 /* 11947 * Map SLI4 if type 0 HBA Doorbell Register base to 11948 * a kernel virtual address and setup the registers. 11949 */ 11950 phba->pci_bar2_map = pci_resource_start(pdev, 11951 PCI_64BIT_BAR4); 11952 bar2map_len = pci_resource_len(pdev, PCI_64BIT_BAR4); 11953 phba->sli4_hba.drbl_regs_memmap_p = 11954 ioremap(phba->pci_bar2_map, 11955 bar2map_len); 11956 if (!phba->sli4_hba.drbl_regs_memmap_p) { 11957 dev_err(&pdev->dev, 11958 "ioremap failed for SLI4 HBA" 11959 " doorbell registers.\n"); 11960 error = -ENOMEM; 11961 goto out_iounmap_ctrl; 11962 } 11963 phba->pci_bar4_memmap_p = 11964 phba->sli4_hba.drbl_regs_memmap_p; 11965 error = lpfc_sli4_bar2_register_memmap(phba, LPFC_VF0); 11966 if (error) 11967 goto out_iounmap_all; 11968 } else { 11969 error = -ENOMEM; 11970 goto out_iounmap_all; 11971 } 11972 } 11973 11974 if (if_type == LPFC_SLI_INTF_IF_TYPE_6 && 11975 pci_resource_start(pdev, PCI_64BIT_BAR4)) { 11976 /* 11977 * Map SLI4 if type 6 HBA DPP Register base to a kernel 11978 * virtual address and setup the registers. 11979 */ 11980 phba->pci_bar2_map = pci_resource_start(pdev, PCI_64BIT_BAR4); 11981 bar2map_len = pci_resource_len(pdev, PCI_64BIT_BAR4); 11982 phba->sli4_hba.dpp_regs_memmap_p = 11983 ioremap(phba->pci_bar2_map, bar2map_len); 11984 if (!phba->sli4_hba.dpp_regs_memmap_p) { 11985 dev_err(&pdev->dev, 11986 "ioremap failed for SLI4 HBA dpp registers.\n"); 11987 error = -ENOMEM; 11988 goto out_iounmap_ctrl; 11989 } 11990 phba->pci_bar4_memmap_p = phba->sli4_hba.dpp_regs_memmap_p; 11991 } 11992 11993 /* Set up the EQ/CQ register handeling functions now */ 11994 switch (if_type) { 11995 case LPFC_SLI_INTF_IF_TYPE_0: 11996 case LPFC_SLI_INTF_IF_TYPE_2: 11997 phba->sli4_hba.sli4_eq_clr_intr = lpfc_sli4_eq_clr_intr; 11998 phba->sli4_hba.sli4_write_eq_db = lpfc_sli4_write_eq_db; 11999 phba->sli4_hba.sli4_write_cq_db = lpfc_sli4_write_cq_db; 12000 break; 12001 case LPFC_SLI_INTF_IF_TYPE_6: 12002 phba->sli4_hba.sli4_eq_clr_intr = lpfc_sli4_if6_eq_clr_intr; 12003 phba->sli4_hba.sli4_write_eq_db = lpfc_sli4_if6_write_eq_db; 12004 phba->sli4_hba.sli4_write_cq_db = lpfc_sli4_if6_write_cq_db; 12005 break; 12006 default: 12007 break; 12008 } 12009 12010 return 0; 12011 12012 out_iounmap_all: 12013 iounmap(phba->sli4_hba.drbl_regs_memmap_p); 12014 out_iounmap_ctrl: 12015 iounmap(phba->sli4_hba.ctrl_regs_memmap_p); 12016 out_iounmap_conf: 12017 iounmap(phba->sli4_hba.conf_regs_memmap_p); 12018 12019 return error; 12020 } 12021 12022 /** 12023 * lpfc_sli4_pci_mem_unset - Unset SLI4 HBA PCI memory space. 12024 * @phba: pointer to lpfc hba data structure. 12025 * 12026 * This routine is invoked to unset the PCI device memory space for device 12027 * with SLI-4 interface spec. 12028 **/ 12029 static void 12030 lpfc_sli4_pci_mem_unset(struct lpfc_hba *phba) 12031 { 12032 uint32_t if_type; 12033 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf); 12034 12035 switch (if_type) { 12036 case LPFC_SLI_INTF_IF_TYPE_0: 12037 iounmap(phba->sli4_hba.drbl_regs_memmap_p); 12038 iounmap(phba->sli4_hba.ctrl_regs_memmap_p); 12039 iounmap(phba->sli4_hba.conf_regs_memmap_p); 12040 break; 12041 case LPFC_SLI_INTF_IF_TYPE_2: 12042 iounmap(phba->sli4_hba.conf_regs_memmap_p); 12043 break; 12044 case LPFC_SLI_INTF_IF_TYPE_6: 12045 iounmap(phba->sli4_hba.drbl_regs_memmap_p); 12046 iounmap(phba->sli4_hba.conf_regs_memmap_p); 12047 if (phba->sli4_hba.dpp_regs_memmap_p) 12048 iounmap(phba->sli4_hba.dpp_regs_memmap_p); 12049 break; 12050 case LPFC_SLI_INTF_IF_TYPE_1: 12051 default: 12052 dev_printk(KERN_ERR, &phba->pcidev->dev, 12053 "FATAL - unsupported SLI4 interface type - %d\n", 12054 if_type); 12055 break; 12056 } 12057 } 12058 12059 /** 12060 * lpfc_sli_enable_msix - Enable MSI-X interrupt mode on SLI-3 device 12061 * @phba: pointer to lpfc hba data structure. 12062 * 12063 * This routine is invoked to enable the MSI-X interrupt vectors to device 12064 * with SLI-3 interface specs. 12065 * 12066 * Return codes 12067 * 0 - successful 12068 * other values - error 12069 **/ 12070 static int 12071 lpfc_sli_enable_msix(struct lpfc_hba *phba) 12072 { 12073 int rc; 12074 LPFC_MBOXQ_t *pmb; 12075 12076 /* Set up MSI-X multi-message vectors */ 12077 rc = pci_alloc_irq_vectors(phba->pcidev, 12078 LPFC_MSIX_VECTORS, LPFC_MSIX_VECTORS, PCI_IRQ_MSIX); 12079 if (rc < 0) { 12080 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 12081 "0420 PCI enable MSI-X failed (%d)\n", rc); 12082 goto vec_fail_out; 12083 } 12084 12085 /* 12086 * Assign MSI-X vectors to interrupt handlers 12087 */ 12088 12089 /* vector-0 is associated to slow-path handler */ 12090 rc = request_irq(pci_irq_vector(phba->pcidev, 0), 12091 &lpfc_sli_sp_intr_handler, 0, 12092 LPFC_SP_DRIVER_HANDLER_NAME, phba); 12093 if (rc) { 12094 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 12095 "0421 MSI-X slow-path request_irq failed " 12096 "(%d)\n", rc); 12097 goto msi_fail_out; 12098 } 12099 12100 /* vector-1 is associated to fast-path handler */ 12101 rc = request_irq(pci_irq_vector(phba->pcidev, 1), 12102 &lpfc_sli_fp_intr_handler, 0, 12103 LPFC_FP_DRIVER_HANDLER_NAME, phba); 12104 12105 if (rc) { 12106 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 12107 "0429 MSI-X fast-path request_irq failed " 12108 "(%d)\n", rc); 12109 goto irq_fail_out; 12110 } 12111 12112 /* 12113 * Configure HBA MSI-X attention conditions to messages 12114 */ 12115 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 12116 12117 if (!pmb) { 12118 rc = -ENOMEM; 12119 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 12120 "0474 Unable to allocate memory for issuing " 12121 "MBOX_CONFIG_MSI command\n"); 12122 goto mem_fail_out; 12123 } 12124 rc = lpfc_config_msi(phba, pmb); 12125 if (rc) 12126 goto mbx_fail_out; 12127 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); 12128 if (rc != MBX_SUCCESS) { 12129 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX, 12130 "0351 Config MSI mailbox command failed, " 12131 "mbxCmd x%x, mbxStatus x%x\n", 12132 pmb->u.mb.mbxCommand, pmb->u.mb.mbxStatus); 12133 goto mbx_fail_out; 12134 } 12135 12136 /* Free memory allocated for mailbox command */ 12137 mempool_free(pmb, phba->mbox_mem_pool); 12138 return rc; 12139 12140 mbx_fail_out: 12141 /* Free memory allocated for mailbox command */ 12142 mempool_free(pmb, phba->mbox_mem_pool); 12143 12144 mem_fail_out: 12145 /* free the irq already requested */ 12146 free_irq(pci_irq_vector(phba->pcidev, 1), phba); 12147 12148 irq_fail_out: 12149 /* free the irq already requested */ 12150 free_irq(pci_irq_vector(phba->pcidev, 0), phba); 12151 12152 msi_fail_out: 12153 /* Unconfigure MSI-X capability structure */ 12154 pci_free_irq_vectors(phba->pcidev); 12155 12156 vec_fail_out: 12157 return rc; 12158 } 12159 12160 /** 12161 * lpfc_sli_enable_msi - Enable MSI interrupt mode on SLI-3 device. 12162 * @phba: pointer to lpfc hba data structure. 12163 * 12164 * This routine is invoked to enable the MSI interrupt mode to device with 12165 * SLI-3 interface spec. The kernel function pci_enable_msi() is called to 12166 * enable the MSI vector. The device driver is responsible for calling the 12167 * request_irq() to register MSI vector with a interrupt the handler, which 12168 * is done in this function. 12169 * 12170 * Return codes 12171 * 0 - successful 12172 * other values - error 12173 */ 12174 static int 12175 lpfc_sli_enable_msi(struct lpfc_hba *phba) 12176 { 12177 int rc; 12178 12179 rc = pci_enable_msi(phba->pcidev); 12180 if (!rc) 12181 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 12182 "0012 PCI enable MSI mode success.\n"); 12183 else { 12184 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 12185 "0471 PCI enable MSI mode failed (%d)\n", rc); 12186 return rc; 12187 } 12188 12189 rc = request_irq(phba->pcidev->irq, lpfc_sli_intr_handler, 12190 0, LPFC_DRIVER_NAME, phba); 12191 if (rc) { 12192 pci_disable_msi(phba->pcidev); 12193 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 12194 "0478 MSI request_irq failed (%d)\n", rc); 12195 } 12196 return rc; 12197 } 12198 12199 /** 12200 * lpfc_sli_enable_intr - Enable device interrupt to SLI-3 device. 12201 * @phba: pointer to lpfc hba data structure. 12202 * @cfg_mode: Interrupt configuration mode (INTx, MSI or MSI-X). 12203 * 12204 * This routine is invoked to enable device interrupt and associate driver's 12205 * interrupt handler(s) to interrupt vector(s) to device with SLI-3 interface 12206 * spec. Depends on the interrupt mode configured to the driver, the driver 12207 * will try to fallback from the configured interrupt mode to an interrupt 12208 * mode which is supported by the platform, kernel, and device in the order 12209 * of: 12210 * MSI-X -> MSI -> IRQ. 12211 * 12212 * Return codes 12213 * 0 - successful 12214 * other values - error 12215 **/ 12216 static uint32_t 12217 lpfc_sli_enable_intr(struct lpfc_hba *phba, uint32_t cfg_mode) 12218 { 12219 uint32_t intr_mode = LPFC_INTR_ERROR; 12220 int retval; 12221 12222 /* Need to issue conf_port mbox cmd before conf_msi mbox cmd */ 12223 retval = lpfc_sli_config_port(phba, LPFC_SLI_REV3); 12224 if (retval) 12225 return intr_mode; 12226 phba->hba_flag &= ~HBA_NEEDS_CFG_PORT; 12227 12228 if (cfg_mode == 2) { 12229 /* Now, try to enable MSI-X interrupt mode */ 12230 retval = lpfc_sli_enable_msix(phba); 12231 if (!retval) { 12232 /* Indicate initialization to MSI-X mode */ 12233 phba->intr_type = MSIX; 12234 intr_mode = 2; 12235 } 12236 } 12237 12238 /* Fallback to MSI if MSI-X initialization failed */ 12239 if (cfg_mode >= 1 && phba->intr_type == NONE) { 12240 retval = lpfc_sli_enable_msi(phba); 12241 if (!retval) { 12242 /* Indicate initialization to MSI mode */ 12243 phba->intr_type = MSI; 12244 intr_mode = 1; 12245 } 12246 } 12247 12248 /* Fallback to INTx if both MSI-X/MSI initalization failed */ 12249 if (phba->intr_type == NONE) { 12250 retval = request_irq(phba->pcidev->irq, lpfc_sli_intr_handler, 12251 IRQF_SHARED, LPFC_DRIVER_NAME, phba); 12252 if (!retval) { 12253 /* Indicate initialization to INTx mode */ 12254 phba->intr_type = INTx; 12255 intr_mode = 0; 12256 } 12257 } 12258 return intr_mode; 12259 } 12260 12261 /** 12262 * lpfc_sli_disable_intr - Disable device interrupt to SLI-3 device. 12263 * @phba: pointer to lpfc hba data structure. 12264 * 12265 * This routine is invoked to disable device interrupt and disassociate the 12266 * driver's interrupt handler(s) from interrupt vector(s) to device with 12267 * SLI-3 interface spec. Depending on the interrupt mode, the driver will 12268 * release the interrupt vector(s) for the message signaled interrupt. 12269 **/ 12270 static void 12271 lpfc_sli_disable_intr(struct lpfc_hba *phba) 12272 { 12273 int nr_irqs, i; 12274 12275 if (phba->intr_type == MSIX) 12276 nr_irqs = LPFC_MSIX_VECTORS; 12277 else 12278 nr_irqs = 1; 12279 12280 for (i = 0; i < nr_irqs; i++) 12281 free_irq(pci_irq_vector(phba->pcidev, i), phba); 12282 pci_free_irq_vectors(phba->pcidev); 12283 12284 /* Reset interrupt management states */ 12285 phba->intr_type = NONE; 12286 phba->sli.slistat.sli_intr = 0; 12287 } 12288 12289 /** 12290 * lpfc_find_cpu_handle - Find the CPU that corresponds to the specified Queue 12291 * @phba: pointer to lpfc hba data structure. 12292 * @id: EQ vector index or Hardware Queue index 12293 * @match: LPFC_FIND_BY_EQ = match by EQ 12294 * LPFC_FIND_BY_HDWQ = match by Hardware Queue 12295 * Return the CPU that matches the selection criteria 12296 */ 12297 static uint16_t 12298 lpfc_find_cpu_handle(struct lpfc_hba *phba, uint16_t id, int match) 12299 { 12300 struct lpfc_vector_map_info *cpup; 12301 int cpu; 12302 12303 /* Loop through all CPUs */ 12304 for_each_present_cpu(cpu) { 12305 cpup = &phba->sli4_hba.cpu_map[cpu]; 12306 12307 /* If we are matching by EQ, there may be multiple CPUs using 12308 * using the same vector, so select the one with 12309 * LPFC_CPU_FIRST_IRQ set. 12310 */ 12311 if ((match == LPFC_FIND_BY_EQ) && 12312 (cpup->flag & LPFC_CPU_FIRST_IRQ) && 12313 (cpup->eq == id)) 12314 return cpu; 12315 12316 /* If matching by HDWQ, select the first CPU that matches */ 12317 if ((match == LPFC_FIND_BY_HDWQ) && (cpup->hdwq == id)) 12318 return cpu; 12319 } 12320 return 0; 12321 } 12322 12323 #ifdef CONFIG_X86 12324 /** 12325 * lpfc_find_hyper - Determine if the CPU map entry is hyper-threaded 12326 * @phba: pointer to lpfc hba data structure. 12327 * @cpu: CPU map index 12328 * @phys_id: CPU package physical id 12329 * @core_id: CPU core id 12330 */ 12331 static int 12332 lpfc_find_hyper(struct lpfc_hba *phba, int cpu, 12333 uint16_t phys_id, uint16_t core_id) 12334 { 12335 struct lpfc_vector_map_info *cpup; 12336 int idx; 12337 12338 for_each_present_cpu(idx) { 12339 cpup = &phba->sli4_hba.cpu_map[idx]; 12340 /* Does the cpup match the one we are looking for */ 12341 if ((cpup->phys_id == phys_id) && 12342 (cpup->core_id == core_id) && 12343 (cpu != idx)) 12344 return 1; 12345 } 12346 return 0; 12347 } 12348 #endif 12349 12350 /* 12351 * lpfc_assign_eq_map_info - Assigns eq for vector_map structure 12352 * @phba: pointer to lpfc hba data structure. 12353 * @eqidx: index for eq and irq vector 12354 * @flag: flags to set for vector_map structure 12355 * @cpu: cpu used to index vector_map structure 12356 * 12357 * The routine assigns eq info into vector_map structure 12358 */ 12359 static inline void 12360 lpfc_assign_eq_map_info(struct lpfc_hba *phba, uint16_t eqidx, uint16_t flag, 12361 unsigned int cpu) 12362 { 12363 struct lpfc_vector_map_info *cpup = &phba->sli4_hba.cpu_map[cpu]; 12364 struct lpfc_hba_eq_hdl *eqhdl = lpfc_get_eq_hdl(eqidx); 12365 12366 cpup->eq = eqidx; 12367 cpup->flag |= flag; 12368 12369 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 12370 "3336 Set Affinity: CPU %d irq %d eq %d flag x%x\n", 12371 cpu, eqhdl->irq, cpup->eq, cpup->flag); 12372 } 12373 12374 /** 12375 * lpfc_cpu_map_array_init - Initialize cpu_map structure 12376 * @phba: pointer to lpfc hba data structure. 12377 * 12378 * The routine initializes the cpu_map array structure 12379 */ 12380 static void 12381 lpfc_cpu_map_array_init(struct lpfc_hba *phba) 12382 { 12383 struct lpfc_vector_map_info *cpup; 12384 struct lpfc_eq_intr_info *eqi; 12385 int cpu; 12386 12387 for_each_possible_cpu(cpu) { 12388 cpup = &phba->sli4_hba.cpu_map[cpu]; 12389 cpup->phys_id = LPFC_VECTOR_MAP_EMPTY; 12390 cpup->core_id = LPFC_VECTOR_MAP_EMPTY; 12391 cpup->hdwq = LPFC_VECTOR_MAP_EMPTY; 12392 cpup->eq = LPFC_VECTOR_MAP_EMPTY; 12393 cpup->flag = 0; 12394 eqi = per_cpu_ptr(phba->sli4_hba.eq_info, cpu); 12395 INIT_LIST_HEAD(&eqi->list); 12396 eqi->icnt = 0; 12397 } 12398 } 12399 12400 /** 12401 * lpfc_hba_eq_hdl_array_init - Initialize hba_eq_hdl structure 12402 * @phba: pointer to lpfc hba data structure. 12403 * 12404 * The routine initializes the hba_eq_hdl array structure 12405 */ 12406 static void 12407 lpfc_hba_eq_hdl_array_init(struct lpfc_hba *phba) 12408 { 12409 struct lpfc_hba_eq_hdl *eqhdl; 12410 int i; 12411 12412 for (i = 0; i < phba->cfg_irq_chann; i++) { 12413 eqhdl = lpfc_get_eq_hdl(i); 12414 eqhdl->irq = LPFC_IRQ_EMPTY; 12415 eqhdl->phba = phba; 12416 } 12417 } 12418 12419 /** 12420 * lpfc_cpu_affinity_check - Check vector CPU affinity mappings 12421 * @phba: pointer to lpfc hba data structure. 12422 * @vectors: number of msix vectors allocated. 12423 * 12424 * The routine will figure out the CPU affinity assignment for every 12425 * MSI-X vector allocated for the HBA. 12426 * In addition, the CPU to IO channel mapping will be calculated 12427 * and the phba->sli4_hba.cpu_map array will reflect this. 12428 */ 12429 static void 12430 lpfc_cpu_affinity_check(struct lpfc_hba *phba, int vectors) 12431 { 12432 int i, cpu, idx, next_idx, new_cpu, start_cpu, first_cpu; 12433 int max_phys_id, min_phys_id; 12434 int max_core_id, min_core_id; 12435 struct lpfc_vector_map_info *cpup; 12436 struct lpfc_vector_map_info *new_cpup; 12437 #ifdef CONFIG_X86 12438 struct cpuinfo_x86 *cpuinfo; 12439 #endif 12440 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS 12441 struct lpfc_hdwq_stat *c_stat; 12442 #endif 12443 12444 max_phys_id = 0; 12445 min_phys_id = LPFC_VECTOR_MAP_EMPTY; 12446 max_core_id = 0; 12447 min_core_id = LPFC_VECTOR_MAP_EMPTY; 12448 12449 /* Update CPU map with physical id and core id of each CPU */ 12450 for_each_present_cpu(cpu) { 12451 cpup = &phba->sli4_hba.cpu_map[cpu]; 12452 #ifdef CONFIG_X86 12453 cpuinfo = &cpu_data(cpu); 12454 cpup->phys_id = cpuinfo->phys_proc_id; 12455 cpup->core_id = cpuinfo->cpu_core_id; 12456 if (lpfc_find_hyper(phba, cpu, cpup->phys_id, cpup->core_id)) 12457 cpup->flag |= LPFC_CPU_MAP_HYPER; 12458 #else 12459 /* No distinction between CPUs for other platforms */ 12460 cpup->phys_id = 0; 12461 cpup->core_id = cpu; 12462 #endif 12463 12464 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 12465 "3328 CPU %d physid %d coreid %d flag x%x\n", 12466 cpu, cpup->phys_id, cpup->core_id, cpup->flag); 12467 12468 if (cpup->phys_id > max_phys_id) 12469 max_phys_id = cpup->phys_id; 12470 if (cpup->phys_id < min_phys_id) 12471 min_phys_id = cpup->phys_id; 12472 12473 if (cpup->core_id > max_core_id) 12474 max_core_id = cpup->core_id; 12475 if (cpup->core_id < min_core_id) 12476 min_core_id = cpup->core_id; 12477 } 12478 12479 /* After looking at each irq vector assigned to this pcidev, its 12480 * possible to see that not ALL CPUs have been accounted for. 12481 * Next we will set any unassigned (unaffinitized) cpu map 12482 * entries to a IRQ on the same phys_id. 12483 */ 12484 first_cpu = cpumask_first(cpu_present_mask); 12485 start_cpu = first_cpu; 12486 12487 for_each_present_cpu(cpu) { 12488 cpup = &phba->sli4_hba.cpu_map[cpu]; 12489 12490 /* Is this CPU entry unassigned */ 12491 if (cpup->eq == LPFC_VECTOR_MAP_EMPTY) { 12492 /* Mark CPU as IRQ not assigned by the kernel */ 12493 cpup->flag |= LPFC_CPU_MAP_UNASSIGN; 12494 12495 /* If so, find a new_cpup thats on the the SAME 12496 * phys_id as cpup. start_cpu will start where we 12497 * left off so all unassigned entries don't get assgined 12498 * the IRQ of the first entry. 12499 */ 12500 new_cpu = start_cpu; 12501 for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) { 12502 new_cpup = &phba->sli4_hba.cpu_map[new_cpu]; 12503 if (!(new_cpup->flag & LPFC_CPU_MAP_UNASSIGN) && 12504 (new_cpup->eq != LPFC_VECTOR_MAP_EMPTY) && 12505 (new_cpup->phys_id == cpup->phys_id)) 12506 goto found_same; 12507 new_cpu = cpumask_next( 12508 new_cpu, cpu_present_mask); 12509 if (new_cpu == nr_cpumask_bits) 12510 new_cpu = first_cpu; 12511 } 12512 /* At this point, we leave the CPU as unassigned */ 12513 continue; 12514 found_same: 12515 /* We found a matching phys_id, so copy the IRQ info */ 12516 cpup->eq = new_cpup->eq; 12517 12518 /* Bump start_cpu to the next slot to minmize the 12519 * chance of having multiple unassigned CPU entries 12520 * selecting the same IRQ. 12521 */ 12522 start_cpu = cpumask_next(new_cpu, cpu_present_mask); 12523 if (start_cpu == nr_cpumask_bits) 12524 start_cpu = first_cpu; 12525 12526 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 12527 "3337 Set Affinity: CPU %d " 12528 "eq %d from peer cpu %d same " 12529 "phys_id (%d)\n", 12530 cpu, cpup->eq, new_cpu, 12531 cpup->phys_id); 12532 } 12533 } 12534 12535 /* Set any unassigned cpu map entries to a IRQ on any phys_id */ 12536 start_cpu = first_cpu; 12537 12538 for_each_present_cpu(cpu) { 12539 cpup = &phba->sli4_hba.cpu_map[cpu]; 12540 12541 /* Is this entry unassigned */ 12542 if (cpup->eq == LPFC_VECTOR_MAP_EMPTY) { 12543 /* Mark it as IRQ not assigned by the kernel */ 12544 cpup->flag |= LPFC_CPU_MAP_UNASSIGN; 12545 12546 /* If so, find a new_cpup thats on ANY phys_id 12547 * as the cpup. start_cpu will start where we 12548 * left off so all unassigned entries don't get 12549 * assigned the IRQ of the first entry. 12550 */ 12551 new_cpu = start_cpu; 12552 for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) { 12553 new_cpup = &phba->sli4_hba.cpu_map[new_cpu]; 12554 if (!(new_cpup->flag & LPFC_CPU_MAP_UNASSIGN) && 12555 (new_cpup->eq != LPFC_VECTOR_MAP_EMPTY)) 12556 goto found_any; 12557 new_cpu = cpumask_next( 12558 new_cpu, cpu_present_mask); 12559 if (new_cpu == nr_cpumask_bits) 12560 new_cpu = first_cpu; 12561 } 12562 /* We should never leave an entry unassigned */ 12563 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 12564 "3339 Set Affinity: CPU %d " 12565 "eq %d UNASSIGNED\n", 12566 cpup->hdwq, cpup->eq); 12567 continue; 12568 found_any: 12569 /* We found an available entry, copy the IRQ info */ 12570 cpup->eq = new_cpup->eq; 12571 12572 /* Bump start_cpu to the next slot to minmize the 12573 * chance of having multiple unassigned CPU entries 12574 * selecting the same IRQ. 12575 */ 12576 start_cpu = cpumask_next(new_cpu, cpu_present_mask); 12577 if (start_cpu == nr_cpumask_bits) 12578 start_cpu = first_cpu; 12579 12580 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 12581 "3338 Set Affinity: CPU %d " 12582 "eq %d from peer cpu %d (%d/%d)\n", 12583 cpu, cpup->eq, new_cpu, 12584 new_cpup->phys_id, new_cpup->core_id); 12585 } 12586 } 12587 12588 /* Assign hdwq indices that are unique across all cpus in the map 12589 * that are also FIRST_CPUs. 12590 */ 12591 idx = 0; 12592 for_each_present_cpu(cpu) { 12593 cpup = &phba->sli4_hba.cpu_map[cpu]; 12594 12595 /* Only FIRST IRQs get a hdwq index assignment. */ 12596 if (!(cpup->flag & LPFC_CPU_FIRST_IRQ)) 12597 continue; 12598 12599 /* 1 to 1, the first LPFC_CPU_FIRST_IRQ cpus to a unique hdwq */ 12600 cpup->hdwq = idx; 12601 idx++; 12602 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 12603 "3333 Set Affinity: CPU %d (phys %d core %d): " 12604 "hdwq %d eq %d flg x%x\n", 12605 cpu, cpup->phys_id, cpup->core_id, 12606 cpup->hdwq, cpup->eq, cpup->flag); 12607 } 12608 /* Associate a hdwq with each cpu_map entry 12609 * This will be 1 to 1 - hdwq to cpu, unless there are less 12610 * hardware queues then CPUs. For that case we will just round-robin 12611 * the available hardware queues as they get assigned to CPUs. 12612 * The next_idx is the idx from the FIRST_CPU loop above to account 12613 * for irq_chann < hdwq. The idx is used for round-robin assignments 12614 * and needs to start at 0. 12615 */ 12616 next_idx = idx; 12617 start_cpu = 0; 12618 idx = 0; 12619 for_each_present_cpu(cpu) { 12620 cpup = &phba->sli4_hba.cpu_map[cpu]; 12621 12622 /* FIRST cpus are already mapped. */ 12623 if (cpup->flag & LPFC_CPU_FIRST_IRQ) 12624 continue; 12625 12626 /* If the cfg_irq_chann < cfg_hdw_queue, set the hdwq 12627 * of the unassigned cpus to the next idx so that all 12628 * hdw queues are fully utilized. 12629 */ 12630 if (next_idx < phba->cfg_hdw_queue) { 12631 cpup->hdwq = next_idx; 12632 next_idx++; 12633 continue; 12634 } 12635 12636 /* Not a First CPU and all hdw_queues are used. Reuse a 12637 * Hardware Queue for another CPU, so be smart about it 12638 * and pick one that has its IRQ/EQ mapped to the same phys_id 12639 * (CPU package) and core_id. 12640 */ 12641 new_cpu = start_cpu; 12642 for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) { 12643 new_cpup = &phba->sli4_hba.cpu_map[new_cpu]; 12644 if (new_cpup->hdwq != LPFC_VECTOR_MAP_EMPTY && 12645 new_cpup->phys_id == cpup->phys_id && 12646 new_cpup->core_id == cpup->core_id) { 12647 goto found_hdwq; 12648 } 12649 new_cpu = cpumask_next(new_cpu, cpu_present_mask); 12650 if (new_cpu == nr_cpumask_bits) 12651 new_cpu = first_cpu; 12652 } 12653 12654 /* If we can't match both phys_id and core_id, 12655 * settle for just a phys_id match. 12656 */ 12657 new_cpu = start_cpu; 12658 for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) { 12659 new_cpup = &phba->sli4_hba.cpu_map[new_cpu]; 12660 if (new_cpup->hdwq != LPFC_VECTOR_MAP_EMPTY && 12661 new_cpup->phys_id == cpup->phys_id) 12662 goto found_hdwq; 12663 12664 new_cpu = cpumask_next(new_cpu, cpu_present_mask); 12665 if (new_cpu == nr_cpumask_bits) 12666 new_cpu = first_cpu; 12667 } 12668 12669 /* Otherwise just round robin on cfg_hdw_queue */ 12670 cpup->hdwq = idx % phba->cfg_hdw_queue; 12671 idx++; 12672 goto logit; 12673 found_hdwq: 12674 /* We found an available entry, copy the IRQ info */ 12675 start_cpu = cpumask_next(new_cpu, cpu_present_mask); 12676 if (start_cpu == nr_cpumask_bits) 12677 start_cpu = first_cpu; 12678 cpup->hdwq = new_cpup->hdwq; 12679 logit: 12680 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 12681 "3335 Set Affinity: CPU %d (phys %d core %d): " 12682 "hdwq %d eq %d flg x%x\n", 12683 cpu, cpup->phys_id, cpup->core_id, 12684 cpup->hdwq, cpup->eq, cpup->flag); 12685 } 12686 12687 /* 12688 * Initialize the cpu_map slots for not-present cpus in case 12689 * a cpu is hot-added. Perform a simple hdwq round robin assignment. 12690 */ 12691 idx = 0; 12692 for_each_possible_cpu(cpu) { 12693 cpup = &phba->sli4_hba.cpu_map[cpu]; 12694 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS 12695 c_stat = per_cpu_ptr(phba->sli4_hba.c_stat, cpu); 12696 c_stat->hdwq_no = cpup->hdwq; 12697 #endif 12698 if (cpup->hdwq != LPFC_VECTOR_MAP_EMPTY) 12699 continue; 12700 12701 cpup->hdwq = idx++ % phba->cfg_hdw_queue; 12702 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS 12703 c_stat->hdwq_no = cpup->hdwq; 12704 #endif 12705 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 12706 "3340 Set Affinity: not present " 12707 "CPU %d hdwq %d\n", 12708 cpu, cpup->hdwq); 12709 } 12710 12711 /* The cpu_map array will be used later during initialization 12712 * when EQ / CQ / WQs are allocated and configured. 12713 */ 12714 return; 12715 } 12716 12717 /** 12718 * lpfc_cpuhp_get_eq 12719 * 12720 * @phba: pointer to lpfc hba data structure. 12721 * @cpu: cpu going offline 12722 * @eqlist: eq list to append to 12723 */ 12724 static int 12725 lpfc_cpuhp_get_eq(struct lpfc_hba *phba, unsigned int cpu, 12726 struct list_head *eqlist) 12727 { 12728 const struct cpumask *maskp; 12729 struct lpfc_queue *eq; 12730 struct cpumask *tmp; 12731 u16 idx; 12732 12733 tmp = kzalloc(cpumask_size(), GFP_KERNEL); 12734 if (!tmp) 12735 return -ENOMEM; 12736 12737 for (idx = 0; idx < phba->cfg_irq_chann; idx++) { 12738 maskp = pci_irq_get_affinity(phba->pcidev, idx); 12739 if (!maskp) 12740 continue; 12741 /* 12742 * if irq is not affinitized to the cpu going 12743 * then we don't need to poll the eq attached 12744 * to it. 12745 */ 12746 if (!cpumask_and(tmp, maskp, cpumask_of(cpu))) 12747 continue; 12748 /* get the cpus that are online and are affini- 12749 * tized to this irq vector. If the count is 12750 * more than 1 then cpuhp is not going to shut- 12751 * down this vector. Since this cpu has not 12752 * gone offline yet, we need >1. 12753 */ 12754 cpumask_and(tmp, maskp, cpu_online_mask); 12755 if (cpumask_weight(tmp) > 1) 12756 continue; 12757 12758 /* Now that we have an irq to shutdown, get the eq 12759 * mapped to this irq. Note: multiple hdwq's in 12760 * the software can share an eq, but eventually 12761 * only eq will be mapped to this vector 12762 */ 12763 eq = phba->sli4_hba.hba_eq_hdl[idx].eq; 12764 list_add(&eq->_poll_list, eqlist); 12765 } 12766 kfree(tmp); 12767 return 0; 12768 } 12769 12770 static void __lpfc_cpuhp_remove(struct lpfc_hba *phba) 12771 { 12772 if (phba->sli_rev != LPFC_SLI_REV4) 12773 return; 12774 12775 cpuhp_state_remove_instance_nocalls(lpfc_cpuhp_state, 12776 &phba->cpuhp); 12777 /* 12778 * unregistering the instance doesn't stop the polling 12779 * timer. Wait for the poll timer to retire. 12780 */ 12781 synchronize_rcu(); 12782 del_timer_sync(&phba->cpuhp_poll_timer); 12783 } 12784 12785 static void lpfc_cpuhp_remove(struct lpfc_hba *phba) 12786 { 12787 if (phba->pport && (phba->pport->fc_flag & FC_OFFLINE_MODE)) 12788 return; 12789 12790 __lpfc_cpuhp_remove(phba); 12791 } 12792 12793 static void lpfc_cpuhp_add(struct lpfc_hba *phba) 12794 { 12795 if (phba->sli_rev != LPFC_SLI_REV4) 12796 return; 12797 12798 rcu_read_lock(); 12799 12800 if (!list_empty(&phba->poll_list)) 12801 mod_timer(&phba->cpuhp_poll_timer, 12802 jiffies + msecs_to_jiffies(LPFC_POLL_HB)); 12803 12804 rcu_read_unlock(); 12805 12806 cpuhp_state_add_instance_nocalls(lpfc_cpuhp_state, 12807 &phba->cpuhp); 12808 } 12809 12810 static int __lpfc_cpuhp_checks(struct lpfc_hba *phba, int *retval) 12811 { 12812 if (phba->pport->load_flag & FC_UNLOADING) { 12813 *retval = -EAGAIN; 12814 return true; 12815 } 12816 12817 if (phba->sli_rev != LPFC_SLI_REV4) { 12818 *retval = 0; 12819 return true; 12820 } 12821 12822 /* proceed with the hotplug */ 12823 return false; 12824 } 12825 12826 /** 12827 * lpfc_irq_set_aff - set IRQ affinity 12828 * @eqhdl: EQ handle 12829 * @cpu: cpu to set affinity 12830 * 12831 **/ 12832 static inline void 12833 lpfc_irq_set_aff(struct lpfc_hba_eq_hdl *eqhdl, unsigned int cpu) 12834 { 12835 cpumask_clear(&eqhdl->aff_mask); 12836 cpumask_set_cpu(cpu, &eqhdl->aff_mask); 12837 irq_set_status_flags(eqhdl->irq, IRQ_NO_BALANCING); 12838 irq_set_affinity(eqhdl->irq, &eqhdl->aff_mask); 12839 } 12840 12841 /** 12842 * lpfc_irq_clear_aff - clear IRQ affinity 12843 * @eqhdl: EQ handle 12844 * 12845 **/ 12846 static inline void 12847 lpfc_irq_clear_aff(struct lpfc_hba_eq_hdl *eqhdl) 12848 { 12849 cpumask_clear(&eqhdl->aff_mask); 12850 irq_clear_status_flags(eqhdl->irq, IRQ_NO_BALANCING); 12851 } 12852 12853 /** 12854 * lpfc_irq_rebalance - rebalances IRQ affinity according to cpuhp event 12855 * @phba: pointer to HBA context object. 12856 * @cpu: cpu going offline/online 12857 * @offline: true, cpu is going offline. false, cpu is coming online. 12858 * 12859 * If cpu is going offline, we'll try our best effort to find the next 12860 * online cpu on the phba's original_mask and migrate all offlining IRQ 12861 * affinities. 12862 * 12863 * If cpu is coming online, reaffinitize the IRQ back to the onlining cpu. 12864 * 12865 * Note: Call only if NUMA or NHT mode is enabled, otherwise rely on 12866 * PCI_IRQ_AFFINITY to auto-manage IRQ affinity. 12867 * 12868 **/ 12869 static void 12870 lpfc_irq_rebalance(struct lpfc_hba *phba, unsigned int cpu, bool offline) 12871 { 12872 struct lpfc_vector_map_info *cpup; 12873 struct cpumask *aff_mask; 12874 unsigned int cpu_select, cpu_next, idx; 12875 const struct cpumask *orig_mask; 12876 12877 if (phba->irq_chann_mode == NORMAL_MODE) 12878 return; 12879 12880 orig_mask = &phba->sli4_hba.irq_aff_mask; 12881 12882 if (!cpumask_test_cpu(cpu, orig_mask)) 12883 return; 12884 12885 cpup = &phba->sli4_hba.cpu_map[cpu]; 12886 12887 if (!(cpup->flag & LPFC_CPU_FIRST_IRQ)) 12888 return; 12889 12890 if (offline) { 12891 /* Find next online CPU on original mask */ 12892 cpu_next = cpumask_next_wrap(cpu, orig_mask, cpu, true); 12893 cpu_select = lpfc_next_online_cpu(orig_mask, cpu_next); 12894 12895 /* Found a valid CPU */ 12896 if ((cpu_select < nr_cpu_ids) && (cpu_select != cpu)) { 12897 /* Go through each eqhdl and ensure offlining 12898 * cpu aff_mask is migrated 12899 */ 12900 for (idx = 0; idx < phba->cfg_irq_chann; idx++) { 12901 aff_mask = lpfc_get_aff_mask(idx); 12902 12903 /* Migrate affinity */ 12904 if (cpumask_test_cpu(cpu, aff_mask)) 12905 lpfc_irq_set_aff(lpfc_get_eq_hdl(idx), 12906 cpu_select); 12907 } 12908 } else { 12909 /* Rely on irqbalance if no online CPUs left on NUMA */ 12910 for (idx = 0; idx < phba->cfg_irq_chann; idx++) 12911 lpfc_irq_clear_aff(lpfc_get_eq_hdl(idx)); 12912 } 12913 } else { 12914 /* Migrate affinity back to this CPU */ 12915 lpfc_irq_set_aff(lpfc_get_eq_hdl(cpup->eq), cpu); 12916 } 12917 } 12918 12919 static int lpfc_cpu_offline(unsigned int cpu, struct hlist_node *node) 12920 { 12921 struct lpfc_hba *phba = hlist_entry_safe(node, struct lpfc_hba, cpuhp); 12922 struct lpfc_queue *eq, *next; 12923 LIST_HEAD(eqlist); 12924 int retval; 12925 12926 if (!phba) { 12927 WARN_ONCE(!phba, "cpu: %u. phba:NULL", raw_smp_processor_id()); 12928 return 0; 12929 } 12930 12931 if (__lpfc_cpuhp_checks(phba, &retval)) 12932 return retval; 12933 12934 lpfc_irq_rebalance(phba, cpu, true); 12935 12936 retval = lpfc_cpuhp_get_eq(phba, cpu, &eqlist); 12937 if (retval) 12938 return retval; 12939 12940 /* start polling on these eq's */ 12941 list_for_each_entry_safe(eq, next, &eqlist, _poll_list) { 12942 list_del_init(&eq->_poll_list); 12943 lpfc_sli4_start_polling(eq); 12944 } 12945 12946 return 0; 12947 } 12948 12949 static int lpfc_cpu_online(unsigned int cpu, struct hlist_node *node) 12950 { 12951 struct lpfc_hba *phba = hlist_entry_safe(node, struct lpfc_hba, cpuhp); 12952 struct lpfc_queue *eq, *next; 12953 unsigned int n; 12954 int retval; 12955 12956 if (!phba) { 12957 WARN_ONCE(!phba, "cpu: %u. phba:NULL", raw_smp_processor_id()); 12958 return 0; 12959 } 12960 12961 if (__lpfc_cpuhp_checks(phba, &retval)) 12962 return retval; 12963 12964 lpfc_irq_rebalance(phba, cpu, false); 12965 12966 list_for_each_entry_safe(eq, next, &phba->poll_list, _poll_list) { 12967 n = lpfc_find_cpu_handle(phba, eq->hdwq, LPFC_FIND_BY_HDWQ); 12968 if (n == cpu) 12969 lpfc_sli4_stop_polling(eq); 12970 } 12971 12972 return 0; 12973 } 12974 12975 /** 12976 * lpfc_sli4_enable_msix - Enable MSI-X interrupt mode to SLI-4 device 12977 * @phba: pointer to lpfc hba data structure. 12978 * 12979 * This routine is invoked to enable the MSI-X interrupt vectors to device 12980 * with SLI-4 interface spec. It also allocates MSI-X vectors and maps them 12981 * to cpus on the system. 12982 * 12983 * When cfg_irq_numa is enabled, the adapter will only allocate vectors for 12984 * the number of cpus on the same numa node as this adapter. The vectors are 12985 * allocated without requesting OS affinity mapping. A vector will be 12986 * allocated and assigned to each online and offline cpu. If the cpu is 12987 * online, then affinity will be set to that cpu. If the cpu is offline, then 12988 * affinity will be set to the nearest peer cpu within the numa node that is 12989 * online. If there are no online cpus within the numa node, affinity is not 12990 * assigned and the OS may do as it pleases. Note: cpu vector affinity mapping 12991 * is consistent with the way cpu online/offline is handled when cfg_irq_numa is 12992 * configured. 12993 * 12994 * If numa mode is not enabled and there is more than 1 vector allocated, then 12995 * the driver relies on the managed irq interface where the OS assigns vector to 12996 * cpu affinity. The driver will then use that affinity mapping to setup its 12997 * cpu mapping table. 12998 * 12999 * Return codes 13000 * 0 - successful 13001 * other values - error 13002 **/ 13003 static int 13004 lpfc_sli4_enable_msix(struct lpfc_hba *phba) 13005 { 13006 int vectors, rc, index; 13007 char *name; 13008 const struct cpumask *aff_mask = NULL; 13009 unsigned int cpu = 0, cpu_cnt = 0, cpu_select = nr_cpu_ids; 13010 struct lpfc_vector_map_info *cpup; 13011 struct lpfc_hba_eq_hdl *eqhdl; 13012 const struct cpumask *maskp; 13013 unsigned int flags = PCI_IRQ_MSIX; 13014 13015 /* Set up MSI-X multi-message vectors */ 13016 vectors = phba->cfg_irq_chann; 13017 13018 if (phba->irq_chann_mode != NORMAL_MODE) 13019 aff_mask = &phba->sli4_hba.irq_aff_mask; 13020 13021 if (aff_mask) { 13022 cpu_cnt = cpumask_weight(aff_mask); 13023 vectors = min(phba->cfg_irq_chann, cpu_cnt); 13024 13025 /* cpu: iterates over aff_mask including offline or online 13026 * cpu_select: iterates over online aff_mask to set affinity 13027 */ 13028 cpu = cpumask_first(aff_mask); 13029 cpu_select = lpfc_next_online_cpu(aff_mask, cpu); 13030 } else { 13031 flags |= PCI_IRQ_AFFINITY; 13032 } 13033 13034 rc = pci_alloc_irq_vectors(phba->pcidev, 1, vectors, flags); 13035 if (rc < 0) { 13036 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 13037 "0484 PCI enable MSI-X failed (%d)\n", rc); 13038 goto vec_fail_out; 13039 } 13040 vectors = rc; 13041 13042 /* Assign MSI-X vectors to interrupt handlers */ 13043 for (index = 0; index < vectors; index++) { 13044 eqhdl = lpfc_get_eq_hdl(index); 13045 name = eqhdl->handler_name; 13046 memset(name, 0, LPFC_SLI4_HANDLER_NAME_SZ); 13047 snprintf(name, LPFC_SLI4_HANDLER_NAME_SZ, 13048 LPFC_DRIVER_HANDLER_NAME"%d", index); 13049 13050 eqhdl->idx = index; 13051 rc = pci_irq_vector(phba->pcidev, index); 13052 if (rc < 0) { 13053 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 13054 "0489 MSI-X fast-path (%d) " 13055 "pci_irq_vec failed (%d)\n", index, rc); 13056 goto cfg_fail_out; 13057 } 13058 eqhdl->irq = rc; 13059 13060 rc = request_irq(eqhdl->irq, &lpfc_sli4_hba_intr_handler, 0, 13061 name, eqhdl); 13062 if (rc) { 13063 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 13064 "0486 MSI-X fast-path (%d) " 13065 "request_irq failed (%d)\n", index, rc); 13066 goto cfg_fail_out; 13067 } 13068 13069 if (aff_mask) { 13070 /* If found a neighboring online cpu, set affinity */ 13071 if (cpu_select < nr_cpu_ids) 13072 lpfc_irq_set_aff(eqhdl, cpu_select); 13073 13074 /* Assign EQ to cpu_map */ 13075 lpfc_assign_eq_map_info(phba, index, 13076 LPFC_CPU_FIRST_IRQ, 13077 cpu); 13078 13079 /* Iterate to next offline or online cpu in aff_mask */ 13080 cpu = cpumask_next(cpu, aff_mask); 13081 13082 /* Find next online cpu in aff_mask to set affinity */ 13083 cpu_select = lpfc_next_online_cpu(aff_mask, cpu); 13084 } else if (vectors == 1) { 13085 cpu = cpumask_first(cpu_present_mask); 13086 lpfc_assign_eq_map_info(phba, index, LPFC_CPU_FIRST_IRQ, 13087 cpu); 13088 } else { 13089 maskp = pci_irq_get_affinity(phba->pcidev, index); 13090 13091 /* Loop through all CPUs associated with vector index */ 13092 for_each_cpu_and(cpu, maskp, cpu_present_mask) { 13093 cpup = &phba->sli4_hba.cpu_map[cpu]; 13094 13095 /* If this is the first CPU thats assigned to 13096 * this vector, set LPFC_CPU_FIRST_IRQ. 13097 * 13098 * With certain platforms its possible that irq 13099 * vectors are affinitized to all the cpu's. 13100 * This can result in each cpu_map.eq to be set 13101 * to the last vector, resulting in overwrite 13102 * of all the previous cpu_map.eq. Ensure that 13103 * each vector receives a place in cpu_map. 13104 * Later call to lpfc_cpu_affinity_check will 13105 * ensure we are nicely balanced out. 13106 */ 13107 if (cpup->eq != LPFC_VECTOR_MAP_EMPTY) 13108 continue; 13109 lpfc_assign_eq_map_info(phba, index, 13110 LPFC_CPU_FIRST_IRQ, 13111 cpu); 13112 break; 13113 } 13114 } 13115 } 13116 13117 if (vectors != phba->cfg_irq_chann) { 13118 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 13119 "3238 Reducing IO channels to match number of " 13120 "MSI-X vectors, requested %d got %d\n", 13121 phba->cfg_irq_chann, vectors); 13122 if (phba->cfg_irq_chann > vectors) 13123 phba->cfg_irq_chann = vectors; 13124 } 13125 13126 return rc; 13127 13128 cfg_fail_out: 13129 /* free the irq already requested */ 13130 for (--index; index >= 0; index--) { 13131 eqhdl = lpfc_get_eq_hdl(index); 13132 lpfc_irq_clear_aff(eqhdl); 13133 free_irq(eqhdl->irq, eqhdl); 13134 } 13135 13136 /* Unconfigure MSI-X capability structure */ 13137 pci_free_irq_vectors(phba->pcidev); 13138 13139 vec_fail_out: 13140 return rc; 13141 } 13142 13143 /** 13144 * lpfc_sli4_enable_msi - Enable MSI interrupt mode to SLI-4 device 13145 * @phba: pointer to lpfc hba data structure. 13146 * 13147 * This routine is invoked to enable the MSI interrupt mode to device with 13148 * SLI-4 interface spec. The kernel function pci_alloc_irq_vectors() is 13149 * called to enable the MSI vector. The device driver is responsible for 13150 * calling the request_irq() to register MSI vector with a interrupt the 13151 * handler, which is done in this function. 13152 * 13153 * Return codes 13154 * 0 - successful 13155 * other values - error 13156 **/ 13157 static int 13158 lpfc_sli4_enable_msi(struct lpfc_hba *phba) 13159 { 13160 int rc, index; 13161 unsigned int cpu; 13162 struct lpfc_hba_eq_hdl *eqhdl; 13163 13164 rc = pci_alloc_irq_vectors(phba->pcidev, 1, 1, 13165 PCI_IRQ_MSI | PCI_IRQ_AFFINITY); 13166 if (rc > 0) 13167 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 13168 "0487 PCI enable MSI mode success.\n"); 13169 else { 13170 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 13171 "0488 PCI enable MSI mode failed (%d)\n", rc); 13172 return rc ? rc : -1; 13173 } 13174 13175 rc = request_irq(phba->pcidev->irq, lpfc_sli4_intr_handler, 13176 0, LPFC_DRIVER_NAME, phba); 13177 if (rc) { 13178 pci_free_irq_vectors(phba->pcidev); 13179 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 13180 "0490 MSI request_irq failed (%d)\n", rc); 13181 return rc; 13182 } 13183 13184 eqhdl = lpfc_get_eq_hdl(0); 13185 rc = pci_irq_vector(phba->pcidev, 0); 13186 if (rc < 0) { 13187 pci_free_irq_vectors(phba->pcidev); 13188 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 13189 "0496 MSI pci_irq_vec failed (%d)\n", rc); 13190 return rc; 13191 } 13192 eqhdl->irq = rc; 13193 13194 cpu = cpumask_first(cpu_present_mask); 13195 lpfc_assign_eq_map_info(phba, 0, LPFC_CPU_FIRST_IRQ, cpu); 13196 13197 for (index = 0; index < phba->cfg_irq_chann; index++) { 13198 eqhdl = lpfc_get_eq_hdl(index); 13199 eqhdl->idx = index; 13200 } 13201 13202 return 0; 13203 } 13204 13205 /** 13206 * lpfc_sli4_enable_intr - Enable device interrupt to SLI-4 device 13207 * @phba: pointer to lpfc hba data structure. 13208 * @cfg_mode: Interrupt configuration mode (INTx, MSI or MSI-X). 13209 * 13210 * This routine is invoked to enable device interrupt and associate driver's 13211 * interrupt handler(s) to interrupt vector(s) to device with SLI-4 13212 * interface spec. Depends on the interrupt mode configured to the driver, 13213 * the driver will try to fallback from the configured interrupt mode to an 13214 * interrupt mode which is supported by the platform, kernel, and device in 13215 * the order of: 13216 * MSI-X -> MSI -> IRQ. 13217 * 13218 * Return codes 13219 * Interrupt mode (2, 1, 0) - successful 13220 * LPFC_INTR_ERROR - error 13221 **/ 13222 static uint32_t 13223 lpfc_sli4_enable_intr(struct lpfc_hba *phba, uint32_t cfg_mode) 13224 { 13225 uint32_t intr_mode = LPFC_INTR_ERROR; 13226 int retval, idx; 13227 13228 if (cfg_mode == 2) { 13229 /* Preparation before conf_msi mbox cmd */ 13230 retval = 0; 13231 if (!retval) { 13232 /* Now, try to enable MSI-X interrupt mode */ 13233 retval = lpfc_sli4_enable_msix(phba); 13234 if (!retval) { 13235 /* Indicate initialization to MSI-X mode */ 13236 phba->intr_type = MSIX; 13237 intr_mode = 2; 13238 } 13239 } 13240 } 13241 13242 /* Fallback to MSI if MSI-X initialization failed */ 13243 if (cfg_mode >= 1 && phba->intr_type == NONE) { 13244 retval = lpfc_sli4_enable_msi(phba); 13245 if (!retval) { 13246 /* Indicate initialization to MSI mode */ 13247 phba->intr_type = MSI; 13248 intr_mode = 1; 13249 } 13250 } 13251 13252 /* Fallback to INTx if both MSI-X/MSI initalization failed */ 13253 if (phba->intr_type == NONE) { 13254 retval = request_irq(phba->pcidev->irq, lpfc_sli4_intr_handler, 13255 IRQF_SHARED, LPFC_DRIVER_NAME, phba); 13256 if (!retval) { 13257 struct lpfc_hba_eq_hdl *eqhdl; 13258 unsigned int cpu; 13259 13260 /* Indicate initialization to INTx mode */ 13261 phba->intr_type = INTx; 13262 intr_mode = 0; 13263 13264 eqhdl = lpfc_get_eq_hdl(0); 13265 retval = pci_irq_vector(phba->pcidev, 0); 13266 if (retval < 0) { 13267 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 13268 "0502 INTR pci_irq_vec failed (%d)\n", 13269 retval); 13270 return LPFC_INTR_ERROR; 13271 } 13272 eqhdl->irq = retval; 13273 13274 cpu = cpumask_first(cpu_present_mask); 13275 lpfc_assign_eq_map_info(phba, 0, LPFC_CPU_FIRST_IRQ, 13276 cpu); 13277 for (idx = 0; idx < phba->cfg_irq_chann; idx++) { 13278 eqhdl = lpfc_get_eq_hdl(idx); 13279 eqhdl->idx = idx; 13280 } 13281 } 13282 } 13283 return intr_mode; 13284 } 13285 13286 /** 13287 * lpfc_sli4_disable_intr - Disable device interrupt to SLI-4 device 13288 * @phba: pointer to lpfc hba data structure. 13289 * 13290 * This routine is invoked to disable device interrupt and disassociate 13291 * the driver's interrupt handler(s) from interrupt vector(s) to device 13292 * with SLI-4 interface spec. Depending on the interrupt mode, the driver 13293 * will release the interrupt vector(s) for the message signaled interrupt. 13294 **/ 13295 static void 13296 lpfc_sli4_disable_intr(struct lpfc_hba *phba) 13297 { 13298 /* Disable the currently initialized interrupt mode */ 13299 if (phba->intr_type == MSIX) { 13300 int index; 13301 struct lpfc_hba_eq_hdl *eqhdl; 13302 13303 /* Free up MSI-X multi-message vectors */ 13304 for (index = 0; index < phba->cfg_irq_chann; index++) { 13305 eqhdl = lpfc_get_eq_hdl(index); 13306 lpfc_irq_clear_aff(eqhdl); 13307 free_irq(eqhdl->irq, eqhdl); 13308 } 13309 } else { 13310 free_irq(phba->pcidev->irq, phba); 13311 } 13312 13313 pci_free_irq_vectors(phba->pcidev); 13314 13315 /* Reset interrupt management states */ 13316 phba->intr_type = NONE; 13317 phba->sli.slistat.sli_intr = 0; 13318 } 13319 13320 /** 13321 * lpfc_unset_hba - Unset SLI3 hba device initialization 13322 * @phba: pointer to lpfc hba data structure. 13323 * 13324 * This routine is invoked to unset the HBA device initialization steps to 13325 * a device with SLI-3 interface spec. 13326 **/ 13327 static void 13328 lpfc_unset_hba(struct lpfc_hba *phba) 13329 { 13330 struct lpfc_vport *vport = phba->pport; 13331 struct Scsi_Host *shost = lpfc_shost_from_vport(vport); 13332 13333 spin_lock_irq(shost->host_lock); 13334 vport->load_flag |= FC_UNLOADING; 13335 spin_unlock_irq(shost->host_lock); 13336 13337 kfree(phba->vpi_bmask); 13338 kfree(phba->vpi_ids); 13339 13340 lpfc_stop_hba_timers(phba); 13341 13342 phba->pport->work_port_events = 0; 13343 13344 lpfc_sli_hba_down(phba); 13345 13346 lpfc_sli_brdrestart(phba); 13347 13348 lpfc_sli_disable_intr(phba); 13349 13350 return; 13351 } 13352 13353 /** 13354 * lpfc_sli4_xri_exchange_busy_wait - Wait for device XRI exchange busy 13355 * @phba: Pointer to HBA context object. 13356 * 13357 * This function is called in the SLI4 code path to wait for completion 13358 * of device's XRIs exchange busy. It will check the XRI exchange busy 13359 * on outstanding FCP and ELS I/Os every 10ms for up to 10 seconds; after 13360 * that, it will check the XRI exchange busy on outstanding FCP and ELS 13361 * I/Os every 30 seconds, log error message, and wait forever. Only when 13362 * all XRI exchange busy complete, the driver unload shall proceed with 13363 * invoking the function reset ioctl mailbox command to the CNA and the 13364 * the rest of the driver unload resource release. 13365 **/ 13366 static void 13367 lpfc_sli4_xri_exchange_busy_wait(struct lpfc_hba *phba) 13368 { 13369 struct lpfc_sli4_hdw_queue *qp; 13370 int idx, ccnt; 13371 int wait_time = 0; 13372 int io_xri_cmpl = 1; 13373 int nvmet_xri_cmpl = 1; 13374 int els_xri_cmpl = list_empty(&phba->sli4_hba.lpfc_abts_els_sgl_list); 13375 13376 /* Driver just aborted IOs during the hba_unset process. Pause 13377 * here to give the HBA time to complete the IO and get entries 13378 * into the abts lists. 13379 */ 13380 msleep(LPFC_XRI_EXCH_BUSY_WAIT_T1 * 5); 13381 13382 /* Wait for NVME pending IO to flush back to transport. */ 13383 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) 13384 lpfc_nvme_wait_for_io_drain(phba); 13385 13386 ccnt = 0; 13387 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { 13388 qp = &phba->sli4_hba.hdwq[idx]; 13389 io_xri_cmpl = list_empty(&qp->lpfc_abts_io_buf_list); 13390 if (!io_xri_cmpl) /* if list is NOT empty */ 13391 ccnt++; 13392 } 13393 if (ccnt) 13394 io_xri_cmpl = 0; 13395 13396 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 13397 nvmet_xri_cmpl = 13398 list_empty(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list); 13399 } 13400 13401 while (!els_xri_cmpl || !io_xri_cmpl || !nvmet_xri_cmpl) { 13402 if (wait_time > LPFC_XRI_EXCH_BUSY_WAIT_TMO) { 13403 if (!nvmet_xri_cmpl) 13404 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 13405 "6424 NVMET XRI exchange busy " 13406 "wait time: %d seconds.\n", 13407 wait_time/1000); 13408 if (!io_xri_cmpl) 13409 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 13410 "6100 IO XRI exchange busy " 13411 "wait time: %d seconds.\n", 13412 wait_time/1000); 13413 if (!els_xri_cmpl) 13414 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 13415 "2878 ELS XRI exchange busy " 13416 "wait time: %d seconds.\n", 13417 wait_time/1000); 13418 msleep(LPFC_XRI_EXCH_BUSY_WAIT_T2); 13419 wait_time += LPFC_XRI_EXCH_BUSY_WAIT_T2; 13420 } else { 13421 msleep(LPFC_XRI_EXCH_BUSY_WAIT_T1); 13422 wait_time += LPFC_XRI_EXCH_BUSY_WAIT_T1; 13423 } 13424 13425 ccnt = 0; 13426 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { 13427 qp = &phba->sli4_hba.hdwq[idx]; 13428 io_xri_cmpl = list_empty( 13429 &qp->lpfc_abts_io_buf_list); 13430 if (!io_xri_cmpl) /* if list is NOT empty */ 13431 ccnt++; 13432 } 13433 if (ccnt) 13434 io_xri_cmpl = 0; 13435 13436 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 13437 nvmet_xri_cmpl = list_empty( 13438 &phba->sli4_hba.lpfc_abts_nvmet_ctx_list); 13439 } 13440 els_xri_cmpl = 13441 list_empty(&phba->sli4_hba.lpfc_abts_els_sgl_list); 13442 13443 } 13444 } 13445 13446 /** 13447 * lpfc_sli4_hba_unset - Unset the fcoe hba 13448 * @phba: Pointer to HBA context object. 13449 * 13450 * This function is called in the SLI4 code path to reset the HBA's FCoE 13451 * function. The caller is not required to hold any lock. This routine 13452 * issues PCI function reset mailbox command to reset the FCoE function. 13453 * At the end of the function, it calls lpfc_hba_down_post function to 13454 * free any pending commands. 13455 **/ 13456 static void 13457 lpfc_sli4_hba_unset(struct lpfc_hba *phba) 13458 { 13459 int wait_cnt = 0; 13460 LPFC_MBOXQ_t *mboxq; 13461 struct pci_dev *pdev = phba->pcidev; 13462 13463 lpfc_stop_hba_timers(phba); 13464 hrtimer_cancel(&phba->cmf_timer); 13465 13466 if (phba->pport) 13467 phba->sli4_hba.intr_enable = 0; 13468 13469 /* 13470 * Gracefully wait out the potential current outstanding asynchronous 13471 * mailbox command. 13472 */ 13473 13474 /* First, block any pending async mailbox command from posted */ 13475 spin_lock_irq(&phba->hbalock); 13476 phba->sli.sli_flag |= LPFC_SLI_ASYNC_MBX_BLK; 13477 spin_unlock_irq(&phba->hbalock); 13478 /* Now, trying to wait it out if we can */ 13479 while (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) { 13480 msleep(10); 13481 if (++wait_cnt > LPFC_ACTIVE_MBOX_WAIT_CNT) 13482 break; 13483 } 13484 /* Forcefully release the outstanding mailbox command if timed out */ 13485 if (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) { 13486 spin_lock_irq(&phba->hbalock); 13487 mboxq = phba->sli.mbox_active; 13488 mboxq->u.mb.mbxStatus = MBX_NOT_FINISHED; 13489 __lpfc_mbox_cmpl_put(phba, mboxq); 13490 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE; 13491 phba->sli.mbox_active = NULL; 13492 spin_unlock_irq(&phba->hbalock); 13493 } 13494 13495 /* Abort all iocbs associated with the hba */ 13496 lpfc_sli_hba_iocb_abort(phba); 13497 13498 if (!pci_channel_offline(phba->pcidev)) 13499 /* Wait for completion of device XRI exchange busy */ 13500 lpfc_sli4_xri_exchange_busy_wait(phba); 13501 13502 /* per-phba callback de-registration for hotplug event */ 13503 if (phba->pport) 13504 lpfc_cpuhp_remove(phba); 13505 13506 /* Disable PCI subsystem interrupt */ 13507 lpfc_sli4_disable_intr(phba); 13508 13509 /* Disable SR-IOV if enabled */ 13510 if (phba->cfg_sriov_nr_virtfn) 13511 pci_disable_sriov(pdev); 13512 13513 /* Stop kthread signal shall trigger work_done one more time */ 13514 kthread_stop(phba->worker_thread); 13515 13516 /* Disable FW logging to host memory */ 13517 lpfc_ras_stop_fwlog(phba); 13518 13519 /* Reset SLI4 HBA FCoE function */ 13520 lpfc_pci_function_reset(phba); 13521 13522 /* release all queue allocated resources. */ 13523 lpfc_sli4_queue_destroy(phba); 13524 13525 /* Free RAS DMA memory */ 13526 if (phba->ras_fwlog.ras_enabled) 13527 lpfc_sli4_ras_dma_free(phba); 13528 13529 /* Stop the SLI4 device port */ 13530 if (phba->pport) 13531 phba->pport->work_port_events = 0; 13532 } 13533 13534 static uint32_t 13535 lpfc_cgn_crc32(uint32_t crc, u8 byte) 13536 { 13537 uint32_t msb = 0; 13538 uint32_t bit; 13539 13540 for (bit = 0; bit < 8; bit++) { 13541 msb = (crc >> 31) & 1; 13542 crc <<= 1; 13543 13544 if (msb ^ (byte & 1)) { 13545 crc ^= LPFC_CGN_CRC32_MAGIC_NUMBER; 13546 crc |= 1; 13547 } 13548 byte >>= 1; 13549 } 13550 return crc; 13551 } 13552 13553 static uint32_t 13554 lpfc_cgn_reverse_bits(uint32_t wd) 13555 { 13556 uint32_t result = 0; 13557 uint32_t i; 13558 13559 for (i = 0; i < 32; i++) { 13560 result <<= 1; 13561 result |= (1 & (wd >> i)); 13562 } 13563 return result; 13564 } 13565 13566 /* 13567 * The routine corresponds with the algorithm the HBA firmware 13568 * uses to validate the data integrity. 13569 */ 13570 uint32_t 13571 lpfc_cgn_calc_crc32(void *ptr, uint32_t byteLen, uint32_t crc) 13572 { 13573 uint32_t i; 13574 uint32_t result; 13575 uint8_t *data = (uint8_t *)ptr; 13576 13577 for (i = 0; i < byteLen; ++i) 13578 crc = lpfc_cgn_crc32(crc, data[i]); 13579 13580 result = ~lpfc_cgn_reverse_bits(crc); 13581 return result; 13582 } 13583 13584 void 13585 lpfc_init_congestion_buf(struct lpfc_hba *phba) 13586 { 13587 struct lpfc_cgn_info *cp; 13588 struct timespec64 cmpl_time; 13589 struct tm broken; 13590 uint16_t size; 13591 uint32_t crc; 13592 13593 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT, 13594 "6235 INIT Congestion Buffer %p\n", phba->cgn_i); 13595 13596 if (!phba->cgn_i) 13597 return; 13598 cp = (struct lpfc_cgn_info *)phba->cgn_i->virt; 13599 13600 atomic_set(&phba->cgn_fabric_warn_cnt, 0); 13601 atomic_set(&phba->cgn_fabric_alarm_cnt, 0); 13602 atomic_set(&phba->cgn_sync_alarm_cnt, 0); 13603 atomic_set(&phba->cgn_sync_warn_cnt, 0); 13604 13605 atomic_set(&phba->cgn_driver_evt_cnt, 0); 13606 atomic_set(&phba->cgn_latency_evt_cnt, 0); 13607 atomic64_set(&phba->cgn_latency_evt, 0); 13608 phba->cgn_evt_minute = 0; 13609 phba->hba_flag &= ~HBA_CGN_DAY_WRAP; 13610 13611 memset(cp, 0xff, offsetof(struct lpfc_cgn_info, cgn_stat)); 13612 cp->cgn_info_size = cpu_to_le16(LPFC_CGN_INFO_SZ); 13613 cp->cgn_info_version = LPFC_CGN_INFO_V3; 13614 13615 /* cgn parameters */ 13616 cp->cgn_info_mode = phba->cgn_p.cgn_param_mode; 13617 cp->cgn_info_level0 = phba->cgn_p.cgn_param_level0; 13618 cp->cgn_info_level1 = phba->cgn_p.cgn_param_level1; 13619 cp->cgn_info_level2 = phba->cgn_p.cgn_param_level2; 13620 13621 ktime_get_real_ts64(&cmpl_time); 13622 time64_to_tm(cmpl_time.tv_sec, 0, &broken); 13623 13624 cp->cgn_info_month = broken.tm_mon + 1; 13625 cp->cgn_info_day = broken.tm_mday; 13626 cp->cgn_info_year = broken.tm_year - 100; /* relative to 2000 */ 13627 cp->cgn_info_hour = broken.tm_hour; 13628 cp->cgn_info_minute = broken.tm_min; 13629 cp->cgn_info_second = broken.tm_sec; 13630 13631 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT | LOG_INIT, 13632 "2643 CGNInfo Init: Start Time " 13633 "%d/%d/%d %d:%d:%d\n", 13634 cp->cgn_info_day, cp->cgn_info_month, 13635 cp->cgn_info_year, cp->cgn_info_hour, 13636 cp->cgn_info_minute, cp->cgn_info_second); 13637 13638 /* Fill in default LUN qdepth */ 13639 if (phba->pport) { 13640 size = (uint16_t)(phba->pport->cfg_lun_queue_depth); 13641 cp->cgn_lunq = cpu_to_le16(size); 13642 } 13643 13644 /* last used Index initialized to 0xff already */ 13645 13646 cp->cgn_warn_freq = cpu_to_le16(LPFC_FPIN_INIT_FREQ); 13647 cp->cgn_alarm_freq = cpu_to_le16(LPFC_FPIN_INIT_FREQ); 13648 crc = lpfc_cgn_calc_crc32(cp, LPFC_CGN_INFO_SZ, LPFC_CGN_CRC32_SEED); 13649 cp->cgn_info_crc = cpu_to_le32(crc); 13650 13651 phba->cgn_evt_timestamp = jiffies + 13652 msecs_to_jiffies(LPFC_CGN_TIMER_TO_MIN); 13653 } 13654 13655 void 13656 lpfc_init_congestion_stat(struct lpfc_hba *phba) 13657 { 13658 struct lpfc_cgn_info *cp; 13659 struct timespec64 cmpl_time; 13660 struct tm broken; 13661 uint32_t crc; 13662 13663 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT, 13664 "6236 INIT Congestion Stat %p\n", phba->cgn_i); 13665 13666 if (!phba->cgn_i) 13667 return; 13668 13669 cp = (struct lpfc_cgn_info *)phba->cgn_i->virt; 13670 memset(&cp->cgn_stat, 0, sizeof(cp->cgn_stat)); 13671 13672 ktime_get_real_ts64(&cmpl_time); 13673 time64_to_tm(cmpl_time.tv_sec, 0, &broken); 13674 13675 cp->cgn_stat_month = broken.tm_mon + 1; 13676 cp->cgn_stat_day = broken.tm_mday; 13677 cp->cgn_stat_year = broken.tm_year - 100; /* relative to 2000 */ 13678 cp->cgn_stat_hour = broken.tm_hour; 13679 cp->cgn_stat_minute = broken.tm_min; 13680 13681 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT | LOG_INIT, 13682 "2647 CGNstat Init: Start Time " 13683 "%d/%d/%d %d:%d\n", 13684 cp->cgn_stat_day, cp->cgn_stat_month, 13685 cp->cgn_stat_year, cp->cgn_stat_hour, 13686 cp->cgn_stat_minute); 13687 13688 crc = lpfc_cgn_calc_crc32(cp, LPFC_CGN_INFO_SZ, LPFC_CGN_CRC32_SEED); 13689 cp->cgn_info_crc = cpu_to_le32(crc); 13690 } 13691 13692 /** 13693 * __lpfc_reg_congestion_buf - register congestion info buffer with HBA 13694 * @phba: Pointer to hba context object. 13695 * @reg: flag to determine register or unregister. 13696 */ 13697 static int 13698 __lpfc_reg_congestion_buf(struct lpfc_hba *phba, int reg) 13699 { 13700 struct lpfc_mbx_reg_congestion_buf *reg_congestion_buf; 13701 union lpfc_sli4_cfg_shdr *shdr; 13702 uint32_t shdr_status, shdr_add_status; 13703 LPFC_MBOXQ_t *mboxq; 13704 int length, rc; 13705 13706 if (!phba->cgn_i) 13707 return -ENXIO; 13708 13709 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 13710 if (!mboxq) { 13711 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX, 13712 "2641 REG_CONGESTION_BUF mbox allocation fail: " 13713 "HBA state x%x reg %d\n", 13714 phba->pport->port_state, reg); 13715 return -ENOMEM; 13716 } 13717 13718 length = (sizeof(struct lpfc_mbx_reg_congestion_buf) - 13719 sizeof(struct lpfc_sli4_cfg_mhdr)); 13720 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON, 13721 LPFC_MBOX_OPCODE_REG_CONGESTION_BUF, length, 13722 LPFC_SLI4_MBX_EMBED); 13723 reg_congestion_buf = &mboxq->u.mqe.un.reg_congestion_buf; 13724 bf_set(lpfc_mbx_reg_cgn_buf_type, reg_congestion_buf, 1); 13725 if (reg > 0) 13726 bf_set(lpfc_mbx_reg_cgn_buf_cnt, reg_congestion_buf, 1); 13727 else 13728 bf_set(lpfc_mbx_reg_cgn_buf_cnt, reg_congestion_buf, 0); 13729 reg_congestion_buf->length = sizeof(struct lpfc_cgn_info); 13730 reg_congestion_buf->addr_lo = 13731 putPaddrLow(phba->cgn_i->phys); 13732 reg_congestion_buf->addr_hi = 13733 putPaddrHigh(phba->cgn_i->phys); 13734 13735 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); 13736 shdr = (union lpfc_sli4_cfg_shdr *) 13737 &mboxq->u.mqe.un.sli4_config.header.cfg_shdr; 13738 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response); 13739 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, 13740 &shdr->response); 13741 mempool_free(mboxq, phba->mbox_mem_pool); 13742 if (shdr_status || shdr_add_status || rc) { 13743 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 13744 "2642 REG_CONGESTION_BUF mailbox " 13745 "failed with status x%x add_status x%x," 13746 " mbx status x%x reg %d\n", 13747 shdr_status, shdr_add_status, rc, reg); 13748 return -ENXIO; 13749 } 13750 return 0; 13751 } 13752 13753 int 13754 lpfc_unreg_congestion_buf(struct lpfc_hba *phba) 13755 { 13756 lpfc_cmf_stop(phba); 13757 return __lpfc_reg_congestion_buf(phba, 0); 13758 } 13759 13760 int 13761 lpfc_reg_congestion_buf(struct lpfc_hba *phba) 13762 { 13763 return __lpfc_reg_congestion_buf(phba, 1); 13764 } 13765 13766 /** 13767 * lpfc_get_sli4_parameters - Get the SLI4 Config PARAMETERS. 13768 * @phba: Pointer to HBA context object. 13769 * @mboxq: Pointer to the mailboxq memory for the mailbox command response. 13770 * 13771 * This function is called in the SLI4 code path to read the port's 13772 * sli4 capabilities. 13773 * 13774 * This function may be be called from any context that can block-wait 13775 * for the completion. The expectation is that this routine is called 13776 * typically from probe_one or from the online routine. 13777 **/ 13778 int 13779 lpfc_get_sli4_parameters(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq) 13780 { 13781 int rc; 13782 struct lpfc_mqe *mqe = &mboxq->u.mqe; 13783 struct lpfc_pc_sli4_params *sli4_params; 13784 uint32_t mbox_tmo; 13785 int length; 13786 bool exp_wqcq_pages = true; 13787 struct lpfc_sli4_parameters *mbx_sli4_parameters; 13788 13789 /* 13790 * By default, the driver assumes the SLI4 port requires RPI 13791 * header postings. The SLI4_PARAM response will correct this 13792 * assumption. 13793 */ 13794 phba->sli4_hba.rpi_hdrs_in_use = 1; 13795 13796 /* Read the port's SLI4 Config Parameters */ 13797 length = (sizeof(struct lpfc_mbx_get_sli4_parameters) - 13798 sizeof(struct lpfc_sli4_cfg_mhdr)); 13799 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON, 13800 LPFC_MBOX_OPCODE_GET_SLI4_PARAMETERS, 13801 length, LPFC_SLI4_MBX_EMBED); 13802 if (!phba->sli4_hba.intr_enable) 13803 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); 13804 else { 13805 mbox_tmo = lpfc_mbox_tmo_val(phba, mboxq); 13806 rc = lpfc_sli_issue_mbox_wait(phba, mboxq, mbox_tmo); 13807 } 13808 if (unlikely(rc)) 13809 return rc; 13810 sli4_params = &phba->sli4_hba.pc_sli4_params; 13811 mbx_sli4_parameters = &mqe->un.get_sli4_parameters.sli4_parameters; 13812 sli4_params->if_type = bf_get(cfg_if_type, mbx_sli4_parameters); 13813 sli4_params->sli_rev = bf_get(cfg_sli_rev, mbx_sli4_parameters); 13814 sli4_params->sli_family = bf_get(cfg_sli_family, mbx_sli4_parameters); 13815 sli4_params->featurelevel_1 = bf_get(cfg_sli_hint_1, 13816 mbx_sli4_parameters); 13817 sli4_params->featurelevel_2 = bf_get(cfg_sli_hint_2, 13818 mbx_sli4_parameters); 13819 if (bf_get(cfg_phwq, mbx_sli4_parameters)) 13820 phba->sli3_options |= LPFC_SLI4_PHWQ_ENABLED; 13821 else 13822 phba->sli3_options &= ~LPFC_SLI4_PHWQ_ENABLED; 13823 sli4_params->sge_supp_len = mbx_sli4_parameters->sge_supp_len; 13824 sli4_params->loopbk_scope = bf_get(cfg_loopbk_scope, 13825 mbx_sli4_parameters); 13826 sli4_params->oas_supported = bf_get(cfg_oas, mbx_sli4_parameters); 13827 sli4_params->cqv = bf_get(cfg_cqv, mbx_sli4_parameters); 13828 sli4_params->mqv = bf_get(cfg_mqv, mbx_sli4_parameters); 13829 sli4_params->wqv = bf_get(cfg_wqv, mbx_sli4_parameters); 13830 sli4_params->rqv = bf_get(cfg_rqv, mbx_sli4_parameters); 13831 sli4_params->eqav = bf_get(cfg_eqav, mbx_sli4_parameters); 13832 sli4_params->cqav = bf_get(cfg_cqav, mbx_sli4_parameters); 13833 sli4_params->wqsize = bf_get(cfg_wqsize, mbx_sli4_parameters); 13834 sli4_params->bv1s = bf_get(cfg_bv1s, mbx_sli4_parameters); 13835 sli4_params->pls = bf_get(cfg_pvl, mbx_sli4_parameters); 13836 sli4_params->sgl_pages_max = bf_get(cfg_sgl_page_cnt, 13837 mbx_sli4_parameters); 13838 sli4_params->wqpcnt = bf_get(cfg_wqpcnt, mbx_sli4_parameters); 13839 sli4_params->sgl_pp_align = bf_get(cfg_sgl_pp_align, 13840 mbx_sli4_parameters); 13841 phba->sli4_hba.extents_in_use = bf_get(cfg_ext, mbx_sli4_parameters); 13842 phba->sli4_hba.rpi_hdrs_in_use = bf_get(cfg_hdrr, mbx_sli4_parameters); 13843 sli4_params->mi_cap = bf_get(cfg_mi_ver, mbx_sli4_parameters); 13844 13845 /* Check for Extended Pre-Registered SGL support */ 13846 phba->cfg_xpsgl = bf_get(cfg_xpsgl, mbx_sli4_parameters); 13847 13848 /* Check for firmware nvme support */ 13849 rc = (bf_get(cfg_nvme, mbx_sli4_parameters) && 13850 bf_get(cfg_xib, mbx_sli4_parameters)); 13851 13852 if (rc) { 13853 /* Save this to indicate the Firmware supports NVME */ 13854 sli4_params->nvme = 1; 13855 13856 /* Firmware NVME support, check driver FC4 NVME support */ 13857 if (phba->cfg_enable_fc4_type == LPFC_ENABLE_FCP) { 13858 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_NVME, 13859 "6133 Disabling NVME support: " 13860 "FC4 type not supported: x%x\n", 13861 phba->cfg_enable_fc4_type); 13862 goto fcponly; 13863 } 13864 } else { 13865 /* No firmware NVME support, check driver FC4 NVME support */ 13866 sli4_params->nvme = 0; 13867 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 13868 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_NVME, 13869 "6101 Disabling NVME support: Not " 13870 "supported by firmware (%d %d) x%x\n", 13871 bf_get(cfg_nvme, mbx_sli4_parameters), 13872 bf_get(cfg_xib, mbx_sli4_parameters), 13873 phba->cfg_enable_fc4_type); 13874 fcponly: 13875 phba->nvmet_support = 0; 13876 phba->cfg_nvmet_mrq = 0; 13877 phba->cfg_nvme_seg_cnt = 0; 13878 13879 /* If no FC4 type support, move to just SCSI support */ 13880 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP)) 13881 return -ENODEV; 13882 phba->cfg_enable_fc4_type = LPFC_ENABLE_FCP; 13883 } 13884 } 13885 13886 /* If the NVME FC4 type is enabled, scale the sg_seg_cnt to 13887 * accommodate 512K and 1M IOs in a single nvme buf. 13888 */ 13889 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) 13890 phba->cfg_sg_seg_cnt = LPFC_MAX_NVME_SEG_CNT; 13891 13892 /* Enable embedded Payload BDE if support is indicated */ 13893 if (bf_get(cfg_pbde, mbx_sli4_parameters)) 13894 phba->cfg_enable_pbde = 1; 13895 else 13896 phba->cfg_enable_pbde = 0; 13897 13898 /* 13899 * To support Suppress Response feature we must satisfy 3 conditions. 13900 * lpfc_suppress_rsp module parameter must be set (default). 13901 * In SLI4-Parameters Descriptor: 13902 * Extended Inline Buffers (XIB) must be supported. 13903 * Suppress Response IU Not Supported (SRIUNS) must NOT be supported 13904 * (double negative). 13905 */ 13906 if (phba->cfg_suppress_rsp && bf_get(cfg_xib, mbx_sli4_parameters) && 13907 !(bf_get(cfg_nosr, mbx_sli4_parameters))) 13908 phba->sli.sli_flag |= LPFC_SLI_SUPPRESS_RSP; 13909 else 13910 phba->cfg_suppress_rsp = 0; 13911 13912 if (bf_get(cfg_eqdr, mbx_sli4_parameters)) 13913 phba->sli.sli_flag |= LPFC_SLI_USE_EQDR; 13914 13915 /* Make sure that sge_supp_len can be handled by the driver */ 13916 if (sli4_params->sge_supp_len > LPFC_MAX_SGE_SIZE) 13917 sli4_params->sge_supp_len = LPFC_MAX_SGE_SIZE; 13918 13919 /* 13920 * Check whether the adapter supports an embedded copy of the 13921 * FCP CMD IU within the WQE for FCP_Ixxx commands. In order 13922 * to use this option, 128-byte WQEs must be used. 13923 */ 13924 if (bf_get(cfg_ext_embed_cb, mbx_sli4_parameters)) 13925 phba->fcp_embed_io = 1; 13926 else 13927 phba->fcp_embed_io = 0; 13928 13929 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_NVME, 13930 "6422 XIB %d PBDE %d: FCP %d NVME %d %d %d\n", 13931 bf_get(cfg_xib, mbx_sli4_parameters), 13932 phba->cfg_enable_pbde, 13933 phba->fcp_embed_io, sli4_params->nvme, 13934 phba->cfg_nvme_embed_cmd, phba->cfg_suppress_rsp); 13935 13936 if ((bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) == 13937 LPFC_SLI_INTF_IF_TYPE_2) && 13938 (bf_get(lpfc_sli_intf_sli_family, &phba->sli4_hba.sli_intf) == 13939 LPFC_SLI_INTF_FAMILY_LNCR_A0)) 13940 exp_wqcq_pages = false; 13941 13942 if ((bf_get(cfg_cqpsize, mbx_sli4_parameters) & LPFC_CQ_16K_PAGE_SZ) && 13943 (bf_get(cfg_wqpsize, mbx_sli4_parameters) & LPFC_WQ_16K_PAGE_SZ) && 13944 exp_wqcq_pages && 13945 (sli4_params->wqsize & LPFC_WQ_SZ128_SUPPORT)) 13946 phba->enab_exp_wqcq_pages = 1; 13947 else 13948 phba->enab_exp_wqcq_pages = 0; 13949 /* 13950 * Check if the SLI port supports MDS Diagnostics 13951 */ 13952 if (bf_get(cfg_mds_diags, mbx_sli4_parameters)) 13953 phba->mds_diags_support = 1; 13954 else 13955 phba->mds_diags_support = 0; 13956 13957 /* 13958 * Check if the SLI port supports NSLER 13959 */ 13960 if (bf_get(cfg_nsler, mbx_sli4_parameters)) 13961 phba->nsler = 1; 13962 else 13963 phba->nsler = 0; 13964 13965 return 0; 13966 } 13967 13968 /** 13969 * lpfc_pci_probe_one_s3 - PCI probe func to reg SLI-3 device to PCI subsystem. 13970 * @pdev: pointer to PCI device 13971 * @pid: pointer to PCI device identifier 13972 * 13973 * This routine is to be called to attach a device with SLI-3 interface spec 13974 * to the PCI subsystem. When an Emulex HBA with SLI-3 interface spec is 13975 * presented on PCI bus, the kernel PCI subsystem looks at PCI device-specific 13976 * information of the device and driver to see if the driver state that it can 13977 * support this kind of device. If the match is successful, the driver core 13978 * invokes this routine. If this routine determines it can claim the HBA, it 13979 * does all the initialization that it needs to do to handle the HBA properly. 13980 * 13981 * Return code 13982 * 0 - driver can claim the device 13983 * negative value - driver can not claim the device 13984 **/ 13985 static int 13986 lpfc_pci_probe_one_s3(struct pci_dev *pdev, const struct pci_device_id *pid) 13987 { 13988 struct lpfc_hba *phba; 13989 struct lpfc_vport *vport = NULL; 13990 struct Scsi_Host *shost = NULL; 13991 int error; 13992 uint32_t cfg_mode, intr_mode; 13993 13994 /* Allocate memory for HBA structure */ 13995 phba = lpfc_hba_alloc(pdev); 13996 if (!phba) 13997 return -ENOMEM; 13998 13999 /* Perform generic PCI device enabling operation */ 14000 error = lpfc_enable_pci_dev(phba); 14001 if (error) 14002 goto out_free_phba; 14003 14004 /* Set up SLI API function jump table for PCI-device group-0 HBAs */ 14005 error = lpfc_api_table_setup(phba, LPFC_PCI_DEV_LP); 14006 if (error) 14007 goto out_disable_pci_dev; 14008 14009 /* Set up SLI-3 specific device PCI memory space */ 14010 error = lpfc_sli_pci_mem_setup(phba); 14011 if (error) { 14012 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 14013 "1402 Failed to set up pci memory space.\n"); 14014 goto out_disable_pci_dev; 14015 } 14016 14017 /* Set up SLI-3 specific device driver resources */ 14018 error = lpfc_sli_driver_resource_setup(phba); 14019 if (error) { 14020 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 14021 "1404 Failed to set up driver resource.\n"); 14022 goto out_unset_pci_mem_s3; 14023 } 14024 14025 /* Initialize and populate the iocb list per host */ 14026 14027 error = lpfc_init_iocb_list(phba, LPFC_IOCB_LIST_CNT); 14028 if (error) { 14029 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 14030 "1405 Failed to initialize iocb list.\n"); 14031 goto out_unset_driver_resource_s3; 14032 } 14033 14034 /* Set up common device driver resources */ 14035 error = lpfc_setup_driver_resource_phase2(phba); 14036 if (error) { 14037 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 14038 "1406 Failed to set up driver resource.\n"); 14039 goto out_free_iocb_list; 14040 } 14041 14042 /* Get the default values for Model Name and Description */ 14043 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc); 14044 14045 /* Create SCSI host to the physical port */ 14046 error = lpfc_create_shost(phba); 14047 if (error) { 14048 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 14049 "1407 Failed to create scsi host.\n"); 14050 goto out_unset_driver_resource; 14051 } 14052 14053 /* Configure sysfs attributes */ 14054 vport = phba->pport; 14055 error = lpfc_alloc_sysfs_attr(vport); 14056 if (error) { 14057 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 14058 "1476 Failed to allocate sysfs attr\n"); 14059 goto out_destroy_shost; 14060 } 14061 14062 shost = lpfc_shost_from_vport(vport); /* save shost for error cleanup */ 14063 /* Now, trying to enable interrupt and bring up the device */ 14064 cfg_mode = phba->cfg_use_msi; 14065 while (true) { 14066 /* Put device to a known state before enabling interrupt */ 14067 lpfc_stop_port(phba); 14068 /* Configure and enable interrupt */ 14069 intr_mode = lpfc_sli_enable_intr(phba, cfg_mode); 14070 if (intr_mode == LPFC_INTR_ERROR) { 14071 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14072 "0431 Failed to enable interrupt.\n"); 14073 error = -ENODEV; 14074 goto out_free_sysfs_attr; 14075 } 14076 /* SLI-3 HBA setup */ 14077 if (lpfc_sli_hba_setup(phba)) { 14078 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14079 "1477 Failed to set up hba\n"); 14080 error = -ENODEV; 14081 goto out_remove_device; 14082 } 14083 14084 /* Wait 50ms for the interrupts of previous mailbox commands */ 14085 msleep(50); 14086 /* Check active interrupts on message signaled interrupts */ 14087 if (intr_mode == 0 || 14088 phba->sli.slistat.sli_intr > LPFC_MSIX_VECTORS) { 14089 /* Log the current active interrupt mode */ 14090 phba->intr_mode = intr_mode; 14091 lpfc_log_intr_mode(phba, intr_mode); 14092 break; 14093 } else { 14094 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 14095 "0447 Configure interrupt mode (%d) " 14096 "failed active interrupt test.\n", 14097 intr_mode); 14098 /* Disable the current interrupt mode */ 14099 lpfc_sli_disable_intr(phba); 14100 /* Try next level of interrupt mode */ 14101 cfg_mode = --intr_mode; 14102 } 14103 } 14104 14105 /* Perform post initialization setup */ 14106 lpfc_post_init_setup(phba); 14107 14108 /* Check if there are static vports to be created. */ 14109 lpfc_create_static_vport(phba); 14110 14111 return 0; 14112 14113 out_remove_device: 14114 lpfc_unset_hba(phba); 14115 out_free_sysfs_attr: 14116 lpfc_free_sysfs_attr(vport); 14117 out_destroy_shost: 14118 lpfc_destroy_shost(phba); 14119 out_unset_driver_resource: 14120 lpfc_unset_driver_resource_phase2(phba); 14121 out_free_iocb_list: 14122 lpfc_free_iocb_list(phba); 14123 out_unset_driver_resource_s3: 14124 lpfc_sli_driver_resource_unset(phba); 14125 out_unset_pci_mem_s3: 14126 lpfc_sli_pci_mem_unset(phba); 14127 out_disable_pci_dev: 14128 lpfc_disable_pci_dev(phba); 14129 if (shost) 14130 scsi_host_put(shost); 14131 out_free_phba: 14132 lpfc_hba_free(phba); 14133 return error; 14134 } 14135 14136 /** 14137 * lpfc_pci_remove_one_s3 - PCI func to unreg SLI-3 device from PCI subsystem. 14138 * @pdev: pointer to PCI device 14139 * 14140 * This routine is to be called to disattach a device with SLI-3 interface 14141 * spec from PCI subsystem. When an Emulex HBA with SLI-3 interface spec is 14142 * removed from PCI bus, it performs all the necessary cleanup for the HBA 14143 * device to be removed from the PCI subsystem properly. 14144 **/ 14145 static void 14146 lpfc_pci_remove_one_s3(struct pci_dev *pdev) 14147 { 14148 struct Scsi_Host *shost = pci_get_drvdata(pdev); 14149 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata; 14150 struct lpfc_vport **vports; 14151 struct lpfc_hba *phba = vport->phba; 14152 int i; 14153 14154 spin_lock_irq(&phba->hbalock); 14155 vport->load_flag |= FC_UNLOADING; 14156 spin_unlock_irq(&phba->hbalock); 14157 14158 lpfc_free_sysfs_attr(vport); 14159 14160 /* Release all the vports against this physical port */ 14161 vports = lpfc_create_vport_work_array(phba); 14162 if (vports != NULL) 14163 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) { 14164 if (vports[i]->port_type == LPFC_PHYSICAL_PORT) 14165 continue; 14166 fc_vport_terminate(vports[i]->fc_vport); 14167 } 14168 lpfc_destroy_vport_work_array(phba, vports); 14169 14170 /* Remove FC host with the physical port */ 14171 fc_remove_host(shost); 14172 scsi_remove_host(shost); 14173 14174 /* Clean up all nodes, mailboxes and IOs. */ 14175 lpfc_cleanup(vport); 14176 14177 /* 14178 * Bring down the SLI Layer. This step disable all interrupts, 14179 * clears the rings, discards all mailbox commands, and resets 14180 * the HBA. 14181 */ 14182 14183 /* HBA interrupt will be disabled after this call */ 14184 lpfc_sli_hba_down(phba); 14185 /* Stop kthread signal shall trigger work_done one more time */ 14186 kthread_stop(phba->worker_thread); 14187 /* Final cleanup of txcmplq and reset the HBA */ 14188 lpfc_sli_brdrestart(phba); 14189 14190 kfree(phba->vpi_bmask); 14191 kfree(phba->vpi_ids); 14192 14193 lpfc_stop_hba_timers(phba); 14194 spin_lock_irq(&phba->port_list_lock); 14195 list_del_init(&vport->listentry); 14196 spin_unlock_irq(&phba->port_list_lock); 14197 14198 lpfc_debugfs_terminate(vport); 14199 14200 /* Disable SR-IOV if enabled */ 14201 if (phba->cfg_sriov_nr_virtfn) 14202 pci_disable_sriov(pdev); 14203 14204 /* Disable interrupt */ 14205 lpfc_sli_disable_intr(phba); 14206 14207 scsi_host_put(shost); 14208 14209 /* 14210 * Call scsi_free before mem_free since scsi bufs are released to their 14211 * corresponding pools here. 14212 */ 14213 lpfc_scsi_free(phba); 14214 lpfc_free_iocb_list(phba); 14215 14216 lpfc_mem_free_all(phba); 14217 14218 dma_free_coherent(&pdev->dev, lpfc_sli_hbq_size(), 14219 phba->hbqslimp.virt, phba->hbqslimp.phys); 14220 14221 /* Free resources associated with SLI2 interface */ 14222 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE, 14223 phba->slim2p.virt, phba->slim2p.phys); 14224 14225 /* unmap adapter SLIM and Control Registers */ 14226 iounmap(phba->ctrl_regs_memmap_p); 14227 iounmap(phba->slim_memmap_p); 14228 14229 lpfc_hba_free(phba); 14230 14231 pci_release_mem_regions(pdev); 14232 pci_disable_device(pdev); 14233 } 14234 14235 /** 14236 * lpfc_pci_suspend_one_s3 - PCI func to suspend SLI-3 device for power mgmnt 14237 * @dev_d: pointer to device 14238 * 14239 * This routine is to be called from the kernel's PCI subsystem to support 14240 * system Power Management (PM) to device with SLI-3 interface spec. When 14241 * PM invokes this method, it quiesces the device by stopping the driver's 14242 * worker thread for the device, turning off device's interrupt and DMA, 14243 * and bring the device offline. Note that as the driver implements the 14244 * minimum PM requirements to a power-aware driver's PM support for the 14245 * suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, FREEZE) 14246 * to the suspend() method call will be treated as SUSPEND and the driver will 14247 * fully reinitialize its device during resume() method call, the driver will 14248 * set device to PCI_D3hot state in PCI config space instead of setting it 14249 * according to the @msg provided by the PM. 14250 * 14251 * Return code 14252 * 0 - driver suspended the device 14253 * Error otherwise 14254 **/ 14255 static int __maybe_unused 14256 lpfc_pci_suspend_one_s3(struct device *dev_d) 14257 { 14258 struct Scsi_Host *shost = dev_get_drvdata(dev_d); 14259 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 14260 14261 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 14262 "0473 PCI device Power Management suspend.\n"); 14263 14264 /* Bring down the device */ 14265 lpfc_offline_prep(phba, LPFC_MBX_WAIT); 14266 lpfc_offline(phba); 14267 kthread_stop(phba->worker_thread); 14268 14269 /* Disable interrupt from device */ 14270 lpfc_sli_disable_intr(phba); 14271 14272 return 0; 14273 } 14274 14275 /** 14276 * lpfc_pci_resume_one_s3 - PCI func to resume SLI-3 device for power mgmnt 14277 * @dev_d: pointer to device 14278 * 14279 * This routine is to be called from the kernel's PCI subsystem to support 14280 * system Power Management (PM) to device with SLI-3 interface spec. When PM 14281 * invokes this method, it restores the device's PCI config space state and 14282 * fully reinitializes the device and brings it online. Note that as the 14283 * driver implements the minimum PM requirements to a power-aware driver's 14284 * PM for suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, 14285 * FREEZE) to the suspend() method call will be treated as SUSPEND and the 14286 * driver will fully reinitialize its device during resume() method call, 14287 * the device will be set to PCI_D0 directly in PCI config space before 14288 * restoring the state. 14289 * 14290 * Return code 14291 * 0 - driver suspended the device 14292 * Error otherwise 14293 **/ 14294 static int __maybe_unused 14295 lpfc_pci_resume_one_s3(struct device *dev_d) 14296 { 14297 struct Scsi_Host *shost = dev_get_drvdata(dev_d); 14298 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 14299 uint32_t intr_mode; 14300 int error; 14301 14302 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 14303 "0452 PCI device Power Management resume.\n"); 14304 14305 /* Startup the kernel thread for this host adapter. */ 14306 phba->worker_thread = kthread_run(lpfc_do_work, phba, 14307 "lpfc_worker_%d", phba->brd_no); 14308 if (IS_ERR(phba->worker_thread)) { 14309 error = PTR_ERR(phba->worker_thread); 14310 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 14311 "0434 PM resume failed to start worker " 14312 "thread: error=x%x.\n", error); 14313 return error; 14314 } 14315 14316 /* Init cpu_map array */ 14317 lpfc_cpu_map_array_init(phba); 14318 /* Init hba_eq_hdl array */ 14319 lpfc_hba_eq_hdl_array_init(phba); 14320 /* Configure and enable interrupt */ 14321 intr_mode = lpfc_sli_enable_intr(phba, phba->intr_mode); 14322 if (intr_mode == LPFC_INTR_ERROR) { 14323 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14324 "0430 PM resume Failed to enable interrupt\n"); 14325 return -EIO; 14326 } else 14327 phba->intr_mode = intr_mode; 14328 14329 /* Restart HBA and bring it online */ 14330 lpfc_sli_brdrestart(phba); 14331 lpfc_online(phba); 14332 14333 /* Log the current active interrupt mode */ 14334 lpfc_log_intr_mode(phba, phba->intr_mode); 14335 14336 return 0; 14337 } 14338 14339 /** 14340 * lpfc_sli_prep_dev_for_recover - Prepare SLI3 device for pci slot recover 14341 * @phba: pointer to lpfc hba data structure. 14342 * 14343 * This routine is called to prepare the SLI3 device for PCI slot recover. It 14344 * aborts all the outstanding SCSI I/Os to the pci device. 14345 **/ 14346 static void 14347 lpfc_sli_prep_dev_for_recover(struct lpfc_hba *phba) 14348 { 14349 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14350 "2723 PCI channel I/O abort preparing for recovery\n"); 14351 14352 /* 14353 * There may be errored I/Os through HBA, abort all I/Os on txcmplq 14354 * and let the SCSI mid-layer to retry them to recover. 14355 */ 14356 lpfc_sli_abort_fcp_rings(phba); 14357 } 14358 14359 /** 14360 * lpfc_sli_prep_dev_for_reset - Prepare SLI3 device for pci slot reset 14361 * @phba: pointer to lpfc hba data structure. 14362 * 14363 * This routine is called to prepare the SLI3 device for PCI slot reset. It 14364 * disables the device interrupt and pci device, and aborts the internal FCP 14365 * pending I/Os. 14366 **/ 14367 static void 14368 lpfc_sli_prep_dev_for_reset(struct lpfc_hba *phba) 14369 { 14370 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14371 "2710 PCI channel disable preparing for reset\n"); 14372 14373 /* Block any management I/Os to the device */ 14374 lpfc_block_mgmt_io(phba, LPFC_MBX_WAIT); 14375 14376 /* Block all SCSI devices' I/Os on the host */ 14377 lpfc_scsi_dev_block(phba); 14378 14379 /* Flush all driver's outstanding SCSI I/Os as we are to reset */ 14380 lpfc_sli_flush_io_rings(phba); 14381 14382 /* stop all timers */ 14383 lpfc_stop_hba_timers(phba); 14384 14385 /* Disable interrupt and pci device */ 14386 lpfc_sli_disable_intr(phba); 14387 pci_disable_device(phba->pcidev); 14388 } 14389 14390 /** 14391 * lpfc_sli_prep_dev_for_perm_failure - Prepare SLI3 dev for pci slot disable 14392 * @phba: pointer to lpfc hba data structure. 14393 * 14394 * This routine is called to prepare the SLI3 device for PCI slot permanently 14395 * disabling. It blocks the SCSI transport layer traffic and flushes the FCP 14396 * pending I/Os. 14397 **/ 14398 static void 14399 lpfc_sli_prep_dev_for_perm_failure(struct lpfc_hba *phba) 14400 { 14401 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14402 "2711 PCI channel permanent disable for failure\n"); 14403 /* Block all SCSI devices' I/Os on the host */ 14404 lpfc_scsi_dev_block(phba); 14405 lpfc_sli4_prep_dev_for_reset(phba); 14406 14407 /* stop all timers */ 14408 lpfc_stop_hba_timers(phba); 14409 14410 /* Clean up all driver's outstanding SCSI I/Os */ 14411 lpfc_sli_flush_io_rings(phba); 14412 } 14413 14414 /** 14415 * lpfc_io_error_detected_s3 - Method for handling SLI-3 device PCI I/O error 14416 * @pdev: pointer to PCI device. 14417 * @state: the current PCI connection state. 14418 * 14419 * This routine is called from the PCI subsystem for I/O error handling to 14420 * device with SLI-3 interface spec. This function is called by the PCI 14421 * subsystem after a PCI bus error affecting this device has been detected. 14422 * When this function is invoked, it will need to stop all the I/Os and 14423 * interrupt(s) to the device. Once that is done, it will return 14424 * PCI_ERS_RESULT_NEED_RESET for the PCI subsystem to perform proper recovery 14425 * as desired. 14426 * 14427 * Return codes 14428 * PCI_ERS_RESULT_CAN_RECOVER - can be recovered with reset_link 14429 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery 14430 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered 14431 **/ 14432 static pci_ers_result_t 14433 lpfc_io_error_detected_s3(struct pci_dev *pdev, pci_channel_state_t state) 14434 { 14435 struct Scsi_Host *shost = pci_get_drvdata(pdev); 14436 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 14437 14438 switch (state) { 14439 case pci_channel_io_normal: 14440 /* Non-fatal error, prepare for recovery */ 14441 lpfc_sli_prep_dev_for_recover(phba); 14442 return PCI_ERS_RESULT_CAN_RECOVER; 14443 case pci_channel_io_frozen: 14444 /* Fatal error, prepare for slot reset */ 14445 lpfc_sli_prep_dev_for_reset(phba); 14446 return PCI_ERS_RESULT_NEED_RESET; 14447 case pci_channel_io_perm_failure: 14448 /* Permanent failure, prepare for device down */ 14449 lpfc_sli_prep_dev_for_perm_failure(phba); 14450 return PCI_ERS_RESULT_DISCONNECT; 14451 default: 14452 /* Unknown state, prepare and request slot reset */ 14453 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14454 "0472 Unknown PCI error state: x%x\n", state); 14455 lpfc_sli_prep_dev_for_reset(phba); 14456 return PCI_ERS_RESULT_NEED_RESET; 14457 } 14458 } 14459 14460 /** 14461 * lpfc_io_slot_reset_s3 - Method for restarting PCI SLI-3 device from scratch. 14462 * @pdev: pointer to PCI device. 14463 * 14464 * This routine is called from the PCI subsystem for error handling to 14465 * device with SLI-3 interface spec. This is called after PCI bus has been 14466 * reset to restart the PCI card from scratch, as if from a cold-boot. 14467 * During the PCI subsystem error recovery, after driver returns 14468 * PCI_ERS_RESULT_NEED_RESET, the PCI subsystem will perform proper error 14469 * recovery and then call this routine before calling the .resume method 14470 * to recover the device. This function will initialize the HBA device, 14471 * enable the interrupt, but it will just put the HBA to offline state 14472 * without passing any I/O traffic. 14473 * 14474 * Return codes 14475 * PCI_ERS_RESULT_RECOVERED - the device has been recovered 14476 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered 14477 */ 14478 static pci_ers_result_t 14479 lpfc_io_slot_reset_s3(struct pci_dev *pdev) 14480 { 14481 struct Scsi_Host *shost = pci_get_drvdata(pdev); 14482 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 14483 struct lpfc_sli *psli = &phba->sli; 14484 uint32_t intr_mode; 14485 14486 dev_printk(KERN_INFO, &pdev->dev, "recovering from a slot reset.\n"); 14487 if (pci_enable_device_mem(pdev)) { 14488 printk(KERN_ERR "lpfc: Cannot re-enable " 14489 "PCI device after reset.\n"); 14490 return PCI_ERS_RESULT_DISCONNECT; 14491 } 14492 14493 pci_restore_state(pdev); 14494 14495 /* 14496 * As the new kernel behavior of pci_restore_state() API call clears 14497 * device saved_state flag, need to save the restored state again. 14498 */ 14499 pci_save_state(pdev); 14500 14501 if (pdev->is_busmaster) 14502 pci_set_master(pdev); 14503 14504 spin_lock_irq(&phba->hbalock); 14505 psli->sli_flag &= ~LPFC_SLI_ACTIVE; 14506 spin_unlock_irq(&phba->hbalock); 14507 14508 /* Configure and enable interrupt */ 14509 intr_mode = lpfc_sli_enable_intr(phba, phba->intr_mode); 14510 if (intr_mode == LPFC_INTR_ERROR) { 14511 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14512 "0427 Cannot re-enable interrupt after " 14513 "slot reset.\n"); 14514 return PCI_ERS_RESULT_DISCONNECT; 14515 } else 14516 phba->intr_mode = intr_mode; 14517 14518 /* Take device offline, it will perform cleanup */ 14519 lpfc_offline_prep(phba, LPFC_MBX_WAIT); 14520 lpfc_offline(phba); 14521 lpfc_sli_brdrestart(phba); 14522 14523 /* Log the current active interrupt mode */ 14524 lpfc_log_intr_mode(phba, phba->intr_mode); 14525 14526 return PCI_ERS_RESULT_RECOVERED; 14527 } 14528 14529 /** 14530 * lpfc_io_resume_s3 - Method for resuming PCI I/O operation on SLI-3 device. 14531 * @pdev: pointer to PCI device 14532 * 14533 * This routine is called from the PCI subsystem for error handling to device 14534 * with SLI-3 interface spec. It is called when kernel error recovery tells 14535 * the lpfc driver that it is ok to resume normal PCI operation after PCI bus 14536 * error recovery. After this call, traffic can start to flow from this device 14537 * again. 14538 */ 14539 static void 14540 lpfc_io_resume_s3(struct pci_dev *pdev) 14541 { 14542 struct Scsi_Host *shost = pci_get_drvdata(pdev); 14543 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 14544 14545 /* Bring device online, it will be no-op for non-fatal error resume */ 14546 lpfc_online(phba); 14547 } 14548 14549 /** 14550 * lpfc_sli4_get_els_iocb_cnt - Calculate the # of ELS IOCBs to reserve 14551 * @phba: pointer to lpfc hba data structure. 14552 * 14553 * returns the number of ELS/CT IOCBs to reserve 14554 **/ 14555 int 14556 lpfc_sli4_get_els_iocb_cnt(struct lpfc_hba *phba) 14557 { 14558 int max_xri = phba->sli4_hba.max_cfg_param.max_xri; 14559 14560 if (phba->sli_rev == LPFC_SLI_REV4) { 14561 if (max_xri <= 100) 14562 return 10; 14563 else if (max_xri <= 256) 14564 return 25; 14565 else if (max_xri <= 512) 14566 return 50; 14567 else if (max_xri <= 1024) 14568 return 100; 14569 else if (max_xri <= 1536) 14570 return 150; 14571 else if (max_xri <= 2048) 14572 return 200; 14573 else 14574 return 250; 14575 } else 14576 return 0; 14577 } 14578 14579 /** 14580 * lpfc_sli4_get_iocb_cnt - Calculate the # of total IOCBs to reserve 14581 * @phba: pointer to lpfc hba data structure. 14582 * 14583 * returns the number of ELS/CT + NVMET IOCBs to reserve 14584 **/ 14585 int 14586 lpfc_sli4_get_iocb_cnt(struct lpfc_hba *phba) 14587 { 14588 int max_xri = lpfc_sli4_get_els_iocb_cnt(phba); 14589 14590 if (phba->nvmet_support) 14591 max_xri += LPFC_NVMET_BUF_POST; 14592 return max_xri; 14593 } 14594 14595 14596 static int 14597 lpfc_log_write_firmware_error(struct lpfc_hba *phba, uint32_t offset, 14598 uint32_t magic_number, uint32_t ftype, uint32_t fid, uint32_t fsize, 14599 const struct firmware *fw) 14600 { 14601 int rc; 14602 u8 sli_family; 14603 14604 sli_family = bf_get(lpfc_sli_intf_sli_family, &phba->sli4_hba.sli_intf); 14605 /* Three cases: (1) FW was not supported on the detected adapter. 14606 * (2) FW update has been locked out administratively. 14607 * (3) Some other error during FW update. 14608 * In each case, an unmaskable message is written to the console 14609 * for admin diagnosis. 14610 */ 14611 if (offset == ADD_STATUS_FW_NOT_SUPPORTED || 14612 (sli_family == LPFC_SLI_INTF_FAMILY_G6 && 14613 magic_number != MAGIC_NUMBER_G6) || 14614 (sli_family == LPFC_SLI_INTF_FAMILY_G7 && 14615 magic_number != MAGIC_NUMBER_G7) || 14616 (sli_family == LPFC_SLI_INTF_FAMILY_G7P && 14617 magic_number != MAGIC_NUMBER_G7P)) { 14618 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14619 "3030 This firmware version is not supported on" 14620 " this HBA model. Device:%x Magic:%x Type:%x " 14621 "ID:%x Size %d %zd\n", 14622 phba->pcidev->device, magic_number, ftype, fid, 14623 fsize, fw->size); 14624 rc = -EINVAL; 14625 } else if (offset == ADD_STATUS_FW_DOWNLOAD_HW_DISABLED) { 14626 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14627 "3021 Firmware downloads have been prohibited " 14628 "by a system configuration setting on " 14629 "Device:%x Magic:%x Type:%x ID:%x Size %d " 14630 "%zd\n", 14631 phba->pcidev->device, magic_number, ftype, fid, 14632 fsize, fw->size); 14633 rc = -EACCES; 14634 } else { 14635 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14636 "3022 FW Download failed. Add Status x%x " 14637 "Device:%x Magic:%x Type:%x ID:%x Size %d " 14638 "%zd\n", 14639 offset, phba->pcidev->device, magic_number, 14640 ftype, fid, fsize, fw->size); 14641 rc = -EIO; 14642 } 14643 return rc; 14644 } 14645 14646 /** 14647 * lpfc_write_firmware - attempt to write a firmware image to the port 14648 * @fw: pointer to firmware image returned from request_firmware. 14649 * @context: pointer to firmware image returned from request_firmware. 14650 * 14651 **/ 14652 static void 14653 lpfc_write_firmware(const struct firmware *fw, void *context) 14654 { 14655 struct lpfc_hba *phba = (struct lpfc_hba *)context; 14656 char fwrev[FW_REV_STR_SIZE]; 14657 struct lpfc_grp_hdr *image; 14658 struct list_head dma_buffer_list; 14659 int i, rc = 0; 14660 struct lpfc_dmabuf *dmabuf, *next; 14661 uint32_t offset = 0, temp_offset = 0; 14662 uint32_t magic_number, ftype, fid, fsize; 14663 14664 /* It can be null in no-wait mode, sanity check */ 14665 if (!fw) { 14666 rc = -ENXIO; 14667 goto out; 14668 } 14669 image = (struct lpfc_grp_hdr *)fw->data; 14670 14671 magic_number = be32_to_cpu(image->magic_number); 14672 ftype = bf_get_be32(lpfc_grp_hdr_file_type, image); 14673 fid = bf_get_be32(lpfc_grp_hdr_id, image); 14674 fsize = be32_to_cpu(image->size); 14675 14676 INIT_LIST_HEAD(&dma_buffer_list); 14677 lpfc_decode_firmware_rev(phba, fwrev, 1); 14678 if (strncmp(fwrev, image->revision, strnlen(image->revision, 16))) { 14679 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14680 "3023 Updating Firmware, Current Version:%s " 14681 "New Version:%s\n", 14682 fwrev, image->revision); 14683 for (i = 0; i < LPFC_MBX_WR_CONFIG_MAX_BDE; i++) { 14684 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), 14685 GFP_KERNEL); 14686 if (!dmabuf) { 14687 rc = -ENOMEM; 14688 goto release_out; 14689 } 14690 dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev, 14691 SLI4_PAGE_SIZE, 14692 &dmabuf->phys, 14693 GFP_KERNEL); 14694 if (!dmabuf->virt) { 14695 kfree(dmabuf); 14696 rc = -ENOMEM; 14697 goto release_out; 14698 } 14699 list_add_tail(&dmabuf->list, &dma_buffer_list); 14700 } 14701 while (offset < fw->size) { 14702 temp_offset = offset; 14703 list_for_each_entry(dmabuf, &dma_buffer_list, list) { 14704 if (temp_offset + SLI4_PAGE_SIZE > fw->size) { 14705 memcpy(dmabuf->virt, 14706 fw->data + temp_offset, 14707 fw->size - temp_offset); 14708 temp_offset = fw->size; 14709 break; 14710 } 14711 memcpy(dmabuf->virt, fw->data + temp_offset, 14712 SLI4_PAGE_SIZE); 14713 temp_offset += SLI4_PAGE_SIZE; 14714 } 14715 rc = lpfc_wr_object(phba, &dma_buffer_list, 14716 (fw->size - offset), &offset); 14717 if (rc) { 14718 rc = lpfc_log_write_firmware_error(phba, offset, 14719 magic_number, 14720 ftype, 14721 fid, 14722 fsize, 14723 fw); 14724 goto release_out; 14725 } 14726 } 14727 rc = offset; 14728 } else 14729 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14730 "3029 Skipped Firmware update, Current " 14731 "Version:%s New Version:%s\n", 14732 fwrev, image->revision); 14733 14734 release_out: 14735 list_for_each_entry_safe(dmabuf, next, &dma_buffer_list, list) { 14736 list_del(&dmabuf->list); 14737 dma_free_coherent(&phba->pcidev->dev, SLI4_PAGE_SIZE, 14738 dmabuf->virt, dmabuf->phys); 14739 kfree(dmabuf); 14740 } 14741 release_firmware(fw); 14742 out: 14743 if (rc < 0) 14744 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14745 "3062 Firmware update error, status %d.\n", rc); 14746 else 14747 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14748 "3024 Firmware update success: size %d.\n", rc); 14749 } 14750 14751 /** 14752 * lpfc_sli4_request_firmware_update - Request linux generic firmware upgrade 14753 * @phba: pointer to lpfc hba data structure. 14754 * @fw_upgrade: which firmware to update. 14755 * 14756 * This routine is called to perform Linux generic firmware upgrade on device 14757 * that supports such feature. 14758 **/ 14759 int 14760 lpfc_sli4_request_firmware_update(struct lpfc_hba *phba, uint8_t fw_upgrade) 14761 { 14762 uint8_t file_name[ELX_MODEL_NAME_SIZE]; 14763 int ret; 14764 const struct firmware *fw; 14765 14766 /* Only supported on SLI4 interface type 2 for now */ 14767 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) < 14768 LPFC_SLI_INTF_IF_TYPE_2) 14769 return -EPERM; 14770 14771 snprintf(file_name, ELX_MODEL_NAME_SIZE, "%s.grp", phba->ModelName); 14772 14773 if (fw_upgrade == INT_FW_UPGRADE) { 14774 ret = request_firmware_nowait(THIS_MODULE, FW_ACTION_UEVENT, 14775 file_name, &phba->pcidev->dev, 14776 GFP_KERNEL, (void *)phba, 14777 lpfc_write_firmware); 14778 } else if (fw_upgrade == RUN_FW_UPGRADE) { 14779 ret = request_firmware(&fw, file_name, &phba->pcidev->dev); 14780 if (!ret) 14781 lpfc_write_firmware(fw, (void *)phba); 14782 } else { 14783 ret = -EINVAL; 14784 } 14785 14786 return ret; 14787 } 14788 14789 /** 14790 * lpfc_pci_probe_one_s4 - PCI probe func to reg SLI-4 device to PCI subsys 14791 * @pdev: pointer to PCI device 14792 * @pid: pointer to PCI device identifier 14793 * 14794 * This routine is called from the kernel's PCI subsystem to device with 14795 * SLI-4 interface spec. When an Emulex HBA with SLI-4 interface spec is 14796 * presented on PCI bus, the kernel PCI subsystem looks at PCI device-specific 14797 * information of the device and driver to see if the driver state that it 14798 * can support this kind of device. If the match is successful, the driver 14799 * core invokes this routine. If this routine determines it can claim the HBA, 14800 * it does all the initialization that it needs to do to handle the HBA 14801 * properly. 14802 * 14803 * Return code 14804 * 0 - driver can claim the device 14805 * negative value - driver can not claim the device 14806 **/ 14807 static int 14808 lpfc_pci_probe_one_s4(struct pci_dev *pdev, const struct pci_device_id *pid) 14809 { 14810 struct lpfc_hba *phba; 14811 struct lpfc_vport *vport = NULL; 14812 struct Scsi_Host *shost = NULL; 14813 int error; 14814 uint32_t cfg_mode, intr_mode; 14815 14816 /* Allocate memory for HBA structure */ 14817 phba = lpfc_hba_alloc(pdev); 14818 if (!phba) 14819 return -ENOMEM; 14820 14821 INIT_LIST_HEAD(&phba->poll_list); 14822 14823 /* Perform generic PCI device enabling operation */ 14824 error = lpfc_enable_pci_dev(phba); 14825 if (error) 14826 goto out_free_phba; 14827 14828 /* Set up SLI API function jump table for PCI-device group-1 HBAs */ 14829 error = lpfc_api_table_setup(phba, LPFC_PCI_DEV_OC); 14830 if (error) 14831 goto out_disable_pci_dev; 14832 14833 /* Set up SLI-4 specific device PCI memory space */ 14834 error = lpfc_sli4_pci_mem_setup(phba); 14835 if (error) { 14836 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 14837 "1410 Failed to set up pci memory space.\n"); 14838 goto out_disable_pci_dev; 14839 } 14840 14841 /* Set up SLI-4 Specific device driver resources */ 14842 error = lpfc_sli4_driver_resource_setup(phba); 14843 if (error) { 14844 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 14845 "1412 Failed to set up driver resource.\n"); 14846 goto out_unset_pci_mem_s4; 14847 } 14848 14849 INIT_LIST_HEAD(&phba->active_rrq_list); 14850 INIT_LIST_HEAD(&phba->fcf.fcf_pri_list); 14851 14852 /* Set up common device driver resources */ 14853 error = lpfc_setup_driver_resource_phase2(phba); 14854 if (error) { 14855 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 14856 "1414 Failed to set up driver resource.\n"); 14857 goto out_unset_driver_resource_s4; 14858 } 14859 14860 /* Get the default values for Model Name and Description */ 14861 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc); 14862 14863 /* Now, trying to enable interrupt and bring up the device */ 14864 cfg_mode = phba->cfg_use_msi; 14865 14866 /* Put device to a known state before enabling interrupt */ 14867 phba->pport = NULL; 14868 lpfc_stop_port(phba); 14869 14870 /* Init cpu_map array */ 14871 lpfc_cpu_map_array_init(phba); 14872 14873 /* Init hba_eq_hdl array */ 14874 lpfc_hba_eq_hdl_array_init(phba); 14875 14876 /* Configure and enable interrupt */ 14877 intr_mode = lpfc_sli4_enable_intr(phba, cfg_mode); 14878 if (intr_mode == LPFC_INTR_ERROR) { 14879 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14880 "0426 Failed to enable interrupt.\n"); 14881 error = -ENODEV; 14882 goto out_unset_driver_resource; 14883 } 14884 /* Default to single EQ for non-MSI-X */ 14885 if (phba->intr_type != MSIX) { 14886 phba->cfg_irq_chann = 1; 14887 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 14888 if (phba->nvmet_support) 14889 phba->cfg_nvmet_mrq = 1; 14890 } 14891 } 14892 lpfc_cpu_affinity_check(phba, phba->cfg_irq_chann); 14893 14894 /* Create SCSI host to the physical port */ 14895 error = lpfc_create_shost(phba); 14896 if (error) { 14897 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 14898 "1415 Failed to create scsi host.\n"); 14899 goto out_disable_intr; 14900 } 14901 vport = phba->pport; 14902 shost = lpfc_shost_from_vport(vport); /* save shost for error cleanup */ 14903 14904 /* Configure sysfs attributes */ 14905 error = lpfc_alloc_sysfs_attr(vport); 14906 if (error) { 14907 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 14908 "1416 Failed to allocate sysfs attr\n"); 14909 goto out_destroy_shost; 14910 } 14911 14912 /* Set up SLI-4 HBA */ 14913 if (lpfc_sli4_hba_setup(phba)) { 14914 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14915 "1421 Failed to set up hba\n"); 14916 error = -ENODEV; 14917 goto out_free_sysfs_attr; 14918 } 14919 14920 /* Log the current active interrupt mode */ 14921 phba->intr_mode = intr_mode; 14922 lpfc_log_intr_mode(phba, intr_mode); 14923 14924 /* Perform post initialization setup */ 14925 lpfc_post_init_setup(phba); 14926 14927 /* NVME support in FW earlier in the driver load corrects the 14928 * FC4 type making a check for nvme_support unnecessary. 14929 */ 14930 if (phba->nvmet_support == 0) { 14931 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 14932 /* Create NVME binding with nvme_fc_transport. This 14933 * ensures the vport is initialized. If the localport 14934 * create fails, it should not unload the driver to 14935 * support field issues. 14936 */ 14937 error = lpfc_nvme_create_localport(vport); 14938 if (error) { 14939 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14940 "6004 NVME registration " 14941 "failed, error x%x\n", 14942 error); 14943 } 14944 } 14945 } 14946 14947 /* check for firmware upgrade or downgrade */ 14948 if (phba->cfg_request_firmware_upgrade) 14949 lpfc_sli4_request_firmware_update(phba, INT_FW_UPGRADE); 14950 14951 /* Check if there are static vports to be created. */ 14952 lpfc_create_static_vport(phba); 14953 14954 timer_setup(&phba->cpuhp_poll_timer, lpfc_sli4_poll_hbtimer, 0); 14955 cpuhp_state_add_instance_nocalls(lpfc_cpuhp_state, &phba->cpuhp); 14956 14957 return 0; 14958 14959 out_free_sysfs_attr: 14960 lpfc_free_sysfs_attr(vport); 14961 out_destroy_shost: 14962 lpfc_destroy_shost(phba); 14963 out_disable_intr: 14964 lpfc_sli4_disable_intr(phba); 14965 out_unset_driver_resource: 14966 lpfc_unset_driver_resource_phase2(phba); 14967 out_unset_driver_resource_s4: 14968 lpfc_sli4_driver_resource_unset(phba); 14969 out_unset_pci_mem_s4: 14970 lpfc_sli4_pci_mem_unset(phba); 14971 out_disable_pci_dev: 14972 lpfc_disable_pci_dev(phba); 14973 if (shost) 14974 scsi_host_put(shost); 14975 out_free_phba: 14976 lpfc_hba_free(phba); 14977 return error; 14978 } 14979 14980 /** 14981 * lpfc_pci_remove_one_s4 - PCI func to unreg SLI-4 device from PCI subsystem 14982 * @pdev: pointer to PCI device 14983 * 14984 * This routine is called from the kernel's PCI subsystem to device with 14985 * SLI-4 interface spec. When an Emulex HBA with SLI-4 interface spec is 14986 * removed from PCI bus, it performs all the necessary cleanup for the HBA 14987 * device to be removed from the PCI subsystem properly. 14988 **/ 14989 static void 14990 lpfc_pci_remove_one_s4(struct pci_dev *pdev) 14991 { 14992 struct Scsi_Host *shost = pci_get_drvdata(pdev); 14993 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata; 14994 struct lpfc_vport **vports; 14995 struct lpfc_hba *phba = vport->phba; 14996 int i; 14997 14998 /* Mark the device unloading flag */ 14999 spin_lock_irq(&phba->hbalock); 15000 vport->load_flag |= FC_UNLOADING; 15001 spin_unlock_irq(&phba->hbalock); 15002 if (phba->cgn_i) 15003 lpfc_unreg_congestion_buf(phba); 15004 15005 lpfc_free_sysfs_attr(vport); 15006 15007 /* Release all the vports against this physical port */ 15008 vports = lpfc_create_vport_work_array(phba); 15009 if (vports != NULL) 15010 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) { 15011 if (vports[i]->port_type == LPFC_PHYSICAL_PORT) 15012 continue; 15013 fc_vport_terminate(vports[i]->fc_vport); 15014 } 15015 lpfc_destroy_vport_work_array(phba, vports); 15016 15017 /* Remove FC host with the physical port */ 15018 fc_remove_host(shost); 15019 scsi_remove_host(shost); 15020 15021 /* Perform ndlp cleanup on the physical port. The nvme and nvmet 15022 * localports are destroyed after to cleanup all transport memory. 15023 */ 15024 lpfc_cleanup(vport); 15025 lpfc_nvmet_destroy_targetport(phba); 15026 lpfc_nvme_destroy_localport(vport); 15027 15028 /* De-allocate multi-XRI pools */ 15029 if (phba->cfg_xri_rebalancing) 15030 lpfc_destroy_multixri_pools(phba); 15031 15032 /* 15033 * Bring down the SLI Layer. This step disables all interrupts, 15034 * clears the rings, discards all mailbox commands, and resets 15035 * the HBA FCoE function. 15036 */ 15037 lpfc_debugfs_terminate(vport); 15038 15039 lpfc_stop_hba_timers(phba); 15040 spin_lock_irq(&phba->port_list_lock); 15041 list_del_init(&vport->listentry); 15042 spin_unlock_irq(&phba->port_list_lock); 15043 15044 /* Perform scsi free before driver resource_unset since scsi 15045 * buffers are released to their corresponding pools here. 15046 */ 15047 lpfc_io_free(phba); 15048 lpfc_free_iocb_list(phba); 15049 lpfc_sli4_hba_unset(phba); 15050 15051 lpfc_unset_driver_resource_phase2(phba); 15052 lpfc_sli4_driver_resource_unset(phba); 15053 15054 /* Unmap adapter Control and Doorbell registers */ 15055 lpfc_sli4_pci_mem_unset(phba); 15056 15057 /* Release PCI resources and disable device's PCI function */ 15058 scsi_host_put(shost); 15059 lpfc_disable_pci_dev(phba); 15060 15061 /* Finally, free the driver's device data structure */ 15062 lpfc_hba_free(phba); 15063 15064 return; 15065 } 15066 15067 /** 15068 * lpfc_pci_suspend_one_s4 - PCI func to suspend SLI-4 device for power mgmnt 15069 * @dev_d: pointer to device 15070 * 15071 * This routine is called from the kernel's PCI subsystem to support system 15072 * Power Management (PM) to device with SLI-4 interface spec. When PM invokes 15073 * this method, it quiesces the device by stopping the driver's worker 15074 * thread for the device, turning off device's interrupt and DMA, and bring 15075 * the device offline. Note that as the driver implements the minimum PM 15076 * requirements to a power-aware driver's PM support for suspend/resume -- all 15077 * the possible PM messages (SUSPEND, HIBERNATE, FREEZE) to the suspend() 15078 * method call will be treated as SUSPEND and the driver will fully 15079 * reinitialize its device during resume() method call, the driver will set 15080 * device to PCI_D3hot state in PCI config space instead of setting it 15081 * according to the @msg provided by the PM. 15082 * 15083 * Return code 15084 * 0 - driver suspended the device 15085 * Error otherwise 15086 **/ 15087 static int __maybe_unused 15088 lpfc_pci_suspend_one_s4(struct device *dev_d) 15089 { 15090 struct Scsi_Host *shost = dev_get_drvdata(dev_d); 15091 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 15092 15093 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 15094 "2843 PCI device Power Management suspend.\n"); 15095 15096 /* Bring down the device */ 15097 lpfc_offline_prep(phba, LPFC_MBX_WAIT); 15098 lpfc_offline(phba); 15099 kthread_stop(phba->worker_thread); 15100 15101 /* Disable interrupt from device */ 15102 lpfc_sli4_disable_intr(phba); 15103 lpfc_sli4_queue_destroy(phba); 15104 15105 return 0; 15106 } 15107 15108 /** 15109 * lpfc_pci_resume_one_s4 - PCI func to resume SLI-4 device for power mgmnt 15110 * @dev_d: pointer to device 15111 * 15112 * This routine is called from the kernel's PCI subsystem to support system 15113 * Power Management (PM) to device with SLI-4 interface spac. When PM invokes 15114 * this method, it restores the device's PCI config space state and fully 15115 * reinitializes the device and brings it online. Note that as the driver 15116 * implements the minimum PM requirements to a power-aware driver's PM for 15117 * suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, FREEZE) 15118 * to the suspend() method call will be treated as SUSPEND and the driver 15119 * will fully reinitialize its device during resume() method call, the device 15120 * will be set to PCI_D0 directly in PCI config space before restoring the 15121 * state. 15122 * 15123 * Return code 15124 * 0 - driver suspended the device 15125 * Error otherwise 15126 **/ 15127 static int __maybe_unused 15128 lpfc_pci_resume_one_s4(struct device *dev_d) 15129 { 15130 struct Scsi_Host *shost = dev_get_drvdata(dev_d); 15131 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 15132 uint32_t intr_mode; 15133 int error; 15134 15135 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 15136 "0292 PCI device Power Management resume.\n"); 15137 15138 /* Startup the kernel thread for this host adapter. */ 15139 phba->worker_thread = kthread_run(lpfc_do_work, phba, 15140 "lpfc_worker_%d", phba->brd_no); 15141 if (IS_ERR(phba->worker_thread)) { 15142 error = PTR_ERR(phba->worker_thread); 15143 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 15144 "0293 PM resume failed to start worker " 15145 "thread: error=x%x.\n", error); 15146 return error; 15147 } 15148 15149 /* Configure and enable interrupt */ 15150 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode); 15151 if (intr_mode == LPFC_INTR_ERROR) { 15152 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 15153 "0294 PM resume Failed to enable interrupt\n"); 15154 return -EIO; 15155 } else 15156 phba->intr_mode = intr_mode; 15157 15158 /* Restart HBA and bring it online */ 15159 lpfc_sli_brdrestart(phba); 15160 lpfc_online(phba); 15161 15162 /* Log the current active interrupt mode */ 15163 lpfc_log_intr_mode(phba, phba->intr_mode); 15164 15165 return 0; 15166 } 15167 15168 /** 15169 * lpfc_sli4_prep_dev_for_recover - Prepare SLI4 device for pci slot recover 15170 * @phba: pointer to lpfc hba data structure. 15171 * 15172 * This routine is called to prepare the SLI4 device for PCI slot recover. It 15173 * aborts all the outstanding SCSI I/Os to the pci device. 15174 **/ 15175 static void 15176 lpfc_sli4_prep_dev_for_recover(struct lpfc_hba *phba) 15177 { 15178 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 15179 "2828 PCI channel I/O abort preparing for recovery\n"); 15180 /* 15181 * There may be errored I/Os through HBA, abort all I/Os on txcmplq 15182 * and let the SCSI mid-layer to retry them to recover. 15183 */ 15184 lpfc_sli_abort_fcp_rings(phba); 15185 } 15186 15187 /** 15188 * lpfc_sli4_prep_dev_for_reset - Prepare SLI4 device for pci slot reset 15189 * @phba: pointer to lpfc hba data structure. 15190 * 15191 * This routine is called to prepare the SLI4 device for PCI slot reset. It 15192 * disables the device interrupt and pci device, and aborts the internal FCP 15193 * pending I/Os. 15194 **/ 15195 static void 15196 lpfc_sli4_prep_dev_for_reset(struct lpfc_hba *phba) 15197 { 15198 int offline = pci_channel_offline(phba->pcidev); 15199 15200 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 15201 "2826 PCI channel disable preparing for reset offline" 15202 " %d\n", offline); 15203 15204 /* Block any management I/Os to the device */ 15205 lpfc_block_mgmt_io(phba, LPFC_MBX_NO_WAIT); 15206 15207 15208 /* HBA_PCI_ERR was set in io_error_detect */ 15209 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT); 15210 /* Flush all driver's outstanding I/Os as we are to reset */ 15211 lpfc_sli_flush_io_rings(phba); 15212 lpfc_offline(phba); 15213 15214 /* stop all timers */ 15215 lpfc_stop_hba_timers(phba); 15216 15217 lpfc_sli4_queue_destroy(phba); 15218 /* Disable interrupt and pci device */ 15219 lpfc_sli4_disable_intr(phba); 15220 pci_disable_device(phba->pcidev); 15221 } 15222 15223 /** 15224 * lpfc_sli4_prep_dev_for_perm_failure - Prepare SLI4 dev for pci slot disable 15225 * @phba: pointer to lpfc hba data structure. 15226 * 15227 * This routine is called to prepare the SLI4 device for PCI slot permanently 15228 * disabling. It blocks the SCSI transport layer traffic and flushes the FCP 15229 * pending I/Os. 15230 **/ 15231 static void 15232 lpfc_sli4_prep_dev_for_perm_failure(struct lpfc_hba *phba) 15233 { 15234 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 15235 "2827 PCI channel permanent disable for failure\n"); 15236 15237 /* Block all SCSI devices' I/Os on the host */ 15238 lpfc_scsi_dev_block(phba); 15239 15240 /* stop all timers */ 15241 lpfc_stop_hba_timers(phba); 15242 15243 /* Clean up all driver's outstanding I/Os */ 15244 lpfc_sli_flush_io_rings(phba); 15245 } 15246 15247 /** 15248 * lpfc_io_error_detected_s4 - Method for handling PCI I/O error to SLI-4 device 15249 * @pdev: pointer to PCI device. 15250 * @state: the current PCI connection state. 15251 * 15252 * This routine is called from the PCI subsystem for error handling to device 15253 * with SLI-4 interface spec. This function is called by the PCI subsystem 15254 * after a PCI bus error affecting this device has been detected. When this 15255 * function is invoked, it will need to stop all the I/Os and interrupt(s) 15256 * to the device. Once that is done, it will return PCI_ERS_RESULT_NEED_RESET 15257 * for the PCI subsystem to perform proper recovery as desired. 15258 * 15259 * Return codes 15260 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery 15261 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered 15262 **/ 15263 static pci_ers_result_t 15264 lpfc_io_error_detected_s4(struct pci_dev *pdev, pci_channel_state_t state) 15265 { 15266 struct Scsi_Host *shost = pci_get_drvdata(pdev); 15267 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 15268 bool hba_pci_err; 15269 15270 switch (state) { 15271 case pci_channel_io_normal: 15272 /* Non-fatal error, prepare for recovery */ 15273 lpfc_sli4_prep_dev_for_recover(phba); 15274 return PCI_ERS_RESULT_CAN_RECOVER; 15275 case pci_channel_io_frozen: 15276 hba_pci_err = test_and_set_bit(HBA_PCI_ERR, &phba->bit_flags); 15277 /* Fatal error, prepare for slot reset */ 15278 if (!hba_pci_err) 15279 lpfc_sli4_prep_dev_for_reset(phba); 15280 else 15281 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 15282 "2832 Already handling PCI error " 15283 "state: x%x\n", state); 15284 return PCI_ERS_RESULT_NEED_RESET; 15285 case pci_channel_io_perm_failure: 15286 set_bit(HBA_PCI_ERR, &phba->bit_flags); 15287 /* Permanent failure, prepare for device down */ 15288 lpfc_sli4_prep_dev_for_perm_failure(phba); 15289 return PCI_ERS_RESULT_DISCONNECT; 15290 default: 15291 hba_pci_err = test_and_set_bit(HBA_PCI_ERR, &phba->bit_flags); 15292 if (!hba_pci_err) 15293 lpfc_sli4_prep_dev_for_reset(phba); 15294 /* Unknown state, prepare and request slot reset */ 15295 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 15296 "2825 Unknown PCI error state: x%x\n", state); 15297 lpfc_sli4_prep_dev_for_reset(phba); 15298 return PCI_ERS_RESULT_NEED_RESET; 15299 } 15300 } 15301 15302 /** 15303 * lpfc_io_slot_reset_s4 - Method for restart PCI SLI-4 device from scratch 15304 * @pdev: pointer to PCI device. 15305 * 15306 * This routine is called from the PCI subsystem for error handling to device 15307 * with SLI-4 interface spec. It is called after PCI bus has been reset to 15308 * restart the PCI card from scratch, as if from a cold-boot. During the 15309 * PCI subsystem error recovery, after the driver returns 15310 * PCI_ERS_RESULT_NEED_RESET, the PCI subsystem will perform proper error 15311 * recovery and then call this routine before calling the .resume method to 15312 * recover the device. This function will initialize the HBA device, enable 15313 * the interrupt, but it will just put the HBA to offline state without 15314 * passing any I/O traffic. 15315 * 15316 * Return codes 15317 * PCI_ERS_RESULT_RECOVERED - the device has been recovered 15318 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered 15319 */ 15320 static pci_ers_result_t 15321 lpfc_io_slot_reset_s4(struct pci_dev *pdev) 15322 { 15323 struct Scsi_Host *shost = pci_get_drvdata(pdev); 15324 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 15325 struct lpfc_sli *psli = &phba->sli; 15326 uint32_t intr_mode; 15327 bool hba_pci_err; 15328 15329 dev_printk(KERN_INFO, &pdev->dev, "recovering from a slot reset.\n"); 15330 if (pci_enable_device_mem(pdev)) { 15331 printk(KERN_ERR "lpfc: Cannot re-enable " 15332 "PCI device after reset.\n"); 15333 return PCI_ERS_RESULT_DISCONNECT; 15334 } 15335 15336 pci_restore_state(pdev); 15337 15338 hba_pci_err = test_and_clear_bit(HBA_PCI_ERR, &phba->bit_flags); 15339 if (!hba_pci_err) 15340 dev_info(&pdev->dev, 15341 "hba_pci_err was not set, recovering slot reset.\n"); 15342 /* 15343 * As the new kernel behavior of pci_restore_state() API call clears 15344 * device saved_state flag, need to save the restored state again. 15345 */ 15346 pci_save_state(pdev); 15347 15348 if (pdev->is_busmaster) 15349 pci_set_master(pdev); 15350 15351 spin_lock_irq(&phba->hbalock); 15352 psli->sli_flag &= ~LPFC_SLI_ACTIVE; 15353 spin_unlock_irq(&phba->hbalock); 15354 15355 /* Init cpu_map array */ 15356 lpfc_cpu_map_array_init(phba); 15357 /* Configure and enable interrupt */ 15358 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode); 15359 if (intr_mode == LPFC_INTR_ERROR) { 15360 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 15361 "2824 Cannot re-enable interrupt after " 15362 "slot reset.\n"); 15363 return PCI_ERS_RESULT_DISCONNECT; 15364 } else 15365 phba->intr_mode = intr_mode; 15366 lpfc_cpu_affinity_check(phba, phba->cfg_irq_chann); 15367 15368 /* Log the current active interrupt mode */ 15369 lpfc_log_intr_mode(phba, phba->intr_mode); 15370 15371 return PCI_ERS_RESULT_RECOVERED; 15372 } 15373 15374 /** 15375 * lpfc_io_resume_s4 - Method for resuming PCI I/O operation to SLI-4 device 15376 * @pdev: pointer to PCI device 15377 * 15378 * This routine is called from the PCI subsystem for error handling to device 15379 * with SLI-4 interface spec. It is called when kernel error recovery tells 15380 * the lpfc driver that it is ok to resume normal PCI operation after PCI bus 15381 * error recovery. After this call, traffic can start to flow from this device 15382 * again. 15383 **/ 15384 static void 15385 lpfc_io_resume_s4(struct pci_dev *pdev) 15386 { 15387 struct Scsi_Host *shost = pci_get_drvdata(pdev); 15388 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 15389 15390 /* 15391 * In case of slot reset, as function reset is performed through 15392 * mailbox command which needs DMA to be enabled, this operation 15393 * has to be moved to the io resume phase. Taking device offline 15394 * will perform the necessary cleanup. 15395 */ 15396 if (!(phba->sli.sli_flag & LPFC_SLI_ACTIVE)) { 15397 /* Perform device reset */ 15398 lpfc_sli_brdrestart(phba); 15399 /* Bring the device back online */ 15400 lpfc_online(phba); 15401 } 15402 } 15403 15404 /** 15405 * lpfc_pci_probe_one - lpfc PCI probe func to reg dev to PCI subsystem 15406 * @pdev: pointer to PCI device 15407 * @pid: pointer to PCI device identifier 15408 * 15409 * This routine is to be registered to the kernel's PCI subsystem. When an 15410 * Emulex HBA device is presented on PCI bus, the kernel PCI subsystem looks 15411 * at PCI device-specific information of the device and driver to see if the 15412 * driver state that it can support this kind of device. If the match is 15413 * successful, the driver core invokes this routine. This routine dispatches 15414 * the action to the proper SLI-3 or SLI-4 device probing routine, which will 15415 * do all the initialization that it needs to do to handle the HBA device 15416 * properly. 15417 * 15418 * Return code 15419 * 0 - driver can claim the device 15420 * negative value - driver can not claim the device 15421 **/ 15422 static int 15423 lpfc_pci_probe_one(struct pci_dev *pdev, const struct pci_device_id *pid) 15424 { 15425 int rc; 15426 struct lpfc_sli_intf intf; 15427 15428 if (pci_read_config_dword(pdev, LPFC_SLI_INTF, &intf.word0)) 15429 return -ENODEV; 15430 15431 if ((bf_get(lpfc_sli_intf_valid, &intf) == LPFC_SLI_INTF_VALID) && 15432 (bf_get(lpfc_sli_intf_slirev, &intf) == LPFC_SLI_INTF_REV_SLI4)) 15433 rc = lpfc_pci_probe_one_s4(pdev, pid); 15434 else 15435 rc = lpfc_pci_probe_one_s3(pdev, pid); 15436 15437 return rc; 15438 } 15439 15440 /** 15441 * lpfc_pci_remove_one - lpfc PCI func to unreg dev from PCI subsystem 15442 * @pdev: pointer to PCI device 15443 * 15444 * This routine is to be registered to the kernel's PCI subsystem. When an 15445 * Emulex HBA is removed from PCI bus, the driver core invokes this routine. 15446 * This routine dispatches the action to the proper SLI-3 or SLI-4 device 15447 * remove routine, which will perform all the necessary cleanup for the 15448 * device to be removed from the PCI subsystem properly. 15449 **/ 15450 static void 15451 lpfc_pci_remove_one(struct pci_dev *pdev) 15452 { 15453 struct Scsi_Host *shost = pci_get_drvdata(pdev); 15454 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 15455 15456 switch (phba->pci_dev_grp) { 15457 case LPFC_PCI_DEV_LP: 15458 lpfc_pci_remove_one_s3(pdev); 15459 break; 15460 case LPFC_PCI_DEV_OC: 15461 lpfc_pci_remove_one_s4(pdev); 15462 break; 15463 default: 15464 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 15465 "1424 Invalid PCI device group: 0x%x\n", 15466 phba->pci_dev_grp); 15467 break; 15468 } 15469 return; 15470 } 15471 15472 /** 15473 * lpfc_pci_suspend_one - lpfc PCI func to suspend dev for power management 15474 * @dev: pointer to device 15475 * 15476 * This routine is to be registered to the kernel's PCI subsystem to support 15477 * system Power Management (PM). When PM invokes this method, it dispatches 15478 * the action to the proper SLI-3 or SLI-4 device suspend routine, which will 15479 * suspend the device. 15480 * 15481 * Return code 15482 * 0 - driver suspended the device 15483 * Error otherwise 15484 **/ 15485 static int __maybe_unused 15486 lpfc_pci_suspend_one(struct device *dev) 15487 { 15488 struct Scsi_Host *shost = dev_get_drvdata(dev); 15489 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 15490 int rc = -ENODEV; 15491 15492 switch (phba->pci_dev_grp) { 15493 case LPFC_PCI_DEV_LP: 15494 rc = lpfc_pci_suspend_one_s3(dev); 15495 break; 15496 case LPFC_PCI_DEV_OC: 15497 rc = lpfc_pci_suspend_one_s4(dev); 15498 break; 15499 default: 15500 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 15501 "1425 Invalid PCI device group: 0x%x\n", 15502 phba->pci_dev_grp); 15503 break; 15504 } 15505 return rc; 15506 } 15507 15508 /** 15509 * lpfc_pci_resume_one - lpfc PCI func to resume dev for power management 15510 * @dev: pointer to device 15511 * 15512 * This routine is to be registered to the kernel's PCI subsystem to support 15513 * system Power Management (PM). When PM invokes this method, it dispatches 15514 * the action to the proper SLI-3 or SLI-4 device resume routine, which will 15515 * resume the device. 15516 * 15517 * Return code 15518 * 0 - driver suspended the device 15519 * Error otherwise 15520 **/ 15521 static int __maybe_unused 15522 lpfc_pci_resume_one(struct device *dev) 15523 { 15524 struct Scsi_Host *shost = dev_get_drvdata(dev); 15525 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 15526 int rc = -ENODEV; 15527 15528 switch (phba->pci_dev_grp) { 15529 case LPFC_PCI_DEV_LP: 15530 rc = lpfc_pci_resume_one_s3(dev); 15531 break; 15532 case LPFC_PCI_DEV_OC: 15533 rc = lpfc_pci_resume_one_s4(dev); 15534 break; 15535 default: 15536 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 15537 "1426 Invalid PCI device group: 0x%x\n", 15538 phba->pci_dev_grp); 15539 break; 15540 } 15541 return rc; 15542 } 15543 15544 /** 15545 * lpfc_io_error_detected - lpfc method for handling PCI I/O error 15546 * @pdev: pointer to PCI device. 15547 * @state: the current PCI connection state. 15548 * 15549 * This routine is registered to the PCI subsystem for error handling. This 15550 * function is called by the PCI subsystem after a PCI bus error affecting 15551 * this device has been detected. When this routine is invoked, it dispatches 15552 * the action to the proper SLI-3 or SLI-4 device error detected handling 15553 * routine, which will perform the proper error detected operation. 15554 * 15555 * Return codes 15556 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery 15557 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered 15558 **/ 15559 static pci_ers_result_t 15560 lpfc_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state) 15561 { 15562 struct Scsi_Host *shost = pci_get_drvdata(pdev); 15563 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 15564 pci_ers_result_t rc = PCI_ERS_RESULT_DISCONNECT; 15565 15566 if (phba->link_state == LPFC_HBA_ERROR && 15567 phba->hba_flag & HBA_IOQ_FLUSH) 15568 return PCI_ERS_RESULT_NEED_RESET; 15569 15570 switch (phba->pci_dev_grp) { 15571 case LPFC_PCI_DEV_LP: 15572 rc = lpfc_io_error_detected_s3(pdev, state); 15573 break; 15574 case LPFC_PCI_DEV_OC: 15575 rc = lpfc_io_error_detected_s4(pdev, state); 15576 break; 15577 default: 15578 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 15579 "1427 Invalid PCI device group: 0x%x\n", 15580 phba->pci_dev_grp); 15581 break; 15582 } 15583 return rc; 15584 } 15585 15586 /** 15587 * lpfc_io_slot_reset - lpfc method for restart PCI dev from scratch 15588 * @pdev: pointer to PCI device. 15589 * 15590 * This routine is registered to the PCI subsystem for error handling. This 15591 * function is called after PCI bus has been reset to restart the PCI card 15592 * from scratch, as if from a cold-boot. When this routine is invoked, it 15593 * dispatches the action to the proper SLI-3 or SLI-4 device reset handling 15594 * routine, which will perform the proper device reset. 15595 * 15596 * Return codes 15597 * PCI_ERS_RESULT_RECOVERED - the device has been recovered 15598 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered 15599 **/ 15600 static pci_ers_result_t 15601 lpfc_io_slot_reset(struct pci_dev *pdev) 15602 { 15603 struct Scsi_Host *shost = pci_get_drvdata(pdev); 15604 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 15605 pci_ers_result_t rc = PCI_ERS_RESULT_DISCONNECT; 15606 15607 switch (phba->pci_dev_grp) { 15608 case LPFC_PCI_DEV_LP: 15609 rc = lpfc_io_slot_reset_s3(pdev); 15610 break; 15611 case LPFC_PCI_DEV_OC: 15612 rc = lpfc_io_slot_reset_s4(pdev); 15613 break; 15614 default: 15615 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 15616 "1428 Invalid PCI device group: 0x%x\n", 15617 phba->pci_dev_grp); 15618 break; 15619 } 15620 return rc; 15621 } 15622 15623 /** 15624 * lpfc_io_resume - lpfc method for resuming PCI I/O operation 15625 * @pdev: pointer to PCI device 15626 * 15627 * This routine is registered to the PCI subsystem for error handling. It 15628 * is called when kernel error recovery tells the lpfc driver that it is 15629 * OK to resume normal PCI operation after PCI bus error recovery. When 15630 * this routine is invoked, it dispatches the action to the proper SLI-3 15631 * or SLI-4 device io_resume routine, which will resume the device operation. 15632 **/ 15633 static void 15634 lpfc_io_resume(struct pci_dev *pdev) 15635 { 15636 struct Scsi_Host *shost = pci_get_drvdata(pdev); 15637 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 15638 15639 switch (phba->pci_dev_grp) { 15640 case LPFC_PCI_DEV_LP: 15641 lpfc_io_resume_s3(pdev); 15642 break; 15643 case LPFC_PCI_DEV_OC: 15644 lpfc_io_resume_s4(pdev); 15645 break; 15646 default: 15647 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 15648 "1429 Invalid PCI device group: 0x%x\n", 15649 phba->pci_dev_grp); 15650 break; 15651 } 15652 return; 15653 } 15654 15655 /** 15656 * lpfc_sli4_oas_verify - Verify OAS is supported by this adapter 15657 * @phba: pointer to lpfc hba data structure. 15658 * 15659 * This routine checks to see if OAS is supported for this adapter. If 15660 * supported, the configure Flash Optimized Fabric flag is set. Otherwise, 15661 * the enable oas flag is cleared and the pool created for OAS device data 15662 * is destroyed. 15663 * 15664 **/ 15665 static void 15666 lpfc_sli4_oas_verify(struct lpfc_hba *phba) 15667 { 15668 15669 if (!phba->cfg_EnableXLane) 15670 return; 15671 15672 if (phba->sli4_hba.pc_sli4_params.oas_supported) { 15673 phba->cfg_fof = 1; 15674 } else { 15675 phba->cfg_fof = 0; 15676 mempool_destroy(phba->device_data_mem_pool); 15677 phba->device_data_mem_pool = NULL; 15678 } 15679 15680 return; 15681 } 15682 15683 /** 15684 * lpfc_sli4_ras_init - Verify RAS-FW log is supported by this adapter 15685 * @phba: pointer to lpfc hba data structure. 15686 * 15687 * This routine checks to see if RAS is supported by the adapter. Check the 15688 * function through which RAS support enablement is to be done. 15689 **/ 15690 void 15691 lpfc_sli4_ras_init(struct lpfc_hba *phba) 15692 { 15693 /* if ASIC_GEN_NUM >= 0xC) */ 15694 if ((bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) == 15695 LPFC_SLI_INTF_IF_TYPE_6) || 15696 (bf_get(lpfc_sli_intf_sli_family, &phba->sli4_hba.sli_intf) == 15697 LPFC_SLI_INTF_FAMILY_G6)) { 15698 phba->ras_fwlog.ras_hwsupport = true; 15699 if (phba->cfg_ras_fwlog_func == PCI_FUNC(phba->pcidev->devfn) && 15700 phba->cfg_ras_fwlog_buffsize) 15701 phba->ras_fwlog.ras_enabled = true; 15702 else 15703 phba->ras_fwlog.ras_enabled = false; 15704 } else { 15705 phba->ras_fwlog.ras_hwsupport = false; 15706 } 15707 } 15708 15709 15710 MODULE_DEVICE_TABLE(pci, lpfc_id_table); 15711 15712 static const struct pci_error_handlers lpfc_err_handler = { 15713 .error_detected = lpfc_io_error_detected, 15714 .slot_reset = lpfc_io_slot_reset, 15715 .resume = lpfc_io_resume, 15716 }; 15717 15718 static SIMPLE_DEV_PM_OPS(lpfc_pci_pm_ops_one, 15719 lpfc_pci_suspend_one, 15720 lpfc_pci_resume_one); 15721 15722 static struct pci_driver lpfc_driver = { 15723 .name = LPFC_DRIVER_NAME, 15724 .id_table = lpfc_id_table, 15725 .probe = lpfc_pci_probe_one, 15726 .remove = lpfc_pci_remove_one, 15727 .shutdown = lpfc_pci_remove_one, 15728 .driver.pm = &lpfc_pci_pm_ops_one, 15729 .err_handler = &lpfc_err_handler, 15730 }; 15731 15732 static const struct file_operations lpfc_mgmt_fop = { 15733 .owner = THIS_MODULE, 15734 }; 15735 15736 static struct miscdevice lpfc_mgmt_dev = { 15737 .minor = MISC_DYNAMIC_MINOR, 15738 .name = "lpfcmgmt", 15739 .fops = &lpfc_mgmt_fop, 15740 }; 15741 15742 /** 15743 * lpfc_init - lpfc module initialization routine 15744 * 15745 * This routine is to be invoked when the lpfc module is loaded into the 15746 * kernel. The special kernel macro module_init() is used to indicate the 15747 * role of this routine to the kernel as lpfc module entry point. 15748 * 15749 * Return codes 15750 * 0 - successful 15751 * -ENOMEM - FC attach transport failed 15752 * all others - failed 15753 */ 15754 static int __init 15755 lpfc_init(void) 15756 { 15757 int error = 0; 15758 15759 pr_info(LPFC_MODULE_DESC "\n"); 15760 pr_info(LPFC_COPYRIGHT "\n"); 15761 15762 error = misc_register(&lpfc_mgmt_dev); 15763 if (error) 15764 printk(KERN_ERR "Could not register lpfcmgmt device, " 15765 "misc_register returned with status %d", error); 15766 15767 error = -ENOMEM; 15768 lpfc_transport_functions.vport_create = lpfc_vport_create; 15769 lpfc_transport_functions.vport_delete = lpfc_vport_delete; 15770 lpfc_transport_template = 15771 fc_attach_transport(&lpfc_transport_functions); 15772 if (lpfc_transport_template == NULL) 15773 goto unregister; 15774 lpfc_vport_transport_template = 15775 fc_attach_transport(&lpfc_vport_transport_functions); 15776 if (lpfc_vport_transport_template == NULL) { 15777 fc_release_transport(lpfc_transport_template); 15778 goto unregister; 15779 } 15780 lpfc_wqe_cmd_template(); 15781 lpfc_nvmet_cmd_template(); 15782 15783 /* Initialize in case vector mapping is needed */ 15784 lpfc_present_cpu = num_present_cpus(); 15785 15786 lpfc_pldv_detect = false; 15787 15788 error = cpuhp_setup_state_multi(CPUHP_AP_ONLINE_DYN, 15789 "lpfc/sli4:online", 15790 lpfc_cpu_online, lpfc_cpu_offline); 15791 if (error < 0) 15792 goto cpuhp_failure; 15793 lpfc_cpuhp_state = error; 15794 15795 error = pci_register_driver(&lpfc_driver); 15796 if (error) 15797 goto unwind; 15798 15799 return error; 15800 15801 unwind: 15802 cpuhp_remove_multi_state(lpfc_cpuhp_state); 15803 cpuhp_failure: 15804 fc_release_transport(lpfc_transport_template); 15805 fc_release_transport(lpfc_vport_transport_template); 15806 unregister: 15807 misc_deregister(&lpfc_mgmt_dev); 15808 15809 return error; 15810 } 15811 15812 void lpfc_dmp_dbg(struct lpfc_hba *phba) 15813 { 15814 unsigned int start_idx; 15815 unsigned int dbg_cnt; 15816 unsigned int temp_idx; 15817 int i; 15818 int j = 0; 15819 unsigned long rem_nsec; 15820 15821 if (atomic_cmpxchg(&phba->dbg_log_dmping, 0, 1) != 0) 15822 return; 15823 15824 start_idx = (unsigned int)atomic_read(&phba->dbg_log_idx) % DBG_LOG_SZ; 15825 dbg_cnt = (unsigned int)atomic_read(&phba->dbg_log_cnt); 15826 if (!dbg_cnt) 15827 goto out; 15828 temp_idx = start_idx; 15829 if (dbg_cnt >= DBG_LOG_SZ) { 15830 dbg_cnt = DBG_LOG_SZ; 15831 temp_idx -= 1; 15832 } else { 15833 if ((start_idx + dbg_cnt) > (DBG_LOG_SZ - 1)) { 15834 temp_idx = (start_idx + dbg_cnt) % DBG_LOG_SZ; 15835 } else { 15836 if (start_idx < dbg_cnt) 15837 start_idx = DBG_LOG_SZ - (dbg_cnt - start_idx); 15838 else 15839 start_idx -= dbg_cnt; 15840 } 15841 } 15842 dev_info(&phba->pcidev->dev, "start %d end %d cnt %d\n", 15843 start_idx, temp_idx, dbg_cnt); 15844 15845 for (i = 0; i < dbg_cnt; i++) { 15846 if ((start_idx + i) < DBG_LOG_SZ) 15847 temp_idx = (start_idx + i) % DBG_LOG_SZ; 15848 else 15849 temp_idx = j++; 15850 rem_nsec = do_div(phba->dbg_log[temp_idx].t_ns, NSEC_PER_SEC); 15851 dev_info(&phba->pcidev->dev, "%d: [%5lu.%06lu] %s", 15852 temp_idx, 15853 (unsigned long)phba->dbg_log[temp_idx].t_ns, 15854 rem_nsec / 1000, 15855 phba->dbg_log[temp_idx].log); 15856 } 15857 out: 15858 atomic_set(&phba->dbg_log_cnt, 0); 15859 atomic_set(&phba->dbg_log_dmping, 0); 15860 } 15861 15862 __printf(2, 3) 15863 void lpfc_dbg_print(struct lpfc_hba *phba, const char *fmt, ...) 15864 { 15865 unsigned int idx; 15866 va_list args; 15867 int dbg_dmping = atomic_read(&phba->dbg_log_dmping); 15868 struct va_format vaf; 15869 15870 15871 va_start(args, fmt); 15872 if (unlikely(dbg_dmping)) { 15873 vaf.fmt = fmt; 15874 vaf.va = &args; 15875 dev_info(&phba->pcidev->dev, "%pV", &vaf); 15876 va_end(args); 15877 return; 15878 } 15879 idx = (unsigned int)atomic_fetch_add(1, &phba->dbg_log_idx) % 15880 DBG_LOG_SZ; 15881 15882 atomic_inc(&phba->dbg_log_cnt); 15883 15884 vscnprintf(phba->dbg_log[idx].log, 15885 sizeof(phba->dbg_log[idx].log), fmt, args); 15886 va_end(args); 15887 15888 phba->dbg_log[idx].t_ns = local_clock(); 15889 } 15890 15891 /** 15892 * lpfc_exit - lpfc module removal routine 15893 * 15894 * This routine is invoked when the lpfc module is removed from the kernel. 15895 * The special kernel macro module_exit() is used to indicate the role of 15896 * this routine to the kernel as lpfc module exit point. 15897 */ 15898 static void __exit 15899 lpfc_exit(void) 15900 { 15901 misc_deregister(&lpfc_mgmt_dev); 15902 pci_unregister_driver(&lpfc_driver); 15903 cpuhp_remove_multi_state(lpfc_cpuhp_state); 15904 fc_release_transport(lpfc_transport_template); 15905 fc_release_transport(lpfc_vport_transport_template); 15906 idr_destroy(&lpfc_hba_index); 15907 } 15908 15909 module_init(lpfc_init); 15910 module_exit(lpfc_exit); 15911 MODULE_LICENSE("GPL"); 15912 MODULE_DESCRIPTION(LPFC_MODULE_DESC); 15913 MODULE_AUTHOR("Broadcom"); 15914 MODULE_VERSION("0:" LPFC_DRIVER_VERSION); 15915