1 /******************************************************************* 2 * This file is part of the Emulex Linux Device Driver for * 3 * Fibre Channel Host Bus Adapters. * 4 * Copyright (C) 2017-2025 Broadcom. All Rights Reserved. The term * 5 * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. * 6 * Copyright (C) 2004-2016 Emulex. All rights reserved. * 7 * EMULEX and SLI are trademarks of Emulex. * 8 * www.broadcom.com * 9 * Portions Copyright (C) 2004-2005 Christoph Hellwig * 10 * * 11 * This program is free software; you can redistribute it and/or * 12 * modify it under the terms of version 2 of the GNU General * 13 * Public License as published by the Free Software Foundation. * 14 * This program is distributed in the hope that it will be useful. * 15 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND * 16 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, * 17 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE * 18 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD * 19 * TO BE LEGALLY INVALID. See the GNU General Public License for * 20 * more details, a copy of which can be found in the file COPYING * 21 * included with this package. * 22 *******************************************************************/ 23 24 #include <linux/blkdev.h> 25 #include <linux/delay.h> 26 #include <linux/dma-mapping.h> 27 #include <linux/idr.h> 28 #include <linux/interrupt.h> 29 #include <linux/module.h> 30 #include <linux/kthread.h> 31 #include <linux/pci.h> 32 #include <linux/spinlock.h> 33 #include <linux/sched/clock.h> 34 #include <linux/ctype.h> 35 #include <linux/slab.h> 36 #include <linux/firmware.h> 37 #include <linux/miscdevice.h> 38 #include <linux/percpu.h> 39 #include <linux/irq.h> 40 #include <linux/bitops.h> 41 #include <linux/crash_dump.h> 42 #include <linux/cpu.h> 43 #include <linux/cpuhotplug.h> 44 45 #include <scsi/scsi.h> 46 #include <scsi/scsi_device.h> 47 #include <scsi/scsi_host.h> 48 #include <scsi/scsi_transport_fc.h> 49 #include <scsi/scsi_tcq.h> 50 #include <scsi/fc/fc_fs.h> 51 52 #include "lpfc_hw4.h" 53 #include "lpfc_hw.h" 54 #include "lpfc_sli.h" 55 #include "lpfc_sli4.h" 56 #include "lpfc_nl.h" 57 #include "lpfc_disc.h" 58 #include "lpfc.h" 59 #include "lpfc_scsi.h" 60 #include "lpfc_nvme.h" 61 #include "lpfc_logmsg.h" 62 #include "lpfc_crtn.h" 63 #include "lpfc_vport.h" 64 #include "lpfc_version.h" 65 #include "lpfc_ids.h" 66 67 static enum cpuhp_state lpfc_cpuhp_state; 68 /* Used when mapping IRQ vectors in a driver centric manner */ 69 static uint32_t lpfc_present_cpu; 70 static bool lpfc_pldv_detect; 71 72 static void __lpfc_cpuhp_remove(struct lpfc_hba *phba); 73 static void lpfc_cpuhp_remove(struct lpfc_hba *phba); 74 static void lpfc_cpuhp_add(struct lpfc_hba *phba); 75 static void lpfc_get_hba_model_desc(struct lpfc_hba *, uint8_t *, uint8_t *); 76 static int lpfc_post_rcv_buf(struct lpfc_hba *); 77 static int lpfc_sli4_queue_verify(struct lpfc_hba *); 78 static int lpfc_create_bootstrap_mbox(struct lpfc_hba *); 79 static int lpfc_setup_endian_order(struct lpfc_hba *); 80 static void lpfc_destroy_bootstrap_mbox(struct lpfc_hba *); 81 static void lpfc_free_els_sgl_list(struct lpfc_hba *); 82 static void lpfc_free_nvmet_sgl_list(struct lpfc_hba *); 83 static void lpfc_init_sgl_list(struct lpfc_hba *); 84 static int lpfc_init_active_sgl_array(struct lpfc_hba *); 85 static void lpfc_free_active_sgl(struct lpfc_hba *); 86 static int lpfc_hba_down_post_s3(struct lpfc_hba *phba); 87 static int lpfc_hba_down_post_s4(struct lpfc_hba *phba); 88 static int lpfc_sli4_cq_event_pool_create(struct lpfc_hba *); 89 static void lpfc_sli4_cq_event_pool_destroy(struct lpfc_hba *); 90 static void lpfc_sli4_cq_event_release_all(struct lpfc_hba *); 91 static void lpfc_sli4_disable_intr(struct lpfc_hba *); 92 static uint32_t lpfc_sli4_enable_intr(struct lpfc_hba *, uint32_t); 93 static void lpfc_sli4_oas_verify(struct lpfc_hba *phba); 94 static uint16_t lpfc_find_cpu_handle(struct lpfc_hba *, uint16_t, int); 95 static void lpfc_setup_bg(struct lpfc_hba *, struct Scsi_Host *); 96 static int lpfc_sli4_cgn_parm_chg_evt(struct lpfc_hba *); 97 static void lpfc_sli4_async_cmstat_evt(struct lpfc_hba *phba); 98 static void lpfc_sli4_prep_dev_for_reset(struct lpfc_hba *phba); 99 100 static struct scsi_transport_template *lpfc_transport_template = NULL; 101 static struct scsi_transport_template *lpfc_vport_transport_template = NULL; 102 static DEFINE_IDR(lpfc_hba_index); 103 #define LPFC_NVMET_BUF_POST 254 104 static int lpfc_vmid_res_alloc(struct lpfc_hba *phba, struct lpfc_vport *vport); 105 static void lpfc_cgn_update_tstamp(struct lpfc_hba *phba, struct lpfc_cgn_ts *ts); 106 107 /** 108 * lpfc_config_port_prep - Perform lpfc initialization prior to config port 109 * @phba: pointer to lpfc hba data structure. 110 * 111 * This routine will do LPFC initialization prior to issuing the CONFIG_PORT 112 * mailbox command. It retrieves the revision information from the HBA and 113 * collects the Vital Product Data (VPD) about the HBA for preparing the 114 * configuration of the HBA. 115 * 116 * Return codes: 117 * 0 - success. 118 * -ERESTART - requests the SLI layer to reset the HBA and try again. 119 * Any other value - indicates an error. 120 **/ 121 int 122 lpfc_config_port_prep(struct lpfc_hba *phba) 123 { 124 lpfc_vpd_t *vp = &phba->vpd; 125 int i = 0, rc; 126 LPFC_MBOXQ_t *pmb; 127 MAILBOX_t *mb; 128 char *lpfc_vpd_data = NULL; 129 uint16_t offset = 0; 130 static char licensed[56] = 131 "key unlock for use with gnu public licensed code only\0"; 132 static int init_key = 1; 133 134 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 135 if (!pmb) { 136 phba->link_state = LPFC_HBA_ERROR; 137 return -ENOMEM; 138 } 139 140 mb = &pmb->u.mb; 141 phba->link_state = LPFC_INIT_MBX_CMDS; 142 143 if (lpfc_is_LC_HBA(phba->pcidev->device)) { 144 if (init_key) { 145 uint32_t *ptext = (uint32_t *) licensed; 146 147 for (i = 0; i < 56; i += sizeof (uint32_t), ptext++) 148 *ptext = cpu_to_be32(*ptext); 149 init_key = 0; 150 } 151 152 lpfc_read_nv(phba, pmb); 153 memset((char*)mb->un.varRDnvp.rsvd3, 0, 154 sizeof (mb->un.varRDnvp.rsvd3)); 155 memcpy((char*)mb->un.varRDnvp.rsvd3, licensed, 156 sizeof (licensed)); 157 158 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); 159 160 if (rc != MBX_SUCCESS) { 161 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 162 "0324 Config Port initialization " 163 "error, mbxCmd x%x READ_NVPARM, " 164 "mbxStatus x%x\n", 165 mb->mbxCommand, mb->mbxStatus); 166 mempool_free(pmb, phba->mbox_mem_pool); 167 return -ERESTART; 168 } 169 memcpy(phba->wwnn, (char *)mb->un.varRDnvp.nodename, 170 sizeof(phba->wwnn)); 171 memcpy(phba->wwpn, (char *)mb->un.varRDnvp.portname, 172 sizeof(phba->wwpn)); 173 } 174 175 /* 176 * Clear all option bits except LPFC_SLI3_BG_ENABLED, 177 * which was already set in lpfc_get_cfgparam() 178 */ 179 phba->sli3_options &= (uint32_t)LPFC_SLI3_BG_ENABLED; 180 181 /* Setup and issue mailbox READ REV command */ 182 lpfc_read_rev(phba, pmb); 183 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); 184 if (rc != MBX_SUCCESS) { 185 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 186 "0439 Adapter failed to init, mbxCmd x%x " 187 "READ_REV, mbxStatus x%x\n", 188 mb->mbxCommand, mb->mbxStatus); 189 mempool_free( pmb, phba->mbox_mem_pool); 190 return -ERESTART; 191 } 192 193 194 /* 195 * The value of rr must be 1 since the driver set the cv field to 1. 196 * This setting requires the FW to set all revision fields. 197 */ 198 if (mb->un.varRdRev.rr == 0) { 199 vp->rev.rBit = 0; 200 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 201 "0440 Adapter failed to init, READ_REV has " 202 "missing revision information.\n"); 203 mempool_free(pmb, phba->mbox_mem_pool); 204 return -ERESTART; 205 } 206 207 if (phba->sli_rev == 3 && !mb->un.varRdRev.v3rsp) { 208 mempool_free(pmb, phba->mbox_mem_pool); 209 return -EINVAL; 210 } 211 212 /* Save information as VPD data */ 213 vp->rev.rBit = 1; 214 memcpy(&vp->sli3Feat, &mb->un.varRdRev.sli3Feat, sizeof(uint32_t)); 215 vp->rev.sli1FwRev = mb->un.varRdRev.sli1FwRev; 216 memcpy(vp->rev.sli1FwName, (char*) mb->un.varRdRev.sli1FwName, 16); 217 vp->rev.sli2FwRev = mb->un.varRdRev.sli2FwRev; 218 memcpy(vp->rev.sli2FwName, (char *) mb->un.varRdRev.sli2FwName, 16); 219 vp->rev.biuRev = mb->un.varRdRev.biuRev; 220 vp->rev.smRev = mb->un.varRdRev.smRev; 221 vp->rev.smFwRev = mb->un.varRdRev.un.smFwRev; 222 vp->rev.endecRev = mb->un.varRdRev.endecRev; 223 vp->rev.fcphHigh = mb->un.varRdRev.fcphHigh; 224 vp->rev.fcphLow = mb->un.varRdRev.fcphLow; 225 vp->rev.feaLevelHigh = mb->un.varRdRev.feaLevelHigh; 226 vp->rev.feaLevelLow = mb->un.varRdRev.feaLevelLow; 227 vp->rev.postKernRev = mb->un.varRdRev.postKernRev; 228 vp->rev.opFwRev = mb->un.varRdRev.opFwRev; 229 230 /* If the sli feature level is less then 9, we must 231 * tear down all RPIs and VPIs on link down if NPIV 232 * is enabled. 233 */ 234 if (vp->rev.feaLevelHigh < 9) 235 phba->sli3_options |= LPFC_SLI3_VPORT_TEARDOWN; 236 237 if (lpfc_is_LC_HBA(phba->pcidev->device)) 238 memcpy(phba->RandomData, (char *)&mb->un.varWords[24], 239 sizeof (phba->RandomData)); 240 241 /* Get adapter VPD information */ 242 lpfc_vpd_data = kmalloc(DMP_VPD_SIZE, GFP_KERNEL); 243 if (!lpfc_vpd_data) 244 goto out_free_mbox; 245 do { 246 lpfc_dump_mem(phba, pmb, offset, DMP_REGION_VPD); 247 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); 248 249 if (rc != MBX_SUCCESS) { 250 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 251 "0441 VPD not present on adapter, " 252 "mbxCmd x%x DUMP VPD, mbxStatus x%x\n", 253 mb->mbxCommand, mb->mbxStatus); 254 mb->un.varDmp.word_cnt = 0; 255 } 256 /* dump mem may return a zero when finished or we got a 257 * mailbox error, either way we are done. 258 */ 259 if (mb->un.varDmp.word_cnt == 0) 260 break; 261 262 if (mb->un.varDmp.word_cnt > DMP_VPD_SIZE - offset) 263 mb->un.varDmp.word_cnt = DMP_VPD_SIZE - offset; 264 lpfc_sli_pcimem_bcopy(((uint8_t *)mb) + DMP_RSP_OFFSET, 265 lpfc_vpd_data + offset, 266 mb->un.varDmp.word_cnt); 267 offset += mb->un.varDmp.word_cnt; 268 } while (mb->un.varDmp.word_cnt && offset < DMP_VPD_SIZE); 269 270 lpfc_parse_vpd(phba, lpfc_vpd_data, offset); 271 272 kfree(lpfc_vpd_data); 273 out_free_mbox: 274 mempool_free(pmb, phba->mbox_mem_pool); 275 return 0; 276 } 277 278 /** 279 * lpfc_config_async_cmpl - Completion handler for config async event mbox cmd 280 * @phba: pointer to lpfc hba data structure. 281 * @pmboxq: pointer to the driver internal queue element for mailbox command. 282 * 283 * This is the completion handler for driver's configuring asynchronous event 284 * mailbox command to the device. If the mailbox command returns successfully, 285 * it will set internal async event support flag to 1; otherwise, it will 286 * set internal async event support flag to 0. 287 **/ 288 static void 289 lpfc_config_async_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq) 290 { 291 if (pmboxq->u.mb.mbxStatus == MBX_SUCCESS) 292 phba->temp_sensor_support = 1; 293 else 294 phba->temp_sensor_support = 0; 295 mempool_free(pmboxq, phba->mbox_mem_pool); 296 return; 297 } 298 299 /** 300 * lpfc_dump_wakeup_param_cmpl - dump memory mailbox command completion handler 301 * @phba: pointer to lpfc hba data structure. 302 * @pmboxq: pointer to the driver internal queue element for mailbox command. 303 * 304 * This is the completion handler for dump mailbox command for getting 305 * wake up parameters. When this command complete, the response contain 306 * Option rom version of the HBA. This function translate the version number 307 * into a human readable string and store it in OptionROMVersion. 308 **/ 309 static void 310 lpfc_dump_wakeup_param_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq) 311 { 312 struct prog_id *prg; 313 uint32_t prog_id_word; 314 char dist = ' '; 315 /* character array used for decoding dist type. */ 316 char dist_char[] = "nabx"; 317 318 if (pmboxq->u.mb.mbxStatus != MBX_SUCCESS) { 319 mempool_free(pmboxq, phba->mbox_mem_pool); 320 return; 321 } 322 323 prg = (struct prog_id *) &prog_id_word; 324 325 /* word 7 contain option rom version */ 326 prog_id_word = pmboxq->u.mb.un.varWords[7]; 327 328 /* Decode the Option rom version word to a readable string */ 329 dist = dist_char[prg->dist]; 330 331 if ((prg->dist == 3) && (prg->num == 0)) 332 snprintf(phba->OptionROMVersion, 32, "%d.%d%d", 333 prg->ver, prg->rev, prg->lev); 334 else 335 snprintf(phba->OptionROMVersion, 32, "%d.%d%d%c%d", 336 prg->ver, prg->rev, prg->lev, 337 dist, prg->num); 338 mempool_free(pmboxq, phba->mbox_mem_pool); 339 return; 340 } 341 342 /** 343 * lpfc_update_vport_wwn - Updates the fc_nodename, fc_portname, 344 * @vport: pointer to lpfc vport data structure. 345 * 346 * 347 * Return codes 348 * None. 349 **/ 350 void 351 lpfc_update_vport_wwn(struct lpfc_vport *vport) 352 { 353 struct lpfc_hba *phba = vport->phba; 354 355 /* 356 * If the name is empty or there exists a soft name 357 * then copy the service params name, otherwise use the fc name 358 */ 359 if (vport->fc_nodename.u.wwn[0] == 0) 360 memcpy(&vport->fc_nodename, &vport->fc_sparam.nodeName, 361 sizeof(struct lpfc_name)); 362 else 363 memcpy(&vport->fc_sparam.nodeName, &vport->fc_nodename, 364 sizeof(struct lpfc_name)); 365 366 /* 367 * If the port name has changed, then set the Param changes flag 368 * to unreg the login 369 */ 370 if (vport->fc_portname.u.wwn[0] != 0 && 371 memcmp(&vport->fc_portname, &vport->fc_sparam.portName, 372 sizeof(struct lpfc_name))) { 373 vport->vport_flag |= FAWWPN_PARAM_CHG; 374 375 if (phba->sli_rev == LPFC_SLI_REV4 && 376 vport->port_type == LPFC_PHYSICAL_PORT && 377 phba->sli4_hba.fawwpn_flag & LPFC_FAWWPN_FABRIC) { 378 if (!(phba->sli4_hba.fawwpn_flag & LPFC_FAWWPN_CONFIG)) 379 phba->sli4_hba.fawwpn_flag &= 380 ~LPFC_FAWWPN_FABRIC; 381 lpfc_printf_log(phba, KERN_INFO, 382 LOG_SLI | LOG_DISCOVERY | LOG_ELS, 383 "2701 FA-PWWN change WWPN from %llx to " 384 "%llx: vflag x%x fawwpn_flag x%x\n", 385 wwn_to_u64(vport->fc_portname.u.wwn), 386 wwn_to_u64 387 (vport->fc_sparam.portName.u.wwn), 388 vport->vport_flag, 389 phba->sli4_hba.fawwpn_flag); 390 memcpy(&vport->fc_portname, &vport->fc_sparam.portName, 391 sizeof(struct lpfc_name)); 392 } 393 } 394 395 if (vport->fc_portname.u.wwn[0] == 0) 396 memcpy(&vport->fc_portname, &vport->fc_sparam.portName, 397 sizeof(struct lpfc_name)); 398 else 399 memcpy(&vport->fc_sparam.portName, &vport->fc_portname, 400 sizeof(struct lpfc_name)); 401 } 402 403 /** 404 * lpfc_config_port_post - Perform lpfc initialization after config port 405 * @phba: pointer to lpfc hba data structure. 406 * 407 * This routine will do LPFC initialization after the CONFIG_PORT mailbox 408 * command call. It performs all internal resource and state setups on the 409 * port: post IOCB buffers, enable appropriate host interrupt attentions, 410 * ELS ring timers, etc. 411 * 412 * Return codes 413 * 0 - success. 414 * Any other value - error. 415 **/ 416 int 417 lpfc_config_port_post(struct lpfc_hba *phba) 418 { 419 struct lpfc_vport *vport = phba->pport; 420 struct Scsi_Host *shost = lpfc_shost_from_vport(vport); 421 LPFC_MBOXQ_t *pmb; 422 MAILBOX_t *mb; 423 struct lpfc_dmabuf *mp; 424 struct lpfc_sli *psli = &phba->sli; 425 uint32_t status, timeout; 426 int i, j; 427 int rc; 428 429 spin_lock_irq(&phba->hbalock); 430 /* 431 * If the Config port completed correctly the HBA is not 432 * over heated any more. 433 */ 434 if (phba->over_temp_state == HBA_OVER_TEMP) 435 phba->over_temp_state = HBA_NORMAL_TEMP; 436 spin_unlock_irq(&phba->hbalock); 437 438 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 439 if (!pmb) { 440 phba->link_state = LPFC_HBA_ERROR; 441 return -ENOMEM; 442 } 443 mb = &pmb->u.mb; 444 445 /* Get login parameters for NID. */ 446 rc = lpfc_read_sparam(phba, pmb, 0); 447 if (rc) { 448 mempool_free(pmb, phba->mbox_mem_pool); 449 return -ENOMEM; 450 } 451 452 pmb->vport = vport; 453 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) { 454 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 455 "0448 Adapter failed init, mbxCmd x%x " 456 "READ_SPARM mbxStatus x%x\n", 457 mb->mbxCommand, mb->mbxStatus); 458 phba->link_state = LPFC_HBA_ERROR; 459 lpfc_mbox_rsrc_cleanup(phba, pmb, MBOX_THD_UNLOCKED); 460 return -EIO; 461 } 462 463 mp = pmb->ctx_buf; 464 465 /* This dmabuf was allocated by lpfc_read_sparam. The dmabuf is no 466 * longer needed. Prevent unintended ctx_buf access as the mbox is 467 * reused. 468 */ 469 memcpy(&vport->fc_sparam, mp->virt, sizeof (struct serv_parm)); 470 lpfc_mbuf_free(phba, mp->virt, mp->phys); 471 kfree(mp); 472 pmb->ctx_buf = NULL; 473 lpfc_update_vport_wwn(vport); 474 475 /* Update the fc_host data structures with new wwn. */ 476 fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn); 477 fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn); 478 fc_host_max_npiv_vports(shost) = phba->max_vpi; 479 480 /* If no serial number in VPD data, use low 6 bytes of WWNN */ 481 /* This should be consolidated into parse_vpd ? - mr */ 482 if (phba->SerialNumber[0] == 0) { 483 uint8_t *outptr; 484 485 outptr = &vport->fc_nodename.u.s.IEEE[0]; 486 for (i = 0; i < 12; i++) { 487 status = *outptr++; 488 j = ((status & 0xf0) >> 4); 489 if (j <= 9) 490 phba->SerialNumber[i] = 491 (char)((uint8_t) 0x30 + (uint8_t) j); 492 else 493 phba->SerialNumber[i] = 494 (char)((uint8_t) 0x61 + (uint8_t) (j - 10)); 495 i++; 496 j = (status & 0xf); 497 if (j <= 9) 498 phba->SerialNumber[i] = 499 (char)((uint8_t) 0x30 + (uint8_t) j); 500 else 501 phba->SerialNumber[i] = 502 (char)((uint8_t) 0x61 + (uint8_t) (j - 10)); 503 } 504 } 505 506 lpfc_read_config(phba, pmb); 507 pmb->vport = vport; 508 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) { 509 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 510 "0453 Adapter failed to init, mbxCmd x%x " 511 "READ_CONFIG, mbxStatus x%x\n", 512 mb->mbxCommand, mb->mbxStatus); 513 phba->link_state = LPFC_HBA_ERROR; 514 mempool_free( pmb, phba->mbox_mem_pool); 515 return -EIO; 516 } 517 518 /* Check if the port is disabled */ 519 lpfc_sli_read_link_ste(phba); 520 521 /* Reset the DFT_HBA_Q_DEPTH to the max xri */ 522 if (phba->cfg_hba_queue_depth > mb->un.varRdConfig.max_xri) { 523 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 524 "3359 HBA queue depth changed from %d to %d\n", 525 phba->cfg_hba_queue_depth, 526 mb->un.varRdConfig.max_xri); 527 phba->cfg_hba_queue_depth = mb->un.varRdConfig.max_xri; 528 } 529 530 phba->lmt = mb->un.varRdConfig.lmt; 531 532 /* Get the default values for Model Name and Description */ 533 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc); 534 535 phba->link_state = LPFC_LINK_DOWN; 536 537 /* Only process IOCBs on ELS ring till hba_state is READY */ 538 if (psli->sli3_ring[LPFC_EXTRA_RING].sli.sli3.cmdringaddr) 539 psli->sli3_ring[LPFC_EXTRA_RING].flag |= LPFC_STOP_IOCB_EVENT; 540 if (psli->sli3_ring[LPFC_FCP_RING].sli.sli3.cmdringaddr) 541 psli->sli3_ring[LPFC_FCP_RING].flag |= LPFC_STOP_IOCB_EVENT; 542 543 /* Post receive buffers for desired rings */ 544 if (phba->sli_rev != 3) 545 lpfc_post_rcv_buf(phba); 546 547 /* 548 * Configure HBA MSI-X attention conditions to messages if MSI-X mode 549 */ 550 if (phba->intr_type == MSIX) { 551 rc = lpfc_config_msi(phba, pmb); 552 if (rc) { 553 mempool_free(pmb, phba->mbox_mem_pool); 554 return -EIO; 555 } 556 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); 557 if (rc != MBX_SUCCESS) { 558 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 559 "0352 Config MSI mailbox command " 560 "failed, mbxCmd x%x, mbxStatus x%x\n", 561 pmb->u.mb.mbxCommand, 562 pmb->u.mb.mbxStatus); 563 mempool_free(pmb, phba->mbox_mem_pool); 564 return -EIO; 565 } 566 } 567 568 spin_lock_irq(&phba->hbalock); 569 /* Initialize ERATT handling flag */ 570 clear_bit(HBA_ERATT_HANDLED, &phba->hba_flag); 571 572 /* Enable appropriate host interrupts */ 573 if (lpfc_readl(phba->HCregaddr, &status)) { 574 spin_unlock_irq(&phba->hbalock); 575 return -EIO; 576 } 577 status |= HC_MBINT_ENA | HC_ERINT_ENA | HC_LAINT_ENA; 578 if (psli->num_rings > 0) 579 status |= HC_R0INT_ENA; 580 if (psli->num_rings > 1) 581 status |= HC_R1INT_ENA; 582 if (psli->num_rings > 2) 583 status |= HC_R2INT_ENA; 584 if (psli->num_rings > 3) 585 status |= HC_R3INT_ENA; 586 587 if ((phba->cfg_poll & ENABLE_FCP_RING_POLLING) && 588 (phba->cfg_poll & DISABLE_FCP_RING_INT)) 589 status &= ~(HC_R0INT_ENA); 590 591 writel(status, phba->HCregaddr); 592 readl(phba->HCregaddr); /* flush */ 593 spin_unlock_irq(&phba->hbalock); 594 595 /* Set up ring-0 (ELS) timer */ 596 timeout = phba->fc_ratov * 2; 597 mod_timer(&vport->els_tmofunc, 598 jiffies + secs_to_jiffies(timeout)); 599 /* Set up heart beat (HB) timer */ 600 mod_timer(&phba->hb_tmofunc, 601 jiffies + secs_to_jiffies(LPFC_HB_MBOX_INTERVAL)); 602 clear_bit(HBA_HBEAT_INP, &phba->hba_flag); 603 clear_bit(HBA_HBEAT_TMO, &phba->hba_flag); 604 phba->last_completion_time = jiffies; 605 /* Set up error attention (ERATT) polling timer */ 606 mod_timer(&phba->eratt_poll, 607 jiffies + secs_to_jiffies(phba->eratt_poll_interval)); 608 609 if (test_bit(LINK_DISABLED, &phba->hba_flag)) { 610 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 611 "2598 Adapter Link is disabled.\n"); 612 lpfc_down_link(phba, pmb); 613 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl; 614 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT); 615 if ((rc != MBX_SUCCESS) && (rc != MBX_BUSY)) { 616 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 617 "2599 Adapter failed to issue DOWN_LINK" 618 " mbox command rc 0x%x\n", rc); 619 620 mempool_free(pmb, phba->mbox_mem_pool); 621 return -EIO; 622 } 623 } else if (phba->cfg_suppress_link_up == LPFC_INITIALIZE_LINK) { 624 mempool_free(pmb, phba->mbox_mem_pool); 625 rc = phba->lpfc_hba_init_link(phba, MBX_NOWAIT); 626 if (rc) 627 return rc; 628 } 629 /* MBOX buffer will be freed in mbox compl */ 630 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 631 if (!pmb) { 632 phba->link_state = LPFC_HBA_ERROR; 633 return -ENOMEM; 634 } 635 636 lpfc_config_async(phba, pmb, LPFC_ELS_RING); 637 pmb->mbox_cmpl = lpfc_config_async_cmpl; 638 pmb->vport = phba->pport; 639 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT); 640 641 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) { 642 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 643 "0456 Adapter failed to issue " 644 "ASYNCEVT_ENABLE mbox status x%x\n", 645 rc); 646 mempool_free(pmb, phba->mbox_mem_pool); 647 } 648 649 /* Get Option rom version */ 650 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 651 if (!pmb) { 652 phba->link_state = LPFC_HBA_ERROR; 653 return -ENOMEM; 654 } 655 656 lpfc_dump_wakeup_param(phba, pmb); 657 pmb->mbox_cmpl = lpfc_dump_wakeup_param_cmpl; 658 pmb->vport = phba->pport; 659 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT); 660 661 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) { 662 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 663 "0435 Adapter failed " 664 "to get Option ROM version status x%x\n", rc); 665 mempool_free(pmb, phba->mbox_mem_pool); 666 } 667 668 return 0; 669 } 670 671 /** 672 * lpfc_sli4_refresh_params - update driver copy of params. 673 * @phba: Pointer to HBA context object. 674 * 675 * This is called to refresh driver copy of dynamic fields from the 676 * common_get_sli4_parameters descriptor. 677 **/ 678 int 679 lpfc_sli4_refresh_params(struct lpfc_hba *phba) 680 { 681 LPFC_MBOXQ_t *mboxq; 682 struct lpfc_mqe *mqe; 683 struct lpfc_sli4_parameters *mbx_sli4_parameters; 684 int length, rc; 685 686 mboxq = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 687 if (!mboxq) 688 return -ENOMEM; 689 690 mqe = &mboxq->u.mqe; 691 /* Read the port's SLI4 Config Parameters */ 692 length = (sizeof(struct lpfc_mbx_get_sli4_parameters) - 693 sizeof(struct lpfc_sli4_cfg_mhdr)); 694 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON, 695 LPFC_MBOX_OPCODE_GET_SLI4_PARAMETERS, 696 length, LPFC_SLI4_MBX_EMBED); 697 698 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); 699 if (unlikely(rc)) { 700 mempool_free(mboxq, phba->mbox_mem_pool); 701 return rc; 702 } 703 mbx_sli4_parameters = &mqe->un.get_sli4_parameters.sli4_parameters; 704 phba->sli4_hba.pc_sli4_params.mi_cap = 705 bf_get(cfg_mi_ver, mbx_sli4_parameters); 706 707 /* Are we forcing MI off via module parameter? */ 708 if (phba->cfg_enable_mi) 709 phba->sli4_hba.pc_sli4_params.mi_ver = 710 bf_get(cfg_mi_ver, mbx_sli4_parameters); 711 else 712 phba->sli4_hba.pc_sli4_params.mi_ver = 0; 713 714 phba->sli4_hba.pc_sli4_params.cmf = 715 bf_get(cfg_cmf, mbx_sli4_parameters); 716 phba->sli4_hba.pc_sli4_params.pls = 717 bf_get(cfg_pvl, mbx_sli4_parameters); 718 719 mempool_free(mboxq, phba->mbox_mem_pool); 720 return rc; 721 } 722 723 /** 724 * lpfc_hba_init_link - Initialize the FC link 725 * @phba: pointer to lpfc hba data structure. 726 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT 727 * 728 * This routine will issue the INIT_LINK mailbox command call. 729 * It is available to other drivers through the lpfc_hba data 730 * structure for use as a delayed link up mechanism with the 731 * module parameter lpfc_suppress_link_up. 732 * 733 * Return code 734 * 0 - success 735 * Any other value - error 736 **/ 737 static int 738 lpfc_hba_init_link(struct lpfc_hba *phba, uint32_t flag) 739 { 740 return lpfc_hba_init_link_fc_topology(phba, phba->cfg_topology, flag); 741 } 742 743 /** 744 * lpfc_hba_init_link_fc_topology - Initialize FC link with desired topology 745 * @phba: pointer to lpfc hba data structure. 746 * @fc_topology: desired fc topology. 747 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT 748 * 749 * This routine will issue the INIT_LINK mailbox command call. 750 * It is available to other drivers through the lpfc_hba data 751 * structure for use as a delayed link up mechanism with the 752 * module parameter lpfc_suppress_link_up. 753 * 754 * Return code 755 * 0 - success 756 * Any other value - error 757 **/ 758 int 759 lpfc_hba_init_link_fc_topology(struct lpfc_hba *phba, uint32_t fc_topology, 760 uint32_t flag) 761 { 762 struct lpfc_vport *vport = phba->pport; 763 LPFC_MBOXQ_t *pmb; 764 MAILBOX_t *mb; 765 int rc; 766 767 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 768 if (!pmb) { 769 phba->link_state = LPFC_HBA_ERROR; 770 return -ENOMEM; 771 } 772 mb = &pmb->u.mb; 773 pmb->vport = vport; 774 775 if ((phba->cfg_link_speed > LPFC_USER_LINK_SPEED_MAX) || 776 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_1G) && 777 !(phba->lmt & LMT_1Gb)) || 778 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_2G) && 779 !(phba->lmt & LMT_2Gb)) || 780 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_4G) && 781 !(phba->lmt & LMT_4Gb)) || 782 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_8G) && 783 !(phba->lmt & LMT_8Gb)) || 784 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_10G) && 785 !(phba->lmt & LMT_10Gb)) || 786 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_16G) && 787 !(phba->lmt & LMT_16Gb)) || 788 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_32G) && 789 !(phba->lmt & LMT_32Gb)) || 790 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_64G) && 791 !(phba->lmt & LMT_64Gb))) { 792 /* Reset link speed to auto */ 793 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 794 "1302 Invalid speed for this board:%d " 795 "Reset link speed to auto.\n", 796 phba->cfg_link_speed); 797 phba->cfg_link_speed = LPFC_USER_LINK_SPEED_AUTO; 798 } 799 lpfc_init_link(phba, pmb, fc_topology, phba->cfg_link_speed); 800 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl; 801 if (phba->sli_rev < LPFC_SLI_REV4) 802 lpfc_set_loopback_flag(phba); 803 rc = lpfc_sli_issue_mbox(phba, pmb, flag); 804 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) { 805 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 806 "0498 Adapter failed to init, mbxCmd x%x " 807 "INIT_LINK, mbxStatus x%x\n", 808 mb->mbxCommand, mb->mbxStatus); 809 if (phba->sli_rev <= LPFC_SLI_REV3) { 810 /* Clear all interrupt enable conditions */ 811 writel(0, phba->HCregaddr); 812 readl(phba->HCregaddr); /* flush */ 813 /* Clear all pending interrupts */ 814 writel(0xffffffff, phba->HAregaddr); 815 readl(phba->HAregaddr); /* flush */ 816 } 817 phba->link_state = LPFC_HBA_ERROR; 818 if (rc != MBX_BUSY || flag == MBX_POLL) 819 mempool_free(pmb, phba->mbox_mem_pool); 820 return -EIO; 821 } 822 phba->cfg_suppress_link_up = LPFC_INITIALIZE_LINK; 823 if (flag == MBX_POLL) 824 mempool_free(pmb, phba->mbox_mem_pool); 825 826 return 0; 827 } 828 829 /** 830 * lpfc_hba_down_link - this routine downs the FC link 831 * @phba: pointer to lpfc hba data structure. 832 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT 833 * 834 * This routine will issue the DOWN_LINK mailbox command call. 835 * It is available to other drivers through the lpfc_hba data 836 * structure for use to stop the link. 837 * 838 * Return code 839 * 0 - success 840 * Any other value - error 841 **/ 842 static int 843 lpfc_hba_down_link(struct lpfc_hba *phba, uint32_t flag) 844 { 845 LPFC_MBOXQ_t *pmb; 846 int rc; 847 848 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 849 if (!pmb) { 850 phba->link_state = LPFC_HBA_ERROR; 851 return -ENOMEM; 852 } 853 854 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 855 "0491 Adapter Link is disabled.\n"); 856 lpfc_down_link(phba, pmb); 857 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl; 858 rc = lpfc_sli_issue_mbox(phba, pmb, flag); 859 if ((rc != MBX_SUCCESS) && (rc != MBX_BUSY)) { 860 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 861 "2522 Adapter failed to issue DOWN_LINK" 862 " mbox command rc 0x%x\n", rc); 863 864 mempool_free(pmb, phba->mbox_mem_pool); 865 return -EIO; 866 } 867 if (flag == MBX_POLL) 868 mempool_free(pmb, phba->mbox_mem_pool); 869 870 return 0; 871 } 872 873 /** 874 * lpfc_hba_down_prep - Perform lpfc uninitialization prior to HBA reset 875 * @phba: pointer to lpfc HBA data structure. 876 * 877 * This routine will do LPFC uninitialization before the HBA is reset when 878 * bringing down the SLI Layer. 879 * 880 * Return codes 881 * 0 - success. 882 * Any other value - error. 883 **/ 884 int 885 lpfc_hba_down_prep(struct lpfc_hba *phba) 886 { 887 struct lpfc_vport **vports; 888 int i; 889 890 if (phba->sli_rev <= LPFC_SLI_REV3) { 891 /* Disable interrupts */ 892 writel(0, phba->HCregaddr); 893 readl(phba->HCregaddr); /* flush */ 894 } 895 896 if (test_bit(FC_UNLOADING, &phba->pport->load_flag)) 897 lpfc_cleanup_discovery_resources(phba->pport); 898 else { 899 vports = lpfc_create_vport_work_array(phba); 900 if (vports != NULL) 901 for (i = 0; i <= phba->max_vports && 902 vports[i] != NULL; i++) 903 lpfc_cleanup_discovery_resources(vports[i]); 904 lpfc_destroy_vport_work_array(phba, vports); 905 } 906 return 0; 907 } 908 909 /** 910 * lpfc_sli4_free_sp_events - Cleanup sp_queue_events to free 911 * rspiocb which got deferred 912 * 913 * @phba: pointer to lpfc HBA data structure. 914 * 915 * This routine will cleanup completed slow path events after HBA is reset 916 * when bringing down the SLI Layer. 917 * 918 * 919 * Return codes 920 * void. 921 **/ 922 static void 923 lpfc_sli4_free_sp_events(struct lpfc_hba *phba) 924 { 925 struct lpfc_iocbq *rspiocbq; 926 struct hbq_dmabuf *dmabuf; 927 struct lpfc_cq_event *cq_event; 928 929 clear_bit(HBA_SP_QUEUE_EVT, &phba->hba_flag); 930 931 while (!list_empty(&phba->sli4_hba.sp_queue_event)) { 932 /* Get the response iocb from the head of work queue */ 933 spin_lock_irq(&phba->hbalock); 934 list_remove_head(&phba->sli4_hba.sp_queue_event, 935 cq_event, struct lpfc_cq_event, list); 936 spin_unlock_irq(&phba->hbalock); 937 938 switch (bf_get(lpfc_wcqe_c_code, &cq_event->cqe.wcqe_cmpl)) { 939 case CQE_CODE_COMPL_WQE: 940 rspiocbq = container_of(cq_event, struct lpfc_iocbq, 941 cq_event); 942 lpfc_sli_release_iocbq(phba, rspiocbq); 943 break; 944 case CQE_CODE_RECEIVE: 945 case CQE_CODE_RECEIVE_V1: 946 dmabuf = container_of(cq_event, struct hbq_dmabuf, 947 cq_event); 948 lpfc_in_buf_free(phba, &dmabuf->dbuf); 949 } 950 } 951 } 952 953 /** 954 * lpfc_hba_free_post_buf - Perform lpfc uninitialization after HBA reset 955 * @phba: pointer to lpfc HBA data structure. 956 * 957 * This routine will cleanup posted ELS buffers after the HBA is reset 958 * when bringing down the SLI Layer. 959 * 960 * 961 * Return codes 962 * void. 963 **/ 964 static void 965 lpfc_hba_free_post_buf(struct lpfc_hba *phba) 966 { 967 struct lpfc_sli *psli = &phba->sli; 968 struct lpfc_sli_ring *pring; 969 struct lpfc_dmabuf *mp, *next_mp; 970 LIST_HEAD(buflist); 971 int count; 972 973 if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED) 974 lpfc_sli_hbqbuf_free_all(phba); 975 else { 976 /* Cleanup preposted buffers on the ELS ring */ 977 pring = &psli->sli3_ring[LPFC_ELS_RING]; 978 spin_lock_irq(&phba->hbalock); 979 list_splice_init(&pring->postbufq, &buflist); 980 spin_unlock_irq(&phba->hbalock); 981 982 count = 0; 983 list_for_each_entry_safe(mp, next_mp, &buflist, list) { 984 list_del(&mp->list); 985 count++; 986 lpfc_mbuf_free(phba, mp->virt, mp->phys); 987 kfree(mp); 988 } 989 990 spin_lock_irq(&phba->hbalock); 991 pring->postbufq_cnt -= count; 992 spin_unlock_irq(&phba->hbalock); 993 } 994 } 995 996 /** 997 * lpfc_hba_clean_txcmplq - Perform lpfc uninitialization after HBA reset 998 * @phba: pointer to lpfc HBA data structure. 999 * 1000 * This routine will cleanup the txcmplq after the HBA is reset when bringing 1001 * down the SLI Layer. 1002 * 1003 * Return codes 1004 * void 1005 **/ 1006 static void 1007 lpfc_hba_clean_txcmplq(struct lpfc_hba *phba) 1008 { 1009 struct lpfc_sli *psli = &phba->sli; 1010 struct lpfc_queue *qp = NULL; 1011 struct lpfc_sli_ring *pring; 1012 LIST_HEAD(completions); 1013 int i; 1014 struct lpfc_iocbq *piocb, *next_iocb; 1015 1016 if (phba->sli_rev != LPFC_SLI_REV4) { 1017 for (i = 0; i < psli->num_rings; i++) { 1018 pring = &psli->sli3_ring[i]; 1019 spin_lock_irq(&phba->hbalock); 1020 /* At this point in time the HBA is either reset or DOA 1021 * Nothing should be on txcmplq as it will 1022 * NEVER complete. 1023 */ 1024 list_splice_init(&pring->txcmplq, &completions); 1025 pring->txcmplq_cnt = 0; 1026 spin_unlock_irq(&phba->hbalock); 1027 1028 lpfc_sli_abort_iocb_ring(phba, pring); 1029 } 1030 /* Cancel all the IOCBs from the completions list */ 1031 lpfc_sli_cancel_iocbs(phba, &completions, 1032 IOSTAT_LOCAL_REJECT, IOERR_SLI_ABORTED); 1033 return; 1034 } 1035 list_for_each_entry(qp, &phba->sli4_hba.lpfc_wq_list, wq_list) { 1036 pring = qp->pring; 1037 if (!pring) 1038 continue; 1039 spin_lock_irq(&pring->ring_lock); 1040 list_for_each_entry_safe(piocb, next_iocb, 1041 &pring->txcmplq, list) 1042 piocb->cmd_flag &= ~LPFC_IO_ON_TXCMPLQ; 1043 list_splice_init(&pring->txcmplq, &completions); 1044 pring->txcmplq_cnt = 0; 1045 spin_unlock_irq(&pring->ring_lock); 1046 lpfc_sli_abort_iocb_ring(phba, pring); 1047 } 1048 /* Cancel all the IOCBs from the completions list */ 1049 lpfc_sli_cancel_iocbs(phba, &completions, 1050 IOSTAT_LOCAL_REJECT, IOERR_SLI_ABORTED); 1051 } 1052 1053 /** 1054 * lpfc_hba_down_post_s3 - Perform lpfc uninitialization after HBA reset 1055 * @phba: pointer to lpfc HBA data structure. 1056 * 1057 * This routine will do uninitialization after the HBA is reset when bring 1058 * down the SLI Layer. 1059 * 1060 * Return codes 1061 * 0 - success. 1062 * Any other value - error. 1063 **/ 1064 static int 1065 lpfc_hba_down_post_s3(struct lpfc_hba *phba) 1066 { 1067 lpfc_hba_free_post_buf(phba); 1068 lpfc_hba_clean_txcmplq(phba); 1069 return 0; 1070 } 1071 1072 /** 1073 * lpfc_hba_down_post_s4 - Perform lpfc uninitialization after HBA reset 1074 * @phba: pointer to lpfc HBA data structure. 1075 * 1076 * This routine will do uninitialization after the HBA is reset when bring 1077 * down the SLI Layer. 1078 * 1079 * Return codes 1080 * 0 - success. 1081 * Any other value - error. 1082 **/ 1083 static int 1084 lpfc_hba_down_post_s4(struct lpfc_hba *phba) 1085 { 1086 struct lpfc_io_buf *psb, *psb_next; 1087 struct lpfc_async_xchg_ctx *ctxp, *ctxp_next; 1088 struct lpfc_sli4_hdw_queue *qp; 1089 LIST_HEAD(aborts); 1090 LIST_HEAD(nvme_aborts); 1091 LIST_HEAD(nvmet_aborts); 1092 struct lpfc_sglq *sglq_entry = NULL; 1093 int cnt, idx; 1094 1095 1096 lpfc_sli_hbqbuf_free_all(phba); 1097 lpfc_hba_clean_txcmplq(phba); 1098 1099 /* At this point in time the HBA is either reset or DOA. Either 1100 * way, nothing should be on lpfc_abts_els_sgl_list, it needs to be 1101 * on the lpfc_els_sgl_list so that it can either be freed if the 1102 * driver is unloading or reposted if the driver is restarting 1103 * the port. 1104 */ 1105 1106 /* sgl_list_lock required because worker thread uses this 1107 * list. 1108 */ 1109 spin_lock_irq(&phba->sli4_hba.sgl_list_lock); 1110 list_for_each_entry(sglq_entry, 1111 &phba->sli4_hba.lpfc_abts_els_sgl_list, list) 1112 sglq_entry->state = SGL_FREED; 1113 1114 list_splice_init(&phba->sli4_hba.lpfc_abts_els_sgl_list, 1115 &phba->sli4_hba.lpfc_els_sgl_list); 1116 1117 1118 spin_unlock_irq(&phba->sli4_hba.sgl_list_lock); 1119 1120 /* abts_xxxx_buf_list_lock required because worker thread uses this 1121 * list. 1122 */ 1123 spin_lock_irq(&phba->hbalock); 1124 cnt = 0; 1125 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { 1126 qp = &phba->sli4_hba.hdwq[idx]; 1127 1128 spin_lock(&qp->abts_io_buf_list_lock); 1129 list_splice_init(&qp->lpfc_abts_io_buf_list, 1130 &aborts); 1131 1132 list_for_each_entry_safe(psb, psb_next, &aborts, list) { 1133 psb->pCmd = NULL; 1134 psb->status = IOSTAT_SUCCESS; 1135 cnt++; 1136 } 1137 spin_lock(&qp->io_buf_list_put_lock); 1138 list_splice_init(&aborts, &qp->lpfc_io_buf_list_put); 1139 qp->put_io_bufs += qp->abts_scsi_io_bufs; 1140 qp->put_io_bufs += qp->abts_nvme_io_bufs; 1141 qp->abts_scsi_io_bufs = 0; 1142 qp->abts_nvme_io_bufs = 0; 1143 spin_unlock(&qp->io_buf_list_put_lock); 1144 spin_unlock(&qp->abts_io_buf_list_lock); 1145 } 1146 spin_unlock_irq(&phba->hbalock); 1147 1148 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 1149 spin_lock_irq(&phba->sli4_hba.abts_nvmet_buf_list_lock); 1150 list_splice_init(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list, 1151 &nvmet_aborts); 1152 spin_unlock_irq(&phba->sli4_hba.abts_nvmet_buf_list_lock); 1153 list_for_each_entry_safe(ctxp, ctxp_next, &nvmet_aborts, list) { 1154 ctxp->flag &= ~(LPFC_NVME_XBUSY | LPFC_NVME_ABORT_OP); 1155 lpfc_nvmet_ctxbuf_post(phba, ctxp->ctxbuf); 1156 } 1157 } 1158 1159 lpfc_sli4_free_sp_events(phba); 1160 return cnt; 1161 } 1162 1163 /** 1164 * lpfc_hba_down_post - Wrapper func for hba down post routine 1165 * @phba: pointer to lpfc HBA data structure. 1166 * 1167 * This routine wraps the actual SLI3 or SLI4 routine for performing 1168 * uninitialization after the HBA is reset when bring down the SLI Layer. 1169 * 1170 * Return codes 1171 * 0 - success. 1172 * Any other value - error. 1173 **/ 1174 int 1175 lpfc_hba_down_post(struct lpfc_hba *phba) 1176 { 1177 return (*phba->lpfc_hba_down_post)(phba); 1178 } 1179 1180 /** 1181 * lpfc_hb_timeout - The HBA-timer timeout handler 1182 * @t: timer context used to obtain the pointer to lpfc hba data structure. 1183 * 1184 * This is the HBA-timer timeout handler registered to the lpfc driver. When 1185 * this timer fires, a HBA timeout event shall be posted to the lpfc driver 1186 * work-port-events bitmap and the worker thread is notified. This timeout 1187 * event will be used by the worker thread to invoke the actual timeout 1188 * handler routine, lpfc_hb_timeout_handler. Any periodical operations will 1189 * be performed in the timeout handler and the HBA timeout event bit shall 1190 * be cleared by the worker thread after it has taken the event bitmap out. 1191 **/ 1192 static void 1193 lpfc_hb_timeout(struct timer_list *t) 1194 { 1195 struct lpfc_hba *phba; 1196 uint32_t tmo_posted; 1197 unsigned long iflag; 1198 1199 phba = timer_container_of(phba, t, hb_tmofunc); 1200 1201 /* Check for heart beat timeout conditions */ 1202 spin_lock_irqsave(&phba->pport->work_port_lock, iflag); 1203 tmo_posted = phba->pport->work_port_events & WORKER_HB_TMO; 1204 if (!tmo_posted) 1205 phba->pport->work_port_events |= WORKER_HB_TMO; 1206 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag); 1207 1208 /* Tell the worker thread there is work to do */ 1209 if (!tmo_posted) 1210 lpfc_worker_wake_up(phba); 1211 return; 1212 } 1213 1214 /** 1215 * lpfc_rrq_timeout - The RRQ-timer timeout handler 1216 * @t: timer context used to obtain the pointer to lpfc hba data structure. 1217 * 1218 * This is the RRQ-timer timeout handler registered to the lpfc driver. When 1219 * this timer fires, a RRQ timeout event shall be posted to the lpfc driver 1220 * work-port-events bitmap and the worker thread is notified. This timeout 1221 * event will be used by the worker thread to invoke the actual timeout 1222 * handler routine, lpfc_rrq_handler. Any periodical operations will 1223 * be performed in the timeout handler and the RRQ timeout event bit shall 1224 * be cleared by the worker thread after it has taken the event bitmap out. 1225 **/ 1226 static void 1227 lpfc_rrq_timeout(struct timer_list *t) 1228 { 1229 struct lpfc_hba *phba; 1230 1231 phba = timer_container_of(phba, t, rrq_tmr); 1232 if (test_bit(FC_UNLOADING, &phba->pport->load_flag)) { 1233 clear_bit(HBA_RRQ_ACTIVE, &phba->hba_flag); 1234 return; 1235 } 1236 1237 set_bit(HBA_RRQ_ACTIVE, &phba->hba_flag); 1238 lpfc_worker_wake_up(phba); 1239 } 1240 1241 /** 1242 * lpfc_hb_mbox_cmpl - The lpfc heart-beat mailbox command callback function 1243 * @phba: pointer to lpfc hba data structure. 1244 * @pmboxq: pointer to the driver internal queue element for mailbox command. 1245 * 1246 * This is the callback function to the lpfc heart-beat mailbox command. 1247 * If configured, the lpfc driver issues the heart-beat mailbox command to 1248 * the HBA every LPFC_HB_MBOX_INTERVAL (current 5) seconds. At the time the 1249 * heart-beat mailbox command is issued, the driver shall set up heart-beat 1250 * timeout timer to LPFC_HB_MBOX_TIMEOUT (current 30) seconds and marks 1251 * heart-beat outstanding state. Once the mailbox command comes back and 1252 * no error conditions detected, the heart-beat mailbox command timer is 1253 * reset to LPFC_HB_MBOX_INTERVAL seconds and the heart-beat outstanding 1254 * state is cleared for the next heart-beat. If the timer expired with the 1255 * heart-beat outstanding state set, the driver will put the HBA offline. 1256 **/ 1257 static void 1258 lpfc_hb_mbox_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq) 1259 { 1260 clear_bit(HBA_HBEAT_INP, &phba->hba_flag); 1261 clear_bit(HBA_HBEAT_TMO, &phba->hba_flag); 1262 1263 /* Check and reset heart-beat timer if necessary */ 1264 mempool_free(pmboxq, phba->mbox_mem_pool); 1265 if (!test_bit(FC_OFFLINE_MODE, &phba->pport->fc_flag) && 1266 !(phba->link_state == LPFC_HBA_ERROR) && 1267 !test_bit(FC_UNLOADING, &phba->pport->load_flag)) 1268 mod_timer(&phba->hb_tmofunc, 1269 jiffies + 1270 secs_to_jiffies(LPFC_HB_MBOX_INTERVAL)); 1271 return; 1272 } 1273 1274 /* 1275 * lpfc_idle_stat_delay_work - idle_stat tracking 1276 * 1277 * This routine tracks per-eq idle_stat and determines polling decisions. 1278 * 1279 * Return codes: 1280 * None 1281 **/ 1282 static void 1283 lpfc_idle_stat_delay_work(struct work_struct *work) 1284 { 1285 struct lpfc_hba *phba = container_of(to_delayed_work(work), 1286 struct lpfc_hba, 1287 idle_stat_delay_work); 1288 struct lpfc_queue *eq; 1289 struct lpfc_sli4_hdw_queue *hdwq; 1290 struct lpfc_idle_stat *idle_stat; 1291 u32 i, idle_percent; 1292 u64 wall, wall_idle, diff_wall, diff_idle, busy_time; 1293 1294 if (test_bit(FC_UNLOADING, &phba->pport->load_flag)) 1295 return; 1296 1297 if (phba->link_state == LPFC_HBA_ERROR || 1298 test_bit(FC_OFFLINE_MODE, &phba->pport->fc_flag) || 1299 phba->cmf_active_mode != LPFC_CFG_OFF) 1300 goto requeue; 1301 1302 for_each_present_cpu(i) { 1303 hdwq = &phba->sli4_hba.hdwq[phba->sli4_hba.cpu_map[i].hdwq]; 1304 eq = hdwq->hba_eq; 1305 1306 /* Skip if we've already handled this eq's primary CPU */ 1307 if (eq->chann != i) 1308 continue; 1309 1310 idle_stat = &phba->sli4_hba.idle_stat[i]; 1311 1312 /* get_cpu_idle_time returns values as running counters. Thus, 1313 * to know the amount for this period, the prior counter values 1314 * need to be subtracted from the current counter values. 1315 * From there, the idle time stat can be calculated as a 1316 * percentage of 100 - the sum of the other consumption times. 1317 */ 1318 wall_idle = get_cpu_idle_time(i, &wall, 1); 1319 diff_idle = wall_idle - idle_stat->prev_idle; 1320 diff_wall = wall - idle_stat->prev_wall; 1321 1322 if (diff_wall <= diff_idle) 1323 busy_time = 0; 1324 else 1325 busy_time = diff_wall - diff_idle; 1326 1327 idle_percent = div64_u64(100 * busy_time, diff_wall); 1328 idle_percent = 100 - idle_percent; 1329 1330 if (idle_percent < 15) 1331 eq->poll_mode = LPFC_QUEUE_WORK; 1332 else 1333 eq->poll_mode = LPFC_THREADED_IRQ; 1334 1335 idle_stat->prev_idle = wall_idle; 1336 idle_stat->prev_wall = wall; 1337 } 1338 1339 requeue: 1340 schedule_delayed_work(&phba->idle_stat_delay_work, 1341 msecs_to_jiffies(LPFC_IDLE_STAT_DELAY)); 1342 } 1343 1344 static void 1345 lpfc_hb_eq_delay_work(struct work_struct *work) 1346 { 1347 struct lpfc_hba *phba = container_of(to_delayed_work(work), 1348 struct lpfc_hba, eq_delay_work); 1349 struct lpfc_eq_intr_info *eqi, *eqi_new; 1350 struct lpfc_queue *eq, *eq_next; 1351 unsigned char *ena_delay = NULL; 1352 uint32_t usdelay; 1353 int i; 1354 1355 if (!phba->cfg_auto_imax || 1356 test_bit(FC_UNLOADING, &phba->pport->load_flag)) 1357 return; 1358 1359 if (phba->link_state == LPFC_HBA_ERROR || 1360 test_bit(FC_OFFLINE_MODE, &phba->pport->fc_flag)) 1361 goto requeue; 1362 1363 ena_delay = kcalloc(phba->sli4_hba.num_possible_cpu, sizeof(*ena_delay), 1364 GFP_KERNEL); 1365 if (!ena_delay) 1366 goto requeue; 1367 1368 for (i = 0; i < phba->cfg_irq_chann; i++) { 1369 /* Get the EQ corresponding to the IRQ vector */ 1370 eq = phba->sli4_hba.hba_eq_hdl[i].eq; 1371 if (!eq) 1372 continue; 1373 if (eq->q_mode || eq->q_flag & HBA_EQ_DELAY_CHK) { 1374 eq->q_flag &= ~HBA_EQ_DELAY_CHK; 1375 ena_delay[eq->last_cpu] = 1; 1376 } 1377 } 1378 1379 for_each_present_cpu(i) { 1380 eqi = per_cpu_ptr(phba->sli4_hba.eq_info, i); 1381 if (ena_delay[i]) { 1382 usdelay = (eqi->icnt >> 10) * LPFC_EQ_DELAY_STEP; 1383 if (usdelay > LPFC_MAX_AUTO_EQ_DELAY) 1384 usdelay = LPFC_MAX_AUTO_EQ_DELAY; 1385 } else { 1386 usdelay = 0; 1387 } 1388 1389 eqi->icnt = 0; 1390 1391 list_for_each_entry_safe(eq, eq_next, &eqi->list, cpu_list) { 1392 if (unlikely(eq->last_cpu != i)) { 1393 eqi_new = per_cpu_ptr(phba->sli4_hba.eq_info, 1394 eq->last_cpu); 1395 list_move_tail(&eq->cpu_list, &eqi_new->list); 1396 continue; 1397 } 1398 if (usdelay != eq->q_mode) 1399 lpfc_modify_hba_eq_delay(phba, eq->hdwq, 1, 1400 usdelay); 1401 } 1402 } 1403 1404 kfree(ena_delay); 1405 1406 requeue: 1407 queue_delayed_work(phba->wq, &phba->eq_delay_work, 1408 msecs_to_jiffies(LPFC_EQ_DELAY_MSECS)); 1409 } 1410 1411 /** 1412 * lpfc_hb_mxp_handler - Multi-XRI pools handler to adjust XRI distribution 1413 * @phba: pointer to lpfc hba data structure. 1414 * 1415 * For each heartbeat, this routine does some heuristic methods to adjust 1416 * XRI distribution. The goal is to fully utilize free XRIs. 1417 **/ 1418 static void lpfc_hb_mxp_handler(struct lpfc_hba *phba) 1419 { 1420 u32 i; 1421 u32 hwq_count; 1422 1423 hwq_count = phba->cfg_hdw_queue; 1424 for (i = 0; i < hwq_count; i++) { 1425 /* Adjust XRIs in private pool */ 1426 lpfc_adjust_pvt_pool_count(phba, i); 1427 1428 /* Adjust high watermark */ 1429 lpfc_adjust_high_watermark(phba, i); 1430 1431 #ifdef LPFC_MXP_STAT 1432 /* Snapshot pbl, pvt and busy count */ 1433 lpfc_snapshot_mxp(phba, i); 1434 #endif 1435 } 1436 } 1437 1438 /** 1439 * lpfc_issue_hb_mbox - Issues heart-beat mailbox command 1440 * @phba: pointer to lpfc hba data structure. 1441 * 1442 * If a HB mbox is not already in progrees, this routine will allocate 1443 * a LPFC_MBOXQ_t, populate it with a MBX_HEARTBEAT (0x31) command, 1444 * and issue it. The HBA_HBEAT_INP flag means the command is in progress. 1445 **/ 1446 int 1447 lpfc_issue_hb_mbox(struct lpfc_hba *phba) 1448 { 1449 LPFC_MBOXQ_t *pmboxq; 1450 int retval; 1451 1452 /* Is a Heartbeat mbox already in progress */ 1453 if (test_bit(HBA_HBEAT_INP, &phba->hba_flag)) 1454 return 0; 1455 1456 pmboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 1457 if (!pmboxq) 1458 return -ENOMEM; 1459 1460 lpfc_heart_beat(phba, pmboxq); 1461 pmboxq->mbox_cmpl = lpfc_hb_mbox_cmpl; 1462 pmboxq->vport = phba->pport; 1463 retval = lpfc_sli_issue_mbox(phba, pmboxq, MBX_NOWAIT); 1464 1465 if (retval != MBX_BUSY && retval != MBX_SUCCESS) { 1466 mempool_free(pmboxq, phba->mbox_mem_pool); 1467 return -ENXIO; 1468 } 1469 set_bit(HBA_HBEAT_INP, &phba->hba_flag); 1470 1471 return 0; 1472 } 1473 1474 /** 1475 * lpfc_issue_hb_tmo - Signals heartbeat timer to issue mbox command 1476 * @phba: pointer to lpfc hba data structure. 1477 * 1478 * The heartbeat timer (every 5 sec) will fire. If the HBA_HBEAT_TMO 1479 * flag is set, it will force a MBX_HEARTBEAT mbox command, regardless 1480 * of the value of lpfc_enable_hba_heartbeat. 1481 * If lpfc_enable_hba_heartbeat is set, the timeout routine will always 1482 * try to issue a MBX_HEARTBEAT mbox command. 1483 **/ 1484 void 1485 lpfc_issue_hb_tmo(struct lpfc_hba *phba) 1486 { 1487 if (phba->cfg_enable_hba_heartbeat) 1488 return; 1489 set_bit(HBA_HBEAT_TMO, &phba->hba_flag); 1490 } 1491 1492 /** 1493 * lpfc_hb_timeout_handler - The HBA-timer timeout handler 1494 * @phba: pointer to lpfc hba data structure. 1495 * 1496 * This is the actual HBA-timer timeout handler to be invoked by the worker 1497 * thread whenever the HBA timer fired and HBA-timeout event posted. This 1498 * handler performs any periodic operations needed for the device. If such 1499 * periodic event has already been attended to either in the interrupt handler 1500 * or by processing slow-ring or fast-ring events within the HBA-timer 1501 * timeout window (LPFC_HB_MBOX_INTERVAL), this handler just simply resets 1502 * the timer for the next timeout period. If lpfc heart-beat mailbox command 1503 * is configured and there is no heart-beat mailbox command outstanding, a 1504 * heart-beat mailbox is issued and timer set properly. Otherwise, if there 1505 * has been a heart-beat mailbox command outstanding, the HBA shall be put 1506 * to offline. 1507 **/ 1508 void 1509 lpfc_hb_timeout_handler(struct lpfc_hba *phba) 1510 { 1511 struct lpfc_vport **vports; 1512 struct lpfc_dmabuf *buf_ptr; 1513 int retval = 0; 1514 int i, tmo; 1515 struct lpfc_sli *psli = &phba->sli; 1516 LIST_HEAD(completions); 1517 1518 if (phba->cfg_xri_rebalancing) { 1519 /* Multi-XRI pools handler */ 1520 lpfc_hb_mxp_handler(phba); 1521 } 1522 1523 vports = lpfc_create_vport_work_array(phba); 1524 if (vports != NULL) 1525 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) { 1526 lpfc_rcv_seq_check_edtov(vports[i]); 1527 lpfc_fdmi_change_check(vports[i]); 1528 } 1529 lpfc_destroy_vport_work_array(phba, vports); 1530 1531 if (phba->link_state == LPFC_HBA_ERROR || 1532 test_bit(FC_UNLOADING, &phba->pport->load_flag) || 1533 test_bit(FC_OFFLINE_MODE, &phba->pport->fc_flag)) 1534 return; 1535 1536 if (phba->elsbuf_cnt && 1537 (phba->elsbuf_cnt == phba->elsbuf_prev_cnt)) { 1538 spin_lock_irq(&phba->hbalock); 1539 list_splice_init(&phba->elsbuf, &completions); 1540 phba->elsbuf_cnt = 0; 1541 phba->elsbuf_prev_cnt = 0; 1542 spin_unlock_irq(&phba->hbalock); 1543 1544 while (!list_empty(&completions)) { 1545 list_remove_head(&completions, buf_ptr, 1546 struct lpfc_dmabuf, list); 1547 lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys); 1548 kfree(buf_ptr); 1549 } 1550 } 1551 phba->elsbuf_prev_cnt = phba->elsbuf_cnt; 1552 1553 /* If there is no heart beat outstanding, issue a heartbeat command */ 1554 if (phba->cfg_enable_hba_heartbeat) { 1555 /* If IOs are completing, no need to issue a MBX_HEARTBEAT */ 1556 spin_lock_irq(&phba->pport->work_port_lock); 1557 if (time_after(phba->last_completion_time + 1558 secs_to_jiffies(LPFC_HB_MBOX_INTERVAL), 1559 jiffies)) { 1560 spin_unlock_irq(&phba->pport->work_port_lock); 1561 if (test_bit(HBA_HBEAT_INP, &phba->hba_flag)) 1562 tmo = (1000 * LPFC_HB_MBOX_TIMEOUT); 1563 else 1564 tmo = (1000 * LPFC_HB_MBOX_INTERVAL); 1565 goto out; 1566 } 1567 spin_unlock_irq(&phba->pport->work_port_lock); 1568 1569 /* Check if a MBX_HEARTBEAT is already in progress */ 1570 if (test_bit(HBA_HBEAT_INP, &phba->hba_flag)) { 1571 /* 1572 * If heart beat timeout called with HBA_HBEAT_INP set 1573 * we need to give the hb mailbox cmd a chance to 1574 * complete or TMO. 1575 */ 1576 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 1577 "0459 Adapter heartbeat still outstanding: " 1578 "last compl time was %d ms.\n", 1579 jiffies_to_msecs(jiffies 1580 - phba->last_completion_time)); 1581 tmo = (1000 * LPFC_HB_MBOX_TIMEOUT); 1582 } else { 1583 if ((!(psli->sli_flag & LPFC_SLI_MBOX_ACTIVE)) && 1584 (list_empty(&psli->mboxq))) { 1585 1586 retval = lpfc_issue_hb_mbox(phba); 1587 if (retval) { 1588 tmo = (1000 * LPFC_HB_MBOX_INTERVAL); 1589 goto out; 1590 } 1591 phba->skipped_hb = 0; 1592 } else if (time_before_eq(phba->last_completion_time, 1593 phba->skipped_hb)) { 1594 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 1595 "2857 Last completion time not " 1596 " updated in %d ms\n", 1597 jiffies_to_msecs(jiffies 1598 - phba->last_completion_time)); 1599 } else 1600 phba->skipped_hb = jiffies; 1601 1602 tmo = (1000 * LPFC_HB_MBOX_TIMEOUT); 1603 goto out; 1604 } 1605 } else { 1606 /* Check to see if we want to force a MBX_HEARTBEAT */ 1607 if (test_bit(HBA_HBEAT_TMO, &phba->hba_flag)) { 1608 retval = lpfc_issue_hb_mbox(phba); 1609 if (retval) 1610 tmo = (1000 * LPFC_HB_MBOX_INTERVAL); 1611 else 1612 tmo = (1000 * LPFC_HB_MBOX_TIMEOUT); 1613 goto out; 1614 } 1615 tmo = (1000 * LPFC_HB_MBOX_INTERVAL); 1616 } 1617 out: 1618 mod_timer(&phba->hb_tmofunc, jiffies + msecs_to_jiffies(tmo)); 1619 } 1620 1621 /** 1622 * lpfc_offline_eratt - Bring lpfc offline on hardware error attention 1623 * @phba: pointer to lpfc hba data structure. 1624 * 1625 * This routine is called to bring the HBA offline when HBA hardware error 1626 * other than Port Error 6 has been detected. 1627 **/ 1628 static void 1629 lpfc_offline_eratt(struct lpfc_hba *phba) 1630 { 1631 struct lpfc_sli *psli = &phba->sli; 1632 1633 spin_lock_irq(&phba->hbalock); 1634 psli->sli_flag &= ~LPFC_SLI_ACTIVE; 1635 spin_unlock_irq(&phba->hbalock); 1636 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT); 1637 1638 lpfc_offline(phba); 1639 lpfc_reset_barrier(phba); 1640 spin_lock_irq(&phba->hbalock); 1641 lpfc_sli_brdreset(phba); 1642 spin_unlock_irq(&phba->hbalock); 1643 lpfc_hba_down_post(phba); 1644 lpfc_sli_brdready(phba, HS_MBRDY); 1645 lpfc_unblock_mgmt_io(phba); 1646 phba->link_state = LPFC_HBA_ERROR; 1647 return; 1648 } 1649 1650 /** 1651 * lpfc_sli4_offline_eratt - Bring lpfc offline on SLI4 hardware error attention 1652 * @phba: pointer to lpfc hba data structure. 1653 * 1654 * This routine is called to bring a SLI4 HBA offline when HBA hardware error 1655 * other than Port Error 6 has been detected. 1656 **/ 1657 void 1658 lpfc_sli4_offline_eratt(struct lpfc_hba *phba) 1659 { 1660 spin_lock_irq(&phba->hbalock); 1661 if (phba->link_state == LPFC_HBA_ERROR && 1662 test_bit(HBA_PCI_ERR, &phba->bit_flags)) { 1663 spin_unlock_irq(&phba->hbalock); 1664 return; 1665 } 1666 phba->link_state = LPFC_HBA_ERROR; 1667 spin_unlock_irq(&phba->hbalock); 1668 1669 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT); 1670 lpfc_sli_flush_io_rings(phba); 1671 lpfc_offline(phba); 1672 lpfc_hba_down_post(phba); 1673 lpfc_unblock_mgmt_io(phba); 1674 } 1675 1676 /** 1677 * lpfc_handle_deferred_eratt - The HBA hardware deferred error handler 1678 * @phba: pointer to lpfc hba data structure. 1679 * 1680 * This routine is invoked to handle the deferred HBA hardware error 1681 * conditions. This type of error is indicated by HBA by setting ER1 1682 * and another ER bit in the host status register. The driver will 1683 * wait until the ER1 bit clears before handling the error condition. 1684 **/ 1685 static void 1686 lpfc_handle_deferred_eratt(struct lpfc_hba *phba) 1687 { 1688 uint32_t old_host_status = phba->work_hs; 1689 struct lpfc_sli *psli = &phba->sli; 1690 1691 /* If the pci channel is offline, ignore possible errors, 1692 * since we cannot communicate with the pci card anyway. 1693 */ 1694 if (pci_channel_offline(phba->pcidev)) { 1695 clear_bit(DEFER_ERATT, &phba->hba_flag); 1696 return; 1697 } 1698 1699 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 1700 "0479 Deferred Adapter Hardware Error " 1701 "Data: x%x x%x x%x\n", 1702 phba->work_hs, phba->work_status[0], 1703 phba->work_status[1]); 1704 1705 spin_lock_irq(&phba->hbalock); 1706 psli->sli_flag &= ~LPFC_SLI_ACTIVE; 1707 spin_unlock_irq(&phba->hbalock); 1708 1709 1710 /* 1711 * Firmware stops when it triggred erratt. That could cause the I/Os 1712 * dropped by the firmware. Error iocb (I/O) on txcmplq and let the 1713 * SCSI layer retry it after re-establishing link. 1714 */ 1715 lpfc_sli_abort_fcp_rings(phba); 1716 1717 /* 1718 * There was a firmware error. Take the hba offline and then 1719 * attempt to restart it. 1720 */ 1721 lpfc_offline_prep(phba, LPFC_MBX_WAIT); 1722 lpfc_offline(phba); 1723 1724 /* Wait for the ER1 bit to clear.*/ 1725 while (phba->work_hs & HS_FFER1) { 1726 msleep(100); 1727 if (lpfc_readl(phba->HSregaddr, &phba->work_hs)) { 1728 phba->work_hs = UNPLUG_ERR ; 1729 break; 1730 } 1731 /* If driver is unloading let the worker thread continue */ 1732 if (test_bit(FC_UNLOADING, &phba->pport->load_flag)) { 1733 phba->work_hs = 0; 1734 break; 1735 } 1736 } 1737 1738 /* 1739 * This is to ptrotect against a race condition in which 1740 * first write to the host attention register clear the 1741 * host status register. 1742 */ 1743 if (!phba->work_hs && !test_bit(FC_UNLOADING, &phba->pport->load_flag)) 1744 phba->work_hs = old_host_status & ~HS_FFER1; 1745 1746 clear_bit(DEFER_ERATT, &phba->hba_flag); 1747 phba->work_status[0] = readl(phba->MBslimaddr + 0xa8); 1748 phba->work_status[1] = readl(phba->MBslimaddr + 0xac); 1749 } 1750 1751 static void 1752 lpfc_board_errevt_to_mgmt(struct lpfc_hba *phba) 1753 { 1754 struct lpfc_board_event_header board_event; 1755 struct Scsi_Host *shost; 1756 1757 board_event.event_type = FC_REG_BOARD_EVENT; 1758 board_event.subcategory = LPFC_EVENT_PORTINTERR; 1759 shost = lpfc_shost_from_vport(phba->pport); 1760 fc_host_post_vendor_event(shost, fc_get_event_number(), 1761 sizeof(board_event), 1762 (char *) &board_event, 1763 LPFC_NL_VENDOR_ID); 1764 } 1765 1766 /** 1767 * lpfc_handle_eratt_s3 - The SLI3 HBA hardware error handler 1768 * @phba: pointer to lpfc hba data structure. 1769 * 1770 * This routine is invoked to handle the following HBA hardware error 1771 * conditions: 1772 * 1 - HBA error attention interrupt 1773 * 2 - DMA ring index out of range 1774 * 3 - Mailbox command came back as unknown 1775 **/ 1776 static void 1777 lpfc_handle_eratt_s3(struct lpfc_hba *phba) 1778 { 1779 struct lpfc_vport *vport = phba->pport; 1780 struct lpfc_sli *psli = &phba->sli; 1781 uint32_t event_data; 1782 unsigned long temperature; 1783 struct temp_event temp_event_data; 1784 struct Scsi_Host *shost; 1785 1786 /* If the pci channel is offline, ignore possible errors, 1787 * since we cannot communicate with the pci card anyway. 1788 */ 1789 if (pci_channel_offline(phba->pcidev)) { 1790 clear_bit(DEFER_ERATT, &phba->hba_flag); 1791 return; 1792 } 1793 1794 /* If resets are disabled then leave the HBA alone and return */ 1795 if (!phba->cfg_enable_hba_reset) 1796 return; 1797 1798 /* Send an internal error event to mgmt application */ 1799 lpfc_board_errevt_to_mgmt(phba); 1800 1801 if (test_bit(DEFER_ERATT, &phba->hba_flag)) 1802 lpfc_handle_deferred_eratt(phba); 1803 1804 if ((phba->work_hs & HS_FFER6) || (phba->work_hs & HS_FFER8)) { 1805 if (phba->work_hs & HS_FFER6) 1806 /* Re-establishing Link */ 1807 lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT, 1808 "1301 Re-establishing Link " 1809 "Data: x%x x%x x%x\n", 1810 phba->work_hs, phba->work_status[0], 1811 phba->work_status[1]); 1812 if (phba->work_hs & HS_FFER8) 1813 /* Device Zeroization */ 1814 lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT, 1815 "2861 Host Authentication device " 1816 "zeroization Data:x%x x%x x%x\n", 1817 phba->work_hs, phba->work_status[0], 1818 phba->work_status[1]); 1819 1820 spin_lock_irq(&phba->hbalock); 1821 psli->sli_flag &= ~LPFC_SLI_ACTIVE; 1822 spin_unlock_irq(&phba->hbalock); 1823 1824 /* 1825 * Firmware stops when it triggled erratt with HS_FFER6. 1826 * That could cause the I/Os dropped by the firmware. 1827 * Error iocb (I/O) on txcmplq and let the SCSI layer 1828 * retry it after re-establishing link. 1829 */ 1830 lpfc_sli_abort_fcp_rings(phba); 1831 1832 /* 1833 * There was a firmware error. Take the hba offline and then 1834 * attempt to restart it. 1835 */ 1836 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT); 1837 lpfc_offline(phba); 1838 lpfc_sli_brdrestart(phba); 1839 if (lpfc_online(phba) == 0) { /* Initialize the HBA */ 1840 lpfc_unblock_mgmt_io(phba); 1841 return; 1842 } 1843 lpfc_unblock_mgmt_io(phba); 1844 } else if (phba->work_hs & HS_CRIT_TEMP) { 1845 temperature = readl(phba->MBslimaddr + TEMPERATURE_OFFSET); 1846 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT; 1847 temp_event_data.event_code = LPFC_CRIT_TEMP; 1848 temp_event_data.data = (uint32_t)temperature; 1849 1850 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 1851 "0406 Adapter maximum temperature exceeded " 1852 "(%ld), taking this port offline " 1853 "Data: x%x x%x x%x\n", 1854 temperature, phba->work_hs, 1855 phba->work_status[0], phba->work_status[1]); 1856 1857 shost = lpfc_shost_from_vport(phba->pport); 1858 fc_host_post_vendor_event(shost, fc_get_event_number(), 1859 sizeof(temp_event_data), 1860 (char *) &temp_event_data, 1861 SCSI_NL_VID_TYPE_PCI 1862 | PCI_VENDOR_ID_EMULEX); 1863 1864 spin_lock_irq(&phba->hbalock); 1865 phba->over_temp_state = HBA_OVER_TEMP; 1866 spin_unlock_irq(&phba->hbalock); 1867 lpfc_offline_eratt(phba); 1868 1869 } else { 1870 /* The if clause above forces this code path when the status 1871 * failure is a value other than FFER6. Do not call the offline 1872 * twice. This is the adapter hardware error path. 1873 */ 1874 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 1875 "0457 Adapter Hardware Error " 1876 "Data: x%x x%x x%x\n", 1877 phba->work_hs, 1878 phba->work_status[0], phba->work_status[1]); 1879 1880 event_data = FC_REG_DUMP_EVENT; 1881 shost = lpfc_shost_from_vport(vport); 1882 fc_host_post_vendor_event(shost, fc_get_event_number(), 1883 sizeof(event_data), (char *) &event_data, 1884 SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX); 1885 1886 lpfc_offline_eratt(phba); 1887 } 1888 return; 1889 } 1890 1891 /** 1892 * lpfc_sli4_port_sta_fn_reset - The SLI4 function reset due to port status reg 1893 * @phba: pointer to lpfc hba data structure. 1894 * @mbx_action: flag for mailbox shutdown action. 1895 * @en_rn_msg: send reset/port recovery message. 1896 * This routine is invoked to perform an SLI4 port PCI function reset in 1897 * response to port status register polling attention. It waits for port 1898 * status register (ERR, RDY, RN) bits before proceeding with function reset. 1899 * During this process, interrupt vectors are freed and later requested 1900 * for handling possible port resource change. 1901 **/ 1902 static int 1903 lpfc_sli4_port_sta_fn_reset(struct lpfc_hba *phba, int mbx_action, 1904 bool en_rn_msg) 1905 { 1906 int rc; 1907 uint32_t intr_mode; 1908 LPFC_MBOXQ_t *mboxq; 1909 1910 /* Notifying the transport that the targets are going offline. */ 1911 lpfc_scsi_dev_block(phba); 1912 1913 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) >= 1914 LPFC_SLI_INTF_IF_TYPE_2) { 1915 /* 1916 * On error status condition, driver need to wait for port 1917 * ready before performing reset. 1918 */ 1919 rc = lpfc_sli4_pdev_status_reg_wait(phba); 1920 if (rc) 1921 return rc; 1922 } 1923 1924 /* need reset: attempt for port recovery */ 1925 if (en_rn_msg) 1926 lpfc_printf_log(phba, KERN_ERR, LOG_SLI, 1927 "2887 Reset Needed: Attempting Port " 1928 "Recovery...\n"); 1929 1930 /* If we are no wait, the HBA has been reset and is not 1931 * functional, thus we should clear 1932 * (LPFC_SLI_ACTIVE | LPFC_SLI_MBOX_ACTIVE) flags. 1933 */ 1934 if (mbx_action == LPFC_MBX_NO_WAIT) { 1935 spin_lock_irq(&phba->hbalock); 1936 phba->sli.sli_flag &= ~LPFC_SLI_ACTIVE; 1937 if (phba->sli.mbox_active) { 1938 mboxq = phba->sli.mbox_active; 1939 mboxq->u.mb.mbxStatus = MBX_NOT_FINISHED; 1940 __lpfc_mbox_cmpl_put(phba, mboxq); 1941 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE; 1942 phba->sli.mbox_active = NULL; 1943 } 1944 spin_unlock_irq(&phba->hbalock); 1945 } 1946 1947 lpfc_offline_prep(phba, mbx_action); 1948 lpfc_sli_flush_io_rings(phba); 1949 lpfc_nvmels_flush_cmd(phba); 1950 lpfc_offline(phba); 1951 /* release interrupt for possible resource change */ 1952 lpfc_sli4_disable_intr(phba); 1953 rc = lpfc_sli_brdrestart(phba); 1954 if (rc) { 1955 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 1956 "6309 Failed to restart board\n"); 1957 return rc; 1958 } 1959 /* request and enable interrupt */ 1960 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode); 1961 if (intr_mode == LPFC_INTR_ERROR) { 1962 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 1963 "3175 Failed to enable interrupt\n"); 1964 return -EIO; 1965 } 1966 phba->intr_mode = intr_mode; 1967 rc = lpfc_online(phba); 1968 if (rc == 0) 1969 lpfc_unblock_mgmt_io(phba); 1970 1971 return rc; 1972 } 1973 1974 /** 1975 * lpfc_handle_eratt_s4 - The SLI4 HBA hardware error handler 1976 * @phba: pointer to lpfc hba data structure. 1977 * 1978 * This routine is invoked to handle the SLI4 HBA hardware error attention 1979 * conditions. 1980 **/ 1981 static void 1982 lpfc_handle_eratt_s4(struct lpfc_hba *phba) 1983 { 1984 struct lpfc_vport *vport = phba->pport; 1985 uint32_t event_data; 1986 struct Scsi_Host *shost; 1987 uint32_t if_type; 1988 struct lpfc_register portstat_reg = {0}; 1989 uint32_t reg_err1, reg_err2; 1990 uint32_t uerrlo_reg, uemasklo_reg; 1991 uint32_t smphr_port_status = 0, pci_rd_rc1, pci_rd_rc2; 1992 bool en_rn_msg = true; 1993 struct temp_event temp_event_data; 1994 struct lpfc_register portsmphr_reg; 1995 int rc, i; 1996 1997 /* If the pci channel is offline, ignore possible errors, since 1998 * we cannot communicate with the pci card anyway. 1999 */ 2000 if (pci_channel_offline(phba->pcidev)) { 2001 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 2002 "3166 pci channel is offline\n"); 2003 lpfc_sli_flush_io_rings(phba); 2004 return; 2005 } 2006 2007 memset(&portsmphr_reg, 0, sizeof(portsmphr_reg)); 2008 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf); 2009 switch (if_type) { 2010 case LPFC_SLI_INTF_IF_TYPE_0: 2011 pci_rd_rc1 = lpfc_readl( 2012 phba->sli4_hba.u.if_type0.UERRLOregaddr, 2013 &uerrlo_reg); 2014 pci_rd_rc2 = lpfc_readl( 2015 phba->sli4_hba.u.if_type0.UEMASKLOregaddr, 2016 &uemasklo_reg); 2017 /* consider PCI bus read error as pci_channel_offline */ 2018 if (pci_rd_rc1 == -EIO && pci_rd_rc2 == -EIO) 2019 return; 2020 if (!test_bit(HBA_RECOVERABLE_UE, &phba->hba_flag)) { 2021 lpfc_sli4_offline_eratt(phba); 2022 return; 2023 } 2024 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 2025 "7623 Checking UE recoverable"); 2026 2027 for (i = 0; i < phba->sli4_hba.ue_to_sr / 1000; i++) { 2028 if (lpfc_readl(phba->sli4_hba.PSMPHRregaddr, 2029 &portsmphr_reg.word0)) 2030 continue; 2031 2032 smphr_port_status = bf_get(lpfc_port_smphr_port_status, 2033 &portsmphr_reg); 2034 if ((smphr_port_status & LPFC_PORT_SEM_MASK) == 2035 LPFC_PORT_SEM_UE_RECOVERABLE) 2036 break; 2037 /*Sleep for 1Sec, before checking SEMAPHORE */ 2038 msleep(1000); 2039 } 2040 2041 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 2042 "4827 smphr_port_status x%x : Waited %dSec", 2043 smphr_port_status, i); 2044 2045 /* Recoverable UE, reset the HBA device */ 2046 if ((smphr_port_status & LPFC_PORT_SEM_MASK) == 2047 LPFC_PORT_SEM_UE_RECOVERABLE) { 2048 for (i = 0; i < 20; i++) { 2049 msleep(1000); 2050 if (!lpfc_readl(phba->sli4_hba.PSMPHRregaddr, 2051 &portsmphr_reg.word0) && 2052 (LPFC_POST_STAGE_PORT_READY == 2053 bf_get(lpfc_port_smphr_port_status, 2054 &portsmphr_reg))) { 2055 rc = lpfc_sli4_port_sta_fn_reset(phba, 2056 LPFC_MBX_NO_WAIT, en_rn_msg); 2057 if (rc == 0) 2058 return; 2059 lpfc_printf_log(phba, KERN_ERR, 2060 LOG_TRACE_EVENT, 2061 "4215 Failed to recover UE"); 2062 break; 2063 } 2064 } 2065 } 2066 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 2067 "7624 Firmware not ready: Failing UE recovery," 2068 " waited %dSec", i); 2069 phba->link_state = LPFC_HBA_ERROR; 2070 break; 2071 2072 case LPFC_SLI_INTF_IF_TYPE_2: 2073 case LPFC_SLI_INTF_IF_TYPE_6: 2074 pci_rd_rc1 = lpfc_readl( 2075 phba->sli4_hba.u.if_type2.STATUSregaddr, 2076 &portstat_reg.word0); 2077 /* consider PCI bus read error as pci_channel_offline */ 2078 if (pci_rd_rc1 == -EIO) { 2079 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 2080 "3151 PCI bus read access failure: x%x\n", 2081 readl(phba->sli4_hba.u.if_type2.STATUSregaddr)); 2082 lpfc_sli4_offline_eratt(phba); 2083 return; 2084 } 2085 reg_err1 = readl(phba->sli4_hba.u.if_type2.ERR1regaddr); 2086 reg_err2 = readl(phba->sli4_hba.u.if_type2.ERR2regaddr); 2087 if (bf_get(lpfc_sliport_status_oti, &portstat_reg)) { 2088 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 2089 "2889 Port Overtemperature event, " 2090 "taking port offline Data: x%x x%x\n", 2091 reg_err1, reg_err2); 2092 2093 phba->sfp_alarm |= LPFC_TRANSGRESSION_HIGH_TEMPERATURE; 2094 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT; 2095 temp_event_data.event_code = LPFC_CRIT_TEMP; 2096 temp_event_data.data = 0xFFFFFFFF; 2097 2098 shost = lpfc_shost_from_vport(phba->pport); 2099 fc_host_post_vendor_event(shost, fc_get_event_number(), 2100 sizeof(temp_event_data), 2101 (char *)&temp_event_data, 2102 SCSI_NL_VID_TYPE_PCI 2103 | PCI_VENDOR_ID_EMULEX); 2104 2105 spin_lock_irq(&phba->hbalock); 2106 phba->over_temp_state = HBA_OVER_TEMP; 2107 spin_unlock_irq(&phba->hbalock); 2108 lpfc_sli4_offline_eratt(phba); 2109 return; 2110 } 2111 if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 && 2112 reg_err2 == SLIPORT_ERR2_REG_FW_RESTART) { 2113 lpfc_printf_log(phba, KERN_ERR, LOG_SLI, 2114 "3143 Port Down: Firmware Update " 2115 "Detected\n"); 2116 en_rn_msg = false; 2117 } else if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 && 2118 reg_err2 == SLIPORT_ERR2_REG_FORCED_DUMP) 2119 lpfc_printf_log(phba, KERN_ERR, LOG_SLI, 2120 "3144 Port Down: Debug Dump\n"); 2121 else if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 && 2122 reg_err2 == SLIPORT_ERR2_REG_FUNC_PROVISON) 2123 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 2124 "3145 Port Down: Provisioning\n"); 2125 2126 /* If resets are disabled then leave the HBA alone and return */ 2127 if (!phba->cfg_enable_hba_reset) 2128 return; 2129 2130 /* Check port status register for function reset */ 2131 rc = lpfc_sli4_port_sta_fn_reset(phba, LPFC_MBX_NO_WAIT, 2132 en_rn_msg); 2133 if (rc == 0) { 2134 /* don't report event on forced debug dump */ 2135 if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 && 2136 reg_err2 == SLIPORT_ERR2_REG_FORCED_DUMP) 2137 return; 2138 else 2139 break; 2140 } 2141 /* fall through for not able to recover */ 2142 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 2143 "3152 Unrecoverable error\n"); 2144 lpfc_sli4_offline_eratt(phba); 2145 break; 2146 case LPFC_SLI_INTF_IF_TYPE_1: 2147 default: 2148 break; 2149 } 2150 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 2151 "3123 Report dump event to upper layer\n"); 2152 /* Send an internal error event to mgmt application */ 2153 lpfc_board_errevt_to_mgmt(phba); 2154 2155 event_data = FC_REG_DUMP_EVENT; 2156 shost = lpfc_shost_from_vport(vport); 2157 fc_host_post_vendor_event(shost, fc_get_event_number(), 2158 sizeof(event_data), (char *) &event_data, 2159 SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX); 2160 } 2161 2162 /** 2163 * lpfc_handle_eratt - Wrapper func for handling hba error attention 2164 * @phba: pointer to lpfc HBA data structure. 2165 * 2166 * This routine wraps the actual SLI3 or SLI4 hba error attention handling 2167 * routine from the API jump table function pointer from the lpfc_hba struct. 2168 * 2169 * Return codes 2170 * 0 - success. 2171 * Any other value - error. 2172 **/ 2173 void 2174 lpfc_handle_eratt(struct lpfc_hba *phba) 2175 { 2176 (*phba->lpfc_handle_eratt)(phba); 2177 } 2178 2179 /** 2180 * lpfc_handle_latt - The HBA link event handler 2181 * @phba: pointer to lpfc hba data structure. 2182 * 2183 * This routine is invoked from the worker thread to handle a HBA host 2184 * attention link event. SLI3 only. 2185 **/ 2186 void 2187 lpfc_handle_latt(struct lpfc_hba *phba) 2188 { 2189 struct lpfc_vport *vport = phba->pport; 2190 struct lpfc_sli *psli = &phba->sli; 2191 LPFC_MBOXQ_t *pmb; 2192 volatile uint32_t control; 2193 int rc = 0; 2194 2195 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 2196 if (!pmb) { 2197 rc = 1; 2198 goto lpfc_handle_latt_err_exit; 2199 } 2200 2201 rc = lpfc_mbox_rsrc_prep(phba, pmb); 2202 if (rc) { 2203 rc = 2; 2204 mempool_free(pmb, phba->mbox_mem_pool); 2205 goto lpfc_handle_latt_err_exit; 2206 } 2207 2208 /* Cleanup any outstanding ELS commands */ 2209 lpfc_els_flush_all_cmd(phba); 2210 psli->slistat.link_event++; 2211 lpfc_read_topology(phba, pmb, pmb->ctx_buf); 2212 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology; 2213 pmb->vport = vport; 2214 /* Block ELS IOCBs until we have processed this mbox command */ 2215 phba->sli.sli3_ring[LPFC_ELS_RING].flag |= LPFC_STOP_IOCB_EVENT; 2216 rc = lpfc_sli_issue_mbox (phba, pmb, MBX_NOWAIT); 2217 if (rc == MBX_NOT_FINISHED) { 2218 rc = 4; 2219 goto lpfc_handle_latt_free_mbuf; 2220 } 2221 2222 /* Clear Link Attention in HA REG */ 2223 spin_lock_irq(&phba->hbalock); 2224 writel(HA_LATT, phba->HAregaddr); 2225 readl(phba->HAregaddr); /* flush */ 2226 spin_unlock_irq(&phba->hbalock); 2227 2228 return; 2229 2230 lpfc_handle_latt_free_mbuf: 2231 phba->sli.sli3_ring[LPFC_ELS_RING].flag &= ~LPFC_STOP_IOCB_EVENT; 2232 lpfc_mbox_rsrc_cleanup(phba, pmb, MBOX_THD_UNLOCKED); 2233 lpfc_handle_latt_err_exit: 2234 /* Enable Link attention interrupts */ 2235 spin_lock_irq(&phba->hbalock); 2236 psli->sli_flag |= LPFC_PROCESS_LA; 2237 control = readl(phba->HCregaddr); 2238 control |= HC_LAINT_ENA; 2239 writel(control, phba->HCregaddr); 2240 readl(phba->HCregaddr); /* flush */ 2241 2242 /* Clear Link Attention in HA REG */ 2243 writel(HA_LATT, phba->HAregaddr); 2244 readl(phba->HAregaddr); /* flush */ 2245 spin_unlock_irq(&phba->hbalock); 2246 lpfc_linkdown(phba); 2247 phba->link_state = LPFC_HBA_ERROR; 2248 2249 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 2250 "0300 LATT: Cannot issue READ_LA: Data:%d\n", rc); 2251 2252 return; 2253 } 2254 2255 static void 2256 lpfc_fill_vpd(struct lpfc_hba *phba, uint8_t *vpd, int length, int *pindex) 2257 { 2258 int i, j; 2259 2260 while (length > 0) { 2261 /* Look for Serial Number */ 2262 if ((vpd[*pindex] == 'S') && (vpd[*pindex + 1] == 'N')) { 2263 *pindex += 2; 2264 i = vpd[*pindex]; 2265 *pindex += 1; 2266 j = 0; 2267 length -= (3+i); 2268 while (i--) { 2269 phba->SerialNumber[j++] = vpd[(*pindex)++]; 2270 if (j == 31) 2271 break; 2272 } 2273 phba->SerialNumber[j] = 0; 2274 continue; 2275 } else if ((vpd[*pindex] == 'V') && (vpd[*pindex + 1] == '1')) { 2276 phba->vpd_flag |= VPD_MODEL_DESC; 2277 *pindex += 2; 2278 i = vpd[*pindex]; 2279 *pindex += 1; 2280 j = 0; 2281 length -= (3+i); 2282 while (i--) { 2283 phba->ModelDesc[j++] = vpd[(*pindex)++]; 2284 if (j == 255) 2285 break; 2286 } 2287 phba->ModelDesc[j] = 0; 2288 continue; 2289 } else if ((vpd[*pindex] == 'V') && (vpd[*pindex + 1] == '2')) { 2290 phba->vpd_flag |= VPD_MODEL_NAME; 2291 *pindex += 2; 2292 i = vpd[*pindex]; 2293 *pindex += 1; 2294 j = 0; 2295 length -= (3+i); 2296 while (i--) { 2297 phba->ModelName[j++] = vpd[(*pindex)++]; 2298 if (j == 79) 2299 break; 2300 } 2301 phba->ModelName[j] = 0; 2302 continue; 2303 } else if ((vpd[*pindex] == 'V') && (vpd[*pindex + 1] == '3')) { 2304 phba->vpd_flag |= VPD_PROGRAM_TYPE; 2305 *pindex += 2; 2306 i = vpd[*pindex]; 2307 *pindex += 1; 2308 j = 0; 2309 length -= (3+i); 2310 while (i--) { 2311 phba->ProgramType[j++] = vpd[(*pindex)++]; 2312 if (j == 255) 2313 break; 2314 } 2315 phba->ProgramType[j] = 0; 2316 continue; 2317 } else if ((vpd[*pindex] == 'V') && (vpd[*pindex + 1] == '4')) { 2318 phba->vpd_flag |= VPD_PORT; 2319 *pindex += 2; 2320 i = vpd[*pindex]; 2321 *pindex += 1; 2322 j = 0; 2323 length -= (3 + i); 2324 while (i--) { 2325 if ((phba->sli_rev == LPFC_SLI_REV4) && 2326 (phba->sli4_hba.pport_name_sta == 2327 LPFC_SLI4_PPNAME_GET)) { 2328 j++; 2329 (*pindex)++; 2330 } else 2331 phba->Port[j++] = vpd[(*pindex)++]; 2332 if (j == 19) 2333 break; 2334 } 2335 if ((phba->sli_rev != LPFC_SLI_REV4) || 2336 (phba->sli4_hba.pport_name_sta == 2337 LPFC_SLI4_PPNAME_NON)) 2338 phba->Port[j] = 0; 2339 continue; 2340 } else { 2341 *pindex += 2; 2342 i = vpd[*pindex]; 2343 *pindex += 1; 2344 *pindex += i; 2345 length -= (3 + i); 2346 } 2347 } 2348 } 2349 2350 /** 2351 * lpfc_parse_vpd - Parse VPD (Vital Product Data) 2352 * @phba: pointer to lpfc hba data structure. 2353 * @vpd: pointer to the vital product data. 2354 * @len: length of the vital product data in bytes. 2355 * 2356 * This routine parses the Vital Product Data (VPD). The VPD is treated as 2357 * an array of characters. In this routine, the ModelName, ProgramType, and 2358 * ModelDesc, etc. fields of the phba data structure will be populated. 2359 * 2360 * Return codes 2361 * 0 - pointer to the VPD passed in is NULL 2362 * 1 - success 2363 **/ 2364 int 2365 lpfc_parse_vpd(struct lpfc_hba *phba, uint8_t *vpd, int len) 2366 { 2367 uint8_t lenlo, lenhi; 2368 int Length; 2369 int i; 2370 int finished = 0; 2371 int index = 0; 2372 2373 if (!vpd) 2374 return 0; 2375 2376 /* Vital Product */ 2377 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 2378 "0455 Vital Product Data: x%x x%x x%x x%x\n", 2379 (uint32_t) vpd[0], (uint32_t) vpd[1], (uint32_t) vpd[2], 2380 (uint32_t) vpd[3]); 2381 while (!finished && (index < (len - 4))) { 2382 switch (vpd[index]) { 2383 case 0x82: 2384 case 0x91: 2385 index += 1; 2386 lenlo = vpd[index]; 2387 index += 1; 2388 lenhi = vpd[index]; 2389 index += 1; 2390 i = ((((unsigned short)lenhi) << 8) + lenlo); 2391 index += i; 2392 break; 2393 case 0x90: 2394 index += 1; 2395 lenlo = vpd[index]; 2396 index += 1; 2397 lenhi = vpd[index]; 2398 index += 1; 2399 Length = ((((unsigned short)lenhi) << 8) + lenlo); 2400 if (Length > len - index) 2401 Length = len - index; 2402 2403 lpfc_fill_vpd(phba, vpd, Length, &index); 2404 finished = 0; 2405 break; 2406 case 0x78: 2407 finished = 1; 2408 break; 2409 default: 2410 index ++; 2411 break; 2412 } 2413 } 2414 2415 return(1); 2416 } 2417 2418 /** 2419 * lpfc_get_atto_model_desc - Retrieve ATTO HBA device model name and description 2420 * @phba: pointer to lpfc hba data structure. 2421 * @mdp: pointer to the data structure to hold the derived model name. 2422 * @descp: pointer to the data structure to hold the derived description. 2423 * 2424 * This routine retrieves HBA's description based on its registered PCI device 2425 * ID. The @descp passed into this function points to an array of 256 chars. It 2426 * shall be returned with the model name, maximum speed, and the host bus type. 2427 * The @mdp passed into this function points to an array of 80 chars. When the 2428 * function returns, the @mdp will be filled with the model name. 2429 **/ 2430 static void 2431 lpfc_get_atto_model_desc(struct lpfc_hba *phba, uint8_t *mdp, uint8_t *descp) 2432 { 2433 uint16_t sub_dev_id = phba->pcidev->subsystem_device; 2434 char *model = "<Unknown>"; 2435 int tbolt = 0; 2436 2437 switch (sub_dev_id) { 2438 case PCI_DEVICE_ID_CLRY_161E: 2439 model = "161E"; 2440 break; 2441 case PCI_DEVICE_ID_CLRY_162E: 2442 model = "162E"; 2443 break; 2444 case PCI_DEVICE_ID_CLRY_164E: 2445 model = "164E"; 2446 break; 2447 case PCI_DEVICE_ID_CLRY_161P: 2448 model = "161P"; 2449 break; 2450 case PCI_DEVICE_ID_CLRY_162P: 2451 model = "162P"; 2452 break; 2453 case PCI_DEVICE_ID_CLRY_164P: 2454 model = "164P"; 2455 break; 2456 case PCI_DEVICE_ID_CLRY_321E: 2457 model = "321E"; 2458 break; 2459 case PCI_DEVICE_ID_CLRY_322E: 2460 model = "322E"; 2461 break; 2462 case PCI_DEVICE_ID_CLRY_324E: 2463 model = "324E"; 2464 break; 2465 case PCI_DEVICE_ID_CLRY_321P: 2466 model = "321P"; 2467 break; 2468 case PCI_DEVICE_ID_CLRY_322P: 2469 model = "322P"; 2470 break; 2471 case PCI_DEVICE_ID_CLRY_324P: 2472 model = "324P"; 2473 break; 2474 case PCI_DEVICE_ID_TLFC_2XX2: 2475 model = "2XX2"; 2476 tbolt = 1; 2477 break; 2478 case PCI_DEVICE_ID_TLFC_3162: 2479 model = "3162"; 2480 tbolt = 1; 2481 break; 2482 case PCI_DEVICE_ID_TLFC_3322: 2483 model = "3322"; 2484 tbolt = 1; 2485 break; 2486 default: 2487 model = "Unknown"; 2488 break; 2489 } 2490 2491 if (mdp && mdp[0] == '\0') 2492 snprintf(mdp, 79, "%s", model); 2493 2494 if (descp && descp[0] == '\0') 2495 snprintf(descp, 255, 2496 "ATTO %s%s, Fibre Channel Adapter Initiator, Port %s", 2497 (tbolt) ? "ThunderLink FC " : "Celerity FC-", 2498 model, 2499 phba->Port); 2500 } 2501 2502 /** 2503 * lpfc_get_hba_model_desc - Retrieve HBA device model name and description 2504 * @phba: pointer to lpfc hba data structure. 2505 * @mdp: pointer to the data structure to hold the derived model name. 2506 * @descp: pointer to the data structure to hold the derived description. 2507 * 2508 * This routine retrieves HBA's description based on its registered PCI device 2509 * ID. The @descp passed into this function points to an array of 256 chars. It 2510 * shall be returned with the model name, maximum speed, and the host bus type. 2511 * The @mdp passed into this function points to an array of 80 chars. When the 2512 * function returns, the @mdp will be filled with the model name. 2513 **/ 2514 static void 2515 lpfc_get_hba_model_desc(struct lpfc_hba *phba, uint8_t *mdp, uint8_t *descp) 2516 { 2517 lpfc_vpd_t *vp; 2518 uint16_t dev_id = phba->pcidev->device; 2519 int max_speed; 2520 int GE = 0; 2521 int oneConnect = 0; /* default is not a oneConnect */ 2522 struct { 2523 char *name; 2524 char *bus; 2525 char *function; 2526 } m = {"<Unknown>", "", ""}; 2527 2528 if (mdp && mdp[0] != '\0' 2529 && descp && descp[0] != '\0') 2530 return; 2531 2532 if (phba->pcidev->vendor == PCI_VENDOR_ID_ATTO) { 2533 lpfc_get_atto_model_desc(phba, mdp, descp); 2534 return; 2535 } 2536 2537 if (phba->lmt & LMT_64Gb) 2538 max_speed = 64; 2539 else if (phba->lmt & LMT_32Gb) 2540 max_speed = 32; 2541 else if (phba->lmt & LMT_16Gb) 2542 max_speed = 16; 2543 else if (phba->lmt & LMT_10Gb) 2544 max_speed = 10; 2545 else if (phba->lmt & LMT_8Gb) 2546 max_speed = 8; 2547 else if (phba->lmt & LMT_4Gb) 2548 max_speed = 4; 2549 else if (phba->lmt & LMT_2Gb) 2550 max_speed = 2; 2551 else if (phba->lmt & LMT_1Gb) 2552 max_speed = 1; 2553 else 2554 max_speed = 0; 2555 2556 vp = &phba->vpd; 2557 2558 switch (dev_id) { 2559 case PCI_DEVICE_ID_FIREFLY: 2560 m = (typeof(m)){"LP6000", "PCI", 2561 "Obsolete, Unsupported Fibre Channel Adapter"}; 2562 break; 2563 case PCI_DEVICE_ID_SUPERFLY: 2564 if (vp->rev.biuRev >= 1 && vp->rev.biuRev <= 3) 2565 m = (typeof(m)){"LP7000", "PCI", ""}; 2566 else 2567 m = (typeof(m)){"LP7000E", "PCI", ""}; 2568 m.function = "Obsolete, Unsupported Fibre Channel Adapter"; 2569 break; 2570 case PCI_DEVICE_ID_DRAGONFLY: 2571 m = (typeof(m)){"LP8000", "PCI", 2572 "Obsolete, Unsupported Fibre Channel Adapter"}; 2573 break; 2574 case PCI_DEVICE_ID_CENTAUR: 2575 if (FC_JEDEC_ID(vp->rev.biuRev) == CENTAUR_2G_JEDEC_ID) 2576 m = (typeof(m)){"LP9002", "PCI", ""}; 2577 else 2578 m = (typeof(m)){"LP9000", "PCI", ""}; 2579 m.function = "Obsolete, Unsupported Fibre Channel Adapter"; 2580 break; 2581 case PCI_DEVICE_ID_RFLY: 2582 m = (typeof(m)){"LP952", "PCI", 2583 "Obsolete, Unsupported Fibre Channel Adapter"}; 2584 break; 2585 case PCI_DEVICE_ID_PEGASUS: 2586 m = (typeof(m)){"LP9802", "PCI-X", 2587 "Obsolete, Unsupported Fibre Channel Adapter"}; 2588 break; 2589 case PCI_DEVICE_ID_THOR: 2590 m = (typeof(m)){"LP10000", "PCI-X", 2591 "Obsolete, Unsupported Fibre Channel Adapter"}; 2592 break; 2593 case PCI_DEVICE_ID_VIPER: 2594 m = (typeof(m)){"LPX1000", "PCI-X", 2595 "Obsolete, Unsupported Fibre Channel Adapter"}; 2596 break; 2597 case PCI_DEVICE_ID_PFLY: 2598 m = (typeof(m)){"LP982", "PCI-X", 2599 "Obsolete, Unsupported Fibre Channel Adapter"}; 2600 break; 2601 case PCI_DEVICE_ID_TFLY: 2602 m = (typeof(m)){"LP1050", "PCI-X", 2603 "Obsolete, Unsupported Fibre Channel Adapter"}; 2604 break; 2605 case PCI_DEVICE_ID_HELIOS: 2606 m = (typeof(m)){"LP11000", "PCI-X2", 2607 "Obsolete, Unsupported Fibre Channel Adapter"}; 2608 break; 2609 case PCI_DEVICE_ID_HELIOS_SCSP: 2610 m = (typeof(m)){"LP11000-SP", "PCI-X2", 2611 "Obsolete, Unsupported Fibre Channel Adapter"}; 2612 break; 2613 case PCI_DEVICE_ID_HELIOS_DCSP: 2614 m = (typeof(m)){"LP11002-SP", "PCI-X2", 2615 "Obsolete, Unsupported Fibre Channel Adapter"}; 2616 break; 2617 case PCI_DEVICE_ID_NEPTUNE: 2618 m = (typeof(m)){"LPe1000", "PCIe", 2619 "Obsolete, Unsupported Fibre Channel Adapter"}; 2620 break; 2621 case PCI_DEVICE_ID_NEPTUNE_SCSP: 2622 m = (typeof(m)){"LPe1000-SP", "PCIe", 2623 "Obsolete, Unsupported Fibre Channel Adapter"}; 2624 break; 2625 case PCI_DEVICE_ID_NEPTUNE_DCSP: 2626 m = (typeof(m)){"LPe1002-SP", "PCIe", 2627 "Obsolete, Unsupported Fibre Channel Adapter"}; 2628 break; 2629 case PCI_DEVICE_ID_BMID: 2630 m = (typeof(m)){"LP1150", "PCI-X2", "Fibre Channel Adapter"}; 2631 break; 2632 case PCI_DEVICE_ID_BSMB: 2633 m = (typeof(m)){"LP111", "PCI-X2", 2634 "Obsolete, Unsupported Fibre Channel Adapter"}; 2635 break; 2636 case PCI_DEVICE_ID_ZEPHYR: 2637 m = (typeof(m)){"LPe11000", "PCIe", "Fibre Channel Adapter"}; 2638 break; 2639 case PCI_DEVICE_ID_ZEPHYR_SCSP: 2640 m = (typeof(m)){"LPe11000", "PCIe", "Fibre Channel Adapter"}; 2641 break; 2642 case PCI_DEVICE_ID_ZEPHYR_DCSP: 2643 m = (typeof(m)){"LP2105", "PCIe", "FCoE Adapter"}; 2644 GE = 1; 2645 break; 2646 case PCI_DEVICE_ID_ZMID: 2647 m = (typeof(m)){"LPe1150", "PCIe", "Fibre Channel Adapter"}; 2648 break; 2649 case PCI_DEVICE_ID_ZSMB: 2650 m = (typeof(m)){"LPe111", "PCIe", "Fibre Channel Adapter"}; 2651 break; 2652 case PCI_DEVICE_ID_LP101: 2653 m = (typeof(m)){"LP101", "PCI-X", 2654 "Obsolete, Unsupported Fibre Channel Adapter"}; 2655 break; 2656 case PCI_DEVICE_ID_LP10000S: 2657 m = (typeof(m)){"LP10000-S", "PCI", 2658 "Obsolete, Unsupported Fibre Channel Adapter"}; 2659 break; 2660 case PCI_DEVICE_ID_LP11000S: 2661 m = (typeof(m)){"LP11000-S", "PCI-X2", 2662 "Obsolete, Unsupported Fibre Channel Adapter"}; 2663 break; 2664 case PCI_DEVICE_ID_LPE11000S: 2665 m = (typeof(m)){"LPe11000-S", "PCIe", 2666 "Obsolete, Unsupported Fibre Channel Adapter"}; 2667 break; 2668 case PCI_DEVICE_ID_SAT: 2669 m = (typeof(m)){"LPe12000", "PCIe", "Fibre Channel Adapter"}; 2670 break; 2671 case PCI_DEVICE_ID_SAT_MID: 2672 m = (typeof(m)){"LPe1250", "PCIe", "Fibre Channel Adapter"}; 2673 break; 2674 case PCI_DEVICE_ID_SAT_SMB: 2675 m = (typeof(m)){"LPe121", "PCIe", "Fibre Channel Adapter"}; 2676 break; 2677 case PCI_DEVICE_ID_SAT_DCSP: 2678 m = (typeof(m)){"LPe12002-SP", "PCIe", "Fibre Channel Adapter"}; 2679 break; 2680 case PCI_DEVICE_ID_SAT_SCSP: 2681 m = (typeof(m)){"LPe12000-SP", "PCIe", "Fibre Channel Adapter"}; 2682 break; 2683 case PCI_DEVICE_ID_SAT_S: 2684 m = (typeof(m)){"LPe12000-S", "PCIe", "Fibre Channel Adapter"}; 2685 break; 2686 case PCI_DEVICE_ID_PROTEUS_VF: 2687 m = (typeof(m)){"LPev12000", "PCIe IOV", 2688 "Obsolete, Unsupported Fibre Channel Adapter"}; 2689 break; 2690 case PCI_DEVICE_ID_PROTEUS_PF: 2691 m = (typeof(m)){"LPev12000", "PCIe IOV", 2692 "Obsolete, Unsupported Fibre Channel Adapter"}; 2693 break; 2694 case PCI_DEVICE_ID_PROTEUS_S: 2695 m = (typeof(m)){"LPemv12002-S", "PCIe IOV", 2696 "Obsolete, Unsupported Fibre Channel Adapter"}; 2697 break; 2698 case PCI_DEVICE_ID_TIGERSHARK: 2699 oneConnect = 1; 2700 m = (typeof(m)){"OCe10100", "PCIe", "FCoE"}; 2701 break; 2702 case PCI_DEVICE_ID_TOMCAT: 2703 oneConnect = 1; 2704 m = (typeof(m)){"OCe11100", "PCIe", "FCoE"}; 2705 break; 2706 case PCI_DEVICE_ID_FALCON: 2707 m = (typeof(m)){"LPSe12002-ML1-E", "PCIe", 2708 "EmulexSecure Fibre"}; 2709 break; 2710 case PCI_DEVICE_ID_BALIUS: 2711 m = (typeof(m)){"LPVe12002", "PCIe Shared I/O", 2712 "Obsolete, Unsupported Fibre Channel Adapter"}; 2713 break; 2714 case PCI_DEVICE_ID_LANCER_FC: 2715 m = (typeof(m)){"LPe16000", "PCIe", "Fibre Channel Adapter"}; 2716 break; 2717 case PCI_DEVICE_ID_LANCER_FC_VF: 2718 m = (typeof(m)){"LPe16000", "PCIe", 2719 "Obsolete, Unsupported Fibre Channel Adapter"}; 2720 break; 2721 case PCI_DEVICE_ID_LANCER_FCOE: 2722 oneConnect = 1; 2723 m = (typeof(m)){"OCe15100", "PCIe", "FCoE"}; 2724 break; 2725 case PCI_DEVICE_ID_LANCER_FCOE_VF: 2726 oneConnect = 1; 2727 m = (typeof(m)){"OCe15100", "PCIe", 2728 "Obsolete, Unsupported FCoE"}; 2729 break; 2730 case PCI_DEVICE_ID_LANCER_G6_FC: 2731 m = (typeof(m)){"LPe32000", "PCIe", "Fibre Channel Adapter"}; 2732 break; 2733 case PCI_DEVICE_ID_LANCER_G7_FC: 2734 m = (typeof(m)){"LPe36000", "PCIe", "Fibre Channel Adapter"}; 2735 break; 2736 case PCI_DEVICE_ID_LANCER_G7P_FC: 2737 m = (typeof(m)){"LPe38000", "PCIe", "Fibre Channel Adapter"}; 2738 break; 2739 case PCI_DEVICE_ID_SKYHAWK: 2740 case PCI_DEVICE_ID_SKYHAWK_VF: 2741 oneConnect = 1; 2742 m = (typeof(m)){"OCe14000", "PCIe", "FCoE"}; 2743 break; 2744 default: 2745 m = (typeof(m)){"Unknown", "", ""}; 2746 break; 2747 } 2748 2749 if (mdp && mdp[0] == '\0') 2750 snprintf(mdp, 79,"%s", m.name); 2751 /* 2752 * oneConnect hba requires special processing, they are all initiators 2753 * and we put the port number on the end 2754 */ 2755 if (descp && descp[0] == '\0') { 2756 if (oneConnect) 2757 snprintf(descp, 255, 2758 "Emulex OneConnect %s, %s Initiator %s", 2759 m.name, m.function, 2760 phba->Port); 2761 else if (max_speed == 0) 2762 snprintf(descp, 255, 2763 "Emulex %s %s %s", 2764 m.name, m.bus, m.function); 2765 else 2766 snprintf(descp, 255, 2767 "Emulex %s %d%s %s %s", 2768 m.name, max_speed, (GE) ? "GE" : "Gb", 2769 m.bus, m.function); 2770 } 2771 } 2772 2773 /** 2774 * lpfc_sli3_post_buffer - Post IOCB(s) with DMA buffer descriptor(s) to a IOCB ring 2775 * @phba: pointer to lpfc hba data structure. 2776 * @pring: pointer to a IOCB ring. 2777 * @cnt: the number of IOCBs to be posted to the IOCB ring. 2778 * 2779 * This routine posts a given number of IOCBs with the associated DMA buffer 2780 * descriptors specified by the cnt argument to the given IOCB ring. 2781 * 2782 * Return codes 2783 * The number of IOCBs NOT able to be posted to the IOCB ring. 2784 **/ 2785 int 2786 lpfc_sli3_post_buffer(struct lpfc_hba *phba, struct lpfc_sli_ring *pring, int cnt) 2787 { 2788 IOCB_t *icmd; 2789 struct lpfc_iocbq *iocb; 2790 struct lpfc_dmabuf *mp1, *mp2; 2791 2792 cnt += pring->missbufcnt; 2793 2794 /* While there are buffers to post */ 2795 while (cnt > 0) { 2796 /* Allocate buffer for command iocb */ 2797 iocb = lpfc_sli_get_iocbq(phba); 2798 if (iocb == NULL) { 2799 pring->missbufcnt = cnt; 2800 return cnt; 2801 } 2802 icmd = &iocb->iocb; 2803 2804 /* 2 buffers can be posted per command */ 2805 /* Allocate buffer to post */ 2806 mp1 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL); 2807 if (mp1) 2808 mp1->virt = lpfc_mbuf_alloc(phba, MEM_PRI, &mp1->phys); 2809 if (!mp1 || !mp1->virt) { 2810 kfree(mp1); 2811 lpfc_sli_release_iocbq(phba, iocb); 2812 pring->missbufcnt = cnt; 2813 return cnt; 2814 } 2815 2816 INIT_LIST_HEAD(&mp1->list); 2817 /* Allocate buffer to post */ 2818 if (cnt > 1) { 2819 mp2 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL); 2820 if (mp2) 2821 mp2->virt = lpfc_mbuf_alloc(phba, MEM_PRI, 2822 &mp2->phys); 2823 if (!mp2 || !mp2->virt) { 2824 kfree(mp2); 2825 lpfc_mbuf_free(phba, mp1->virt, mp1->phys); 2826 kfree(mp1); 2827 lpfc_sli_release_iocbq(phba, iocb); 2828 pring->missbufcnt = cnt; 2829 return cnt; 2830 } 2831 2832 INIT_LIST_HEAD(&mp2->list); 2833 } else { 2834 mp2 = NULL; 2835 } 2836 2837 icmd->un.cont64[0].addrHigh = putPaddrHigh(mp1->phys); 2838 icmd->un.cont64[0].addrLow = putPaddrLow(mp1->phys); 2839 icmd->un.cont64[0].tus.f.bdeSize = FCELSSIZE; 2840 icmd->ulpBdeCount = 1; 2841 cnt--; 2842 if (mp2) { 2843 icmd->un.cont64[1].addrHigh = putPaddrHigh(mp2->phys); 2844 icmd->un.cont64[1].addrLow = putPaddrLow(mp2->phys); 2845 icmd->un.cont64[1].tus.f.bdeSize = FCELSSIZE; 2846 cnt--; 2847 icmd->ulpBdeCount = 2; 2848 } 2849 2850 icmd->ulpCommand = CMD_QUE_RING_BUF64_CN; 2851 icmd->ulpLe = 1; 2852 2853 if (lpfc_sli_issue_iocb(phba, pring->ringno, iocb, 0) == 2854 IOCB_ERROR) { 2855 lpfc_mbuf_free(phba, mp1->virt, mp1->phys); 2856 kfree(mp1); 2857 cnt++; 2858 if (mp2) { 2859 lpfc_mbuf_free(phba, mp2->virt, mp2->phys); 2860 kfree(mp2); 2861 cnt++; 2862 } 2863 lpfc_sli_release_iocbq(phba, iocb); 2864 pring->missbufcnt = cnt; 2865 return cnt; 2866 } 2867 lpfc_sli_ringpostbuf_put(phba, pring, mp1); 2868 if (mp2) 2869 lpfc_sli_ringpostbuf_put(phba, pring, mp2); 2870 } 2871 pring->missbufcnt = 0; 2872 return 0; 2873 } 2874 2875 /** 2876 * lpfc_post_rcv_buf - Post the initial receive IOCB buffers to ELS ring 2877 * @phba: pointer to lpfc hba data structure. 2878 * 2879 * This routine posts initial receive IOCB buffers to the ELS ring. The 2880 * current number of initial IOCB buffers specified by LPFC_BUF_RING0 is 2881 * set to 64 IOCBs. SLI3 only. 2882 * 2883 * Return codes 2884 * 0 - success (currently always success) 2885 **/ 2886 static int 2887 lpfc_post_rcv_buf(struct lpfc_hba *phba) 2888 { 2889 struct lpfc_sli *psli = &phba->sli; 2890 2891 /* Ring 0, ELS / CT buffers */ 2892 lpfc_sli3_post_buffer(phba, &psli->sli3_ring[LPFC_ELS_RING], LPFC_BUF_RING0); 2893 /* Ring 2 - FCP no buffers needed */ 2894 2895 return 0; 2896 } 2897 2898 #define S(N,V) (((V)<<(N))|((V)>>(32-(N)))) 2899 2900 /** 2901 * lpfc_sha_init - Set up initial array of hash table entries 2902 * @HashResultPointer: pointer to an array as hash table. 2903 * 2904 * This routine sets up the initial values to the array of hash table entries 2905 * for the LC HBAs. 2906 **/ 2907 static void 2908 lpfc_sha_init(uint32_t * HashResultPointer) 2909 { 2910 HashResultPointer[0] = 0x67452301; 2911 HashResultPointer[1] = 0xEFCDAB89; 2912 HashResultPointer[2] = 0x98BADCFE; 2913 HashResultPointer[3] = 0x10325476; 2914 HashResultPointer[4] = 0xC3D2E1F0; 2915 } 2916 2917 /** 2918 * lpfc_sha_iterate - Iterate initial hash table with the working hash table 2919 * @HashResultPointer: pointer to an initial/result hash table. 2920 * @HashWorkingPointer: pointer to an working hash table. 2921 * 2922 * This routine iterates an initial hash table pointed by @HashResultPointer 2923 * with the values from the working hash table pointeed by @HashWorkingPointer. 2924 * The results are putting back to the initial hash table, returned through 2925 * the @HashResultPointer as the result hash table. 2926 **/ 2927 static void 2928 lpfc_sha_iterate(uint32_t * HashResultPointer, uint32_t * HashWorkingPointer) 2929 { 2930 int t; 2931 uint32_t TEMP; 2932 uint32_t A, B, C, D, E; 2933 t = 16; 2934 do { 2935 HashWorkingPointer[t] = 2936 S(1, 2937 HashWorkingPointer[t - 3] ^ HashWorkingPointer[t - 2938 8] ^ 2939 HashWorkingPointer[t - 14] ^ HashWorkingPointer[t - 16]); 2940 } while (++t <= 79); 2941 t = 0; 2942 A = HashResultPointer[0]; 2943 B = HashResultPointer[1]; 2944 C = HashResultPointer[2]; 2945 D = HashResultPointer[3]; 2946 E = HashResultPointer[4]; 2947 2948 do { 2949 if (t < 20) { 2950 TEMP = ((B & C) | ((~B) & D)) + 0x5A827999; 2951 } else if (t < 40) { 2952 TEMP = (B ^ C ^ D) + 0x6ED9EBA1; 2953 } else if (t < 60) { 2954 TEMP = ((B & C) | (B & D) | (C & D)) + 0x8F1BBCDC; 2955 } else { 2956 TEMP = (B ^ C ^ D) + 0xCA62C1D6; 2957 } 2958 TEMP += S(5, A) + E + HashWorkingPointer[t]; 2959 E = D; 2960 D = C; 2961 C = S(30, B); 2962 B = A; 2963 A = TEMP; 2964 } while (++t <= 79); 2965 2966 HashResultPointer[0] += A; 2967 HashResultPointer[1] += B; 2968 HashResultPointer[2] += C; 2969 HashResultPointer[3] += D; 2970 HashResultPointer[4] += E; 2971 2972 } 2973 2974 /** 2975 * lpfc_challenge_key - Create challenge key based on WWPN of the HBA 2976 * @RandomChallenge: pointer to the entry of host challenge random number array. 2977 * @HashWorking: pointer to the entry of the working hash array. 2978 * 2979 * This routine calculates the working hash array referred by @HashWorking 2980 * from the challenge random numbers associated with the host, referred by 2981 * @RandomChallenge. The result is put into the entry of the working hash 2982 * array and returned by reference through @HashWorking. 2983 **/ 2984 static void 2985 lpfc_challenge_key(uint32_t * RandomChallenge, uint32_t * HashWorking) 2986 { 2987 *HashWorking = (*RandomChallenge ^ *HashWorking); 2988 } 2989 2990 /** 2991 * lpfc_hba_init - Perform special handling for LC HBA initialization 2992 * @phba: pointer to lpfc hba data structure. 2993 * @hbainit: pointer to an array of unsigned 32-bit integers. 2994 * 2995 * This routine performs the special handling for LC HBA initialization. 2996 **/ 2997 void 2998 lpfc_hba_init(struct lpfc_hba *phba, uint32_t *hbainit) 2999 { 3000 int t; 3001 uint32_t *HashWorking; 3002 uint32_t *pwwnn = (uint32_t *) phba->wwnn; 3003 3004 HashWorking = kcalloc(80, sizeof(uint32_t), GFP_KERNEL); 3005 if (!HashWorking) 3006 return; 3007 3008 HashWorking[0] = HashWorking[78] = *pwwnn++; 3009 HashWorking[1] = HashWorking[79] = *pwwnn; 3010 3011 for (t = 0; t < 7; t++) 3012 lpfc_challenge_key(phba->RandomData + t, HashWorking + t); 3013 3014 lpfc_sha_init(hbainit); 3015 lpfc_sha_iterate(hbainit, HashWorking); 3016 kfree(HashWorking); 3017 } 3018 3019 /** 3020 * lpfc_cleanup - Performs vport cleanups before deleting a vport 3021 * @vport: pointer to a virtual N_Port data structure. 3022 * 3023 * This routine performs the necessary cleanups before deleting the @vport. 3024 * It invokes the discovery state machine to perform necessary state 3025 * transitions and to release the ndlps associated with the @vport. Note, 3026 * the physical port is treated as @vport 0. 3027 **/ 3028 void 3029 lpfc_cleanup(struct lpfc_vport *vport) 3030 { 3031 struct lpfc_hba *phba = vport->phba; 3032 struct lpfc_nodelist *ndlp, *next_ndlp; 3033 int i = 0; 3034 3035 if (phba->link_state > LPFC_LINK_DOWN) 3036 lpfc_port_link_failure(vport); 3037 3038 /* Clean up VMID resources */ 3039 if (lpfc_is_vmid_enabled(phba)) 3040 lpfc_vmid_vport_cleanup(vport); 3041 3042 list_for_each_entry_safe(ndlp, next_ndlp, &vport->fc_nodes, nlp_listp) { 3043 if (vport->port_type != LPFC_PHYSICAL_PORT && 3044 ndlp->nlp_DID == Fabric_DID) { 3045 /* Just free up ndlp with Fabric_DID for vports */ 3046 lpfc_nlp_put(ndlp); 3047 continue; 3048 } 3049 3050 if (ndlp->nlp_DID == Fabric_Cntl_DID && 3051 ndlp->nlp_state == NLP_STE_UNUSED_NODE) { 3052 lpfc_nlp_put(ndlp); 3053 continue; 3054 } 3055 3056 /* Fabric Ports not in UNMAPPED state are cleaned up in the 3057 * DEVICE_RM event. 3058 */ 3059 if (ndlp->nlp_type & NLP_FABRIC && 3060 ndlp->nlp_state == NLP_STE_UNMAPPED_NODE) 3061 lpfc_disc_state_machine(vport, ndlp, NULL, 3062 NLP_EVT_DEVICE_RECOVERY); 3063 3064 if (!(ndlp->fc4_xpt_flags & (NVME_XPT_REGD|SCSI_XPT_REGD))) 3065 lpfc_disc_state_machine(vport, ndlp, NULL, 3066 NLP_EVT_DEVICE_RM); 3067 } 3068 3069 /* This is a special case flush to return all 3070 * IOs before entering this loop. There are 3071 * two points in the code where a flush is 3072 * avoided if the FC_UNLOADING flag is set. 3073 * one is in the multipool destroy, 3074 * (this prevents a crash) and the other is 3075 * in the nvme abort handler, ( also prevents 3076 * a crash). Both of these exceptions are 3077 * cases where the slot is still accessible. 3078 * The flush here is only when the pci slot 3079 * is offline. 3080 */ 3081 if (test_bit(FC_UNLOADING, &vport->load_flag) && 3082 pci_channel_offline(phba->pcidev)) 3083 lpfc_sli_flush_io_rings(vport->phba); 3084 3085 /* At this point, ALL ndlp's should be gone 3086 * because of the previous NLP_EVT_DEVICE_RM. 3087 * Lets wait for this to happen, if needed. 3088 */ 3089 while (!list_empty(&vport->fc_nodes)) { 3090 if (i++ > 3000) { 3091 lpfc_printf_vlog(vport, KERN_ERR, 3092 LOG_TRACE_EVENT, 3093 "0233 Nodelist not empty\n"); 3094 list_for_each_entry_safe(ndlp, next_ndlp, 3095 &vport->fc_nodes, nlp_listp) { 3096 lpfc_printf_vlog(ndlp->vport, KERN_ERR, 3097 LOG_DISCOVERY, 3098 "0282 did:x%x ndlp:x%px " 3099 "refcnt:%d xflags x%x " 3100 "nflag x%lx\n", 3101 ndlp->nlp_DID, (void *)ndlp, 3102 kref_read(&ndlp->kref), 3103 ndlp->fc4_xpt_flags, 3104 ndlp->nlp_flag); 3105 } 3106 break; 3107 } 3108 3109 /* Wait for any activity on ndlps to settle */ 3110 msleep(10); 3111 } 3112 lpfc_cleanup_vports_rrqs(vport, NULL); 3113 } 3114 3115 /** 3116 * lpfc_stop_vport_timers - Stop all the timers associated with a vport 3117 * @vport: pointer to a virtual N_Port data structure. 3118 * 3119 * This routine stops all the timers associated with a @vport. This function 3120 * is invoked before disabling or deleting a @vport. Note that the physical 3121 * port is treated as @vport 0. 3122 **/ 3123 void 3124 lpfc_stop_vport_timers(struct lpfc_vport *vport) 3125 { 3126 timer_delete_sync(&vport->els_tmofunc); 3127 timer_delete_sync(&vport->delayed_disc_tmo); 3128 lpfc_can_disctmo(vport); 3129 return; 3130 } 3131 3132 /** 3133 * __lpfc_sli4_stop_fcf_redisc_wait_timer - Stop FCF rediscovery wait timer 3134 * @phba: pointer to lpfc hba data structure. 3135 * 3136 * This routine stops the SLI4 FCF rediscover wait timer if it's on. The 3137 * caller of this routine should already hold the host lock. 3138 **/ 3139 void 3140 __lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba *phba) 3141 { 3142 /* Clear pending FCF rediscovery wait flag */ 3143 phba->fcf.fcf_flag &= ~FCF_REDISC_PEND; 3144 3145 /* Now, try to stop the timer */ 3146 timer_delete(&phba->fcf.redisc_wait); 3147 } 3148 3149 /** 3150 * lpfc_sli4_stop_fcf_redisc_wait_timer - Stop FCF rediscovery wait timer 3151 * @phba: pointer to lpfc hba data structure. 3152 * 3153 * This routine stops the SLI4 FCF rediscover wait timer if it's on. It 3154 * checks whether the FCF rediscovery wait timer is pending with the host 3155 * lock held before proceeding with disabling the timer and clearing the 3156 * wait timer pendig flag. 3157 **/ 3158 void 3159 lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba *phba) 3160 { 3161 spin_lock_irq(&phba->hbalock); 3162 if (!(phba->fcf.fcf_flag & FCF_REDISC_PEND)) { 3163 /* FCF rediscovery timer already fired or stopped */ 3164 spin_unlock_irq(&phba->hbalock); 3165 return; 3166 } 3167 __lpfc_sli4_stop_fcf_redisc_wait_timer(phba); 3168 /* Clear failover in progress flags */ 3169 phba->fcf.fcf_flag &= ~(FCF_DEAD_DISC | FCF_ACVL_DISC); 3170 spin_unlock_irq(&phba->hbalock); 3171 } 3172 3173 /** 3174 * lpfc_cmf_stop - Stop CMF processing 3175 * @phba: pointer to lpfc hba data structure. 3176 * 3177 * This is called when the link goes down or if CMF mode is turned OFF. 3178 * It is also called when going offline or unloaded just before the 3179 * congestion info buffer is unregistered. 3180 **/ 3181 void 3182 lpfc_cmf_stop(struct lpfc_hba *phba) 3183 { 3184 int cpu; 3185 struct lpfc_cgn_stat *cgs; 3186 3187 /* We only do something if CMF is enabled */ 3188 if (!phba->sli4_hba.pc_sli4_params.cmf) 3189 return; 3190 3191 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT, 3192 "6221 Stop CMF / Cancel Timer\n"); 3193 3194 /* Cancel the CMF timer */ 3195 hrtimer_cancel(&phba->cmf_stats_timer); 3196 hrtimer_cancel(&phba->cmf_timer); 3197 3198 /* Zero CMF counters */ 3199 atomic_set(&phba->cmf_busy, 0); 3200 for_each_present_cpu(cpu) { 3201 cgs = per_cpu_ptr(phba->cmf_stat, cpu); 3202 atomic64_set(&cgs->total_bytes, 0); 3203 atomic64_set(&cgs->rcv_bytes, 0); 3204 atomic_set(&cgs->rx_io_cnt, 0); 3205 atomic64_set(&cgs->rx_latency, 0); 3206 } 3207 atomic_set(&phba->cmf_bw_wait, 0); 3208 3209 /* Resume any blocked IO - Queue unblock on workqueue */ 3210 queue_work(phba->wq, &phba->unblock_request_work); 3211 } 3212 3213 static inline uint64_t 3214 lpfc_get_max_line_rate(struct lpfc_hba *phba) 3215 { 3216 uint64_t rate = lpfc_sli_port_speed_get(phba); 3217 3218 return ((((unsigned long)rate) * 1024 * 1024) / 10); 3219 } 3220 3221 void 3222 lpfc_cmf_signal_init(struct lpfc_hba *phba) 3223 { 3224 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT, 3225 "6223 Signal CMF init\n"); 3226 3227 /* Use the new fc_linkspeed to recalculate */ 3228 phba->cmf_interval_rate = LPFC_CMF_INTERVAL; 3229 phba->cmf_max_line_rate = lpfc_get_max_line_rate(phba); 3230 phba->cmf_link_byte_count = div_u64(phba->cmf_max_line_rate * 3231 phba->cmf_interval_rate, 1000); 3232 phba->cmf_max_bytes_per_interval = phba->cmf_link_byte_count; 3233 3234 /* This is a signal to firmware to sync up CMF BW with link speed */ 3235 lpfc_issue_cmf_sync_wqe(phba, 0, 0); 3236 } 3237 3238 /** 3239 * lpfc_cmf_start - Start CMF processing 3240 * @phba: pointer to lpfc hba data structure. 3241 * 3242 * This is called when the link comes up or if CMF mode is turned OFF 3243 * to Monitor or Managed. 3244 **/ 3245 void 3246 lpfc_cmf_start(struct lpfc_hba *phba) 3247 { 3248 struct lpfc_cgn_stat *cgs; 3249 int cpu; 3250 3251 /* We only do something if CMF is enabled */ 3252 if (!phba->sli4_hba.pc_sli4_params.cmf || 3253 phba->cmf_active_mode == LPFC_CFG_OFF) 3254 return; 3255 3256 /* Reinitialize congestion buffer info */ 3257 lpfc_init_congestion_buf(phba); 3258 3259 atomic_set(&phba->cgn_fabric_warn_cnt, 0); 3260 atomic_set(&phba->cgn_fabric_alarm_cnt, 0); 3261 atomic_set(&phba->cgn_sync_alarm_cnt, 0); 3262 atomic_set(&phba->cgn_sync_warn_cnt, 0); 3263 3264 atomic_set(&phba->cmf_busy, 0); 3265 for_each_present_cpu(cpu) { 3266 cgs = per_cpu_ptr(phba->cmf_stat, cpu); 3267 atomic64_set(&cgs->total_bytes, 0); 3268 atomic64_set(&cgs->rcv_bytes, 0); 3269 atomic_set(&cgs->rx_io_cnt, 0); 3270 atomic64_set(&cgs->rx_latency, 0); 3271 } 3272 phba->cmf_latency.tv_sec = 0; 3273 phba->cmf_latency.tv_nsec = 0; 3274 3275 lpfc_cmf_signal_init(phba); 3276 3277 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT, 3278 "6222 Start CMF / Timer\n"); 3279 3280 phba->cmf_timer_cnt = 0; 3281 hrtimer_start(&phba->cmf_timer, 3282 ktime_set(0, LPFC_CMF_INTERVAL * NSEC_PER_MSEC), 3283 HRTIMER_MODE_REL); 3284 hrtimer_start(&phba->cmf_stats_timer, 3285 ktime_set(0, LPFC_SEC_MIN * NSEC_PER_SEC), 3286 HRTIMER_MODE_REL); 3287 /* Setup for latency check in IO cmpl routines */ 3288 ktime_get_real_ts64(&phba->cmf_latency); 3289 3290 atomic_set(&phba->cmf_bw_wait, 0); 3291 atomic_set(&phba->cmf_stop_io, 0); 3292 } 3293 3294 /** 3295 * lpfc_stop_hba_timers - Stop all the timers associated with an HBA 3296 * @phba: pointer to lpfc hba data structure. 3297 * 3298 * This routine stops all the timers associated with a HBA. This function is 3299 * invoked before either putting a HBA offline or unloading the driver. 3300 **/ 3301 void 3302 lpfc_stop_hba_timers(struct lpfc_hba *phba) 3303 { 3304 if (phba->pport) 3305 lpfc_stop_vport_timers(phba->pport); 3306 cancel_delayed_work_sync(&phba->eq_delay_work); 3307 cancel_delayed_work_sync(&phba->idle_stat_delay_work); 3308 timer_delete_sync(&phba->sli.mbox_tmo); 3309 timer_delete_sync(&phba->fabric_block_timer); 3310 timer_delete_sync(&phba->eratt_poll); 3311 timer_delete_sync(&phba->hb_tmofunc); 3312 if (phba->sli_rev == LPFC_SLI_REV4) { 3313 timer_delete_sync(&phba->rrq_tmr); 3314 clear_bit(HBA_RRQ_ACTIVE, &phba->hba_flag); 3315 } 3316 clear_bit(HBA_HBEAT_INP, &phba->hba_flag); 3317 clear_bit(HBA_HBEAT_TMO, &phba->hba_flag); 3318 3319 switch (phba->pci_dev_grp) { 3320 case LPFC_PCI_DEV_LP: 3321 /* Stop any LightPulse device specific driver timers */ 3322 timer_delete_sync(&phba->fcp_poll_timer); 3323 break; 3324 case LPFC_PCI_DEV_OC: 3325 /* Stop any OneConnect device specific driver timers */ 3326 lpfc_sli4_stop_fcf_redisc_wait_timer(phba); 3327 break; 3328 default: 3329 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 3330 "0297 Invalid device group (x%x)\n", 3331 phba->pci_dev_grp); 3332 break; 3333 } 3334 return; 3335 } 3336 3337 /** 3338 * lpfc_block_mgmt_io - Mark a HBA's management interface as blocked 3339 * @phba: pointer to lpfc hba data structure. 3340 * @mbx_action: flag for mailbox no wait action. 3341 * 3342 * This routine marks a HBA's management interface as blocked. Once the HBA's 3343 * management interface is marked as blocked, all the user space access to 3344 * the HBA, whether they are from sysfs interface or libdfc interface will 3345 * all be blocked. The HBA is set to block the management interface when the 3346 * driver prepares the HBA interface for online or offline. 3347 **/ 3348 static void 3349 lpfc_block_mgmt_io(struct lpfc_hba *phba, int mbx_action) 3350 { 3351 unsigned long iflag; 3352 uint8_t actcmd = MBX_HEARTBEAT; 3353 unsigned long timeout; 3354 3355 spin_lock_irqsave(&phba->hbalock, iflag); 3356 phba->sli.sli_flag |= LPFC_BLOCK_MGMT_IO; 3357 spin_unlock_irqrestore(&phba->hbalock, iflag); 3358 if (mbx_action == LPFC_MBX_NO_WAIT) 3359 return; 3360 timeout = secs_to_jiffies(LPFC_MBOX_TMO) + jiffies; 3361 spin_lock_irqsave(&phba->hbalock, iflag); 3362 if (phba->sli.mbox_active) { 3363 actcmd = phba->sli.mbox_active->u.mb.mbxCommand; 3364 /* Determine how long we might wait for the active mailbox 3365 * command to be gracefully completed by firmware. 3366 */ 3367 timeout = secs_to_jiffies(lpfc_mbox_tmo_val(phba, 3368 phba->sli.mbox_active)) + jiffies; 3369 } 3370 spin_unlock_irqrestore(&phba->hbalock, iflag); 3371 3372 /* Wait for the outstnading mailbox command to complete */ 3373 while (phba->sli.mbox_active) { 3374 /* Check active mailbox complete status every 2ms */ 3375 msleep(2); 3376 if (time_after(jiffies, timeout)) { 3377 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 3378 "2813 Mgmt IO is Blocked %x " 3379 "- mbox cmd %x still active\n", 3380 phba->sli.sli_flag, actcmd); 3381 break; 3382 } 3383 } 3384 } 3385 3386 /** 3387 * lpfc_sli4_node_rpi_restore - Recover assigned RPIs for active nodes. 3388 * @phba: pointer to lpfc hba data structure. 3389 * 3390 * Allocate RPIs for all active remote nodes. This is needed whenever 3391 * an SLI4 adapter is reset and the driver is not unloading. Its purpose 3392 * is to fixup the temporary rpi assignments. 3393 **/ 3394 void 3395 lpfc_sli4_node_rpi_restore(struct lpfc_hba *phba) 3396 { 3397 struct lpfc_nodelist *ndlp, *next_ndlp; 3398 struct lpfc_vport **vports; 3399 int i, rpi; 3400 3401 if (phba->sli_rev != LPFC_SLI_REV4) 3402 return; 3403 3404 vports = lpfc_create_vport_work_array(phba); 3405 if (!vports) 3406 return; 3407 3408 for (i = 0; i <= phba->max_vports && vports[i]; i++) { 3409 if (test_bit(FC_UNLOADING, &vports[i]->load_flag)) 3410 continue; 3411 3412 list_for_each_entry_safe(ndlp, next_ndlp, 3413 &vports[i]->fc_nodes, 3414 nlp_listp) { 3415 rpi = lpfc_sli4_alloc_rpi(phba); 3416 if (rpi == LPFC_RPI_ALLOC_ERROR) { 3417 lpfc_printf_vlog(ndlp->vport, KERN_INFO, 3418 LOG_NODE | LOG_DISCOVERY, 3419 "0099 RPI alloc error for " 3420 "ndlp x%px DID:x%06x " 3421 "flg:x%lx\n", 3422 ndlp, ndlp->nlp_DID, 3423 ndlp->nlp_flag); 3424 continue; 3425 } 3426 ndlp->nlp_rpi = rpi; 3427 lpfc_printf_vlog(ndlp->vport, KERN_INFO, 3428 LOG_NODE | LOG_DISCOVERY, 3429 "0009 Assign RPI x%x to ndlp x%px " 3430 "DID:x%06x flg:x%lx\n", 3431 ndlp->nlp_rpi, ndlp, ndlp->nlp_DID, 3432 ndlp->nlp_flag); 3433 } 3434 } 3435 lpfc_destroy_vport_work_array(phba, vports); 3436 } 3437 3438 /** 3439 * lpfc_create_expedite_pool - create expedite pool 3440 * @phba: pointer to lpfc hba data structure. 3441 * 3442 * This routine moves a batch of XRIs from lpfc_io_buf_list_put of HWQ 0 3443 * to expedite pool. Mark them as expedite. 3444 **/ 3445 static void lpfc_create_expedite_pool(struct lpfc_hba *phba) 3446 { 3447 struct lpfc_sli4_hdw_queue *qp; 3448 struct lpfc_io_buf *lpfc_ncmd; 3449 struct lpfc_io_buf *lpfc_ncmd_next; 3450 struct lpfc_epd_pool *epd_pool; 3451 unsigned long iflag; 3452 3453 epd_pool = &phba->epd_pool; 3454 qp = &phba->sli4_hba.hdwq[0]; 3455 3456 spin_lock_init(&epd_pool->lock); 3457 spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag); 3458 spin_lock(&epd_pool->lock); 3459 INIT_LIST_HEAD(&epd_pool->list); 3460 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, 3461 &qp->lpfc_io_buf_list_put, list) { 3462 list_move_tail(&lpfc_ncmd->list, &epd_pool->list); 3463 lpfc_ncmd->expedite = true; 3464 qp->put_io_bufs--; 3465 epd_pool->count++; 3466 if (epd_pool->count >= XRI_BATCH) 3467 break; 3468 } 3469 spin_unlock(&epd_pool->lock); 3470 spin_unlock_irqrestore(&qp->io_buf_list_put_lock, iflag); 3471 } 3472 3473 /** 3474 * lpfc_destroy_expedite_pool - destroy expedite pool 3475 * @phba: pointer to lpfc hba data structure. 3476 * 3477 * This routine returns XRIs from expedite pool to lpfc_io_buf_list_put 3478 * of HWQ 0. Clear the mark. 3479 **/ 3480 static void lpfc_destroy_expedite_pool(struct lpfc_hba *phba) 3481 { 3482 struct lpfc_sli4_hdw_queue *qp; 3483 struct lpfc_io_buf *lpfc_ncmd; 3484 struct lpfc_io_buf *lpfc_ncmd_next; 3485 struct lpfc_epd_pool *epd_pool; 3486 unsigned long iflag; 3487 3488 epd_pool = &phba->epd_pool; 3489 qp = &phba->sli4_hba.hdwq[0]; 3490 3491 spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag); 3492 spin_lock(&epd_pool->lock); 3493 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, 3494 &epd_pool->list, list) { 3495 list_move_tail(&lpfc_ncmd->list, 3496 &qp->lpfc_io_buf_list_put); 3497 lpfc_ncmd->flags = false; 3498 qp->put_io_bufs++; 3499 epd_pool->count--; 3500 } 3501 spin_unlock(&epd_pool->lock); 3502 spin_unlock_irqrestore(&qp->io_buf_list_put_lock, iflag); 3503 } 3504 3505 /** 3506 * lpfc_create_multixri_pools - create multi-XRI pools 3507 * @phba: pointer to lpfc hba data structure. 3508 * 3509 * This routine initialize public, private per HWQ. Then, move XRIs from 3510 * lpfc_io_buf_list_put to public pool. High and low watermark are also 3511 * Initialized. 3512 **/ 3513 void lpfc_create_multixri_pools(struct lpfc_hba *phba) 3514 { 3515 u32 i, j; 3516 u32 hwq_count; 3517 u32 count_per_hwq; 3518 struct lpfc_io_buf *lpfc_ncmd; 3519 struct lpfc_io_buf *lpfc_ncmd_next; 3520 unsigned long iflag; 3521 struct lpfc_sli4_hdw_queue *qp; 3522 struct lpfc_multixri_pool *multixri_pool; 3523 struct lpfc_pbl_pool *pbl_pool; 3524 struct lpfc_pvt_pool *pvt_pool; 3525 3526 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 3527 "1234 num_hdw_queue=%d num_present_cpu=%d common_xri_cnt=%d\n", 3528 phba->cfg_hdw_queue, phba->sli4_hba.num_present_cpu, 3529 phba->sli4_hba.io_xri_cnt); 3530 3531 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) 3532 lpfc_create_expedite_pool(phba); 3533 3534 hwq_count = phba->cfg_hdw_queue; 3535 count_per_hwq = phba->sli4_hba.io_xri_cnt / hwq_count; 3536 3537 for (i = 0; i < hwq_count; i++) { 3538 multixri_pool = kzalloc(sizeof(*multixri_pool), GFP_KERNEL); 3539 3540 if (!multixri_pool) { 3541 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 3542 "1238 Failed to allocate memory for " 3543 "multixri_pool\n"); 3544 3545 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) 3546 lpfc_destroy_expedite_pool(phba); 3547 3548 j = 0; 3549 while (j < i) { 3550 qp = &phba->sli4_hba.hdwq[j]; 3551 kfree(qp->p_multixri_pool); 3552 j++; 3553 } 3554 phba->cfg_xri_rebalancing = 0; 3555 return; 3556 } 3557 3558 qp = &phba->sli4_hba.hdwq[i]; 3559 qp->p_multixri_pool = multixri_pool; 3560 3561 multixri_pool->xri_limit = count_per_hwq; 3562 multixri_pool->rrb_next_hwqid = i; 3563 3564 /* Deal with public free xri pool */ 3565 pbl_pool = &multixri_pool->pbl_pool; 3566 spin_lock_init(&pbl_pool->lock); 3567 spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag); 3568 spin_lock(&pbl_pool->lock); 3569 INIT_LIST_HEAD(&pbl_pool->list); 3570 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, 3571 &qp->lpfc_io_buf_list_put, list) { 3572 list_move_tail(&lpfc_ncmd->list, &pbl_pool->list); 3573 qp->put_io_bufs--; 3574 pbl_pool->count++; 3575 } 3576 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 3577 "1235 Moved %d buffers from PUT list over to pbl_pool[%d]\n", 3578 pbl_pool->count, i); 3579 spin_unlock(&pbl_pool->lock); 3580 spin_unlock_irqrestore(&qp->io_buf_list_put_lock, iflag); 3581 3582 /* Deal with private free xri pool */ 3583 pvt_pool = &multixri_pool->pvt_pool; 3584 pvt_pool->high_watermark = multixri_pool->xri_limit / 2; 3585 pvt_pool->low_watermark = XRI_BATCH; 3586 spin_lock_init(&pvt_pool->lock); 3587 spin_lock_irqsave(&pvt_pool->lock, iflag); 3588 INIT_LIST_HEAD(&pvt_pool->list); 3589 pvt_pool->count = 0; 3590 spin_unlock_irqrestore(&pvt_pool->lock, iflag); 3591 } 3592 } 3593 3594 /** 3595 * lpfc_destroy_multixri_pools - destroy multi-XRI pools 3596 * @phba: pointer to lpfc hba data structure. 3597 * 3598 * This routine returns XRIs from public/private to lpfc_io_buf_list_put. 3599 **/ 3600 static void lpfc_destroy_multixri_pools(struct lpfc_hba *phba) 3601 { 3602 u32 i; 3603 u32 hwq_count; 3604 struct lpfc_io_buf *lpfc_ncmd; 3605 struct lpfc_io_buf *lpfc_ncmd_next; 3606 unsigned long iflag; 3607 struct lpfc_sli4_hdw_queue *qp; 3608 struct lpfc_multixri_pool *multixri_pool; 3609 struct lpfc_pbl_pool *pbl_pool; 3610 struct lpfc_pvt_pool *pvt_pool; 3611 3612 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) 3613 lpfc_destroy_expedite_pool(phba); 3614 3615 if (!test_bit(FC_UNLOADING, &phba->pport->load_flag)) 3616 lpfc_sli_flush_io_rings(phba); 3617 3618 hwq_count = phba->cfg_hdw_queue; 3619 3620 for (i = 0; i < hwq_count; i++) { 3621 qp = &phba->sli4_hba.hdwq[i]; 3622 multixri_pool = qp->p_multixri_pool; 3623 if (!multixri_pool) 3624 continue; 3625 3626 qp->p_multixri_pool = NULL; 3627 3628 spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag); 3629 3630 /* Deal with public free xri pool */ 3631 pbl_pool = &multixri_pool->pbl_pool; 3632 spin_lock(&pbl_pool->lock); 3633 3634 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 3635 "1236 Moving %d buffers from pbl_pool[%d] TO PUT list\n", 3636 pbl_pool->count, i); 3637 3638 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, 3639 &pbl_pool->list, list) { 3640 list_move_tail(&lpfc_ncmd->list, 3641 &qp->lpfc_io_buf_list_put); 3642 qp->put_io_bufs++; 3643 pbl_pool->count--; 3644 } 3645 3646 INIT_LIST_HEAD(&pbl_pool->list); 3647 pbl_pool->count = 0; 3648 3649 spin_unlock(&pbl_pool->lock); 3650 3651 /* Deal with private free xri pool */ 3652 pvt_pool = &multixri_pool->pvt_pool; 3653 spin_lock(&pvt_pool->lock); 3654 3655 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 3656 "1237 Moving %d buffers from pvt_pool[%d] TO PUT list\n", 3657 pvt_pool->count, i); 3658 3659 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, 3660 &pvt_pool->list, list) { 3661 list_move_tail(&lpfc_ncmd->list, 3662 &qp->lpfc_io_buf_list_put); 3663 qp->put_io_bufs++; 3664 pvt_pool->count--; 3665 } 3666 3667 INIT_LIST_HEAD(&pvt_pool->list); 3668 pvt_pool->count = 0; 3669 3670 spin_unlock(&pvt_pool->lock); 3671 spin_unlock_irqrestore(&qp->io_buf_list_put_lock, iflag); 3672 3673 kfree(multixri_pool); 3674 } 3675 } 3676 3677 /** 3678 * lpfc_online - Initialize and bring a HBA online 3679 * @phba: pointer to lpfc hba data structure. 3680 * 3681 * This routine initializes the HBA and brings a HBA online. During this 3682 * process, the management interface is blocked to prevent user space access 3683 * to the HBA interfering with the driver initialization. 3684 * 3685 * Return codes 3686 * 0 - successful 3687 * 1 - failed 3688 **/ 3689 int 3690 lpfc_online(struct lpfc_hba *phba) 3691 { 3692 struct lpfc_vport *vport; 3693 struct lpfc_vport **vports; 3694 int i, error = 0; 3695 bool vpis_cleared = false; 3696 3697 if (!phba) 3698 return 0; 3699 vport = phba->pport; 3700 3701 if (!test_bit(FC_OFFLINE_MODE, &vport->fc_flag)) 3702 return 0; 3703 3704 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 3705 "0458 Bring Adapter online\n"); 3706 3707 lpfc_block_mgmt_io(phba, LPFC_MBX_WAIT); 3708 3709 if (phba->sli_rev == LPFC_SLI_REV4) { 3710 if (lpfc_sli4_hba_setup(phba)) { /* Initialize SLI4 HBA */ 3711 lpfc_unblock_mgmt_io(phba); 3712 return 1; 3713 } 3714 spin_lock_irq(&phba->hbalock); 3715 if (!phba->sli4_hba.max_cfg_param.vpi_used) 3716 vpis_cleared = true; 3717 spin_unlock_irq(&phba->hbalock); 3718 3719 /* Reestablish the local initiator port. 3720 * The offline process destroyed the previous lport. 3721 */ 3722 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME && 3723 !phba->nvmet_support) { 3724 error = lpfc_nvme_create_localport(phba->pport); 3725 if (error) 3726 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 3727 "6132 NVME restore reg failed " 3728 "on nvmei error x%x\n", error); 3729 } 3730 } else { 3731 lpfc_sli_queue_init(phba); 3732 if (lpfc_sli_hba_setup(phba)) { /* Initialize SLI2/SLI3 HBA */ 3733 lpfc_unblock_mgmt_io(phba); 3734 return 1; 3735 } 3736 } 3737 3738 vports = lpfc_create_vport_work_array(phba); 3739 if (vports != NULL) { 3740 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) { 3741 clear_bit(FC_OFFLINE_MODE, &vports[i]->fc_flag); 3742 if (phba->sli3_options & LPFC_SLI3_NPIV_ENABLED) 3743 set_bit(FC_VPORT_NEEDS_REG_VPI, 3744 &vports[i]->fc_flag); 3745 if (phba->sli_rev == LPFC_SLI_REV4) { 3746 set_bit(FC_VPORT_NEEDS_INIT_VPI, 3747 &vports[i]->fc_flag); 3748 if ((vpis_cleared) && 3749 (vports[i]->port_type != 3750 LPFC_PHYSICAL_PORT)) 3751 vports[i]->vpi = 0; 3752 } 3753 } 3754 } 3755 lpfc_destroy_vport_work_array(phba, vports); 3756 3757 if (phba->cfg_xri_rebalancing) 3758 lpfc_create_multixri_pools(phba); 3759 3760 lpfc_cpuhp_add(phba); 3761 3762 lpfc_unblock_mgmt_io(phba); 3763 return 0; 3764 } 3765 3766 /** 3767 * lpfc_unblock_mgmt_io - Mark a HBA's management interface to be not blocked 3768 * @phba: pointer to lpfc hba data structure. 3769 * 3770 * This routine marks a HBA's management interface as not blocked. Once the 3771 * HBA's management interface is marked as not blocked, all the user space 3772 * access to the HBA, whether they are from sysfs interface or libdfc 3773 * interface will be allowed. The HBA is set to block the management interface 3774 * when the driver prepares the HBA interface for online or offline and then 3775 * set to unblock the management interface afterwards. 3776 **/ 3777 void 3778 lpfc_unblock_mgmt_io(struct lpfc_hba * phba) 3779 { 3780 unsigned long iflag; 3781 3782 spin_lock_irqsave(&phba->hbalock, iflag); 3783 phba->sli.sli_flag &= ~LPFC_BLOCK_MGMT_IO; 3784 spin_unlock_irqrestore(&phba->hbalock, iflag); 3785 } 3786 3787 /** 3788 * lpfc_offline_prep - Prepare a HBA to be brought offline 3789 * @phba: pointer to lpfc hba data structure. 3790 * @mbx_action: flag for mailbox shutdown action. 3791 * 3792 * This routine is invoked to prepare a HBA to be brought offline. It performs 3793 * unregistration login to all the nodes on all vports and flushes the mailbox 3794 * queue to make it ready to be brought offline. 3795 **/ 3796 void 3797 lpfc_offline_prep(struct lpfc_hba *phba, int mbx_action) 3798 { 3799 struct lpfc_vport *vport = phba->pport; 3800 struct lpfc_nodelist *ndlp, *next_ndlp; 3801 struct lpfc_vport **vports; 3802 struct Scsi_Host *shost; 3803 int i; 3804 int offline; 3805 bool hba_pci_err; 3806 3807 if (test_bit(FC_OFFLINE_MODE, &vport->fc_flag)) 3808 return; 3809 3810 lpfc_block_mgmt_io(phba, mbx_action); 3811 3812 lpfc_linkdown(phba); 3813 3814 offline = pci_channel_offline(phba->pcidev); 3815 hba_pci_err = test_bit(HBA_PCI_ERR, &phba->bit_flags); 3816 3817 /* Issue an unreg_login to all nodes on all vports */ 3818 vports = lpfc_create_vport_work_array(phba); 3819 if (vports != NULL) { 3820 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) { 3821 if (test_bit(FC_UNLOADING, &vports[i]->load_flag)) 3822 continue; 3823 shost = lpfc_shost_from_vport(vports[i]); 3824 spin_lock_irq(shost->host_lock); 3825 vports[i]->vpi_state &= ~LPFC_VPI_REGISTERED; 3826 spin_unlock_irq(shost->host_lock); 3827 set_bit(FC_VPORT_NEEDS_REG_VPI, &vports[i]->fc_flag); 3828 clear_bit(FC_VFI_REGISTERED, &vports[i]->fc_flag); 3829 3830 list_for_each_entry_safe(ndlp, next_ndlp, 3831 &vports[i]->fc_nodes, 3832 nlp_listp) { 3833 3834 clear_bit(NLP_NPR_ADISC, &ndlp->nlp_flag); 3835 if (offline || hba_pci_err) { 3836 clear_bit(NLP_UNREG_INP, 3837 &ndlp->nlp_flag); 3838 clear_bit(NLP_RPI_REGISTERED, 3839 &ndlp->nlp_flag); 3840 } 3841 3842 if (ndlp->nlp_type & NLP_FABRIC) { 3843 lpfc_disc_state_machine(vports[i], ndlp, 3844 NULL, NLP_EVT_DEVICE_RECOVERY); 3845 3846 /* Don't remove the node unless the node 3847 * has been unregistered with the 3848 * transport, and we're not in recovery 3849 * before dev_loss_tmo triggered. 3850 * Otherwise, let dev_loss take care of 3851 * the node. 3852 */ 3853 if (!test_bit(NLP_IN_RECOV_POST_DEV_LOSS, 3854 &ndlp->save_flags) && 3855 !(ndlp->fc4_xpt_flags & 3856 (NVME_XPT_REGD | SCSI_XPT_REGD))) 3857 lpfc_disc_state_machine 3858 (vports[i], ndlp, 3859 NULL, 3860 NLP_EVT_DEVICE_RM); 3861 } 3862 } 3863 } 3864 } 3865 lpfc_destroy_vport_work_array(phba, vports); 3866 3867 lpfc_sli_mbox_sys_shutdown(phba, mbx_action); 3868 3869 if (phba->wq) 3870 flush_workqueue(phba->wq); 3871 } 3872 3873 /** 3874 * lpfc_offline - Bring a HBA offline 3875 * @phba: pointer to lpfc hba data structure. 3876 * 3877 * This routine actually brings a HBA offline. It stops all the timers 3878 * associated with the HBA, brings down the SLI layer, and eventually 3879 * marks the HBA as in offline state for the upper layer protocol. 3880 **/ 3881 void 3882 lpfc_offline(struct lpfc_hba *phba) 3883 { 3884 struct Scsi_Host *shost; 3885 struct lpfc_vport **vports; 3886 int i; 3887 3888 if (test_bit(FC_OFFLINE_MODE, &phba->pport->fc_flag)) 3889 return; 3890 3891 /* stop port and all timers associated with this hba */ 3892 lpfc_stop_port(phba); 3893 3894 /* Tear down the local and target port registrations. The 3895 * nvme transports need to cleanup. 3896 */ 3897 lpfc_nvmet_destroy_targetport(phba); 3898 lpfc_nvme_destroy_localport(phba->pport); 3899 3900 vports = lpfc_create_vport_work_array(phba); 3901 if (vports != NULL) 3902 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) 3903 lpfc_stop_vport_timers(vports[i]); 3904 lpfc_destroy_vport_work_array(phba, vports); 3905 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 3906 "0460 Bring Adapter offline\n"); 3907 /* Bring down the SLI Layer and cleanup. The HBA is offline 3908 now. */ 3909 lpfc_sli_hba_down(phba); 3910 spin_lock_irq(&phba->hbalock); 3911 phba->work_ha = 0; 3912 spin_unlock_irq(&phba->hbalock); 3913 vports = lpfc_create_vport_work_array(phba); 3914 if (vports != NULL) 3915 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) { 3916 shost = lpfc_shost_from_vport(vports[i]); 3917 spin_lock_irq(shost->host_lock); 3918 vports[i]->work_port_events = 0; 3919 spin_unlock_irq(shost->host_lock); 3920 set_bit(FC_OFFLINE_MODE, &vports[i]->fc_flag); 3921 } 3922 lpfc_destroy_vport_work_array(phba, vports); 3923 /* If OFFLINE flag is clear (i.e. unloading), cpuhp removal is handled 3924 * in hba_unset 3925 */ 3926 if (test_bit(FC_OFFLINE_MODE, &phba->pport->fc_flag)) 3927 __lpfc_cpuhp_remove(phba); 3928 3929 if (phba->cfg_xri_rebalancing) 3930 lpfc_destroy_multixri_pools(phba); 3931 } 3932 3933 /** 3934 * lpfc_scsi_free - Free all the SCSI buffers and IOCBs from driver lists 3935 * @phba: pointer to lpfc hba data structure. 3936 * 3937 * This routine is to free all the SCSI buffers and IOCBs from the driver 3938 * list back to kernel. It is called from lpfc_pci_remove_one to free 3939 * the internal resources before the device is removed from the system. 3940 **/ 3941 static void 3942 lpfc_scsi_free(struct lpfc_hba *phba) 3943 { 3944 struct lpfc_io_buf *sb, *sb_next; 3945 3946 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP)) 3947 return; 3948 3949 spin_lock_irq(&phba->hbalock); 3950 3951 /* Release all the lpfc_scsi_bufs maintained by this host. */ 3952 3953 spin_lock(&phba->scsi_buf_list_put_lock); 3954 list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list_put, 3955 list) { 3956 list_del(&sb->list); 3957 dma_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data, 3958 sb->dma_handle); 3959 kfree(sb); 3960 phba->total_scsi_bufs--; 3961 } 3962 spin_unlock(&phba->scsi_buf_list_put_lock); 3963 3964 spin_lock(&phba->scsi_buf_list_get_lock); 3965 list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list_get, 3966 list) { 3967 list_del(&sb->list); 3968 dma_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data, 3969 sb->dma_handle); 3970 kfree(sb); 3971 phba->total_scsi_bufs--; 3972 } 3973 spin_unlock(&phba->scsi_buf_list_get_lock); 3974 spin_unlock_irq(&phba->hbalock); 3975 } 3976 3977 /** 3978 * lpfc_io_free - Free all the IO buffers and IOCBs from driver lists 3979 * @phba: pointer to lpfc hba data structure. 3980 * 3981 * This routine is to free all the IO buffers and IOCBs from the driver 3982 * list back to kernel. It is called from lpfc_pci_remove_one to free 3983 * the internal resources before the device is removed from the system. 3984 **/ 3985 void 3986 lpfc_io_free(struct lpfc_hba *phba) 3987 { 3988 struct lpfc_io_buf *lpfc_ncmd, *lpfc_ncmd_next; 3989 struct lpfc_sli4_hdw_queue *qp; 3990 int idx; 3991 3992 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { 3993 qp = &phba->sli4_hba.hdwq[idx]; 3994 /* Release all the lpfc_nvme_bufs maintained by this host. */ 3995 spin_lock(&qp->io_buf_list_put_lock); 3996 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, 3997 &qp->lpfc_io_buf_list_put, 3998 list) { 3999 list_del(&lpfc_ncmd->list); 4000 qp->put_io_bufs--; 4001 dma_pool_free(phba->lpfc_sg_dma_buf_pool, 4002 lpfc_ncmd->data, lpfc_ncmd->dma_handle); 4003 if (phba->cfg_xpsgl && !phba->nvmet_support) 4004 lpfc_put_sgl_per_hdwq(phba, lpfc_ncmd); 4005 lpfc_put_cmd_rsp_buf_per_hdwq(phba, lpfc_ncmd); 4006 kfree(lpfc_ncmd); 4007 qp->total_io_bufs--; 4008 } 4009 spin_unlock(&qp->io_buf_list_put_lock); 4010 4011 spin_lock(&qp->io_buf_list_get_lock); 4012 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, 4013 &qp->lpfc_io_buf_list_get, 4014 list) { 4015 list_del(&lpfc_ncmd->list); 4016 qp->get_io_bufs--; 4017 dma_pool_free(phba->lpfc_sg_dma_buf_pool, 4018 lpfc_ncmd->data, lpfc_ncmd->dma_handle); 4019 if (phba->cfg_xpsgl && !phba->nvmet_support) 4020 lpfc_put_sgl_per_hdwq(phba, lpfc_ncmd); 4021 lpfc_put_cmd_rsp_buf_per_hdwq(phba, lpfc_ncmd); 4022 kfree(lpfc_ncmd); 4023 qp->total_io_bufs--; 4024 } 4025 spin_unlock(&qp->io_buf_list_get_lock); 4026 } 4027 } 4028 4029 /** 4030 * lpfc_sli4_els_sgl_update - update ELS xri-sgl sizing and mapping 4031 * @phba: pointer to lpfc hba data structure. 4032 * 4033 * This routine first calculates the sizes of the current els and allocated 4034 * scsi sgl lists, and then goes through all sgls to updates the physical 4035 * XRIs assigned due to port function reset. During port initialization, the 4036 * current els and allocated scsi sgl lists are 0s. 4037 * 4038 * Return codes 4039 * 0 - successful (for now, it always returns 0) 4040 **/ 4041 int 4042 lpfc_sli4_els_sgl_update(struct lpfc_hba *phba) 4043 { 4044 struct lpfc_sglq *sglq_entry = NULL, *sglq_entry_next = NULL; 4045 uint16_t i, lxri, xri_cnt, els_xri_cnt; 4046 LIST_HEAD(els_sgl_list); 4047 int rc; 4048 4049 /* 4050 * update on pci function's els xri-sgl list 4051 */ 4052 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba); 4053 4054 if (els_xri_cnt > phba->sli4_hba.els_xri_cnt) { 4055 /* els xri-sgl expanded */ 4056 xri_cnt = els_xri_cnt - phba->sli4_hba.els_xri_cnt; 4057 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 4058 "3157 ELS xri-sgl count increased from " 4059 "%d to %d\n", phba->sli4_hba.els_xri_cnt, 4060 els_xri_cnt); 4061 /* allocate the additional els sgls */ 4062 for (i = 0; i < xri_cnt; i++) { 4063 sglq_entry = kzalloc(sizeof(struct lpfc_sglq), 4064 GFP_KERNEL); 4065 if (sglq_entry == NULL) { 4066 lpfc_printf_log(phba, KERN_ERR, 4067 LOG_TRACE_EVENT, 4068 "2562 Failure to allocate an " 4069 "ELS sgl entry:%d\n", i); 4070 rc = -ENOMEM; 4071 goto out_free_mem; 4072 } 4073 sglq_entry->buff_type = GEN_BUFF_TYPE; 4074 sglq_entry->virt = lpfc_mbuf_alloc(phba, 0, 4075 &sglq_entry->phys); 4076 if (sglq_entry->virt == NULL) { 4077 kfree(sglq_entry); 4078 lpfc_printf_log(phba, KERN_ERR, 4079 LOG_TRACE_EVENT, 4080 "2563 Failure to allocate an " 4081 "ELS mbuf:%d\n", i); 4082 rc = -ENOMEM; 4083 goto out_free_mem; 4084 } 4085 sglq_entry->sgl = sglq_entry->virt; 4086 memset(sglq_entry->sgl, 0, LPFC_BPL_SIZE); 4087 sglq_entry->state = SGL_FREED; 4088 list_add_tail(&sglq_entry->list, &els_sgl_list); 4089 } 4090 spin_lock_irq(&phba->sli4_hba.sgl_list_lock); 4091 list_splice_init(&els_sgl_list, 4092 &phba->sli4_hba.lpfc_els_sgl_list); 4093 spin_unlock_irq(&phba->sli4_hba.sgl_list_lock); 4094 } else if (els_xri_cnt < phba->sli4_hba.els_xri_cnt) { 4095 /* els xri-sgl shrinked */ 4096 xri_cnt = phba->sli4_hba.els_xri_cnt - els_xri_cnt; 4097 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 4098 "3158 ELS xri-sgl count decreased from " 4099 "%d to %d\n", phba->sli4_hba.els_xri_cnt, 4100 els_xri_cnt); 4101 spin_lock_irq(&phba->sli4_hba.sgl_list_lock); 4102 list_splice_init(&phba->sli4_hba.lpfc_els_sgl_list, 4103 &els_sgl_list); 4104 /* release extra els sgls from list */ 4105 for (i = 0; i < xri_cnt; i++) { 4106 list_remove_head(&els_sgl_list, 4107 sglq_entry, struct lpfc_sglq, list); 4108 if (sglq_entry) { 4109 __lpfc_mbuf_free(phba, sglq_entry->virt, 4110 sglq_entry->phys); 4111 kfree(sglq_entry); 4112 } 4113 } 4114 list_splice_init(&els_sgl_list, 4115 &phba->sli4_hba.lpfc_els_sgl_list); 4116 spin_unlock_irq(&phba->sli4_hba.sgl_list_lock); 4117 } else 4118 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 4119 "3163 ELS xri-sgl count unchanged: %d\n", 4120 els_xri_cnt); 4121 phba->sli4_hba.els_xri_cnt = els_xri_cnt; 4122 4123 /* update xris to els sgls on the list */ 4124 sglq_entry = NULL; 4125 sglq_entry_next = NULL; 4126 list_for_each_entry_safe(sglq_entry, sglq_entry_next, 4127 &phba->sli4_hba.lpfc_els_sgl_list, list) { 4128 lxri = lpfc_sli4_next_xritag(phba); 4129 if (lxri == NO_XRI) { 4130 lpfc_printf_log(phba, KERN_ERR, 4131 LOG_TRACE_EVENT, 4132 "2400 Failed to allocate xri for " 4133 "ELS sgl\n"); 4134 rc = -ENOMEM; 4135 goto out_free_mem; 4136 } 4137 sglq_entry->sli4_lxritag = lxri; 4138 sglq_entry->sli4_xritag = phba->sli4_hba.xri_ids[lxri]; 4139 } 4140 return 0; 4141 4142 out_free_mem: 4143 lpfc_free_els_sgl_list(phba); 4144 return rc; 4145 } 4146 4147 /** 4148 * lpfc_sli4_nvmet_sgl_update - update xri-sgl sizing and mapping 4149 * @phba: pointer to lpfc hba data structure. 4150 * 4151 * This routine first calculates the sizes of the current els and allocated 4152 * scsi sgl lists, and then goes through all sgls to updates the physical 4153 * XRIs assigned due to port function reset. During port initialization, the 4154 * current els and allocated scsi sgl lists are 0s. 4155 * 4156 * Return codes 4157 * 0 - successful (for now, it always returns 0) 4158 **/ 4159 int 4160 lpfc_sli4_nvmet_sgl_update(struct lpfc_hba *phba) 4161 { 4162 struct lpfc_sglq *sglq_entry = NULL, *sglq_entry_next = NULL; 4163 uint16_t i, lxri, xri_cnt, els_xri_cnt; 4164 uint16_t nvmet_xri_cnt; 4165 LIST_HEAD(nvmet_sgl_list); 4166 int rc; 4167 4168 /* 4169 * update on pci function's nvmet xri-sgl list 4170 */ 4171 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba); 4172 4173 /* For NVMET, ALL remaining XRIs are dedicated for IO processing */ 4174 nvmet_xri_cnt = phba->sli4_hba.max_cfg_param.max_xri - els_xri_cnt; 4175 if (nvmet_xri_cnt > phba->sli4_hba.nvmet_xri_cnt) { 4176 /* els xri-sgl expanded */ 4177 xri_cnt = nvmet_xri_cnt - phba->sli4_hba.nvmet_xri_cnt; 4178 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 4179 "6302 NVMET xri-sgl cnt grew from %d to %d\n", 4180 phba->sli4_hba.nvmet_xri_cnt, nvmet_xri_cnt); 4181 /* allocate the additional nvmet sgls */ 4182 for (i = 0; i < xri_cnt; i++) { 4183 sglq_entry = kzalloc(sizeof(struct lpfc_sglq), 4184 GFP_KERNEL); 4185 if (sglq_entry == NULL) { 4186 lpfc_printf_log(phba, KERN_ERR, 4187 LOG_TRACE_EVENT, 4188 "6303 Failure to allocate an " 4189 "NVMET sgl entry:%d\n", i); 4190 rc = -ENOMEM; 4191 goto out_free_mem; 4192 } 4193 sglq_entry->buff_type = NVMET_BUFF_TYPE; 4194 sglq_entry->virt = lpfc_nvmet_buf_alloc(phba, 0, 4195 &sglq_entry->phys); 4196 if (sglq_entry->virt == NULL) { 4197 kfree(sglq_entry); 4198 lpfc_printf_log(phba, KERN_ERR, 4199 LOG_TRACE_EVENT, 4200 "6304 Failure to allocate an " 4201 "NVMET buf:%d\n", i); 4202 rc = -ENOMEM; 4203 goto out_free_mem; 4204 } 4205 sglq_entry->sgl = sglq_entry->virt; 4206 memset(sglq_entry->sgl, 0, 4207 phba->cfg_sg_dma_buf_size); 4208 sglq_entry->state = SGL_FREED; 4209 list_add_tail(&sglq_entry->list, &nvmet_sgl_list); 4210 } 4211 spin_lock_irq(&phba->hbalock); 4212 spin_lock(&phba->sli4_hba.sgl_list_lock); 4213 list_splice_init(&nvmet_sgl_list, 4214 &phba->sli4_hba.lpfc_nvmet_sgl_list); 4215 spin_unlock(&phba->sli4_hba.sgl_list_lock); 4216 spin_unlock_irq(&phba->hbalock); 4217 } else if (nvmet_xri_cnt < phba->sli4_hba.nvmet_xri_cnt) { 4218 /* nvmet xri-sgl shrunk */ 4219 xri_cnt = phba->sli4_hba.nvmet_xri_cnt - nvmet_xri_cnt; 4220 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 4221 "6305 NVMET xri-sgl count decreased from " 4222 "%d to %d\n", phba->sli4_hba.nvmet_xri_cnt, 4223 nvmet_xri_cnt); 4224 spin_lock_irq(&phba->hbalock); 4225 spin_lock(&phba->sli4_hba.sgl_list_lock); 4226 list_splice_init(&phba->sli4_hba.lpfc_nvmet_sgl_list, 4227 &nvmet_sgl_list); 4228 /* release extra nvmet sgls from list */ 4229 for (i = 0; i < xri_cnt; i++) { 4230 list_remove_head(&nvmet_sgl_list, 4231 sglq_entry, struct lpfc_sglq, list); 4232 if (sglq_entry) { 4233 lpfc_nvmet_buf_free(phba, sglq_entry->virt, 4234 sglq_entry->phys); 4235 kfree(sglq_entry); 4236 } 4237 } 4238 list_splice_init(&nvmet_sgl_list, 4239 &phba->sli4_hba.lpfc_nvmet_sgl_list); 4240 spin_unlock(&phba->sli4_hba.sgl_list_lock); 4241 spin_unlock_irq(&phba->hbalock); 4242 } else 4243 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 4244 "6306 NVMET xri-sgl count unchanged: %d\n", 4245 nvmet_xri_cnt); 4246 phba->sli4_hba.nvmet_xri_cnt = nvmet_xri_cnt; 4247 4248 /* update xris to nvmet sgls on the list */ 4249 sglq_entry = NULL; 4250 sglq_entry_next = NULL; 4251 list_for_each_entry_safe(sglq_entry, sglq_entry_next, 4252 &phba->sli4_hba.lpfc_nvmet_sgl_list, list) { 4253 lxri = lpfc_sli4_next_xritag(phba); 4254 if (lxri == NO_XRI) { 4255 lpfc_printf_log(phba, KERN_ERR, 4256 LOG_TRACE_EVENT, 4257 "6307 Failed to allocate xri for " 4258 "NVMET sgl\n"); 4259 rc = -ENOMEM; 4260 goto out_free_mem; 4261 } 4262 sglq_entry->sli4_lxritag = lxri; 4263 sglq_entry->sli4_xritag = phba->sli4_hba.xri_ids[lxri]; 4264 } 4265 return 0; 4266 4267 out_free_mem: 4268 lpfc_free_nvmet_sgl_list(phba); 4269 return rc; 4270 } 4271 4272 int 4273 lpfc_io_buf_flush(struct lpfc_hba *phba, struct list_head *cbuf) 4274 { 4275 LIST_HEAD(blist); 4276 struct lpfc_sli4_hdw_queue *qp; 4277 struct lpfc_io_buf *lpfc_cmd; 4278 struct lpfc_io_buf *iobufp, *prev_iobufp; 4279 int idx, cnt, xri, inserted; 4280 4281 cnt = 0; 4282 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { 4283 qp = &phba->sli4_hba.hdwq[idx]; 4284 spin_lock_irq(&qp->io_buf_list_get_lock); 4285 spin_lock(&qp->io_buf_list_put_lock); 4286 4287 /* Take everything off the get and put lists */ 4288 list_splice_init(&qp->lpfc_io_buf_list_get, &blist); 4289 list_splice(&qp->lpfc_io_buf_list_put, &blist); 4290 INIT_LIST_HEAD(&qp->lpfc_io_buf_list_get); 4291 INIT_LIST_HEAD(&qp->lpfc_io_buf_list_put); 4292 cnt += qp->get_io_bufs + qp->put_io_bufs; 4293 qp->get_io_bufs = 0; 4294 qp->put_io_bufs = 0; 4295 qp->total_io_bufs = 0; 4296 spin_unlock(&qp->io_buf_list_put_lock); 4297 spin_unlock_irq(&qp->io_buf_list_get_lock); 4298 } 4299 4300 /* 4301 * Take IO buffers off blist and put on cbuf sorted by XRI. 4302 * This is because POST_SGL takes a sequential range of XRIs 4303 * to post to the firmware. 4304 */ 4305 for (idx = 0; idx < cnt; idx++) { 4306 list_remove_head(&blist, lpfc_cmd, struct lpfc_io_buf, list); 4307 if (!lpfc_cmd) 4308 return cnt; 4309 if (idx == 0) { 4310 list_add_tail(&lpfc_cmd->list, cbuf); 4311 continue; 4312 } 4313 xri = lpfc_cmd->cur_iocbq.sli4_xritag; 4314 inserted = 0; 4315 prev_iobufp = NULL; 4316 list_for_each_entry(iobufp, cbuf, list) { 4317 if (xri < iobufp->cur_iocbq.sli4_xritag) { 4318 if (prev_iobufp) 4319 list_add(&lpfc_cmd->list, 4320 &prev_iobufp->list); 4321 else 4322 list_add(&lpfc_cmd->list, cbuf); 4323 inserted = 1; 4324 break; 4325 } 4326 prev_iobufp = iobufp; 4327 } 4328 if (!inserted) 4329 list_add_tail(&lpfc_cmd->list, cbuf); 4330 } 4331 return cnt; 4332 } 4333 4334 int 4335 lpfc_io_buf_replenish(struct lpfc_hba *phba, struct list_head *cbuf) 4336 { 4337 struct lpfc_sli4_hdw_queue *qp; 4338 struct lpfc_io_buf *lpfc_cmd; 4339 int idx, cnt; 4340 unsigned long iflags; 4341 4342 qp = phba->sli4_hba.hdwq; 4343 cnt = 0; 4344 while (!list_empty(cbuf)) { 4345 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { 4346 list_remove_head(cbuf, lpfc_cmd, 4347 struct lpfc_io_buf, list); 4348 if (!lpfc_cmd) 4349 return cnt; 4350 cnt++; 4351 qp = &phba->sli4_hba.hdwq[idx]; 4352 lpfc_cmd->hdwq_no = idx; 4353 lpfc_cmd->hdwq = qp; 4354 lpfc_cmd->cur_iocbq.cmd_cmpl = NULL; 4355 spin_lock_irqsave(&qp->io_buf_list_put_lock, iflags); 4356 list_add_tail(&lpfc_cmd->list, 4357 &qp->lpfc_io_buf_list_put); 4358 qp->put_io_bufs++; 4359 qp->total_io_bufs++; 4360 spin_unlock_irqrestore(&qp->io_buf_list_put_lock, 4361 iflags); 4362 } 4363 } 4364 return cnt; 4365 } 4366 4367 /** 4368 * lpfc_sli4_io_sgl_update - update xri-sgl sizing and mapping 4369 * @phba: pointer to lpfc hba data structure. 4370 * 4371 * This routine first calculates the sizes of the current els and allocated 4372 * scsi sgl lists, and then goes through all sgls to updates the physical 4373 * XRIs assigned due to port function reset. During port initialization, the 4374 * current els and allocated scsi sgl lists are 0s. 4375 * 4376 * Return codes 4377 * 0 - successful (for now, it always returns 0) 4378 **/ 4379 int 4380 lpfc_sli4_io_sgl_update(struct lpfc_hba *phba) 4381 { 4382 struct lpfc_io_buf *lpfc_ncmd = NULL, *lpfc_ncmd_next = NULL; 4383 uint16_t i, lxri, els_xri_cnt; 4384 uint16_t io_xri_cnt, io_xri_max; 4385 LIST_HEAD(io_sgl_list); 4386 int rc, cnt; 4387 4388 /* 4389 * update on pci function's allocated nvme xri-sgl list 4390 */ 4391 4392 /* maximum number of xris available for nvme buffers */ 4393 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba); 4394 io_xri_max = phba->sli4_hba.max_cfg_param.max_xri - els_xri_cnt; 4395 phba->sli4_hba.io_xri_max = io_xri_max; 4396 4397 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 4398 "6074 Current allocated XRI sgl count:%d, " 4399 "maximum XRI count:%d els_xri_cnt:%d\n\n", 4400 phba->sli4_hba.io_xri_cnt, 4401 phba->sli4_hba.io_xri_max, 4402 els_xri_cnt); 4403 4404 cnt = lpfc_io_buf_flush(phba, &io_sgl_list); 4405 4406 if (phba->sli4_hba.io_xri_cnt > phba->sli4_hba.io_xri_max) { 4407 /* max nvme xri shrunk below the allocated nvme buffers */ 4408 io_xri_cnt = phba->sli4_hba.io_xri_cnt - 4409 phba->sli4_hba.io_xri_max; 4410 /* release the extra allocated nvme buffers */ 4411 for (i = 0; i < io_xri_cnt; i++) { 4412 list_remove_head(&io_sgl_list, lpfc_ncmd, 4413 struct lpfc_io_buf, list); 4414 if (lpfc_ncmd) { 4415 dma_pool_free(phba->lpfc_sg_dma_buf_pool, 4416 lpfc_ncmd->data, 4417 lpfc_ncmd->dma_handle); 4418 kfree(lpfc_ncmd); 4419 } 4420 } 4421 phba->sli4_hba.io_xri_cnt -= io_xri_cnt; 4422 } 4423 4424 /* update xris associated to remaining allocated nvme buffers */ 4425 lpfc_ncmd = NULL; 4426 lpfc_ncmd_next = NULL; 4427 phba->sli4_hba.io_xri_cnt = cnt; 4428 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next, 4429 &io_sgl_list, list) { 4430 lxri = lpfc_sli4_next_xritag(phba); 4431 if (lxri == NO_XRI) { 4432 lpfc_printf_log(phba, KERN_ERR, 4433 LOG_TRACE_EVENT, 4434 "6075 Failed to allocate xri for " 4435 "nvme buffer\n"); 4436 rc = -ENOMEM; 4437 goto out_free_mem; 4438 } 4439 lpfc_ncmd->cur_iocbq.sli4_lxritag = lxri; 4440 lpfc_ncmd->cur_iocbq.sli4_xritag = phba->sli4_hba.xri_ids[lxri]; 4441 } 4442 cnt = lpfc_io_buf_replenish(phba, &io_sgl_list); 4443 return 0; 4444 4445 out_free_mem: 4446 lpfc_io_free(phba); 4447 return rc; 4448 } 4449 4450 /** 4451 * lpfc_new_io_buf - IO buffer allocator for HBA with SLI4 IF spec 4452 * @phba: Pointer to lpfc hba data structure. 4453 * @num_to_alloc: The requested number of buffers to allocate. 4454 * 4455 * This routine allocates nvme buffers for device with SLI-4 interface spec, 4456 * the nvme buffer contains all the necessary information needed to initiate 4457 * an I/O. After allocating up to @num_to_allocate IO buffers and put 4458 * them on a list, it post them to the port by using SGL block post. 4459 * 4460 * Return codes: 4461 * int - number of IO buffers that were allocated and posted. 4462 * 0 = failure, less than num_to_alloc is a partial failure. 4463 **/ 4464 int 4465 lpfc_new_io_buf(struct lpfc_hba *phba, int num_to_alloc) 4466 { 4467 struct lpfc_io_buf *lpfc_ncmd; 4468 struct lpfc_iocbq *pwqeq; 4469 uint16_t iotag, lxri = 0; 4470 int bcnt, num_posted; 4471 LIST_HEAD(prep_nblist); 4472 LIST_HEAD(post_nblist); 4473 LIST_HEAD(nvme_nblist); 4474 4475 phba->sli4_hba.io_xri_cnt = 0; 4476 for (bcnt = 0; bcnt < num_to_alloc; bcnt++) { 4477 lpfc_ncmd = kzalloc(sizeof(*lpfc_ncmd), GFP_KERNEL); 4478 if (!lpfc_ncmd) 4479 break; 4480 /* 4481 * Get memory from the pci pool to map the virt space to 4482 * pci bus space for an I/O. The DMA buffer includes the 4483 * number of SGE's necessary to support the sg_tablesize. 4484 */ 4485 lpfc_ncmd->data = dma_pool_zalloc(phba->lpfc_sg_dma_buf_pool, 4486 GFP_KERNEL, 4487 &lpfc_ncmd->dma_handle); 4488 if (!lpfc_ncmd->data) { 4489 kfree(lpfc_ncmd); 4490 break; 4491 } 4492 4493 if (phba->cfg_xpsgl && !phba->nvmet_support) { 4494 INIT_LIST_HEAD(&lpfc_ncmd->dma_sgl_xtra_list); 4495 } else { 4496 /* 4497 * 4K Page alignment is CRITICAL to BlockGuard, double 4498 * check to be sure. 4499 */ 4500 if ((phba->sli3_options & LPFC_SLI3_BG_ENABLED) && 4501 (((unsigned long)(lpfc_ncmd->data) & 4502 (unsigned long)(SLI4_PAGE_SIZE - 1)) != 0)) { 4503 lpfc_printf_log(phba, KERN_ERR, 4504 LOG_TRACE_EVENT, 4505 "3369 Memory alignment err: " 4506 "addr=%lx\n", 4507 (unsigned long)lpfc_ncmd->data); 4508 dma_pool_free(phba->lpfc_sg_dma_buf_pool, 4509 lpfc_ncmd->data, 4510 lpfc_ncmd->dma_handle); 4511 kfree(lpfc_ncmd); 4512 break; 4513 } 4514 } 4515 4516 INIT_LIST_HEAD(&lpfc_ncmd->dma_cmd_rsp_list); 4517 4518 lxri = lpfc_sli4_next_xritag(phba); 4519 if (lxri == NO_XRI) { 4520 dma_pool_free(phba->lpfc_sg_dma_buf_pool, 4521 lpfc_ncmd->data, lpfc_ncmd->dma_handle); 4522 kfree(lpfc_ncmd); 4523 break; 4524 } 4525 pwqeq = &lpfc_ncmd->cur_iocbq; 4526 4527 /* Allocate iotag for lpfc_ncmd->cur_iocbq. */ 4528 iotag = lpfc_sli_next_iotag(phba, pwqeq); 4529 if (iotag == 0) { 4530 dma_pool_free(phba->lpfc_sg_dma_buf_pool, 4531 lpfc_ncmd->data, lpfc_ncmd->dma_handle); 4532 kfree(lpfc_ncmd); 4533 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 4534 "6121 Failed to allocate IOTAG for" 4535 " XRI:0x%x\n", lxri); 4536 lpfc_sli4_free_xri(phba, lxri); 4537 break; 4538 } 4539 pwqeq->sli4_lxritag = lxri; 4540 pwqeq->sli4_xritag = phba->sli4_hba.xri_ids[lxri]; 4541 4542 /* Initialize local short-hand pointers. */ 4543 lpfc_ncmd->dma_sgl = lpfc_ncmd->data; 4544 lpfc_ncmd->dma_phys_sgl = lpfc_ncmd->dma_handle; 4545 lpfc_ncmd->cur_iocbq.io_buf = lpfc_ncmd; 4546 spin_lock_init(&lpfc_ncmd->buf_lock); 4547 4548 /* add the nvme buffer to a post list */ 4549 list_add_tail(&lpfc_ncmd->list, &post_nblist); 4550 phba->sli4_hba.io_xri_cnt++; 4551 } 4552 lpfc_printf_log(phba, KERN_INFO, LOG_NVME, 4553 "6114 Allocate %d out of %d requested new NVME " 4554 "buffers of size x%zu bytes\n", bcnt, num_to_alloc, 4555 sizeof(*lpfc_ncmd)); 4556 4557 4558 /* post the list of nvme buffer sgls to port if available */ 4559 if (!list_empty(&post_nblist)) 4560 num_posted = lpfc_sli4_post_io_sgl_list( 4561 phba, &post_nblist, bcnt); 4562 else 4563 num_posted = 0; 4564 4565 return num_posted; 4566 } 4567 4568 static uint64_t 4569 lpfc_get_wwpn(struct lpfc_hba *phba) 4570 { 4571 uint64_t wwn; 4572 int rc; 4573 LPFC_MBOXQ_t *mboxq; 4574 MAILBOX_t *mb; 4575 4576 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, 4577 GFP_KERNEL); 4578 if (!mboxq) 4579 return (uint64_t)-1; 4580 4581 /* First get WWN of HBA instance */ 4582 lpfc_read_nv(phba, mboxq); 4583 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); 4584 if (rc != MBX_SUCCESS) { 4585 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 4586 "6019 Mailbox failed , mbxCmd x%x " 4587 "READ_NV, mbxStatus x%x\n", 4588 bf_get(lpfc_mqe_command, &mboxq->u.mqe), 4589 bf_get(lpfc_mqe_status, &mboxq->u.mqe)); 4590 mempool_free(mboxq, phba->mbox_mem_pool); 4591 return (uint64_t) -1; 4592 } 4593 mb = &mboxq->u.mb; 4594 memcpy(&wwn, (char *)mb->un.varRDnvp.portname, sizeof(uint64_t)); 4595 /* wwn is WWPN of HBA instance */ 4596 mempool_free(mboxq, phba->mbox_mem_pool); 4597 if (phba->sli_rev == LPFC_SLI_REV4) 4598 return be64_to_cpu(wwn); 4599 else 4600 return rol64(wwn, 32); 4601 } 4602 4603 static unsigned short lpfc_get_sg_tablesize(struct lpfc_hba *phba) 4604 { 4605 if (phba->sli_rev == LPFC_SLI_REV4) 4606 if (phba->cfg_xpsgl && !phba->nvmet_support) 4607 return LPFC_MAX_SG_TABLESIZE; 4608 else 4609 return phba->cfg_scsi_seg_cnt; 4610 else 4611 return phba->cfg_sg_seg_cnt; 4612 } 4613 4614 /** 4615 * lpfc_vmid_res_alloc - Allocates resources for VMID 4616 * @phba: pointer to lpfc hba data structure. 4617 * @vport: pointer to vport data structure 4618 * 4619 * This routine allocated the resources needed for the VMID. 4620 * 4621 * Return codes 4622 * 0 on Success 4623 * Non-0 on Failure 4624 */ 4625 static int 4626 lpfc_vmid_res_alloc(struct lpfc_hba *phba, struct lpfc_vport *vport) 4627 { 4628 /* VMID feature is supported only on SLI4 */ 4629 if (phba->sli_rev == LPFC_SLI_REV3) { 4630 phba->cfg_vmid_app_header = 0; 4631 phba->cfg_vmid_priority_tagging = 0; 4632 } 4633 4634 if (lpfc_is_vmid_enabled(phba)) { 4635 vport->vmid = 4636 kcalloc(phba->cfg_max_vmid, sizeof(struct lpfc_vmid), 4637 GFP_KERNEL); 4638 if (!vport->vmid) 4639 return -ENOMEM; 4640 4641 rwlock_init(&vport->vmid_lock); 4642 4643 /* Set the VMID parameters for the vport */ 4644 vport->vmid_priority_tagging = phba->cfg_vmid_priority_tagging; 4645 vport->vmid_inactivity_timeout = 4646 phba->cfg_vmid_inactivity_timeout; 4647 vport->max_vmid = phba->cfg_max_vmid; 4648 vport->cur_vmid_cnt = 0; 4649 4650 vport->vmid_priority_range = bitmap_zalloc 4651 (LPFC_VMID_MAX_PRIORITY_RANGE, GFP_KERNEL); 4652 4653 if (!vport->vmid_priority_range) { 4654 kfree(vport->vmid); 4655 return -ENOMEM; 4656 } 4657 4658 hash_init(vport->hash_table); 4659 } 4660 return 0; 4661 } 4662 4663 /** 4664 * lpfc_create_port - Create an FC port 4665 * @phba: pointer to lpfc hba data structure. 4666 * @instance: a unique integer ID to this FC port. 4667 * @dev: pointer to the device data structure. 4668 * 4669 * This routine creates a FC port for the upper layer protocol. The FC port 4670 * can be created on top of either a physical port or a virtual port provided 4671 * by the HBA. This routine also allocates a SCSI host data structure (shost) 4672 * and associates the FC port created before adding the shost into the SCSI 4673 * layer. 4674 * 4675 * Return codes 4676 * @vport - pointer to the virtual N_Port data structure. 4677 * NULL - port create failed. 4678 **/ 4679 struct lpfc_vport * 4680 lpfc_create_port(struct lpfc_hba *phba, int instance, struct device *dev) 4681 { 4682 struct lpfc_vport *vport; 4683 struct Scsi_Host *shost = NULL; 4684 struct scsi_host_template *template; 4685 int error = 0; 4686 int i; 4687 uint64_t wwn; 4688 bool use_no_reset_hba = false; 4689 int rc; 4690 u8 if_type; 4691 4692 if (lpfc_no_hba_reset_cnt) { 4693 if (phba->sli_rev < LPFC_SLI_REV4 && 4694 dev == &phba->pcidev->dev) { 4695 /* Reset the port first */ 4696 lpfc_sli_brdrestart(phba); 4697 rc = lpfc_sli_chipset_init(phba); 4698 if (rc) 4699 return NULL; 4700 } 4701 wwn = lpfc_get_wwpn(phba); 4702 } 4703 4704 for (i = 0; i < lpfc_no_hba_reset_cnt; i++) { 4705 if (wwn == lpfc_no_hba_reset[i]) { 4706 lpfc_printf_log(phba, KERN_ERR, 4707 LOG_TRACE_EVENT, 4708 "6020 Setting use_no_reset port=%llx\n", 4709 wwn); 4710 use_no_reset_hba = true; 4711 break; 4712 } 4713 } 4714 4715 /* Seed template for SCSI host registration */ 4716 if (dev == &phba->pcidev->dev) { 4717 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) { 4718 /* Seed physical port template */ 4719 template = &lpfc_template; 4720 4721 if (use_no_reset_hba) 4722 /* template is for a no reset SCSI Host */ 4723 template->eh_host_reset_handler = NULL; 4724 4725 /* Seed updated value of sg_tablesize */ 4726 template->sg_tablesize = lpfc_get_sg_tablesize(phba); 4727 } else { 4728 /* NVMET is for physical port only */ 4729 template = &lpfc_template_nvme; 4730 } 4731 } else { 4732 /* Seed vport template */ 4733 template = &lpfc_vport_template; 4734 4735 /* Seed updated value of sg_tablesize */ 4736 template->sg_tablesize = lpfc_get_sg_tablesize(phba); 4737 } 4738 4739 shost = scsi_host_alloc(template, sizeof(struct lpfc_vport)); 4740 if (!shost) 4741 goto out; 4742 4743 vport = (struct lpfc_vport *) shost->hostdata; 4744 vport->phba = phba; 4745 set_bit(FC_LOADING, &vport->load_flag); 4746 set_bit(FC_VPORT_NEEDS_REG_VPI, &vport->fc_flag); 4747 vport->fc_rscn_flush = 0; 4748 atomic_set(&vport->fc_plogi_cnt, 0); 4749 atomic_set(&vport->fc_adisc_cnt, 0); 4750 atomic_set(&vport->fc_reglogin_cnt, 0); 4751 atomic_set(&vport->fc_prli_cnt, 0); 4752 atomic_set(&vport->fc_unmap_cnt, 0); 4753 atomic_set(&vport->fc_map_cnt, 0); 4754 atomic_set(&vport->fc_npr_cnt, 0); 4755 atomic_set(&vport->fc_unused_cnt, 0); 4756 lpfc_get_vport_cfgparam(vport); 4757 4758 /* Adjust value in vport */ 4759 vport->cfg_enable_fc4_type = phba->cfg_enable_fc4_type; 4760 4761 shost->unique_id = instance; 4762 shost->max_id = LPFC_MAX_TARGET; 4763 shost->max_lun = vport->cfg_max_luns; 4764 shost->this_id = -1; 4765 4766 /* Set max_cmd_len applicable to ASIC support */ 4767 if (phba->sli_rev == LPFC_SLI_REV4) { 4768 if_type = bf_get(lpfc_sli_intf_if_type, 4769 &phba->sli4_hba.sli_intf); 4770 switch (if_type) { 4771 case LPFC_SLI_INTF_IF_TYPE_2: 4772 fallthrough; 4773 case LPFC_SLI_INTF_IF_TYPE_6: 4774 shost->max_cmd_len = LPFC_FCP_CDB_LEN_32; 4775 break; 4776 default: 4777 shost->max_cmd_len = LPFC_FCP_CDB_LEN; 4778 break; 4779 } 4780 } else { 4781 shost->max_cmd_len = LPFC_FCP_CDB_LEN; 4782 } 4783 4784 if (phba->sli_rev == LPFC_SLI_REV4) { 4785 if (!phba->cfg_fcp_mq_threshold || 4786 phba->cfg_fcp_mq_threshold > phba->cfg_hdw_queue) 4787 phba->cfg_fcp_mq_threshold = phba->cfg_hdw_queue; 4788 4789 shost->nr_hw_queues = min_t(int, 2 * num_possible_nodes(), 4790 phba->cfg_fcp_mq_threshold); 4791 4792 shost->dma_boundary = 4793 phba->sli4_hba.pc_sli4_params.sge_supp_len-1; 4794 } else 4795 /* SLI-3 has a limited number of hardware queues (3), 4796 * thus there is only one for FCP processing. 4797 */ 4798 shost->nr_hw_queues = 1; 4799 4800 /* 4801 * Set initial can_queue value since 0 is no longer supported and 4802 * scsi_add_host will fail. This will be adjusted later based on the 4803 * max xri value determined in hba setup. 4804 */ 4805 shost->can_queue = phba->cfg_hba_queue_depth - 10; 4806 if (dev != &phba->pcidev->dev) { 4807 shost->transportt = lpfc_vport_transport_template; 4808 vport->port_type = LPFC_NPIV_PORT; 4809 } else { 4810 shost->transportt = lpfc_transport_template; 4811 vport->port_type = LPFC_PHYSICAL_PORT; 4812 } 4813 4814 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP, 4815 "9081 CreatePort TMPLATE type %x TBLsize %d " 4816 "SEGcnt %d/%d\n", 4817 vport->port_type, shost->sg_tablesize, 4818 phba->cfg_scsi_seg_cnt, phba->cfg_sg_seg_cnt); 4819 4820 /* Allocate the resources for VMID */ 4821 rc = lpfc_vmid_res_alloc(phba, vport); 4822 4823 if (rc) 4824 goto out_put_shost; 4825 4826 /* Initialize all internally managed lists. */ 4827 INIT_LIST_HEAD(&vport->fc_nodes); 4828 spin_lock_init(&vport->fc_nodes_list_lock); 4829 INIT_LIST_HEAD(&vport->rcv_buffer_list); 4830 spin_lock_init(&vport->work_port_lock); 4831 4832 timer_setup(&vport->fc_disctmo, lpfc_disc_timeout, 0); 4833 4834 timer_setup(&vport->els_tmofunc, lpfc_els_timeout, 0); 4835 4836 timer_setup(&vport->delayed_disc_tmo, lpfc_delayed_disc_tmo, 0); 4837 4838 if (phba->sli3_options & LPFC_SLI3_BG_ENABLED) 4839 lpfc_setup_bg(phba, shost); 4840 4841 error = scsi_add_host_with_dma(shost, dev, &phba->pcidev->dev); 4842 if (error) 4843 goto out_free_vmid; 4844 4845 spin_lock_irq(&phba->port_list_lock); 4846 list_add_tail(&vport->listentry, &phba->port_list); 4847 spin_unlock_irq(&phba->port_list_lock); 4848 return vport; 4849 4850 out_free_vmid: 4851 kfree(vport->vmid); 4852 bitmap_free(vport->vmid_priority_range); 4853 out_put_shost: 4854 scsi_host_put(shost); 4855 out: 4856 return NULL; 4857 } 4858 4859 /** 4860 * destroy_port - destroy an FC port 4861 * @vport: pointer to an lpfc virtual N_Port data structure. 4862 * 4863 * This routine destroys a FC port from the upper layer protocol. All the 4864 * resources associated with the port are released. 4865 **/ 4866 void 4867 destroy_port(struct lpfc_vport *vport) 4868 { 4869 struct Scsi_Host *shost = lpfc_shost_from_vport(vport); 4870 struct lpfc_hba *phba = vport->phba; 4871 4872 lpfc_debugfs_terminate(vport); 4873 fc_remove_host(shost); 4874 scsi_remove_host(shost); 4875 4876 spin_lock_irq(&phba->port_list_lock); 4877 list_del_init(&vport->listentry); 4878 spin_unlock_irq(&phba->port_list_lock); 4879 4880 lpfc_cleanup(vport); 4881 return; 4882 } 4883 4884 /** 4885 * lpfc_get_instance - Get a unique integer ID 4886 * 4887 * This routine allocates a unique integer ID from lpfc_hba_index pool. It 4888 * uses the kernel idr facility to perform the task. 4889 * 4890 * Return codes: 4891 * instance - a unique integer ID allocated as the new instance. 4892 * -1 - lpfc get instance failed. 4893 **/ 4894 int 4895 lpfc_get_instance(void) 4896 { 4897 int ret; 4898 4899 ret = idr_alloc(&lpfc_hba_index, NULL, 0, 0, GFP_KERNEL); 4900 return ret < 0 ? -1 : ret; 4901 } 4902 4903 /** 4904 * lpfc_scan_finished - method for SCSI layer to detect whether scan is done 4905 * @shost: pointer to SCSI host data structure. 4906 * @time: elapsed time of the scan in jiffies. 4907 * 4908 * This routine is called by the SCSI layer with a SCSI host to determine 4909 * whether the scan host is finished. 4910 * 4911 * Note: there is no scan_start function as adapter initialization will have 4912 * asynchronously kicked off the link initialization. 4913 * 4914 * Return codes 4915 * 0 - SCSI host scan is not over yet. 4916 * 1 - SCSI host scan is over. 4917 **/ 4918 int lpfc_scan_finished(struct Scsi_Host *shost, unsigned long time) 4919 { 4920 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata; 4921 struct lpfc_hba *phba = vport->phba; 4922 int stat = 0; 4923 4924 spin_lock_irq(shost->host_lock); 4925 4926 if (test_bit(FC_UNLOADING, &vport->load_flag)) { 4927 stat = 1; 4928 goto finished; 4929 } 4930 if (time >= secs_to_jiffies(30)) { 4931 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 4932 "0461 Scanning longer than 30 " 4933 "seconds. Continuing initialization\n"); 4934 stat = 1; 4935 goto finished; 4936 } 4937 if (time >= secs_to_jiffies(15) && 4938 phba->link_state <= LPFC_LINK_DOWN) { 4939 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 4940 "0465 Link down longer than 15 " 4941 "seconds. Continuing initialization\n"); 4942 stat = 1; 4943 goto finished; 4944 } 4945 4946 if (vport->port_state != LPFC_VPORT_READY) 4947 goto finished; 4948 if (vport->num_disc_nodes || vport->fc_prli_sent) 4949 goto finished; 4950 if (!atomic_read(&vport->fc_map_cnt) && 4951 time < secs_to_jiffies(2)) 4952 goto finished; 4953 if ((phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) != 0) 4954 goto finished; 4955 4956 stat = 1; 4957 4958 finished: 4959 spin_unlock_irq(shost->host_lock); 4960 return stat; 4961 } 4962 4963 static void lpfc_host_supported_speeds_set(struct Scsi_Host *shost) 4964 { 4965 struct lpfc_vport *vport = (struct lpfc_vport *)shost->hostdata; 4966 struct lpfc_hba *phba = vport->phba; 4967 4968 fc_host_supported_speeds(shost) = 0; 4969 /* 4970 * Avoid reporting supported link speed for FCoE as it can't be 4971 * controlled via FCoE. 4972 */ 4973 if (test_bit(HBA_FCOE_MODE, &phba->hba_flag)) 4974 return; 4975 4976 if (phba->lmt & LMT_256Gb) 4977 fc_host_supported_speeds(shost) |= FC_PORTSPEED_256GBIT; 4978 if (phba->lmt & LMT_128Gb) 4979 fc_host_supported_speeds(shost) |= FC_PORTSPEED_128GBIT; 4980 if (phba->lmt & LMT_64Gb) 4981 fc_host_supported_speeds(shost) |= FC_PORTSPEED_64GBIT; 4982 if (phba->lmt & LMT_32Gb) 4983 fc_host_supported_speeds(shost) |= FC_PORTSPEED_32GBIT; 4984 if (phba->lmt & LMT_16Gb) 4985 fc_host_supported_speeds(shost) |= FC_PORTSPEED_16GBIT; 4986 if (phba->lmt & LMT_10Gb) 4987 fc_host_supported_speeds(shost) |= FC_PORTSPEED_10GBIT; 4988 if (phba->lmt & LMT_8Gb) 4989 fc_host_supported_speeds(shost) |= FC_PORTSPEED_8GBIT; 4990 if (phba->lmt & LMT_4Gb) 4991 fc_host_supported_speeds(shost) |= FC_PORTSPEED_4GBIT; 4992 if (phba->lmt & LMT_2Gb) 4993 fc_host_supported_speeds(shost) |= FC_PORTSPEED_2GBIT; 4994 if (phba->lmt & LMT_1Gb) 4995 fc_host_supported_speeds(shost) |= FC_PORTSPEED_1GBIT; 4996 } 4997 4998 /** 4999 * lpfc_host_attrib_init - Initialize SCSI host attributes on a FC port 5000 * @shost: pointer to SCSI host data structure. 5001 * 5002 * This routine initializes a given SCSI host attributes on a FC port. The 5003 * SCSI host can be either on top of a physical port or a virtual port. 5004 **/ 5005 void lpfc_host_attrib_init(struct Scsi_Host *shost) 5006 { 5007 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata; 5008 struct lpfc_hba *phba = vport->phba; 5009 /* 5010 * Set fixed host attributes. Must done after lpfc_sli_hba_setup(). 5011 */ 5012 5013 fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn); 5014 fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn); 5015 fc_host_supported_classes(shost) = FC_COS_CLASS3; 5016 5017 memset(fc_host_supported_fc4s(shost), 0, 5018 sizeof(fc_host_supported_fc4s(shost))); 5019 fc_host_supported_fc4s(shost)[2] = 1; 5020 fc_host_supported_fc4s(shost)[7] = 1; 5021 5022 lpfc_vport_symbolic_node_name(vport, fc_host_symbolic_name(shost), 5023 sizeof fc_host_symbolic_name(shost)); 5024 5025 lpfc_host_supported_speeds_set(shost); 5026 5027 fc_host_maxframe_size(shost) = 5028 (((uint32_t) vport->fc_sparam.cmn.bbRcvSizeMsb & 0x0F) << 8) | 5029 (uint32_t) vport->fc_sparam.cmn.bbRcvSizeLsb; 5030 5031 fc_host_dev_loss_tmo(shost) = vport->cfg_devloss_tmo; 5032 5033 /* This value is also unchanging */ 5034 memset(fc_host_active_fc4s(shost), 0, 5035 sizeof(fc_host_active_fc4s(shost))); 5036 fc_host_active_fc4s(shost)[2] = 1; 5037 fc_host_active_fc4s(shost)[7] = 1; 5038 5039 fc_host_max_npiv_vports(shost) = phba->max_vpi; 5040 clear_bit(FC_LOADING, &vport->load_flag); 5041 } 5042 5043 /** 5044 * lpfc_stop_port_s3 - Stop SLI3 device port 5045 * @phba: pointer to lpfc hba data structure. 5046 * 5047 * This routine is invoked to stop an SLI3 device port, it stops the device 5048 * from generating interrupts and stops the device driver's timers for the 5049 * device. 5050 **/ 5051 static void 5052 lpfc_stop_port_s3(struct lpfc_hba *phba) 5053 { 5054 /* Clear all interrupt enable conditions */ 5055 writel(0, phba->HCregaddr); 5056 readl(phba->HCregaddr); /* flush */ 5057 /* Clear all pending interrupts */ 5058 writel(0xffffffff, phba->HAregaddr); 5059 readl(phba->HAregaddr); /* flush */ 5060 5061 /* Reset some HBA SLI setup states */ 5062 lpfc_stop_hba_timers(phba); 5063 phba->pport->work_port_events = 0; 5064 } 5065 5066 /** 5067 * lpfc_stop_port_s4 - Stop SLI4 device port 5068 * @phba: pointer to lpfc hba data structure. 5069 * 5070 * This routine is invoked to stop an SLI4 device port, it stops the device 5071 * from generating interrupts and stops the device driver's timers for the 5072 * device. 5073 **/ 5074 static void 5075 lpfc_stop_port_s4(struct lpfc_hba *phba) 5076 { 5077 /* Reset some HBA SLI4 setup states */ 5078 lpfc_stop_hba_timers(phba); 5079 if (phba->pport) 5080 phba->pport->work_port_events = 0; 5081 phba->sli4_hba.intr_enable = 0; 5082 } 5083 5084 /** 5085 * lpfc_stop_port - Wrapper function for stopping hba port 5086 * @phba: Pointer to HBA context object. 5087 * 5088 * This routine wraps the actual SLI3 or SLI4 hba stop port routine from 5089 * the API jump table function pointer from the lpfc_hba struct. 5090 **/ 5091 void 5092 lpfc_stop_port(struct lpfc_hba *phba) 5093 { 5094 phba->lpfc_stop_port(phba); 5095 5096 if (phba->wq) 5097 flush_workqueue(phba->wq); 5098 } 5099 5100 /** 5101 * lpfc_fcf_redisc_wait_start_timer - Start fcf rediscover wait timer 5102 * @phba: Pointer to hba for which this call is being executed. 5103 * 5104 * This routine starts the timer waiting for the FCF rediscovery to complete. 5105 **/ 5106 void 5107 lpfc_fcf_redisc_wait_start_timer(struct lpfc_hba *phba) 5108 { 5109 unsigned long fcf_redisc_wait_tmo = 5110 (jiffies + msecs_to_jiffies(LPFC_FCF_REDISCOVER_WAIT_TMO)); 5111 /* Start fcf rediscovery wait period timer */ 5112 mod_timer(&phba->fcf.redisc_wait, fcf_redisc_wait_tmo); 5113 spin_lock_irq(&phba->hbalock); 5114 /* Allow action to new fcf asynchronous event */ 5115 phba->fcf.fcf_flag &= ~(FCF_AVAILABLE | FCF_SCAN_DONE); 5116 /* Mark the FCF rediscovery pending state */ 5117 phba->fcf.fcf_flag |= FCF_REDISC_PEND; 5118 spin_unlock_irq(&phba->hbalock); 5119 } 5120 5121 /** 5122 * lpfc_sli4_fcf_redisc_wait_tmo - FCF table rediscover wait timeout 5123 * @t: Timer context used to obtain the pointer to lpfc hba data structure. 5124 * 5125 * This routine is invoked when waiting for FCF table rediscover has been 5126 * timed out. If new FCF record(s) has (have) been discovered during the 5127 * wait period, a new FCF event shall be added to the FCOE async event 5128 * list, and then worker thread shall be waked up for processing from the 5129 * worker thread context. 5130 **/ 5131 static void 5132 lpfc_sli4_fcf_redisc_wait_tmo(struct timer_list *t) 5133 { 5134 struct lpfc_hba *phba = timer_container_of(phba, t, fcf.redisc_wait); 5135 5136 /* Don't send FCF rediscovery event if timer cancelled */ 5137 spin_lock_irq(&phba->hbalock); 5138 if (!(phba->fcf.fcf_flag & FCF_REDISC_PEND)) { 5139 spin_unlock_irq(&phba->hbalock); 5140 return; 5141 } 5142 /* Clear FCF rediscovery timer pending flag */ 5143 phba->fcf.fcf_flag &= ~FCF_REDISC_PEND; 5144 /* FCF rediscovery event to worker thread */ 5145 phba->fcf.fcf_flag |= FCF_REDISC_EVT; 5146 spin_unlock_irq(&phba->hbalock); 5147 lpfc_printf_log(phba, KERN_INFO, LOG_FIP, 5148 "2776 FCF rediscover quiescent timer expired\n"); 5149 /* wake up worker thread */ 5150 lpfc_worker_wake_up(phba); 5151 } 5152 5153 /** 5154 * lpfc_vmid_poll - VMID timeout detection 5155 * @t: Timer context used to obtain the pointer to lpfc hba data structure. 5156 * 5157 * This routine is invoked when there is no I/O on by a VM for the specified 5158 * amount of time. When this situation is detected, the VMID has to be 5159 * deregistered from the switch and all the local resources freed. The VMID 5160 * will be reassigned to the VM once the I/O begins. 5161 **/ 5162 static void 5163 lpfc_vmid_poll(struct timer_list *t) 5164 { 5165 struct lpfc_hba *phba = timer_container_of(phba, t, 5166 inactive_vmid_poll); 5167 u32 wake_up = 0; 5168 5169 /* check if there is a need to issue QFPA */ 5170 if (phba->pport->vmid_priority_tagging) { 5171 wake_up = 1; 5172 phba->pport->work_port_events |= WORKER_CHECK_VMID_ISSUE_QFPA; 5173 } 5174 5175 /* Is the vmid inactivity timer enabled */ 5176 if (phba->pport->vmid_inactivity_timeout || 5177 test_bit(FC_DEREGISTER_ALL_APP_ID, &phba->pport->load_flag)) { 5178 wake_up = 1; 5179 phba->pport->work_port_events |= WORKER_CHECK_INACTIVE_VMID; 5180 } 5181 5182 if (wake_up) 5183 lpfc_worker_wake_up(phba); 5184 5185 /* restart the timer for the next iteration */ 5186 mod_timer(&phba->inactive_vmid_poll, 5187 jiffies + secs_to_jiffies(LPFC_VMID_TIMER)); 5188 } 5189 5190 /** 5191 * lpfc_sli4_parse_latt_fault - Parse sli4 link-attention link fault code 5192 * @phba: pointer to lpfc hba data structure. 5193 * @acqe_link: pointer to the async link completion queue entry. 5194 * 5195 * This routine is to parse the SLI4 link-attention link fault code. 5196 **/ 5197 static void 5198 lpfc_sli4_parse_latt_fault(struct lpfc_hba *phba, 5199 struct lpfc_acqe_link *acqe_link) 5200 { 5201 switch (bf_get(lpfc_acqe_fc_la_att_type, acqe_link)) { 5202 case LPFC_FC_LA_TYPE_LINK_DOWN: 5203 case LPFC_FC_LA_TYPE_TRUNKING_EVENT: 5204 case LPFC_FC_LA_TYPE_ACTIVATE_FAIL: 5205 case LPFC_FC_LA_TYPE_LINK_RESET_PRTCL_EVT: 5206 break; 5207 default: 5208 switch (bf_get(lpfc_acqe_link_fault, acqe_link)) { 5209 case LPFC_ASYNC_LINK_FAULT_NONE: 5210 case LPFC_ASYNC_LINK_FAULT_LOCAL: 5211 case LPFC_ASYNC_LINK_FAULT_REMOTE: 5212 case LPFC_ASYNC_LINK_FAULT_LR_LRR: 5213 break; 5214 default: 5215 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 5216 "0398 Unknown link fault code: x%x\n", 5217 bf_get(lpfc_acqe_link_fault, acqe_link)); 5218 break; 5219 } 5220 break; 5221 } 5222 } 5223 5224 /** 5225 * lpfc_sli4_parse_latt_type - Parse sli4 link attention type 5226 * @phba: pointer to lpfc hba data structure. 5227 * @acqe_link: pointer to the async link completion queue entry. 5228 * 5229 * This routine is to parse the SLI4 link attention type and translate it 5230 * into the base driver's link attention type coding. 5231 * 5232 * Return: Link attention type in terms of base driver's coding. 5233 **/ 5234 static uint8_t 5235 lpfc_sli4_parse_latt_type(struct lpfc_hba *phba, 5236 struct lpfc_acqe_link *acqe_link) 5237 { 5238 uint8_t att_type; 5239 5240 switch (bf_get(lpfc_acqe_link_status, acqe_link)) { 5241 case LPFC_ASYNC_LINK_STATUS_DOWN: 5242 case LPFC_ASYNC_LINK_STATUS_LOGICAL_DOWN: 5243 att_type = LPFC_ATT_LINK_DOWN; 5244 break; 5245 case LPFC_ASYNC_LINK_STATUS_UP: 5246 /* Ignore physical link up events - wait for logical link up */ 5247 att_type = LPFC_ATT_RESERVED; 5248 break; 5249 case LPFC_ASYNC_LINK_STATUS_LOGICAL_UP: 5250 att_type = LPFC_ATT_LINK_UP; 5251 break; 5252 default: 5253 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 5254 "0399 Invalid link attention type: x%x\n", 5255 bf_get(lpfc_acqe_link_status, acqe_link)); 5256 att_type = LPFC_ATT_RESERVED; 5257 break; 5258 } 5259 return att_type; 5260 } 5261 5262 /** 5263 * lpfc_sli_port_speed_get - Get sli3 link speed code to link speed 5264 * @phba: pointer to lpfc hba data structure. 5265 * 5266 * This routine is to get an SLI3 FC port's link speed in Mbps. 5267 * 5268 * Return: link speed in terms of Mbps. 5269 **/ 5270 uint32_t 5271 lpfc_sli_port_speed_get(struct lpfc_hba *phba) 5272 { 5273 uint32_t link_speed; 5274 5275 if (!lpfc_is_link_up(phba)) 5276 return 0; 5277 5278 if (phba->sli_rev <= LPFC_SLI_REV3) { 5279 switch (phba->fc_linkspeed) { 5280 case LPFC_LINK_SPEED_1GHZ: 5281 link_speed = 1000; 5282 break; 5283 case LPFC_LINK_SPEED_2GHZ: 5284 link_speed = 2000; 5285 break; 5286 case LPFC_LINK_SPEED_4GHZ: 5287 link_speed = 4000; 5288 break; 5289 case LPFC_LINK_SPEED_8GHZ: 5290 link_speed = 8000; 5291 break; 5292 case LPFC_LINK_SPEED_10GHZ: 5293 link_speed = 10000; 5294 break; 5295 case LPFC_LINK_SPEED_16GHZ: 5296 link_speed = 16000; 5297 break; 5298 default: 5299 link_speed = 0; 5300 } 5301 } else { 5302 if (phba->sli4_hba.link_state.logical_speed) 5303 link_speed = 5304 phba->sli4_hba.link_state.logical_speed; 5305 else 5306 link_speed = phba->sli4_hba.link_state.speed; 5307 } 5308 return link_speed; 5309 } 5310 5311 /** 5312 * lpfc_sli4_port_speed_parse - Parse async evt link speed code to link speed 5313 * @phba: pointer to lpfc hba data structure. 5314 * @evt_code: asynchronous event code. 5315 * @speed_code: asynchronous event link speed code. 5316 * 5317 * This routine is to parse the giving SLI4 async event link speed code into 5318 * value of Mbps for the link speed. 5319 * 5320 * Return: link speed in terms of Mbps. 5321 **/ 5322 static uint32_t 5323 lpfc_sli4_port_speed_parse(struct lpfc_hba *phba, uint32_t evt_code, 5324 uint8_t speed_code) 5325 { 5326 uint32_t port_speed; 5327 5328 switch (evt_code) { 5329 case LPFC_TRAILER_CODE_LINK: 5330 switch (speed_code) { 5331 case LPFC_ASYNC_LINK_SPEED_ZERO: 5332 port_speed = 0; 5333 break; 5334 case LPFC_ASYNC_LINK_SPEED_10MBPS: 5335 port_speed = 10; 5336 break; 5337 case LPFC_ASYNC_LINK_SPEED_100MBPS: 5338 port_speed = 100; 5339 break; 5340 case LPFC_ASYNC_LINK_SPEED_1GBPS: 5341 port_speed = 1000; 5342 break; 5343 case LPFC_ASYNC_LINK_SPEED_10GBPS: 5344 port_speed = 10000; 5345 break; 5346 case LPFC_ASYNC_LINK_SPEED_20GBPS: 5347 port_speed = 20000; 5348 break; 5349 case LPFC_ASYNC_LINK_SPEED_25GBPS: 5350 port_speed = 25000; 5351 break; 5352 case LPFC_ASYNC_LINK_SPEED_40GBPS: 5353 port_speed = 40000; 5354 break; 5355 case LPFC_ASYNC_LINK_SPEED_100GBPS: 5356 port_speed = 100000; 5357 break; 5358 default: 5359 port_speed = 0; 5360 } 5361 break; 5362 case LPFC_TRAILER_CODE_FC: 5363 switch (speed_code) { 5364 case LPFC_FC_LA_SPEED_UNKNOWN: 5365 port_speed = 0; 5366 break; 5367 case LPFC_FC_LA_SPEED_1G: 5368 port_speed = 1000; 5369 break; 5370 case LPFC_FC_LA_SPEED_2G: 5371 port_speed = 2000; 5372 break; 5373 case LPFC_FC_LA_SPEED_4G: 5374 port_speed = 4000; 5375 break; 5376 case LPFC_FC_LA_SPEED_8G: 5377 port_speed = 8000; 5378 break; 5379 case LPFC_FC_LA_SPEED_10G: 5380 port_speed = 10000; 5381 break; 5382 case LPFC_FC_LA_SPEED_16G: 5383 port_speed = 16000; 5384 break; 5385 case LPFC_FC_LA_SPEED_32G: 5386 port_speed = 32000; 5387 break; 5388 case LPFC_FC_LA_SPEED_64G: 5389 port_speed = 64000; 5390 break; 5391 case LPFC_FC_LA_SPEED_128G: 5392 port_speed = 128000; 5393 break; 5394 case LPFC_FC_LA_SPEED_256G: 5395 port_speed = 256000; 5396 break; 5397 default: 5398 port_speed = 0; 5399 } 5400 break; 5401 default: 5402 port_speed = 0; 5403 } 5404 return port_speed; 5405 } 5406 5407 /** 5408 * lpfc_sli4_async_link_evt - Process the asynchronous FCoE link event 5409 * @phba: pointer to lpfc hba data structure. 5410 * @acqe_link: pointer to the async link completion queue entry. 5411 * 5412 * This routine is to handle the SLI4 asynchronous FCoE link event. 5413 **/ 5414 static void 5415 lpfc_sli4_async_link_evt(struct lpfc_hba *phba, 5416 struct lpfc_acqe_link *acqe_link) 5417 { 5418 LPFC_MBOXQ_t *pmb; 5419 MAILBOX_t *mb; 5420 struct lpfc_mbx_read_top *la; 5421 uint8_t att_type; 5422 int rc; 5423 5424 att_type = lpfc_sli4_parse_latt_type(phba, acqe_link); 5425 if (att_type != LPFC_ATT_LINK_DOWN && att_type != LPFC_ATT_LINK_UP) 5426 return; 5427 phba->fcoe_eventtag = acqe_link->event_tag; 5428 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 5429 if (!pmb) { 5430 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 5431 "0395 The mboxq allocation failed\n"); 5432 return; 5433 } 5434 5435 rc = lpfc_mbox_rsrc_prep(phba, pmb); 5436 if (rc) { 5437 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 5438 "0396 mailbox allocation failed\n"); 5439 goto out_free_pmb; 5440 } 5441 5442 /* Cleanup any outstanding ELS commands */ 5443 lpfc_els_flush_all_cmd(phba); 5444 5445 /* Block ELS IOCBs until we have done process link event */ 5446 phba->sli4_hba.els_wq->pring->flag |= LPFC_STOP_IOCB_EVENT; 5447 5448 /* Update link event statistics */ 5449 phba->sli.slistat.link_event++; 5450 5451 /* Create lpfc_handle_latt mailbox command from link ACQE */ 5452 lpfc_read_topology(phba, pmb, pmb->ctx_buf); 5453 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology; 5454 pmb->vport = phba->pport; 5455 5456 /* Keep the link status for extra SLI4 state machine reference */ 5457 phba->sli4_hba.link_state.speed = 5458 lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_LINK, 5459 bf_get(lpfc_acqe_link_speed, acqe_link)); 5460 phba->sli4_hba.link_state.duplex = 5461 bf_get(lpfc_acqe_link_duplex, acqe_link); 5462 phba->sli4_hba.link_state.status = 5463 bf_get(lpfc_acqe_link_status, acqe_link); 5464 phba->sli4_hba.link_state.type = 5465 bf_get(lpfc_acqe_link_type, acqe_link); 5466 phba->sli4_hba.link_state.number = 5467 bf_get(lpfc_acqe_link_number, acqe_link); 5468 phba->sli4_hba.link_state.fault = 5469 bf_get(lpfc_acqe_link_fault, acqe_link); 5470 phba->sli4_hba.link_state.logical_speed = 5471 bf_get(lpfc_acqe_logical_link_speed, acqe_link) * 10; 5472 5473 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 5474 "2900 Async FC/FCoE Link event - Speed:%dGBit " 5475 "duplex:x%x LA Type:x%x Port Type:%d Port Number:%d " 5476 "Logical speed:%dMbps Fault:%d\n", 5477 phba->sli4_hba.link_state.speed, 5478 phba->sli4_hba.link_state.topology, 5479 phba->sli4_hba.link_state.status, 5480 phba->sli4_hba.link_state.type, 5481 phba->sli4_hba.link_state.number, 5482 phba->sli4_hba.link_state.logical_speed, 5483 phba->sli4_hba.link_state.fault); 5484 /* 5485 * For FC Mode: issue the READ_TOPOLOGY mailbox command to fetch 5486 * topology info. Note: Optional for non FC-AL ports. 5487 */ 5488 if (!test_bit(HBA_FCOE_MODE, &phba->hba_flag)) { 5489 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT); 5490 if (rc == MBX_NOT_FINISHED) 5491 goto out_free_pmb; 5492 return; 5493 } 5494 /* 5495 * For FCoE Mode: fill in all the topology information we need and call 5496 * the READ_TOPOLOGY completion routine to continue without actually 5497 * sending the READ_TOPOLOGY mailbox command to the port. 5498 */ 5499 /* Initialize completion status */ 5500 mb = &pmb->u.mb; 5501 mb->mbxStatus = MBX_SUCCESS; 5502 5503 /* Parse port fault information field */ 5504 lpfc_sli4_parse_latt_fault(phba, acqe_link); 5505 5506 /* Parse and translate link attention fields */ 5507 la = (struct lpfc_mbx_read_top *) &pmb->u.mb.un.varReadTop; 5508 la->eventTag = acqe_link->event_tag; 5509 bf_set(lpfc_mbx_read_top_att_type, la, att_type); 5510 bf_set(lpfc_mbx_read_top_link_spd, la, 5511 (bf_get(lpfc_acqe_link_speed, acqe_link))); 5512 5513 /* Fake the following irrelevant fields */ 5514 bf_set(lpfc_mbx_read_top_topology, la, LPFC_TOPOLOGY_PT_PT); 5515 bf_set(lpfc_mbx_read_top_alpa_granted, la, 0); 5516 bf_set(lpfc_mbx_read_top_il, la, 0); 5517 bf_set(lpfc_mbx_read_top_pb, la, 0); 5518 bf_set(lpfc_mbx_read_top_fa, la, 0); 5519 bf_set(lpfc_mbx_read_top_mm, la, 0); 5520 5521 /* Invoke the lpfc_handle_latt mailbox command callback function */ 5522 lpfc_mbx_cmpl_read_topology(phba, pmb); 5523 5524 return; 5525 5526 out_free_pmb: 5527 lpfc_mbox_rsrc_cleanup(phba, pmb, MBOX_THD_UNLOCKED); 5528 } 5529 5530 /** 5531 * lpfc_async_link_speed_to_read_top - Parse async evt link speed code to read 5532 * topology. 5533 * @phba: pointer to lpfc hba data structure. 5534 * @speed_code: asynchronous event link speed code. 5535 * 5536 * This routine is to parse the giving SLI4 async event link speed code into 5537 * value of Read topology link speed. 5538 * 5539 * Return: link speed in terms of Read topology. 5540 **/ 5541 static uint8_t 5542 lpfc_async_link_speed_to_read_top(struct lpfc_hba *phba, uint8_t speed_code) 5543 { 5544 uint8_t port_speed; 5545 5546 switch (speed_code) { 5547 case LPFC_FC_LA_SPEED_1G: 5548 port_speed = LPFC_LINK_SPEED_1GHZ; 5549 break; 5550 case LPFC_FC_LA_SPEED_2G: 5551 port_speed = LPFC_LINK_SPEED_2GHZ; 5552 break; 5553 case LPFC_FC_LA_SPEED_4G: 5554 port_speed = LPFC_LINK_SPEED_4GHZ; 5555 break; 5556 case LPFC_FC_LA_SPEED_8G: 5557 port_speed = LPFC_LINK_SPEED_8GHZ; 5558 break; 5559 case LPFC_FC_LA_SPEED_16G: 5560 port_speed = LPFC_LINK_SPEED_16GHZ; 5561 break; 5562 case LPFC_FC_LA_SPEED_32G: 5563 port_speed = LPFC_LINK_SPEED_32GHZ; 5564 break; 5565 case LPFC_FC_LA_SPEED_64G: 5566 port_speed = LPFC_LINK_SPEED_64GHZ; 5567 break; 5568 case LPFC_FC_LA_SPEED_128G: 5569 port_speed = LPFC_LINK_SPEED_128GHZ; 5570 break; 5571 case LPFC_FC_LA_SPEED_256G: 5572 port_speed = LPFC_LINK_SPEED_256GHZ; 5573 break; 5574 default: 5575 port_speed = 0; 5576 break; 5577 } 5578 5579 return port_speed; 5580 } 5581 5582 void 5583 lpfc_cgn_dump_rxmonitor(struct lpfc_hba *phba) 5584 { 5585 if (!phba->rx_monitor) { 5586 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT, 5587 "4411 Rx Monitor Info is empty.\n"); 5588 } else { 5589 lpfc_rx_monitor_report(phba, phba->rx_monitor, NULL, 0, 5590 LPFC_MAX_RXMONITOR_DUMP); 5591 } 5592 } 5593 5594 /** 5595 * lpfc_cgn_update_stat - Save data into congestion stats buffer 5596 * @phba: pointer to lpfc hba data structure. 5597 * @dtag: FPIN descriptor received 5598 * 5599 * Increment the FPIN received counter/time when it happens. 5600 */ 5601 void 5602 lpfc_cgn_update_stat(struct lpfc_hba *phba, uint32_t dtag) 5603 { 5604 struct lpfc_cgn_info *cp; 5605 u32 value; 5606 5607 /* Make sure we have a congestion info buffer */ 5608 if (!phba->cgn_i) 5609 return; 5610 cp = (struct lpfc_cgn_info *)phba->cgn_i->virt; 5611 5612 /* Update congestion statistics */ 5613 switch (dtag) { 5614 case ELS_DTAG_LNK_INTEGRITY: 5615 le32_add_cpu(&cp->link_integ_notification, 1); 5616 lpfc_cgn_update_tstamp(phba, &cp->stat_lnk); 5617 break; 5618 case ELS_DTAG_DELIVERY: 5619 le32_add_cpu(&cp->delivery_notification, 1); 5620 lpfc_cgn_update_tstamp(phba, &cp->stat_delivery); 5621 break; 5622 case ELS_DTAG_PEER_CONGEST: 5623 le32_add_cpu(&cp->cgn_peer_notification, 1); 5624 lpfc_cgn_update_tstamp(phba, &cp->stat_peer); 5625 break; 5626 case ELS_DTAG_CONGESTION: 5627 le32_add_cpu(&cp->cgn_notification, 1); 5628 lpfc_cgn_update_tstamp(phba, &cp->stat_fpin); 5629 } 5630 if (phba->cgn_fpin_frequency && 5631 phba->cgn_fpin_frequency != LPFC_FPIN_INIT_FREQ) { 5632 value = LPFC_CGN_TIMER_TO_MIN / phba->cgn_fpin_frequency; 5633 cp->cgn_stat_npm = value; 5634 } 5635 5636 value = lpfc_cgn_calc_crc32(cp, LPFC_CGN_INFO_SZ, 5637 LPFC_CGN_CRC32_SEED); 5638 cp->cgn_info_crc = cpu_to_le32(value); 5639 } 5640 5641 /** 5642 * lpfc_cgn_update_tstamp - Update cmf timestamp 5643 * @phba: pointer to lpfc hba data structure. 5644 * @ts: structure to write the timestamp to. 5645 */ 5646 void 5647 lpfc_cgn_update_tstamp(struct lpfc_hba *phba, struct lpfc_cgn_ts *ts) 5648 { 5649 struct timespec64 cur_time; 5650 struct tm tm_val; 5651 5652 ktime_get_real_ts64(&cur_time); 5653 time64_to_tm(cur_time.tv_sec, 0, &tm_val); 5654 5655 ts->month = tm_val.tm_mon + 1; 5656 ts->day = tm_val.tm_mday; 5657 ts->year = tm_val.tm_year - 100; 5658 ts->hour = tm_val.tm_hour; 5659 ts->minute = tm_val.tm_min; 5660 ts->second = tm_val.tm_sec; 5661 5662 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT, 5663 "2646 Updated CMF timestamp : " 5664 "%u/%u/%u %u:%u:%u\n", 5665 ts->day, ts->month, 5666 ts->year, ts->hour, 5667 ts->minute, ts->second); 5668 } 5669 5670 /** 5671 * lpfc_cmf_stats_timer - Save data into registered congestion buffer 5672 * @timer: Timer cookie to access lpfc private data 5673 * 5674 * Save the congestion event data every minute. 5675 * On the hour collapse all the minute data into hour data. Every day 5676 * collapse all the hour data into daily data. Separate driver 5677 * and fabrc congestion event counters that will be saved out 5678 * to the registered congestion buffer every minute. 5679 */ 5680 static enum hrtimer_restart 5681 lpfc_cmf_stats_timer(struct hrtimer *timer) 5682 { 5683 struct lpfc_hba *phba; 5684 struct lpfc_cgn_info *cp; 5685 uint32_t i, index; 5686 uint16_t value, mvalue; 5687 uint64_t bps; 5688 uint32_t mbps; 5689 uint32_t dvalue, wvalue, lvalue, avalue; 5690 uint64_t latsum; 5691 __le16 *ptr; 5692 __le32 *lptr; 5693 __le16 *mptr; 5694 5695 phba = container_of(timer, struct lpfc_hba, cmf_stats_timer); 5696 /* Make sure we have a congestion info buffer */ 5697 if (!phba->cgn_i) 5698 return HRTIMER_NORESTART; 5699 cp = (struct lpfc_cgn_info *)phba->cgn_i->virt; 5700 5701 phba->cgn_evt_timestamp = jiffies + 5702 msecs_to_jiffies(LPFC_CGN_TIMER_TO_MIN); 5703 phba->cgn_evt_minute++; 5704 5705 /* We should get to this point in the routine on 1 minute intervals */ 5706 lpfc_cgn_update_tstamp(phba, &cp->base_time); 5707 5708 if (phba->cgn_fpin_frequency && 5709 phba->cgn_fpin_frequency != LPFC_FPIN_INIT_FREQ) { 5710 value = LPFC_CGN_TIMER_TO_MIN / phba->cgn_fpin_frequency; 5711 cp->cgn_stat_npm = value; 5712 } 5713 5714 /* Read and clear the latency counters for this minute */ 5715 lvalue = atomic_read(&phba->cgn_latency_evt_cnt); 5716 latsum = atomic64_read(&phba->cgn_latency_evt); 5717 atomic_set(&phba->cgn_latency_evt_cnt, 0); 5718 atomic64_set(&phba->cgn_latency_evt, 0); 5719 5720 /* We need to store MB/sec bandwidth in the congestion information. 5721 * block_cnt is count of 512 byte blocks for the entire minute, 5722 * bps will get bytes per sec before finally converting to MB/sec. 5723 */ 5724 bps = div_u64(phba->rx_block_cnt, LPFC_SEC_MIN) * 512; 5725 phba->rx_block_cnt = 0; 5726 mvalue = bps / (1024 * 1024); /* convert to MB/sec */ 5727 5728 /* Every minute */ 5729 /* cgn parameters */ 5730 cp->cgn_info_mode = phba->cgn_p.cgn_param_mode; 5731 cp->cgn_info_level0 = phba->cgn_p.cgn_param_level0; 5732 cp->cgn_info_level1 = phba->cgn_p.cgn_param_level1; 5733 cp->cgn_info_level2 = phba->cgn_p.cgn_param_level2; 5734 5735 /* Fill in default LUN qdepth */ 5736 value = (uint16_t)(phba->pport->cfg_lun_queue_depth); 5737 cp->cgn_lunq = cpu_to_le16(value); 5738 5739 /* Record congestion buffer info - every minute 5740 * cgn_driver_evt_cnt (Driver events) 5741 * cgn_fabric_warn_cnt (Congestion Warnings) 5742 * cgn_latency_evt_cnt / cgn_latency_evt (IO Latency) 5743 * cgn_fabric_alarm_cnt (Congestion Alarms) 5744 */ 5745 index = ++cp->cgn_index_minute; 5746 if (cp->cgn_index_minute == LPFC_MIN_HOUR) { 5747 cp->cgn_index_minute = 0; 5748 index = 0; 5749 } 5750 5751 /* Get the number of driver events in this sample and reset counter */ 5752 dvalue = atomic_read(&phba->cgn_driver_evt_cnt); 5753 atomic_set(&phba->cgn_driver_evt_cnt, 0); 5754 5755 /* Get the number of warning events - FPIN and Signal for this minute */ 5756 wvalue = 0; 5757 if ((phba->cgn_reg_fpin & LPFC_CGN_FPIN_WARN) || 5758 phba->cgn_reg_signal == EDC_CG_SIG_WARN_ONLY || 5759 phba->cgn_reg_signal == EDC_CG_SIG_WARN_ALARM) 5760 wvalue = atomic_read(&phba->cgn_fabric_warn_cnt); 5761 atomic_set(&phba->cgn_fabric_warn_cnt, 0); 5762 5763 /* Get the number of alarm events - FPIN and Signal for this minute */ 5764 avalue = 0; 5765 if ((phba->cgn_reg_fpin & LPFC_CGN_FPIN_ALARM) || 5766 phba->cgn_reg_signal == EDC_CG_SIG_WARN_ALARM) 5767 avalue = atomic_read(&phba->cgn_fabric_alarm_cnt); 5768 atomic_set(&phba->cgn_fabric_alarm_cnt, 0); 5769 5770 /* Collect the driver, warning, alarm and latency counts for this 5771 * minute into the driver congestion buffer. 5772 */ 5773 ptr = &cp->cgn_drvr_min[index]; 5774 value = (uint16_t)dvalue; 5775 *ptr = cpu_to_le16(value); 5776 5777 ptr = &cp->cgn_warn_min[index]; 5778 value = (uint16_t)wvalue; 5779 *ptr = cpu_to_le16(value); 5780 5781 ptr = &cp->cgn_alarm_min[index]; 5782 value = (uint16_t)avalue; 5783 *ptr = cpu_to_le16(value); 5784 5785 lptr = &cp->cgn_latency_min[index]; 5786 if (lvalue) { 5787 lvalue = (uint32_t)div_u64(latsum, lvalue); 5788 *lptr = cpu_to_le32(lvalue); 5789 } else { 5790 *lptr = 0; 5791 } 5792 5793 /* Collect the bandwidth value into the driver's congesion buffer. */ 5794 mptr = &cp->cgn_bw_min[index]; 5795 *mptr = cpu_to_le16(mvalue); 5796 5797 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT, 5798 "2418 Congestion Info - minute (%d): %d %d %d %d %d\n", 5799 index, dvalue, wvalue, *lptr, mvalue, avalue); 5800 5801 /* Every hour */ 5802 if ((phba->cgn_evt_minute % LPFC_MIN_HOUR) == 0) { 5803 /* Record congestion buffer info - every hour 5804 * Collapse all minutes into an hour 5805 */ 5806 index = ++cp->cgn_index_hour; 5807 if (cp->cgn_index_hour == LPFC_HOUR_DAY) { 5808 cp->cgn_index_hour = 0; 5809 index = 0; 5810 } 5811 5812 dvalue = 0; 5813 wvalue = 0; 5814 lvalue = 0; 5815 avalue = 0; 5816 mvalue = 0; 5817 mbps = 0; 5818 for (i = 0; i < LPFC_MIN_HOUR; i++) { 5819 dvalue += le16_to_cpu(cp->cgn_drvr_min[i]); 5820 wvalue += le16_to_cpu(cp->cgn_warn_min[i]); 5821 lvalue += le32_to_cpu(cp->cgn_latency_min[i]); 5822 mbps += le16_to_cpu(cp->cgn_bw_min[i]); 5823 avalue += le16_to_cpu(cp->cgn_alarm_min[i]); 5824 } 5825 if (lvalue) /* Avg of latency averages */ 5826 lvalue /= LPFC_MIN_HOUR; 5827 if (mbps) /* Avg of Bandwidth averages */ 5828 mvalue = mbps / LPFC_MIN_HOUR; 5829 5830 lptr = &cp->cgn_drvr_hr[index]; 5831 *lptr = cpu_to_le32(dvalue); 5832 lptr = &cp->cgn_warn_hr[index]; 5833 *lptr = cpu_to_le32(wvalue); 5834 lptr = &cp->cgn_latency_hr[index]; 5835 *lptr = cpu_to_le32(lvalue); 5836 mptr = &cp->cgn_bw_hr[index]; 5837 *mptr = cpu_to_le16(mvalue); 5838 lptr = &cp->cgn_alarm_hr[index]; 5839 *lptr = cpu_to_le32(avalue); 5840 5841 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT, 5842 "2419 Congestion Info - hour " 5843 "(%d): %d %d %d %d %d\n", 5844 index, dvalue, wvalue, lvalue, mvalue, avalue); 5845 } 5846 5847 /* Every day */ 5848 if ((phba->cgn_evt_minute % LPFC_MIN_DAY) == 0) { 5849 /* Record congestion buffer info - every hour 5850 * Collapse all hours into a day. Rotate days 5851 * after LPFC_MAX_CGN_DAYS. 5852 */ 5853 index = ++cp->cgn_index_day; 5854 if (cp->cgn_index_day == LPFC_MAX_CGN_DAYS) { 5855 cp->cgn_index_day = 0; 5856 index = 0; 5857 } 5858 5859 dvalue = 0; 5860 wvalue = 0; 5861 lvalue = 0; 5862 mvalue = 0; 5863 mbps = 0; 5864 avalue = 0; 5865 for (i = 0; i < LPFC_HOUR_DAY; i++) { 5866 dvalue += le32_to_cpu(cp->cgn_drvr_hr[i]); 5867 wvalue += le32_to_cpu(cp->cgn_warn_hr[i]); 5868 lvalue += le32_to_cpu(cp->cgn_latency_hr[i]); 5869 mbps += le16_to_cpu(cp->cgn_bw_hr[i]); 5870 avalue += le32_to_cpu(cp->cgn_alarm_hr[i]); 5871 } 5872 if (lvalue) /* Avg of latency averages */ 5873 lvalue /= LPFC_HOUR_DAY; 5874 if (mbps) /* Avg of Bandwidth averages */ 5875 mvalue = mbps / LPFC_HOUR_DAY; 5876 5877 lptr = &cp->cgn_drvr_day[index]; 5878 *lptr = cpu_to_le32(dvalue); 5879 lptr = &cp->cgn_warn_day[index]; 5880 *lptr = cpu_to_le32(wvalue); 5881 lptr = &cp->cgn_latency_day[index]; 5882 *lptr = cpu_to_le32(lvalue); 5883 mptr = &cp->cgn_bw_day[index]; 5884 *mptr = cpu_to_le16(mvalue); 5885 lptr = &cp->cgn_alarm_day[index]; 5886 *lptr = cpu_to_le32(avalue); 5887 5888 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT, 5889 "2420 Congestion Info - daily (%d): " 5890 "%d %d %d %d %d\n", 5891 index, dvalue, wvalue, lvalue, mvalue, avalue); 5892 } 5893 5894 /* Use the frequency found in the last rcv'ed FPIN */ 5895 value = phba->cgn_fpin_frequency; 5896 cp->cgn_warn_freq = cpu_to_le16(value); 5897 cp->cgn_alarm_freq = cpu_to_le16(value); 5898 5899 lvalue = lpfc_cgn_calc_crc32(cp, LPFC_CGN_INFO_SZ, 5900 LPFC_CGN_CRC32_SEED); 5901 cp->cgn_info_crc = cpu_to_le32(lvalue); 5902 5903 hrtimer_forward_now(timer, ktime_set(0, LPFC_SEC_MIN * NSEC_PER_SEC)); 5904 5905 return HRTIMER_RESTART; 5906 } 5907 5908 /** 5909 * lpfc_calc_cmf_latency - latency from start of rxate timer interval 5910 * @phba: The Hba for which this call is being executed. 5911 * 5912 * The routine calculates the latency from the beginning of the CMF timer 5913 * interval to the current point in time. It is called from IO completion 5914 * when we exceed our Bandwidth limitation for the time interval. 5915 */ 5916 uint32_t 5917 lpfc_calc_cmf_latency(struct lpfc_hba *phba) 5918 { 5919 struct timespec64 cmpl_time; 5920 uint32_t msec = 0; 5921 5922 ktime_get_real_ts64(&cmpl_time); 5923 5924 /* This routine works on a ms granularity so sec and usec are 5925 * converted accordingly. 5926 */ 5927 if (cmpl_time.tv_sec == phba->cmf_latency.tv_sec) { 5928 msec = (cmpl_time.tv_nsec - phba->cmf_latency.tv_nsec) / 5929 NSEC_PER_MSEC; 5930 } else { 5931 if (cmpl_time.tv_nsec >= phba->cmf_latency.tv_nsec) { 5932 msec = (cmpl_time.tv_sec - 5933 phba->cmf_latency.tv_sec) * MSEC_PER_SEC; 5934 msec += ((cmpl_time.tv_nsec - 5935 phba->cmf_latency.tv_nsec) / NSEC_PER_MSEC); 5936 } else { 5937 msec = (cmpl_time.tv_sec - phba->cmf_latency.tv_sec - 5938 1) * MSEC_PER_SEC; 5939 msec += (((NSEC_PER_SEC - phba->cmf_latency.tv_nsec) + 5940 cmpl_time.tv_nsec) / NSEC_PER_MSEC); 5941 } 5942 } 5943 return msec; 5944 } 5945 5946 /** 5947 * lpfc_cmf_timer - This is the timer function for one congestion 5948 * rate interval. 5949 * @timer: Pointer to the high resolution timer that expired 5950 */ 5951 static enum hrtimer_restart 5952 lpfc_cmf_timer(struct hrtimer *timer) 5953 { 5954 struct lpfc_hba *phba = container_of(timer, struct lpfc_hba, 5955 cmf_timer); 5956 struct rx_info_entry entry; 5957 uint32_t io_cnt; 5958 uint32_t busy, max_read; 5959 uint64_t total, rcv, lat, mbpi, extra, cnt; 5960 int timer_interval = LPFC_CMF_INTERVAL; 5961 uint32_t ms; 5962 struct lpfc_cgn_stat *cgs; 5963 int cpu; 5964 5965 /* Only restart the timer if congestion mgmt is on */ 5966 if (phba->cmf_active_mode == LPFC_CFG_OFF || 5967 !phba->cmf_latency.tv_sec) { 5968 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT, 5969 "6224 CMF timer exit: %d %lld\n", 5970 phba->cmf_active_mode, 5971 (uint64_t)phba->cmf_latency.tv_sec); 5972 return HRTIMER_NORESTART; 5973 } 5974 5975 /* If pport is not ready yet, just exit and wait for 5976 * the next timer cycle to hit. 5977 */ 5978 if (!phba->pport) 5979 goto skip; 5980 5981 /* Do not block SCSI IO while in the timer routine since 5982 * total_bytes will be cleared 5983 */ 5984 atomic_set(&phba->cmf_stop_io, 1); 5985 5986 /* First we need to calculate the actual ms between 5987 * the last timer interrupt and this one. We ask for 5988 * LPFC_CMF_INTERVAL, however the actual time may 5989 * vary depending on system overhead. 5990 */ 5991 ms = lpfc_calc_cmf_latency(phba); 5992 5993 5994 /* Immediately after we calculate the time since the last 5995 * timer interrupt, set the start time for the next 5996 * interrupt 5997 */ 5998 ktime_get_real_ts64(&phba->cmf_latency); 5999 6000 phba->cmf_link_byte_count = 6001 div_u64(phba->cmf_max_line_rate * LPFC_CMF_INTERVAL, 1000); 6002 6003 /* Collect all the stats from the prior timer interval */ 6004 total = 0; 6005 io_cnt = 0; 6006 lat = 0; 6007 rcv = 0; 6008 for_each_present_cpu(cpu) { 6009 cgs = per_cpu_ptr(phba->cmf_stat, cpu); 6010 total += atomic64_xchg(&cgs->total_bytes, 0); 6011 io_cnt += atomic_xchg(&cgs->rx_io_cnt, 0); 6012 lat += atomic64_xchg(&cgs->rx_latency, 0); 6013 rcv += atomic64_xchg(&cgs->rcv_bytes, 0); 6014 } 6015 6016 /* Before we issue another CMF_SYNC_WQE, retrieve the BW 6017 * returned from the last CMF_SYNC_WQE issued, from 6018 * cmf_last_sync_bw. This will be the target BW for 6019 * this next timer interval. 6020 */ 6021 if (phba->cmf_active_mode == LPFC_CFG_MANAGED && 6022 phba->link_state != LPFC_LINK_DOWN && 6023 test_bit(HBA_SETUP, &phba->hba_flag)) { 6024 mbpi = phba->cmf_last_sync_bw; 6025 phba->cmf_last_sync_bw = 0; 6026 extra = 0; 6027 6028 /* Calculate any extra bytes needed to account for the 6029 * timer accuracy. If we are less than LPFC_CMF_INTERVAL 6030 * calculate the adjustment needed for total to reflect 6031 * a full LPFC_CMF_INTERVAL. 6032 */ 6033 if (ms && ms < LPFC_CMF_INTERVAL) { 6034 cnt = div_u64(total, ms); /* bytes per ms */ 6035 cnt *= LPFC_CMF_INTERVAL; /* what total should be */ 6036 extra = cnt - total; 6037 } 6038 lpfc_issue_cmf_sync_wqe(phba, LPFC_CMF_INTERVAL, total + extra); 6039 } else { 6040 /* For Monitor mode or link down we want mbpi 6041 * to be the full link speed 6042 */ 6043 mbpi = phba->cmf_link_byte_count; 6044 extra = 0; 6045 } 6046 phba->cmf_timer_cnt++; 6047 6048 if (io_cnt) { 6049 /* Update congestion info buffer latency in us */ 6050 atomic_add(io_cnt, &phba->cgn_latency_evt_cnt); 6051 atomic64_add(lat, &phba->cgn_latency_evt); 6052 } 6053 busy = atomic_xchg(&phba->cmf_busy, 0); 6054 max_read = atomic_xchg(&phba->rx_max_read_cnt, 0); 6055 6056 /* Calculate MBPI for the next timer interval */ 6057 if (mbpi) { 6058 if (mbpi > phba->cmf_link_byte_count || 6059 phba->cmf_active_mode == LPFC_CFG_MONITOR) 6060 mbpi = phba->cmf_link_byte_count; 6061 6062 /* Change max_bytes_per_interval to what the prior 6063 * CMF_SYNC_WQE cmpl indicated. 6064 */ 6065 if (mbpi != phba->cmf_max_bytes_per_interval) 6066 phba->cmf_max_bytes_per_interval = mbpi; 6067 } 6068 6069 /* Save rxmonitor information for debug */ 6070 if (phba->rx_monitor) { 6071 entry.total_bytes = total; 6072 entry.cmf_bytes = total + extra; 6073 entry.rcv_bytes = rcv; 6074 entry.cmf_busy = busy; 6075 entry.cmf_info = phba->cmf_active_info; 6076 if (io_cnt) { 6077 entry.avg_io_latency = div_u64(lat, io_cnt); 6078 entry.avg_io_size = div_u64(rcv, io_cnt); 6079 } else { 6080 entry.avg_io_latency = 0; 6081 entry.avg_io_size = 0; 6082 } 6083 entry.max_read_cnt = max_read; 6084 entry.io_cnt = io_cnt; 6085 entry.max_bytes_per_interval = mbpi; 6086 if (phba->cmf_active_mode == LPFC_CFG_MANAGED) 6087 entry.timer_utilization = phba->cmf_last_ts; 6088 else 6089 entry.timer_utilization = ms; 6090 entry.timer_interval = ms; 6091 phba->cmf_last_ts = 0; 6092 6093 lpfc_rx_monitor_record(phba->rx_monitor, &entry); 6094 } 6095 6096 if (phba->cmf_active_mode == LPFC_CFG_MONITOR) { 6097 /* If Monitor mode, check if we are oversubscribed 6098 * against the full line rate. 6099 */ 6100 if (mbpi && total > mbpi) 6101 atomic_inc(&phba->cgn_driver_evt_cnt); 6102 } 6103 phba->rx_block_cnt += div_u64(rcv, 512); /* save 512 byte block cnt */ 6104 6105 /* Since total_bytes has already been zero'ed, its okay to unblock 6106 * after max_bytes_per_interval is setup. 6107 */ 6108 if (atomic_xchg(&phba->cmf_bw_wait, 0)) 6109 queue_work(phba->wq, &phba->unblock_request_work); 6110 6111 /* SCSI IO is now unblocked */ 6112 atomic_set(&phba->cmf_stop_io, 0); 6113 6114 skip: 6115 hrtimer_forward_now(timer, 6116 ktime_set(0, timer_interval * NSEC_PER_MSEC)); 6117 return HRTIMER_RESTART; 6118 } 6119 6120 #define trunk_link_status(__idx)\ 6121 bf_get(lpfc_acqe_fc_la_trunk_config_port##__idx, acqe_fc) ?\ 6122 ((phba->trunk_link.link##__idx.state == LPFC_LINK_UP) ?\ 6123 "Link up" : "Link down") : "NA" 6124 /* Did port __idx reported an error */ 6125 #define trunk_port_fault(__idx)\ 6126 bf_get(lpfc_acqe_fc_la_trunk_config_port##__idx, acqe_fc) ?\ 6127 (port_fault & (1 << __idx) ? "YES" : "NO") : "NA" 6128 6129 static void 6130 lpfc_update_trunk_link_status(struct lpfc_hba *phba, 6131 struct lpfc_acqe_fc_la *acqe_fc) 6132 { 6133 uint8_t port_fault = bf_get(lpfc_acqe_fc_la_trunk_linkmask, acqe_fc); 6134 uint8_t err = bf_get(lpfc_acqe_fc_la_trunk_fault, acqe_fc); 6135 u8 cnt = 0; 6136 6137 phba->sli4_hba.link_state.speed = 6138 lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_FC, 6139 bf_get(lpfc_acqe_fc_la_speed, acqe_fc)); 6140 6141 phba->sli4_hba.link_state.logical_speed = 6142 bf_get(lpfc_acqe_fc_la_llink_spd, acqe_fc) * 10; 6143 /* We got FC link speed, convert to fc_linkspeed (READ_TOPOLOGY) */ 6144 phba->fc_linkspeed = 6145 lpfc_async_link_speed_to_read_top( 6146 phba, 6147 bf_get(lpfc_acqe_fc_la_speed, acqe_fc)); 6148 6149 if (bf_get(lpfc_acqe_fc_la_trunk_config_port0, acqe_fc)) { 6150 phba->trunk_link.link0.state = 6151 bf_get(lpfc_acqe_fc_la_trunk_link_status_port0, acqe_fc) 6152 ? LPFC_LINK_UP : LPFC_LINK_DOWN; 6153 phba->trunk_link.link0.fault = port_fault & 0x1 ? err : 0; 6154 cnt++; 6155 } 6156 if (bf_get(lpfc_acqe_fc_la_trunk_config_port1, acqe_fc)) { 6157 phba->trunk_link.link1.state = 6158 bf_get(lpfc_acqe_fc_la_trunk_link_status_port1, acqe_fc) 6159 ? LPFC_LINK_UP : LPFC_LINK_DOWN; 6160 phba->trunk_link.link1.fault = port_fault & 0x2 ? err : 0; 6161 cnt++; 6162 } 6163 if (bf_get(lpfc_acqe_fc_la_trunk_config_port2, acqe_fc)) { 6164 phba->trunk_link.link2.state = 6165 bf_get(lpfc_acqe_fc_la_trunk_link_status_port2, acqe_fc) 6166 ? LPFC_LINK_UP : LPFC_LINK_DOWN; 6167 phba->trunk_link.link2.fault = port_fault & 0x4 ? err : 0; 6168 cnt++; 6169 } 6170 if (bf_get(lpfc_acqe_fc_la_trunk_config_port3, acqe_fc)) { 6171 phba->trunk_link.link3.state = 6172 bf_get(lpfc_acqe_fc_la_trunk_link_status_port3, acqe_fc) 6173 ? LPFC_LINK_UP : LPFC_LINK_DOWN; 6174 phba->trunk_link.link3.fault = port_fault & 0x8 ? err : 0; 6175 cnt++; 6176 } 6177 6178 if (cnt) 6179 phba->trunk_link.phy_lnk_speed = 6180 phba->sli4_hba.link_state.logical_speed / (cnt * 1000); 6181 else 6182 phba->trunk_link.phy_lnk_speed = LPFC_LINK_SPEED_UNKNOWN; 6183 6184 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 6185 "2910 Async FC Trunking Event - Speed:%d\n" 6186 "\tLogical speed:%d " 6187 "port0: %s port1: %s port2: %s port3: %s\n", 6188 phba->sli4_hba.link_state.speed, 6189 phba->sli4_hba.link_state.logical_speed, 6190 trunk_link_status(0), trunk_link_status(1), 6191 trunk_link_status(2), trunk_link_status(3)); 6192 6193 if (phba->cmf_active_mode != LPFC_CFG_OFF) 6194 lpfc_cmf_signal_init(phba); 6195 6196 if (port_fault) 6197 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 6198 "3202 trunk error:0x%x (%s) seen on port0:%s " 6199 /* 6200 * SLI-4: We have only 0xA error codes 6201 * defined as of now. print an appropriate 6202 * message in case driver needs to be updated. 6203 */ 6204 "port1:%s port2:%s port3:%s\n", err, err > 0xA ? 6205 "UNDEFINED. update driver." : trunk_errmsg[err], 6206 trunk_port_fault(0), trunk_port_fault(1), 6207 trunk_port_fault(2), trunk_port_fault(3)); 6208 } 6209 6210 6211 /** 6212 * lpfc_sli4_async_fc_evt - Process the asynchronous FC link event 6213 * @phba: pointer to lpfc hba data structure. 6214 * @acqe_fc: pointer to the async fc completion queue entry. 6215 * 6216 * This routine is to handle the SLI4 asynchronous FC event. It will simply log 6217 * that the event was received and then issue a read_topology mailbox command so 6218 * that the rest of the driver will treat it the same as SLI3. 6219 **/ 6220 static void 6221 lpfc_sli4_async_fc_evt(struct lpfc_hba *phba, struct lpfc_acqe_fc_la *acqe_fc) 6222 { 6223 LPFC_MBOXQ_t *pmb; 6224 MAILBOX_t *mb; 6225 struct lpfc_mbx_read_top *la; 6226 char *log_level; 6227 int rc; 6228 6229 if (bf_get(lpfc_trailer_type, acqe_fc) != 6230 LPFC_FC_LA_EVENT_TYPE_FC_LINK) { 6231 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 6232 "2895 Non FC link Event detected.(%d)\n", 6233 bf_get(lpfc_trailer_type, acqe_fc)); 6234 return; 6235 } 6236 6237 if (bf_get(lpfc_acqe_fc_la_att_type, acqe_fc) == 6238 LPFC_FC_LA_TYPE_TRUNKING_EVENT) { 6239 lpfc_update_trunk_link_status(phba, acqe_fc); 6240 return; 6241 } 6242 6243 /* Keep the link status for extra SLI4 state machine reference */ 6244 phba->sli4_hba.link_state.speed = 6245 lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_FC, 6246 bf_get(lpfc_acqe_fc_la_speed, acqe_fc)); 6247 phba->sli4_hba.link_state.duplex = LPFC_ASYNC_LINK_DUPLEX_FULL; 6248 phba->sli4_hba.link_state.topology = 6249 bf_get(lpfc_acqe_fc_la_topology, acqe_fc); 6250 phba->sli4_hba.link_state.status = 6251 bf_get(lpfc_acqe_fc_la_att_type, acqe_fc); 6252 phba->sli4_hba.link_state.type = 6253 bf_get(lpfc_acqe_fc_la_port_type, acqe_fc); 6254 phba->sli4_hba.link_state.number = 6255 bf_get(lpfc_acqe_fc_la_port_number, acqe_fc); 6256 phba->sli4_hba.link_state.fault = 6257 bf_get(lpfc_acqe_link_fault, acqe_fc); 6258 phba->sli4_hba.link_state.link_status = 6259 bf_get(lpfc_acqe_fc_la_link_status, acqe_fc); 6260 6261 /* 6262 * Only select attention types need logical speed modification to what 6263 * was previously set. 6264 */ 6265 if (phba->sli4_hba.link_state.status >= LPFC_FC_LA_TYPE_LINK_UP && 6266 phba->sli4_hba.link_state.status < LPFC_FC_LA_TYPE_ACTIVATE_FAIL) { 6267 if (bf_get(lpfc_acqe_fc_la_att_type, acqe_fc) == 6268 LPFC_FC_LA_TYPE_LINK_DOWN) 6269 phba->sli4_hba.link_state.logical_speed = 0; 6270 else if (!phba->sli4_hba.conf_trunk) 6271 phba->sli4_hba.link_state.logical_speed = 6272 bf_get(lpfc_acqe_fc_la_llink_spd, acqe_fc) * 10; 6273 } 6274 6275 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 6276 "2896 Async FC event - Speed:%dGBaud Topology:x%x " 6277 "LA Type:x%x Port Type:%d Port Number:%d Logical speed:" 6278 "%dMbps Fault:x%x Link Status:x%x\n", 6279 phba->sli4_hba.link_state.speed, 6280 phba->sli4_hba.link_state.topology, 6281 phba->sli4_hba.link_state.status, 6282 phba->sli4_hba.link_state.type, 6283 phba->sli4_hba.link_state.number, 6284 phba->sli4_hba.link_state.logical_speed, 6285 phba->sli4_hba.link_state.fault, 6286 phba->sli4_hba.link_state.link_status); 6287 6288 /* 6289 * The following attention types are informational only, providing 6290 * further details about link status. Overwrite the value of 6291 * link_state.status appropriately. No further action is required. 6292 */ 6293 if (phba->sli4_hba.link_state.status >= LPFC_FC_LA_TYPE_ACTIVATE_FAIL) { 6294 switch (phba->sli4_hba.link_state.status) { 6295 case LPFC_FC_LA_TYPE_ACTIVATE_FAIL: 6296 log_level = KERN_WARNING; 6297 phba->sli4_hba.link_state.status = 6298 LPFC_FC_LA_TYPE_LINK_DOWN; 6299 break; 6300 case LPFC_FC_LA_TYPE_LINK_RESET_PRTCL_EVT: 6301 /* 6302 * During bb credit recovery establishment, receiving 6303 * this attention type is normal. Link Up attention 6304 * type is expected to occur before this informational 6305 * attention type so keep the Link Up status. 6306 */ 6307 log_level = KERN_INFO; 6308 phba->sli4_hba.link_state.status = 6309 LPFC_FC_LA_TYPE_LINK_UP; 6310 break; 6311 default: 6312 log_level = KERN_INFO; 6313 break; 6314 } 6315 lpfc_log_msg(phba, log_level, LOG_SLI, 6316 "2992 Async FC event - Informational Link " 6317 "Attention Type x%x\n", 6318 bf_get(lpfc_acqe_fc_la_att_type, acqe_fc)); 6319 return; 6320 } 6321 6322 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 6323 if (!pmb) { 6324 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 6325 "2897 The mboxq allocation failed\n"); 6326 return; 6327 } 6328 rc = lpfc_mbox_rsrc_prep(phba, pmb); 6329 if (rc) { 6330 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 6331 "2898 The mboxq prep failed\n"); 6332 goto out_free_pmb; 6333 } 6334 6335 /* Cleanup any outstanding ELS commands */ 6336 lpfc_els_flush_all_cmd(phba); 6337 6338 /* Block ELS IOCBs until we have done process link event */ 6339 phba->sli4_hba.els_wq->pring->flag |= LPFC_STOP_IOCB_EVENT; 6340 6341 /* Update link event statistics */ 6342 phba->sli.slistat.link_event++; 6343 6344 /* Create lpfc_handle_latt mailbox command from link ACQE */ 6345 lpfc_read_topology(phba, pmb, pmb->ctx_buf); 6346 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology; 6347 pmb->vport = phba->pport; 6348 6349 if (phba->sli4_hba.link_state.status != LPFC_FC_LA_TYPE_LINK_UP) { 6350 phba->link_flag &= ~(LS_MDS_LINK_DOWN | LS_MDS_LOOPBACK); 6351 6352 switch (phba->sli4_hba.link_state.status) { 6353 case LPFC_FC_LA_TYPE_MDS_LINK_DOWN: 6354 phba->link_flag |= LS_MDS_LINK_DOWN; 6355 break; 6356 case LPFC_FC_LA_TYPE_MDS_LOOPBACK: 6357 phba->link_flag |= LS_MDS_LOOPBACK; 6358 break; 6359 default: 6360 break; 6361 } 6362 6363 /* Initialize completion status */ 6364 mb = &pmb->u.mb; 6365 mb->mbxStatus = MBX_SUCCESS; 6366 6367 /* Parse port fault information field */ 6368 lpfc_sli4_parse_latt_fault(phba, (void *)acqe_fc); 6369 6370 /* Parse and translate link attention fields */ 6371 la = (struct lpfc_mbx_read_top *)&pmb->u.mb.un.varReadTop; 6372 la->eventTag = acqe_fc->event_tag; 6373 6374 if (phba->sli4_hba.link_state.status == 6375 LPFC_FC_LA_TYPE_UNEXP_WWPN) { 6376 bf_set(lpfc_mbx_read_top_att_type, la, 6377 LPFC_FC_LA_TYPE_UNEXP_WWPN); 6378 } else { 6379 bf_set(lpfc_mbx_read_top_att_type, la, 6380 LPFC_FC_LA_TYPE_LINK_DOWN); 6381 } 6382 /* Invoke the mailbox command callback function */ 6383 lpfc_mbx_cmpl_read_topology(phba, pmb); 6384 6385 return; 6386 } 6387 6388 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT); 6389 if (rc == MBX_NOT_FINISHED) 6390 goto out_free_pmb; 6391 return; 6392 6393 out_free_pmb: 6394 lpfc_mbox_rsrc_cleanup(phba, pmb, MBOX_THD_UNLOCKED); 6395 } 6396 6397 /** 6398 * lpfc_sli4_async_sli_evt - Process the asynchronous SLI link event 6399 * @phba: pointer to lpfc hba data structure. 6400 * @acqe_sli: pointer to the async SLI completion queue entry. 6401 * 6402 * This routine is to handle the SLI4 asynchronous SLI events. 6403 **/ 6404 static void 6405 lpfc_sli4_async_sli_evt(struct lpfc_hba *phba, struct lpfc_acqe_sli *acqe_sli) 6406 { 6407 char port_name; 6408 char message[128]; 6409 uint8_t status; 6410 uint8_t evt_type; 6411 uint8_t operational = 0; 6412 struct temp_event temp_event_data; 6413 struct lpfc_acqe_misconfigured_event *misconfigured; 6414 struct lpfc_acqe_cgn_signal *cgn_signal; 6415 struct Scsi_Host *shost; 6416 struct lpfc_vport **vports; 6417 int rc, i, cnt; 6418 6419 evt_type = bf_get(lpfc_trailer_type, acqe_sli); 6420 6421 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 6422 "2901 Async SLI event - Type:%d, Event Data: x%08x " 6423 "x%08x x%08x x%08x\n", evt_type, 6424 acqe_sli->event_data1, acqe_sli->event_data2, 6425 acqe_sli->event_data3, acqe_sli->trailer); 6426 6427 port_name = phba->Port[0]; 6428 if (port_name == 0x00) 6429 port_name = '?'; /* get port name is empty */ 6430 6431 switch (evt_type) { 6432 case LPFC_SLI_EVENT_TYPE_OVER_TEMP: 6433 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT; 6434 temp_event_data.event_code = LPFC_THRESHOLD_TEMP; 6435 temp_event_data.data = (uint32_t)acqe_sli->event_data1; 6436 6437 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI, 6438 "3190 Over Temperature:%d Celsius- Port Name %c\n", 6439 acqe_sli->event_data1, port_name); 6440 6441 phba->sfp_warning |= LPFC_TRANSGRESSION_HIGH_TEMPERATURE; 6442 shost = lpfc_shost_from_vport(phba->pport); 6443 fc_host_post_vendor_event(shost, fc_get_event_number(), 6444 sizeof(temp_event_data), 6445 (char *)&temp_event_data, 6446 SCSI_NL_VID_TYPE_PCI 6447 | PCI_VENDOR_ID_EMULEX); 6448 break; 6449 case LPFC_SLI_EVENT_TYPE_NORM_TEMP: 6450 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT; 6451 temp_event_data.event_code = LPFC_NORMAL_TEMP; 6452 temp_event_data.data = (uint32_t)acqe_sli->event_data1; 6453 6454 lpfc_printf_log(phba, KERN_INFO, LOG_SLI | LOG_LDS_EVENT, 6455 "3191 Normal Temperature:%d Celsius - Port Name %c\n", 6456 acqe_sli->event_data1, port_name); 6457 6458 shost = lpfc_shost_from_vport(phba->pport); 6459 fc_host_post_vendor_event(shost, fc_get_event_number(), 6460 sizeof(temp_event_data), 6461 (char *)&temp_event_data, 6462 SCSI_NL_VID_TYPE_PCI 6463 | PCI_VENDOR_ID_EMULEX); 6464 break; 6465 case LPFC_SLI_EVENT_TYPE_MISCONFIGURED: 6466 misconfigured = (struct lpfc_acqe_misconfigured_event *) 6467 &acqe_sli->event_data1; 6468 6469 /* fetch the status for this port */ 6470 switch (phba->sli4_hba.lnk_info.lnk_no) { 6471 case LPFC_LINK_NUMBER_0: 6472 status = bf_get(lpfc_sli_misconfigured_port0_state, 6473 &misconfigured->theEvent); 6474 operational = bf_get(lpfc_sli_misconfigured_port0_op, 6475 &misconfigured->theEvent); 6476 break; 6477 case LPFC_LINK_NUMBER_1: 6478 status = bf_get(lpfc_sli_misconfigured_port1_state, 6479 &misconfigured->theEvent); 6480 operational = bf_get(lpfc_sli_misconfigured_port1_op, 6481 &misconfigured->theEvent); 6482 break; 6483 case LPFC_LINK_NUMBER_2: 6484 status = bf_get(lpfc_sli_misconfigured_port2_state, 6485 &misconfigured->theEvent); 6486 operational = bf_get(lpfc_sli_misconfigured_port2_op, 6487 &misconfigured->theEvent); 6488 break; 6489 case LPFC_LINK_NUMBER_3: 6490 status = bf_get(lpfc_sli_misconfigured_port3_state, 6491 &misconfigured->theEvent); 6492 operational = bf_get(lpfc_sli_misconfigured_port3_op, 6493 &misconfigured->theEvent); 6494 break; 6495 default: 6496 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 6497 "3296 " 6498 "LPFC_SLI_EVENT_TYPE_MISCONFIGURED " 6499 "event: Invalid link %d", 6500 phba->sli4_hba.lnk_info.lnk_no); 6501 return; 6502 } 6503 6504 /* Skip if optic state unchanged */ 6505 if (phba->sli4_hba.lnk_info.optic_state == status) 6506 return; 6507 6508 switch (status) { 6509 case LPFC_SLI_EVENT_STATUS_VALID: 6510 sprintf(message, "Physical Link is functional"); 6511 break; 6512 case LPFC_SLI_EVENT_STATUS_NOT_PRESENT: 6513 sprintf(message, "Optics faulted/incorrectly " 6514 "installed/not installed - Reseat optics, " 6515 "if issue not resolved, replace."); 6516 break; 6517 case LPFC_SLI_EVENT_STATUS_WRONG_TYPE: 6518 sprintf(message, 6519 "Optics of two types installed - Remove one " 6520 "optic or install matching pair of optics."); 6521 break; 6522 case LPFC_SLI_EVENT_STATUS_UNSUPPORTED: 6523 sprintf(message, "Incompatible optics - Replace with " 6524 "compatible optics for card to function."); 6525 break; 6526 case LPFC_SLI_EVENT_STATUS_UNQUALIFIED: 6527 sprintf(message, "Unqualified optics - Replace with " 6528 "Avago optics for Warranty and Technical " 6529 "Support - Link is%s operational", 6530 (operational) ? " not" : ""); 6531 break; 6532 case LPFC_SLI_EVENT_STATUS_UNCERTIFIED: 6533 sprintf(message, "Uncertified optics - Replace with " 6534 "Avago-certified optics to enable link " 6535 "operation - Link is%s operational", 6536 (operational) ? " not" : ""); 6537 break; 6538 default: 6539 /* firmware is reporting a status we don't know about */ 6540 sprintf(message, "Unknown event status x%02x", status); 6541 break; 6542 } 6543 6544 /* Issue READ_CONFIG mbox command to refresh supported speeds */ 6545 rc = lpfc_sli4_read_config(phba); 6546 if (rc) { 6547 phba->lmt = 0; 6548 lpfc_printf_log(phba, KERN_ERR, 6549 LOG_TRACE_EVENT, 6550 "3194 Unable to retrieve supported " 6551 "speeds, rc = 0x%x\n", rc); 6552 } 6553 rc = lpfc_sli4_refresh_params(phba); 6554 if (rc) { 6555 lpfc_printf_log(phba, KERN_ERR, LOG_SLI, 6556 "3174 Unable to update pls support, " 6557 "rc x%x\n", rc); 6558 } 6559 vports = lpfc_create_vport_work_array(phba); 6560 if (vports != NULL) { 6561 for (i = 0; i <= phba->max_vports && vports[i] != NULL; 6562 i++) { 6563 shost = lpfc_shost_from_vport(vports[i]); 6564 lpfc_host_supported_speeds_set(shost); 6565 } 6566 } 6567 lpfc_destroy_vport_work_array(phba, vports); 6568 6569 phba->sli4_hba.lnk_info.optic_state = status; 6570 lpfc_printf_log(phba, KERN_ERR, LOG_SLI, 6571 "3176 Port Name %c %s\n", port_name, message); 6572 break; 6573 case LPFC_SLI_EVENT_TYPE_REMOTE_DPORT: 6574 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 6575 "3192 Remote DPort Test Initiated - " 6576 "Event Data1:x%08x Event Data2: x%08x\n", 6577 acqe_sli->event_data1, acqe_sli->event_data2); 6578 break; 6579 case LPFC_SLI_EVENT_TYPE_PORT_PARAMS_CHG: 6580 /* Call FW to obtain active parms */ 6581 lpfc_sli4_cgn_parm_chg_evt(phba); 6582 break; 6583 case LPFC_SLI_EVENT_TYPE_MISCONF_FAWWN: 6584 /* Misconfigured WWN. Reports that the SLI Port is configured 6585 * to use FA-WWN, but the attached device doesn’t support it. 6586 * Event Data1 - N.A, Event Data2 - N.A 6587 * This event only happens on the physical port. 6588 */ 6589 lpfc_log_msg(phba, KERN_WARNING, LOG_SLI | LOG_DISCOVERY, 6590 "2699 Misconfigured FA-PWWN - Attached device " 6591 "does not support FA-PWWN\n"); 6592 phba->sli4_hba.fawwpn_flag &= ~LPFC_FAWWPN_FABRIC; 6593 memset(phba->pport->fc_portname.u.wwn, 0, 6594 sizeof(struct lpfc_name)); 6595 break; 6596 case LPFC_SLI_EVENT_TYPE_EEPROM_FAILURE: 6597 /* EEPROM failure. No driver action is required */ 6598 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI, 6599 "2518 EEPROM failure - " 6600 "Event Data1: x%08x Event Data2: x%08x\n", 6601 acqe_sli->event_data1, acqe_sli->event_data2); 6602 break; 6603 case LPFC_SLI_EVENT_TYPE_CGN_SIGNAL: 6604 if (phba->cmf_active_mode == LPFC_CFG_OFF) 6605 break; 6606 cgn_signal = (struct lpfc_acqe_cgn_signal *) 6607 &acqe_sli->event_data1; 6608 phba->cgn_acqe_cnt++; 6609 6610 cnt = bf_get(lpfc_warn_acqe, cgn_signal); 6611 atomic64_add(cnt, &phba->cgn_acqe_stat.warn); 6612 atomic64_add(cgn_signal->alarm_cnt, &phba->cgn_acqe_stat.alarm); 6613 6614 /* no threshold for CMF, even 1 signal will trigger an event */ 6615 6616 /* Alarm overrides warning, so check that first */ 6617 if (cgn_signal->alarm_cnt) { 6618 if (phba->cgn_reg_signal == EDC_CG_SIG_WARN_ALARM) { 6619 /* Keep track of alarm cnt for CMF_SYNC_WQE */ 6620 atomic_add(cgn_signal->alarm_cnt, 6621 &phba->cgn_sync_alarm_cnt); 6622 } 6623 } else if (cnt) { 6624 /* signal action needs to be taken */ 6625 if (phba->cgn_reg_signal == EDC_CG_SIG_WARN_ONLY || 6626 phba->cgn_reg_signal == EDC_CG_SIG_WARN_ALARM) { 6627 /* Keep track of warning cnt for CMF_SYNC_WQE */ 6628 atomic_add(cnt, &phba->cgn_sync_warn_cnt); 6629 } 6630 } 6631 break; 6632 case LPFC_SLI_EVENT_TYPE_RD_SIGNAL: 6633 /* May be accompanied by a temperature event */ 6634 lpfc_printf_log(phba, KERN_INFO, 6635 LOG_SLI | LOG_LINK_EVENT | LOG_LDS_EVENT, 6636 "2902 Remote Degrade Signaling: x%08x x%08x " 6637 "x%08x\n", 6638 acqe_sli->event_data1, acqe_sli->event_data2, 6639 acqe_sli->event_data3); 6640 break; 6641 case LPFC_SLI_EVENT_TYPE_RESET_CM_STATS: 6642 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT, 6643 "2905 Reset CM statistics\n"); 6644 lpfc_sli4_async_cmstat_evt(phba); 6645 break; 6646 default: 6647 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 6648 "3193 Unrecognized SLI event, type: 0x%x", 6649 evt_type); 6650 break; 6651 } 6652 } 6653 6654 /** 6655 * lpfc_sli4_perform_vport_cvl - Perform clear virtual link on a vport 6656 * @vport: pointer to vport data structure. 6657 * 6658 * This routine is to perform Clear Virtual Link (CVL) on a vport in 6659 * response to a CVL event. 6660 * 6661 * Return the pointer to the ndlp with the vport if successful, otherwise 6662 * return NULL. 6663 **/ 6664 static struct lpfc_nodelist * 6665 lpfc_sli4_perform_vport_cvl(struct lpfc_vport *vport) 6666 { 6667 struct lpfc_nodelist *ndlp; 6668 struct Scsi_Host *shost; 6669 struct lpfc_hba *phba; 6670 6671 if (!vport) 6672 return NULL; 6673 phba = vport->phba; 6674 if (!phba) 6675 return NULL; 6676 ndlp = lpfc_findnode_did(vport, Fabric_DID); 6677 if (!ndlp) { 6678 /* Cannot find existing Fabric ndlp, so allocate a new one */ 6679 ndlp = lpfc_nlp_init(vport, Fabric_DID); 6680 if (!ndlp) 6681 return NULL; 6682 /* Set the node type */ 6683 ndlp->nlp_type |= NLP_FABRIC; 6684 /* Put ndlp onto node list */ 6685 lpfc_enqueue_node(vport, ndlp); 6686 } 6687 if ((phba->pport->port_state < LPFC_FLOGI) && 6688 (phba->pport->port_state != LPFC_VPORT_FAILED)) 6689 return NULL; 6690 /* If virtual link is not yet instantiated ignore CVL */ 6691 if ((vport != phba->pport) && (vport->port_state < LPFC_FDISC) 6692 && (vport->port_state != LPFC_VPORT_FAILED)) 6693 return NULL; 6694 shost = lpfc_shost_from_vport(vport); 6695 if (!shost) 6696 return NULL; 6697 lpfc_linkdown_port(vport); 6698 lpfc_cleanup_pending_mbox(vport); 6699 set_bit(FC_VPORT_CVL_RCVD, &vport->fc_flag); 6700 6701 return ndlp; 6702 } 6703 6704 /** 6705 * lpfc_sli4_perform_all_vport_cvl - Perform clear virtual link on all vports 6706 * @phba: pointer to lpfc hba data structure. 6707 * 6708 * This routine is to perform Clear Virtual Link (CVL) on all vports in 6709 * response to a FCF dead event. 6710 **/ 6711 static void 6712 lpfc_sli4_perform_all_vport_cvl(struct lpfc_hba *phba) 6713 { 6714 struct lpfc_vport **vports; 6715 int i; 6716 6717 vports = lpfc_create_vport_work_array(phba); 6718 if (vports) 6719 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) 6720 lpfc_sli4_perform_vport_cvl(vports[i]); 6721 lpfc_destroy_vport_work_array(phba, vports); 6722 } 6723 6724 /** 6725 * lpfc_sli4_async_fip_evt - Process the asynchronous FCoE FIP event 6726 * @phba: pointer to lpfc hba data structure. 6727 * @acqe_fip: pointer to the async fcoe completion queue entry. 6728 * 6729 * This routine is to handle the SLI4 asynchronous fcoe event. 6730 **/ 6731 static void 6732 lpfc_sli4_async_fip_evt(struct lpfc_hba *phba, 6733 struct lpfc_acqe_fip *acqe_fip) 6734 { 6735 uint8_t event_type = bf_get(lpfc_trailer_type, acqe_fip); 6736 int rc; 6737 struct lpfc_vport *vport; 6738 struct lpfc_nodelist *ndlp; 6739 int active_vlink_present; 6740 struct lpfc_vport **vports; 6741 int i; 6742 6743 phba->fc_eventTag = acqe_fip->event_tag; 6744 phba->fcoe_eventtag = acqe_fip->event_tag; 6745 switch (event_type) { 6746 case LPFC_FIP_EVENT_TYPE_NEW_FCF: 6747 case LPFC_FIP_EVENT_TYPE_FCF_PARAM_MOD: 6748 if (event_type == LPFC_FIP_EVENT_TYPE_NEW_FCF) 6749 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 6750 "2546 New FCF event, evt_tag:x%x, " 6751 "index:x%x\n", 6752 acqe_fip->event_tag, 6753 acqe_fip->index); 6754 else 6755 lpfc_printf_log(phba, KERN_WARNING, LOG_FIP | 6756 LOG_DISCOVERY, 6757 "2788 FCF param modified event, " 6758 "evt_tag:x%x, index:x%x\n", 6759 acqe_fip->event_tag, 6760 acqe_fip->index); 6761 if (phba->fcf.fcf_flag & FCF_DISCOVERY) { 6762 /* 6763 * During period of FCF discovery, read the FCF 6764 * table record indexed by the event to update 6765 * FCF roundrobin failover eligible FCF bmask. 6766 */ 6767 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | 6768 LOG_DISCOVERY, 6769 "2779 Read FCF (x%x) for updating " 6770 "roundrobin FCF failover bmask\n", 6771 acqe_fip->index); 6772 rc = lpfc_sli4_read_fcf_rec(phba, acqe_fip->index); 6773 } 6774 6775 /* If the FCF discovery is in progress, do nothing. */ 6776 if (test_bit(FCF_TS_INPROG, &phba->hba_flag)) 6777 break; 6778 spin_lock_irq(&phba->hbalock); 6779 /* If fast FCF failover rescan event is pending, do nothing */ 6780 if (phba->fcf.fcf_flag & (FCF_REDISC_EVT | FCF_REDISC_PEND)) { 6781 spin_unlock_irq(&phba->hbalock); 6782 break; 6783 } 6784 6785 /* If the FCF has been in discovered state, do nothing. */ 6786 if (phba->fcf.fcf_flag & FCF_SCAN_DONE) { 6787 spin_unlock_irq(&phba->hbalock); 6788 break; 6789 } 6790 spin_unlock_irq(&phba->hbalock); 6791 6792 /* Otherwise, scan the entire FCF table and re-discover SAN */ 6793 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY, 6794 "2770 Start FCF table scan per async FCF " 6795 "event, evt_tag:x%x, index:x%x\n", 6796 acqe_fip->event_tag, acqe_fip->index); 6797 rc = lpfc_sli4_fcf_scan_read_fcf_rec(phba, 6798 LPFC_FCOE_FCF_GET_FIRST); 6799 if (rc) 6800 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 6801 "2547 Issue FCF scan read FCF mailbox " 6802 "command failed (x%x)\n", rc); 6803 break; 6804 6805 case LPFC_FIP_EVENT_TYPE_FCF_TABLE_FULL: 6806 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 6807 "2548 FCF Table full count 0x%x tag 0x%x\n", 6808 bf_get(lpfc_acqe_fip_fcf_count, acqe_fip), 6809 acqe_fip->event_tag); 6810 break; 6811 6812 case LPFC_FIP_EVENT_TYPE_FCF_DEAD: 6813 phba->fcoe_cvl_eventtag = acqe_fip->event_tag; 6814 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 6815 "2549 FCF (x%x) disconnected from network, " 6816 "tag:x%x\n", acqe_fip->index, 6817 acqe_fip->event_tag); 6818 /* 6819 * If we are in the middle of FCF failover process, clear 6820 * the corresponding FCF bit in the roundrobin bitmap. 6821 */ 6822 spin_lock_irq(&phba->hbalock); 6823 if ((phba->fcf.fcf_flag & FCF_DISCOVERY) && 6824 (phba->fcf.current_rec.fcf_indx != acqe_fip->index)) { 6825 spin_unlock_irq(&phba->hbalock); 6826 /* Update FLOGI FCF failover eligible FCF bmask */ 6827 lpfc_sli4_fcf_rr_index_clear(phba, acqe_fip->index); 6828 break; 6829 } 6830 spin_unlock_irq(&phba->hbalock); 6831 6832 /* If the event is not for currently used fcf do nothing */ 6833 if (phba->fcf.current_rec.fcf_indx != acqe_fip->index) 6834 break; 6835 6836 /* 6837 * Otherwise, request the port to rediscover the entire FCF 6838 * table for a fast recovery from case that the current FCF 6839 * is no longer valid as we are not in the middle of FCF 6840 * failover process already. 6841 */ 6842 spin_lock_irq(&phba->hbalock); 6843 /* Mark the fast failover process in progress */ 6844 phba->fcf.fcf_flag |= FCF_DEAD_DISC; 6845 spin_unlock_irq(&phba->hbalock); 6846 6847 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY, 6848 "2771 Start FCF fast failover process due to " 6849 "FCF DEAD event: evt_tag:x%x, fcf_index:x%x " 6850 "\n", acqe_fip->event_tag, acqe_fip->index); 6851 rc = lpfc_sli4_redisc_fcf_table(phba); 6852 if (rc) { 6853 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | 6854 LOG_TRACE_EVENT, 6855 "2772 Issue FCF rediscover mailbox " 6856 "command failed, fail through to FCF " 6857 "dead event\n"); 6858 spin_lock_irq(&phba->hbalock); 6859 phba->fcf.fcf_flag &= ~FCF_DEAD_DISC; 6860 spin_unlock_irq(&phba->hbalock); 6861 /* 6862 * Last resort will fail over by treating this 6863 * as a link down to FCF registration. 6864 */ 6865 lpfc_sli4_fcf_dead_failthrough(phba); 6866 } else { 6867 /* Reset FCF roundrobin bmask for new discovery */ 6868 lpfc_sli4_clear_fcf_rr_bmask(phba); 6869 /* 6870 * Handling fast FCF failover to a DEAD FCF event is 6871 * considered equalivant to receiving CVL to all vports. 6872 */ 6873 lpfc_sli4_perform_all_vport_cvl(phba); 6874 } 6875 break; 6876 case LPFC_FIP_EVENT_TYPE_CVL: 6877 phba->fcoe_cvl_eventtag = acqe_fip->event_tag; 6878 lpfc_printf_log(phba, KERN_ERR, 6879 LOG_TRACE_EVENT, 6880 "2718 Clear Virtual Link Received for VPI 0x%x" 6881 " tag 0x%x\n", acqe_fip->index, acqe_fip->event_tag); 6882 6883 vport = lpfc_find_vport_by_vpid(phba, 6884 acqe_fip->index); 6885 ndlp = lpfc_sli4_perform_vport_cvl(vport); 6886 if (!ndlp) 6887 break; 6888 active_vlink_present = 0; 6889 6890 vports = lpfc_create_vport_work_array(phba); 6891 if (vports) { 6892 for (i = 0; i <= phba->max_vports && vports[i] != NULL; 6893 i++) { 6894 if (!test_bit(FC_VPORT_CVL_RCVD, 6895 &vports[i]->fc_flag) && 6896 vports[i]->port_state > LPFC_FDISC) { 6897 active_vlink_present = 1; 6898 break; 6899 } 6900 } 6901 lpfc_destroy_vport_work_array(phba, vports); 6902 } 6903 6904 /* 6905 * Don't re-instantiate if vport is marked for deletion. 6906 * If we are here first then vport_delete is going to wait 6907 * for discovery to complete. 6908 */ 6909 if (!test_bit(FC_UNLOADING, &vport->load_flag) && 6910 active_vlink_present) { 6911 /* 6912 * If there are other active VLinks present, 6913 * re-instantiate the Vlink using FDISC. 6914 */ 6915 mod_timer(&ndlp->nlp_delayfunc, 6916 jiffies + secs_to_jiffies(1)); 6917 set_bit(NLP_DELAY_TMO, &ndlp->nlp_flag); 6918 ndlp->nlp_last_elscmd = ELS_CMD_FDISC; 6919 vport->port_state = LPFC_FDISC; 6920 } else { 6921 /* 6922 * Otherwise, we request port to rediscover 6923 * the entire FCF table for a fast recovery 6924 * from possible case that the current FCF 6925 * is no longer valid if we are not already 6926 * in the FCF failover process. 6927 */ 6928 spin_lock_irq(&phba->hbalock); 6929 if (phba->fcf.fcf_flag & FCF_DISCOVERY) { 6930 spin_unlock_irq(&phba->hbalock); 6931 break; 6932 } 6933 /* Mark the fast failover process in progress */ 6934 phba->fcf.fcf_flag |= FCF_ACVL_DISC; 6935 spin_unlock_irq(&phba->hbalock); 6936 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | 6937 LOG_DISCOVERY, 6938 "2773 Start FCF failover per CVL, " 6939 "evt_tag:x%x\n", acqe_fip->event_tag); 6940 rc = lpfc_sli4_redisc_fcf_table(phba); 6941 if (rc) { 6942 lpfc_printf_log(phba, KERN_ERR, LOG_FIP | 6943 LOG_TRACE_EVENT, 6944 "2774 Issue FCF rediscover " 6945 "mailbox command failed, " 6946 "through to CVL event\n"); 6947 spin_lock_irq(&phba->hbalock); 6948 phba->fcf.fcf_flag &= ~FCF_ACVL_DISC; 6949 spin_unlock_irq(&phba->hbalock); 6950 /* 6951 * Last resort will be re-try on the 6952 * the current registered FCF entry. 6953 */ 6954 lpfc_retry_pport_discovery(phba); 6955 } else 6956 /* 6957 * Reset FCF roundrobin bmask for new 6958 * discovery. 6959 */ 6960 lpfc_sli4_clear_fcf_rr_bmask(phba); 6961 } 6962 break; 6963 default: 6964 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 6965 "0288 Unknown FCoE event type 0x%x event tag " 6966 "0x%x\n", event_type, acqe_fip->event_tag); 6967 break; 6968 } 6969 } 6970 6971 /** 6972 * lpfc_sli4_async_dcbx_evt - Process the asynchronous dcbx event 6973 * @phba: pointer to lpfc hba data structure. 6974 * @acqe_dcbx: pointer to the async dcbx completion queue entry. 6975 * 6976 * This routine is to handle the SLI4 asynchronous dcbx event. 6977 **/ 6978 static void 6979 lpfc_sli4_async_dcbx_evt(struct lpfc_hba *phba, 6980 struct lpfc_acqe_dcbx *acqe_dcbx) 6981 { 6982 phba->fc_eventTag = acqe_dcbx->event_tag; 6983 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 6984 "0290 The SLI4 DCBX asynchronous event is not " 6985 "handled yet\n"); 6986 } 6987 6988 /** 6989 * lpfc_sli4_async_grp5_evt - Process the asynchronous group5 event 6990 * @phba: pointer to lpfc hba data structure. 6991 * @acqe_grp5: pointer to the async grp5 completion queue entry. 6992 * 6993 * This routine is to handle the SLI4 asynchronous grp5 event. A grp5 event 6994 * is an asynchronous notified of a logical link speed change. The Port 6995 * reports the logical link speed in units of 10Mbps. 6996 **/ 6997 static void 6998 lpfc_sli4_async_grp5_evt(struct lpfc_hba *phba, 6999 struct lpfc_acqe_grp5 *acqe_grp5) 7000 { 7001 uint16_t prev_ll_spd; 7002 7003 phba->fc_eventTag = acqe_grp5->event_tag; 7004 phba->fcoe_eventtag = acqe_grp5->event_tag; 7005 prev_ll_spd = phba->sli4_hba.link_state.logical_speed; 7006 phba->sli4_hba.link_state.logical_speed = 7007 (bf_get(lpfc_acqe_grp5_llink_spd, acqe_grp5)) * 10; 7008 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 7009 "2789 GRP5 Async Event: Updating logical link speed " 7010 "from %dMbps to %dMbps\n", prev_ll_spd, 7011 phba->sli4_hba.link_state.logical_speed); 7012 } 7013 7014 /** 7015 * lpfc_sli4_async_cmstat_evt - Process the asynchronous cmstat event 7016 * @phba: pointer to lpfc hba data structure. 7017 * 7018 * This routine is to handle the SLI4 asynchronous cmstat event. A cmstat event 7019 * is an asynchronous notification of a request to reset CM stats. 7020 **/ 7021 static void 7022 lpfc_sli4_async_cmstat_evt(struct lpfc_hba *phba) 7023 { 7024 if (!phba->cgn_i) 7025 return; 7026 lpfc_init_congestion_stat(phba); 7027 } 7028 7029 /** 7030 * lpfc_cgn_params_val - Validate FW congestion parameters. 7031 * @phba: pointer to lpfc hba data structure. 7032 * @p_cfg_param: pointer to FW provided congestion parameters. 7033 * 7034 * This routine validates the congestion parameters passed 7035 * by the FW to the driver via an ACQE event. 7036 **/ 7037 static void 7038 lpfc_cgn_params_val(struct lpfc_hba *phba, struct lpfc_cgn_param *p_cfg_param) 7039 { 7040 spin_lock_irq(&phba->hbalock); 7041 7042 if (!lpfc_rangecheck(p_cfg_param->cgn_param_mode, LPFC_CFG_OFF, 7043 LPFC_CFG_MONITOR)) { 7044 lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT, 7045 "6225 CMF mode param out of range: %d\n", 7046 p_cfg_param->cgn_param_mode); 7047 p_cfg_param->cgn_param_mode = LPFC_CFG_OFF; 7048 } 7049 7050 spin_unlock_irq(&phba->hbalock); 7051 } 7052 7053 static const char * const lpfc_cmf_mode_to_str[] = { 7054 "OFF", 7055 "MANAGED", 7056 "MONITOR", 7057 }; 7058 7059 /** 7060 * lpfc_cgn_params_parse - Process a FW cong parm change event 7061 * @phba: pointer to lpfc hba data structure. 7062 * @p_cgn_param: pointer to a data buffer with the FW cong params. 7063 * @len: the size of pdata in bytes. 7064 * 7065 * This routine validates the congestion management buffer signature 7066 * from the FW, validates the contents and makes corrections for 7067 * valid, in-range values. If the signature magic is correct and 7068 * after parameter validation, the contents are copied to the driver's 7069 * @phba structure. If the magic is incorrect, an error message is 7070 * logged. 7071 **/ 7072 static void 7073 lpfc_cgn_params_parse(struct lpfc_hba *phba, 7074 struct lpfc_cgn_param *p_cgn_param, uint32_t len) 7075 { 7076 struct lpfc_cgn_info *cp; 7077 uint32_t crc, oldmode; 7078 char acr_string[4] = {0}; 7079 7080 /* Make sure the FW has encoded the correct magic number to 7081 * validate the congestion parameter in FW memory. 7082 */ 7083 if (p_cgn_param->cgn_param_magic == LPFC_CFG_PARAM_MAGIC_NUM) { 7084 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT | LOG_INIT, 7085 "4668 FW cgn parm buffer data: " 7086 "magic 0x%x version %d mode %d " 7087 "level0 %d level1 %d " 7088 "level2 %d byte13 %d " 7089 "byte14 %d byte15 %d " 7090 "byte11 %d byte12 %d activeMode %d\n", 7091 p_cgn_param->cgn_param_magic, 7092 p_cgn_param->cgn_param_version, 7093 p_cgn_param->cgn_param_mode, 7094 p_cgn_param->cgn_param_level0, 7095 p_cgn_param->cgn_param_level1, 7096 p_cgn_param->cgn_param_level2, 7097 p_cgn_param->byte13, 7098 p_cgn_param->byte14, 7099 p_cgn_param->byte15, 7100 p_cgn_param->byte11, 7101 p_cgn_param->byte12, 7102 phba->cmf_active_mode); 7103 7104 oldmode = phba->cmf_active_mode; 7105 7106 /* Any parameters out of range are corrected to defaults 7107 * by this routine. No need to fail. 7108 */ 7109 lpfc_cgn_params_val(phba, p_cgn_param); 7110 7111 /* Parameters are verified, move them into driver storage */ 7112 spin_lock_irq(&phba->hbalock); 7113 memcpy(&phba->cgn_p, p_cgn_param, 7114 sizeof(struct lpfc_cgn_param)); 7115 7116 /* Update parameters in congestion info buffer now */ 7117 if (phba->cgn_i) { 7118 cp = (struct lpfc_cgn_info *)phba->cgn_i->virt; 7119 cp->cgn_info_mode = phba->cgn_p.cgn_param_mode; 7120 cp->cgn_info_level0 = phba->cgn_p.cgn_param_level0; 7121 cp->cgn_info_level1 = phba->cgn_p.cgn_param_level1; 7122 cp->cgn_info_level2 = phba->cgn_p.cgn_param_level2; 7123 crc = lpfc_cgn_calc_crc32(cp, LPFC_CGN_INFO_SZ, 7124 LPFC_CGN_CRC32_SEED); 7125 cp->cgn_info_crc = cpu_to_le32(crc); 7126 } 7127 spin_unlock_irq(&phba->hbalock); 7128 7129 phba->cmf_active_mode = phba->cgn_p.cgn_param_mode; 7130 7131 switch (oldmode) { 7132 case LPFC_CFG_OFF: 7133 if (phba->cgn_p.cgn_param_mode != LPFC_CFG_OFF) { 7134 /* Turning CMF on */ 7135 lpfc_cmf_start(phba); 7136 7137 if (phba->link_state >= LPFC_LINK_UP) { 7138 phba->cgn_reg_fpin = 7139 phba->cgn_init_reg_fpin; 7140 phba->cgn_reg_signal = 7141 phba->cgn_init_reg_signal; 7142 lpfc_issue_els_edc(phba->pport, 0); 7143 } 7144 } 7145 break; 7146 case LPFC_CFG_MANAGED: 7147 switch (phba->cgn_p.cgn_param_mode) { 7148 case LPFC_CFG_OFF: 7149 /* Turning CMF off */ 7150 lpfc_cmf_stop(phba); 7151 if (phba->link_state >= LPFC_LINK_UP) 7152 lpfc_issue_els_edc(phba->pport, 0); 7153 break; 7154 case LPFC_CFG_MONITOR: 7155 phba->cmf_max_bytes_per_interval = 7156 phba->cmf_link_byte_count; 7157 7158 /* Resume blocked IO - unblock on workqueue */ 7159 queue_work(phba->wq, 7160 &phba->unblock_request_work); 7161 break; 7162 } 7163 break; 7164 case LPFC_CFG_MONITOR: 7165 switch (phba->cgn_p.cgn_param_mode) { 7166 case LPFC_CFG_OFF: 7167 /* Turning CMF off */ 7168 lpfc_cmf_stop(phba); 7169 if (phba->link_state >= LPFC_LINK_UP) 7170 lpfc_issue_els_edc(phba->pport, 0); 7171 break; 7172 case LPFC_CFG_MANAGED: 7173 lpfc_cmf_signal_init(phba); 7174 break; 7175 } 7176 break; 7177 } 7178 if (oldmode != LPFC_CFG_OFF || 7179 oldmode != phba->cgn_p.cgn_param_mode) { 7180 if (phba->cgn_p.cgn_param_mode == LPFC_CFG_MANAGED) 7181 scnprintf(acr_string, sizeof(acr_string), "%u", 7182 phba->cgn_p.cgn_param_level0); 7183 else 7184 scnprintf(acr_string, sizeof(acr_string), "NA"); 7185 7186 dev_info(&phba->pcidev->dev, "%d: " 7187 "4663 CMF: Mode %s acr %s\n", 7188 phba->brd_no, 7189 lpfc_cmf_mode_to_str 7190 [phba->cgn_p.cgn_param_mode], 7191 acr_string); 7192 } 7193 } else { 7194 lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT | LOG_INIT, 7195 "4669 FW cgn parm buf wrong magic 0x%x " 7196 "version %d\n", p_cgn_param->cgn_param_magic, 7197 p_cgn_param->cgn_param_version); 7198 } 7199 } 7200 7201 /** 7202 * lpfc_sli4_cgn_params_read - Read and Validate FW congestion parameters. 7203 * @phba: pointer to lpfc hba data structure. 7204 * 7205 * This routine issues a read_object mailbox command to 7206 * get the congestion management parameters from the FW 7207 * parses it and updates the driver maintained values. 7208 * 7209 * Returns 7210 * 0 if the object was empty 7211 * -Eval if an error was encountered 7212 * Count if bytes were read from object 7213 **/ 7214 int 7215 lpfc_sli4_cgn_params_read(struct lpfc_hba *phba) 7216 { 7217 int ret = 0; 7218 struct lpfc_cgn_param *p_cgn_param = NULL; 7219 u32 *pdata = NULL; 7220 u32 len = 0; 7221 7222 /* Find out if the FW has a new set of congestion parameters. */ 7223 len = sizeof(struct lpfc_cgn_param); 7224 pdata = kzalloc(len, GFP_KERNEL); 7225 if (!pdata) 7226 return -ENOMEM; 7227 ret = lpfc_read_object(phba, (char *)LPFC_PORT_CFG_NAME, 7228 pdata, len); 7229 7230 /* 0 means no data. A negative means error. A positive means 7231 * bytes were copied. 7232 */ 7233 if (!ret) { 7234 lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT | LOG_INIT, 7235 "4670 CGN RD OBJ returns no data\n"); 7236 goto rd_obj_err; 7237 } else if (ret < 0) { 7238 /* Some error. Just exit and return it to the caller.*/ 7239 goto rd_obj_err; 7240 } 7241 7242 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT | LOG_INIT, 7243 "6234 READ CGN PARAMS Successful %d\n", len); 7244 7245 /* Parse data pointer over len and update the phba congestion 7246 * parameters with values passed back. The receive rate values 7247 * may have been altered in FW, but take no action here. 7248 */ 7249 p_cgn_param = (struct lpfc_cgn_param *)pdata; 7250 lpfc_cgn_params_parse(phba, p_cgn_param, len); 7251 7252 rd_obj_err: 7253 kfree(pdata); 7254 return ret; 7255 } 7256 7257 /** 7258 * lpfc_sli4_cgn_parm_chg_evt - Process a FW congestion param change event 7259 * @phba: pointer to lpfc hba data structure. 7260 * 7261 * The FW generated Async ACQE SLI event calls this routine when 7262 * the event type is an SLI Internal Port Event and the Event Code 7263 * indicates a change to the FW maintained congestion parameters. 7264 * 7265 * This routine executes a Read_Object mailbox call to obtain the 7266 * current congestion parameters maintained in FW and corrects 7267 * the driver's active congestion parameters. 7268 * 7269 * The acqe event is not passed because there is no further data 7270 * required. 7271 * 7272 * Returns nonzero error if event processing encountered an error. 7273 * Zero otherwise for success. 7274 **/ 7275 static int 7276 lpfc_sli4_cgn_parm_chg_evt(struct lpfc_hba *phba) 7277 { 7278 int ret = 0; 7279 7280 if (!phba->sli4_hba.pc_sli4_params.cmf) { 7281 lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT | LOG_INIT, 7282 "4664 Cgn Evt when E2E off. Drop event\n"); 7283 return -EACCES; 7284 } 7285 7286 /* If the event is claiming an empty object, it's ok. A write 7287 * could have cleared it. Only error is a negative return 7288 * status. 7289 */ 7290 ret = lpfc_sli4_cgn_params_read(phba); 7291 if (ret < 0) { 7292 lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT | LOG_INIT, 7293 "4667 Error reading Cgn Params (%d)\n", 7294 ret); 7295 } else if (!ret) { 7296 lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT | LOG_INIT, 7297 "4673 CGN Event empty object.\n"); 7298 } 7299 return ret; 7300 } 7301 7302 /** 7303 * lpfc_sli4_async_event_proc - Process all the pending asynchronous event 7304 * @phba: pointer to lpfc hba data structure. 7305 * 7306 * This routine is invoked by the worker thread to process all the pending 7307 * SLI4 asynchronous events. 7308 **/ 7309 void lpfc_sli4_async_event_proc(struct lpfc_hba *phba) 7310 { 7311 struct lpfc_cq_event *cq_event; 7312 unsigned long iflags; 7313 7314 /* First, declare the async event has been handled */ 7315 clear_bit(ASYNC_EVENT, &phba->hba_flag); 7316 7317 /* Now, handle all the async events */ 7318 spin_lock_irqsave(&phba->sli4_hba.asynce_list_lock, iflags); 7319 while (!list_empty(&phba->sli4_hba.sp_asynce_work_queue)) { 7320 list_remove_head(&phba->sli4_hba.sp_asynce_work_queue, 7321 cq_event, struct lpfc_cq_event, list); 7322 spin_unlock_irqrestore(&phba->sli4_hba.asynce_list_lock, 7323 iflags); 7324 7325 /* Process the asynchronous event */ 7326 switch (bf_get(lpfc_trailer_code, &cq_event->cqe.mcqe_cmpl)) { 7327 case LPFC_TRAILER_CODE_LINK: 7328 lpfc_sli4_async_link_evt(phba, 7329 &cq_event->cqe.acqe_link); 7330 break; 7331 case LPFC_TRAILER_CODE_FCOE: 7332 lpfc_sli4_async_fip_evt(phba, &cq_event->cqe.acqe_fip); 7333 break; 7334 case LPFC_TRAILER_CODE_DCBX: 7335 lpfc_sli4_async_dcbx_evt(phba, 7336 &cq_event->cqe.acqe_dcbx); 7337 break; 7338 case LPFC_TRAILER_CODE_GRP5: 7339 lpfc_sli4_async_grp5_evt(phba, 7340 &cq_event->cqe.acqe_grp5); 7341 break; 7342 case LPFC_TRAILER_CODE_FC: 7343 lpfc_sli4_async_fc_evt(phba, &cq_event->cqe.acqe_fc); 7344 break; 7345 case LPFC_TRAILER_CODE_SLI: 7346 lpfc_sli4_async_sli_evt(phba, &cq_event->cqe.acqe_sli); 7347 break; 7348 default: 7349 lpfc_printf_log(phba, KERN_ERR, 7350 LOG_TRACE_EVENT, 7351 "1804 Invalid asynchronous event code: " 7352 "x%x\n", bf_get(lpfc_trailer_code, 7353 &cq_event->cqe.mcqe_cmpl)); 7354 break; 7355 } 7356 7357 /* Free the completion event processed to the free pool */ 7358 lpfc_sli4_cq_event_release(phba, cq_event); 7359 spin_lock_irqsave(&phba->sli4_hba.asynce_list_lock, iflags); 7360 } 7361 spin_unlock_irqrestore(&phba->sli4_hba.asynce_list_lock, iflags); 7362 } 7363 7364 /** 7365 * lpfc_sli4_fcf_redisc_event_proc - Process fcf table rediscovery event 7366 * @phba: pointer to lpfc hba data structure. 7367 * 7368 * This routine is invoked by the worker thread to process FCF table 7369 * rediscovery pending completion event. 7370 **/ 7371 void lpfc_sli4_fcf_redisc_event_proc(struct lpfc_hba *phba) 7372 { 7373 int rc; 7374 7375 spin_lock_irq(&phba->hbalock); 7376 /* Clear FCF rediscovery timeout event */ 7377 phba->fcf.fcf_flag &= ~FCF_REDISC_EVT; 7378 /* Clear driver fast failover FCF record flag */ 7379 phba->fcf.failover_rec.flag = 0; 7380 /* Set state for FCF fast failover */ 7381 phba->fcf.fcf_flag |= FCF_REDISC_FOV; 7382 spin_unlock_irq(&phba->hbalock); 7383 7384 /* Scan FCF table from the first entry to re-discover SAN */ 7385 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY, 7386 "2777 Start post-quiescent FCF table scan\n"); 7387 rc = lpfc_sli4_fcf_scan_read_fcf_rec(phba, LPFC_FCOE_FCF_GET_FIRST); 7388 if (rc) 7389 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 7390 "2747 Issue FCF scan read FCF mailbox " 7391 "command failed 0x%x\n", rc); 7392 } 7393 7394 /** 7395 * lpfc_api_table_setup - Set up per hba pci-device group func api jump table 7396 * @phba: pointer to lpfc hba data structure. 7397 * @dev_grp: The HBA PCI-Device group number. 7398 * 7399 * This routine is invoked to set up the per HBA PCI-Device group function 7400 * API jump table entries. 7401 * 7402 * Return: 0 if success, otherwise -ENODEV 7403 **/ 7404 int 7405 lpfc_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp) 7406 { 7407 int rc; 7408 7409 /* Set up lpfc PCI-device group */ 7410 phba->pci_dev_grp = dev_grp; 7411 7412 /* The LPFC_PCI_DEV_OC uses SLI4 */ 7413 if (dev_grp == LPFC_PCI_DEV_OC) 7414 phba->sli_rev = LPFC_SLI_REV4; 7415 7416 /* Set up device INIT API function jump table */ 7417 rc = lpfc_init_api_table_setup(phba, dev_grp); 7418 if (rc) 7419 return -ENODEV; 7420 /* Set up SCSI API function jump table */ 7421 rc = lpfc_scsi_api_table_setup(phba, dev_grp); 7422 if (rc) 7423 return -ENODEV; 7424 /* Set up SLI API function jump table */ 7425 rc = lpfc_sli_api_table_setup(phba, dev_grp); 7426 if (rc) 7427 return -ENODEV; 7428 /* Set up MBOX API function jump table */ 7429 rc = lpfc_mbox_api_table_setup(phba, dev_grp); 7430 if (rc) 7431 return -ENODEV; 7432 7433 return 0; 7434 } 7435 7436 /** 7437 * lpfc_log_intr_mode - Log the active interrupt mode 7438 * @phba: pointer to lpfc hba data structure. 7439 * @intr_mode: active interrupt mode adopted. 7440 * 7441 * This routine it invoked to log the currently used active interrupt mode 7442 * to the device. 7443 **/ 7444 static void lpfc_log_intr_mode(struct lpfc_hba *phba, uint32_t intr_mode) 7445 { 7446 switch (intr_mode) { 7447 case 0: 7448 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 7449 "0470 Enable INTx interrupt mode.\n"); 7450 break; 7451 case 1: 7452 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 7453 "0481 Enabled MSI interrupt mode.\n"); 7454 break; 7455 case 2: 7456 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 7457 "0480 Enabled MSI-X interrupt mode.\n"); 7458 break; 7459 default: 7460 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 7461 "0482 Illegal interrupt mode.\n"); 7462 break; 7463 } 7464 return; 7465 } 7466 7467 /** 7468 * lpfc_enable_pci_dev - Enable a generic PCI device. 7469 * @phba: pointer to lpfc hba data structure. 7470 * 7471 * This routine is invoked to enable the PCI device that is common to all 7472 * PCI devices. 7473 * 7474 * Return codes 7475 * 0 - successful 7476 * other values - error 7477 **/ 7478 static int 7479 lpfc_enable_pci_dev(struct lpfc_hba *phba) 7480 { 7481 struct pci_dev *pdev; 7482 7483 /* Obtain PCI device reference */ 7484 if (!phba->pcidev) 7485 goto out_error; 7486 else 7487 pdev = phba->pcidev; 7488 /* Enable PCI device */ 7489 if (pci_enable_device_mem(pdev)) 7490 goto out_error; 7491 /* Request PCI resource for the device */ 7492 if (pci_request_mem_regions(pdev, LPFC_DRIVER_NAME)) 7493 goto out_disable_device; 7494 /* Set up device as PCI master and save state for EEH */ 7495 pci_set_master(pdev); 7496 pci_try_set_mwi(pdev); 7497 pci_save_state(pdev); 7498 7499 /* PCIe EEH recovery on powerpc platforms needs fundamental reset */ 7500 if (pci_is_pcie(pdev)) 7501 pdev->needs_freset = 1; 7502 7503 return 0; 7504 7505 out_disable_device: 7506 pci_disable_device(pdev); 7507 out_error: 7508 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 7509 "1401 Failed to enable pci device\n"); 7510 return -ENODEV; 7511 } 7512 7513 /** 7514 * lpfc_disable_pci_dev - Disable a generic PCI device. 7515 * @phba: pointer to lpfc hba data structure. 7516 * 7517 * This routine is invoked to disable the PCI device that is common to all 7518 * PCI devices. 7519 **/ 7520 static void 7521 lpfc_disable_pci_dev(struct lpfc_hba *phba) 7522 { 7523 struct pci_dev *pdev; 7524 7525 /* Obtain PCI device reference */ 7526 if (!phba->pcidev) 7527 return; 7528 else 7529 pdev = phba->pcidev; 7530 /* Release PCI resource and disable PCI device */ 7531 pci_release_mem_regions(pdev); 7532 pci_disable_device(pdev); 7533 7534 return; 7535 } 7536 7537 /** 7538 * lpfc_reset_hba - Reset a hba 7539 * @phba: pointer to lpfc hba data structure. 7540 * 7541 * This routine is invoked to reset a hba device. It brings the HBA 7542 * offline, performs a board restart, and then brings the board back 7543 * online. The lpfc_offline calls lpfc_sli_hba_down which will clean up 7544 * on outstanding mailbox commands. 7545 **/ 7546 void 7547 lpfc_reset_hba(struct lpfc_hba *phba) 7548 { 7549 int rc = 0; 7550 7551 /* If resets are disabled then set error state and return. */ 7552 if (!phba->cfg_enable_hba_reset) { 7553 phba->link_state = LPFC_HBA_ERROR; 7554 return; 7555 } 7556 7557 /* If not LPFC_SLI_ACTIVE, force all IO to be flushed */ 7558 if (phba->sli.sli_flag & LPFC_SLI_ACTIVE) { 7559 lpfc_offline_prep(phba, LPFC_MBX_WAIT); 7560 } else { 7561 if (test_bit(MBX_TMO_ERR, &phba->bit_flags)) { 7562 /* Perform a PCI function reset to start from clean */ 7563 rc = lpfc_pci_function_reset(phba); 7564 lpfc_els_flush_all_cmd(phba); 7565 } 7566 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT); 7567 lpfc_sli_flush_io_rings(phba); 7568 } 7569 lpfc_offline(phba); 7570 clear_bit(MBX_TMO_ERR, &phba->bit_flags); 7571 if (unlikely(rc)) { 7572 lpfc_printf_log(phba, KERN_ERR, LOG_SLI, 7573 "8888 PCI function reset failed rc %x\n", 7574 rc); 7575 } else { 7576 lpfc_sli_brdrestart(phba); 7577 lpfc_online(phba); 7578 lpfc_unblock_mgmt_io(phba); 7579 } 7580 } 7581 7582 /** 7583 * lpfc_sli_sriov_nr_virtfn_get - Get the number of sr-iov virtual functions 7584 * @phba: pointer to lpfc hba data structure. 7585 * 7586 * This function enables the PCI SR-IOV virtual functions to a physical 7587 * function. It invokes the PCI SR-IOV api with the @nr_vfn provided to 7588 * enable the number of virtual functions to the physical function. As 7589 * not all devices support SR-IOV, the return code from the pci_enable_sriov() 7590 * API call does not considered as an error condition for most of the device. 7591 **/ 7592 uint16_t 7593 lpfc_sli_sriov_nr_virtfn_get(struct lpfc_hba *phba) 7594 { 7595 struct pci_dev *pdev = phba->pcidev; 7596 uint16_t nr_virtfn; 7597 int pos; 7598 7599 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV); 7600 if (pos == 0) 7601 return 0; 7602 7603 pci_read_config_word(pdev, pos + PCI_SRIOV_TOTAL_VF, &nr_virtfn); 7604 return nr_virtfn; 7605 } 7606 7607 /** 7608 * lpfc_sli_probe_sriov_nr_virtfn - Enable a number of sr-iov virtual functions 7609 * @phba: pointer to lpfc hba data structure. 7610 * @nr_vfn: number of virtual functions to be enabled. 7611 * 7612 * This function enables the PCI SR-IOV virtual functions to a physical 7613 * function. It invokes the PCI SR-IOV api with the @nr_vfn provided to 7614 * enable the number of virtual functions to the physical function. As 7615 * not all devices support SR-IOV, the return code from the pci_enable_sriov() 7616 * API call does not considered as an error condition for most of the device. 7617 **/ 7618 int 7619 lpfc_sli_probe_sriov_nr_virtfn(struct lpfc_hba *phba, int nr_vfn) 7620 { 7621 struct pci_dev *pdev = phba->pcidev; 7622 uint16_t max_nr_vfn; 7623 int rc; 7624 7625 max_nr_vfn = lpfc_sli_sriov_nr_virtfn_get(phba); 7626 if (nr_vfn > max_nr_vfn) { 7627 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 7628 "3057 Requested vfs (%d) greater than " 7629 "supported vfs (%d)", nr_vfn, max_nr_vfn); 7630 return -EINVAL; 7631 } 7632 7633 rc = pci_enable_sriov(pdev, nr_vfn); 7634 if (rc) { 7635 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 7636 "2806 Failed to enable sriov on this device " 7637 "with vfn number nr_vf:%d, rc:%d\n", 7638 nr_vfn, rc); 7639 } else 7640 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 7641 "2807 Successful enable sriov on this device " 7642 "with vfn number nr_vf:%d\n", nr_vfn); 7643 return rc; 7644 } 7645 7646 static void 7647 lpfc_unblock_requests_work(struct work_struct *work) 7648 { 7649 struct lpfc_hba *phba = container_of(work, struct lpfc_hba, 7650 unblock_request_work); 7651 7652 lpfc_unblock_requests(phba); 7653 } 7654 7655 /** 7656 * lpfc_setup_driver_resource_phase1 - Phase1 etup driver internal resources. 7657 * @phba: pointer to lpfc hba data structure. 7658 * 7659 * This routine is invoked to set up the driver internal resources before the 7660 * device specific resource setup to support the HBA device it attached to. 7661 * 7662 * Return codes 7663 * 0 - successful 7664 * other values - error 7665 **/ 7666 static int 7667 lpfc_setup_driver_resource_phase1(struct lpfc_hba *phba) 7668 { 7669 struct lpfc_sli *psli = &phba->sli; 7670 7671 /* 7672 * Driver resources common to all SLI revisions 7673 */ 7674 atomic_set(&phba->fast_event_count, 0); 7675 atomic_set(&phba->dbg_log_idx, 0); 7676 atomic_set(&phba->dbg_log_cnt, 0); 7677 atomic_set(&phba->dbg_log_dmping, 0); 7678 spin_lock_init(&phba->hbalock); 7679 7680 /* Initialize port_list spinlock */ 7681 spin_lock_init(&phba->port_list_lock); 7682 INIT_LIST_HEAD(&phba->port_list); 7683 7684 INIT_LIST_HEAD(&phba->work_list); 7685 7686 /* Initialize the wait queue head for the kernel thread */ 7687 init_waitqueue_head(&phba->work_waitq); 7688 7689 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 7690 "1403 Protocols supported %s %s %s\n", 7691 ((phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) ? 7692 "SCSI" : " "), 7693 ((phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) ? 7694 "NVME" : " "), 7695 (phba->nvmet_support ? "NVMET" : " ")); 7696 7697 /* ras_fwlog state */ 7698 spin_lock_init(&phba->ras_fwlog_lock); 7699 7700 /* Initialize the IO buffer list used by driver for SLI3 SCSI */ 7701 spin_lock_init(&phba->scsi_buf_list_get_lock); 7702 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_get); 7703 spin_lock_init(&phba->scsi_buf_list_put_lock); 7704 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_put); 7705 7706 /* Initialize the fabric iocb list */ 7707 INIT_LIST_HEAD(&phba->fabric_iocb_list); 7708 7709 /* Initialize list to save ELS buffers */ 7710 INIT_LIST_HEAD(&phba->elsbuf); 7711 7712 /* Initialize FCF connection rec list */ 7713 INIT_LIST_HEAD(&phba->fcf_conn_rec_list); 7714 7715 /* Initialize OAS configuration list */ 7716 spin_lock_init(&phba->devicelock); 7717 INIT_LIST_HEAD(&phba->luns); 7718 7719 /* MBOX heartbeat timer */ 7720 timer_setup(&psli->mbox_tmo, lpfc_mbox_timeout, 0); 7721 /* Fabric block timer */ 7722 timer_setup(&phba->fabric_block_timer, lpfc_fabric_block_timeout, 0); 7723 /* EA polling mode timer */ 7724 timer_setup(&phba->eratt_poll, lpfc_poll_eratt, 0); 7725 /* Heartbeat timer */ 7726 timer_setup(&phba->hb_tmofunc, lpfc_hb_timeout, 0); 7727 7728 INIT_DELAYED_WORK(&phba->eq_delay_work, lpfc_hb_eq_delay_work); 7729 7730 INIT_DELAYED_WORK(&phba->idle_stat_delay_work, 7731 lpfc_idle_stat_delay_work); 7732 INIT_WORK(&phba->unblock_request_work, lpfc_unblock_requests_work); 7733 return 0; 7734 } 7735 7736 /** 7737 * lpfc_sli_driver_resource_setup - Setup driver internal resources for SLI3 dev 7738 * @phba: pointer to lpfc hba data structure. 7739 * 7740 * This routine is invoked to set up the driver internal resources specific to 7741 * support the SLI-3 HBA device it attached to. 7742 * 7743 * Return codes 7744 * 0 - successful 7745 * other values - error 7746 **/ 7747 static int 7748 lpfc_sli_driver_resource_setup(struct lpfc_hba *phba) 7749 { 7750 int rc, entry_sz; 7751 7752 /* 7753 * Initialize timers used by driver 7754 */ 7755 7756 /* FCP polling mode timer */ 7757 timer_setup(&phba->fcp_poll_timer, lpfc_poll_timeout, 0); 7758 7759 /* Host attention work mask setup */ 7760 phba->work_ha_mask = (HA_ERATT | HA_MBATT | HA_LATT); 7761 phba->work_ha_mask |= (HA_RXMASK << (LPFC_ELS_RING * 4)); 7762 7763 /* Get all the module params for configuring this host */ 7764 lpfc_get_cfgparam(phba); 7765 /* Set up phase-1 common device driver resources */ 7766 7767 rc = lpfc_setup_driver_resource_phase1(phba); 7768 if (rc) 7769 return -ENODEV; 7770 7771 if (!phba->sli.sli3_ring) 7772 phba->sli.sli3_ring = kcalloc(LPFC_SLI3_MAX_RING, 7773 sizeof(struct lpfc_sli_ring), 7774 GFP_KERNEL); 7775 if (!phba->sli.sli3_ring) 7776 return -ENOMEM; 7777 7778 /* 7779 * Since lpfc_sg_seg_cnt is module parameter, the sg_dma_buf_size 7780 * used to create the sg_dma_buf_pool must be dynamically calculated. 7781 */ 7782 7783 if (phba->sli_rev == LPFC_SLI_REV4) 7784 entry_sz = sizeof(struct sli4_sge); 7785 else 7786 entry_sz = sizeof(struct ulp_bde64); 7787 7788 /* There are going to be 2 reserved BDEs: 1 FCP cmnd + 1 FCP rsp */ 7789 if (phba->cfg_enable_bg) { 7790 /* 7791 * The scsi_buf for a T10-DIF I/O will hold the FCP cmnd, 7792 * the FCP rsp, and a BDE for each. Sice we have no control 7793 * over how many protection data segments the SCSI Layer 7794 * will hand us (ie: there could be one for every block 7795 * in the IO), we just allocate enough BDEs to accomidate 7796 * our max amount and we need to limit lpfc_sg_seg_cnt to 7797 * minimize the risk of running out. 7798 */ 7799 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) + 7800 sizeof(struct fcp_rsp) + 7801 (LPFC_MAX_SG_SEG_CNT * entry_sz); 7802 7803 if (phba->cfg_sg_seg_cnt > LPFC_MAX_SG_SEG_CNT_DIF) 7804 phba->cfg_sg_seg_cnt = LPFC_MAX_SG_SEG_CNT_DIF; 7805 7806 /* Total BDEs in BPL for scsi_sg_list and scsi_sg_prot_list */ 7807 phba->cfg_total_seg_cnt = LPFC_MAX_SG_SEG_CNT; 7808 } else { 7809 /* 7810 * The scsi_buf for a regular I/O will hold the FCP cmnd, 7811 * the FCP rsp, a BDE for each, and a BDE for up to 7812 * cfg_sg_seg_cnt data segments. 7813 */ 7814 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) + 7815 sizeof(struct fcp_rsp) + 7816 ((phba->cfg_sg_seg_cnt + 2) * entry_sz); 7817 7818 /* Total BDEs in BPL for scsi_sg_list */ 7819 phba->cfg_total_seg_cnt = phba->cfg_sg_seg_cnt + 2; 7820 } 7821 7822 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP, 7823 "9088 INIT sg_tablesize:%d dmabuf_size:%d total_bde:%d\n", 7824 phba->cfg_sg_seg_cnt, phba->cfg_sg_dma_buf_size, 7825 phba->cfg_total_seg_cnt); 7826 7827 phba->max_vpi = LPFC_MAX_VPI; 7828 /* This will be set to correct value after config_port mbox */ 7829 phba->max_vports = 0; 7830 7831 /* 7832 * Initialize the SLI Layer to run with lpfc HBAs. 7833 */ 7834 lpfc_sli_setup(phba); 7835 lpfc_sli_queue_init(phba); 7836 7837 /* Allocate device driver memory */ 7838 if (lpfc_mem_alloc(phba, BPL_ALIGN_SZ)) 7839 return -ENOMEM; 7840 7841 phba->lpfc_sg_dma_buf_pool = 7842 dma_pool_create("lpfc_sg_dma_buf_pool", 7843 &phba->pcidev->dev, phba->cfg_sg_dma_buf_size, 7844 BPL_ALIGN_SZ, 0); 7845 7846 if (!phba->lpfc_sg_dma_buf_pool) 7847 goto fail_free_mem; 7848 7849 phba->lpfc_cmd_rsp_buf_pool = 7850 dma_pool_create("lpfc_cmd_rsp_buf_pool", 7851 &phba->pcidev->dev, 7852 sizeof(struct fcp_cmnd) + 7853 sizeof(struct fcp_rsp), 7854 BPL_ALIGN_SZ, 0); 7855 7856 if (!phba->lpfc_cmd_rsp_buf_pool) 7857 goto fail_free_dma_buf_pool; 7858 7859 /* 7860 * Enable sr-iov virtual functions if supported and configured 7861 * through the module parameter. 7862 */ 7863 if (phba->cfg_sriov_nr_virtfn > 0) { 7864 rc = lpfc_sli_probe_sriov_nr_virtfn(phba, 7865 phba->cfg_sriov_nr_virtfn); 7866 if (rc) { 7867 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 7868 "2808 Requested number of SR-IOV " 7869 "virtual functions (%d) is not " 7870 "supported\n", 7871 phba->cfg_sriov_nr_virtfn); 7872 phba->cfg_sriov_nr_virtfn = 0; 7873 } 7874 } 7875 7876 return 0; 7877 7878 fail_free_dma_buf_pool: 7879 dma_pool_destroy(phba->lpfc_sg_dma_buf_pool); 7880 phba->lpfc_sg_dma_buf_pool = NULL; 7881 fail_free_mem: 7882 lpfc_mem_free(phba); 7883 return -ENOMEM; 7884 } 7885 7886 /** 7887 * lpfc_sli_driver_resource_unset - Unset drvr internal resources for SLI3 dev 7888 * @phba: pointer to lpfc hba data structure. 7889 * 7890 * This routine is invoked to unset the driver internal resources set up 7891 * specific for supporting the SLI-3 HBA device it attached to. 7892 **/ 7893 static void 7894 lpfc_sli_driver_resource_unset(struct lpfc_hba *phba) 7895 { 7896 /* Free device driver memory allocated */ 7897 lpfc_mem_free_all(phba); 7898 7899 return; 7900 } 7901 7902 /** 7903 * lpfc_sli4_driver_resource_setup - Setup drvr internal resources for SLI4 dev 7904 * @phba: pointer to lpfc hba data structure. 7905 * 7906 * This routine is invoked to set up the driver internal resources specific to 7907 * support the SLI-4 HBA device it attached to. 7908 * 7909 * Return codes 7910 * 0 - successful 7911 * other values - error 7912 **/ 7913 static int 7914 lpfc_sli4_driver_resource_setup(struct lpfc_hba *phba) 7915 { 7916 LPFC_MBOXQ_t *mboxq; 7917 MAILBOX_t *mb; 7918 int rc, i, max_buf_size; 7919 int longs; 7920 int extra; 7921 uint64_t wwn; 7922 u32 if_type; 7923 u32 if_fam; 7924 7925 phba->sli4_hba.num_present_cpu = lpfc_present_cpu; 7926 phba->sli4_hba.num_possible_cpu = cpumask_last(cpu_possible_mask) + 1; 7927 phba->sli4_hba.curr_disp_cpu = 0; 7928 7929 /* Get all the module params for configuring this host */ 7930 lpfc_get_cfgparam(phba); 7931 7932 /* Set up phase-1 common device driver resources */ 7933 rc = lpfc_setup_driver_resource_phase1(phba); 7934 if (rc) 7935 return -ENODEV; 7936 7937 /* Before proceed, wait for POST done and device ready */ 7938 rc = lpfc_sli4_post_status_check(phba); 7939 if (rc) 7940 return -ENODEV; 7941 7942 /* Allocate all driver workqueues here */ 7943 7944 /* The lpfc_wq workqueue for deferred irq use */ 7945 phba->wq = alloc_workqueue("lpfc_wq", WQ_MEM_RECLAIM, 0); 7946 if (!phba->wq) 7947 return -ENOMEM; 7948 7949 /* 7950 * Initialize timers used by driver 7951 */ 7952 7953 timer_setup(&phba->rrq_tmr, lpfc_rrq_timeout, 0); 7954 7955 /* FCF rediscover timer */ 7956 timer_setup(&phba->fcf.redisc_wait, lpfc_sli4_fcf_redisc_wait_tmo, 0); 7957 7958 /* CMF congestion timer */ 7959 hrtimer_setup(&phba->cmf_timer, lpfc_cmf_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); 7960 /* CMF 1 minute stats collection timer */ 7961 hrtimer_setup(&phba->cmf_stats_timer, lpfc_cmf_stats_timer, CLOCK_MONOTONIC, 7962 HRTIMER_MODE_REL); 7963 7964 /* 7965 * Control structure for handling external multi-buffer mailbox 7966 * command pass-through. 7967 */ 7968 memset((uint8_t *)&phba->mbox_ext_buf_ctx, 0, 7969 sizeof(struct lpfc_mbox_ext_buf_ctx)); 7970 INIT_LIST_HEAD(&phba->mbox_ext_buf_ctx.ext_dmabuf_list); 7971 7972 phba->max_vpi = LPFC_MAX_VPI; 7973 7974 /* This will be set to correct value after the read_config mbox */ 7975 phba->max_vports = 0; 7976 7977 /* Program the default value of vlan_id and fc_map */ 7978 phba->valid_vlan = 0; 7979 phba->fc_map[0] = LPFC_FCOE_FCF_MAP0; 7980 phba->fc_map[1] = LPFC_FCOE_FCF_MAP1; 7981 phba->fc_map[2] = LPFC_FCOE_FCF_MAP2; 7982 7983 /* 7984 * For SLI4, instead of using ring 0 (LPFC_FCP_RING) for FCP commands 7985 * we will associate a new ring, for each EQ/CQ/WQ tuple. 7986 * The WQ create will allocate the ring. 7987 */ 7988 7989 /* Initialize buffer queue management fields */ 7990 INIT_LIST_HEAD(&phba->hbqs[LPFC_ELS_HBQ].hbq_buffer_list); 7991 phba->hbqs[LPFC_ELS_HBQ].hbq_alloc_buffer = lpfc_sli4_rb_alloc; 7992 phba->hbqs[LPFC_ELS_HBQ].hbq_free_buffer = lpfc_sli4_rb_free; 7993 7994 /* for VMID idle timeout if VMID is enabled */ 7995 if (lpfc_is_vmid_enabled(phba)) 7996 timer_setup(&phba->inactive_vmid_poll, lpfc_vmid_poll, 0); 7997 7998 /* 7999 * Initialize the SLI Layer to run with lpfc SLI4 HBAs. 8000 */ 8001 /* Initialize the Abort buffer list used by driver */ 8002 spin_lock_init(&phba->sli4_hba.abts_io_buf_list_lock); 8003 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_io_buf_list); 8004 8005 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 8006 /* Initialize the Abort nvme buffer list used by driver */ 8007 spin_lock_init(&phba->sli4_hba.abts_nvmet_buf_list_lock); 8008 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list); 8009 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_nvmet_io_wait_list); 8010 spin_lock_init(&phba->sli4_hba.t_active_list_lock); 8011 INIT_LIST_HEAD(&phba->sli4_hba.t_active_ctx_list); 8012 } 8013 8014 /* This abort list used by worker thread */ 8015 spin_lock_init(&phba->sli4_hba.sgl_list_lock); 8016 spin_lock_init(&phba->sli4_hba.nvmet_io_wait_lock); 8017 spin_lock_init(&phba->sli4_hba.asynce_list_lock); 8018 spin_lock_init(&phba->sli4_hba.els_xri_abrt_list_lock); 8019 8020 /* 8021 * Initialize driver internal slow-path work queues 8022 */ 8023 8024 /* Driver internel slow-path CQ Event pool */ 8025 INIT_LIST_HEAD(&phba->sli4_hba.sp_cqe_event_pool); 8026 /* Response IOCB work queue list */ 8027 INIT_LIST_HEAD(&phba->sli4_hba.sp_queue_event); 8028 /* Asynchronous event CQ Event work queue list */ 8029 INIT_LIST_HEAD(&phba->sli4_hba.sp_asynce_work_queue); 8030 /* Slow-path XRI aborted CQ Event work queue list */ 8031 INIT_LIST_HEAD(&phba->sli4_hba.sp_els_xri_aborted_work_queue); 8032 /* Receive queue CQ Event work queue list */ 8033 INIT_LIST_HEAD(&phba->sli4_hba.sp_unsol_work_queue); 8034 8035 /* Initialize extent block lists. */ 8036 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_rpi_blk_list); 8037 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_xri_blk_list); 8038 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_vfi_blk_list); 8039 INIT_LIST_HEAD(&phba->lpfc_vpi_blk_list); 8040 8041 /* Initialize mboxq lists. If the early init routines fail 8042 * these lists need to be correctly initialized. 8043 */ 8044 INIT_LIST_HEAD(&phba->sli.mboxq); 8045 INIT_LIST_HEAD(&phba->sli.mboxq_cmpl); 8046 8047 /* initialize optic_state to 0xFF */ 8048 phba->sli4_hba.lnk_info.optic_state = 0xff; 8049 8050 /* Allocate device driver memory */ 8051 rc = lpfc_mem_alloc(phba, SGL_ALIGN_SZ); 8052 if (rc) 8053 goto out_destroy_workqueue; 8054 8055 /* IF Type 2 ports get initialized now. */ 8056 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) >= 8057 LPFC_SLI_INTF_IF_TYPE_2) { 8058 rc = lpfc_pci_function_reset(phba); 8059 if (unlikely(rc)) { 8060 rc = -ENODEV; 8061 goto out_free_mem; 8062 } 8063 phba->temp_sensor_support = 1; 8064 } 8065 8066 /* Create the bootstrap mailbox command */ 8067 rc = lpfc_create_bootstrap_mbox(phba); 8068 if (unlikely(rc)) 8069 goto out_free_mem; 8070 8071 /* Set up the host's endian order with the device. */ 8072 rc = lpfc_setup_endian_order(phba); 8073 if (unlikely(rc)) 8074 goto out_free_bsmbx; 8075 8076 /* Set up the hba's configuration parameters. */ 8077 rc = lpfc_sli4_read_config(phba); 8078 if (unlikely(rc)) 8079 goto out_free_bsmbx; 8080 8081 if (phba->sli4_hba.fawwpn_flag & LPFC_FAWWPN_CONFIG) { 8082 /* Right now the link is down, if FA-PWWN is configured the 8083 * firmware will try FLOGI before the driver gets a link up. 8084 * If it fails, the driver should get a MISCONFIGURED async 8085 * event which will clear this flag. The only notification 8086 * the driver gets is if it fails, if it succeeds there is no 8087 * notification given. Assume success. 8088 */ 8089 phba->sli4_hba.fawwpn_flag |= LPFC_FAWWPN_FABRIC; 8090 } 8091 8092 rc = lpfc_mem_alloc_active_rrq_pool_s4(phba); 8093 if (unlikely(rc)) 8094 goto out_free_bsmbx; 8095 8096 /* IF Type 0 ports get initialized now. */ 8097 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) == 8098 LPFC_SLI_INTF_IF_TYPE_0) { 8099 rc = lpfc_pci_function_reset(phba); 8100 if (unlikely(rc)) 8101 goto out_free_bsmbx; 8102 } 8103 8104 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, 8105 GFP_KERNEL); 8106 if (!mboxq) { 8107 rc = -ENOMEM; 8108 goto out_free_bsmbx; 8109 } 8110 8111 /* Check for NVMET being configured */ 8112 phba->nvmet_support = 0; 8113 if (lpfc_enable_nvmet_cnt) { 8114 8115 /* First get WWN of HBA instance */ 8116 lpfc_read_nv(phba, mboxq); 8117 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); 8118 if (rc != MBX_SUCCESS) { 8119 lpfc_printf_log(phba, KERN_ERR, 8120 LOG_TRACE_EVENT, 8121 "6016 Mailbox failed , mbxCmd x%x " 8122 "READ_NV, mbxStatus x%x\n", 8123 bf_get(lpfc_mqe_command, &mboxq->u.mqe), 8124 bf_get(lpfc_mqe_status, &mboxq->u.mqe)); 8125 mempool_free(mboxq, phba->mbox_mem_pool); 8126 rc = -EIO; 8127 goto out_free_bsmbx; 8128 } 8129 mb = &mboxq->u.mb; 8130 memcpy(&wwn, (char *)mb->un.varRDnvp.nodename, 8131 sizeof(uint64_t)); 8132 wwn = cpu_to_be64(wwn); 8133 phba->sli4_hba.wwnn.u.name = wwn; 8134 memcpy(&wwn, (char *)mb->un.varRDnvp.portname, 8135 sizeof(uint64_t)); 8136 /* wwn is WWPN of HBA instance */ 8137 wwn = cpu_to_be64(wwn); 8138 phba->sli4_hba.wwpn.u.name = wwn; 8139 8140 /* Check to see if it matches any module parameter */ 8141 for (i = 0; i < lpfc_enable_nvmet_cnt; i++) { 8142 if (wwn == lpfc_enable_nvmet[i]) { 8143 #if (IS_ENABLED(CONFIG_NVME_TARGET_FC)) 8144 if (lpfc_nvmet_mem_alloc(phba)) 8145 break; 8146 8147 phba->nvmet_support = 1; /* a match */ 8148 8149 lpfc_printf_log(phba, KERN_ERR, 8150 LOG_TRACE_EVENT, 8151 "6017 NVME Target %016llx\n", 8152 wwn); 8153 #else 8154 lpfc_printf_log(phba, KERN_ERR, 8155 LOG_TRACE_EVENT, 8156 "6021 Can't enable NVME Target." 8157 " NVME_TARGET_FC infrastructure" 8158 " is not in kernel\n"); 8159 #endif 8160 /* Not supported for NVMET */ 8161 phba->cfg_xri_rebalancing = 0; 8162 if (phba->irq_chann_mode == NHT_MODE) { 8163 phba->cfg_irq_chann = 8164 phba->sli4_hba.num_present_cpu; 8165 phba->cfg_hdw_queue = 8166 phba->sli4_hba.num_present_cpu; 8167 phba->irq_chann_mode = NORMAL_MODE; 8168 } 8169 break; 8170 } 8171 } 8172 } 8173 8174 lpfc_nvme_mod_param_dep(phba); 8175 8176 /* 8177 * Get sli4 parameters that override parameters from Port capabilities. 8178 * If this call fails, it isn't critical unless the SLI4 parameters come 8179 * back in conflict. 8180 */ 8181 rc = lpfc_get_sli4_parameters(phba, mboxq); 8182 if (rc) { 8183 if_type = bf_get(lpfc_sli_intf_if_type, 8184 &phba->sli4_hba.sli_intf); 8185 if_fam = bf_get(lpfc_sli_intf_sli_family, 8186 &phba->sli4_hba.sli_intf); 8187 if (phba->sli4_hba.extents_in_use && 8188 phba->sli4_hba.rpi_hdrs_in_use) { 8189 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 8190 "2999 Unsupported SLI4 Parameters " 8191 "Extents and RPI headers enabled.\n"); 8192 if (if_type == LPFC_SLI_INTF_IF_TYPE_0 && 8193 if_fam == LPFC_SLI_INTF_FAMILY_BE2) { 8194 mempool_free(mboxq, phba->mbox_mem_pool); 8195 rc = -EIO; 8196 goto out_free_bsmbx; 8197 } 8198 } 8199 if (!(if_type == LPFC_SLI_INTF_IF_TYPE_0 && 8200 if_fam == LPFC_SLI_INTF_FAMILY_BE2)) { 8201 mempool_free(mboxq, phba->mbox_mem_pool); 8202 rc = -EIO; 8203 goto out_free_bsmbx; 8204 } 8205 } 8206 8207 /* 8208 * 1 for cmd, 1 for rsp, NVME adds an extra one 8209 * for boundary conditions in its max_sgl_segment template. 8210 */ 8211 extra = 2; 8212 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) 8213 extra++; 8214 8215 /* 8216 * It doesn't matter what family our adapter is in, we are 8217 * limited to 2 Pages, 512 SGEs, for our SGL. 8218 * There are going to be 2 reserved SGEs: 1 FCP cmnd + 1 FCP rsp 8219 */ 8220 max_buf_size = (2 * SLI4_PAGE_SIZE); 8221 8222 /* 8223 * Since lpfc_sg_seg_cnt is module param, the sg_dma_buf_size 8224 * used to create the sg_dma_buf_pool must be calculated. 8225 */ 8226 if (phba->sli3_options & LPFC_SLI3_BG_ENABLED) { 8227 /* Both cfg_enable_bg and cfg_external_dif code paths */ 8228 8229 /* 8230 * The scsi_buf for a T10-DIF I/O holds the FCP cmnd, 8231 * the FCP rsp, and a SGE. Sice we have no control 8232 * over how many protection segments the SCSI Layer 8233 * will hand us (ie: there could be one for every block 8234 * in the IO), just allocate enough SGEs to accomidate 8235 * our max amount and we need to limit lpfc_sg_seg_cnt 8236 * to minimize the risk of running out. 8237 */ 8238 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd32) + 8239 sizeof(struct fcp_rsp) + max_buf_size; 8240 8241 /* Total SGEs for scsi_sg_list and scsi_sg_prot_list */ 8242 phba->cfg_total_seg_cnt = LPFC_MAX_SGL_SEG_CNT; 8243 8244 /* 8245 * If supporting DIF, reduce the seg count for scsi to 8246 * allow room for the DIF sges. 8247 */ 8248 if (phba->cfg_enable_bg && 8249 phba->cfg_sg_seg_cnt > LPFC_MAX_BG_SLI4_SEG_CNT_DIF) 8250 phba->cfg_scsi_seg_cnt = LPFC_MAX_BG_SLI4_SEG_CNT_DIF; 8251 else 8252 phba->cfg_scsi_seg_cnt = phba->cfg_sg_seg_cnt; 8253 8254 } else { 8255 /* 8256 * The scsi_buf for a regular I/O holds the FCP cmnd, 8257 * the FCP rsp, a SGE for each, and a SGE for up to 8258 * cfg_sg_seg_cnt data segments. 8259 */ 8260 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd32) + 8261 sizeof(struct fcp_rsp) + 8262 ((phba->cfg_sg_seg_cnt + extra) * 8263 sizeof(struct sli4_sge)); 8264 8265 /* Total SGEs for scsi_sg_list */ 8266 phba->cfg_total_seg_cnt = phba->cfg_sg_seg_cnt + extra; 8267 phba->cfg_scsi_seg_cnt = phba->cfg_sg_seg_cnt; 8268 8269 /* 8270 * NOTE: if (phba->cfg_sg_seg_cnt + extra) <= 256 we only 8271 * need to post 1 page for the SGL. 8272 */ 8273 } 8274 8275 if (phba->cfg_xpsgl && !phba->nvmet_support) 8276 phba->cfg_sg_dma_buf_size = LPFC_DEFAULT_XPSGL_SIZE; 8277 else if (phba->cfg_sg_dma_buf_size <= LPFC_MIN_SG_SLI4_BUF_SZ) 8278 phba->cfg_sg_dma_buf_size = LPFC_MIN_SG_SLI4_BUF_SZ; 8279 else 8280 phba->cfg_sg_dma_buf_size = 8281 SLI4_PAGE_ALIGN(phba->cfg_sg_dma_buf_size); 8282 8283 phba->border_sge_num = phba->cfg_sg_dma_buf_size / 8284 sizeof(struct sli4_sge); 8285 8286 /* Limit to LPFC_MAX_NVME_SEG_CNT for NVME. */ 8287 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 8288 if (phba->cfg_sg_seg_cnt > LPFC_MAX_NVME_SEG_CNT) { 8289 lpfc_printf_log(phba, KERN_INFO, LOG_NVME | LOG_INIT, 8290 "6300 Reducing NVME sg segment " 8291 "cnt to %d\n", 8292 LPFC_MAX_NVME_SEG_CNT); 8293 phba->cfg_nvme_seg_cnt = LPFC_MAX_NVME_SEG_CNT; 8294 } else 8295 phba->cfg_nvme_seg_cnt = phba->cfg_sg_seg_cnt; 8296 } 8297 8298 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP, 8299 "9087 sg_seg_cnt:%d dmabuf_size:%d " 8300 "total:%d scsi:%d nvme:%d\n", 8301 phba->cfg_sg_seg_cnt, phba->cfg_sg_dma_buf_size, 8302 phba->cfg_total_seg_cnt, phba->cfg_scsi_seg_cnt, 8303 phba->cfg_nvme_seg_cnt); 8304 8305 if (phba->cfg_sg_dma_buf_size < SLI4_PAGE_SIZE) 8306 i = phba->cfg_sg_dma_buf_size; 8307 else 8308 i = SLI4_PAGE_SIZE; 8309 8310 phba->lpfc_sg_dma_buf_pool = 8311 dma_pool_create("lpfc_sg_dma_buf_pool", 8312 &phba->pcidev->dev, 8313 phba->cfg_sg_dma_buf_size, 8314 i, 0); 8315 if (!phba->lpfc_sg_dma_buf_pool) { 8316 rc = -ENOMEM; 8317 goto out_free_bsmbx; 8318 } 8319 8320 phba->lpfc_cmd_rsp_buf_pool = 8321 dma_pool_create("lpfc_cmd_rsp_buf_pool", 8322 &phba->pcidev->dev, 8323 sizeof(struct fcp_cmnd32) + 8324 sizeof(struct fcp_rsp), 8325 i, 0); 8326 if (!phba->lpfc_cmd_rsp_buf_pool) { 8327 rc = -ENOMEM; 8328 goto out_free_sg_dma_buf; 8329 } 8330 8331 mempool_free(mboxq, phba->mbox_mem_pool); 8332 8333 /* Verify OAS is supported */ 8334 lpfc_sli4_oas_verify(phba); 8335 8336 /* Verify RAS support on adapter */ 8337 lpfc_sli4_ras_init(phba); 8338 8339 /* Verify all the SLI4 queues */ 8340 rc = lpfc_sli4_queue_verify(phba); 8341 if (rc) 8342 goto out_free_cmd_rsp_buf; 8343 8344 /* Create driver internal CQE event pool */ 8345 rc = lpfc_sli4_cq_event_pool_create(phba); 8346 if (rc) 8347 goto out_free_cmd_rsp_buf; 8348 8349 /* Initialize sgl lists per host */ 8350 lpfc_init_sgl_list(phba); 8351 8352 /* Allocate and initialize active sgl array */ 8353 rc = lpfc_init_active_sgl_array(phba); 8354 if (rc) { 8355 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 8356 "1430 Failed to initialize sgl list.\n"); 8357 goto out_destroy_cq_event_pool; 8358 } 8359 rc = lpfc_sli4_init_rpi_hdrs(phba); 8360 if (rc) { 8361 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 8362 "1432 Failed to initialize rpi headers.\n"); 8363 goto out_free_active_sgl; 8364 } 8365 8366 /* Allocate eligible FCF bmask memory for FCF roundrobin failover */ 8367 longs = (LPFC_SLI4_FCF_TBL_INDX_MAX + BITS_PER_LONG - 1)/BITS_PER_LONG; 8368 phba->fcf.fcf_rr_bmask = kcalloc(longs, sizeof(unsigned long), 8369 GFP_KERNEL); 8370 if (!phba->fcf.fcf_rr_bmask) { 8371 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 8372 "2759 Failed allocate memory for FCF round " 8373 "robin failover bmask\n"); 8374 rc = -ENOMEM; 8375 goto out_remove_rpi_hdrs; 8376 } 8377 8378 phba->sli4_hba.hba_eq_hdl = kcalloc(phba->cfg_irq_chann, 8379 sizeof(struct lpfc_hba_eq_hdl), 8380 GFP_KERNEL); 8381 if (!phba->sli4_hba.hba_eq_hdl) { 8382 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 8383 "2572 Failed allocate memory for " 8384 "fast-path per-EQ handle array\n"); 8385 rc = -ENOMEM; 8386 goto out_free_fcf_rr_bmask; 8387 } 8388 8389 phba->sli4_hba.cpu_map = kcalloc(phba->sli4_hba.num_possible_cpu, 8390 sizeof(struct lpfc_vector_map_info), 8391 GFP_KERNEL); 8392 if (!phba->sli4_hba.cpu_map) { 8393 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 8394 "3327 Failed allocate memory for msi-x " 8395 "interrupt vector mapping\n"); 8396 rc = -ENOMEM; 8397 goto out_free_hba_eq_hdl; 8398 } 8399 8400 phba->sli4_hba.eq_info = alloc_percpu(struct lpfc_eq_intr_info); 8401 if (!phba->sli4_hba.eq_info) { 8402 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 8403 "3321 Failed allocation for per_cpu stats\n"); 8404 rc = -ENOMEM; 8405 goto out_free_hba_cpu_map; 8406 } 8407 8408 phba->sli4_hba.idle_stat = kcalloc(phba->sli4_hba.num_possible_cpu, 8409 sizeof(*phba->sli4_hba.idle_stat), 8410 GFP_KERNEL); 8411 if (!phba->sli4_hba.idle_stat) { 8412 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 8413 "3390 Failed allocation for idle_stat\n"); 8414 rc = -ENOMEM; 8415 goto out_free_hba_eq_info; 8416 } 8417 8418 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS 8419 phba->sli4_hba.c_stat = alloc_percpu(struct lpfc_hdwq_stat); 8420 if (!phba->sli4_hba.c_stat) { 8421 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 8422 "3332 Failed allocating per cpu hdwq stats\n"); 8423 rc = -ENOMEM; 8424 goto out_free_hba_idle_stat; 8425 } 8426 #endif 8427 8428 phba->cmf_stat = alloc_percpu(struct lpfc_cgn_stat); 8429 if (!phba->cmf_stat) { 8430 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 8431 "3331 Failed allocating per cpu cgn stats\n"); 8432 rc = -ENOMEM; 8433 goto out_free_hba_hdwq_info; 8434 } 8435 8436 /* 8437 * Enable sr-iov virtual functions if supported and configured 8438 * through the module parameter. 8439 */ 8440 if (phba->cfg_sriov_nr_virtfn > 0) { 8441 rc = lpfc_sli_probe_sriov_nr_virtfn(phba, 8442 phba->cfg_sriov_nr_virtfn); 8443 if (rc) { 8444 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 8445 "3020 Requested number of SR-IOV " 8446 "virtual functions (%d) is not " 8447 "supported\n", 8448 phba->cfg_sriov_nr_virtfn); 8449 phba->cfg_sriov_nr_virtfn = 0; 8450 } 8451 } 8452 8453 return 0; 8454 8455 out_free_hba_hdwq_info: 8456 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS 8457 free_percpu(phba->sli4_hba.c_stat); 8458 out_free_hba_idle_stat: 8459 #endif 8460 kfree(phba->sli4_hba.idle_stat); 8461 out_free_hba_eq_info: 8462 free_percpu(phba->sli4_hba.eq_info); 8463 out_free_hba_cpu_map: 8464 kfree(phba->sli4_hba.cpu_map); 8465 out_free_hba_eq_hdl: 8466 kfree(phba->sli4_hba.hba_eq_hdl); 8467 out_free_fcf_rr_bmask: 8468 kfree(phba->fcf.fcf_rr_bmask); 8469 out_remove_rpi_hdrs: 8470 lpfc_sli4_remove_rpi_hdrs(phba); 8471 out_free_active_sgl: 8472 lpfc_free_active_sgl(phba); 8473 out_destroy_cq_event_pool: 8474 lpfc_sli4_cq_event_pool_destroy(phba); 8475 out_free_cmd_rsp_buf: 8476 dma_pool_destroy(phba->lpfc_cmd_rsp_buf_pool); 8477 phba->lpfc_cmd_rsp_buf_pool = NULL; 8478 out_free_sg_dma_buf: 8479 dma_pool_destroy(phba->lpfc_sg_dma_buf_pool); 8480 phba->lpfc_sg_dma_buf_pool = NULL; 8481 out_free_bsmbx: 8482 lpfc_destroy_bootstrap_mbox(phba); 8483 out_free_mem: 8484 lpfc_mem_free(phba); 8485 out_destroy_workqueue: 8486 destroy_workqueue(phba->wq); 8487 phba->wq = NULL; 8488 return rc; 8489 } 8490 8491 /** 8492 * lpfc_sli4_driver_resource_unset - Unset drvr internal resources for SLI4 dev 8493 * @phba: pointer to lpfc hba data structure. 8494 * 8495 * This routine is invoked to unset the driver internal resources set up 8496 * specific for supporting the SLI-4 HBA device it attached to. 8497 **/ 8498 static void 8499 lpfc_sli4_driver_resource_unset(struct lpfc_hba *phba) 8500 { 8501 struct lpfc_fcf_conn_entry *conn_entry, *next_conn_entry; 8502 8503 free_percpu(phba->sli4_hba.eq_info); 8504 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS 8505 free_percpu(phba->sli4_hba.c_stat); 8506 #endif 8507 free_percpu(phba->cmf_stat); 8508 kfree(phba->sli4_hba.idle_stat); 8509 8510 /* Free memory allocated for msi-x interrupt vector to CPU mapping */ 8511 kfree(phba->sli4_hba.cpu_map); 8512 phba->sli4_hba.num_possible_cpu = 0; 8513 phba->sli4_hba.num_present_cpu = 0; 8514 phba->sli4_hba.curr_disp_cpu = 0; 8515 cpumask_clear(&phba->sli4_hba.irq_aff_mask); 8516 8517 /* Free memory allocated for fast-path work queue handles */ 8518 kfree(phba->sli4_hba.hba_eq_hdl); 8519 8520 /* Free the allocated rpi headers. */ 8521 lpfc_sli4_remove_rpi_hdrs(phba); 8522 lpfc_sli4_remove_rpis(phba); 8523 8524 /* Free eligible FCF index bmask */ 8525 kfree(phba->fcf.fcf_rr_bmask); 8526 8527 /* Free the ELS sgl list */ 8528 lpfc_free_active_sgl(phba); 8529 lpfc_free_els_sgl_list(phba); 8530 lpfc_free_nvmet_sgl_list(phba); 8531 8532 /* Free the completion queue EQ event pool */ 8533 lpfc_sli4_cq_event_release_all(phba); 8534 lpfc_sli4_cq_event_pool_destroy(phba); 8535 8536 /* Release resource identifiers. */ 8537 lpfc_sli4_dealloc_resource_identifiers(phba); 8538 8539 /* Free the bsmbx region. */ 8540 lpfc_destroy_bootstrap_mbox(phba); 8541 8542 /* Free the SLI Layer memory with SLI4 HBAs */ 8543 lpfc_mem_free_all(phba); 8544 8545 /* Free the current connect table */ 8546 list_for_each_entry_safe(conn_entry, next_conn_entry, 8547 &phba->fcf_conn_rec_list, list) { 8548 list_del_init(&conn_entry->list); 8549 kfree(conn_entry); 8550 } 8551 8552 return; 8553 } 8554 8555 /** 8556 * lpfc_init_api_table_setup - Set up init api function jump table 8557 * @phba: The hba struct for which this call is being executed. 8558 * @dev_grp: The HBA PCI-Device group number. 8559 * 8560 * This routine sets up the device INIT interface API function jump table 8561 * in @phba struct. 8562 * 8563 * Returns: 0 - success, -ENODEV - failure. 8564 **/ 8565 int 8566 lpfc_init_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp) 8567 { 8568 phba->lpfc_hba_init_link = lpfc_hba_init_link; 8569 phba->lpfc_hba_down_link = lpfc_hba_down_link; 8570 phba->lpfc_selective_reset = lpfc_selective_reset; 8571 switch (dev_grp) { 8572 case LPFC_PCI_DEV_LP: 8573 phba->lpfc_hba_down_post = lpfc_hba_down_post_s3; 8574 phba->lpfc_handle_eratt = lpfc_handle_eratt_s3; 8575 phba->lpfc_stop_port = lpfc_stop_port_s3; 8576 break; 8577 case LPFC_PCI_DEV_OC: 8578 phba->lpfc_hba_down_post = lpfc_hba_down_post_s4; 8579 phba->lpfc_handle_eratt = lpfc_handle_eratt_s4; 8580 phba->lpfc_stop_port = lpfc_stop_port_s4; 8581 break; 8582 default: 8583 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 8584 "1431 Invalid HBA PCI-device group: 0x%x\n", 8585 dev_grp); 8586 return -ENODEV; 8587 } 8588 return 0; 8589 } 8590 8591 /** 8592 * lpfc_setup_driver_resource_phase2 - Phase2 setup driver internal resources. 8593 * @phba: pointer to lpfc hba data structure. 8594 * 8595 * This routine is invoked to set up the driver internal resources after the 8596 * device specific resource setup to support the HBA device it attached to. 8597 * 8598 * Return codes 8599 * 0 - successful 8600 * other values - error 8601 **/ 8602 static int 8603 lpfc_setup_driver_resource_phase2(struct lpfc_hba *phba) 8604 { 8605 int error; 8606 8607 /* Startup the kernel thread for this host adapter. */ 8608 phba->worker_thread = kthread_run(lpfc_do_work, phba, 8609 "lpfc_worker_%d", phba->brd_no); 8610 if (IS_ERR(phba->worker_thread)) { 8611 error = PTR_ERR(phba->worker_thread); 8612 return error; 8613 } 8614 8615 return 0; 8616 } 8617 8618 /** 8619 * lpfc_unset_driver_resource_phase2 - Phase2 unset driver internal resources. 8620 * @phba: pointer to lpfc hba data structure. 8621 * 8622 * This routine is invoked to unset the driver internal resources set up after 8623 * the device specific resource setup for supporting the HBA device it 8624 * attached to. 8625 **/ 8626 static void 8627 lpfc_unset_driver_resource_phase2(struct lpfc_hba *phba) 8628 { 8629 if (phba->wq) { 8630 destroy_workqueue(phba->wq); 8631 phba->wq = NULL; 8632 } 8633 8634 /* Stop kernel worker thread */ 8635 if (phba->worker_thread) 8636 kthread_stop(phba->worker_thread); 8637 } 8638 8639 /** 8640 * lpfc_free_iocb_list - Free iocb list. 8641 * @phba: pointer to lpfc hba data structure. 8642 * 8643 * This routine is invoked to free the driver's IOCB list and memory. 8644 **/ 8645 void 8646 lpfc_free_iocb_list(struct lpfc_hba *phba) 8647 { 8648 struct lpfc_iocbq *iocbq_entry = NULL, *iocbq_next = NULL; 8649 8650 spin_lock_irq(&phba->hbalock); 8651 list_for_each_entry_safe(iocbq_entry, iocbq_next, 8652 &phba->lpfc_iocb_list, list) { 8653 list_del(&iocbq_entry->list); 8654 kfree(iocbq_entry); 8655 phba->total_iocbq_bufs--; 8656 } 8657 spin_unlock_irq(&phba->hbalock); 8658 8659 return; 8660 } 8661 8662 /** 8663 * lpfc_init_iocb_list - Allocate and initialize iocb list. 8664 * @phba: pointer to lpfc hba data structure. 8665 * @iocb_count: number of requested iocbs 8666 * 8667 * This routine is invoked to allocate and initizlize the driver's IOCB 8668 * list and set up the IOCB tag array accordingly. 8669 * 8670 * Return codes 8671 * 0 - successful 8672 * other values - error 8673 **/ 8674 int 8675 lpfc_init_iocb_list(struct lpfc_hba *phba, int iocb_count) 8676 { 8677 struct lpfc_iocbq *iocbq_entry = NULL; 8678 uint16_t iotag; 8679 int i; 8680 8681 /* Initialize and populate the iocb list per host. */ 8682 INIT_LIST_HEAD(&phba->lpfc_iocb_list); 8683 for (i = 0; i < iocb_count; i++) { 8684 iocbq_entry = kzalloc(sizeof(struct lpfc_iocbq), GFP_KERNEL); 8685 if (iocbq_entry == NULL) { 8686 printk(KERN_ERR "%s: only allocated %d iocbs of " 8687 "expected %d count. Unloading driver.\n", 8688 __func__, i, iocb_count); 8689 goto out_free_iocbq; 8690 } 8691 8692 iotag = lpfc_sli_next_iotag(phba, iocbq_entry); 8693 if (iotag == 0) { 8694 kfree(iocbq_entry); 8695 printk(KERN_ERR "%s: failed to allocate IOTAG. " 8696 "Unloading driver.\n", __func__); 8697 goto out_free_iocbq; 8698 } 8699 iocbq_entry->sli4_lxritag = NO_XRI; 8700 iocbq_entry->sli4_xritag = NO_XRI; 8701 8702 spin_lock_irq(&phba->hbalock); 8703 list_add(&iocbq_entry->list, &phba->lpfc_iocb_list); 8704 phba->total_iocbq_bufs++; 8705 spin_unlock_irq(&phba->hbalock); 8706 } 8707 8708 return 0; 8709 8710 out_free_iocbq: 8711 lpfc_free_iocb_list(phba); 8712 8713 return -ENOMEM; 8714 } 8715 8716 /** 8717 * lpfc_free_sgl_list - Free a given sgl list. 8718 * @phba: pointer to lpfc hba data structure. 8719 * @sglq_list: pointer to the head of sgl list. 8720 * 8721 * This routine is invoked to free a give sgl list and memory. 8722 **/ 8723 void 8724 lpfc_free_sgl_list(struct lpfc_hba *phba, struct list_head *sglq_list) 8725 { 8726 struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL; 8727 8728 list_for_each_entry_safe(sglq_entry, sglq_next, sglq_list, list) { 8729 list_del(&sglq_entry->list); 8730 lpfc_mbuf_free(phba, sglq_entry->virt, sglq_entry->phys); 8731 kfree(sglq_entry); 8732 } 8733 } 8734 8735 /** 8736 * lpfc_free_els_sgl_list - Free els sgl list. 8737 * @phba: pointer to lpfc hba data structure. 8738 * 8739 * This routine is invoked to free the driver's els sgl list and memory. 8740 **/ 8741 static void 8742 lpfc_free_els_sgl_list(struct lpfc_hba *phba) 8743 { 8744 LIST_HEAD(sglq_list); 8745 8746 /* Retrieve all els sgls from driver list */ 8747 spin_lock_irq(&phba->sli4_hba.sgl_list_lock); 8748 list_splice_init(&phba->sli4_hba.lpfc_els_sgl_list, &sglq_list); 8749 spin_unlock_irq(&phba->sli4_hba.sgl_list_lock); 8750 8751 /* Now free the sgl list */ 8752 lpfc_free_sgl_list(phba, &sglq_list); 8753 } 8754 8755 /** 8756 * lpfc_free_nvmet_sgl_list - Free nvmet sgl list. 8757 * @phba: pointer to lpfc hba data structure. 8758 * 8759 * This routine is invoked to free the driver's nvmet sgl list and memory. 8760 **/ 8761 static void 8762 lpfc_free_nvmet_sgl_list(struct lpfc_hba *phba) 8763 { 8764 struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL; 8765 LIST_HEAD(sglq_list); 8766 8767 /* Retrieve all nvmet sgls from driver list */ 8768 spin_lock_irq(&phba->hbalock); 8769 spin_lock(&phba->sli4_hba.sgl_list_lock); 8770 list_splice_init(&phba->sli4_hba.lpfc_nvmet_sgl_list, &sglq_list); 8771 spin_unlock(&phba->sli4_hba.sgl_list_lock); 8772 spin_unlock_irq(&phba->hbalock); 8773 8774 /* Now free the sgl list */ 8775 list_for_each_entry_safe(sglq_entry, sglq_next, &sglq_list, list) { 8776 list_del(&sglq_entry->list); 8777 lpfc_nvmet_buf_free(phba, sglq_entry->virt, sglq_entry->phys); 8778 kfree(sglq_entry); 8779 } 8780 8781 /* Update the nvmet_xri_cnt to reflect no current sgls. 8782 * The next initialization cycle sets the count and allocates 8783 * the sgls over again. 8784 */ 8785 phba->sli4_hba.nvmet_xri_cnt = 0; 8786 } 8787 8788 /** 8789 * lpfc_init_active_sgl_array - Allocate the buf to track active ELS XRIs. 8790 * @phba: pointer to lpfc hba data structure. 8791 * 8792 * This routine is invoked to allocate the driver's active sgl memory. 8793 * This array will hold the sglq_entry's for active IOs. 8794 **/ 8795 static int 8796 lpfc_init_active_sgl_array(struct lpfc_hba *phba) 8797 { 8798 int size; 8799 size = sizeof(struct lpfc_sglq *); 8800 size *= phba->sli4_hba.max_cfg_param.max_xri; 8801 8802 phba->sli4_hba.lpfc_sglq_active_list = 8803 kzalloc(size, GFP_KERNEL); 8804 if (!phba->sli4_hba.lpfc_sglq_active_list) 8805 return -ENOMEM; 8806 return 0; 8807 } 8808 8809 /** 8810 * lpfc_free_active_sgl - Free the buf that tracks active ELS XRIs. 8811 * @phba: pointer to lpfc hba data structure. 8812 * 8813 * This routine is invoked to walk through the array of active sglq entries 8814 * and free all of the resources. 8815 * This is just a place holder for now. 8816 **/ 8817 static void 8818 lpfc_free_active_sgl(struct lpfc_hba *phba) 8819 { 8820 kfree(phba->sli4_hba.lpfc_sglq_active_list); 8821 } 8822 8823 /** 8824 * lpfc_init_sgl_list - Allocate and initialize sgl list. 8825 * @phba: pointer to lpfc hba data structure. 8826 * 8827 * This routine is invoked to allocate and initizlize the driver's sgl 8828 * list and set up the sgl xritag tag array accordingly. 8829 * 8830 **/ 8831 static void 8832 lpfc_init_sgl_list(struct lpfc_hba *phba) 8833 { 8834 /* Initialize and populate the sglq list per host/VF. */ 8835 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_els_sgl_list); 8836 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_els_sgl_list); 8837 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_nvmet_sgl_list); 8838 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list); 8839 8840 /* els xri-sgl book keeping */ 8841 phba->sli4_hba.els_xri_cnt = 0; 8842 8843 /* nvme xri-buffer book keeping */ 8844 phba->sli4_hba.io_xri_cnt = 0; 8845 } 8846 8847 /** 8848 * lpfc_sli4_init_rpi_hdrs - Post the rpi header memory region to the port 8849 * @phba: pointer to lpfc hba data structure. 8850 * 8851 * This routine is invoked to post rpi header templates to the 8852 * port for those SLI4 ports that do not support extents. This routine 8853 * posts a PAGE_SIZE memory region to the port to hold up to 8854 * PAGE_SIZE modulo 64 rpi context headers. This is an initialization routine 8855 * and should be called only when interrupts are disabled. 8856 * 8857 * Return codes 8858 * 0 - successful 8859 * -ERROR - otherwise. 8860 **/ 8861 int 8862 lpfc_sli4_init_rpi_hdrs(struct lpfc_hba *phba) 8863 { 8864 int rc = 0; 8865 struct lpfc_rpi_hdr *rpi_hdr; 8866 8867 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_rpi_hdr_list); 8868 if (!phba->sli4_hba.rpi_hdrs_in_use) 8869 return rc; 8870 if (phba->sli4_hba.extents_in_use) 8871 return -EIO; 8872 8873 rpi_hdr = lpfc_sli4_create_rpi_hdr(phba); 8874 if (!rpi_hdr) { 8875 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 8876 "0391 Error during rpi post operation\n"); 8877 lpfc_sli4_remove_rpis(phba); 8878 rc = -ENODEV; 8879 } 8880 8881 return rc; 8882 } 8883 8884 /** 8885 * lpfc_sli4_create_rpi_hdr - Allocate an rpi header memory region 8886 * @phba: pointer to lpfc hba data structure. 8887 * 8888 * This routine is invoked to allocate a single 4KB memory region to 8889 * support rpis and stores them in the phba. This single region 8890 * provides support for up to 64 rpis. The region is used globally 8891 * by the device. 8892 * 8893 * Returns: 8894 * A valid rpi hdr on success. 8895 * A NULL pointer on any failure. 8896 **/ 8897 struct lpfc_rpi_hdr * 8898 lpfc_sli4_create_rpi_hdr(struct lpfc_hba *phba) 8899 { 8900 uint16_t rpi_limit, curr_rpi_range; 8901 struct lpfc_dmabuf *dmabuf; 8902 struct lpfc_rpi_hdr *rpi_hdr; 8903 8904 /* 8905 * If the SLI4 port supports extents, posting the rpi header isn't 8906 * required. Set the expected maximum count and let the actual value 8907 * get set when extents are fully allocated. 8908 */ 8909 if (!phba->sli4_hba.rpi_hdrs_in_use) 8910 return NULL; 8911 if (phba->sli4_hba.extents_in_use) 8912 return NULL; 8913 8914 /* The limit on the logical index is just the max_rpi count. */ 8915 rpi_limit = phba->sli4_hba.max_cfg_param.max_rpi; 8916 8917 spin_lock_irq(&phba->hbalock); 8918 /* 8919 * Establish the starting RPI in this header block. The starting 8920 * rpi is normalized to a zero base because the physical rpi is 8921 * port based. 8922 */ 8923 curr_rpi_range = phba->sli4_hba.next_rpi; 8924 spin_unlock_irq(&phba->hbalock); 8925 8926 /* Reached full RPI range */ 8927 if (curr_rpi_range == rpi_limit) 8928 return NULL; 8929 8930 /* 8931 * First allocate the protocol header region for the port. The 8932 * port expects a 4KB DMA-mapped memory region that is 4K aligned. 8933 */ 8934 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL); 8935 if (!dmabuf) 8936 return NULL; 8937 8938 dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev, 8939 LPFC_HDR_TEMPLATE_SIZE, 8940 &dmabuf->phys, GFP_KERNEL); 8941 if (!dmabuf->virt) { 8942 rpi_hdr = NULL; 8943 goto err_free_dmabuf; 8944 } 8945 8946 if (!IS_ALIGNED(dmabuf->phys, LPFC_HDR_TEMPLATE_SIZE)) { 8947 rpi_hdr = NULL; 8948 goto err_free_coherent; 8949 } 8950 8951 /* Save the rpi header data for cleanup later. */ 8952 rpi_hdr = kzalloc(sizeof(struct lpfc_rpi_hdr), GFP_KERNEL); 8953 if (!rpi_hdr) 8954 goto err_free_coherent; 8955 8956 rpi_hdr->dmabuf = dmabuf; 8957 rpi_hdr->len = LPFC_HDR_TEMPLATE_SIZE; 8958 rpi_hdr->page_count = 1; 8959 spin_lock_irq(&phba->hbalock); 8960 8961 /* The rpi_hdr stores the logical index only. */ 8962 rpi_hdr->start_rpi = curr_rpi_range; 8963 rpi_hdr->next_rpi = phba->sli4_hba.next_rpi + LPFC_RPI_HDR_COUNT; 8964 list_add_tail(&rpi_hdr->list, &phba->sli4_hba.lpfc_rpi_hdr_list); 8965 8966 spin_unlock_irq(&phba->hbalock); 8967 return rpi_hdr; 8968 8969 err_free_coherent: 8970 dma_free_coherent(&phba->pcidev->dev, LPFC_HDR_TEMPLATE_SIZE, 8971 dmabuf->virt, dmabuf->phys); 8972 err_free_dmabuf: 8973 kfree(dmabuf); 8974 return NULL; 8975 } 8976 8977 /** 8978 * lpfc_sli4_remove_rpi_hdrs - Remove all rpi header memory regions 8979 * @phba: pointer to lpfc hba data structure. 8980 * 8981 * This routine is invoked to remove all memory resources allocated 8982 * to support rpis for SLI4 ports not supporting extents. This routine 8983 * presumes the caller has released all rpis consumed by fabric or port 8984 * logins and is prepared to have the header pages removed. 8985 **/ 8986 void 8987 lpfc_sli4_remove_rpi_hdrs(struct lpfc_hba *phba) 8988 { 8989 struct lpfc_rpi_hdr *rpi_hdr, *next_rpi_hdr; 8990 8991 if (!phba->sli4_hba.rpi_hdrs_in_use) 8992 goto exit; 8993 8994 list_for_each_entry_safe(rpi_hdr, next_rpi_hdr, 8995 &phba->sli4_hba.lpfc_rpi_hdr_list, list) { 8996 list_del(&rpi_hdr->list); 8997 dma_free_coherent(&phba->pcidev->dev, rpi_hdr->len, 8998 rpi_hdr->dmabuf->virt, rpi_hdr->dmabuf->phys); 8999 kfree(rpi_hdr->dmabuf); 9000 kfree(rpi_hdr); 9001 } 9002 exit: 9003 /* There are no rpis available to the port now. */ 9004 phba->sli4_hba.next_rpi = 0; 9005 } 9006 9007 /** 9008 * lpfc_hba_alloc - Allocate driver hba data structure for a device. 9009 * @pdev: pointer to pci device data structure. 9010 * 9011 * This routine is invoked to allocate the driver hba data structure for an 9012 * HBA device. If the allocation is successful, the phba reference to the 9013 * PCI device data structure is set. 9014 * 9015 * Return codes 9016 * pointer to @phba - successful 9017 * NULL - error 9018 **/ 9019 static struct lpfc_hba * 9020 lpfc_hba_alloc(struct pci_dev *pdev) 9021 { 9022 struct lpfc_hba *phba; 9023 9024 /* Allocate memory for HBA structure */ 9025 phba = kzalloc(sizeof(struct lpfc_hba), GFP_KERNEL); 9026 if (!phba) { 9027 dev_err(&pdev->dev, "failed to allocate hba struct\n"); 9028 return NULL; 9029 } 9030 9031 /* Set reference to PCI device in HBA structure */ 9032 phba->pcidev = pdev; 9033 9034 /* Assign an unused board number */ 9035 phba->brd_no = lpfc_get_instance(); 9036 if (phba->brd_no < 0) { 9037 kfree(phba); 9038 return NULL; 9039 } 9040 phba->eratt_poll_interval = LPFC_ERATT_POLL_INTERVAL; 9041 9042 spin_lock_init(&phba->ct_ev_lock); 9043 INIT_LIST_HEAD(&phba->ct_ev_waiters); 9044 9045 return phba; 9046 } 9047 9048 /** 9049 * lpfc_hba_free - Free driver hba data structure with a device. 9050 * @phba: pointer to lpfc hba data structure. 9051 * 9052 * This routine is invoked to free the driver hba data structure with an 9053 * HBA device. 9054 **/ 9055 static void 9056 lpfc_hba_free(struct lpfc_hba *phba) 9057 { 9058 if (phba->sli_rev == LPFC_SLI_REV4) 9059 kfree(phba->sli4_hba.hdwq); 9060 9061 /* Release the driver assigned board number */ 9062 idr_remove(&lpfc_hba_index, phba->brd_no); 9063 9064 /* Free memory allocated with sli3 rings */ 9065 kfree(phba->sli.sli3_ring); 9066 phba->sli.sli3_ring = NULL; 9067 9068 kfree(phba); 9069 return; 9070 } 9071 9072 /** 9073 * lpfc_setup_fdmi_mask - Setup initial FDMI mask for HBA and Port attributes 9074 * @vport: pointer to lpfc vport data structure. 9075 * 9076 * This routine is will setup initial FDMI attribute masks for 9077 * FDMI2 or SmartSAN depending on module parameters. The driver will attempt 9078 * to get these attributes first before falling back, the attribute 9079 * fallback hierarchy is SmartSAN -> FDMI2 -> FMDI1 9080 **/ 9081 void 9082 lpfc_setup_fdmi_mask(struct lpfc_vport *vport) 9083 { 9084 struct lpfc_hba *phba = vport->phba; 9085 9086 set_bit(FC_ALLOW_FDMI, &vport->load_flag); 9087 if (phba->cfg_enable_SmartSAN || 9088 phba->cfg_fdmi_on == LPFC_FDMI_SUPPORT) { 9089 /* Setup appropriate attribute masks */ 9090 vport->fdmi_hba_mask = LPFC_FDMI2_HBA_ATTR; 9091 if (phba->cfg_enable_SmartSAN) 9092 vport->fdmi_port_mask = LPFC_FDMI2_SMART_ATTR; 9093 else 9094 vport->fdmi_port_mask = LPFC_FDMI2_PORT_ATTR; 9095 } 9096 9097 lpfc_printf_log(phba, KERN_INFO, LOG_DISCOVERY, 9098 "6077 Setup FDMI mask: hba x%x port x%x\n", 9099 vport->fdmi_hba_mask, vport->fdmi_port_mask); 9100 } 9101 9102 /** 9103 * lpfc_create_shost - Create hba physical port with associated scsi host. 9104 * @phba: pointer to lpfc hba data structure. 9105 * 9106 * This routine is invoked to create HBA physical port and associate a SCSI 9107 * host with it. 9108 * 9109 * Return codes 9110 * 0 - successful 9111 * other values - error 9112 **/ 9113 static int 9114 lpfc_create_shost(struct lpfc_hba *phba) 9115 { 9116 struct lpfc_vport *vport; 9117 struct Scsi_Host *shost; 9118 9119 /* Initialize HBA FC structure */ 9120 phba->fc_edtov = FF_DEF_EDTOV; 9121 phba->fc_ratov = FF_DEF_RATOV; 9122 phba->fc_altov = FF_DEF_ALTOV; 9123 phba->fc_arbtov = FF_DEF_ARBTOV; 9124 9125 atomic_set(&phba->sdev_cnt, 0); 9126 vport = lpfc_create_port(phba, phba->brd_no, &phba->pcidev->dev); 9127 if (!vport) 9128 return -ENODEV; 9129 9130 shost = lpfc_shost_from_vport(vport); 9131 phba->pport = vport; 9132 9133 if (phba->nvmet_support) { 9134 /* Only 1 vport (pport) will support NVME target */ 9135 phba->targetport = NULL; 9136 phba->cfg_enable_fc4_type = LPFC_ENABLE_NVME; 9137 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_NVME_DISC, 9138 "6076 NVME Target Found\n"); 9139 } 9140 9141 lpfc_debugfs_initialize(vport); 9142 /* Put reference to SCSI host to driver's device private data */ 9143 pci_set_drvdata(phba->pcidev, shost); 9144 9145 lpfc_setup_fdmi_mask(vport); 9146 9147 /* 9148 * At this point we are fully registered with PSA. In addition, 9149 * any initial discovery should be completed. 9150 */ 9151 return 0; 9152 } 9153 9154 /** 9155 * lpfc_destroy_shost - Destroy hba physical port with associated scsi host. 9156 * @phba: pointer to lpfc hba data structure. 9157 * 9158 * This routine is invoked to destroy HBA physical port and the associated 9159 * SCSI host. 9160 **/ 9161 static void 9162 lpfc_destroy_shost(struct lpfc_hba *phba) 9163 { 9164 struct lpfc_vport *vport = phba->pport; 9165 9166 /* Destroy physical port that associated with the SCSI host */ 9167 destroy_port(vport); 9168 9169 return; 9170 } 9171 9172 /** 9173 * lpfc_setup_bg - Setup Block guard structures and debug areas. 9174 * @phba: pointer to lpfc hba data structure. 9175 * @shost: the shost to be used to detect Block guard settings. 9176 * 9177 * This routine sets up the local Block guard protocol settings for @shost. 9178 * This routine also allocates memory for debugging bg buffers. 9179 **/ 9180 static void 9181 lpfc_setup_bg(struct lpfc_hba *phba, struct Scsi_Host *shost) 9182 { 9183 uint32_t old_mask; 9184 uint32_t old_guard; 9185 9186 if (phba->cfg_prot_mask && phba->cfg_prot_guard) { 9187 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 9188 "1478 Registering BlockGuard with the " 9189 "SCSI layer\n"); 9190 9191 old_mask = phba->cfg_prot_mask; 9192 old_guard = phba->cfg_prot_guard; 9193 9194 /* Only allow supported values */ 9195 phba->cfg_prot_mask &= (SHOST_DIF_TYPE1_PROTECTION | 9196 SHOST_DIX_TYPE0_PROTECTION | 9197 SHOST_DIX_TYPE1_PROTECTION); 9198 phba->cfg_prot_guard &= (SHOST_DIX_GUARD_IP | 9199 SHOST_DIX_GUARD_CRC); 9200 9201 /* DIF Type 1 protection for profiles AST1/C1 is end to end */ 9202 if (phba->cfg_prot_mask == SHOST_DIX_TYPE1_PROTECTION) 9203 phba->cfg_prot_mask |= SHOST_DIF_TYPE1_PROTECTION; 9204 9205 if (phba->cfg_prot_mask && phba->cfg_prot_guard) { 9206 if ((old_mask != phba->cfg_prot_mask) || 9207 (old_guard != phba->cfg_prot_guard)) 9208 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 9209 "1475 Registering BlockGuard with the " 9210 "SCSI layer: mask %d guard %d\n", 9211 phba->cfg_prot_mask, 9212 phba->cfg_prot_guard); 9213 9214 scsi_host_set_prot(shost, phba->cfg_prot_mask); 9215 scsi_host_set_guard(shost, phba->cfg_prot_guard); 9216 } else 9217 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 9218 "1479 Not Registering BlockGuard with the SCSI " 9219 "layer, Bad protection parameters: %d %d\n", 9220 old_mask, old_guard); 9221 } 9222 } 9223 9224 /** 9225 * lpfc_post_init_setup - Perform necessary device post initialization setup. 9226 * @phba: pointer to lpfc hba data structure. 9227 * 9228 * This routine is invoked to perform all the necessary post initialization 9229 * setup for the device. 9230 **/ 9231 static void 9232 lpfc_post_init_setup(struct lpfc_hba *phba) 9233 { 9234 struct Scsi_Host *shost; 9235 struct lpfc_adapter_event_header adapter_event; 9236 9237 /* Get the default values for Model Name and Description */ 9238 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc); 9239 9240 /* 9241 * hba setup may have changed the hba_queue_depth so we need to 9242 * adjust the value of can_queue. 9243 */ 9244 shost = pci_get_drvdata(phba->pcidev); 9245 shost->can_queue = phba->cfg_hba_queue_depth - 10; 9246 9247 lpfc_host_attrib_init(shost); 9248 9249 if (phba->cfg_poll & DISABLE_FCP_RING_INT) { 9250 spin_lock_irq(shost->host_lock); 9251 lpfc_poll_start_timer(phba); 9252 spin_unlock_irq(shost->host_lock); 9253 } 9254 9255 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 9256 "0428 Perform SCSI scan\n"); 9257 /* Send board arrival event to upper layer */ 9258 adapter_event.event_type = FC_REG_ADAPTER_EVENT; 9259 adapter_event.subcategory = LPFC_EVENT_ARRIVAL; 9260 fc_host_post_vendor_event(shost, fc_get_event_number(), 9261 sizeof(adapter_event), 9262 (char *) &adapter_event, 9263 LPFC_NL_VENDOR_ID); 9264 return; 9265 } 9266 9267 /** 9268 * lpfc_sli_pci_mem_setup - Setup SLI3 HBA PCI memory space. 9269 * @phba: pointer to lpfc hba data structure. 9270 * 9271 * This routine is invoked to set up the PCI device memory space for device 9272 * with SLI-3 interface spec. 9273 * 9274 * Return codes 9275 * 0 - successful 9276 * other values - error 9277 **/ 9278 static int 9279 lpfc_sli_pci_mem_setup(struct lpfc_hba *phba) 9280 { 9281 struct pci_dev *pdev = phba->pcidev; 9282 unsigned long bar0map_len, bar2map_len; 9283 int i, hbq_count; 9284 void *ptr; 9285 int error; 9286 9287 if (!pdev) 9288 return -ENODEV; 9289 9290 /* Set the device DMA mask size */ 9291 error = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); 9292 if (error) 9293 error = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); 9294 if (error) 9295 return error; 9296 error = -ENODEV; 9297 9298 /* Get the bus address of Bar0 and Bar2 and the number of bytes 9299 * required by each mapping. 9300 */ 9301 phba->pci_bar0_map = pci_resource_start(pdev, 0); 9302 bar0map_len = pci_resource_len(pdev, 0); 9303 9304 phba->pci_bar2_map = pci_resource_start(pdev, 2); 9305 bar2map_len = pci_resource_len(pdev, 2); 9306 9307 /* Map HBA SLIM to a kernel virtual address. */ 9308 phba->slim_memmap_p = ioremap(phba->pci_bar0_map, bar0map_len); 9309 if (!phba->slim_memmap_p) { 9310 dev_printk(KERN_ERR, &pdev->dev, 9311 "ioremap failed for SLIM memory.\n"); 9312 goto out; 9313 } 9314 9315 /* Map HBA Control Registers to a kernel virtual address. */ 9316 phba->ctrl_regs_memmap_p = ioremap(phba->pci_bar2_map, bar2map_len); 9317 if (!phba->ctrl_regs_memmap_p) { 9318 dev_printk(KERN_ERR, &pdev->dev, 9319 "ioremap failed for HBA control registers.\n"); 9320 goto out_iounmap_slim; 9321 } 9322 9323 /* Allocate memory for SLI-2 structures */ 9324 phba->slim2p.virt = dma_alloc_coherent(&pdev->dev, SLI2_SLIM_SIZE, 9325 &phba->slim2p.phys, GFP_KERNEL); 9326 if (!phba->slim2p.virt) 9327 goto out_iounmap; 9328 9329 phba->mbox = phba->slim2p.virt + offsetof(struct lpfc_sli2_slim, mbx); 9330 phba->mbox_ext = (phba->slim2p.virt + 9331 offsetof(struct lpfc_sli2_slim, mbx_ext_words)); 9332 phba->pcb = (phba->slim2p.virt + offsetof(struct lpfc_sli2_slim, pcb)); 9333 phba->IOCBs = (phba->slim2p.virt + 9334 offsetof(struct lpfc_sli2_slim, IOCBs)); 9335 9336 phba->hbqslimp.virt = dma_alloc_coherent(&pdev->dev, 9337 lpfc_sli_hbq_size(), 9338 &phba->hbqslimp.phys, 9339 GFP_KERNEL); 9340 if (!phba->hbqslimp.virt) 9341 goto out_free_slim; 9342 9343 hbq_count = lpfc_sli_hbq_count(); 9344 ptr = phba->hbqslimp.virt; 9345 for (i = 0; i < hbq_count; ++i) { 9346 phba->hbqs[i].hbq_virt = ptr; 9347 INIT_LIST_HEAD(&phba->hbqs[i].hbq_buffer_list); 9348 ptr += (lpfc_hbq_defs[i]->entry_count * 9349 sizeof(struct lpfc_hbq_entry)); 9350 } 9351 phba->hbqs[LPFC_ELS_HBQ].hbq_alloc_buffer = lpfc_els_hbq_alloc; 9352 phba->hbqs[LPFC_ELS_HBQ].hbq_free_buffer = lpfc_els_hbq_free; 9353 9354 memset(phba->hbqslimp.virt, 0, lpfc_sli_hbq_size()); 9355 9356 phba->MBslimaddr = phba->slim_memmap_p; 9357 phba->HAregaddr = phba->ctrl_regs_memmap_p + HA_REG_OFFSET; 9358 phba->CAregaddr = phba->ctrl_regs_memmap_p + CA_REG_OFFSET; 9359 phba->HSregaddr = phba->ctrl_regs_memmap_p + HS_REG_OFFSET; 9360 phba->HCregaddr = phba->ctrl_regs_memmap_p + HC_REG_OFFSET; 9361 9362 return 0; 9363 9364 out_free_slim: 9365 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE, 9366 phba->slim2p.virt, phba->slim2p.phys); 9367 out_iounmap: 9368 iounmap(phba->ctrl_regs_memmap_p); 9369 out_iounmap_slim: 9370 iounmap(phba->slim_memmap_p); 9371 out: 9372 return error; 9373 } 9374 9375 /** 9376 * lpfc_sli_pci_mem_unset - Unset SLI3 HBA PCI memory space. 9377 * @phba: pointer to lpfc hba data structure. 9378 * 9379 * This routine is invoked to unset the PCI device memory space for device 9380 * with SLI-3 interface spec. 9381 **/ 9382 static void 9383 lpfc_sli_pci_mem_unset(struct lpfc_hba *phba) 9384 { 9385 struct pci_dev *pdev; 9386 9387 /* Obtain PCI device reference */ 9388 if (!phba->pcidev) 9389 return; 9390 else 9391 pdev = phba->pcidev; 9392 9393 /* Free coherent DMA memory allocated */ 9394 dma_free_coherent(&pdev->dev, lpfc_sli_hbq_size(), 9395 phba->hbqslimp.virt, phba->hbqslimp.phys); 9396 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE, 9397 phba->slim2p.virt, phba->slim2p.phys); 9398 9399 /* I/O memory unmap */ 9400 iounmap(phba->ctrl_regs_memmap_p); 9401 iounmap(phba->slim_memmap_p); 9402 9403 return; 9404 } 9405 9406 /** 9407 * lpfc_sli4_post_status_check - Wait for SLI4 POST done and check status 9408 * @phba: pointer to lpfc hba data structure. 9409 * 9410 * This routine is invoked to wait for SLI4 device Power On Self Test (POST) 9411 * done and check status. 9412 * 9413 * Return 0 if successful, otherwise -ENODEV. 9414 **/ 9415 int 9416 lpfc_sli4_post_status_check(struct lpfc_hba *phba) 9417 { 9418 struct lpfc_register portsmphr_reg, uerrlo_reg, uerrhi_reg; 9419 struct lpfc_register reg_data; 9420 int i, port_error = 0; 9421 uint32_t if_type; 9422 9423 memset(&portsmphr_reg, 0, sizeof(portsmphr_reg)); 9424 memset(®_data, 0, sizeof(reg_data)); 9425 if (!phba->sli4_hba.PSMPHRregaddr) 9426 return -ENODEV; 9427 9428 /* Wait up to 30 seconds for the SLI Port POST done and ready */ 9429 for (i = 0; i < 3000; i++) { 9430 if (lpfc_readl(phba->sli4_hba.PSMPHRregaddr, 9431 &portsmphr_reg.word0) || 9432 (bf_get(lpfc_port_smphr_perr, &portsmphr_reg))) { 9433 /* Port has a fatal POST error, break out */ 9434 port_error = -ENODEV; 9435 break; 9436 } 9437 if (LPFC_POST_STAGE_PORT_READY == 9438 bf_get(lpfc_port_smphr_port_status, &portsmphr_reg)) 9439 break; 9440 msleep(10); 9441 } 9442 9443 /* 9444 * If there was a port error during POST, then don't proceed with 9445 * other register reads as the data may not be valid. Just exit. 9446 */ 9447 if (port_error) { 9448 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 9449 "1408 Port Failed POST - portsmphr=0x%x, " 9450 "perr=x%x, sfi=x%x, nip=x%x, ipc=x%x, scr1=x%x, " 9451 "scr2=x%x, hscratch=x%x, pstatus=x%x\n", 9452 portsmphr_reg.word0, 9453 bf_get(lpfc_port_smphr_perr, &portsmphr_reg), 9454 bf_get(lpfc_port_smphr_sfi, &portsmphr_reg), 9455 bf_get(lpfc_port_smphr_nip, &portsmphr_reg), 9456 bf_get(lpfc_port_smphr_ipc, &portsmphr_reg), 9457 bf_get(lpfc_port_smphr_scr1, &portsmphr_reg), 9458 bf_get(lpfc_port_smphr_scr2, &portsmphr_reg), 9459 bf_get(lpfc_port_smphr_host_scratch, &portsmphr_reg), 9460 bf_get(lpfc_port_smphr_port_status, &portsmphr_reg)); 9461 } else { 9462 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 9463 "2534 Device Info: SLIFamily=0x%x, " 9464 "SLIRev=0x%x, IFType=0x%x, SLIHint_1=0x%x, " 9465 "SLIHint_2=0x%x, FT=0x%x\n", 9466 bf_get(lpfc_sli_intf_sli_family, 9467 &phba->sli4_hba.sli_intf), 9468 bf_get(lpfc_sli_intf_slirev, 9469 &phba->sli4_hba.sli_intf), 9470 bf_get(lpfc_sli_intf_if_type, 9471 &phba->sli4_hba.sli_intf), 9472 bf_get(lpfc_sli_intf_sli_hint1, 9473 &phba->sli4_hba.sli_intf), 9474 bf_get(lpfc_sli_intf_sli_hint2, 9475 &phba->sli4_hba.sli_intf), 9476 bf_get(lpfc_sli_intf_func_type, 9477 &phba->sli4_hba.sli_intf)); 9478 /* 9479 * Check for other Port errors during the initialization 9480 * process. Fail the load if the port did not come up 9481 * correctly. 9482 */ 9483 if_type = bf_get(lpfc_sli_intf_if_type, 9484 &phba->sli4_hba.sli_intf); 9485 switch (if_type) { 9486 case LPFC_SLI_INTF_IF_TYPE_0: 9487 phba->sli4_hba.ue_mask_lo = 9488 readl(phba->sli4_hba.u.if_type0.UEMASKLOregaddr); 9489 phba->sli4_hba.ue_mask_hi = 9490 readl(phba->sli4_hba.u.if_type0.UEMASKHIregaddr); 9491 uerrlo_reg.word0 = 9492 readl(phba->sli4_hba.u.if_type0.UERRLOregaddr); 9493 uerrhi_reg.word0 = 9494 readl(phba->sli4_hba.u.if_type0.UERRHIregaddr); 9495 if ((~phba->sli4_hba.ue_mask_lo & uerrlo_reg.word0) || 9496 (~phba->sli4_hba.ue_mask_hi & uerrhi_reg.word0)) { 9497 lpfc_printf_log(phba, KERN_ERR, 9498 LOG_TRACE_EVENT, 9499 "1422 Unrecoverable Error " 9500 "Detected during POST " 9501 "uerr_lo_reg=0x%x, " 9502 "uerr_hi_reg=0x%x, " 9503 "ue_mask_lo_reg=0x%x, " 9504 "ue_mask_hi_reg=0x%x\n", 9505 uerrlo_reg.word0, 9506 uerrhi_reg.word0, 9507 phba->sli4_hba.ue_mask_lo, 9508 phba->sli4_hba.ue_mask_hi); 9509 port_error = -ENODEV; 9510 } 9511 break; 9512 case LPFC_SLI_INTF_IF_TYPE_2: 9513 case LPFC_SLI_INTF_IF_TYPE_6: 9514 /* Final checks. The port status should be clean. */ 9515 if (lpfc_readl(phba->sli4_hba.u.if_type2.STATUSregaddr, 9516 ®_data.word0) || 9517 lpfc_sli4_unrecoverable_port(®_data)) { 9518 phba->work_status[0] = 9519 readl(phba->sli4_hba.u.if_type2. 9520 ERR1regaddr); 9521 phba->work_status[1] = 9522 readl(phba->sli4_hba.u.if_type2. 9523 ERR2regaddr); 9524 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 9525 "2888 Unrecoverable port error " 9526 "following POST: port status reg " 9527 "0x%x, port_smphr reg 0x%x, " 9528 "error 1=0x%x, error 2=0x%x\n", 9529 reg_data.word0, 9530 portsmphr_reg.word0, 9531 phba->work_status[0], 9532 phba->work_status[1]); 9533 port_error = -ENODEV; 9534 break; 9535 } 9536 9537 if (lpfc_pldv_detect && 9538 bf_get(lpfc_sli_intf_sli_family, 9539 &phba->sli4_hba.sli_intf) == 9540 LPFC_SLI_INTF_FAMILY_G6) 9541 pci_write_config_byte(phba->pcidev, 9542 LPFC_SLI_INTF, CFG_PLD); 9543 break; 9544 case LPFC_SLI_INTF_IF_TYPE_1: 9545 default: 9546 break; 9547 } 9548 } 9549 return port_error; 9550 } 9551 9552 /** 9553 * lpfc_sli4_bar0_register_memmap - Set up SLI4 BAR0 register memory map. 9554 * @phba: pointer to lpfc hba data structure. 9555 * @if_type: The SLI4 interface type getting configured. 9556 * 9557 * This routine is invoked to set up SLI4 BAR0 PCI config space register 9558 * memory map. 9559 **/ 9560 static void 9561 lpfc_sli4_bar0_register_memmap(struct lpfc_hba *phba, uint32_t if_type) 9562 { 9563 switch (if_type) { 9564 case LPFC_SLI_INTF_IF_TYPE_0: 9565 phba->sli4_hba.u.if_type0.UERRLOregaddr = 9566 phba->sli4_hba.conf_regs_memmap_p + LPFC_UERR_STATUS_LO; 9567 phba->sli4_hba.u.if_type0.UERRHIregaddr = 9568 phba->sli4_hba.conf_regs_memmap_p + LPFC_UERR_STATUS_HI; 9569 phba->sli4_hba.u.if_type0.UEMASKLOregaddr = 9570 phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_LO; 9571 phba->sli4_hba.u.if_type0.UEMASKHIregaddr = 9572 phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_HI; 9573 phba->sli4_hba.SLIINTFregaddr = 9574 phba->sli4_hba.conf_regs_memmap_p + LPFC_SLI_INTF; 9575 break; 9576 case LPFC_SLI_INTF_IF_TYPE_2: 9577 phba->sli4_hba.u.if_type2.EQDregaddr = 9578 phba->sli4_hba.conf_regs_memmap_p + 9579 LPFC_CTL_PORT_EQ_DELAY_OFFSET; 9580 phba->sli4_hba.u.if_type2.ERR1regaddr = 9581 phba->sli4_hba.conf_regs_memmap_p + 9582 LPFC_CTL_PORT_ER1_OFFSET; 9583 phba->sli4_hba.u.if_type2.ERR2regaddr = 9584 phba->sli4_hba.conf_regs_memmap_p + 9585 LPFC_CTL_PORT_ER2_OFFSET; 9586 phba->sli4_hba.u.if_type2.CTRLregaddr = 9587 phba->sli4_hba.conf_regs_memmap_p + 9588 LPFC_CTL_PORT_CTL_OFFSET; 9589 phba->sli4_hba.u.if_type2.STATUSregaddr = 9590 phba->sli4_hba.conf_regs_memmap_p + 9591 LPFC_CTL_PORT_STA_OFFSET; 9592 phba->sli4_hba.SLIINTFregaddr = 9593 phba->sli4_hba.conf_regs_memmap_p + LPFC_SLI_INTF; 9594 phba->sli4_hba.PSMPHRregaddr = 9595 phba->sli4_hba.conf_regs_memmap_p + 9596 LPFC_CTL_PORT_SEM_OFFSET; 9597 phba->sli4_hba.RQDBregaddr = 9598 phba->sli4_hba.conf_regs_memmap_p + 9599 LPFC_ULP0_RQ_DOORBELL; 9600 phba->sli4_hba.WQDBregaddr = 9601 phba->sli4_hba.conf_regs_memmap_p + 9602 LPFC_ULP0_WQ_DOORBELL; 9603 phba->sli4_hba.CQDBregaddr = 9604 phba->sli4_hba.conf_regs_memmap_p + LPFC_EQCQ_DOORBELL; 9605 phba->sli4_hba.EQDBregaddr = phba->sli4_hba.CQDBregaddr; 9606 phba->sli4_hba.MQDBregaddr = 9607 phba->sli4_hba.conf_regs_memmap_p + LPFC_MQ_DOORBELL; 9608 phba->sli4_hba.BMBXregaddr = 9609 phba->sli4_hba.conf_regs_memmap_p + LPFC_BMBX; 9610 break; 9611 case LPFC_SLI_INTF_IF_TYPE_6: 9612 phba->sli4_hba.u.if_type2.EQDregaddr = 9613 phba->sli4_hba.conf_regs_memmap_p + 9614 LPFC_CTL_PORT_EQ_DELAY_OFFSET; 9615 phba->sli4_hba.u.if_type2.ERR1regaddr = 9616 phba->sli4_hba.conf_regs_memmap_p + 9617 LPFC_CTL_PORT_ER1_OFFSET; 9618 phba->sli4_hba.u.if_type2.ERR2regaddr = 9619 phba->sli4_hba.conf_regs_memmap_p + 9620 LPFC_CTL_PORT_ER2_OFFSET; 9621 phba->sli4_hba.u.if_type2.CTRLregaddr = 9622 phba->sli4_hba.conf_regs_memmap_p + 9623 LPFC_CTL_PORT_CTL_OFFSET; 9624 phba->sli4_hba.u.if_type2.STATUSregaddr = 9625 phba->sli4_hba.conf_regs_memmap_p + 9626 LPFC_CTL_PORT_STA_OFFSET; 9627 phba->sli4_hba.PSMPHRregaddr = 9628 phba->sli4_hba.conf_regs_memmap_p + 9629 LPFC_CTL_PORT_SEM_OFFSET; 9630 phba->sli4_hba.BMBXregaddr = 9631 phba->sli4_hba.conf_regs_memmap_p + LPFC_BMBX; 9632 break; 9633 case LPFC_SLI_INTF_IF_TYPE_1: 9634 default: 9635 dev_printk(KERN_ERR, &phba->pcidev->dev, 9636 "FATAL - unsupported SLI4 interface type - %d\n", 9637 if_type); 9638 break; 9639 } 9640 } 9641 9642 /** 9643 * lpfc_sli4_bar1_register_memmap - Set up SLI4 BAR1 register memory map. 9644 * @phba: pointer to lpfc hba data structure. 9645 * @if_type: sli if type to operate on. 9646 * 9647 * This routine is invoked to set up SLI4 BAR1 register memory map. 9648 **/ 9649 static void 9650 lpfc_sli4_bar1_register_memmap(struct lpfc_hba *phba, uint32_t if_type) 9651 { 9652 switch (if_type) { 9653 case LPFC_SLI_INTF_IF_TYPE_0: 9654 phba->sli4_hba.PSMPHRregaddr = 9655 phba->sli4_hba.ctrl_regs_memmap_p + 9656 LPFC_SLIPORT_IF0_SMPHR; 9657 phba->sli4_hba.ISRregaddr = phba->sli4_hba.ctrl_regs_memmap_p + 9658 LPFC_HST_ISR0; 9659 phba->sli4_hba.IMRregaddr = phba->sli4_hba.ctrl_regs_memmap_p + 9660 LPFC_HST_IMR0; 9661 phba->sli4_hba.ISCRregaddr = phba->sli4_hba.ctrl_regs_memmap_p + 9662 LPFC_HST_ISCR0; 9663 break; 9664 case LPFC_SLI_INTF_IF_TYPE_6: 9665 phba->sli4_hba.RQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p + 9666 LPFC_IF6_RQ_DOORBELL; 9667 phba->sli4_hba.WQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p + 9668 LPFC_IF6_WQ_DOORBELL; 9669 phba->sli4_hba.CQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p + 9670 LPFC_IF6_CQ_DOORBELL; 9671 phba->sli4_hba.EQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p + 9672 LPFC_IF6_EQ_DOORBELL; 9673 phba->sli4_hba.MQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p + 9674 LPFC_IF6_MQ_DOORBELL; 9675 break; 9676 case LPFC_SLI_INTF_IF_TYPE_2: 9677 case LPFC_SLI_INTF_IF_TYPE_1: 9678 default: 9679 dev_err(&phba->pcidev->dev, 9680 "FATAL - unsupported SLI4 interface type - %d\n", 9681 if_type); 9682 break; 9683 } 9684 } 9685 9686 /** 9687 * lpfc_sli4_bar2_register_memmap - Set up SLI4 BAR2 register memory map. 9688 * @phba: pointer to lpfc hba data structure. 9689 * @vf: virtual function number 9690 * 9691 * This routine is invoked to set up SLI4 BAR2 doorbell register memory map 9692 * based on the given viftual function number, @vf. 9693 * 9694 * Return 0 if successful, otherwise -ENODEV. 9695 **/ 9696 static int 9697 lpfc_sli4_bar2_register_memmap(struct lpfc_hba *phba, uint32_t vf) 9698 { 9699 if (vf > LPFC_VIR_FUNC_MAX) 9700 return -ENODEV; 9701 9702 phba->sli4_hba.RQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p + 9703 vf * LPFC_VFR_PAGE_SIZE + 9704 LPFC_ULP0_RQ_DOORBELL); 9705 phba->sli4_hba.WQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p + 9706 vf * LPFC_VFR_PAGE_SIZE + 9707 LPFC_ULP0_WQ_DOORBELL); 9708 phba->sli4_hba.CQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p + 9709 vf * LPFC_VFR_PAGE_SIZE + 9710 LPFC_EQCQ_DOORBELL); 9711 phba->sli4_hba.EQDBregaddr = phba->sli4_hba.CQDBregaddr; 9712 phba->sli4_hba.MQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p + 9713 vf * LPFC_VFR_PAGE_SIZE + LPFC_MQ_DOORBELL); 9714 phba->sli4_hba.BMBXregaddr = (phba->sli4_hba.drbl_regs_memmap_p + 9715 vf * LPFC_VFR_PAGE_SIZE + LPFC_BMBX); 9716 return 0; 9717 } 9718 9719 /** 9720 * lpfc_create_bootstrap_mbox - Create the bootstrap mailbox 9721 * @phba: pointer to lpfc hba data structure. 9722 * 9723 * This routine is invoked to create the bootstrap mailbox 9724 * region consistent with the SLI-4 interface spec. This 9725 * routine allocates all memory necessary to communicate 9726 * mailbox commands to the port and sets up all alignment 9727 * needs. No locks are expected to be held when calling 9728 * this routine. 9729 * 9730 * Return codes 9731 * 0 - successful 9732 * -ENOMEM - could not allocated memory. 9733 **/ 9734 static int 9735 lpfc_create_bootstrap_mbox(struct lpfc_hba *phba) 9736 { 9737 uint32_t bmbx_size; 9738 struct lpfc_dmabuf *dmabuf; 9739 struct dma_address *dma_address; 9740 uint32_t pa_addr; 9741 uint64_t phys_addr; 9742 9743 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL); 9744 if (!dmabuf) 9745 return -ENOMEM; 9746 9747 /* 9748 * The bootstrap mailbox region is comprised of 2 parts 9749 * plus an alignment restriction of 16 bytes. 9750 */ 9751 bmbx_size = sizeof(struct lpfc_bmbx_create) + (LPFC_ALIGN_16_BYTE - 1); 9752 dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev, bmbx_size, 9753 &dmabuf->phys, GFP_KERNEL); 9754 if (!dmabuf->virt) { 9755 kfree(dmabuf); 9756 return -ENOMEM; 9757 } 9758 9759 /* 9760 * Initialize the bootstrap mailbox pointers now so that the register 9761 * operations are simple later. The mailbox dma address is required 9762 * to be 16-byte aligned. Also align the virtual memory as each 9763 * maibox is copied into the bmbx mailbox region before issuing the 9764 * command to the port. 9765 */ 9766 phba->sli4_hba.bmbx.dmabuf = dmabuf; 9767 phba->sli4_hba.bmbx.bmbx_size = bmbx_size; 9768 9769 phba->sli4_hba.bmbx.avirt = PTR_ALIGN(dmabuf->virt, 9770 LPFC_ALIGN_16_BYTE); 9771 phba->sli4_hba.bmbx.aphys = ALIGN(dmabuf->phys, 9772 LPFC_ALIGN_16_BYTE); 9773 9774 /* 9775 * Set the high and low physical addresses now. The SLI4 alignment 9776 * requirement is 16 bytes and the mailbox is posted to the port 9777 * as two 30-bit addresses. The other data is a bit marking whether 9778 * the 30-bit address is the high or low address. 9779 * Upcast bmbx aphys to 64bits so shift instruction compiles 9780 * clean on 32 bit machines. 9781 */ 9782 dma_address = &phba->sli4_hba.bmbx.dma_address; 9783 phys_addr = (uint64_t)phba->sli4_hba.bmbx.aphys; 9784 pa_addr = (uint32_t) ((phys_addr >> 34) & 0x3fffffff); 9785 dma_address->addr_hi = (uint32_t) ((pa_addr << 2) | 9786 LPFC_BMBX_BIT1_ADDR_HI); 9787 9788 pa_addr = (uint32_t) ((phba->sli4_hba.bmbx.aphys >> 4) & 0x3fffffff); 9789 dma_address->addr_lo = (uint32_t) ((pa_addr << 2) | 9790 LPFC_BMBX_BIT1_ADDR_LO); 9791 return 0; 9792 } 9793 9794 /** 9795 * lpfc_destroy_bootstrap_mbox - Destroy all bootstrap mailbox resources 9796 * @phba: pointer to lpfc hba data structure. 9797 * 9798 * This routine is invoked to teardown the bootstrap mailbox 9799 * region and release all host resources. This routine requires 9800 * the caller to ensure all mailbox commands recovered, no 9801 * additional mailbox comands are sent, and interrupts are disabled 9802 * before calling this routine. 9803 * 9804 **/ 9805 static void 9806 lpfc_destroy_bootstrap_mbox(struct lpfc_hba *phba) 9807 { 9808 dma_free_coherent(&phba->pcidev->dev, 9809 phba->sli4_hba.bmbx.bmbx_size, 9810 phba->sli4_hba.bmbx.dmabuf->virt, 9811 phba->sli4_hba.bmbx.dmabuf->phys); 9812 9813 kfree(phba->sli4_hba.bmbx.dmabuf); 9814 memset(&phba->sli4_hba.bmbx, 0, sizeof(struct lpfc_bmbx)); 9815 } 9816 9817 static const char * const lpfc_topo_to_str[] = { 9818 "Loop then P2P", 9819 "Loopback", 9820 "P2P Only", 9821 "Unsupported", 9822 "Loop Only", 9823 "Unsupported", 9824 "P2P then Loop", 9825 }; 9826 9827 #define LINK_FLAGS_DEF 0x0 9828 #define LINK_FLAGS_P2P 0x1 9829 #define LINK_FLAGS_LOOP 0x2 9830 /** 9831 * lpfc_map_topology - Map the topology read from READ_CONFIG 9832 * @phba: pointer to lpfc hba data structure. 9833 * @rd_config: pointer to read config data 9834 * 9835 * This routine is invoked to map the topology values as read 9836 * from the read config mailbox command. If the persistent 9837 * topology feature is supported, the firmware will provide the 9838 * saved topology information to be used in INIT_LINK 9839 **/ 9840 static void 9841 lpfc_map_topology(struct lpfc_hba *phba, struct lpfc_mbx_read_config *rd_config) 9842 { 9843 u8 ptv, tf, pt; 9844 9845 ptv = bf_get(lpfc_mbx_rd_conf_ptv, rd_config); 9846 tf = bf_get(lpfc_mbx_rd_conf_tf, rd_config); 9847 pt = bf_get(lpfc_mbx_rd_conf_pt, rd_config); 9848 9849 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 9850 "2027 Read Config Data : ptv:0x%x, tf:0x%x pt:0x%x", 9851 ptv, tf, pt); 9852 if (!ptv) { 9853 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI, 9854 "2019 FW does not support persistent topology " 9855 "Using driver parameter defined value [%s]", 9856 lpfc_topo_to_str[phba->cfg_topology]); 9857 return; 9858 } 9859 /* FW supports persistent topology - override module parameter value */ 9860 set_bit(HBA_PERSISTENT_TOPO, &phba->hba_flag); 9861 9862 /* if ASIC_GEN_NUM >= 0xC) */ 9863 if ((bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) == 9864 LPFC_SLI_INTF_IF_TYPE_6) || 9865 (bf_get(lpfc_sli_intf_sli_family, &phba->sli4_hba.sli_intf) == 9866 LPFC_SLI_INTF_FAMILY_G6)) { 9867 if (!tf) 9868 phba->cfg_topology = ((pt == LINK_FLAGS_LOOP) 9869 ? FLAGS_TOPOLOGY_MODE_LOOP 9870 : FLAGS_TOPOLOGY_MODE_PT_PT); 9871 else 9872 clear_bit(HBA_PERSISTENT_TOPO, &phba->hba_flag); 9873 } else { /* G5 */ 9874 if (tf) 9875 /* If topology failover set - pt is '0' or '1' */ 9876 phba->cfg_topology = (pt ? FLAGS_TOPOLOGY_MODE_PT_LOOP : 9877 FLAGS_TOPOLOGY_MODE_LOOP_PT); 9878 else 9879 phba->cfg_topology = ((pt == LINK_FLAGS_P2P) 9880 ? FLAGS_TOPOLOGY_MODE_PT_PT 9881 : FLAGS_TOPOLOGY_MODE_LOOP); 9882 } 9883 if (test_bit(HBA_PERSISTENT_TOPO, &phba->hba_flag)) 9884 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 9885 "2020 Using persistent topology value [%s]", 9886 lpfc_topo_to_str[phba->cfg_topology]); 9887 else 9888 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI, 9889 "2021 Invalid topology values from FW " 9890 "Using driver parameter defined value [%s]", 9891 lpfc_topo_to_str[phba->cfg_topology]); 9892 } 9893 9894 /** 9895 * lpfc_sli4_read_config - Get the config parameters. 9896 * @phba: pointer to lpfc hba data structure. 9897 * 9898 * This routine is invoked to read the configuration parameters from the HBA. 9899 * The configuration parameters are used to set the base and maximum values 9900 * for RPI's XRI's VPI's VFI's and FCFIs. These values also affect the resource 9901 * allocation for the port. 9902 * 9903 * Return codes 9904 * 0 - successful 9905 * -ENOMEM - No available memory 9906 * -EIO - The mailbox failed to complete successfully. 9907 **/ 9908 int 9909 lpfc_sli4_read_config(struct lpfc_hba *phba) 9910 { 9911 LPFC_MBOXQ_t *pmb; 9912 struct lpfc_mbx_read_config *rd_config; 9913 union lpfc_sli4_cfg_shdr *shdr; 9914 uint32_t shdr_status, shdr_add_status; 9915 struct lpfc_mbx_get_func_cfg *get_func_cfg; 9916 struct lpfc_rsrc_desc_fcfcoe *desc; 9917 char *pdesc_0; 9918 uint16_t forced_link_speed; 9919 uint32_t if_type, qmin, fawwpn; 9920 int length, i, rc = 0, rc2; 9921 9922 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 9923 if (!pmb) { 9924 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 9925 "2011 Unable to allocate memory for issuing " 9926 "SLI_CONFIG_SPECIAL mailbox command\n"); 9927 return -ENOMEM; 9928 } 9929 9930 lpfc_read_config(phba, pmb); 9931 9932 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); 9933 if (rc != MBX_SUCCESS) { 9934 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 9935 "2012 Mailbox failed , mbxCmd x%x " 9936 "READ_CONFIG, mbxStatus x%x\n", 9937 bf_get(lpfc_mqe_command, &pmb->u.mqe), 9938 bf_get(lpfc_mqe_status, &pmb->u.mqe)); 9939 rc = -EIO; 9940 } else { 9941 rd_config = &pmb->u.mqe.un.rd_config; 9942 if (bf_get(lpfc_mbx_rd_conf_lnk_ldv, rd_config)) { 9943 phba->sli4_hba.lnk_info.lnk_dv = LPFC_LNK_DAT_VAL; 9944 phba->sli4_hba.lnk_info.lnk_tp = 9945 bf_get(lpfc_mbx_rd_conf_lnk_type, rd_config); 9946 phba->sli4_hba.lnk_info.lnk_no = 9947 bf_get(lpfc_mbx_rd_conf_lnk_numb, rd_config); 9948 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 9949 "3081 lnk_type:%d, lnk_numb:%d\n", 9950 phba->sli4_hba.lnk_info.lnk_tp, 9951 phba->sli4_hba.lnk_info.lnk_no); 9952 } else 9953 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI, 9954 "3082 Mailbox (x%x) returned ldv:x0\n", 9955 bf_get(lpfc_mqe_command, &pmb->u.mqe)); 9956 if (bf_get(lpfc_mbx_rd_conf_bbscn_def, rd_config)) { 9957 phba->bbcredit_support = 1; 9958 phba->sli4_hba.bbscn_params.word0 = rd_config->word8; 9959 } 9960 9961 fawwpn = bf_get(lpfc_mbx_rd_conf_fawwpn, rd_config); 9962 9963 if (fawwpn) { 9964 lpfc_printf_log(phba, KERN_INFO, 9965 LOG_INIT | LOG_DISCOVERY, 9966 "2702 READ_CONFIG: FA-PWWN is " 9967 "configured on\n"); 9968 phba->sli4_hba.fawwpn_flag |= LPFC_FAWWPN_CONFIG; 9969 } else { 9970 /* Clear FW configured flag, preserve driver flag */ 9971 phba->sli4_hba.fawwpn_flag &= ~LPFC_FAWWPN_CONFIG; 9972 } 9973 9974 phba->sli4_hba.conf_trunk = 9975 bf_get(lpfc_mbx_rd_conf_trunk, rd_config); 9976 phba->sli4_hba.extents_in_use = 9977 bf_get(lpfc_mbx_rd_conf_extnts_inuse, rd_config); 9978 9979 phba->sli4_hba.max_cfg_param.max_xri = 9980 bf_get(lpfc_mbx_rd_conf_xri_count, rd_config); 9981 /* Reduce resource usage in kdump environment */ 9982 if (is_kdump_kernel() && 9983 phba->sli4_hba.max_cfg_param.max_xri > 512) 9984 phba->sli4_hba.max_cfg_param.max_xri = 512; 9985 phba->sli4_hba.max_cfg_param.xri_base = 9986 bf_get(lpfc_mbx_rd_conf_xri_base, rd_config); 9987 phba->sli4_hba.max_cfg_param.max_vpi = 9988 bf_get(lpfc_mbx_rd_conf_vpi_count, rd_config); 9989 /* Limit the max we support */ 9990 if (phba->sli4_hba.max_cfg_param.max_vpi > LPFC_MAX_VPORTS) 9991 phba->sli4_hba.max_cfg_param.max_vpi = LPFC_MAX_VPORTS; 9992 phba->sli4_hba.max_cfg_param.vpi_base = 9993 bf_get(lpfc_mbx_rd_conf_vpi_base, rd_config); 9994 phba->sli4_hba.max_cfg_param.max_rpi = 9995 bf_get(lpfc_mbx_rd_conf_rpi_count, rd_config); 9996 phba->sli4_hba.max_cfg_param.rpi_base = 9997 bf_get(lpfc_mbx_rd_conf_rpi_base, rd_config); 9998 phba->sli4_hba.max_cfg_param.max_vfi = 9999 bf_get(lpfc_mbx_rd_conf_vfi_count, rd_config); 10000 phba->sli4_hba.max_cfg_param.vfi_base = 10001 bf_get(lpfc_mbx_rd_conf_vfi_base, rd_config); 10002 phba->sli4_hba.max_cfg_param.max_fcfi = 10003 bf_get(lpfc_mbx_rd_conf_fcfi_count, rd_config); 10004 phba->sli4_hba.max_cfg_param.max_eq = 10005 bf_get(lpfc_mbx_rd_conf_eq_count, rd_config); 10006 phba->sli4_hba.max_cfg_param.max_rq = 10007 bf_get(lpfc_mbx_rd_conf_rq_count, rd_config); 10008 phba->sli4_hba.max_cfg_param.max_wq = 10009 bf_get(lpfc_mbx_rd_conf_wq_count, rd_config); 10010 phba->sli4_hba.max_cfg_param.max_cq = 10011 bf_get(lpfc_mbx_rd_conf_cq_count, rd_config); 10012 phba->lmt = bf_get(lpfc_mbx_rd_conf_lmt, rd_config); 10013 phba->sli4_hba.next_xri = phba->sli4_hba.max_cfg_param.xri_base; 10014 phba->vpi_base = phba->sli4_hba.max_cfg_param.vpi_base; 10015 phba->vfi_base = phba->sli4_hba.max_cfg_param.vfi_base; 10016 phba->max_vpi = (phba->sli4_hba.max_cfg_param.max_vpi > 0) ? 10017 (phba->sli4_hba.max_cfg_param.max_vpi - 1) : 0; 10018 phba->max_vports = phba->max_vpi; 10019 10020 /* Next decide on FPIN or Signal E2E CGN support 10021 * For congestion alarms and warnings valid combination are: 10022 * 1. FPIN alarms / FPIN warnings 10023 * 2. Signal alarms / Signal warnings 10024 * 3. FPIN alarms / Signal warnings 10025 * 4. Signal alarms / FPIN warnings 10026 * 10027 * Initialize the adapter frequency to 100 mSecs 10028 */ 10029 phba->cgn_reg_fpin = LPFC_CGN_FPIN_BOTH; 10030 phba->cgn_reg_signal = EDC_CG_SIG_NOTSUPPORTED; 10031 phba->cgn_sig_freq = lpfc_fabric_cgn_frequency; 10032 10033 if (lpfc_use_cgn_signal) { 10034 if (bf_get(lpfc_mbx_rd_conf_wcs, rd_config)) { 10035 phba->cgn_reg_signal = EDC_CG_SIG_WARN_ONLY; 10036 phba->cgn_reg_fpin &= ~LPFC_CGN_FPIN_WARN; 10037 } 10038 if (bf_get(lpfc_mbx_rd_conf_acs, rd_config)) { 10039 /* MUST support both alarm and warning 10040 * because EDC does not support alarm alone. 10041 */ 10042 if (phba->cgn_reg_signal != 10043 EDC_CG_SIG_WARN_ONLY) { 10044 /* Must support both or none */ 10045 phba->cgn_reg_fpin = LPFC_CGN_FPIN_BOTH; 10046 phba->cgn_reg_signal = 10047 EDC_CG_SIG_NOTSUPPORTED; 10048 } else { 10049 phba->cgn_reg_signal = 10050 EDC_CG_SIG_WARN_ALARM; 10051 phba->cgn_reg_fpin = 10052 LPFC_CGN_FPIN_NONE; 10053 } 10054 } 10055 } 10056 10057 /* Set the congestion initial signal and fpin values. */ 10058 phba->cgn_init_reg_fpin = phba->cgn_reg_fpin; 10059 phba->cgn_init_reg_signal = phba->cgn_reg_signal; 10060 10061 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT, 10062 "6446 READ_CONFIG reg_sig x%x reg_fpin:x%x\n", 10063 phba->cgn_reg_signal, phba->cgn_reg_fpin); 10064 10065 lpfc_map_topology(phba, rd_config); 10066 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 10067 "2003 cfg params Extents? %d " 10068 "XRI(B:%d M:%d), " 10069 "VPI(B:%d M:%d) " 10070 "VFI(B:%d M:%d) " 10071 "RPI(B:%d M:%d) " 10072 "FCFI:%d EQ:%d CQ:%d WQ:%d RQ:%d lmt:x%x\n", 10073 phba->sli4_hba.extents_in_use, 10074 phba->sli4_hba.max_cfg_param.xri_base, 10075 phba->sli4_hba.max_cfg_param.max_xri, 10076 phba->sli4_hba.max_cfg_param.vpi_base, 10077 phba->sli4_hba.max_cfg_param.max_vpi, 10078 phba->sli4_hba.max_cfg_param.vfi_base, 10079 phba->sli4_hba.max_cfg_param.max_vfi, 10080 phba->sli4_hba.max_cfg_param.rpi_base, 10081 phba->sli4_hba.max_cfg_param.max_rpi, 10082 phba->sli4_hba.max_cfg_param.max_fcfi, 10083 phba->sli4_hba.max_cfg_param.max_eq, 10084 phba->sli4_hba.max_cfg_param.max_cq, 10085 phba->sli4_hba.max_cfg_param.max_wq, 10086 phba->sli4_hba.max_cfg_param.max_rq, 10087 phba->lmt); 10088 10089 /* 10090 * Calculate queue resources based on how 10091 * many WQ/CQ/EQs are available. 10092 */ 10093 qmin = phba->sli4_hba.max_cfg_param.max_wq; 10094 if (phba->sli4_hba.max_cfg_param.max_cq < qmin) 10095 qmin = phba->sli4_hba.max_cfg_param.max_cq; 10096 /* 10097 * Reserve 4 (ELS, NVME LS, MBOX, plus one extra) and 10098 * the remainder can be used for NVME / FCP. 10099 */ 10100 qmin -= 4; 10101 if (phba->sli4_hba.max_cfg_param.max_eq < qmin) 10102 qmin = phba->sli4_hba.max_cfg_param.max_eq; 10103 10104 /* Check to see if there is enough for default cfg */ 10105 if ((phba->cfg_irq_chann > qmin) || 10106 (phba->cfg_hdw_queue > qmin)) { 10107 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10108 "2005 Reducing Queues - " 10109 "FW resource limitation: " 10110 "WQ %d CQ %d EQ %d: min %d: " 10111 "IRQ %d HDWQ %d\n", 10112 phba->sli4_hba.max_cfg_param.max_wq, 10113 phba->sli4_hba.max_cfg_param.max_cq, 10114 phba->sli4_hba.max_cfg_param.max_eq, 10115 qmin, phba->cfg_irq_chann, 10116 phba->cfg_hdw_queue); 10117 10118 if (phba->cfg_irq_chann > qmin) 10119 phba->cfg_irq_chann = qmin; 10120 if (phba->cfg_hdw_queue > qmin) 10121 phba->cfg_hdw_queue = qmin; 10122 } 10123 } 10124 10125 if (rc) 10126 goto read_cfg_out; 10127 10128 /* Update link speed if forced link speed is supported */ 10129 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf); 10130 if (if_type >= LPFC_SLI_INTF_IF_TYPE_2) { 10131 forced_link_speed = 10132 bf_get(lpfc_mbx_rd_conf_link_speed, rd_config); 10133 if (forced_link_speed) { 10134 set_bit(HBA_FORCED_LINK_SPEED, &phba->hba_flag); 10135 10136 switch (forced_link_speed) { 10137 case LINK_SPEED_1G: 10138 phba->cfg_link_speed = 10139 LPFC_USER_LINK_SPEED_1G; 10140 break; 10141 case LINK_SPEED_2G: 10142 phba->cfg_link_speed = 10143 LPFC_USER_LINK_SPEED_2G; 10144 break; 10145 case LINK_SPEED_4G: 10146 phba->cfg_link_speed = 10147 LPFC_USER_LINK_SPEED_4G; 10148 break; 10149 case LINK_SPEED_8G: 10150 phba->cfg_link_speed = 10151 LPFC_USER_LINK_SPEED_8G; 10152 break; 10153 case LINK_SPEED_10G: 10154 phba->cfg_link_speed = 10155 LPFC_USER_LINK_SPEED_10G; 10156 break; 10157 case LINK_SPEED_16G: 10158 phba->cfg_link_speed = 10159 LPFC_USER_LINK_SPEED_16G; 10160 break; 10161 case LINK_SPEED_32G: 10162 phba->cfg_link_speed = 10163 LPFC_USER_LINK_SPEED_32G; 10164 break; 10165 case LINK_SPEED_64G: 10166 phba->cfg_link_speed = 10167 LPFC_USER_LINK_SPEED_64G; 10168 break; 10169 case 0xffff: 10170 phba->cfg_link_speed = 10171 LPFC_USER_LINK_SPEED_AUTO; 10172 break; 10173 default: 10174 lpfc_printf_log(phba, KERN_ERR, 10175 LOG_TRACE_EVENT, 10176 "0047 Unrecognized link " 10177 "speed : %d\n", 10178 forced_link_speed); 10179 phba->cfg_link_speed = 10180 LPFC_USER_LINK_SPEED_AUTO; 10181 } 10182 } 10183 } 10184 10185 /* Reset the DFT_HBA_Q_DEPTH to the max xri */ 10186 length = phba->sli4_hba.max_cfg_param.max_xri - 10187 lpfc_sli4_get_els_iocb_cnt(phba); 10188 if (phba->cfg_hba_queue_depth > length) { 10189 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 10190 "3361 HBA queue depth changed from %d to %d\n", 10191 phba->cfg_hba_queue_depth, length); 10192 phba->cfg_hba_queue_depth = length; 10193 } 10194 10195 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) < 10196 LPFC_SLI_INTF_IF_TYPE_2) 10197 goto read_cfg_out; 10198 10199 /* get the pf# and vf# for SLI4 if_type 2 port */ 10200 length = (sizeof(struct lpfc_mbx_get_func_cfg) - 10201 sizeof(struct lpfc_sli4_cfg_mhdr)); 10202 lpfc_sli4_config(phba, pmb, LPFC_MBOX_SUBSYSTEM_COMMON, 10203 LPFC_MBOX_OPCODE_GET_FUNCTION_CONFIG, 10204 length, LPFC_SLI4_MBX_EMBED); 10205 10206 rc2 = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); 10207 shdr = (union lpfc_sli4_cfg_shdr *) 10208 &pmb->u.mqe.un.sli4_config.header.cfg_shdr; 10209 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response); 10210 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response); 10211 if (rc2 || shdr_status || shdr_add_status) { 10212 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10213 "3026 Mailbox failed , mbxCmd x%x " 10214 "GET_FUNCTION_CONFIG, mbxStatus x%x\n", 10215 bf_get(lpfc_mqe_command, &pmb->u.mqe), 10216 bf_get(lpfc_mqe_status, &pmb->u.mqe)); 10217 goto read_cfg_out; 10218 } 10219 10220 /* search for fc_fcoe resrouce descriptor */ 10221 get_func_cfg = &pmb->u.mqe.un.get_func_cfg; 10222 10223 pdesc_0 = (char *)&get_func_cfg->func_cfg.desc[0]; 10224 desc = (struct lpfc_rsrc_desc_fcfcoe *)pdesc_0; 10225 length = bf_get(lpfc_rsrc_desc_fcfcoe_length, desc); 10226 if (length == LPFC_RSRC_DESC_TYPE_FCFCOE_V0_RSVD) 10227 length = LPFC_RSRC_DESC_TYPE_FCFCOE_V0_LENGTH; 10228 else if (length != LPFC_RSRC_DESC_TYPE_FCFCOE_V1_LENGTH) 10229 goto read_cfg_out; 10230 10231 for (i = 0; i < LPFC_RSRC_DESC_MAX_NUM; i++) { 10232 desc = (struct lpfc_rsrc_desc_fcfcoe *)(pdesc_0 + length * i); 10233 if (LPFC_RSRC_DESC_TYPE_FCFCOE == 10234 bf_get(lpfc_rsrc_desc_fcfcoe_type, desc)) { 10235 phba->sli4_hba.iov.pf_number = 10236 bf_get(lpfc_rsrc_desc_fcfcoe_pfnum, desc); 10237 phba->sli4_hba.iov.vf_number = 10238 bf_get(lpfc_rsrc_desc_fcfcoe_vfnum, desc); 10239 break; 10240 } 10241 } 10242 10243 if (i < LPFC_RSRC_DESC_MAX_NUM) 10244 lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 10245 "3027 GET_FUNCTION_CONFIG: pf_number:%d, " 10246 "vf_number:%d\n", phba->sli4_hba.iov.pf_number, 10247 phba->sli4_hba.iov.vf_number); 10248 else 10249 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10250 "3028 GET_FUNCTION_CONFIG: failed to find " 10251 "Resource Descriptor:x%x\n", 10252 LPFC_RSRC_DESC_TYPE_FCFCOE); 10253 10254 read_cfg_out: 10255 mempool_free(pmb, phba->mbox_mem_pool); 10256 return rc; 10257 } 10258 10259 /** 10260 * lpfc_setup_endian_order - Write endian order to an SLI4 if_type 0 port. 10261 * @phba: pointer to lpfc hba data structure. 10262 * 10263 * This routine is invoked to setup the port-side endian order when 10264 * the port if_type is 0. This routine has no function for other 10265 * if_types. 10266 * 10267 * Return codes 10268 * 0 - successful 10269 * -ENOMEM - No available memory 10270 * -EIO - The mailbox failed to complete successfully. 10271 **/ 10272 static int 10273 lpfc_setup_endian_order(struct lpfc_hba *phba) 10274 { 10275 LPFC_MBOXQ_t *mboxq; 10276 uint32_t if_type, rc = 0; 10277 uint32_t endian_mb_data[2] = {HOST_ENDIAN_LOW_WORD0, 10278 HOST_ENDIAN_HIGH_WORD1}; 10279 10280 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf); 10281 switch (if_type) { 10282 case LPFC_SLI_INTF_IF_TYPE_0: 10283 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, 10284 GFP_KERNEL); 10285 if (!mboxq) { 10286 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10287 "0492 Unable to allocate memory for " 10288 "issuing SLI_CONFIG_SPECIAL mailbox " 10289 "command\n"); 10290 return -ENOMEM; 10291 } 10292 10293 /* 10294 * The SLI4_CONFIG_SPECIAL mailbox command requires the first 10295 * two words to contain special data values and no other data. 10296 */ 10297 memset(mboxq, 0, sizeof(LPFC_MBOXQ_t)); 10298 memcpy(&mboxq->u.mqe, &endian_mb_data, sizeof(endian_mb_data)); 10299 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); 10300 if (rc != MBX_SUCCESS) { 10301 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10302 "0493 SLI_CONFIG_SPECIAL mailbox " 10303 "failed with status x%x\n", 10304 rc); 10305 rc = -EIO; 10306 } 10307 mempool_free(mboxq, phba->mbox_mem_pool); 10308 break; 10309 case LPFC_SLI_INTF_IF_TYPE_6: 10310 case LPFC_SLI_INTF_IF_TYPE_2: 10311 case LPFC_SLI_INTF_IF_TYPE_1: 10312 default: 10313 break; 10314 } 10315 return rc; 10316 } 10317 10318 /** 10319 * lpfc_sli4_queue_verify - Verify and update EQ counts 10320 * @phba: pointer to lpfc hba data structure. 10321 * 10322 * This routine is invoked to check the user settable queue counts for EQs. 10323 * After this routine is called the counts will be set to valid values that 10324 * adhere to the constraints of the system's interrupt vectors and the port's 10325 * queue resources. 10326 * 10327 * Return codes 10328 * 0 - successful 10329 * -ENOMEM - No available memory 10330 **/ 10331 static int 10332 lpfc_sli4_queue_verify(struct lpfc_hba *phba) 10333 { 10334 /* 10335 * Sanity check for configured queue parameters against the run-time 10336 * device parameters 10337 */ 10338 10339 if (phba->nvmet_support) { 10340 if (phba->cfg_hdw_queue < phba->cfg_nvmet_mrq) 10341 phba->cfg_nvmet_mrq = phba->cfg_hdw_queue; 10342 if (phba->cfg_nvmet_mrq > LPFC_NVMET_MRQ_MAX) 10343 phba->cfg_nvmet_mrq = LPFC_NVMET_MRQ_MAX; 10344 } 10345 10346 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 10347 "2574 IO channels: hdwQ %d IRQ %d MRQ: %d\n", 10348 phba->cfg_hdw_queue, phba->cfg_irq_chann, 10349 phba->cfg_nvmet_mrq); 10350 10351 /* Get EQ depth from module parameter, fake the default for now */ 10352 phba->sli4_hba.eq_esize = LPFC_EQE_SIZE_4B; 10353 phba->sli4_hba.eq_ecount = LPFC_EQE_DEF_COUNT; 10354 10355 /* Get CQ depth from module parameter, fake the default for now */ 10356 phba->sli4_hba.cq_esize = LPFC_CQE_SIZE; 10357 phba->sli4_hba.cq_ecount = LPFC_CQE_DEF_COUNT; 10358 return 0; 10359 } 10360 10361 static int 10362 lpfc_alloc_io_wq_cq(struct lpfc_hba *phba, int idx) 10363 { 10364 struct lpfc_queue *qdesc; 10365 u32 wqesize; 10366 int cpu; 10367 10368 cpu = lpfc_find_cpu_handle(phba, idx, LPFC_FIND_BY_HDWQ); 10369 /* Create Fast Path IO CQs */ 10370 if (phba->enab_exp_wqcq_pages) 10371 /* Increase the CQ size when WQEs contain an embedded cdb */ 10372 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_EXPANDED_PAGE_SIZE, 10373 phba->sli4_hba.cq_esize, 10374 LPFC_CQE_EXP_COUNT, cpu); 10375 10376 else 10377 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, 10378 phba->sli4_hba.cq_esize, 10379 phba->sli4_hba.cq_ecount, cpu); 10380 if (!qdesc) { 10381 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10382 "0499 Failed allocate fast-path IO CQ (%d)\n", 10383 idx); 10384 return 1; 10385 } 10386 qdesc->qe_valid = 1; 10387 qdesc->hdwq = idx; 10388 qdesc->chann = cpu; 10389 phba->sli4_hba.hdwq[idx].io_cq = qdesc; 10390 10391 /* Create Fast Path IO WQs */ 10392 if (phba->enab_exp_wqcq_pages) { 10393 /* Increase the WQ size when WQEs contain an embedded cdb */ 10394 wqesize = (phba->fcp_embed_io) ? 10395 LPFC_WQE128_SIZE : phba->sli4_hba.wq_esize; 10396 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_EXPANDED_PAGE_SIZE, 10397 wqesize, 10398 LPFC_WQE_EXP_COUNT, cpu); 10399 } else 10400 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, 10401 phba->sli4_hba.wq_esize, 10402 phba->sli4_hba.wq_ecount, cpu); 10403 10404 if (!qdesc) { 10405 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10406 "0503 Failed allocate fast-path IO WQ (%d)\n", 10407 idx); 10408 return 1; 10409 } 10410 qdesc->hdwq = idx; 10411 qdesc->chann = cpu; 10412 phba->sli4_hba.hdwq[idx].io_wq = qdesc; 10413 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list); 10414 return 0; 10415 } 10416 10417 /** 10418 * lpfc_sli4_queue_create - Create all the SLI4 queues 10419 * @phba: pointer to lpfc hba data structure. 10420 * 10421 * This routine is invoked to allocate all the SLI4 queues for the FCoE HBA 10422 * operation. For each SLI4 queue type, the parameters such as queue entry 10423 * count (queue depth) shall be taken from the module parameter. For now, 10424 * we just use some constant number as place holder. 10425 * 10426 * Return codes 10427 * 0 - successful 10428 * -ENOMEM - No availble memory 10429 * -EIO - The mailbox failed to complete successfully. 10430 **/ 10431 int 10432 lpfc_sli4_queue_create(struct lpfc_hba *phba) 10433 { 10434 struct lpfc_queue *qdesc; 10435 int idx, cpu, eqcpu; 10436 struct lpfc_sli4_hdw_queue *qp; 10437 struct lpfc_vector_map_info *cpup; 10438 struct lpfc_vector_map_info *eqcpup; 10439 struct lpfc_eq_intr_info *eqi; 10440 u32 wqesize; 10441 10442 /* 10443 * Create HBA Record arrays. 10444 * Both NVME and FCP will share that same vectors / EQs 10445 */ 10446 phba->sli4_hba.mq_esize = LPFC_MQE_SIZE; 10447 phba->sli4_hba.mq_ecount = LPFC_MQE_DEF_COUNT; 10448 phba->sli4_hba.wq_esize = LPFC_WQE_SIZE; 10449 phba->sli4_hba.wq_ecount = LPFC_WQE_DEF_COUNT; 10450 phba->sli4_hba.rq_esize = LPFC_RQE_SIZE; 10451 phba->sli4_hba.rq_ecount = LPFC_RQE_DEF_COUNT; 10452 phba->sli4_hba.eq_esize = LPFC_EQE_SIZE_4B; 10453 phba->sli4_hba.eq_ecount = LPFC_EQE_DEF_COUNT; 10454 phba->sli4_hba.cq_esize = LPFC_CQE_SIZE; 10455 phba->sli4_hba.cq_ecount = LPFC_CQE_DEF_COUNT; 10456 10457 if (!phba->sli4_hba.hdwq) { 10458 phba->sli4_hba.hdwq = kcalloc( 10459 phba->cfg_hdw_queue, sizeof(struct lpfc_sli4_hdw_queue), 10460 GFP_KERNEL); 10461 if (!phba->sli4_hba.hdwq) { 10462 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10463 "6427 Failed allocate memory for " 10464 "fast-path Hardware Queue array\n"); 10465 goto out_error; 10466 } 10467 /* Prepare hardware queues to take IO buffers */ 10468 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { 10469 qp = &phba->sli4_hba.hdwq[idx]; 10470 spin_lock_init(&qp->io_buf_list_get_lock); 10471 spin_lock_init(&qp->io_buf_list_put_lock); 10472 INIT_LIST_HEAD(&qp->lpfc_io_buf_list_get); 10473 INIT_LIST_HEAD(&qp->lpfc_io_buf_list_put); 10474 qp->get_io_bufs = 0; 10475 qp->put_io_bufs = 0; 10476 qp->total_io_bufs = 0; 10477 spin_lock_init(&qp->abts_io_buf_list_lock); 10478 INIT_LIST_HEAD(&qp->lpfc_abts_io_buf_list); 10479 qp->abts_scsi_io_bufs = 0; 10480 qp->abts_nvme_io_bufs = 0; 10481 INIT_LIST_HEAD(&qp->sgl_list); 10482 INIT_LIST_HEAD(&qp->cmd_rsp_buf_list); 10483 spin_lock_init(&qp->hdwq_lock); 10484 } 10485 } 10486 10487 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 10488 if (phba->nvmet_support) { 10489 phba->sli4_hba.nvmet_cqset = kcalloc( 10490 phba->cfg_nvmet_mrq, 10491 sizeof(struct lpfc_queue *), 10492 GFP_KERNEL); 10493 if (!phba->sli4_hba.nvmet_cqset) { 10494 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10495 "3121 Fail allocate memory for " 10496 "fast-path CQ set array\n"); 10497 goto out_error; 10498 } 10499 phba->sli4_hba.nvmet_mrq_hdr = kcalloc( 10500 phba->cfg_nvmet_mrq, 10501 sizeof(struct lpfc_queue *), 10502 GFP_KERNEL); 10503 if (!phba->sli4_hba.nvmet_mrq_hdr) { 10504 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10505 "3122 Fail allocate memory for " 10506 "fast-path RQ set hdr array\n"); 10507 goto out_error; 10508 } 10509 phba->sli4_hba.nvmet_mrq_data = kcalloc( 10510 phba->cfg_nvmet_mrq, 10511 sizeof(struct lpfc_queue *), 10512 GFP_KERNEL); 10513 if (!phba->sli4_hba.nvmet_mrq_data) { 10514 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10515 "3124 Fail allocate memory for " 10516 "fast-path RQ set data array\n"); 10517 goto out_error; 10518 } 10519 } 10520 } 10521 10522 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_wq_list); 10523 10524 /* Create HBA Event Queues (EQs) */ 10525 for_each_present_cpu(cpu) { 10526 /* We only want to create 1 EQ per vector, even though 10527 * multiple CPUs might be using that vector. so only 10528 * selects the CPUs that are LPFC_CPU_FIRST_IRQ. 10529 */ 10530 cpup = &phba->sli4_hba.cpu_map[cpu]; 10531 if (!(cpup->flag & LPFC_CPU_FIRST_IRQ)) 10532 continue; 10533 10534 /* Get a ptr to the Hardware Queue associated with this CPU */ 10535 qp = &phba->sli4_hba.hdwq[cpup->hdwq]; 10536 10537 /* Allocate an EQ */ 10538 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, 10539 phba->sli4_hba.eq_esize, 10540 phba->sli4_hba.eq_ecount, cpu); 10541 if (!qdesc) { 10542 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10543 "0497 Failed allocate EQ (%d)\n", 10544 cpup->hdwq); 10545 goto out_error; 10546 } 10547 qdesc->qe_valid = 1; 10548 qdesc->hdwq = cpup->hdwq; 10549 qdesc->chann = cpu; /* First CPU this EQ is affinitized to */ 10550 qdesc->last_cpu = qdesc->chann; 10551 10552 /* Save the allocated EQ in the Hardware Queue */ 10553 qp->hba_eq = qdesc; 10554 10555 eqi = per_cpu_ptr(phba->sli4_hba.eq_info, qdesc->last_cpu); 10556 list_add(&qdesc->cpu_list, &eqi->list); 10557 } 10558 10559 /* Now we need to populate the other Hardware Queues, that share 10560 * an IRQ vector, with the associated EQ ptr. 10561 */ 10562 for_each_present_cpu(cpu) { 10563 cpup = &phba->sli4_hba.cpu_map[cpu]; 10564 10565 /* Check for EQ already allocated in previous loop */ 10566 if (cpup->flag & LPFC_CPU_FIRST_IRQ) 10567 continue; 10568 10569 /* Check for multiple CPUs per hdwq */ 10570 qp = &phba->sli4_hba.hdwq[cpup->hdwq]; 10571 if (qp->hba_eq) 10572 continue; 10573 10574 /* We need to share an EQ for this hdwq */ 10575 eqcpu = lpfc_find_cpu_handle(phba, cpup->eq, LPFC_FIND_BY_EQ); 10576 eqcpup = &phba->sli4_hba.cpu_map[eqcpu]; 10577 qp->hba_eq = phba->sli4_hba.hdwq[eqcpup->hdwq].hba_eq; 10578 } 10579 10580 /* Allocate IO Path SLI4 CQ/WQs */ 10581 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { 10582 if (lpfc_alloc_io_wq_cq(phba, idx)) 10583 goto out_error; 10584 } 10585 10586 if (phba->nvmet_support) { 10587 for (idx = 0; idx < phba->cfg_nvmet_mrq; idx++) { 10588 cpu = lpfc_find_cpu_handle(phba, idx, 10589 LPFC_FIND_BY_HDWQ); 10590 qdesc = lpfc_sli4_queue_alloc(phba, 10591 LPFC_DEFAULT_PAGE_SIZE, 10592 phba->sli4_hba.cq_esize, 10593 phba->sli4_hba.cq_ecount, 10594 cpu); 10595 if (!qdesc) { 10596 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10597 "3142 Failed allocate NVME " 10598 "CQ Set (%d)\n", idx); 10599 goto out_error; 10600 } 10601 qdesc->qe_valid = 1; 10602 qdesc->hdwq = idx; 10603 qdesc->chann = cpu; 10604 phba->sli4_hba.nvmet_cqset[idx] = qdesc; 10605 } 10606 } 10607 10608 /* 10609 * Create Slow Path Completion Queues (CQs) 10610 */ 10611 10612 cpu = lpfc_find_cpu_handle(phba, 0, LPFC_FIND_BY_EQ); 10613 /* Create slow-path Mailbox Command Complete Queue */ 10614 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, 10615 phba->sli4_hba.cq_esize, 10616 phba->sli4_hba.cq_ecount, cpu); 10617 if (!qdesc) { 10618 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10619 "0500 Failed allocate slow-path mailbox CQ\n"); 10620 goto out_error; 10621 } 10622 qdesc->qe_valid = 1; 10623 phba->sli4_hba.mbx_cq = qdesc; 10624 10625 /* Create slow-path ELS Complete Queue */ 10626 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, 10627 phba->sli4_hba.cq_esize, 10628 phba->sli4_hba.cq_ecount, cpu); 10629 if (!qdesc) { 10630 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10631 "0501 Failed allocate slow-path ELS CQ\n"); 10632 goto out_error; 10633 } 10634 qdesc->qe_valid = 1; 10635 qdesc->chann = cpu; 10636 phba->sli4_hba.els_cq = qdesc; 10637 10638 10639 /* 10640 * Create Slow Path Work Queues (WQs) 10641 */ 10642 10643 /* Create Mailbox Command Queue */ 10644 10645 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, 10646 phba->sli4_hba.mq_esize, 10647 phba->sli4_hba.mq_ecount, cpu); 10648 if (!qdesc) { 10649 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10650 "0505 Failed allocate slow-path MQ\n"); 10651 goto out_error; 10652 } 10653 qdesc->chann = cpu; 10654 phba->sli4_hba.mbx_wq = qdesc; 10655 10656 /* 10657 * Create ELS Work Queues 10658 */ 10659 10660 /* 10661 * Create slow-path ELS Work Queue. 10662 * Increase the ELS WQ size when WQEs contain an embedded cdb 10663 */ 10664 wqesize = (phba->fcp_embed_io) ? 10665 LPFC_WQE128_SIZE : phba->sli4_hba.wq_esize; 10666 10667 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, 10668 wqesize, 10669 phba->sli4_hba.wq_ecount, cpu); 10670 if (!qdesc) { 10671 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10672 "0504 Failed allocate slow-path ELS WQ\n"); 10673 goto out_error; 10674 } 10675 qdesc->chann = cpu; 10676 phba->sli4_hba.els_wq = qdesc; 10677 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list); 10678 10679 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 10680 /* Create NVME LS Complete Queue */ 10681 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, 10682 phba->sli4_hba.cq_esize, 10683 phba->sli4_hba.cq_ecount, cpu); 10684 if (!qdesc) { 10685 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10686 "6079 Failed allocate NVME LS CQ\n"); 10687 goto out_error; 10688 } 10689 qdesc->chann = cpu; 10690 qdesc->qe_valid = 1; 10691 phba->sli4_hba.nvmels_cq = qdesc; 10692 10693 /* Create NVME LS Work Queue */ 10694 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, 10695 phba->sli4_hba.wq_esize, 10696 phba->sli4_hba.wq_ecount, cpu); 10697 if (!qdesc) { 10698 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10699 "6080 Failed allocate NVME LS WQ\n"); 10700 goto out_error; 10701 } 10702 qdesc->chann = cpu; 10703 phba->sli4_hba.nvmels_wq = qdesc; 10704 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list); 10705 } 10706 10707 /* 10708 * Create Receive Queue (RQ) 10709 */ 10710 10711 /* Create Receive Queue for header */ 10712 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, 10713 phba->sli4_hba.rq_esize, 10714 phba->sli4_hba.rq_ecount, cpu); 10715 if (!qdesc) { 10716 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10717 "0506 Failed allocate receive HRQ\n"); 10718 goto out_error; 10719 } 10720 phba->sli4_hba.hdr_rq = qdesc; 10721 10722 /* Create Receive Queue for data */ 10723 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE, 10724 phba->sli4_hba.rq_esize, 10725 phba->sli4_hba.rq_ecount, cpu); 10726 if (!qdesc) { 10727 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10728 "0507 Failed allocate receive DRQ\n"); 10729 goto out_error; 10730 } 10731 phba->sli4_hba.dat_rq = qdesc; 10732 10733 if ((phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) && 10734 phba->nvmet_support) { 10735 for (idx = 0; idx < phba->cfg_nvmet_mrq; idx++) { 10736 cpu = lpfc_find_cpu_handle(phba, idx, 10737 LPFC_FIND_BY_HDWQ); 10738 /* Create NVMET Receive Queue for header */ 10739 qdesc = lpfc_sli4_queue_alloc(phba, 10740 LPFC_DEFAULT_PAGE_SIZE, 10741 phba->sli4_hba.rq_esize, 10742 LPFC_NVMET_RQE_DEF_COUNT, 10743 cpu); 10744 if (!qdesc) { 10745 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10746 "3146 Failed allocate " 10747 "receive HRQ\n"); 10748 goto out_error; 10749 } 10750 qdesc->hdwq = idx; 10751 phba->sli4_hba.nvmet_mrq_hdr[idx] = qdesc; 10752 10753 /* Only needed for header of RQ pair */ 10754 qdesc->rqbp = kzalloc_node(sizeof(*qdesc->rqbp), 10755 GFP_KERNEL, 10756 cpu_to_node(cpu)); 10757 if (qdesc->rqbp == NULL) { 10758 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10759 "6131 Failed allocate " 10760 "Header RQBP\n"); 10761 goto out_error; 10762 } 10763 10764 /* Put list in known state in case driver load fails. */ 10765 INIT_LIST_HEAD(&qdesc->rqbp->rqb_buffer_list); 10766 10767 /* Create NVMET Receive Queue for data */ 10768 qdesc = lpfc_sli4_queue_alloc(phba, 10769 LPFC_DEFAULT_PAGE_SIZE, 10770 phba->sli4_hba.rq_esize, 10771 LPFC_NVMET_RQE_DEF_COUNT, 10772 cpu); 10773 if (!qdesc) { 10774 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10775 "3156 Failed allocate " 10776 "receive DRQ\n"); 10777 goto out_error; 10778 } 10779 qdesc->hdwq = idx; 10780 phba->sli4_hba.nvmet_mrq_data[idx] = qdesc; 10781 } 10782 } 10783 10784 /* Clear NVME stats */ 10785 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 10786 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { 10787 memset(&phba->sli4_hba.hdwq[idx].nvme_cstat, 0, 10788 sizeof(phba->sli4_hba.hdwq[idx].nvme_cstat)); 10789 } 10790 } 10791 10792 /* Clear SCSI stats */ 10793 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) { 10794 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { 10795 memset(&phba->sli4_hba.hdwq[idx].scsi_cstat, 0, 10796 sizeof(phba->sli4_hba.hdwq[idx].scsi_cstat)); 10797 } 10798 } 10799 10800 return 0; 10801 10802 out_error: 10803 lpfc_sli4_queue_destroy(phba); 10804 return -ENOMEM; 10805 } 10806 10807 static inline void 10808 __lpfc_sli4_release_queue(struct lpfc_queue **qp) 10809 { 10810 if (*qp != NULL) { 10811 lpfc_sli4_queue_free(*qp); 10812 *qp = NULL; 10813 } 10814 } 10815 10816 static inline void 10817 lpfc_sli4_release_queues(struct lpfc_queue ***qs, int max) 10818 { 10819 int idx; 10820 10821 if (*qs == NULL) 10822 return; 10823 10824 for (idx = 0; idx < max; idx++) 10825 __lpfc_sli4_release_queue(&(*qs)[idx]); 10826 10827 kfree(*qs); 10828 *qs = NULL; 10829 } 10830 10831 static inline void 10832 lpfc_sli4_release_hdwq(struct lpfc_hba *phba) 10833 { 10834 struct lpfc_sli4_hdw_queue *hdwq; 10835 struct lpfc_queue *eq; 10836 uint32_t idx; 10837 10838 hdwq = phba->sli4_hba.hdwq; 10839 10840 /* Loop thru all Hardware Queues */ 10841 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { 10842 /* Free the CQ/WQ corresponding to the Hardware Queue */ 10843 lpfc_sli4_queue_free(hdwq[idx].io_cq); 10844 lpfc_sli4_queue_free(hdwq[idx].io_wq); 10845 hdwq[idx].hba_eq = NULL; 10846 hdwq[idx].io_cq = NULL; 10847 hdwq[idx].io_wq = NULL; 10848 if (phba->cfg_xpsgl && !phba->nvmet_support) 10849 lpfc_free_sgl_per_hdwq(phba, &hdwq[idx]); 10850 lpfc_free_cmd_rsp_buf_per_hdwq(phba, &hdwq[idx]); 10851 } 10852 /* Loop thru all IRQ vectors */ 10853 for (idx = 0; idx < phba->cfg_irq_chann; idx++) { 10854 /* Free the EQ corresponding to the IRQ vector */ 10855 eq = phba->sli4_hba.hba_eq_hdl[idx].eq; 10856 lpfc_sli4_queue_free(eq); 10857 phba->sli4_hba.hba_eq_hdl[idx].eq = NULL; 10858 } 10859 } 10860 10861 /** 10862 * lpfc_sli4_queue_destroy - Destroy all the SLI4 queues 10863 * @phba: pointer to lpfc hba data structure. 10864 * 10865 * This routine is invoked to release all the SLI4 queues with the FCoE HBA 10866 * operation. 10867 * 10868 * Return codes 10869 * 0 - successful 10870 * -ENOMEM - No available memory 10871 * -EIO - The mailbox failed to complete successfully. 10872 **/ 10873 void 10874 lpfc_sli4_queue_destroy(struct lpfc_hba *phba) 10875 { 10876 /* 10877 * Set FREE_INIT before beginning to free the queues. 10878 * Wait until the users of queues to acknowledge to 10879 * release queues by clearing FREE_WAIT. 10880 */ 10881 spin_lock_irq(&phba->hbalock); 10882 phba->sli.sli_flag |= LPFC_QUEUE_FREE_INIT; 10883 while (phba->sli.sli_flag & LPFC_QUEUE_FREE_WAIT) { 10884 spin_unlock_irq(&phba->hbalock); 10885 msleep(20); 10886 spin_lock_irq(&phba->hbalock); 10887 } 10888 spin_unlock_irq(&phba->hbalock); 10889 10890 lpfc_sli4_cleanup_poll_list(phba); 10891 10892 /* Release HBA eqs */ 10893 if (phba->sli4_hba.hdwq) 10894 lpfc_sli4_release_hdwq(phba); 10895 10896 if (phba->nvmet_support) { 10897 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_cqset, 10898 phba->cfg_nvmet_mrq); 10899 10900 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_mrq_hdr, 10901 phba->cfg_nvmet_mrq); 10902 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_mrq_data, 10903 phba->cfg_nvmet_mrq); 10904 } 10905 10906 /* Release mailbox command work queue */ 10907 __lpfc_sli4_release_queue(&phba->sli4_hba.mbx_wq); 10908 10909 /* Release ELS work queue */ 10910 __lpfc_sli4_release_queue(&phba->sli4_hba.els_wq); 10911 10912 /* Release ELS work queue */ 10913 __lpfc_sli4_release_queue(&phba->sli4_hba.nvmels_wq); 10914 10915 /* Release unsolicited receive queue */ 10916 __lpfc_sli4_release_queue(&phba->sli4_hba.hdr_rq); 10917 __lpfc_sli4_release_queue(&phba->sli4_hba.dat_rq); 10918 10919 /* Release ELS complete queue */ 10920 __lpfc_sli4_release_queue(&phba->sli4_hba.els_cq); 10921 10922 /* Release NVME LS complete queue */ 10923 __lpfc_sli4_release_queue(&phba->sli4_hba.nvmels_cq); 10924 10925 /* Release mailbox command complete queue */ 10926 __lpfc_sli4_release_queue(&phba->sli4_hba.mbx_cq); 10927 10928 /* Everything on this list has been freed */ 10929 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_wq_list); 10930 10931 /* Done with freeing the queues */ 10932 spin_lock_irq(&phba->hbalock); 10933 phba->sli.sli_flag &= ~LPFC_QUEUE_FREE_INIT; 10934 spin_unlock_irq(&phba->hbalock); 10935 } 10936 10937 int 10938 lpfc_free_rq_buffer(struct lpfc_hba *phba, struct lpfc_queue *rq) 10939 { 10940 struct lpfc_rqb *rqbp; 10941 struct lpfc_dmabuf *h_buf; 10942 struct rqb_dmabuf *rqb_buffer; 10943 10944 rqbp = rq->rqbp; 10945 while (!list_empty(&rqbp->rqb_buffer_list)) { 10946 list_remove_head(&rqbp->rqb_buffer_list, h_buf, 10947 struct lpfc_dmabuf, list); 10948 10949 rqb_buffer = container_of(h_buf, struct rqb_dmabuf, hbuf); 10950 (rqbp->rqb_free_buffer)(phba, rqb_buffer); 10951 rqbp->buffer_count--; 10952 } 10953 return 1; 10954 } 10955 10956 static int 10957 lpfc_create_wq_cq(struct lpfc_hba *phba, struct lpfc_queue *eq, 10958 struct lpfc_queue *cq, struct lpfc_queue *wq, uint16_t *cq_map, 10959 int qidx, uint32_t qtype) 10960 { 10961 struct lpfc_sli_ring *pring; 10962 int rc; 10963 10964 if (!eq || !cq || !wq) { 10965 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10966 "6085 Fast-path %s (%d) not allocated\n", 10967 ((eq) ? ((cq) ? "WQ" : "CQ") : "EQ"), qidx); 10968 return -ENOMEM; 10969 } 10970 10971 /* create the Cq first */ 10972 rc = lpfc_cq_create(phba, cq, eq, 10973 (qtype == LPFC_MBOX) ? LPFC_MCQ : LPFC_WCQ, qtype); 10974 if (rc) { 10975 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10976 "6086 Failed setup of CQ (%d), rc = 0x%x\n", 10977 qidx, (uint32_t)rc); 10978 return rc; 10979 } 10980 10981 if (qtype != LPFC_MBOX) { 10982 /* Setup cq_map for fast lookup */ 10983 if (cq_map) 10984 *cq_map = cq->queue_id; 10985 10986 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 10987 "6087 CQ setup: cq[%d]-id=%d, parent eq[%d]-id=%d\n", 10988 qidx, cq->queue_id, qidx, eq->queue_id); 10989 10990 /* create the wq */ 10991 rc = lpfc_wq_create(phba, wq, cq, qtype); 10992 if (rc) { 10993 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 10994 "4618 Fail setup fastpath WQ (%d), rc = 0x%x\n", 10995 qidx, (uint32_t)rc); 10996 /* no need to tear down cq - caller will do so */ 10997 return rc; 10998 } 10999 11000 /* Bind this CQ/WQ to the NVME ring */ 11001 pring = wq->pring; 11002 pring->sli.sli4.wqp = (void *)wq; 11003 cq->pring = pring; 11004 11005 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 11006 "2593 WQ setup: wq[%d]-id=%d assoc=%d, cq[%d]-id=%d\n", 11007 qidx, wq->queue_id, wq->assoc_qid, qidx, cq->queue_id); 11008 } else { 11009 rc = lpfc_mq_create(phba, wq, cq, LPFC_MBOX); 11010 if (rc) { 11011 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11012 "0539 Failed setup of slow-path MQ: " 11013 "rc = 0x%x\n", rc); 11014 /* no need to tear down cq - caller will do so */ 11015 return rc; 11016 } 11017 11018 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 11019 "2589 MBX MQ setup: wq-id=%d, parent cq-id=%d\n", 11020 phba->sli4_hba.mbx_wq->queue_id, 11021 phba->sli4_hba.mbx_cq->queue_id); 11022 } 11023 11024 return 0; 11025 } 11026 11027 /** 11028 * lpfc_setup_cq_lookup - Setup the CQ lookup table 11029 * @phba: pointer to lpfc hba data structure. 11030 * 11031 * This routine will populate the cq_lookup table by all 11032 * available CQ queue_id's. 11033 **/ 11034 static void 11035 lpfc_setup_cq_lookup(struct lpfc_hba *phba) 11036 { 11037 struct lpfc_queue *eq, *childq; 11038 int qidx; 11039 11040 memset(phba->sli4_hba.cq_lookup, 0, 11041 (sizeof(struct lpfc_queue *) * (phba->sli4_hba.cq_max + 1))); 11042 /* Loop thru all IRQ vectors */ 11043 for (qidx = 0; qidx < phba->cfg_irq_chann; qidx++) { 11044 /* Get the EQ corresponding to the IRQ vector */ 11045 eq = phba->sli4_hba.hba_eq_hdl[qidx].eq; 11046 if (!eq) 11047 continue; 11048 /* Loop through all CQs associated with that EQ */ 11049 list_for_each_entry(childq, &eq->child_list, list) { 11050 if (childq->queue_id > phba->sli4_hba.cq_max) 11051 continue; 11052 if (childq->subtype == LPFC_IO) 11053 phba->sli4_hba.cq_lookup[childq->queue_id] = 11054 childq; 11055 } 11056 } 11057 } 11058 11059 /** 11060 * lpfc_sli4_queue_setup - Set up all the SLI4 queues 11061 * @phba: pointer to lpfc hba data structure. 11062 * 11063 * This routine is invoked to set up all the SLI4 queues for the FCoE HBA 11064 * operation. 11065 * 11066 * Return codes 11067 * 0 - successful 11068 * -ENOMEM - No available memory 11069 * -EIO - The mailbox failed to complete successfully. 11070 **/ 11071 int 11072 lpfc_sli4_queue_setup(struct lpfc_hba *phba) 11073 { 11074 uint32_t shdr_status, shdr_add_status; 11075 union lpfc_sli4_cfg_shdr *shdr; 11076 struct lpfc_vector_map_info *cpup; 11077 struct lpfc_sli4_hdw_queue *qp; 11078 LPFC_MBOXQ_t *mboxq; 11079 int qidx, cpu; 11080 uint32_t length, usdelay; 11081 int rc = -ENOMEM; 11082 11083 /* Check for dual-ULP support */ 11084 mboxq = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 11085 if (!mboxq) { 11086 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11087 "3249 Unable to allocate memory for " 11088 "QUERY_FW_CFG mailbox command\n"); 11089 return -ENOMEM; 11090 } 11091 length = (sizeof(struct lpfc_mbx_query_fw_config) - 11092 sizeof(struct lpfc_sli4_cfg_mhdr)); 11093 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON, 11094 LPFC_MBOX_OPCODE_QUERY_FW_CFG, 11095 length, LPFC_SLI4_MBX_EMBED); 11096 11097 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); 11098 11099 shdr = (union lpfc_sli4_cfg_shdr *) 11100 &mboxq->u.mqe.un.sli4_config.header.cfg_shdr; 11101 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response); 11102 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response); 11103 if (shdr_status || shdr_add_status || rc) { 11104 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11105 "3250 QUERY_FW_CFG mailbox failed with status " 11106 "x%x add_status x%x, mbx status x%x\n", 11107 shdr_status, shdr_add_status, rc); 11108 mempool_free(mboxq, phba->mbox_mem_pool); 11109 rc = -ENXIO; 11110 goto out_error; 11111 } 11112 11113 phba->sli4_hba.fw_func_mode = 11114 mboxq->u.mqe.un.query_fw_cfg.rsp.function_mode; 11115 phba->sli4_hba.physical_port = 11116 mboxq->u.mqe.un.query_fw_cfg.rsp.physical_port; 11117 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 11118 "3251 QUERY_FW_CFG: func_mode:x%x\n", 11119 phba->sli4_hba.fw_func_mode); 11120 11121 mempool_free(mboxq, phba->mbox_mem_pool); 11122 11123 /* 11124 * Set up HBA Event Queues (EQs) 11125 */ 11126 qp = phba->sli4_hba.hdwq; 11127 11128 /* Set up HBA event queue */ 11129 if (!qp) { 11130 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11131 "3147 Fast-path EQs not allocated\n"); 11132 rc = -ENOMEM; 11133 goto out_error; 11134 } 11135 11136 /* Loop thru all IRQ vectors */ 11137 for (qidx = 0; qidx < phba->cfg_irq_chann; qidx++) { 11138 /* Create HBA Event Queues (EQs) in order */ 11139 for_each_present_cpu(cpu) { 11140 cpup = &phba->sli4_hba.cpu_map[cpu]; 11141 11142 /* Look for the CPU thats using that vector with 11143 * LPFC_CPU_FIRST_IRQ set. 11144 */ 11145 if (!(cpup->flag & LPFC_CPU_FIRST_IRQ)) 11146 continue; 11147 if (qidx != cpup->eq) 11148 continue; 11149 11150 /* Create an EQ for that vector */ 11151 rc = lpfc_eq_create(phba, qp[cpup->hdwq].hba_eq, 11152 phba->cfg_fcp_imax); 11153 if (rc) { 11154 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11155 "0523 Failed setup of fast-path" 11156 " EQ (%d), rc = 0x%x\n", 11157 cpup->eq, (uint32_t)rc); 11158 goto out_destroy; 11159 } 11160 11161 /* Save the EQ for that vector in the hba_eq_hdl */ 11162 phba->sli4_hba.hba_eq_hdl[cpup->eq].eq = 11163 qp[cpup->hdwq].hba_eq; 11164 11165 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 11166 "2584 HBA EQ setup: queue[%d]-id=%d\n", 11167 cpup->eq, 11168 qp[cpup->hdwq].hba_eq->queue_id); 11169 } 11170 } 11171 11172 /* Loop thru all Hardware Queues */ 11173 for (qidx = 0; qidx < phba->cfg_hdw_queue; qidx++) { 11174 cpu = lpfc_find_cpu_handle(phba, qidx, LPFC_FIND_BY_HDWQ); 11175 cpup = &phba->sli4_hba.cpu_map[cpu]; 11176 11177 /* Create the CQ/WQ corresponding to the Hardware Queue */ 11178 rc = lpfc_create_wq_cq(phba, 11179 phba->sli4_hba.hdwq[cpup->hdwq].hba_eq, 11180 qp[qidx].io_cq, 11181 qp[qidx].io_wq, 11182 &phba->sli4_hba.hdwq[qidx].io_cq_map, 11183 qidx, 11184 LPFC_IO); 11185 if (rc) { 11186 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11187 "0535 Failed to setup fastpath " 11188 "IO WQ/CQ (%d), rc = 0x%x\n", 11189 qidx, (uint32_t)rc); 11190 goto out_destroy; 11191 } 11192 } 11193 11194 /* 11195 * Set up Slow Path Complete Queues (CQs) 11196 */ 11197 11198 /* Set up slow-path MBOX CQ/MQ */ 11199 11200 if (!phba->sli4_hba.mbx_cq || !phba->sli4_hba.mbx_wq) { 11201 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11202 "0528 %s not allocated\n", 11203 phba->sli4_hba.mbx_cq ? 11204 "Mailbox WQ" : "Mailbox CQ"); 11205 rc = -ENOMEM; 11206 goto out_destroy; 11207 } 11208 11209 rc = lpfc_create_wq_cq(phba, qp[0].hba_eq, 11210 phba->sli4_hba.mbx_cq, 11211 phba->sli4_hba.mbx_wq, 11212 NULL, 0, LPFC_MBOX); 11213 if (rc) { 11214 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11215 "0529 Failed setup of mailbox WQ/CQ: rc = 0x%x\n", 11216 (uint32_t)rc); 11217 goto out_destroy; 11218 } 11219 if (phba->nvmet_support) { 11220 if (!phba->sli4_hba.nvmet_cqset) { 11221 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11222 "3165 Fast-path NVME CQ Set " 11223 "array not allocated\n"); 11224 rc = -ENOMEM; 11225 goto out_destroy; 11226 } 11227 if (phba->cfg_nvmet_mrq > 1) { 11228 rc = lpfc_cq_create_set(phba, 11229 phba->sli4_hba.nvmet_cqset, 11230 qp, 11231 LPFC_WCQ, LPFC_NVMET); 11232 if (rc) { 11233 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11234 "3164 Failed setup of NVME CQ " 11235 "Set, rc = 0x%x\n", 11236 (uint32_t)rc); 11237 goto out_destroy; 11238 } 11239 } else { 11240 /* Set up NVMET Receive Complete Queue */ 11241 rc = lpfc_cq_create(phba, phba->sli4_hba.nvmet_cqset[0], 11242 qp[0].hba_eq, 11243 LPFC_WCQ, LPFC_NVMET); 11244 if (rc) { 11245 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11246 "6089 Failed setup NVMET CQ: " 11247 "rc = 0x%x\n", (uint32_t)rc); 11248 goto out_destroy; 11249 } 11250 phba->sli4_hba.nvmet_cqset[0]->chann = 0; 11251 11252 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 11253 "6090 NVMET CQ setup: cq-id=%d, " 11254 "parent eq-id=%d\n", 11255 phba->sli4_hba.nvmet_cqset[0]->queue_id, 11256 qp[0].hba_eq->queue_id); 11257 } 11258 } 11259 11260 /* Set up slow-path ELS WQ/CQ */ 11261 if (!phba->sli4_hba.els_cq || !phba->sli4_hba.els_wq) { 11262 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11263 "0530 ELS %s not allocated\n", 11264 phba->sli4_hba.els_cq ? "WQ" : "CQ"); 11265 rc = -ENOMEM; 11266 goto out_destroy; 11267 } 11268 rc = lpfc_create_wq_cq(phba, qp[0].hba_eq, 11269 phba->sli4_hba.els_cq, 11270 phba->sli4_hba.els_wq, 11271 NULL, 0, LPFC_ELS); 11272 if (rc) { 11273 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11274 "0525 Failed setup of ELS WQ/CQ: rc = 0x%x\n", 11275 (uint32_t)rc); 11276 goto out_destroy; 11277 } 11278 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 11279 "2590 ELS WQ setup: wq-id=%d, parent cq-id=%d\n", 11280 phba->sli4_hba.els_wq->queue_id, 11281 phba->sli4_hba.els_cq->queue_id); 11282 11283 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 11284 /* Set up NVME LS Complete Queue */ 11285 if (!phba->sli4_hba.nvmels_cq || !phba->sli4_hba.nvmels_wq) { 11286 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11287 "6091 LS %s not allocated\n", 11288 phba->sli4_hba.nvmels_cq ? "WQ" : "CQ"); 11289 rc = -ENOMEM; 11290 goto out_destroy; 11291 } 11292 rc = lpfc_create_wq_cq(phba, qp[0].hba_eq, 11293 phba->sli4_hba.nvmels_cq, 11294 phba->sli4_hba.nvmels_wq, 11295 NULL, 0, LPFC_NVME_LS); 11296 if (rc) { 11297 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11298 "0526 Failed setup of NVVME LS WQ/CQ: " 11299 "rc = 0x%x\n", (uint32_t)rc); 11300 goto out_destroy; 11301 } 11302 11303 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 11304 "6096 ELS WQ setup: wq-id=%d, " 11305 "parent cq-id=%d\n", 11306 phba->sli4_hba.nvmels_wq->queue_id, 11307 phba->sli4_hba.nvmels_cq->queue_id); 11308 } 11309 11310 /* 11311 * Create NVMET Receive Queue (RQ) 11312 */ 11313 if (phba->nvmet_support) { 11314 if ((!phba->sli4_hba.nvmet_cqset) || 11315 (!phba->sli4_hba.nvmet_mrq_hdr) || 11316 (!phba->sli4_hba.nvmet_mrq_data)) { 11317 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11318 "6130 MRQ CQ Queues not " 11319 "allocated\n"); 11320 rc = -ENOMEM; 11321 goto out_destroy; 11322 } 11323 if (phba->cfg_nvmet_mrq > 1) { 11324 rc = lpfc_mrq_create(phba, 11325 phba->sli4_hba.nvmet_mrq_hdr, 11326 phba->sli4_hba.nvmet_mrq_data, 11327 phba->sli4_hba.nvmet_cqset, 11328 LPFC_NVMET); 11329 if (rc) { 11330 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11331 "6098 Failed setup of NVMET " 11332 "MRQ: rc = 0x%x\n", 11333 (uint32_t)rc); 11334 goto out_destroy; 11335 } 11336 11337 } else { 11338 rc = lpfc_rq_create(phba, 11339 phba->sli4_hba.nvmet_mrq_hdr[0], 11340 phba->sli4_hba.nvmet_mrq_data[0], 11341 phba->sli4_hba.nvmet_cqset[0], 11342 LPFC_NVMET); 11343 if (rc) { 11344 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11345 "6057 Failed setup of NVMET " 11346 "Receive Queue: rc = 0x%x\n", 11347 (uint32_t)rc); 11348 goto out_destroy; 11349 } 11350 11351 lpfc_printf_log( 11352 phba, KERN_INFO, LOG_INIT, 11353 "6099 NVMET RQ setup: hdr-rq-id=%d, " 11354 "dat-rq-id=%d parent cq-id=%d\n", 11355 phba->sli4_hba.nvmet_mrq_hdr[0]->queue_id, 11356 phba->sli4_hba.nvmet_mrq_data[0]->queue_id, 11357 phba->sli4_hba.nvmet_cqset[0]->queue_id); 11358 11359 } 11360 } 11361 11362 if (!phba->sli4_hba.hdr_rq || !phba->sli4_hba.dat_rq) { 11363 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11364 "0540 Receive Queue not allocated\n"); 11365 rc = -ENOMEM; 11366 goto out_destroy; 11367 } 11368 11369 rc = lpfc_rq_create(phba, phba->sli4_hba.hdr_rq, phba->sli4_hba.dat_rq, 11370 phba->sli4_hba.els_cq, LPFC_USOL); 11371 if (rc) { 11372 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11373 "0541 Failed setup of Receive Queue: " 11374 "rc = 0x%x\n", (uint32_t)rc); 11375 goto out_destroy; 11376 } 11377 11378 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 11379 "2592 USL RQ setup: hdr-rq-id=%d, dat-rq-id=%d " 11380 "parent cq-id=%d\n", 11381 phba->sli4_hba.hdr_rq->queue_id, 11382 phba->sli4_hba.dat_rq->queue_id, 11383 phba->sli4_hba.els_cq->queue_id); 11384 11385 if (phba->cfg_fcp_imax) 11386 usdelay = LPFC_SEC_TO_USEC / phba->cfg_fcp_imax; 11387 else 11388 usdelay = 0; 11389 11390 for (qidx = 0; qidx < phba->cfg_irq_chann; 11391 qidx += LPFC_MAX_EQ_DELAY_EQID_CNT) 11392 lpfc_modify_hba_eq_delay(phba, qidx, LPFC_MAX_EQ_DELAY_EQID_CNT, 11393 usdelay); 11394 11395 if (phba->sli4_hba.cq_max) { 11396 kfree(phba->sli4_hba.cq_lookup); 11397 phba->sli4_hba.cq_lookup = kcalloc((phba->sli4_hba.cq_max + 1), 11398 sizeof(struct lpfc_queue *), GFP_KERNEL); 11399 if (!phba->sli4_hba.cq_lookup) { 11400 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11401 "0549 Failed setup of CQ Lookup table: " 11402 "size 0x%x\n", phba->sli4_hba.cq_max); 11403 rc = -ENOMEM; 11404 goto out_destroy; 11405 } 11406 lpfc_setup_cq_lookup(phba); 11407 } 11408 return 0; 11409 11410 out_destroy: 11411 lpfc_sli4_queue_unset(phba); 11412 out_error: 11413 return rc; 11414 } 11415 11416 /** 11417 * lpfc_sli4_queue_unset - Unset all the SLI4 queues 11418 * @phba: pointer to lpfc hba data structure. 11419 * 11420 * This routine is invoked to unset all the SLI4 queues with the FCoE HBA 11421 * operation. 11422 * 11423 * Return codes 11424 * 0 - successful 11425 * -ENOMEM - No available memory 11426 * -EIO - The mailbox failed to complete successfully. 11427 **/ 11428 void 11429 lpfc_sli4_queue_unset(struct lpfc_hba *phba) 11430 { 11431 struct lpfc_sli4_hdw_queue *qp; 11432 struct lpfc_queue *eq; 11433 int qidx; 11434 11435 /* Unset mailbox command work queue */ 11436 if (phba->sli4_hba.mbx_wq) 11437 lpfc_mq_destroy(phba, phba->sli4_hba.mbx_wq); 11438 11439 /* Unset NVME LS work queue */ 11440 if (phba->sli4_hba.nvmels_wq) 11441 lpfc_wq_destroy(phba, phba->sli4_hba.nvmels_wq); 11442 11443 /* Unset ELS work queue */ 11444 if (phba->sli4_hba.els_wq) 11445 lpfc_wq_destroy(phba, phba->sli4_hba.els_wq); 11446 11447 /* Unset unsolicited receive queue */ 11448 if (phba->sli4_hba.hdr_rq) 11449 lpfc_rq_destroy(phba, phba->sli4_hba.hdr_rq, 11450 phba->sli4_hba.dat_rq); 11451 11452 /* Unset mailbox command complete queue */ 11453 if (phba->sli4_hba.mbx_cq) 11454 lpfc_cq_destroy(phba, phba->sli4_hba.mbx_cq); 11455 11456 /* Unset ELS complete queue */ 11457 if (phba->sli4_hba.els_cq) 11458 lpfc_cq_destroy(phba, phba->sli4_hba.els_cq); 11459 11460 /* Unset NVME LS complete queue */ 11461 if (phba->sli4_hba.nvmels_cq) 11462 lpfc_cq_destroy(phba, phba->sli4_hba.nvmels_cq); 11463 11464 if (phba->nvmet_support) { 11465 /* Unset NVMET MRQ queue */ 11466 if (phba->sli4_hba.nvmet_mrq_hdr) { 11467 for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++) 11468 lpfc_rq_destroy( 11469 phba, 11470 phba->sli4_hba.nvmet_mrq_hdr[qidx], 11471 phba->sli4_hba.nvmet_mrq_data[qidx]); 11472 } 11473 11474 /* Unset NVMET CQ Set complete queue */ 11475 if (phba->sli4_hba.nvmet_cqset) { 11476 for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++) 11477 lpfc_cq_destroy( 11478 phba, phba->sli4_hba.nvmet_cqset[qidx]); 11479 } 11480 } 11481 11482 /* Unset fast-path SLI4 queues */ 11483 if (phba->sli4_hba.hdwq) { 11484 /* Loop thru all Hardware Queues */ 11485 for (qidx = 0; qidx < phba->cfg_hdw_queue; qidx++) { 11486 /* Destroy the CQ/WQ corresponding to Hardware Queue */ 11487 qp = &phba->sli4_hba.hdwq[qidx]; 11488 lpfc_wq_destroy(phba, qp->io_wq); 11489 lpfc_cq_destroy(phba, qp->io_cq); 11490 } 11491 /* Loop thru all IRQ vectors */ 11492 for (qidx = 0; qidx < phba->cfg_irq_chann; qidx++) { 11493 /* Destroy the EQ corresponding to the IRQ vector */ 11494 eq = phba->sli4_hba.hba_eq_hdl[qidx].eq; 11495 lpfc_eq_destroy(phba, eq); 11496 } 11497 } 11498 11499 kfree(phba->sli4_hba.cq_lookup); 11500 phba->sli4_hba.cq_lookup = NULL; 11501 phba->sli4_hba.cq_max = 0; 11502 } 11503 11504 /** 11505 * lpfc_sli4_cq_event_pool_create - Create completion-queue event free pool 11506 * @phba: pointer to lpfc hba data structure. 11507 * 11508 * This routine is invoked to allocate and set up a pool of completion queue 11509 * events. The body of the completion queue event is a completion queue entry 11510 * CQE. For now, this pool is used for the interrupt service routine to queue 11511 * the following HBA completion queue events for the worker thread to process: 11512 * - Mailbox asynchronous events 11513 * - Receive queue completion unsolicited events 11514 * Later, this can be used for all the slow-path events. 11515 * 11516 * Return codes 11517 * 0 - successful 11518 * -ENOMEM - No available memory 11519 **/ 11520 static int 11521 lpfc_sli4_cq_event_pool_create(struct lpfc_hba *phba) 11522 { 11523 struct lpfc_cq_event *cq_event; 11524 int i; 11525 11526 for (i = 0; i < (4 * phba->sli4_hba.cq_ecount); i++) { 11527 cq_event = kmalloc(sizeof(struct lpfc_cq_event), GFP_KERNEL); 11528 if (!cq_event) 11529 goto out_pool_create_fail; 11530 list_add_tail(&cq_event->list, 11531 &phba->sli4_hba.sp_cqe_event_pool); 11532 } 11533 return 0; 11534 11535 out_pool_create_fail: 11536 lpfc_sli4_cq_event_pool_destroy(phba); 11537 return -ENOMEM; 11538 } 11539 11540 /** 11541 * lpfc_sli4_cq_event_pool_destroy - Free completion-queue event free pool 11542 * @phba: pointer to lpfc hba data structure. 11543 * 11544 * This routine is invoked to free the pool of completion queue events at 11545 * driver unload time. Note that, it is the responsibility of the driver 11546 * cleanup routine to free all the outstanding completion-queue events 11547 * allocated from this pool back into the pool before invoking this routine 11548 * to destroy the pool. 11549 **/ 11550 static void 11551 lpfc_sli4_cq_event_pool_destroy(struct lpfc_hba *phba) 11552 { 11553 struct lpfc_cq_event *cq_event, *next_cq_event; 11554 11555 list_for_each_entry_safe(cq_event, next_cq_event, 11556 &phba->sli4_hba.sp_cqe_event_pool, list) { 11557 list_del(&cq_event->list); 11558 kfree(cq_event); 11559 } 11560 } 11561 11562 /** 11563 * __lpfc_sli4_cq_event_alloc - Allocate a completion-queue event from free pool 11564 * @phba: pointer to lpfc hba data structure. 11565 * 11566 * This routine is the lock free version of the API invoked to allocate a 11567 * completion-queue event from the free pool. 11568 * 11569 * Return: Pointer to the newly allocated completion-queue event if successful 11570 * NULL otherwise. 11571 **/ 11572 struct lpfc_cq_event * 11573 __lpfc_sli4_cq_event_alloc(struct lpfc_hba *phba) 11574 { 11575 struct lpfc_cq_event *cq_event = NULL; 11576 11577 list_remove_head(&phba->sli4_hba.sp_cqe_event_pool, cq_event, 11578 struct lpfc_cq_event, list); 11579 return cq_event; 11580 } 11581 11582 /** 11583 * lpfc_sli4_cq_event_alloc - Allocate a completion-queue event from free pool 11584 * @phba: pointer to lpfc hba data structure. 11585 * 11586 * This routine is the lock version of the API invoked to allocate a 11587 * completion-queue event from the free pool. 11588 * 11589 * Return: Pointer to the newly allocated completion-queue event if successful 11590 * NULL otherwise. 11591 **/ 11592 struct lpfc_cq_event * 11593 lpfc_sli4_cq_event_alloc(struct lpfc_hba *phba) 11594 { 11595 struct lpfc_cq_event *cq_event; 11596 unsigned long iflags; 11597 11598 spin_lock_irqsave(&phba->hbalock, iflags); 11599 cq_event = __lpfc_sli4_cq_event_alloc(phba); 11600 spin_unlock_irqrestore(&phba->hbalock, iflags); 11601 return cq_event; 11602 } 11603 11604 /** 11605 * __lpfc_sli4_cq_event_release - Release a completion-queue event to free pool 11606 * @phba: pointer to lpfc hba data structure. 11607 * @cq_event: pointer to the completion queue event to be freed. 11608 * 11609 * This routine is the lock free version of the API invoked to release a 11610 * completion-queue event back into the free pool. 11611 **/ 11612 void 11613 __lpfc_sli4_cq_event_release(struct lpfc_hba *phba, 11614 struct lpfc_cq_event *cq_event) 11615 { 11616 list_add_tail(&cq_event->list, &phba->sli4_hba.sp_cqe_event_pool); 11617 } 11618 11619 /** 11620 * lpfc_sli4_cq_event_release - Release a completion-queue event to free pool 11621 * @phba: pointer to lpfc hba data structure. 11622 * @cq_event: pointer to the completion queue event to be freed. 11623 * 11624 * This routine is the lock version of the API invoked to release a 11625 * completion-queue event back into the free pool. 11626 **/ 11627 void 11628 lpfc_sli4_cq_event_release(struct lpfc_hba *phba, 11629 struct lpfc_cq_event *cq_event) 11630 { 11631 unsigned long iflags; 11632 spin_lock_irqsave(&phba->hbalock, iflags); 11633 __lpfc_sli4_cq_event_release(phba, cq_event); 11634 spin_unlock_irqrestore(&phba->hbalock, iflags); 11635 } 11636 11637 /** 11638 * lpfc_sli4_cq_event_release_all - Release all cq events to the free pool 11639 * @phba: pointer to lpfc hba data structure. 11640 * 11641 * This routine is to free all the pending completion-queue events to the 11642 * back into the free pool for device reset. 11643 **/ 11644 static void 11645 lpfc_sli4_cq_event_release_all(struct lpfc_hba *phba) 11646 { 11647 LIST_HEAD(cq_event_list); 11648 struct lpfc_cq_event *cq_event; 11649 unsigned long iflags; 11650 11651 /* Retrieve all the pending WCQEs from pending WCQE lists */ 11652 11653 /* Pending ELS XRI abort events */ 11654 spin_lock_irqsave(&phba->sli4_hba.els_xri_abrt_list_lock, iflags); 11655 list_splice_init(&phba->sli4_hba.sp_els_xri_aborted_work_queue, 11656 &cq_event_list); 11657 spin_unlock_irqrestore(&phba->sli4_hba.els_xri_abrt_list_lock, iflags); 11658 11659 /* Pending asynnc events */ 11660 spin_lock_irqsave(&phba->sli4_hba.asynce_list_lock, iflags); 11661 list_splice_init(&phba->sli4_hba.sp_asynce_work_queue, 11662 &cq_event_list); 11663 spin_unlock_irqrestore(&phba->sli4_hba.asynce_list_lock, iflags); 11664 11665 while (!list_empty(&cq_event_list)) { 11666 list_remove_head(&cq_event_list, cq_event, 11667 struct lpfc_cq_event, list); 11668 lpfc_sli4_cq_event_release(phba, cq_event); 11669 } 11670 } 11671 11672 /** 11673 * lpfc_pci_function_reset - Reset pci function. 11674 * @phba: pointer to lpfc hba data structure. 11675 * 11676 * This routine is invoked to request a PCI function reset. It will destroys 11677 * all resources assigned to the PCI function which originates this request. 11678 * 11679 * Return codes 11680 * 0 - successful 11681 * -ENOMEM - No available memory 11682 * -EIO - The mailbox failed to complete successfully. 11683 **/ 11684 int 11685 lpfc_pci_function_reset(struct lpfc_hba *phba) 11686 { 11687 LPFC_MBOXQ_t *mboxq; 11688 uint32_t rc = 0, if_type; 11689 uint32_t shdr_status, shdr_add_status; 11690 uint32_t rdy_chk; 11691 uint32_t port_reset = 0; 11692 union lpfc_sli4_cfg_shdr *shdr; 11693 struct lpfc_register reg_data; 11694 uint16_t devid; 11695 11696 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf); 11697 switch (if_type) { 11698 case LPFC_SLI_INTF_IF_TYPE_0: 11699 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, 11700 GFP_KERNEL); 11701 if (!mboxq) { 11702 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11703 "0494 Unable to allocate memory for " 11704 "issuing SLI_FUNCTION_RESET mailbox " 11705 "command\n"); 11706 return -ENOMEM; 11707 } 11708 11709 /* Setup PCI function reset mailbox-ioctl command */ 11710 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON, 11711 LPFC_MBOX_OPCODE_FUNCTION_RESET, 0, 11712 LPFC_SLI4_MBX_EMBED); 11713 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); 11714 shdr = (union lpfc_sli4_cfg_shdr *) 11715 &mboxq->u.mqe.un.sli4_config.header.cfg_shdr; 11716 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response); 11717 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, 11718 &shdr->response); 11719 mempool_free(mboxq, phba->mbox_mem_pool); 11720 if (shdr_status || shdr_add_status || rc) { 11721 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11722 "0495 SLI_FUNCTION_RESET mailbox " 11723 "failed with status x%x add_status x%x," 11724 " mbx status x%x\n", 11725 shdr_status, shdr_add_status, rc); 11726 rc = -ENXIO; 11727 } 11728 break; 11729 case LPFC_SLI_INTF_IF_TYPE_2: 11730 case LPFC_SLI_INTF_IF_TYPE_6: 11731 wait: 11732 /* 11733 * Poll the Port Status Register and wait for RDY for 11734 * up to 30 seconds. If the port doesn't respond, treat 11735 * it as an error. 11736 */ 11737 for (rdy_chk = 0; rdy_chk < 1500; rdy_chk++) { 11738 if (lpfc_readl(phba->sli4_hba.u.if_type2. 11739 STATUSregaddr, ®_data.word0)) { 11740 rc = -ENODEV; 11741 goto out; 11742 } 11743 if (bf_get(lpfc_sliport_status_rdy, ®_data)) 11744 break; 11745 msleep(20); 11746 } 11747 11748 if (!bf_get(lpfc_sliport_status_rdy, ®_data)) { 11749 phba->work_status[0] = readl( 11750 phba->sli4_hba.u.if_type2.ERR1regaddr); 11751 phba->work_status[1] = readl( 11752 phba->sli4_hba.u.if_type2.ERR2regaddr); 11753 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11754 "2890 Port not ready, port status reg " 11755 "0x%x error 1=0x%x, error 2=0x%x\n", 11756 reg_data.word0, 11757 phba->work_status[0], 11758 phba->work_status[1]); 11759 rc = -ENODEV; 11760 goto out; 11761 } 11762 11763 if (bf_get(lpfc_sliport_status_pldv, ®_data)) 11764 lpfc_pldv_detect = true; 11765 11766 if (!port_reset) { 11767 /* 11768 * Reset the port now 11769 */ 11770 reg_data.word0 = 0; 11771 bf_set(lpfc_sliport_ctrl_end, ®_data, 11772 LPFC_SLIPORT_LITTLE_ENDIAN); 11773 bf_set(lpfc_sliport_ctrl_ip, ®_data, 11774 LPFC_SLIPORT_INIT_PORT); 11775 writel(reg_data.word0, phba->sli4_hba.u.if_type2. 11776 CTRLregaddr); 11777 /* flush */ 11778 pci_read_config_word(phba->pcidev, 11779 PCI_DEVICE_ID, &devid); 11780 11781 port_reset = 1; 11782 msleep(20); 11783 goto wait; 11784 } else if (bf_get(lpfc_sliport_status_rn, ®_data)) { 11785 rc = -ENODEV; 11786 goto out; 11787 } 11788 break; 11789 11790 case LPFC_SLI_INTF_IF_TYPE_1: 11791 default: 11792 break; 11793 } 11794 11795 out: 11796 /* Catch the not-ready port failure after a port reset. */ 11797 if (rc) { 11798 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 11799 "3317 HBA not functional: IP Reset Failed " 11800 "try: echo fw_reset > board_mode\n"); 11801 rc = -ENODEV; 11802 } 11803 11804 return rc; 11805 } 11806 11807 /** 11808 * lpfc_sli4_pci_mem_setup - Setup SLI4 HBA PCI memory space. 11809 * @phba: pointer to lpfc hba data structure. 11810 * 11811 * This routine is invoked to set up the PCI device memory space for device 11812 * with SLI-4 interface spec. 11813 * 11814 * Return codes 11815 * 0 - successful 11816 * other values - error 11817 **/ 11818 static int 11819 lpfc_sli4_pci_mem_setup(struct lpfc_hba *phba) 11820 { 11821 struct pci_dev *pdev = phba->pcidev; 11822 unsigned long bar0map_len, bar1map_len, bar2map_len; 11823 int error; 11824 uint32_t if_type; 11825 11826 if (!pdev) 11827 return -ENODEV; 11828 11829 /* Set the device DMA mask size */ 11830 error = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); 11831 if (error) 11832 error = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); 11833 if (error) 11834 return error; 11835 11836 /* 11837 * The BARs and register set definitions and offset locations are 11838 * dependent on the if_type. 11839 */ 11840 if (pci_read_config_dword(pdev, LPFC_SLI_INTF, 11841 &phba->sli4_hba.sli_intf.word0)) { 11842 return -ENODEV; 11843 } 11844 11845 /* There is no SLI3 failback for SLI4 devices. */ 11846 if (bf_get(lpfc_sli_intf_valid, &phba->sli4_hba.sli_intf) != 11847 LPFC_SLI_INTF_VALID) { 11848 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 11849 "2894 SLI_INTF reg contents invalid " 11850 "sli_intf reg 0x%x\n", 11851 phba->sli4_hba.sli_intf.word0); 11852 return -ENODEV; 11853 } 11854 11855 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf); 11856 /* 11857 * Get the bus address of SLI4 device Bar regions and the 11858 * number of bytes required by each mapping. The mapping of the 11859 * particular PCI BARs regions is dependent on the type of 11860 * SLI4 device. 11861 */ 11862 if (pci_resource_start(pdev, PCI_64BIT_BAR0)) { 11863 phba->pci_bar0_map = pci_resource_start(pdev, PCI_64BIT_BAR0); 11864 bar0map_len = pci_resource_len(pdev, PCI_64BIT_BAR0); 11865 11866 /* 11867 * Map SLI4 PCI Config Space Register base to a kernel virtual 11868 * addr 11869 */ 11870 phba->sli4_hba.conf_regs_memmap_p = 11871 ioremap(phba->pci_bar0_map, bar0map_len); 11872 if (!phba->sli4_hba.conf_regs_memmap_p) { 11873 dev_printk(KERN_ERR, &pdev->dev, 11874 "ioremap failed for SLI4 PCI config " 11875 "registers.\n"); 11876 return -ENODEV; 11877 } 11878 phba->pci_bar0_memmap_p = phba->sli4_hba.conf_regs_memmap_p; 11879 /* Set up BAR0 PCI config space register memory map */ 11880 lpfc_sli4_bar0_register_memmap(phba, if_type); 11881 } else { 11882 phba->pci_bar0_map = pci_resource_start(pdev, 1); 11883 bar0map_len = pci_resource_len(pdev, 1); 11884 if (if_type >= LPFC_SLI_INTF_IF_TYPE_2) { 11885 dev_printk(KERN_ERR, &pdev->dev, 11886 "FATAL - No BAR0 mapping for SLI4, if_type 2\n"); 11887 return -ENODEV; 11888 } 11889 phba->sli4_hba.conf_regs_memmap_p = 11890 ioremap(phba->pci_bar0_map, bar0map_len); 11891 if (!phba->sli4_hba.conf_regs_memmap_p) { 11892 dev_printk(KERN_ERR, &pdev->dev, 11893 "ioremap failed for SLI4 PCI config " 11894 "registers.\n"); 11895 return -ENODEV; 11896 } 11897 lpfc_sli4_bar0_register_memmap(phba, if_type); 11898 } 11899 11900 if (if_type == LPFC_SLI_INTF_IF_TYPE_0) { 11901 if (pci_resource_start(pdev, PCI_64BIT_BAR2)) { 11902 /* 11903 * Map SLI4 if type 0 HBA Control Register base to a 11904 * kernel virtual address and setup the registers. 11905 */ 11906 phba->pci_bar1_map = pci_resource_start(pdev, 11907 PCI_64BIT_BAR2); 11908 bar1map_len = pci_resource_len(pdev, PCI_64BIT_BAR2); 11909 phba->sli4_hba.ctrl_regs_memmap_p = 11910 ioremap(phba->pci_bar1_map, 11911 bar1map_len); 11912 if (!phba->sli4_hba.ctrl_regs_memmap_p) { 11913 dev_err(&pdev->dev, 11914 "ioremap failed for SLI4 HBA " 11915 "control registers.\n"); 11916 error = -ENOMEM; 11917 goto out_iounmap_conf; 11918 } 11919 phba->pci_bar2_memmap_p = 11920 phba->sli4_hba.ctrl_regs_memmap_p; 11921 lpfc_sli4_bar1_register_memmap(phba, if_type); 11922 } else { 11923 error = -ENOMEM; 11924 goto out_iounmap_conf; 11925 } 11926 } 11927 11928 if ((if_type == LPFC_SLI_INTF_IF_TYPE_6) && 11929 (pci_resource_start(pdev, PCI_64BIT_BAR2))) { 11930 /* 11931 * Map SLI4 if type 6 HBA Doorbell Register base to a kernel 11932 * virtual address and setup the registers. 11933 */ 11934 phba->pci_bar1_map = pci_resource_start(pdev, PCI_64BIT_BAR2); 11935 bar1map_len = pci_resource_len(pdev, PCI_64BIT_BAR2); 11936 phba->sli4_hba.drbl_regs_memmap_p = 11937 ioremap(phba->pci_bar1_map, bar1map_len); 11938 if (!phba->sli4_hba.drbl_regs_memmap_p) { 11939 dev_err(&pdev->dev, 11940 "ioremap failed for SLI4 HBA doorbell registers.\n"); 11941 error = -ENOMEM; 11942 goto out_iounmap_conf; 11943 } 11944 phba->pci_bar2_memmap_p = phba->sli4_hba.drbl_regs_memmap_p; 11945 lpfc_sli4_bar1_register_memmap(phba, if_type); 11946 } 11947 11948 if (if_type == LPFC_SLI_INTF_IF_TYPE_0) { 11949 if (pci_resource_start(pdev, PCI_64BIT_BAR4)) { 11950 /* 11951 * Map SLI4 if type 0 HBA Doorbell Register base to 11952 * a kernel virtual address and setup the registers. 11953 */ 11954 phba->pci_bar2_map = pci_resource_start(pdev, 11955 PCI_64BIT_BAR4); 11956 bar2map_len = pci_resource_len(pdev, PCI_64BIT_BAR4); 11957 phba->sli4_hba.drbl_regs_memmap_p = 11958 ioremap(phba->pci_bar2_map, 11959 bar2map_len); 11960 if (!phba->sli4_hba.drbl_regs_memmap_p) { 11961 dev_err(&pdev->dev, 11962 "ioremap failed for SLI4 HBA" 11963 " doorbell registers.\n"); 11964 error = -ENOMEM; 11965 goto out_iounmap_ctrl; 11966 } 11967 phba->pci_bar4_memmap_p = 11968 phba->sli4_hba.drbl_regs_memmap_p; 11969 error = lpfc_sli4_bar2_register_memmap(phba, LPFC_VF0); 11970 if (error) 11971 goto out_iounmap_all; 11972 } else { 11973 error = -ENOMEM; 11974 goto out_iounmap_ctrl; 11975 } 11976 } 11977 11978 if (if_type == LPFC_SLI_INTF_IF_TYPE_6 && 11979 pci_resource_start(pdev, PCI_64BIT_BAR4)) { 11980 /* 11981 * Map SLI4 if type 6 HBA DPP Register base to a kernel 11982 * virtual address and setup the registers. 11983 */ 11984 phba->pci_bar2_map = pci_resource_start(pdev, PCI_64BIT_BAR4); 11985 bar2map_len = pci_resource_len(pdev, PCI_64BIT_BAR4); 11986 phba->sli4_hba.dpp_regs_memmap_p = 11987 ioremap(phba->pci_bar2_map, bar2map_len); 11988 if (!phba->sli4_hba.dpp_regs_memmap_p) { 11989 dev_err(&pdev->dev, 11990 "ioremap failed for SLI4 HBA dpp registers.\n"); 11991 error = -ENOMEM; 11992 goto out_iounmap_all; 11993 } 11994 phba->pci_bar4_memmap_p = phba->sli4_hba.dpp_regs_memmap_p; 11995 } 11996 11997 /* Set up the EQ/CQ register handeling functions now */ 11998 switch (if_type) { 11999 case LPFC_SLI_INTF_IF_TYPE_0: 12000 case LPFC_SLI_INTF_IF_TYPE_2: 12001 phba->sli4_hba.sli4_eq_clr_intr = lpfc_sli4_eq_clr_intr; 12002 phba->sli4_hba.sli4_write_eq_db = lpfc_sli4_write_eq_db; 12003 phba->sli4_hba.sli4_write_cq_db = lpfc_sli4_write_cq_db; 12004 break; 12005 case LPFC_SLI_INTF_IF_TYPE_6: 12006 phba->sli4_hba.sli4_eq_clr_intr = lpfc_sli4_if6_eq_clr_intr; 12007 phba->sli4_hba.sli4_write_eq_db = lpfc_sli4_if6_write_eq_db; 12008 phba->sli4_hba.sli4_write_cq_db = lpfc_sli4_if6_write_cq_db; 12009 break; 12010 default: 12011 break; 12012 } 12013 12014 return 0; 12015 12016 out_iounmap_all: 12017 if (phba->sli4_hba.drbl_regs_memmap_p) 12018 iounmap(phba->sli4_hba.drbl_regs_memmap_p); 12019 out_iounmap_ctrl: 12020 if (phba->sli4_hba.ctrl_regs_memmap_p) 12021 iounmap(phba->sli4_hba.ctrl_regs_memmap_p); 12022 out_iounmap_conf: 12023 iounmap(phba->sli4_hba.conf_regs_memmap_p); 12024 12025 return error; 12026 } 12027 12028 /** 12029 * lpfc_sli4_pci_mem_unset - Unset SLI4 HBA PCI memory space. 12030 * @phba: pointer to lpfc hba data structure. 12031 * 12032 * This routine is invoked to unset the PCI device memory space for device 12033 * with SLI-4 interface spec. 12034 **/ 12035 static void 12036 lpfc_sli4_pci_mem_unset(struct lpfc_hba *phba) 12037 { 12038 uint32_t if_type; 12039 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf); 12040 12041 switch (if_type) { 12042 case LPFC_SLI_INTF_IF_TYPE_0: 12043 iounmap(phba->sli4_hba.drbl_regs_memmap_p); 12044 iounmap(phba->sli4_hba.ctrl_regs_memmap_p); 12045 iounmap(phba->sli4_hba.conf_regs_memmap_p); 12046 break; 12047 case LPFC_SLI_INTF_IF_TYPE_2: 12048 iounmap(phba->sli4_hba.conf_regs_memmap_p); 12049 break; 12050 case LPFC_SLI_INTF_IF_TYPE_6: 12051 iounmap(phba->sli4_hba.drbl_regs_memmap_p); 12052 iounmap(phba->sli4_hba.conf_regs_memmap_p); 12053 if (phba->sli4_hba.dpp_regs_memmap_p) 12054 iounmap(phba->sli4_hba.dpp_regs_memmap_p); 12055 break; 12056 case LPFC_SLI_INTF_IF_TYPE_1: 12057 break; 12058 default: 12059 dev_printk(KERN_ERR, &phba->pcidev->dev, 12060 "FATAL - unsupported SLI4 interface type - %d\n", 12061 if_type); 12062 break; 12063 } 12064 } 12065 12066 /** 12067 * lpfc_sli_enable_msix - Enable MSI-X interrupt mode on SLI-3 device 12068 * @phba: pointer to lpfc hba data structure. 12069 * 12070 * This routine is invoked to enable the MSI-X interrupt vectors to device 12071 * with SLI-3 interface specs. 12072 * 12073 * Return codes 12074 * 0 - successful 12075 * other values - error 12076 **/ 12077 static int 12078 lpfc_sli_enable_msix(struct lpfc_hba *phba) 12079 { 12080 int rc; 12081 LPFC_MBOXQ_t *pmb; 12082 12083 /* Set up MSI-X multi-message vectors */ 12084 rc = pci_alloc_irq_vectors(phba->pcidev, 12085 LPFC_MSIX_VECTORS, LPFC_MSIX_VECTORS, PCI_IRQ_MSIX); 12086 if (rc < 0) { 12087 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 12088 "0420 PCI enable MSI-X failed (%d)\n", rc); 12089 goto vec_fail_out; 12090 } 12091 12092 /* 12093 * Assign MSI-X vectors to interrupt handlers 12094 */ 12095 12096 /* vector-0 is associated to slow-path handler */ 12097 rc = request_irq(pci_irq_vector(phba->pcidev, 0), 12098 &lpfc_sli_sp_intr_handler, 0, 12099 LPFC_SP_DRIVER_HANDLER_NAME, phba); 12100 if (rc) { 12101 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 12102 "0421 MSI-X slow-path request_irq failed " 12103 "(%d)\n", rc); 12104 goto msi_fail_out; 12105 } 12106 12107 /* vector-1 is associated to fast-path handler */ 12108 rc = request_irq(pci_irq_vector(phba->pcidev, 1), 12109 &lpfc_sli_fp_intr_handler, 0, 12110 LPFC_FP_DRIVER_HANDLER_NAME, phba); 12111 12112 if (rc) { 12113 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 12114 "0429 MSI-X fast-path request_irq failed " 12115 "(%d)\n", rc); 12116 goto irq_fail_out; 12117 } 12118 12119 /* 12120 * Configure HBA MSI-X attention conditions to messages 12121 */ 12122 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 12123 12124 if (!pmb) { 12125 rc = -ENOMEM; 12126 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 12127 "0474 Unable to allocate memory for issuing " 12128 "MBOX_CONFIG_MSI command\n"); 12129 goto mem_fail_out; 12130 } 12131 rc = lpfc_config_msi(phba, pmb); 12132 if (rc) 12133 goto mbx_fail_out; 12134 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL); 12135 if (rc != MBX_SUCCESS) { 12136 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX, 12137 "0351 Config MSI mailbox command failed, " 12138 "mbxCmd x%x, mbxStatus x%x\n", 12139 pmb->u.mb.mbxCommand, pmb->u.mb.mbxStatus); 12140 goto mbx_fail_out; 12141 } 12142 12143 /* Free memory allocated for mailbox command */ 12144 mempool_free(pmb, phba->mbox_mem_pool); 12145 return rc; 12146 12147 mbx_fail_out: 12148 /* Free memory allocated for mailbox command */ 12149 mempool_free(pmb, phba->mbox_mem_pool); 12150 12151 mem_fail_out: 12152 /* free the irq already requested */ 12153 free_irq(pci_irq_vector(phba->pcidev, 1), phba); 12154 12155 irq_fail_out: 12156 /* free the irq already requested */ 12157 free_irq(pci_irq_vector(phba->pcidev, 0), phba); 12158 12159 msi_fail_out: 12160 /* Unconfigure MSI-X capability structure */ 12161 pci_free_irq_vectors(phba->pcidev); 12162 12163 vec_fail_out: 12164 return rc; 12165 } 12166 12167 /** 12168 * lpfc_sli_enable_msi - Enable MSI interrupt mode on SLI-3 device. 12169 * @phba: pointer to lpfc hba data structure. 12170 * 12171 * This routine is invoked to enable the MSI interrupt mode to device with 12172 * SLI-3 interface spec. The kernel function pci_enable_msi() is called to 12173 * enable the MSI vector. The device driver is responsible for calling the 12174 * request_irq() to register MSI vector with a interrupt the handler, which 12175 * is done in this function. 12176 * 12177 * Return codes 12178 * 0 - successful 12179 * other values - error 12180 */ 12181 static int 12182 lpfc_sli_enable_msi(struct lpfc_hba *phba) 12183 { 12184 int rc; 12185 12186 rc = pci_enable_msi(phba->pcidev); 12187 if (!rc) 12188 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 12189 "0012 PCI enable MSI mode success.\n"); 12190 else { 12191 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 12192 "0471 PCI enable MSI mode failed (%d)\n", rc); 12193 return rc; 12194 } 12195 12196 rc = request_irq(phba->pcidev->irq, lpfc_sli_intr_handler, 12197 0, LPFC_DRIVER_NAME, phba); 12198 if (rc) { 12199 pci_disable_msi(phba->pcidev); 12200 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 12201 "0478 MSI request_irq failed (%d)\n", rc); 12202 } 12203 return rc; 12204 } 12205 12206 /** 12207 * lpfc_sli_enable_intr - Enable device interrupt to SLI-3 device. 12208 * @phba: pointer to lpfc hba data structure. 12209 * @cfg_mode: Interrupt configuration mode (INTx, MSI or MSI-X). 12210 * 12211 * This routine is invoked to enable device interrupt and associate driver's 12212 * interrupt handler(s) to interrupt vector(s) to device with SLI-3 interface 12213 * spec. Depends on the interrupt mode configured to the driver, the driver 12214 * will try to fallback from the configured interrupt mode to an interrupt 12215 * mode which is supported by the platform, kernel, and device in the order 12216 * of: 12217 * MSI-X -> MSI -> IRQ. 12218 * 12219 * Return codes 12220 * 0 - successful 12221 * other values - error 12222 **/ 12223 static uint32_t 12224 lpfc_sli_enable_intr(struct lpfc_hba *phba, uint32_t cfg_mode) 12225 { 12226 uint32_t intr_mode = LPFC_INTR_ERROR; 12227 int retval; 12228 12229 /* Need to issue conf_port mbox cmd before conf_msi mbox cmd */ 12230 retval = lpfc_sli_config_port(phba, LPFC_SLI_REV3); 12231 if (retval) 12232 return intr_mode; 12233 clear_bit(HBA_NEEDS_CFG_PORT, &phba->hba_flag); 12234 12235 if (cfg_mode == 2) { 12236 /* Now, try to enable MSI-X interrupt mode */ 12237 retval = lpfc_sli_enable_msix(phba); 12238 if (!retval) { 12239 /* Indicate initialization to MSI-X mode */ 12240 phba->intr_type = MSIX; 12241 intr_mode = 2; 12242 } 12243 } 12244 12245 /* Fallback to MSI if MSI-X initialization failed */ 12246 if (cfg_mode >= 1 && phba->intr_type == NONE) { 12247 retval = lpfc_sli_enable_msi(phba); 12248 if (!retval) { 12249 /* Indicate initialization to MSI mode */ 12250 phba->intr_type = MSI; 12251 intr_mode = 1; 12252 } 12253 } 12254 12255 /* Fallback to INTx if both MSI-X/MSI initalization failed */ 12256 if (phba->intr_type == NONE) { 12257 retval = request_irq(phba->pcidev->irq, lpfc_sli_intr_handler, 12258 IRQF_SHARED, LPFC_DRIVER_NAME, phba); 12259 if (!retval) { 12260 /* Indicate initialization to INTx mode */ 12261 phba->intr_type = INTx; 12262 intr_mode = 0; 12263 } 12264 } 12265 return intr_mode; 12266 } 12267 12268 /** 12269 * lpfc_sli_disable_intr - Disable device interrupt to SLI-3 device. 12270 * @phba: pointer to lpfc hba data structure. 12271 * 12272 * This routine is invoked to disable device interrupt and disassociate the 12273 * driver's interrupt handler(s) from interrupt vector(s) to device with 12274 * SLI-3 interface spec. Depending on the interrupt mode, the driver will 12275 * release the interrupt vector(s) for the message signaled interrupt. 12276 **/ 12277 static void 12278 lpfc_sli_disable_intr(struct lpfc_hba *phba) 12279 { 12280 int nr_irqs, i; 12281 12282 if (phba->intr_type == MSIX) 12283 nr_irqs = LPFC_MSIX_VECTORS; 12284 else 12285 nr_irqs = 1; 12286 12287 for (i = 0; i < nr_irqs; i++) 12288 free_irq(pci_irq_vector(phba->pcidev, i), phba); 12289 pci_free_irq_vectors(phba->pcidev); 12290 12291 /* Reset interrupt management states */ 12292 phba->intr_type = NONE; 12293 phba->sli.slistat.sli_intr = 0; 12294 } 12295 12296 /** 12297 * lpfc_find_cpu_handle - Find the CPU that corresponds to the specified Queue 12298 * @phba: pointer to lpfc hba data structure. 12299 * @id: EQ vector index or Hardware Queue index 12300 * @match: LPFC_FIND_BY_EQ = match by EQ 12301 * LPFC_FIND_BY_HDWQ = match by Hardware Queue 12302 * Return the CPU that matches the selection criteria 12303 */ 12304 static uint16_t 12305 lpfc_find_cpu_handle(struct lpfc_hba *phba, uint16_t id, int match) 12306 { 12307 struct lpfc_vector_map_info *cpup; 12308 int cpu; 12309 12310 /* Loop through all CPUs */ 12311 for_each_present_cpu(cpu) { 12312 cpup = &phba->sli4_hba.cpu_map[cpu]; 12313 12314 /* If we are matching by EQ, there may be multiple CPUs using 12315 * using the same vector, so select the one with 12316 * LPFC_CPU_FIRST_IRQ set. 12317 */ 12318 if ((match == LPFC_FIND_BY_EQ) && 12319 (cpup->flag & LPFC_CPU_FIRST_IRQ) && 12320 (cpup->eq == id)) 12321 return cpu; 12322 12323 /* If matching by HDWQ, select the first CPU that matches */ 12324 if ((match == LPFC_FIND_BY_HDWQ) && (cpup->hdwq == id)) 12325 return cpu; 12326 } 12327 return 0; 12328 } 12329 12330 #ifdef CONFIG_X86 12331 /** 12332 * lpfc_find_hyper - Determine if the CPU map entry is hyper-threaded 12333 * @phba: pointer to lpfc hba data structure. 12334 * @cpu: CPU map index 12335 * @phys_id: CPU package physical id 12336 * @core_id: CPU core id 12337 */ 12338 static int 12339 lpfc_find_hyper(struct lpfc_hba *phba, int cpu, 12340 uint16_t phys_id, uint16_t core_id) 12341 { 12342 struct lpfc_vector_map_info *cpup; 12343 int idx; 12344 12345 for_each_present_cpu(idx) { 12346 cpup = &phba->sli4_hba.cpu_map[idx]; 12347 /* Does the cpup match the one we are looking for */ 12348 if ((cpup->phys_id == phys_id) && 12349 (cpup->core_id == core_id) && 12350 (cpu != idx)) 12351 return 1; 12352 } 12353 return 0; 12354 } 12355 #endif 12356 12357 /* 12358 * lpfc_assign_eq_map_info - Assigns eq for vector_map structure 12359 * @phba: pointer to lpfc hba data structure. 12360 * @eqidx: index for eq and irq vector 12361 * @flag: flags to set for vector_map structure 12362 * @cpu: cpu used to index vector_map structure 12363 * 12364 * The routine assigns eq info into vector_map structure 12365 */ 12366 static inline void 12367 lpfc_assign_eq_map_info(struct lpfc_hba *phba, uint16_t eqidx, uint16_t flag, 12368 unsigned int cpu) 12369 { 12370 struct lpfc_vector_map_info *cpup = &phba->sli4_hba.cpu_map[cpu]; 12371 struct lpfc_hba_eq_hdl *eqhdl = lpfc_get_eq_hdl(eqidx); 12372 12373 cpup->eq = eqidx; 12374 cpup->flag |= flag; 12375 12376 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 12377 "3336 Set Affinity: CPU %d irq %d eq %d flag x%x\n", 12378 cpu, eqhdl->irq, cpup->eq, cpup->flag); 12379 } 12380 12381 /** 12382 * lpfc_cpu_map_array_init - Initialize cpu_map structure 12383 * @phba: pointer to lpfc hba data structure. 12384 * 12385 * The routine initializes the cpu_map array structure 12386 */ 12387 static void 12388 lpfc_cpu_map_array_init(struct lpfc_hba *phba) 12389 { 12390 struct lpfc_vector_map_info *cpup; 12391 struct lpfc_eq_intr_info *eqi; 12392 int cpu; 12393 12394 for_each_possible_cpu(cpu) { 12395 cpup = &phba->sli4_hba.cpu_map[cpu]; 12396 cpup->phys_id = LPFC_VECTOR_MAP_EMPTY; 12397 cpup->core_id = LPFC_VECTOR_MAP_EMPTY; 12398 cpup->hdwq = LPFC_VECTOR_MAP_EMPTY; 12399 cpup->eq = LPFC_VECTOR_MAP_EMPTY; 12400 cpup->flag = 0; 12401 eqi = per_cpu_ptr(phba->sli4_hba.eq_info, cpu); 12402 INIT_LIST_HEAD(&eqi->list); 12403 eqi->icnt = 0; 12404 } 12405 } 12406 12407 /** 12408 * lpfc_hba_eq_hdl_array_init - Initialize hba_eq_hdl structure 12409 * @phba: pointer to lpfc hba data structure. 12410 * 12411 * The routine initializes the hba_eq_hdl array structure 12412 */ 12413 static void 12414 lpfc_hba_eq_hdl_array_init(struct lpfc_hba *phba) 12415 { 12416 struct lpfc_hba_eq_hdl *eqhdl; 12417 int i; 12418 12419 for (i = 0; i < phba->cfg_irq_chann; i++) { 12420 eqhdl = lpfc_get_eq_hdl(i); 12421 eqhdl->irq = LPFC_IRQ_EMPTY; 12422 eqhdl->phba = phba; 12423 } 12424 } 12425 12426 /** 12427 * lpfc_cpu_affinity_check - Check vector CPU affinity mappings 12428 * @phba: pointer to lpfc hba data structure. 12429 * @vectors: number of msix vectors allocated. 12430 * 12431 * The routine will figure out the CPU affinity assignment for every 12432 * MSI-X vector allocated for the HBA. 12433 * In addition, the CPU to IO channel mapping will be calculated 12434 * and the phba->sli4_hba.cpu_map array will reflect this. 12435 */ 12436 static void 12437 lpfc_cpu_affinity_check(struct lpfc_hba *phba, int vectors) 12438 { 12439 int i, cpu, idx, next_idx, new_cpu, start_cpu, first_cpu; 12440 int max_phys_id, min_phys_id; 12441 int max_core_id, min_core_id; 12442 struct lpfc_vector_map_info *cpup; 12443 struct lpfc_vector_map_info *new_cpup; 12444 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS 12445 struct lpfc_hdwq_stat *c_stat; 12446 #endif 12447 12448 max_phys_id = 0; 12449 min_phys_id = LPFC_VECTOR_MAP_EMPTY; 12450 max_core_id = 0; 12451 min_core_id = LPFC_VECTOR_MAP_EMPTY; 12452 12453 /* Update CPU map with physical id and core id of each CPU */ 12454 for_each_present_cpu(cpu) { 12455 cpup = &phba->sli4_hba.cpu_map[cpu]; 12456 #ifdef CONFIG_X86 12457 cpup->phys_id = topology_physical_package_id(cpu); 12458 cpup->core_id = topology_core_id(cpu); 12459 if (lpfc_find_hyper(phba, cpu, cpup->phys_id, cpup->core_id)) 12460 cpup->flag |= LPFC_CPU_MAP_HYPER; 12461 #else 12462 /* No distinction between CPUs for other platforms */ 12463 cpup->phys_id = 0; 12464 cpup->core_id = cpu; 12465 #endif 12466 12467 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 12468 "3328 CPU %d physid %d coreid %d flag x%x\n", 12469 cpu, cpup->phys_id, cpup->core_id, cpup->flag); 12470 12471 if (cpup->phys_id > max_phys_id) 12472 max_phys_id = cpup->phys_id; 12473 if (cpup->phys_id < min_phys_id) 12474 min_phys_id = cpup->phys_id; 12475 12476 if (cpup->core_id > max_core_id) 12477 max_core_id = cpup->core_id; 12478 if (cpup->core_id < min_core_id) 12479 min_core_id = cpup->core_id; 12480 } 12481 12482 /* After looking at each irq vector assigned to this pcidev, its 12483 * possible to see that not ALL CPUs have been accounted for. 12484 * Next we will set any unassigned (unaffinitized) cpu map 12485 * entries to a IRQ on the same phys_id. 12486 */ 12487 first_cpu = cpumask_first(cpu_present_mask); 12488 start_cpu = first_cpu; 12489 12490 for_each_present_cpu(cpu) { 12491 cpup = &phba->sli4_hba.cpu_map[cpu]; 12492 12493 /* Is this CPU entry unassigned */ 12494 if (cpup->eq == LPFC_VECTOR_MAP_EMPTY) { 12495 /* Mark CPU as IRQ not assigned by the kernel */ 12496 cpup->flag |= LPFC_CPU_MAP_UNASSIGN; 12497 12498 /* If so, find a new_cpup that is on the SAME 12499 * phys_id as cpup. start_cpu will start where we 12500 * left off so all unassigned entries don't get assgined 12501 * the IRQ of the first entry. 12502 */ 12503 new_cpu = start_cpu; 12504 for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) { 12505 new_cpup = &phba->sli4_hba.cpu_map[new_cpu]; 12506 if (!(new_cpup->flag & LPFC_CPU_MAP_UNASSIGN) && 12507 (new_cpup->eq != LPFC_VECTOR_MAP_EMPTY) && 12508 (new_cpup->phys_id == cpup->phys_id)) 12509 goto found_same; 12510 new_cpu = lpfc_next_present_cpu(new_cpu); 12511 } 12512 /* At this point, we leave the CPU as unassigned */ 12513 continue; 12514 found_same: 12515 /* We found a matching phys_id, so copy the IRQ info */ 12516 cpup->eq = new_cpup->eq; 12517 12518 /* Bump start_cpu to the next slot to minmize the 12519 * chance of having multiple unassigned CPU entries 12520 * selecting the same IRQ. 12521 */ 12522 start_cpu = lpfc_next_present_cpu(new_cpu); 12523 12524 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 12525 "3337 Set Affinity: CPU %d " 12526 "eq %d from peer cpu %d same " 12527 "phys_id (%d)\n", 12528 cpu, cpup->eq, new_cpu, 12529 cpup->phys_id); 12530 } 12531 } 12532 12533 /* Set any unassigned cpu map entries to a IRQ on any phys_id */ 12534 start_cpu = first_cpu; 12535 12536 for_each_present_cpu(cpu) { 12537 cpup = &phba->sli4_hba.cpu_map[cpu]; 12538 12539 /* Is this entry unassigned */ 12540 if (cpup->eq == LPFC_VECTOR_MAP_EMPTY) { 12541 /* Mark it as IRQ not assigned by the kernel */ 12542 cpup->flag |= LPFC_CPU_MAP_UNASSIGN; 12543 12544 /* If so, find a new_cpup thats on ANY phys_id 12545 * as the cpup. start_cpu will start where we 12546 * left off so all unassigned entries don't get 12547 * assigned the IRQ of the first entry. 12548 */ 12549 new_cpu = start_cpu; 12550 for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) { 12551 new_cpup = &phba->sli4_hba.cpu_map[new_cpu]; 12552 if (!(new_cpup->flag & LPFC_CPU_MAP_UNASSIGN) && 12553 (new_cpup->eq != LPFC_VECTOR_MAP_EMPTY)) 12554 goto found_any; 12555 new_cpu = lpfc_next_present_cpu(new_cpu); 12556 } 12557 /* We should never leave an entry unassigned */ 12558 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 12559 "3339 Set Affinity: CPU %d " 12560 "eq %d UNASSIGNED\n", 12561 cpup->hdwq, cpup->eq); 12562 continue; 12563 found_any: 12564 /* We found an available entry, copy the IRQ info */ 12565 cpup->eq = new_cpup->eq; 12566 12567 /* Bump start_cpu to the next slot to minmize the 12568 * chance of having multiple unassigned CPU entries 12569 * selecting the same IRQ. 12570 */ 12571 start_cpu = lpfc_next_present_cpu(new_cpu); 12572 12573 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 12574 "3338 Set Affinity: CPU %d " 12575 "eq %d from peer cpu %d (%d/%d)\n", 12576 cpu, cpup->eq, new_cpu, 12577 new_cpup->phys_id, new_cpup->core_id); 12578 } 12579 } 12580 12581 /* Assign hdwq indices that are unique across all cpus in the map 12582 * that are also FIRST_CPUs. 12583 */ 12584 idx = 0; 12585 for_each_present_cpu(cpu) { 12586 cpup = &phba->sli4_hba.cpu_map[cpu]; 12587 12588 /* Only FIRST IRQs get a hdwq index assignment. */ 12589 if (!(cpup->flag & LPFC_CPU_FIRST_IRQ)) 12590 continue; 12591 12592 /* 1 to 1, the first LPFC_CPU_FIRST_IRQ cpus to a unique hdwq */ 12593 cpup->hdwq = idx; 12594 idx++; 12595 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 12596 "3333 Set Affinity: CPU %d (phys %d core %d): " 12597 "hdwq %d eq %d flg x%x\n", 12598 cpu, cpup->phys_id, cpup->core_id, 12599 cpup->hdwq, cpup->eq, cpup->flag); 12600 } 12601 /* Associate a hdwq with each cpu_map entry 12602 * This will be 1 to 1 - hdwq to cpu, unless there are less 12603 * hardware queues then CPUs. For that case we will just round-robin 12604 * the available hardware queues as they get assigned to CPUs. 12605 * The next_idx is the idx from the FIRST_CPU loop above to account 12606 * for irq_chann < hdwq. The idx is used for round-robin assignments 12607 * and needs to start at 0. 12608 */ 12609 next_idx = idx; 12610 start_cpu = 0; 12611 idx = 0; 12612 for_each_present_cpu(cpu) { 12613 cpup = &phba->sli4_hba.cpu_map[cpu]; 12614 12615 /* FIRST cpus are already mapped. */ 12616 if (cpup->flag & LPFC_CPU_FIRST_IRQ) 12617 continue; 12618 12619 /* If the cfg_irq_chann < cfg_hdw_queue, set the hdwq 12620 * of the unassigned cpus to the next idx so that all 12621 * hdw queues are fully utilized. 12622 */ 12623 if (next_idx < phba->cfg_hdw_queue) { 12624 cpup->hdwq = next_idx; 12625 next_idx++; 12626 continue; 12627 } 12628 12629 /* Not a First CPU and all hdw_queues are used. Reuse a 12630 * Hardware Queue for another CPU, so be smart about it 12631 * and pick one that has its IRQ/EQ mapped to the same phys_id 12632 * (CPU package) and core_id. 12633 */ 12634 new_cpu = start_cpu; 12635 for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) { 12636 new_cpup = &phba->sli4_hba.cpu_map[new_cpu]; 12637 if (new_cpup->hdwq != LPFC_VECTOR_MAP_EMPTY && 12638 new_cpup->phys_id == cpup->phys_id && 12639 new_cpup->core_id == cpup->core_id) { 12640 goto found_hdwq; 12641 } 12642 new_cpu = lpfc_next_present_cpu(new_cpu); 12643 } 12644 12645 /* If we can't match both phys_id and core_id, 12646 * settle for just a phys_id match. 12647 */ 12648 new_cpu = start_cpu; 12649 for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) { 12650 new_cpup = &phba->sli4_hba.cpu_map[new_cpu]; 12651 if (new_cpup->hdwq != LPFC_VECTOR_MAP_EMPTY && 12652 new_cpup->phys_id == cpup->phys_id) 12653 goto found_hdwq; 12654 new_cpu = lpfc_next_present_cpu(new_cpu); 12655 } 12656 12657 /* Otherwise just round robin on cfg_hdw_queue */ 12658 cpup->hdwq = idx % phba->cfg_hdw_queue; 12659 idx++; 12660 goto logit; 12661 found_hdwq: 12662 /* We found an available entry, copy the IRQ info */ 12663 start_cpu = lpfc_next_present_cpu(new_cpu); 12664 cpup->hdwq = new_cpup->hdwq; 12665 logit: 12666 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 12667 "3335 Set Affinity: CPU %d (phys %d core %d): " 12668 "hdwq %d eq %d flg x%x\n", 12669 cpu, cpup->phys_id, cpup->core_id, 12670 cpup->hdwq, cpup->eq, cpup->flag); 12671 } 12672 12673 /* 12674 * Initialize the cpu_map slots for not-present cpus in case 12675 * a cpu is hot-added. Perform a simple hdwq round robin assignment. 12676 */ 12677 idx = 0; 12678 for_each_possible_cpu(cpu) { 12679 cpup = &phba->sli4_hba.cpu_map[cpu]; 12680 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS 12681 c_stat = per_cpu_ptr(phba->sli4_hba.c_stat, cpu); 12682 c_stat->hdwq_no = cpup->hdwq; 12683 #endif 12684 if (cpup->hdwq != LPFC_VECTOR_MAP_EMPTY) 12685 continue; 12686 12687 cpup->hdwq = idx++ % phba->cfg_hdw_queue; 12688 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS 12689 c_stat->hdwq_no = cpup->hdwq; 12690 #endif 12691 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 12692 "3340 Set Affinity: not present " 12693 "CPU %d hdwq %d\n", 12694 cpu, cpup->hdwq); 12695 } 12696 12697 /* The cpu_map array will be used later during initialization 12698 * when EQ / CQ / WQs are allocated and configured. 12699 */ 12700 return; 12701 } 12702 12703 /** 12704 * lpfc_cpuhp_get_eq 12705 * 12706 * @phba: pointer to lpfc hba data structure. 12707 * @cpu: cpu going offline 12708 * @eqlist: eq list to append to 12709 */ 12710 static int 12711 lpfc_cpuhp_get_eq(struct lpfc_hba *phba, unsigned int cpu, 12712 struct list_head *eqlist) 12713 { 12714 const struct cpumask *maskp; 12715 struct lpfc_queue *eq; 12716 struct cpumask *tmp; 12717 u16 idx; 12718 12719 tmp = kzalloc(cpumask_size(), GFP_KERNEL); 12720 if (!tmp) 12721 return -ENOMEM; 12722 12723 for (idx = 0; idx < phba->cfg_irq_chann; idx++) { 12724 maskp = pci_irq_get_affinity(phba->pcidev, idx); 12725 if (!maskp) 12726 continue; 12727 /* 12728 * if irq is not affinitized to the cpu going 12729 * then we don't need to poll the eq attached 12730 * to it. 12731 */ 12732 if (!cpumask_and(tmp, maskp, cpumask_of(cpu))) 12733 continue; 12734 /* get the cpus that are online and are affini- 12735 * tized to this irq vector. If the count is 12736 * more than 1 then cpuhp is not going to shut- 12737 * down this vector. Since this cpu has not 12738 * gone offline yet, we need >1. 12739 */ 12740 cpumask_and(tmp, maskp, cpu_online_mask); 12741 if (cpumask_weight(tmp) > 1) 12742 continue; 12743 12744 /* Now that we have an irq to shutdown, get the eq 12745 * mapped to this irq. Note: multiple hdwq's in 12746 * the software can share an eq, but eventually 12747 * only eq will be mapped to this vector 12748 */ 12749 eq = phba->sli4_hba.hba_eq_hdl[idx].eq; 12750 list_add(&eq->_poll_list, eqlist); 12751 } 12752 kfree(tmp); 12753 return 0; 12754 } 12755 12756 static void __lpfc_cpuhp_remove(struct lpfc_hba *phba) 12757 { 12758 if (phba->sli_rev != LPFC_SLI_REV4) 12759 return; 12760 12761 cpuhp_state_remove_instance_nocalls(lpfc_cpuhp_state, 12762 &phba->cpuhp); 12763 /* 12764 * unregistering the instance doesn't stop the polling 12765 * timer. Wait for the poll timer to retire. 12766 */ 12767 synchronize_rcu(); 12768 timer_delete_sync(&phba->cpuhp_poll_timer); 12769 } 12770 12771 static void lpfc_cpuhp_remove(struct lpfc_hba *phba) 12772 { 12773 if (phba->pport && 12774 test_bit(FC_OFFLINE_MODE, &phba->pport->fc_flag)) 12775 return; 12776 12777 __lpfc_cpuhp_remove(phba); 12778 } 12779 12780 static void lpfc_cpuhp_add(struct lpfc_hba *phba) 12781 { 12782 if (phba->sli_rev != LPFC_SLI_REV4) 12783 return; 12784 12785 rcu_read_lock(); 12786 12787 if (!list_empty(&phba->poll_list)) 12788 mod_timer(&phba->cpuhp_poll_timer, 12789 jiffies + msecs_to_jiffies(LPFC_POLL_HB)); 12790 12791 rcu_read_unlock(); 12792 12793 cpuhp_state_add_instance_nocalls(lpfc_cpuhp_state, 12794 &phba->cpuhp); 12795 } 12796 12797 static int __lpfc_cpuhp_checks(struct lpfc_hba *phba, int *retval) 12798 { 12799 if (test_bit(FC_UNLOADING, &phba->pport->load_flag)) { 12800 *retval = -EAGAIN; 12801 return true; 12802 } 12803 12804 if (phba->sli_rev != LPFC_SLI_REV4) { 12805 *retval = 0; 12806 return true; 12807 } 12808 12809 /* proceed with the hotplug */ 12810 return false; 12811 } 12812 12813 /** 12814 * lpfc_irq_set_aff - set IRQ affinity 12815 * @eqhdl: EQ handle 12816 * @cpu: cpu to set affinity 12817 * 12818 **/ 12819 static inline void 12820 lpfc_irq_set_aff(struct lpfc_hba_eq_hdl *eqhdl, unsigned int cpu) 12821 { 12822 cpumask_clear(&eqhdl->aff_mask); 12823 cpumask_set_cpu(cpu, &eqhdl->aff_mask); 12824 irq_set_status_flags(eqhdl->irq, IRQ_NO_BALANCING); 12825 irq_set_affinity(eqhdl->irq, &eqhdl->aff_mask); 12826 } 12827 12828 /** 12829 * lpfc_irq_clear_aff - clear IRQ affinity 12830 * @eqhdl: EQ handle 12831 * 12832 **/ 12833 static inline void 12834 lpfc_irq_clear_aff(struct lpfc_hba_eq_hdl *eqhdl) 12835 { 12836 cpumask_clear(&eqhdl->aff_mask); 12837 irq_clear_status_flags(eqhdl->irq, IRQ_NO_BALANCING); 12838 } 12839 12840 /** 12841 * lpfc_irq_rebalance - rebalances IRQ affinity according to cpuhp event 12842 * @phba: pointer to HBA context object. 12843 * @cpu: cpu going offline/online 12844 * @offline: true, cpu is going offline. false, cpu is coming online. 12845 * 12846 * If cpu is going offline, we'll try our best effort to find the next 12847 * online cpu on the phba's original_mask and migrate all offlining IRQ 12848 * affinities. 12849 * 12850 * If cpu is coming online, reaffinitize the IRQ back to the onlining cpu. 12851 * 12852 * Note: Call only if NUMA or NHT mode is enabled, otherwise rely on 12853 * PCI_IRQ_AFFINITY to auto-manage IRQ affinity. 12854 * 12855 **/ 12856 static void 12857 lpfc_irq_rebalance(struct lpfc_hba *phba, unsigned int cpu, bool offline) 12858 { 12859 struct lpfc_vector_map_info *cpup; 12860 struct cpumask *aff_mask; 12861 unsigned int cpu_select, cpu_next, idx; 12862 const struct cpumask *orig_mask; 12863 12864 if (phba->irq_chann_mode == NORMAL_MODE) 12865 return; 12866 12867 orig_mask = &phba->sli4_hba.irq_aff_mask; 12868 12869 if (!cpumask_test_cpu(cpu, orig_mask)) 12870 return; 12871 12872 cpup = &phba->sli4_hba.cpu_map[cpu]; 12873 12874 if (!(cpup->flag & LPFC_CPU_FIRST_IRQ)) 12875 return; 12876 12877 if (offline) { 12878 /* Find next online CPU on original mask */ 12879 cpu_next = cpumask_next_wrap(cpu, orig_mask); 12880 cpu_select = lpfc_next_online_cpu(orig_mask, cpu_next); 12881 12882 /* Found a valid CPU */ 12883 if ((cpu_select < nr_cpu_ids) && (cpu_select != cpu)) { 12884 /* Go through each eqhdl and ensure offlining 12885 * cpu aff_mask is migrated 12886 */ 12887 for (idx = 0; idx < phba->cfg_irq_chann; idx++) { 12888 aff_mask = lpfc_get_aff_mask(idx); 12889 12890 /* Migrate affinity */ 12891 if (cpumask_test_cpu(cpu, aff_mask)) 12892 lpfc_irq_set_aff(lpfc_get_eq_hdl(idx), 12893 cpu_select); 12894 } 12895 } else { 12896 /* Rely on irqbalance if no online CPUs left on NUMA */ 12897 for (idx = 0; idx < phba->cfg_irq_chann; idx++) 12898 lpfc_irq_clear_aff(lpfc_get_eq_hdl(idx)); 12899 } 12900 } else { 12901 /* Migrate affinity back to this CPU */ 12902 lpfc_irq_set_aff(lpfc_get_eq_hdl(cpup->eq), cpu); 12903 } 12904 } 12905 12906 static int lpfc_cpu_offline(unsigned int cpu, struct hlist_node *node) 12907 { 12908 struct lpfc_hba *phba = hlist_entry_safe(node, struct lpfc_hba, cpuhp); 12909 struct lpfc_queue *eq, *next; 12910 LIST_HEAD(eqlist); 12911 int retval; 12912 12913 if (!phba) { 12914 WARN_ONCE(!phba, "cpu: %u. phba:NULL", raw_smp_processor_id()); 12915 return 0; 12916 } 12917 12918 if (__lpfc_cpuhp_checks(phba, &retval)) 12919 return retval; 12920 12921 lpfc_irq_rebalance(phba, cpu, true); 12922 12923 retval = lpfc_cpuhp_get_eq(phba, cpu, &eqlist); 12924 if (retval) 12925 return retval; 12926 12927 /* start polling on these eq's */ 12928 list_for_each_entry_safe(eq, next, &eqlist, _poll_list) { 12929 list_del_init(&eq->_poll_list); 12930 lpfc_sli4_start_polling(eq); 12931 } 12932 12933 return 0; 12934 } 12935 12936 static int lpfc_cpu_online(unsigned int cpu, struct hlist_node *node) 12937 { 12938 struct lpfc_hba *phba = hlist_entry_safe(node, struct lpfc_hba, cpuhp); 12939 struct lpfc_queue *eq, *next; 12940 unsigned int n; 12941 int retval; 12942 12943 if (!phba) { 12944 WARN_ONCE(!phba, "cpu: %u. phba:NULL", raw_smp_processor_id()); 12945 return 0; 12946 } 12947 12948 if (__lpfc_cpuhp_checks(phba, &retval)) 12949 return retval; 12950 12951 lpfc_irq_rebalance(phba, cpu, false); 12952 12953 list_for_each_entry_safe(eq, next, &phba->poll_list, _poll_list) { 12954 n = lpfc_find_cpu_handle(phba, eq->hdwq, LPFC_FIND_BY_HDWQ); 12955 if (n == cpu) 12956 lpfc_sli4_stop_polling(eq); 12957 } 12958 12959 return 0; 12960 } 12961 12962 /** 12963 * lpfc_sli4_enable_msix - Enable MSI-X interrupt mode to SLI-4 device 12964 * @phba: pointer to lpfc hba data structure. 12965 * 12966 * This routine is invoked to enable the MSI-X interrupt vectors to device 12967 * with SLI-4 interface spec. It also allocates MSI-X vectors and maps them 12968 * to cpus on the system. 12969 * 12970 * When cfg_irq_numa is enabled, the adapter will only allocate vectors for 12971 * the number of cpus on the same numa node as this adapter. The vectors are 12972 * allocated without requesting OS affinity mapping. A vector will be 12973 * allocated and assigned to each online and offline cpu. If the cpu is 12974 * online, then affinity will be set to that cpu. If the cpu is offline, then 12975 * affinity will be set to the nearest peer cpu within the numa node that is 12976 * online. If there are no online cpus within the numa node, affinity is not 12977 * assigned and the OS may do as it pleases. Note: cpu vector affinity mapping 12978 * is consistent with the way cpu online/offline is handled when cfg_irq_numa is 12979 * configured. 12980 * 12981 * If numa mode is not enabled and there is more than 1 vector allocated, then 12982 * the driver relies on the managed irq interface where the OS assigns vector to 12983 * cpu affinity. The driver will then use that affinity mapping to setup its 12984 * cpu mapping table. 12985 * 12986 * Return codes 12987 * 0 - successful 12988 * other values - error 12989 **/ 12990 static int 12991 lpfc_sli4_enable_msix(struct lpfc_hba *phba) 12992 { 12993 int vectors, rc, index; 12994 char *name; 12995 const struct cpumask *aff_mask = NULL; 12996 unsigned int cpu = 0, cpu_cnt = 0, cpu_select = nr_cpu_ids; 12997 struct lpfc_vector_map_info *cpup; 12998 struct lpfc_hba_eq_hdl *eqhdl; 12999 const struct cpumask *maskp; 13000 unsigned int flags = PCI_IRQ_MSIX; 13001 13002 /* Set up MSI-X multi-message vectors */ 13003 vectors = phba->cfg_irq_chann; 13004 13005 if (phba->irq_chann_mode != NORMAL_MODE) 13006 aff_mask = &phba->sli4_hba.irq_aff_mask; 13007 13008 if (aff_mask) { 13009 cpu_cnt = cpumask_weight(aff_mask); 13010 vectors = min(phba->cfg_irq_chann, cpu_cnt); 13011 13012 /* cpu: iterates over aff_mask including offline or online 13013 * cpu_select: iterates over online aff_mask to set affinity 13014 */ 13015 cpu = cpumask_first(aff_mask); 13016 cpu_select = lpfc_next_online_cpu(aff_mask, cpu); 13017 } else { 13018 flags |= PCI_IRQ_AFFINITY; 13019 } 13020 13021 rc = pci_alloc_irq_vectors(phba->pcidev, 1, vectors, flags); 13022 if (rc < 0) { 13023 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 13024 "0484 PCI enable MSI-X failed (%d)\n", rc); 13025 goto vec_fail_out; 13026 } 13027 vectors = rc; 13028 13029 /* Assign MSI-X vectors to interrupt handlers */ 13030 for (index = 0; index < vectors; index++) { 13031 eqhdl = lpfc_get_eq_hdl(index); 13032 name = eqhdl->handler_name; 13033 memset(name, 0, LPFC_SLI4_HANDLER_NAME_SZ); 13034 snprintf(name, LPFC_SLI4_HANDLER_NAME_SZ, 13035 LPFC_DRIVER_HANDLER_NAME"%d", index); 13036 13037 eqhdl->idx = index; 13038 rc = pci_irq_vector(phba->pcidev, index); 13039 if (rc < 0) { 13040 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 13041 "0489 MSI-X fast-path (%d) " 13042 "pci_irq_vec failed (%d)\n", index, rc); 13043 goto cfg_fail_out; 13044 } 13045 eqhdl->irq = rc; 13046 13047 rc = request_threaded_irq(eqhdl->irq, 13048 &lpfc_sli4_hba_intr_handler, 13049 &lpfc_sli4_hba_intr_handler_th, 13050 0, name, eqhdl); 13051 if (rc) { 13052 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 13053 "0486 MSI-X fast-path (%d) " 13054 "request_irq failed (%d)\n", index, rc); 13055 goto cfg_fail_out; 13056 } 13057 13058 if (aff_mask) { 13059 /* If found a neighboring online cpu, set affinity */ 13060 if (cpu_select < nr_cpu_ids) 13061 lpfc_irq_set_aff(eqhdl, cpu_select); 13062 13063 /* Assign EQ to cpu_map */ 13064 lpfc_assign_eq_map_info(phba, index, 13065 LPFC_CPU_FIRST_IRQ, 13066 cpu); 13067 13068 /* Iterate to next offline or online cpu in aff_mask */ 13069 cpu = cpumask_next(cpu, aff_mask); 13070 13071 /* Find next online cpu in aff_mask to set affinity */ 13072 cpu_select = lpfc_next_online_cpu(aff_mask, cpu); 13073 } else if (vectors == 1) { 13074 cpu = cpumask_first(cpu_present_mask); 13075 lpfc_assign_eq_map_info(phba, index, LPFC_CPU_FIRST_IRQ, 13076 cpu); 13077 } else { 13078 maskp = pci_irq_get_affinity(phba->pcidev, index); 13079 13080 /* Loop through all CPUs associated with vector index */ 13081 for_each_cpu_and(cpu, maskp, cpu_present_mask) { 13082 cpup = &phba->sli4_hba.cpu_map[cpu]; 13083 13084 /* If this is the first CPU thats assigned to 13085 * this vector, set LPFC_CPU_FIRST_IRQ. 13086 * 13087 * With certain platforms its possible that irq 13088 * vectors are affinitized to all the cpu's. 13089 * This can result in each cpu_map.eq to be set 13090 * to the last vector, resulting in overwrite 13091 * of all the previous cpu_map.eq. Ensure that 13092 * each vector receives a place in cpu_map. 13093 * Later call to lpfc_cpu_affinity_check will 13094 * ensure we are nicely balanced out. 13095 */ 13096 if (cpup->eq != LPFC_VECTOR_MAP_EMPTY) 13097 continue; 13098 lpfc_assign_eq_map_info(phba, index, 13099 LPFC_CPU_FIRST_IRQ, 13100 cpu); 13101 break; 13102 } 13103 } 13104 } 13105 13106 if (vectors != phba->cfg_irq_chann) { 13107 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 13108 "3238 Reducing IO channels to match number of " 13109 "MSI-X vectors, requested %d got %d\n", 13110 phba->cfg_irq_chann, vectors); 13111 if (phba->cfg_irq_chann > vectors) 13112 phba->cfg_irq_chann = vectors; 13113 } 13114 13115 return rc; 13116 13117 cfg_fail_out: 13118 /* free the irq already requested */ 13119 for (--index; index >= 0; index--) { 13120 eqhdl = lpfc_get_eq_hdl(index); 13121 lpfc_irq_clear_aff(eqhdl); 13122 free_irq(eqhdl->irq, eqhdl); 13123 } 13124 13125 /* Unconfigure MSI-X capability structure */ 13126 pci_free_irq_vectors(phba->pcidev); 13127 13128 vec_fail_out: 13129 return rc; 13130 } 13131 13132 /** 13133 * lpfc_sli4_enable_msi - Enable MSI interrupt mode to SLI-4 device 13134 * @phba: pointer to lpfc hba data structure. 13135 * 13136 * This routine is invoked to enable the MSI interrupt mode to device with 13137 * SLI-4 interface spec. The kernel function pci_alloc_irq_vectors() is 13138 * called to enable the MSI vector. The device driver is responsible for 13139 * calling the request_irq() to register MSI vector with a interrupt the 13140 * handler, which is done in this function. 13141 * 13142 * Return codes 13143 * 0 - successful 13144 * other values - error 13145 **/ 13146 static int 13147 lpfc_sli4_enable_msi(struct lpfc_hba *phba) 13148 { 13149 int rc, index; 13150 unsigned int cpu; 13151 struct lpfc_hba_eq_hdl *eqhdl; 13152 13153 rc = pci_alloc_irq_vectors(phba->pcidev, 1, 1, 13154 PCI_IRQ_MSI | PCI_IRQ_AFFINITY); 13155 if (rc > 0) 13156 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 13157 "0487 PCI enable MSI mode success.\n"); 13158 else { 13159 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 13160 "0488 PCI enable MSI mode failed (%d)\n", rc); 13161 return rc ? rc : -1; 13162 } 13163 13164 rc = request_irq(phba->pcidev->irq, lpfc_sli4_intr_handler, 13165 0, LPFC_DRIVER_NAME, phba); 13166 if (rc) { 13167 pci_free_irq_vectors(phba->pcidev); 13168 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 13169 "0490 MSI request_irq failed (%d)\n", rc); 13170 return rc; 13171 } 13172 13173 eqhdl = lpfc_get_eq_hdl(0); 13174 rc = pci_irq_vector(phba->pcidev, 0); 13175 if (rc < 0) { 13176 free_irq(phba->pcidev->irq, phba); 13177 pci_free_irq_vectors(phba->pcidev); 13178 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 13179 "0496 MSI pci_irq_vec failed (%d)\n", rc); 13180 return rc; 13181 } 13182 eqhdl->irq = rc; 13183 13184 cpu = cpumask_first(cpu_present_mask); 13185 lpfc_assign_eq_map_info(phba, 0, LPFC_CPU_FIRST_IRQ, cpu); 13186 13187 for (index = 0; index < phba->cfg_irq_chann; index++) { 13188 eqhdl = lpfc_get_eq_hdl(index); 13189 eqhdl->idx = index; 13190 } 13191 13192 return 0; 13193 } 13194 13195 /** 13196 * lpfc_sli4_enable_intr - Enable device interrupt to SLI-4 device 13197 * @phba: pointer to lpfc hba data structure. 13198 * @cfg_mode: Interrupt configuration mode (INTx, MSI or MSI-X). 13199 * 13200 * This routine is invoked to enable device interrupt and associate driver's 13201 * interrupt handler(s) to interrupt vector(s) to device with SLI-4 13202 * interface spec. Depends on the interrupt mode configured to the driver, 13203 * the driver will try to fallback from the configured interrupt mode to an 13204 * interrupt mode which is supported by the platform, kernel, and device in 13205 * the order of: 13206 * MSI-X -> MSI -> IRQ. 13207 * 13208 * Return codes 13209 * Interrupt mode (2, 1, 0) - successful 13210 * LPFC_INTR_ERROR - error 13211 **/ 13212 static uint32_t 13213 lpfc_sli4_enable_intr(struct lpfc_hba *phba, uint32_t cfg_mode) 13214 { 13215 uint32_t intr_mode = LPFC_INTR_ERROR; 13216 int retval, idx; 13217 13218 if (cfg_mode == 2) { 13219 /* Preparation before conf_msi mbox cmd */ 13220 retval = 0; 13221 if (!retval) { 13222 /* Now, try to enable MSI-X interrupt mode */ 13223 retval = lpfc_sli4_enable_msix(phba); 13224 if (!retval) { 13225 /* Indicate initialization to MSI-X mode */ 13226 phba->intr_type = MSIX; 13227 intr_mode = 2; 13228 } 13229 } 13230 } 13231 13232 /* Fallback to MSI if MSI-X initialization failed */ 13233 if (cfg_mode >= 1 && phba->intr_type == NONE) { 13234 retval = lpfc_sli4_enable_msi(phba); 13235 if (!retval) { 13236 /* Indicate initialization to MSI mode */ 13237 phba->intr_type = MSI; 13238 intr_mode = 1; 13239 } 13240 } 13241 13242 /* Fallback to INTx if both MSI-X/MSI initalization failed */ 13243 if (phba->intr_type == NONE) { 13244 retval = request_irq(phba->pcidev->irq, lpfc_sli4_intr_handler, 13245 IRQF_SHARED, LPFC_DRIVER_NAME, phba); 13246 if (!retval) { 13247 struct lpfc_hba_eq_hdl *eqhdl; 13248 unsigned int cpu; 13249 13250 /* Indicate initialization to INTx mode */ 13251 phba->intr_type = INTx; 13252 intr_mode = 0; 13253 13254 eqhdl = lpfc_get_eq_hdl(0); 13255 retval = pci_irq_vector(phba->pcidev, 0); 13256 if (retval < 0) { 13257 free_irq(phba->pcidev->irq, phba); 13258 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 13259 "0502 INTR pci_irq_vec failed (%d)\n", 13260 retval); 13261 return LPFC_INTR_ERROR; 13262 } 13263 eqhdl->irq = retval; 13264 13265 cpu = cpumask_first(cpu_present_mask); 13266 lpfc_assign_eq_map_info(phba, 0, LPFC_CPU_FIRST_IRQ, 13267 cpu); 13268 for (idx = 0; idx < phba->cfg_irq_chann; idx++) { 13269 eqhdl = lpfc_get_eq_hdl(idx); 13270 eqhdl->idx = idx; 13271 } 13272 } 13273 } 13274 return intr_mode; 13275 } 13276 13277 /** 13278 * lpfc_sli4_disable_intr - Disable device interrupt to SLI-4 device 13279 * @phba: pointer to lpfc hba data structure. 13280 * 13281 * This routine is invoked to disable device interrupt and disassociate 13282 * the driver's interrupt handler(s) from interrupt vector(s) to device 13283 * with SLI-4 interface spec. Depending on the interrupt mode, the driver 13284 * will release the interrupt vector(s) for the message signaled interrupt. 13285 **/ 13286 static void 13287 lpfc_sli4_disable_intr(struct lpfc_hba *phba) 13288 { 13289 /* Disable the currently initialized interrupt mode */ 13290 if (phba->intr_type == MSIX) { 13291 int index; 13292 struct lpfc_hba_eq_hdl *eqhdl; 13293 13294 /* Free up MSI-X multi-message vectors */ 13295 for (index = 0; index < phba->cfg_irq_chann; index++) { 13296 eqhdl = lpfc_get_eq_hdl(index); 13297 lpfc_irq_clear_aff(eqhdl); 13298 free_irq(eqhdl->irq, eqhdl); 13299 } 13300 } else { 13301 free_irq(phba->pcidev->irq, phba); 13302 } 13303 13304 pci_free_irq_vectors(phba->pcidev); 13305 13306 /* Reset interrupt management states */ 13307 phba->intr_type = NONE; 13308 phba->sli.slistat.sli_intr = 0; 13309 } 13310 13311 /** 13312 * lpfc_unset_hba - Unset SLI3 hba device initialization 13313 * @phba: pointer to lpfc hba data structure. 13314 * 13315 * This routine is invoked to unset the HBA device initialization steps to 13316 * a device with SLI-3 interface spec. 13317 **/ 13318 static void 13319 lpfc_unset_hba(struct lpfc_hba *phba) 13320 { 13321 set_bit(FC_UNLOADING, &phba->pport->load_flag); 13322 13323 kfree(phba->vpi_bmask); 13324 kfree(phba->vpi_ids); 13325 13326 lpfc_stop_hba_timers(phba); 13327 13328 phba->pport->work_port_events = 0; 13329 13330 lpfc_sli_hba_down(phba); 13331 13332 lpfc_sli_brdrestart(phba); 13333 13334 lpfc_sli_disable_intr(phba); 13335 13336 return; 13337 } 13338 13339 /** 13340 * lpfc_sli4_xri_exchange_busy_wait - Wait for device XRI exchange busy 13341 * @phba: Pointer to HBA context object. 13342 * 13343 * This function is called in the SLI4 code path to wait for completion 13344 * of device's XRIs exchange busy. It will check the XRI exchange busy 13345 * on outstanding FCP and ELS I/Os every 10ms for up to 10 seconds; after 13346 * that, it will check the XRI exchange busy on outstanding FCP and ELS 13347 * I/Os every 30 seconds, log error message, and wait forever. Only when 13348 * all XRI exchange busy complete, the driver unload shall proceed with 13349 * invoking the function reset ioctl mailbox command to the CNA and the 13350 * the rest of the driver unload resource release. 13351 **/ 13352 static void 13353 lpfc_sli4_xri_exchange_busy_wait(struct lpfc_hba *phba) 13354 { 13355 struct lpfc_sli4_hdw_queue *qp; 13356 int idx, ccnt; 13357 int wait_time = 0; 13358 int io_xri_cmpl = 1; 13359 int nvmet_xri_cmpl = 1; 13360 int els_xri_cmpl = list_empty(&phba->sli4_hba.lpfc_abts_els_sgl_list); 13361 13362 /* Driver just aborted IOs during the hba_unset process. Pause 13363 * here to give the HBA time to complete the IO and get entries 13364 * into the abts lists. 13365 */ 13366 msleep(LPFC_XRI_EXCH_BUSY_WAIT_T1 * 5); 13367 13368 /* Wait for NVME pending IO to flush back to transport. */ 13369 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) 13370 lpfc_nvme_wait_for_io_drain(phba); 13371 13372 ccnt = 0; 13373 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { 13374 qp = &phba->sli4_hba.hdwq[idx]; 13375 io_xri_cmpl = list_empty(&qp->lpfc_abts_io_buf_list); 13376 if (!io_xri_cmpl) /* if list is NOT empty */ 13377 ccnt++; 13378 } 13379 if (ccnt) 13380 io_xri_cmpl = 0; 13381 13382 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 13383 nvmet_xri_cmpl = 13384 list_empty(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list); 13385 } 13386 13387 while (!els_xri_cmpl || !io_xri_cmpl || !nvmet_xri_cmpl) { 13388 if (wait_time > LPFC_XRI_EXCH_BUSY_WAIT_TMO) { 13389 if (!nvmet_xri_cmpl) 13390 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 13391 "6424 NVMET XRI exchange busy " 13392 "wait time: %d seconds.\n", 13393 wait_time/1000); 13394 if (!io_xri_cmpl) 13395 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 13396 "6100 IO XRI exchange busy " 13397 "wait time: %d seconds.\n", 13398 wait_time/1000); 13399 if (!els_xri_cmpl) 13400 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 13401 "2878 ELS XRI exchange busy " 13402 "wait time: %d seconds.\n", 13403 wait_time/1000); 13404 msleep(LPFC_XRI_EXCH_BUSY_WAIT_T2); 13405 wait_time += LPFC_XRI_EXCH_BUSY_WAIT_T2; 13406 } else { 13407 msleep(LPFC_XRI_EXCH_BUSY_WAIT_T1); 13408 wait_time += LPFC_XRI_EXCH_BUSY_WAIT_T1; 13409 } 13410 13411 ccnt = 0; 13412 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { 13413 qp = &phba->sli4_hba.hdwq[idx]; 13414 io_xri_cmpl = list_empty( 13415 &qp->lpfc_abts_io_buf_list); 13416 if (!io_xri_cmpl) /* if list is NOT empty */ 13417 ccnt++; 13418 } 13419 if (ccnt) 13420 io_xri_cmpl = 0; 13421 13422 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 13423 nvmet_xri_cmpl = list_empty( 13424 &phba->sli4_hba.lpfc_abts_nvmet_ctx_list); 13425 } 13426 els_xri_cmpl = 13427 list_empty(&phba->sli4_hba.lpfc_abts_els_sgl_list); 13428 13429 } 13430 } 13431 13432 /** 13433 * lpfc_sli4_hba_unset - Unset the fcoe hba 13434 * @phba: Pointer to HBA context object. 13435 * 13436 * This function is called in the SLI4 code path to reset the HBA's FCoE 13437 * function. The caller is not required to hold any lock. This routine 13438 * issues PCI function reset mailbox command to reset the FCoE function. 13439 * At the end of the function, it calls lpfc_hba_down_post function to 13440 * free any pending commands. 13441 **/ 13442 static void 13443 lpfc_sli4_hba_unset(struct lpfc_hba *phba) 13444 { 13445 int wait_cnt = 0; 13446 LPFC_MBOXQ_t *mboxq; 13447 struct pci_dev *pdev = phba->pcidev; 13448 13449 lpfc_stop_hba_timers(phba); 13450 hrtimer_cancel(&phba->cmf_stats_timer); 13451 hrtimer_cancel(&phba->cmf_timer); 13452 13453 if (phba->pport) 13454 phba->sli4_hba.intr_enable = 0; 13455 13456 /* 13457 * Gracefully wait out the potential current outstanding asynchronous 13458 * mailbox command. 13459 */ 13460 13461 /* First, block any pending async mailbox command from posted */ 13462 spin_lock_irq(&phba->hbalock); 13463 phba->sli.sli_flag |= LPFC_SLI_ASYNC_MBX_BLK; 13464 spin_unlock_irq(&phba->hbalock); 13465 /* Now, trying to wait it out if we can */ 13466 while (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) { 13467 msleep(10); 13468 if (++wait_cnt > LPFC_ACTIVE_MBOX_WAIT_CNT) 13469 break; 13470 } 13471 /* Forcefully release the outstanding mailbox command if timed out */ 13472 if (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) { 13473 spin_lock_irq(&phba->hbalock); 13474 mboxq = phba->sli.mbox_active; 13475 mboxq->u.mb.mbxStatus = MBX_NOT_FINISHED; 13476 __lpfc_mbox_cmpl_put(phba, mboxq); 13477 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE; 13478 phba->sli.mbox_active = NULL; 13479 spin_unlock_irq(&phba->hbalock); 13480 } 13481 13482 /* Abort all iocbs associated with the hba */ 13483 lpfc_sli_hba_iocb_abort(phba); 13484 13485 if (!pci_channel_offline(phba->pcidev)) 13486 /* Wait for completion of device XRI exchange busy */ 13487 lpfc_sli4_xri_exchange_busy_wait(phba); 13488 13489 /* per-phba callback de-registration for hotplug event */ 13490 if (phba->pport) 13491 lpfc_cpuhp_remove(phba); 13492 13493 /* Disable PCI subsystem interrupt */ 13494 lpfc_sli4_disable_intr(phba); 13495 13496 /* Disable SR-IOV if enabled */ 13497 if (phba->cfg_sriov_nr_virtfn) 13498 pci_disable_sriov(pdev); 13499 13500 /* Stop kthread signal shall trigger work_done one more time */ 13501 kthread_stop(phba->worker_thread); 13502 13503 /* Disable FW logging to host memory */ 13504 lpfc_ras_stop_fwlog(phba); 13505 13506 lpfc_sli4_queue_unset(phba); 13507 13508 /* Reset SLI4 HBA FCoE function */ 13509 lpfc_pci_function_reset(phba); 13510 13511 /* release all queue allocated resources. */ 13512 lpfc_sli4_queue_destroy(phba); 13513 13514 /* Free RAS DMA memory */ 13515 if (phba->ras_fwlog.ras_enabled) 13516 lpfc_sli4_ras_dma_free(phba); 13517 13518 /* Stop the SLI4 device port */ 13519 if (phba->pport) 13520 phba->pport->work_port_events = 0; 13521 } 13522 13523 static uint32_t 13524 lpfc_cgn_crc32(uint32_t crc, u8 byte) 13525 { 13526 uint32_t msb = 0; 13527 uint32_t bit; 13528 13529 for (bit = 0; bit < 8; bit++) { 13530 msb = (crc >> 31) & 1; 13531 crc <<= 1; 13532 13533 if (msb ^ (byte & 1)) { 13534 crc ^= LPFC_CGN_CRC32_MAGIC_NUMBER; 13535 crc |= 1; 13536 } 13537 byte >>= 1; 13538 } 13539 return crc; 13540 } 13541 13542 static uint32_t 13543 lpfc_cgn_reverse_bits(uint32_t wd) 13544 { 13545 uint32_t result = 0; 13546 uint32_t i; 13547 13548 for (i = 0; i < 32; i++) { 13549 result <<= 1; 13550 result |= (1 & (wd >> i)); 13551 } 13552 return result; 13553 } 13554 13555 /* 13556 * The routine corresponds with the algorithm the HBA firmware 13557 * uses to validate the data integrity. 13558 */ 13559 uint32_t 13560 lpfc_cgn_calc_crc32(void *ptr, uint32_t byteLen, uint32_t crc) 13561 { 13562 uint32_t i; 13563 uint32_t result; 13564 uint8_t *data = (uint8_t *)ptr; 13565 13566 for (i = 0; i < byteLen; ++i) 13567 crc = lpfc_cgn_crc32(crc, data[i]); 13568 13569 result = ~lpfc_cgn_reverse_bits(crc); 13570 return result; 13571 } 13572 13573 void 13574 lpfc_init_congestion_buf(struct lpfc_hba *phba) 13575 { 13576 struct lpfc_cgn_info *cp; 13577 uint16_t size; 13578 uint32_t crc; 13579 13580 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT, 13581 "6235 INIT Congestion Buffer %p\n", phba->cgn_i); 13582 13583 if (!phba->cgn_i) 13584 return; 13585 cp = (struct lpfc_cgn_info *)phba->cgn_i->virt; 13586 13587 atomic_set(&phba->cgn_fabric_warn_cnt, 0); 13588 atomic_set(&phba->cgn_fabric_alarm_cnt, 0); 13589 atomic_set(&phba->cgn_sync_alarm_cnt, 0); 13590 atomic_set(&phba->cgn_sync_warn_cnt, 0); 13591 13592 atomic_set(&phba->cgn_driver_evt_cnt, 0); 13593 atomic_set(&phba->cgn_latency_evt_cnt, 0); 13594 atomic64_set(&phba->cgn_latency_evt, 0); 13595 phba->cgn_evt_minute = 0; 13596 13597 memset(cp, 0xff, offsetof(struct lpfc_cgn_info, cgn_stat)); 13598 cp->cgn_info_size = cpu_to_le16(LPFC_CGN_INFO_SZ); 13599 cp->cgn_info_version = LPFC_CGN_INFO_V4; 13600 13601 /* cgn parameters */ 13602 cp->cgn_info_mode = phba->cgn_p.cgn_param_mode; 13603 cp->cgn_info_level0 = phba->cgn_p.cgn_param_level0; 13604 cp->cgn_info_level1 = phba->cgn_p.cgn_param_level1; 13605 cp->cgn_info_level2 = phba->cgn_p.cgn_param_level2; 13606 13607 lpfc_cgn_update_tstamp(phba, &cp->base_time); 13608 13609 /* Fill in default LUN qdepth */ 13610 if (phba->pport) { 13611 size = (uint16_t)(phba->pport->cfg_lun_queue_depth); 13612 cp->cgn_lunq = cpu_to_le16(size); 13613 } 13614 13615 /* last used Index initialized to 0xff already */ 13616 13617 cp->cgn_warn_freq = cpu_to_le16(LPFC_FPIN_INIT_FREQ); 13618 cp->cgn_alarm_freq = cpu_to_le16(LPFC_FPIN_INIT_FREQ); 13619 crc = lpfc_cgn_calc_crc32(cp, LPFC_CGN_INFO_SZ, LPFC_CGN_CRC32_SEED); 13620 cp->cgn_info_crc = cpu_to_le32(crc); 13621 13622 phba->cgn_evt_timestamp = jiffies + 13623 msecs_to_jiffies(LPFC_CGN_TIMER_TO_MIN); 13624 } 13625 13626 void 13627 lpfc_init_congestion_stat(struct lpfc_hba *phba) 13628 { 13629 struct lpfc_cgn_info *cp; 13630 uint32_t crc; 13631 13632 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT, 13633 "6236 INIT Congestion Stat %p\n", phba->cgn_i); 13634 13635 if (!phba->cgn_i) 13636 return; 13637 13638 cp = (struct lpfc_cgn_info *)phba->cgn_i->virt; 13639 memset(&cp->cgn_stat, 0, sizeof(cp->cgn_stat)); 13640 13641 lpfc_cgn_update_tstamp(phba, &cp->stat_start); 13642 crc = lpfc_cgn_calc_crc32(cp, LPFC_CGN_INFO_SZ, LPFC_CGN_CRC32_SEED); 13643 cp->cgn_info_crc = cpu_to_le32(crc); 13644 } 13645 13646 /** 13647 * __lpfc_reg_congestion_buf - register congestion info buffer with HBA 13648 * @phba: Pointer to hba context object. 13649 * @reg: flag to determine register or unregister. 13650 */ 13651 static int 13652 __lpfc_reg_congestion_buf(struct lpfc_hba *phba, int reg) 13653 { 13654 struct lpfc_mbx_reg_congestion_buf *reg_congestion_buf; 13655 union lpfc_sli4_cfg_shdr *shdr; 13656 uint32_t shdr_status, shdr_add_status; 13657 LPFC_MBOXQ_t *mboxq; 13658 int length, rc; 13659 13660 if (!phba->cgn_i) 13661 return -ENXIO; 13662 13663 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL); 13664 if (!mboxq) { 13665 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX, 13666 "2641 REG_CONGESTION_BUF mbox allocation fail: " 13667 "HBA state x%x reg %d\n", 13668 phba->pport->port_state, reg); 13669 return -ENOMEM; 13670 } 13671 13672 length = (sizeof(struct lpfc_mbx_reg_congestion_buf) - 13673 sizeof(struct lpfc_sli4_cfg_mhdr)); 13674 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON, 13675 LPFC_MBOX_OPCODE_REG_CONGESTION_BUF, length, 13676 LPFC_SLI4_MBX_EMBED); 13677 reg_congestion_buf = &mboxq->u.mqe.un.reg_congestion_buf; 13678 bf_set(lpfc_mbx_reg_cgn_buf_type, reg_congestion_buf, 1); 13679 if (reg > 0) 13680 bf_set(lpfc_mbx_reg_cgn_buf_cnt, reg_congestion_buf, 1); 13681 else 13682 bf_set(lpfc_mbx_reg_cgn_buf_cnt, reg_congestion_buf, 0); 13683 reg_congestion_buf->length = sizeof(struct lpfc_cgn_info); 13684 reg_congestion_buf->addr_lo = 13685 putPaddrLow(phba->cgn_i->phys); 13686 reg_congestion_buf->addr_hi = 13687 putPaddrHigh(phba->cgn_i->phys); 13688 13689 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); 13690 shdr = (union lpfc_sli4_cfg_shdr *) 13691 &mboxq->u.mqe.un.sli4_config.header.cfg_shdr; 13692 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response); 13693 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, 13694 &shdr->response); 13695 mempool_free(mboxq, phba->mbox_mem_pool); 13696 if (shdr_status || shdr_add_status || rc) { 13697 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 13698 "2642 REG_CONGESTION_BUF mailbox " 13699 "failed with status x%x add_status x%x," 13700 " mbx status x%x reg %d\n", 13701 shdr_status, shdr_add_status, rc, reg); 13702 return -ENXIO; 13703 } 13704 return 0; 13705 } 13706 13707 int 13708 lpfc_unreg_congestion_buf(struct lpfc_hba *phba) 13709 { 13710 lpfc_cmf_stop(phba); 13711 return __lpfc_reg_congestion_buf(phba, 0); 13712 } 13713 13714 int 13715 lpfc_reg_congestion_buf(struct lpfc_hba *phba) 13716 { 13717 return __lpfc_reg_congestion_buf(phba, 1); 13718 } 13719 13720 /** 13721 * lpfc_get_sli4_parameters - Get the SLI4 Config PARAMETERS. 13722 * @phba: Pointer to HBA context object. 13723 * @mboxq: Pointer to the mailboxq memory for the mailbox command response. 13724 * 13725 * This function is called in the SLI4 code path to read the port's 13726 * sli4 capabilities. 13727 * 13728 * This function may be be called from any context that can block-wait 13729 * for the completion. The expectation is that this routine is called 13730 * typically from probe_one or from the online routine. 13731 **/ 13732 int 13733 lpfc_get_sli4_parameters(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq) 13734 { 13735 int rc; 13736 struct lpfc_mqe *mqe = &mboxq->u.mqe; 13737 struct lpfc_pc_sli4_params *sli4_params; 13738 uint32_t mbox_tmo; 13739 int length; 13740 bool exp_wqcq_pages = true; 13741 struct lpfc_sli4_parameters *mbx_sli4_parameters; 13742 13743 /* 13744 * By default, the driver assumes the SLI4 port requires RPI 13745 * header postings. The SLI4_PARAM response will correct this 13746 * assumption. 13747 */ 13748 phba->sli4_hba.rpi_hdrs_in_use = 1; 13749 13750 /* Read the port's SLI4 Config Parameters */ 13751 length = (sizeof(struct lpfc_mbx_get_sli4_parameters) - 13752 sizeof(struct lpfc_sli4_cfg_mhdr)); 13753 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON, 13754 LPFC_MBOX_OPCODE_GET_SLI4_PARAMETERS, 13755 length, LPFC_SLI4_MBX_EMBED); 13756 if (!phba->sli4_hba.intr_enable) 13757 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL); 13758 else { 13759 mbox_tmo = lpfc_mbox_tmo_val(phba, mboxq); 13760 rc = lpfc_sli_issue_mbox_wait(phba, mboxq, mbox_tmo); 13761 } 13762 if (unlikely(rc)) 13763 return rc; 13764 sli4_params = &phba->sli4_hba.pc_sli4_params; 13765 mbx_sli4_parameters = &mqe->un.get_sli4_parameters.sli4_parameters; 13766 sli4_params->if_type = bf_get(cfg_if_type, mbx_sli4_parameters); 13767 sli4_params->sli_rev = bf_get(cfg_sli_rev, mbx_sli4_parameters); 13768 sli4_params->sli_family = bf_get(cfg_sli_family, mbx_sli4_parameters); 13769 sli4_params->featurelevel_1 = bf_get(cfg_sli_hint_1, 13770 mbx_sli4_parameters); 13771 sli4_params->featurelevel_2 = bf_get(cfg_sli_hint_2, 13772 mbx_sli4_parameters); 13773 if (bf_get(cfg_phwq, mbx_sli4_parameters)) 13774 phba->sli3_options |= LPFC_SLI4_PHWQ_ENABLED; 13775 else 13776 phba->sli3_options &= ~LPFC_SLI4_PHWQ_ENABLED; 13777 sli4_params->sge_supp_len = mbx_sli4_parameters->sge_supp_len; 13778 sli4_params->loopbk_scope = bf_get(cfg_loopbk_scope, 13779 mbx_sli4_parameters); 13780 sli4_params->oas_supported = bf_get(cfg_oas, mbx_sli4_parameters); 13781 sli4_params->cqv = bf_get(cfg_cqv, mbx_sli4_parameters); 13782 sli4_params->mqv = bf_get(cfg_mqv, mbx_sli4_parameters); 13783 sli4_params->wqv = bf_get(cfg_wqv, mbx_sli4_parameters); 13784 sli4_params->rqv = bf_get(cfg_rqv, mbx_sli4_parameters); 13785 sli4_params->eqav = bf_get(cfg_eqav, mbx_sli4_parameters); 13786 sli4_params->cqav = bf_get(cfg_cqav, mbx_sli4_parameters); 13787 sli4_params->wqsize = bf_get(cfg_wqsize, mbx_sli4_parameters); 13788 sli4_params->bv1s = bf_get(cfg_bv1s, mbx_sli4_parameters); 13789 sli4_params->pls = bf_get(cfg_pvl, mbx_sli4_parameters); 13790 sli4_params->sgl_pages_max = bf_get(cfg_sgl_page_cnt, 13791 mbx_sli4_parameters); 13792 sli4_params->wqpcnt = bf_get(cfg_wqpcnt, mbx_sli4_parameters); 13793 sli4_params->sgl_pp_align = bf_get(cfg_sgl_pp_align, 13794 mbx_sli4_parameters); 13795 phba->sli4_hba.extents_in_use = bf_get(cfg_ext, mbx_sli4_parameters); 13796 phba->sli4_hba.rpi_hdrs_in_use = bf_get(cfg_hdrr, mbx_sli4_parameters); 13797 sli4_params->mi_cap = bf_get(cfg_mi_ver, mbx_sli4_parameters); 13798 13799 /* Check for Extended Pre-Registered SGL support */ 13800 phba->cfg_xpsgl = bf_get(cfg_xpsgl, mbx_sli4_parameters); 13801 13802 /* Check for firmware nvme support */ 13803 rc = (bf_get(cfg_nvme, mbx_sli4_parameters) && 13804 bf_get(cfg_xib, mbx_sli4_parameters)); 13805 13806 if (rc) { 13807 /* Save this to indicate the Firmware supports NVME */ 13808 sli4_params->nvme = 1; 13809 13810 /* Firmware NVME support, check driver FC4 NVME support */ 13811 if (phba->cfg_enable_fc4_type == LPFC_ENABLE_FCP) { 13812 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_NVME, 13813 "6133 Disabling NVME support: " 13814 "FC4 type not supported: x%x\n", 13815 phba->cfg_enable_fc4_type); 13816 goto fcponly; 13817 } 13818 } else { 13819 /* No firmware NVME support, check driver FC4 NVME support */ 13820 sli4_params->nvme = 0; 13821 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 13822 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_NVME, 13823 "6101 Disabling NVME support: Not " 13824 "supported by firmware (%d %d) x%x\n", 13825 bf_get(cfg_nvme, mbx_sli4_parameters), 13826 bf_get(cfg_xib, mbx_sli4_parameters), 13827 phba->cfg_enable_fc4_type); 13828 fcponly: 13829 phba->nvmet_support = 0; 13830 phba->cfg_nvmet_mrq = 0; 13831 phba->cfg_nvme_seg_cnt = 0; 13832 13833 /* If no FC4 type support, move to just SCSI support */ 13834 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP)) 13835 return -ENODEV; 13836 phba->cfg_enable_fc4_type = LPFC_ENABLE_FCP; 13837 } 13838 } 13839 13840 /* If the NVME FC4 type is enabled, scale the sg_seg_cnt to 13841 * accommodate 512K and 1M IOs in a single nvme buf. 13842 */ 13843 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) 13844 phba->cfg_sg_seg_cnt = LPFC_MAX_NVME_SEG_CNT; 13845 13846 /* Enable embedded Payload BDE if support is indicated */ 13847 if (bf_get(cfg_pbde, mbx_sli4_parameters)) 13848 phba->cfg_enable_pbde = 1; 13849 else 13850 phba->cfg_enable_pbde = 0; 13851 13852 /* 13853 * To support Suppress Response feature we must satisfy 3 conditions. 13854 * lpfc_suppress_rsp module parameter must be set (default). 13855 * In SLI4-Parameters Descriptor: 13856 * Extended Inline Buffers (XIB) must be supported. 13857 * Suppress Response IU Not Supported (SRIUNS) must NOT be supported 13858 * (double negative). 13859 */ 13860 if (phba->cfg_suppress_rsp && bf_get(cfg_xib, mbx_sli4_parameters) && 13861 !(bf_get(cfg_nosr, mbx_sli4_parameters))) 13862 phba->sli.sli_flag |= LPFC_SLI_SUPPRESS_RSP; 13863 else 13864 phba->cfg_suppress_rsp = 0; 13865 13866 if (bf_get(cfg_eqdr, mbx_sli4_parameters)) 13867 phba->sli.sli_flag |= LPFC_SLI_USE_EQDR; 13868 13869 /* Make sure that sge_supp_len can be handled by the driver */ 13870 if (sli4_params->sge_supp_len > LPFC_MAX_SGE_SIZE) 13871 sli4_params->sge_supp_len = LPFC_MAX_SGE_SIZE; 13872 13873 dma_set_max_seg_size(&phba->pcidev->dev, sli4_params->sge_supp_len); 13874 13875 /* 13876 * Check whether the adapter supports an embedded copy of the 13877 * FCP CMD IU within the WQE for FCP_Ixxx commands. In order 13878 * to use this option, 128-byte WQEs must be used. 13879 */ 13880 if (bf_get(cfg_ext_embed_cb, mbx_sli4_parameters)) 13881 phba->fcp_embed_io = 1; 13882 else 13883 phba->fcp_embed_io = 0; 13884 13885 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_NVME, 13886 "6422 XIB %d PBDE %d: FCP %d NVME %d %d %d\n", 13887 bf_get(cfg_xib, mbx_sli4_parameters), 13888 phba->cfg_enable_pbde, 13889 phba->fcp_embed_io, sli4_params->nvme, 13890 phba->cfg_nvme_embed_cmd, phba->cfg_suppress_rsp); 13891 13892 if ((bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) == 13893 LPFC_SLI_INTF_IF_TYPE_2) && 13894 (bf_get(lpfc_sli_intf_sli_family, &phba->sli4_hba.sli_intf) == 13895 LPFC_SLI_INTF_FAMILY_LNCR_A0)) 13896 exp_wqcq_pages = false; 13897 13898 if ((bf_get(cfg_cqpsize, mbx_sli4_parameters) & LPFC_CQ_16K_PAGE_SZ) && 13899 (bf_get(cfg_wqpsize, mbx_sli4_parameters) & LPFC_WQ_16K_PAGE_SZ) && 13900 exp_wqcq_pages && 13901 (sli4_params->wqsize & LPFC_WQ_SZ128_SUPPORT)) 13902 phba->enab_exp_wqcq_pages = 1; 13903 else 13904 phba->enab_exp_wqcq_pages = 0; 13905 /* 13906 * Check if the SLI port supports MDS Diagnostics 13907 */ 13908 if (bf_get(cfg_mds_diags, mbx_sli4_parameters)) 13909 phba->mds_diags_support = 1; 13910 else 13911 phba->mds_diags_support = 0; 13912 13913 /* 13914 * Check if the SLI port supports NSLER 13915 */ 13916 if (bf_get(cfg_nsler, mbx_sli4_parameters)) 13917 phba->nsler = 1; 13918 else 13919 phba->nsler = 0; 13920 13921 return 0; 13922 } 13923 13924 /** 13925 * lpfc_pci_probe_one_s3 - PCI probe func to reg SLI-3 device to PCI subsystem. 13926 * @pdev: pointer to PCI device 13927 * @pid: pointer to PCI device identifier 13928 * 13929 * This routine is to be called to attach a device with SLI-3 interface spec 13930 * to the PCI subsystem. When an Emulex HBA with SLI-3 interface spec is 13931 * presented on PCI bus, the kernel PCI subsystem looks at PCI device-specific 13932 * information of the device and driver to see if the driver state that it can 13933 * support this kind of device. If the match is successful, the driver core 13934 * invokes this routine. If this routine determines it can claim the HBA, it 13935 * does all the initialization that it needs to do to handle the HBA properly. 13936 * 13937 * Return code 13938 * 0 - driver can claim the device 13939 * negative value - driver can not claim the device 13940 **/ 13941 static int 13942 lpfc_pci_probe_one_s3(struct pci_dev *pdev, const struct pci_device_id *pid) 13943 { 13944 struct lpfc_hba *phba; 13945 struct lpfc_vport *vport = NULL; 13946 struct Scsi_Host *shost = NULL; 13947 int error; 13948 uint32_t cfg_mode, intr_mode; 13949 13950 /* Allocate memory for HBA structure */ 13951 phba = lpfc_hba_alloc(pdev); 13952 if (!phba) 13953 return -ENOMEM; 13954 13955 /* Perform generic PCI device enabling operation */ 13956 error = lpfc_enable_pci_dev(phba); 13957 if (error) 13958 goto out_free_phba; 13959 13960 /* Set up SLI API function jump table for PCI-device group-0 HBAs */ 13961 error = lpfc_api_table_setup(phba, LPFC_PCI_DEV_LP); 13962 if (error) 13963 goto out_disable_pci_dev; 13964 13965 /* Set up SLI-3 specific device PCI memory space */ 13966 error = lpfc_sli_pci_mem_setup(phba); 13967 if (error) { 13968 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 13969 "1402 Failed to set up pci memory space.\n"); 13970 goto out_disable_pci_dev; 13971 } 13972 13973 /* Set up SLI-3 specific device driver resources */ 13974 error = lpfc_sli_driver_resource_setup(phba); 13975 if (error) { 13976 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 13977 "1404 Failed to set up driver resource.\n"); 13978 goto out_unset_pci_mem_s3; 13979 } 13980 13981 /* Initialize and populate the iocb list per host */ 13982 13983 error = lpfc_init_iocb_list(phba, LPFC_IOCB_LIST_CNT); 13984 if (error) { 13985 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 13986 "1405 Failed to initialize iocb list.\n"); 13987 goto out_unset_driver_resource_s3; 13988 } 13989 13990 /* Set up common device driver resources */ 13991 error = lpfc_setup_driver_resource_phase2(phba); 13992 if (error) { 13993 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 13994 "1406 Failed to set up driver resource.\n"); 13995 goto out_free_iocb_list; 13996 } 13997 13998 /* Get the default values for Model Name and Description */ 13999 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc); 14000 14001 /* Create SCSI host to the physical port */ 14002 error = lpfc_create_shost(phba); 14003 if (error) { 14004 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 14005 "1407 Failed to create scsi host.\n"); 14006 goto out_unset_driver_resource; 14007 } 14008 14009 /* Configure sysfs attributes */ 14010 vport = phba->pport; 14011 error = lpfc_alloc_sysfs_attr(vport); 14012 if (error) { 14013 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 14014 "1476 Failed to allocate sysfs attr\n"); 14015 goto out_destroy_shost; 14016 } 14017 14018 shost = lpfc_shost_from_vport(vport); /* save shost for error cleanup */ 14019 /* Now, trying to enable interrupt and bring up the device */ 14020 cfg_mode = phba->cfg_use_msi; 14021 while (true) { 14022 /* Put device to a known state before enabling interrupt */ 14023 lpfc_stop_port(phba); 14024 /* Configure and enable interrupt */ 14025 intr_mode = lpfc_sli_enable_intr(phba, cfg_mode); 14026 if (intr_mode == LPFC_INTR_ERROR) { 14027 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14028 "0431 Failed to enable interrupt.\n"); 14029 error = -ENODEV; 14030 goto out_free_sysfs_attr; 14031 } 14032 /* SLI-3 HBA setup */ 14033 if (lpfc_sli_hba_setup(phba)) { 14034 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14035 "1477 Failed to set up hba\n"); 14036 error = -ENODEV; 14037 goto out_remove_device; 14038 } 14039 14040 /* Wait 50ms for the interrupts of previous mailbox commands */ 14041 msleep(50); 14042 /* Check active interrupts on message signaled interrupts */ 14043 if (intr_mode == 0 || 14044 phba->sli.slistat.sli_intr > LPFC_MSIX_VECTORS) { 14045 /* Log the current active interrupt mode */ 14046 phba->intr_mode = intr_mode; 14047 lpfc_log_intr_mode(phba, intr_mode); 14048 break; 14049 } else { 14050 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 14051 "0447 Configure interrupt mode (%d) " 14052 "failed active interrupt test.\n", 14053 intr_mode); 14054 /* Disable the current interrupt mode */ 14055 lpfc_sli_disable_intr(phba); 14056 /* Try next level of interrupt mode */ 14057 cfg_mode = --intr_mode; 14058 } 14059 } 14060 14061 /* Perform post initialization setup */ 14062 lpfc_post_init_setup(phba); 14063 14064 /* Check if there are static vports to be created. */ 14065 lpfc_create_static_vport(phba); 14066 14067 return 0; 14068 14069 out_remove_device: 14070 lpfc_unset_hba(phba); 14071 out_free_sysfs_attr: 14072 lpfc_free_sysfs_attr(vport); 14073 out_destroy_shost: 14074 lpfc_destroy_shost(phba); 14075 out_unset_driver_resource: 14076 lpfc_unset_driver_resource_phase2(phba); 14077 out_free_iocb_list: 14078 lpfc_free_iocb_list(phba); 14079 out_unset_driver_resource_s3: 14080 lpfc_sli_driver_resource_unset(phba); 14081 out_unset_pci_mem_s3: 14082 lpfc_sli_pci_mem_unset(phba); 14083 out_disable_pci_dev: 14084 lpfc_disable_pci_dev(phba); 14085 if (shost) 14086 scsi_host_put(shost); 14087 out_free_phba: 14088 lpfc_hba_free(phba); 14089 return error; 14090 } 14091 14092 /** 14093 * lpfc_pci_remove_one_s3 - PCI func to unreg SLI-3 device from PCI subsystem. 14094 * @pdev: pointer to PCI device 14095 * 14096 * This routine is to be called to disattach a device with SLI-3 interface 14097 * spec from PCI subsystem. When an Emulex HBA with SLI-3 interface spec is 14098 * removed from PCI bus, it performs all the necessary cleanup for the HBA 14099 * device to be removed from the PCI subsystem properly. 14100 **/ 14101 static void 14102 lpfc_pci_remove_one_s3(struct pci_dev *pdev) 14103 { 14104 struct Scsi_Host *shost = pci_get_drvdata(pdev); 14105 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata; 14106 struct lpfc_vport **vports; 14107 struct lpfc_hba *phba = vport->phba; 14108 int i; 14109 14110 set_bit(FC_UNLOADING, &vport->load_flag); 14111 14112 lpfc_free_sysfs_attr(vport); 14113 14114 /* Release all the vports against this physical port */ 14115 vports = lpfc_create_vport_work_array(phba); 14116 if (vports != NULL) 14117 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) { 14118 if (vports[i]->port_type == LPFC_PHYSICAL_PORT) 14119 continue; 14120 fc_vport_terminate(vports[i]->fc_vport); 14121 } 14122 lpfc_destroy_vport_work_array(phba, vports); 14123 14124 /* Remove FC host with the physical port */ 14125 fc_remove_host(shost); 14126 scsi_remove_host(shost); 14127 14128 /* Clean up all nodes, mailboxes and IOs. */ 14129 lpfc_cleanup(vport); 14130 14131 /* 14132 * Bring down the SLI Layer. This step disable all interrupts, 14133 * clears the rings, discards all mailbox commands, and resets 14134 * the HBA. 14135 */ 14136 14137 /* HBA interrupt will be disabled after this call */ 14138 lpfc_sli_hba_down(phba); 14139 /* Stop kthread signal shall trigger work_done one more time */ 14140 kthread_stop(phba->worker_thread); 14141 /* Final cleanup of txcmplq and reset the HBA */ 14142 lpfc_sli_brdrestart(phba); 14143 14144 kfree(phba->vpi_bmask); 14145 kfree(phba->vpi_ids); 14146 14147 lpfc_stop_hba_timers(phba); 14148 spin_lock_irq(&phba->port_list_lock); 14149 list_del_init(&vport->listentry); 14150 spin_unlock_irq(&phba->port_list_lock); 14151 14152 lpfc_debugfs_terminate(vport); 14153 14154 /* Disable SR-IOV if enabled */ 14155 if (phba->cfg_sriov_nr_virtfn) 14156 pci_disable_sriov(pdev); 14157 14158 /* Disable interrupt */ 14159 lpfc_sli_disable_intr(phba); 14160 14161 scsi_host_put(shost); 14162 14163 /* 14164 * Call scsi_free before mem_free since scsi bufs are released to their 14165 * corresponding pools here. 14166 */ 14167 lpfc_scsi_free(phba); 14168 lpfc_free_iocb_list(phba); 14169 14170 lpfc_mem_free_all(phba); 14171 14172 dma_free_coherent(&pdev->dev, lpfc_sli_hbq_size(), 14173 phba->hbqslimp.virt, phba->hbqslimp.phys); 14174 14175 /* Free resources associated with SLI2 interface */ 14176 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE, 14177 phba->slim2p.virt, phba->slim2p.phys); 14178 14179 /* unmap adapter SLIM and Control Registers */ 14180 iounmap(phba->ctrl_regs_memmap_p); 14181 iounmap(phba->slim_memmap_p); 14182 14183 lpfc_hba_free(phba); 14184 14185 pci_release_mem_regions(pdev); 14186 pci_disable_device(pdev); 14187 } 14188 14189 /** 14190 * lpfc_pci_suspend_one_s3 - PCI func to suspend SLI-3 device for power mgmnt 14191 * @dev_d: pointer to device 14192 * 14193 * This routine is to be called from the kernel's PCI subsystem to support 14194 * system Power Management (PM) to device with SLI-3 interface spec. When 14195 * PM invokes this method, it quiesces the device by stopping the driver's 14196 * worker thread for the device, turning off device's interrupt and DMA, 14197 * and bring the device offline. Note that as the driver implements the 14198 * minimum PM requirements to a power-aware driver's PM support for the 14199 * suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, FREEZE) 14200 * to the suspend() method call will be treated as SUSPEND and the driver will 14201 * fully reinitialize its device during resume() method call, the driver will 14202 * set device to PCI_D3hot state in PCI config space instead of setting it 14203 * according to the @msg provided by the PM. 14204 * 14205 * Return code 14206 * 0 - driver suspended the device 14207 * Error otherwise 14208 **/ 14209 static int __maybe_unused 14210 lpfc_pci_suspend_one_s3(struct device *dev_d) 14211 { 14212 struct Scsi_Host *shost = dev_get_drvdata(dev_d); 14213 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 14214 14215 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 14216 "0473 PCI device Power Management suspend.\n"); 14217 14218 /* Bring down the device */ 14219 lpfc_offline_prep(phba, LPFC_MBX_WAIT); 14220 lpfc_offline(phba); 14221 kthread_stop(phba->worker_thread); 14222 14223 /* Disable interrupt from device */ 14224 lpfc_sli_disable_intr(phba); 14225 14226 return 0; 14227 } 14228 14229 /** 14230 * lpfc_pci_resume_one_s3 - PCI func to resume SLI-3 device for power mgmnt 14231 * @dev_d: pointer to device 14232 * 14233 * This routine is to be called from the kernel's PCI subsystem to support 14234 * system Power Management (PM) to device with SLI-3 interface spec. When PM 14235 * invokes this method, it restores the device's PCI config space state and 14236 * fully reinitializes the device and brings it online. Note that as the 14237 * driver implements the minimum PM requirements to a power-aware driver's 14238 * PM for suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, 14239 * FREEZE) to the suspend() method call will be treated as SUSPEND and the 14240 * driver will fully reinitialize its device during resume() method call, 14241 * the device will be set to PCI_D0 directly in PCI config space before 14242 * restoring the state. 14243 * 14244 * Return code 14245 * 0 - driver suspended the device 14246 * Error otherwise 14247 **/ 14248 static int __maybe_unused 14249 lpfc_pci_resume_one_s3(struct device *dev_d) 14250 { 14251 struct Scsi_Host *shost = dev_get_drvdata(dev_d); 14252 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 14253 uint32_t intr_mode; 14254 int error; 14255 14256 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 14257 "0452 PCI device Power Management resume.\n"); 14258 14259 /* Startup the kernel thread for this host adapter. */ 14260 phba->worker_thread = kthread_run(lpfc_do_work, phba, 14261 "lpfc_worker_%d", phba->brd_no); 14262 if (IS_ERR(phba->worker_thread)) { 14263 error = PTR_ERR(phba->worker_thread); 14264 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 14265 "0434 PM resume failed to start worker " 14266 "thread: error=x%x.\n", error); 14267 return error; 14268 } 14269 14270 /* Init cpu_map array */ 14271 lpfc_cpu_map_array_init(phba); 14272 /* Init hba_eq_hdl array */ 14273 lpfc_hba_eq_hdl_array_init(phba); 14274 /* Configure and enable interrupt */ 14275 intr_mode = lpfc_sli_enable_intr(phba, phba->intr_mode); 14276 if (intr_mode == LPFC_INTR_ERROR) { 14277 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14278 "0430 PM resume Failed to enable interrupt\n"); 14279 return -EIO; 14280 } else 14281 phba->intr_mode = intr_mode; 14282 14283 /* Restart HBA and bring it online */ 14284 lpfc_sli_brdrestart(phba); 14285 lpfc_online(phba); 14286 14287 /* Log the current active interrupt mode */ 14288 lpfc_log_intr_mode(phba, phba->intr_mode); 14289 14290 return 0; 14291 } 14292 14293 /** 14294 * lpfc_sli_prep_dev_for_recover - Prepare SLI3 device for pci slot recover 14295 * @phba: pointer to lpfc hba data structure. 14296 * 14297 * This routine is called to prepare the SLI3 device for PCI slot recover. It 14298 * aborts all the outstanding SCSI I/Os to the pci device. 14299 **/ 14300 static void 14301 lpfc_sli_prep_dev_for_recover(struct lpfc_hba *phba) 14302 { 14303 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14304 "2723 PCI channel I/O abort preparing for recovery\n"); 14305 14306 /* 14307 * There may be errored I/Os through HBA, abort all I/Os on txcmplq 14308 * and let the SCSI mid-layer to retry them to recover. 14309 */ 14310 lpfc_sli_abort_fcp_rings(phba); 14311 } 14312 14313 /** 14314 * lpfc_sli_prep_dev_for_reset - Prepare SLI3 device for pci slot reset 14315 * @phba: pointer to lpfc hba data structure. 14316 * 14317 * This routine is called to prepare the SLI3 device for PCI slot reset. It 14318 * disables the device interrupt and pci device, and aborts the internal FCP 14319 * pending I/Os. 14320 **/ 14321 static void 14322 lpfc_sli_prep_dev_for_reset(struct lpfc_hba *phba) 14323 { 14324 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14325 "2710 PCI channel disable preparing for reset\n"); 14326 14327 /* Block any management I/Os to the device */ 14328 lpfc_block_mgmt_io(phba, LPFC_MBX_WAIT); 14329 14330 /* Block all SCSI devices' I/Os on the host */ 14331 lpfc_scsi_dev_block(phba); 14332 14333 /* Flush all driver's outstanding SCSI I/Os as we are to reset */ 14334 lpfc_sli_flush_io_rings(phba); 14335 14336 /* stop all timers */ 14337 lpfc_stop_hba_timers(phba); 14338 14339 /* Disable interrupt and pci device */ 14340 lpfc_sli_disable_intr(phba); 14341 pci_disable_device(phba->pcidev); 14342 } 14343 14344 /** 14345 * lpfc_sli_prep_dev_for_perm_failure - Prepare SLI3 dev for pci slot disable 14346 * @phba: pointer to lpfc hba data structure. 14347 * 14348 * This routine is called to prepare the SLI3 device for PCI slot permanently 14349 * disabling. It blocks the SCSI transport layer traffic and flushes the FCP 14350 * pending I/Os. 14351 **/ 14352 static void 14353 lpfc_sli_prep_dev_for_perm_failure(struct lpfc_hba *phba) 14354 { 14355 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14356 "2711 PCI channel permanent disable for failure\n"); 14357 /* Block all SCSI devices' I/Os on the host */ 14358 lpfc_scsi_dev_block(phba); 14359 lpfc_sli4_prep_dev_for_reset(phba); 14360 14361 /* stop all timers */ 14362 lpfc_stop_hba_timers(phba); 14363 14364 /* Clean up all driver's outstanding SCSI I/Os */ 14365 lpfc_sli_flush_io_rings(phba); 14366 } 14367 14368 /** 14369 * lpfc_io_error_detected_s3 - Method for handling SLI-3 device PCI I/O error 14370 * @pdev: pointer to PCI device. 14371 * @state: the current PCI connection state. 14372 * 14373 * This routine is called from the PCI subsystem for I/O error handling to 14374 * device with SLI-3 interface spec. This function is called by the PCI 14375 * subsystem after a PCI bus error affecting this device has been detected. 14376 * When this function is invoked, it will need to stop all the I/Os and 14377 * interrupt(s) to the device. Once that is done, it will return 14378 * PCI_ERS_RESULT_NEED_RESET for the PCI subsystem to perform proper recovery 14379 * as desired. 14380 * 14381 * Return codes 14382 * PCI_ERS_RESULT_CAN_RECOVER - can be recovered with reset_link 14383 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery 14384 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered 14385 **/ 14386 static pci_ers_result_t 14387 lpfc_io_error_detected_s3(struct pci_dev *pdev, pci_channel_state_t state) 14388 { 14389 struct Scsi_Host *shost = pci_get_drvdata(pdev); 14390 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 14391 14392 switch (state) { 14393 case pci_channel_io_normal: 14394 /* Non-fatal error, prepare for recovery */ 14395 lpfc_sli_prep_dev_for_recover(phba); 14396 return PCI_ERS_RESULT_CAN_RECOVER; 14397 case pci_channel_io_frozen: 14398 /* Fatal error, prepare for slot reset */ 14399 lpfc_sli_prep_dev_for_reset(phba); 14400 return PCI_ERS_RESULT_NEED_RESET; 14401 case pci_channel_io_perm_failure: 14402 /* Permanent failure, prepare for device down */ 14403 lpfc_sli_prep_dev_for_perm_failure(phba); 14404 return PCI_ERS_RESULT_DISCONNECT; 14405 default: 14406 /* Unknown state, prepare and request slot reset */ 14407 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14408 "0472 Unknown PCI error state: x%x\n", state); 14409 lpfc_sli_prep_dev_for_reset(phba); 14410 return PCI_ERS_RESULT_NEED_RESET; 14411 } 14412 } 14413 14414 /** 14415 * lpfc_io_slot_reset_s3 - Method for restarting PCI SLI-3 device from scratch. 14416 * @pdev: pointer to PCI device. 14417 * 14418 * This routine is called from the PCI subsystem for error handling to 14419 * device with SLI-3 interface spec. This is called after PCI bus has been 14420 * reset to restart the PCI card from scratch, as if from a cold-boot. 14421 * During the PCI subsystem error recovery, after driver returns 14422 * PCI_ERS_RESULT_NEED_RESET, the PCI subsystem will perform proper error 14423 * recovery and then call this routine before calling the .resume method 14424 * to recover the device. This function will initialize the HBA device, 14425 * enable the interrupt, but it will just put the HBA to offline state 14426 * without passing any I/O traffic. 14427 * 14428 * Return codes 14429 * PCI_ERS_RESULT_RECOVERED - the device has been recovered 14430 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered 14431 */ 14432 static pci_ers_result_t 14433 lpfc_io_slot_reset_s3(struct pci_dev *pdev) 14434 { 14435 struct Scsi_Host *shost = pci_get_drvdata(pdev); 14436 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 14437 struct lpfc_sli *psli = &phba->sli; 14438 uint32_t intr_mode; 14439 14440 dev_printk(KERN_INFO, &pdev->dev, "recovering from a slot reset.\n"); 14441 if (pci_enable_device_mem(pdev)) { 14442 printk(KERN_ERR "lpfc: Cannot re-enable " 14443 "PCI device after reset.\n"); 14444 return PCI_ERS_RESULT_DISCONNECT; 14445 } 14446 14447 pci_restore_state(pdev); 14448 14449 /* 14450 * As the new kernel behavior of pci_restore_state() API call clears 14451 * device saved_state flag, need to save the restored state again. 14452 */ 14453 pci_save_state(pdev); 14454 14455 if (pdev->is_busmaster) 14456 pci_set_master(pdev); 14457 14458 spin_lock_irq(&phba->hbalock); 14459 psli->sli_flag &= ~LPFC_SLI_ACTIVE; 14460 spin_unlock_irq(&phba->hbalock); 14461 14462 /* Configure and enable interrupt */ 14463 intr_mode = lpfc_sli_enable_intr(phba, phba->intr_mode); 14464 if (intr_mode == LPFC_INTR_ERROR) { 14465 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14466 "0427 Cannot re-enable interrupt after " 14467 "slot reset.\n"); 14468 return PCI_ERS_RESULT_DISCONNECT; 14469 } else 14470 phba->intr_mode = intr_mode; 14471 14472 /* Take device offline, it will perform cleanup */ 14473 lpfc_offline_prep(phba, LPFC_MBX_WAIT); 14474 lpfc_offline(phba); 14475 lpfc_sli_brdrestart(phba); 14476 14477 /* Log the current active interrupt mode */ 14478 lpfc_log_intr_mode(phba, phba->intr_mode); 14479 14480 return PCI_ERS_RESULT_RECOVERED; 14481 } 14482 14483 /** 14484 * lpfc_io_resume_s3 - Method for resuming PCI I/O operation on SLI-3 device. 14485 * @pdev: pointer to PCI device 14486 * 14487 * This routine is called from the PCI subsystem for error handling to device 14488 * with SLI-3 interface spec. It is called when kernel error recovery tells 14489 * the lpfc driver that it is ok to resume normal PCI operation after PCI bus 14490 * error recovery. After this call, traffic can start to flow from this device 14491 * again. 14492 */ 14493 static void 14494 lpfc_io_resume_s3(struct pci_dev *pdev) 14495 { 14496 struct Scsi_Host *shost = pci_get_drvdata(pdev); 14497 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 14498 14499 /* Bring device online, it will be no-op for non-fatal error resume */ 14500 lpfc_online(phba); 14501 } 14502 14503 /** 14504 * lpfc_sli4_get_els_iocb_cnt - Calculate the # of ELS IOCBs to reserve 14505 * @phba: pointer to lpfc hba data structure. 14506 * 14507 * returns the number of ELS/CT IOCBs to reserve 14508 **/ 14509 int 14510 lpfc_sli4_get_els_iocb_cnt(struct lpfc_hba *phba) 14511 { 14512 int max_xri = phba->sli4_hba.max_cfg_param.max_xri; 14513 14514 if (phba->sli_rev == LPFC_SLI_REV4) { 14515 if (max_xri <= 100) 14516 return 10; 14517 else if (max_xri <= 256) 14518 return 25; 14519 else if (max_xri <= 512) 14520 return 50; 14521 else if (max_xri <= 1024) 14522 return 100; 14523 else if (max_xri <= 1536) 14524 return 150; 14525 else if (max_xri <= 2048) 14526 return 200; 14527 else 14528 return 250; 14529 } else 14530 return 0; 14531 } 14532 14533 /** 14534 * lpfc_sli4_get_iocb_cnt - Calculate the # of total IOCBs to reserve 14535 * @phba: pointer to lpfc hba data structure. 14536 * 14537 * returns the number of ELS/CT + NVMET IOCBs to reserve 14538 **/ 14539 int 14540 lpfc_sli4_get_iocb_cnt(struct lpfc_hba *phba) 14541 { 14542 int max_xri = lpfc_sli4_get_els_iocb_cnt(phba); 14543 14544 if (phba->nvmet_support) 14545 max_xri += LPFC_NVMET_BUF_POST; 14546 return max_xri; 14547 } 14548 14549 14550 static int 14551 lpfc_log_write_firmware_error(struct lpfc_hba *phba, uint32_t offset, 14552 uint32_t magic_number, uint32_t ftype, uint32_t fid, uint32_t fsize, 14553 const struct firmware *fw) 14554 { 14555 int rc; 14556 u8 sli_family; 14557 14558 sli_family = bf_get(lpfc_sli_intf_sli_family, &phba->sli4_hba.sli_intf); 14559 /* Three cases: (1) FW was not supported on the detected adapter. 14560 * (2) FW update has been locked out administratively. 14561 * (3) Some other error during FW update. 14562 * In each case, an unmaskable message is written to the console 14563 * for admin diagnosis. 14564 */ 14565 if (offset == ADD_STATUS_FW_NOT_SUPPORTED || 14566 (sli_family == LPFC_SLI_INTF_FAMILY_G6 && 14567 magic_number != MAGIC_NUMBER_G6) || 14568 (sli_family == LPFC_SLI_INTF_FAMILY_G7 && 14569 magic_number != MAGIC_NUMBER_G7) || 14570 (sli_family == LPFC_SLI_INTF_FAMILY_G7P && 14571 magic_number != MAGIC_NUMBER_G7P)) { 14572 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14573 "3030 This firmware version is not supported on" 14574 " this HBA model. Device:%x Magic:%x Type:%x " 14575 "ID:%x Size %d %zd\n", 14576 phba->pcidev->device, magic_number, ftype, fid, 14577 fsize, fw->size); 14578 rc = -EINVAL; 14579 } else if (offset == ADD_STATUS_FW_DOWNLOAD_HW_DISABLED) { 14580 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14581 "3021 Firmware downloads have been prohibited " 14582 "by a system configuration setting on " 14583 "Device:%x Magic:%x Type:%x ID:%x Size %d " 14584 "%zd\n", 14585 phba->pcidev->device, magic_number, ftype, fid, 14586 fsize, fw->size); 14587 rc = -EACCES; 14588 } else { 14589 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14590 "3022 FW Download failed. Add Status x%x " 14591 "Device:%x Magic:%x Type:%x ID:%x Size %d " 14592 "%zd\n", 14593 offset, phba->pcidev->device, magic_number, 14594 ftype, fid, fsize, fw->size); 14595 rc = -EIO; 14596 } 14597 return rc; 14598 } 14599 14600 /** 14601 * lpfc_write_firmware - attempt to write a firmware image to the port 14602 * @fw: pointer to firmware image returned from request_firmware. 14603 * @context: pointer to firmware image returned from request_firmware. 14604 * 14605 **/ 14606 static void 14607 lpfc_write_firmware(const struct firmware *fw, void *context) 14608 { 14609 struct lpfc_hba *phba = (struct lpfc_hba *)context; 14610 char fwrev[FW_REV_STR_SIZE]; 14611 struct lpfc_grp_hdr *image; 14612 struct list_head dma_buffer_list; 14613 int i, rc = 0; 14614 struct lpfc_dmabuf *dmabuf, *next; 14615 uint32_t offset = 0, temp_offset = 0; 14616 uint32_t magic_number, ftype, fid, fsize; 14617 14618 /* It can be null in no-wait mode, sanity check */ 14619 if (!fw) { 14620 rc = -ENXIO; 14621 goto out; 14622 } 14623 image = (struct lpfc_grp_hdr *)fw->data; 14624 14625 magic_number = be32_to_cpu(image->magic_number); 14626 ftype = bf_get_be32(lpfc_grp_hdr_file_type, image); 14627 fid = bf_get_be32(lpfc_grp_hdr_id, image); 14628 fsize = be32_to_cpu(image->size); 14629 14630 INIT_LIST_HEAD(&dma_buffer_list); 14631 lpfc_decode_firmware_rev(phba, fwrev, 1); 14632 if (strncmp(fwrev, image->revision, strnlen(image->revision, 16))) { 14633 lpfc_log_msg(phba, KERN_NOTICE, LOG_INIT | LOG_SLI, 14634 "3023 Updating Firmware, Current Version:%s " 14635 "New Version:%s\n", 14636 fwrev, image->revision); 14637 for (i = 0; i < LPFC_MBX_WR_CONFIG_MAX_BDE; i++) { 14638 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), 14639 GFP_KERNEL); 14640 if (!dmabuf) { 14641 rc = -ENOMEM; 14642 goto release_out; 14643 } 14644 dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev, 14645 SLI4_PAGE_SIZE, 14646 &dmabuf->phys, 14647 GFP_KERNEL); 14648 if (!dmabuf->virt) { 14649 kfree(dmabuf); 14650 rc = -ENOMEM; 14651 goto release_out; 14652 } 14653 list_add_tail(&dmabuf->list, &dma_buffer_list); 14654 } 14655 while (offset < fw->size) { 14656 temp_offset = offset; 14657 list_for_each_entry(dmabuf, &dma_buffer_list, list) { 14658 if (temp_offset + SLI4_PAGE_SIZE > fw->size) { 14659 memcpy(dmabuf->virt, 14660 fw->data + temp_offset, 14661 fw->size - temp_offset); 14662 temp_offset = fw->size; 14663 break; 14664 } 14665 memcpy(dmabuf->virt, fw->data + temp_offset, 14666 SLI4_PAGE_SIZE); 14667 temp_offset += SLI4_PAGE_SIZE; 14668 } 14669 rc = lpfc_wr_object(phba, &dma_buffer_list, 14670 (fw->size - offset), &offset); 14671 if (rc) { 14672 rc = lpfc_log_write_firmware_error(phba, offset, 14673 magic_number, 14674 ftype, 14675 fid, 14676 fsize, 14677 fw); 14678 goto release_out; 14679 } 14680 } 14681 rc = offset; 14682 } else 14683 lpfc_log_msg(phba, KERN_NOTICE, LOG_INIT | LOG_SLI, 14684 "3029 Skipped Firmware update, Current " 14685 "Version:%s New Version:%s\n", 14686 fwrev, image->revision); 14687 14688 release_out: 14689 list_for_each_entry_safe(dmabuf, next, &dma_buffer_list, list) { 14690 list_del(&dmabuf->list); 14691 dma_free_coherent(&phba->pcidev->dev, SLI4_PAGE_SIZE, 14692 dmabuf->virt, dmabuf->phys); 14693 kfree(dmabuf); 14694 } 14695 release_firmware(fw); 14696 out: 14697 if (rc < 0) 14698 lpfc_log_msg(phba, KERN_ERR, LOG_INIT | LOG_SLI, 14699 "3062 Firmware update error, status %d.\n", rc); 14700 else 14701 lpfc_log_msg(phba, KERN_NOTICE, LOG_INIT | LOG_SLI, 14702 "3024 Firmware update success: size %d.\n", rc); 14703 } 14704 14705 /** 14706 * lpfc_sli4_request_firmware_update - Request linux generic firmware upgrade 14707 * @phba: pointer to lpfc hba data structure. 14708 * @fw_upgrade: which firmware to update. 14709 * 14710 * This routine is called to perform Linux generic firmware upgrade on device 14711 * that supports such feature. 14712 **/ 14713 int 14714 lpfc_sli4_request_firmware_update(struct lpfc_hba *phba, uint8_t fw_upgrade) 14715 { 14716 char file_name[ELX_FW_NAME_SIZE] = {0}; 14717 int ret; 14718 const struct firmware *fw; 14719 14720 /* Only supported on SLI4 interface type 2 for now */ 14721 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) < 14722 LPFC_SLI_INTF_IF_TYPE_2) 14723 return -EPERM; 14724 14725 scnprintf(file_name, sizeof(file_name), "%s.grp", phba->ModelName); 14726 14727 if (fw_upgrade == INT_FW_UPGRADE) { 14728 ret = request_firmware_nowait(THIS_MODULE, FW_ACTION_UEVENT, 14729 file_name, &phba->pcidev->dev, 14730 GFP_KERNEL, (void *)phba, 14731 lpfc_write_firmware); 14732 } else if (fw_upgrade == RUN_FW_UPGRADE) { 14733 ret = request_firmware(&fw, file_name, &phba->pcidev->dev); 14734 if (!ret) 14735 lpfc_write_firmware(fw, (void *)phba); 14736 } else { 14737 ret = -EINVAL; 14738 } 14739 14740 return ret; 14741 } 14742 14743 /** 14744 * lpfc_pci_probe_one_s4 - PCI probe func to reg SLI-4 device to PCI subsys 14745 * @pdev: pointer to PCI device 14746 * @pid: pointer to PCI device identifier 14747 * 14748 * This routine is called from the kernel's PCI subsystem to device with 14749 * SLI-4 interface spec. When an Emulex HBA with SLI-4 interface spec is 14750 * presented on PCI bus, the kernel PCI subsystem looks at PCI device-specific 14751 * information of the device and driver to see if the driver state that it 14752 * can support this kind of device. If the match is successful, the driver 14753 * core invokes this routine. If this routine determines it can claim the HBA, 14754 * it does all the initialization that it needs to do to handle the HBA 14755 * properly. 14756 * 14757 * Return code 14758 * 0 - driver can claim the device 14759 * negative value - driver can not claim the device 14760 **/ 14761 static int 14762 lpfc_pci_probe_one_s4(struct pci_dev *pdev, const struct pci_device_id *pid) 14763 { 14764 struct lpfc_hba *phba; 14765 struct lpfc_vport *vport = NULL; 14766 struct Scsi_Host *shost = NULL; 14767 int error; 14768 uint32_t cfg_mode, intr_mode; 14769 14770 /* Allocate memory for HBA structure */ 14771 phba = lpfc_hba_alloc(pdev); 14772 if (!phba) 14773 return -ENOMEM; 14774 14775 INIT_LIST_HEAD(&phba->poll_list); 14776 14777 /* Perform generic PCI device enabling operation */ 14778 error = lpfc_enable_pci_dev(phba); 14779 if (error) 14780 goto out_free_phba; 14781 14782 /* Set up SLI API function jump table for PCI-device group-1 HBAs */ 14783 error = lpfc_api_table_setup(phba, LPFC_PCI_DEV_OC); 14784 if (error) 14785 goto out_disable_pci_dev; 14786 14787 /* Set up SLI-4 specific device PCI memory space */ 14788 error = lpfc_sli4_pci_mem_setup(phba); 14789 if (error) { 14790 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 14791 "1410 Failed to set up pci memory space.\n"); 14792 goto out_disable_pci_dev; 14793 } 14794 14795 /* Set up SLI-4 Specific device driver resources */ 14796 error = lpfc_sli4_driver_resource_setup(phba); 14797 if (error) { 14798 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 14799 "1412 Failed to set up driver resource.\n"); 14800 goto out_unset_pci_mem_s4; 14801 } 14802 14803 spin_lock_init(&phba->rrq_list_lock); 14804 INIT_LIST_HEAD(&phba->active_rrq_list); 14805 INIT_LIST_HEAD(&phba->fcf.fcf_pri_list); 14806 14807 /* Set up common device driver resources */ 14808 error = lpfc_setup_driver_resource_phase2(phba); 14809 if (error) { 14810 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 14811 "1414 Failed to set up driver resource.\n"); 14812 goto out_unset_driver_resource_s4; 14813 } 14814 14815 /* Get the default values for Model Name and Description */ 14816 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc); 14817 14818 /* Now, trying to enable interrupt and bring up the device */ 14819 cfg_mode = phba->cfg_use_msi; 14820 14821 /* Put device to a known state before enabling interrupt */ 14822 phba->pport = NULL; 14823 lpfc_stop_port(phba); 14824 14825 /* Init cpu_map array */ 14826 lpfc_cpu_map_array_init(phba); 14827 14828 /* Init hba_eq_hdl array */ 14829 lpfc_hba_eq_hdl_array_init(phba); 14830 14831 /* Configure and enable interrupt */ 14832 intr_mode = lpfc_sli4_enable_intr(phba, cfg_mode); 14833 if (intr_mode == LPFC_INTR_ERROR) { 14834 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14835 "0426 Failed to enable interrupt.\n"); 14836 error = -ENODEV; 14837 goto out_unset_driver_resource; 14838 } 14839 /* Default to single EQ for non-MSI-X */ 14840 if (phba->intr_type != MSIX) { 14841 phba->cfg_irq_chann = 1; 14842 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 14843 if (phba->nvmet_support) 14844 phba->cfg_nvmet_mrq = 1; 14845 } 14846 } 14847 lpfc_cpu_affinity_check(phba, phba->cfg_irq_chann); 14848 14849 /* Create SCSI host to the physical port */ 14850 error = lpfc_create_shost(phba); 14851 if (error) { 14852 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 14853 "1415 Failed to create scsi host.\n"); 14854 goto out_disable_intr; 14855 } 14856 vport = phba->pport; 14857 shost = lpfc_shost_from_vport(vport); /* save shost for error cleanup */ 14858 14859 /* Configure sysfs attributes */ 14860 error = lpfc_alloc_sysfs_attr(vport); 14861 if (error) { 14862 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 14863 "1416 Failed to allocate sysfs attr\n"); 14864 goto out_destroy_shost; 14865 } 14866 14867 /* Set up SLI-4 HBA */ 14868 if (lpfc_sli4_hba_setup(phba)) { 14869 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14870 "1421 Failed to set up hba\n"); 14871 error = -ENODEV; 14872 goto out_free_sysfs_attr; 14873 } 14874 14875 /* Log the current active interrupt mode */ 14876 phba->intr_mode = intr_mode; 14877 lpfc_log_intr_mode(phba, intr_mode); 14878 14879 /* Perform post initialization setup */ 14880 lpfc_post_init_setup(phba); 14881 14882 /* NVME support in FW earlier in the driver load corrects the 14883 * FC4 type making a check for nvme_support unnecessary. 14884 */ 14885 if (phba->nvmet_support == 0) { 14886 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 14887 /* Create NVME binding with nvme_fc_transport. This 14888 * ensures the vport is initialized. If the localport 14889 * create fails, it should not unload the driver to 14890 * support field issues. 14891 */ 14892 error = lpfc_nvme_create_localport(vport); 14893 if (error) { 14894 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 14895 "6004 NVME registration " 14896 "failed, error x%x\n", 14897 error); 14898 } 14899 } 14900 } 14901 14902 /* check for firmware upgrade or downgrade */ 14903 if (phba->cfg_request_firmware_upgrade) 14904 lpfc_sli4_request_firmware_update(phba, INT_FW_UPGRADE); 14905 14906 /* Check if there are static vports to be created. */ 14907 lpfc_create_static_vport(phba); 14908 14909 timer_setup(&phba->cpuhp_poll_timer, lpfc_sli4_poll_hbtimer, 0); 14910 cpuhp_state_add_instance_nocalls(lpfc_cpuhp_state, &phba->cpuhp); 14911 14912 return 0; 14913 14914 out_free_sysfs_attr: 14915 lpfc_free_sysfs_attr(vport); 14916 out_destroy_shost: 14917 lpfc_destroy_shost(phba); 14918 out_disable_intr: 14919 lpfc_sli4_disable_intr(phba); 14920 out_unset_driver_resource: 14921 lpfc_unset_driver_resource_phase2(phba); 14922 out_unset_driver_resource_s4: 14923 lpfc_sli4_driver_resource_unset(phba); 14924 out_unset_pci_mem_s4: 14925 lpfc_sli4_pci_mem_unset(phba); 14926 out_disable_pci_dev: 14927 lpfc_disable_pci_dev(phba); 14928 if (shost) 14929 scsi_host_put(shost); 14930 out_free_phba: 14931 lpfc_hba_free(phba); 14932 return error; 14933 } 14934 14935 /** 14936 * lpfc_pci_remove_one_s4 - PCI func to unreg SLI-4 device from PCI subsystem 14937 * @pdev: pointer to PCI device 14938 * 14939 * This routine is called from the kernel's PCI subsystem to device with 14940 * SLI-4 interface spec. When an Emulex HBA with SLI-4 interface spec is 14941 * removed from PCI bus, it performs all the necessary cleanup for the HBA 14942 * device to be removed from the PCI subsystem properly. 14943 **/ 14944 static void 14945 lpfc_pci_remove_one_s4(struct pci_dev *pdev) 14946 { 14947 struct Scsi_Host *shost = pci_get_drvdata(pdev); 14948 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata; 14949 struct lpfc_vport **vports; 14950 struct lpfc_hba *phba = vport->phba; 14951 int i; 14952 14953 /* Mark the device unloading flag */ 14954 set_bit(FC_UNLOADING, &vport->load_flag); 14955 if (phba->cgn_i) 14956 lpfc_unreg_congestion_buf(phba); 14957 14958 lpfc_free_sysfs_attr(vport); 14959 14960 /* Release all the vports against this physical port */ 14961 vports = lpfc_create_vport_work_array(phba); 14962 if (vports != NULL) 14963 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) { 14964 if (vports[i]->port_type == LPFC_PHYSICAL_PORT) 14965 continue; 14966 fc_vport_terminate(vports[i]->fc_vport); 14967 } 14968 lpfc_destroy_vport_work_array(phba, vports); 14969 14970 /* Remove FC host with the physical port */ 14971 fc_remove_host(shost); 14972 scsi_remove_host(shost); 14973 14974 /* Perform ndlp cleanup on the physical port. The nvme and nvmet 14975 * localports are destroyed after to cleanup all transport memory. 14976 */ 14977 lpfc_cleanup(vport); 14978 lpfc_nvmet_destroy_targetport(phba); 14979 lpfc_nvme_destroy_localport(vport); 14980 14981 /* De-allocate multi-XRI pools */ 14982 if (phba->cfg_xri_rebalancing) 14983 lpfc_destroy_multixri_pools(phba); 14984 14985 /* 14986 * Bring down the SLI Layer. This step disables all interrupts, 14987 * clears the rings, discards all mailbox commands, and resets 14988 * the HBA FCoE function. 14989 */ 14990 lpfc_debugfs_terminate(vport); 14991 14992 lpfc_stop_hba_timers(phba); 14993 spin_lock_irq(&phba->port_list_lock); 14994 list_del_init(&vport->listentry); 14995 spin_unlock_irq(&phba->port_list_lock); 14996 14997 /* Perform scsi free before driver resource_unset since scsi 14998 * buffers are released to their corresponding pools here. 14999 */ 15000 lpfc_io_free(phba); 15001 lpfc_free_iocb_list(phba); 15002 lpfc_sli4_hba_unset(phba); 15003 15004 lpfc_unset_driver_resource_phase2(phba); 15005 lpfc_sli4_driver_resource_unset(phba); 15006 15007 /* Unmap adapter Control and Doorbell registers */ 15008 lpfc_sli4_pci_mem_unset(phba); 15009 15010 /* Release PCI resources and disable device's PCI function */ 15011 scsi_host_put(shost); 15012 lpfc_disable_pci_dev(phba); 15013 15014 /* Finally, free the driver's device data structure */ 15015 lpfc_hba_free(phba); 15016 15017 return; 15018 } 15019 15020 /** 15021 * lpfc_pci_suspend_one_s4 - PCI func to suspend SLI-4 device for power mgmnt 15022 * @dev_d: pointer to device 15023 * 15024 * This routine is called from the kernel's PCI subsystem to support system 15025 * Power Management (PM) to device with SLI-4 interface spec. When PM invokes 15026 * this method, it quiesces the device by stopping the driver's worker 15027 * thread for the device, turning off device's interrupt and DMA, and bring 15028 * the device offline. Note that as the driver implements the minimum PM 15029 * requirements to a power-aware driver's PM support for suspend/resume -- all 15030 * the possible PM messages (SUSPEND, HIBERNATE, FREEZE) to the suspend() 15031 * method call will be treated as SUSPEND and the driver will fully 15032 * reinitialize its device during resume() method call, the driver will set 15033 * device to PCI_D3hot state in PCI config space instead of setting it 15034 * according to the @msg provided by the PM. 15035 * 15036 * Return code 15037 * 0 - driver suspended the device 15038 * Error otherwise 15039 **/ 15040 static int __maybe_unused 15041 lpfc_pci_suspend_one_s4(struct device *dev_d) 15042 { 15043 struct Scsi_Host *shost = dev_get_drvdata(dev_d); 15044 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 15045 15046 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 15047 "2843 PCI device Power Management suspend.\n"); 15048 15049 /* Bring down the device */ 15050 lpfc_offline_prep(phba, LPFC_MBX_WAIT); 15051 lpfc_offline(phba); 15052 kthread_stop(phba->worker_thread); 15053 15054 /* Disable interrupt from device */ 15055 lpfc_sli4_disable_intr(phba); 15056 lpfc_sli4_queue_destroy(phba); 15057 15058 return 0; 15059 } 15060 15061 /** 15062 * lpfc_pci_resume_one_s4 - PCI func to resume SLI-4 device for power mgmnt 15063 * @dev_d: pointer to device 15064 * 15065 * This routine is called from the kernel's PCI subsystem to support system 15066 * Power Management (PM) to device with SLI-4 interface spac. When PM invokes 15067 * this method, it restores the device's PCI config space state and fully 15068 * reinitializes the device and brings it online. Note that as the driver 15069 * implements the minimum PM requirements to a power-aware driver's PM for 15070 * suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, FREEZE) 15071 * to the suspend() method call will be treated as SUSPEND and the driver 15072 * will fully reinitialize its device during resume() method call, the device 15073 * will be set to PCI_D0 directly in PCI config space before restoring the 15074 * state. 15075 * 15076 * Return code 15077 * 0 - driver suspended the device 15078 * Error otherwise 15079 **/ 15080 static int __maybe_unused 15081 lpfc_pci_resume_one_s4(struct device *dev_d) 15082 { 15083 struct Scsi_Host *shost = dev_get_drvdata(dev_d); 15084 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 15085 uint32_t intr_mode; 15086 int error; 15087 15088 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 15089 "0292 PCI device Power Management resume.\n"); 15090 15091 /* Startup the kernel thread for this host adapter. */ 15092 phba->worker_thread = kthread_run(lpfc_do_work, phba, 15093 "lpfc_worker_%d", phba->brd_no); 15094 if (IS_ERR(phba->worker_thread)) { 15095 error = PTR_ERR(phba->worker_thread); 15096 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 15097 "0293 PM resume failed to start worker " 15098 "thread: error=x%x.\n", error); 15099 return error; 15100 } 15101 15102 /* Configure and enable interrupt */ 15103 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode); 15104 if (intr_mode == LPFC_INTR_ERROR) { 15105 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 15106 "0294 PM resume Failed to enable interrupt\n"); 15107 return -EIO; 15108 } else 15109 phba->intr_mode = intr_mode; 15110 15111 /* Restart HBA and bring it online */ 15112 lpfc_sli_brdrestart(phba); 15113 lpfc_online(phba); 15114 15115 /* Log the current active interrupt mode */ 15116 lpfc_log_intr_mode(phba, phba->intr_mode); 15117 15118 return 0; 15119 } 15120 15121 /** 15122 * lpfc_sli4_prep_dev_for_recover - Prepare SLI4 device for pci slot recover 15123 * @phba: pointer to lpfc hba data structure. 15124 * 15125 * This routine is called to prepare the SLI4 device for PCI slot recover. It 15126 * aborts all the outstanding SCSI I/Os to the pci device. 15127 **/ 15128 static void 15129 lpfc_sli4_prep_dev_for_recover(struct lpfc_hba *phba) 15130 { 15131 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 15132 "2828 PCI channel I/O abort preparing for recovery\n"); 15133 /* 15134 * There may be errored I/Os through HBA, abort all I/Os on txcmplq 15135 * and let the SCSI mid-layer to retry them to recover. 15136 */ 15137 lpfc_sli_abort_fcp_rings(phba); 15138 } 15139 15140 /** 15141 * lpfc_sli4_prep_dev_for_reset - Prepare SLI4 device for pci slot reset 15142 * @phba: pointer to lpfc hba data structure. 15143 * 15144 * This routine is called to prepare the SLI4 device for PCI slot reset. It 15145 * disables the device interrupt and pci device, and aborts the internal FCP 15146 * pending I/Os. 15147 **/ 15148 static void 15149 lpfc_sli4_prep_dev_for_reset(struct lpfc_hba *phba) 15150 { 15151 int offline = pci_channel_offline(phba->pcidev); 15152 15153 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 15154 "2826 PCI channel disable preparing for reset offline" 15155 " %d\n", offline); 15156 15157 /* Block any management I/Os to the device */ 15158 lpfc_block_mgmt_io(phba, LPFC_MBX_NO_WAIT); 15159 15160 15161 /* HBA_PCI_ERR was set in io_error_detect */ 15162 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT); 15163 /* Flush all driver's outstanding I/Os as we are to reset */ 15164 lpfc_sli_flush_io_rings(phba); 15165 lpfc_offline(phba); 15166 15167 /* stop all timers */ 15168 lpfc_stop_hba_timers(phba); 15169 15170 lpfc_sli4_queue_destroy(phba); 15171 /* Disable interrupt and pci device */ 15172 lpfc_sli4_disable_intr(phba); 15173 pci_disable_device(phba->pcidev); 15174 } 15175 15176 /** 15177 * lpfc_sli4_prep_dev_for_perm_failure - Prepare SLI4 dev for pci slot disable 15178 * @phba: pointer to lpfc hba data structure. 15179 * 15180 * This routine is called to prepare the SLI4 device for PCI slot permanently 15181 * disabling. It blocks the SCSI transport layer traffic and flushes the FCP 15182 * pending I/Os. 15183 **/ 15184 static void 15185 lpfc_sli4_prep_dev_for_perm_failure(struct lpfc_hba *phba) 15186 { 15187 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 15188 "2827 PCI channel permanent disable for failure\n"); 15189 15190 /* Block all SCSI devices' I/Os on the host */ 15191 lpfc_scsi_dev_block(phba); 15192 15193 /* stop all timers */ 15194 lpfc_stop_hba_timers(phba); 15195 15196 /* Clean up all driver's outstanding I/Os */ 15197 lpfc_sli_flush_io_rings(phba); 15198 } 15199 15200 /** 15201 * lpfc_io_error_detected_s4 - Method for handling PCI I/O error to SLI-4 device 15202 * @pdev: pointer to PCI device. 15203 * @state: the current PCI connection state. 15204 * 15205 * This routine is called from the PCI subsystem for error handling to device 15206 * with SLI-4 interface spec. This function is called by the PCI subsystem 15207 * after a PCI bus error affecting this device has been detected. When this 15208 * function is invoked, it will need to stop all the I/Os and interrupt(s) 15209 * to the device. Once that is done, it will return PCI_ERS_RESULT_NEED_RESET 15210 * for the PCI subsystem to perform proper recovery as desired. 15211 * 15212 * Return codes 15213 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery 15214 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered 15215 **/ 15216 static pci_ers_result_t 15217 lpfc_io_error_detected_s4(struct pci_dev *pdev, pci_channel_state_t state) 15218 { 15219 struct Scsi_Host *shost = pci_get_drvdata(pdev); 15220 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 15221 bool hba_pci_err; 15222 15223 switch (state) { 15224 case pci_channel_io_normal: 15225 /* Non-fatal error, prepare for recovery */ 15226 lpfc_sli4_prep_dev_for_recover(phba); 15227 return PCI_ERS_RESULT_CAN_RECOVER; 15228 case pci_channel_io_frozen: 15229 hba_pci_err = test_and_set_bit(HBA_PCI_ERR, &phba->bit_flags); 15230 /* Fatal error, prepare for slot reset */ 15231 if (!hba_pci_err) 15232 lpfc_sli4_prep_dev_for_reset(phba); 15233 else 15234 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 15235 "2832 Already handling PCI error " 15236 "state: x%x\n", state); 15237 return PCI_ERS_RESULT_NEED_RESET; 15238 case pci_channel_io_perm_failure: 15239 set_bit(HBA_PCI_ERR, &phba->bit_flags); 15240 /* Permanent failure, prepare for device down */ 15241 lpfc_sli4_prep_dev_for_perm_failure(phba); 15242 return PCI_ERS_RESULT_DISCONNECT; 15243 default: 15244 hba_pci_err = test_and_set_bit(HBA_PCI_ERR, &phba->bit_flags); 15245 if (!hba_pci_err) 15246 lpfc_sli4_prep_dev_for_reset(phba); 15247 /* Unknown state, prepare and request slot reset */ 15248 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 15249 "2825 Unknown PCI error state: x%x\n", state); 15250 lpfc_sli4_prep_dev_for_reset(phba); 15251 return PCI_ERS_RESULT_NEED_RESET; 15252 } 15253 } 15254 15255 /** 15256 * lpfc_io_slot_reset_s4 - Method for restart PCI SLI-4 device from scratch 15257 * @pdev: pointer to PCI device. 15258 * 15259 * This routine is called from the PCI subsystem for error handling to device 15260 * with SLI-4 interface spec. It is called after PCI bus has been reset to 15261 * restart the PCI card from scratch, as if from a cold-boot. During the 15262 * PCI subsystem error recovery, after the driver returns 15263 * PCI_ERS_RESULT_NEED_RESET, the PCI subsystem will perform proper error 15264 * recovery and then call this routine before calling the .resume method to 15265 * recover the device. This function will initialize the HBA device, enable 15266 * the interrupt, but it will just put the HBA to offline state without 15267 * passing any I/O traffic. 15268 * 15269 * Return codes 15270 * PCI_ERS_RESULT_RECOVERED - the device has been recovered 15271 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered 15272 */ 15273 static pci_ers_result_t 15274 lpfc_io_slot_reset_s4(struct pci_dev *pdev) 15275 { 15276 struct Scsi_Host *shost = pci_get_drvdata(pdev); 15277 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 15278 struct lpfc_sli *psli = &phba->sli; 15279 uint32_t intr_mode; 15280 bool hba_pci_err; 15281 15282 dev_printk(KERN_INFO, &pdev->dev, "recovering from a slot reset.\n"); 15283 if (pci_enable_device_mem(pdev)) { 15284 printk(KERN_ERR "lpfc: Cannot re-enable " 15285 "PCI device after reset.\n"); 15286 return PCI_ERS_RESULT_DISCONNECT; 15287 } 15288 15289 pci_restore_state(pdev); 15290 15291 hba_pci_err = test_and_clear_bit(HBA_PCI_ERR, &phba->bit_flags); 15292 if (!hba_pci_err) 15293 dev_info(&pdev->dev, 15294 "hba_pci_err was not set, recovering slot reset.\n"); 15295 /* 15296 * As the new kernel behavior of pci_restore_state() API call clears 15297 * device saved_state flag, need to save the restored state again. 15298 */ 15299 pci_save_state(pdev); 15300 15301 if (pdev->is_busmaster) 15302 pci_set_master(pdev); 15303 15304 spin_lock_irq(&phba->hbalock); 15305 psli->sli_flag &= ~LPFC_SLI_ACTIVE; 15306 spin_unlock_irq(&phba->hbalock); 15307 15308 /* Init cpu_map array */ 15309 lpfc_cpu_map_array_init(phba); 15310 /* Configure and enable interrupt */ 15311 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode); 15312 if (intr_mode == LPFC_INTR_ERROR) { 15313 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 15314 "2824 Cannot re-enable interrupt after " 15315 "slot reset.\n"); 15316 return PCI_ERS_RESULT_DISCONNECT; 15317 } else 15318 phba->intr_mode = intr_mode; 15319 lpfc_cpu_affinity_check(phba, phba->cfg_irq_chann); 15320 15321 /* Log the current active interrupt mode */ 15322 lpfc_log_intr_mode(phba, phba->intr_mode); 15323 15324 return PCI_ERS_RESULT_RECOVERED; 15325 } 15326 15327 /** 15328 * lpfc_io_resume_s4 - Method for resuming PCI I/O operation to SLI-4 device 15329 * @pdev: pointer to PCI device 15330 * 15331 * This routine is called from the PCI subsystem for error handling to device 15332 * with SLI-4 interface spec. It is called when kernel error recovery tells 15333 * the lpfc driver that it is ok to resume normal PCI operation after PCI bus 15334 * error recovery. After this call, traffic can start to flow from this device 15335 * again. 15336 **/ 15337 static void 15338 lpfc_io_resume_s4(struct pci_dev *pdev) 15339 { 15340 struct Scsi_Host *shost = pci_get_drvdata(pdev); 15341 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 15342 15343 /* 15344 * In case of slot reset, as function reset is performed through 15345 * mailbox command which needs DMA to be enabled, this operation 15346 * has to be moved to the io resume phase. Taking device offline 15347 * will perform the necessary cleanup. 15348 */ 15349 if (!(phba->sli.sli_flag & LPFC_SLI_ACTIVE)) { 15350 /* Perform device reset */ 15351 lpfc_sli_brdrestart(phba); 15352 /* Bring the device back online */ 15353 lpfc_online(phba); 15354 } 15355 } 15356 15357 /** 15358 * lpfc_pci_probe_one - lpfc PCI probe func to reg dev to PCI subsystem 15359 * @pdev: pointer to PCI device 15360 * @pid: pointer to PCI device identifier 15361 * 15362 * This routine is to be registered to the kernel's PCI subsystem. When an 15363 * Emulex HBA device is presented on PCI bus, the kernel PCI subsystem looks 15364 * at PCI device-specific information of the device and driver to see if the 15365 * driver state that it can support this kind of device. If the match is 15366 * successful, the driver core invokes this routine. This routine dispatches 15367 * the action to the proper SLI-3 or SLI-4 device probing routine, which will 15368 * do all the initialization that it needs to do to handle the HBA device 15369 * properly. 15370 * 15371 * Return code 15372 * 0 - driver can claim the device 15373 * negative value - driver can not claim the device 15374 **/ 15375 static int 15376 lpfc_pci_probe_one(struct pci_dev *pdev, const struct pci_device_id *pid) 15377 { 15378 int rc; 15379 struct lpfc_sli_intf intf; 15380 15381 if (pci_read_config_dword(pdev, LPFC_SLI_INTF, &intf.word0)) 15382 return -ENODEV; 15383 15384 if ((bf_get(lpfc_sli_intf_valid, &intf) == LPFC_SLI_INTF_VALID) && 15385 (bf_get(lpfc_sli_intf_slirev, &intf) == LPFC_SLI_INTF_REV_SLI4)) 15386 rc = lpfc_pci_probe_one_s4(pdev, pid); 15387 else 15388 rc = lpfc_pci_probe_one_s3(pdev, pid); 15389 15390 return rc; 15391 } 15392 15393 /** 15394 * lpfc_pci_remove_one - lpfc PCI func to unreg dev from PCI subsystem 15395 * @pdev: pointer to PCI device 15396 * 15397 * This routine is to be registered to the kernel's PCI subsystem. When an 15398 * Emulex HBA is removed from PCI bus, the driver core invokes this routine. 15399 * This routine dispatches the action to the proper SLI-3 or SLI-4 device 15400 * remove routine, which will perform all the necessary cleanup for the 15401 * device to be removed from the PCI subsystem properly. 15402 **/ 15403 static void 15404 lpfc_pci_remove_one(struct pci_dev *pdev) 15405 { 15406 struct Scsi_Host *shost = pci_get_drvdata(pdev); 15407 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 15408 15409 switch (phba->pci_dev_grp) { 15410 case LPFC_PCI_DEV_LP: 15411 lpfc_pci_remove_one_s3(pdev); 15412 break; 15413 case LPFC_PCI_DEV_OC: 15414 lpfc_pci_remove_one_s4(pdev); 15415 break; 15416 default: 15417 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 15418 "1424 Invalid PCI device group: 0x%x\n", 15419 phba->pci_dev_grp); 15420 break; 15421 } 15422 return; 15423 } 15424 15425 /** 15426 * lpfc_pci_suspend_one - lpfc PCI func to suspend dev for power management 15427 * @dev: pointer to device 15428 * 15429 * This routine is to be registered to the kernel's PCI subsystem to support 15430 * system Power Management (PM). When PM invokes this method, it dispatches 15431 * the action to the proper SLI-3 or SLI-4 device suspend routine, which will 15432 * suspend the device. 15433 * 15434 * Return code 15435 * 0 - driver suspended the device 15436 * Error otherwise 15437 **/ 15438 static int __maybe_unused 15439 lpfc_pci_suspend_one(struct device *dev) 15440 { 15441 struct Scsi_Host *shost = dev_get_drvdata(dev); 15442 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 15443 int rc = -ENODEV; 15444 15445 switch (phba->pci_dev_grp) { 15446 case LPFC_PCI_DEV_LP: 15447 rc = lpfc_pci_suspend_one_s3(dev); 15448 break; 15449 case LPFC_PCI_DEV_OC: 15450 rc = lpfc_pci_suspend_one_s4(dev); 15451 break; 15452 default: 15453 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 15454 "1425 Invalid PCI device group: 0x%x\n", 15455 phba->pci_dev_grp); 15456 break; 15457 } 15458 return rc; 15459 } 15460 15461 /** 15462 * lpfc_pci_resume_one - lpfc PCI func to resume dev for power management 15463 * @dev: pointer to device 15464 * 15465 * This routine is to be registered to the kernel's PCI subsystem to support 15466 * system Power Management (PM). When PM invokes this method, it dispatches 15467 * the action to the proper SLI-3 or SLI-4 device resume routine, which will 15468 * resume the device. 15469 * 15470 * Return code 15471 * 0 - driver suspended the device 15472 * Error otherwise 15473 **/ 15474 static int __maybe_unused 15475 lpfc_pci_resume_one(struct device *dev) 15476 { 15477 struct Scsi_Host *shost = dev_get_drvdata(dev); 15478 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 15479 int rc = -ENODEV; 15480 15481 switch (phba->pci_dev_grp) { 15482 case LPFC_PCI_DEV_LP: 15483 rc = lpfc_pci_resume_one_s3(dev); 15484 break; 15485 case LPFC_PCI_DEV_OC: 15486 rc = lpfc_pci_resume_one_s4(dev); 15487 break; 15488 default: 15489 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 15490 "1426 Invalid PCI device group: 0x%x\n", 15491 phba->pci_dev_grp); 15492 break; 15493 } 15494 return rc; 15495 } 15496 15497 /** 15498 * lpfc_io_error_detected - lpfc method for handling PCI I/O error 15499 * @pdev: pointer to PCI device. 15500 * @state: the current PCI connection state. 15501 * 15502 * This routine is registered to the PCI subsystem for error handling. This 15503 * function is called by the PCI subsystem after a PCI bus error affecting 15504 * this device has been detected. When this routine is invoked, it dispatches 15505 * the action to the proper SLI-3 or SLI-4 device error detected handling 15506 * routine, which will perform the proper error detected operation. 15507 * 15508 * Return codes 15509 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery 15510 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered 15511 **/ 15512 static pci_ers_result_t 15513 lpfc_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state) 15514 { 15515 struct Scsi_Host *shost = pci_get_drvdata(pdev); 15516 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 15517 pci_ers_result_t rc = PCI_ERS_RESULT_DISCONNECT; 15518 15519 if (phba->link_state == LPFC_HBA_ERROR && 15520 test_bit(HBA_IOQ_FLUSH, &phba->hba_flag)) 15521 return PCI_ERS_RESULT_NEED_RESET; 15522 15523 switch (phba->pci_dev_grp) { 15524 case LPFC_PCI_DEV_LP: 15525 rc = lpfc_io_error_detected_s3(pdev, state); 15526 break; 15527 case LPFC_PCI_DEV_OC: 15528 rc = lpfc_io_error_detected_s4(pdev, state); 15529 break; 15530 default: 15531 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 15532 "1427 Invalid PCI device group: 0x%x\n", 15533 phba->pci_dev_grp); 15534 break; 15535 } 15536 return rc; 15537 } 15538 15539 /** 15540 * lpfc_io_slot_reset - lpfc method for restart PCI dev from scratch 15541 * @pdev: pointer to PCI device. 15542 * 15543 * This routine is registered to the PCI subsystem for error handling. This 15544 * function is called after PCI bus has been reset to restart the PCI card 15545 * from scratch, as if from a cold-boot. When this routine is invoked, it 15546 * dispatches the action to the proper SLI-3 or SLI-4 device reset handling 15547 * routine, which will perform the proper device reset. 15548 * 15549 * Return codes 15550 * PCI_ERS_RESULT_RECOVERED - the device has been recovered 15551 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered 15552 **/ 15553 static pci_ers_result_t 15554 lpfc_io_slot_reset(struct pci_dev *pdev) 15555 { 15556 struct Scsi_Host *shost = pci_get_drvdata(pdev); 15557 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 15558 pci_ers_result_t rc = PCI_ERS_RESULT_DISCONNECT; 15559 15560 switch (phba->pci_dev_grp) { 15561 case LPFC_PCI_DEV_LP: 15562 rc = lpfc_io_slot_reset_s3(pdev); 15563 break; 15564 case LPFC_PCI_DEV_OC: 15565 rc = lpfc_io_slot_reset_s4(pdev); 15566 break; 15567 default: 15568 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 15569 "1428 Invalid PCI device group: 0x%x\n", 15570 phba->pci_dev_grp); 15571 break; 15572 } 15573 return rc; 15574 } 15575 15576 /** 15577 * lpfc_io_resume - lpfc method for resuming PCI I/O operation 15578 * @pdev: pointer to PCI device 15579 * 15580 * This routine is registered to the PCI subsystem for error handling. It 15581 * is called when kernel error recovery tells the lpfc driver that it is 15582 * OK to resume normal PCI operation after PCI bus error recovery. When 15583 * this routine is invoked, it dispatches the action to the proper SLI-3 15584 * or SLI-4 device io_resume routine, which will resume the device operation. 15585 **/ 15586 static void 15587 lpfc_io_resume(struct pci_dev *pdev) 15588 { 15589 struct Scsi_Host *shost = pci_get_drvdata(pdev); 15590 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba; 15591 15592 switch (phba->pci_dev_grp) { 15593 case LPFC_PCI_DEV_LP: 15594 lpfc_io_resume_s3(pdev); 15595 break; 15596 case LPFC_PCI_DEV_OC: 15597 lpfc_io_resume_s4(pdev); 15598 break; 15599 default: 15600 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT, 15601 "1429 Invalid PCI device group: 0x%x\n", 15602 phba->pci_dev_grp); 15603 break; 15604 } 15605 return; 15606 } 15607 15608 /** 15609 * lpfc_sli4_oas_verify - Verify OAS is supported by this adapter 15610 * @phba: pointer to lpfc hba data structure. 15611 * 15612 * This routine checks to see if OAS is supported for this adapter. If 15613 * supported, the configure Flash Optimized Fabric flag is set. Otherwise, 15614 * the enable oas flag is cleared and the pool created for OAS device data 15615 * is destroyed. 15616 * 15617 **/ 15618 static void 15619 lpfc_sli4_oas_verify(struct lpfc_hba *phba) 15620 { 15621 15622 if (!phba->cfg_EnableXLane) 15623 return; 15624 15625 if (phba->sli4_hba.pc_sli4_params.oas_supported) { 15626 phba->cfg_fof = 1; 15627 } else { 15628 phba->cfg_fof = 0; 15629 mempool_destroy(phba->device_data_mem_pool); 15630 phba->device_data_mem_pool = NULL; 15631 } 15632 15633 return; 15634 } 15635 15636 /** 15637 * lpfc_sli4_ras_init - Verify RAS-FW log is supported by this adapter 15638 * @phba: pointer to lpfc hba data structure. 15639 * 15640 * This routine checks to see if RAS is supported by the adapter. Check the 15641 * function through which RAS support enablement is to be done. 15642 **/ 15643 void 15644 lpfc_sli4_ras_init(struct lpfc_hba *phba) 15645 { 15646 /* if ASIC_GEN_NUM >= 0xC) */ 15647 if ((bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) == 15648 LPFC_SLI_INTF_IF_TYPE_6) || 15649 (bf_get(lpfc_sli_intf_sli_family, &phba->sli4_hba.sli_intf) == 15650 LPFC_SLI_INTF_FAMILY_G6)) { 15651 phba->ras_fwlog.ras_hwsupport = true; 15652 if (phba->cfg_ras_fwlog_func == PCI_FUNC(phba->pcidev->devfn) && 15653 phba->cfg_ras_fwlog_buffsize) 15654 phba->ras_fwlog.ras_enabled = true; 15655 else 15656 phba->ras_fwlog.ras_enabled = false; 15657 } else { 15658 phba->ras_fwlog.ras_hwsupport = false; 15659 } 15660 } 15661 15662 15663 MODULE_DEVICE_TABLE(pci, lpfc_id_table); 15664 15665 static const struct pci_error_handlers lpfc_err_handler = { 15666 .error_detected = lpfc_io_error_detected, 15667 .slot_reset = lpfc_io_slot_reset, 15668 .resume = lpfc_io_resume, 15669 }; 15670 15671 static SIMPLE_DEV_PM_OPS(lpfc_pci_pm_ops_one, 15672 lpfc_pci_suspend_one, 15673 lpfc_pci_resume_one); 15674 15675 static struct pci_driver lpfc_driver = { 15676 .name = LPFC_DRIVER_NAME, 15677 .id_table = lpfc_id_table, 15678 .probe = lpfc_pci_probe_one, 15679 .remove = lpfc_pci_remove_one, 15680 .shutdown = lpfc_pci_remove_one, 15681 .driver.pm = &lpfc_pci_pm_ops_one, 15682 .err_handler = &lpfc_err_handler, 15683 }; 15684 15685 static const struct file_operations lpfc_mgmt_fop = { 15686 .owner = THIS_MODULE, 15687 }; 15688 15689 static struct miscdevice lpfc_mgmt_dev = { 15690 .minor = MISC_DYNAMIC_MINOR, 15691 .name = "lpfcmgmt", 15692 .fops = &lpfc_mgmt_fop, 15693 }; 15694 15695 /** 15696 * lpfc_init - lpfc module initialization routine 15697 * 15698 * This routine is to be invoked when the lpfc module is loaded into the 15699 * kernel. The special kernel macro module_init() is used to indicate the 15700 * role of this routine to the kernel as lpfc module entry point. 15701 * 15702 * Return codes 15703 * 0 - successful 15704 * -ENOMEM - FC attach transport failed 15705 * all others - failed 15706 */ 15707 static int __init 15708 lpfc_init(void) 15709 { 15710 int error = 0; 15711 15712 pr_info(LPFC_MODULE_DESC "\n"); 15713 pr_info(LPFC_COPYRIGHT "\n"); 15714 15715 error = misc_register(&lpfc_mgmt_dev); 15716 if (error) 15717 printk(KERN_ERR "Could not register lpfcmgmt device, " 15718 "misc_register returned with status %d", error); 15719 15720 error = -ENOMEM; 15721 lpfc_transport_functions.vport_create = lpfc_vport_create; 15722 lpfc_transport_functions.vport_delete = lpfc_vport_delete; 15723 lpfc_transport_template = 15724 fc_attach_transport(&lpfc_transport_functions); 15725 if (lpfc_transport_template == NULL) 15726 goto unregister; 15727 lpfc_vport_transport_template = 15728 fc_attach_transport(&lpfc_vport_transport_functions); 15729 if (lpfc_vport_transport_template == NULL) { 15730 fc_release_transport(lpfc_transport_template); 15731 goto unregister; 15732 } 15733 lpfc_wqe_cmd_template(); 15734 lpfc_nvmet_cmd_template(); 15735 15736 /* Initialize in case vector mapping is needed */ 15737 lpfc_present_cpu = num_present_cpus(); 15738 15739 lpfc_pldv_detect = false; 15740 15741 error = cpuhp_setup_state_multi(CPUHP_AP_ONLINE_DYN, 15742 "lpfc/sli4:online", 15743 lpfc_cpu_online, lpfc_cpu_offline); 15744 if (error < 0) 15745 goto cpuhp_failure; 15746 lpfc_cpuhp_state = error; 15747 15748 error = pci_register_driver(&lpfc_driver); 15749 if (error) 15750 goto unwind; 15751 15752 return error; 15753 15754 unwind: 15755 cpuhp_remove_multi_state(lpfc_cpuhp_state); 15756 cpuhp_failure: 15757 fc_release_transport(lpfc_transport_template); 15758 fc_release_transport(lpfc_vport_transport_template); 15759 unregister: 15760 misc_deregister(&lpfc_mgmt_dev); 15761 15762 return error; 15763 } 15764 15765 void lpfc_dmp_dbg(struct lpfc_hba *phba) 15766 { 15767 unsigned int start_idx; 15768 unsigned int dbg_cnt; 15769 unsigned int temp_idx; 15770 int i; 15771 int j = 0; 15772 unsigned long rem_nsec; 15773 15774 if (atomic_cmpxchg(&phba->dbg_log_dmping, 0, 1) != 0) 15775 return; 15776 15777 start_idx = (unsigned int)atomic_read(&phba->dbg_log_idx) % DBG_LOG_SZ; 15778 dbg_cnt = (unsigned int)atomic_read(&phba->dbg_log_cnt); 15779 if (!dbg_cnt) 15780 goto out; 15781 temp_idx = start_idx; 15782 if (dbg_cnt >= DBG_LOG_SZ) { 15783 dbg_cnt = DBG_LOG_SZ; 15784 temp_idx -= 1; 15785 } else { 15786 if ((start_idx + dbg_cnt) > (DBG_LOG_SZ - 1)) { 15787 temp_idx = (start_idx + dbg_cnt) % DBG_LOG_SZ; 15788 } else { 15789 if (start_idx < dbg_cnt) 15790 start_idx = DBG_LOG_SZ - (dbg_cnt - start_idx); 15791 else 15792 start_idx -= dbg_cnt; 15793 } 15794 } 15795 dev_info(&phba->pcidev->dev, "start %d end %d cnt %d\n", 15796 start_idx, temp_idx, dbg_cnt); 15797 15798 for (i = 0; i < dbg_cnt; i++) { 15799 if ((start_idx + i) < DBG_LOG_SZ) 15800 temp_idx = (start_idx + i) % DBG_LOG_SZ; 15801 else 15802 temp_idx = j++; 15803 rem_nsec = do_div(phba->dbg_log[temp_idx].t_ns, NSEC_PER_SEC); 15804 dev_info(&phba->pcidev->dev, "%d: [%5lu.%06lu] %s", 15805 temp_idx, 15806 (unsigned long)phba->dbg_log[temp_idx].t_ns, 15807 rem_nsec / 1000, 15808 phba->dbg_log[temp_idx].log); 15809 } 15810 out: 15811 atomic_set(&phba->dbg_log_cnt, 0); 15812 atomic_set(&phba->dbg_log_dmping, 0); 15813 } 15814 15815 __printf(2, 3) 15816 void lpfc_dbg_print(struct lpfc_hba *phba, const char *fmt, ...) 15817 { 15818 unsigned int idx; 15819 va_list args; 15820 int dbg_dmping = atomic_read(&phba->dbg_log_dmping); 15821 struct va_format vaf; 15822 15823 15824 va_start(args, fmt); 15825 if (unlikely(dbg_dmping)) { 15826 vaf.fmt = fmt; 15827 vaf.va = &args; 15828 dev_info(&phba->pcidev->dev, "%pV", &vaf); 15829 va_end(args); 15830 return; 15831 } 15832 idx = (unsigned int)atomic_fetch_add(1, &phba->dbg_log_idx) % 15833 DBG_LOG_SZ; 15834 15835 atomic_inc(&phba->dbg_log_cnt); 15836 15837 vscnprintf(phba->dbg_log[idx].log, 15838 sizeof(phba->dbg_log[idx].log), fmt, args); 15839 va_end(args); 15840 15841 phba->dbg_log[idx].t_ns = local_clock(); 15842 } 15843 15844 /** 15845 * lpfc_exit - lpfc module removal routine 15846 * 15847 * This routine is invoked when the lpfc module is removed from the kernel. 15848 * The special kernel macro module_exit() is used to indicate the role of 15849 * this routine to the kernel as lpfc module exit point. 15850 */ 15851 static void __exit 15852 lpfc_exit(void) 15853 { 15854 misc_deregister(&lpfc_mgmt_dev); 15855 pci_unregister_driver(&lpfc_driver); 15856 cpuhp_remove_multi_state(lpfc_cpuhp_state); 15857 fc_release_transport(lpfc_transport_template); 15858 fc_release_transport(lpfc_vport_transport_template); 15859 idr_destroy(&lpfc_hba_index); 15860 } 15861 15862 module_init(lpfc_init); 15863 module_exit(lpfc_exit); 15864 MODULE_LICENSE("GPL"); 15865 MODULE_DESCRIPTION(LPFC_MODULE_DESC); 15866 MODULE_AUTHOR("Broadcom"); 15867 MODULE_VERSION("0:" LPFC_DRIVER_VERSION); 15868