1dea3101eS /******************************************************************* 2dea3101eS * This file is part of the Emulex Linux Device Driver for * 3c44ce173SJames.Smart@Emulex.Com * Fibre Channel Host Bus Adapters. * 4145e5a8aSJames Smart * Copyright (C) 2017-2020 Broadcom. All Rights Reserved. The term * 54ae2ebdeSJames Smart * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. * 650611577SJames Smart * Copyright (C) 2004-2016 Emulex. All rights reserved. * 7c44ce173SJames.Smart@Emulex.Com * EMULEX and SLI are trademarks of Emulex. * 8d080abe0SJames Smart * www.broadcom.com * 9dea3101eS * * 10dea3101eS * This program is free software; you can redistribute it and/or * 11c44ce173SJames.Smart@Emulex.Com * modify it under the terms of version 2 of the GNU General * 12c44ce173SJames.Smart@Emulex.Com * Public License as published by the Free Software Foundation. * 13c44ce173SJames.Smart@Emulex.Com * This program is distributed in the hope that it will be useful. * 14c44ce173SJames.Smart@Emulex.Com * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND * 15c44ce173SJames.Smart@Emulex.Com * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, * 16c44ce173SJames.Smart@Emulex.Com * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE * 17c44ce173SJames.Smart@Emulex.Com * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD * 18c44ce173SJames.Smart@Emulex.Com * TO BE LEGALLY INVALID. See the GNU General Public License for * 19c44ce173SJames.Smart@Emulex.Com * more details, a copy of which can be found in the file COPYING * 20c44ce173SJames.Smart@Emulex.Com * included with this package. * 21dea3101eS *******************************************************************/ 22dea3101eS 23dea3101eS #define FDMI_DID 0xfffffaU 24dea3101eS #define NameServer_DID 0xfffffcU 25df3fe766SJames Smart #define Fabric_Cntl_DID 0xfffffdU 26dea3101eS #define Fabric_DID 0xfffffeU 27dea3101eS #define Bcast_DID 0xffffffU 28dea3101eS #define Mask_DID 0xffffffU 29dea3101eS #define CT_DID_MASK 0xffff00U 30dea3101eS #define Fabric_DID_MASK 0xfff000U 31dea3101eS #define WELL_KNOWN_DID_MASK 0xfffff0U 32dea3101eS 33dea3101eS #define PT2PT_LocalID 1 34dea3101eS #define PT2PT_RemoteID 2 35dea3101eS 36dea3101eS #define FF_DEF_EDTOV 2000 /* Default E_D_TOV (2000ms) */ 37dea3101eS #define FF_DEF_ALTOV 15 /* Default AL_TIME (15ms) */ 3821bf0b97SJames Smart #define FF_DEF_RATOV 10 /* Default RA_TOV (10s) */ 39dea3101eS #define FF_DEF_ARBTOV 1900 /* Default ARB_TOV (1900ms) */ 40dea3101eS 41dea3101eS #define LPFC_BUF_RING0 64 /* Number of buffers to post to RING 42dea3101eS 0 */ 43dea3101eS 44dea3101eS #define FCELSSIZE 1024 /* maximum ELS transfer size */ 45dea3101eS 46dea3101eS #define LPFC_FCP_RING 0 /* ring 0 for FCP initiator commands */ 47a4bc3379SJames Smart #define LPFC_EXTRA_RING 1 /* ring 1 for other protocols */ 48dea3101eS #define LPFC_ELS_RING 2 /* ring 2 for ELS commands */ 49dea3101eS 50dea3101eS #define SLI2_IOCB_CMD_R0_ENTRIES 172 /* SLI-2 FCP command ring entries */ 51dea3101eS #define SLI2_IOCB_RSP_R0_ENTRIES 134 /* SLI-2 FCP response ring entries */ 52a4bc3379SJames Smart #define SLI2_IOCB_CMD_R1_ENTRIES 4 /* SLI-2 extra command ring entries */ 53a4bc3379SJames Smart #define SLI2_IOCB_RSP_R1_ENTRIES 4 /* SLI-2 extra response ring entries */ 54dea3101eS #define SLI2_IOCB_CMD_R1XTRA_ENTRIES 36 /* SLI-2 extra FCP cmd ring entries */ 55dea3101eS #define SLI2_IOCB_RSP_R1XTRA_ENTRIES 52 /* SLI-2 extra FCP rsp ring entries */ 56dea3101eS #define SLI2_IOCB_CMD_R2_ENTRIES 20 /* SLI-2 ELS command ring entries */ 57dea3101eS #define SLI2_IOCB_RSP_R2_ENTRIES 20 /* SLI-2 ELS response ring entries */ 58dea3101eS #define SLI2_IOCB_CMD_R3_ENTRIES 0 59dea3101eS #define SLI2_IOCB_RSP_R3_ENTRIES 0 60dea3101eS #define SLI2_IOCB_CMD_R3XTRA_ENTRIES 24 61dea3101eS #define SLI2_IOCB_RSP_R3XTRA_ENTRIES 32 62dea3101eS 63ed957684SJames Smart #define SLI2_IOCB_CMD_SIZE 32 64ed957684SJames Smart #define SLI2_IOCB_RSP_SIZE 32 65ed957684SJames Smart #define SLI3_IOCB_CMD_SIZE 128 66ed957684SJames Smart #define SLI3_IOCB_RSP_SIZE 64 67ed957684SJames Smart 686d368e53SJames Smart #define LPFC_UNREG_ALL_RPIS_VPORT 0xffff 696d368e53SJames Smart #define LPFC_UNREG_ALL_DFLT_RPIS 0xffffffff 7092d7f7b0SJames Smart 71ddcc50f0SJames Smart /* vendor ID used in SCSI netlink calls */ 72ddcc50f0SJames Smart #define LPFC_NL_VENDOR_ID (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX) 73ddcc50f0SJames Smart 746b5151fdSJames Smart #define FW_REV_STR_SIZE 32 75dea3101eS /* Common Transport structures and definitions */ 76dea3101eS 77dea3101eS union CtRevisionId { 78dea3101eS /* Structure is in Big Endian format */ 79dea3101eS struct { 80dea3101eS uint32_t Revision:8; 81dea3101eS uint32_t InId:24; 82dea3101eS } bits; 83dea3101eS uint32_t word; 84dea3101eS }; 85dea3101eS 86dea3101eS union CtCommandResponse { 87dea3101eS /* Structure is in Big Endian format */ 88dea3101eS struct { 89dea3101eS uint32_t CmdRsp:16; 90dea3101eS uint32_t Size:16; 91dea3101eS } bits; 92dea3101eS uint32_t word; 93dea3101eS }; 94dea3101eS 95a0f2d3efSJames Smart /* FC4 Feature bits for RFF_ID */ 9692d7f7b0SJames Smart #define FC4_FEATURE_TARGET 0x1 97a0f2d3efSJames Smart #define FC4_FEATURE_INIT 0x2 98a0f2d3efSJames Smart #define FC4_FEATURE_NVME_DISC 0x4 9992d7f7b0SJames Smart 100dea3101eS struct lpfc_sli_ct_request { 101dea3101eS /* Structure is in Big Endian format */ 102dea3101eS union CtRevisionId RevisionId; 103dea3101eS uint8_t FsType; 104dea3101eS uint8_t FsSubType; 105dea3101eS uint8_t Options; 106dea3101eS uint8_t Rsrvd1; 107dea3101eS union CtCommandResponse CommandResponse; 108dea3101eS uint8_t Rsrvd2; 109dea3101eS uint8_t ReasonCode; 110dea3101eS uint8_t Explanation; 111dea3101eS uint8_t VendorUnique; 11276b2c34aSJames Smart #define LPFC_CT_PREAMBLE 20 /* Size of CTReq + 4 up to here */ 113dea3101eS 114dea3101eS union { 115dea3101eS uint32_t PortID; 116dea3101eS struct gid { 117dea3101eS uint8_t PortType; /* for GID_PT requests */ 1187ea92eb4SJames Smart #define GID_PT_N_PORT 1 119dea3101eS uint8_t DomainScope; 120dea3101eS uint8_t AreaScope; 121dea3101eS uint8_t Fc4Type; /* for GID_FT requests */ 122dea3101eS } gid; 123a0f2d3efSJames Smart struct gid_ff { 124a0f2d3efSJames Smart uint8_t Flags; 125a0f2d3efSJames Smart uint8_t DomainScope; 126a0f2d3efSJames Smart uint8_t AreaScope; 127a0f2d3efSJames Smart uint8_t rsvd1; 128a0f2d3efSJames Smart uint8_t rsvd2; 129a0f2d3efSJames Smart uint8_t rsvd3; 130a0f2d3efSJames Smart uint8_t Fc4FBits; 131a0f2d3efSJames Smart uint8_t Fc4Type; 132a0f2d3efSJames Smart } gid_ff; 133dea3101eS struct rft { 134dea3101eS uint32_t PortId; /* For RFT_ID requests */ 135dea3101eS 136dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 137dea3101eS uint32_t rsvd0:16; 138dea3101eS uint32_t rsvd1:7; 139dea3101eS uint32_t fcpReg:1; /* Type 8 */ 140dea3101eS uint32_t rsvd2:2; 141dea3101eS uint32_t ipReg:1; /* Type 5 */ 142dea3101eS uint32_t rsvd3:5; 143dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 144dea3101eS uint32_t rsvd0:16; 145dea3101eS uint32_t fcpReg:1; /* Type 8 */ 146dea3101eS uint32_t rsvd1:7; 147dea3101eS uint32_t rsvd3:5; 148dea3101eS uint32_t ipReg:1; /* Type 5 */ 149dea3101eS uint32_t rsvd2:2; 150dea3101eS #endif 151dea3101eS 152dea3101eS uint32_t rsvd[7]; 153dea3101eS } rft; 154dea3101eS struct rnn { 155dea3101eS uint32_t PortId; /* For RNN_ID requests */ 156dea3101eS uint8_t wwnn[8]; 157dea3101eS } rnn; 158dea3101eS struct rsnn { /* For RSNN_ID requests */ 159dea3101eS uint8_t wwnn[8]; 160dea3101eS uint8_t len; 161dea3101eS uint8_t symbname[255]; 162dea3101eS } rsnn; 1637ee5d43eSJames Smart struct da_id { /* For DA_ID requests */ 1647ee5d43eSJames Smart uint32_t port_id; 1657ee5d43eSJames Smart } da_id; 16692d7f7b0SJames Smart struct rspn { /* For RSPN_ID requests */ 16792d7f7b0SJames Smart uint32_t PortId; 16892d7f7b0SJames Smart uint8_t len; 16992d7f7b0SJames Smart uint8_t symbname[255]; 17092d7f7b0SJames Smart } rspn; 17192d7f7b0SJames Smart struct gff { 17292d7f7b0SJames Smart uint32_t PortId; 17392d7f7b0SJames Smart } gff; 17492d7f7b0SJames Smart struct gff_acc { 17592d7f7b0SJames Smart uint8_t fbits[128]; 17692d7f7b0SJames Smart } gff_acc; 177a0f2d3efSJames Smart struct gft { 178a0f2d3efSJames Smart uint32_t PortId; 179a0f2d3efSJames Smart } gft; 180a0f2d3efSJames Smart struct gft_acc { 181a0f2d3efSJames Smart uint32_t fc4_types[8]; 182a0f2d3efSJames Smart } gft_acc; 18351ef4c26SJames Smart #define FCP_TYPE_FEATURE_OFFSET 7 18492d7f7b0SJames Smart struct rff { 18592d7f7b0SJames Smart uint32_t PortId; 18692d7f7b0SJames Smart uint8_t reserved[2]; 18792d7f7b0SJames Smart uint8_t fbits; 18892d7f7b0SJames Smart uint8_t type_code; /* type=8 for FCP */ 18992d7f7b0SJames Smart } rff; 190dea3101eS } un; 191dea3101eS }; 192dea3101eS 19376b2c34aSJames Smart #define LPFC_MAX_CT_SIZE (60 * 4096) 19476b2c34aSJames Smart 195dea3101eS #define SLI_CT_REVISION 1 19692d7f7b0SJames Smart #define GID_REQUEST_SZ (offsetof(struct lpfc_sli_ct_request, un) + \ 19792d7f7b0SJames Smart sizeof(struct gid)) 198a0f2d3efSJames Smart #define GIDFF_REQUEST_SZ (offsetof(struct lpfc_sli_ct_request, un) + \ 199a0f2d3efSJames Smart sizeof(struct gid_ff)) 20092d7f7b0SJames Smart #define GFF_REQUEST_SZ (offsetof(struct lpfc_sli_ct_request, un) + \ 20192d7f7b0SJames Smart sizeof(struct gff)) 202a0f2d3efSJames Smart #define GFT_REQUEST_SZ (offsetof(struct lpfc_sli_ct_request, un) + \ 203a0f2d3efSJames Smart sizeof(struct gft)) 20492d7f7b0SJames Smart #define RFT_REQUEST_SZ (offsetof(struct lpfc_sli_ct_request, un) + \ 20592d7f7b0SJames Smart sizeof(struct rft)) 20692d7f7b0SJames Smart #define RFF_REQUEST_SZ (offsetof(struct lpfc_sli_ct_request, un) + \ 20792d7f7b0SJames Smart sizeof(struct rff)) 20892d7f7b0SJames Smart #define RNN_REQUEST_SZ (offsetof(struct lpfc_sli_ct_request, un) + \ 20992d7f7b0SJames Smart sizeof(struct rnn)) 21092d7f7b0SJames Smart #define RSNN_REQUEST_SZ (offsetof(struct lpfc_sli_ct_request, un) + \ 21192d7f7b0SJames Smart sizeof(struct rsnn)) 2127ee5d43eSJames Smart #define DA_ID_REQUEST_SZ (offsetof(struct lpfc_sli_ct_request, un) + \ 2137ee5d43eSJames Smart sizeof(struct da_id)) 21492d7f7b0SJames Smart #define RSPN_REQUEST_SZ (offsetof(struct lpfc_sli_ct_request, un) + \ 21592d7f7b0SJames Smart sizeof(struct rspn)) 216dea3101eS 217dea3101eS /* 218dea3101eS * FsType Definitions 219dea3101eS */ 220dea3101eS 221dea3101eS #define SLI_CT_MANAGEMENT_SERVICE 0xFA 222dea3101eS #define SLI_CT_TIME_SERVICE 0xFB 223dea3101eS #define SLI_CT_DIRECTORY_SERVICE 0xFC 224dea3101eS #define SLI_CT_FABRIC_CONTROLLER_SERVICE 0xFD 225dea3101eS 226dea3101eS /* 227dea3101eS * Directory Service Subtypes 228dea3101eS */ 229dea3101eS 230dea3101eS #define SLI_CT_DIRECTORY_NAME_SERVER 0x02 231dea3101eS 232dea3101eS /* 233dea3101eS * Response Codes 234dea3101eS */ 235dea3101eS 236dea3101eS #define SLI_CT_RESPONSE_FS_RJT 0x8001 237dea3101eS #define SLI_CT_RESPONSE_FS_ACC 0x8002 238dea3101eS 239dea3101eS /* 240dea3101eS * Reason Codes 241dea3101eS */ 242dea3101eS 243dea3101eS #define SLI_CT_NO_ADDITIONAL_EXPL 0x0 244dea3101eS #define SLI_CT_INVALID_COMMAND 0x01 245dea3101eS #define SLI_CT_INVALID_VERSION 0x02 246dea3101eS #define SLI_CT_LOGICAL_ERROR 0x03 247dea3101eS #define SLI_CT_INVALID_IU_SIZE 0x04 248dea3101eS #define SLI_CT_LOGICAL_BUSY 0x05 249dea3101eS #define SLI_CT_PROTOCOL_ERROR 0x07 250dea3101eS #define SLI_CT_UNABLE_TO_PERFORM_REQ 0x09 251dea3101eS #define SLI_CT_REQ_NOT_SUPPORTED 0x0b 252dea3101eS #define SLI_CT_HBA_INFO_NOT_REGISTERED 0x10 253dea3101eS #define SLI_CT_MULTIPLE_HBA_ATTR_OF_SAME_TYPE 0x11 254dea3101eS #define SLI_CT_INVALID_HBA_ATTR_BLOCK_LEN 0x12 255dea3101eS #define SLI_CT_HBA_ATTR_NOT_PRESENT 0x13 256dea3101eS #define SLI_CT_PORT_INFO_NOT_REGISTERED 0x20 257dea3101eS #define SLI_CT_MULTIPLE_PORT_ATTR_OF_SAME_TYPE 0x21 258dea3101eS #define SLI_CT_INVALID_PORT_ATTR_BLOCK_LEN 0x22 259dea3101eS #define SLI_CT_VENDOR_UNIQUE 0xff 260dea3101eS 261dea3101eS /* 262dea3101eS * Name Server SLI_CT_UNABLE_TO_PERFORM_REQ Explanations 263dea3101eS */ 264dea3101eS 265dea3101eS #define SLI_CT_NO_PORT_ID 0x01 266dea3101eS #define SLI_CT_NO_PORT_NAME 0x02 267dea3101eS #define SLI_CT_NO_NODE_NAME 0x03 268dea3101eS #define SLI_CT_NO_CLASS_OF_SERVICE 0x04 269dea3101eS #define SLI_CT_NO_IP_ADDRESS 0x05 270dea3101eS #define SLI_CT_NO_IPA 0x06 271dea3101eS #define SLI_CT_NO_FC4_TYPES 0x07 272dea3101eS #define SLI_CT_NO_SYMBOLIC_PORT_NAME 0x08 273dea3101eS #define SLI_CT_NO_SYMBOLIC_NODE_NAME 0x09 274dea3101eS #define SLI_CT_NO_PORT_TYPE 0x0A 275dea3101eS #define SLI_CT_ACCESS_DENIED 0x10 276dea3101eS #define SLI_CT_INVALID_PORT_ID 0x11 277dea3101eS #define SLI_CT_DATABASE_EMPTY 0x12 278dea3101eS 279dea3101eS /* 280dea3101eS * Name Server Command Codes 281dea3101eS */ 282dea3101eS 283dea3101eS #define SLI_CTNS_GA_NXT 0x0100 284dea3101eS #define SLI_CTNS_GPN_ID 0x0112 285dea3101eS #define SLI_CTNS_GNN_ID 0x0113 286dea3101eS #define SLI_CTNS_GCS_ID 0x0114 287dea3101eS #define SLI_CTNS_GFT_ID 0x0117 288dea3101eS #define SLI_CTNS_GSPN_ID 0x0118 289dea3101eS #define SLI_CTNS_GPT_ID 0x011A 29092d7f7b0SJames Smart #define SLI_CTNS_GFF_ID 0x011F 291dea3101eS #define SLI_CTNS_GID_PN 0x0121 292dea3101eS #define SLI_CTNS_GID_NN 0x0131 293dea3101eS #define SLI_CTNS_GIP_NN 0x0135 294dea3101eS #define SLI_CTNS_GIPA_NN 0x0136 295dea3101eS #define SLI_CTNS_GSNN_NN 0x0139 296dea3101eS #define SLI_CTNS_GNN_IP 0x0153 297dea3101eS #define SLI_CTNS_GIPA_IP 0x0156 298dea3101eS #define SLI_CTNS_GID_FT 0x0171 299a0f2d3efSJames Smart #define SLI_CTNS_GID_FF 0x01F1 300dea3101eS #define SLI_CTNS_GID_PT 0x01A1 301dea3101eS #define SLI_CTNS_RPN_ID 0x0212 302dea3101eS #define SLI_CTNS_RNN_ID 0x0213 303dea3101eS #define SLI_CTNS_RCS_ID 0x0214 304dea3101eS #define SLI_CTNS_RFT_ID 0x0217 305dea3101eS #define SLI_CTNS_RSPN_ID 0x0218 306dea3101eS #define SLI_CTNS_RPT_ID 0x021A 30792d7f7b0SJames Smart #define SLI_CTNS_RFF_ID 0x021F 308dea3101eS #define SLI_CTNS_RIP_NN 0x0235 309dea3101eS #define SLI_CTNS_RIPA_NN 0x0236 310dea3101eS #define SLI_CTNS_RSNN_NN 0x0239 311dea3101eS #define SLI_CTNS_DA_ID 0x0300 312dea3101eS 313dea3101eS /* 314dea3101eS * Port Types 315dea3101eS */ 316dea3101eS 317dea3101eS #define SLI_CTPT_N_PORT 0x01 318dea3101eS #define SLI_CTPT_NL_PORT 0x02 319dea3101eS #define SLI_CTPT_FNL_PORT 0x03 320dea3101eS #define SLI_CTPT_IP 0x04 321dea3101eS #define SLI_CTPT_FCP 0x08 322a0f2d3efSJames Smart #define SLI_CTPT_NVME 0x28 323dea3101eS #define SLI_CTPT_NX_PORT 0x7F 324dea3101eS #define SLI_CTPT_F_PORT 0x81 325dea3101eS #define SLI_CTPT_FL_PORT 0x82 326dea3101eS #define SLI_CTPT_E_PORT 0x84 327dea3101eS 328dea3101eS #define SLI_CT_LAST_ENTRY 0x80000000 329dea3101eS 330dea3101eS /* Fibre Channel Service Parameter definitions */ 331dea3101eS 332dea3101eS #define FC_PH_4_0 6 /* FC-PH version 4.0 */ 333dea3101eS #define FC_PH_4_1 7 /* FC-PH version 4.1 */ 334dea3101eS #define FC_PH_4_2 8 /* FC-PH version 4.2 */ 335dea3101eS #define FC_PH_4_3 9 /* FC-PH version 4.3 */ 336dea3101eS 337dea3101eS #define FC_PH_LOW 8 /* Lowest supported FC-PH version */ 338dea3101eS #define FC_PH_HIGH 9 /* Highest supported FC-PH version */ 339dea3101eS #define FC_PH3 0x20 /* FC-PH-3 version */ 340dea3101eS 341dea3101eS #define FF_FRAME_SIZE 2048 342dea3101eS 343dea3101eS struct lpfc_name { 344f631b4beSAndrew Vasquez union { 345f631b4beSAndrew Vasquez struct { 346dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 347dea3101eS uint8_t nameType:4; /* FC Word 0, bit 28:31 */ 3481de933f3SJames.Smart@Emulex.Com uint8_t IEEEextMsn:4; /* FC Word 0, bit 24:27, bit 3491de933f3SJames.Smart@Emulex.Com 8:11 of IEEE ext */ 350dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 3511de933f3SJames.Smart@Emulex.Com uint8_t IEEEextMsn:4; /* FC Word 0, bit 24:27, bit 3521de933f3SJames.Smart@Emulex.Com 8:11 of IEEE ext */ 353dea3101eS uint8_t nameType:4; /* FC Word 0, bit 28:31 */ 354dea3101eS #endif 355dea3101eS 356dea3101eS #define NAME_IEEE 0x1 /* IEEE name - nameType */ 357dea3101eS #define NAME_IEEE_EXT 0x2 /* IEEE extended name */ 358dea3101eS #define NAME_FC_TYPE 0x3 /* FC native name type */ 359dea3101eS #define NAME_IP_TYPE 0x4 /* IP address */ 360dea3101eS #define NAME_CCITT_TYPE 0xC 361dea3101eS #define NAME_CCITT_GR_TYPE 0xE 3621de933f3SJames.Smart@Emulex.Com uint8_t IEEEextLsb; /* FC Word 0, bit 16:23, IEEE 3631de933f3SJames.Smart@Emulex.Com extended Lsb */ 364dea3101eS uint8_t IEEE[6]; /* FC IEEE address */ 36568ce1eb5SAndrew Morton } s; 366f631b4beSAndrew Vasquez uint8_t wwn[8]; 367a0f2d3efSJames Smart uint64_t name; 36868ce1eb5SAndrew Morton } u; 369f631b4beSAndrew Vasquez }; 370dea3101eS 371dea3101eS struct csp { 372dea3101eS uint8_t fcphHigh; /* FC Word 0, byte 0 */ 373dea3101eS uint8_t fcphLow; 374dea3101eS uint8_t bbCreditMsb; 3753aaaa314SJames Smart uint8_t bbCreditLsb; /* FC Word 0, byte 3 */ 376dea3101eS 37792494144SJames Smart /* 37892494144SJames Smart * Word 1 Bit 31 in common service parameter is overloaded. 37992494144SJames Smart * Word 1 Bit 31 in FLOGI request is multiple NPort request 38092494144SJames Smart * Word 1 Bit 31 in FLOGI response is clean address bit 38192494144SJames Smart */ 38292494144SJames Smart #define clean_address_bit request_multiple_Nport /* Word 1, bit 31 */ 383df9e1b59SJames Smart /* 384df9e1b59SJames Smart * Word 1 Bit 30 in common service parameter is overloaded. 385df9e1b59SJames Smart * Word 1 Bit 30 in FLOGI request is Virtual Fabrics 386df9e1b59SJames Smart * Word 1 Bit 30 in PLOGI request is random offset 387df9e1b59SJames Smart */ 388df9e1b59SJames Smart #define virtual_fabric_support randomOffset /* Word 1, bit 30 */ 389e0165f20SJames Smart /* 390e0165f20SJames Smart * Word 1 Bit 29 in common service parameter is overloaded. 391e0165f20SJames Smart * Word 1 Bit 29 in FLOGI response is multiple NPort assignment 392e0165f20SJames Smart * Word 1 Bit 29 in FLOGI/PLOGI request is Valid Vendor Version Level 393e0165f20SJames Smart */ 394e0165f20SJames Smart #define valid_vendor_ver_level response_multiple_NPort /* Word 1, bit 29 */ 395dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 39692d7f7b0SJames Smart uint16_t request_multiple_Nport:1; /* FC Word 1, bit 31 */ 39792d7f7b0SJames Smart uint16_t randomOffset:1; /* FC Word 1, bit 30 */ 39892d7f7b0SJames Smart uint16_t response_multiple_NPort:1; /* FC Word 1, bit 29 */ 399dea3101eS uint16_t fPort:1; /* FC Word 1, bit 28 */ 400dea3101eS uint16_t altBbCredit:1; /* FC Word 1, bit 27 */ 401dea3101eS uint16_t edtovResolution:1; /* FC Word 1, bit 26 */ 402dea3101eS uint16_t multicast:1; /* FC Word 1, bit 25 */ 403dea3101eS uint16_t broadcast:1; /* FC Word 1, bit 24 */ 404dea3101eS 405dea3101eS uint16_t huntgroup:1; /* FC Word 1, bit 23 */ 406dea3101eS uint16_t simplex:1; /* FC Word 1, bit 22 */ 407dea3101eS uint16_t word1Reserved1:3; /* FC Word 1, bit 21:19 */ 408dea3101eS uint16_t dhd:1; /* FC Word 1, bit 18 */ 409dea3101eS uint16_t contIncSeqCnt:1; /* FC Word 1, bit 17 */ 410dea3101eS uint16_t payloadlength:1; /* FC Word 1, bit 16 */ 411dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 412dea3101eS uint16_t broadcast:1; /* FC Word 1, bit 24 */ 413dea3101eS uint16_t multicast:1; /* FC Word 1, bit 25 */ 414dea3101eS uint16_t edtovResolution:1; /* FC Word 1, bit 26 */ 415dea3101eS uint16_t altBbCredit:1; /* FC Word 1, bit 27 */ 416dea3101eS uint16_t fPort:1; /* FC Word 1, bit 28 */ 41792d7f7b0SJames Smart uint16_t response_multiple_NPort:1; /* FC Word 1, bit 29 */ 418dea3101eS uint16_t randomOffset:1; /* FC Word 1, bit 30 */ 41992d7f7b0SJames Smart uint16_t request_multiple_Nport:1; /* FC Word 1, bit 31 */ 420dea3101eS 421dea3101eS uint16_t payloadlength:1; /* FC Word 1, bit 16 */ 422dea3101eS uint16_t contIncSeqCnt:1; /* FC Word 1, bit 17 */ 423dea3101eS uint16_t dhd:1; /* FC Word 1, bit 18 */ 424dea3101eS uint16_t word1Reserved1:3; /* FC Word 1, bit 21:19 */ 425dea3101eS uint16_t simplex:1; /* FC Word 1, bit 22 */ 426dea3101eS uint16_t huntgroup:1; /* FC Word 1, bit 23 */ 427dea3101eS #endif 428dea3101eS 429dea3101eS uint8_t bbRcvSizeMsb; /* Upper nibble is reserved */ 430dea3101eS uint8_t bbRcvSizeLsb; /* FC Word 1, byte 3 */ 431dea3101eS union { 432dea3101eS struct { 433dea3101eS uint8_t word2Reserved1; /* FC Word 2 byte 0 */ 434dea3101eS 435dea3101eS uint8_t totalConcurrSeq; /* FC Word 2 byte 1 */ 436dea3101eS uint8_t roByCategoryMsb; /* FC Word 2 byte 2 */ 437dea3101eS 438dea3101eS uint8_t roByCategoryLsb; /* FC Word 2 byte 3 */ 439dea3101eS } nPort; 440dea3101eS uint32_t r_a_tov; /* R_A_TOV must be in B.E. format */ 441dea3101eS } w2; 442dea3101eS 443dea3101eS uint32_t e_d_tov; /* E_D_TOV must be in B.E. format */ 444dea3101eS }; 445dea3101eS 446dea3101eS struct class_parms { 447dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 448dea3101eS uint8_t classValid:1; /* FC Word 0, bit 31 */ 449dea3101eS uint8_t intermix:1; /* FC Word 0, bit 30 */ 450dea3101eS uint8_t stackedXparent:1; /* FC Word 0, bit 29 */ 451dea3101eS uint8_t stackedLockDown:1; /* FC Word 0, bit 28 */ 452dea3101eS uint8_t seqDelivery:1; /* FC Word 0, bit 27 */ 453dea3101eS uint8_t word0Reserved1:3; /* FC Word 0, bit 24:26 */ 454dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 455dea3101eS uint8_t word0Reserved1:3; /* FC Word 0, bit 24:26 */ 456dea3101eS uint8_t seqDelivery:1; /* FC Word 0, bit 27 */ 457dea3101eS uint8_t stackedLockDown:1; /* FC Word 0, bit 28 */ 458dea3101eS uint8_t stackedXparent:1; /* FC Word 0, bit 29 */ 459dea3101eS uint8_t intermix:1; /* FC Word 0, bit 30 */ 460dea3101eS uint8_t classValid:1; /* FC Word 0, bit 31 */ 461dea3101eS 462dea3101eS #endif 463dea3101eS 464dea3101eS uint8_t word0Reserved2; /* FC Word 0, bit 16:23 */ 465dea3101eS 466dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 467dea3101eS uint8_t iCtlXidReAssgn:2; /* FC Word 0, Bit 14:15 */ 468dea3101eS uint8_t iCtlInitialPa:2; /* FC Word 0, bit 12:13 */ 469dea3101eS uint8_t iCtlAck0capable:1; /* FC Word 0, bit 11 */ 470dea3101eS uint8_t iCtlAckNcapable:1; /* FC Word 0, bit 10 */ 471dea3101eS uint8_t word0Reserved3:2; /* FC Word 0, bit 8: 9 */ 472dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 473dea3101eS uint8_t word0Reserved3:2; /* FC Word 0, bit 8: 9 */ 474dea3101eS uint8_t iCtlAckNcapable:1; /* FC Word 0, bit 10 */ 475dea3101eS uint8_t iCtlAck0capable:1; /* FC Word 0, bit 11 */ 476dea3101eS uint8_t iCtlInitialPa:2; /* FC Word 0, bit 12:13 */ 477dea3101eS uint8_t iCtlXidReAssgn:2; /* FC Word 0, Bit 14:15 */ 478dea3101eS #endif 479dea3101eS 480dea3101eS uint8_t word0Reserved4; /* FC Word 0, bit 0: 7 */ 481dea3101eS 482dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 483dea3101eS uint8_t rCtlAck0capable:1; /* FC Word 1, bit 31 */ 484dea3101eS uint8_t rCtlAckNcapable:1; /* FC Word 1, bit 30 */ 485dea3101eS uint8_t rCtlXidInterlck:1; /* FC Word 1, bit 29 */ 486dea3101eS uint8_t rCtlErrorPolicy:2; /* FC Word 1, bit 27:28 */ 487dea3101eS uint8_t word1Reserved1:1; /* FC Word 1, bit 26 */ 488dea3101eS uint8_t rCtlCatPerSeq:2; /* FC Word 1, bit 24:25 */ 489dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 490dea3101eS uint8_t rCtlCatPerSeq:2; /* FC Word 1, bit 24:25 */ 491dea3101eS uint8_t word1Reserved1:1; /* FC Word 1, bit 26 */ 492dea3101eS uint8_t rCtlErrorPolicy:2; /* FC Word 1, bit 27:28 */ 493dea3101eS uint8_t rCtlXidInterlck:1; /* FC Word 1, bit 29 */ 494dea3101eS uint8_t rCtlAckNcapable:1; /* FC Word 1, bit 30 */ 495dea3101eS uint8_t rCtlAck0capable:1; /* FC Word 1, bit 31 */ 496dea3101eS #endif 497dea3101eS 498dea3101eS uint8_t word1Reserved2; /* FC Word 1, bit 16:23 */ 499dea3101eS uint8_t rcvDataSizeMsb; /* FC Word 1, bit 8:15 */ 500dea3101eS uint8_t rcvDataSizeLsb; /* FC Word 1, bit 0: 7 */ 501dea3101eS 502dea3101eS uint8_t concurrentSeqMsb; /* FC Word 2, bit 24:31 */ 503dea3101eS uint8_t concurrentSeqLsb; /* FC Word 2, bit 16:23 */ 504dea3101eS uint8_t EeCreditSeqMsb; /* FC Word 2, bit 8:15 */ 505dea3101eS uint8_t EeCreditSeqLsb; /* FC Word 2, bit 0: 7 */ 506dea3101eS 507dea3101eS uint8_t openSeqPerXchgMsb; /* FC Word 3, bit 24:31 */ 508dea3101eS uint8_t openSeqPerXchgLsb; /* FC Word 3, bit 16:23 */ 509dea3101eS uint8_t word3Reserved1; /* Fc Word 3, bit 8:15 */ 510dea3101eS uint8_t word3Reserved2; /* Fc Word 3, bit 0: 7 */ 511dea3101eS }; 512dea3101eS 513aeb3c817SJames Smart #define FAPWWN_KEY_VENDOR 0x42524344 /*valid vendor version fawwpn key*/ 514aeb3c817SJames Smart 515dea3101eS struct serv_parm { /* Structure is in Big Endian format */ 516dea3101eS struct csp cmn; 517dea3101eS struct lpfc_name portName; 518dea3101eS struct lpfc_name nodeName; 519dea3101eS struct class_parms cls1; 520dea3101eS struct class_parms cls2; 521dea3101eS struct class_parms cls3; 522dea3101eS struct class_parms cls4; 5238c258641SJames Smart union { 524dea3101eS uint8_t vendorVersion[16]; 5258c258641SJames Smart struct { 5268c258641SJames Smart uint32_t vid; 5278c258641SJames Smart #define LPFC_VV_EMLX_ID 0x454d4c58 /* EMLX */ 5288c258641SJames Smart uint32_t flags; 5298c258641SJames Smart #define LPFC_VV_SUPPRESS_RSP 1 5308c258641SJames Smart } vv; 5318c258641SJames Smart } un; 532dea3101eS }; 533dea3101eS 534dea3101eS /* 535da0436e9SJames Smart * Virtual Fabric Tagging Header 536da0436e9SJames Smart */ 537da0436e9SJames Smart struct fc_vft_header { 538da0436e9SJames Smart uint32_t word0; 539da0436e9SJames Smart #define fc_vft_hdr_r_ctl_SHIFT 24 540da0436e9SJames Smart #define fc_vft_hdr_r_ctl_MASK 0xFF 541da0436e9SJames Smart #define fc_vft_hdr_r_ctl_WORD word0 542da0436e9SJames Smart #define fc_vft_hdr_ver_SHIFT 22 543da0436e9SJames Smart #define fc_vft_hdr_ver_MASK 0x3 544da0436e9SJames Smart #define fc_vft_hdr_ver_WORD word0 545da0436e9SJames Smart #define fc_vft_hdr_type_SHIFT 18 546da0436e9SJames Smart #define fc_vft_hdr_type_MASK 0xF 547da0436e9SJames Smart #define fc_vft_hdr_type_WORD word0 548da0436e9SJames Smart #define fc_vft_hdr_e_SHIFT 16 549da0436e9SJames Smart #define fc_vft_hdr_e_MASK 0x1 550da0436e9SJames Smart #define fc_vft_hdr_e_WORD word0 551da0436e9SJames Smart #define fc_vft_hdr_priority_SHIFT 13 552da0436e9SJames Smart #define fc_vft_hdr_priority_MASK 0x7 553da0436e9SJames Smart #define fc_vft_hdr_priority_WORD word0 554da0436e9SJames Smart #define fc_vft_hdr_vf_id_SHIFT 1 555da0436e9SJames Smart #define fc_vft_hdr_vf_id_MASK 0xFFF 556da0436e9SJames Smart #define fc_vft_hdr_vf_id_WORD word0 557da0436e9SJames Smart uint32_t word1; 558da0436e9SJames Smart #define fc_vft_hdr_hopct_SHIFT 24 559da0436e9SJames Smart #define fc_vft_hdr_hopct_MASK 0xFF 560da0436e9SJames Smart #define fc_vft_hdr_hopct_WORD word1 561da0436e9SJames Smart }; 562da0436e9SJames Smart 5631a61e548SJames Smart #include <uapi/scsi/fc/fc_els.h> 5641a61e548SJames Smart 565da0436e9SJames Smart /* 566dea3101eS * Extended Link Service LS_COMMAND codes (Payload Word 0) 567dea3101eS */ 568dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 569dea3101eS #define ELS_CMD_MASK 0xffff0000 570dea3101eS #define ELS_RSP_MASK 0xff000000 571dea3101eS #define ELS_CMD_LS_RJT 0x01000000 572dea3101eS #define ELS_CMD_ACC 0x02000000 573dea3101eS #define ELS_CMD_PLOGI 0x03000000 574dea3101eS #define ELS_CMD_FLOGI 0x04000000 575dea3101eS #define ELS_CMD_LOGO 0x05000000 576dea3101eS #define ELS_CMD_ABTX 0x06000000 577dea3101eS #define ELS_CMD_RCS 0x07000000 578dea3101eS #define ELS_CMD_RES 0x08000000 579dea3101eS #define ELS_CMD_RSS 0x09000000 580dea3101eS #define ELS_CMD_RSI 0x0A000000 581dea3101eS #define ELS_CMD_ESTS 0x0B000000 582dea3101eS #define ELS_CMD_ESTC 0x0C000000 583dea3101eS #define ELS_CMD_ADVC 0x0D000000 584dea3101eS #define ELS_CMD_RTV 0x0E000000 585dea3101eS #define ELS_CMD_RLS 0x0F000000 586dea3101eS #define ELS_CMD_ECHO 0x10000000 587dea3101eS #define ELS_CMD_TEST 0x11000000 588dea3101eS #define ELS_CMD_RRQ 0x12000000 589303f2f9cSJames Smart #define ELS_CMD_REC 0x13000000 59086478875SJames Smart #define ELS_CMD_RDP 0x18000000 591df3fe766SJames Smart #define ELS_CMD_RDF 0x19000000 592dea3101eS #define ELS_CMD_PRLI 0x20100014 593a0f2d3efSJames Smart #define ELS_CMD_NVMEPRLI 0x20140018 594dea3101eS #define ELS_CMD_PRLO 0x21100014 59582d9a2a2SJames Smart #define ELS_CMD_PRLO_ACC 0x02100014 596dea3101eS #define ELS_CMD_PDISC 0x50000000 597dea3101eS #define ELS_CMD_FDISC 0x51000000 598dea3101eS #define ELS_CMD_ADISC 0x52000000 599dea3101eS #define ELS_CMD_FARP 0x54000000 600dea3101eS #define ELS_CMD_FARPR 0x55000000 6017bb3b137SJamie Wellnitz #define ELS_CMD_RPL 0x57000000 602dea3101eS #define ELS_CMD_FAN 0x60000000 603dea3101eS #define ELS_CMD_RSCN 0x61040000 604f60cb93bSJames Smart #define ELS_CMD_RSCN_XMT 0x61040008 605dea3101eS #define ELS_CMD_SCR 0x62000000 606dea3101eS #define ELS_CMD_RNID 0x78000000 6077bb3b137SJamie Wellnitz #define ELS_CMD_LIRR 0x7A000000 6088b017a30SJames Smart #define ELS_CMD_LCB 0x81000000 6091a61e548SJames Smart #define ELS_CMD_FPIN 0x16000000 610dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 611dea3101eS #define ELS_CMD_MASK 0xffff 612dea3101eS #define ELS_RSP_MASK 0xff 613dea3101eS #define ELS_CMD_LS_RJT 0x01 614dea3101eS #define ELS_CMD_ACC 0x02 615dea3101eS #define ELS_CMD_PLOGI 0x03 616dea3101eS #define ELS_CMD_FLOGI 0x04 617dea3101eS #define ELS_CMD_LOGO 0x05 618dea3101eS #define ELS_CMD_ABTX 0x06 619dea3101eS #define ELS_CMD_RCS 0x07 620dea3101eS #define ELS_CMD_RES 0x08 621dea3101eS #define ELS_CMD_RSS 0x09 622dea3101eS #define ELS_CMD_RSI 0x0A 623dea3101eS #define ELS_CMD_ESTS 0x0B 624dea3101eS #define ELS_CMD_ESTC 0x0C 625dea3101eS #define ELS_CMD_ADVC 0x0D 626dea3101eS #define ELS_CMD_RTV 0x0E 627dea3101eS #define ELS_CMD_RLS 0x0F 628dea3101eS #define ELS_CMD_ECHO 0x10 629dea3101eS #define ELS_CMD_TEST 0x11 630dea3101eS #define ELS_CMD_RRQ 0x12 631303f2f9cSJames Smart #define ELS_CMD_REC 0x13 63286478875SJames Smart #define ELS_CMD_RDP 0x18 633df3fe766SJames Smart #define ELS_CMD_RDF 0x19 634dea3101eS #define ELS_CMD_PRLI 0x14001020 635a0f2d3efSJames Smart #define ELS_CMD_NVMEPRLI 0x18001420 636dea3101eS #define ELS_CMD_PRLO 0x14001021 63782d9a2a2SJames Smart #define ELS_CMD_PRLO_ACC 0x14001002 638dea3101eS #define ELS_CMD_PDISC 0x50 639dea3101eS #define ELS_CMD_FDISC 0x51 640dea3101eS #define ELS_CMD_ADISC 0x52 641dea3101eS #define ELS_CMD_FARP 0x54 642dea3101eS #define ELS_CMD_FARPR 0x55 6437bb3b137SJamie Wellnitz #define ELS_CMD_RPL 0x57 644dea3101eS #define ELS_CMD_FAN 0x60 645dea3101eS #define ELS_CMD_RSCN 0x0461 646f60cb93bSJames Smart #define ELS_CMD_RSCN_XMT 0x08000461 647dea3101eS #define ELS_CMD_SCR 0x62 648dea3101eS #define ELS_CMD_RNID 0x78 6497bb3b137SJamie Wellnitz #define ELS_CMD_LIRR 0x7A 6508b017a30SJames Smart #define ELS_CMD_LCB 0x81 6511a61e548SJames Smart #define ELS_CMD_FPIN ELS_FPIN 652dea3101eS #endif 653dea3101eS 654dea3101eS /* 655dea3101eS * LS_RJT Payload Definition 656dea3101eS */ 657dea3101eS 658dea3101eS struct ls_rjt { /* Structure is in Big Endian format */ 659dea3101eS union { 660dea3101eS uint32_t lsRjtError; 661dea3101eS struct { 662dea3101eS uint8_t lsRjtRsvd0; /* FC Word 0, bit 24:31 */ 663dea3101eS 664dea3101eS uint8_t lsRjtRsnCode; /* FC Word 0, bit 16:23 */ 665dea3101eS /* LS_RJT reason codes */ 666dea3101eS #define LSRJT_INVALID_CMD 0x01 667dea3101eS #define LSRJT_LOGICAL_ERR 0x03 668dea3101eS #define LSRJT_LOGICAL_BSY 0x05 669dea3101eS #define LSRJT_PROTOCOL_ERR 0x07 670dea3101eS #define LSRJT_UNABLE_TPC 0x09 /* Unable to perform command */ 671dea3101eS #define LSRJT_CMD_UNSUPPORTED 0x0B 672dea3101eS #define LSRJT_VENDOR_UNIQUE 0xFF /* See Byte 3 */ 673dea3101eS 674dea3101eS uint8_t lsRjtRsnCodeExp; /* FC Word 0, bit 8:15 */ 675dea3101eS /* LS_RJT reason explanation */ 676dea3101eS #define LSEXP_NOTHING_MORE 0x00 677dea3101eS #define LSEXP_SPARM_OPTIONS 0x01 678dea3101eS #define LSEXP_SPARM_ICTL 0x03 679dea3101eS #define LSEXP_SPARM_RCTL 0x05 680dea3101eS #define LSEXP_SPARM_RCV_SIZE 0x07 681dea3101eS #define LSEXP_SPARM_CONCUR_SEQ 0x09 682dea3101eS #define LSEXP_SPARM_CREDIT 0x0B 683dea3101eS #define LSEXP_INVALID_PNAME 0x0D 684dea3101eS #define LSEXP_INVALID_NNAME 0x0E 685dea3101eS #define LSEXP_INVALID_CSP 0x0F 686dea3101eS #define LSEXP_INVALID_ASSOC_HDR 0x11 687dea3101eS #define LSEXP_ASSOC_HDR_REQ 0x13 688dea3101eS #define LSEXP_INVALID_O_SID 0x15 689dea3101eS #define LSEXP_INVALID_OX_RX 0x17 690dea3101eS #define LSEXP_CMD_IN_PROGRESS 0x19 6917f5f3d0dSJames Smart #define LSEXP_PORT_LOGIN_REQ 0x1E 692dea3101eS #define LSEXP_INVALID_NPORT_ID 0x1F 693dea3101eS #define LSEXP_INVALID_SEQ_ID 0x21 694dea3101eS #define LSEXP_INVALID_XCHG 0x23 695dea3101eS #define LSEXP_INACTIVE_XCHG 0x25 696dea3101eS #define LSEXP_RQ_REQUIRED 0x27 697dea3101eS #define LSEXP_OUT_OF_RESOURCE 0x29 698dea3101eS #define LSEXP_CANT_GIVE_DATA 0x2A 699dea3101eS #define LSEXP_REQ_UNSUPPORTED 0x2C 700dea3101eS uint8_t vendorUnique; /* FC Word 0, bit 0: 7 */ 701dea3101eS } b; 702dea3101eS } un; 703dea3101eS }; 704dea3101eS 705dea3101eS /* 706dea3101eS * N_Port Login (FLOGO/PLOGO Request) Payload Definition 707dea3101eS */ 708dea3101eS 709dea3101eS typedef struct _LOGO { /* Structure is in Big Endian format */ 710dea3101eS union { 711dea3101eS uint32_t nPortId32; /* Access nPortId as a word */ 712dea3101eS struct { 713dea3101eS uint8_t word1Reserved1; /* FC Word 1, bit 31:24 */ 714dea3101eS uint8_t nPortIdByte0; /* N_port ID bit 16:23 */ 715dea3101eS uint8_t nPortIdByte1; /* N_port ID bit 8:15 */ 716dea3101eS uint8_t nPortIdByte2; /* N_port ID bit 0: 7 */ 717dea3101eS } b; 718dea3101eS } un; 719dea3101eS struct lpfc_name portName; /* N_port name field */ 720dea3101eS } LOGO; 721dea3101eS 722dea3101eS /* 723dea3101eS * FCP Login (PRLI Request / ACC) Payload Definition 724dea3101eS */ 725dea3101eS 726dea3101eS #define PRLX_PAGE_LEN 0x10 727dea3101eS #define TPRLO_PAGE_LEN 0x14 728dea3101eS 729dea3101eS typedef struct _PRLI { /* Structure is in Big Endian format */ 730dea3101eS uint8_t prliType; /* FC Parm Word 0, bit 24:31 */ 731dea3101eS 732dea3101eS #define PRLI_FCP_TYPE 0x08 733a0f2d3efSJames Smart #define PRLI_NVME_TYPE 0x28 734dea3101eS uint8_t word0Reserved1; /* FC Parm Word 0, bit 16:23 */ 735dea3101eS 736dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 737dea3101eS uint8_t origProcAssocV:1; /* FC Parm Word 0, bit 15 */ 738dea3101eS uint8_t respProcAssocV:1; /* FC Parm Word 0, bit 14 */ 739dea3101eS uint8_t estabImagePair:1; /* FC Parm Word 0, bit 13 */ 740dea3101eS 741dea3101eS /* ACC = imagePairEstablished */ 742dea3101eS uint8_t word0Reserved2:1; /* FC Parm Word 0, bit 12 */ 743dea3101eS uint8_t acceptRspCode:4; /* FC Parm Word 0, bit 8:11, ACC ONLY */ 744dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 745dea3101eS uint8_t acceptRspCode:4; /* FC Parm Word 0, bit 8:11, ACC ONLY */ 746dea3101eS uint8_t word0Reserved2:1; /* FC Parm Word 0, bit 12 */ 747dea3101eS uint8_t estabImagePair:1; /* FC Parm Word 0, bit 13 */ 748dea3101eS uint8_t respProcAssocV:1; /* FC Parm Word 0, bit 14 */ 749dea3101eS uint8_t origProcAssocV:1; /* FC Parm Word 0, bit 15 */ 750dea3101eS /* ACC = imagePairEstablished */ 751dea3101eS #endif 752dea3101eS 753dea3101eS #define PRLI_REQ_EXECUTED 0x1 /* acceptRspCode */ 754dea3101eS #define PRLI_NO_RESOURCES 0x2 755dea3101eS #define PRLI_INIT_INCOMPLETE 0x3 756dea3101eS #define PRLI_NO_SUCH_PA 0x4 757dea3101eS #define PRLI_PREDEF_CONFIG 0x5 758dea3101eS #define PRLI_PARTIAL_SUCCESS 0x6 759dea3101eS #define PRLI_INVALID_PAGE_CNT 0x7 760dea3101eS uint8_t word0Reserved3; /* FC Parm Word 0, bit 0:7 */ 761dea3101eS 762dea3101eS uint32_t origProcAssoc; /* FC Parm Word 1, bit 0:31 */ 763dea3101eS 764dea3101eS uint32_t respProcAssoc; /* FC Parm Word 2, bit 0:31 */ 765dea3101eS 766dea3101eS uint8_t word3Reserved1; /* FC Parm Word 3, bit 24:31 */ 767dea3101eS uint8_t word3Reserved2; /* FC Parm Word 3, bit 16:23 */ 768dea3101eS 769dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 770dea3101eS uint16_t Word3bit15Resved:1; /* FC Parm Word 3, bit 15 */ 771dea3101eS uint16_t Word3bit14Resved:1; /* FC Parm Word 3, bit 14 */ 772dea3101eS uint16_t Word3bit13Resved:1; /* FC Parm Word 3, bit 13 */ 773dea3101eS uint16_t Word3bit12Resved:1; /* FC Parm Word 3, bit 12 */ 774dea3101eS uint16_t Word3bit11Resved:1; /* FC Parm Word 3, bit 11 */ 775dea3101eS uint16_t Word3bit10Resved:1; /* FC Parm Word 3, bit 10 */ 776dea3101eS uint16_t TaskRetryIdReq:1; /* FC Parm Word 3, bit 9 */ 777dea3101eS uint16_t Retry:1; /* FC Parm Word 3, bit 8 */ 778dea3101eS uint16_t ConfmComplAllowed:1; /* FC Parm Word 3, bit 7 */ 779dea3101eS uint16_t dataOverLay:1; /* FC Parm Word 3, bit 6 */ 780dea3101eS uint16_t initiatorFunc:1; /* FC Parm Word 3, bit 5 */ 781dea3101eS uint16_t targetFunc:1; /* FC Parm Word 3, bit 4 */ 782dea3101eS uint16_t cmdDataMixEna:1; /* FC Parm Word 3, bit 3 */ 783dea3101eS uint16_t dataRspMixEna:1; /* FC Parm Word 3, bit 2 */ 784dea3101eS uint16_t readXferRdyDis:1; /* FC Parm Word 3, bit 1 */ 785dea3101eS uint16_t writeXferRdyDis:1; /* FC Parm Word 3, bit 0 */ 786dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 787dea3101eS uint16_t Retry:1; /* FC Parm Word 3, bit 8 */ 788dea3101eS uint16_t TaskRetryIdReq:1; /* FC Parm Word 3, bit 9 */ 789dea3101eS uint16_t Word3bit10Resved:1; /* FC Parm Word 3, bit 10 */ 790dea3101eS uint16_t Word3bit11Resved:1; /* FC Parm Word 3, bit 11 */ 791dea3101eS uint16_t Word3bit12Resved:1; /* FC Parm Word 3, bit 12 */ 792dea3101eS uint16_t Word3bit13Resved:1; /* FC Parm Word 3, bit 13 */ 793dea3101eS uint16_t Word3bit14Resved:1; /* FC Parm Word 3, bit 14 */ 794dea3101eS uint16_t Word3bit15Resved:1; /* FC Parm Word 3, bit 15 */ 795dea3101eS uint16_t writeXferRdyDis:1; /* FC Parm Word 3, bit 0 */ 796dea3101eS uint16_t readXferRdyDis:1; /* FC Parm Word 3, bit 1 */ 797dea3101eS uint16_t dataRspMixEna:1; /* FC Parm Word 3, bit 2 */ 798dea3101eS uint16_t cmdDataMixEna:1; /* FC Parm Word 3, bit 3 */ 799dea3101eS uint16_t targetFunc:1; /* FC Parm Word 3, bit 4 */ 800dea3101eS uint16_t initiatorFunc:1; /* FC Parm Word 3, bit 5 */ 801dea3101eS uint16_t dataOverLay:1; /* FC Parm Word 3, bit 6 */ 802dea3101eS uint16_t ConfmComplAllowed:1; /* FC Parm Word 3, bit 7 */ 803dea3101eS #endif 804dea3101eS } PRLI; 805dea3101eS 806dea3101eS /* 807dea3101eS * FCP Logout (PRLO Request / ACC) Payload Definition 808dea3101eS */ 809dea3101eS 810dea3101eS typedef struct _PRLO { /* Structure is in Big Endian format */ 811dea3101eS uint8_t prloType; /* FC Parm Word 0, bit 24:31 */ 812dea3101eS 813dea3101eS #define PRLO_FCP_TYPE 0x08 814dea3101eS uint8_t word0Reserved1; /* FC Parm Word 0, bit 16:23 */ 815dea3101eS 816dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 817dea3101eS uint8_t origProcAssocV:1; /* FC Parm Word 0, bit 15 */ 818dea3101eS uint8_t respProcAssocV:1; /* FC Parm Word 0, bit 14 */ 819dea3101eS uint8_t word0Reserved2:2; /* FC Parm Word 0, bit 12:13 */ 820dea3101eS uint8_t acceptRspCode:4; /* FC Parm Word 0, bit 8:11, ACC ONLY */ 821dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 822dea3101eS uint8_t acceptRspCode:4; /* FC Parm Word 0, bit 8:11, ACC ONLY */ 823dea3101eS uint8_t word0Reserved2:2; /* FC Parm Word 0, bit 12:13 */ 824dea3101eS uint8_t respProcAssocV:1; /* FC Parm Word 0, bit 14 */ 825dea3101eS uint8_t origProcAssocV:1; /* FC Parm Word 0, bit 15 */ 826dea3101eS #endif 827dea3101eS 828dea3101eS #define PRLO_REQ_EXECUTED 0x1 /* acceptRspCode */ 829dea3101eS #define PRLO_NO_SUCH_IMAGE 0x4 830dea3101eS #define PRLO_INVALID_PAGE_CNT 0x7 831dea3101eS 832dea3101eS uint8_t word0Reserved3; /* FC Parm Word 0, bit 0:7 */ 833dea3101eS 834dea3101eS uint32_t origProcAssoc; /* FC Parm Word 1, bit 0:31 */ 835dea3101eS 836dea3101eS uint32_t respProcAssoc; /* FC Parm Word 2, bit 0:31 */ 837dea3101eS 838dea3101eS uint32_t word3Reserved1; /* FC Parm Word 3, bit 0:31 */ 839dea3101eS } PRLO; 840dea3101eS 841dea3101eS typedef struct _ADISC { /* Structure is in Big Endian format */ 842dea3101eS uint32_t hardAL_PA; 843dea3101eS struct lpfc_name portName; 844dea3101eS struct lpfc_name nodeName; 845dea3101eS uint32_t DID; 8461d755d64SJames Smart } __packed ADISC; 847dea3101eS 848dea3101eS typedef struct _FARP { /* Structure is in Big Endian format */ 849dea3101eS uint32_t Mflags:8; 850dea3101eS uint32_t Odid:24; 851dea3101eS #define FARP_NO_ACTION 0 /* FARP information enclosed, no 852dea3101eS action */ 853dea3101eS #define FARP_MATCH_PORT 0x1 /* Match on Responder Port Name */ 854dea3101eS #define FARP_MATCH_NODE 0x2 /* Match on Responder Node Name */ 855dea3101eS #define FARP_MATCH_IP 0x4 /* Match on IP address, not supported */ 856dea3101eS #define FARP_MATCH_IPV4 0x5 /* Match on IPV4 address, not 857dea3101eS supported */ 858dea3101eS #define FARP_MATCH_IPV6 0x6 /* Match on IPV6 address, not 859dea3101eS supported */ 860dea3101eS uint32_t Rflags:8; 861dea3101eS uint32_t Rdid:24; 862dea3101eS #define FARP_REQUEST_PLOGI 0x1 /* Request for PLOGI */ 863dea3101eS #define FARP_REQUEST_FARPR 0x2 /* Request for FARP Response */ 864dea3101eS struct lpfc_name OportName; 865dea3101eS struct lpfc_name OnodeName; 866dea3101eS struct lpfc_name RportName; 867dea3101eS struct lpfc_name RnodeName; 868dea3101eS uint8_t Oipaddr[16]; 869dea3101eS uint8_t Ripaddr[16]; 870dea3101eS } FARP; 871dea3101eS 872dea3101eS typedef struct _FAN { /* Structure is in Big Endian format */ 873dea3101eS uint32_t Fdid; 874dea3101eS struct lpfc_name FportName; 875dea3101eS struct lpfc_name FnodeName; 8761d755d64SJames Smart } __packed FAN; 877dea3101eS 878dea3101eS typedef struct _SCR { /* Structure is in Big Endian format */ 879dea3101eS uint8_t resvd1; 880dea3101eS uint8_t resvd2; 881dea3101eS uint8_t resvd3; 882dea3101eS uint8_t Function; 883dea3101eS #define SCR_FUNC_FABRIC 0x01 884dea3101eS #define SCR_FUNC_NPORT 0x02 885dea3101eS #define SCR_FUNC_FULL 0x03 886dea3101eS #define SCR_CLEAR 0xff 887dea3101eS } SCR; 888dea3101eS 889dea3101eS typedef struct _RNID_TOP_DISC { 890dea3101eS struct lpfc_name portName; 891dea3101eS uint8_t resvd[8]; 892dea3101eS uint32_t unitType; 893dea3101eS #define RNID_HBA 0x7 894dea3101eS #define RNID_HOST 0xa 895dea3101eS #define RNID_DRIVER 0xd 896dea3101eS uint32_t physPort; 897dea3101eS uint32_t attachedNodes; 898dea3101eS uint16_t ipVersion; 899dea3101eS #define RNID_IPV4 0x1 900dea3101eS #define RNID_IPV6 0x2 901dea3101eS uint16_t UDPport; 902dea3101eS uint8_t ipAddr[16]; 903dea3101eS uint16_t resvd1; 904dea3101eS uint16_t flags; 905dea3101eS #define RNID_TD_SUPPORT 0x1 906dea3101eS #define RNID_LP_VALID 0x2 907dea3101eS } RNID_TOP_DISC; 908dea3101eS 909dea3101eS typedef struct _RNID { /* Structure is in Big Endian format */ 910dea3101eS uint8_t Format; 911dea3101eS #define RNID_TOPOLOGY_DISC 0xdf 912dea3101eS uint8_t CommonLen; 913dea3101eS uint8_t resvd1; 914dea3101eS uint8_t SpecificLen; 915dea3101eS struct lpfc_name portName; 916dea3101eS struct lpfc_name nodeName; 917dea3101eS union { 918dea3101eS RNID_TOP_DISC topologyDisc; /* topology disc (0xdf) */ 919dea3101eS } un; 9201d755d64SJames Smart } __packed RNID; 921dea3101eS 92212265f68SJames Smart struct RLS { /* Structure is in Big Endian format */ 92312265f68SJames Smart uint32_t rls; 92412265f68SJames Smart #define rls_rsvd_SHIFT 24 92512265f68SJames Smart #define rls_rsvd_MASK 0x000000ff 92612265f68SJames Smart #define rls_rsvd_WORD rls 92712265f68SJames Smart #define rls_did_SHIFT 0 92812265f68SJames Smart #define rls_did_MASK 0x00ffffff 92912265f68SJames Smart #define rls_did_WORD rls 93012265f68SJames Smart }; 93112265f68SJames Smart 93212265f68SJames Smart struct RLS_RSP { /* Structure is in Big Endian format */ 93312265f68SJames Smart uint32_t linkFailureCnt; 93412265f68SJames Smart uint32_t lossSyncCnt; 93512265f68SJames Smart uint32_t lossSignalCnt; 93612265f68SJames Smart uint32_t primSeqErrCnt; 93712265f68SJames Smart uint32_t invalidXmitWord; 93812265f68SJames Smart uint32_t crcCnt; 93912265f68SJames Smart }; 94012265f68SJames Smart 94119ca7609SJames Smart struct RRQ { /* Structure is in Big Endian format */ 94219ca7609SJames Smart uint32_t rrq; 94319ca7609SJames Smart #define rrq_rsvd_SHIFT 24 94419ca7609SJames Smart #define rrq_rsvd_MASK 0x000000ff 94519ca7609SJames Smart #define rrq_rsvd_WORD rrq 94619ca7609SJames Smart #define rrq_did_SHIFT 0 94719ca7609SJames Smart #define rrq_did_MASK 0x00ffffff 94819ca7609SJames Smart #define rrq_did_WORD rrq 94919ca7609SJames Smart uint32_t rrq_exchg; 95019ca7609SJames Smart #define rrq_oxid_SHIFT 16 95119ca7609SJames Smart #define rrq_oxid_MASK 0xffff 95219ca7609SJames Smart #define rrq_oxid_WORD rrq_exchg 95319ca7609SJames Smart #define rrq_rxid_SHIFT 0 95419ca7609SJames Smart #define rrq_rxid_MASK 0xffff 95519ca7609SJames Smart #define rrq_rxid_WORD rrq_exchg 95619ca7609SJames Smart }; 95719ca7609SJames Smart 958912e3acdSJames Smart #define LPFC_MAX_VFN_PER_PFN 255 /* Maximum VFs allowed per ARI */ 959912e3acdSJames Smart #define LPFC_DEF_VFN_PER_PFN 0 /* Default VFs due to platform limitation*/ 96019ca7609SJames Smart 96112265f68SJames Smart struct RTV_RSP { /* Structure is in Big Endian format */ 96212265f68SJames Smart uint32_t ratov; 96312265f68SJames Smart uint32_t edtov; 96412265f68SJames Smart uint32_t qtov; 96512265f68SJames Smart #define qtov_rsvd0_SHIFT 28 96612265f68SJames Smart #define qtov_rsvd0_MASK 0x0000000f 96712265f68SJames Smart #define qtov_rsvd0_WORD qtov /* reserved */ 96812265f68SJames Smart #define qtov_edtovres_SHIFT 27 96912265f68SJames Smart #define qtov_edtovres_MASK 0x00000001 97012265f68SJames Smart #define qtov_edtovres_WORD qtov /* E_D_TOV Resolution */ 97112265f68SJames Smart #define qtov__rsvd1_SHIFT 19 97212265f68SJames Smart #define qtov_rsvd1_MASK 0x0000003f 97312265f68SJames Smart #define qtov_rsvd1_WORD qtov /* reserved */ 97412265f68SJames Smart #define qtov_rttov_SHIFT 18 97512265f68SJames Smart #define qtov_rttov_MASK 0x00000001 97612265f68SJames Smart #define qtov_rttov_WORD qtov /* R_T_TOV value */ 97712265f68SJames Smart #define qtov_rsvd2_SHIFT 0 97812265f68SJames Smart #define qtov_rsvd2_MASK 0x0003ffff 97912265f68SJames Smart #define qtov_rsvd2_WORD qtov /* reserved */ 98012265f68SJames Smart }; 98112265f68SJames Smart 98212265f68SJames Smart 9837bb3b137SJamie Wellnitz typedef struct _RPL { /* Structure is in Big Endian format */ 9847bb3b137SJamie Wellnitz uint32_t maxsize; 9857bb3b137SJamie Wellnitz uint32_t index; 9867bb3b137SJamie Wellnitz } RPL; 9877bb3b137SJamie Wellnitz 9887bb3b137SJamie Wellnitz typedef struct _PORT_NUM_BLK { 9897bb3b137SJamie Wellnitz uint32_t portNum; 9907bb3b137SJamie Wellnitz uint32_t portID; 9917bb3b137SJamie Wellnitz struct lpfc_name portName; 9927bb3b137SJamie Wellnitz } PORT_NUM_BLK; 9937bb3b137SJamie Wellnitz 9947bb3b137SJamie Wellnitz typedef struct _RPL_RSP { /* Structure is in Big Endian format */ 9957bb3b137SJamie Wellnitz uint32_t listLen; 9967bb3b137SJamie Wellnitz uint32_t index; 9977bb3b137SJamie Wellnitz PORT_NUM_BLK port_num_blk; 9987bb3b137SJamie Wellnitz } RPL_RSP; 999dea3101eS 1000dea3101eS /* This is used for RSCN command */ 1001dea3101eS typedef struct _D_ID { /* Structure is in Big Endian format */ 1002dea3101eS union { 1003dea3101eS uint32_t word; 1004dea3101eS struct { 1005dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 1006dea3101eS uint8_t resv; 1007dea3101eS uint8_t domain; 1008dea3101eS uint8_t area; 1009dea3101eS uint8_t id; 1010dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 1011dea3101eS uint8_t id; 1012dea3101eS uint8_t area; 1013dea3101eS uint8_t domain; 1014dea3101eS uint8_t resv; 1015dea3101eS #endif 1016dea3101eS } b; 1017dea3101eS } un; 1018dea3101eS } D_ID; 1019dea3101eS 1020eaf15d5bSJames Smart #define RSCN_ADDRESS_FORMAT_PORT 0x0 1021eaf15d5bSJames Smart #define RSCN_ADDRESS_FORMAT_AREA 0x1 1022eaf15d5bSJames Smart #define RSCN_ADDRESS_FORMAT_DOMAIN 0x2 1023eaf15d5bSJames Smart #define RSCN_ADDRESS_FORMAT_FABRIC 0x3 1024eaf15d5bSJames Smart #define RSCN_ADDRESS_FORMAT_MASK 0x3 1025eaf15d5bSJames Smart 1026dea3101eS /* 1027dea3101eS * Structure to define all ELS Payload types 1028dea3101eS */ 1029dea3101eS 1030dea3101eS typedef struct _ELS_PKT { /* Structure is in Big Endian format */ 1031dea3101eS uint8_t elsCode; /* FC Word 0, bit 24:31 */ 1032dea3101eS uint8_t elsByte1; 1033dea3101eS uint8_t elsByte2; 1034dea3101eS uint8_t elsByte3; 1035dea3101eS union { 1036dea3101eS struct ls_rjt lsRjt; /* Payload for LS_RJT ELS response */ 1037dea3101eS struct serv_parm logi; /* Payload for PLOGI/FLOGI/PDISC/ACC */ 1038dea3101eS LOGO logo; /* Payload for PLOGO/FLOGO/ACC */ 1039dea3101eS PRLI prli; /* Payload for PRLI/ACC */ 1040dea3101eS PRLO prlo; /* Payload for PRLO/ACC */ 1041dea3101eS ADISC adisc; /* Payload for ADISC/ACC */ 1042dea3101eS FARP farp; /* Payload for FARP/ACC */ 1043dea3101eS FAN fan; /* Payload for FAN */ 1044dea3101eS SCR scr; /* Payload for SCR/ACC */ 1045dea3101eS RNID rnid; /* Payload for RNID */ 1046dea3101eS uint8_t pad[128 - 4]; /* Pad out to payload of 128 bytes */ 1047dea3101eS } un; 1048dea3101eS } ELS_PKT; 1049dea3101eS 10508b017a30SJames Smart /* 10518b017a30SJames Smart * Link Cable Beacon (LCB) ELS Frame 10528b017a30SJames Smart */ 10538b017a30SJames Smart 10548b017a30SJames Smart struct fc_lcb_request_frame { 10558b017a30SJames Smart uint32_t lcb_command; /* ELS command opcode (0x81) */ 10568b017a30SJames Smart uint8_t lcb_sub_command;/* LCB Payload Word 1, bit 24:31 */ 10578b017a30SJames Smart #define LPFC_LCB_ON 0x1 10588b017a30SJames Smart #define LPFC_LCB_OFF 0x2 105966e9e6bfSJames Smart uint8_t reserved[2]; 106066e9e6bfSJames Smart uint8_t capability; /* LCB Payload Word 1, bit 0:7 */ 10618b017a30SJames Smart uint8_t lcb_type; /* LCB Payload Word 2, bit 24:31 */ 10628b017a30SJames Smart #define LPFC_LCB_GREEN 0x1 10638b017a30SJames Smart #define LPFC_LCB_AMBER 0x2 10648b017a30SJames Smart uint8_t lcb_frequency; /* LCB Payload Word 2, bit 16:23 */ 106566e9e6bfSJames Smart #define LCB_CAPABILITY_DURATION 1 106666e9e6bfSJames Smart #define BEACON_VERSION_V1 1 106766e9e6bfSJames Smart #define BEACON_VERSION_V0 0 10688b017a30SJames Smart uint16_t lcb_duration; /* LCB Payload Word 2, bit 15:0 */ 10698b017a30SJames Smart }; 10708b017a30SJames Smart 10718b017a30SJames Smart /* 10728b017a30SJames Smart * Link Cable Beacon (LCB) ELS Response Frame 10738b017a30SJames Smart */ 10748b017a30SJames Smart struct fc_lcb_res_frame { 10758b017a30SJames Smart uint32_t lcb_ls_acc; /* Acceptance of LCB request (0x02) */ 10768b017a30SJames Smart uint8_t lcb_sub_command;/* LCB Payload Word 1, bit 24:31 */ 107766e9e6bfSJames Smart uint8_t reserved[2]; 107866e9e6bfSJames Smart uint8_t capability; /* LCB Payload Word 1, bit 0:7 */ 10798b017a30SJames Smart uint8_t lcb_type; /* LCB Payload Word 2, bit 24:31 */ 10808b017a30SJames Smart uint8_t lcb_frequency; /* LCB Payload Word 2, bit 16:23 */ 10818b017a30SJames Smart uint16_t lcb_duration; /* LCB Payload Word 2, bit 15:0 */ 10828b017a30SJames Smart }; 10838b017a30SJames Smart 108486478875SJames Smart /* 108586478875SJames Smart * Read Diagnostic Parameters (RDP) ELS frame. 108686478875SJames Smart */ 108786478875SJames Smart #define SFF_PG0_IDENT_SFP 0x3 108886478875SJames Smart 108986478875SJames Smart #define SFP_FLAG_PT_OPTICAL 0x0 109086478875SJames Smart #define SFP_FLAG_PT_SWLASER 0x01 109186478875SJames Smart #define SFP_FLAG_PT_LWLASER_LC1310 0x02 109286478875SJames Smart #define SFP_FLAG_PT_LWLASER_LL1550 0x03 109386478875SJames Smart #define SFP_FLAG_PT_MASK 0x0F 109486478875SJames Smart #define SFP_FLAG_PT_SHIFT 0 109586478875SJames Smart 109686478875SJames Smart #define SFP_FLAG_IS_OPTICAL_PORT 0x01 109786478875SJames Smart #define SFP_FLAG_IS_OPTICAL_MASK 0x010 109886478875SJames Smart #define SFP_FLAG_IS_OPTICAL_SHIFT 4 109986478875SJames Smart 110086478875SJames Smart #define SFP_FLAG_IS_DESC_VALID 0x01 110186478875SJames Smart #define SFP_FLAG_IS_DESC_VALID_MASK 0x020 110286478875SJames Smart #define SFP_FLAG_IS_DESC_VALID_SHIFT 5 110386478875SJames Smart 110486478875SJames Smart #define SFP_FLAG_CT_UNKNOWN 0x0 110586478875SJames Smart #define SFP_FLAG_CT_SFP_PLUS 0x01 110686478875SJames Smart #define SFP_FLAG_CT_MASK 0x3C 110786478875SJames Smart #define SFP_FLAG_CT_SHIFT 6 110886478875SJames Smart 110986478875SJames Smart struct fc_rdp_port_name_info { 111086478875SJames Smart uint8_t wwnn[8]; 111186478875SJames Smart uint8_t wwpn[8]; 111286478875SJames Smart }; 111386478875SJames Smart 111486478875SJames Smart 111586478875SJames Smart /* 111686478875SJames Smart * Link Error Status Block Structure (FC-FS-3) for RDP 111786478875SJames Smart * This similar to RPS ELS 111886478875SJames Smart */ 111986478875SJames Smart struct fc_link_status { 112086478875SJames Smart uint32_t link_failure_cnt; 112186478875SJames Smart uint32_t loss_of_synch_cnt; 112286478875SJames Smart uint32_t loss_of_signal_cnt; 112386478875SJames Smart uint32_t primitive_seq_proto_err; 112486478875SJames Smart uint32_t invalid_trans_word; 112586478875SJames Smart uint32_t invalid_crc_cnt; 112686478875SJames Smart 112786478875SJames Smart }; 112886478875SJames Smart 112986478875SJames Smart #define RDP_PORT_NAMES_DESC_TAG 0x00010003 113086478875SJames Smart struct fc_rdp_port_name_desc { 113186478875SJames Smart uint32_t tag; /* 0001 0003h */ 113286478875SJames Smart uint32_t length; /* set to size of payload struct */ 113386478875SJames Smart struct fc_rdp_port_name_info port_names; 113486478875SJames Smart }; 113586478875SJames Smart 113686478875SJames Smart 11374258e98eSJames Smart struct fc_rdp_fec_info { 11384258e98eSJames Smart uint32_t CorrectedBlocks; 11394258e98eSJames Smart uint32_t UncorrectableBlocks; 11404258e98eSJames Smart }; 11414258e98eSJames Smart 11424258e98eSJames Smart #define RDP_FEC_DESC_TAG 0x00010005 11434258e98eSJames Smart struct fc_fec_rdp_desc { 11444258e98eSJames Smart uint32_t tag; 11454258e98eSJames Smart uint32_t length; 11464258e98eSJames Smart struct fc_rdp_fec_info info; 11474258e98eSJames Smart }; 11484258e98eSJames Smart 114986478875SJames Smart struct fc_rdp_link_error_status_payload_info { 115086478875SJames Smart struct fc_link_status link_status; /* 24 bytes */ 115186478875SJames Smart uint32_t port_type; /* bits 31-30 only */ 115286478875SJames Smart }; 115386478875SJames Smart 115486478875SJames Smart #define RDP_LINK_ERROR_STATUS_DESC_TAG 0x00010002 115586478875SJames Smart struct fc_rdp_link_error_status_desc { 115686478875SJames Smart uint32_t tag; /* 0001 0002h */ 115786478875SJames Smart uint32_t length; /* set to size of payload struct */ 115886478875SJames Smart struct fc_rdp_link_error_status_payload_info info; 115986478875SJames Smart }; 116086478875SJames Smart 116186478875SJames Smart #define VN_PT_PHY_UNKNOWN 0x00 116286478875SJames Smart #define VN_PT_PHY_PF_PORT 0x01 116386478875SJames Smart #define VN_PT_PHY_ETH_MAC 0x10 116486478875SJames Smart #define VN_PT_PHY_SHIFT 30 116586478875SJames Smart 116686478875SJames Smart #define RDP_PS_1GB 0x8000 116786478875SJames Smart #define RDP_PS_2GB 0x4000 116886478875SJames Smart #define RDP_PS_4GB 0x2000 116986478875SJames Smart #define RDP_PS_10GB 0x1000 117086478875SJames Smart #define RDP_PS_8GB 0x0800 117186478875SJames Smart #define RDP_PS_16GB 0x0400 117286478875SJames Smart #define RDP_PS_32GB 0x0200 1173fbd8a6baSJames Smart #define RDP_PS_64GB 0x0100 1174fbd8a6baSJames Smart #define RDP_PS_128GB 0x0080 1175fbd8a6baSJames Smart #define RDP_PS_256GB 0x0040 117686478875SJames Smart 117756204984SJames Smart #define RDP_CAP_USER_CONFIGURED 0x0002 117886478875SJames Smart #define RDP_CAP_UNKNOWN 0x0001 117986478875SJames Smart #define RDP_PS_UNKNOWN 0x0002 118086478875SJames Smart #define RDP_PS_NOT_ESTABLISHED 0x0001 118186478875SJames Smart 118286478875SJames Smart struct fc_rdp_port_speed { 118386478875SJames Smart uint16_t capabilities; 118486478875SJames Smart uint16_t speed; 118586478875SJames Smart }; 118686478875SJames Smart 118786478875SJames Smart struct fc_rdp_port_speed_info { 118886478875SJames Smart struct fc_rdp_port_speed port_speed; 118986478875SJames Smart }; 119086478875SJames Smart 119186478875SJames Smart #define RDP_PORT_SPEED_DESC_TAG 0x00010001 119286478875SJames Smart struct fc_rdp_port_speed_desc { 119386478875SJames Smart uint32_t tag; /* 00010001h */ 119486478875SJames Smart uint32_t length; /* set to size of payload struct */ 119586478875SJames Smart struct fc_rdp_port_speed_info info; 119686478875SJames Smart }; 119786478875SJames Smart 119886478875SJames Smart #define RDP_NPORT_ID_SIZE 4 119986478875SJames Smart #define RDP_N_PORT_DESC_TAG 0x00000003 120086478875SJames Smart struct fc_rdp_nport_desc { 120186478875SJames Smart uint32_t tag; /* 0000 0003h, big endian */ 120286478875SJames Smart uint32_t length; /* size of RDP_N_PORT_ID struct */ 120386478875SJames Smart uint32_t nport_id : 12; 120486478875SJames Smart uint32_t reserved : 8; 120586478875SJames Smart }; 120686478875SJames Smart 120786478875SJames Smart 120886478875SJames Smart struct fc_rdp_link_service_info { 120986478875SJames Smart uint32_t els_req; /* Request payload word 0 value.*/ 121086478875SJames Smart }; 121186478875SJames Smart 121286478875SJames Smart #define RDP_LINK_SERVICE_DESC_TAG 0x00000001 121386478875SJames Smart struct fc_rdp_link_service_desc { 121486478875SJames Smart uint32_t tag; /* Descriptor tag 1 */ 121586478875SJames Smart uint32_t length; /* set to size of payload struct. */ 121686478875SJames Smart struct fc_rdp_link_service_info payload; 121786478875SJames Smart /* must be ELS req Word 0(0x18) */ 121886478875SJames Smart }; 121986478875SJames Smart 122086478875SJames Smart struct fc_rdp_sfp_info { 122186478875SJames Smart uint16_t temperature; 122286478875SJames Smart uint16_t vcc; 122386478875SJames Smart uint16_t tx_bias; 122486478875SJames Smart uint16_t tx_power; 122586478875SJames Smart uint16_t rx_power; 122686478875SJames Smart uint16_t flags; 122786478875SJames Smart }; 122886478875SJames Smart 122986478875SJames Smart #define RDP_SFP_DESC_TAG 0x00010000 123086478875SJames Smart struct fc_rdp_sfp_desc { 123186478875SJames Smart uint32_t tag; 123286478875SJames Smart uint32_t length; /* set to size of sfp_info struct */ 123386478875SJames Smart struct fc_rdp_sfp_info sfp_info; 123486478875SJames Smart }; 123586478875SJames Smart 123656204984SJames Smart /* Buffer Credit Descriptor */ 123756204984SJames Smart struct fc_rdp_bbc_info { 123856204984SJames Smart uint32_t port_bbc; /* FC_Port buffer-to-buffer credit */ 123956204984SJames Smart uint32_t attached_port_bbc; 124056204984SJames Smart uint32_t rtt; /* Round trip time */ 124156204984SJames Smart }; 124256204984SJames Smart #define RDP_BBC_DESC_TAG 0x00010006 124356204984SJames Smart struct fc_rdp_bbc_desc { 124456204984SJames Smart uint32_t tag; 124556204984SJames Smart uint32_t length; 124656204984SJames Smart struct fc_rdp_bbc_info bbc_info; 124756204984SJames Smart }; 124856204984SJames Smart 1249310429efSJames Smart /* Optical Element Type Transgression Flags */ 1250310429efSJames Smart #define RDP_OET_LOW_WARNING 0x1 1251310429efSJames Smart #define RDP_OET_HIGH_WARNING 0x2 1252310429efSJames Smart #define RDP_OET_LOW_ALARM 0x4 1253310429efSJames Smart #define RDP_OET_HIGH_ALARM 0x8 1254310429efSJames Smart 125556204984SJames Smart #define RDP_OED_TEMPERATURE 0x1 125656204984SJames Smart #define RDP_OED_VOLTAGE 0x2 125756204984SJames Smart #define RDP_OED_TXBIAS 0x3 125856204984SJames Smart #define RDP_OED_TXPOWER 0x4 125956204984SJames Smart #define RDP_OED_RXPOWER 0x5 126056204984SJames Smart 126156204984SJames Smart #define RDP_OED_TYPE_SHIFT 28 126256204984SJames Smart /* Optical Element Data descriptor */ 126356204984SJames Smart struct fc_rdp_oed_info { 126456204984SJames Smart uint16_t hi_alarm; 126556204984SJames Smart uint16_t lo_alarm; 126656204984SJames Smart uint16_t hi_warning; 126756204984SJames Smart uint16_t lo_warning; 126856204984SJames Smart uint32_t function_flags; 126956204984SJames Smart }; 127056204984SJames Smart #define RDP_OED_DESC_TAG 0x00010007 127156204984SJames Smart struct fc_rdp_oed_sfp_desc { 127256204984SJames Smart uint32_t tag; 127356204984SJames Smart uint32_t length; 127456204984SJames Smart struct fc_rdp_oed_info oed_info; 127556204984SJames Smart }; 127656204984SJames Smart 127756204984SJames Smart /* Optical Product Data descriptor */ 127856204984SJames Smart struct fc_rdp_opd_sfp_info { 127956204984SJames Smart uint8_t vendor_name[16]; 128056204984SJames Smart uint8_t model_number[16]; 128156204984SJames Smart uint8_t serial_number[16]; 1282a0f2d3efSJames Smart uint8_t revision[4]; 128356204984SJames Smart uint8_t date[8]; 128456204984SJames Smart }; 128556204984SJames Smart 128656204984SJames Smart #define RDP_OPD_DESC_TAG 0x00010008 128756204984SJames Smart struct fc_rdp_opd_sfp_desc { 128856204984SJames Smart uint32_t tag; 128956204984SJames Smart uint32_t length; 129056204984SJames Smart struct fc_rdp_opd_sfp_info opd_info; 129156204984SJames Smart }; 129256204984SJames Smart 129386478875SJames Smart struct fc_rdp_req_frame { 129486478875SJames Smart uint32_t rdp_command; /* ELS command opcode (0x18)*/ 129586478875SJames Smart uint32_t rdp_des_length; /* RDP Payload Word 1 */ 129686478875SJames Smart struct fc_rdp_nport_desc nport_id_desc; /* RDP Payload Word 2 - 4 */ 129786478875SJames Smart }; 129886478875SJames Smart 129986478875SJames Smart 130086478875SJames Smart struct fc_rdp_res_frame { 130186478875SJames Smart uint32_t reply_sequence; /* FC word0 LS_ACC or LS_RJT */ 130286478875SJames Smart uint32_t length; /* FC Word 1 */ 130386478875SJames Smart struct fc_rdp_link_service_desc link_service_desc; /* Word 2 -4 */ 130486478875SJames Smart struct fc_rdp_sfp_desc sfp_desc; /* Word 5 -9 */ 130586478875SJames Smart struct fc_rdp_port_speed_desc portspeed_desc; /* Word 10 -12 */ 130686478875SJames Smart struct fc_rdp_link_error_status_desc link_error_desc; /* Word 13 -21 */ 130786478875SJames Smart struct fc_rdp_port_name_desc diag_port_names_desc; /* Word 22 -27 */ 130886478875SJames Smart struct fc_rdp_port_name_desc attached_port_names_desc;/* Word 28 -33 */ 13096c92d1d0SJames Smart struct fc_fec_rdp_desc fec_desc; /* FC word 34-37*/ 13106c92d1d0SJames Smart struct fc_rdp_bbc_desc bbc_desc; /* FC Word 38-42*/ 13116c92d1d0SJames Smart struct fc_rdp_oed_sfp_desc oed_temp_desc; /* FC Word 43-47*/ 13126c92d1d0SJames Smart struct fc_rdp_oed_sfp_desc oed_voltage_desc; /* FC word 48-52*/ 13136c92d1d0SJames Smart struct fc_rdp_oed_sfp_desc oed_txbias_desc; /* FC word 53-57*/ 13146c92d1d0SJames Smart struct fc_rdp_oed_sfp_desc oed_txpower_desc; /* FC word 58-62*/ 13156c92d1d0SJames Smart struct fc_rdp_oed_sfp_desc oed_rxpower_desc; /* FC word 63-67*/ 13166c92d1d0SJames Smart struct fc_rdp_opd_sfp_desc opd_desc; /* FC word 68-84*/ 131786478875SJames Smart }; 131886478875SJames Smart 131986478875SJames Smart 132076b2c34aSJames Smart /******** FDMI ********/ 132176b2c34aSJames Smart 132276b2c34aSJames Smart /* lpfc_sli_ct_request defines the CT_IU preamble for FDMI commands */ 132376b2c34aSJames Smart #define SLI_CT_FDMI_Subtypes 0x10 /* Management Service Subtype */ 1324dea3101eS 132576b2c34aSJames Smart /* Definitions for HBA / Port attribute entries */ 132676b2c34aSJames Smart 132776b2c34aSJames Smart /* Attribute Entry */ 132876b2c34aSJames Smart struct lpfc_fdmi_attr_entry { 1329dea3101eS union { 13304258e98eSJames Smart uint32_t AttrInt; 13314258e98eSJames Smart uint8_t AttrTypes[32]; 13324258e98eSJames Smart uint8_t AttrString[256]; 13334258e98eSJames Smart struct lpfc_name AttrWWN; 1334dea3101eS } un; 133576b2c34aSJames Smart }; 133676b2c34aSJames Smart 13374cb9e1ddSJames Smart struct lpfc_fdmi_attr_def { /* Defined in TLV format */ 13384cb9e1ddSJames Smart /* Structure is in Big Endian format */ 13394cb9e1ddSJames Smart uint32_t AttrType:16; 13404cb9e1ddSJames Smart uint32_t AttrLen:16; 13414cb9e1ddSJames Smart /* Marks start of Value (ATTRIBUTE_ENTRY) */ 13424cb9e1ddSJames Smart struct lpfc_fdmi_attr_entry AttrValue; 13434cb9e1ddSJames Smart } __packed; 1344dea3101eS 1345dea3101eS /* 1346dea3101eS * HBA Attribute Block 1347dea3101eS */ 134876b2c34aSJames Smart struct lpfc_fdmi_attr_block { 1349dea3101eS uint32_t EntryCnt; /* Number of HBA attribute entries */ 135076b2c34aSJames Smart struct lpfc_fdmi_attr_entry Entry; /* Variable-length array */ 135176b2c34aSJames Smart }; 1352dea3101eS 1353dea3101eS /* 1354dea3101eS * Port Entry 1355dea3101eS */ 135676b2c34aSJames Smart struct lpfc_fdmi_port_entry { 1357dea3101eS struct lpfc_name PortName; 135876b2c34aSJames Smart }; 1359dea3101eS 1360dea3101eS /* 1361dea3101eS * HBA Identifier 1362dea3101eS */ 136376b2c34aSJames Smart struct lpfc_fdmi_hba_ident { 1364dea3101eS struct lpfc_name PortName; 136576b2c34aSJames Smart }; 1366dea3101eS 1367dea3101eS /* 13684cb9e1ddSJames Smart * Registered Port List Format 13694cb9e1ddSJames Smart */ 13704cb9e1ddSJames Smart struct lpfc_fdmi_reg_port_list { 13714cb9e1ddSJames Smart uint32_t EntryCnt; 13724cb9e1ddSJames Smart struct lpfc_fdmi_port_entry pe; 13734cb9e1ddSJames Smart } __packed; 13744cb9e1ddSJames Smart 13754cb9e1ddSJames Smart /* 1376dea3101eS * Register HBA(RHBA) 1377dea3101eS */ 137876b2c34aSJames Smart struct lpfc_fdmi_reg_hba { 137976b2c34aSJames Smart struct lpfc_fdmi_hba_ident hi; 13804cb9e1ddSJames Smart struct lpfc_fdmi_reg_port_list rpl; 138176b2c34aSJames Smart }; 1382dea3101eS 1383*b67b5944SJames Smart /******** MI MIB ********/ 1384*b67b5944SJames Smart #define SLI_CT_MIB_Subtypes 0x11 1385*b67b5944SJames Smart 1386dea3101eS /* 1387dea3101eS * Register HBA Attributes (RHAT) 1388dea3101eS */ 138976b2c34aSJames Smart struct lpfc_fdmi_reg_hbaattr { 1390dea3101eS struct lpfc_name HBA_PortName; 139176b2c34aSJames Smart struct lpfc_fdmi_attr_block ab; 139276b2c34aSJames Smart }; 1393dea3101eS 1394dea3101eS /* 1395dea3101eS * Register Port Attributes (RPA) 1396dea3101eS */ 139776b2c34aSJames Smart struct lpfc_fdmi_reg_portattr { 1398dea3101eS struct lpfc_name PortName; 139976b2c34aSJames Smart struct lpfc_fdmi_attr_block ab; 140076b2c34aSJames Smart }; 1401dea3101eS 1402dea3101eS /* 140376b2c34aSJames Smart * HBA MAnagement Operations Command Codes 1404dea3101eS */ 140576b2c34aSJames Smart #define SLI_MGMT_GRHL 0x100 /* Get registered HBA list */ 140676b2c34aSJames Smart #define SLI_MGMT_GHAT 0x101 /* Get HBA attributes */ 140776b2c34aSJames Smart #define SLI_MGMT_GRPL 0x102 /* Get registered Port list */ 140876b2c34aSJames Smart #define SLI_MGMT_GPAT 0x110 /* Get Port attributes */ 140976b2c34aSJames Smart #define SLI_MGMT_GPAS 0x120 /* Get Port Statistics */ 141076b2c34aSJames Smart #define SLI_MGMT_RHBA 0x200 /* Register HBA */ 141176b2c34aSJames Smart #define SLI_MGMT_RHAT 0x201 /* Register HBA attributes */ 141276b2c34aSJames Smart #define SLI_MGMT_RPRT 0x210 /* Register Port */ 141376b2c34aSJames Smart #define SLI_MGMT_RPA 0x211 /* Register Port attributes */ 141476b2c34aSJames Smart #define SLI_MGMT_DHBA 0x300 /* De-register HBA */ 141576b2c34aSJames Smart #define SLI_MGMT_DHAT 0x301 /* De-register HBA attributes */ 141676b2c34aSJames Smart #define SLI_MGMT_DPRT 0x310 /* De-register Port */ 141776b2c34aSJames Smart #define SLI_MGMT_DPA 0x311 /* De-register Port attributes */ 1418dea3101eS 14194258e98eSJames Smart #define LPFC_FDMI_MAX_RETRY 3 /* Max retries for a FDMI command */ 14204258e98eSJames Smart 1421dea3101eS /* 142276b2c34aSJames Smart * HBA Attribute Types 1423dea3101eS */ 142476b2c34aSJames Smart #define RHBA_NODENAME 0x1 /* 8 byte WWNN */ 142576b2c34aSJames Smart #define RHBA_MANUFACTURER 0x2 /* 4 to 64 byte ASCII string */ 142676b2c34aSJames Smart #define RHBA_SERIAL_NUMBER 0x3 /* 4 to 64 byte ASCII string */ 142776b2c34aSJames Smart #define RHBA_MODEL 0x4 /* 4 to 256 byte ASCII string */ 142876b2c34aSJames Smart #define RHBA_MODEL_DESCRIPTION 0x5 /* 4 to 256 byte ASCII string */ 142976b2c34aSJames Smart #define RHBA_HARDWARE_VERSION 0x6 /* 4 to 256 byte ASCII string */ 143076b2c34aSJames Smart #define RHBA_DRIVER_VERSION 0x7 /* 4 to 256 byte ASCII string */ 143176b2c34aSJames Smart #define RHBA_OPTION_ROM_VERSION 0x8 /* 4 to 256 byte ASCII string */ 143276b2c34aSJames Smart #define RHBA_FIRMWARE_VERSION 0x9 /* 4 to 256 byte ASCII string */ 143376b2c34aSJames Smart #define RHBA_OS_NAME_VERSION 0xa /* 4 to 256 byte ASCII string */ 143476b2c34aSJames Smart #define RHBA_MAX_CT_PAYLOAD_LEN 0xb /* 32-bit unsigned int */ 143576b2c34aSJames Smart #define RHBA_SYM_NODENAME 0xc /* 4 to 256 byte ASCII string */ 14364258e98eSJames Smart #define RHBA_VENDOR_INFO 0xd /* 32-bit unsigned int */ 14374258e98eSJames Smart #define RHBA_NUM_PORTS 0xe /* 32-bit unsigned int */ 14384258e98eSJames Smart #define RHBA_FABRIC_WWNN 0xf /* 8 byte WWNN */ 14394258e98eSJames Smart #define RHBA_BIOS_VERSION 0x10 /* 4 to 256 byte ASCII string */ 14404258e98eSJames Smart #define RHBA_BIOS_STATE 0x11 /* 32-bit unsigned int */ 14414258e98eSJames Smart #define RHBA_VENDOR_ID 0xe0 /* 8 byte ASCII string */ 14424258e98eSJames Smart 14434258e98eSJames Smart /* Bit mask for all individual HBA attributes */ 14444258e98eSJames Smart #define LPFC_FDMI_HBA_ATTR_wwnn 0x00000001 14454258e98eSJames Smart #define LPFC_FDMI_HBA_ATTR_manufacturer 0x00000002 14464258e98eSJames Smart #define LPFC_FDMI_HBA_ATTR_sn 0x00000004 14474258e98eSJames Smart #define LPFC_FDMI_HBA_ATTR_model 0x00000008 14484258e98eSJames Smart #define LPFC_FDMI_HBA_ATTR_description 0x00000010 14494258e98eSJames Smart #define LPFC_FDMI_HBA_ATTR_hdw_ver 0x00000020 14504258e98eSJames Smart #define LPFC_FDMI_HBA_ATTR_drvr_ver 0x00000040 14514258e98eSJames Smart #define LPFC_FDMI_HBA_ATTR_rom_ver 0x00000080 14524258e98eSJames Smart #define LPFC_FDMI_HBA_ATTR_fmw_ver 0x00000100 14534258e98eSJames Smart #define LPFC_FDMI_HBA_ATTR_os_ver 0x00000200 14544258e98eSJames Smart #define LPFC_FDMI_HBA_ATTR_ct_len 0x00000400 14554258e98eSJames Smart #define LPFC_FDMI_HBA_ATTR_symbolic_name 0x00000800 14564258e98eSJames Smart #define LPFC_FDMI_HBA_ATTR_vendor_info 0x00001000 /* Not used */ 14574258e98eSJames Smart #define LPFC_FDMI_HBA_ATTR_num_ports 0x00002000 14584258e98eSJames Smart #define LPFC_FDMI_HBA_ATTR_fabric_wwnn 0x00004000 14594258e98eSJames Smart #define LPFC_FDMI_HBA_ATTR_bios_ver 0x00008000 14604258e98eSJames Smart #define LPFC_FDMI_HBA_ATTR_bios_state 0x00010000 /* Not used */ 14614258e98eSJames Smart #define LPFC_FDMI_HBA_ATTR_vendor_id 0x00020000 14624258e98eSJames Smart 14634258e98eSJames Smart /* Bit mask for FDMI-1 defined HBA attributes */ 14644258e98eSJames Smart #define LPFC_FDMI1_HBA_ATTR 0x000007ff 14654258e98eSJames Smart 14664258e98eSJames Smart /* Bit mask for FDMI-2 defined HBA attributes */ 14674258e98eSJames Smart /* Skip vendor_info and bios_state */ 14684258e98eSJames Smart #define LPFC_FDMI2_HBA_ATTR 0x0002efff 1469dea3101eS 1470dea3101eS /* 14718aaa7bcfSJames Smart * Port Attribute Types 1472dea3101eS */ 147376b2c34aSJames Smart #define RPRT_SUPPORTED_FC4_TYPES 0x1 /* 32 byte binary array */ 147476b2c34aSJames Smart #define RPRT_SUPPORTED_SPEED 0x2 /* 32-bit unsigned int */ 147576b2c34aSJames Smart #define RPRT_PORT_SPEED 0x3 /* 32-bit unsigned int */ 147676b2c34aSJames Smart #define RPRT_MAX_FRAME_SIZE 0x4 /* 32-bit unsigned int */ 147776b2c34aSJames Smart #define RPRT_OS_DEVICE_NAME 0x5 /* 4 to 256 byte ASCII string */ 147876b2c34aSJames Smart #define RPRT_HOST_NAME 0x6 /* 4 to 256 byte ASCII string */ 147976b2c34aSJames Smart #define RPRT_NODENAME 0x7 /* 8 byte WWNN */ 14804258e98eSJames Smart #define RPRT_PORTNAME 0x8 /* 8 byte WWPN */ 148176b2c34aSJames Smart #define RPRT_SYM_PORTNAME 0x9 /* 4 to 256 byte ASCII string */ 148276b2c34aSJames Smart #define RPRT_PORT_TYPE 0xa /* 32-bit unsigned int */ 148376b2c34aSJames Smart #define RPRT_SUPPORTED_CLASS 0xb /* 32-bit unsigned int */ 14844258e98eSJames Smart #define RPRT_FABRICNAME 0xc /* 8 byte Fabric WWPN */ 148576b2c34aSJames Smart #define RPRT_ACTIVE_FC4_TYPES 0xd /* 32 byte binary array */ 148676b2c34aSJames Smart #define RPRT_PORT_STATE 0x101 /* 32-bit unsigned int */ 148776b2c34aSJames Smart #define RPRT_DISC_PORT 0x102 /* 32-bit unsigned int */ 148876b2c34aSJames Smart #define RPRT_PORT_ID 0x103 /* 32-bit unsigned int */ 14898aaa7bcfSJames Smart #define RPRT_VENDOR_MI 0xf047 /* vendor ascii string */ 14904258e98eSJames Smart #define RPRT_SMART_SERVICE 0xf100 /* 4 to 256 byte ASCII string */ 14914258e98eSJames Smart #define RPRT_SMART_GUID 0xf101 /* 8 byte WWNN + 8 byte WWPN */ 14924258e98eSJames Smart #define RPRT_SMART_VERSION 0xf102 /* 4 to 256 byte ASCII string */ 14934258e98eSJames Smart #define RPRT_SMART_MODEL 0xf103 /* 4 to 256 byte ASCII string */ 14944258e98eSJames Smart #define RPRT_SMART_PORT_INFO 0xf104 /* 32-bit unsigned int */ 14954258e98eSJames Smart #define RPRT_SMART_QOS 0xf105 /* 32-bit unsigned int */ 14964258e98eSJames Smart #define RPRT_SMART_SECURITY 0xf106 /* 32-bit unsigned int */ 14974258e98eSJames Smart 14984258e98eSJames Smart /* Bit mask for all individual PORT attributes */ 14994258e98eSJames Smart #define LPFC_FDMI_PORT_ATTR_fc4type 0x00000001 15004258e98eSJames Smart #define LPFC_FDMI_PORT_ATTR_support_speed 0x00000002 15014258e98eSJames Smart #define LPFC_FDMI_PORT_ATTR_speed 0x00000004 15024258e98eSJames Smart #define LPFC_FDMI_PORT_ATTR_max_frame 0x00000008 15034258e98eSJames Smart #define LPFC_FDMI_PORT_ATTR_os_devname 0x00000010 15044258e98eSJames Smart #define LPFC_FDMI_PORT_ATTR_host_name 0x00000020 15054258e98eSJames Smart #define LPFC_FDMI_PORT_ATTR_wwnn 0x00000040 15064258e98eSJames Smart #define LPFC_FDMI_PORT_ATTR_wwpn 0x00000080 15074258e98eSJames Smart #define LPFC_FDMI_PORT_ATTR_symbolic_name 0x00000100 15084258e98eSJames Smart #define LPFC_FDMI_PORT_ATTR_port_type 0x00000200 15094258e98eSJames Smart #define LPFC_FDMI_PORT_ATTR_class 0x00000400 15104258e98eSJames Smart #define LPFC_FDMI_PORT_ATTR_fabric_wwpn 0x00000800 15114258e98eSJames Smart #define LPFC_FDMI_PORT_ATTR_port_state 0x00001000 15124258e98eSJames Smart #define LPFC_FDMI_PORT_ATTR_active_fc4type 0x00002000 15134258e98eSJames Smart #define LPFC_FDMI_PORT_ATTR_num_disc 0x00004000 15144258e98eSJames Smart #define LPFC_FDMI_PORT_ATTR_nportid 0x00008000 15154258e98eSJames Smart #define LPFC_FDMI_SMART_ATTR_service 0x00010000 /* Vendor specific */ 15164258e98eSJames Smart #define LPFC_FDMI_SMART_ATTR_guid 0x00020000 /* Vendor specific */ 15174258e98eSJames Smart #define LPFC_FDMI_SMART_ATTR_version 0x00040000 /* Vendor specific */ 15184258e98eSJames Smart #define LPFC_FDMI_SMART_ATTR_model 0x00080000 /* Vendor specific */ 15194258e98eSJames Smart #define LPFC_FDMI_SMART_ATTR_port_info 0x00100000 /* Vendor specific */ 15204258e98eSJames Smart #define LPFC_FDMI_SMART_ATTR_qos 0x00200000 /* Vendor specific */ 15214258e98eSJames Smart #define LPFC_FDMI_SMART_ATTR_security 0x00400000 /* Vendor specific */ 15228aaa7bcfSJames Smart #define LPFC_FDMI_VENDOR_ATTR_mi 0x00800000 /* Vendor specific */ 15234258e98eSJames Smart 15244258e98eSJames Smart /* Bit mask for FDMI-1 defined PORT attributes */ 15254258e98eSJames Smart #define LPFC_FDMI1_PORT_ATTR 0x0000003f 15264258e98eSJames Smart 15274258e98eSJames Smart /* Bit mask for FDMI-2 defined PORT attributes */ 15284258e98eSJames Smart #define LPFC_FDMI2_PORT_ATTR 0x0000ffff 15294258e98eSJames Smart 15304258e98eSJames Smart /* Bit mask for Smart SAN defined PORT attributes */ 15314258e98eSJames Smart #define LPFC_FDMI2_SMART_ATTR 0x007fffff 15324258e98eSJames Smart 15334258e98eSJames Smart /* Defines for PORT port state attribute */ 15344258e98eSJames Smart #define LPFC_FDMI_PORTSTATE_UNKNOWN 1 15354258e98eSJames Smart #define LPFC_FDMI_PORTSTATE_ONLINE 2 15364258e98eSJames Smart 15374258e98eSJames Smart /* Defines for PORT port type attribute */ 15384258e98eSJames Smart #define LPFC_FDMI_PORTTYPE_UNKNOWN 0 15394258e98eSJames Smart #define LPFC_FDMI_PORTTYPE_NPORT 1 15404258e98eSJames Smart #define LPFC_FDMI_PORTTYPE_NLPORT 2 1541dea3101eS 1542dea3101eS /* 1543dea3101eS * Begin HBA configuration parameters. 1544dea3101eS * The PCI configuration register BAR assignments are: 1545dea3101eS * BAR0, offset 0x10 - SLIM base memory address 1546dea3101eS * BAR1, offset 0x14 - SLIM base memory high address 1547dea3101eS * BAR2, offset 0x18 - REGISTER base memory address 1548dea3101eS * BAR3, offset 0x1c - REGISTER base memory high address 1549dea3101eS * BAR4, offset 0x20 - BIU I/O registers 1550dea3101eS * BAR5, offset 0x24 - REGISTER base io high address 1551dea3101eS */ 1552dea3101eS 1553dea3101eS /* Number of rings currently used and available. */ 15542a76a283SJames Smart #define MAX_SLI3_CONFIGURED_RINGS 3 15552a76a283SJames Smart #define MAX_SLI3_RINGS 4 1556dea3101eS 1557dea3101eS /* IOCB / Mailbox is owned by FireFly */ 1558dea3101eS #define OWN_CHIP 1 1559dea3101eS 1560dea3101eS /* IOCB / Mailbox is owned by Host */ 1561dea3101eS #define OWN_HOST 0 1562dea3101eS 1563dea3101eS /* Number of 4-byte words in an IOCB. */ 1564dea3101eS #define IOCB_WORD_SZ 8 1565dea3101eS 1566dea3101eS /* network headers for Dfctl field */ 1567dea3101eS #define FC_NET_HDR 0x20 1568dea3101eS 1569dea3101eS /* Start FireFly Register definitions */ 1570dea3101eS #define PCI_VENDOR_ID_EMULEX 0x10df 1571dea3101eS #define PCI_DEVICE_ID_FIREFLY 0x1ae5 157284774a4dSJames Smart #define PCI_DEVICE_ID_PROTEUS_VF 0xe100 1573085c647cSJames Smart #define PCI_DEVICE_ID_BALIUS 0xe131 157484774a4dSJames Smart #define PCI_DEVICE_ID_PROTEUS_PF 0xe180 1575085c647cSJames Smart #define PCI_DEVICE_ID_LANCER_FC 0xe200 1576c0c11512SJames Smart #define PCI_DEVICE_ID_LANCER_FC_VF 0xe208 1577085c647cSJames Smart #define PCI_DEVICE_ID_LANCER_FCOE 0xe260 1578c0c11512SJames Smart #define PCI_DEVICE_ID_LANCER_FCOE_VF 0xe268 1579d38dd52cSJames Smart #define PCI_DEVICE_ID_LANCER_G6_FC 0xe300 1580c238b9b6SJames Smart #define PCI_DEVICE_ID_LANCER_G7_FC 0xf400 1581b87eab38SJames Smart #define PCI_DEVICE_ID_SAT_SMB 0xf011 1582b87eab38SJames Smart #define PCI_DEVICE_ID_SAT_MID 0xf015 1583dea3101eS #define PCI_DEVICE_ID_RFLY 0xf095 1584dea3101eS #define PCI_DEVICE_ID_PFLY 0xf098 1585e4adb204SJames.Smart@Emulex.Com #define PCI_DEVICE_ID_LP101 0xf0a1 1586dea3101eS #define PCI_DEVICE_ID_TFLY 0xf0a5 1587e4adb204SJames.Smart@Emulex.Com #define PCI_DEVICE_ID_BSMB 0xf0d1 1588e4adb204SJames.Smart@Emulex.Com #define PCI_DEVICE_ID_BMID 0xf0d5 1589e4adb204SJames.Smart@Emulex.Com #define PCI_DEVICE_ID_ZSMB 0xf0e1 1590e4adb204SJames.Smart@Emulex.Com #define PCI_DEVICE_ID_ZMID 0xf0e5 1591e4adb204SJames.Smart@Emulex.Com #define PCI_DEVICE_ID_NEPTUNE 0xf0f5 1592e4adb204SJames.Smart@Emulex.Com #define PCI_DEVICE_ID_NEPTUNE_SCSP 0xf0f6 1593e4adb204SJames.Smart@Emulex.Com #define PCI_DEVICE_ID_NEPTUNE_DCSP 0xf0f7 1594b87eab38SJames Smart #define PCI_DEVICE_ID_SAT 0xf100 1595b87eab38SJames Smart #define PCI_DEVICE_ID_SAT_SCSP 0xf111 1596b87eab38SJames Smart #define PCI_DEVICE_ID_SAT_DCSP 0xf112 1597085c647cSJames Smart #define PCI_DEVICE_ID_FALCON 0xf180 1598e4adb204SJames.Smart@Emulex.Com #define PCI_DEVICE_ID_SUPERFLY 0xf700 1599e4adb204SJames.Smart@Emulex.Com #define PCI_DEVICE_ID_DRAGONFLY 0xf800 1600dea3101eS #define PCI_DEVICE_ID_CENTAUR 0xf900 1601dea3101eS #define PCI_DEVICE_ID_PEGASUS 0xf980 1602dea3101eS #define PCI_DEVICE_ID_THOR 0xfa00 1603dea3101eS #define PCI_DEVICE_ID_VIPER 0xfb00 1604dea3101eS #define PCI_DEVICE_ID_LP10000S 0xfc00 1605e4adb204SJames.Smart@Emulex.Com #define PCI_DEVICE_ID_LP11000S 0xfc10 1606e4adb204SJames.Smart@Emulex.Com #define PCI_DEVICE_ID_LPE11000S 0xfc20 1607b87eab38SJames Smart #define PCI_DEVICE_ID_SAT_S 0xfc40 160884774a4dSJames Smart #define PCI_DEVICE_ID_PROTEUS_S 0xfc50 1609e4adb204SJames.Smart@Emulex.Com #define PCI_DEVICE_ID_HELIOS 0xfd00 1610e4adb204SJames.Smart@Emulex.Com #define PCI_DEVICE_ID_HELIOS_SCSP 0xfd11 1611e4adb204SJames.Smart@Emulex.Com #define PCI_DEVICE_ID_HELIOS_DCSP 0xfd12 1612e4adb204SJames.Smart@Emulex.Com #define PCI_DEVICE_ID_ZEPHYR 0xfe00 161384774a4dSJames Smart #define PCI_DEVICE_ID_HORNET 0xfe05 1614e4adb204SJames.Smart@Emulex.Com #define PCI_DEVICE_ID_ZEPHYR_SCSP 0xfe11 1615e4adb204SJames.Smart@Emulex.Com #define PCI_DEVICE_ID_ZEPHYR_DCSP 0xfe12 1616da0436e9SJames Smart #define PCI_VENDOR_ID_SERVERENGINE 0x19a2 1617da0436e9SJames Smart #define PCI_DEVICE_ID_TIGERSHARK 0x0704 1618a747c9ceSJames Smart #define PCI_DEVICE_ID_TOMCAT 0x0714 1619f8cafd38SJames Smart #define PCI_DEVICE_ID_SKYHAWK 0x0724 1620f8cafd38SJames Smart #define PCI_DEVICE_ID_SKYHAWK_VF 0x072c 1621dea3101eS 1622dea3101eS #define JEDEC_ID_ADDRESS 0x0080001c 1623dea3101eS #define FIREFLY_JEDEC_ID 0x1ACC 1624dea3101eS #define SUPERFLY_JEDEC_ID 0x0020 1625dea3101eS #define DRAGONFLY_JEDEC_ID 0x0021 1626dea3101eS #define DRAGONFLY_V2_JEDEC_ID 0x0025 1627dea3101eS #define CENTAUR_2G_JEDEC_ID 0x0026 1628dea3101eS #define CENTAUR_1G_JEDEC_ID 0x0028 1629dea3101eS #define PEGASUS_ORION_JEDEC_ID 0x0036 1630dea3101eS #define PEGASUS_JEDEC_ID 0x0038 1631dea3101eS #define THOR_JEDEC_ID 0x0012 1632dea3101eS #define HELIOS_JEDEC_ID 0x0364 1633dea3101eS #define ZEPHYR_JEDEC_ID 0x0577 1634dea3101eS #define VIPER_JEDEC_ID 0x4838 1635b87eab38SJames Smart #define SATURN_JEDEC_ID 0x1004 163684774a4dSJames Smart #define HORNET_JDEC_ID 0x2057706D 1637dea3101eS 1638dea3101eS #define JEDEC_ID_MASK 0x0FFFF000 1639dea3101eS #define JEDEC_ID_SHIFT 12 1640dea3101eS #define FC_JEDEC_ID(id) ((id & JEDEC_ID_MASK) >> JEDEC_ID_SHIFT) 1641dea3101eS 1642dea3101eS typedef struct { /* FireFly BIU registers */ 1643dea3101eS uint32_t hostAtt; /* See definitions for Host Attention 1644dea3101eS register */ 1645dea3101eS uint32_t chipAtt; /* See definitions for Chip Attention 1646dea3101eS register */ 1647dea3101eS uint32_t hostStatus; /* See definitions for Host Status register */ 1648dea3101eS uint32_t hostControl; /* See definitions for Host Control register */ 1649dea3101eS uint32_t buiConfig; /* See definitions for BIU configuration 1650dea3101eS register */ 1651dea3101eS } FF_REGS; 1652dea3101eS 1653dea3101eS /* IO Register size in bytes */ 1654dea3101eS #define FF_REG_AREA_SIZE 256 1655dea3101eS 1656dea3101eS /* Host Attention Register */ 1657dea3101eS 1658dea3101eS #define HA_REG_OFFSET 0 /* Byte offset from register base address */ 1659dea3101eS 1660dea3101eS #define HA_R0RE_REQ 0x00000001 /* Bit 0 */ 1661dea3101eS #define HA_R0CE_RSP 0x00000002 /* Bit 1 */ 1662dea3101eS #define HA_R0ATT 0x00000008 /* Bit 3 */ 1663dea3101eS #define HA_R1RE_REQ 0x00000010 /* Bit 4 */ 1664dea3101eS #define HA_R1CE_RSP 0x00000020 /* Bit 5 */ 1665dea3101eS #define HA_R1ATT 0x00000080 /* Bit 7 */ 1666dea3101eS #define HA_R2RE_REQ 0x00000100 /* Bit 8 */ 1667dea3101eS #define HA_R2CE_RSP 0x00000200 /* Bit 9 */ 1668dea3101eS #define HA_R2ATT 0x00000800 /* Bit 11 */ 1669dea3101eS #define HA_R3RE_REQ 0x00001000 /* Bit 12 */ 1670dea3101eS #define HA_R3CE_RSP 0x00002000 /* Bit 13 */ 1671dea3101eS #define HA_R3ATT 0x00008000 /* Bit 15 */ 1672dea3101eS #define HA_LATT 0x20000000 /* Bit 29 */ 1673dea3101eS #define HA_MBATT 0x40000000 /* Bit 30 */ 1674dea3101eS #define HA_ERATT 0x80000000 /* Bit 31 */ 1675dea3101eS 1676dea3101eS #define HA_RXRE_REQ 0x00000001 /* Bit 0 */ 1677dea3101eS #define HA_RXCE_RSP 0x00000002 /* Bit 1 */ 1678dea3101eS #define HA_RXATT 0x00000008 /* Bit 3 */ 1679dea3101eS #define HA_RXMASK 0x0000000f 1680dea3101eS 16819399627fSJames Smart #define HA_R0_CLR_MSK (HA_R0RE_REQ | HA_R0CE_RSP | HA_R0ATT) 16829399627fSJames Smart #define HA_R1_CLR_MSK (HA_R1RE_REQ | HA_R1CE_RSP | HA_R1ATT) 16839399627fSJames Smart #define HA_R2_CLR_MSK (HA_R2RE_REQ | HA_R2CE_RSP | HA_R2ATT) 16849399627fSJames Smart #define HA_R3_CLR_MSK (HA_R3RE_REQ | HA_R3CE_RSP | HA_R3ATT) 16859399627fSJames Smart 16869399627fSJames Smart #define HA_R0_POS 3 16879399627fSJames Smart #define HA_R1_POS 7 16889399627fSJames Smart #define HA_R2_POS 11 16899399627fSJames Smart #define HA_R3_POS 15 16909399627fSJames Smart #define HA_LE_POS 29 16919399627fSJames Smart #define HA_MB_POS 30 16929399627fSJames Smart #define HA_ER_POS 31 1693dea3101eS /* Chip Attention Register */ 1694dea3101eS 1695dea3101eS #define CA_REG_OFFSET 4 /* Byte offset from register base address */ 1696dea3101eS 1697dea3101eS #define CA_R0CE_REQ 0x00000001 /* Bit 0 */ 1698dea3101eS #define CA_R0RE_RSP 0x00000002 /* Bit 1 */ 1699dea3101eS #define CA_R0ATT 0x00000008 /* Bit 3 */ 1700dea3101eS #define CA_R1CE_REQ 0x00000010 /* Bit 4 */ 1701dea3101eS #define CA_R1RE_RSP 0x00000020 /* Bit 5 */ 1702dea3101eS #define CA_R1ATT 0x00000080 /* Bit 7 */ 1703dea3101eS #define CA_R2CE_REQ 0x00000100 /* Bit 8 */ 1704dea3101eS #define CA_R2RE_RSP 0x00000200 /* Bit 9 */ 1705dea3101eS #define CA_R2ATT 0x00000800 /* Bit 11 */ 1706dea3101eS #define CA_R3CE_REQ 0x00001000 /* Bit 12 */ 1707dea3101eS #define CA_R3RE_RSP 0x00002000 /* Bit 13 */ 1708dea3101eS #define CA_R3ATT 0x00008000 /* Bit 15 */ 1709dea3101eS #define CA_MBATT 0x40000000 /* Bit 30 */ 1710dea3101eS 1711dea3101eS /* Host Status Register */ 1712dea3101eS 1713dea3101eS #define HS_REG_OFFSET 8 /* Byte offset from register base address */ 1714dea3101eS 1715dea3101eS #define HS_MBRDY 0x00400000 /* Bit 22 */ 1716dea3101eS #define HS_FFRDY 0x00800000 /* Bit 23 */ 1717dea3101eS #define HS_FFER8 0x01000000 /* Bit 24 */ 1718dea3101eS #define HS_FFER7 0x02000000 /* Bit 25 */ 1719dea3101eS #define HS_FFER6 0x04000000 /* Bit 26 */ 1720dea3101eS #define HS_FFER5 0x08000000 /* Bit 27 */ 1721dea3101eS #define HS_FFER4 0x10000000 /* Bit 28 */ 1722dea3101eS #define HS_FFER3 0x20000000 /* Bit 29 */ 1723dea3101eS #define HS_FFER2 0x40000000 /* Bit 30 */ 1724dea3101eS #define HS_FFER1 0x80000000 /* Bit 31 */ 172557127f15SJames Smart #define HS_CRIT_TEMP 0x00000100 /* Bit 8 */ 172657127f15SJames Smart #define HS_FFERM 0xFF000100 /* Mask for error bits 31:24 and 8 */ 17279940b97bSJames Smart #define UNPLUG_ERR 0x00000001 /* Indicate pci hot unplug */ 1728dea3101eS /* Host Control Register */ 1729dea3101eS 17309399627fSJames Smart #define HC_REG_OFFSET 12 /* Byte offset from register base address */ 1731dea3101eS 1732dea3101eS #define HC_MBINT_ENA 0x00000001 /* Bit 0 */ 1733dea3101eS #define HC_R0INT_ENA 0x00000002 /* Bit 1 */ 1734dea3101eS #define HC_R1INT_ENA 0x00000004 /* Bit 2 */ 1735dea3101eS #define HC_R2INT_ENA 0x00000008 /* Bit 3 */ 1736dea3101eS #define HC_R3INT_ENA 0x00000010 /* Bit 4 */ 1737dea3101eS #define HC_INITHBI 0x02000000 /* Bit 25 */ 1738dea3101eS #define HC_INITMB 0x04000000 /* Bit 26 */ 1739dea3101eS #define HC_INITFF 0x08000000 /* Bit 27 */ 1740dea3101eS #define HC_LAINT_ENA 0x20000000 /* Bit 29 */ 1741dea3101eS #define HC_ERINT_ENA 0x80000000 /* Bit 31 */ 1742dea3101eS 17439399627fSJames Smart /* Message Signaled Interrupt eXtension (MSI-X) message identifiers */ 17449399627fSJames Smart #define MSIX_DFLT_ID 0 17459399627fSJames Smart #define MSIX_RNG0_ID 0 17469399627fSJames Smart #define MSIX_RNG1_ID 1 17479399627fSJames Smart #define MSIX_RNG2_ID 2 17489399627fSJames Smart #define MSIX_RNG3_ID 3 17499399627fSJames Smart 17509399627fSJames Smart #define MSIX_LINK_ID 4 17519399627fSJames Smart #define MSIX_MBOX_ID 5 17529399627fSJames Smart 17539399627fSJames Smart #define MSIX_SPARE0_ID 6 17549399627fSJames Smart #define MSIX_SPARE1_ID 7 17559399627fSJames Smart 1756dea3101eS /* Mailbox Commands */ 1757dea3101eS #define MBX_SHUTDOWN 0x00 /* terminate testing */ 1758dea3101eS #define MBX_LOAD_SM 0x01 1759dea3101eS #define MBX_READ_NV 0x02 1760dea3101eS #define MBX_WRITE_NV 0x03 1761dea3101eS #define MBX_RUN_BIU_DIAG 0x04 1762dea3101eS #define MBX_INIT_LINK 0x05 1763dea3101eS #define MBX_DOWN_LINK 0x06 1764dea3101eS #define MBX_CONFIG_LINK 0x07 1765dea3101eS #define MBX_CONFIG_RING 0x09 1766dea3101eS #define MBX_RESET_RING 0x0A 1767dea3101eS #define MBX_READ_CONFIG 0x0B 1768dea3101eS #define MBX_READ_RCONFIG 0x0C 1769dea3101eS #define MBX_READ_SPARM 0x0D 1770dea3101eS #define MBX_READ_STATUS 0x0E 1771dea3101eS #define MBX_READ_RPI 0x0F 1772dea3101eS #define MBX_READ_XRI 0x10 1773dea3101eS #define MBX_READ_REV 0x11 1774dea3101eS #define MBX_READ_LNK_STAT 0x12 1775dea3101eS #define MBX_REG_LOGIN 0x13 1776dea3101eS #define MBX_UNREG_LOGIN 0x14 1777dea3101eS #define MBX_CLEAR_LA 0x16 1778dea3101eS #define MBX_DUMP_MEMORY 0x17 1779dea3101eS #define MBX_DUMP_CONTEXT 0x18 1780dea3101eS #define MBX_RUN_DIAGS 0x19 1781dea3101eS #define MBX_RESTART 0x1A 1782dea3101eS #define MBX_UPDATE_CFG 0x1B 1783dea3101eS #define MBX_DOWN_LOAD 0x1C 1784dea3101eS #define MBX_DEL_LD_ENTRY 0x1D 1785dea3101eS #define MBX_RUN_PROGRAM 0x1E 1786dea3101eS #define MBX_SET_MASK 0x20 178709372820SJames Smart #define MBX_SET_VARIABLE 0x21 1788dea3101eS #define MBX_UNREG_D_ID 0x23 178941415862SJamie Wellnitz #define MBX_KILL_BOARD 0x24 1790dea3101eS #define MBX_CONFIG_FARP 0x25 179141415862SJamie Wellnitz #define MBX_BEACON 0x2A 17929399627fSJames Smart #define MBX_CONFIG_MSI 0x30 1793858c9f6cSJames Smart #define MBX_HEARTBEAT 0x31 1794a8adb832SJames Smart #define MBX_WRITE_VPARMS 0x32 1795a8adb832SJames Smart #define MBX_ASYNCEVT_ENABLE 0x33 17964fede78fSJames Smart #define MBX_READ_EVENT_LOG_STATUS 0x37 17974fede78fSJames Smart #define MBX_READ_EVENT_LOG 0x38 17984fede78fSJames Smart #define MBX_WRITE_EVENT_LOG 0x39 1799dea3101eS 180084774a4dSJames Smart #define MBX_PORT_CAPABILITIES 0x3B 180184774a4dSJames Smart #define MBX_PORT_IOV_CONTROL 0x3C 180284774a4dSJames Smart 1803ed957684SJames Smart #define MBX_CONFIG_HBQ 0x7C 1804dea3101eS #define MBX_LOAD_AREA 0x81 1805dea3101eS #define MBX_RUN_BIU_DIAG64 0x84 1806dea3101eS #define MBX_CONFIG_PORT 0x88 1807dea3101eS #define MBX_READ_SPARM64 0x8D 1808dea3101eS #define MBX_READ_RPI64 0x8F 1809dea3101eS #define MBX_REG_LOGIN64 0x93 181076a95d75SJames Smart #define MBX_READ_TOPOLOGY 0x95 181192d7f7b0SJames Smart #define MBX_REG_VPI 0x96 181292d7f7b0SJames Smart #define MBX_UNREG_VPI 0x97 1813dea3101eS 181409372820SJames Smart #define MBX_WRITE_WWN 0x98 1815dea3101eS #define MBX_SET_DEBUG 0x99 1816dea3101eS #define MBX_LOAD_EXP_ROM 0x9C 1817da0436e9SJames Smart #define MBX_SLI4_CONFIG 0x9B 1818da0436e9SJames Smart #define MBX_SLI4_REQ_FTRS 0x9D 1819da0436e9SJames Smart #define MBX_MAX_CMDS 0x9E 1820da0436e9SJames Smart #define MBX_RESUME_RPI 0x9E 1821dea3101eS #define MBX_SLI2_CMD_MASK 0x80 1822da0436e9SJames Smart #define MBX_REG_VFI 0x9F 1823da0436e9SJames Smart #define MBX_REG_FCFI 0xA0 1824da0436e9SJames Smart #define MBX_UNREG_VFI 0xA1 1825da0436e9SJames Smart #define MBX_UNREG_FCFI 0xA2 1826da0436e9SJames Smart #define MBX_INIT_VFI 0xA3 1827da0436e9SJames Smart #define MBX_INIT_VPI 0xA4 1828940eb687SJames Smart #define MBX_ACCESS_VDATA 0xA5 1829895427bdSJames Smart #define MBX_REG_FCFI_MRQ 0xAF 1830dea3101eS 1831dcf2a4e0SJames Smart #define MBX_AUTH_PORT 0xF8 1832dcf2a4e0SJames Smart #define MBX_SECURITY_MGMT 0xF9 1833dcf2a4e0SJames Smart 1834dea3101eS /* IOCB Commands */ 1835dea3101eS 1836dea3101eS #define CMD_RCV_SEQUENCE_CX 0x01 1837dea3101eS #define CMD_XMIT_SEQUENCE_CR 0x02 1838dea3101eS #define CMD_XMIT_SEQUENCE_CX 0x03 1839dea3101eS #define CMD_XMIT_BCAST_CN 0x04 1840dea3101eS #define CMD_XMIT_BCAST_CX 0x05 1841dea3101eS #define CMD_QUE_RING_BUF_CN 0x06 1842dea3101eS #define CMD_QUE_XRI_BUF_CX 0x07 1843dea3101eS #define CMD_IOCB_CONTINUE_CN 0x08 1844dea3101eS #define CMD_RET_XRI_BUF_CX 0x09 1845dea3101eS #define CMD_ELS_REQUEST_CR 0x0A 1846dea3101eS #define CMD_ELS_REQUEST_CX 0x0B 1847dea3101eS #define CMD_RCV_ELS_REQ_CX 0x0D 1848dea3101eS #define CMD_ABORT_XRI_CN 0x0E 1849dea3101eS #define CMD_ABORT_XRI_CX 0x0F 1850dea3101eS #define CMD_CLOSE_XRI_CN 0x10 1851dea3101eS #define CMD_CLOSE_XRI_CX 0x11 1852dea3101eS #define CMD_CREATE_XRI_CR 0x12 1853dea3101eS #define CMD_CREATE_XRI_CX 0x13 1854dea3101eS #define CMD_GET_RPI_CN 0x14 1855dea3101eS #define CMD_XMIT_ELS_RSP_CX 0x15 1856dea3101eS #define CMD_GET_RPI_CR 0x16 1857dea3101eS #define CMD_XRI_ABORTED_CX 0x17 1858dea3101eS #define CMD_FCP_IWRITE_CR 0x18 1859dea3101eS #define CMD_FCP_IWRITE_CX 0x19 1860dea3101eS #define CMD_FCP_IREAD_CR 0x1A 1861dea3101eS #define CMD_FCP_IREAD_CX 0x1B 1862dea3101eS #define CMD_FCP_ICMND_CR 0x1C 1863dea3101eS #define CMD_FCP_ICMND_CX 0x1D 1864f5603511SJames Smart #define CMD_FCP_TSEND_CX 0x1F 1865f5603511SJames Smart #define CMD_FCP_TRECEIVE_CX 0x21 1866f5603511SJames Smart #define CMD_FCP_TRSP_CX 0x23 1867f5603511SJames Smart #define CMD_FCP_AUTO_TRSP_CX 0x29 1868dea3101eS 1869dea3101eS #define CMD_ADAPTER_MSG 0x20 1870dea3101eS #define CMD_ADAPTER_DUMP 0x22 1871dea3101eS 1872dea3101eS /* SLI_2 IOCB Command Set */ 1873dea3101eS 187457127f15SJames Smart #define CMD_ASYNC_STATUS 0x7C 1875dea3101eS #define CMD_RCV_SEQUENCE64_CX 0x81 1876dea3101eS #define CMD_XMIT_SEQUENCE64_CR 0x82 1877dea3101eS #define CMD_XMIT_SEQUENCE64_CX 0x83 1878dea3101eS #define CMD_XMIT_BCAST64_CN 0x84 1879dea3101eS #define CMD_XMIT_BCAST64_CX 0x85 1880dea3101eS #define CMD_QUE_RING_BUF64_CN 0x86 1881dea3101eS #define CMD_QUE_XRI_BUF64_CX 0x87 1882dea3101eS #define CMD_IOCB_CONTINUE64_CN 0x88 1883dea3101eS #define CMD_RET_XRI_BUF64_CX 0x89 1884dea3101eS #define CMD_ELS_REQUEST64_CR 0x8A 1885dea3101eS #define CMD_ELS_REQUEST64_CX 0x8B 1886dea3101eS #define CMD_ABORT_MXRI64_CN 0x8C 1887dea3101eS #define CMD_RCV_ELS_REQ64_CX 0x8D 1888dea3101eS #define CMD_XMIT_ELS_RSP64_CX 0x95 18896669f9bbSJames Smart #define CMD_XMIT_BLS_RSP64_CX 0x97 1890dea3101eS #define CMD_FCP_IWRITE64_CR 0x98 1891dea3101eS #define CMD_FCP_IWRITE64_CX 0x99 1892dea3101eS #define CMD_FCP_IREAD64_CR 0x9A 1893dea3101eS #define CMD_FCP_IREAD64_CX 0x9B 1894dea3101eS #define CMD_FCP_ICMND64_CR 0x9C 1895dea3101eS #define CMD_FCP_ICMND64_CX 0x9D 1896f5603511SJames Smart #define CMD_FCP_TSEND64_CX 0x9F 1897f5603511SJames Smart #define CMD_FCP_TRECEIVE64_CX 0xA1 1898f5603511SJames Smart #define CMD_FCP_TRSP64_CX 0xA3 1899dea3101eS 190076bb24efSJames Smart #define CMD_QUE_XRI64_CX 0xB3 1901ed957684SJames Smart #define CMD_IOCB_RCV_SEQ64_CX 0xB5 1902ed957684SJames Smart #define CMD_IOCB_RCV_ELS64_CX 0xB7 19033163f725SJames Smart #define CMD_IOCB_RET_XRI64_CX 0xB9 1904ed957684SJames Smart #define CMD_IOCB_RCV_CONT64_CX 0xBB 1905ed957684SJames Smart 1906dea3101eS #define CMD_GEN_REQUEST64_CR 0xC2 1907dea3101eS #define CMD_GEN_REQUEST64_CX 0xC3 1908dea3101eS 19093163f725SJames Smart /* Unhandled SLI-3 Commands */ 19103163f725SJames Smart #define CMD_IOCB_XMIT_MSEQ64_CR 0xB0 19113163f725SJames Smart #define CMD_IOCB_XMIT_MSEQ64_CX 0xB1 19123163f725SJames Smart #define CMD_IOCB_RCV_SEQ_LIST64_CX 0xC1 19133163f725SJames Smart #define CMD_IOCB_RCV_ELS_LIST64_CX 0xCD 19143163f725SJames Smart #define CMD_IOCB_CLOSE_EXTENDED_CN 0xB6 19153163f725SJames Smart #define CMD_IOCB_ABORT_EXTENDED_CN 0xBA 19163163f725SJames Smart #define CMD_IOCB_RET_HBQE64_CN 0xCA 19173163f725SJames Smart #define CMD_IOCB_FCP_IBIDIR64_CR 0xAC 19183163f725SJames Smart #define CMD_IOCB_FCP_IBIDIR64_CX 0xAD 19193163f725SJames Smart #define CMD_IOCB_FCP_ITASKMGT64_CX 0xAF 19203163f725SJames Smart #define CMD_IOCB_LOGENTRY_CN 0x94 19213163f725SJames Smart #define CMD_IOCB_LOGENTRY_ASYNC_CN 0x96 19223163f725SJames Smart 1923341af102SJames Smart /* Data Security SLI Commands */ 1924341af102SJames Smart #define DSSCMD_IWRITE64_CR 0xF8 1925341af102SJames Smart #define DSSCMD_IWRITE64_CX 0xF9 1926341af102SJames Smart #define DSSCMD_IREAD64_CR 0xFA 1927341af102SJames Smart #define DSSCMD_IREAD64_CX 0xFB 1928da0436e9SJames Smart 1929341af102SJames Smart #define CMD_MAX_IOCB_CMD 0xFB 1930dea3101eS #define CMD_IOCB_MASK 0xff 1931dea3101eS 1932dea3101eS #define MAX_MSG_DATA 28 /* max msg data in CMD_ADAPTER_MSG 1933dea3101eS iocb */ 1934dea3101eS #define LPFC_MAX_ADPTMSG 32 /* max msg data */ 1935dea3101eS /* 1936dea3101eS * Define Status 1937dea3101eS */ 1938dea3101eS #define MBX_SUCCESS 0 1939dea3101eS #define MBXERR_NUM_RINGS 1 1940dea3101eS #define MBXERR_NUM_IOCBS 2 1941dea3101eS #define MBXERR_IOCBS_EXCEEDED 3 1942dea3101eS #define MBXERR_BAD_RING_NUMBER 4 1943dea3101eS #define MBXERR_MASK_ENTRIES_RANGE 5 1944dea3101eS #define MBXERR_MASKS_EXCEEDED 6 1945dea3101eS #define MBXERR_BAD_PROFILE 7 1946dea3101eS #define MBXERR_BAD_DEF_CLASS 8 1947dea3101eS #define MBXERR_BAD_MAX_RESPONDER 9 1948dea3101eS #define MBXERR_BAD_MAX_ORIGINATOR 10 1949dea3101eS #define MBXERR_RPI_REGISTERED 11 1950dea3101eS #define MBXERR_RPI_FULL 12 1951dea3101eS #define MBXERR_NO_RESOURCES 13 1952dea3101eS #define MBXERR_BAD_RCV_LENGTH 14 1953dea3101eS #define MBXERR_DMA_ERROR 15 1954dea3101eS #define MBXERR_ERROR 16 1955da0436e9SJames Smart #define MBXERR_LINK_DOWN 0x33 1956dcf2a4e0SJames Smart #define MBXERR_SEC_NO_PERMISSION 0xF02 1957dea3101eS #define MBX_NOT_FINISHED 255 1958dea3101eS 1959dea3101eS #define MBX_BUSY 0xffffff /* Attempted cmd to busy Mailbox */ 1960dea3101eS #define MBX_TIMEOUT 0xfffffe /* time-out expired waiting for */ 1961dea3101eS 196257127f15SJames Smart #define TEMPERATURE_OFFSET 0xB0 /* Slim offset for critical temperature event */ 196357127f15SJames Smart 1964dea3101eS /* 196586478875SJames Smart * return code Fail 196686478875SJames Smart */ 196786478875SJames Smart #define FAILURE 1 196886478875SJames Smart 196986478875SJames Smart /* 1970dea3101eS * Begin Structure Definitions for Mailbox Commands 1971dea3101eS */ 1972dea3101eS 1973dea3101eS typedef struct { 1974dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 1975dea3101eS uint8_t tval; 1976dea3101eS uint8_t tmask; 1977dea3101eS uint8_t rval; 1978dea3101eS uint8_t rmask; 1979dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 1980dea3101eS uint8_t rmask; 1981dea3101eS uint8_t rval; 1982dea3101eS uint8_t tmask; 1983dea3101eS uint8_t tval; 1984dea3101eS #endif 1985dea3101eS } RR_REG; 1986dea3101eS 1987dea3101eS struct ulp_bde { 1988dea3101eS uint32_t bdeAddress; 1989dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 1990dea3101eS uint32_t bdeReserved:4; 1991dea3101eS uint32_t bdeAddrHigh:4; 1992dea3101eS uint32_t bdeSize:24; 1993dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 1994dea3101eS uint32_t bdeSize:24; 1995dea3101eS uint32_t bdeAddrHigh:4; 1996dea3101eS uint32_t bdeReserved:4; 1997dea3101eS #endif 1998dea3101eS }; 1999dea3101eS 2000dea3101eS typedef struct ULP_BDL { /* SLI-2 */ 2001dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 2002dea3101eS uint32_t bdeFlags:8; /* BDL Flags */ 2003dea3101eS uint32_t bdeSize:24; /* Size of BDL array in host memory (bytes) */ 2004dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 2005dea3101eS uint32_t bdeSize:24; /* Size of BDL array in host memory (bytes) */ 2006dea3101eS uint32_t bdeFlags:8; /* BDL Flags */ 2007dea3101eS #endif 2008dea3101eS 2009dea3101eS uint32_t addrLow; /* Address 0:31 */ 2010dea3101eS uint32_t addrHigh; /* Address 32:63 */ 2011dea3101eS uint32_t ulpIoTag32; /* Can be used for 32 bit I/O Tag */ 2012dea3101eS } ULP_BDL; 2013dea3101eS 201481301a9bSJames Smart /* 201581301a9bSJames Smart * BlockGuard Definitions 201681301a9bSJames Smart */ 201781301a9bSJames Smart 201881301a9bSJames Smart enum lpfc_protgrp_type { 201981301a9bSJames Smart LPFC_PG_TYPE_INVALID = 0, /* used to indicate errors */ 202081301a9bSJames Smart LPFC_PG_TYPE_NO_DIF, /* no DIF data pointed to by prot grp */ 202181301a9bSJames Smart LPFC_PG_TYPE_EMBD_DIF, /* DIF is embedded (inline) with data */ 202281301a9bSJames Smart LPFC_PG_TYPE_DIF_BUF /* DIF has its own scatter/gather list */ 202381301a9bSJames Smart }; 202481301a9bSJames Smart 202581301a9bSJames Smart /* PDE Descriptors */ 20266c8eea54SJames Smart #define LPFC_PDE5_DESCRIPTOR 0x85 20276c8eea54SJames Smart #define LPFC_PDE6_DESCRIPTOR 0x86 20286c8eea54SJames Smart #define LPFC_PDE7_DESCRIPTOR 0x87 202981301a9bSJames Smart 20306c8eea54SJames Smart /* BlockGuard Opcodes */ 20316c8eea54SJames Smart #define BG_OP_IN_NODIF_OUT_CRC 0x0 20326c8eea54SJames Smart #define BG_OP_IN_CRC_OUT_NODIF 0x1 20336c8eea54SJames Smart #define BG_OP_IN_NODIF_OUT_CSUM 0x2 20346c8eea54SJames Smart #define BG_OP_IN_CSUM_OUT_NODIF 0x3 20356c8eea54SJames Smart #define BG_OP_IN_CRC_OUT_CRC 0x4 20366c8eea54SJames Smart #define BG_OP_IN_CSUM_OUT_CSUM 0x5 20376c8eea54SJames Smart #define BG_OP_IN_CRC_OUT_CSUM 0x6 20386c8eea54SJames Smart #define BG_OP_IN_CSUM_OUT_CRC 0x7 2039a6887e28SJames Smart #define BG_OP_RAW_MODE 0x8 20406c8eea54SJames Smart 20416c8eea54SJames Smart struct lpfc_pde5 { 20426c8eea54SJames Smart uint32_t word0; 20436c8eea54SJames Smart #define pde5_type_SHIFT 24 20446c8eea54SJames Smart #define pde5_type_MASK 0x000000ff 20456c8eea54SJames Smart #define pde5_type_WORD word0 20466c8eea54SJames Smart #define pde5_rsvd0_SHIFT 0 20476c8eea54SJames Smart #define pde5_rsvd0_MASK 0x00ffffff 20486c8eea54SJames Smart #define pde5_rsvd0_WORD word0 20496c8eea54SJames Smart uint32_t reftag; /* Reference Tag Value */ 20506c8eea54SJames Smart uint32_t reftagtr; /* Reference Tag Translation Value */ 205181301a9bSJames Smart }; 205281301a9bSJames Smart 20536c8eea54SJames Smart struct lpfc_pde6 { 20546c8eea54SJames Smart uint32_t word0; 20556c8eea54SJames Smart #define pde6_type_SHIFT 24 20566c8eea54SJames Smart #define pde6_type_MASK 0x000000ff 20576c8eea54SJames Smart #define pde6_type_WORD word0 20586c8eea54SJames Smart #define pde6_rsvd0_SHIFT 0 20596c8eea54SJames Smart #define pde6_rsvd0_MASK 0x00ffffff 20606c8eea54SJames Smart #define pde6_rsvd0_WORD word0 20616c8eea54SJames Smart uint32_t word1; 20626c8eea54SJames Smart #define pde6_rsvd1_SHIFT 26 20636c8eea54SJames Smart #define pde6_rsvd1_MASK 0x0000003f 20646c8eea54SJames Smart #define pde6_rsvd1_WORD word1 20656c8eea54SJames Smart #define pde6_na_SHIFT 25 20666c8eea54SJames Smart #define pde6_na_MASK 0x00000001 20676c8eea54SJames Smart #define pde6_na_WORD word1 20686c8eea54SJames Smart #define pde6_rsvd2_SHIFT 16 20696c8eea54SJames Smart #define pde6_rsvd2_MASK 0x000001FF 20706c8eea54SJames Smart #define pde6_rsvd2_WORD word1 20716c8eea54SJames Smart #define pde6_apptagtr_SHIFT 0 20726c8eea54SJames Smart #define pde6_apptagtr_MASK 0x0000ffff 20736c8eea54SJames Smart #define pde6_apptagtr_WORD word1 20746c8eea54SJames Smart uint32_t word2; 20756c8eea54SJames Smart #define pde6_optx_SHIFT 28 20766c8eea54SJames Smart #define pde6_optx_MASK 0x0000000f 20776c8eea54SJames Smart #define pde6_optx_WORD word2 20786c8eea54SJames Smart #define pde6_oprx_SHIFT 24 20796c8eea54SJames Smart #define pde6_oprx_MASK 0x0000000f 20806c8eea54SJames Smart #define pde6_oprx_WORD word2 20816c8eea54SJames Smart #define pde6_nr_SHIFT 23 20826c8eea54SJames Smart #define pde6_nr_MASK 0x00000001 20836c8eea54SJames Smart #define pde6_nr_WORD word2 20846c8eea54SJames Smart #define pde6_ce_SHIFT 22 20856c8eea54SJames Smart #define pde6_ce_MASK 0x00000001 20866c8eea54SJames Smart #define pde6_ce_WORD word2 20876c8eea54SJames Smart #define pde6_re_SHIFT 21 20886c8eea54SJames Smart #define pde6_re_MASK 0x00000001 20896c8eea54SJames Smart #define pde6_re_WORD word2 20906c8eea54SJames Smart #define pde6_ae_SHIFT 20 20916c8eea54SJames Smart #define pde6_ae_MASK 0x00000001 20926c8eea54SJames Smart #define pde6_ae_WORD word2 20936c8eea54SJames Smart #define pde6_ai_SHIFT 19 20946c8eea54SJames Smart #define pde6_ai_MASK 0x00000001 20956c8eea54SJames Smart #define pde6_ai_WORD word2 20966c8eea54SJames Smart #define pde6_bs_SHIFT 16 20976c8eea54SJames Smart #define pde6_bs_MASK 0x00000007 20986c8eea54SJames Smart #define pde6_bs_WORD word2 20996c8eea54SJames Smart #define pde6_apptagval_SHIFT 0 21006c8eea54SJames Smart #define pde6_apptagval_MASK 0x0000ffff 21016c8eea54SJames Smart #define pde6_apptagval_WORD word2 210281301a9bSJames Smart }; 210381301a9bSJames Smart 21047f86059aSJames Smart struct lpfc_pde7 { 21057f86059aSJames Smart uint32_t word0; 21067f86059aSJames Smart #define pde7_type_SHIFT 24 21077f86059aSJames Smart #define pde7_type_MASK 0x000000ff 21087f86059aSJames Smart #define pde7_type_WORD word0 21097f86059aSJames Smart #define pde7_rsvd0_SHIFT 0 21107f86059aSJames Smart #define pde7_rsvd0_MASK 0x00ffffff 21117f86059aSJames Smart #define pde7_rsvd0_WORD word0 21127f86059aSJames Smart uint32_t addrHigh; 21137f86059aSJames Smart uint32_t addrLow; 21147f86059aSJames Smart }; 211581301a9bSJames Smart 2116dea3101eS /* Structure for MB Command LOAD_SM and DOWN_LOAD */ 2117dea3101eS 2118dea3101eS typedef struct { 2119dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 2120dea3101eS uint32_t rsvd2:25; 2121dea3101eS uint32_t acknowledgment:1; 2122dea3101eS uint32_t version:1; 2123dea3101eS uint32_t erase_or_prog:1; 2124dea3101eS uint32_t update_flash:1; 2125dea3101eS uint32_t update_ram:1; 2126dea3101eS uint32_t method:1; 2127dea3101eS uint32_t load_cmplt:1; 2128dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 2129dea3101eS uint32_t load_cmplt:1; 2130dea3101eS uint32_t method:1; 2131dea3101eS uint32_t update_ram:1; 2132dea3101eS uint32_t update_flash:1; 2133dea3101eS uint32_t erase_or_prog:1; 2134dea3101eS uint32_t version:1; 2135dea3101eS uint32_t acknowledgment:1; 2136dea3101eS uint32_t rsvd2:25; 2137dea3101eS #endif 2138dea3101eS 2139dea3101eS uint32_t dl_to_adr_low; 2140dea3101eS uint32_t dl_to_adr_high; 2141dea3101eS uint32_t dl_len; 2142dea3101eS union { 2143dea3101eS uint32_t dl_from_mbx_offset; 2144dea3101eS struct ulp_bde dl_from_bde; 2145dea3101eS struct ulp_bde64 dl_from_bde64; 2146dea3101eS } un; 2147dea3101eS 2148dea3101eS } LOAD_SM_VAR; 2149dea3101eS 2150dea3101eS /* Structure for MB Command READ_NVPARM (02) */ 2151dea3101eS 2152dea3101eS typedef struct { 2153dea3101eS uint32_t rsvd1[3]; /* Read as all one's */ 2154dea3101eS uint32_t rsvd2; /* Read as all zero's */ 2155dea3101eS uint32_t portname[2]; /* N_PORT name */ 2156dea3101eS uint32_t nodename[2]; /* NODE name */ 2157dea3101eS 2158dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 2159dea3101eS uint32_t pref_DID:24; 2160dea3101eS uint32_t hardAL_PA:8; 2161dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 2162dea3101eS uint32_t hardAL_PA:8; 2163dea3101eS uint32_t pref_DID:24; 2164dea3101eS #endif 2165dea3101eS 2166dea3101eS uint32_t rsvd3[21]; /* Read as all one's */ 2167dea3101eS } READ_NV_VAR; 2168dea3101eS 2169dea3101eS /* Structure for MB Command WRITE_NVPARMS (03) */ 2170dea3101eS 2171dea3101eS typedef struct { 2172dea3101eS uint32_t rsvd1[3]; /* Must be all one's */ 2173dea3101eS uint32_t rsvd2; /* Must be all zero's */ 2174dea3101eS uint32_t portname[2]; /* N_PORT name */ 2175dea3101eS uint32_t nodename[2]; /* NODE name */ 2176dea3101eS 2177dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 2178dea3101eS uint32_t pref_DID:24; 2179dea3101eS uint32_t hardAL_PA:8; 2180dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 2181dea3101eS uint32_t hardAL_PA:8; 2182dea3101eS uint32_t pref_DID:24; 2183dea3101eS #endif 2184dea3101eS 2185dea3101eS uint32_t rsvd3[21]; /* Must be all one's */ 2186dea3101eS } WRITE_NV_VAR; 2187dea3101eS 2188dea3101eS /* Structure for MB Command RUN_BIU_DIAG (04) */ 2189dea3101eS /* Structure for MB Command RUN_BIU_DIAG64 (0x84) */ 2190dea3101eS 2191dea3101eS typedef struct { 2192dea3101eS uint32_t rsvd1; 2193dea3101eS union { 2194dea3101eS struct { 2195dea3101eS struct ulp_bde xmit_bde; 2196dea3101eS struct ulp_bde rcv_bde; 2197dea3101eS } s1; 2198dea3101eS struct { 2199dea3101eS struct ulp_bde64 xmit_bde64; 2200dea3101eS struct ulp_bde64 rcv_bde64; 2201dea3101eS } s2; 2202dea3101eS } un; 2203dea3101eS } BIU_DIAG_VAR; 2204dea3101eS 2205c7495937SJames Smart /* Structure for MB command READ_EVENT_LOG (0x38) */ 2206c7495937SJames Smart struct READ_EVENT_LOG_VAR { 2207c7495937SJames Smart uint32_t word1; 2208c7495937SJames Smart #define lpfc_event_log_SHIFT 29 2209c7495937SJames Smart #define lpfc_event_log_MASK 0x00000001 2210c7495937SJames Smart #define lpfc_event_log_WORD word1 2211c7495937SJames Smart #define USE_MAILBOX_RESPONSE 1 2212c7495937SJames Smart uint32_t offset; 2213c7495937SJames Smart struct ulp_bde64 rcv_bde64; 2214c7495937SJames Smart }; 2215c7495937SJames Smart 2216dea3101eS /* Structure for MB Command INIT_LINK (05) */ 2217dea3101eS 2218dea3101eS typedef struct { 2219dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 2220dea3101eS uint32_t rsvd1:24; 2221dea3101eS uint32_t lipsr_AL_PA:8; /* AL_PA to issue Lip Selective Reset to */ 2222dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 2223dea3101eS uint32_t lipsr_AL_PA:8; /* AL_PA to issue Lip Selective Reset to */ 2224dea3101eS uint32_t rsvd1:24; 2225dea3101eS #endif 2226dea3101eS 2227dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 2228dea3101eS uint8_t fabric_AL_PA; /* If using a Fabric Assigned AL_PA */ 2229dea3101eS uint8_t rsvd2; 2230dea3101eS uint16_t link_flags; 2231dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 2232dea3101eS uint16_t link_flags; 2233dea3101eS uint8_t rsvd2; 2234dea3101eS uint8_t fabric_AL_PA; /* If using a Fabric Assigned AL_PA */ 2235dea3101eS #endif 2236dea3101eS 2237dea3101eS #define FLAGS_TOPOLOGY_MODE_LOOP_PT 0x00 /* Attempt loop then pt-pt */ 22381b51197dSJames Smart #define FLAGS_LOCAL_LB 0x01 /* link_flags (=1) ENDEC loopback */ 2239dea3101eS #define FLAGS_TOPOLOGY_MODE_PT_PT 0x02 /* Attempt pt-pt only */ 2240dea3101eS #define FLAGS_TOPOLOGY_MODE_LOOP 0x04 /* Attempt loop only */ 2241dea3101eS #define FLAGS_TOPOLOGY_MODE_PT_LOOP 0x06 /* Attempt pt-pt then loop */ 2242ed957684SJames Smart #define FLAGS_UNREG_LOGIN_ALL 0x08 /* UNREG_LOGIN all on link down */ 2243dea3101eS #define FLAGS_LIRP_LILP 0x80 /* LIRP / LILP is disabled */ 2244dea3101eS 2245dea3101eS #define FLAGS_TOPOLOGY_FAILOVER 0x0400 /* Bit 10 */ 2246dea3101eS #define FLAGS_LINK_SPEED 0x0800 /* Bit 11 */ 22474b0b91d4SJames Smart #define FLAGS_IMED_ABORT 0x04000 /* Bit 14 */ 2248dea3101eS 2249dea3101eS uint32_t link_speed; 225076a95d75SJames Smart #define LINK_SPEED_AUTO 0x0 /* Auto selection */ 225176a95d75SJames Smart #define LINK_SPEED_1G 0x1 /* 1 Gigabaud */ 225276a95d75SJames Smart #define LINK_SPEED_2G 0x2 /* 2 Gigabaud */ 225376a95d75SJames Smart #define LINK_SPEED_4G 0x4 /* 4 Gigabaud */ 225476a95d75SJames Smart #define LINK_SPEED_8G 0x8 /* 8 Gigabaud */ 225576a95d75SJames Smart #define LINK_SPEED_10G 0x10 /* 10 Gigabaud */ 225676a95d75SJames Smart #define LINK_SPEED_16G 0x11 /* 16 Gigabaud */ 2257d38dd52cSJames Smart #define LINK_SPEED_32G 0x14 /* 32 Gigabaud */ 2258fbd8a6baSJames Smart #define LINK_SPEED_64G 0x17 /* 64 Gigabaud */ 2259fbd8a6baSJames Smart #define LINK_SPEED_128G 0x1A /* 128 Gigabaud */ 2260fbd8a6baSJames Smart #define LINK_SPEED_256G 0x1D /* 256 Gigabaud */ 2261dea3101eS 2262dea3101eS } INIT_LINK_VAR; 2263dea3101eS 2264dea3101eS /* Structure for MB Command DOWN_LINK (06) */ 2265dea3101eS 2266dea3101eS typedef struct { 2267dea3101eS uint32_t rsvd1; 2268dea3101eS } DOWN_LINK_VAR; 2269dea3101eS 2270dea3101eS /* Structure for MB Command CONFIG_LINK (07) */ 2271dea3101eS 2272dea3101eS typedef struct { 2273dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 2274dea3101eS uint32_t cr:1; 2275dea3101eS uint32_t ci:1; 2276dea3101eS uint32_t cr_delay:6; 2277dea3101eS uint32_t cr_count:8; 2278dea3101eS uint32_t rsvd1:8; 2279dea3101eS uint32_t MaxBBC:8; 2280dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 2281dea3101eS uint32_t MaxBBC:8; 2282dea3101eS uint32_t rsvd1:8; 2283dea3101eS uint32_t cr_count:8; 2284dea3101eS uint32_t cr_delay:6; 2285dea3101eS uint32_t ci:1; 2286dea3101eS uint32_t cr:1; 2287dea3101eS #endif 2288dea3101eS 2289dea3101eS uint32_t myId; 2290dea3101eS uint32_t rsvd2; 2291dea3101eS uint32_t edtov; 2292dea3101eS uint32_t arbtov; 2293dea3101eS uint32_t ratov; 2294dea3101eS uint32_t rttov; 2295dea3101eS uint32_t altov; 2296dea3101eS uint32_t crtov; 229744fd7fe3SJames Smart 229844fd7fe3SJames Smart #ifdef __BIG_ENDIAN_BITFIELD 229944fd7fe3SJames Smart uint32_t rsvd4:19; 230044fd7fe3SJames Smart uint32_t cscn:1; 230144fd7fe3SJames Smart uint32_t bbscn:4; 230244fd7fe3SJames Smart uint32_t rsvd3:8; 230344fd7fe3SJames Smart #else /* __LITTLE_ENDIAN_BITFIELD */ 230444fd7fe3SJames Smart uint32_t rsvd3:8; 230544fd7fe3SJames Smart uint32_t bbscn:4; 230644fd7fe3SJames Smart uint32_t cscn:1; 230744fd7fe3SJames Smart uint32_t rsvd4:19; 230844fd7fe3SJames Smart #endif 230944fd7fe3SJames Smart 2310dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 2311dea3101eS uint32_t rrq_enable:1; 2312dea3101eS uint32_t rrq_immed:1; 231344fd7fe3SJames Smart uint32_t rsvd5:29; 2314dea3101eS uint32_t ack0_enable:1; 2315dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 2316dea3101eS uint32_t ack0_enable:1; 231744fd7fe3SJames Smart uint32_t rsvd5:29; 2318dea3101eS uint32_t rrq_immed:1; 2319dea3101eS uint32_t rrq_enable:1; 2320dea3101eS #endif 2321dea3101eS } CONFIG_LINK; 2322dea3101eS 2323dea3101eS /* Structure for MB Command PART_SLIM (08) 2324dea3101eS * will be removed since SLI1 is no longer supported! 2325dea3101eS */ 2326dea3101eS typedef struct { 2327dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 2328dea3101eS uint16_t offCiocb; 2329dea3101eS uint16_t numCiocb; 2330dea3101eS uint16_t offRiocb; 2331dea3101eS uint16_t numRiocb; 2332dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 2333dea3101eS uint16_t numCiocb; 2334dea3101eS uint16_t offCiocb; 2335dea3101eS uint16_t numRiocb; 2336dea3101eS uint16_t offRiocb; 2337dea3101eS #endif 2338dea3101eS } RING_DEF; 2339dea3101eS 2340dea3101eS typedef struct { 2341dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 2342dea3101eS uint32_t unused1:24; 2343dea3101eS uint32_t numRing:8; 2344dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 2345dea3101eS uint32_t numRing:8; 2346dea3101eS uint32_t unused1:24; 2347dea3101eS #endif 2348dea3101eS 2349dea3101eS RING_DEF ringdef[4]; 2350dea3101eS uint32_t hbainit; 2351dea3101eS } PART_SLIM_VAR; 2352dea3101eS 2353dea3101eS /* Structure for MB Command CONFIG_RING (09) */ 2354dea3101eS 2355dea3101eS typedef struct { 2356dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 2357dea3101eS uint32_t unused2:6; 2358dea3101eS uint32_t recvSeq:1; 2359dea3101eS uint32_t recvNotify:1; 2360dea3101eS uint32_t numMask:8; 2361dea3101eS uint32_t profile:8; 2362dea3101eS uint32_t unused1:4; 2363dea3101eS uint32_t ring:4; 2364dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 2365dea3101eS uint32_t ring:4; 2366dea3101eS uint32_t unused1:4; 2367dea3101eS uint32_t profile:8; 2368dea3101eS uint32_t numMask:8; 2369dea3101eS uint32_t recvNotify:1; 2370dea3101eS uint32_t recvSeq:1; 2371dea3101eS uint32_t unused2:6; 2372dea3101eS #endif 2373dea3101eS 2374dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 2375dea3101eS uint16_t maxRespXchg; 2376dea3101eS uint16_t maxOrigXchg; 2377dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 2378dea3101eS uint16_t maxOrigXchg; 2379dea3101eS uint16_t maxRespXchg; 2380dea3101eS #endif 2381dea3101eS 2382dea3101eS RR_REG rrRegs[6]; 2383dea3101eS } CONFIG_RING_VAR; 2384dea3101eS 2385dea3101eS /* Structure for MB Command RESET_RING (10) */ 2386dea3101eS 2387dea3101eS typedef struct { 2388dea3101eS uint32_t ring_no; 2389dea3101eS } RESET_RING_VAR; 2390dea3101eS 2391dea3101eS /* Structure for MB Command READ_CONFIG (11) */ 2392dea3101eS 2393dea3101eS typedef struct { 2394dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 2395dea3101eS uint32_t cr:1; 2396dea3101eS uint32_t ci:1; 2397dea3101eS uint32_t cr_delay:6; 2398dea3101eS uint32_t cr_count:8; 2399dea3101eS uint32_t InitBBC:8; 2400dea3101eS uint32_t MaxBBC:8; 2401dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 2402dea3101eS uint32_t MaxBBC:8; 2403dea3101eS uint32_t InitBBC:8; 2404dea3101eS uint32_t cr_count:8; 2405dea3101eS uint32_t cr_delay:6; 2406dea3101eS uint32_t ci:1; 2407dea3101eS uint32_t cr:1; 2408dea3101eS #endif 2409dea3101eS 2410dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 2411dea3101eS uint32_t topology:8; 2412dea3101eS uint32_t myDid:24; 2413dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 2414dea3101eS uint32_t myDid:24; 2415dea3101eS uint32_t topology:8; 2416dea3101eS #endif 2417dea3101eS 2418dea3101eS /* Defines for topology (defined previously) */ 2419dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 2420dea3101eS uint32_t AR:1; 2421dea3101eS uint32_t IR:1; 2422dea3101eS uint32_t rsvd1:29; 2423dea3101eS uint32_t ack0:1; 2424dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 2425dea3101eS uint32_t ack0:1; 2426dea3101eS uint32_t rsvd1:29; 2427dea3101eS uint32_t IR:1; 2428dea3101eS uint32_t AR:1; 2429dea3101eS #endif 2430dea3101eS 2431dea3101eS uint32_t edtov; 2432dea3101eS uint32_t arbtov; 2433dea3101eS uint32_t ratov; 2434dea3101eS uint32_t rttov; 2435dea3101eS uint32_t altov; 2436dea3101eS uint32_t lmt; 243774b72a59SJamie Wellnitz #define LMT_RESERVED 0x000 /* Not used */ 243874b72a59SJamie Wellnitz #define LMT_1Gb 0x004 243974b72a59SJamie Wellnitz #define LMT_2Gb 0x008 244074b72a59SJamie Wellnitz #define LMT_4Gb 0x040 244174b72a59SJamie Wellnitz #define LMT_8Gb 0x080 244274b72a59SJamie Wellnitz #define LMT_10Gb 0x100 244376a95d75SJames Smart #define LMT_16Gb 0x200 2444d38dd52cSJames Smart #define LMT_32Gb 0x400 2445fbd8a6baSJames Smart #define LMT_64Gb 0x800 2446fbd8a6baSJames Smart #define LMT_128Gb 0x1000 2447fbd8a6baSJames Smart #define LMT_256Gb 0x2000 2448dea3101eS uint32_t rsvd2; 2449dea3101eS uint32_t rsvd3; 2450dea3101eS uint32_t max_xri; 2451dea3101eS uint32_t max_iocb; 2452dea3101eS uint32_t max_rpi; 2453dea3101eS uint32_t avail_xri; 2454dea3101eS uint32_t avail_iocb; 2455dea3101eS uint32_t avail_rpi; 2456858c9f6cSJames Smart uint32_t max_vpi; 2457858c9f6cSJames Smart uint32_t rsvd4; 2458858c9f6cSJames Smart uint32_t rsvd5; 2459858c9f6cSJames Smart uint32_t avail_vpi; 2460dea3101eS } READ_CONFIG_VAR; 2461dea3101eS 2462dea3101eS /* Structure for MB Command READ_RCONFIG (12) */ 2463dea3101eS 2464dea3101eS typedef struct { 2465dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 2466dea3101eS uint32_t rsvd2:7; 2467dea3101eS uint32_t recvNotify:1; 2468dea3101eS uint32_t numMask:8; 2469dea3101eS uint32_t profile:8; 2470dea3101eS uint32_t rsvd1:4; 2471dea3101eS uint32_t ring:4; 2472dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 2473dea3101eS uint32_t ring:4; 2474dea3101eS uint32_t rsvd1:4; 2475dea3101eS uint32_t profile:8; 2476dea3101eS uint32_t numMask:8; 2477dea3101eS uint32_t recvNotify:1; 2478dea3101eS uint32_t rsvd2:7; 2479dea3101eS #endif 2480dea3101eS 2481dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 2482dea3101eS uint16_t maxResp; 2483dea3101eS uint16_t maxOrig; 2484dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 2485dea3101eS uint16_t maxOrig; 2486dea3101eS uint16_t maxResp; 2487dea3101eS #endif 2488dea3101eS 2489dea3101eS RR_REG rrRegs[6]; 2490dea3101eS 2491dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 2492dea3101eS uint16_t cmdRingOffset; 2493dea3101eS uint16_t cmdEntryCnt; 2494dea3101eS uint16_t rspRingOffset; 2495dea3101eS uint16_t rspEntryCnt; 2496dea3101eS uint16_t nextCmdOffset; 2497dea3101eS uint16_t rsvd3; 2498dea3101eS uint16_t nextRspOffset; 2499dea3101eS uint16_t rsvd4; 2500dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 2501dea3101eS uint16_t cmdEntryCnt; 2502dea3101eS uint16_t cmdRingOffset; 2503dea3101eS uint16_t rspEntryCnt; 2504dea3101eS uint16_t rspRingOffset; 2505dea3101eS uint16_t rsvd3; 2506dea3101eS uint16_t nextCmdOffset; 2507dea3101eS uint16_t rsvd4; 2508dea3101eS uint16_t nextRspOffset; 2509dea3101eS #endif 2510dea3101eS } READ_RCONF_VAR; 2511dea3101eS 2512dea3101eS /* Structure for MB Command READ_SPARM (13) */ 2513dea3101eS /* Structure for MB Command READ_SPARM64 (0x8D) */ 2514dea3101eS 2515dea3101eS typedef struct { 2516dea3101eS uint32_t rsvd1; 2517dea3101eS uint32_t rsvd2; 2518dea3101eS union { 2519dea3101eS struct ulp_bde sp; /* This BDE points to struct serv_parm 2520dea3101eS structure */ 2521dea3101eS struct ulp_bde64 sp64; 2522dea3101eS } un; 2523ed957684SJames Smart #ifdef __BIG_ENDIAN_BITFIELD 2524ed957684SJames Smart uint16_t rsvd3; 2525ed957684SJames Smart uint16_t vpi; 2526ed957684SJames Smart #else /* __LITTLE_ENDIAN_BITFIELD */ 2527ed957684SJames Smart uint16_t vpi; 2528ed957684SJames Smart uint16_t rsvd3; 2529ed957684SJames Smart #endif 2530dea3101eS } READ_SPARM_VAR; 2531dea3101eS 2532dea3101eS /* Structure for MB Command READ_STATUS (14) */ 2533dea3101eS 2534dea3101eS typedef struct { 2535dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 2536dea3101eS uint32_t rsvd1:31; 2537dea3101eS uint32_t clrCounters:1; 2538dea3101eS uint16_t activeXriCnt; 2539dea3101eS uint16_t activeRpiCnt; 2540dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 2541dea3101eS uint32_t clrCounters:1; 2542dea3101eS uint32_t rsvd1:31; 2543dea3101eS uint16_t activeRpiCnt; 2544dea3101eS uint16_t activeXriCnt; 2545dea3101eS #endif 2546dea3101eS 2547dea3101eS uint32_t xmitByteCnt; 2548dea3101eS uint32_t rcvByteCnt; 2549dea3101eS uint32_t xmitFrameCnt; 2550dea3101eS uint32_t rcvFrameCnt; 2551dea3101eS uint32_t xmitSeqCnt; 2552dea3101eS uint32_t rcvSeqCnt; 2553dea3101eS uint32_t totalOrigExchanges; 2554dea3101eS uint32_t totalRespExchanges; 2555dea3101eS uint32_t rcvPbsyCnt; 2556dea3101eS uint32_t rcvFbsyCnt; 2557dea3101eS } READ_STATUS_VAR; 2558dea3101eS 2559dea3101eS /* Structure for MB Command READ_RPI (15) */ 2560dea3101eS /* Structure for MB Command READ_RPI64 (0x8F) */ 2561dea3101eS 2562dea3101eS typedef struct { 2563dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 2564dea3101eS uint16_t nextRpi; 2565dea3101eS uint16_t reqRpi; 2566dea3101eS uint32_t rsvd2:8; 2567dea3101eS uint32_t DID:24; 2568dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 2569dea3101eS uint16_t reqRpi; 2570dea3101eS uint16_t nextRpi; 2571dea3101eS uint32_t DID:24; 2572dea3101eS uint32_t rsvd2:8; 2573dea3101eS #endif 2574dea3101eS 2575dea3101eS union { 2576dea3101eS struct ulp_bde sp; 2577dea3101eS struct ulp_bde64 sp64; 2578dea3101eS } un; 2579dea3101eS 2580dea3101eS } READ_RPI_VAR; 2581dea3101eS 2582dea3101eS /* Structure for MB Command READ_XRI (16) */ 2583dea3101eS 2584dea3101eS typedef struct { 2585dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 2586dea3101eS uint16_t nextXri; 2587dea3101eS uint16_t reqXri; 2588dea3101eS uint16_t rsvd1; 2589dea3101eS uint16_t rpi; 2590dea3101eS uint32_t rsvd2:8; 2591dea3101eS uint32_t DID:24; 2592dea3101eS uint32_t rsvd3:8; 2593dea3101eS uint32_t SID:24; 2594dea3101eS uint32_t rsvd4; 2595dea3101eS uint8_t seqId; 2596dea3101eS uint8_t rsvd5; 2597dea3101eS uint16_t seqCount; 2598dea3101eS uint16_t oxId; 2599dea3101eS uint16_t rxId; 2600dea3101eS uint32_t rsvd6:30; 2601dea3101eS uint32_t si:1; 2602dea3101eS uint32_t exchOrig:1; 2603dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 2604dea3101eS uint16_t reqXri; 2605dea3101eS uint16_t nextXri; 2606dea3101eS uint16_t rpi; 2607dea3101eS uint16_t rsvd1; 2608dea3101eS uint32_t DID:24; 2609dea3101eS uint32_t rsvd2:8; 2610dea3101eS uint32_t SID:24; 2611dea3101eS uint32_t rsvd3:8; 2612dea3101eS uint32_t rsvd4; 2613dea3101eS uint16_t seqCount; 2614dea3101eS uint8_t rsvd5; 2615dea3101eS uint8_t seqId; 2616dea3101eS uint16_t rxId; 2617dea3101eS uint16_t oxId; 2618dea3101eS uint32_t exchOrig:1; 2619dea3101eS uint32_t si:1; 2620dea3101eS uint32_t rsvd6:30; 2621dea3101eS #endif 2622dea3101eS } READ_XRI_VAR; 2623dea3101eS 2624dea3101eS /* Structure for MB Command READ_REV (17) */ 2625dea3101eS 2626dea3101eS typedef struct { 2627dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 2628dea3101eS uint32_t cv:1; 2629dea3101eS uint32_t rr:1; 2630ed957684SJames Smart uint32_t rsvd2:2; 2631ed957684SJames Smart uint32_t v3req:1; 2632ed957684SJames Smart uint32_t v3rsp:1; 2633ed957684SJames Smart uint32_t rsvd1:25; 2634dea3101eS uint32_t rv:1; 2635dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 2636dea3101eS uint32_t rv:1; 2637ed957684SJames Smart uint32_t rsvd1:25; 2638ed957684SJames Smart uint32_t v3rsp:1; 2639ed957684SJames Smart uint32_t v3req:1; 2640ed957684SJames Smart uint32_t rsvd2:2; 2641dea3101eS uint32_t rr:1; 2642dea3101eS uint32_t cv:1; 2643dea3101eS #endif 2644dea3101eS 2645dea3101eS uint32_t biuRev; 2646dea3101eS uint32_t smRev; 2647dea3101eS union { 2648dea3101eS uint32_t smFwRev; 2649dea3101eS struct { 2650dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 2651dea3101eS uint8_t ProgType; 2652dea3101eS uint8_t ProgId; 2653dea3101eS uint16_t ProgVer:4; 2654dea3101eS uint16_t ProgRev:4; 2655dea3101eS uint16_t ProgFixLvl:2; 2656dea3101eS uint16_t ProgDistType:2; 2657dea3101eS uint16_t DistCnt:4; 2658dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 2659dea3101eS uint16_t DistCnt:4; 2660dea3101eS uint16_t ProgDistType:2; 2661dea3101eS uint16_t ProgFixLvl:2; 2662dea3101eS uint16_t ProgRev:4; 2663dea3101eS uint16_t ProgVer:4; 2664dea3101eS uint8_t ProgId; 2665dea3101eS uint8_t ProgType; 2666dea3101eS #endif 2667dea3101eS 2668dea3101eS } b; 2669dea3101eS } un; 2670dea3101eS uint32_t endecRev; 2671dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 2672dea3101eS uint8_t feaLevelHigh; 2673dea3101eS uint8_t feaLevelLow; 2674dea3101eS uint8_t fcphHigh; 2675dea3101eS uint8_t fcphLow; 2676dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 2677dea3101eS uint8_t fcphLow; 2678dea3101eS uint8_t fcphHigh; 2679dea3101eS uint8_t feaLevelLow; 2680dea3101eS uint8_t feaLevelHigh; 2681dea3101eS #endif 2682dea3101eS 2683dea3101eS uint32_t postKernRev; 2684dea3101eS uint32_t opFwRev; 2685dea3101eS uint8_t opFwName[16]; 2686dea3101eS uint32_t sli1FwRev; 2687dea3101eS uint8_t sli1FwName[16]; 2688dea3101eS uint32_t sli2FwRev; 2689dea3101eS uint8_t sli2FwName[16]; 2690ed957684SJames Smart uint32_t sli3Feat; 2691ed957684SJames Smart uint32_t RandomData[6]; 2692dea3101eS } READ_REV_VAR; 2693dea3101eS 2694dea3101eS /* Structure for MB Command READ_LINK_STAT (18) */ 2695dea3101eS 2696dea3101eS typedef struct { 26974258e98eSJames Smart uint32_t word0; 26984258e98eSJames Smart 26994258e98eSJames Smart #define lpfc_read_link_stat_rec_SHIFT 0 27004258e98eSJames Smart #define lpfc_read_link_stat_rec_MASK 0x1 27014258e98eSJames Smart #define lpfc_read_link_stat_rec_WORD word0 27024258e98eSJames Smart 27034258e98eSJames Smart #define lpfc_read_link_stat_gec_SHIFT 1 27044258e98eSJames Smart #define lpfc_read_link_stat_gec_MASK 0x1 27054258e98eSJames Smart #define lpfc_read_link_stat_gec_WORD word0 27064258e98eSJames Smart 27074258e98eSJames Smart #define lpfc_read_link_stat_w02oftow23of_SHIFT 2 27084258e98eSJames Smart #define lpfc_read_link_stat_w02oftow23of_MASK 0x3FFFFF 27094258e98eSJames Smart #define lpfc_read_link_stat_w02oftow23of_WORD word0 27104258e98eSJames Smart 27114258e98eSJames Smart #define lpfc_read_link_stat_rsvd_SHIFT 24 27124258e98eSJames Smart #define lpfc_read_link_stat_rsvd_MASK 0x1F 27134258e98eSJames Smart #define lpfc_read_link_stat_rsvd_WORD word0 27144258e98eSJames Smart 27154258e98eSJames Smart #define lpfc_read_link_stat_gec2_SHIFT 29 27164258e98eSJames Smart #define lpfc_read_link_stat_gec2_MASK 0x1 27174258e98eSJames Smart #define lpfc_read_link_stat_gec2_WORD word0 27184258e98eSJames Smart 27194258e98eSJames Smart #define lpfc_read_link_stat_clrc_SHIFT 30 27204258e98eSJames Smart #define lpfc_read_link_stat_clrc_MASK 0x1 27214258e98eSJames Smart #define lpfc_read_link_stat_clrc_WORD word0 27224258e98eSJames Smart 27234258e98eSJames Smart #define lpfc_read_link_stat_clof_SHIFT 31 27244258e98eSJames Smart #define lpfc_read_link_stat_clof_MASK 0x1 27254258e98eSJames Smart #define lpfc_read_link_stat_clof_WORD word0 27264258e98eSJames Smart 2727dea3101eS uint32_t linkFailureCnt; 2728dea3101eS uint32_t lossSyncCnt; 2729dea3101eS uint32_t lossSignalCnt; 2730dea3101eS uint32_t primSeqErrCnt; 2731dea3101eS uint32_t invalidXmitWord; 2732dea3101eS uint32_t crcCnt; 2733dea3101eS uint32_t primSeqTimeout; 2734dea3101eS uint32_t elasticOverrun; 2735dea3101eS uint32_t arbTimeout; 27364258e98eSJames Smart uint32_t advRecBufCredit; 27374258e98eSJames Smart uint32_t curRecBufCredit; 27384258e98eSJames Smart uint32_t advTransBufCredit; 27394258e98eSJames Smart uint32_t curTransBufCredit; 27404258e98eSJames Smart uint32_t recEofCount; 27414258e98eSJames Smart uint32_t recEofdtiCount; 27424258e98eSJames Smart uint32_t recEofniCount; 27434258e98eSJames Smart uint32_t recSofcount; 27444258e98eSJames Smart uint32_t rsvd1; 27454258e98eSJames Smart uint32_t rsvd2; 27464258e98eSJames Smart uint32_t recDrpXriCount; 27474258e98eSJames Smart uint32_t fecCorrBlkCount; 27484258e98eSJames Smart uint32_t fecUncorrBlkCount; 2749dea3101eS } READ_LNK_VAR; 2750dea3101eS 2751dea3101eS /* Structure for MB Command REG_LOGIN (19) */ 2752dea3101eS /* Structure for MB Command REG_LOGIN64 (0x93) */ 2753dea3101eS 2754dea3101eS typedef struct { 2755dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 2756dea3101eS uint16_t rsvd1; 2757dea3101eS uint16_t rpi; 2758dea3101eS uint32_t rsvd2:8; 2759dea3101eS uint32_t did:24; 2760dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 2761dea3101eS uint16_t rpi; 2762dea3101eS uint16_t rsvd1; 2763dea3101eS uint32_t did:24; 2764dea3101eS uint32_t rsvd2:8; 2765dea3101eS #endif 2766dea3101eS 2767dea3101eS union { 2768dea3101eS struct ulp_bde sp; 2769dea3101eS struct ulp_bde64 sp64; 2770dea3101eS } un; 2771dea3101eS 2772ed957684SJames Smart #ifdef __BIG_ENDIAN_BITFIELD 2773ed957684SJames Smart uint16_t rsvd6; 2774ed957684SJames Smart uint16_t vpi; 2775ed957684SJames Smart #else /* __LITTLE_ENDIAN_BITFIELD */ 2776ed957684SJames Smart uint16_t vpi; 2777ed957684SJames Smart uint16_t rsvd6; 2778ed957684SJames Smart #endif 2779ed957684SJames Smart 2780dea3101eS } REG_LOGIN_VAR; 2781dea3101eS 2782dea3101eS /* Word 30 contents for REG_LOGIN */ 2783dea3101eS typedef union { 2784dea3101eS struct { 2785dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 2786dea3101eS uint16_t rsvd1:12; 2787dea3101eS uint16_t wd30_class:4; 2788dea3101eS uint16_t xri; 2789dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 2790dea3101eS uint16_t xri; 2791dea3101eS uint16_t wd30_class:4; 2792dea3101eS uint16_t rsvd1:12; 2793dea3101eS #endif 2794dea3101eS } f; 2795dea3101eS uint32_t word; 2796dea3101eS } REG_WD30; 2797dea3101eS 2798dea3101eS /* Structure for MB Command UNREG_LOGIN (20) */ 2799dea3101eS 2800dea3101eS typedef struct { 2801dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 2802dea3101eS uint16_t rsvd1; 2803dea3101eS uint16_t rpi; 2804ed957684SJames Smart uint32_t rsvd2; 2805ed957684SJames Smart uint32_t rsvd3; 2806ed957684SJames Smart uint32_t rsvd4; 2807ed957684SJames Smart uint32_t rsvd5; 2808ed957684SJames Smart uint16_t rsvd6; 2809ed957684SJames Smart uint16_t vpi; 2810dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 2811dea3101eS uint16_t rpi; 2812dea3101eS uint16_t rsvd1; 2813ed957684SJames Smart uint32_t rsvd2; 2814ed957684SJames Smart uint32_t rsvd3; 2815ed957684SJames Smart uint32_t rsvd4; 2816ed957684SJames Smart uint32_t rsvd5; 2817ed957684SJames Smart uint16_t vpi; 2818ed957684SJames Smart uint16_t rsvd6; 2819dea3101eS #endif 2820dea3101eS } UNREG_LOGIN_VAR; 2821dea3101eS 282292d7f7b0SJames Smart /* Structure for MB Command REG_VPI (0x96) */ 282392d7f7b0SJames Smart typedef struct { 282492d7f7b0SJames Smart #ifdef __BIG_ENDIAN_BITFIELD 282592d7f7b0SJames Smart uint32_t rsvd1; 282638b92ef8SJames Smart uint32_t rsvd2:7; 282738b92ef8SJames Smart uint32_t upd:1; 282892d7f7b0SJames Smart uint32_t sid:24; 2829c868595dSJames Smart uint32_t wwn[2]; 283092d7f7b0SJames Smart uint32_t rsvd5; 2831da0436e9SJames Smart uint16_t vfi; 283292d7f7b0SJames Smart uint16_t vpi; 283392d7f7b0SJames Smart #else /* __LITTLE_ENDIAN */ 283492d7f7b0SJames Smart uint32_t rsvd1; 283592d7f7b0SJames Smart uint32_t sid:24; 283638b92ef8SJames Smart uint32_t upd:1; 283738b92ef8SJames Smart uint32_t rsvd2:7; 2838c868595dSJames Smart uint32_t wwn[2]; 283992d7f7b0SJames Smart uint32_t rsvd5; 284092d7f7b0SJames Smart uint16_t vpi; 2841da0436e9SJames Smart uint16_t vfi; 284292d7f7b0SJames Smart #endif 284392d7f7b0SJames Smart } REG_VPI_VAR; 284492d7f7b0SJames Smart 284592d7f7b0SJames Smart /* Structure for MB Command UNREG_VPI (0x97) */ 284692d7f7b0SJames Smart typedef struct { 284792d7f7b0SJames Smart uint32_t rsvd1; 28486669f9bbSJames Smart #ifdef __BIG_ENDIAN_BITFIELD 28496669f9bbSJames Smart uint16_t rsvd2; 28506669f9bbSJames Smart uint16_t sli4_vpi; 28516669f9bbSJames Smart #else /* __LITTLE_ENDIAN */ 28526669f9bbSJames Smart uint16_t sli4_vpi; 28536669f9bbSJames Smart uint16_t rsvd2; 28546669f9bbSJames Smart #endif 285592d7f7b0SJames Smart uint32_t rsvd3; 285692d7f7b0SJames Smart uint32_t rsvd4; 285792d7f7b0SJames Smart uint32_t rsvd5; 285892d7f7b0SJames Smart #ifdef __BIG_ENDIAN_BITFIELD 285992d7f7b0SJames Smart uint16_t rsvd6; 286092d7f7b0SJames Smart uint16_t vpi; 286192d7f7b0SJames Smart #else /* __LITTLE_ENDIAN */ 286292d7f7b0SJames Smart uint16_t vpi; 286392d7f7b0SJames Smart uint16_t rsvd6; 286492d7f7b0SJames Smart #endif 286592d7f7b0SJames Smart } UNREG_VPI_VAR; 286692d7f7b0SJames Smart 2867dea3101eS /* Structure for MB Command UNREG_D_ID (0x23) */ 2868dea3101eS 2869dea3101eS typedef struct { 2870dea3101eS uint32_t did; 2871ed957684SJames Smart uint32_t rsvd2; 2872ed957684SJames Smart uint32_t rsvd3; 2873ed957684SJames Smart uint32_t rsvd4; 2874ed957684SJames Smart uint32_t rsvd5; 2875ed957684SJames Smart #ifdef __BIG_ENDIAN_BITFIELD 2876ed957684SJames Smart uint16_t rsvd6; 2877ed957684SJames Smart uint16_t vpi; 2878ed957684SJames Smart #else 2879ed957684SJames Smart uint16_t vpi; 2880ed957684SJames Smart uint16_t rsvd6; 2881ed957684SJames Smart #endif 2882dea3101eS } UNREG_D_ID_VAR; 2883dea3101eS 288476a95d75SJames Smart /* Structure for MB Command READ_TOPOLOGY (0x95) */ 288576a95d75SJames Smart struct lpfc_mbx_read_top { 2886dea3101eS uint32_t eventTag; /* Event tag */ 288776a95d75SJames Smart uint32_t word2; 288876a95d75SJames Smart #define lpfc_mbx_read_top_fa_SHIFT 12 288976a95d75SJames Smart #define lpfc_mbx_read_top_fa_MASK 0x00000001 289076a95d75SJames Smart #define lpfc_mbx_read_top_fa_WORD word2 289176a95d75SJames Smart #define lpfc_mbx_read_top_mm_SHIFT 11 289276a95d75SJames Smart #define lpfc_mbx_read_top_mm_MASK 0x00000001 289376a95d75SJames Smart #define lpfc_mbx_read_top_mm_WORD word2 289476a95d75SJames Smart #define lpfc_mbx_read_top_pb_SHIFT 9 289576a95d75SJames Smart #define lpfc_mbx_read_top_pb_MASK 0X00000001 289676a95d75SJames Smart #define lpfc_mbx_read_top_pb_WORD word2 289776a95d75SJames Smart #define lpfc_mbx_read_top_il_SHIFT 8 289876a95d75SJames Smart #define lpfc_mbx_read_top_il_MASK 0x00000001 289976a95d75SJames Smart #define lpfc_mbx_read_top_il_WORD word2 290076a95d75SJames Smart #define lpfc_mbx_read_top_att_type_SHIFT 0 290176a95d75SJames Smart #define lpfc_mbx_read_top_att_type_MASK 0x000000FF 290276a95d75SJames Smart #define lpfc_mbx_read_top_att_type_WORD word2 290376a95d75SJames Smart #define LPFC_ATT_RESERVED 0x00 /* Reserved - attType */ 290476a95d75SJames Smart #define LPFC_ATT_LINK_UP 0x01 /* Link is up */ 290576a95d75SJames Smart #define LPFC_ATT_LINK_DOWN 0x02 /* Link is down */ 2906aeb3c817SJames Smart #define LPFC_ATT_UNEXP_WWPN 0x06 /* Link is down Unexpected WWWPN */ 290776a95d75SJames Smart uint32_t word3; 290876a95d75SJames Smart #define lpfc_mbx_read_top_alpa_granted_SHIFT 24 290976a95d75SJames Smart #define lpfc_mbx_read_top_alpa_granted_MASK 0x000000FF 291076a95d75SJames Smart #define lpfc_mbx_read_top_alpa_granted_WORD word3 291176a95d75SJames Smart #define lpfc_mbx_read_top_lip_alps_SHIFT 16 291276a95d75SJames Smart #define lpfc_mbx_read_top_lip_alps_MASK 0x000000FF 291376a95d75SJames Smart #define lpfc_mbx_read_top_lip_alps_WORD word3 291476a95d75SJames Smart #define lpfc_mbx_read_top_lip_type_SHIFT 8 291576a95d75SJames Smart #define lpfc_mbx_read_top_lip_type_MASK 0x000000FF 291676a95d75SJames Smart #define lpfc_mbx_read_top_lip_type_WORD word3 291776a95d75SJames Smart #define lpfc_mbx_read_top_topology_SHIFT 0 291876a95d75SJames Smart #define lpfc_mbx_read_top_topology_MASK 0x000000FF 291976a95d75SJames Smart #define lpfc_mbx_read_top_topology_WORD word3 292076a95d75SJames Smart #define LPFC_TOPOLOGY_PT_PT 0x01 /* Topology is pt-pt / pt-fabric */ 292176a95d75SJames Smart #define LPFC_TOPOLOGY_LOOP 0x02 /* Topology is FC-AL */ 292276a95d75SJames Smart #define LPFC_TOPOLOGY_MM 0x05 /* maint mode zephtr to menlo */ 2923dea3101eS /* store the LILP AL_PA position map into */ 2924dea3101eS struct ulp_bde64 lilpBde64; 292576a95d75SJames Smart #define LPFC_ALPA_MAP_SIZE 128 292676a95d75SJames Smart uint32_t word7; 292776a95d75SJames Smart #define lpfc_mbx_read_top_ld_lu_SHIFT 31 292876a95d75SJames Smart #define lpfc_mbx_read_top_ld_lu_MASK 0x00000001 292976a95d75SJames Smart #define lpfc_mbx_read_top_ld_lu_WORD word7 293076a95d75SJames Smart #define lpfc_mbx_read_top_ld_tf_SHIFT 30 293176a95d75SJames Smart #define lpfc_mbx_read_top_ld_tf_MASK 0x00000001 293276a95d75SJames Smart #define lpfc_mbx_read_top_ld_tf_WORD word7 293376a95d75SJames Smart #define lpfc_mbx_read_top_ld_link_spd_SHIFT 8 293476a95d75SJames Smart #define lpfc_mbx_read_top_ld_link_spd_MASK 0x000000FF 293576a95d75SJames Smart #define lpfc_mbx_read_top_ld_link_spd_WORD word7 293676a95d75SJames Smart #define lpfc_mbx_read_top_ld_nl_port_SHIFT 4 293776a95d75SJames Smart #define lpfc_mbx_read_top_ld_nl_port_MASK 0x0000000F 293876a95d75SJames Smart #define lpfc_mbx_read_top_ld_nl_port_WORD word7 293976a95d75SJames Smart #define lpfc_mbx_read_top_ld_tx_SHIFT 2 294076a95d75SJames Smart #define lpfc_mbx_read_top_ld_tx_MASK 0x00000003 294176a95d75SJames Smart #define lpfc_mbx_read_top_ld_tx_WORD word7 294276a95d75SJames Smart #define lpfc_mbx_read_top_ld_rx_SHIFT 0 294376a95d75SJames Smart #define lpfc_mbx_read_top_ld_rx_MASK 0x00000003 294476a95d75SJames Smart #define lpfc_mbx_read_top_ld_rx_WORD word7 294576a95d75SJames Smart uint32_t word8; 294676a95d75SJames Smart #define lpfc_mbx_read_top_lu_SHIFT 31 294776a95d75SJames Smart #define lpfc_mbx_read_top_lu_MASK 0x00000001 294876a95d75SJames Smart #define lpfc_mbx_read_top_lu_WORD word8 294976a95d75SJames Smart #define lpfc_mbx_read_top_tf_SHIFT 30 295076a95d75SJames Smart #define lpfc_mbx_read_top_tf_MASK 0x00000001 295176a95d75SJames Smart #define lpfc_mbx_read_top_tf_WORD word8 295276a95d75SJames Smart #define lpfc_mbx_read_top_link_spd_SHIFT 8 295376a95d75SJames Smart #define lpfc_mbx_read_top_link_spd_MASK 0x000000FF 295476a95d75SJames Smart #define lpfc_mbx_read_top_link_spd_WORD word8 295576a95d75SJames Smart #define lpfc_mbx_read_top_nl_port_SHIFT 4 295676a95d75SJames Smart #define lpfc_mbx_read_top_nl_port_MASK 0x0000000F 295776a95d75SJames Smart #define lpfc_mbx_read_top_nl_port_WORD word8 295876a95d75SJames Smart #define lpfc_mbx_read_top_tx_SHIFT 2 295976a95d75SJames Smart #define lpfc_mbx_read_top_tx_MASK 0x00000003 296076a95d75SJames Smart #define lpfc_mbx_read_top_tx_WORD word8 296176a95d75SJames Smart #define lpfc_mbx_read_top_rx_SHIFT 0 296276a95d75SJames Smart #define lpfc_mbx_read_top_rx_MASK 0x00000003 296376a95d75SJames Smart #define lpfc_mbx_read_top_rx_WORD word8 296476a95d75SJames Smart #define LPFC_LINK_SPEED_UNKNOWN 0x0 296576a95d75SJames Smart #define LPFC_LINK_SPEED_1GHZ 0x04 296676a95d75SJames Smart #define LPFC_LINK_SPEED_2GHZ 0x08 296776a95d75SJames Smart #define LPFC_LINK_SPEED_4GHZ 0x10 296876a95d75SJames Smart #define LPFC_LINK_SPEED_8GHZ 0x20 296976a95d75SJames Smart #define LPFC_LINK_SPEED_10GHZ 0x40 297076a95d75SJames Smart #define LPFC_LINK_SPEED_16GHZ 0x80 2971d38dd52cSJames Smart #define LPFC_LINK_SPEED_32GHZ 0x90 2972fbd8a6baSJames Smart #define LPFC_LINK_SPEED_64GHZ 0xA0 2973fbd8a6baSJames Smart #define LPFC_LINK_SPEED_128GHZ 0xB0 2974fbd8a6baSJames Smart #define LPFC_LINK_SPEED_256GHZ 0xC0 297576a95d75SJames Smart }; 2976dea3101eS 2977dea3101eS /* Structure for MB Command CLEAR_LA (22) */ 2978dea3101eS 2979dea3101eS typedef struct { 2980dea3101eS uint32_t eventTag; /* Event tag */ 2981dea3101eS uint32_t rsvd1; 2982dea3101eS } CLEAR_LA_VAR; 2983dea3101eS 2984dea3101eS /* Structure for MB Command DUMP */ 2985dea3101eS 2986dea3101eS typedef struct { 2987dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 2988dea3101eS uint32_t rsvd:25; 2989dea3101eS uint32_t ra:1; 2990dea3101eS uint32_t co:1; 2991dea3101eS uint32_t cv:1; 2992dea3101eS uint32_t type:4; 2993dea3101eS uint32_t entry_index:16; 2994dea3101eS uint32_t region_id:16; 2995dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 2996dea3101eS uint32_t type:4; 2997dea3101eS uint32_t cv:1; 2998dea3101eS uint32_t co:1; 2999dea3101eS uint32_t ra:1; 3000dea3101eS uint32_t rsvd:25; 3001dea3101eS uint32_t region_id:16; 3002dea3101eS uint32_t entry_index:16; 3003dea3101eS #endif 3004dea3101eS 3005da0436e9SJames Smart uint32_t sli4_length; 3006dea3101eS uint32_t word_cnt; 3007dea3101eS uint32_t resp_offset; 3008dea3101eS } DUMP_VAR; 3009dea3101eS 3010dea3101eS #define DMP_MEM_REG 0x1 3011dea3101eS #define DMP_NV_PARAMS 0x2 30123ef6d24cSJames Smart #define DMP_LMSD 0x3 /* Link Module Serial Data */ 30133ef6d24cSJames Smart #define DMP_WELL_KNOWN 0x4 3014dea3101eS 3015dea3101eS #define DMP_REGION_VPD 0xe 3016dea3101eS #define DMP_VPD_SIZE 0x400 /* maximum amount of VPD */ 3017dea3101eS #define DMP_RSP_OFFSET 0x14 /* word 5 contains first word of rsp */ 3018dea3101eS #define DMP_RSP_SIZE 0x6C /* maximum of 27 words of rsp data */ 3019dea3101eS 3020da0436e9SJames Smart #define DMP_REGION_VPORT 0x16 /* VPort info region */ 3021da0436e9SJames Smart #define DMP_VPORT_REGION_SIZE 0x200 3022da0436e9SJames Smart #define DMP_MBOX_OFFSET_WORD 0x5 3023da0436e9SJames Smart 3024a0c87cbdSJames Smart #define DMP_REGION_23 0x17 /* fcoe param and port state region */ 3025a0c87cbdSJames Smart #define DMP_RGN23_SIZE 0x400 3026da0436e9SJames Smart 302797207482SJames Smart #define WAKE_UP_PARMS_REGION_ID 4 302897207482SJames Smart #define WAKE_UP_PARMS_WORD_SIZE 15 302997207482SJames Smart 3030da0436e9SJames Smart struct vport_rec { 3031da0436e9SJames Smart uint8_t wwpn[8]; 3032da0436e9SJames Smart uint8_t wwnn[8]; 3033da0436e9SJames Smart }; 3034da0436e9SJames Smart 3035da0436e9SJames Smart #define VPORT_INFO_SIG 0x32324752 3036da0436e9SJames Smart #define VPORT_INFO_REV_MASK 0xff 3037da0436e9SJames Smart #define VPORT_INFO_REV 0x1 3038da0436e9SJames Smart #define MAX_STATIC_VPORT_COUNT 16 3039da0436e9SJames Smart struct static_vport_info { 3040da0436e9SJames Smart uint32_t signature; 3041da0436e9SJames Smart uint32_t rev; 3042da0436e9SJames Smart struct vport_rec vport_list[MAX_STATIC_VPORT_COUNT]; 3043da0436e9SJames Smart uint32_t resvd[66]; 3044da0436e9SJames Smart }; 3045da0436e9SJames Smart 304697207482SJames Smart /* Option rom version structure */ 304797207482SJames Smart struct prog_id { 304897207482SJames Smart #ifdef __BIG_ENDIAN_BITFIELD 304997207482SJames Smart uint8_t type; 305097207482SJames Smart uint8_t id; 305197207482SJames Smart uint32_t ver:4; /* Major Version */ 305297207482SJames Smart uint32_t rev:4; /* Revision */ 305397207482SJames Smart uint32_t lev:2; /* Level */ 305497207482SJames Smart uint32_t dist:2; /* Dist Type */ 305597207482SJames Smart uint32_t num:4; /* number after dist type */ 305697207482SJames Smart #else /* __LITTLE_ENDIAN_BITFIELD */ 305797207482SJames Smart uint32_t num:4; /* number after dist type */ 305897207482SJames Smart uint32_t dist:2; /* Dist Type */ 305997207482SJames Smart uint32_t lev:2; /* Level */ 306097207482SJames Smart uint32_t rev:4; /* Revision */ 306197207482SJames Smart uint32_t ver:4; /* Major Version */ 306297207482SJames Smart uint8_t id; 306397207482SJames Smart uint8_t type; 306497207482SJames Smart #endif 306597207482SJames Smart }; 306697207482SJames Smart 3067d7c255b2SJames Smart /* Structure for MB Command UPDATE_CFG (0x1B) */ 3068d7c255b2SJames Smart 3069d7c255b2SJames Smart struct update_cfg_var { 3070d7c255b2SJames Smart #ifdef __BIG_ENDIAN_BITFIELD 3071d7c255b2SJames Smart uint32_t rsvd2:16; 3072d7c255b2SJames Smart uint32_t type:8; 3073d7c255b2SJames Smart uint32_t rsvd:1; 3074d7c255b2SJames Smart uint32_t ra:1; 3075d7c255b2SJames Smart uint32_t co:1; 3076d7c255b2SJames Smart uint32_t cv:1; 3077d7c255b2SJames Smart uint32_t req:4; 3078d7c255b2SJames Smart uint32_t entry_length:16; 3079d7c255b2SJames Smart uint32_t region_id:16; 3080d7c255b2SJames Smart #else /* __LITTLE_ENDIAN_BITFIELD */ 3081d7c255b2SJames Smart uint32_t req:4; 3082d7c255b2SJames Smart uint32_t cv:1; 3083d7c255b2SJames Smart uint32_t co:1; 3084d7c255b2SJames Smart uint32_t ra:1; 3085d7c255b2SJames Smart uint32_t rsvd:1; 3086d7c255b2SJames Smart uint32_t type:8; 3087d7c255b2SJames Smart uint32_t rsvd2:16; 3088d7c255b2SJames Smart uint32_t region_id:16; 3089d7c255b2SJames Smart uint32_t entry_length:16; 3090d7c255b2SJames Smart #endif 3091d7c255b2SJames Smart 3092d7c255b2SJames Smart uint32_t resp_info; 3093d7c255b2SJames Smart uint32_t byte_cnt; 3094d7c255b2SJames Smart uint32_t data_offset; 3095d7c255b2SJames Smart }; 3096d7c255b2SJames Smart 3097ed957684SJames Smart struct hbq_mask { 3098ed957684SJames Smart #ifdef __BIG_ENDIAN_BITFIELD 3099ed957684SJames Smart uint8_t tmatch; 3100ed957684SJames Smart uint8_t tmask; 3101ed957684SJames Smart uint8_t rctlmatch; 3102ed957684SJames Smart uint8_t rctlmask; 3103ed957684SJames Smart #else /* __LITTLE_ENDIAN */ 3104ed957684SJames Smart uint8_t rctlmask; 3105ed957684SJames Smart uint8_t rctlmatch; 3106ed957684SJames Smart uint8_t tmask; 3107ed957684SJames Smart uint8_t tmatch; 3108ed957684SJames Smart #endif 3109ed957684SJames Smart }; 3110ed957684SJames Smart 3111ed957684SJames Smart 3112ed957684SJames Smart /* Structure for MB Command CONFIG_HBQ (7c) */ 3113ed957684SJames Smart 3114ed957684SJames Smart struct config_hbq_var { 3115ed957684SJames Smart #ifdef __BIG_ENDIAN_BITFIELD 3116ed957684SJames Smart uint32_t rsvd1 :7; 3117ed957684SJames Smart uint32_t recvNotify :1; /* Receive Notification */ 3118ed957684SJames Smart uint32_t numMask :8; /* # Mask Entries */ 3119ed957684SJames Smart uint32_t profile :8; /* Selection Profile */ 3120ed957684SJames Smart uint32_t rsvd2 :8; 3121ed957684SJames Smart #else /* __LITTLE_ENDIAN */ 3122ed957684SJames Smart uint32_t rsvd2 :8; 3123ed957684SJames Smart uint32_t profile :8; /* Selection Profile */ 3124ed957684SJames Smart uint32_t numMask :8; /* # Mask Entries */ 3125ed957684SJames Smart uint32_t recvNotify :1; /* Receive Notification */ 3126ed957684SJames Smart uint32_t rsvd1 :7; 3127ed957684SJames Smart #endif 3128ed957684SJames Smart 3129ed957684SJames Smart #ifdef __BIG_ENDIAN_BITFIELD 3130ed957684SJames Smart uint32_t hbqId :16; 3131ed957684SJames Smart uint32_t rsvd3 :12; 3132ed957684SJames Smart uint32_t ringMask :4; 3133ed957684SJames Smart #else /* __LITTLE_ENDIAN */ 3134ed957684SJames Smart uint32_t ringMask :4; 3135ed957684SJames Smart uint32_t rsvd3 :12; 3136ed957684SJames Smart uint32_t hbqId :16; 3137ed957684SJames Smart #endif 3138ed957684SJames Smart 3139ed957684SJames Smart #ifdef __BIG_ENDIAN_BITFIELD 3140ed957684SJames Smart uint32_t entry_count :16; 3141ed957684SJames Smart uint32_t rsvd4 :8; 3142ed957684SJames Smart uint32_t headerLen :8; 3143ed957684SJames Smart #else /* __LITTLE_ENDIAN */ 3144ed957684SJames Smart uint32_t headerLen :8; 3145ed957684SJames Smart uint32_t rsvd4 :8; 3146ed957684SJames Smart uint32_t entry_count :16; 3147ed957684SJames Smart #endif 3148ed957684SJames Smart 3149ed957684SJames Smart uint32_t hbqaddrLow; 3150ed957684SJames Smart uint32_t hbqaddrHigh; 3151ed957684SJames Smart 3152ed957684SJames Smart #ifdef __BIG_ENDIAN_BITFIELD 3153ed957684SJames Smart uint32_t rsvd5 :31; 3154ed957684SJames Smart uint32_t logEntry :1; 3155ed957684SJames Smart #else /* __LITTLE_ENDIAN */ 3156ed957684SJames Smart uint32_t logEntry :1; 3157ed957684SJames Smart uint32_t rsvd5 :31; 3158ed957684SJames Smart #endif 3159ed957684SJames Smart 3160ed957684SJames Smart uint32_t rsvd6; /* w7 */ 3161ed957684SJames Smart uint32_t rsvd7; /* w8 */ 3162ed957684SJames Smart uint32_t rsvd8; /* w9 */ 3163ed957684SJames Smart 3164ed957684SJames Smart struct hbq_mask hbqMasks[6]; 3165ed957684SJames Smart 3166ed957684SJames Smart 3167ed957684SJames Smart union { 3168ed957684SJames Smart uint32_t allprofiles[12]; 3169ed957684SJames Smart 3170ed957684SJames Smart struct { 3171ed957684SJames Smart #ifdef __BIG_ENDIAN_BITFIELD 3172ed957684SJames Smart uint32_t seqlenoff :16; 3173ed957684SJames Smart uint32_t maxlen :16; 3174ed957684SJames Smart #else /* __LITTLE_ENDIAN */ 3175ed957684SJames Smart uint32_t maxlen :16; 3176ed957684SJames Smart uint32_t seqlenoff :16; 3177ed957684SJames Smart #endif 3178ed957684SJames Smart #ifdef __BIG_ENDIAN_BITFIELD 3179ed957684SJames Smart uint32_t rsvd1 :28; 3180ed957684SJames Smart uint32_t seqlenbcnt :4; 3181ed957684SJames Smart #else /* __LITTLE_ENDIAN */ 3182ed957684SJames Smart uint32_t seqlenbcnt :4; 3183ed957684SJames Smart uint32_t rsvd1 :28; 3184ed957684SJames Smart #endif 3185ed957684SJames Smart uint32_t rsvd[10]; 3186ed957684SJames Smart } profile2; 3187ed957684SJames Smart 3188ed957684SJames Smart struct { 3189ed957684SJames Smart #ifdef __BIG_ENDIAN_BITFIELD 3190ed957684SJames Smart uint32_t seqlenoff :16; 3191ed957684SJames Smart uint32_t maxlen :16; 3192ed957684SJames Smart #else /* __LITTLE_ENDIAN */ 3193ed957684SJames Smart uint32_t maxlen :16; 3194ed957684SJames Smart uint32_t seqlenoff :16; 3195ed957684SJames Smart #endif 3196ed957684SJames Smart #ifdef __BIG_ENDIAN_BITFIELD 3197ed957684SJames Smart uint32_t cmdcodeoff :28; 3198ed957684SJames Smart uint32_t rsvd1 :12; 3199ed957684SJames Smart uint32_t seqlenbcnt :4; 3200ed957684SJames Smart #else /* __LITTLE_ENDIAN */ 3201ed957684SJames Smart uint32_t seqlenbcnt :4; 3202ed957684SJames Smart uint32_t rsvd1 :12; 3203ed957684SJames Smart uint32_t cmdcodeoff :28; 3204ed957684SJames Smart #endif 3205ed957684SJames Smart uint32_t cmdmatch[8]; 3206ed957684SJames Smart 3207ed957684SJames Smart uint32_t rsvd[2]; 3208ed957684SJames Smart } profile3; 3209ed957684SJames Smart 3210ed957684SJames Smart struct { 3211ed957684SJames Smart #ifdef __BIG_ENDIAN_BITFIELD 3212ed957684SJames Smart uint32_t seqlenoff :16; 3213ed957684SJames Smart uint32_t maxlen :16; 3214ed957684SJames Smart #else /* __LITTLE_ENDIAN */ 3215ed957684SJames Smart uint32_t maxlen :16; 3216ed957684SJames Smart uint32_t seqlenoff :16; 3217ed957684SJames Smart #endif 3218ed957684SJames Smart #ifdef __BIG_ENDIAN_BITFIELD 3219ed957684SJames Smart uint32_t cmdcodeoff :28; 3220ed957684SJames Smart uint32_t rsvd1 :12; 3221ed957684SJames Smart uint32_t seqlenbcnt :4; 3222ed957684SJames Smart #else /* __LITTLE_ENDIAN */ 3223ed957684SJames Smart uint32_t seqlenbcnt :4; 3224ed957684SJames Smart uint32_t rsvd1 :12; 3225ed957684SJames Smart uint32_t cmdcodeoff :28; 3226ed957684SJames Smart #endif 3227ed957684SJames Smart uint32_t cmdmatch[8]; 3228ed957684SJames Smart 3229ed957684SJames Smart uint32_t rsvd[2]; 3230ed957684SJames Smart } profile5; 3231ed957684SJames Smart 3232ed957684SJames Smart } profiles; 3233ed957684SJames Smart 3234ed957684SJames Smart }; 3235ed957684SJames Smart 3236ed957684SJames Smart 3237dea3101eS 32382e0fef85SJames Smart /* Structure for MB Command CONFIG_PORT (0x88) */ 3239dea3101eS typedef struct { 3240ed957684SJames Smart #ifdef __BIG_ENDIAN_BITFIELD 3241ed957684SJames Smart uint32_t cBE : 1; 3242ed957684SJames Smart uint32_t cET : 1; 3243ed957684SJames Smart uint32_t cHpcb : 1; 3244ed957684SJames Smart uint32_t cMA : 1; 3245ed957684SJames Smart uint32_t sli_mode : 4; 3246ed957684SJames Smart uint32_t pcbLen : 24; /* bit 23:0 of memory based port 3247ed957684SJames Smart * config block */ 3248ed957684SJames Smart #else /* __LITTLE_ENDIAN */ 3249ed957684SJames Smart uint32_t pcbLen : 24; /* bit 23:0 of memory based port 3250ed957684SJames Smart * config block */ 3251ed957684SJames Smart uint32_t sli_mode : 4; 3252ed957684SJames Smart uint32_t cMA : 1; 3253ed957684SJames Smart uint32_t cHpcb : 1; 3254ed957684SJames Smart uint32_t cET : 1; 3255ed957684SJames Smart uint32_t cBE : 1; 3256ed957684SJames Smart #endif 3257ed957684SJames Smart 3258dea3101eS uint32_t pcbLow; /* bit 31:0 of memory based port config block */ 3259dea3101eS uint32_t pcbHigh; /* bit 63:32 of memory based port config block */ 326097207482SJames Smart uint32_t hbainit[5]; 326197207482SJames Smart #ifdef __BIG_ENDIAN_BITFIELD 326297207482SJames Smart uint32_t hps : 1; /* bit 31 word9 Host Pointer in slim */ 326397207482SJames Smart uint32_t rsvd : 31; /* least significant 31 bits of word 9 */ 326497207482SJames Smart #else /* __LITTLE_ENDIAN */ 326597207482SJames Smart uint32_t rsvd : 31; /* least significant 31 bits of word 9 */ 326697207482SJames Smart uint32_t hps : 1; /* bit 31 word9 Host Pointer in slim */ 326797207482SJames Smart #endif 3268ed957684SJames Smart 3269ed957684SJames Smart #ifdef __BIG_ENDIAN_BITFIELD 32700e75461aSJames Smart uint32_t rsvd1 : 20; /* Reserved */ 3271cb69f7deSJames Smart uint32_t casabt : 1; /* Configure async abts status notice */ 3272cb69f7deSJames Smart uint32_t rsvd2 : 2; /* Reserved */ 327381301a9bSJames Smart uint32_t cbg : 1; /* Configure BlockGuard */ 3274ed957684SJames Smart uint32_t cmv : 1; /* Configure Max VPIs */ 3275ed957684SJames Smart uint32_t ccrp : 1; /* Config Command Ring Polling */ 3276ed957684SJames Smart uint32_t csah : 1; /* Configure Synchronous Abort Handling */ 3277ed957684SJames Smart uint32_t chbs : 1; /* Cofigure Host Backing store */ 3278ed957684SJames Smart uint32_t cinb : 1; /* Enable Interrupt Notification Block */ 3279ed957684SJames Smart uint32_t cerbm : 1; /* Configure Enhanced Receive Buf Mgmt */ 3280ed957684SJames Smart uint32_t cmx : 1; /* Configure Max XRIs */ 3281ed957684SJames Smart uint32_t cmr : 1; /* Configure Max RPIs */ 3282ed957684SJames Smart #else /* __LITTLE_ENDIAN */ 3283ed957684SJames Smart uint32_t cmr : 1; /* Configure Max RPIs */ 3284ed957684SJames Smart uint32_t cmx : 1; /* Configure Max XRIs */ 3285ed957684SJames Smart uint32_t cerbm : 1; /* Configure Enhanced Receive Buf Mgmt */ 3286ed957684SJames Smart uint32_t cinb : 1; /* Enable Interrupt Notification Block */ 3287ed957684SJames Smart uint32_t chbs : 1; /* Cofigure Host Backing store */ 3288ed957684SJames Smart uint32_t csah : 1; /* Configure Synchronous Abort Handling */ 3289ed957684SJames Smart uint32_t ccrp : 1; /* Config Command Ring Polling */ 3290ed957684SJames Smart uint32_t cmv : 1; /* Configure Max VPIs */ 329181301a9bSJames Smart uint32_t cbg : 1; /* Configure BlockGuard */ 3292cb69f7deSJames Smart uint32_t rsvd2 : 2; /* Reserved */ 3293cb69f7deSJames Smart uint32_t casabt : 1; /* Configure async abts status notice */ 32940e75461aSJames Smart uint32_t rsvd1 : 20; /* Reserved */ 3295ed957684SJames Smart #endif 3296ed957684SJames Smart #ifdef __BIG_ENDIAN_BITFIELD 32970e75461aSJames Smart uint32_t rsvd3 : 20; /* Reserved */ 3298cb69f7deSJames Smart uint32_t gasabt : 1; /* Grant async abts status notice */ 3299cb69f7deSJames Smart uint32_t rsvd4 : 2; /* Reserved */ 330081301a9bSJames Smart uint32_t gbg : 1; /* Grant BlockGuard */ 3301ed957684SJames Smart uint32_t gmv : 1; /* Grant Max VPIs */ 3302ed957684SJames Smart uint32_t gcrp : 1; /* Grant Command Ring Polling */ 3303ed957684SJames Smart uint32_t gsah : 1; /* Grant Synchronous Abort Handling */ 3304ed957684SJames Smart uint32_t ghbs : 1; /* Grant Host Backing Store */ 3305ed957684SJames Smart uint32_t ginb : 1; /* Grant Interrupt Notification Block */ 3306ed957684SJames Smart uint32_t gerbm : 1; /* Grant ERBM Request */ 3307ed957684SJames Smart uint32_t gmx : 1; /* Grant Max XRIs */ 3308ed957684SJames Smart uint32_t gmr : 1; /* Grant Max RPIs */ 3309ed957684SJames Smart #else /* __LITTLE_ENDIAN */ 3310ed957684SJames Smart uint32_t gmr : 1; /* Grant Max RPIs */ 3311ed957684SJames Smart uint32_t gmx : 1; /* Grant Max XRIs */ 3312ed957684SJames Smart uint32_t gerbm : 1; /* Grant ERBM Request */ 3313ed957684SJames Smart uint32_t ginb : 1; /* Grant Interrupt Notification Block */ 3314ed957684SJames Smart uint32_t ghbs : 1; /* Grant Host Backing Store */ 3315ed957684SJames Smart uint32_t gsah : 1; /* Grant Synchronous Abort Handling */ 3316ed957684SJames Smart uint32_t gcrp : 1; /* Grant Command Ring Polling */ 3317ed957684SJames Smart uint32_t gmv : 1; /* Grant Max VPIs */ 331881301a9bSJames Smart uint32_t gbg : 1; /* Grant BlockGuard */ 3319cb69f7deSJames Smart uint32_t rsvd4 : 2; /* Reserved */ 3320cb69f7deSJames Smart uint32_t gasabt : 1; /* Grant async abts status notice */ 33210e75461aSJames Smart uint32_t rsvd3 : 20; /* Reserved */ 3322ed957684SJames Smart #endif 3323ed957684SJames Smart 3324ed957684SJames Smart #ifdef __BIG_ENDIAN_BITFIELD 3325ed957684SJames Smart uint32_t max_rpi : 16; /* Max RPIs Port should configure */ 3326ed957684SJames Smart uint32_t max_xri : 16; /* Max XRIs Port should configure */ 3327ed957684SJames Smart #else /* __LITTLE_ENDIAN */ 3328ed957684SJames Smart uint32_t max_xri : 16; /* Max XRIs Port should configure */ 3329ed957684SJames Smart uint32_t max_rpi : 16; /* Max RPIs Port should configure */ 3330ed957684SJames Smart #endif 3331ed957684SJames Smart 3332ed957684SJames Smart #ifdef __BIG_ENDIAN_BITFIELD 3333ed957684SJames Smart uint32_t max_hbq : 16; /* Max HBQs Host expect to configure */ 3334da0436e9SJames Smart uint32_t rsvd5 : 16; /* Max HBQs Host expect to configure */ 3335ed957684SJames Smart #else /* __LITTLE_ENDIAN */ 3336da0436e9SJames Smart uint32_t rsvd5 : 16; /* Max HBQs Host expect to configure */ 3337ed957684SJames Smart uint32_t max_hbq : 16; /* Max HBQs Host expect to configure */ 3338ed957684SJames Smart #endif 3339ed957684SJames Smart 3340da0436e9SJames Smart uint32_t rsvd6; /* Reserved */ 3341ed957684SJames Smart 3342ed957684SJames Smart #ifdef __BIG_ENDIAN_BITFIELD 33430e75461aSJames Smart uint32_t rsvd7 : 16; 3344ed957684SJames Smart uint32_t max_vpi : 16; /* Max number of virt N-Ports */ 3345ed957684SJames Smart #else /* __LITTLE_ENDIAN */ 3346ed957684SJames Smart uint32_t max_vpi : 16; /* Max number of virt N-Ports */ 33470e75461aSJames Smart uint32_t rsvd7 : 16; 3348ed957684SJames Smart #endif 3349ed957684SJames Smart 3350dea3101eS } CONFIG_PORT_VAR; 3351dea3101eS 33529399627fSJames Smart /* Structure for MB Command CONFIG_MSI (0x30) */ 33539399627fSJames Smart struct config_msi_var { 33549399627fSJames Smart #ifdef __BIG_ENDIAN_BITFIELD 33559399627fSJames Smart uint32_t dfltMsgNum:8; /* Default message number */ 33569399627fSJames Smart uint32_t rsvd1:11; /* Reserved */ 33579399627fSJames Smart uint32_t NID:5; /* Number of secondary attention IDs */ 33589399627fSJames Smart uint32_t rsvd2:5; /* Reserved */ 33599399627fSJames Smart uint32_t dfltPresent:1; /* Default message number present */ 33609399627fSJames Smart uint32_t addFlag:1; /* Add association flag */ 33619399627fSJames Smart uint32_t reportFlag:1; /* Report association flag */ 33629399627fSJames Smart #else /* __LITTLE_ENDIAN_BITFIELD */ 33639399627fSJames Smart uint32_t reportFlag:1; /* Report association flag */ 33649399627fSJames Smart uint32_t addFlag:1; /* Add association flag */ 33659399627fSJames Smart uint32_t dfltPresent:1; /* Default message number present */ 33669399627fSJames Smart uint32_t rsvd2:5; /* Reserved */ 33679399627fSJames Smart uint32_t NID:5; /* Number of secondary attention IDs */ 33689399627fSJames Smart uint32_t rsvd1:11; /* Reserved */ 33699399627fSJames Smart uint32_t dfltMsgNum:8; /* Default message number */ 33709399627fSJames Smart #endif 33719399627fSJames Smart uint32_t attentionConditions[2]; 33729399627fSJames Smart uint8_t attentionId[16]; 33739399627fSJames Smart uint8_t messageNumberByHA[64]; 33749399627fSJames Smart uint8_t messageNumberByID[16]; 33759399627fSJames Smart uint32_t autoClearHA[2]; 33769399627fSJames Smart #ifdef __BIG_ENDIAN_BITFIELD 33779399627fSJames Smart uint32_t rsvd3:16; 33789399627fSJames Smart uint32_t autoClearID:16; 33799399627fSJames Smart #else /* __LITTLE_ENDIAN_BITFIELD */ 33809399627fSJames Smart uint32_t autoClearID:16; 33819399627fSJames Smart uint32_t rsvd3:16; 33829399627fSJames Smart #endif 33839399627fSJames Smart uint32_t rsvd4; 33849399627fSJames Smart }; 33859399627fSJames Smart 3386dea3101eS /* SLI-2 Port Control Block */ 3387dea3101eS 3388dea3101eS /* SLIM POINTER */ 3389dea3101eS #define SLIMOFF 0x30 /* WORD */ 3390dea3101eS 3391dea3101eS typedef struct _SLI2_RDSC { 3392dea3101eS uint32_t cmdEntries; 3393dea3101eS uint32_t cmdAddrLow; 3394dea3101eS uint32_t cmdAddrHigh; 3395dea3101eS 3396dea3101eS uint32_t rspEntries; 3397dea3101eS uint32_t rspAddrLow; 3398dea3101eS uint32_t rspAddrHigh; 3399dea3101eS } SLI2_RDSC; 3400dea3101eS 3401dea3101eS typedef struct _PCB { 3402dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 3403dea3101eS uint32_t type:8; 3404497888cfSPhil Carmody #define TYPE_NATIVE_SLI2 0x01 3405dea3101eS uint32_t feature:8; 3406497888cfSPhil Carmody #define FEATURE_INITIAL_SLI2 0x01 3407dea3101eS uint32_t rsvd:12; 3408dea3101eS uint32_t maxRing:4; 3409dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 3410dea3101eS uint32_t maxRing:4; 3411dea3101eS uint32_t rsvd:12; 3412dea3101eS uint32_t feature:8; 3413497888cfSPhil Carmody #define FEATURE_INITIAL_SLI2 0x01 3414dea3101eS uint32_t type:8; 3415497888cfSPhil Carmody #define TYPE_NATIVE_SLI2 0x01 3416dea3101eS #endif 3417dea3101eS 3418dea3101eS uint32_t mailBoxSize; 3419dea3101eS uint32_t mbAddrLow; 3420dea3101eS uint32_t mbAddrHigh; 3421dea3101eS 3422dea3101eS uint32_t hgpAddrLow; 3423dea3101eS uint32_t hgpAddrHigh; 3424dea3101eS 3425dea3101eS uint32_t pgpAddrLow; 3426dea3101eS uint32_t pgpAddrHigh; 34272a76a283SJames Smart SLI2_RDSC rdsc[MAX_SLI3_RINGS]; 3428dea3101eS } PCB_t; 3429dea3101eS 3430dea3101eS /* NEW_FEATURE */ 3431dea3101eS typedef struct { 3432dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 3433dea3101eS uint32_t rsvd0:27; 3434dea3101eS uint32_t discardFarp:1; 3435dea3101eS uint32_t IPEnable:1; 3436dea3101eS uint32_t nodeName:1; 3437dea3101eS uint32_t portName:1; 3438dea3101eS uint32_t filterEnable:1; 3439dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 3440dea3101eS uint32_t filterEnable:1; 3441dea3101eS uint32_t portName:1; 3442dea3101eS uint32_t nodeName:1; 3443dea3101eS uint32_t IPEnable:1; 3444dea3101eS uint32_t discardFarp:1; 3445dea3101eS uint32_t rsvd:27; 3446dea3101eS #endif 3447dea3101eS 3448dea3101eS uint8_t portname[8]; /* Used to be struct lpfc_name */ 3449dea3101eS uint8_t nodename[8]; 3450dea3101eS uint32_t rsvd1; 3451dea3101eS uint32_t rsvd2; 3452dea3101eS uint32_t rsvd3; 3453dea3101eS uint32_t IPAddress; 3454dea3101eS } CONFIG_FARP_VAR; 3455dea3101eS 345657127f15SJames Smart /* Structure for MB Command MBX_ASYNCEVT_ENABLE (0x33) */ 345757127f15SJames Smart 345857127f15SJames Smart typedef struct { 345957127f15SJames Smart #ifdef __BIG_ENDIAN_BITFIELD 346057127f15SJames Smart uint32_t rsvd:30; 346157127f15SJames Smart uint32_t ring:2; /* Ring for ASYNC_EVENT iocb Bits 0-1*/ 346257127f15SJames Smart #else /* __LITTLE_ENDIAN */ 346357127f15SJames Smart uint32_t ring:2; /* Ring for ASYNC_EVENT iocb Bits 0-1*/ 346457127f15SJames Smart uint32_t rsvd:30; 346557127f15SJames Smart #endif 346657127f15SJames Smart } ASYNCEVT_ENABLE_VAR; 346757127f15SJames Smart 3468dea3101eS /* Union of all Mailbox Command types */ 3469dea3101eS #define MAILBOX_CMD_WSIZE 32 3470dea3101eS #define MAILBOX_CMD_SIZE (MAILBOX_CMD_WSIZE * sizeof(uint32_t)) 34717a470277SJames Smart /* ext_wsize times 4 bytes should not be greater than max xmit size */ 34727a470277SJames Smart #define MAILBOX_EXT_WSIZE 512 34737a470277SJames Smart #define MAILBOX_EXT_SIZE (MAILBOX_EXT_WSIZE * sizeof(uint32_t)) 34747a470277SJames Smart #define MAILBOX_HBA_EXT_OFFSET 0x100 34757a470277SJames Smart /* max mbox xmit size is a page size for sysfs IO operations */ 3476c0c11512SJames Smart #define MAILBOX_SYSFS_MAX 4096 3477dea3101eS 3478dea3101eS typedef union { 3479ed957684SJames Smart uint32_t varWords[MAILBOX_CMD_WSIZE - 1]; /* first word is type/ 3480ed957684SJames Smart * feature/max ring number 3481ed957684SJames Smart */ 3482dea3101eS LOAD_SM_VAR varLdSM; /* cmd = 1 (LOAD_SM) */ 3483dea3101eS READ_NV_VAR varRDnvp; /* cmd = 2 (READ_NVPARMS) */ 3484dea3101eS WRITE_NV_VAR varWTnvp; /* cmd = 3 (WRITE_NVPARMS) */ 3485dea3101eS BIU_DIAG_VAR varBIUdiag; /* cmd = 4 (RUN_BIU_DIAG) */ 3486dea3101eS INIT_LINK_VAR varInitLnk; /* cmd = 5 (INIT_LINK) */ 3487dea3101eS DOWN_LINK_VAR varDwnLnk; /* cmd = 6 (DOWN_LINK) */ 3488dea3101eS CONFIG_LINK varCfgLnk; /* cmd = 7 (CONFIG_LINK) */ 3489dea3101eS PART_SLIM_VAR varSlim; /* cmd = 8 (PART_SLIM) */ 3490dea3101eS CONFIG_RING_VAR varCfgRing; /* cmd = 9 (CONFIG_RING) */ 3491dea3101eS RESET_RING_VAR varRstRing; /* cmd = 10 (RESET_RING) */ 3492dea3101eS READ_CONFIG_VAR varRdConfig; /* cmd = 11 (READ_CONFIG) */ 3493dea3101eS READ_RCONF_VAR varRdRConfig; /* cmd = 12 (READ_RCONFIG) */ 3494dea3101eS READ_SPARM_VAR varRdSparm; /* cmd = 13 (READ_SPARM(64)) */ 3495dea3101eS READ_STATUS_VAR varRdStatus; /* cmd = 14 (READ_STATUS) */ 3496dea3101eS READ_RPI_VAR varRdRPI; /* cmd = 15 (READ_RPI(64)) */ 3497dea3101eS READ_XRI_VAR varRdXRI; /* cmd = 16 (READ_XRI) */ 3498dea3101eS READ_REV_VAR varRdRev; /* cmd = 17 (READ_REV) */ 3499dea3101eS READ_LNK_VAR varRdLnk; /* cmd = 18 (READ_LNK_STAT) */ 3500dea3101eS REG_LOGIN_VAR varRegLogin; /* cmd = 19 (REG_LOGIN(64)) */ 3501dea3101eS UNREG_LOGIN_VAR varUnregLogin; /* cmd = 20 (UNREG_LOGIN) */ 3502dea3101eS CLEAR_LA_VAR varClearLA; /* cmd = 22 (CLEAR_LA) */ 3503dea3101eS DUMP_VAR varDmp; /* Warm Start DUMP mbx cmd */ 3504dea3101eS UNREG_D_ID_VAR varUnregDID; /* cmd = 0x23 (UNREG_D_ID) */ 3505ed957684SJames Smart CONFIG_FARP_VAR varCfgFarp; /* cmd = 0x25 (CONFIG_FARP) 3506ed957684SJames Smart * NEW_FEATURE 3507ed957684SJames Smart */ 3508ed957684SJames Smart struct config_hbq_var varCfgHbq;/* cmd = 0x7c (CONFIG_HBQ) */ 3509d7c255b2SJames Smart struct update_cfg_var varUpdateCfg; /* cmd = 0x1B (UPDATE_CFG)*/ 3510dea3101eS CONFIG_PORT_VAR varCfgPort; /* cmd = 0x88 (CONFIG_PORT) */ 351176a95d75SJames Smart struct lpfc_mbx_read_top varReadTop; /* cmd = 0x95 (READ_TOPOLOGY) */ 351292d7f7b0SJames Smart REG_VPI_VAR varRegVpi; /* cmd = 0x96 (REG_VPI) */ 351392d7f7b0SJames Smart UNREG_VPI_VAR varUnregVpi; /* cmd = 0x97 (UNREG_VPI) */ 351457127f15SJames Smart ASYNCEVT_ENABLE_VAR varCfgAsyncEvent; /*cmd = x33 (CONFIG_ASYNC) */ 3515c7495937SJames Smart struct READ_EVENT_LOG_VAR varRdEventLog; /* cmd = 0x38 3516c7495937SJames Smart * (READ_EVENT_LOG) 3517c7495937SJames Smart */ 35189399627fSJames Smart struct config_msi_var varCfgMSI;/* cmd = x30 (CONFIG_MSI) */ 3519dea3101eS } MAILVARIANTS; 3520dea3101eS 3521dea3101eS /* 3522dea3101eS * SLI-2 specific structures 3523dea3101eS */ 3524dea3101eS 35254cc2da1dSJames.Smart@Emulex.Com struct lpfc_hgp { 35264cc2da1dSJames.Smart@Emulex.Com __le32 cmdPutInx; 35274cc2da1dSJames.Smart@Emulex.Com __le32 rspGetInx; 35284cc2da1dSJames.Smart@Emulex.Com }; 3529dea3101eS 35304cc2da1dSJames.Smart@Emulex.Com struct lpfc_pgp { 35314cc2da1dSJames.Smart@Emulex.Com __le32 cmdGetInx; 35324cc2da1dSJames.Smart@Emulex.Com __le32 rspPutInx; 35334cc2da1dSJames.Smart@Emulex.Com }; 3534dea3101eS 3535ed957684SJames Smart struct sli2_desc { 3536dea3101eS uint32_t unused1[16]; 35372a76a283SJames Smart struct lpfc_hgp host[MAX_SLI3_RINGS]; 35382a76a283SJames Smart struct lpfc_pgp port[MAX_SLI3_RINGS]; 3539ed957684SJames Smart }; 3540ed957684SJames Smart 3541ed957684SJames Smart struct sli3_desc { 35422a76a283SJames Smart struct lpfc_hgp host[MAX_SLI3_RINGS]; 3543ed957684SJames Smart uint32_t reserved[8]; 3544ed957684SJames Smart uint32_t hbq_put[16]; 3545ed957684SJames Smart }; 3546ed957684SJames Smart 3547ed957684SJames Smart struct sli3_pgp { 35482a76a283SJames Smart struct lpfc_pgp port[MAX_SLI3_RINGS]; 3549ed957684SJames Smart uint32_t hbq_get[16]; 3550ed957684SJames Smart }; 3551dea3101eS 355234b02dcdSJames Smart union sli_var { 3553ed957684SJames Smart struct sli2_desc s2; 3554ed957684SJames Smart struct sli3_desc s3; 3555ed957684SJames Smart struct sli3_pgp s3_pgp; 355634b02dcdSJames Smart }; 3557dea3101eS 3558dea3101eS typedef struct { 3559dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 3560dea3101eS uint16_t mbxStatus; 3561dea3101eS uint8_t mbxCommand; 3562dea3101eS uint8_t mbxReserved:6; 3563dea3101eS uint8_t mbxHc:1; 3564dea3101eS uint8_t mbxOwner:1; /* Low order bit first word */ 3565dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 3566dea3101eS uint8_t mbxOwner:1; /* Low order bit first word */ 3567dea3101eS uint8_t mbxHc:1; 3568dea3101eS uint8_t mbxReserved:6; 3569dea3101eS uint8_t mbxCommand; 3570dea3101eS uint16_t mbxStatus; 3571dea3101eS #endif 3572dea3101eS 3573dea3101eS MAILVARIANTS un; 357434b02dcdSJames Smart union sli_var us; 3575dea3101eS } MAILBOX_t; 3576dea3101eS 3577dea3101eS /* 3578dea3101eS * Begin Structure Definitions for IOCB Commands 3579dea3101eS */ 3580dea3101eS 3581dea3101eS typedef struct { 3582dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 3583dea3101eS uint8_t statAction; 3584dea3101eS uint8_t statRsn; 3585dea3101eS uint8_t statBaExp; 3586dea3101eS uint8_t statLocalError; 3587dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 3588dea3101eS uint8_t statLocalError; 3589dea3101eS uint8_t statBaExp; 3590dea3101eS uint8_t statRsn; 3591dea3101eS uint8_t statAction; 3592dea3101eS #endif 3593dea3101eS /* statRsn P/F_RJT reason codes */ 3594dea3101eS #define RJT_BAD_D_ID 0x01 /* Invalid D_ID field */ 3595dea3101eS #define RJT_BAD_S_ID 0x02 /* Invalid S_ID field */ 3596dea3101eS #define RJT_UNAVAIL_TEMP 0x03 /* N_Port unavailable temp. */ 3597dea3101eS #define RJT_UNAVAIL_PERM 0x04 /* N_Port unavailable perm. */ 3598dea3101eS #define RJT_UNSUP_CLASS 0x05 /* Class not supported */ 3599dea3101eS #define RJT_DELIM_ERR 0x06 /* Delimiter usage error */ 3600dea3101eS #define RJT_UNSUP_TYPE 0x07 /* Type not supported */ 3601dea3101eS #define RJT_BAD_CONTROL 0x08 /* Invalid link conrtol */ 3602dea3101eS #define RJT_BAD_RCTL 0x09 /* R_CTL invalid */ 3603dea3101eS #define RJT_BAD_FCTL 0x0A /* F_CTL invalid */ 3604dea3101eS #define RJT_BAD_OXID 0x0B /* OX_ID invalid */ 3605dea3101eS #define RJT_BAD_RXID 0x0C /* RX_ID invalid */ 3606dea3101eS #define RJT_BAD_SEQID 0x0D /* SEQ_ID invalid */ 3607dea3101eS #define RJT_BAD_DFCTL 0x0E /* DF_CTL invalid */ 3608dea3101eS #define RJT_BAD_SEQCNT 0x0F /* SEQ_CNT invalid */ 3609dea3101eS #define RJT_BAD_PARM 0x10 /* Param. field invalid */ 3610dea3101eS #define RJT_XCHG_ERR 0x11 /* Exchange error */ 3611dea3101eS #define RJT_PROT_ERR 0x12 /* Protocol error */ 3612dea3101eS #define RJT_BAD_LENGTH 0x13 /* Invalid Length */ 3613dea3101eS #define RJT_UNEXPECTED_ACK 0x14 /* Unexpected ACK */ 3614dea3101eS #define RJT_LOGIN_REQUIRED 0x16 /* Login required */ 3615dea3101eS #define RJT_TOO_MANY_SEQ 0x17 /* Excessive sequences */ 3616dea3101eS #define RJT_XCHG_NOT_STRT 0x18 /* Exchange not started */ 3617dea3101eS #define RJT_UNSUP_SEC_HDR 0x19 /* Security hdr not supported */ 3618dea3101eS #define RJT_UNAVAIL_PATH 0x1A /* Fabric Path not available */ 3619dea3101eS #define RJT_VENDOR_UNIQUE 0xFF /* Vendor unique error */ 3620dea3101eS 3621dea3101eS #define IOERR_SUCCESS 0x00 /* statLocalError */ 3622dea3101eS #define IOERR_MISSING_CONTINUE 0x01 3623dea3101eS #define IOERR_SEQUENCE_TIMEOUT 0x02 3624dea3101eS #define IOERR_INTERNAL_ERROR 0x03 3625dea3101eS #define IOERR_INVALID_RPI 0x04 3626dea3101eS #define IOERR_NO_XRI 0x05 3627dea3101eS #define IOERR_ILLEGAL_COMMAND 0x06 3628dea3101eS #define IOERR_XCHG_DROPPED 0x07 3629dea3101eS #define IOERR_ILLEGAL_FIELD 0x08 3630dea3101eS #define IOERR_BAD_CONTINUE 0x09 3631dea3101eS #define IOERR_TOO_MANY_BUFFERS 0x0A 3632dea3101eS #define IOERR_RCV_BUFFER_WAITING 0x0B 3633dea3101eS #define IOERR_NO_CONNECTION 0x0C 3634dea3101eS #define IOERR_TX_DMA_FAILED 0x0D 3635dea3101eS #define IOERR_RX_DMA_FAILED 0x0E 3636dea3101eS #define IOERR_ILLEGAL_FRAME 0x0F 3637dea3101eS #define IOERR_EXTRA_DATA 0x10 3638dea3101eS #define IOERR_NO_RESOURCES 0x11 3639dea3101eS #define IOERR_RESERVED 0x12 3640dea3101eS #define IOERR_ILLEGAL_LENGTH 0x13 3641dea3101eS #define IOERR_UNSUPPORTED_FEATURE 0x14 3642dea3101eS #define IOERR_ABORT_IN_PROGRESS 0x15 3643dea3101eS #define IOERR_ABORT_REQUESTED 0x16 3644dea3101eS #define IOERR_RECEIVE_BUFFER_TIMEOUT 0x17 3645dea3101eS #define IOERR_LOOP_OPEN_FAILURE 0x18 3646dea3101eS #define IOERR_RING_RESET 0x19 3647dea3101eS #define IOERR_LINK_DOWN 0x1A 3648dea3101eS #define IOERR_CORRUPTED_DATA 0x1B 3649dea3101eS #define IOERR_CORRUPTED_RPI 0x1C 3650dea3101eS #define IOERR_OUT_OF_ORDER_DATA 0x1D 3651dea3101eS #define IOERR_OUT_OF_ORDER_ACK 0x1E 3652dea3101eS #define IOERR_DUP_FRAME 0x1F 3653dea3101eS #define IOERR_LINK_CONTROL_FRAME 0x20 /* ACK_N received */ 3654dea3101eS #define IOERR_BAD_HOST_ADDRESS 0x21 3655dea3101eS #define IOERR_RCV_HDRBUF_WAITING 0x22 3656dea3101eS #define IOERR_MISSING_HDR_BUFFER 0x23 3657dea3101eS #define IOERR_MSEQ_CHAIN_CORRUPTED 0x24 3658dea3101eS #define IOERR_ABORTMULT_REQUESTED 0x25 3659dea3101eS #define IOERR_BUFFER_SHORTAGE 0x28 3660dea3101eS #define IOERR_DEFAULT 0x29 3661dea3101eS #define IOERR_CNT 0x2A 3662b92938b4SJames Smart #define IOERR_SLER_FAILURE 0x46 3663b92938b4SJames Smart #define IOERR_SLER_CMD_RCV_FAILURE 0x47 3664b92938b4SJames Smart #define IOERR_SLER_REC_RJT_ERR 0x48 3665b92938b4SJames Smart #define IOERR_SLER_REC_SRR_RETRY_ERR 0x49 3666b92938b4SJames Smart #define IOERR_SLER_SRR_RJT_ERR 0x4A 3667b92938b4SJames Smart #define IOERR_SLER_RRQ_RJT_ERR 0x4C 3668b92938b4SJames Smart #define IOERR_SLER_RRQ_RETRY_ERR 0x4D 3669b92938b4SJames Smart #define IOERR_SLER_ABTS_ERR 0x4E 3670ab56dc2eSJames Smart #define IOERR_ELXSEC_KEY_UNWRAP_ERROR 0xF0 3671ab56dc2eSJames Smart #define IOERR_ELXSEC_KEY_UNWRAP_COMPARE_ERROR 0xF1 3672ab56dc2eSJames Smart #define IOERR_ELXSEC_CRYPTO_ERROR 0xF2 3673ab56dc2eSJames Smart #define IOERR_ELXSEC_CRYPTO_COMPARE_ERROR 0xF3 3674dea3101eS #define IOERR_DRVR_MASK 0x100 3675dea3101eS #define IOERR_SLI_DOWN 0x101 /* ulpStatus - Driver defined */ 3676dea3101eS #define IOERR_SLI_BRESET 0x102 3677dea3101eS #define IOERR_SLI_ABORTED 0x103 3678e3d2b802SJames Smart #define IOERR_PARAM_MASK 0x1ff 3679dea3101eS } PARM_ERR; 3680dea3101eS 3681dea3101eS typedef union { 3682dea3101eS struct { 3683dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 3684dea3101eS uint8_t Rctl; /* R_CTL field */ 3685dea3101eS uint8_t Type; /* TYPE field */ 3686dea3101eS uint8_t Dfctl; /* DF_CTL field */ 3687dea3101eS uint8_t Fctl; /* Bits 0-7 of IOCB word 5 */ 3688dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 3689dea3101eS uint8_t Fctl; /* Bits 0-7 of IOCB word 5 */ 3690dea3101eS uint8_t Dfctl; /* DF_CTL field */ 3691dea3101eS uint8_t Type; /* TYPE field */ 3692dea3101eS uint8_t Rctl; /* R_CTL field */ 3693dea3101eS #endif 3694dea3101eS 3695dea3101eS #define BC 0x02 /* Broadcast Received - Fctl */ 3696dea3101eS #define SI 0x04 /* Sequence Initiative */ 3697dea3101eS #define LA 0x08 /* Ignore Link Attention state */ 3698dea3101eS #define LS 0x80 /* Last Sequence */ 3699dea3101eS } hcsw; 3700dea3101eS uint32_t reserved; 3701dea3101eS } WORD5; 3702dea3101eS 3703dea3101eS /* IOCB Command template for a generic response */ 3704dea3101eS typedef struct { 3705dea3101eS uint32_t reserved[4]; 3706dea3101eS PARM_ERR perr; 3707dea3101eS } GENERIC_RSP; 3708dea3101eS 3709dea3101eS /* IOCB Command template for XMIT / XMIT_BCAST / RCV_SEQUENCE / XMIT_ELS */ 3710dea3101eS typedef struct { 3711dea3101eS struct ulp_bde xrsqbde[2]; 3712dea3101eS uint32_t xrsqRo; /* Starting Relative Offset */ 3713dea3101eS WORD5 w5; /* Header control/status word */ 3714dea3101eS } XR_SEQ_FIELDS; 3715dea3101eS 3716dea3101eS /* IOCB Command template for ELS_REQUEST */ 3717dea3101eS typedef struct { 3718dea3101eS struct ulp_bde elsReq; 3719dea3101eS struct ulp_bde elsRsp; 3720dea3101eS 3721dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 3722dea3101eS uint32_t word4Rsvd:7; 3723dea3101eS uint32_t fl:1; 3724dea3101eS uint32_t myID:24; 3725dea3101eS uint32_t word5Rsvd:8; 3726dea3101eS uint32_t remoteID:24; 3727dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 3728dea3101eS uint32_t myID:24; 3729dea3101eS uint32_t fl:1; 3730dea3101eS uint32_t word4Rsvd:7; 3731dea3101eS uint32_t remoteID:24; 3732dea3101eS uint32_t word5Rsvd:8; 3733dea3101eS #endif 3734dea3101eS } ELS_REQUEST; 3735dea3101eS 3736dea3101eS /* IOCB Command template for RCV_ELS_REQ */ 3737dea3101eS typedef struct { 3738dea3101eS struct ulp_bde elsReq[2]; 3739dea3101eS uint32_t parmRo; 3740dea3101eS 3741dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 3742dea3101eS uint32_t word5Rsvd:8; 3743dea3101eS uint32_t remoteID:24; 3744dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 3745dea3101eS uint32_t remoteID:24; 3746dea3101eS uint32_t word5Rsvd:8; 3747dea3101eS #endif 3748dea3101eS } RCV_ELS_REQ; 3749dea3101eS 3750dea3101eS /* IOCB Command template for ABORT / CLOSE_XRI */ 3751dea3101eS typedef struct { 3752dea3101eS uint32_t rsvd[3]; 3753dea3101eS uint32_t abortType; 3754dea3101eS #define ABORT_TYPE_ABTX 0x00000000 3755dea3101eS #define ABORT_TYPE_ABTS 0x00000001 3756dea3101eS uint32_t parm; 3757dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 3758dea3101eS uint16_t abortContextTag; /* ulpContext from command to abort/close */ 3759dea3101eS uint16_t abortIoTag; /* ulpIoTag from command to abort/close */ 3760dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 3761dea3101eS uint16_t abortIoTag; /* ulpIoTag from command to abort/close */ 3762dea3101eS uint16_t abortContextTag; /* ulpContext from command to abort/close */ 3763dea3101eS #endif 3764dea3101eS } AC_XRI; 3765dea3101eS 3766dea3101eS /* IOCB Command template for ABORT_MXRI64 */ 3767dea3101eS typedef struct { 3768dea3101eS uint32_t rsvd[3]; 3769dea3101eS uint32_t abortType; 3770dea3101eS uint32_t parm; 3771dea3101eS uint32_t iotag32; 3772dea3101eS } A_MXRI64; 3773dea3101eS 3774dea3101eS /* IOCB Command template for GET_RPI */ 3775dea3101eS typedef struct { 3776dea3101eS uint32_t rsvd[4]; 3777dea3101eS uint32_t parmRo; 3778dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 3779dea3101eS uint32_t word5Rsvd:8; 3780dea3101eS uint32_t remoteID:24; 3781dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 3782dea3101eS uint32_t remoteID:24; 3783dea3101eS uint32_t word5Rsvd:8; 3784dea3101eS #endif 3785dea3101eS } GET_RPI; 3786dea3101eS 3787dea3101eS /* IOCB Command template for all FCP Initiator commands */ 3788dea3101eS typedef struct { 3789dea3101eS struct ulp_bde fcpi_cmnd; /* FCP_CMND payload descriptor */ 3790dea3101eS struct ulp_bde fcpi_rsp; /* Rcv buffer */ 3791dea3101eS uint32_t fcpi_parm; 3792dea3101eS uint32_t fcpi_XRdy; /* transfer ready for IWRITE */ 3793dea3101eS } FCPI_FIELDS; 3794dea3101eS 3795dea3101eS /* IOCB Command template for all FCP Target commands */ 3796dea3101eS typedef struct { 3797dea3101eS struct ulp_bde fcpt_Buffer[2]; /* FCP_CMND payload descriptor */ 3798dea3101eS uint32_t fcpt_Offset; 3799dea3101eS uint32_t fcpt_Length; /* transfer ready for IWRITE */ 3800dea3101eS } FCPT_FIELDS; 3801dea3101eS 3802dea3101eS /* SLI-2 IOCB structure definitions */ 3803dea3101eS 3804dea3101eS /* IOCB Command template for 64 bit XMIT / XMIT_BCAST / XMIT_ELS */ 3805dea3101eS typedef struct { 3806dea3101eS ULP_BDL bdl; 3807dea3101eS uint32_t xrsqRo; /* Starting Relative Offset */ 3808dea3101eS WORD5 w5; /* Header control/status word */ 3809dea3101eS } XMT_SEQ_FIELDS64; 3810dea3101eS 3811939723a4SJames Smart /* This word is remote ports D_ID for XMIT_ELS_RSP64 */ 3812939723a4SJames Smart #define xmit_els_remoteID xrsqRo 3813939723a4SJames Smart 3814dea3101eS /* IOCB Command template for 64 bit RCV_SEQUENCE64 */ 3815dea3101eS typedef struct { 3816dea3101eS struct ulp_bde64 rcvBde; 3817dea3101eS uint32_t rsvd1; 3818dea3101eS uint32_t xrsqRo; /* Starting Relative Offset */ 3819dea3101eS WORD5 w5; /* Header control/status word */ 3820dea3101eS } RCV_SEQ_FIELDS64; 3821dea3101eS 3822dea3101eS /* IOCB Command template for ELS_REQUEST64 */ 3823dea3101eS typedef struct { 3824dea3101eS ULP_BDL bdl; 3825dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 3826dea3101eS uint32_t word4Rsvd:7; 3827dea3101eS uint32_t fl:1; 3828dea3101eS uint32_t myID:24; 3829dea3101eS uint32_t word5Rsvd:8; 3830dea3101eS uint32_t remoteID:24; 3831dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 3832dea3101eS uint32_t myID:24; 3833dea3101eS uint32_t fl:1; 3834dea3101eS uint32_t word4Rsvd:7; 3835dea3101eS uint32_t remoteID:24; 3836dea3101eS uint32_t word5Rsvd:8; 3837dea3101eS #endif 3838dea3101eS } ELS_REQUEST64; 3839dea3101eS 3840dea3101eS /* IOCB Command template for GEN_REQUEST64 */ 3841dea3101eS typedef struct { 3842dea3101eS ULP_BDL bdl; 3843dea3101eS uint32_t xrsqRo; /* Starting Relative Offset */ 3844dea3101eS WORD5 w5; /* Header control/status word */ 3845dea3101eS } GEN_REQUEST64; 3846dea3101eS 3847dea3101eS /* IOCB Command template for RCV_ELS_REQ64 */ 3848dea3101eS typedef struct { 3849dea3101eS struct ulp_bde64 elsReq; 3850dea3101eS uint32_t rcvd1; 3851dea3101eS uint32_t parmRo; 3852dea3101eS 3853dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 3854dea3101eS uint32_t word5Rsvd:8; 3855dea3101eS uint32_t remoteID:24; 3856dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 3857dea3101eS uint32_t remoteID:24; 3858dea3101eS uint32_t word5Rsvd:8; 3859dea3101eS #endif 3860dea3101eS } RCV_ELS_REQ64; 3861dea3101eS 38629c2face6SJames Smart /* IOCB Command template for RCV_SEQ64 */ 38639c2face6SJames Smart struct rcv_seq64 { 38649c2face6SJames Smart struct ulp_bde64 elsReq; 38659c2face6SJames Smart uint32_t hbq_1; 38669c2face6SJames Smart uint32_t parmRo; 38679c2face6SJames Smart #ifdef __BIG_ENDIAN_BITFIELD 38689c2face6SJames Smart uint32_t rctl:8; 38699c2face6SJames Smart uint32_t type:8; 38709c2face6SJames Smart uint32_t dfctl:8; 38719c2face6SJames Smart uint32_t ls:1; 38729c2face6SJames Smart uint32_t fs:1; 38739c2face6SJames Smart uint32_t rsvd2:3; 38749c2face6SJames Smart uint32_t si:1; 38759c2face6SJames Smart uint32_t bc:1; 38769c2face6SJames Smart uint32_t rsvd3:1; 38779c2face6SJames Smart #else /* __LITTLE_ENDIAN_BITFIELD */ 38789c2face6SJames Smart uint32_t rsvd3:1; 38799c2face6SJames Smart uint32_t bc:1; 38809c2face6SJames Smart uint32_t si:1; 38819c2face6SJames Smart uint32_t rsvd2:3; 38829c2face6SJames Smart uint32_t fs:1; 38839c2face6SJames Smart uint32_t ls:1; 38849c2face6SJames Smart uint32_t dfctl:8; 38859c2face6SJames Smart uint32_t type:8; 38869c2face6SJames Smart uint32_t rctl:8; 38879c2face6SJames Smart #endif 38889c2face6SJames Smart }; 38899c2face6SJames Smart 3890dea3101eS /* IOCB Command template for all 64 bit FCP Initiator commands */ 3891dea3101eS typedef struct { 3892dea3101eS ULP_BDL bdl; 3893dea3101eS uint32_t fcpi_parm; 3894dea3101eS uint32_t fcpi_XRdy; /* transfer ready for IWRITE */ 3895dea3101eS } FCPI_FIELDS64; 3896dea3101eS 3897dea3101eS /* IOCB Command template for all 64 bit FCP Target commands */ 3898dea3101eS typedef struct { 3899dea3101eS ULP_BDL bdl; 3900dea3101eS uint32_t fcpt_Offset; 3901dea3101eS uint32_t fcpt_Length; /* transfer ready for IWRITE */ 3902dea3101eS } FCPT_FIELDS64; 3903dea3101eS 390457127f15SJames Smart /* IOCB Command template for Async Status iocb commands */ 390557127f15SJames Smart typedef struct { 390657127f15SJames Smart uint32_t rsvd[4]; 390757127f15SJames Smart uint32_t param; 390857127f15SJames Smart #ifdef __BIG_ENDIAN_BITFIELD 390957127f15SJames Smart uint16_t evt_code; /* High order bits word 5 */ 391057127f15SJames Smart uint16_t sub_ctxt_tag; /* Low order bits word 5 */ 391157127f15SJames Smart #else /* __LITTLE_ENDIAN_BITFIELD */ 391257127f15SJames Smart uint16_t sub_ctxt_tag; /* High order bits word 5 */ 391357127f15SJames Smart uint16_t evt_code; /* Low order bits word 5 */ 391457127f15SJames Smart #endif 391557127f15SJames Smart } ASYNCSTAT_FIELDS; 391657127f15SJames Smart #define ASYNC_TEMP_WARN 0x100 391757127f15SJames Smart #define ASYNC_TEMP_SAFE 0x101 3918cb69f7deSJames Smart #define ASYNC_STATUS_CN 0x102 391957127f15SJames Smart 3920ed957684SJames Smart /* IOCB Command template for CMD_IOCB_RCV_ELS64_CX (0xB7) 3921ed957684SJames Smart or CMD_IOCB_RCV_SEQ64_CX (0xB5) */ 3922ed957684SJames Smart 3923ed957684SJames Smart struct rcv_sli3 { 3924ed957684SJames Smart #ifdef __BIG_ENDIAN_BITFIELD 39257851fe2cSJames Smart uint16_t ox_id; 39267851fe2cSJames Smart uint16_t seq_cnt; 39277851fe2cSJames Smart 3928ed957684SJames Smart uint16_t vpi; 3929ed957684SJames Smart uint16_t word9Rsvd; 3930ed957684SJames Smart #else /* __LITTLE_ENDIAN */ 39317851fe2cSJames Smart uint16_t seq_cnt; 39327851fe2cSJames Smart uint16_t ox_id; 39337851fe2cSJames Smart 3934ed957684SJames Smart uint16_t word9Rsvd; 3935ed957684SJames Smart uint16_t vpi; 3936ed957684SJames Smart #endif 3937ed957684SJames Smart uint32_t word10Rsvd; 3938ed957684SJames Smart uint32_t acc_len; /* accumulated length */ 3939ed957684SJames Smart struct ulp_bde64 bde2; 3940ed957684SJames Smart }; 3941ed957684SJames Smart 394276bb24efSJames Smart /* Structure used for a single HBQ entry */ 394376bb24efSJames Smart struct lpfc_hbq_entry { 394476bb24efSJames Smart struct ulp_bde64 bde; 394576bb24efSJames Smart uint32_t buffer_tag; 394676bb24efSJames Smart }; 394792d7f7b0SJames Smart 394876bb24efSJames Smart /* IOCB Command template for QUE_XRI64_CX (0xB3) command */ 394976bb24efSJames Smart typedef struct { 395076bb24efSJames Smart struct lpfc_hbq_entry buff; 395176bb24efSJames Smart uint32_t rsvd; 395276bb24efSJames Smart uint32_t rsvd1; 395376bb24efSJames Smart } QUE_XRI64_CX_FIELDS; 395476bb24efSJames Smart 395576bb24efSJames Smart struct que_xri64cx_ext_fields { 395676bb24efSJames Smart uint32_t iotag64_low; 395776bb24efSJames Smart uint32_t iotag64_high; 395876bb24efSJames Smart uint32_t ebde_count; 395976bb24efSJames Smart uint32_t rsvd; 396076bb24efSJames Smart struct lpfc_hbq_entry buff[5]; 396176bb24efSJames Smart }; 396292d7f7b0SJames Smart 396381301a9bSJames Smart struct sli3_bg_fields { 396481301a9bSJames Smart uint32_t filler[6]; /* word 8-13 in IOCB */ 396581301a9bSJames Smart uint32_t bghm; /* word 14 - BlockGuard High Water Mark */ 396681301a9bSJames Smart /* Bitfields for bgstat (BlockGuard Status - word 15 of IOCB) */ 396781301a9bSJames Smart #define BGS_BIDIR_BG_PROF_MASK 0xff000000 396881301a9bSJames Smart #define BGS_BIDIR_BG_PROF_SHIFT 24 396981301a9bSJames Smart #define BGS_BIDIR_ERR_COND_FLAGS_MASK 0x003f0000 397081301a9bSJames Smart #define BGS_BIDIR_ERR_COND_SHIFT 16 397181301a9bSJames Smart #define BGS_BG_PROFILE_MASK 0x0000ff00 397281301a9bSJames Smart #define BGS_BG_PROFILE_SHIFT 8 397381301a9bSJames Smart #define BGS_INVALID_PROF_MASK 0x00000020 397481301a9bSJames Smart #define BGS_INVALID_PROF_SHIFT 5 397581301a9bSJames Smart #define BGS_UNINIT_DIF_BLOCK_MASK 0x00000010 397681301a9bSJames Smart #define BGS_UNINIT_DIF_BLOCK_SHIFT 4 397781301a9bSJames Smart #define BGS_HI_WATER_MARK_PRESENT_MASK 0x00000008 397881301a9bSJames Smart #define BGS_HI_WATER_MARK_PRESENT_SHIFT 3 397981301a9bSJames Smart #define BGS_REFTAG_ERR_MASK 0x00000004 398081301a9bSJames Smart #define BGS_REFTAG_ERR_SHIFT 2 398181301a9bSJames Smart #define BGS_APPTAG_ERR_MASK 0x00000002 398281301a9bSJames Smart #define BGS_APPTAG_ERR_SHIFT 1 398381301a9bSJames Smart #define BGS_GUARD_ERR_MASK 0x00000001 398481301a9bSJames Smart #define BGS_GUARD_ERR_SHIFT 0 398581301a9bSJames Smart uint32_t bgstat; /* word 15 - BlockGuard Status */ 398681301a9bSJames Smart }; 398781301a9bSJames Smart 398881301a9bSJames Smart static inline uint32_t 398981301a9bSJames Smart lpfc_bgs_get_bidir_bg_prof(uint32_t bgstat) 399081301a9bSJames Smart { 3991bc73905aSJames Smart return (bgstat & BGS_BIDIR_BG_PROF_MASK) >> 399281301a9bSJames Smart BGS_BIDIR_BG_PROF_SHIFT; 399381301a9bSJames Smart } 399481301a9bSJames Smart 399581301a9bSJames Smart static inline uint32_t 399681301a9bSJames Smart lpfc_bgs_get_bidir_err_cond(uint32_t bgstat) 399781301a9bSJames Smart { 3998bc73905aSJames Smart return (bgstat & BGS_BIDIR_ERR_COND_FLAGS_MASK) >> 399981301a9bSJames Smart BGS_BIDIR_ERR_COND_SHIFT; 400081301a9bSJames Smart } 400181301a9bSJames Smart 400281301a9bSJames Smart static inline uint32_t 400381301a9bSJames Smart lpfc_bgs_get_bg_prof(uint32_t bgstat) 400481301a9bSJames Smart { 4005bc73905aSJames Smart return (bgstat & BGS_BG_PROFILE_MASK) >> 400681301a9bSJames Smart BGS_BG_PROFILE_SHIFT; 400781301a9bSJames Smart } 400881301a9bSJames Smart 400981301a9bSJames Smart static inline uint32_t 401081301a9bSJames Smart lpfc_bgs_get_invalid_prof(uint32_t bgstat) 401181301a9bSJames Smart { 4012bc73905aSJames Smart return (bgstat & BGS_INVALID_PROF_MASK) >> 401381301a9bSJames Smart BGS_INVALID_PROF_SHIFT; 401481301a9bSJames Smart } 401581301a9bSJames Smart 401681301a9bSJames Smart static inline uint32_t 401781301a9bSJames Smart lpfc_bgs_get_uninit_dif_block(uint32_t bgstat) 401881301a9bSJames Smart { 4019bc73905aSJames Smart return (bgstat & BGS_UNINIT_DIF_BLOCK_MASK) >> 402081301a9bSJames Smart BGS_UNINIT_DIF_BLOCK_SHIFT; 402181301a9bSJames Smart } 402281301a9bSJames Smart 402381301a9bSJames Smart static inline uint32_t 402481301a9bSJames Smart lpfc_bgs_get_hi_water_mark_present(uint32_t bgstat) 402581301a9bSJames Smart { 4026bc73905aSJames Smart return (bgstat & BGS_HI_WATER_MARK_PRESENT_MASK) >> 402781301a9bSJames Smart BGS_HI_WATER_MARK_PRESENT_SHIFT; 402881301a9bSJames Smart } 402981301a9bSJames Smart 403081301a9bSJames Smart static inline uint32_t 403181301a9bSJames Smart lpfc_bgs_get_reftag_err(uint32_t bgstat) 403281301a9bSJames Smart { 4033bc73905aSJames Smart return (bgstat & BGS_REFTAG_ERR_MASK) >> 403481301a9bSJames Smart BGS_REFTAG_ERR_SHIFT; 403581301a9bSJames Smart } 403681301a9bSJames Smart 403781301a9bSJames Smart static inline uint32_t 403881301a9bSJames Smart lpfc_bgs_get_apptag_err(uint32_t bgstat) 403981301a9bSJames Smart { 4040bc73905aSJames Smart return (bgstat & BGS_APPTAG_ERR_MASK) >> 404181301a9bSJames Smart BGS_APPTAG_ERR_SHIFT; 404281301a9bSJames Smart } 404381301a9bSJames Smart 404481301a9bSJames Smart static inline uint32_t 404581301a9bSJames Smart lpfc_bgs_get_guard_err(uint32_t bgstat) 404681301a9bSJames Smart { 4047bc73905aSJames Smart return (bgstat & BGS_GUARD_ERR_MASK) >> 404881301a9bSJames Smart BGS_GUARD_ERR_SHIFT; 404981301a9bSJames Smart } 405081301a9bSJames Smart 405134b02dcdSJames Smart #define LPFC_EXT_DATA_BDE_COUNT 3 405234b02dcdSJames Smart struct fcp_irw_ext { 405334b02dcdSJames Smart uint32_t io_tag64_low; 405434b02dcdSJames Smart uint32_t io_tag64_high; 405534b02dcdSJames Smart #ifdef __BIG_ENDIAN_BITFIELD 405634b02dcdSJames Smart uint8_t reserved1; 405734b02dcdSJames Smart uint8_t reserved2; 405834b02dcdSJames Smart uint8_t reserved3; 405934b02dcdSJames Smart uint8_t ebde_count; 406034b02dcdSJames Smart #else /* __LITTLE_ENDIAN */ 406134b02dcdSJames Smart uint8_t ebde_count; 406234b02dcdSJames Smart uint8_t reserved3; 406334b02dcdSJames Smart uint8_t reserved2; 406434b02dcdSJames Smart uint8_t reserved1; 406534b02dcdSJames Smart #endif 406634b02dcdSJames Smart uint32_t reserved4; 406734b02dcdSJames Smart struct ulp_bde64 rbde; /* response bde */ 406834b02dcdSJames Smart struct ulp_bde64 dbde[LPFC_EXT_DATA_BDE_COUNT]; /* data BDE or BPL */ 406934b02dcdSJames Smart uint8_t icd[32]; /* immediate command data (32 bytes) */ 407034b02dcdSJames Smart }; 407134b02dcdSJames Smart 4072dea3101eS typedef struct _IOCB { /* IOCB structure */ 4073dea3101eS union { 4074dea3101eS GENERIC_RSP grsp; /* Generic response */ 4075dea3101eS XR_SEQ_FIELDS xrseq; /* XMIT / BCAST / RCV_SEQUENCE cmd */ 4076dea3101eS struct ulp_bde cont[3]; /* up to 3 continuation bdes */ 4077dea3101eS RCV_ELS_REQ rcvels; /* RCV_ELS_REQ template */ 4078dea3101eS AC_XRI acxri; /* ABORT / CLOSE_XRI template */ 4079dea3101eS A_MXRI64 amxri; /* abort multiple xri command overlay */ 4080dea3101eS GET_RPI getrpi; /* GET_RPI template */ 4081dea3101eS FCPI_FIELDS fcpi; /* FCP Initiator template */ 4082dea3101eS FCPT_FIELDS fcpt; /* FCP target template */ 4083dea3101eS 4084dea3101eS /* SLI-2 structures */ 4085dea3101eS 4086dea3101eS struct ulp_bde64 cont64[2]; /* up to 2 64 bit continuation 4087ed957684SJames Smart * bde_64s */ 4088dea3101eS ELS_REQUEST64 elsreq64; /* ELS_REQUEST template */ 4089dea3101eS GEN_REQUEST64 genreq64; /* GEN_REQUEST template */ 4090dea3101eS RCV_ELS_REQ64 rcvels64; /* RCV_ELS_REQ template */ 4091dea3101eS XMT_SEQ_FIELDS64 xseq64; /* XMIT / BCAST cmd */ 4092dea3101eS FCPI_FIELDS64 fcpi64; /* FCP 64 bit Initiator template */ 4093dea3101eS FCPT_FIELDS64 fcpt64; /* FCP 64 bit target template */ 409457127f15SJames Smart ASYNCSTAT_FIELDS asyncstat; /* async_status iocb */ 409576bb24efSJames Smart QUE_XRI64_CX_FIELDS quexri64cx; /* que_xri64_cx fields */ 40969c2face6SJames Smart struct rcv_seq64 rcvseq64; /* RCV_SEQ64 and RCV_CONT64 */ 4097546fc854SJames Smart struct sli4_bls_rsp bls_rsp; /* UNSOL ABTS BLS_RSP params */ 4098dea3101eS uint32_t ulpWord[IOCB_WORD_SZ - 2]; /* generic 6 'words' */ 4099dea3101eS } un; 4100dea3101eS union { 4101dea3101eS struct { 4102dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 4103dea3101eS uint16_t ulpContext; /* High order bits word 6 */ 4104dea3101eS uint16_t ulpIoTag; /* Low order bits word 6 */ 4105dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 4106dea3101eS uint16_t ulpIoTag; /* Low order bits word 6 */ 4107dea3101eS uint16_t ulpContext; /* High order bits word 6 */ 4108dea3101eS #endif 4109dea3101eS } t1; 4110dea3101eS struct { 4111dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 4112dea3101eS uint16_t ulpContext; /* High order bits word 6 */ 4113dea3101eS uint16_t ulpIoTag1:2; /* Low order bits word 6 */ 4114dea3101eS uint16_t ulpIoTag0:14; /* Low order bits word 6 */ 4115dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 4116dea3101eS uint16_t ulpIoTag0:14; /* Low order bits word 6 */ 4117dea3101eS uint16_t ulpIoTag1:2; /* Low order bits word 6 */ 4118dea3101eS uint16_t ulpContext; /* High order bits word 6 */ 4119dea3101eS #endif 4120dea3101eS } t2; 4121dea3101eS } un1; 4122dea3101eS #define ulpContext un1.t1.ulpContext 4123dea3101eS #define ulpIoTag un1.t1.ulpIoTag 4124dea3101eS #define ulpIoTag0 un1.t2.ulpIoTag0 4125dea3101eS 4126dea3101eS #ifdef __BIG_ENDIAN_BITFIELD 4127dea3101eS uint32_t ulpTimeout:8; 4128dea3101eS uint32_t ulpXS:1; 4129dea3101eS uint32_t ulpFCP2Rcvy:1; 4130dea3101eS uint32_t ulpPU:2; 4131dea3101eS uint32_t ulpIr:1; 4132dea3101eS uint32_t ulpClass:3; 4133dea3101eS uint32_t ulpCommand:8; 4134dea3101eS uint32_t ulpStatus:4; 4135dea3101eS uint32_t ulpBdeCount:2; 4136dea3101eS uint32_t ulpLe:1; 4137dea3101eS uint32_t ulpOwner:1; /* Low order bit word 7 */ 4138dea3101eS #else /* __LITTLE_ENDIAN_BITFIELD */ 4139dea3101eS uint32_t ulpOwner:1; /* Low order bit word 7 */ 4140dea3101eS uint32_t ulpLe:1; 4141dea3101eS uint32_t ulpBdeCount:2; 4142dea3101eS uint32_t ulpStatus:4; 4143dea3101eS uint32_t ulpCommand:8; 4144dea3101eS uint32_t ulpClass:3; 4145dea3101eS uint32_t ulpIr:1; 4146dea3101eS uint32_t ulpPU:2; 4147dea3101eS uint32_t ulpFCP2Rcvy:1; 4148dea3101eS uint32_t ulpXS:1; 4149dea3101eS uint32_t ulpTimeout:8; 4150dea3101eS #endif 415192d7f7b0SJames Smart 4152ed957684SJames Smart union { 4153ed957684SJames Smart struct rcv_sli3 rcvsli3; /* words 8 - 15 */ 415476bb24efSJames Smart 415576bb24efSJames Smart /* words 8-31 used for que_xri_cx iocb */ 415676bb24efSJames Smart struct que_xri64cx_ext_fields que_xri64cx_ext_words; 415734b02dcdSJames Smart struct fcp_irw_ext fcp_ext; 4158ed957684SJames Smart uint32_t sli3Words[24]; /* 96 extra bytes for SLI-3 */ 415981301a9bSJames Smart 416081301a9bSJames Smart /* words 8-15 for BlockGuard */ 416181301a9bSJames Smart struct sli3_bg_fields sli3_bg; 4162ed957684SJames Smart } unsli3; 4163dea3101eS 4164ed957684SJames Smart #define ulpCt_h ulpXS 4165ed957684SJames Smart #define ulpCt_l ulpFCP2Rcvy 4166ed957684SJames Smart 4167ed957684SJames Smart #define IOCB_FCP 1 /* IOCB is used for FCP ELS cmds-ulpRsvByte */ 4168ed957684SJames Smart #define IOCB_IP 2 /* IOCB is used for IP ELS cmds */ 4169dea3101eS #define PARM_UNUSED 0 /* PU field (Word 4) not used */ 4170dea3101eS #define PARM_REL_OFF 1 /* PU field (Word 4) = R. O. */ 4171dea3101eS #define PARM_READ_CHECK 2 /* PU field (Word 4) = Data Transfer Length */ 417292d7f7b0SJames Smart #define PARM_NPIV_DID 3 4173dea3101eS #define CLASS1 0 /* Class 1 */ 4174dea3101eS #define CLASS2 1 /* Class 2 */ 4175dea3101eS #define CLASS3 2 /* Class 3 */ 4176dea3101eS #define CLASS_FCP_INTERMIX 7 /* FCP Data->Cls 1, all else->Cls 2 */ 4177dea3101eS 4178dea3101eS #define IOSTAT_SUCCESS 0x0 /* ulpStatus - HBA defined */ 4179dea3101eS #define IOSTAT_FCP_RSP_ERROR 0x1 4180dea3101eS #define IOSTAT_REMOTE_STOP 0x2 4181dea3101eS #define IOSTAT_LOCAL_REJECT 0x3 4182dea3101eS #define IOSTAT_NPORT_RJT 0x4 4183dea3101eS #define IOSTAT_FABRIC_RJT 0x5 4184dea3101eS #define IOSTAT_NPORT_BSY 0x6 4185dea3101eS #define IOSTAT_FABRIC_BSY 0x7 4186dea3101eS #define IOSTAT_INTERMED_RSP 0x8 4187dea3101eS #define IOSTAT_LS_RJT 0x9 4188dea3101eS #define IOSTAT_BA_RJT 0xA 4189dea3101eS #define IOSTAT_RSVD1 0xB 4190dea3101eS #define IOSTAT_RSVD2 0xC 4191dea3101eS #define IOSTAT_RSVD3 0xD 4192dea3101eS #define IOSTAT_RSVD4 0xE 419392d7f7b0SJames Smart #define IOSTAT_NEED_BUFFER 0xF 4194dea3101eS #define IOSTAT_DRIVER_REJECT 0x10 /* ulpStatus - Driver defined */ 4195dea3101eS #define IOSTAT_DEFAULT 0xF /* Same as rsvd5 for now */ 4196dea3101eS #define IOSTAT_CNT 0x11 4197dea3101eS 4198dea3101eS } IOCB_t; 4199dea3101eS 4200dea3101eS 4201dea3101eS #define SLI1_SLIM_SIZE (4 * 1024) 4202dea3101eS 4203dea3101eS /* Up to 498 IOCBs will fit into 16k 4204dea3101eS * 256 (MAILBOX_t) + 140 (PCB_t) + ( 32 (IOCB_t) * 498 ) = < 16384 4205dea3101eS */ 4206ed957684SJames Smart #define SLI2_SLIM_SIZE (64 * 1024) 4207dea3101eS 4208dea3101eS /* Maximum IOCBs that will fit in SLI2 slim */ 4209dea3101eS #define MAX_SLI2_IOCB 498 4210ed957684SJames Smart #define MAX_SLIM_IOCB_SIZE (SLI2_SLIM_SIZE - \ 42117a470277SJames Smart (sizeof(MAILBOX_t) + sizeof(PCB_t) + \ 42127a470277SJames Smart sizeof(uint32_t) * MAILBOX_EXT_WSIZE)) 4213ed957684SJames Smart 4214ed957684SJames Smart /* HBQ entries are 4 words each = 4k */ 4215ed957684SJames Smart #define LPFC_TOTAL_HBQ_SIZE (sizeof(struct lpfc_hbq_entry) * \ 4216ed957684SJames Smart lpfc_sli_hbq_count()) 4217dea3101eS 4218dea3101eS struct lpfc_sli2_slim { 4219dea3101eS MAILBOX_t mbx; 42207a470277SJames Smart uint32_t mbx_ext_words[MAILBOX_EXT_WSIZE]; 4221dea3101eS PCB_t pcb; 4222ed957684SJames Smart IOCB_t IOCBs[MAX_SLIM_IOCB_SIZE]; 4223dea3101eS }; 4224dea3101eS 42252e0fef85SJames Smart /* 42262e0fef85SJames Smart * This function checks PCI device to allow special handling for LC HBAs. 42272e0fef85SJames Smart * 42282e0fef85SJames Smart * Parameters: 42292e0fef85SJames Smart * device : struct pci_dev 's device field 42302e0fef85SJames Smart * 42312e0fef85SJames Smart * return 1 => TRUE 42322e0fef85SJames Smart * 0 => FALSE 42332e0fef85SJames Smart */ 4234dea3101eS static inline int 4235dea3101eS lpfc_is_LC_HBA(unsigned short device) 4236dea3101eS { 4237dea3101eS if ((device == PCI_DEVICE_ID_TFLY) || 4238dea3101eS (device == PCI_DEVICE_ID_PFLY) || 4239dea3101eS (device == PCI_DEVICE_ID_LP101) || 4240dea3101eS (device == PCI_DEVICE_ID_BMID) || 4241dea3101eS (device == PCI_DEVICE_ID_BSMB) || 4242dea3101eS (device == PCI_DEVICE_ID_ZMID) || 4243dea3101eS (device == PCI_DEVICE_ID_ZSMB) || 424409372820SJames Smart (device == PCI_DEVICE_ID_SAT_MID) || 424509372820SJames Smart (device == PCI_DEVICE_ID_SAT_SMB) || 4246dea3101eS (device == PCI_DEVICE_ID_RFLY)) 4247dea3101eS return 1; 4248dea3101eS else 4249dea3101eS return 0; 4250dea3101eS } 4251858c9f6cSJames Smart 4252858c9f6cSJames Smart /* 4253858c9f6cSJames Smart * Determine if an IOCB failed because of a link event or firmware reset. 4254858c9f6cSJames Smart */ 4255858c9f6cSJames Smart 4256858c9f6cSJames Smart static inline int 4257858c9f6cSJames Smart lpfc_error_lost_link(IOCB_t *iocbp) 4258858c9f6cSJames Smart { 4259858c9f6cSJames Smart return (iocbp->ulpStatus == IOSTAT_LOCAL_REJECT && 4260858c9f6cSJames Smart (iocbp->un.ulpWord[4] == IOERR_SLI_ABORTED || 4261858c9f6cSJames Smart iocbp->un.ulpWord[4] == IOERR_LINK_DOWN || 4262858c9f6cSJames Smart iocbp->un.ulpWord[4] == IOERR_SLI_DOWN)); 4263858c9f6cSJames Smart } 426484774a4dSJames Smart 426584774a4dSJames Smart #define MENLO_TRANSPORT_TYPE 0xfe 426684774a4dSJames Smart #define MENLO_CONTEXT 0 426784774a4dSJames Smart #define MENLO_PU 3 426884774a4dSJames Smart #define MENLO_TIMEOUT 30 426984774a4dSJames Smart #define SETVAR_MLOMNT 0x103107 427084774a4dSJames Smart #define SETVAR_MLORST 0x103007 4271da0436e9SJames Smart 4272da0436e9SJames Smart #define BPL_ALIGN_SZ 8 /* 8 byte alignment for bpl and mbufs */ 4273